arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *   Yaniv Kamay  <yaniv@qumranet.com>
  15  *   Amit Shah    <amit.shah@qumranet.com>
  16  *   Ben-Ami Yassour <benami@il.ibm.com>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "mmu.h"
  22 #include "i8254.h"
  23 #include "tss.h"
  24 #include "kvm_cache_regs.h"
  25 #include "x86.h"
  26 #include "cpuid.h"
  27 #include "pmu.h"
  28 #include "hyperv.h"
  29
  30 #include <linux/clocksource.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/kvm.h>
  33 #include <linux/fs.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/export.h>
  36 #include <linux/moduleparam.h>
  37 #include <linux/mman.h>
  38 #include <linux/highmem.h>
  39 #include <linux/iommu.h>
  40 #include <linux/intel-iommu.h>
  41 #include <linux/cpufreq.h>
  42 #include <linux/user-return-notifier.h>
  43 #include <linux/srcu.h>
  44 #include <linux/slab.h>
  45 #include <linux/perf_event.h>
  46 #include <linux/uaccess.h>
  47 #include <linux/hash.h>
  48 #include <linux/pci.h>
  49 #include <linux/timekeeper_internal.h>
  50 #include <linux/pvclock_gtod.h>
  51 #include <linux/kvm_irqfd.h>
  52 #include <linux/irqbypass.h>
  53 #include <linux/sched/stat.h>
  54 #include <linux/sched/isolation.h>
  55 #include <linux/mem_encrypt.h>
  56
  57 #include <trace/events/kvm.h>
  58
  59 #include <asm/debugreg.h>
  60 #include <asm/msr.h>
  61 #include <asm/desc.h>
  62 #include <asm/mce.h>
  63 #include <linux/kernel_stat.h>
  64 #include <asm/fpu/internal.h> /* Ugh! */
  65 #include <asm/pvclock.h>
  66 #include <asm/div64.h>
  67 #include <asm/irq_remapping.h>
  68 #include <asm/mshyperv.h>
  69 #include <asm/hypervisor.h>
  70 #include <asm/intel_pt.h>
  71 #include <clocksource/hyperv_timer.h>
  72
  73 #define CREATE_TRACE_POINTS
  74 #include "trace.h"
  75
  76 #define MAX_IO_MSRS 256
  77 #define KVM_MAX_MCE_BANKS 32
  78 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  79 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  80
  81 #define emul_to_vcpu(ctxt) \
  82         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  83
  84 /* EFER defaults:
  85  * - enable syscall per default because its emulated by KVM
  86  * - enable LME and LMA per default on 64 bit KVM
  87  */
  88 #ifdef CONFIG_X86_64
  89 static
  90 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  91 #else
  92 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  93 #endif
  94
  95 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  96 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  97
  98 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
  99                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 100
 101 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 102 static void process_nmi(struct kvm_vcpu *vcpu);
 103 static void enter_smm(struct kvm_vcpu *vcpu);
 104 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 105 static void store_regs(struct kvm_vcpu *vcpu);
 106 static int sync_regs(struct kvm_vcpu *vcpu);
 107
 108 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
 109 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 110
 111 static bool __read_mostly ignore_msrs = 0;
 112 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 113
 114 static bool __read_mostly report_ignored_msrs = true;
 115 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 116
 117 unsigned int min_timer_period_us = 200;
 118 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 119
 120 static bool __read_mostly kvmclock_periodic_sync = true;
 121 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 122
 123 bool __read_mostly kvm_has_tsc_control;
 124 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 125 u32  __read_mostly kvm_max_guest_tsc_khz;
 126 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 127 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 128 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 129 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 130 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 131 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 132 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 133
 134 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 135 static u32 __read_mostly tsc_tolerance_ppm = 250;
 136 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 137
 138 /*
 139  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 140  * adaptive tuning starting from default advancment of 1000ns.  '0' disables
 141  * advancement entirely.  Any other value is used as-is and disables adaptive
 142  * tuning, i.e. allows priveleged userspace to set an exact advancement time.
 143  */
 144 static int __read_mostly lapic_timer_advance_ns = -1;
 145 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 146
 147 static bool __read_mostly vector_hashing = true;
 148 module_param(vector_hashing, bool, S_IRUGO);
 149
 150 bool __read_mostly enable_vmware_backdoor = false;
 151 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 152 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 153
 154 static bool __read_mostly force_emulation_prefix = false;
 155 module_param(force_emulation_prefix, bool, S_IRUGO);
 156
 157 int __read_mostly pi_inject_timer = -1;
 158 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
 159
 160 #define KVM_NR_SHARED_MSRS 16
 161
 162 struct kvm_shared_msrs_global {
 163         int nr;
 164         u32 msrs[KVM_NR_SHARED_MSRS];
 165 };
 166
 167 struct kvm_shared_msrs {
 168         struct user_return_notifier urn;
 169         bool registered;
 170         struct kvm_shared_msr_values {
 171                 u64 host;
 172                 u64 curr;
 173         } values[KVM_NR_SHARED_MSRS];
 174 };
 175
 176 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 177 static struct kvm_shared_msrs __percpu *shared_msrs;
 178
 179 struct kvm_stats_debugfs_item debugfs_entries[] = {
 180         { "pf_fixed", VCPU_STAT(pf_fixed) },
 181         { "pf_guest", VCPU_STAT(pf_guest) },
 182         { "tlb_flush", VCPU_STAT(tlb_flush) },
 183         { "invlpg", VCPU_STAT(invlpg) },
 184         { "exits", VCPU_STAT(exits) },
 185         { "io_exits", VCPU_STAT(io_exits) },
 186         { "mmio_exits", VCPU_STAT(mmio_exits) },
 187         { "signal_exits", VCPU_STAT(signal_exits) },
 188         { "irq_window", VCPU_STAT(irq_window_exits) },
 189         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 190         { "halt_exits", VCPU_STAT(halt_exits) },
 191         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 192         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 193         { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
 194         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 195         { "hypercalls", VCPU_STAT(hypercalls) },
 196         { "request_irq", VCPU_STAT(request_irq_exits) },
 197         { "irq_exits", VCPU_STAT(irq_exits) },
 198         { "host_state_reload", VCPU_STAT(host_state_reload) },
 199         { "fpu_reload", VCPU_STAT(fpu_reload) },
 200         { "insn_emulation", VCPU_STAT(insn_emulation) },
 201         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 202         { "irq_injections", VCPU_STAT(irq_injections) },
 203         { "nmi_injections", VCPU_STAT(nmi_injections) },
 204         { "req_event", VCPU_STAT(req_event) },
 205         { "l1d_flush", VCPU_STAT(l1d_flush) },
 206         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 207         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 208         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 209         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 210         { "mmu_flooded", VM_STAT(mmu_flooded) },
 211         { "mmu_recycled", VM_STAT(mmu_recycled) },
 212         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 213         { "mmu_unsync", VM_STAT(mmu_unsync) },
 214         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 215         { "largepages", VM_STAT(lpages) },
 216         { "max_mmu_page_hash_collisions",
 217                 VM_STAT(max_mmu_page_hash_collisions) },
 218         { NULL }
 219 };
 220
 221 u64 __read_mostly host_xcr0;
 222
 223 struct kmem_cache *x86_fpu_cache;
 224 EXPORT_SYMBOL_GPL(x86_fpu_cache);
 225
 226 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 227
 228 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 229 {
 230         int i;
 231         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 232                 vcpu->arch.apf.gfns[i] = ~0;
 233 }
 234
 235 static void kvm_on_user_return(struct user_return_notifier *urn)
 236 {
 237         unsigned slot;
 238         struct kvm_shared_msrs *locals
 239                 = container_of(urn, struct kvm_shared_msrs, urn);
 240         struct kvm_shared_msr_values *values;
 241         unsigned long flags;
 242
 243         /*
 244          * Disabling irqs at this point since the following code could be
 245          * interrupted and executed through kvm_arch_hardware_disable()
 246          */
 247         local_irq_save(flags);
 248         if (locals->registered) {
 249                 locals->registered = false;
 250                 user_return_notifier_unregister(urn);
 251         }
 252         local_irq_restore(flags);
 253         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 254                 values = &locals->values[slot];
 255                 if (values->host != values->curr) {
 256                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 257                         values->curr = values->host;
 258                 }
 259         }
 260 }
 261
 262 static void shared_msr_update(unsigned slot, u32 msr)
 263 {
 264         u64 value;
 265         unsigned int cpu = smp_processor_id();
 266         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 267
 268         /* only read, and nobody should modify it at this time,
 269          * so don't need lock */
 270         if (slot >= shared_msrs_global.nr) {
 271                 printk(KERN_ERR "kvm: invalid MSR slot!");
 272                 return;
 273         }
 274         rdmsrl_safe(msr, &value);
 275         smsr->values[slot].host = value;
 276         smsr->values[slot].curr = value;
 277 }
 278
 279 void kvm_define_shared_msr(unsigned slot, u32 msr)
 280 {
 281         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 282         shared_msrs_global.msrs[slot] = msr;
 283         if (slot >= shared_msrs_global.nr)
 284                 shared_msrs_global.nr = slot + 1;
 285 }
 286 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 287
 288 static void kvm_shared_msr_cpu_online(void)
 289 {
 290         unsigned i;
 291
 292         for (i = 0; i < shared_msrs_global.nr; ++i)
 293                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 294 }
 295
 296 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 297 {
 298         unsigned int cpu = smp_processor_id();
 299         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 300         int err;
 301
 302         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 303                 return 0;
 304         smsr->values[slot].curr = value;
 305         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 306         if (err)
 307                 return 1;
 308
 309         if (!smsr->registered) {
 310                 smsr->urn.on_user_return = kvm_on_user_return;
 311                 user_return_notifier_register(&smsr->urn);
 312                 smsr->registered = true;
 313         }
 314         return 0;
 315 }
 316 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 317
 318 static void drop_user_return_notifiers(void)
 319 {
 320         unsigned int cpu = smp_processor_id();
 321         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 322
 323         if (smsr->registered)
 324                 kvm_on_user_return(&smsr->urn);
 325 }
 326
 327 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 328 {
 329         return vcpu->arch.apic_base;
 330 }
 331 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 332
 333 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 334 {
 335         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 336 }
 337 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 338
 339 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 340 {
 341         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 342         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 343         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) | 0x2ff |
 344                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 345
 346         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 347                 return 1;
 348         if (!msr_info->host_initiated) {
 349                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 350                         return 1;
 351                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 352                         return 1;
 353         }
 354
 355         kvm_lapic_set_base(vcpu, msr_info->data);
 356         return 0;
 357 }
 358 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 359
 360 asmlinkage __visible void kvm_spurious_fault(void)
 361 {
 362         /* Fault while not rebooting.  We want the trace. */
 363         if (!kvm_rebooting)
 364                 BUG();
 365 }
 366 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 367
 368 #define EXCPT_BENIGN            0
 369 #define EXCPT_CONTRIBUTORY      1
 370 #define EXCPT_PF                2
 371
 372 static int exception_class(int vector)
 373 {
 374         switch (vector) {
 375         case PF_VECTOR:
 376                 return EXCPT_PF;
 377         case DE_VECTOR:
 378         case TS_VECTOR:
 379         case NP_VECTOR:
 380         case SS_VECTOR:
 381         case GP_VECTOR:
 382                 return EXCPT_CONTRIBUTORY;
 383         default:
 384                 break;
 385         }
 386         return EXCPT_BENIGN;
 387 }
 388
 389 #define EXCPT_FAULT             0
 390 #define EXCPT_TRAP              1
 391 #define EXCPT_ABORT             2
 392 #define EXCPT_INTERRUPT         3
 393
 394 static int exception_type(int vector)
 395 {
 396         unsigned int mask;
 397
 398         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 399                 return EXCPT_INTERRUPT;
 400
 401         mask = 1 << vector;
 402
 403         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 404         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 405                 return EXCPT_TRAP;
 406
 407         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 408                 return EXCPT_ABORT;
 409
 410         /* Reserved exceptions will result in fault */
 411         return EXCPT_FAULT;
 412 }
 413
 414 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 415 {
 416         unsigned nr = vcpu->arch.exception.nr;
 417         bool has_payload = vcpu->arch.exception.has_payload;
 418         unsigned long payload = vcpu->arch.exception.payload;
 419
 420         if (!has_payload)
 421                 return;
 422
 423         switch (nr) {
 424         case DB_VECTOR:
 425                 /*
 426                  * "Certain debug exceptions may clear bit 0-3.  The
 427                  * remaining contents of the DR6 register are never
 428                  * cleared by the processor".
 429                  */
 430                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 431                 /*
 432                  * DR6.RTM is set by all #DB exceptions that don't clear it.
 433                  */
 434                 vcpu->arch.dr6 |= DR6_RTM;
 435                 vcpu->arch.dr6 |= payload;
 436                 /*
 437                  * Bit 16 should be set in the payload whenever the #DB
 438                  * exception should clear DR6.RTM. This makes the payload
 439                  * compatible with the pending debug exceptions under VMX.
 440                  * Though not currently documented in the SDM, this also
 441                  * makes the payload compatible with the exit qualification
 442                  * for #DB exceptions under VMX.
 443                  */
 444                 vcpu->arch.dr6 ^= payload & DR6_RTM;
 445                 break;
 446         case PF_VECTOR:
 447                 vcpu->arch.cr2 = payload;
 448                 break;
 449         }
 450
 451         vcpu->arch.exception.has_payload = false;
 452         vcpu->arch.exception.payload = 0;
 453 }
 454 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 455
 456 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 457                 unsigned nr, bool has_error, u32 error_code,
 458                 bool has_payload, unsigned long payload, bool reinject)
 459 {
 460         u32 prev_nr;
 461         int class1, class2;
 462
 463         kvm_make_request(KVM_REQ_EVENT, vcpu);
 464
 465         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 466         queue:
 467                 if (has_error && !is_protmode(vcpu))
 468                         has_error = false;
 469                 if (reinject) {
 470                         /*
 471                          * On vmentry, vcpu->arch.exception.pending is only
 472                          * true if an event injection was blocked by
 473                          * nested_run_pending.  In that case, however,
 474                          * vcpu_enter_guest requests an immediate exit,
 475                          * and the guest shouldn't proceed far enough to
 476                          * need reinjection.
 477                          */
 478                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 479                         vcpu->arch.exception.injected = true;
 480                         if (WARN_ON_ONCE(has_payload)) {
 481                                 /*
 482                                  * A reinjected event has already
 483                                  * delivered its payload.
 484                                  */
 485                                 has_payload = false;
 486                                 payload = 0;
 487                         }
 488                 } else {
 489                         vcpu->arch.exception.pending = true;
 490                         vcpu->arch.exception.injected = false;
 491                 }
 492                 vcpu->arch.exception.has_error_code = has_error;
 493                 vcpu->arch.exception.nr = nr;
 494                 vcpu->arch.exception.error_code = error_code;
 495                 vcpu->arch.exception.has_payload = has_payload;
 496                 vcpu->arch.exception.payload = payload;
 497                 /*
 498                  * In guest mode, payload delivery should be deferred,
 499                  * so that the L1 hypervisor can intercept #PF before
 500                  * CR2 is modified (or intercept #DB before DR6 is
 501                  * modified under nVMX).  However, for ABI
 502                  * compatibility with KVM_GET_VCPU_EVENTS and
 503                  * KVM_SET_VCPU_EVENTS, we can't delay payload
 504                  * delivery unless userspace has enabled this
 505                  * functionality via the per-VM capability,
 506                  * KVM_CAP_EXCEPTION_PAYLOAD.
 507                  */
 508                 if (!vcpu->kvm->arch.exception_payload_enabled ||
 509                     !is_guest_mode(vcpu))
 510                         kvm_deliver_exception_payload(vcpu);
 511                 return;
 512         }
 513
 514         /* to check exception */
 515         prev_nr = vcpu->arch.exception.nr;
 516         if (prev_nr == DF_VECTOR) {
 517                 /* triple fault -> shutdown */
 518                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 519                 return;
 520         }
 521         class1 = exception_class(prev_nr);
 522         class2 = exception_class(nr);
 523         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 524                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 525                 /*
 526                  * Generate double fault per SDM Table 5-5.  Set
 527                  * exception.pending = true so that the double fault
 528                  * can trigger a nested vmexit.
 529                  */
 530                 vcpu->arch.exception.pending = true;
 531                 vcpu->arch.exception.injected = false;
 532                 vcpu->arch.exception.has_error_code = true;
 533                 vcpu->arch.exception.nr = DF_VECTOR;
 534                 vcpu->arch.exception.error_code = 0;
 535                 vcpu->arch.exception.has_payload = false;
 536                 vcpu->arch.exception.payload = 0;
 537         } else
 538                 /* replace previous exception with a new one in a hope
 539                    that instruction re-execution will regenerate lost
 540                    exception */
 541                 goto queue;
 542 }
 543
 544 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 545 {
 546         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 547 }
 548 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 549
 550 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 551 {
 552         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 553 }
 554 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 555
 556 static void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 557                                   unsigned long payload)
 558 {
 559         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 560 }
 561
 562 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 563                                     u32 error_code, unsigned long payload)
 564 {
 565         kvm_multiple_exception(vcpu, nr, true, error_code,
 566                                true, payload, false);
 567 }
 568
 569 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 570 {
 571         if (err)
 572                 kvm_inject_gp(vcpu, 0);
 573         else
 574                 return kvm_skip_emulated_instruction(vcpu);
 575
 576         return 1;
 577 }
 578 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 579
 580 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 581 {
 582         ++vcpu->stat.pf_guest;
 583         vcpu->arch.exception.nested_apf =
 584                 is_guest_mode(vcpu) && fault->async_page_fault;
 585         if (vcpu->arch.exception.nested_apf) {
 586                 vcpu->arch.apf.nested_apf_token = fault->address;
 587                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 588         } else {
 589                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 590                                         fault->address);
 591         }
 592 }
 593 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 594
 595 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 596 {
 597         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 598                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 599         else
 600                 vcpu->arch.mmu->inject_page_fault(vcpu, fault);
 601
 602         return fault->nested_page_fault;
 603 }
 604
 605 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 606 {
 607         atomic_inc(&vcpu->arch.nmi_queued);
 608         kvm_make_request(KVM_REQ_NMI, vcpu);
 609 }
 610 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 611
 612 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 613 {
 614         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 615 }
 616 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 617
 618 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 619 {
 620         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 621 }
 622 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 623
 624 /*
 625  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 626  * a #GP and return false.
 627  */
 628 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 629 {
 630         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 631                 return true;
 632         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 633         return false;
 634 }
 635 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 636
 637 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 638 {
 639         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 640                 return true;
 641
 642         kvm_queue_exception(vcpu, UD_VECTOR);
 643         return false;
 644 }
 645 EXPORT_SYMBOL_GPL(kvm_require_dr);
 646
 647 /*
 648  * This function will be used to read from the physical memory of the currently
 649  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 650  * can read from guest physical or from the guest's guest physical memory.
 651  */
 652 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 653                             gfn_t ngfn, void *data, int offset, int len,
 654                             u32 access)
 655 {
 656         struct x86_exception exception;
 657         gfn_t real_gfn;
 658         gpa_t ngpa;
 659
 660         ngpa     = gfn_to_gpa(ngfn);
 661         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 662         if (real_gfn == UNMAPPED_GVA)
 663                 return -EFAULT;
 664
 665         real_gfn = gpa_to_gfn(real_gfn);
 666
 667         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 668 }
 669 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 670
 671 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 672                                void *data, int offset, int len, u32 access)
 673 {
 674         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 675                                        data, offset, len, access);
 676 }
 677
 678 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
 679 {
 680         return rsvd_bits(cpuid_maxphyaddr(vcpu), 63) | rsvd_bits(5, 8) |
 681                rsvd_bits(1, 2);
 682 }
 683
 684 /*
 685  * Load the pae pdptrs.  Return 1 if they are all valid, 0 otherwise.
 686  */
 687 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 688 {
 689         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 690         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 691         int i;
 692         int ret;
 693         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 694
 695         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 696                                       offset * sizeof(u64), sizeof(pdpte),
 697                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 698         if (ret < 0) {
 699                 ret = 0;
 700                 goto out;
 701         }
 702         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 703                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 704                     (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
 705                         ret = 0;
 706                         goto out;
 707                 }
 708         }
 709         ret = 1;
 710
 711         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 712         __set_bit(VCPU_EXREG_PDPTR,
 713                   (unsigned long *)&vcpu->arch.regs_avail);
 714         __set_bit(VCPU_EXREG_PDPTR,
 715                   (unsigned long *)&vcpu->arch.regs_dirty);
 716 out:
 717
 718         return ret;
 719 }
 720 EXPORT_SYMBOL_GPL(load_pdptrs);
 721
 722 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 723 {
 724         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 725         bool changed = true;
 726         int offset;
 727         gfn_t gfn;
 728         int r;
 729
 730         if (!is_pae_paging(vcpu))
 731                 return false;
 732
 733         if (!test_bit(VCPU_EXREG_PDPTR,
 734                       (unsigned long *)&vcpu->arch.regs_avail))
 735                 return true;
 736
 737         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 738         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 739         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 740                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 741         if (r < 0)
 742                 goto out;
 743         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 744 out:
 745
 746         return changed;
 747 }
 748 EXPORT_SYMBOL_GPL(pdptrs_changed);
 749
 750 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 751 {
 752         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 753         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 754
 755         cr0 |= X86_CR0_ET;
 756
 757 #ifdef CONFIG_X86_64
 758         if (cr0 & 0xffffffff00000000UL)
 759                 return 1;
 760 #endif
 761
 762         cr0 &= ~CR0_RESERVED_BITS;
 763
 764         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 765                 return 1;
 766
 767         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 768                 return 1;
 769
 770         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 771 #ifdef CONFIG_X86_64
 772                 if ((vcpu->arch.efer & EFER_LME)) {
 773                         int cs_db, cs_l;
 774
 775                         if (!is_pae(vcpu))
 776                                 return 1;
 777                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 778                         if (cs_l)
 779                                 return 1;
 780                 } else
 781 #endif
 782                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 783                                                  kvm_read_cr3(vcpu)))
 784                         return 1;
 785         }
 786
 787         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 788                 return 1;
 789
 790         kvm_x86_ops->set_cr0(vcpu, cr0);
 791
 792         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 793                 kvm_clear_async_pf_completion_queue(vcpu);
 794                 kvm_async_pf_hash_reset(vcpu);
 795         }
 796
 797         if ((cr0 ^ old_cr0) & update_bits)
 798                 kvm_mmu_reset_context(vcpu);
 799
 800         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 801             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 802             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 803                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 804
 805         return 0;
 806 }
 807 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 808
 809 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 810 {
 811         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 812 }
 813 EXPORT_SYMBOL_GPL(kvm_lmsw);
 814
 815 void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 816 {
 817         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 818                         !vcpu->guest_xcr0_loaded) {
 819                 /* kvm_set_xcr() also depends on this */
 820                 if (vcpu->arch.xcr0 != host_xcr0)
 821                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 822                 vcpu->guest_xcr0_loaded = 1;
 823         }
 824 }
 825 EXPORT_SYMBOL_GPL(kvm_load_guest_xcr0);
 826
 827 void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 828 {
 829         if (vcpu->guest_xcr0_loaded) {
 830                 if (vcpu->arch.xcr0 != host_xcr0)
 831                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 832                 vcpu->guest_xcr0_loaded = 0;
 833         }
 834 }
 835 EXPORT_SYMBOL_GPL(kvm_put_guest_xcr0);
 836
 837 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 838 {
 839         u64 xcr0 = xcr;
 840         u64 old_xcr0 = vcpu->arch.xcr0;
 841         u64 valid_bits;
 842
 843         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 844         if (index != XCR_XFEATURE_ENABLED_MASK)
 845                 return 1;
 846         if (!(xcr0 & XFEATURE_MASK_FP))
 847                 return 1;
 848         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 849                 return 1;
 850
 851         /*
 852          * Do not allow the guest to set bits that we do not support
 853          * saving.  However, xcr0 bit 0 is always set, even if the
 854          * emulated CPU does not support XSAVE (see fx_init).
 855          */
 856         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 857         if (xcr0 & ~valid_bits)
 858                 return 1;
 859
 860         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 861             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 862                 return 1;
 863
 864         if (xcr0 & XFEATURE_MASK_AVX512) {
 865                 if (!(xcr0 & XFEATURE_MASK_YMM))
 866                         return 1;
 867                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 868                         return 1;
 869         }
 870         vcpu->arch.xcr0 = xcr0;
 871
 872         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 873                 kvm_update_cpuid(vcpu);
 874         return 0;
 875 }
 876
 877 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 878 {
 879         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 880             __kvm_set_xcr(vcpu, index, xcr)) {
 881                 kvm_inject_gp(vcpu, 0);
 882                 return 1;
 883         }
 884         return 0;
 885 }
 886 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 887
 888 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 889 {
 890         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 891         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 892                                    X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
 893
 894         if (cr4 & CR4_RESERVED_BITS)
 895                 return 1;
 896
 897         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) && (cr4 & X86_CR4_OSXSAVE))
 898                 return 1;
 899
 900         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMEP) && (cr4 & X86_CR4_SMEP))
 901                 return 1;
 902
 903         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMAP) && (cr4 & X86_CR4_SMAP))
 904                 return 1;
 905
 906         if (!guest_cpuid_has(vcpu, X86_FEATURE_FSGSBASE) && (cr4 & X86_CR4_FSGSBASE))
 907                 return 1;
 908
 909         if (!guest_cpuid_has(vcpu, X86_FEATURE_PKU) && (cr4 & X86_CR4_PKE))
 910                 return 1;
 911
 912         if (!guest_cpuid_has(vcpu, X86_FEATURE_LA57) && (cr4 & X86_CR4_LA57))
 913                 return 1;
 914
 915         if (!guest_cpuid_has(vcpu, X86_FEATURE_UMIP) && (cr4 & X86_CR4_UMIP))
 916                 return 1;
 917
 918         if (is_long_mode(vcpu)) {
 919                 if (!(cr4 & X86_CR4_PAE))
 920                         return 1;
 921         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 922                    && ((cr4 ^ old_cr4) & pdptr_bits)
 923                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 924                                    kvm_read_cr3(vcpu)))
 925                 return 1;
 926
 927         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 928                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
 929                         return 1;
 930
 931                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 932                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 933                         return 1;
 934         }
 935
 936         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 937                 return 1;
 938
 939         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 940             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 941                 kvm_mmu_reset_context(vcpu);
 942
 943         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
 944                 kvm_update_cpuid(vcpu);
 945
 946         return 0;
 947 }
 948 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 949
 950 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 951 {
 952         bool skip_tlb_flush = false;
 953 #ifdef CONFIG_X86_64
 954         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
 955
 956         if (pcid_enabled) {
 957                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
 958                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
 959         }
 960 #endif
 961
 962         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 963                 if (!skip_tlb_flush) {
 964                         kvm_mmu_sync_roots(vcpu);
 965                         kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 966                 }
 967                 return 0;
 968         }
 969
 970         if (is_long_mode(vcpu) &&
 971             (cr3 & rsvd_bits(cpuid_maxphyaddr(vcpu), 63)))
 972                 return 1;
 973         else if (is_pae_paging(vcpu) &&
 974                  !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 975                 return 1;
 976
 977         kvm_mmu_new_cr3(vcpu, cr3, skip_tlb_flush);
 978         vcpu->arch.cr3 = cr3;
 979         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 980
 981         return 0;
 982 }
 983 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 984
 985 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 986 {
 987         if (cr8 & CR8_RESERVED_BITS)
 988                 return 1;
 989         if (lapic_in_kernel(vcpu))
 990                 kvm_lapic_set_tpr(vcpu, cr8);
 991         else
 992                 vcpu->arch.cr8 = cr8;
 993         return 0;
 994 }
 995 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 996
 997 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 998 {
 999         if (lapic_in_kernel(vcpu))
1000                 return kvm_lapic_get_cr8(vcpu);
1001         else
1002                 return vcpu->arch.cr8;
1003 }
1004 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1005
1006 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1007 {
1008         int i;
1009
1010         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1011                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1012                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1013                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
1014         }
1015 }
1016
1017 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
1018 {
1019         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1020                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
1021 }
1022
1023 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
1024 {
1025         unsigned long dr7;
1026
1027         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1028                 dr7 = vcpu->arch.guest_debug_dr7;
1029         else
1030                 dr7 = vcpu->arch.dr7;
1031         kvm_x86_ops->set_dr7(vcpu, dr7);
1032         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1033         if (dr7 & DR7_BP_EN_MASK)
1034                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1035 }
1036
1037 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1038 {
1039         u64 fixed = DR6_FIXED_1;
1040
1041         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1042                 fixed |= DR6_RTM;
1043         return fixed;
1044 }
1045
1046 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1047 {
1048         switch (dr) {
1049         case 0 ... 3:
1050                 vcpu->arch.db[dr] = val;
1051                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1052                         vcpu->arch.eff_db[dr] = val;
1053                 break;
1054         case 4:
1055                 /* fall through */
1056         case 6:
1057                 if (val & 0xffffffff00000000ULL)
1058                         return -1; /* #GP */
1059                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1060                 kvm_update_dr6(vcpu);
1061                 break;
1062         case 5:
1063                 /* fall through */
1064         default: /* 7 */
1065                 if (val & 0xffffffff00000000ULL)
1066                         return -1; /* #GP */
1067                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1068                 kvm_update_dr7(vcpu);
1069                 break;
1070         }
1071
1072         return 0;
1073 }
1074
1075 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1076 {
1077         if (__kvm_set_dr(vcpu, dr, val)) {
1078                 kvm_inject_gp(vcpu, 0);
1079                 return 1;
1080         }
1081         return 0;
1082 }
1083 EXPORT_SYMBOL_GPL(kvm_set_dr);
1084
1085 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1086 {
1087         switch (dr) {
1088         case 0 ... 3:
1089                 *val = vcpu->arch.db[dr];
1090                 break;
1091         case 4:
1092                 /* fall through */
1093         case 6:
1094                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1095                         *val = vcpu->arch.dr6;
1096                 else
1097                         *val = kvm_x86_ops->get_dr6(vcpu);
1098                 break;
1099         case 5:
1100                 /* fall through */
1101         default: /* 7 */
1102                 *val = vcpu->arch.dr7;
1103                 break;
1104         }
1105         return 0;
1106 }
1107 EXPORT_SYMBOL_GPL(kvm_get_dr);
1108
1109 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
1110 {
1111         u32 ecx = kvm_rcx_read(vcpu);
1112         u64 data;
1113         int err;
1114
1115         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
1116         if (err)
1117                 return err;
1118         kvm_rax_write(vcpu, (u32)data);
1119         kvm_rdx_write(vcpu, data >> 32);
1120         return err;
1121 }
1122 EXPORT_SYMBOL_GPL(kvm_rdpmc);
1123
1124 /*
1125  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1126  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1127  *
1128  * This list is modified at module load time to reflect the
1129  * capabilities of the host cpu. This capabilities test skips MSRs that are
1130  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
1131  * may depend on host virtualization features rather than host cpu features.
1132  */
1133
1134 static u32 msrs_to_save[] = {
1135         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1136         MSR_STAR,
1137 #ifdef CONFIG_X86_64
1138         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1139 #endif
1140         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1141         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1142         MSR_IA32_SPEC_CTRL,
1143         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1144         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1145         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1146         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1147         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1148         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1149         MSR_IA32_UMWAIT_CONTROL,
1150
1151         MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1152         MSR_ARCH_PERFMON_FIXED_CTR0 + 2, MSR_ARCH_PERFMON_FIXED_CTR0 + 3,
1153         MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1154         MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1155         MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1156         MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1157         MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1158         MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1159         MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1160         MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1161         MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1162         MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1163         MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1164         MSR_ARCH_PERFMON_PERFCTR0 + 18, MSR_ARCH_PERFMON_PERFCTR0 + 19,
1165         MSR_ARCH_PERFMON_PERFCTR0 + 20, MSR_ARCH_PERFMON_PERFCTR0 + 21,
1166         MSR_ARCH_PERFMON_PERFCTR0 + 22, MSR_ARCH_PERFMON_PERFCTR0 + 23,
1167         MSR_ARCH_PERFMON_PERFCTR0 + 24, MSR_ARCH_PERFMON_PERFCTR0 + 25,
1168         MSR_ARCH_PERFMON_PERFCTR0 + 26, MSR_ARCH_PERFMON_PERFCTR0 + 27,
1169         MSR_ARCH_PERFMON_PERFCTR0 + 28, MSR_ARCH_PERFMON_PERFCTR0 + 29,
1170         MSR_ARCH_PERFMON_PERFCTR0 + 30, MSR_ARCH_PERFMON_PERFCTR0 + 31,
1171         MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1172         MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1173         MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1174         MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1175         MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1176         MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1177         MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1178         MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1179         MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1180         MSR_ARCH_PERFMON_EVENTSEL0 + 18, MSR_ARCH_PERFMON_EVENTSEL0 + 19,
1181         MSR_ARCH_PERFMON_EVENTSEL0 + 20, MSR_ARCH_PERFMON_EVENTSEL0 + 21,
1182         MSR_ARCH_PERFMON_EVENTSEL0 + 22, MSR_ARCH_PERFMON_EVENTSEL0 + 23,
1183         MSR_ARCH_PERFMON_EVENTSEL0 + 24, MSR_ARCH_PERFMON_EVENTSEL0 + 25,
1184         MSR_ARCH_PERFMON_EVENTSEL0 + 26, MSR_ARCH_PERFMON_EVENTSEL0 + 27,
1185         MSR_ARCH_PERFMON_EVENTSEL0 + 28, MSR_ARCH_PERFMON_EVENTSEL0 + 29,
1186         MSR_ARCH_PERFMON_EVENTSEL0 + 30, MSR_ARCH_PERFMON_EVENTSEL0 + 31,
1187 };
1188
1189 static unsigned num_msrs_to_save;
1190
1191 static u32 emulated_msrs[] = {
1192         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1193         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1194         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1195         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1196         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1197         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1198         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1199         HV_X64_MSR_RESET,
1200         HV_X64_MSR_VP_INDEX,
1201         HV_X64_MSR_VP_RUNTIME,
1202         HV_X64_MSR_SCONTROL,
1203         HV_X64_MSR_STIMER0_CONFIG,
1204         HV_X64_MSR_VP_ASSIST_PAGE,
1205         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1206         HV_X64_MSR_TSC_EMULATION_STATUS,
1207
1208         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1209         MSR_KVM_PV_EOI_EN,
1210
1211         MSR_IA32_TSC_ADJUST,
1212         MSR_IA32_TSCDEADLINE,
1213         MSR_IA32_ARCH_CAPABILITIES,
1214         MSR_IA32_MISC_ENABLE,
1215         MSR_IA32_MCG_STATUS,
1216         MSR_IA32_MCG_CTL,
1217         MSR_IA32_MCG_EXT_CTL,
1218         MSR_IA32_SMBASE,
1219         MSR_SMI_COUNT,
1220         MSR_PLATFORM_INFO,
1221         MSR_MISC_FEATURES_ENABLES,
1222         MSR_AMD64_VIRT_SPEC_CTRL,
1223         MSR_IA32_POWER_CTL,
1224
1225         /*
1226          * The following list leaves out MSRs whose values are determined
1227          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1228          * We always support the "true" VMX control MSRs, even if the host
1229          * processor does not, so I am putting these registers here rather
1230          * than in msrs_to_save.
1231          */
1232         MSR_IA32_VMX_BASIC,
1233         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1234         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1235         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1236         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1237         MSR_IA32_VMX_MISC,
1238         MSR_IA32_VMX_CR0_FIXED0,
1239         MSR_IA32_VMX_CR4_FIXED0,
1240         MSR_IA32_VMX_VMCS_ENUM,
1241         MSR_IA32_VMX_PROCBASED_CTLS2,
1242         MSR_IA32_VMX_EPT_VPID_CAP,
1243         MSR_IA32_VMX_VMFUNC,
1244
1245         MSR_K7_HWCR,
1246         MSR_KVM_POLL_CONTROL,
1247 };
1248
1249 static unsigned num_emulated_msrs;
1250
1251 /*
1252  * List of msr numbers which are used to expose MSR-based features that
1253  * can be used by a hypervisor to validate requested CPU features.
1254  */
1255 static u32 msr_based_features[] = {
1256         MSR_IA32_VMX_BASIC,
1257         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1258         MSR_IA32_VMX_PINBASED_CTLS,
1259         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1260         MSR_IA32_VMX_PROCBASED_CTLS,
1261         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1262         MSR_IA32_VMX_EXIT_CTLS,
1263         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1264         MSR_IA32_VMX_ENTRY_CTLS,
1265         MSR_IA32_VMX_MISC,
1266         MSR_IA32_VMX_CR0_FIXED0,
1267         MSR_IA32_VMX_CR0_FIXED1,
1268         MSR_IA32_VMX_CR4_FIXED0,
1269         MSR_IA32_VMX_CR4_FIXED1,
1270         MSR_IA32_VMX_VMCS_ENUM,
1271         MSR_IA32_VMX_PROCBASED_CTLS2,
1272         MSR_IA32_VMX_EPT_VPID_CAP,
1273         MSR_IA32_VMX_VMFUNC,
1274
1275         MSR_F10H_DECFG,
1276         MSR_IA32_UCODE_REV,
1277         MSR_IA32_ARCH_CAPABILITIES,
1278 };
1279
1280 static unsigned int num_msr_based_features;
1281
1282 static u64 kvm_get_arch_capabilities(void)
1283 {
1284         u64 data = 0;
1285
1286         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1287                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1288
1289         /*
1290          * If we're doing cache flushes (either "always" or "cond")
1291          * we will do one whenever the guest does a vmlaunch/vmresume.
1292          * If an outer hypervisor is doing the cache flush for us
1293          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1294          * capability to the guest too, and if EPT is disabled we're not
1295          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1296          * require a nested hypervisor to do a flush of its own.
1297          */
1298         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1299                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1300
1301         if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1302                 data |= ARCH_CAP_RDCL_NO;
1303         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1304                 data |= ARCH_CAP_SSB_NO;
1305         if (!boot_cpu_has_bug(X86_BUG_MDS))
1306                 data |= ARCH_CAP_MDS_NO;
1307
1308         return data;
1309 }
1310
1311 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1312 {
1313         switch (msr->index) {
1314         case MSR_IA32_ARCH_CAPABILITIES:
1315                 msr->data = kvm_get_arch_capabilities();
1316                 break;
1317         case MSR_IA32_UCODE_REV:
1318                 rdmsrl_safe(msr->index, &msr->data);
1319                 break;
1320         default:
1321                 if (kvm_x86_ops->get_msr_feature(msr))
1322                         return 1;
1323         }
1324         return 0;
1325 }
1326
1327 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1328 {
1329         struct kvm_msr_entry msr;
1330         int r;
1331
1332         msr.index = index;
1333         r = kvm_get_msr_feature(&msr);
1334         if (r)
1335                 return r;
1336
1337         *data = msr.data;
1338
1339         return 0;
1340 }
1341
1342 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1343 {
1344         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1345                 return false;
1346
1347         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1348                 return false;
1349
1350         if (efer & (EFER_LME | EFER_LMA) &&
1351             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1352                 return false;
1353
1354         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1355                 return false;
1356
1357         return true;
1358
1359 }
1360 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1361 {
1362         if (efer & efer_reserved_bits)
1363                 return false;
1364
1365         return __kvm_valid_efer(vcpu, efer);
1366 }
1367 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1368
1369 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1370 {
1371         u64 old_efer = vcpu->arch.efer;
1372         u64 efer = msr_info->data;
1373
1374         if (efer & efer_reserved_bits)
1375                 return 1;
1376
1377         if (!msr_info->host_initiated) {
1378                 if (!__kvm_valid_efer(vcpu, efer))
1379                         return 1;
1380
1381                 if (is_paging(vcpu) &&
1382                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1383                         return 1;
1384         }
1385
1386         efer &= ~EFER_LMA;
1387         efer |= vcpu->arch.efer & EFER_LMA;
1388
1389         kvm_x86_ops->set_efer(vcpu, efer);
1390
1391         /* Update reserved bits */
1392         if ((efer ^ old_efer) & EFER_NX)
1393                 kvm_mmu_reset_context(vcpu);
1394
1395         return 0;
1396 }
1397
1398 void kvm_enable_efer_bits(u64 mask)
1399 {
1400        efer_reserved_bits &= ~mask;
1401 }
1402 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1403
1404 /*
1405  * Write @data into the MSR specified by @index.  Select MSR specific fault
1406  * checks are bypassed if @host_initiated is %true.
1407  * Returns 0 on success, non-0 otherwise.
1408  * Assumes vcpu_load() was already called.
1409  */
1410 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1411                          bool host_initiated)
1412 {
1413         struct msr_data msr;
1414
1415         switch (index) {
1416         case MSR_FS_BASE:
1417         case MSR_GS_BASE:
1418         case MSR_KERNEL_GS_BASE:
1419         case MSR_CSTAR:
1420         case MSR_LSTAR:
1421                 if (is_noncanonical_address(data, vcpu))
1422                         return 1;
1423                 break;
1424         case MSR_IA32_SYSENTER_EIP:
1425         case MSR_IA32_SYSENTER_ESP:
1426                 /*
1427                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1428                  * non-canonical address is written on Intel but not on
1429                  * AMD (which ignores the top 32-bits, because it does
1430                  * not implement 64-bit SYSENTER).
1431                  *
1432                  * 64-bit code should hence be able to write a non-canonical
1433                  * value on AMD.  Making the address canonical ensures that
1434                  * vmentry does not fail on Intel after writing a non-canonical
1435                  * value, and that something deterministic happens if the guest
1436                  * invokes 64-bit SYSENTER.
1437                  */
1438                 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1439         }
1440
1441         msr.data = data;
1442         msr.index = index;
1443         msr.host_initiated = host_initiated;
1444
1445         return kvm_x86_ops->set_msr(vcpu, &msr);
1446 }
1447
1448 /*
1449  * Read the MSR specified by @index into @data.  Select MSR specific fault
1450  * checks are bypassed if @host_initiated is %true.
1451  * Returns 0 on success, non-0 otherwise.
1452  * Assumes vcpu_load() was already called.
1453  */
1454 static int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1455                          bool host_initiated)
1456 {
1457         struct msr_data msr;
1458         int ret;
1459
1460         msr.index = index;
1461         msr.host_initiated = host_initiated;
1462
1463         ret = kvm_x86_ops->get_msr(vcpu, &msr);
1464         if (!ret)
1465                 *data = msr.data;
1466         return ret;
1467 }
1468
1469 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1470 {
1471         return __kvm_get_msr(vcpu, index, data, false);
1472 }
1473 EXPORT_SYMBOL_GPL(kvm_get_msr);
1474
1475 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1476 {
1477         return __kvm_set_msr(vcpu, index, data, false);
1478 }
1479 EXPORT_SYMBOL_GPL(kvm_set_msr);
1480
1481 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1482 {
1483         u32 ecx = kvm_rcx_read(vcpu);
1484         u64 data;
1485
1486         if (kvm_get_msr(vcpu, ecx, &data)) {
1487                 trace_kvm_msr_read_ex(ecx);
1488                 kvm_inject_gp(vcpu, 0);
1489                 return 1;
1490         }
1491
1492         trace_kvm_msr_read(ecx, data);
1493
1494         kvm_rax_write(vcpu, data & -1u);
1495         kvm_rdx_write(vcpu, (data >> 32) & -1u);
1496         return kvm_skip_emulated_instruction(vcpu);
1497 }
1498 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1499
1500 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1501 {
1502         u32 ecx = kvm_rcx_read(vcpu);
1503         u64 data = kvm_read_edx_eax(vcpu);
1504
1505         if (kvm_set_msr(vcpu, ecx, data)) {
1506                 trace_kvm_msr_write_ex(ecx, data);
1507                 kvm_inject_gp(vcpu, 0);
1508                 return 1;
1509         }
1510
1511         trace_kvm_msr_write(ecx, data);
1512         return kvm_skip_emulated_instruction(vcpu);
1513 }
1514 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1515
1516 /*
1517  * Adapt set_msr() to msr_io()'s calling convention
1518  */
1519 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1520 {
1521         return __kvm_get_msr(vcpu, index, data, true);
1522 }
1523
1524 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1525 {
1526         return __kvm_set_msr(vcpu, index, *data, true);
1527 }
1528
1529 #ifdef CONFIG_X86_64
1530 struct pvclock_gtod_data {
1531         seqcount_t      seq;
1532
1533         struct { /* extract of a clocksource struct */
1534                 int vclock_mode;
1535                 u64     cycle_last;
1536                 u64     mask;
1537                 u32     mult;
1538                 u32     shift;
1539         } clock;
1540
1541         u64             boot_ns;
1542         u64             nsec_base;
1543         u64             wall_time_sec;
1544 };
1545
1546 static struct pvclock_gtod_data pvclock_gtod_data;
1547
1548 static void update_pvclock_gtod(struct timekeeper *tk)
1549 {
1550         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1551         u64 boot_ns;
1552
1553         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1554
1555         write_seqcount_begin(&vdata->seq);
1556
1557         /* copy pvclock gtod data */
1558         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1559         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1560         vdata->clock.mask               = tk->tkr_mono.mask;
1561         vdata->clock.mult               = tk->tkr_mono.mult;
1562         vdata->clock.shift              = tk->tkr_mono.shift;
1563
1564         vdata->boot_ns                  = boot_ns;
1565         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1566
1567         vdata->wall_time_sec            = tk->xtime_sec;
1568
1569         write_seqcount_end(&vdata->seq);
1570 }
1571 #endif
1572
1573 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1574 {
1575         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1576         kvm_vcpu_kick(vcpu);
1577 }
1578
1579 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1580 {
1581         int version;
1582         int r;
1583         struct pvclock_wall_clock wc;
1584         struct timespec64 boot;
1585
1586         if (!wall_clock)
1587                 return;
1588
1589         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1590         if (r)
1591                 return;
1592
1593         if (version & 1)
1594                 ++version;  /* first time write, random junk */
1595
1596         ++version;
1597
1598         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1599                 return;
1600
1601         /*
1602          * The guest calculates current wall clock time by adding
1603          * system time (updated by kvm_guest_time_update below) to the
1604          * wall clock specified here.  guest system time equals host
1605          * system time for us, thus we must fill in host boot time here.
1606          */
1607         getboottime64(&boot);
1608
1609         if (kvm->arch.kvmclock_offset) {
1610                 struct timespec64 ts = ns_to_timespec64(kvm->arch.kvmclock_offset);
1611                 boot = timespec64_sub(boot, ts);
1612         }
1613         wc.sec = (u32)boot.tv_sec; /* overflow in 2106 guest time */
1614         wc.nsec = boot.tv_nsec;
1615         wc.version = version;
1616
1617         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1618
1619         version++;
1620         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1621 }
1622
1623 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1624 {
1625         do_shl32_div32(dividend, divisor);
1626         return dividend;
1627 }
1628
1629 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1630                                s8 *pshift, u32 *pmultiplier)
1631 {
1632         uint64_t scaled64;
1633         int32_t  shift = 0;
1634         uint64_t tps64;
1635         uint32_t tps32;
1636
1637         tps64 = base_hz;
1638         scaled64 = scaled_hz;
1639         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1640                 tps64 >>= 1;
1641                 shift--;
1642         }
1643
1644         tps32 = (uint32_t)tps64;
1645         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1646                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1647                         scaled64 >>= 1;
1648                 else
1649                         tps32 <<= 1;
1650                 shift++;
1651         }
1652
1653         *pshift = shift;
1654         *pmultiplier = div_frac(scaled64, tps32);
1655 }
1656
1657 #ifdef CONFIG_X86_64
1658 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1659 #endif
1660
1661 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1662 static unsigned long max_tsc_khz;
1663
1664 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1665 {
1666         u64 v = (u64)khz * (1000000 + ppm);
1667         do_div(v, 1000000);
1668         return v;
1669 }
1670
1671 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1672 {
1673         u64 ratio;
1674
1675         /* Guest TSC same frequency as host TSC? */
1676         if (!scale) {
1677                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1678                 return 0;
1679         }
1680
1681         /* TSC scaling supported? */
1682         if (!kvm_has_tsc_control) {
1683                 if (user_tsc_khz > tsc_khz) {
1684                         vcpu->arch.tsc_catchup = 1;
1685                         vcpu->arch.tsc_always_catchup = 1;
1686                         return 0;
1687                 } else {
1688                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
1689                         return -1;
1690                 }
1691         }
1692
1693         /* TSC scaling required  - calculate ratio */
1694         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1695                                 user_tsc_khz, tsc_khz);
1696
1697         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1698                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1699                                     user_tsc_khz);
1700                 return -1;
1701         }
1702
1703         vcpu->arch.tsc_scaling_ratio = ratio;
1704         return 0;
1705 }
1706
1707 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1708 {
1709         u32 thresh_lo, thresh_hi;
1710         int use_scaling = 0;
1711
1712         /* tsc_khz can be zero if TSC calibration fails */
1713         if (user_tsc_khz == 0) {
1714                 /* set tsc_scaling_ratio to a safe value */
1715                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1716                 return -1;
1717         }
1718
1719         /* Compute a scale to convert nanoseconds in TSC cycles */
1720         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
1721                            &vcpu->arch.virtual_tsc_shift,
1722                            &vcpu->arch.virtual_tsc_mult);
1723         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
1724
1725         /*
1726          * Compute the variation in TSC rate which is acceptable
1727          * within the range of tolerance and decide if the
1728          * rate being applied is within that bounds of the hardware
1729          * rate.  If so, no scaling or compensation need be done.
1730          */
1731         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1732         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1733         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
1734                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
1735                 use_scaling = 1;
1736         }
1737         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
1738 }
1739
1740 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1741 {
1742         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1743                                       vcpu->arch.virtual_tsc_mult,
1744                                       vcpu->arch.virtual_tsc_shift);
1745         tsc += vcpu->arch.this_tsc_write;
1746         return tsc;
1747 }
1748
1749 static inline int gtod_is_based_on_tsc(int mode)
1750 {
1751         return mode == VCLOCK_TSC || mode == VCLOCK_HVCLOCK;
1752 }
1753
1754 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1755 {
1756 #ifdef CONFIG_X86_64
1757         bool vcpus_matched;
1758         struct kvm_arch *ka = &vcpu->kvm->arch;
1759         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1760
1761         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1762                          atomic_read(&vcpu->kvm->online_vcpus));
1763
1764         /*
1765          * Once the masterclock is enabled, always perform request in
1766          * order to update it.
1767          *
1768          * In order to enable masterclock, the host clocksource must be TSC
1769          * and the vcpus need to have matched TSCs.  When that happens,
1770          * perform request to enable masterclock.
1771          */
1772         if (ka->use_master_clock ||
1773             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
1774                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1775
1776         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1777                             atomic_read(&vcpu->kvm->online_vcpus),
1778                             ka->use_master_clock, gtod->clock.vclock_mode);
1779 #endif
1780 }
1781
1782 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1783 {
1784         u64 curr_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1785         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1786 }
1787
1788 /*
1789  * Multiply tsc by a fixed point number represented by ratio.
1790  *
1791  * The most significant 64-N bits (mult) of ratio represent the
1792  * integral part of the fixed point number; the remaining N bits
1793  * (frac) represent the fractional part, ie. ratio represents a fixed
1794  * point number (mult + frac * 2^(-N)).
1795  *
1796  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1797  */
1798 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1799 {
1800         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1801 }
1802
1803 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1804 {
1805         u64 _tsc = tsc;
1806         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1807
1808         if (ratio != kvm_default_tsc_scaling_ratio)
1809                 _tsc = __scale_tsc(ratio, tsc);
1810
1811         return _tsc;
1812 }
1813 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1814
1815 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1816 {
1817         u64 tsc;
1818
1819         tsc = kvm_scale_tsc(vcpu, rdtsc());
1820
1821         return target_tsc - tsc;
1822 }
1823
1824 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1825 {
1826         u64 tsc_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1827
1828         return tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
1829 }
1830 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1831
1832 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
1833 {
1834         vcpu->arch.tsc_offset = kvm_x86_ops->write_l1_tsc_offset(vcpu, offset);
1835 }
1836
1837 static inline bool kvm_check_tsc_unstable(void)
1838 {
1839 #ifdef CONFIG_X86_64
1840         /*
1841          * TSC is marked unstable when we're running on Hyper-V,
1842          * 'TSC page' clocksource is good.
1843          */
1844         if (pvclock_gtod_data.clock.vclock_mode == VCLOCK_HVCLOCK)
1845                 return false;
1846 #endif
1847         return check_tsc_unstable();
1848 }
1849
1850 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1851 {
1852         struct kvm *kvm = vcpu->kvm;
1853         u64 offset, ns, elapsed;
1854         unsigned long flags;
1855         bool matched;
1856         bool already_matched;
1857         u64 data = msr->data;
1858         bool synchronizing = false;
1859
1860         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1861         offset = kvm_compute_tsc_offset(vcpu, data);
1862         ns = ktime_get_boottime_ns();
1863         elapsed = ns - kvm->arch.last_tsc_nsec;
1864
1865         if (vcpu->arch.virtual_tsc_khz) {
1866                 if (data == 0 && msr->host_initiated) {
1867                         /*
1868                          * detection of vcpu initialization -- need to sync
1869                          * with other vCPUs. This particularly helps to keep
1870                          * kvm_clock stable after CPU hotplug
1871                          */
1872                         synchronizing = true;
1873                 } else {
1874                         u64 tsc_exp = kvm->arch.last_tsc_write +
1875                                                 nsec_to_cycles(vcpu, elapsed);
1876                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
1877                         /*
1878                          * Special case: TSC write with a small delta (1 second)
1879                          * of virtual cycle time against real time is
1880                          * interpreted as an attempt to synchronize the CPU.
1881                          */
1882                         synchronizing = data < tsc_exp + tsc_hz &&
1883                                         data + tsc_hz > tsc_exp;
1884                 }
1885         }
1886
1887         /*
1888          * For a reliable TSC, we can match TSC offsets, and for an unstable
1889          * TSC, we add elapsed time in this computation.  We could let the
1890          * compensation code attempt to catch up if we fall behind, but
1891          * it's better to try to match offsets from the beginning.
1892          */
1893         if (synchronizing &&
1894             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1895                 if (!kvm_check_tsc_unstable()) {
1896                         offset = kvm->arch.cur_tsc_offset;
1897                 } else {
1898                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1899                         data += delta;
1900                         offset = kvm_compute_tsc_offset(vcpu, data);
1901                 }
1902                 matched = true;
1903                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1904         } else {
1905                 /*
1906                  * We split periods of matched TSC writes into generations.
1907                  * For each generation, we track the original measured
1908                  * nanosecond time, offset, and write, so if TSCs are in
1909                  * sync, we can match exact offset, and if not, we can match
1910                  * exact software computation in compute_guest_tsc()
1911                  *
1912                  * These values are tracked in kvm->arch.cur_xxx variables.
1913                  */
1914                 kvm->arch.cur_tsc_generation++;
1915                 kvm->arch.cur_tsc_nsec = ns;
1916                 kvm->arch.cur_tsc_write = data;
1917                 kvm->arch.cur_tsc_offset = offset;
1918                 matched = false;
1919         }
1920
1921         /*
1922          * We also track th most recent recorded KHZ, write and time to
1923          * allow the matching interval to be extended at each write.
1924          */
1925         kvm->arch.last_tsc_nsec = ns;
1926         kvm->arch.last_tsc_write = data;
1927         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1928
1929         vcpu->arch.last_guest_tsc = data;
1930
1931         /* Keep track of which generation this VCPU has synchronized to */
1932         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1933         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1934         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1935
1936         if (!msr->host_initiated && guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST))
1937                 update_ia32_tsc_adjust_msr(vcpu, offset);
1938
1939         kvm_vcpu_write_tsc_offset(vcpu, offset);
1940         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1941
1942         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1943         if (!matched) {
1944                 kvm->arch.nr_vcpus_matched_tsc = 0;
1945         } else if (!already_matched) {
1946                 kvm->arch.nr_vcpus_matched_tsc++;
1947         }
1948
1949         kvm_track_tsc_matching(vcpu);
1950         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1951 }
1952
1953 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1954
1955 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1956                                            s64 adjustment)
1957 {
1958         u64 tsc_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1959         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
1960 }
1961
1962 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1963 {
1964         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1965                 WARN_ON(adjustment < 0);
1966         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1967         adjust_tsc_offset_guest(vcpu, adjustment);
1968 }
1969
1970 #ifdef CONFIG_X86_64
1971
1972 static u64 read_tsc(void)
1973 {
1974         u64 ret = (u64)rdtsc_ordered();
1975         u64 last = pvclock_gtod_data.clock.cycle_last;
1976
1977         if (likely(ret >= last))
1978                 return ret;
1979
1980         /*
1981          * GCC likes to generate cmov here, but this branch is extremely
1982          * predictable (it's just a function of time and the likely is
1983          * very likely) and there's a data dependence, so force GCC
1984          * to generate a branch instead.  I don't barrier() because
1985          * we don't actually need a barrier, and if this function
1986          * ever gets inlined it will generate worse code.
1987          */
1988         asm volatile ("");
1989         return last;
1990 }
1991
1992 static inline u64 vgettsc(u64 *tsc_timestamp, int *mode)
1993 {
1994         long v;
1995         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1996         u64 tsc_pg_val;
1997
1998         switch (gtod->clock.vclock_mode) {
1999         case VCLOCK_HVCLOCK:
2000                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2001                                                   tsc_timestamp);
2002                 if (tsc_pg_val != U64_MAX) {
2003                         /* TSC page valid */
2004                         *mode = VCLOCK_HVCLOCK;
2005                         v = (tsc_pg_val - gtod->clock.cycle_last) &
2006                                 gtod->clock.mask;
2007                 } else {
2008                         /* TSC page invalid */
2009                         *mode = VCLOCK_NONE;
2010                 }
2011                 break;
2012         case VCLOCK_TSC:
2013                 *mode = VCLOCK_TSC;
2014                 *tsc_timestamp = read_tsc();
2015                 v = (*tsc_timestamp - gtod->clock.cycle_last) &
2016                         gtod->clock.mask;
2017                 break;
2018         default:
2019                 *mode = VCLOCK_NONE;
2020         }
2021
2022         if (*mode == VCLOCK_NONE)
2023                 *tsc_timestamp = v = 0;
2024
2025         return v * gtod->clock.mult;
2026 }
2027
2028 static int do_monotonic_boot(s64 *t, u64 *tsc_timestamp)
2029 {
2030         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2031         unsigned long seq;
2032         int mode;
2033         u64 ns;
2034
2035         do {
2036                 seq = read_seqcount_begin(&gtod->seq);
2037                 ns = gtod->nsec_base;
2038                 ns += vgettsc(tsc_timestamp, &mode);
2039                 ns >>= gtod->clock.shift;
2040                 ns += gtod->boot_ns;
2041         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2042         *t = ns;
2043
2044         return mode;
2045 }
2046
2047 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2048 {
2049         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2050         unsigned long seq;
2051         int mode;
2052         u64 ns;
2053
2054         do {
2055                 seq = read_seqcount_begin(&gtod->seq);
2056                 ts->tv_sec = gtod->wall_time_sec;
2057                 ns = gtod->nsec_base;
2058                 ns += vgettsc(tsc_timestamp, &mode);
2059                 ns >>= gtod->clock.shift;
2060         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2061
2062         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2063         ts->tv_nsec = ns;
2064
2065         return mode;
2066 }
2067
2068 /* returns true if host is using TSC based clocksource */
2069 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2070 {
2071         /* checked again under seqlock below */
2072         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2073                 return false;
2074
2075         return gtod_is_based_on_tsc(do_monotonic_boot(kernel_ns,
2076                                                       tsc_timestamp));
2077 }
2078
2079 /* returns true if host is using TSC based clocksource */
2080 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2081                                            u64 *tsc_timestamp)
2082 {
2083         /* checked again under seqlock below */
2084         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2085                 return false;
2086
2087         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2088 }
2089 #endif
2090
2091 /*
2092  *
2093  * Assuming a stable TSC across physical CPUS, and a stable TSC
2094  * across virtual CPUs, the following condition is possible.
2095  * Each numbered line represents an event visible to both
2096  * CPUs at the next numbered event.
2097  *
2098  * "timespecX" represents host monotonic time. "tscX" represents
2099  * RDTSC value.
2100  *
2101  *              VCPU0 on CPU0           |       VCPU1 on CPU1
2102  *
2103  * 1.  read timespec0,tsc0
2104  * 2.                                   | timespec1 = timespec0 + N
2105  *                                      | tsc1 = tsc0 + M
2106  * 3. transition to guest               | transition to guest
2107  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2108  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2109  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2110  *
2111  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2112  *
2113  *      - ret0 < ret1
2114  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2115  *              ...
2116  *      - 0 < N - M => M < N
2117  *
2118  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2119  * always the case (the difference between two distinct xtime instances
2120  * might be smaller then the difference between corresponding TSC reads,
2121  * when updating guest vcpus pvclock areas).
2122  *
2123  * To avoid that problem, do not allow visibility of distinct
2124  * system_timestamp/tsc_timestamp values simultaneously: use a master
2125  * copy of host monotonic time values. Update that master copy
2126  * in lockstep.
2127  *
2128  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2129  *
2130  */
2131
2132 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2133 {
2134 #ifdef CONFIG_X86_64
2135         struct kvm_arch *ka = &kvm->arch;
2136         int vclock_mode;
2137         bool host_tsc_clocksource, vcpus_matched;
2138
2139         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2140                         atomic_read(&kvm->online_vcpus));
2141
2142         /*
2143          * If the host uses TSC clock, then passthrough TSC as stable
2144          * to the guest.
2145          */
2146         host_tsc_clocksource = kvm_get_time_and_clockread(
2147                                         &ka->master_kernel_ns,
2148                                         &ka->master_cycle_now);
2149
2150         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2151                                 && !ka->backwards_tsc_observed
2152                                 && !ka->boot_vcpu_runs_old_kvmclock;
2153
2154         if (ka->use_master_clock)
2155                 atomic_set(&kvm_guest_has_master_clock, 1);
2156
2157         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2158         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2159                                         vcpus_matched);
2160 #endif
2161 }
2162
2163 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2164 {
2165         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2166 }
2167
2168 static void kvm_gen_update_masterclock(struct kvm *kvm)
2169 {
2170 #ifdef CONFIG_X86_64
2171         int i;
2172         struct kvm_vcpu *vcpu;
2173         struct kvm_arch *ka = &kvm->arch;
2174
2175         spin_lock(&ka->pvclock_gtod_sync_lock);
2176         kvm_make_mclock_inprogress_request(kvm);
2177         /* no guest entries from this point */
2178         pvclock_update_vm_gtod_copy(kvm);
2179
2180         kvm_for_each_vcpu(i, vcpu, kvm)
2181                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2182
2183         /* guest entries allowed */
2184         kvm_for_each_vcpu(i, vcpu, kvm)
2185                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2186
2187         spin_unlock(&ka->pvclock_gtod_sync_lock);
2188 #endif
2189 }
2190
2191 u64 get_kvmclock_ns(struct kvm *kvm)
2192 {
2193         struct kvm_arch *ka = &kvm->arch;
2194         struct pvclock_vcpu_time_info hv_clock;
2195         u64 ret;
2196
2197         spin_lock(&ka->pvclock_gtod_sync_lock);
2198         if (!ka->use_master_clock) {
2199                 spin_unlock(&ka->pvclock_gtod_sync_lock);
2200                 return ktime_get_boottime_ns() + ka->kvmclock_offset;
2201         }
2202
2203         hv_clock.tsc_timestamp = ka->master_cycle_now;
2204         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2205         spin_unlock(&ka->pvclock_gtod_sync_lock);
2206
2207         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2208         get_cpu();
2209
2210         if (__this_cpu_read(cpu_tsc_khz)) {
2211                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2212                                    &hv_clock.tsc_shift,
2213                                    &hv_clock.tsc_to_system_mul);
2214                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2215         } else
2216                 ret = ktime_get_boottime_ns() + ka->kvmclock_offset;
2217
2218         put_cpu();
2219
2220         return ret;
2221 }
2222
2223 static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
2224 {
2225         struct kvm_vcpu_arch *vcpu = &v->arch;
2226         struct pvclock_vcpu_time_info guest_hv_clock;
2227
2228         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
2229                 &guest_hv_clock, sizeof(guest_hv_clock))))
2230                 return;
2231
2232         /* This VCPU is paused, but it's legal for a guest to read another
2233          * VCPU's kvmclock, so we really have to follow the specification where
2234          * it says that version is odd if data is being modified, and even after
2235          * it is consistent.
2236          *
2237          * Version field updates must be kept separate.  This is because
2238          * kvm_write_guest_cached might use a "rep movs" instruction, and
2239          * writes within a string instruction are weakly ordered.  So there
2240          * are three writes overall.
2241          *
2242          * As a small optimization, only write the version field in the first
2243          * and third write.  The vcpu->pv_time cache is still valid, because the
2244          * version field is the first in the struct.
2245          */
2246         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2247
2248         if (guest_hv_clock.version & 1)
2249                 ++guest_hv_clock.version;  /* first time write, random junk */
2250
2251         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2252         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2253                                 &vcpu->hv_clock,
2254                                 sizeof(vcpu->hv_clock.version));
2255
2256         smp_wmb();
2257
2258         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2259         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2260
2261         if (vcpu->pvclock_set_guest_stopped_request) {
2262                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2263                 vcpu->pvclock_set_guest_stopped_request = false;
2264         }
2265
2266         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2267
2268         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2269                                 &vcpu->hv_clock,
2270                                 sizeof(vcpu->hv_clock));
2271
2272         smp_wmb();
2273
2274         vcpu->hv_clock.version++;
2275         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2276                                 &vcpu->hv_clock,
2277                                 sizeof(vcpu->hv_clock.version));
2278 }
2279
2280 static int kvm_guest_time_update(struct kvm_vcpu *v)
2281 {
2282         unsigned long flags, tgt_tsc_khz;
2283         struct kvm_vcpu_arch *vcpu = &v->arch;
2284         struct kvm_arch *ka = &v->kvm->arch;
2285         s64 kernel_ns;
2286         u64 tsc_timestamp, host_tsc;
2287         u8 pvclock_flags;
2288         bool use_master_clock;
2289
2290         kernel_ns = 0;
2291         host_tsc = 0;
2292
2293         /*
2294          * If the host uses TSC clock, then passthrough TSC as stable
2295          * to the guest.
2296          */
2297         spin_lock(&ka->pvclock_gtod_sync_lock);
2298         use_master_clock = ka->use_master_clock;
2299         if (use_master_clock) {
2300                 host_tsc = ka->master_cycle_now;
2301                 kernel_ns = ka->master_kernel_ns;
2302         }
2303         spin_unlock(&ka->pvclock_gtod_sync_lock);
2304
2305         /* Keep irq disabled to prevent changes to the clock */
2306         local_irq_save(flags);
2307         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2308         if (unlikely(tgt_tsc_khz == 0)) {
2309                 local_irq_restore(flags);
2310                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2311                 return 1;
2312         }
2313         if (!use_master_clock) {
2314                 host_tsc = rdtsc();
2315                 kernel_ns = ktime_get_boottime_ns();
2316         }
2317
2318         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2319
2320         /*
2321          * We may have to catch up the TSC to match elapsed wall clock
2322          * time for two reasons, even if kvmclock is used.
2323          *   1) CPU could have been running below the maximum TSC rate
2324          *   2) Broken TSC compensation resets the base at each VCPU
2325          *      entry to avoid unknown leaps of TSC even when running
2326          *      again on the same CPU.  This may cause apparent elapsed
2327          *      time to disappear, and the guest to stand still or run
2328          *      very slowly.
2329          */
2330         if (vcpu->tsc_catchup) {
2331                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2332                 if (tsc > tsc_timestamp) {
2333                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2334                         tsc_timestamp = tsc;
2335                 }
2336         }
2337
2338         local_irq_restore(flags);
2339
2340         /* With all the info we got, fill in the values */
2341
2342         if (kvm_has_tsc_control)
2343                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
2344
2345         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2346                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2347                                    &vcpu->hv_clock.tsc_shift,
2348                                    &vcpu->hv_clock.tsc_to_system_mul);
2349                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2350         }
2351
2352         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2353         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2354         vcpu->last_guest_tsc = tsc_timestamp;
2355
2356         /* If the host uses TSC clocksource, then it is stable */
2357         pvclock_flags = 0;
2358         if (use_master_clock)
2359                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2360
2361         vcpu->hv_clock.flags = pvclock_flags;
2362
2363         if (vcpu->pv_time_enabled)
2364                 kvm_setup_pvclock_page(v);
2365         if (v == kvm_get_vcpu(v->kvm, 0))
2366                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2367         return 0;
2368 }
2369
2370 /*
2371  * kvmclock updates which are isolated to a given vcpu, such as
2372  * vcpu->cpu migration, should not allow system_timestamp from
2373  * the rest of the vcpus to remain static. Otherwise ntp frequency
2374  * correction applies to one vcpu's system_timestamp but not
2375  * the others.
2376  *
2377  * So in those cases, request a kvmclock update for all vcpus.
2378  * We need to rate-limit these requests though, as they can
2379  * considerably slow guests that have a large number of vcpus.
2380  * The time for a remote vcpu to update its kvmclock is bound
2381  * by the delay we use to rate-limit the updates.
2382  */
2383
2384 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2385
2386 static void kvmclock_update_fn(struct work_struct *work)
2387 {
2388         int i;
2389         struct delayed_work *dwork = to_delayed_work(work);
2390         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2391                                            kvmclock_update_work);
2392         struct kvm *kvm = container_of(ka, struct kvm, arch);
2393         struct kvm_vcpu *vcpu;
2394
2395         kvm_for_each_vcpu(i, vcpu, kvm) {
2396                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2397                 kvm_vcpu_kick(vcpu);
2398         }
2399 }
2400
2401 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2402 {
2403         struct kvm *kvm = v->kvm;
2404
2405         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2406         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2407                                         KVMCLOCK_UPDATE_DELAY);
2408 }
2409
2410 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2411
2412 static void kvmclock_sync_fn(struct work_struct *work)
2413 {
2414         struct delayed_work *dwork = to_delayed_work(work);
2415         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2416                                            kvmclock_sync_work);
2417         struct kvm *kvm = container_of(ka, struct kvm, arch);
2418
2419         if (!kvmclock_periodic_sync)
2420                 return;
2421
2422         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2423         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2424                                         KVMCLOCK_SYNC_PERIOD);
2425 }
2426
2427 /*
2428  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
2429  */
2430 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
2431 {
2432         /* McStatusWrEn enabled? */
2433         if (guest_cpuid_is_amd(vcpu))
2434                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
2435
2436         return false;
2437 }
2438
2439 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2440 {
2441         u64 mcg_cap = vcpu->arch.mcg_cap;
2442         unsigned bank_num = mcg_cap & 0xff;
2443         u32 msr = msr_info->index;
2444         u64 data = msr_info->data;
2445
2446         switch (msr) {
2447         case MSR_IA32_MCG_STATUS:
2448                 vcpu->arch.mcg_status = data;
2449                 break;
2450         case MSR_IA32_MCG_CTL:
2451                 if (!(mcg_cap & MCG_CTL_P) &&
2452                     (data || !msr_info->host_initiated))
2453                         return 1;
2454                 if (data != 0 && data != ~(u64)0)
2455                         return 1;
2456                 vcpu->arch.mcg_ctl = data;
2457                 break;
2458         default:
2459                 if (msr >= MSR_IA32_MC0_CTL &&
2460                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2461                         u32 offset = msr - MSR_IA32_MC0_CTL;
2462                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2463                          * some Linux kernels though clear bit 10 in bank 4 to
2464                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2465                          * this to avoid an uncatched #GP in the guest
2466                          */
2467                         if ((offset & 0x3) == 0 &&
2468                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2469                                 return -1;
2470
2471                         /* MCi_STATUS */
2472                         if (!msr_info->host_initiated &&
2473                             (offset & 0x3) == 1 && data != 0) {
2474                                 if (!can_set_mci_status(vcpu))
2475                                         return -1;
2476                         }
2477
2478                         vcpu->arch.mce_banks[offset] = data;
2479                         break;
2480                 }
2481                 return 1;
2482         }
2483         return 0;
2484 }
2485
2486 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2487 {
2488         struct kvm *kvm = vcpu->kvm;
2489         int lm = is_long_mode(vcpu);
2490         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2491                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2492         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2493                 : kvm->arch.xen_hvm_config.blob_size_32;
2494         u32 page_num = data & ~PAGE_MASK;
2495         u64 page_addr = data & PAGE_MASK;
2496         u8 *page;
2497         int r;
2498
2499         r = -E2BIG;
2500         if (page_num >= blob_size)
2501                 goto out;
2502         r = -ENOMEM;
2503         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2504         if (IS_ERR(page)) {
2505                 r = PTR_ERR(page);
2506                 goto out;
2507         }
2508         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
2509                 goto out_free;
2510         r = 0;
2511 out_free:
2512         kfree(page);
2513 out:
2514         return r;
2515 }
2516
2517 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2518 {
2519         gpa_t gpa = data & ~0x3f;
2520
2521         /* Bits 3:5 are reserved, Should be zero */
2522         if (data & 0x38)
2523                 return 1;
2524
2525         vcpu->arch.apf.msr_val = data;
2526
2527         if (!(data & KVM_ASYNC_PF_ENABLED)) {
2528                 kvm_clear_async_pf_completion_queue(vcpu);
2529                 kvm_async_pf_hash_reset(vcpu);
2530                 return 0;
2531         }
2532
2533         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2534                                         sizeof(u32)))
2535                 return 1;
2536
2537         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2538         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
2539         kvm_async_pf_wakeup_all(vcpu);
2540         return 0;
2541 }
2542
2543 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2544 {
2545         vcpu->arch.pv_time_enabled = false;
2546 }
2547
2548 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu, bool invalidate_gpa)
2549 {
2550         ++vcpu->stat.tlb_flush;
2551         kvm_x86_ops->tlb_flush(vcpu, invalidate_gpa);
2552 }
2553
2554 static void record_steal_time(struct kvm_vcpu *vcpu)
2555 {
2556         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2557                 return;
2558
2559         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2560                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2561                 return;
2562
2563         /*
2564          * Doing a TLB flush here, on the guest's behalf, can avoid
2565          * expensive IPIs.
2566          */
2567         trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
2568                 vcpu->arch.st.steal.preempted & KVM_VCPU_FLUSH_TLB);
2569         if (xchg(&vcpu->arch.st.steal.preempted, 0) & KVM_VCPU_FLUSH_TLB)
2570                 kvm_vcpu_flush_tlb(vcpu, false);
2571
2572         if (vcpu->arch.st.steal.version & 1)
2573                 vcpu->arch.st.steal.version += 1;  /* first time write, random junk */
2574
2575         vcpu->arch.st.steal.version += 1;
2576
2577         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2578                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2579
2580         smp_wmb();
2581
2582         vcpu->arch.st.steal.steal += current->sched_info.run_delay -
2583                 vcpu->arch.st.last_steal;
2584         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2585
2586         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2587                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2588
2589         smp_wmb();
2590
2591         vcpu->arch.st.steal.version += 1;
2592
2593         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2594                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2595 }
2596
2597 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2598 {
2599         bool pr = false;
2600         u32 msr = msr_info->index;
2601         u64 data = msr_info->data;
2602
2603         switch (msr) {
2604         case MSR_AMD64_NB_CFG:
2605         case MSR_IA32_UCODE_WRITE:
2606         case MSR_VM_HSAVE_PA:
2607         case MSR_AMD64_PATCH_LOADER:
2608         case MSR_AMD64_BU_CFG2:
2609         case MSR_AMD64_DC_CFG:
2610         case MSR_F15H_EX_CFG:
2611                 break;
2612
2613         case MSR_IA32_UCODE_REV:
2614                 if (msr_info->host_initiated)
2615                         vcpu->arch.microcode_version = data;
2616                 break;
2617         case MSR_IA32_ARCH_CAPABILITIES:
2618                 if (!msr_info->host_initiated)
2619                         return 1;
2620                 vcpu->arch.arch_capabilities = data;
2621                 break;
2622         case MSR_EFER:
2623                 return set_efer(vcpu, msr_info);
2624         case MSR_K7_HWCR:
2625                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2626                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2627                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2628
2629                 /* Handle McStatusWrEn */
2630                 if (data == BIT_ULL(18)) {
2631                         vcpu->arch.msr_hwcr = data;
2632                 } else if (data != 0) {
2633                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2634                                     data);
2635                         return 1;
2636                 }
2637                 break;
2638         case MSR_FAM10H_MMIO_CONF_BASE:
2639                 if (data != 0) {
2640                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2641                                     "0x%llx\n", data);
2642                         return 1;
2643                 }
2644                 break;
2645         case MSR_IA32_DEBUGCTLMSR:
2646                 if (!data) {
2647                         /* We support the non-activated case already */
2648                         break;
2649                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2650                         /* Values other than LBR and BTF are vendor-specific,
2651                            thus reserved and should throw a #GP */
2652                         return 1;
2653                 }
2654                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2655                             __func__, data);
2656                 break;
2657         case 0x200 ... 0x2ff:
2658                 return kvm_mtrr_set_msr(vcpu, msr, data);
2659         case MSR_IA32_APICBASE:
2660                 return kvm_set_apic_base(vcpu, msr_info);
2661         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2662                 return kvm_x2apic_msr_write(vcpu, msr, data);
2663         case MSR_IA32_TSCDEADLINE:
2664                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2665                 break;
2666         case MSR_IA32_TSC_ADJUST:
2667                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
2668                         if (!msr_info->host_initiated) {
2669                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2670                                 adjust_tsc_offset_guest(vcpu, adj);
2671                         }
2672                         vcpu->arch.ia32_tsc_adjust_msr = data;
2673                 }
2674                 break;
2675         case MSR_IA32_MISC_ENABLE:
2676                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
2677                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
2678                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
2679                                 return 1;
2680                         vcpu->arch.ia32_misc_enable_msr = data;
2681                         kvm_update_cpuid(vcpu);
2682                 } else {
2683                         vcpu->arch.ia32_misc_enable_msr = data;
2684                 }
2685                 break;
2686         case MSR_IA32_SMBASE:
2687                 if (!msr_info->host_initiated)
2688                         return 1;
2689                 vcpu->arch.smbase = data;
2690                 break;
2691         case MSR_IA32_POWER_CTL:
2692                 vcpu->arch.msr_ia32_power_ctl = data;
2693                 break;
2694         case MSR_IA32_TSC:
2695                 kvm_write_tsc(vcpu, msr_info);
2696                 break;
2697         case MSR_SMI_COUNT:
2698                 if (!msr_info->host_initiated)
2699                         return 1;
2700                 vcpu->arch.smi_count = data;
2701                 break;
2702         case MSR_KVM_WALL_CLOCK_NEW:
2703         case MSR_KVM_WALL_CLOCK:
2704                 vcpu->kvm->arch.wall_clock = data;
2705                 kvm_write_wall_clock(vcpu->kvm, data);
2706                 break;
2707         case MSR_KVM_SYSTEM_TIME_NEW:
2708         case MSR_KVM_SYSTEM_TIME: {
2709                 struct kvm_arch *ka = &vcpu->kvm->arch;
2710
2711                 kvmclock_reset(vcpu);
2712
2713                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2714                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2715
2716                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2717                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2718
2719                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2720                 }
2721
2722                 vcpu->arch.time = data;
2723                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2724
2725                 /* we verify if the enable bit is set... */
2726                 if (!(data & 1))
2727                         break;
2728
2729                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2730                      &vcpu->arch.pv_time, data & ~1ULL,
2731                      sizeof(struct pvclock_vcpu_time_info)))
2732                         vcpu->arch.pv_time_enabled = false;
2733                 else
2734                         vcpu->arch.pv_time_enabled = true;
2735
2736                 break;
2737         }
2738         case MSR_KVM_ASYNC_PF_EN:
2739                 if (kvm_pv_enable_async_pf(vcpu, data))
2740                         return 1;
2741                 break;
2742         case MSR_KVM_STEAL_TIME:
2743
2744                 if (unlikely(!sched_info_on()))
2745                         return 1;
2746
2747                 if (data & KVM_STEAL_RESERVED_MASK)
2748                         return 1;
2749
2750                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2751                                                 data & KVM_STEAL_VALID_BITS,
2752                                                 sizeof(struct kvm_steal_time)))
2753                         return 1;
2754
2755                 vcpu->arch.st.msr_val = data;
2756
2757                 if (!(data & KVM_MSR_ENABLED))
2758                         break;
2759
2760                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2761
2762                 break;
2763         case MSR_KVM_PV_EOI_EN:
2764                 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
2765                         return 1;
2766                 break;
2767
2768         case MSR_KVM_POLL_CONTROL:
2769                 /* only enable bit supported */
2770                 if (data & (-1ULL << 1))
2771                         return 1;
2772
2773                 vcpu->arch.msr_kvm_poll_control = data;
2774                 break;
2775
2776         case MSR_IA32_MCG_CTL:
2777         case MSR_IA32_MCG_STATUS:
2778         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2779                 return set_msr_mce(vcpu, msr_info);
2780
2781         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2782         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2783                 pr = true; /* fall through */
2784         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2785         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2786                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2787                         return kvm_pmu_set_msr(vcpu, msr_info);
2788
2789                 if (pr || data != 0)
2790                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2791                                     "0x%x data 0x%llx\n", msr, data);
2792                 break;
2793         case MSR_K7_CLK_CTL:
2794                 /*
2795                  * Ignore all writes to this no longer documented MSR.
2796                  * Writes are only relevant for old K7 processors,
2797                  * all pre-dating SVM, but a recommended workaround from
2798                  * AMD for these chips. It is possible to specify the
2799                  * affected processor models on the command line, hence
2800                  * the need to ignore the workaround.
2801                  */
2802                 break;
2803         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2804         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2805         case HV_X64_MSR_CRASH_CTL:
2806         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2807         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
2808         case HV_X64_MSR_TSC_EMULATION_CONTROL:
2809         case HV_X64_MSR_TSC_EMULATION_STATUS:
2810                 return kvm_hv_set_msr_common(vcpu, msr, data,
2811                                              msr_info->host_initiated);
2812         case MSR_IA32_BBL_CR_CTL3:
2813                 /* Drop writes to this legacy MSR -- see rdmsr
2814                  * counterpart for further detail.
2815                  */
2816                 if (report_ignored_msrs)
2817                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
2818                                 msr, data);
2819                 break;
2820         case MSR_AMD64_OSVW_ID_LENGTH:
2821                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2822                         return 1;
2823                 vcpu->arch.osvw.length = data;
2824                 break;
2825         case MSR_AMD64_OSVW_STATUS:
2826                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2827                         return 1;
2828                 vcpu->arch.osvw.status = data;
2829                 break;
2830         case MSR_PLATFORM_INFO:
2831                 if (!msr_info->host_initiated ||
2832                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
2833                      cpuid_fault_enabled(vcpu)))
2834                         return 1;
2835                 vcpu->arch.msr_platform_info = data;
2836                 break;
2837         case MSR_MISC_FEATURES_ENABLES:
2838                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
2839                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
2840                      !supports_cpuid_fault(vcpu)))
2841                         return 1;
2842                 vcpu->arch.msr_misc_features_enables = data;
2843                 break;
2844         default:
2845                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2846                         return xen_hvm_config(vcpu, data);
2847                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2848                         return kvm_pmu_set_msr(vcpu, msr_info);
2849                 if (!ignore_msrs) {
2850                         vcpu_debug_ratelimited(vcpu, "unhandled wrmsr: 0x%x data 0x%llx\n",
2851                                     msr, data);
2852                         return 1;
2853                 } else {
2854                         if (report_ignored_msrs)
2855                                 vcpu_unimpl(vcpu,
2856                                         "ignored wrmsr: 0x%x data 0x%llx\n",
2857                                         msr, data);
2858                         break;
2859                 }
2860         }
2861         return 0;
2862 }
2863 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2864
2865 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
2866 {
2867         u64 data;
2868         u64 mcg_cap = vcpu->arch.mcg_cap;
2869         unsigned bank_num = mcg_cap & 0xff;
2870
2871         switch (msr) {
2872         case MSR_IA32_P5_MC_ADDR:
2873         case MSR_IA32_P5_MC_TYPE:
2874                 data = 0;
2875                 break;
2876         case MSR_IA32_MCG_CAP:
2877                 data = vcpu->arch.mcg_cap;
2878                 break;
2879         case MSR_IA32_MCG_CTL:
2880                 if (!(mcg_cap & MCG_CTL_P) && !host)
2881                         return 1;
2882                 data = vcpu->arch.mcg_ctl;
2883                 break;
2884         case MSR_IA32_MCG_STATUS:
2885                 data = vcpu->arch.mcg_status;
2886                 break;
2887         default:
2888                 if (msr >= MSR_IA32_MC0_CTL &&
2889                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2890                         u32 offset = msr - MSR_IA32_MC0_CTL;
2891                         data = vcpu->arch.mce_banks[offset];
2892                         break;
2893                 }
2894                 return 1;
2895         }
2896         *pdata = data;
2897         return 0;
2898 }
2899
2900 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2901 {
2902         switch (msr_info->index) {
2903         case MSR_IA32_PLATFORM_ID:
2904         case MSR_IA32_EBL_CR_POWERON:
2905         case MSR_IA32_DEBUGCTLMSR:
2906         case MSR_IA32_LASTBRANCHFROMIP:
2907         case MSR_IA32_LASTBRANCHTOIP:
2908         case MSR_IA32_LASTINTFROMIP:
2909         case MSR_IA32_LASTINTTOIP:
2910         case MSR_K8_SYSCFG:
2911         case MSR_K8_TSEG_ADDR:
2912         case MSR_K8_TSEG_MASK:
2913         case MSR_VM_HSAVE_PA:
2914         case MSR_K8_INT_PENDING_MSG:
2915         case MSR_AMD64_NB_CFG:
2916         case MSR_FAM10H_MMIO_CONF_BASE:
2917         case MSR_AMD64_BU_CFG2:
2918         case MSR_IA32_PERF_CTL:
2919         case MSR_AMD64_DC_CFG:
2920         case MSR_F15H_EX_CFG:
2921                 msr_info->data = 0;
2922                 break;
2923         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
2924         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2925         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2926         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2927         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2928                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2929                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2930                 msr_info->data = 0;
2931                 break;
2932         case MSR_IA32_UCODE_REV:
2933                 msr_info->data = vcpu->arch.microcode_version;
2934                 break;
2935         case MSR_IA32_ARCH_CAPABILITIES:
2936                 if (!msr_info->host_initiated &&
2937                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
2938                         return 1;
2939                 msr_info->data = vcpu->arch.arch_capabilities;
2940                 break;
2941         case MSR_IA32_POWER_CTL:
2942                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
2943                 break;
2944         case MSR_IA32_TSC:
2945                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc()) + vcpu->arch.tsc_offset;
2946                 break;
2947         case MSR_MTRRcap:
2948         case 0x200 ... 0x2ff:
2949                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2950         case 0xcd: /* fsb frequency */
2951                 msr_info->data = 3;
2952                 break;
2953                 /*
2954                  * MSR_EBC_FREQUENCY_ID
2955                  * Conservative value valid for even the basic CPU models.
2956                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2957                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2958                  * and 266MHz for model 3, or 4. Set Core Clock
2959                  * Frequency to System Bus Frequency Ratio to 1 (bits
2960                  * 31:24) even though these are only valid for CPU
2961                  * models > 2, however guests may end up dividing or
2962                  * multiplying by zero otherwise.
2963                  */
2964         case MSR_EBC_FREQUENCY_ID:
2965                 msr_info->data = 1 << 24;
2966                 break;
2967         case MSR_IA32_APICBASE:
2968                 msr_info->data = kvm_get_apic_base(vcpu);
2969                 break;
2970         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2971                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2972                 break;
2973         case MSR_IA32_TSCDEADLINE:
2974                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2975                 break;
2976         case MSR_IA32_TSC_ADJUST:
2977                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2978                 break;
2979         case MSR_IA32_MISC_ENABLE:
2980                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2981                 break;
2982         case MSR_IA32_SMBASE:
2983                 if (!msr_info->host_initiated)
2984                         return 1;
2985                 msr_info->data = vcpu->arch.smbase;
2986                 break;
2987         case MSR_SMI_COUNT:
2988                 msr_info->data = vcpu->arch.smi_count;
2989                 break;
2990         case MSR_IA32_PERF_STATUS:
2991                 /* TSC increment by tick */
2992                 msr_info->data = 1000ULL;
2993                 /* CPU multiplier */
2994                 msr_info->data |= (((uint64_t)4ULL) << 40);
2995                 break;
2996         case MSR_EFER:
2997                 msr_info->data = vcpu->arch.efer;
2998                 break;
2999         case MSR_KVM_WALL_CLOCK:
3000         case MSR_KVM_WALL_CLOCK_NEW:
3001                 msr_info->data = vcpu->kvm->arch.wall_clock;
3002                 break;
3003         case MSR_KVM_SYSTEM_TIME:
3004         case MSR_KVM_SYSTEM_TIME_NEW:
3005                 msr_info->data = vcpu->arch.time;
3006                 break;
3007         case MSR_KVM_ASYNC_PF_EN:
3008                 msr_info->data = vcpu->arch.apf.msr_val;
3009                 break;
3010         case MSR_KVM_STEAL_TIME:
3011                 msr_info->data = vcpu->arch.st.msr_val;
3012                 break;
3013         case MSR_KVM_PV_EOI_EN:
3014                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3015                 break;
3016         case MSR_KVM_POLL_CONTROL:
3017                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3018                 break;
3019         case MSR_IA32_P5_MC_ADDR:
3020         case MSR_IA32_P5_MC_TYPE:
3021         case MSR_IA32_MCG_CAP:
3022         case MSR_IA32_MCG_CTL:
3023         case MSR_IA32_MCG_STATUS:
3024         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3025                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3026                                    msr_info->host_initiated);
3027         case MSR_K7_CLK_CTL:
3028                 /*
3029                  * Provide expected ramp-up count for K7. All other
3030                  * are set to zero, indicating minimum divisors for
3031                  * every field.
3032                  *
3033                  * This prevents guest kernels on AMD host with CPU
3034                  * type 6, model 8 and higher from exploding due to
3035                  * the rdmsr failing.
3036                  */
3037                 msr_info->data = 0x20000000;
3038                 break;
3039         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3040         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3041         case HV_X64_MSR_CRASH_CTL:
3042         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3043         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3044         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3045         case HV_X64_MSR_TSC_EMULATION_STATUS:
3046                 return kvm_hv_get_msr_common(vcpu,
3047                                              msr_info->index, &msr_info->data,
3048                                              msr_info->host_initiated);
3049                 break;
3050         case MSR_IA32_BBL_CR_CTL3:
3051                 /* This legacy MSR exists but isn't fully documented in current
3052                  * silicon.  It is however accessed by winxp in very narrow
3053                  * scenarios where it sets bit #19, itself documented as
3054                  * a "reserved" bit.  Best effort attempt to source coherent
3055                  * read data here should the balance of the register be
3056                  * interpreted by the guest:
3057                  *
3058                  * L2 cache control register 3: 64GB range, 256KB size,
3059                  * enabled, latency 0x1, configured
3060                  */
3061                 msr_info->data = 0xbe702111;
3062                 break;
3063         case MSR_AMD64_OSVW_ID_LENGTH:
3064                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3065                         return 1;
3066                 msr_info->data = vcpu->arch.osvw.length;
3067                 break;
3068         case MSR_AMD64_OSVW_STATUS:
3069                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3070                         return 1;
3071                 msr_info->data = vcpu->arch.osvw.status;
3072                 break;
3073         case MSR_PLATFORM_INFO:
3074                 if (!msr_info->host_initiated &&
3075                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
3076                         return 1;
3077                 msr_info->data = vcpu->arch.msr_platform_info;
3078                 break;
3079         case MSR_MISC_FEATURES_ENABLES:
3080                 msr_info->data = vcpu->arch.msr_misc_features_enables;
3081                 break;
3082         case MSR_K7_HWCR:
3083                 msr_info->data = vcpu->arch.msr_hwcr;
3084                 break;
3085         default:
3086                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3087                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
3088                 if (!ignore_msrs) {
3089                         vcpu_debug_ratelimited(vcpu, "unhandled rdmsr: 0x%x\n",
3090                                                msr_info->index);
3091                         return 1;
3092                 } else {
3093                         if (report_ignored_msrs)
3094                                 vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n",
3095                                         msr_info->index);
3096                         msr_info->data = 0;
3097                 }
3098                 break;
3099         }
3100         return 0;
3101 }
3102 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
3103
3104 /*
3105  * Read or write a bunch of msrs. All parameters are kernel addresses.
3106  *
3107  * @return number of msrs set successfully.
3108  */
3109 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
3110                     struct kvm_msr_entry *entries,
3111                     int (*do_msr)(struct kvm_vcpu *vcpu,
3112                                   unsigned index, u64 *data))
3113 {
3114         int i;
3115
3116         for (i = 0; i < msrs->nmsrs; ++i)
3117                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
3118                         break;
3119
3120         return i;
3121 }
3122
3123 /*
3124  * Read or write a bunch of msrs. Parameters are user addresses.
3125  *
3126  * @return number of msrs set successfully.
3127  */
3128 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
3129                   int (*do_msr)(struct kvm_vcpu *vcpu,
3130                                 unsigned index, u64 *data),
3131                   int writeback)
3132 {
3133         struct kvm_msrs msrs;
3134         struct kvm_msr_entry *entries;
3135         int r, n;
3136         unsigned size;
3137
3138         r = -EFAULT;
3139         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
3140                 goto out;
3141
3142         r = -E2BIG;
3143         if (msrs.nmsrs >= MAX_IO_MSRS)
3144                 goto out;
3145
3146         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
3147         entries = memdup_user(user_msrs->entries, size);
3148         if (IS_ERR(entries)) {
3149                 r = PTR_ERR(entries);
3150                 goto out;
3151         }
3152
3153         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
3154         if (r < 0)
3155                 goto out_free;
3156
3157         r = -EFAULT;
3158         if (writeback && copy_to_user(user_msrs->entries, entries, size))
3159                 goto out_free;
3160
3161         r = n;
3162
3163 out_free:
3164         kfree(entries);
3165 out:
3166         return r;
3167 }
3168
3169 static inline bool kvm_can_mwait_in_guest(void)
3170 {
3171         return boot_cpu_has(X86_FEATURE_MWAIT) &&
3172                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
3173                 boot_cpu_has(X86_FEATURE_ARAT);
3174 }
3175
3176 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
3177 {
3178         int r = 0;
3179
3180         switch (ext) {
3181         case KVM_CAP_IRQCHIP:
3182         case KVM_CAP_HLT:
3183         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
3184         case KVM_CAP_SET_TSS_ADDR:
3185         case KVM_CAP_EXT_CPUID:
3186         case KVM_CAP_EXT_EMUL_CPUID:
3187         case KVM_CAP_CLOCKSOURCE:
3188         case KVM_CAP_PIT:
3189         case KVM_CAP_NOP_IO_DELAY:
3190         case KVM_CAP_MP_STATE:
3191         case KVM_CAP_SYNC_MMU:
3192         case KVM_CAP_USER_NMI:
3193         case KVM_CAP_REINJECT_CONTROL:
3194         case KVM_CAP_IRQ_INJECT_STATUS:
3195         case KVM_CAP_IOEVENTFD:
3196         case KVM_CAP_IOEVENTFD_NO_LENGTH:
3197         case KVM_CAP_PIT2:
3198         case KVM_CAP_PIT_STATE2:
3199         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
3200         case KVM_CAP_XEN_HVM:
3201         case KVM_CAP_VCPU_EVENTS:
3202         case KVM_CAP_HYPERV:
3203         case KVM_CAP_HYPERV_VAPIC:
3204         case KVM_CAP_HYPERV_SPIN:
3205         case KVM_CAP_HYPERV_SYNIC:
3206         case KVM_CAP_HYPERV_SYNIC2:
3207         case KVM_CAP_HYPERV_VP_INDEX:
3208         case KVM_CAP_HYPERV_EVENTFD:
3209         case KVM_CAP_HYPERV_TLBFLUSH:
3210         case KVM_CAP_HYPERV_SEND_IPI:
3211         case KVM_CAP_HYPERV_CPUID:
3212         case KVM_CAP_PCI_SEGMENT:
3213         case KVM_CAP_DEBUGREGS:
3214         case KVM_CAP_X86_ROBUST_SINGLESTEP:
3215         case KVM_CAP_XSAVE:
3216         case KVM_CAP_ASYNC_PF:
3217         case KVM_CAP_GET_TSC_KHZ:
3218         case KVM_CAP_KVMCLOCK_CTRL:
3219         case KVM_CAP_READONLY_MEM:
3220         case KVM_CAP_HYPERV_TIME:
3221         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
3222         case KVM_CAP_TSC_DEADLINE_TIMER:
3223         case KVM_CAP_DISABLE_QUIRKS:
3224         case KVM_CAP_SET_BOOT_CPU_ID:
3225         case KVM_CAP_SPLIT_IRQCHIP:
3226         case KVM_CAP_IMMEDIATE_EXIT:
3227         case KVM_CAP_PMU_EVENT_FILTER:
3228         case KVM_CAP_GET_MSR_FEATURES:
3229         case KVM_CAP_MSR_PLATFORM_INFO:
3230         case KVM_CAP_EXCEPTION_PAYLOAD:
3231                 r = 1;
3232                 break;
3233         case KVM_CAP_SYNC_REGS:
3234                 r = KVM_SYNC_X86_VALID_FIELDS;
3235                 break;
3236         case KVM_CAP_ADJUST_CLOCK:
3237                 r = KVM_CLOCK_TSC_STABLE;
3238                 break;
3239         case KVM_CAP_X86_DISABLE_EXITS:
3240                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
3241                       KVM_X86_DISABLE_EXITS_CSTATE;
3242                 if(kvm_can_mwait_in_guest())
3243                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
3244                 break;
3245         case KVM_CAP_X86_SMM:
3246                 /* SMBASE is usually relocated above 1M on modern chipsets,
3247                  * and SMM handlers might indeed rely on 4G segment limits,
3248                  * so do not report SMM to be available if real mode is
3249                  * emulated via vm86 mode.  Still, do not go to great lengths
3250                  * to avoid userspace's usage of the feature, because it is a
3251                  * fringe case that is not enabled except via specific settings
3252                  * of the module parameters.
3253                  */
3254                 r = kvm_x86_ops->has_emulated_msr(MSR_IA32_SMBASE);
3255                 break;
3256         case KVM_CAP_VAPIC:
3257                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
3258                 break;
3259         case KVM_CAP_NR_VCPUS:
3260                 r = KVM_SOFT_MAX_VCPUS;
3261                 break;
3262         case KVM_CAP_MAX_VCPUS:
3263                 r = KVM_MAX_VCPUS;
3264                 break;
3265         case KVM_CAP_MAX_VCPU_ID:
3266                 r = KVM_MAX_VCPU_ID;
3267                 break;
3268         case KVM_CAP_PV_MMU:    /* obsolete */
3269                 r = 0;
3270                 break;
3271         case KVM_CAP_MCE:
3272                 r = KVM_MAX_MCE_BANKS;
3273                 break;
3274         case KVM_CAP_XCRS:
3275                 r = boot_cpu_has(X86_FEATURE_XSAVE);
3276                 break;
3277         case KVM_CAP_TSC_CONTROL:
3278                 r = kvm_has_tsc_control;
3279                 break;
3280         case KVM_CAP_X2APIC_API:
3281                 r = KVM_X2APIC_API_VALID_FLAGS;
3282                 break;
3283         case KVM_CAP_NESTED_STATE:
3284                 r = kvm_x86_ops->get_nested_state ?
3285                         kvm_x86_ops->get_nested_state(NULL, NULL, 0) : 0;
3286                 break;
3287         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
3288                 r = kvm_x86_ops->enable_direct_tlbflush != NULL;
3289                 break;
3290         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
3291                 r = kvm_x86_ops->nested_enable_evmcs != NULL;
3292                 break;
3293         default:
3294                 break;
3295         }
3296         return r;
3297
3298 }
3299
3300 long kvm_arch_dev_ioctl(struct file *filp,
3301                         unsigned int ioctl, unsigned long arg)
3302 {
3303         void __user *argp = (void __user *)arg;
3304         long r;
3305
3306         switch (ioctl) {
3307         case KVM_GET_MSR_INDEX_LIST: {
3308                 struct kvm_msr_list __user *user_msr_list = argp;
3309                 struct kvm_msr_list msr_list;
3310                 unsigned n;
3311
3312                 r = -EFAULT;
3313                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3314                         goto out;
3315                 n = msr_list.nmsrs;
3316                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
3317                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3318                         goto out;
3319                 r = -E2BIG;
3320                 if (n < msr_list.nmsrs)
3321                         goto out;
3322                 r = -EFAULT;
3323                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
3324                                  num_msrs_to_save * sizeof(u32)))
3325                         goto out;
3326                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
3327                                  &emulated_msrs,
3328                                  num_emulated_msrs * sizeof(u32)))
3329                         goto out;
3330                 r = 0;
3331                 break;
3332         }
3333         case KVM_GET_SUPPORTED_CPUID:
3334         case KVM_GET_EMULATED_CPUID: {
3335                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3336                 struct kvm_cpuid2 cpuid;
3337
3338                 r = -EFAULT;
3339                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3340                         goto out;
3341
3342                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
3343                                             ioctl);
3344                 if (r)
3345                         goto out;
3346
3347                 r = -EFAULT;
3348                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3349                         goto out;
3350                 r = 0;
3351                 break;
3352         }
3353         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
3354                 r = -EFAULT;
3355                 if (copy_to_user(argp, &kvm_mce_cap_supported,
3356                                  sizeof(kvm_mce_cap_supported)))
3357                         goto out;
3358                 r = 0;
3359                 break;
3360         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
3361                 struct kvm_msr_list __user *user_msr_list = argp;
3362                 struct kvm_msr_list msr_list;
3363                 unsigned int n;
3364
3365                 r = -EFAULT;
3366                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3367                         goto out;
3368                 n = msr_list.nmsrs;
3369                 msr_list.nmsrs = num_msr_based_features;
3370                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3371                         goto out;
3372                 r = -E2BIG;
3373                 if (n < msr_list.nmsrs)
3374                         goto out;
3375                 r = -EFAULT;
3376                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
3377                                  num_msr_based_features * sizeof(u32)))
3378                         goto out;
3379                 r = 0;
3380                 break;
3381         }
3382         case KVM_GET_MSRS:
3383                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
3384                 break;
3385         }
3386         default:
3387                 r = -EINVAL;
3388         }
3389 out:
3390         return r;
3391 }
3392
3393 static void wbinvd_ipi(void *garbage)
3394 {
3395         wbinvd();
3396 }
3397
3398 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
3399 {
3400         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
3401 }
3402
3403 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
3404 {
3405         /* Address WBINVD may be executed by guest */
3406         if (need_emulate_wbinvd(vcpu)) {
3407                 if (kvm_x86_ops->has_wbinvd_exit())
3408                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
3409                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
3410                         smp_call_function_single(vcpu->cpu,
3411                                         wbinvd_ipi, NULL, 1);
3412         }
3413
3414         kvm_x86_ops->vcpu_load(vcpu, cpu);
3415
3416         fpregs_assert_state_consistent();
3417         if (test_thread_flag(TIF_NEED_FPU_LOAD))
3418                 switch_fpu_return();
3419
3420         /* Apply any externally detected TSC adjustments (due to suspend) */
3421         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
3422                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
3423                 vcpu->arch.tsc_offset_adjustment = 0;
3424                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3425         }
3426
3427         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
3428                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
3429                                 rdtsc() - vcpu->arch.last_host_tsc;
3430                 if (tsc_delta < 0)
3431                         mark_tsc_unstable("KVM discovered backwards TSC");
3432
3433                 if (kvm_check_tsc_unstable()) {
3434                         u64 offset = kvm_compute_tsc_offset(vcpu,
3435                                                 vcpu->arch.last_guest_tsc);
3436                         kvm_vcpu_write_tsc_offset(vcpu, offset);
3437                         vcpu->arch.tsc_catchup = 1;
3438                 }
3439
3440                 if (kvm_lapic_hv_timer_in_use(vcpu))
3441                         kvm_lapic_restart_hv_timer(vcpu);
3442
3443                 /*
3444                  * On a host with synchronized TSC, there is no need to update
3445                  * kvmclock on vcpu->cpu migration
3446                  */
3447                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
3448                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
3449                 if (vcpu->cpu != cpu)
3450                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
3451                 vcpu->cpu = cpu;
3452         }
3453
3454         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3455 }
3456
3457 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
3458 {
3459         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3460                 return;
3461
3462         vcpu->arch.st.steal.preempted = KVM_VCPU_PREEMPTED;
3463
3464         kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.st.stime,
3465                         &vcpu->arch.st.steal.preempted,
3466                         offsetof(struct kvm_steal_time, preempted),
3467                         sizeof(vcpu->arch.st.steal.preempted));
3468 }
3469
3470 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
3471 {
3472         int idx;
3473
3474         if (vcpu->preempted)
3475                 vcpu->arch.preempted_in_kernel = !kvm_x86_ops->get_cpl(vcpu);
3476
3477         /*
3478          * Disable page faults because we're in atomic context here.
3479          * kvm_write_guest_offset_cached() would call might_fault()
3480          * that relies on pagefault_disable() to tell if there's a
3481          * bug. NOTE: the write to guest memory may not go through if
3482          * during postcopy live migration or if there's heavy guest
3483          * paging.
3484          */
3485         pagefault_disable();
3486         /*
3487          * kvm_memslots() will be called by
3488          * kvm_write_guest_offset_cached() so take the srcu lock.
3489          */
3490         idx = srcu_read_lock(&vcpu->kvm->srcu);
3491         kvm_steal_time_set_preempted(vcpu);
3492         srcu_read_unlock(&vcpu->kvm->srcu, idx);
3493         pagefault_enable();
3494         kvm_x86_ops->vcpu_put(vcpu);
3495         vcpu->arch.last_host_tsc = rdtsc();
3496         /*
3497          * If userspace has set any breakpoints or watchpoints, dr6 is restored
3498          * on every vmexit, but if not, we might have a stale dr6 from the
3499          * guest. do_debug expects dr6 to be cleared after it runs, do the same.
3500          */
3501         set_debugreg(0, 6);
3502 }
3503
3504 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
3505                                     struct kvm_lapic_state *s)
3506 {
3507         if (vcpu->arch.apicv_active)
3508                 kvm_x86_ops->sync_pir_to_irr(vcpu);
3509
3510         return kvm_apic_get_state(vcpu, s);
3511 }
3512
3513 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
3514                                     struct kvm_lapic_state *s)
3515 {
3516         int r;
3517
3518         r = kvm_apic_set_state(vcpu, s);
3519         if (r)
3520                 return r;
3521         update_cr8_intercept(vcpu);
3522
3523         return 0;
3524 }
3525
3526 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
3527 {
3528         return (!lapic_in_kernel(vcpu) ||
3529                 kvm_apic_accept_pic_intr(vcpu));
3530 }
3531
3532 /*
3533  * if userspace requested an interrupt window, check that the
3534  * interrupt window is open.
3535  *
3536  * No need to exit to userspace if we already have an interrupt queued.
3537  */
3538 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
3539 {
3540         return kvm_arch_interrupt_allowed(vcpu) &&
3541                 !kvm_cpu_has_interrupt(vcpu) &&
3542                 !kvm_event_needs_reinjection(vcpu) &&
3543                 kvm_cpu_accept_dm_intr(vcpu);
3544 }
3545
3546 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
3547                                     struct kvm_interrupt *irq)
3548 {
3549         if (irq->irq >= KVM_NR_INTERRUPTS)
3550                 return -EINVAL;
3551
3552         if (!irqchip_in_kernel(vcpu->kvm)) {
3553                 kvm_queue_interrupt(vcpu, irq->irq, false);
3554                 kvm_make_request(KVM_REQ_EVENT, vcpu);
3555                 return 0;
3556         }
3557
3558         /*
3559          * With in-kernel LAPIC, we only use this to inject EXTINT, so
3560          * fail for in-kernel 8259.
3561          */
3562         if (pic_in_kernel(vcpu->kvm))
3563                 return -ENXIO;
3564
3565         if (vcpu->arch.pending_external_vector != -1)
3566                 return -EEXIST;
3567
3568         vcpu->arch.pending_external_vector = irq->irq;
3569         kvm_make_request(KVM_REQ_EVENT, vcpu);
3570         return 0;
3571 }
3572
3573 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
3574 {
3575         kvm_inject_nmi(vcpu);
3576
3577         return 0;
3578 }
3579
3580 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
3581 {
3582         kvm_make_request(KVM_REQ_SMI, vcpu);
3583
3584         return 0;
3585 }
3586
3587 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
3588                                            struct kvm_tpr_access_ctl *tac)
3589 {
3590         if (tac->flags)
3591                 return -EINVAL;
3592         vcpu->arch.tpr_access_reporting = !!tac->enabled;
3593         return 0;
3594 }
3595
3596 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
3597                                         u64 mcg_cap)
3598 {
3599         int r;
3600         unsigned bank_num = mcg_cap & 0xff, bank;
3601
3602         r = -EINVAL;
3603         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
3604                 goto out;
3605         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
3606                 goto out;
3607         r = 0;
3608         vcpu->arch.mcg_cap = mcg_cap;
3609         /* Init IA32_MCG_CTL to all 1s */
3610         if (mcg_cap & MCG_CTL_P)
3611                 vcpu->arch.mcg_ctl = ~(u64)0;
3612         /* Init IA32_MCi_CTL to all 1s */
3613         for (bank = 0; bank < bank_num; bank++)
3614                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
3615
3616         kvm_x86_ops->setup_mce(vcpu);
3617 out:
3618         return r;
3619 }
3620
3621 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
3622                                       struct kvm_x86_mce *mce)
3623 {
3624         u64 mcg_cap = vcpu->arch.mcg_cap;
3625         unsigned bank_num = mcg_cap & 0xff;
3626         u64 *banks = vcpu->arch.mce_banks;
3627
3628         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
3629                 return -EINVAL;
3630         /*
3631          * if IA32_MCG_CTL is not all 1s, the uncorrected error
3632          * reporting is disabled
3633          */
3634         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
3635             vcpu->arch.mcg_ctl != ~(u64)0)
3636                 return 0;
3637         banks += 4 * mce->bank;
3638         /*
3639          * if IA32_MCi_CTL is not all 1s, the uncorrected error
3640          * reporting is disabled for the bank
3641          */
3642         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
3643                 return 0;
3644         if (mce->status & MCI_STATUS_UC) {
3645                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
3646                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
3647                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3648                         return 0;
3649                 }
3650                 if (banks[1] & MCI_STATUS_VAL)
3651                         mce->status |= MCI_STATUS_OVER;
3652                 banks[2] = mce->addr;
3653                 banks[3] = mce->misc;
3654                 vcpu->arch.mcg_status = mce->mcg_status;
3655                 banks[1] = mce->status;
3656                 kvm_queue_exception(vcpu, MC_VECTOR);
3657         } else if (!(banks[1] & MCI_STATUS_VAL)
3658                    || !(banks[1] & MCI_STATUS_UC)) {
3659                 if (banks[1] & MCI_STATUS_VAL)
3660                         mce->status |= MCI_STATUS_OVER;
3661                 banks[2] = mce->addr;
3662                 banks[3] = mce->misc;
3663                 banks[1] = mce->status;
3664         } else
3665                 banks[1] |= MCI_STATUS_OVER;
3666         return 0;
3667 }
3668
3669 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
3670                                                struct kvm_vcpu_events *events)
3671 {
3672         process_nmi(vcpu);
3673
3674         /*
3675          * The API doesn't provide the instruction length for software
3676          * exceptions, so don't report them. As long as the guest RIP
3677          * isn't advanced, we should expect to encounter the exception
3678          * again.
3679          */
3680         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
3681                 events->exception.injected = 0;
3682                 events->exception.pending = 0;
3683         } else {
3684                 events->exception.injected = vcpu->arch.exception.injected;
3685                 events->exception.pending = vcpu->arch.exception.pending;
3686                 /*
3687                  * For ABI compatibility, deliberately conflate
3688                  * pending and injected exceptions when
3689                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
3690                  */
3691                 if (!vcpu->kvm->arch.exception_payload_enabled)
3692                         events->exception.injected |=
3693                                 vcpu->arch.exception.pending;
3694         }
3695         events->exception.nr = vcpu->arch.exception.nr;
3696         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
3697         events->exception.error_code = vcpu->arch.exception.error_code;
3698         events->exception_has_payload = vcpu->arch.exception.has_payload;
3699         events->exception_payload = vcpu->arch.exception.payload;
3700
3701         events->interrupt.injected =
3702                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
3703         events->interrupt.nr = vcpu->arch.interrupt.nr;
3704         events->interrupt.soft = 0;
3705         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
3706
3707         events->nmi.injected = vcpu->arch.nmi_injected;
3708         events->nmi.pending = vcpu->arch.nmi_pending != 0;
3709         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
3710         events->nmi.pad = 0;
3711
3712         events->sipi_vector = 0; /* never valid when reporting to user space */
3713
3714         events->smi.smm = is_smm(vcpu);
3715         events->smi.pending = vcpu->arch.smi_pending;
3716         events->smi.smm_inside_nmi =
3717                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
3718         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
3719
3720         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
3721                          | KVM_VCPUEVENT_VALID_SHADOW
3722                          | KVM_VCPUEVENT_VALID_SMM);
3723         if (vcpu->kvm->arch.exception_payload_enabled)
3724                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
3725
3726         memset(&events->reserved, 0, sizeof(events->reserved));
3727 }
3728
3729 static void kvm_smm_changed(struct kvm_vcpu *vcpu);
3730
3731 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
3732                                               struct kvm_vcpu_events *events)
3733 {
3734         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3735                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3736                               | KVM_VCPUEVENT_VALID_SHADOW
3737                               | KVM_VCPUEVENT_VALID_SMM
3738                               | KVM_VCPUEVENT_VALID_PAYLOAD))
3739                 return -EINVAL;
3740
3741         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
3742                 if (!vcpu->kvm->arch.exception_payload_enabled)
3743                         return -EINVAL;
3744                 if (events->exception.pending)
3745                         events->exception.injected = 0;
3746                 else
3747                         events->exception_has_payload = 0;
3748         } else {
3749                 events->exception.pending = 0;
3750                 events->exception_has_payload = 0;
3751         }
3752
3753         if ((events->exception.injected || events->exception.pending) &&
3754             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
3755                 return -EINVAL;
3756
3757         /* INITs are latched while in SMM */
3758         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
3759             (events->smi.smm || events->smi.pending) &&
3760             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
3761                 return -EINVAL;
3762
3763         process_nmi(vcpu);
3764         vcpu->arch.exception.injected = events->exception.injected;
3765         vcpu->arch.exception.pending = events->exception.pending;
3766         vcpu->arch.exception.nr = events->exception.nr;
3767         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3768         vcpu->arch.exception.error_code = events->exception.error_code;
3769         vcpu->arch.exception.has_payload = events->exception_has_payload;
3770         vcpu->arch.exception.payload = events->exception_payload;
3771
3772         vcpu->arch.interrupt.injected = events->interrupt.injected;
3773         vcpu->arch.interrupt.nr = events->interrupt.nr;
3774         vcpu->arch.interrupt.soft = events->interrupt.soft;
3775         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3776                 kvm_x86_ops->set_interrupt_shadow(vcpu,
3777                                                   events->interrupt.shadow);
3778
3779         vcpu->arch.nmi_injected = events->nmi.injected;
3780         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3781                 vcpu->arch.nmi_pending = events->nmi.pending;
3782         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3783
3784         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3785             lapic_in_kernel(vcpu))
3786                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3787
3788         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
3789                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
3790                         if (events->smi.smm)
3791                                 vcpu->arch.hflags |= HF_SMM_MASK;
3792                         else
3793                                 vcpu->arch.hflags &= ~HF_SMM_MASK;
3794                         kvm_smm_changed(vcpu);
3795                 }
3796
3797                 vcpu->arch.smi_pending = events->smi.pending;
3798
3799                 if (events->smi.smm) {
3800                         if (events->smi.smm_inside_nmi)
3801                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3802                         else
3803                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3804                         if (lapic_in_kernel(vcpu)) {
3805                                 if (events->smi.latched_init)
3806                                         set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3807                                 else
3808                                         clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3809                         }
3810                 }
3811         }
3812
3813         kvm_make_request(KVM_REQ_EVENT, vcpu);
3814
3815         return 0;
3816 }
3817
3818 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3819                                              struct kvm_debugregs *dbgregs)
3820 {
3821         unsigned long val;
3822
3823         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3824         kvm_get_dr(vcpu, 6, &val);
3825         dbgregs->dr6 = val;
3826         dbgregs->dr7 = vcpu->arch.dr7;
3827         dbgregs->flags = 0;
3828         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3829 }
3830
3831 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3832                                             struct kvm_debugregs *dbgregs)
3833 {
3834         if (dbgregs->flags)
3835                 return -EINVAL;
3836
3837         if (dbgregs->dr6 & ~0xffffffffull)
3838                 return -EINVAL;
3839         if (dbgregs->dr7 & ~0xffffffffull)
3840                 return -EINVAL;
3841
3842         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3843         kvm_update_dr0123(vcpu);
3844         vcpu->arch.dr6 = dbgregs->dr6;
3845         kvm_update_dr6(vcpu);
3846         vcpu->arch.dr7 = dbgregs->dr7;
3847         kvm_update_dr7(vcpu);
3848
3849         return 0;
3850 }
3851
3852 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3853
3854 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3855 {
3856         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
3857         u64 xstate_bv = xsave->header.xfeatures;
3858         u64 valid;
3859
3860         /*
3861          * Copy legacy XSAVE area, to avoid complications with CPUID
3862          * leaves 0 and 1 in the loop below.
3863          */
3864         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3865
3866         /* Set XSTATE_BV */
3867         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
3868         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3869
3870         /*
3871          * Copy each region from the possibly compacted offset to the
3872          * non-compacted offset.
3873          */
3874         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3875         while (valid) {
3876                 u64 xfeature_mask = valid & -valid;
3877                 int xfeature_nr = fls64(xfeature_mask) - 1;
3878                 void *src = get_xsave_addr(xsave, xfeature_nr);
3879
3880                 if (src) {
3881                         u32 size, offset, ecx, edx;
3882                         cpuid_count(XSTATE_CPUID, xfeature_nr,
3883                                     &size, &offset, &ecx, &edx);
3884                         if (xfeature_nr == XFEATURE_PKRU)
3885                                 memcpy(dest + offset, &vcpu->arch.pkru,
3886                                        sizeof(vcpu->arch.pkru));
3887                         else
3888                                 memcpy(dest + offset, src, size);
3889
3890                 }
3891
3892                 valid -= xfeature_mask;
3893         }
3894 }
3895
3896 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3897 {
3898         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
3899         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3900         u64 valid;
3901
3902         /*
3903          * Copy legacy XSAVE area, to avoid complications with CPUID
3904          * leaves 0 and 1 in the loop below.
3905          */
3906         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3907
3908         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3909         xsave->header.xfeatures = xstate_bv;
3910         if (boot_cpu_has(X86_FEATURE_XSAVES))
3911                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3912
3913         /*
3914          * Copy each region from the non-compacted offset to the
3915          * possibly compacted offset.
3916          */
3917         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3918         while (valid) {
3919                 u64 xfeature_mask = valid & -valid;
3920                 int xfeature_nr = fls64(xfeature_mask) - 1;
3921                 void *dest = get_xsave_addr(xsave, xfeature_nr);
3922
3923                 if (dest) {
3924                         u32 size, offset, ecx, edx;
3925                         cpuid_count(XSTATE_CPUID, xfeature_nr,
3926                                     &size, &offset, &ecx, &edx);
3927                         if (xfeature_nr == XFEATURE_PKRU)
3928                                 memcpy(&vcpu->arch.pkru, src + offset,
3929                                        sizeof(vcpu->arch.pkru));
3930                         else
3931                                 memcpy(dest, src + offset, size);
3932                 }
3933
3934                 valid -= xfeature_mask;
3935         }
3936 }
3937
3938 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3939                                          struct kvm_xsave *guest_xsave)
3940 {
3941         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3942                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3943                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3944         } else {
3945                 memcpy(guest_xsave->region,
3946                         &vcpu->arch.guest_fpu->state.fxsave,
3947                         sizeof(struct fxregs_state));
3948                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3949                         XFEATURE_MASK_FPSSE;
3950         }
3951 }
3952
3953 #define XSAVE_MXCSR_OFFSET 24
3954
3955 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3956                                         struct kvm_xsave *guest_xsave)
3957 {
3958         u64 xstate_bv =
3959                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3960         u32 mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
3961
3962         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3963                 /*
3964                  * Here we allow setting states that are not present in
3965                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3966                  * with old userspace.
3967                  */
3968                 if (xstate_bv & ~kvm_supported_xcr0() ||
3969                         mxcsr & ~mxcsr_feature_mask)
3970                         return -EINVAL;
3971                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3972         } else {
3973                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
3974                         mxcsr & ~mxcsr_feature_mask)
3975                         return -EINVAL;
3976                 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
3977                         guest_xsave->region, sizeof(struct fxregs_state));
3978         }
3979         return 0;
3980 }
3981
3982 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3983                                         struct kvm_xcrs *guest_xcrs)
3984 {
3985         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
3986                 guest_xcrs->nr_xcrs = 0;
3987                 return;
3988         }
3989
3990         guest_xcrs->nr_xcrs = 1;
3991         guest_xcrs->flags = 0;
3992         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3993         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3994 }
3995
3996 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3997                                        struct kvm_xcrs *guest_xcrs)
3998 {
3999         int i, r = 0;
4000
4001         if (!boot_cpu_has(X86_FEATURE_XSAVE))
4002                 return -EINVAL;
4003
4004         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
4005                 return -EINVAL;
4006
4007         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
4008                 /* Only support XCR0 currently */
4009                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
4010                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
4011                                 guest_xcrs->xcrs[i].value);
4012                         break;
4013                 }
4014         if (r)
4015                 r = -EINVAL;
4016         return r;
4017 }
4018
4019 /*
4020  * kvm_set_guest_paused() indicates to the guest kernel that it has been
4021  * stopped by the hypervisor.  This function will be called from the host only.
4022  * EINVAL is returned when the host attempts to set the flag for a guest that
4023  * does not support pv clocks.
4024  */
4025 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
4026 {
4027         if (!vcpu->arch.pv_time_enabled)
4028                 return -EINVAL;
4029         vcpu->arch.pvclock_set_guest_stopped_request = true;
4030         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4031         return 0;
4032 }
4033
4034 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
4035                                      struct kvm_enable_cap *cap)
4036 {
4037         int r;
4038         uint16_t vmcs_version;
4039         void __user *user_ptr;
4040
4041         if (cap->flags)
4042                 return -EINVAL;
4043
4044         switch (cap->cap) {
4045         case KVM_CAP_HYPERV_SYNIC2:
4046                 if (cap->args[0])
4047                         return -EINVAL;
4048                 /* fall through */
4049
4050         case KVM_CAP_HYPERV_SYNIC:
4051                 if (!irqchip_in_kernel(vcpu->kvm))
4052                         return -EINVAL;
4053                 return kvm_hv_activate_synic(vcpu, cap->cap ==
4054                                              KVM_CAP_HYPERV_SYNIC2);
4055         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4056                 if (!kvm_x86_ops->nested_enable_evmcs)
4057                         return -ENOTTY;
4058                 r = kvm_x86_ops->nested_enable_evmcs(vcpu, &vmcs_version);
4059                 if (!r) {
4060                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
4061                         if (copy_to_user(user_ptr, &vmcs_version,
4062                                          sizeof(vmcs_version)))
4063                                 r = -EFAULT;
4064                 }
4065                 return r;
4066         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4067                 if (!kvm_x86_ops->enable_direct_tlbflush)
4068                         return -ENOTTY;
4069
4070                 return kvm_x86_ops->enable_direct_tlbflush(vcpu);
4071
4072         default:
4073                 return -EINVAL;
4074         }
4075 }
4076
4077 long kvm_arch_vcpu_ioctl(struct file *filp,
4078                          unsigned int ioctl, unsigned long arg)
4079 {
4080         struct kvm_vcpu *vcpu = filp->private_data;
4081         void __user *argp = (void __user *)arg;
4082         int r;
4083         union {
4084                 struct kvm_lapic_state *lapic;
4085                 struct kvm_xsave *xsave;
4086                 struct kvm_xcrs *xcrs;
4087                 void *buffer;
4088         } u;
4089
4090         vcpu_load(vcpu);
4091
4092         u.buffer = NULL;
4093         switch (ioctl) {
4094         case KVM_GET_LAPIC: {
4095                 r = -EINVAL;
4096                 if (!lapic_in_kernel(vcpu))
4097                         goto out;
4098                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
4099                                 GFP_KERNEL_ACCOUNT);
4100
4101                 r = -ENOMEM;
4102                 if (!u.lapic)
4103                         goto out;
4104                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
4105                 if (r)
4106                         goto out;
4107                 r = -EFAULT;
4108                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
4109                         goto out;
4110                 r = 0;
4111                 break;
4112         }
4113         case KVM_SET_LAPIC: {
4114                 r = -EINVAL;
4115                 if (!lapic_in_kernel(vcpu))
4116                         goto out;
4117                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
4118                 if (IS_ERR(u.lapic)) {
4119                         r = PTR_ERR(u.lapic);
4120                         goto out_nofree;
4121                 }
4122
4123                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
4124                 break;
4125         }
4126         case KVM_INTERRUPT: {
4127                 struct kvm_interrupt irq;
4128
4129                 r = -EFAULT;
4130                 if (copy_from_user(&irq, argp, sizeof(irq)))
4131                         goto out;
4132                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
4133                 break;
4134         }
4135         case KVM_NMI: {
4136                 r = kvm_vcpu_ioctl_nmi(vcpu);
4137                 break;
4138         }
4139         case KVM_SMI: {
4140                 r = kvm_vcpu_ioctl_smi(vcpu);
4141                 break;
4142         }
4143         case KVM_SET_CPUID: {
4144                 struct kvm_cpuid __user *cpuid_arg = argp;
4145                 struct kvm_cpuid cpuid;
4146
4147                 r = -EFAULT;
4148                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4149                         goto out;
4150                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4151                 break;
4152         }
4153         case KVM_SET_CPUID2: {
4154                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4155                 struct kvm_cpuid2 cpuid;
4156
4157                 r = -EFAULT;
4158                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4159                         goto out;
4160                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
4161                                               cpuid_arg->entries);
4162                 break;
4163         }
4164         case KVM_GET_CPUID2: {
4165                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4166                 struct kvm_cpuid2 cpuid;
4167
4168                 r = -EFAULT;
4169                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4170                         goto out;
4171                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
4172                                               cpuid_arg->entries);
4173                 if (r)
4174                         goto out;
4175                 r = -EFAULT;
4176                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4177                         goto out;
4178                 r = 0;
4179                 break;
4180         }
4181         case KVM_GET_MSRS: {
4182                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4183                 r = msr_io(vcpu, argp, do_get_msr, 1);
4184                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4185                 break;
4186         }
4187         case KVM_SET_MSRS: {
4188                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4189                 r = msr_io(vcpu, argp, do_set_msr, 0);
4190                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4191                 break;
4192         }
4193         case KVM_TPR_ACCESS_REPORTING: {
4194                 struct kvm_tpr_access_ctl tac;
4195
4196                 r = -EFAULT;
4197                 if (copy_from_user(&tac, argp, sizeof(tac)))
4198                         goto out;
4199                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
4200                 if (r)
4201                         goto out;
4202                 r = -EFAULT;
4203                 if (copy_to_user(argp, &tac, sizeof(tac)))
4204                         goto out;
4205                 r = 0;
4206                 break;
4207         };
4208         case KVM_SET_VAPIC_ADDR: {
4209                 struct kvm_vapic_addr va;
4210                 int idx;
4211
4212                 r = -EINVAL;
4213                 if (!lapic_in_kernel(vcpu))
4214                         goto out;
4215                 r = -EFAULT;
4216                 if (copy_from_user(&va, argp, sizeof(va)))
4217                         goto out;
4218                 idx = srcu_read_lock(&vcpu->kvm->srcu);
4219                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
4220                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4221                 break;
4222         }
4223         case KVM_X86_SETUP_MCE: {
4224                 u64 mcg_cap;
4225
4226                 r = -EFAULT;
4227                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
4228                         goto out;
4229                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
4230                 break;
4231         }
4232         case KVM_X86_SET_MCE: {
4233                 struct kvm_x86_mce mce;
4234
4235                 r = -EFAULT;
4236                 if (copy_from_user(&mce, argp, sizeof(mce)))
4237                         goto out;
4238                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
4239                 break;
4240         }
4241         case KVM_GET_VCPU_EVENTS: {
4242                 struct kvm_vcpu_events events;
4243
4244                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
4245
4246                 r = -EFAULT;
4247                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
4248                         break;
4249                 r = 0;
4250                 break;
4251         }
4252         case KVM_SET_VCPU_EVENTS: {
4253                 struct kvm_vcpu_events events;
4254
4255                 r = -EFAULT;
4256                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
4257                         break;
4258
4259                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
4260                 break;
4261         }
4262         case KVM_GET_DEBUGREGS: {
4263                 struct kvm_debugregs dbgregs;
4264
4265                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
4266
4267                 r = -EFAULT;
4268                 if (copy_to_user(argp, &dbgregs,
4269                                  sizeof(struct kvm_debugregs)))
4270                         break;
4271                 r = 0;
4272                 break;
4273         }
4274         case KVM_SET_DEBUGREGS: {
4275                 struct kvm_debugregs dbgregs;
4276
4277                 r = -EFAULT;
4278                 if (copy_from_user(&dbgregs, argp,
4279                                    sizeof(struct kvm_debugregs)))
4280                         break;
4281
4282                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
4283                 break;
4284         }
4285         case KVM_GET_XSAVE: {
4286                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
4287                 r = -ENOMEM;
4288                 if (!u.xsave)
4289                         break;
4290
4291                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
4292
4293                 r = -EFAULT;
4294                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
4295                         break;
4296                 r = 0;
4297                 break;
4298         }
4299         case KVM_SET_XSAVE: {
4300                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
4301                 if (IS_ERR(u.xsave)) {
4302                         r = PTR_ERR(u.xsave);
4303                         goto out_nofree;
4304                 }
4305
4306                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
4307                 break;
4308         }
4309         case KVM_GET_XCRS: {
4310                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
4311                 r = -ENOMEM;
4312                 if (!u.xcrs)
4313                         break;
4314
4315                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
4316
4317                 r = -EFAULT;
4318                 if (copy_to_user(argp, u.xcrs,
4319                                  sizeof(struct kvm_xcrs)))
4320                         break;
4321                 r = 0;
4322                 break;
4323         }
4324         case KVM_SET_XCRS: {
4325                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
4326                 if (IS_ERR(u.xcrs)) {
4327                         r = PTR_ERR(u.xcrs);
4328                         goto out_nofree;
4329                 }
4330
4331                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
4332                 break;
4333         }
4334         case KVM_SET_TSC_KHZ: {
4335                 u32 user_tsc_khz;
4336
4337                 r = -EINVAL;
4338                 user_tsc_khz = (u32)arg;
4339
4340                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
4341                         goto out;
4342
4343                 if (user_tsc_khz == 0)
4344                         user_tsc_khz = tsc_khz;
4345
4346                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
4347                         r = 0;
4348
4349                 goto out;
4350         }
4351         case KVM_GET_TSC_KHZ: {
4352                 r = vcpu->arch.virtual_tsc_khz;
4353                 goto out;
4354         }
4355         case KVM_KVMCLOCK_CTRL: {
4356                 r = kvm_set_guest_paused(vcpu);
4357                 goto out;
4358         }
4359         case KVM_ENABLE_CAP: {
4360                 struct kvm_enable_cap cap;
4361
4362                 r = -EFAULT;
4363                 if (copy_from_user(&cap, argp, sizeof(cap)))
4364                         goto out;
4365                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
4366                 break;
4367         }
4368         case KVM_GET_NESTED_STATE: {
4369                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4370                 u32 user_data_size;
4371
4372                 r = -EINVAL;
4373                 if (!kvm_x86_ops->get_nested_state)
4374                         break;
4375
4376                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
4377                 r = -EFAULT;
4378                 if (get_user(user_data_size, &user_kvm_nested_state->size))
4379                         break;
4380
4381                 r = kvm_x86_ops->get_nested_state(vcpu, user_kvm_nested_state,
4382                                                   user_data_size);
4383                 if (r < 0)
4384                         break;
4385
4386                 if (r > user_data_size) {
4387                         if (put_user(r, &user_kvm_nested_state->size))
4388                                 r = -EFAULT;
4389                         else
4390                                 r = -E2BIG;
4391                         break;
4392                 }
4393
4394                 r = 0;
4395                 break;
4396         }
4397         case KVM_SET_NESTED_STATE: {
4398                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4399                 struct kvm_nested_state kvm_state;
4400
4401                 r = -EINVAL;
4402                 if (!kvm_x86_ops->set_nested_state)
4403                         break;
4404
4405                 r = -EFAULT;
4406                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
4407                         break;
4408
4409                 r = -EINVAL;
4410                 if (kvm_state.size < sizeof(kvm_state))
4411                         break;
4412
4413                 if (kvm_state.flags &
4414                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
4415                       | KVM_STATE_NESTED_EVMCS))
4416                         break;
4417
4418                 /* nested_run_pending implies guest_mode.  */
4419                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
4420                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
4421                         break;
4422
4423                 r = kvm_x86_ops->set_nested_state(vcpu, user_kvm_nested_state, &kvm_state);
4424                 break;
4425         }
4426         case KVM_GET_SUPPORTED_HV_CPUID: {
4427                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4428                 struct kvm_cpuid2 cpuid;
4429
4430                 r = -EFAULT;
4431                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4432                         goto out;
4433
4434                 r = kvm_vcpu_ioctl_get_hv_cpuid(vcpu, &cpuid,
4435                                                 cpuid_arg->entries);
4436                 if (r)
4437                         goto out;
4438
4439                 r = -EFAULT;
4440                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4441                         goto out;
4442                 r = 0;
4443                 break;
4444         }
4445         default:
4446                 r = -EINVAL;
4447         }
4448 out:
4449         kfree(u.buffer);
4450 out_nofree:
4451         vcpu_put(vcpu);
4452         return r;
4453 }
4454
4455 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
4456 {
4457         return VM_FAULT_SIGBUS;
4458 }
4459
4460 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
4461 {
4462         int ret;
4463
4464         if (addr > (unsigned int)(-3 * PAGE_SIZE))
4465                 return -EINVAL;
4466         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
4467         return ret;
4468 }
4469
4470 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
4471                                               u64 ident_addr)
4472 {
4473         return kvm_x86_ops->set_identity_map_addr(kvm, ident_addr);
4474 }
4475
4476 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
4477                                          unsigned long kvm_nr_mmu_pages)
4478 {
4479         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
4480                 return -EINVAL;
4481
4482         mutex_lock(&kvm->slots_lock);
4483
4484         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
4485         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
4486
4487         mutex_unlock(&kvm->slots_lock);
4488         return 0;
4489 }
4490
4491 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
4492 {
4493         return kvm->arch.n_max_mmu_pages;
4494 }
4495
4496 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
4497 {
4498         struct kvm_pic *pic = kvm->arch.vpic;
4499         int r;
4500
4501         r = 0;
4502         switch (chip->chip_id) {
4503         case KVM_IRQCHIP_PIC_MASTER:
4504                 memcpy(&chip->chip.pic, &pic->pics[0],
4505                         sizeof(struct kvm_pic_state));
4506                 break;
4507         case KVM_IRQCHIP_PIC_SLAVE:
4508                 memcpy(&chip->chip.pic, &pic->pics[1],
4509                         sizeof(struct kvm_pic_state));
4510                 break;
4511         case KVM_IRQCHIP_IOAPIC:
4512                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
4513                 break;
4514         default:
4515                 r = -EINVAL;
4516                 break;
4517         }
4518         return r;
4519 }
4520
4521 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
4522 {
4523         struct kvm_pic *pic = kvm->arch.vpic;
4524         int r;
4525
4526         r = 0;
4527         switch (chip->chip_id) {
4528         case KVM_IRQCHIP_PIC_MASTER:
4529                 spin_lock(&pic->lock);
4530                 memcpy(&pic->pics[0], &chip->chip.pic,
4531                         sizeof(struct kvm_pic_state));
4532                 spin_unlock(&pic->lock);
4533                 break;
4534         case KVM_IRQCHIP_PIC_SLAVE:
4535                 spin_lock(&pic->lock);
4536                 memcpy(&pic->pics[1], &chip->chip.pic,
4537                         sizeof(struct kvm_pic_state));
4538                 spin_unlock(&pic->lock);
4539                 break;
4540         case KVM_IRQCHIP_IOAPIC:
4541                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
4542                 break;
4543         default:
4544                 r = -EINVAL;
4545                 break;
4546         }
4547         kvm_pic_update_irq(pic);
4548         return r;
4549 }
4550
4551 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4552 {
4553         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
4554
4555         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
4556
4557         mutex_lock(&kps->lock);
4558         memcpy(ps, &kps->channels, sizeof(*ps));
4559         mutex_unlock(&kps->lock);
4560         return 0;
4561 }
4562
4563 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4564 {
4565         int i;
4566         struct kvm_pit *pit = kvm->arch.vpit;
4567
4568         mutex_lock(&pit->pit_state.lock);
4569         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
4570         for (i = 0; i < 3; i++)
4571                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
4572         mutex_unlock(&pit->pit_state.lock);
4573         return 0;
4574 }
4575
4576 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4577 {
4578         mutex_lock(&kvm->arch.vpit->pit_state.lock);
4579         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
4580                 sizeof(ps->channels));
4581         ps->flags = kvm->arch.vpit->pit_state.flags;
4582         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
4583         memset(&ps->reserved, 0, sizeof(ps->reserved));
4584         return 0;
4585 }
4586
4587 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4588 {
4589         int start = 0;
4590         int i;
4591         u32 prev_legacy, cur_legacy;
4592         struct kvm_pit *pit = kvm->arch.vpit;
4593
4594         mutex_lock(&pit->pit_state.lock);
4595         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
4596         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
4597         if (!prev_legacy && cur_legacy)
4598                 start = 1;
4599         memcpy(&pit->pit_state.channels, &ps->channels,
4600                sizeof(pit->pit_state.channels));
4601         pit->pit_state.flags = ps->flags;
4602         for (i = 0; i < 3; i++)
4603                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
4604                                    start && i == 0);
4605         mutex_unlock(&pit->pit_state.lock);
4606         return 0;
4607 }
4608
4609 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
4610                                  struct kvm_reinject_control *control)
4611 {
4612         struct kvm_pit *pit = kvm->arch.vpit;
4613
4614         if (!pit)
4615                 return -ENXIO;
4616
4617         /* pit->pit_state.lock was overloaded to prevent userspace from getting
4618          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
4619          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
4620          */
4621         mutex_lock(&pit->pit_state.lock);
4622         kvm_pit_set_reinject(pit, control->pit_reinject);
4623         mutex_unlock(&pit->pit_state.lock);
4624
4625         return 0;
4626 }
4627
4628 /**
4629  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
4630  * @kvm: kvm instance
4631  * @log: slot id and address to which we copy the log
4632  *
4633  * Steps 1-4 below provide general overview of dirty page logging. See
4634  * kvm_get_dirty_log_protect() function description for additional details.
4635  *
4636  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
4637  * always flush the TLB (step 4) even if previous step failed  and the dirty
4638  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
4639  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
4640  * writes will be marked dirty for next log read.
4641  *
4642  *   1. Take a snapshot of the bit and clear it if needed.
4643  *   2. Write protect the corresponding page.
4644  *   3. Copy the snapshot to the userspace.
4645  *   4. Flush TLB's if needed.
4646  */
4647 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
4648 {
4649         bool flush = false;
4650         int r;
4651
4652         mutex_lock(&kvm->slots_lock);
4653
4654         /*
4655          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4656          */
4657         if (kvm_x86_ops->flush_log_dirty)
4658                 kvm_x86_ops->flush_log_dirty(kvm);
4659
4660         r = kvm_get_dirty_log_protect(kvm, log, &flush);
4661
4662         /*
4663          * All the TLBs can be flushed out of mmu lock, see the comments in
4664          * kvm_mmu_slot_remove_write_access().
4665          */
4666         lockdep_assert_held(&kvm->slots_lock);
4667         if (flush)
4668                 kvm_flush_remote_tlbs(kvm);
4669
4670         mutex_unlock(&kvm->slots_lock);
4671         return r;
4672 }
4673
4674 int kvm_vm_ioctl_clear_dirty_log(struct kvm *kvm, struct kvm_clear_dirty_log *log)
4675 {
4676         bool flush = false;
4677         int r;
4678
4679         mutex_lock(&kvm->slots_lock);
4680
4681         /*
4682          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4683          */
4684         if (kvm_x86_ops->flush_log_dirty)
4685                 kvm_x86_ops->flush_log_dirty(kvm);
4686
4687         r = kvm_clear_dirty_log_protect(kvm, log, &flush);
4688
4689         /*
4690          * All the TLBs can be flushed out of mmu lock, see the comments in
4691          * kvm_mmu_slot_remove_write_access().
4692          */
4693         lockdep_assert_held(&kvm->slots_lock);
4694         if (flush)
4695                 kvm_flush_remote_tlbs(kvm);
4696
4697         mutex_unlock(&kvm->slots_lock);
4698         return r;
4699 }
4700
4701 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
4702                         bool line_status)
4703 {
4704         if (!irqchip_in_kernel(kvm))
4705                 return -ENXIO;
4706
4707         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
4708                                         irq_event->irq, irq_event->level,
4709                                         line_status);
4710         return 0;
4711 }
4712
4713 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
4714                             struct kvm_enable_cap *cap)
4715 {
4716         int r;
4717
4718         if (cap->flags)
4719                 return -EINVAL;
4720
4721         switch (cap->cap) {
4722         case KVM_CAP_DISABLE_QUIRKS:
4723                 kvm->arch.disabled_quirks = cap->args[0];
4724                 r = 0;
4725                 break;
4726         case KVM_CAP_SPLIT_IRQCHIP: {
4727                 mutex_lock(&kvm->lock);
4728                 r = -EINVAL;
4729                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
4730                         goto split_irqchip_unlock;
4731                 r = -EEXIST;
4732                 if (irqchip_in_kernel(kvm))
4733                         goto split_irqchip_unlock;
4734                 if (kvm->created_vcpus)
4735                         goto split_irqchip_unlock;
4736                 r = kvm_setup_empty_irq_routing(kvm);
4737                 if (r)
4738                         goto split_irqchip_unlock;
4739                 /* Pairs with irqchip_in_kernel. */
4740                 smp_wmb();
4741                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
4742                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
4743                 r = 0;
4744 split_irqchip_unlock:
4745                 mutex_unlock(&kvm->lock);
4746                 break;
4747         }
4748         case KVM_CAP_X2APIC_API:
4749                 r = -EINVAL;
4750                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
4751                         break;
4752
4753                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
4754                         kvm->arch.x2apic_format = true;
4755                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
4756                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
4757
4758                 r = 0;
4759                 break;
4760         case KVM_CAP_X86_DISABLE_EXITS:
4761                 r = -EINVAL;
4762                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
4763                         break;
4764
4765                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
4766                         kvm_can_mwait_in_guest())
4767                         kvm->arch.mwait_in_guest = true;
4768                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
4769                         kvm->arch.hlt_in_guest = true;
4770                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
4771                         kvm->arch.pause_in_guest = true;
4772                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
4773                         kvm->arch.cstate_in_guest = true;
4774                 r = 0;
4775                 break;
4776         case KVM_CAP_MSR_PLATFORM_INFO:
4777                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
4778                 r = 0;
4779                 break;
4780         case KVM_CAP_EXCEPTION_PAYLOAD:
4781                 kvm->arch.exception_payload_enabled = cap->args[0];
4782                 r = 0;
4783                 break;
4784         default:
4785                 r = -EINVAL;
4786                 break;
4787         }
4788         return r;
4789 }
4790
4791 long kvm_arch_vm_ioctl(struct file *filp,
4792                        unsigned int ioctl, unsigned long arg)
4793 {
4794         struct kvm *kvm = filp->private_data;
4795         void __user *argp = (void __user *)arg;
4796         int r = -ENOTTY;
4797         /*
4798          * This union makes it completely explicit to gcc-3.x
4799          * that these two variables' stack usage should be
4800          * combined, not added together.
4801          */
4802         union {
4803                 struct kvm_pit_state ps;
4804                 struct kvm_pit_state2 ps2;
4805                 struct kvm_pit_config pit_config;
4806         } u;
4807
4808         switch (ioctl) {
4809         case KVM_SET_TSS_ADDR:
4810                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
4811                 break;
4812         case KVM_SET_IDENTITY_MAP_ADDR: {
4813                 u64 ident_addr;
4814
4815                 mutex_lock(&kvm->lock);
4816                 r = -EINVAL;
4817                 if (kvm->created_vcpus)
4818                         goto set_identity_unlock;
4819                 r = -EFAULT;
4820                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
4821                         goto set_identity_unlock;
4822                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
4823 set_identity_unlock:
4824                 mutex_unlock(&kvm->lock);
4825                 break;
4826         }
4827         case KVM_SET_NR_MMU_PAGES:
4828                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
4829                 break;
4830         case KVM_GET_NR_MMU_PAGES:
4831                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
4832                 break;
4833         case KVM_CREATE_IRQCHIP: {
4834                 mutex_lock(&kvm->lock);
4835
4836                 r = -EEXIST;
4837                 if (irqchip_in_kernel(kvm))
4838                         goto create_irqchip_unlock;
4839
4840                 r = -EINVAL;
4841                 if (kvm->created_vcpus)
4842                         goto create_irqchip_unlock;
4843
4844                 r = kvm_pic_init(kvm);
4845                 if (r)
4846                         goto create_irqchip_unlock;
4847
4848                 r = kvm_ioapic_init(kvm);
4849                 if (r) {
4850                         kvm_pic_destroy(kvm);
4851                         goto create_irqchip_unlock;
4852                 }
4853
4854                 r = kvm_setup_default_irq_routing(kvm);
4855                 if (r) {
4856                         kvm_ioapic_destroy(kvm);
4857                         kvm_pic_destroy(kvm);
4858                         goto create_irqchip_unlock;
4859                 }
4860                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4861                 smp_wmb();
4862                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
4863         create_irqchip_unlock:
4864                 mutex_unlock(&kvm->lock);
4865                 break;
4866         }
4867         case KVM_CREATE_PIT:
4868                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
4869                 goto create_pit;
4870         case KVM_CREATE_PIT2:
4871                 r = -EFAULT;
4872                 if (copy_from_user(&u.pit_config, argp,
4873                                    sizeof(struct kvm_pit_config)))
4874                         goto out;
4875         create_pit:
4876                 mutex_lock(&kvm->lock);
4877                 r = -EEXIST;
4878                 if (kvm->arch.vpit)
4879                         goto create_pit_unlock;
4880                 r = -ENOMEM;
4881                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
4882                 if (kvm->arch.vpit)
4883                         r = 0;
4884         create_pit_unlock:
4885                 mutex_unlock(&kvm->lock);
4886                 break;
4887         case KVM_GET_IRQCHIP: {
4888                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4889                 struct kvm_irqchip *chip;
4890
4891                 chip = memdup_user(argp, sizeof(*chip));
4892                 if (IS_ERR(chip)) {
4893                         r = PTR_ERR(chip);
4894                         goto out;
4895                 }
4896
4897                 r = -ENXIO;
4898                 if (!irqchip_kernel(kvm))
4899                         goto get_irqchip_out;
4900                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
4901                 if (r)
4902                         goto get_irqchip_out;
4903                 r = -EFAULT;
4904                 if (copy_to_user(argp, chip, sizeof(*chip)))
4905                         goto get_irqchip_out;
4906                 r = 0;
4907         get_irqchip_out:
4908                 kfree(chip);
4909                 break;
4910         }
4911         case KVM_SET_IRQCHIP: {
4912                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4913                 struct kvm_irqchip *chip;
4914
4915                 chip = memdup_user(argp, sizeof(*chip));
4916                 if (IS_ERR(chip)) {
4917                         r = PTR_ERR(chip);
4918                         goto out;
4919                 }
4920
4921                 r = -ENXIO;
4922                 if (!irqchip_kernel(kvm))
4923                         goto set_irqchip_out;
4924                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
4925                 if (r)
4926                         goto set_irqchip_out;
4927                 r = 0;
4928         set_irqchip_out:
4929                 kfree(chip);
4930                 break;
4931         }
4932         case KVM_GET_PIT: {
4933                 r = -EFAULT;
4934                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
4935                         goto out;
4936                 r = -ENXIO;
4937                 if (!kvm->arch.vpit)
4938                         goto out;
4939                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
4940                 if (r)
4941                         goto out;
4942                 r = -EFAULT;
4943                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
4944                         goto out;
4945                 r = 0;
4946                 break;
4947         }
4948         case KVM_SET_PIT: {
4949                 r = -EFAULT;
4950                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
4951                         goto out;
4952                 r = -ENXIO;
4953                 if (!kvm->arch.vpit)
4954                         goto out;
4955                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
4956                 break;
4957         }
4958         case KVM_GET_PIT2: {
4959                 r = -ENXIO;
4960                 if (!kvm->arch.vpit)
4961                         goto out;
4962                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
4963                 if (r)
4964                         goto out;
4965                 r = -EFAULT;
4966                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
4967                         goto out;
4968                 r = 0;
4969                 break;
4970         }
4971         case KVM_SET_PIT2: {
4972                 r = -EFAULT;
4973                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
4974                         goto out;
4975                 r = -ENXIO;
4976                 if (!kvm->arch.vpit)
4977                         goto out;
4978                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
4979                 break;
4980         }
4981         case KVM_REINJECT_CONTROL: {
4982                 struct kvm_reinject_control control;
4983                 r =  -EFAULT;
4984                 if (copy_from_user(&control, argp, sizeof(control)))
4985                         goto out;
4986                 r = kvm_vm_ioctl_reinject(kvm, &control);
4987                 break;
4988         }
4989         case KVM_SET_BOOT_CPU_ID:
4990                 r = 0;
4991                 mutex_lock(&kvm->lock);
4992                 if (kvm->created_vcpus)
4993                         r = -EBUSY;
4994                 else
4995                         kvm->arch.bsp_vcpu_id = arg;
4996                 mutex_unlock(&kvm->lock);
4997                 break;
4998         case KVM_XEN_HVM_CONFIG: {
4999                 struct kvm_xen_hvm_config xhc;
5000                 r = -EFAULT;
5001                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
5002                         goto out;
5003                 r = -EINVAL;
5004                 if (xhc.flags)
5005                         goto out;
5006                 memcpy(&kvm->arch.xen_hvm_config, &xhc, sizeof(xhc));
5007                 r = 0;
5008                 break;
5009         }
5010         case KVM_SET_CLOCK: {
5011                 struct kvm_clock_data user_ns;
5012                 u64 now_ns;
5013
5014                 r = -EFAULT;
5015                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
5016                         goto out;
5017
5018                 r = -EINVAL;
5019                 if (user_ns.flags)
5020                         goto out;
5021
5022                 r = 0;
5023                 /*
5024                  * TODO: userspace has to take care of races with VCPU_RUN, so
5025                  * kvm_gen_update_masterclock() can be cut down to locked
5026                  * pvclock_update_vm_gtod_copy().
5027                  */
5028                 kvm_gen_update_masterclock(kvm);
5029                 now_ns = get_kvmclock_ns(kvm);
5030                 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
5031                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
5032                 break;
5033         }
5034         case KVM_GET_CLOCK: {
5035                 struct kvm_clock_data user_ns;
5036                 u64 now_ns;
5037
5038                 now_ns = get_kvmclock_ns(kvm);
5039                 user_ns.clock = now_ns;
5040                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
5041                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
5042
5043                 r = -EFAULT;
5044                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
5045                         goto out;
5046                 r = 0;
5047                 break;
5048         }
5049         case KVM_MEMORY_ENCRYPT_OP: {
5050                 r = -ENOTTY;
5051                 if (kvm_x86_ops->mem_enc_op)
5052                         r = kvm_x86_ops->mem_enc_op(kvm, argp);
5053                 break;
5054         }
5055         case KVM_MEMORY_ENCRYPT_REG_REGION: {
5056                 struct kvm_enc_region region;
5057
5058                 r = -EFAULT;
5059                 if (copy_from_user(&region, argp, sizeof(region)))
5060                         goto out;
5061
5062                 r = -ENOTTY;
5063                 if (kvm_x86_ops->mem_enc_reg_region)
5064                         r = kvm_x86_ops->mem_enc_reg_region(kvm, &region);
5065                 break;
5066         }
5067         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
5068                 struct kvm_enc_region region;
5069
5070                 r = -EFAULT;
5071                 if (copy_from_user(&region, argp, sizeof(region)))
5072                         goto out;
5073
5074                 r = -ENOTTY;
5075                 if (kvm_x86_ops->mem_enc_unreg_region)
5076                         r = kvm_x86_ops->mem_enc_unreg_region(kvm, &region);
5077                 break;
5078         }
5079         case KVM_HYPERV_EVENTFD: {
5080                 struct kvm_hyperv_eventfd hvevfd;
5081
5082                 r = -EFAULT;
5083                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
5084                         goto out;
5085                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
5086                 break;
5087         }
5088         case KVM_SET_PMU_EVENT_FILTER:
5089                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
5090                 break;
5091         default:
5092                 r = -ENOTTY;
5093         }
5094 out:
5095         return r;
5096 }
5097
5098 static void kvm_init_msr_list(void)
5099 {
5100         u32 dummy[2];
5101         unsigned i, j;
5102
5103         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
5104                          "Please update the fixed PMCs in msrs_to_save[]");
5105         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_GENERIC != 32,
5106                          "Please update the generic perfctr/eventsel MSRs in msrs_to_save[]");
5107
5108         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
5109                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
5110                         continue;
5111
5112                 /*
5113                  * Even MSRs that are valid in the host may not be exposed
5114                  * to the guests in some cases.
5115                  */
5116                 switch (msrs_to_save[i]) {
5117                 case MSR_IA32_BNDCFGS:
5118                         if (!kvm_mpx_supported())
5119                                 continue;
5120                         break;
5121                 case MSR_TSC_AUX:
5122                         if (!kvm_x86_ops->rdtscp_supported())
5123                                 continue;
5124                         break;
5125                 case MSR_IA32_RTIT_CTL:
5126                 case MSR_IA32_RTIT_STATUS:
5127                         if (!kvm_x86_ops->pt_supported())
5128                                 continue;
5129                         break;
5130                 case MSR_IA32_RTIT_CR3_MATCH:
5131                         if (!kvm_x86_ops->pt_supported() ||
5132                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
5133                                 continue;
5134                         break;
5135                 case MSR_IA32_RTIT_OUTPUT_BASE:
5136                 case MSR_IA32_RTIT_OUTPUT_MASK:
5137                         if (!kvm_x86_ops->pt_supported() ||
5138                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
5139                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
5140                                 continue;
5141                         break;
5142                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B: {
5143                         if (!kvm_x86_ops->pt_supported() ||
5144                                 msrs_to_save[i] - MSR_IA32_RTIT_ADDR0_A >=
5145                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
5146                                 continue;
5147                         break;
5148                 }
5149                 default:
5150                         break;
5151                 }
5152
5153                 if (j < i)
5154                         msrs_to_save[j] = msrs_to_save[i];
5155                 j++;
5156         }
5157         num_msrs_to_save = j;
5158
5159         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
5160                 if (!kvm_x86_ops->has_emulated_msr(emulated_msrs[i]))
5161                         continue;
5162
5163                 if (j < i)
5164                         emulated_msrs[j] = emulated_msrs[i];
5165                 j++;
5166         }
5167         num_emulated_msrs = j;
5168
5169         for (i = j = 0; i < ARRAY_SIZE(msr_based_features); i++) {
5170                 struct kvm_msr_entry msr;
5171
5172                 msr.index = msr_based_features[i];
5173                 if (kvm_get_msr_feature(&msr))
5174                         continue;
5175
5176                 if (j < i)
5177                         msr_based_features[j] = msr_based_features[i];
5178                 j++;
5179         }
5180         num_msr_based_features = j;
5181 }
5182
5183 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
5184                            const void *v)
5185 {
5186         int handled = 0;
5187         int n;
5188
5189         do {
5190                 n = min(len, 8);
5191                 if (!(lapic_in_kernel(vcpu) &&
5192                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
5193                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
5194                         break;
5195                 handled += n;
5196                 addr += n;
5197                 len -= n;
5198                 v += n;
5199         } while (len);
5200
5201         return handled;
5202 }
5203
5204 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
5205 {
5206         int handled = 0;
5207         int n;
5208
5209         do {
5210                 n = min(len, 8);
5211                 if (!(lapic_in_kernel(vcpu) &&
5212                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
5213                                          addr, n, v))
5214                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
5215                         break;
5216                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
5217                 handled += n;
5218                 addr += n;
5219                 len -= n;
5220                 v += n;
5221         } while (len);
5222
5223         return handled;
5224 }
5225
5226 static void kvm_set_segment(struct kvm_vcpu *vcpu,
5227                         struct kvm_segment *var, int seg)
5228 {
5229         kvm_x86_ops->set_segment(vcpu, var, seg);
5230 }
5231
5232 void kvm_get_segment(struct kvm_vcpu *vcpu,
5233                      struct kvm_segment *var, int seg)
5234 {
5235         kvm_x86_ops->get_segment(vcpu, var, seg);
5236 }
5237
5238 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
5239                            struct x86_exception *exception)
5240 {
5241         gpa_t t_gpa;
5242
5243         BUG_ON(!mmu_is_nested(vcpu));
5244
5245         /* NPT walks are always user-walks */
5246         access |= PFERR_USER_MASK;
5247         t_gpa  = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
5248
5249         return t_gpa;
5250 }
5251
5252 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
5253                               struct x86_exception *exception)
5254 {
5255         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5256         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5257 }
5258
5259  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
5260                                 struct x86_exception *exception)
5261 {
5262         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5263         access |= PFERR_FETCH_MASK;
5264         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5265 }
5266
5267 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
5268                                struct x86_exception *exception)
5269 {
5270         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5271         access |= PFERR_WRITE_MASK;
5272         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5273 }
5274
5275 /* uses this to access any guest's mapped memory without checking CPL */
5276 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
5277                                 struct x86_exception *exception)
5278 {
5279         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
5280 }
5281
5282 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
5283                                       struct kvm_vcpu *vcpu, u32 access,
5284                                       struct x86_exception *exception)
5285 {
5286         void *data = val;
5287         int r = X86EMUL_CONTINUE;
5288
5289         while (bytes) {
5290                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
5291                                                             exception);
5292                 unsigned offset = addr & (PAGE_SIZE-1);
5293                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
5294                 int ret;
5295
5296                 if (gpa == UNMAPPED_GVA)
5297                         return X86EMUL_PROPAGATE_FAULT;
5298                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
5299                                                offset, toread);
5300                 if (ret < 0) {
5301                         r = X86EMUL_IO_NEEDED;
5302                         goto out;
5303                 }
5304
5305                 bytes -= toread;
5306                 data += toread;
5307                 addr += toread;
5308         }
5309 out:
5310         return r;
5311 }
5312
5313 /* used for instruction fetching */
5314 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
5315                                 gva_t addr, void *val, unsigned int bytes,
5316                                 struct x86_exception *exception)
5317 {
5318         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5319         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5320         unsigned offset;
5321         int ret;
5322
5323         /* Inline kvm_read_guest_virt_helper for speed.  */
5324         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
5325                                                     exception);
5326         if (unlikely(gpa == UNMAPPED_GVA))
5327                 return X86EMUL_PROPAGATE_FAULT;
5328
5329         offset = addr & (PAGE_SIZE-1);
5330         if (WARN_ON(offset + bytes > PAGE_SIZE))
5331                 bytes = (unsigned)PAGE_SIZE - offset;
5332         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
5333                                        offset, bytes);
5334         if (unlikely(ret < 0))
5335                 return X86EMUL_IO_NEEDED;
5336
5337         return X86EMUL_CONTINUE;
5338 }
5339
5340 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
5341                                gva_t addr, void *val, unsigned int bytes,
5342                                struct x86_exception *exception)
5343 {
5344         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5345
5346         /*
5347          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
5348          * is returned, but our callers are not ready for that and they blindly
5349          * call kvm_inject_page_fault.  Ensure that they at least do not leak
5350          * uninitialized kernel stack memory into cr2 and error code.
5351          */
5352         memset(exception, 0, sizeof(*exception));
5353         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
5354                                           exception);
5355 }
5356 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
5357
5358 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
5359                              gva_t addr, void *val, unsigned int bytes,
5360                              struct x86_exception *exception, bool system)
5361 {
5362         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5363         u32 access = 0;
5364
5365         if (!system && kvm_x86_ops->get_cpl(vcpu) == 3)
5366                 access |= PFERR_USER_MASK;
5367
5368         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
5369 }
5370
5371 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
5372                 unsigned long addr, void *val, unsigned int bytes)
5373 {
5374         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5375         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
5376
5377         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
5378 }
5379
5380 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
5381                                       struct kvm_vcpu *vcpu, u32 access,
5382                                       struct x86_exception *exception)
5383 {
5384         void *data = val;
5385         int r = X86EMUL_CONTINUE;
5386
5387         while (bytes) {
5388                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
5389                                                              access,
5390                                                              exception);
5391                 unsigned offset = addr & (PAGE_SIZE-1);
5392                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
5393                 int ret;
5394
5395                 if (gpa == UNMAPPED_GVA)
5396                         return X86EMUL_PROPAGATE_FAULT;
5397                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
5398                 if (ret < 0) {
5399                         r = X86EMUL_IO_NEEDED;
5400                         goto out;
5401                 }
5402
5403                 bytes -= towrite;
5404                 data += towrite;
5405                 addr += towrite;
5406         }
5407 out:
5408         return r;
5409 }
5410
5411 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
5412                               unsigned int bytes, struct x86_exception *exception,
5413                               bool system)
5414 {
5415         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5416         u32 access = PFERR_WRITE_MASK;
5417
5418         if (!system && kvm_x86_ops->get_cpl(vcpu) == 3)
5419                 access |= PFERR_USER_MASK;
5420
5421         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
5422                                            access, exception);
5423 }
5424
5425 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
5426                                 unsigned int bytes, struct x86_exception *exception)
5427 {
5428         /* kvm_write_guest_virt_system can pull in tons of pages. */
5429         vcpu->arch.l1tf_flush_l1d = true;
5430
5431         /*
5432          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
5433          * is returned, but our callers are not ready for that and they blindly
5434          * call kvm_inject_page_fault.  Ensure that they at least do not leak
5435          * uninitialized kernel stack memory into cr2 and error code.
5436          */
5437         memset(exception, 0, sizeof(*exception));
5438         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
5439                                            PFERR_WRITE_MASK, exception);
5440 }
5441 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
5442
5443 int handle_ud(struct kvm_vcpu *vcpu)
5444 {
5445         int emul_type = EMULTYPE_TRAP_UD;
5446         char sig[5]; /* ud2; .ascii "kvm" */
5447         struct x86_exception e;
5448
5449         if (force_emulation_prefix &&
5450             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
5451                                 sig, sizeof(sig), &e) == 0 &&
5452             memcmp(sig, "\xf\xbkvm", sizeof(sig)) == 0) {
5453                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
5454                 emul_type = EMULTYPE_TRAP_UD_FORCED;
5455         }
5456
5457         return kvm_emulate_instruction(vcpu, emul_type);
5458 }
5459 EXPORT_SYMBOL_GPL(handle_ud);
5460
5461 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
5462                             gpa_t gpa, bool write)
5463 {
5464         /* For APIC access vmexit */
5465         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
5466                 return 1;
5467
5468         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
5469                 trace_vcpu_match_mmio(gva, gpa, write, true);
5470                 return 1;
5471         }
5472
5473         return 0;
5474 }
5475
5476 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
5477                                 gpa_t *gpa, struct x86_exception *exception,
5478                                 bool write)
5479 {
5480         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
5481                 | (write ? PFERR_WRITE_MASK : 0);
5482
5483         /*
5484          * currently PKRU is only applied to ept enabled guest so
5485          * there is no pkey in EPT page table for L1 guest or EPT
5486          * shadow page table for L2 guest.
5487          */
5488         if (vcpu_match_mmio_gva(vcpu, gva)
5489             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
5490                                  vcpu->arch.mmio_access, 0, access)) {
5491                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
5492                                         (gva & (PAGE_SIZE - 1));
5493                 trace_vcpu_match_mmio(gva, *gpa, write, false);
5494                 return 1;
5495         }
5496
5497         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5498
5499         if (*gpa == UNMAPPED_GVA)
5500                 return -1;
5501
5502         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
5503 }
5504
5505 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
5506                         const void *val, int bytes)
5507 {
5508         int ret;
5509
5510         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
5511         if (ret < 0)
5512                 return 0;
5513         kvm_page_track_write(vcpu, gpa, val, bytes);
5514         return 1;
5515 }
5516
5517 struct read_write_emulator_ops {
5518         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
5519                                   int bytes);
5520         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
5521                                   void *val, int bytes);
5522         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
5523                                int bytes, void *val);
5524         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
5525                                     void *val, int bytes);
5526         bool write;
5527 };
5528
5529 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
5530 {
5531         if (vcpu->mmio_read_completed) {
5532                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
5533                                vcpu->mmio_fragments[0].gpa, val);
5534                 vcpu->mmio_read_completed = 0;
5535                 return 1;
5536         }
5537
5538         return 0;
5539 }
5540
5541 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
5542                         void *val, int bytes)
5543 {
5544         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
5545 }
5546
5547 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
5548                          void *val, int bytes)
5549 {
5550         return emulator_write_phys(vcpu, gpa, val, bytes);
5551 }
5552
5553 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
5554 {
5555         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
5556         return vcpu_mmio_write(vcpu, gpa, bytes, val);
5557 }
5558
5559 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
5560                           void *val, int bytes)
5561 {
5562         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
5563         return X86EMUL_IO_NEEDED;
5564 }
5565
5566 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
5567                            void *val, int bytes)
5568 {
5569         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
5570
5571         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
5572         return X86EMUL_CONTINUE;
5573 }
5574
5575 static const struct read_write_emulator_ops read_emultor = {
5576         .read_write_prepare = read_prepare,
5577         .read_write_emulate = read_emulate,
5578         .read_write_mmio = vcpu_mmio_read,
5579         .read_write_exit_mmio = read_exit_mmio,
5580 };
5581
5582 static const struct read_write_emulator_ops write_emultor = {
5583         .read_write_emulate = write_emulate,
5584         .read_write_mmio = write_mmio,
5585         .read_write_exit_mmio = write_exit_mmio,
5586         .write = true,
5587 };
5588
5589 static int emulator_read_write_onepage(unsigned long addr, void *val,
5590                                        unsigned int bytes,
5591                                        struct x86_exception *exception,
5592                                        struct kvm_vcpu *vcpu,
5593                                        const struct read_write_emulator_ops *ops)
5594 {
5595         gpa_t gpa;
5596         int handled, ret;
5597         bool write = ops->write;
5598         struct kvm_mmio_fragment *frag;
5599         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5600
5601         /*
5602          * If the exit was due to a NPF we may already have a GPA.
5603          * If the GPA is present, use it to avoid the GVA to GPA table walk.
5604          * Note, this cannot be used on string operations since string
5605          * operation using rep will only have the initial GPA from the NPF
5606          * occurred.
5607          */
5608         if (vcpu->arch.gpa_available &&
5609             emulator_can_use_gpa(ctxt) &&
5610             (addr & ~PAGE_MASK) == (vcpu->arch.gpa_val & ~PAGE_MASK)) {
5611                 gpa = vcpu->arch.gpa_val;
5612                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
5613         } else {
5614                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
5615                 if (ret < 0)
5616                         return X86EMUL_PROPAGATE_FAULT;
5617         }
5618
5619         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
5620                 return X86EMUL_CONTINUE;
5621
5622         /*
5623          * Is this MMIO handled locally?
5624          */
5625         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
5626         if (handled == bytes)
5627                 return X86EMUL_CONTINUE;
5628
5629         gpa += handled;
5630         bytes -= handled;
5631         val += handled;
5632
5633         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
5634         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
5635         frag->gpa = gpa;
5636         frag->data = val;
5637         frag->len = bytes;
5638         return X86EMUL_CONTINUE;
5639 }
5640
5641 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
5642                         unsigned long addr,
5643                         void *val, unsigned int bytes,
5644                         struct x86_exception *exception,
5645                         const struct read_write_emulator_ops *ops)
5646 {
5647         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5648         gpa_t gpa;
5649         int rc;
5650
5651         if (ops->read_write_prepare &&
5652                   ops->read_write_prepare(vcpu, val, bytes))
5653                 return X86EMUL_CONTINUE;
5654
5655         vcpu->mmio_nr_fragments = 0;
5656
5657         /* Crossing a page boundary? */
5658         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
5659                 int now;
5660
5661                 now = -addr & ~PAGE_MASK;
5662                 rc = emulator_read_write_onepage(addr, val, now, exception,
5663                                                  vcpu, ops);
5664
5665                 if (rc != X86EMUL_CONTINUE)
5666                         return rc;
5667                 addr += now;
5668                 if (ctxt->mode != X86EMUL_MODE_PROT64)
5669                         addr = (u32)addr;
5670                 val += now;
5671                 bytes -= now;
5672         }
5673
5674         rc = emulator_read_write_onepage(addr, val, bytes, exception,
5675                                          vcpu, ops);
5676         if (rc != X86EMUL_CONTINUE)
5677                 return rc;
5678
5679         if (!vcpu->mmio_nr_fragments)
5680                 return rc;
5681
5682         gpa = vcpu->mmio_fragments[0].gpa;
5683
5684         vcpu->mmio_needed = 1;
5685         vcpu->mmio_cur_fragment = 0;
5686
5687         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
5688         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
5689         vcpu->run->exit_reason = KVM_EXIT_MMIO;
5690         vcpu->run->mmio.phys_addr = gpa;
5691
5692         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
5693 }
5694
5695 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
5696                                   unsigned long addr,
5697                                   void *val,
5698                                   unsigned int bytes,
5699                                   struct x86_exception *exception)
5700 {
5701         return emulator_read_write(ctxt, addr, val, bytes,
5702                                    exception, &read_emultor);
5703 }
5704
5705 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
5706                             unsigned long addr,
5707                             const void *val,
5708                             unsigned int bytes,
5709                             struct x86_exception *exception)
5710 {
5711         return emulator_read_write(ctxt, addr, (void *)val, bytes,
5712                                    exception, &write_emultor);
5713 }
5714
5715 #define CMPXCHG_TYPE(t, ptr, old, new) \
5716         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
5717
5718 #ifdef CONFIG_X86_64
5719 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
5720 #else
5721 #  define CMPXCHG64(ptr, old, new) \
5722         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
5723 #endif
5724
5725 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
5726                                      unsigned long addr,
5727                                      const void *old,
5728                                      const void *new,
5729                                      unsigned int bytes,
5730                                      struct x86_exception *exception)
5731 {
5732         struct kvm_host_map map;
5733         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5734         gpa_t gpa;
5735         char *kaddr;
5736         bool exchanged;
5737
5738         /* guests cmpxchg8b have to be emulated atomically */
5739         if (bytes > 8 || (bytes & (bytes - 1)))
5740                 goto emul_write;
5741
5742         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
5743
5744         if (gpa == UNMAPPED_GVA ||
5745             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
5746                 goto emul_write;
5747
5748         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
5749                 goto emul_write;
5750
5751         if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
5752                 goto emul_write;
5753
5754         kaddr = map.hva + offset_in_page(gpa);
5755
5756         switch (bytes) {
5757         case 1:
5758                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
5759                 break;
5760         case 2:
5761                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
5762                 break;
5763         case 4:
5764                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
5765                 break;
5766         case 8:
5767                 exchanged = CMPXCHG64(kaddr, old, new);
5768                 break;
5769         default:
5770                 BUG();
5771         }
5772
5773         kvm_vcpu_unmap(vcpu, &map, true);
5774
5775         if (!exchanged)
5776                 return X86EMUL_CMPXCHG_FAILED;
5777
5778         kvm_page_track_write(vcpu, gpa, new, bytes);
5779
5780         return X86EMUL_CONTINUE;
5781
5782 emul_write:
5783         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
5784
5785         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
5786 }
5787
5788 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
5789 {
5790         int r = 0, i;
5791
5792         for (i = 0; i < vcpu->arch.pio.count; i++) {
5793                 if (vcpu->arch.pio.in)
5794                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
5795                                             vcpu->arch.pio.size, pd);
5796                 else
5797                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
5798                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
5799                                              pd);
5800                 if (r)
5801                         break;
5802                 pd += vcpu->arch.pio.size;
5803         }
5804         return r;
5805 }
5806
5807 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
5808                                unsigned short port, void *val,
5809                                unsigned int count, bool in)
5810 {
5811         vcpu->arch.pio.port = port;
5812         vcpu->arch.pio.in = in;
5813         vcpu->arch.pio.count  = count;
5814         vcpu->arch.pio.size = size;
5815
5816         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
5817                 vcpu->arch.pio.count = 0;
5818                 return 1;
5819         }
5820
5821         vcpu->run->exit_reason = KVM_EXIT_IO;
5822         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
5823         vcpu->run->io.size = size;
5824         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
5825         vcpu->run->io.count = count;
5826         vcpu->run->io.port = port;
5827
5828         return 0;
5829 }
5830
5831 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
5832                                     int size, unsigned short port, void *val,
5833                                     unsigned int count)
5834 {
5835         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5836         int ret;
5837
5838         if (vcpu->arch.pio.count)
5839                 goto data_avail;
5840
5841         memset(vcpu->arch.pio_data, 0, size * count);
5842
5843         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
5844         if (ret) {
5845 data_avail:
5846                 memcpy(val, vcpu->arch.pio_data, size * count);
5847                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
5848                 vcpu->arch.pio.count = 0;
5849                 return 1;
5850         }
5851
5852         return 0;
5853 }
5854
5855 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
5856                                      int size, unsigned short port,
5857                                      const void *val, unsigned int count)
5858 {
5859         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5860
5861         memcpy(vcpu->arch.pio_data, val, size * count);
5862         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
5863         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
5864 }
5865
5866 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
5867 {
5868         return kvm_x86_ops->get_segment_base(vcpu, seg);
5869 }
5870
5871 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
5872 {
5873         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
5874 }
5875
5876 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
5877 {
5878         if (!need_emulate_wbinvd(vcpu))
5879                 return X86EMUL_CONTINUE;
5880
5881         if (kvm_x86_ops->has_wbinvd_exit()) {
5882                 int cpu = get_cpu();
5883
5884                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
5885                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
5886                                 wbinvd_ipi, NULL, 1);
5887                 put_cpu();
5888                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
5889         } else
5890                 wbinvd();
5891         return X86EMUL_CONTINUE;
5892 }
5893
5894 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
5895 {
5896         kvm_emulate_wbinvd_noskip(vcpu);
5897         return kvm_skip_emulated_instruction(vcpu);
5898 }
5899 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
5900
5901
5902
5903 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
5904 {
5905         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
5906 }
5907
5908 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
5909                            unsigned long *dest)
5910 {
5911         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
5912 }
5913
5914 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
5915                            unsigned long value)
5916 {
5917
5918         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
5919 }
5920
5921 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
5922 {
5923         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
5924 }
5925
5926 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
5927 {
5928         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5929         unsigned long value;
5930
5931         switch (cr) {
5932         case 0:
5933                 value = kvm_read_cr0(vcpu);
5934                 break;
5935         case 2:
5936                 value = vcpu->arch.cr2;
5937                 break;
5938         case 3:
5939                 value = kvm_read_cr3(vcpu);
5940                 break;
5941         case 4:
5942                 value = kvm_read_cr4(vcpu);
5943                 break;
5944         case 8:
5945                 value = kvm_get_cr8(vcpu);
5946                 break;
5947         default:
5948                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5949                 return 0;
5950         }
5951
5952         return value;
5953 }
5954
5955 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
5956 {
5957         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5958         int res = 0;
5959
5960         switch (cr) {
5961         case 0:
5962                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
5963                 break;
5964         case 2:
5965                 vcpu->arch.cr2 = val;
5966                 break;
5967         case 3:
5968                 res = kvm_set_cr3(vcpu, val);
5969                 break;
5970         case 4:
5971                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
5972                 break;
5973         case 8:
5974                 res = kvm_set_cr8(vcpu, val);
5975                 break;
5976         default:
5977                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5978                 res = -1;
5979         }
5980
5981         return res;
5982 }
5983
5984 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
5985 {
5986         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
5987 }
5988
5989 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5990 {
5991         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
5992 }
5993
5994 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5995 {
5996         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
5997 }
5998
5999 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6000 {
6001         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
6002 }
6003
6004 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6005 {
6006         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
6007 }
6008
6009 static unsigned long emulator_get_cached_segment_base(
6010         struct x86_emulate_ctxt *ctxt, int seg)
6011 {
6012         return get_segment_base(emul_to_vcpu(ctxt), seg);
6013 }
6014
6015 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
6016                                  struct desc_struct *desc, u32 *base3,
6017                                  int seg)
6018 {
6019         struct kvm_segment var;
6020
6021         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
6022         *selector = var.selector;
6023
6024         if (var.unusable) {
6025                 memset(desc, 0, sizeof(*desc));
6026                 if (base3)
6027                         *base3 = 0;
6028                 return false;
6029         }
6030
6031         if (var.g)
6032                 var.limit >>= 12;
6033         set_desc_limit(desc, var.limit);
6034         set_desc_base(desc, (unsigned long)var.base);
6035 #ifdef CONFIG_X86_64
6036         if (base3)
6037                 *base3 = var.base >> 32;
6038 #endif
6039         desc->type = var.type;
6040         desc->s = var.s;
6041         desc->dpl = var.dpl;
6042         desc->p = var.present;
6043         desc->avl = var.avl;
6044         desc->l = var.l;
6045         desc->d = var.db;
6046         desc->g = var.g;
6047
6048         return true;
6049 }
6050
6051 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
6052                                  struct desc_struct *desc, u32 base3,
6053                                  int seg)
6054 {
6055         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6056         struct kvm_segment var;
6057
6058         var.selector = selector;
6059         var.base = get_desc_base(desc);
6060 #ifdef CONFIG_X86_64
6061         var.base |= ((u64)base3) << 32;
6062 #endif
6063         var.limit = get_desc_limit(desc);
6064         if (desc->g)
6065                 var.limit = (var.limit << 12) | 0xfff;
6066         var.type = desc->type;
6067         var.dpl = desc->dpl;
6068         var.db = desc->d;
6069         var.s = desc->s;
6070         var.l = desc->l;
6071         var.g = desc->g;
6072         var.avl = desc->avl;
6073         var.present = desc->p;
6074         var.unusable = !var.present;
6075         var.padding = 0;
6076
6077         kvm_set_segment(vcpu, &var, seg);
6078         return;
6079 }
6080
6081 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
6082                             u32 msr_index, u64 *pdata)
6083 {
6084         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
6085 }
6086
6087 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
6088                             u32 msr_index, u64 data)
6089 {
6090         return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
6091 }
6092
6093 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
6094 {
6095         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6096
6097         return vcpu->arch.smbase;
6098 }
6099
6100 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
6101 {
6102         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6103
6104         vcpu->arch.smbase = smbase;
6105 }
6106
6107 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
6108                               u32 pmc)
6109 {
6110         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
6111 }
6112
6113 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
6114                              u32 pmc, u64 *pdata)
6115 {
6116         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
6117 }
6118
6119 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
6120 {
6121         emul_to_vcpu(ctxt)->arch.halt_request = 1;
6122 }
6123
6124 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
6125                               struct x86_instruction_info *info,
6126                               enum x86_intercept_stage stage)
6127 {
6128         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
6129 }
6130
6131 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
6132                         u32 *eax, u32 *ebx, u32 *ecx, u32 *edx, bool check_limit)
6133 {
6134         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, check_limit);
6135 }
6136
6137 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
6138 {
6139         return kvm_register_read(emul_to_vcpu(ctxt), reg);
6140 }
6141
6142 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
6143 {
6144         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
6145 }
6146
6147 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
6148 {
6149         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
6150 }
6151
6152 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
6153 {
6154         return emul_to_vcpu(ctxt)->arch.hflags;
6155 }
6156
6157 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
6158 {
6159         emul_to_vcpu(ctxt)->arch.hflags = emul_flags;
6160 }
6161
6162 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt,
6163                                   const char *smstate)
6164 {
6165         return kvm_x86_ops->pre_leave_smm(emul_to_vcpu(ctxt), smstate);
6166 }
6167
6168 static void emulator_post_leave_smm(struct x86_emulate_ctxt *ctxt)
6169 {
6170         kvm_smm_changed(emul_to_vcpu(ctxt));
6171 }
6172
6173 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
6174 {
6175         return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
6176 }
6177
6178 static const struct x86_emulate_ops emulate_ops = {
6179         .read_gpr            = emulator_read_gpr,
6180         .write_gpr           = emulator_write_gpr,
6181         .read_std            = emulator_read_std,
6182         .write_std           = emulator_write_std,
6183         .read_phys           = kvm_read_guest_phys_system,
6184         .fetch               = kvm_fetch_guest_virt,
6185         .read_emulated       = emulator_read_emulated,
6186         .write_emulated      = emulator_write_emulated,
6187         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
6188         .invlpg              = emulator_invlpg,
6189         .pio_in_emulated     = emulator_pio_in_emulated,
6190         .pio_out_emulated    = emulator_pio_out_emulated,
6191         .get_segment         = emulator_get_segment,
6192         .set_segment         = emulator_set_segment,
6193         .get_cached_segment_base = emulator_get_cached_segment_base,
6194         .get_gdt             = emulator_get_gdt,
6195         .get_idt             = emulator_get_idt,
6196         .set_gdt             = emulator_set_gdt,
6197         .set_idt             = emulator_set_idt,
6198         .get_cr              = emulator_get_cr,
6199         .set_cr              = emulator_set_cr,
6200         .cpl                 = emulator_get_cpl,
6201         .get_dr              = emulator_get_dr,
6202         .set_dr              = emulator_set_dr,
6203         .get_smbase          = emulator_get_smbase,
6204         .set_smbase          = emulator_set_smbase,
6205         .set_msr             = emulator_set_msr,
6206         .get_msr             = emulator_get_msr,
6207         .check_pmc           = emulator_check_pmc,
6208         .read_pmc            = emulator_read_pmc,
6209         .halt                = emulator_halt,
6210         .wbinvd              = emulator_wbinvd,
6211         .fix_hypercall       = emulator_fix_hypercall,
6212         .intercept           = emulator_intercept,
6213         .get_cpuid           = emulator_get_cpuid,
6214         .set_nmi_mask        = emulator_set_nmi_mask,
6215         .get_hflags          = emulator_get_hflags,
6216         .set_hflags          = emulator_set_hflags,
6217         .pre_leave_smm       = emulator_pre_leave_smm,
6218         .post_leave_smm      = emulator_post_leave_smm,
6219         .set_xcr             = emulator_set_xcr,
6220 };
6221
6222 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
6223 {
6224         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
6225         /*
6226          * an sti; sti; sequence only disable interrupts for the first
6227          * instruction. So, if the last instruction, be it emulated or
6228          * not, left the system with the INT_STI flag enabled, it
6229          * means that the last instruction is an sti. We should not
6230          * leave the flag on in this case. The same goes for mov ss
6231          */
6232         if (int_shadow & mask)
6233                 mask = 0;
6234         if (unlikely(int_shadow || mask)) {
6235                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
6236                 if (!mask)
6237                         kvm_make_request(KVM_REQ_EVENT, vcpu);
6238         }
6239 }
6240
6241 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
6242 {
6243         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6244         if (ctxt->exception.vector == PF_VECTOR)
6245                 return kvm_propagate_fault(vcpu, &ctxt->exception);
6246
6247         if (ctxt->exception.error_code_valid)
6248                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
6249                                       ctxt->exception.error_code);
6250         else
6251                 kvm_queue_exception(vcpu, ctxt->exception.vector);
6252         return false;
6253 }
6254
6255 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
6256 {
6257         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6258         int cs_db, cs_l;
6259
6260         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
6261
6262         ctxt->eflags = kvm_get_rflags(vcpu);
6263         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
6264
6265         ctxt->eip = kvm_rip_read(vcpu);
6266         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
6267                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
6268                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
6269                      cs_db                              ? X86EMUL_MODE_PROT32 :
6270                                                           X86EMUL_MODE_PROT16;
6271         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
6272         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
6273         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
6274
6275         init_decode_cache(ctxt);
6276         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
6277 }
6278
6279 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
6280 {
6281         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6282         int ret;
6283
6284         init_emulate_ctxt(vcpu);
6285
6286         ctxt->op_bytes = 2;
6287         ctxt->ad_bytes = 2;
6288         ctxt->_eip = ctxt->eip + inc_eip;
6289         ret = emulate_int_real(ctxt, irq);
6290
6291         if (ret != X86EMUL_CONTINUE) {
6292                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
6293         } else {
6294                 ctxt->eip = ctxt->_eip;
6295                 kvm_rip_write(vcpu, ctxt->eip);
6296                 kvm_set_rflags(vcpu, ctxt->eflags);
6297         }
6298 }
6299 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
6300
6301 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
6302 {
6303         ++vcpu->stat.insn_emulation_fail;
6304         trace_kvm_emulate_insn_failed(vcpu);
6305
6306         if (emulation_type & EMULTYPE_VMWARE_GP) {
6307                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
6308                 return 1;
6309         }
6310
6311         if (emulation_type & EMULTYPE_SKIP) {
6312                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
6313                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
6314                 vcpu->run->internal.ndata = 0;
6315                 return 0;
6316         }
6317
6318         kvm_queue_exception(vcpu, UD_VECTOR);
6319
6320         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
6321                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
6322                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
6323                 vcpu->run->internal.ndata = 0;
6324                 return 0;
6325         }
6326
6327         return 1;
6328 }
6329
6330 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
6331                                   bool write_fault_to_shadow_pgtable,
6332                                   int emulation_type)
6333 {
6334         gpa_t gpa = cr2;
6335         kvm_pfn_t pfn;
6336
6337         if (!(emulation_type & EMULTYPE_ALLOW_RETRY))
6338                 return false;
6339
6340         if (WARN_ON_ONCE(is_guest_mode(vcpu)))
6341                 return false;
6342
6343         if (!vcpu->arch.mmu->direct_map) {
6344                 /*
6345                  * Write permission should be allowed since only
6346                  * write access need to be emulated.
6347                  */
6348                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
6349
6350                 /*
6351                  * If the mapping is invalid in guest, let cpu retry
6352                  * it to generate fault.
6353                  */
6354                 if (gpa == UNMAPPED_GVA)
6355                         return true;
6356         }
6357
6358         /*
6359          * Do not retry the unhandleable instruction if it faults on the
6360          * readonly host memory, otherwise it will goto a infinite loop:
6361          * retry instruction -> write #PF -> emulation fail -> retry
6362          * instruction -> ...
6363          */
6364         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
6365
6366         /*
6367          * If the instruction failed on the error pfn, it can not be fixed,
6368          * report the error to userspace.
6369          */
6370         if (is_error_noslot_pfn(pfn))
6371                 return false;
6372
6373         kvm_release_pfn_clean(pfn);
6374
6375         /* The instructions are well-emulated on direct mmu. */
6376         if (vcpu->arch.mmu->direct_map) {
6377                 unsigned int indirect_shadow_pages;
6378
6379                 spin_lock(&vcpu->kvm->mmu_lock);
6380                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
6381                 spin_unlock(&vcpu->kvm->mmu_lock);
6382
6383                 if (indirect_shadow_pages)
6384                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6385
6386                 return true;
6387         }
6388
6389         /*
6390          * if emulation was due to access to shadowed page table
6391          * and it failed try to unshadow page and re-enter the
6392          * guest to let CPU execute the instruction.
6393          */
6394         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6395
6396         /*
6397          * If the access faults on its page table, it can not
6398          * be fixed by unprotecting shadow page and it should
6399          * be reported to userspace.
6400          */
6401         return !write_fault_to_shadow_pgtable;
6402 }
6403
6404 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
6405                               unsigned long cr2,  int emulation_type)
6406 {
6407         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6408         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
6409
6410         last_retry_eip = vcpu->arch.last_retry_eip;
6411         last_retry_addr = vcpu->arch.last_retry_addr;
6412
6413         /*
6414          * If the emulation is caused by #PF and it is non-page_table
6415          * writing instruction, it means the VM-EXIT is caused by shadow
6416          * page protected, we can zap the shadow page and retry this
6417          * instruction directly.
6418          *
6419          * Note: if the guest uses a non-page-table modifying instruction
6420          * on the PDE that points to the instruction, then we will unmap
6421          * the instruction and go to an infinite loop. So, we cache the
6422          * last retried eip and the last fault address, if we meet the eip
6423          * and the address again, we can break out of the potential infinite
6424          * loop.
6425          */
6426         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
6427
6428         if (!(emulation_type & EMULTYPE_ALLOW_RETRY))
6429                 return false;
6430
6431         if (WARN_ON_ONCE(is_guest_mode(vcpu)))
6432                 return false;
6433
6434         if (x86_page_table_writing_insn(ctxt))
6435                 return false;
6436
6437         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
6438                 return false;
6439
6440         vcpu->arch.last_retry_eip = ctxt->eip;
6441         vcpu->arch.last_retry_addr = cr2;
6442
6443         if (!vcpu->arch.mmu->direct_map)
6444                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
6445
6446         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6447
6448         return true;
6449 }
6450
6451 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
6452 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
6453
6454 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
6455 {
6456         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
6457                 /* This is a good place to trace that we are exiting SMM.  */
6458                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
6459
6460                 /* Process a latched INIT or SMI, if any.  */
6461                 kvm_make_request(KVM_REQ_EVENT, vcpu);
6462         }
6463
6464         kvm_mmu_reset_context(vcpu);
6465 }
6466
6467 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
6468                                 unsigned long *db)
6469 {
6470         u32 dr6 = 0;
6471         int i;
6472         u32 enable, rwlen;
6473
6474         enable = dr7;
6475         rwlen = dr7 >> 16;
6476         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
6477                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
6478                         dr6 |= (1 << i);
6479         return dr6;
6480 }
6481
6482 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
6483 {
6484         struct kvm_run *kvm_run = vcpu->run;
6485
6486         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
6487                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 | DR6_RTM;
6488                 kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
6489                 kvm_run->debug.arch.exception = DB_VECTOR;
6490                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
6491                 return 0;
6492         }
6493         kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
6494         return 1;
6495 }
6496
6497 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
6498 {
6499         unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
6500         int r;
6501
6502         r = kvm_x86_ops->skip_emulated_instruction(vcpu);
6503         if (unlikely(!r))
6504                 return 0;
6505
6506         /*
6507          * rflags is the old, "raw" value of the flags.  The new value has
6508          * not been saved yet.
6509          *
6510          * This is correct even for TF set by the guest, because "the
6511          * processor will not generate this exception after the instruction
6512          * that sets the TF flag".
6513          */
6514         if (unlikely(rflags & X86_EFLAGS_TF))
6515                 r = kvm_vcpu_do_singlestep(vcpu);
6516         return r;
6517 }
6518 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
6519
6520 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
6521 {
6522         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
6523             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
6524                 struct kvm_run *kvm_run = vcpu->run;
6525                 unsigned long eip = kvm_get_linear_rip(vcpu);
6526                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
6527                                            vcpu->arch.guest_debug_dr7,
6528                                            vcpu->arch.eff_db);
6529
6530                 if (dr6 != 0) {
6531                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
6532                         kvm_run->debug.arch.pc = eip;
6533                         kvm_run->debug.arch.exception = DB_VECTOR;
6534                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
6535                         *r = 0;
6536                         return true;
6537                 }
6538         }
6539
6540         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
6541             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
6542                 unsigned long eip = kvm_get_linear_rip(vcpu);
6543                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
6544                                            vcpu->arch.dr7,
6545                                            vcpu->arch.db);
6546
6547                 if (dr6 != 0) {
6548                         vcpu->arch.dr6 &= ~DR_TRAP_BITS;
6549                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
6550                         kvm_queue_exception(vcpu, DB_VECTOR);
6551                         *r = 1;
6552                         return true;
6553                 }
6554         }
6555
6556         return false;
6557 }
6558
6559 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
6560 {
6561         switch (ctxt->opcode_len) {
6562         case 1:
6563                 switch (ctxt->b) {
6564                 case 0xe4:      /* IN */
6565                 case 0xe5:
6566                 case 0xec:
6567                 case 0xed:
6568                 case 0xe6:      /* OUT */
6569                 case 0xe7:
6570                 case 0xee:
6571                 case 0xef:
6572                 case 0x6c:      /* INS */
6573                 case 0x6d:
6574                 case 0x6e:      /* OUTS */
6575                 case 0x6f:
6576                         return true;
6577                 }
6578                 break;
6579         case 2:
6580                 switch (ctxt->b) {
6581                 case 0x33:      /* RDPMC */
6582                         return true;
6583                 }
6584                 break;
6585         }
6586
6587         return false;
6588 }
6589
6590 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
6591                             unsigned long cr2,
6592                             int emulation_type,
6593                             void *insn,
6594                             int insn_len)
6595 {
6596         int r;
6597         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6598         bool writeback = true;
6599         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
6600
6601         vcpu->arch.l1tf_flush_l1d = true;
6602
6603         /*
6604          * Clear write_fault_to_shadow_pgtable here to ensure it is
6605          * never reused.
6606          */
6607         vcpu->arch.write_fault_to_shadow_pgtable = false;
6608         kvm_clear_exception_queue(vcpu);
6609
6610         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
6611                 init_emulate_ctxt(vcpu);
6612
6613                 /*
6614                  * We will reenter on the same instruction since
6615                  * we do not set complete_userspace_io.  This does not
6616                  * handle watchpoints yet, those would be handled in
6617                  * the emulate_ops.
6618                  */
6619                 if (!(emulation_type & EMULTYPE_SKIP) &&
6620                     kvm_vcpu_check_breakpoint(vcpu, &r))
6621                         return r;
6622
6623                 ctxt->interruptibility = 0;
6624                 ctxt->have_exception = false;
6625                 ctxt->exception.vector = -1;
6626                 ctxt->perm_ok = false;
6627
6628                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
6629
6630                 r = x86_decode_insn(ctxt, insn, insn_len);
6631
6632                 trace_kvm_emulate_insn_start(vcpu);
6633                 ++vcpu->stat.insn_emulation;
6634                 if (r != EMULATION_OK)  {
6635                         if ((emulation_type & EMULTYPE_TRAP_UD) ||
6636                             (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
6637                                 kvm_queue_exception(vcpu, UD_VECTOR);
6638                                 return 1;
6639                         }
6640                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
6641                                                 emulation_type))
6642                                 return 1;
6643                         if (ctxt->have_exception) {
6644                                 /*
6645                                  * #UD should result in just EMULATION_FAILED, and trap-like
6646                                  * exception should not be encountered during decode.
6647                                  */
6648                                 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
6649                                              exception_type(ctxt->exception.vector) == EXCPT_TRAP);
6650                                 inject_emulated_exception(vcpu);
6651                                 return 1;
6652                         }
6653                         return handle_emulation_failure(vcpu, emulation_type);
6654                 }
6655         }
6656
6657         if ((emulation_type & EMULTYPE_VMWARE_GP) &&
6658             !is_vmware_backdoor_opcode(ctxt)) {
6659                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
6660                 return 1;
6661         }
6662
6663         /*
6664          * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
6665          * for kvm_skip_emulated_instruction().  The caller is responsible for
6666          * updating interruptibility state and injecting single-step #DBs.
6667          */
6668         if (emulation_type & EMULTYPE_SKIP) {
6669                 kvm_rip_write(vcpu, ctxt->_eip);
6670                 if (ctxt->eflags & X86_EFLAGS_RF)
6671                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
6672                 return 1;
6673         }
6674
6675         if (retry_instruction(ctxt, cr2, emulation_type))
6676                 return 1;
6677
6678         /* this is needed for vmware backdoor interface to work since it
6679            changes registers values  during IO operation */
6680         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
6681                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
6682                 emulator_invalidate_register_cache(ctxt);
6683         }
6684
6685 restart:
6686         /* Save the faulting GPA (cr2) in the address field */
6687         ctxt->exception.address = cr2;
6688
6689         r = x86_emulate_insn(ctxt);
6690
6691         if (r == EMULATION_INTERCEPTED)
6692                 return 1;
6693
6694         if (r == EMULATION_FAILED) {
6695                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
6696                                         emulation_type))
6697                         return 1;
6698
6699                 return handle_emulation_failure(vcpu, emulation_type);
6700         }
6701
6702         if (ctxt->have_exception) {
6703                 r = 1;
6704                 if (inject_emulated_exception(vcpu))
6705                         return r;
6706         } else if (vcpu->arch.pio.count) {
6707                 if (!vcpu->arch.pio.in) {
6708                         /* FIXME: return into emulator if single-stepping.  */
6709                         vcpu->arch.pio.count = 0;
6710                 } else {
6711                         writeback = false;
6712                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
6713                 }
6714                 r = 0;
6715         } else if (vcpu->mmio_needed) {
6716                 ++vcpu->stat.mmio_exits;
6717
6718                 if (!vcpu->mmio_is_write)
6719                         writeback = false;
6720                 r = 0;
6721                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6722         } else if (r == EMULATION_RESTART)
6723                 goto restart;
6724         else
6725                 r = 1;
6726
6727         if (writeback) {
6728                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
6729                 toggle_interruptibility(vcpu, ctxt->interruptibility);
6730                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6731                 if (!ctxt->have_exception ||
6732                     exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
6733                         kvm_rip_write(vcpu, ctxt->eip);
6734                         if (r && ctxt->tf)
6735                                 r = kvm_vcpu_do_singlestep(vcpu);
6736                         __kvm_set_rflags(vcpu, ctxt->eflags);
6737                 }
6738
6739                 /*
6740                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
6741                  * do nothing, and it will be requested again as soon as
6742                  * the shadow expires.  But we still need to check here,
6743                  * because POPF has no interrupt shadow.
6744                  */
6745                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
6746                         kvm_make_request(KVM_REQ_EVENT, vcpu);
6747         } else
6748                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
6749
6750         return r;
6751 }
6752
6753 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
6754 {
6755         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
6756 }
6757 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
6758
6759 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
6760                                         void *insn, int insn_len)
6761 {
6762         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
6763 }
6764 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
6765
6766 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
6767 {
6768         vcpu->arch.pio.count = 0;
6769         return 1;
6770 }
6771
6772 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
6773 {
6774         vcpu->arch.pio.count = 0;
6775
6776         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
6777                 return 1;
6778
6779         return kvm_skip_emulated_instruction(vcpu);
6780 }
6781
6782 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
6783                             unsigned short port)
6784 {
6785         unsigned long val = kvm_rax_read(vcpu);
6786         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
6787                                             size, port, &val, 1);
6788         if (ret)
6789                 return ret;
6790
6791         /*
6792          * Workaround userspace that relies on old KVM behavior of %rip being
6793          * incremented prior to exiting to userspace to handle "OUT 0x7e".
6794          */
6795         if (port == 0x7e &&
6796             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
6797                 vcpu->arch.complete_userspace_io =
6798                         complete_fast_pio_out_port_0x7e;
6799                 kvm_skip_emulated_instruction(vcpu);
6800         } else {
6801                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
6802                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
6803         }
6804         return 0;
6805 }
6806
6807 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
6808 {
6809         unsigned long val;
6810
6811         /* We should only ever be called with arch.pio.count equal to 1 */
6812         BUG_ON(vcpu->arch.pio.count != 1);
6813
6814         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
6815                 vcpu->arch.pio.count = 0;
6816                 return 1;
6817         }
6818
6819         /* For size less than 4 we merge, else we zero extend */
6820         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
6821
6822         /*
6823          * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
6824          * the copy and tracing
6825          */
6826         emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, vcpu->arch.pio.size,
6827                                  vcpu->arch.pio.port, &val, 1);
6828         kvm_rax_write(vcpu, val);
6829
6830         return kvm_skip_emulated_instruction(vcpu);
6831 }
6832
6833 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
6834                            unsigned short port)
6835 {
6836         unsigned long val;
6837         int ret;
6838
6839         /* For size less than 4 we merge, else we zero extend */
6840         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
6841
6842         ret = emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, size, port,
6843                                        &val, 1);
6844         if (ret) {
6845                 kvm_rax_write(vcpu, val);
6846                 return ret;
6847         }
6848
6849         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
6850         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
6851
6852         return 0;
6853 }
6854
6855 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
6856 {
6857         int ret;
6858
6859         if (in)
6860                 ret = kvm_fast_pio_in(vcpu, size, port);
6861         else
6862                 ret = kvm_fast_pio_out(vcpu, size, port);
6863         return ret && kvm_skip_emulated_instruction(vcpu);
6864 }
6865 EXPORT_SYMBOL_GPL(kvm_fast_pio);
6866
6867 static int kvmclock_cpu_down_prep(unsigned int cpu)
6868 {
6869         __this_cpu_write(cpu_tsc_khz, 0);
6870         return 0;
6871 }
6872
6873 static void tsc_khz_changed(void *data)
6874 {
6875         struct cpufreq_freqs *freq = data;
6876         unsigned long khz = 0;
6877
6878         if (data)
6879                 khz = freq->new;
6880         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6881                 khz = cpufreq_quick_get(raw_smp_processor_id());
6882         if (!khz)
6883                 khz = tsc_khz;
6884         __this_cpu_write(cpu_tsc_khz, khz);
6885 }
6886
6887 #ifdef CONFIG_X86_64
6888 static void kvm_hyperv_tsc_notifier(void)
6889 {
6890         struct kvm *kvm;
6891         struct kvm_vcpu *vcpu;
6892         int cpu;
6893
6894         mutex_lock(&kvm_lock);
6895         list_for_each_entry(kvm, &vm_list, vm_list)
6896                 kvm_make_mclock_inprogress_request(kvm);
6897
6898         hyperv_stop_tsc_emulation();
6899
6900         /* TSC frequency always matches when on Hyper-V */
6901         for_each_present_cpu(cpu)
6902                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
6903         kvm_max_guest_tsc_khz = tsc_khz;
6904
6905         list_for_each_entry(kvm, &vm_list, vm_list) {
6906                 struct kvm_arch *ka = &kvm->arch;
6907
6908                 spin_lock(&ka->pvclock_gtod_sync_lock);
6909
6910                 pvclock_update_vm_gtod_copy(kvm);
6911
6912                 kvm_for_each_vcpu(cpu, vcpu, kvm)
6913                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6914
6915                 kvm_for_each_vcpu(cpu, vcpu, kvm)
6916                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
6917
6918                 spin_unlock(&ka->pvclock_gtod_sync_lock);
6919         }
6920         mutex_unlock(&kvm_lock);
6921 }
6922 #endif
6923
6924 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
6925 {
6926         struct kvm *kvm;
6927         struct kvm_vcpu *vcpu;
6928         int i, send_ipi = 0;
6929
6930         /*
6931          * We allow guests to temporarily run on slowing clocks,
6932          * provided we notify them after, or to run on accelerating
6933          * clocks, provided we notify them before.  Thus time never
6934          * goes backwards.
6935          *
6936          * However, we have a problem.  We can't atomically update
6937          * the frequency of a given CPU from this function; it is
6938          * merely a notifier, which can be called from any CPU.
6939          * Changing the TSC frequency at arbitrary points in time
6940          * requires a recomputation of local variables related to
6941          * the TSC for each VCPU.  We must flag these local variables
6942          * to be updated and be sure the update takes place with the
6943          * new frequency before any guests proceed.
6944          *
6945          * Unfortunately, the combination of hotplug CPU and frequency
6946          * change creates an intractable locking scenario; the order
6947          * of when these callouts happen is undefined with respect to
6948          * CPU hotplug, and they can race with each other.  As such,
6949          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
6950          * undefined; you can actually have a CPU frequency change take
6951          * place in between the computation of X and the setting of the
6952          * variable.  To protect against this problem, all updates of
6953          * the per_cpu tsc_khz variable are done in an interrupt
6954          * protected IPI, and all callers wishing to update the value
6955          * must wait for a synchronous IPI to complete (which is trivial
6956          * if the caller is on the CPU already).  This establishes the
6957          * necessary total order on variable updates.
6958          *
6959          * Note that because a guest time update may take place
6960          * anytime after the setting of the VCPU's request bit, the
6961          * correct TSC value must be set before the request.  However,
6962          * to ensure the update actually makes it to any guest which
6963          * starts running in hardware virtualization between the set
6964          * and the acquisition of the spinlock, we must also ping the
6965          * CPU after setting the request bit.
6966          *
6967          */
6968
6969         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
6970
6971         mutex_lock(&kvm_lock);
6972         list_for_each_entry(kvm, &vm_list, vm_list) {
6973                 kvm_for_each_vcpu(i, vcpu, kvm) {
6974                         if (vcpu->cpu != cpu)
6975                                 continue;
6976                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6977                         if (vcpu->cpu != raw_smp_processor_id())
6978                                 send_ipi = 1;
6979                 }
6980         }
6981         mutex_unlock(&kvm_lock);
6982
6983         if (freq->old < freq->new && send_ipi) {
6984                 /*
6985                  * We upscale the frequency.  Must make the guest
6986                  * doesn't see old kvmclock values while running with
6987                  * the new frequency, otherwise we risk the guest sees
6988                  * time go backwards.
6989                  *
6990                  * In case we update the frequency for another cpu
6991                  * (which might be in guest context) send an interrupt
6992                  * to kick the cpu out of guest context.  Next time
6993                  * guest context is entered kvmclock will be updated,
6994                  * so the guest will not see stale values.
6995                  */
6996                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
6997         }
6998 }
6999
7000 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
7001                                      void *data)
7002 {
7003         struct cpufreq_freqs *freq = data;
7004         int cpu;
7005
7006         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
7007                 return 0;
7008         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
7009                 return 0;
7010
7011         for_each_cpu(cpu, freq->policy->cpus)
7012                 __kvmclock_cpufreq_notifier(freq, cpu);
7013
7014         return 0;
7015 }
7016
7017 static struct notifier_block kvmclock_cpufreq_notifier_block = {
7018         .notifier_call  = kvmclock_cpufreq_notifier
7019 };
7020
7021 static int kvmclock_cpu_online(unsigned int cpu)
7022 {
7023         tsc_khz_changed(NULL);
7024         return 0;
7025 }
7026
7027 static void kvm_timer_init(void)
7028 {
7029         max_tsc_khz = tsc_khz;
7030
7031         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
7032 #ifdef CONFIG_CPU_FREQ
7033                 struct cpufreq_policy policy;
7034                 int cpu;
7035
7036                 memset(&policy, 0, sizeof(policy));
7037                 cpu = get_cpu();
7038                 cpufreq_get_policy(&policy, cpu);
7039                 if (policy.cpuinfo.max_freq)
7040                         max_tsc_khz = policy.cpuinfo.max_freq;
7041                 put_cpu();
7042 #endif
7043                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
7044                                           CPUFREQ_TRANSITION_NOTIFIER);
7045         }
7046
7047         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
7048                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
7049 }
7050
7051 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
7052 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
7053
7054 int kvm_is_in_guest(void)
7055 {
7056         return __this_cpu_read(current_vcpu) != NULL;
7057 }
7058
7059 static int kvm_is_user_mode(void)
7060 {
7061         int user_mode = 3;
7062
7063         if (__this_cpu_read(current_vcpu))
7064                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
7065
7066         return user_mode != 0;
7067 }
7068
7069 static unsigned long kvm_get_guest_ip(void)
7070 {
7071         unsigned long ip = 0;
7072
7073         if (__this_cpu_read(current_vcpu))
7074                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
7075
7076         return ip;
7077 }
7078
7079 static void kvm_handle_intel_pt_intr(void)
7080 {
7081         struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
7082
7083         kvm_make_request(KVM_REQ_PMI, vcpu);
7084         __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
7085                         (unsigned long *)&vcpu->arch.pmu.global_status);
7086 }
7087
7088 static struct perf_guest_info_callbacks kvm_guest_cbs = {
7089         .is_in_guest            = kvm_is_in_guest,
7090         .is_user_mode           = kvm_is_user_mode,
7091         .get_guest_ip           = kvm_get_guest_ip,
7092         .handle_intel_pt_intr   = kvm_handle_intel_pt_intr,
7093 };
7094
7095 #ifdef CONFIG_X86_64
7096 static void pvclock_gtod_update_fn(struct work_struct *work)
7097 {
7098         struct kvm *kvm;
7099
7100         struct kvm_vcpu *vcpu;
7101         int i;
7102
7103         mutex_lock(&kvm_lock);
7104         list_for_each_entry(kvm, &vm_list, vm_list)
7105                 kvm_for_each_vcpu(i, vcpu, kvm)
7106                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7107         atomic_set(&kvm_guest_has_master_clock, 0);
7108         mutex_unlock(&kvm_lock);
7109 }
7110
7111 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
7112
7113 /*
7114  * Notification about pvclock gtod data update.
7115  */
7116 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
7117                                void *priv)
7118 {
7119         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
7120         struct timekeeper *tk = priv;
7121
7122         update_pvclock_gtod(tk);
7123
7124         /* disable master clock if host does not trust, or does not
7125          * use, TSC based clocksource.
7126          */
7127         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
7128             atomic_read(&kvm_guest_has_master_clock) != 0)
7129                 queue_work(system_long_wq, &pvclock_gtod_work);
7130
7131         return 0;
7132 }
7133
7134 static struct notifier_block pvclock_gtod_notifier = {
7135         .notifier_call = pvclock_gtod_notify,
7136 };
7137 #endif
7138
7139 int kvm_arch_init(void *opaque)
7140 {
7141         int r;
7142         struct kvm_x86_ops *ops = opaque;
7143
7144         if (kvm_x86_ops) {
7145                 printk(KERN_ERR "kvm: already loaded the other module\n");
7146                 r = -EEXIST;
7147                 goto out;
7148         }
7149
7150         if (!ops->cpu_has_kvm_support()) {
7151                 printk(KERN_ERR "kvm: no hardware support\n");
7152                 r = -EOPNOTSUPP;
7153                 goto out;
7154         }
7155         if (ops->disabled_by_bios()) {
7156                 printk(KERN_ERR "kvm: disabled by bios\n");
7157                 r = -EOPNOTSUPP;
7158                 goto out;
7159         }
7160
7161         /*
7162          * KVM explicitly assumes that the guest has an FPU and
7163          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
7164          * vCPU's FPU state as a fxregs_state struct.
7165          */
7166         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
7167                 printk(KERN_ERR "kvm: inadequate fpu\n");
7168                 r = -EOPNOTSUPP;
7169                 goto out;
7170         }
7171
7172         r = -ENOMEM;
7173         x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
7174                                           __alignof__(struct fpu), SLAB_ACCOUNT,
7175                                           NULL);
7176         if (!x86_fpu_cache) {
7177                 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
7178                 goto out;
7179         }
7180
7181         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
7182         if (!shared_msrs) {
7183                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
7184                 goto out_free_x86_fpu_cache;
7185         }
7186
7187         r = kvm_mmu_module_init();
7188         if (r)
7189                 goto out_free_percpu;
7190
7191         kvm_x86_ops = ops;
7192
7193         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
7194                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
7195                         PT_PRESENT_MASK, 0, sme_me_mask);
7196         kvm_timer_init();
7197
7198         perf_register_guest_info_callbacks(&kvm_guest_cbs);
7199
7200         if (boot_cpu_has(X86_FEATURE_XSAVE))
7201                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
7202
7203         kvm_lapic_init();
7204         if (pi_inject_timer == -1)
7205                 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
7206 #ifdef CONFIG_X86_64
7207         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
7208
7209         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
7210                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
7211 #endif
7212
7213         return 0;
7214
7215 out_free_percpu:
7216         free_percpu(shared_msrs);
7217 out_free_x86_fpu_cache:
7218         kmem_cache_destroy(x86_fpu_cache);
7219 out:
7220         return r;
7221 }
7222
7223 void kvm_arch_exit(void)
7224 {
7225 #ifdef CONFIG_X86_64
7226         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
7227                 clear_hv_tscchange_cb();
7228 #endif
7229         kvm_lapic_exit();
7230         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
7231
7232         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
7233                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
7234                                             CPUFREQ_TRANSITION_NOTIFIER);
7235         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
7236 #ifdef CONFIG_X86_64
7237         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
7238 #endif
7239         kvm_x86_ops = NULL;
7240         kvm_mmu_module_exit();
7241         free_percpu(shared_msrs);
7242         kmem_cache_destroy(x86_fpu_cache);
7243 }
7244
7245 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
7246 {
7247         ++vcpu->stat.halt_exits;
7248         if (lapic_in_kernel(vcpu)) {
7249                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
7250                 return 1;
7251         } else {
7252                 vcpu->run->exit_reason = KVM_EXIT_HLT;
7253                 return 0;
7254         }
7255 }
7256 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
7257
7258 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
7259 {
7260         int ret = kvm_skip_emulated_instruction(vcpu);
7261         /*
7262          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
7263          * KVM_EXIT_DEBUG here.
7264          */
7265         return kvm_vcpu_halt(vcpu) && ret;
7266 }
7267 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
7268
7269 #ifdef CONFIG_X86_64
7270 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
7271                                 unsigned long clock_type)
7272 {
7273         struct kvm_clock_pairing clock_pairing;
7274         struct timespec64 ts;
7275         u64 cycle;
7276         int ret;
7277
7278         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
7279                 return -KVM_EOPNOTSUPP;
7280
7281         if (kvm_get_walltime_and_clockread(&ts, &cycle) == false)
7282                 return -KVM_EOPNOTSUPP;
7283
7284         clock_pairing.sec = ts.tv_sec;
7285         clock_pairing.nsec = ts.tv_nsec;
7286         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
7287         clock_pairing.flags = 0;
7288         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
7289
7290         ret = 0;
7291         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
7292                             sizeof(struct kvm_clock_pairing)))
7293                 ret = -KVM_EFAULT;
7294
7295         return ret;
7296 }
7297 #endif
7298
7299 /*
7300  * kvm_pv_kick_cpu_op:  Kick a vcpu.
7301  *
7302  * @apicid - apicid of vcpu to be kicked.
7303  */
7304 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
7305 {
7306         struct kvm_lapic_irq lapic_irq;
7307
7308         lapic_irq.shorthand = 0;
7309         lapic_irq.dest_mode = 0;
7310         lapic_irq.level = 0;
7311         lapic_irq.dest_id = apicid;
7312         lapic_irq.msi_redir_hint = false;
7313
7314         lapic_irq.delivery_mode = APIC_DM_REMRD;
7315         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
7316 }
7317
7318 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
7319 {
7320         if (!lapic_in_kernel(vcpu)) {
7321                 WARN_ON_ONCE(vcpu->arch.apicv_active);
7322                 return;
7323         }
7324         if (!vcpu->arch.apicv_active)
7325                 return;
7326
7327         vcpu->arch.apicv_active = false;
7328         kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
7329 }
7330
7331 static void kvm_sched_yield(struct kvm *kvm, unsigned long dest_id)
7332 {
7333         struct kvm_vcpu *target = NULL;
7334         struct kvm_apic_map *map;
7335
7336         rcu_read_lock();
7337         map = rcu_dereference(kvm->arch.apic_map);
7338
7339         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
7340                 target = map->phys_map[dest_id]->vcpu;
7341
7342         rcu_read_unlock();
7343
7344         if (target && READ_ONCE(target->ready))
7345                 kvm_vcpu_yield_to(target);
7346 }
7347
7348 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
7349 {
7350         unsigned long nr, a0, a1, a2, a3, ret;
7351         int op_64_bit;
7352
7353         if (kvm_hv_hypercall_enabled(vcpu->kvm))
7354                 return kvm_hv_hypercall(vcpu);
7355
7356         nr = kvm_rax_read(vcpu);
7357         a0 = kvm_rbx_read(vcpu);
7358         a1 = kvm_rcx_read(vcpu);
7359         a2 = kvm_rdx_read(vcpu);
7360         a3 = kvm_rsi_read(vcpu);
7361
7362         trace_kvm_hypercall(nr, a0, a1, a2, a3);
7363
7364         op_64_bit = is_64_bit_mode(vcpu);
7365         if (!op_64_bit) {
7366                 nr &= 0xFFFFFFFF;
7367                 a0 &= 0xFFFFFFFF;
7368                 a1 &= 0xFFFFFFFF;
7369                 a2 &= 0xFFFFFFFF;
7370                 a3 &= 0xFFFFFFFF;
7371         }
7372
7373         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
7374                 ret = -KVM_EPERM;
7375                 goto out;
7376         }
7377
7378         switch (nr) {
7379         case KVM_HC_VAPIC_POLL_IRQ:
7380                 ret = 0;
7381                 break;
7382         case KVM_HC_KICK_CPU:
7383                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
7384                 kvm_sched_yield(vcpu->kvm, a1);
7385                 ret = 0;
7386                 break;
7387 #ifdef CONFIG_X86_64
7388         case KVM_HC_CLOCK_PAIRING:
7389                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
7390                 break;
7391 #endif
7392         case KVM_HC_SEND_IPI:
7393                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
7394                 break;
7395         case KVM_HC_SCHED_YIELD:
7396                 kvm_sched_yield(vcpu->kvm, a0);
7397                 ret = 0;
7398                 break;
7399         default:
7400                 ret = -KVM_ENOSYS;
7401                 break;
7402         }
7403 out:
7404         if (!op_64_bit)
7405                 ret = (u32)ret;
7406         kvm_rax_write(vcpu, ret);
7407
7408         ++vcpu->stat.hypercalls;
7409         return kvm_skip_emulated_instruction(vcpu);
7410 }
7411 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
7412
7413 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
7414 {
7415         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7416         char instruction[3];
7417         unsigned long rip = kvm_rip_read(vcpu);
7418
7419         kvm_x86_ops->patch_hypercall(vcpu, instruction);
7420
7421         return emulator_write_emulated(ctxt, rip, instruction, 3,
7422                 &ctxt->exception);
7423 }
7424
7425 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
7426 {
7427         return vcpu->run->request_interrupt_window &&
7428                 likely(!pic_in_kernel(vcpu->kvm));
7429 }
7430
7431 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
7432 {
7433         struct kvm_run *kvm_run = vcpu->run;
7434
7435         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
7436         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
7437         kvm_run->cr8 = kvm_get_cr8(vcpu);
7438         kvm_run->apic_base = kvm_get_apic_base(vcpu);
7439         kvm_run->ready_for_interrupt_injection =
7440                 pic_in_kernel(vcpu->kvm) ||
7441                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
7442 }
7443
7444 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
7445 {
7446         int max_irr, tpr;
7447
7448         if (!kvm_x86_ops->update_cr8_intercept)
7449                 return;
7450
7451         if (!lapic_in_kernel(vcpu))
7452                 return;
7453
7454         if (vcpu->arch.apicv_active)
7455                 return;
7456
7457         if (!vcpu->arch.apic->vapic_addr)
7458                 max_irr = kvm_lapic_find_highest_irr(vcpu);
7459         else
7460                 max_irr = -1;
7461
7462         if (max_irr != -1)
7463                 max_irr >>= 4;
7464
7465         tpr = kvm_lapic_get_cr8(vcpu);
7466
7467         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
7468 }
7469
7470 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
7471 {
7472         int r;
7473
7474         /* try to reinject previous events if any */
7475
7476         if (vcpu->arch.exception.injected)
7477                 kvm_x86_ops->queue_exception(vcpu);
7478         /*
7479          * Do not inject an NMI or interrupt if there is a pending
7480          * exception.  Exceptions and interrupts are recognized at
7481          * instruction boundaries, i.e. the start of an instruction.
7482          * Trap-like exceptions, e.g. #DB, have higher priority than
7483          * NMIs and interrupts, i.e. traps are recognized before an
7484          * NMI/interrupt that's pending on the same instruction.
7485          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
7486          * priority, but are only generated (pended) during instruction
7487          * execution, i.e. a pending fault-like exception means the
7488          * fault occurred on the *previous* instruction and must be
7489          * serviced prior to recognizing any new events in order to
7490          * fully complete the previous instruction.
7491          */
7492         else if (!vcpu->arch.exception.pending) {
7493                 if (vcpu->arch.nmi_injected)
7494                         kvm_x86_ops->set_nmi(vcpu);
7495                 else if (vcpu->arch.interrupt.injected)
7496                         kvm_x86_ops->set_irq(vcpu);
7497         }
7498
7499         /*
7500          * Call check_nested_events() even if we reinjected a previous event
7501          * in order for caller to determine if it should require immediate-exit
7502          * from L2 to L1 due to pending L1 events which require exit
7503          * from L2 to L1.
7504          */
7505         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
7506                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
7507                 if (r != 0)
7508                         return r;
7509         }
7510
7511         /* try to inject new event if pending */
7512         if (vcpu->arch.exception.pending) {
7513                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
7514                                         vcpu->arch.exception.has_error_code,
7515                                         vcpu->arch.exception.error_code);
7516
7517                 WARN_ON_ONCE(vcpu->arch.exception.injected);
7518                 vcpu->arch.exception.pending = false;
7519                 vcpu->arch.exception.injected = true;
7520
7521                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
7522                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
7523                                              X86_EFLAGS_RF);
7524
7525                 if (vcpu->arch.exception.nr == DB_VECTOR) {
7526                         /*
7527                          * This code assumes that nSVM doesn't use
7528                          * check_nested_events(). If it does, the
7529                          * DR6/DR7 changes should happen before L1
7530                          * gets a #VMEXIT for an intercepted #DB in
7531                          * L2.  (Under VMX, on the other hand, the
7532                          * DR6/DR7 changes should not happen in the
7533                          * event of a VM-exit to L1 for an intercepted
7534                          * #DB in L2.)
7535                          */
7536                         kvm_deliver_exception_payload(vcpu);
7537                         if (vcpu->arch.dr7 & DR7_GD) {
7538                                 vcpu->arch.dr7 &= ~DR7_GD;
7539                                 kvm_update_dr7(vcpu);
7540                         }
7541                 }
7542
7543                 kvm_x86_ops->queue_exception(vcpu);
7544         }
7545
7546         /* Don't consider new event if we re-injected an event */
7547         if (kvm_event_needs_reinjection(vcpu))
7548                 return 0;
7549
7550         if (vcpu->arch.smi_pending && !is_smm(vcpu) &&
7551             kvm_x86_ops->smi_allowed(vcpu)) {
7552                 vcpu->arch.smi_pending = false;
7553                 ++vcpu->arch.smi_count;
7554                 enter_smm(vcpu);
7555         } else if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
7556                 --vcpu->arch.nmi_pending;
7557                 vcpu->arch.nmi_injected = true;
7558                 kvm_x86_ops->set_nmi(vcpu);
7559         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
7560                 /*
7561                  * Because interrupts can be injected asynchronously, we are
7562                  * calling check_nested_events again here to avoid a race condition.
7563                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
7564                  * proposal and current concerns.  Perhaps we should be setting
7565                  * KVM_REQ_EVENT only on certain events and not unconditionally?
7566                  */
7567                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
7568                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
7569                         if (r != 0)
7570                                 return r;
7571                 }
7572                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
7573                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
7574                                             false);
7575                         kvm_x86_ops->set_irq(vcpu);
7576                 }
7577         }
7578
7579         return 0;
7580 }
7581
7582 static void process_nmi(struct kvm_vcpu *vcpu)
7583 {
7584         unsigned limit = 2;
7585
7586         /*
7587          * x86 is limited to one NMI running, and one NMI pending after it.
7588          * If an NMI is already in progress, limit further NMIs to just one.
7589          * Otherwise, allow two (and we'll inject the first one immediately).
7590          */
7591         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
7592                 limit = 1;
7593
7594         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
7595         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
7596         kvm_make_request(KVM_REQ_EVENT, vcpu);
7597 }
7598
7599 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
7600 {
7601         u32 flags = 0;
7602         flags |= seg->g       << 23;
7603         flags |= seg->db      << 22;
7604         flags |= seg->l       << 21;
7605         flags |= seg->avl     << 20;
7606         flags |= seg->present << 15;
7607         flags |= seg->dpl     << 13;
7608         flags |= seg->s       << 12;
7609         flags |= seg->type    << 8;
7610         return flags;
7611 }
7612
7613 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
7614 {
7615         struct kvm_segment seg;
7616         int offset;
7617
7618         kvm_get_segment(vcpu, &seg, n);
7619         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
7620
7621         if (n < 3)
7622                 offset = 0x7f84 + n * 12;
7623         else
7624                 offset = 0x7f2c + (n - 3) * 12;
7625
7626         put_smstate(u32, buf, offset + 8, seg.base);
7627         put_smstate(u32, buf, offset + 4, seg.limit);
7628         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
7629 }
7630
7631 #ifdef CONFIG_X86_64
7632 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
7633 {
7634         struct kvm_segment seg;
7635         int offset;
7636         u16 flags;
7637
7638         kvm_get_segment(vcpu, &seg, n);
7639         offset = 0x7e00 + n * 16;
7640
7641         flags = enter_smm_get_segment_flags(&seg) >> 8;
7642         put_smstate(u16, buf, offset, seg.selector);
7643         put_smstate(u16, buf, offset + 2, flags);
7644         put_smstate(u32, buf, offset + 4, seg.limit);
7645         put_smstate(u64, buf, offset + 8, seg.base);
7646 }
7647 #endif
7648
7649 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
7650 {
7651         struct desc_ptr dt;
7652         struct kvm_segment seg;
7653         unsigned long val;
7654         int i;
7655
7656         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
7657         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
7658         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
7659         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
7660
7661         for (i = 0; i < 8; i++)
7662                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
7663
7664         kvm_get_dr(vcpu, 6, &val);
7665         put_smstate(u32, buf, 0x7fcc, (u32)val);
7666         kvm_get_dr(vcpu, 7, &val);
7667         put_smstate(u32, buf, 0x7fc8, (u32)val);
7668
7669         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
7670         put_smstate(u32, buf, 0x7fc4, seg.selector);
7671         put_smstate(u32, buf, 0x7f64, seg.base);
7672         put_smstate(u32, buf, 0x7f60, seg.limit);
7673         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
7674
7675         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
7676         put_smstate(u32, buf, 0x7fc0, seg.selector);
7677         put_smstate(u32, buf, 0x7f80, seg.base);
7678         put_smstate(u32, buf, 0x7f7c, seg.limit);
7679         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
7680
7681         kvm_x86_ops->get_gdt(vcpu, &dt);
7682         put_smstate(u32, buf, 0x7f74, dt.address);
7683         put_smstate(u32, buf, 0x7f70, dt.size);
7684
7685         kvm_x86_ops->get_idt(vcpu, &dt);
7686         put_smstate(u32, buf, 0x7f58, dt.address);
7687         put_smstate(u32, buf, 0x7f54, dt.size);
7688
7689         for (i = 0; i < 6; i++)
7690                 enter_smm_save_seg_32(vcpu, buf, i);
7691
7692         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
7693
7694         /* revision id */
7695         put_smstate(u32, buf, 0x7efc, 0x00020000);
7696         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
7697 }
7698
7699 #ifdef CONFIG_X86_64
7700 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
7701 {
7702         struct desc_ptr dt;
7703         struct kvm_segment seg;
7704         unsigned long val;
7705         int i;
7706
7707         for (i = 0; i < 16; i++)
7708                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
7709
7710         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
7711         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
7712
7713         kvm_get_dr(vcpu, 6, &val);
7714         put_smstate(u64, buf, 0x7f68, val);
7715         kvm_get_dr(vcpu, 7, &val);
7716         put_smstate(u64, buf, 0x7f60, val);
7717
7718         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
7719         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
7720         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
7721
7722         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
7723
7724         /* revision id */
7725         put_smstate(u32, buf, 0x7efc, 0x00020064);
7726
7727         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
7728
7729         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
7730         put_smstate(u16, buf, 0x7e90, seg.selector);
7731         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
7732         put_smstate(u32, buf, 0x7e94, seg.limit);
7733         put_smstate(u64, buf, 0x7e98, seg.base);
7734
7735         kvm_x86_ops->get_idt(vcpu, &dt);
7736         put_smstate(u32, buf, 0x7e84, dt.size);
7737         put_smstate(u64, buf, 0x7e88, dt.address);
7738
7739         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
7740         put_smstate(u16, buf, 0x7e70, seg.selector);
7741         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
7742         put_smstate(u32, buf, 0x7e74, seg.limit);
7743         put_smstate(u64, buf, 0x7e78, seg.base);
7744
7745         kvm_x86_ops->get_gdt(vcpu, &dt);
7746         put_smstate(u32, buf, 0x7e64, dt.size);
7747         put_smstate(u64, buf, 0x7e68, dt.address);
7748
7749         for (i = 0; i < 6; i++)
7750                 enter_smm_save_seg_64(vcpu, buf, i);
7751 }
7752 #endif
7753
7754 static void enter_smm(struct kvm_vcpu *vcpu)
7755 {
7756         struct kvm_segment cs, ds;
7757         struct desc_ptr dt;
7758         char buf[512];
7759         u32 cr0;
7760
7761         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
7762         memset(buf, 0, 512);
7763 #ifdef CONFIG_X86_64
7764         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7765                 enter_smm_save_state_64(vcpu, buf);
7766         else
7767 #endif
7768                 enter_smm_save_state_32(vcpu, buf);
7769
7770         /*
7771          * Give pre_enter_smm() a chance to make ISA-specific changes to the
7772          * vCPU state (e.g. leave guest mode) after we've saved the state into
7773          * the SMM state-save area.
7774          */
7775         kvm_x86_ops->pre_enter_smm(vcpu, buf);
7776
7777         vcpu->arch.hflags |= HF_SMM_MASK;
7778         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
7779
7780         if (kvm_x86_ops->get_nmi_mask(vcpu))
7781                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
7782         else
7783                 kvm_x86_ops->set_nmi_mask(vcpu, true);
7784
7785         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
7786         kvm_rip_write(vcpu, 0x8000);
7787
7788         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
7789         kvm_x86_ops->set_cr0(vcpu, cr0);
7790         vcpu->arch.cr0 = cr0;
7791
7792         kvm_x86_ops->set_cr4(vcpu, 0);
7793
7794         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
7795         dt.address = dt.size = 0;
7796         kvm_x86_ops->set_idt(vcpu, &dt);
7797
7798         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
7799
7800         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
7801         cs.base = vcpu->arch.smbase;
7802
7803         ds.selector = 0;
7804         ds.base = 0;
7805
7806         cs.limit    = ds.limit = 0xffffffff;
7807         cs.type     = ds.type = 0x3;
7808         cs.dpl      = ds.dpl = 0;
7809         cs.db       = ds.db = 0;
7810         cs.s        = ds.s = 1;
7811         cs.l        = ds.l = 0;
7812         cs.g        = ds.g = 1;
7813         cs.avl      = ds.avl = 0;
7814         cs.present  = ds.present = 1;
7815         cs.unusable = ds.unusable = 0;
7816         cs.padding  = ds.padding = 0;
7817
7818         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7819         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
7820         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
7821         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
7822         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
7823         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
7824
7825 #ifdef CONFIG_X86_64
7826         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7827                 kvm_x86_ops->set_efer(vcpu, 0);
7828 #endif
7829
7830         kvm_update_cpuid(vcpu);
7831         kvm_mmu_reset_context(vcpu);
7832 }
7833
7834 static void process_smi(struct kvm_vcpu *vcpu)
7835 {
7836         vcpu->arch.smi_pending = true;
7837         kvm_make_request(KVM_REQ_EVENT, vcpu);
7838 }
7839
7840 void kvm_make_scan_ioapic_request(struct kvm *kvm)
7841 {
7842         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
7843 }
7844
7845 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
7846 {
7847         if (!kvm_apic_present(vcpu))
7848                 return;
7849
7850         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
7851
7852         if (irqchip_split(vcpu->kvm))
7853                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
7854         else {
7855                 if (vcpu->arch.apicv_active)
7856                         kvm_x86_ops->sync_pir_to_irr(vcpu);
7857                 if (ioapic_in_kernel(vcpu->kvm))
7858                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
7859         }
7860
7861         if (is_guest_mode(vcpu))
7862                 vcpu->arch.load_eoi_exitmap_pending = true;
7863         else
7864                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
7865 }
7866
7867 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
7868 {
7869         u64 eoi_exit_bitmap[4];
7870
7871         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
7872                 return;
7873
7874         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
7875                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
7876         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
7877 }
7878
7879 int kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
7880                 unsigned long start, unsigned long end,
7881                 bool blockable)
7882 {
7883         unsigned long apic_address;
7884
7885         /*
7886          * The physical address of apic access page is stored in the VMCS.
7887          * Update it when it becomes invalid.
7888          */
7889         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7890         if (start <= apic_address && apic_address < end)
7891                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
7892
7893         return 0;
7894 }
7895
7896 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
7897 {
7898         struct page *page = NULL;
7899
7900         if (!lapic_in_kernel(vcpu))
7901                 return;
7902
7903         if (!kvm_x86_ops->set_apic_access_page_addr)
7904                 return;
7905
7906         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7907         if (is_error_page(page))
7908                 return;
7909         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
7910
7911         /*
7912          * Do not pin apic access page in memory, the MMU notifier
7913          * will call us again if it is migrated or swapped out.
7914          */
7915         put_page(page);
7916 }
7917 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
7918
7919 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
7920 {
7921         smp_send_reschedule(vcpu->cpu);
7922 }
7923 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
7924
7925 /*
7926  * Returns 1 to let vcpu_run() continue the guest execution loop without
7927  * exiting to the userspace.  Otherwise, the value will be returned to the
7928  * userspace.
7929  */
7930 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
7931 {
7932         int r;
7933         bool req_int_win =
7934                 dm_request_for_irq_injection(vcpu) &&
7935                 kvm_cpu_accept_dm_intr(vcpu);
7936
7937         bool req_immediate_exit = false;
7938
7939         if (kvm_request_pending(vcpu)) {
7940                 if (kvm_check_request(KVM_REQ_GET_VMCS12_PAGES, vcpu))
7941                         kvm_x86_ops->get_vmcs12_pages(vcpu);
7942                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
7943                         kvm_mmu_unload(vcpu);
7944                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
7945                         __kvm_migrate_timers(vcpu);
7946                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
7947                         kvm_gen_update_masterclock(vcpu->kvm);
7948                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
7949                         kvm_gen_kvmclock_update(vcpu);
7950                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
7951                         r = kvm_guest_time_update(vcpu);
7952                         if (unlikely(r))
7953                                 goto out;
7954                 }
7955                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
7956                         kvm_mmu_sync_roots(vcpu);
7957                 if (kvm_check_request(KVM_REQ_LOAD_CR3, vcpu))
7958                         kvm_mmu_load_cr3(vcpu);
7959                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
7960                         kvm_vcpu_flush_tlb(vcpu, true);
7961                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
7962                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
7963                         r = 0;
7964                         goto out;
7965                 }
7966                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
7967                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
7968                         vcpu->mmio_needed = 0;
7969                         r = 0;
7970                         goto out;
7971                 }
7972                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
7973                         /* Page is swapped out. Do synthetic halt */
7974                         vcpu->arch.apf.halted = true;
7975                         r = 1;
7976                         goto out;
7977                 }
7978                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
7979                         record_steal_time(vcpu);
7980                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
7981                         process_smi(vcpu);
7982                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
7983                         process_nmi(vcpu);
7984                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
7985                         kvm_pmu_handle_event(vcpu);
7986                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
7987                         kvm_pmu_deliver_pmi(vcpu);
7988                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
7989                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
7990                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
7991                                      vcpu->arch.ioapic_handled_vectors)) {
7992                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
7993                                 vcpu->run->eoi.vector =
7994                                                 vcpu->arch.pending_ioapic_eoi;
7995                                 r = 0;
7996                                 goto out;
7997                         }
7998                 }
7999                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
8000                         vcpu_scan_ioapic(vcpu);
8001                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
8002                         vcpu_load_eoi_exitmap(vcpu);
8003                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
8004                         kvm_vcpu_reload_apic_access_page(vcpu);
8005                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
8006                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
8007                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
8008                         r = 0;
8009                         goto out;
8010                 }
8011                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
8012                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
8013                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
8014                         r = 0;
8015                         goto out;
8016                 }
8017                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
8018                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
8019                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
8020                         r = 0;
8021                         goto out;
8022                 }
8023
8024                 /*
8025                  * KVM_REQ_HV_STIMER has to be processed after
8026                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
8027                  * depend on the guest clock being up-to-date
8028                  */
8029                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
8030                         kvm_hv_process_stimers(vcpu);
8031         }
8032
8033         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
8034                 ++vcpu->stat.req_event;
8035                 kvm_apic_accept_events(vcpu);
8036                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
8037                         r = 1;
8038                         goto out;
8039                 }
8040
8041                 if (inject_pending_event(vcpu, req_int_win) != 0)
8042                         req_immediate_exit = true;
8043                 else {
8044                         /* Enable SMI/NMI/IRQ window open exits if needed.
8045                          *
8046                          * SMIs have three cases:
8047                          * 1) They can be nested, and then there is nothing to
8048                          *    do here because RSM will cause a vmexit anyway.
8049                          * 2) There is an ISA-specific reason why SMI cannot be
8050                          *    injected, and the moment when this changes can be
8051                          *    intercepted.
8052                          * 3) Or the SMI can be pending because
8053                          *    inject_pending_event has completed the injection
8054                          *    of an IRQ or NMI from the previous vmexit, and
8055                          *    then we request an immediate exit to inject the
8056                          *    SMI.
8057                          */
8058                         if (vcpu->arch.smi_pending && !is_smm(vcpu))
8059                                 if (!kvm_x86_ops->enable_smi_window(vcpu))
8060                                         req_immediate_exit = true;
8061                         if (vcpu->arch.nmi_pending)
8062                                 kvm_x86_ops->enable_nmi_window(vcpu);
8063                         if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
8064                                 kvm_x86_ops->enable_irq_window(vcpu);
8065                         WARN_ON(vcpu->arch.exception.pending);
8066                 }
8067
8068                 if (kvm_lapic_enabled(vcpu)) {
8069                         update_cr8_intercept(vcpu);
8070                         kvm_lapic_sync_to_vapic(vcpu);
8071                 }
8072         }
8073
8074         r = kvm_mmu_reload(vcpu);
8075         if (unlikely(r)) {
8076                 goto cancel_injection;
8077         }
8078
8079         preempt_disable();
8080
8081         kvm_x86_ops->prepare_guest_switch(vcpu);
8082
8083         /*
8084          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
8085          * IPI are then delayed after guest entry, which ensures that they
8086          * result in virtual interrupt delivery.
8087          */
8088         local_irq_disable();
8089         vcpu->mode = IN_GUEST_MODE;
8090
8091         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
8092
8093         /*
8094          * 1) We should set ->mode before checking ->requests.  Please see
8095          * the comment in kvm_vcpu_exiting_guest_mode().
8096          *
8097          * 2) For APICv, we should set ->mode before checking PID.ON. This
8098          * pairs with the memory barrier implicit in pi_test_and_set_on
8099          * (see vmx_deliver_posted_interrupt).
8100          *
8101          * 3) This also orders the write to mode from any reads to the page
8102          * tables done while the VCPU is running.  Please see the comment
8103          * in kvm_flush_remote_tlbs.
8104          */
8105         smp_mb__after_srcu_read_unlock();
8106
8107         /*
8108          * This handles the case where a posted interrupt was
8109          * notified with kvm_vcpu_kick.
8110          */
8111         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
8112                 kvm_x86_ops->sync_pir_to_irr(vcpu);
8113
8114         if (vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu)
8115             || need_resched() || signal_pending(current)) {
8116                 vcpu->mode = OUTSIDE_GUEST_MODE;
8117                 smp_wmb();
8118                 local_irq_enable();
8119                 preempt_enable();
8120                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8121                 r = 1;
8122                 goto cancel_injection;
8123         }
8124
8125         if (req_immediate_exit) {
8126                 kvm_make_request(KVM_REQ_EVENT, vcpu);
8127                 kvm_x86_ops->request_immediate_exit(vcpu);
8128         }
8129
8130         trace_kvm_entry(vcpu->vcpu_id);
8131         guest_enter_irqoff();
8132
8133         /* The preempt notifier should have taken care of the FPU already.  */
8134         WARN_ON_ONCE(test_thread_flag(TIF_NEED_FPU_LOAD));
8135
8136         if (unlikely(vcpu->arch.switch_db_regs)) {
8137                 set_debugreg(0, 7);
8138                 set_debugreg(vcpu->arch.eff_db[0], 0);
8139                 set_debugreg(vcpu->arch.eff_db[1], 1);
8140                 set_debugreg(vcpu->arch.eff_db[2], 2);
8141                 set_debugreg(vcpu->arch.eff_db[3], 3);
8142                 set_debugreg(vcpu->arch.dr6, 6);
8143                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
8144         }
8145
8146         kvm_x86_ops->run(vcpu);
8147
8148         /*
8149          * Do this here before restoring debug registers on the host.  And
8150          * since we do this before handling the vmexit, a DR access vmexit
8151          * can (a) read the correct value of the debug registers, (b) set
8152          * KVM_DEBUGREG_WONT_EXIT again.
8153          */
8154         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
8155                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
8156                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
8157                 kvm_update_dr0123(vcpu);
8158                 kvm_update_dr6(vcpu);
8159                 kvm_update_dr7(vcpu);
8160                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
8161         }
8162
8163         /*
8164          * If the guest has used debug registers, at least dr7
8165          * will be disabled while returning to the host.
8166          * If we don't have active breakpoints in the host, we don't
8167          * care about the messed up debug address registers. But if
8168          * we have some of them active, restore the old state.
8169          */
8170         if (hw_breakpoint_active())
8171                 hw_breakpoint_restore();
8172
8173         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
8174
8175         vcpu->mode = OUTSIDE_GUEST_MODE;
8176         smp_wmb();
8177
8178         kvm_x86_ops->handle_exit_irqoff(vcpu);
8179
8180         /*
8181          * Consume any pending interrupts, including the possible source of
8182          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
8183          * An instruction is required after local_irq_enable() to fully unblock
8184          * interrupts on processors that implement an interrupt shadow, the
8185          * stat.exits increment will do nicely.
8186          */
8187         kvm_before_interrupt(vcpu);
8188         local_irq_enable();
8189         ++vcpu->stat.exits;
8190         local_irq_disable();
8191         kvm_after_interrupt(vcpu);
8192
8193         guest_exit_irqoff();
8194         if (lapic_in_kernel(vcpu)) {
8195                 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
8196                 if (delta != S64_MIN) {
8197                         trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
8198                         vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
8199                 }
8200         }
8201
8202         local_irq_enable();
8203         preempt_enable();
8204
8205         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8206
8207         /*
8208          * Profile KVM exit RIPs:
8209          */
8210         if (unlikely(prof_on == KVM_PROFILING)) {
8211                 unsigned long rip = kvm_rip_read(vcpu);
8212                 profile_hit(KVM_PROFILING, (void *)rip);
8213         }
8214
8215         if (unlikely(vcpu->arch.tsc_always_catchup))
8216                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8217
8218         if (vcpu->arch.apic_attention)
8219                 kvm_lapic_sync_from_vapic(vcpu);
8220
8221         vcpu->arch.gpa_available = false;
8222         r = kvm_x86_ops->handle_exit(vcpu);
8223         return r;
8224
8225 cancel_injection:
8226         kvm_x86_ops->cancel_injection(vcpu);
8227         if (unlikely(vcpu->arch.apic_attention))
8228                 kvm_lapic_sync_from_vapic(vcpu);
8229 out:
8230         return r;
8231 }
8232
8233 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
8234 {
8235         if (!kvm_arch_vcpu_runnable(vcpu) &&
8236             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
8237                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
8238                 kvm_vcpu_block(vcpu);
8239                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
8240
8241                 if (kvm_x86_ops->post_block)
8242                         kvm_x86_ops->post_block(vcpu);
8243
8244                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
8245                         return 1;
8246         }
8247
8248         kvm_apic_accept_events(vcpu);
8249         switch(vcpu->arch.mp_state) {
8250         case KVM_MP_STATE_HALTED:
8251                 vcpu->arch.pv.pv_unhalted = false;
8252                 vcpu->arch.mp_state =
8253                         KVM_MP_STATE_RUNNABLE;
8254                 /* fall through */
8255         case KVM_MP_STATE_RUNNABLE:
8256                 vcpu->arch.apf.halted = false;
8257                 break;
8258         case KVM_MP_STATE_INIT_RECEIVED:
8259                 break;
8260         default:
8261                 return -EINTR;
8262                 break;
8263         }
8264         return 1;
8265 }
8266
8267 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
8268 {
8269         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
8270                 kvm_x86_ops->check_nested_events(vcpu, false);
8271
8272         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
8273                 !vcpu->arch.apf.halted);
8274 }
8275
8276 static int vcpu_run(struct kvm_vcpu *vcpu)
8277 {
8278         int r;
8279         struct kvm *kvm = vcpu->kvm;
8280
8281         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
8282         vcpu->arch.l1tf_flush_l1d = true;
8283
8284         for (;;) {
8285                 if (kvm_vcpu_running(vcpu)) {
8286                         r = vcpu_enter_guest(vcpu);
8287                 } else {
8288                         r = vcpu_block(kvm, vcpu);
8289                 }
8290
8291                 if (r <= 0)
8292                         break;
8293
8294                 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
8295                 if (kvm_cpu_has_pending_timer(vcpu))
8296                         kvm_inject_pending_timer_irqs(vcpu);
8297
8298                 if (dm_request_for_irq_injection(vcpu) &&
8299                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
8300                         r = 0;
8301                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
8302                         ++vcpu->stat.request_irq_exits;
8303                         break;
8304                 }
8305
8306                 kvm_check_async_pf_completion(vcpu);
8307
8308                 if (signal_pending(current)) {
8309                         r = -EINTR;
8310                         vcpu->run->exit_reason = KVM_EXIT_INTR;
8311                         ++vcpu->stat.signal_exits;
8312                         break;
8313                 }
8314                 if (need_resched()) {
8315                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
8316                         cond_resched();
8317                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
8318                 }
8319         }
8320
8321         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
8322
8323         return r;
8324 }
8325
8326 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
8327 {
8328         int r;
8329
8330         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8331         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
8332         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
8333         return r;
8334 }
8335
8336 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
8337 {
8338         BUG_ON(!vcpu->arch.pio.count);
8339
8340         return complete_emulated_io(vcpu);
8341 }
8342
8343 /*
8344  * Implements the following, as a state machine:
8345  *
8346  * read:
8347  *   for each fragment
8348  *     for each mmio piece in the fragment
8349  *       write gpa, len
8350  *       exit
8351  *       copy data
8352  *   execute insn
8353  *
8354  * write:
8355  *   for each fragment
8356  *     for each mmio piece in the fragment
8357  *       write gpa, len
8358  *       copy data
8359  *       exit
8360  */
8361 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
8362 {
8363         struct kvm_run *run = vcpu->run;
8364         struct kvm_mmio_fragment *frag;
8365         unsigned len;
8366
8367         BUG_ON(!vcpu->mmio_needed);
8368
8369         /* Complete previous fragment */
8370         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
8371         len = min(8u, frag->len);
8372         if (!vcpu->mmio_is_write)
8373                 memcpy(frag->data, run->mmio.data, len);
8374
8375         if (frag->len <= 8) {
8376                 /* Switch to the next fragment. */
8377                 frag++;
8378                 vcpu->mmio_cur_fragment++;
8379         } else {
8380                 /* Go forward to the next mmio piece. */
8381                 frag->data += len;
8382                 frag->gpa += len;
8383                 frag->len -= len;
8384         }
8385
8386         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
8387                 vcpu->mmio_needed = 0;
8388
8389                 /* FIXME: return into emulator if single-stepping.  */
8390                 if (vcpu->mmio_is_write)
8391                         return 1;
8392                 vcpu->mmio_read_completed = 1;
8393                 return complete_emulated_io(vcpu);
8394         }
8395
8396         run->exit_reason = KVM_EXIT_MMIO;
8397         run->mmio.phys_addr = frag->gpa;
8398         if (vcpu->mmio_is_write)
8399                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
8400         run->mmio.len = min(8u, frag->len);
8401         run->mmio.is_write = vcpu->mmio_is_write;
8402         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
8403         return 0;
8404 }
8405
8406 /* Swap (qemu) user FPU context for the guest FPU context. */
8407 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
8408 {
8409         fpregs_lock();
8410
8411         copy_fpregs_to_fpstate(vcpu->arch.user_fpu);
8412         /* PKRU is separately restored in kvm_x86_ops->run.  */
8413         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu->state,
8414                                 ~XFEATURE_MASK_PKRU);
8415
8416         fpregs_mark_activate();
8417         fpregs_unlock();
8418
8419         trace_kvm_fpu(1);
8420 }
8421
8422 /* When vcpu_run ends, restore user space FPU context. */
8423 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
8424 {
8425         fpregs_lock();
8426
8427         copy_fpregs_to_fpstate(vcpu->arch.guest_fpu);
8428         copy_kernel_to_fpregs(&vcpu->arch.user_fpu->state);
8429
8430         fpregs_mark_activate();
8431         fpregs_unlock();
8432
8433         ++vcpu->stat.fpu_reload;
8434         trace_kvm_fpu(0);
8435 }
8436
8437 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
8438 {
8439         int r;
8440
8441         vcpu_load(vcpu);
8442         kvm_sigset_activate(vcpu);
8443         kvm_load_guest_fpu(vcpu);
8444
8445         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
8446                 if (kvm_run->immediate_exit) {
8447                         r = -EINTR;
8448                         goto out;
8449                 }
8450                 kvm_vcpu_block(vcpu);
8451                 kvm_apic_accept_events(vcpu);
8452                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
8453                 r = -EAGAIN;
8454                 if (signal_pending(current)) {
8455                         r = -EINTR;
8456                         vcpu->run->exit_reason = KVM_EXIT_INTR;
8457                         ++vcpu->stat.signal_exits;
8458                 }
8459                 goto out;
8460         }
8461
8462         if (vcpu->run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
8463                 r = -EINVAL;
8464                 goto out;
8465         }
8466
8467         if (vcpu->run->kvm_dirty_regs) {
8468                 r = sync_regs(vcpu);
8469                 if (r != 0)
8470                         goto out;
8471         }
8472
8473         /* re-sync apic's tpr */
8474         if (!lapic_in_kernel(vcpu)) {
8475                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
8476                         r = -EINVAL;
8477                         goto out;
8478                 }
8479         }
8480
8481         if (unlikely(vcpu->arch.complete_userspace_io)) {
8482                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
8483                 vcpu->arch.complete_userspace_io = NULL;
8484                 r = cui(vcpu);
8485                 if (r <= 0)
8486                         goto out;
8487         } else
8488                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
8489
8490         if (kvm_run->immediate_exit)
8491                 r = -EINTR;
8492         else
8493                 r = vcpu_run(vcpu);
8494
8495 out:
8496         kvm_put_guest_fpu(vcpu);
8497         if (vcpu->run->kvm_valid_regs)
8498                 store_regs(vcpu);
8499         post_kvm_run_save(vcpu);
8500         kvm_sigset_deactivate(vcpu);
8501
8502         vcpu_put(vcpu);
8503         return r;
8504 }
8505
8506 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8507 {
8508         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
8509                 /*
8510                  * We are here if userspace calls get_regs() in the middle of
8511                  * instruction emulation. Registers state needs to be copied
8512                  * back from emulation context to vcpu. Userspace shouldn't do
8513                  * that usually, but some bad designed PV devices (vmware
8514                  * backdoor interface) need this to work
8515                  */
8516                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
8517                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8518         }
8519         regs->rax = kvm_rax_read(vcpu);
8520         regs->rbx = kvm_rbx_read(vcpu);
8521         regs->rcx = kvm_rcx_read(vcpu);
8522         regs->rdx = kvm_rdx_read(vcpu);
8523         regs->rsi = kvm_rsi_read(vcpu);
8524         regs->rdi = kvm_rdi_read(vcpu);
8525         regs->rsp = kvm_rsp_read(vcpu);
8526         regs->rbp = kvm_rbp_read(vcpu);
8527 #ifdef CONFIG_X86_64
8528         regs->r8 = kvm_r8_read(vcpu);
8529         regs->r9 = kvm_r9_read(vcpu);
8530         regs->r10 = kvm_r10_read(vcpu);
8531         regs->r11 = kvm_r11_read(vcpu);
8532         regs->r12 = kvm_r12_read(vcpu);
8533         regs->r13 = kvm_r13_read(vcpu);
8534         regs->r14 = kvm_r14_read(vcpu);
8535         regs->r15 = kvm_r15_read(vcpu);
8536 #endif
8537
8538         regs->rip = kvm_rip_read(vcpu);
8539         regs->rflags = kvm_get_rflags(vcpu);
8540 }
8541
8542 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8543 {
8544         vcpu_load(vcpu);
8545         __get_regs(vcpu, regs);
8546         vcpu_put(vcpu);
8547         return 0;
8548 }
8549
8550 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8551 {
8552         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
8553         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8554
8555         kvm_rax_write(vcpu, regs->rax);
8556         kvm_rbx_write(vcpu, regs->rbx);
8557         kvm_rcx_write(vcpu, regs->rcx);
8558         kvm_rdx_write(vcpu, regs->rdx);
8559         kvm_rsi_write(vcpu, regs->rsi);
8560         kvm_rdi_write(vcpu, regs->rdi);
8561         kvm_rsp_write(vcpu, regs->rsp);
8562         kvm_rbp_write(vcpu, regs->rbp);
8563 #ifdef CONFIG_X86_64
8564         kvm_r8_write(vcpu, regs->r8);
8565         kvm_r9_write(vcpu, regs->r9);
8566         kvm_r10_write(vcpu, regs->r10);
8567         kvm_r11_write(vcpu, regs->r11);
8568         kvm_r12_write(vcpu, regs->r12);
8569         kvm_r13_write(vcpu, regs->r13);
8570         kvm_r14_write(vcpu, regs->r14);
8571         kvm_r15_write(vcpu, regs->r15);
8572 #endif
8573
8574         kvm_rip_write(vcpu, regs->rip);
8575         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
8576
8577         vcpu->arch.exception.pending = false;
8578
8579         kvm_make_request(KVM_REQ_EVENT, vcpu);
8580 }
8581
8582 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8583 {
8584         vcpu_load(vcpu);
8585         __set_regs(vcpu, regs);
8586         vcpu_put(vcpu);
8587         return 0;
8588 }
8589
8590 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
8591 {
8592         struct kvm_segment cs;
8593
8594         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
8595         *db = cs.db;
8596         *l = cs.l;
8597 }
8598 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
8599
8600 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8601 {
8602         struct desc_ptr dt;
8603
8604         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
8605         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
8606         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
8607         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
8608         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
8609         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
8610
8611         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
8612         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
8613
8614         kvm_x86_ops->get_idt(vcpu, &dt);
8615         sregs->idt.limit = dt.size;
8616         sregs->idt.base = dt.address;
8617         kvm_x86_ops->get_gdt(vcpu, &dt);
8618         sregs->gdt.limit = dt.size;
8619         sregs->gdt.base = dt.address;
8620
8621         sregs->cr0 = kvm_read_cr0(vcpu);
8622         sregs->cr2 = vcpu->arch.cr2;
8623         sregs->cr3 = kvm_read_cr3(vcpu);
8624         sregs->cr4 = kvm_read_cr4(vcpu);
8625         sregs->cr8 = kvm_get_cr8(vcpu);
8626         sregs->efer = vcpu->arch.efer;
8627         sregs->apic_base = kvm_get_apic_base(vcpu);
8628
8629         memset(sregs->interrupt_bitmap, 0, sizeof(sregs->interrupt_bitmap));
8630
8631         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
8632                 set_bit(vcpu->arch.interrupt.nr,
8633                         (unsigned long *)sregs->interrupt_bitmap);
8634 }
8635
8636 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
8637                                   struct kvm_sregs *sregs)
8638 {
8639         vcpu_load(vcpu);
8640         __get_sregs(vcpu, sregs);
8641         vcpu_put(vcpu);
8642         return 0;
8643 }
8644
8645 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
8646                                     struct kvm_mp_state *mp_state)
8647 {
8648         vcpu_load(vcpu);
8649
8650         kvm_apic_accept_events(vcpu);
8651         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
8652                                         vcpu->arch.pv.pv_unhalted)
8653                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
8654         else
8655                 mp_state->mp_state = vcpu->arch.mp_state;
8656
8657         vcpu_put(vcpu);
8658         return 0;
8659 }
8660
8661 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
8662                                     struct kvm_mp_state *mp_state)
8663 {
8664         int ret = -EINVAL;
8665
8666         vcpu_load(vcpu);
8667
8668         if (!lapic_in_kernel(vcpu) &&
8669             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
8670                 goto out;
8671
8672         /* INITs are latched while in SMM */
8673         if ((is_smm(vcpu) || vcpu->arch.smi_pending) &&
8674             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
8675              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
8676                 goto out;
8677
8678         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
8679                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
8680                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
8681         } else
8682                 vcpu->arch.mp_state = mp_state->mp_state;
8683         kvm_make_request(KVM_REQ_EVENT, vcpu);
8684
8685         ret = 0;
8686 out:
8687         vcpu_put(vcpu);
8688         return ret;
8689 }
8690
8691 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
8692                     int reason, bool has_error_code, u32 error_code)
8693 {
8694         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
8695         int ret;
8696
8697         init_emulate_ctxt(vcpu);
8698
8699         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
8700                                    has_error_code, error_code);
8701         if (ret) {
8702                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
8703                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
8704                 vcpu->run->internal.ndata = 0;
8705                 return 0;
8706         }
8707
8708         kvm_rip_write(vcpu, ctxt->eip);
8709         kvm_set_rflags(vcpu, ctxt->eflags);
8710         kvm_make_request(KVM_REQ_EVENT, vcpu);
8711         return 1;
8712 }
8713 EXPORT_SYMBOL_GPL(kvm_task_switch);
8714
8715 static int kvm_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8716 {
8717         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) &&
8718                         (sregs->cr4 & X86_CR4_OSXSAVE))
8719                 return  -EINVAL;
8720
8721         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
8722                 /*
8723                  * When EFER.LME and CR0.PG are set, the processor is in
8724                  * 64-bit mode (though maybe in a 32-bit code segment).
8725                  * CR4.PAE and EFER.LMA must be set.
8726                  */
8727                 if (!(sregs->cr4 & X86_CR4_PAE)
8728                     || !(sregs->efer & EFER_LMA))
8729                         return -EINVAL;
8730         } else {
8731                 /*
8732                  * Not in 64-bit mode: EFER.LMA is clear and the code
8733                  * segment cannot be 64-bit.
8734                  */
8735                 if (sregs->efer & EFER_LMA || sregs->cs.l)
8736                         return -EINVAL;
8737         }
8738
8739         return 0;
8740 }
8741
8742 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8743 {
8744         struct msr_data apic_base_msr;
8745         int mmu_reset_needed = 0;
8746         int cpuid_update_needed = 0;
8747         int pending_vec, max_bits, idx;
8748         struct desc_ptr dt;
8749         int ret = -EINVAL;
8750
8751         if (kvm_valid_sregs(vcpu, sregs))
8752                 goto out;
8753
8754         apic_base_msr.data = sregs->apic_base;
8755         apic_base_msr.host_initiated = true;
8756         if (kvm_set_apic_base(vcpu, &apic_base_msr))
8757                 goto out;
8758
8759         dt.size = sregs->idt.limit;
8760         dt.address = sregs->idt.base;
8761         kvm_x86_ops->set_idt(vcpu, &dt);
8762         dt.size = sregs->gdt.limit;
8763         dt.address = sregs->gdt.base;
8764         kvm_x86_ops->set_gdt(vcpu, &dt);
8765
8766         vcpu->arch.cr2 = sregs->cr2;
8767         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
8768         vcpu->arch.cr3 = sregs->cr3;
8769         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
8770
8771         kvm_set_cr8(vcpu, sregs->cr8);
8772
8773         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
8774         kvm_x86_ops->set_efer(vcpu, sregs->efer);
8775
8776         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
8777         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
8778         vcpu->arch.cr0 = sregs->cr0;
8779
8780         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
8781         cpuid_update_needed |= ((kvm_read_cr4(vcpu) ^ sregs->cr4) &
8782                                 (X86_CR4_OSXSAVE | X86_CR4_PKE));
8783         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
8784         if (cpuid_update_needed)
8785                 kvm_update_cpuid(vcpu);
8786
8787         idx = srcu_read_lock(&vcpu->kvm->srcu);
8788         if (is_pae_paging(vcpu)) {
8789                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
8790                 mmu_reset_needed = 1;
8791         }
8792         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8793
8794         if (mmu_reset_needed)
8795                 kvm_mmu_reset_context(vcpu);
8796
8797         max_bits = KVM_NR_INTERRUPTS;
8798         pending_vec = find_first_bit(
8799                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
8800         if (pending_vec < max_bits) {
8801                 kvm_queue_interrupt(vcpu, pending_vec, false);
8802                 pr_debug("Set back pending irq %d\n", pending_vec);
8803         }
8804
8805         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
8806         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
8807         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
8808         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
8809         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
8810         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
8811
8812         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
8813         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
8814
8815         update_cr8_intercept(vcpu);
8816
8817         /* Older userspace won't unhalt the vcpu on reset. */
8818         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
8819             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
8820             !is_protmode(vcpu))
8821                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8822
8823         kvm_make_request(KVM_REQ_EVENT, vcpu);
8824
8825         ret = 0;
8826 out:
8827         return ret;
8828 }
8829
8830 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
8831                                   struct kvm_sregs *sregs)
8832 {
8833         int ret;
8834
8835         vcpu_load(vcpu);
8836         ret = __set_sregs(vcpu, sregs);
8837         vcpu_put(vcpu);
8838         return ret;
8839 }
8840
8841 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
8842                                         struct kvm_guest_debug *dbg)
8843 {
8844         unsigned long rflags;
8845         int i, r;
8846
8847         vcpu_load(vcpu);
8848
8849         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
8850                 r = -EBUSY;
8851                 if (vcpu->arch.exception.pending)
8852                         goto out;
8853                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
8854                         kvm_queue_exception(vcpu, DB_VECTOR);
8855                 else
8856                         kvm_queue_exception(vcpu, BP_VECTOR);
8857         }
8858
8859         /*
8860          * Read rflags as long as potentially injected trace flags are still
8861          * filtered out.
8862          */
8863         rflags = kvm_get_rflags(vcpu);
8864
8865         vcpu->guest_debug = dbg->control;
8866         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
8867                 vcpu->guest_debug = 0;
8868
8869         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
8870                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
8871                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
8872                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
8873         } else {
8874                 for (i = 0; i < KVM_NR_DB_REGS; i++)
8875                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
8876         }
8877         kvm_update_dr7(vcpu);
8878
8879         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8880                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
8881                         get_segment_base(vcpu, VCPU_SREG_CS);
8882
8883         /*
8884          * Trigger an rflags update that will inject or remove the trace
8885          * flags.
8886          */
8887         kvm_set_rflags(vcpu, rflags);
8888
8889         kvm_x86_ops->update_bp_intercept(vcpu);
8890
8891         r = 0;
8892
8893 out:
8894         vcpu_put(vcpu);
8895         return r;
8896 }
8897
8898 /*
8899  * Translate a guest virtual address to a guest physical address.
8900  */
8901 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
8902                                     struct kvm_translation *tr)
8903 {
8904         unsigned long vaddr = tr->linear_address;
8905         gpa_t gpa;
8906         int idx;
8907
8908         vcpu_load(vcpu);
8909
8910         idx = srcu_read_lock(&vcpu->kvm->srcu);
8911         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
8912         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8913         tr->physical_address = gpa;
8914         tr->valid = gpa != UNMAPPED_GVA;
8915         tr->writeable = 1;
8916         tr->usermode = 0;
8917
8918         vcpu_put(vcpu);
8919         return 0;
8920 }
8921
8922 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
8923 {
8924         struct fxregs_state *fxsave;
8925
8926         vcpu_load(vcpu);
8927
8928         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
8929         memcpy(fpu->fpr, fxsave->st_space, 128);
8930         fpu->fcw = fxsave->cwd;
8931         fpu->fsw = fxsave->swd;
8932         fpu->ftwx = fxsave->twd;
8933         fpu->last_opcode = fxsave->fop;
8934         fpu->last_ip = fxsave->rip;
8935         fpu->last_dp = fxsave->rdp;
8936         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
8937
8938         vcpu_put(vcpu);
8939         return 0;
8940 }
8941
8942 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
8943 {
8944         struct fxregs_state *fxsave;
8945
8946         vcpu_load(vcpu);
8947
8948         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
8949
8950         memcpy(fxsave->st_space, fpu->fpr, 128);
8951         fxsave->cwd = fpu->fcw;
8952         fxsave->swd = fpu->fsw;
8953         fxsave->twd = fpu->ftwx;
8954         fxsave->fop = fpu->last_opcode;
8955         fxsave->rip = fpu->last_ip;
8956         fxsave->rdp = fpu->last_dp;
8957         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
8958
8959         vcpu_put(vcpu);
8960         return 0;
8961 }
8962
8963 static void store_regs(struct kvm_vcpu *vcpu)
8964 {
8965         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
8966
8967         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
8968                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
8969
8970         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
8971                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
8972
8973         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
8974                 kvm_vcpu_ioctl_x86_get_vcpu_events(
8975                                 vcpu, &vcpu->run->s.regs.events);
8976 }
8977
8978 static int sync_regs(struct kvm_vcpu *vcpu)
8979 {
8980         if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
8981                 return -EINVAL;
8982
8983         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
8984                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
8985                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
8986         }
8987         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
8988                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
8989                         return -EINVAL;
8990                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
8991         }
8992         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
8993                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
8994                                 vcpu, &vcpu->run->s.regs.events))
8995                         return -EINVAL;
8996                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
8997         }
8998
8999         return 0;
9000 }
9001
9002 static void fx_init(struct kvm_vcpu *vcpu)
9003 {
9004         fpstate_init(&vcpu->arch.guest_fpu->state);
9005         if (boot_cpu_has(X86_FEATURE_XSAVES))
9006                 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
9007                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
9008
9009         /*
9010          * Ensure guest xcr0 is valid for loading
9011          */
9012         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
9013
9014         vcpu->arch.cr0 |= X86_CR0_ET;
9015 }
9016
9017 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
9018 {
9019         void *wbinvd_dirty_mask = vcpu->arch.wbinvd_dirty_mask;
9020
9021         kvmclock_reset(vcpu);
9022
9023         kvm_x86_ops->vcpu_free(vcpu);
9024         free_cpumask_var(wbinvd_dirty_mask);
9025 }
9026
9027 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
9028                                                 unsigned int id)
9029 {
9030         struct kvm_vcpu *vcpu;
9031
9032         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
9033                 printk_once(KERN_WARNING
9034                 "kvm: SMP vm created on host with unstable TSC; "
9035                 "guest TSC will not be reliable\n");
9036
9037         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
9038
9039         return vcpu;
9040 }
9041
9042 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
9043 {
9044         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
9045         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
9046         kvm_vcpu_mtrr_init(vcpu);
9047         vcpu_load(vcpu);
9048         kvm_vcpu_reset(vcpu, false);
9049         kvm_init_mmu(vcpu, false);
9050         vcpu_put(vcpu);
9051         return 0;
9052 }
9053
9054 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
9055 {
9056         struct msr_data msr;
9057         struct kvm *kvm = vcpu->kvm;
9058
9059         kvm_hv_vcpu_postcreate(vcpu);
9060
9061         if (mutex_lock_killable(&vcpu->mutex))
9062                 return;
9063         vcpu_load(vcpu);
9064         msr.data = 0x0;
9065         msr.index = MSR_IA32_TSC;
9066         msr.host_initiated = true;
9067         kvm_write_tsc(vcpu, &msr);
9068         vcpu_put(vcpu);
9069
9070         /* poll control enabled by default */
9071         vcpu->arch.msr_kvm_poll_control = 1;
9072
9073         mutex_unlock(&vcpu->mutex);
9074
9075         if (!kvmclock_periodic_sync)
9076                 return;
9077
9078         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
9079                                         KVMCLOCK_SYNC_PERIOD);
9080 }
9081
9082 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
9083 {
9084         vcpu->arch.apf.msr_val = 0;
9085
9086         vcpu_load(vcpu);
9087         kvm_mmu_unload(vcpu);
9088         vcpu_put(vcpu);
9089
9090         kvm_x86_ops->vcpu_free(vcpu);
9091 }
9092
9093 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
9094 {
9095         kvm_lapic_reset(vcpu, init_event);
9096
9097         vcpu->arch.hflags = 0;
9098
9099         vcpu->arch.smi_pending = 0;
9100         vcpu->arch.smi_count = 0;
9101         atomic_set(&vcpu->arch.nmi_queued, 0);
9102         vcpu->arch.nmi_pending = 0;
9103         vcpu->arch.nmi_injected = false;
9104         kvm_clear_interrupt_queue(vcpu);
9105         kvm_clear_exception_queue(vcpu);
9106         vcpu->arch.exception.pending = false;
9107
9108         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
9109         kvm_update_dr0123(vcpu);
9110         vcpu->arch.dr6 = DR6_INIT;
9111         kvm_update_dr6(vcpu);
9112         vcpu->arch.dr7 = DR7_FIXED_1;
9113         kvm_update_dr7(vcpu);
9114
9115         vcpu->arch.cr2 = 0;
9116
9117         kvm_make_request(KVM_REQ_EVENT, vcpu);
9118         vcpu->arch.apf.msr_val = 0;
9119         vcpu->arch.st.msr_val = 0;
9120
9121         kvmclock_reset(vcpu);
9122
9123         kvm_clear_async_pf_completion_queue(vcpu);
9124         kvm_async_pf_hash_reset(vcpu);
9125         vcpu->arch.apf.halted = false;
9126
9127         if (kvm_mpx_supported()) {
9128                 void *mpx_state_buffer;
9129
9130                 /*
9131                  * To avoid have the INIT path from kvm_apic_has_events() that be
9132                  * called with loaded FPU and does not let userspace fix the state.
9133                  */
9134                 if (init_event)
9135                         kvm_put_guest_fpu(vcpu);
9136                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
9137                                         XFEATURE_BNDREGS);
9138                 if (mpx_state_buffer)
9139                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
9140                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
9141                                         XFEATURE_BNDCSR);
9142                 if (mpx_state_buffer)
9143                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
9144                 if (init_event)
9145                         kvm_load_guest_fpu(vcpu);
9146         }
9147
9148         if (!init_event) {
9149                 kvm_pmu_reset(vcpu);
9150                 vcpu->arch.smbase = 0x30000;
9151
9152                 vcpu->arch.msr_misc_features_enables = 0;
9153
9154                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
9155         }
9156
9157         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
9158         vcpu->arch.regs_avail = ~0;
9159         vcpu->arch.regs_dirty = ~0;
9160
9161         vcpu->arch.ia32_xss = 0;
9162
9163         kvm_x86_ops->vcpu_reset(vcpu, init_event);
9164 }
9165
9166 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
9167 {
9168         struct kvm_segment cs;
9169
9170         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
9171         cs.selector = vector << 8;
9172         cs.base = vector << 12;
9173         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
9174         kvm_rip_write(vcpu, 0);
9175 }
9176
9177 int kvm_arch_hardware_enable(void)
9178 {
9179         struct kvm *kvm;
9180         struct kvm_vcpu *vcpu;
9181         int i;
9182         int ret;
9183         u64 local_tsc;
9184         u64 max_tsc = 0;
9185         bool stable, backwards_tsc = false;
9186
9187         kvm_shared_msr_cpu_online();
9188         ret = kvm_x86_ops->hardware_enable();
9189         if (ret != 0)
9190                 return ret;
9191
9192         local_tsc = rdtsc();
9193         stable = !kvm_check_tsc_unstable();
9194         list_for_each_entry(kvm, &vm_list, vm_list) {
9195                 kvm_for_each_vcpu(i, vcpu, kvm) {
9196                         if (!stable && vcpu->cpu == smp_processor_id())
9197                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
9198                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
9199                                 backwards_tsc = true;
9200                                 if (vcpu->arch.last_host_tsc > max_tsc)
9201                                         max_tsc = vcpu->arch.last_host_tsc;
9202                         }
9203                 }
9204         }
9205
9206         /*
9207          * Sometimes, even reliable TSCs go backwards.  This happens on
9208          * platforms that reset TSC during suspend or hibernate actions, but
9209          * maintain synchronization.  We must compensate.  Fortunately, we can
9210          * detect that condition here, which happens early in CPU bringup,
9211          * before any KVM threads can be running.  Unfortunately, we can't
9212          * bring the TSCs fully up to date with real time, as we aren't yet far
9213          * enough into CPU bringup that we know how much real time has actually
9214          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
9215          * variables that haven't been updated yet.
9216          *
9217          * So we simply find the maximum observed TSC above, then record the
9218          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
9219          * the adjustment will be applied.  Note that we accumulate
9220          * adjustments, in case multiple suspend cycles happen before some VCPU
9221          * gets a chance to run again.  In the event that no KVM threads get a
9222          * chance to run, we will miss the entire elapsed period, as we'll have
9223          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
9224          * loose cycle time.  This isn't too big a deal, since the loss will be
9225          * uniform across all VCPUs (not to mention the scenario is extremely
9226          * unlikely). It is possible that a second hibernate recovery happens
9227          * much faster than a first, causing the observed TSC here to be
9228          * smaller; this would require additional padding adjustment, which is
9229          * why we set last_host_tsc to the local tsc observed here.
9230          *
9231          * N.B. - this code below runs only on platforms with reliable TSC,
9232          * as that is the only way backwards_tsc is set above.  Also note
9233          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
9234          * have the same delta_cyc adjustment applied if backwards_tsc
9235          * is detected.  Note further, this adjustment is only done once,
9236          * as we reset last_host_tsc on all VCPUs to stop this from being
9237          * called multiple times (one for each physical CPU bringup).
9238          *
9239          * Platforms with unreliable TSCs don't have to deal with this, they
9240          * will be compensated by the logic in vcpu_load, which sets the TSC to
9241          * catchup mode.  This will catchup all VCPUs to real time, but cannot
9242          * guarantee that they stay in perfect synchronization.
9243          */
9244         if (backwards_tsc) {
9245                 u64 delta_cyc = max_tsc - local_tsc;
9246                 list_for_each_entry(kvm, &vm_list, vm_list) {
9247                         kvm->arch.backwards_tsc_observed = true;
9248                         kvm_for_each_vcpu(i, vcpu, kvm) {
9249                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
9250                                 vcpu->arch.last_host_tsc = local_tsc;
9251                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
9252                         }
9253
9254                         /*
9255                          * We have to disable TSC offset matching.. if you were
9256                          * booting a VM while issuing an S4 host suspend....
9257                          * you may have some problem.  Solving this issue is
9258                          * left as an exercise to the reader.
9259                          */
9260                         kvm->arch.last_tsc_nsec = 0;
9261                         kvm->arch.last_tsc_write = 0;
9262                 }
9263
9264         }
9265         return 0;
9266 }
9267
9268 void kvm_arch_hardware_disable(void)
9269 {
9270         kvm_x86_ops->hardware_disable();
9271         drop_user_return_notifiers();
9272 }
9273
9274 int kvm_arch_hardware_setup(void)
9275 {
9276         int r;
9277
9278         r = kvm_x86_ops->hardware_setup();
9279         if (r != 0)
9280                 return r;
9281
9282         if (kvm_has_tsc_control) {
9283                 /*
9284                  * Make sure the user can only configure tsc_khz values that
9285                  * fit into a signed integer.
9286                  * A min value is not calculated because it will always
9287                  * be 1 on all machines.
9288                  */
9289                 u64 max = min(0x7fffffffULL,
9290                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
9291                 kvm_max_guest_tsc_khz = max;
9292
9293                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
9294         }
9295
9296         kvm_init_msr_list();
9297         return 0;
9298 }
9299
9300 void kvm_arch_hardware_unsetup(void)
9301 {
9302         kvm_x86_ops->hardware_unsetup();
9303 }
9304
9305 int kvm_arch_check_processor_compat(void)
9306 {
9307         return kvm_x86_ops->check_processor_compatibility();
9308 }
9309
9310 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
9311 {
9312         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
9313 }
9314 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
9315
9316 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
9317 {
9318         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
9319 }
9320
9321 struct static_key kvm_no_apic_vcpu __read_mostly;
9322 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
9323
9324 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
9325 {
9326         struct page *page;
9327         int r;
9328
9329         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
9330         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
9331                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9332         else
9333                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
9334
9335         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
9336         if (!page) {
9337                 r = -ENOMEM;
9338                 goto fail;
9339         }
9340         vcpu->arch.pio_data = page_address(page);
9341
9342         kvm_set_tsc_khz(vcpu, max_tsc_khz);
9343
9344         r = kvm_mmu_create(vcpu);
9345         if (r < 0)
9346                 goto fail_free_pio_data;
9347
9348         if (irqchip_in_kernel(vcpu->kvm)) {
9349                 vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv(vcpu);
9350                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
9351                 if (r < 0)
9352                         goto fail_mmu_destroy;
9353         } else
9354                 static_key_slow_inc(&kvm_no_apic_vcpu);
9355
9356         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
9357                                        GFP_KERNEL_ACCOUNT);
9358         if (!vcpu->arch.mce_banks) {
9359                 r = -ENOMEM;
9360                 goto fail_free_lapic;
9361         }
9362         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
9363
9364         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
9365                                 GFP_KERNEL_ACCOUNT)) {
9366                 r = -ENOMEM;
9367                 goto fail_free_mce_banks;
9368         }
9369
9370         fx_init(vcpu);
9371
9372         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
9373
9374         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
9375
9376         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
9377
9378         kvm_async_pf_hash_reset(vcpu);
9379         kvm_pmu_init(vcpu);
9380
9381         vcpu->arch.pending_external_vector = -1;
9382         vcpu->arch.preempted_in_kernel = false;
9383
9384         kvm_hv_vcpu_init(vcpu);
9385
9386         return 0;
9387
9388 fail_free_mce_banks:
9389         kfree(vcpu->arch.mce_banks);
9390 fail_free_lapic:
9391         kvm_free_lapic(vcpu);
9392 fail_mmu_destroy:
9393         kvm_mmu_destroy(vcpu);
9394 fail_free_pio_data:
9395         free_page((unsigned long)vcpu->arch.pio_data);
9396 fail:
9397         return r;
9398 }
9399
9400 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
9401 {
9402         int idx;
9403
9404         kvm_hv_vcpu_uninit(vcpu);
9405         kvm_pmu_destroy(vcpu);
9406         kfree(vcpu->arch.mce_banks);
9407         kvm_free_lapic(vcpu);
9408         idx = srcu_read_lock(&vcpu->kvm->srcu);
9409         kvm_mmu_destroy(vcpu);
9410         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9411         free_page((unsigned long)vcpu->arch.pio_data);
9412         if (!lapic_in_kernel(vcpu))
9413                 static_key_slow_dec(&kvm_no_apic_vcpu);
9414 }
9415
9416 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
9417 {
9418         vcpu->arch.l1tf_flush_l1d = true;
9419         kvm_x86_ops->sched_in(vcpu, cpu);
9420 }
9421
9422 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
9423 {
9424         if (type)
9425                 return -EINVAL;
9426
9427         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
9428         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
9429         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
9430         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
9431         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
9432
9433         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
9434         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
9435         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
9436         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
9437                 &kvm->arch.irq_sources_bitmap);
9438
9439         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
9440         mutex_init(&kvm->arch.apic_map_lock);
9441         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
9442
9443         kvm->arch.kvmclock_offset = -ktime_get_boottime_ns();
9444         pvclock_update_vm_gtod_copy(kvm);
9445
9446         kvm->arch.guest_can_read_msr_platform_info = true;
9447
9448         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
9449         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
9450
9451         kvm_hv_init_vm(kvm);
9452         kvm_page_track_init(kvm);
9453         kvm_mmu_init_vm(kvm);
9454
9455         return kvm_x86_ops->vm_init(kvm);
9456 }
9457
9458 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
9459 {
9460         vcpu_load(vcpu);
9461         kvm_mmu_unload(vcpu);
9462         vcpu_put(vcpu);
9463 }
9464
9465 static void kvm_free_vcpus(struct kvm *kvm)
9466 {
9467         unsigned int i;
9468         struct kvm_vcpu *vcpu;
9469
9470         /*
9471          * Unpin any mmu pages first.
9472          */
9473         kvm_for_each_vcpu(i, vcpu, kvm) {
9474                 kvm_clear_async_pf_completion_queue(vcpu);
9475                 kvm_unload_vcpu_mmu(vcpu);
9476         }
9477         kvm_for_each_vcpu(i, vcpu, kvm)
9478                 kvm_arch_vcpu_free(vcpu);
9479
9480         mutex_lock(&kvm->lock);
9481         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
9482                 kvm->vcpus[i] = NULL;
9483
9484         atomic_set(&kvm->online_vcpus, 0);
9485         mutex_unlock(&kvm->lock);
9486 }
9487
9488 void kvm_arch_sync_events(struct kvm *kvm)
9489 {
9490         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
9491         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
9492         kvm_free_pit(kvm);
9493 }
9494
9495 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
9496 {
9497         int i, r;
9498         unsigned long hva;
9499         struct kvm_memslots *slots = kvm_memslots(kvm);
9500         struct kvm_memory_slot *slot, old;
9501
9502         /* Called with kvm->slots_lock held.  */
9503         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
9504                 return -EINVAL;
9505
9506         slot = id_to_memslot(slots, id);
9507         if (size) {
9508                 if (slot->npages)
9509                         return -EEXIST;
9510
9511                 /*
9512                  * MAP_SHARED to prevent internal slot pages from being moved
9513                  * by fork()/COW.
9514                  */
9515                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
9516                               MAP_SHARED | MAP_ANONYMOUS, 0);
9517                 if (IS_ERR((void *)hva))
9518                         return PTR_ERR((void *)hva);
9519         } else {
9520                 if (!slot->npages)
9521                         return 0;
9522
9523                 hva = 0;
9524         }
9525
9526         old = *slot;
9527         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
9528                 struct kvm_userspace_memory_region m;
9529
9530                 m.slot = id | (i << 16);
9531                 m.flags = 0;
9532                 m.guest_phys_addr = gpa;
9533                 m.userspace_addr = hva;
9534                 m.memory_size = size;
9535                 r = __kvm_set_memory_region(kvm, &m);
9536                 if (r < 0)
9537                         return r;
9538         }
9539
9540         if (!size)
9541                 vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
9542
9543         return 0;
9544 }
9545 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
9546
9547 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
9548 {
9549         int r;
9550
9551         mutex_lock(&kvm->slots_lock);
9552         r = __x86_set_memory_region(kvm, id, gpa, size);
9553         mutex_unlock(&kvm->slots_lock);
9554
9555         return r;
9556 }
9557 EXPORT_SYMBOL_GPL(x86_set_memory_region);
9558
9559 void kvm_arch_destroy_vm(struct kvm *kvm)
9560 {
9561         if (current->mm == kvm->mm) {
9562                 /*
9563                  * Free memory regions allocated on behalf of userspace,
9564                  * unless the the memory map has changed due to process exit
9565                  * or fd copying.
9566                  */
9567                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
9568                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
9569                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
9570         }
9571         if (kvm_x86_ops->vm_destroy)
9572                 kvm_x86_ops->vm_destroy(kvm);
9573         kvm_pic_destroy(kvm);
9574         kvm_ioapic_destroy(kvm);
9575         kvm_free_vcpus(kvm);
9576         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
9577         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
9578         kvm_mmu_uninit_vm(kvm);
9579         kvm_page_track_cleanup(kvm);
9580         kvm_hv_destroy_vm(kvm);
9581 }
9582
9583 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
9584                            struct kvm_memory_slot *dont)
9585 {
9586         int i;
9587
9588         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9589                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
9590                         kvfree(free->arch.rmap[i]);
9591                         free->arch.rmap[i] = NULL;
9592                 }
9593                 if (i == 0)
9594                         continue;
9595
9596                 if (!dont || free->arch.lpage_info[i - 1] !=
9597                              dont->arch.lpage_info[i - 1]) {
9598                         kvfree(free->arch.lpage_info[i - 1]);
9599                         free->arch.lpage_info[i - 1] = NULL;
9600                 }
9601         }
9602
9603         kvm_page_track_free_memslot(free, dont);
9604 }
9605
9606 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
9607                             unsigned long npages)
9608 {
9609         int i;
9610
9611         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9612                 struct kvm_lpage_info *linfo;
9613                 unsigned long ugfn;
9614                 int lpages;
9615                 int level = i + 1;
9616
9617                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
9618                                       slot->base_gfn, level) + 1;
9619
9620                 slot->arch.rmap[i] =
9621                         kvcalloc(lpages, sizeof(*slot->arch.rmap[i]),
9622                                  GFP_KERNEL_ACCOUNT);
9623                 if (!slot->arch.rmap[i])
9624                         goto out_free;
9625                 if (i == 0)
9626                         continue;
9627
9628                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
9629                 if (!linfo)
9630                         goto out_free;
9631
9632                 slot->arch.lpage_info[i - 1] = linfo;
9633
9634                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
9635                         linfo[0].disallow_lpage = 1;
9636                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
9637                         linfo[lpages - 1].disallow_lpage = 1;
9638                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
9639                 /*
9640                  * If the gfn and userspace address are not aligned wrt each
9641                  * other, or if explicitly asked to, disable large page
9642                  * support for this slot
9643                  */
9644                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
9645                     !kvm_largepages_enabled()) {
9646                         unsigned long j;
9647
9648                         for (j = 0; j < lpages; ++j)
9649                                 linfo[j].disallow_lpage = 1;
9650                 }
9651         }
9652
9653         if (kvm_page_track_create_memslot(slot, npages))
9654                 goto out_free;
9655
9656         return 0;
9657
9658 out_free:
9659         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9660                 kvfree(slot->arch.rmap[i]);
9661                 slot->arch.rmap[i] = NULL;
9662                 if (i == 0)
9663                         continue;
9664
9665                 kvfree(slot->arch.lpage_info[i - 1]);
9666                 slot->arch.lpage_info[i - 1] = NULL;
9667         }
9668         return -ENOMEM;
9669 }
9670
9671 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
9672 {
9673         /*
9674          * memslots->generation has been incremented.
9675          * mmio generation may have reached its maximum value.
9676          */
9677         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
9678 }
9679
9680 int kvm_arch_prepare_memory_region(struct kvm *kvm,
9681                                 struct kvm_memory_slot *memslot,
9682                                 const struct kvm_userspace_memory_region *mem,
9683                                 enum kvm_mr_change change)
9684 {
9685         return 0;
9686 }
9687
9688 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
9689                                      struct kvm_memory_slot *new)
9690 {
9691         /* Still write protect RO slot */
9692         if (new->flags & KVM_MEM_READONLY) {
9693                 kvm_mmu_slot_remove_write_access(kvm, new);
9694                 return;
9695         }
9696
9697         /*
9698          * Call kvm_x86_ops dirty logging hooks when they are valid.
9699          *
9700          * kvm_x86_ops->slot_disable_log_dirty is called when:
9701          *
9702          *  - KVM_MR_CREATE with dirty logging is disabled
9703          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
9704          *
9705          * The reason is, in case of PML, we need to set D-bit for any slots
9706          * with dirty logging disabled in order to eliminate unnecessary GPA
9707          * logging in PML buffer (and potential PML buffer full VMEXT). This
9708          * guarantees leaving PML enabled during guest's lifetime won't have
9709          * any additional overhead from PML when guest is running with dirty
9710          * logging disabled for memory slots.
9711          *
9712          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
9713          * to dirty logging mode.
9714          *
9715          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
9716          *
9717          * In case of write protect:
9718          *
9719          * Write protect all pages for dirty logging.
9720          *
9721          * All the sptes including the large sptes which point to this
9722          * slot are set to readonly. We can not create any new large
9723          * spte on this slot until the end of the logging.
9724          *
9725          * See the comments in fast_page_fault().
9726          */
9727         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
9728                 if (kvm_x86_ops->slot_enable_log_dirty)
9729                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
9730                 else
9731                         kvm_mmu_slot_remove_write_access(kvm, new);
9732         } else {
9733                 if (kvm_x86_ops->slot_disable_log_dirty)
9734                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
9735         }
9736 }
9737
9738 void kvm_arch_commit_memory_region(struct kvm *kvm,
9739                                 const struct kvm_userspace_memory_region *mem,
9740                                 const struct kvm_memory_slot *old,
9741                                 const struct kvm_memory_slot *new,
9742                                 enum kvm_mr_change change)
9743 {
9744         if (!kvm->arch.n_requested_mmu_pages)
9745                 kvm_mmu_change_mmu_pages(kvm,
9746                                 kvm_mmu_calculate_default_mmu_pages(kvm));
9747
9748         /*
9749          * Dirty logging tracks sptes in 4k granularity, meaning that large
9750          * sptes have to be split.  If live migration is successful, the guest
9751          * in the source machine will be destroyed and large sptes will be
9752          * created in the destination. However, if the guest continues to run
9753          * in the source machine (for example if live migration fails), small
9754          * sptes will remain around and cause bad performance.
9755          *
9756          * Scan sptes if dirty logging has been stopped, dropping those
9757          * which can be collapsed into a single large-page spte.  Later
9758          * page faults will create the large-page sptes.
9759          *
9760          * There is no need to do this in any of the following cases:
9761          * CREATE:      No dirty mappings will already exist.
9762          * MOVE/DELETE: The old mappings will already have been cleaned up by
9763          *              kvm_arch_flush_shadow_memslot()
9764          */
9765         if (change == KVM_MR_FLAGS_ONLY &&
9766                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
9767                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
9768                 kvm_mmu_zap_collapsible_sptes(kvm, new);
9769
9770         /*
9771          * Set up write protection and/or dirty logging for the new slot.
9772          *
9773          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
9774          * been zapped so no dirty logging staff is needed for old slot. For
9775          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
9776          * new and it's also covered when dealing with the new slot.
9777          *
9778          * FIXME: const-ify all uses of struct kvm_memory_slot.
9779          */
9780         if (change != KVM_MR_DELETE)
9781                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
9782 }
9783
9784 void kvm_arch_flush_shadow_all(struct kvm *kvm)
9785 {
9786         kvm_mmu_zap_all(kvm);
9787 }
9788
9789 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
9790                                    struct kvm_memory_slot *slot)
9791 {
9792         kvm_page_track_flush_slot(kvm, slot);
9793 }
9794
9795 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
9796 {
9797         return (is_guest_mode(vcpu) &&
9798                         kvm_x86_ops->guest_apic_has_interrupt &&
9799                         kvm_x86_ops->guest_apic_has_interrupt(vcpu));
9800 }
9801
9802 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
9803 {
9804         if (!list_empty_careful(&vcpu->async_pf.done))
9805                 return true;
9806
9807         if (kvm_apic_has_events(vcpu))
9808                 return true;
9809
9810         if (vcpu->arch.pv.pv_unhalted)
9811                 return true;
9812
9813         if (vcpu->arch.exception.pending)
9814                 return true;
9815
9816         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
9817             (vcpu->arch.nmi_pending &&
9818              kvm_x86_ops->nmi_allowed(vcpu)))
9819                 return true;
9820
9821         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
9822             (vcpu->arch.smi_pending && !is_smm(vcpu)))
9823                 return true;
9824
9825         if (kvm_arch_interrupt_allowed(vcpu) &&
9826             (kvm_cpu_has_interrupt(vcpu) ||
9827             kvm_guest_apic_has_interrupt(vcpu)))
9828                 return true;
9829
9830         if (kvm_hv_has_stimer_pending(vcpu))
9831                 return true;
9832
9833         return false;
9834 }
9835
9836 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
9837 {
9838         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
9839 }
9840
9841 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
9842 {
9843         if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
9844                 return true;
9845
9846         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
9847                 kvm_test_request(KVM_REQ_SMI, vcpu) ||
9848                  kvm_test_request(KVM_REQ_EVENT, vcpu))
9849                 return true;
9850
9851         if (vcpu->arch.apicv_active && kvm_x86_ops->dy_apicv_has_pending_interrupt(vcpu))
9852                 return true;
9853
9854         return false;
9855 }
9856
9857 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
9858 {
9859         return vcpu->arch.preempted_in_kernel;
9860 }
9861
9862 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
9863 {
9864         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
9865 }
9866
9867 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
9868 {
9869         return kvm_x86_ops->interrupt_allowed(vcpu);
9870 }
9871
9872 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
9873 {
9874         if (is_64_bit_mode(vcpu))
9875                 return kvm_rip_read(vcpu);
9876         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
9877                      kvm_rip_read(vcpu));
9878 }
9879 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
9880
9881 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
9882 {
9883         return kvm_get_linear_rip(vcpu) == linear_rip;
9884 }
9885 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
9886
9887 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
9888 {
9889         unsigned long rflags;
9890
9891         rflags = kvm_x86_ops->get_rflags(vcpu);
9892         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
9893                 rflags &= ~X86_EFLAGS_TF;
9894         return rflags;
9895 }
9896 EXPORT_SYMBOL_GPL(kvm_get_rflags);
9897
9898 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
9899 {
9900         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
9901             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
9902                 rflags |= X86_EFLAGS_TF;
9903         kvm_x86_ops->set_rflags(vcpu, rflags);
9904 }
9905
9906 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
9907 {
9908         __kvm_set_rflags(vcpu, rflags);
9909         kvm_make_request(KVM_REQ_EVENT, vcpu);
9910 }
9911 EXPORT_SYMBOL_GPL(kvm_set_rflags);
9912
9913 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
9914 {
9915         int r;
9916
9917         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
9918               work->wakeup_all)
9919                 return;
9920
9921         r = kvm_mmu_reload(vcpu);
9922         if (unlikely(r))
9923                 return;
9924
9925         if (!vcpu->arch.mmu->direct_map &&
9926               work->arch.cr3 != vcpu->arch.mmu->get_cr3(vcpu))
9927                 return;
9928
9929         vcpu->arch.mmu->page_fault(vcpu, work->gva, 0, true);
9930 }
9931
9932 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
9933 {
9934         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
9935 }
9936
9937 static inline u32 kvm_async_pf_next_probe(u32 key)
9938 {
9939         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
9940 }
9941
9942 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9943 {
9944         u32 key = kvm_async_pf_hash_fn(gfn);
9945
9946         while (vcpu->arch.apf.gfns[key] != ~0)
9947                 key = kvm_async_pf_next_probe(key);
9948
9949         vcpu->arch.apf.gfns[key] = gfn;
9950 }
9951
9952 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
9953 {
9954         int i;
9955         u32 key = kvm_async_pf_hash_fn(gfn);
9956
9957         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
9958                      (vcpu->arch.apf.gfns[key] != gfn &&
9959                       vcpu->arch.apf.gfns[key] != ~0); i++)
9960                 key = kvm_async_pf_next_probe(key);
9961
9962         return key;
9963 }
9964
9965 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9966 {
9967         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
9968 }
9969
9970 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9971 {
9972         u32 i, j, k;
9973
9974         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
9975         while (true) {
9976                 vcpu->arch.apf.gfns[i] = ~0;
9977                 do {
9978                         j = kvm_async_pf_next_probe(j);
9979                         if (vcpu->arch.apf.gfns[j] == ~0)
9980                                 return;
9981                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
9982                         /*
9983                          * k lies cyclically in ]i,j]
9984                          * |    i.k.j |
9985                          * |....j i.k.| or  |.k..j i...|
9986                          */
9987                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
9988                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
9989                 i = j;
9990         }
9991 }
9992
9993 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
9994 {
9995
9996         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
9997                                       sizeof(val));
9998 }
9999
10000 static int apf_get_user(struct kvm_vcpu *vcpu, u32 *val)
10001 {
10002
10003         return kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, val,
10004                                       sizeof(u32));
10005 }
10006
10007 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
10008 {
10009         if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
10010                 return false;
10011
10012         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
10013             (vcpu->arch.apf.send_user_only &&
10014              kvm_x86_ops->get_cpl(vcpu) == 0))
10015                 return false;
10016
10017         return true;
10018 }
10019
10020 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
10021 {
10022         if (unlikely(!lapic_in_kernel(vcpu) ||
10023                      kvm_event_needs_reinjection(vcpu) ||
10024                      vcpu->arch.exception.pending))
10025                 return false;
10026
10027         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
10028                 return false;
10029
10030         /*
10031          * If interrupts are off we cannot even use an artificial
10032          * halt state.
10033          */
10034         return kvm_x86_ops->interrupt_allowed(vcpu);
10035 }
10036
10037 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
10038                                      struct kvm_async_pf *work)
10039 {
10040         struct x86_exception fault;
10041
10042         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
10043         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
10044
10045         if (kvm_can_deliver_async_pf(vcpu) &&
10046             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
10047                 fault.vector = PF_VECTOR;
10048                 fault.error_code_valid = true;
10049                 fault.error_code = 0;
10050                 fault.nested_page_fault = false;
10051                 fault.address = work->arch.token;
10052                 fault.async_page_fault = true;
10053                 kvm_inject_page_fault(vcpu, &fault);
10054         } else {
10055                 /*
10056                  * It is not possible to deliver a paravirtualized asynchronous
10057                  * page fault, but putting the guest in an artificial halt state
10058                  * can be beneficial nevertheless: if an interrupt arrives, we
10059                  * can deliver it timely and perhaps the guest will schedule
10060                  * another process.  When the instruction that triggered a page
10061                  * fault is retried, hopefully the page will be ready in the host.
10062                  */
10063                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
10064         }
10065 }
10066
10067 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
10068                                  struct kvm_async_pf *work)
10069 {
10070         struct x86_exception fault;
10071         u32 val;
10072
10073         if (work->wakeup_all)
10074                 work->arch.token = ~0; /* broadcast wakeup */
10075         else
10076                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
10077         trace_kvm_async_pf_ready(work->arch.token, work->gva);
10078
10079         if (vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED &&
10080             !apf_get_user(vcpu, &val)) {
10081                 if (val == KVM_PV_REASON_PAGE_NOT_PRESENT &&
10082                     vcpu->arch.exception.pending &&
10083                     vcpu->arch.exception.nr == PF_VECTOR &&
10084                     !apf_put_user(vcpu, 0)) {
10085                         vcpu->arch.exception.injected = false;
10086                         vcpu->arch.exception.pending = false;
10087                         vcpu->arch.exception.nr = 0;
10088                         vcpu->arch.exception.has_error_code = false;
10089                         vcpu->arch.exception.error_code = 0;
10090                         vcpu->arch.exception.has_payload = false;
10091                         vcpu->arch.exception.payload = 0;
10092                 } else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
10093                         fault.vector = PF_VECTOR;
10094                         fault.error_code_valid = true;
10095                         fault.error_code = 0;
10096                         fault.nested_page_fault = false;
10097                         fault.address = work->arch.token;
10098                         fault.async_page_fault = true;
10099                         kvm_inject_page_fault(vcpu, &fault);
10100                 }
10101         }
10102         vcpu->arch.apf.halted = false;
10103         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10104 }
10105
10106 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
10107 {
10108         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
10109                 return true;
10110         else
10111                 return kvm_can_do_async_pf(vcpu);
10112 }
10113
10114 void kvm_arch_start_assignment(struct kvm *kvm)
10115 {
10116         atomic_inc(&kvm->arch.assigned_device_count);
10117 }
10118 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
10119
10120 void kvm_arch_end_assignment(struct kvm *kvm)
10121 {
10122         atomic_dec(&kvm->arch.assigned_device_count);
10123 }
10124 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
10125
10126 bool kvm_arch_has_assigned_device(struct kvm *kvm)
10127 {
10128         return atomic_read(&kvm->arch.assigned_device_count);
10129 }
10130 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
10131
10132 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
10133 {
10134         atomic_inc(&kvm->arch.noncoherent_dma_count);
10135 }
10136 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
10137
10138 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
10139 {
10140         atomic_dec(&kvm->arch.noncoherent_dma_count);
10141 }
10142 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
10143
10144 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
10145 {
10146         return atomic_read(&kvm->arch.noncoherent_dma_count);
10147 }
10148 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
10149
10150 bool kvm_arch_has_irq_bypass(void)
10151 {
10152         return true;
10153 }
10154
10155 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
10156                                       struct irq_bypass_producer *prod)
10157 {
10158         struct kvm_kernel_irqfd *irqfd =
10159                 container_of(cons, struct kvm_kernel_irqfd, consumer);
10160
10161         irqfd->producer = prod;
10162
10163         return kvm_x86_ops->update_pi_irte(irqfd->kvm,
10164                                            prod->irq, irqfd->gsi, 1);
10165 }
10166
10167 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
10168                                       struct irq_bypass_producer *prod)
10169 {
10170         int ret;
10171         struct kvm_kernel_irqfd *irqfd =
10172                 container_of(cons, struct kvm_kernel_irqfd, consumer);
10173
10174         WARN_ON(irqfd->producer != prod);
10175         irqfd->producer = NULL;
10176
10177         /*
10178          * When producer of consumer is unregistered, we change back to
10179          * remapped mode, so we can re-use the current implementation
10180          * when the irq is masked/disabled or the consumer side (KVM
10181          * int this case doesn't want to receive the interrupts.
10182         */
10183         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
10184         if (ret)
10185                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
10186                        " fails: %d\n", irqfd->consumer.token, ret);
10187 }
10188
10189 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
10190                                    uint32_t guest_irq, bool set)
10191 {
10192         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
10193 }
10194
10195 bool kvm_vector_hashing_enabled(void)
10196 {
10197         return vector_hashing;
10198 }
10199 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
10200
10201 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
10202 {
10203         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
10204 }
10205 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
10206
10207
10208 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
10209 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
10210 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
10211 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
10212 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
10213 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
10214 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
10215 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
10216 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
10217 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
10218 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
10219 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
10220 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
10221 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
10222 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
10223 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
10224 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
10225 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
10226 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
10227 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);