arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30
  31 #include <linux/clocksource.h>
  32 #include <linux/interrupt.h>
  33 #include <linux/kvm.h>
  34 #include <linux/fs.h>
  35 #include <linux/vmalloc.h>
  36 #include <linux/module.h>
  37 #include <linux/mman.h>
  38 #include <linux/highmem.h>
  39 #include <linux/iommu.h>
  40 #include <linux/intel-iommu.h>
  41 #include <linux/cpufreq.h>
  42 #include <linux/user-return-notifier.h>
  43 #include <linux/srcu.h>
  44 #include <linux/slab.h>
  45 #include <linux/perf_event.h>
  46 #include <linux/uaccess.h>
  47 #include <linux/hash.h>
  48 #include <linux/pci.h>
  49 #include <linux/timekeeper_internal.h>
  50 #include <linux/pvclock_gtod.h>
  51 #include <trace/events/kvm.h>
  52
  53 #define CREATE_TRACE_POINTS
  54 #include "trace.h"
  55
  56 #include <asm/debugreg.h>
  57 #include <asm/msr.h>
  58 #include <asm/desc.h>
  59 #include <asm/mtrr.h>
  60 #include <asm/mce.h>
  61 #include <asm/i387.h>
  62 #include <asm/fpu-internal.h> /* Ugh! */
  63 #include <asm/xcr.h>
  64 #include <asm/pvclock.h>
  65 #include <asm/div64.h>
  66
  67 #define MAX_IO_MSRS 256
  68 #define KVM_MAX_MCE_BANKS 32
  69 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  70
  71 #define emul_to_vcpu(ctxt) \
  72         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  73
  74 /* EFER defaults:
  75  * - enable syscall per default because its emulated by KVM
  76  * - enable LME and LMA per default on 64 bit KVM
  77  */
  78 #ifdef CONFIG_X86_64
  79 static
  80 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  81 #else
  82 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  83 #endif
  84
  85 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  86 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  87
  88 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  89 static void process_nmi(struct kvm_vcpu *vcpu);
  90
  91 struct kvm_x86_ops *kvm_x86_ops;
  92 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  93
  94 static bool ignore_msrs = 0;
  95 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
  96
  97 unsigned int min_timer_period_us = 500;
  98 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
  99
 100 bool kvm_has_tsc_control;
 101 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 102 u32  kvm_max_guest_tsc_khz;
 103 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 104
 105 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 106 static u32 tsc_tolerance_ppm = 250;
 107 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 108
 109 #define KVM_NR_SHARED_MSRS 16
 110
 111 struct kvm_shared_msrs_global {
 112         int nr;
 113         u32 msrs[KVM_NR_SHARED_MSRS];
 114 };
 115
 116 struct kvm_shared_msrs {
 117         struct user_return_notifier urn;
 118         bool registered;
 119         struct kvm_shared_msr_values {
 120                 u64 host;
 121                 u64 curr;
 122         } values[KVM_NR_SHARED_MSRS];
 123 };
 124
 125 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 126 static struct kvm_shared_msrs __percpu *shared_msrs;
 127
 128 struct kvm_stats_debugfs_item debugfs_entries[] = {
 129         { "pf_fixed", VCPU_STAT(pf_fixed) },
 130         { "pf_guest", VCPU_STAT(pf_guest) },
 131         { "tlb_flush", VCPU_STAT(tlb_flush) },
 132         { "invlpg", VCPU_STAT(invlpg) },
 133         { "exits", VCPU_STAT(exits) },
 134         { "io_exits", VCPU_STAT(io_exits) },
 135         { "mmio_exits", VCPU_STAT(mmio_exits) },
 136         { "signal_exits", VCPU_STAT(signal_exits) },
 137         { "irq_window", VCPU_STAT(irq_window_exits) },
 138         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 139         { "halt_exits", VCPU_STAT(halt_exits) },
 140         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 141         { "hypercalls", VCPU_STAT(hypercalls) },
 142         { "request_irq", VCPU_STAT(request_irq_exits) },
 143         { "irq_exits", VCPU_STAT(irq_exits) },
 144         { "host_state_reload", VCPU_STAT(host_state_reload) },
 145         { "efer_reload", VCPU_STAT(efer_reload) },
 146         { "fpu_reload", VCPU_STAT(fpu_reload) },
 147         { "insn_emulation", VCPU_STAT(insn_emulation) },
 148         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 149         { "irq_injections", VCPU_STAT(irq_injections) },
 150         { "nmi_injections", VCPU_STAT(nmi_injections) },
 151         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 152         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 153         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 154         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 155         { "mmu_flooded", VM_STAT(mmu_flooded) },
 156         { "mmu_recycled", VM_STAT(mmu_recycled) },
 157         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 158         { "mmu_unsync", VM_STAT(mmu_unsync) },
 159         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 160         { "largepages", VM_STAT(lpages) },
 161         { NULL }
 162 };
 163
 164 u64 __read_mostly host_xcr0;
 165
 166 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 167
 168 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 169 {
 170         int i;
 171         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 172                 vcpu->arch.apf.gfns[i] = ~0;
 173 }
 174
 175 static void kvm_on_user_return(struct user_return_notifier *urn)
 176 {
 177         unsigned slot;
 178         struct kvm_shared_msrs *locals
 179                 = container_of(urn, struct kvm_shared_msrs, urn);
 180         struct kvm_shared_msr_values *values;
 181
 182         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 183                 values = &locals->values[slot];
 184                 if (values->host != values->curr) {
 185                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 186                         values->curr = values->host;
 187                 }
 188         }
 189         locals->registered = false;
 190         user_return_notifier_unregister(urn);
 191 }
 192
 193 static void shared_msr_update(unsigned slot, u32 msr)
 194 {
 195         u64 value;
 196         unsigned int cpu = smp_processor_id();
 197         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 198
 199         /* only read, and nobody should modify it at this time,
 200          * so don't need lock */
 201         if (slot >= shared_msrs_global.nr) {
 202                 printk(KERN_ERR "kvm: invalid MSR slot!");
 203                 return;
 204         }
 205         rdmsrl_safe(msr, &value);
 206         smsr->values[slot].host = value;
 207         smsr->values[slot].curr = value;
 208 }
 209
 210 void kvm_define_shared_msr(unsigned slot, u32 msr)
 211 {
 212         if (slot >= shared_msrs_global.nr)
 213                 shared_msrs_global.nr = slot + 1;
 214         shared_msrs_global.msrs[slot] = msr;
 215         /* we need ensured the shared_msr_global have been updated */
 216         smp_wmb();
 217 }
 218 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 219
 220 static void kvm_shared_msr_cpu_online(void)
 221 {
 222         unsigned i;
 223
 224         for (i = 0; i < shared_msrs_global.nr; ++i)
 225                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 226 }
 227
 228 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 229 {
 230         unsigned int cpu = smp_processor_id();
 231         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 232
 233         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 234                 return;
 235         smsr->values[slot].curr = value;
 236         wrmsrl(shared_msrs_global.msrs[slot], value);
 237         if (!smsr->registered) {
 238                 smsr->urn.on_user_return = kvm_on_user_return;
 239                 user_return_notifier_register(&smsr->urn);
 240                 smsr->registered = true;
 241         }
 242 }
 243 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 244
 245 static void drop_user_return_notifiers(void *ignore)
 246 {
 247         unsigned int cpu = smp_processor_id();
 248         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 249
 250         if (smsr->registered)
 251                 kvm_on_user_return(&smsr->urn);
 252 }
 253
 254 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 255 {
 256         return vcpu->arch.apic_base;
 257 }
 258 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 259
 260 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 261 {
 262         u64 old_state = vcpu->arch.apic_base &
 263                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 264         u64 new_state = msr_info->data &
 265                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 266         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) |
 267                 0x2ff | (guest_cpuid_has_x2apic(vcpu) ? 0 : X2APIC_ENABLE);
 268
 269         if (!msr_info->host_initiated &&
 270             ((msr_info->data & reserved_bits) != 0 ||
 271              new_state == X2APIC_ENABLE ||
 272              (new_state == MSR_IA32_APICBASE_ENABLE &&
 273               old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
 274              (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
 275               old_state == 0)))
 276                 return 1;
 277
 278         kvm_lapic_set_base(vcpu, msr_info->data);
 279         return 0;
 280 }
 281 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 282
 283 asmlinkage void kvm_spurious_fault(void)
 284 {
 285         /* Fault while not rebooting.  We want the trace. */
 286         BUG();
 287 }
 288 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 289
 290 #define EXCPT_BENIGN            0
 291 #define EXCPT_CONTRIBUTORY      1
 292 #define EXCPT_PF                2
 293
 294 static int exception_class(int vector)
 295 {
 296         switch (vector) {
 297         case PF_VECTOR:
 298                 return EXCPT_PF;
 299         case DE_VECTOR:
 300         case TS_VECTOR:
 301         case NP_VECTOR:
 302         case SS_VECTOR:
 303         case GP_VECTOR:
 304                 return EXCPT_CONTRIBUTORY;
 305         default:
 306                 break;
 307         }
 308         return EXCPT_BENIGN;
 309 }
 310
 311 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 312                 unsigned nr, bool has_error, u32 error_code,
 313                 bool reinject)
 314 {
 315         u32 prev_nr;
 316         int class1, class2;
 317
 318         kvm_make_request(KVM_REQ_EVENT, vcpu);
 319
 320         if (!vcpu->arch.exception.pending) {
 321         queue:
 322                 vcpu->arch.exception.pending = true;
 323                 vcpu->arch.exception.has_error_code = has_error;
 324                 vcpu->arch.exception.nr = nr;
 325                 vcpu->arch.exception.error_code = error_code;
 326                 vcpu->arch.exception.reinject = reinject;
 327                 return;
 328         }
 329
 330         /* to check exception */
 331         prev_nr = vcpu->arch.exception.nr;
 332         if (prev_nr == DF_VECTOR) {
 333                 /* triple fault -> shutdown */
 334                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 335                 return;
 336         }
 337         class1 = exception_class(prev_nr);
 338         class2 = exception_class(nr);
 339         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 340                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 341                 /* generate double fault per SDM Table 5-5 */
 342                 vcpu->arch.exception.pending = true;
 343                 vcpu->arch.exception.has_error_code = true;
 344                 vcpu->arch.exception.nr = DF_VECTOR;
 345                 vcpu->arch.exception.error_code = 0;
 346         } else
 347                 /* replace previous exception with a new one in a hope
 348                    that instruction re-execution will regenerate lost
 349                    exception */
 350                 goto queue;
 351 }
 352
 353 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 354 {
 355         kvm_multiple_exception(vcpu, nr, false, 0, false);
 356 }
 357 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 358
 359 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 360 {
 361         kvm_multiple_exception(vcpu, nr, false, 0, true);
 362 }
 363 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 364
 365 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 366 {
 367         if (err)
 368                 kvm_inject_gp(vcpu, 0);
 369         else
 370                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 371 }
 372 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 373
 374 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 375 {
 376         ++vcpu->stat.pf_guest;
 377         vcpu->arch.cr2 = fault->address;
 378         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 379 }
 380 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 381
 382 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 383 {
 384         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 385                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 386         else
 387                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 388 }
 389
 390 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 391 {
 392         atomic_inc(&vcpu->arch.nmi_queued);
 393         kvm_make_request(KVM_REQ_NMI, vcpu);
 394 }
 395 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 396
 397 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 398 {
 399         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 400 }
 401 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 402
 403 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 404 {
 405         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 406 }
 407 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 408
 409 /*
 410  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 411  * a #GP and return false.
 412  */
 413 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 414 {
 415         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 416                 return true;
 417         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 418         return false;
 419 }
 420 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 421
 422 /*
 423  * This function will be used to read from the physical memory of the currently
 424  * running guest. The difference to kvm_read_guest_page is that this function
 425  * can read from guest physical or from the guest's guest physical memory.
 426  */
 427 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 428                             gfn_t ngfn, void *data, int offset, int len,
 429                             u32 access)
 430 {
 431         gfn_t real_gfn;
 432         gpa_t ngpa;
 433
 434         ngpa     = gfn_to_gpa(ngfn);
 435         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 436         if (real_gfn == UNMAPPED_GVA)
 437                 return -EFAULT;
 438
 439         real_gfn = gpa_to_gfn(real_gfn);
 440
 441         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 442 }
 443 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 444
 445 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 446                                void *data, int offset, int len, u32 access)
 447 {
 448         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 449                                        data, offset, len, access);
 450 }
 451
 452 /*
 453  * Load the pae pdptrs.  Return true is they are all valid.
 454  */
 455 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 456 {
 457         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 458         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 459         int i;
 460         int ret;
 461         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 462
 463         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 464                                       offset * sizeof(u64), sizeof(pdpte),
 465                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 466         if (ret < 0) {
 467                 ret = 0;
 468                 goto out;
 469         }
 470         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 471                 if (is_present_gpte(pdpte[i]) &&
 472                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 473                         ret = 0;
 474                         goto out;
 475                 }
 476         }
 477         ret = 1;
 478
 479         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 480         __set_bit(VCPU_EXREG_PDPTR,
 481                   (unsigned long *)&vcpu->arch.regs_avail);
 482         __set_bit(VCPU_EXREG_PDPTR,
 483                   (unsigned long *)&vcpu->arch.regs_dirty);
 484 out:
 485
 486         return ret;
 487 }
 488 EXPORT_SYMBOL_GPL(load_pdptrs);
 489
 490 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 491 {
 492         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 493         bool changed = true;
 494         int offset;
 495         gfn_t gfn;
 496         int r;
 497
 498         if (is_long_mode(vcpu) || !is_pae(vcpu))
 499                 return false;
 500
 501         if (!test_bit(VCPU_EXREG_PDPTR,
 502                       (unsigned long *)&vcpu->arch.regs_avail))
 503                 return true;
 504
 505         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 506         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 507         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 508                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 509         if (r < 0)
 510                 goto out;
 511         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 512 out:
 513
 514         return changed;
 515 }
 516
 517 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 518 {
 519         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 520         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 521                                     X86_CR0_CD | X86_CR0_NW;
 522
 523         cr0 |= X86_CR0_ET;
 524
 525 #ifdef CONFIG_X86_64
 526         if (cr0 & 0xffffffff00000000UL)
 527                 return 1;
 528 #endif
 529
 530         cr0 &= ~CR0_RESERVED_BITS;
 531
 532         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 533                 return 1;
 534
 535         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 536                 return 1;
 537
 538         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 539 #ifdef CONFIG_X86_64
 540                 if ((vcpu->arch.efer & EFER_LME)) {
 541                         int cs_db, cs_l;
 542
 543                         if (!is_pae(vcpu))
 544                                 return 1;
 545                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 546                         if (cs_l)
 547                                 return 1;
 548                 } else
 549 #endif
 550                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 551                                                  kvm_read_cr3(vcpu)))
 552                         return 1;
 553         }
 554
 555         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 556                 return 1;
 557
 558         kvm_x86_ops->set_cr0(vcpu, cr0);
 559
 560         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 561                 kvm_clear_async_pf_completion_queue(vcpu);
 562                 kvm_async_pf_hash_reset(vcpu);
 563         }
 564
 565         if ((cr0 ^ old_cr0) & update_bits)
 566                 kvm_mmu_reset_context(vcpu);
 567         return 0;
 568 }
 569 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 570
 571 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 572 {
 573         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 574 }
 575 EXPORT_SYMBOL_GPL(kvm_lmsw);
 576
 577 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 578 {
 579         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 580                         !vcpu->guest_xcr0_loaded) {
 581                 /* kvm_set_xcr() also depends on this */
 582                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 583                 vcpu->guest_xcr0_loaded = 1;
 584         }
 585 }
 586
 587 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 588 {
 589         if (vcpu->guest_xcr0_loaded) {
 590                 if (vcpu->arch.xcr0 != host_xcr0)
 591                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 592                 vcpu->guest_xcr0_loaded = 0;
 593         }
 594 }
 595
 596 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 597 {
 598         u64 xcr0 = xcr;
 599         u64 old_xcr0 = vcpu->arch.xcr0;
 600         u64 valid_bits;
 601
 602         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 603         if (index != XCR_XFEATURE_ENABLED_MASK)
 604                 return 1;
 605         if (!(xcr0 & XSTATE_FP))
 606                 return 1;
 607         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 608                 return 1;
 609
 610         /*
 611          * Do not allow the guest to set bits that we do not support
 612          * saving.  However, xcr0 bit 0 is always set, even if the
 613          * emulated CPU does not support XSAVE (see fx_init).
 614          */
 615         valid_bits = vcpu->arch.guest_supported_xcr0 | XSTATE_FP;
 616         if (xcr0 & ~valid_bits)
 617                 return 1;
 618
 619         if ((!(xcr0 & XSTATE_BNDREGS)) != (!(xcr0 & XSTATE_BNDCSR)))
 620                 return 1;
 621
 622         kvm_put_guest_xcr0(vcpu);
 623         vcpu->arch.xcr0 = xcr0;
 624
 625         if ((xcr0 ^ old_xcr0) & XSTATE_EXTEND_MASK)
 626                 kvm_update_cpuid(vcpu);
 627         return 0;
 628 }
 629
 630 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 631 {
 632         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 633             __kvm_set_xcr(vcpu, index, xcr)) {
 634                 kvm_inject_gp(vcpu, 0);
 635                 return 1;
 636         }
 637         return 0;
 638 }
 639 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 640
 641 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 642 {
 643         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 644         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
 645                                    X86_CR4_PAE | X86_CR4_SMEP;
 646         if (cr4 & CR4_RESERVED_BITS)
 647                 return 1;
 648
 649         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 650                 return 1;
 651
 652         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 653                 return 1;
 654
 655         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
 656                 return 1;
 657
 658         if (is_long_mode(vcpu)) {
 659                 if (!(cr4 & X86_CR4_PAE))
 660                         return 1;
 661         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 662                    && ((cr4 ^ old_cr4) & pdptr_bits)
 663                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 664                                    kvm_read_cr3(vcpu)))
 665                 return 1;
 666
 667         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 668                 if (!guest_cpuid_has_pcid(vcpu))
 669                         return 1;
 670
 671                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 672                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 673                         return 1;
 674         }
 675
 676         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 677                 return 1;
 678
 679         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 680             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 681                 kvm_mmu_reset_context(vcpu);
 682
 683         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 684                 kvm_update_cpuid(vcpu);
 685
 686         return 0;
 687 }
 688 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 689
 690 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 691 {
 692         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 693                 kvm_mmu_sync_roots(vcpu);
 694                 kvm_mmu_flush_tlb(vcpu);
 695                 return 0;
 696         }
 697
 698         if (is_long_mode(vcpu)) {
 699                 if (kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE)) {
 700                         if (cr3 & CR3_PCID_ENABLED_RESERVED_BITS)
 701                                 return 1;
 702                 } else
 703                         if (cr3 & CR3_L_MODE_RESERVED_BITS)
 704                                 return 1;
 705         } else {
 706                 if (is_pae(vcpu)) {
 707                         if (cr3 & CR3_PAE_RESERVED_BITS)
 708                                 return 1;
 709                         if (is_paging(vcpu) &&
 710                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 711                                 return 1;
 712                 }
 713                 /*
 714                  * We don't check reserved bits in nonpae mode, because
 715                  * this isn't enforced, and VMware depends on this.
 716                  */
 717         }
 718
 719         vcpu->arch.cr3 = cr3;
 720         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 721         kvm_mmu_new_cr3(vcpu);
 722         return 0;
 723 }
 724 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 725
 726 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 727 {
 728         if (cr8 & CR8_RESERVED_BITS)
 729                 return 1;
 730         if (irqchip_in_kernel(vcpu->kvm))
 731                 kvm_lapic_set_tpr(vcpu, cr8);
 732         else
 733                 vcpu->arch.cr8 = cr8;
 734         return 0;
 735 }
 736 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 737
 738 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 739 {
 740         if (irqchip_in_kernel(vcpu->kvm))
 741                 return kvm_lapic_get_cr8(vcpu);
 742         else
 743                 return vcpu->arch.cr8;
 744 }
 745 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 746
 747 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 748 {
 749         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 750                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 751 }
 752
 753 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 754 {
 755         unsigned long dr7;
 756
 757         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 758                 dr7 = vcpu->arch.guest_debug_dr7;
 759         else
 760                 dr7 = vcpu->arch.dr7;
 761         kvm_x86_ops->set_dr7(vcpu, dr7);
 762         vcpu->arch.switch_db_regs = (dr7 & DR7_BP_EN_MASK);
 763 }
 764
 765 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 766 {
 767         switch (dr) {
 768         case 0 ... 3:
 769                 vcpu->arch.db[dr] = val;
 770                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 771                         vcpu->arch.eff_db[dr] = val;
 772                 break;
 773         case 4:
 774                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 775                         return 1; /* #UD */
 776                 /* fall through */
 777         case 6:
 778                 if (val & 0xffffffff00000000ULL)
 779                         return -1; /* #GP */
 780                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 781                 kvm_update_dr6(vcpu);
 782                 break;
 783         case 5:
 784                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 785                         return 1; /* #UD */
 786                 /* fall through */
 787         default: /* 7 */
 788                 if (val & 0xffffffff00000000ULL)
 789                         return -1; /* #GP */
 790                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 791                 kvm_update_dr7(vcpu);
 792                 break;
 793         }
 794
 795         return 0;
 796 }
 797
 798 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 799 {
 800         int res;
 801
 802         res = __kvm_set_dr(vcpu, dr, val);
 803         if (res > 0)
 804                 kvm_queue_exception(vcpu, UD_VECTOR);
 805         else if (res < 0)
 806                 kvm_inject_gp(vcpu, 0);
 807
 808         return res;
 809 }
 810 EXPORT_SYMBOL_GPL(kvm_set_dr);
 811
 812 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 813 {
 814         switch (dr) {
 815         case 0 ... 3:
 816                 *val = vcpu->arch.db[dr];
 817                 break;
 818         case 4:
 819                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 820                         return 1;
 821                 /* fall through */
 822         case 6:
 823                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 824                         *val = vcpu->arch.dr6;
 825                 else
 826                         *val = kvm_x86_ops->get_dr6(vcpu);
 827                 break;
 828         case 5:
 829                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 830                         return 1;
 831                 /* fall through */
 832         default: /* 7 */
 833                 *val = vcpu->arch.dr7;
 834                 break;
 835         }
 836
 837         return 0;
 838 }
 839
 840 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 841 {
 842         if (_kvm_get_dr(vcpu, dr, val)) {
 843                 kvm_queue_exception(vcpu, UD_VECTOR);
 844                 return 1;
 845         }
 846         return 0;
 847 }
 848 EXPORT_SYMBOL_GPL(kvm_get_dr);
 849
 850 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 851 {
 852         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 853         u64 data;
 854         int err;
 855
 856         err = kvm_pmu_read_pmc(vcpu, ecx, &data);
 857         if (err)
 858                 return err;
 859         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 860         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 861         return err;
 862 }
 863 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 864
 865 /*
 866  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 867  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 868  *
 869  * This list is modified at module load time to reflect the
 870  * capabilities of the host cpu. This capabilities test skips MSRs that are
 871  * kvm-specific. Those are put in the beginning of the list.
 872  */
 873
 874 #define KVM_SAVE_MSRS_BEGIN     12
 875 static u32 msrs_to_save[] = {
 876         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 877         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 878         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 879         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
 880         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 881         MSR_KVM_PV_EOI_EN,
 882         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 883         MSR_STAR,
 884 #ifdef CONFIG_X86_64
 885         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 886 #endif
 887         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
 888         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS
 889 };
 890
 891 static unsigned num_msrs_to_save;
 892
 893 static const u32 emulated_msrs[] = {
 894         MSR_IA32_TSC_ADJUST,
 895         MSR_IA32_TSCDEADLINE,
 896         MSR_IA32_MISC_ENABLE,
 897         MSR_IA32_MCG_STATUS,
 898         MSR_IA32_MCG_CTL,
 899 };
 900
 901 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
 902 {
 903         if (efer & efer_reserved_bits)
 904                 return false;
 905
 906         if (efer & EFER_FFXSR) {
 907                 struct kvm_cpuid_entry2 *feat;
 908
 909                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 910                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 911                         return false;
 912         }
 913
 914         if (efer & EFER_SVME) {
 915                 struct kvm_cpuid_entry2 *feat;
 916
 917                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 918                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 919                         return false;
 920         }
 921
 922         return true;
 923 }
 924 EXPORT_SYMBOL_GPL(kvm_valid_efer);
 925
 926 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 927 {
 928         u64 old_efer = vcpu->arch.efer;
 929
 930         if (!kvm_valid_efer(vcpu, efer))
 931                 return 1;
 932
 933         if (is_paging(vcpu)
 934             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 935                 return 1;
 936
 937         efer &= ~EFER_LMA;
 938         efer |= vcpu->arch.efer & EFER_LMA;
 939
 940         kvm_x86_ops->set_efer(vcpu, efer);
 941
 942         /* Update reserved bits */
 943         if ((efer ^ old_efer) & EFER_NX)
 944                 kvm_mmu_reset_context(vcpu);
 945
 946         return 0;
 947 }
 948
 949 void kvm_enable_efer_bits(u64 mask)
 950 {
 951        efer_reserved_bits &= ~mask;
 952 }
 953 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 954
 955
 956 /*
 957  * Writes msr value into into the appropriate "register".
 958  * Returns 0 on success, non-0 otherwise.
 959  * Assumes vcpu_load() was already called.
 960  */
 961 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
 962 {
 963         return kvm_x86_ops->set_msr(vcpu, msr);
 964 }
 965
 966 /*
 967  * Adapt set_msr() to msr_io()'s calling convention
 968  */
 969 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 970 {
 971         struct msr_data msr;
 972
 973         msr.data = *data;
 974         msr.index = index;
 975         msr.host_initiated = true;
 976         return kvm_set_msr(vcpu, &msr);
 977 }
 978
 979 #ifdef CONFIG_X86_64
 980 struct pvclock_gtod_data {
 981         seqcount_t      seq;
 982
 983         struct { /* extract of a clocksource struct */
 984                 int vclock_mode;
 985                 cycle_t cycle_last;
 986                 cycle_t mask;
 987                 u32     mult;
 988                 u32     shift;
 989         } clock;
 990
 991         /* open coded 'struct timespec' */
 992         u64             monotonic_time_snsec;
 993         time_t          monotonic_time_sec;
 994 };
 995
 996 static struct pvclock_gtod_data pvclock_gtod_data;
 997
 998 static void update_pvclock_gtod(struct timekeeper *tk)
 999 {
1000         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1001
1002         write_seqcount_begin(&vdata->seq);
1003
1004         /* copy pvclock gtod data */
1005         vdata->clock.vclock_mode        = tk->clock->archdata.vclock_mode;
1006         vdata->clock.cycle_last         = tk->clock->cycle_last;
1007         vdata->clock.mask               = tk->clock->mask;
1008         vdata->clock.mult               = tk->mult;
1009         vdata->clock.shift              = tk->shift;
1010
1011         vdata->monotonic_time_sec       = tk->xtime_sec
1012                                         + tk->wall_to_monotonic.tv_sec;
1013         vdata->monotonic_time_snsec     = tk->xtime_nsec
1014                                         + (tk->wall_to_monotonic.tv_nsec
1015                                                 << tk->shift);
1016         while (vdata->monotonic_time_snsec >=
1017                                         (((u64)NSEC_PER_SEC) << tk->shift)) {
1018                 vdata->monotonic_time_snsec -=
1019                                         ((u64)NSEC_PER_SEC) << tk->shift;
1020                 vdata->monotonic_time_sec++;
1021         }
1022
1023         write_seqcount_end(&vdata->seq);
1024 }
1025 #endif
1026
1027
1028 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1029 {
1030         int version;
1031         int r;
1032         struct pvclock_wall_clock wc;
1033         struct timespec boot;
1034
1035         if (!wall_clock)
1036                 return;
1037
1038         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1039         if (r)
1040                 return;
1041
1042         if (version & 1)
1043                 ++version;  /* first time write, random junk */
1044
1045         ++version;
1046
1047         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1048
1049         /*
1050          * The guest calculates current wall clock time by adding
1051          * system time (updated by kvm_guest_time_update below) to the
1052          * wall clock specified here.  guest system time equals host
1053          * system time for us, thus we must fill in host boot time here.
1054          */
1055         getboottime(&boot);
1056
1057         if (kvm->arch.kvmclock_offset) {
1058                 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
1059                 boot = timespec_sub(boot, ts);
1060         }
1061         wc.sec = boot.tv_sec;
1062         wc.nsec = boot.tv_nsec;
1063         wc.version = version;
1064
1065         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1066
1067         version++;
1068         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1069 }
1070
1071 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1072 {
1073         uint32_t quotient, remainder;
1074
1075         /* Don't try to replace with do_div(), this one calculates
1076          * "(dividend << 32) / divisor" */
1077         __asm__ ( "divl %4"
1078                   : "=a" (quotient), "=d" (remainder)
1079                   : "0" (0), "1" (dividend), "r" (divisor) );
1080         return quotient;
1081 }
1082
1083 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
1084                                s8 *pshift, u32 *pmultiplier)
1085 {
1086         uint64_t scaled64;
1087         int32_t  shift = 0;
1088         uint64_t tps64;
1089         uint32_t tps32;
1090
1091         tps64 = base_khz * 1000LL;
1092         scaled64 = scaled_khz * 1000LL;
1093         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1094                 tps64 >>= 1;
1095                 shift--;
1096         }
1097
1098         tps32 = (uint32_t)tps64;
1099         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1100                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1101                         scaled64 >>= 1;
1102                 else
1103                         tps32 <<= 1;
1104                 shift++;
1105         }
1106
1107         *pshift = shift;
1108         *pmultiplier = div_frac(scaled64, tps32);
1109
1110         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1111                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
1112 }
1113
1114 static inline u64 get_kernel_ns(void)
1115 {
1116         struct timespec ts;
1117
1118         WARN_ON(preemptible());
1119         ktime_get_ts(&ts);
1120         monotonic_to_bootbased(&ts);
1121         return timespec_to_ns(&ts);
1122 }
1123
1124 #ifdef CONFIG_X86_64
1125 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1126 #endif
1127
1128 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1129 unsigned long max_tsc_khz;
1130
1131 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1132 {
1133         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1134                                    vcpu->arch.virtual_tsc_shift);
1135 }
1136
1137 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1138 {
1139         u64 v = (u64)khz * (1000000 + ppm);
1140         do_div(v, 1000000);
1141         return v;
1142 }
1143
1144 static void kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1145 {
1146         u32 thresh_lo, thresh_hi;
1147         int use_scaling = 0;
1148
1149         /* tsc_khz can be zero if TSC calibration fails */
1150         if (this_tsc_khz == 0)
1151                 return;
1152
1153         /* Compute a scale to convert nanoseconds in TSC cycles */
1154         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1155                            &vcpu->arch.virtual_tsc_shift,
1156                            &vcpu->arch.virtual_tsc_mult);
1157         vcpu->arch.virtual_tsc_khz = this_tsc_khz;
1158
1159         /*
1160          * Compute the variation in TSC rate which is acceptable
1161          * within the range of tolerance and decide if the
1162          * rate being applied is within that bounds of the hardware
1163          * rate.  If so, no scaling or compensation need be done.
1164          */
1165         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1166         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1167         if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1168                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1169                 use_scaling = 1;
1170         }
1171         kvm_x86_ops->set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1172 }
1173
1174 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1175 {
1176         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1177                                       vcpu->arch.virtual_tsc_mult,
1178                                       vcpu->arch.virtual_tsc_shift);
1179         tsc += vcpu->arch.this_tsc_write;
1180         return tsc;
1181 }
1182
1183 void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1184 {
1185 #ifdef CONFIG_X86_64
1186         bool vcpus_matched;
1187         bool do_request = false;
1188         struct kvm_arch *ka = &vcpu->kvm->arch;
1189         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1190
1191         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1192                          atomic_read(&vcpu->kvm->online_vcpus));
1193
1194         if (vcpus_matched && gtod->clock.vclock_mode == VCLOCK_TSC)
1195                 if (!ka->use_master_clock)
1196                         do_request = 1;
1197
1198         if (!vcpus_matched && ka->use_master_clock)
1199                         do_request = 1;
1200
1201         if (do_request)
1202                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1203
1204         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1205                             atomic_read(&vcpu->kvm->online_vcpus),
1206                             ka->use_master_clock, gtod->clock.vclock_mode);
1207 #endif
1208 }
1209
1210 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1211 {
1212         u64 curr_offset = kvm_x86_ops->read_tsc_offset(vcpu);
1213         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1214 }
1215
1216 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1217 {
1218         struct kvm *kvm = vcpu->kvm;
1219         u64 offset, ns, elapsed;
1220         unsigned long flags;
1221         s64 usdiff;
1222         bool matched;
1223         u64 data = msr->data;
1224
1225         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1226         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1227         ns = get_kernel_ns();
1228         elapsed = ns - kvm->arch.last_tsc_nsec;
1229
1230         if (vcpu->arch.virtual_tsc_khz) {
1231                 int faulted = 0;
1232
1233                 /* n.b - signed multiplication and division required */
1234                 usdiff = data - kvm->arch.last_tsc_write;
1235 #ifdef CONFIG_X86_64
1236                 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1237 #else
1238                 /* do_div() only does unsigned */
1239                 asm("1: idivl %[divisor]\n"
1240                     "2: xor %%edx, %%edx\n"
1241                     "   movl $0, %[faulted]\n"
1242                     "3:\n"
1243                     ".section .fixup,\"ax\"\n"
1244                     "4: movl $1, %[faulted]\n"
1245                     "   jmp  3b\n"
1246                     ".previous\n"
1247
1248                 _ASM_EXTABLE(1b, 4b)
1249
1250                 : "=A"(usdiff), [faulted] "=r" (faulted)
1251                 : "A"(usdiff * 1000), [divisor] "rm"(vcpu->arch.virtual_tsc_khz));
1252
1253 #endif
1254                 do_div(elapsed, 1000);
1255                 usdiff -= elapsed;
1256                 if (usdiff < 0)
1257                         usdiff = -usdiff;
1258
1259                 /* idivl overflow => difference is larger than USEC_PER_SEC */
1260                 if (faulted)
1261                         usdiff = USEC_PER_SEC;
1262         } else
1263                 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1264
1265         /*
1266          * Special case: TSC write with a small delta (1 second) of virtual
1267          * cycle time against real time is interpreted as an attempt to
1268          * synchronize the CPU.
1269          *
1270          * For a reliable TSC, we can match TSC offsets, and for an unstable
1271          * TSC, we add elapsed time in this computation.  We could let the
1272          * compensation code attempt to catch up if we fall behind, but
1273          * it's better to try to match offsets from the beginning.
1274          */
1275         if (usdiff < USEC_PER_SEC &&
1276             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1277                 if (!check_tsc_unstable()) {
1278                         offset = kvm->arch.cur_tsc_offset;
1279                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1280                 } else {
1281                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1282                         data += delta;
1283                         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1284                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1285                 }
1286                 matched = true;
1287         } else {
1288                 /*
1289                  * We split periods of matched TSC writes into generations.
1290                  * For each generation, we track the original measured
1291                  * nanosecond time, offset, and write, so if TSCs are in
1292                  * sync, we can match exact offset, and if not, we can match
1293                  * exact software computation in compute_guest_tsc()
1294                  *
1295                  * These values are tracked in kvm->arch.cur_xxx variables.
1296                  */
1297                 kvm->arch.cur_tsc_generation++;
1298                 kvm->arch.cur_tsc_nsec = ns;
1299                 kvm->arch.cur_tsc_write = data;
1300                 kvm->arch.cur_tsc_offset = offset;
1301                 matched = false;
1302                 pr_debug("kvm: new tsc generation %u, clock %llu\n",
1303                          kvm->arch.cur_tsc_generation, data);
1304         }
1305
1306         /*
1307          * We also track th most recent recorded KHZ, write and time to
1308          * allow the matching interval to be extended at each write.
1309          */
1310         kvm->arch.last_tsc_nsec = ns;
1311         kvm->arch.last_tsc_write = data;
1312         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1313
1314         vcpu->arch.last_guest_tsc = data;
1315
1316         /* Keep track of which generation this VCPU has synchronized to */
1317         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1318         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1319         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1320
1321         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1322                 update_ia32_tsc_adjust_msr(vcpu, offset);
1323         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1324         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1325
1326         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1327         if (matched)
1328                 kvm->arch.nr_vcpus_matched_tsc++;
1329         else
1330                 kvm->arch.nr_vcpus_matched_tsc = 0;
1331
1332         kvm_track_tsc_matching(vcpu);
1333         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1334 }
1335
1336 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1337
1338 #ifdef CONFIG_X86_64
1339
1340 static cycle_t read_tsc(void)
1341 {
1342         cycle_t ret;
1343         u64 last;
1344
1345         /*
1346          * Empirically, a fence (of type that depends on the CPU)
1347          * before rdtsc is enough to ensure that rdtsc is ordered
1348          * with respect to loads.  The various CPU manuals are unclear
1349          * as to whether rdtsc can be reordered with later loads,
1350          * but no one has ever seen it happen.
1351          */
1352         rdtsc_barrier();
1353         ret = (cycle_t)vget_cycles();
1354
1355         last = pvclock_gtod_data.clock.cycle_last;
1356
1357         if (likely(ret >= last))
1358                 return ret;
1359
1360         /*
1361          * GCC likes to generate cmov here, but this branch is extremely
1362          * predictable (it's just a funciton of time and the likely is
1363          * very likely) and there's a data dependence, so force GCC
1364          * to generate a branch instead.  I don't barrier() because
1365          * we don't actually need a barrier, and if this function
1366          * ever gets inlined it will generate worse code.
1367          */
1368         asm volatile ("");
1369         return last;
1370 }
1371
1372 static inline u64 vgettsc(cycle_t *cycle_now)
1373 {
1374         long v;
1375         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1376
1377         *cycle_now = read_tsc();
1378
1379         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1380         return v * gtod->clock.mult;
1381 }
1382
1383 static int do_monotonic(struct timespec *ts, cycle_t *cycle_now)
1384 {
1385         unsigned long seq;
1386         u64 ns;
1387         int mode;
1388         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1389
1390         ts->tv_nsec = 0;
1391         do {
1392                 seq = read_seqcount_begin(&gtod->seq);
1393                 mode = gtod->clock.vclock_mode;
1394                 ts->tv_sec = gtod->monotonic_time_sec;
1395                 ns = gtod->monotonic_time_snsec;
1396                 ns += vgettsc(cycle_now);
1397                 ns >>= gtod->clock.shift;
1398         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1399         timespec_add_ns(ts, ns);
1400
1401         return mode;
1402 }
1403
1404 /* returns true if host is using tsc clocksource */
1405 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1406 {
1407         struct timespec ts;
1408
1409         /* checked again under seqlock below */
1410         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1411                 return false;
1412
1413         if (do_monotonic(&ts, cycle_now) != VCLOCK_TSC)
1414                 return false;
1415
1416         monotonic_to_bootbased(&ts);
1417         *kernel_ns = timespec_to_ns(&ts);
1418
1419         return true;
1420 }
1421 #endif
1422
1423 /*
1424  *
1425  * Assuming a stable TSC across physical CPUS, and a stable TSC
1426  * across virtual CPUs, the following condition is possible.
1427  * Each numbered line represents an event visible to both
1428  * CPUs at the next numbered event.
1429  *
1430  * "timespecX" represents host monotonic time. "tscX" represents
1431  * RDTSC value.
1432  *
1433  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1434  *
1435  * 1.  read timespec0,tsc0
1436  * 2.                                   | timespec1 = timespec0 + N
1437  *                                      | tsc1 = tsc0 + M
1438  * 3. transition to guest               | transition to guest
1439  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1440  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1441  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1442  *
1443  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1444  *
1445  *      - ret0 < ret1
1446  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1447  *              ...
1448  *      - 0 < N - M => M < N
1449  *
1450  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1451  * always the case (the difference between two distinct xtime instances
1452  * might be smaller then the difference between corresponding TSC reads,
1453  * when updating guest vcpus pvclock areas).
1454  *
1455  * To avoid that problem, do not allow visibility of distinct
1456  * system_timestamp/tsc_timestamp values simultaneously: use a master
1457  * copy of host monotonic time values. Update that master copy
1458  * in lockstep.
1459  *
1460  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1461  *
1462  */
1463
1464 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1465 {
1466 #ifdef CONFIG_X86_64
1467         struct kvm_arch *ka = &kvm->arch;
1468         int vclock_mode;
1469         bool host_tsc_clocksource, vcpus_matched;
1470
1471         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1472                         atomic_read(&kvm->online_vcpus));
1473
1474         /*
1475          * If the host uses TSC clock, then passthrough TSC as stable
1476          * to the guest.
1477          */
1478         host_tsc_clocksource = kvm_get_time_and_clockread(
1479                                         &ka->master_kernel_ns,
1480                                         &ka->master_cycle_now);
1481
1482         ka->use_master_clock = host_tsc_clocksource & vcpus_matched;
1483
1484         if (ka->use_master_clock)
1485                 atomic_set(&kvm_guest_has_master_clock, 1);
1486
1487         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1488         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1489                                         vcpus_matched);
1490 #endif
1491 }
1492
1493 static void kvm_gen_update_masterclock(struct kvm *kvm)
1494 {
1495 #ifdef CONFIG_X86_64
1496         int i;
1497         struct kvm_vcpu *vcpu;
1498         struct kvm_arch *ka = &kvm->arch;
1499
1500         spin_lock(&ka->pvclock_gtod_sync_lock);
1501         kvm_make_mclock_inprogress_request(kvm);
1502         /* no guest entries from this point */
1503         pvclock_update_vm_gtod_copy(kvm);
1504
1505         kvm_for_each_vcpu(i, vcpu, kvm)
1506                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
1507
1508         /* guest entries allowed */
1509         kvm_for_each_vcpu(i, vcpu, kvm)
1510                 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
1511
1512         spin_unlock(&ka->pvclock_gtod_sync_lock);
1513 #endif
1514 }
1515
1516 static int kvm_guest_time_update(struct kvm_vcpu *v)
1517 {
1518         unsigned long flags, this_tsc_khz;
1519         struct kvm_vcpu_arch *vcpu = &v->arch;
1520         struct kvm_arch *ka = &v->kvm->arch;
1521         s64 kernel_ns;
1522         u64 tsc_timestamp, host_tsc;
1523         struct pvclock_vcpu_time_info guest_hv_clock;
1524         u8 pvclock_flags;
1525         bool use_master_clock;
1526
1527         kernel_ns = 0;
1528         host_tsc = 0;
1529
1530         /*
1531          * If the host uses TSC clock, then passthrough TSC as stable
1532          * to the guest.
1533          */
1534         spin_lock(&ka->pvclock_gtod_sync_lock);
1535         use_master_clock = ka->use_master_clock;
1536         if (use_master_clock) {
1537                 host_tsc = ka->master_cycle_now;
1538                 kernel_ns = ka->master_kernel_ns;
1539         }
1540         spin_unlock(&ka->pvclock_gtod_sync_lock);
1541
1542         /* Keep irq disabled to prevent changes to the clock */
1543         local_irq_save(flags);
1544         this_tsc_khz = __get_cpu_var(cpu_tsc_khz);
1545         if (unlikely(this_tsc_khz == 0)) {
1546                 local_irq_restore(flags);
1547                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1548                 return 1;
1549         }
1550         if (!use_master_clock) {
1551                 host_tsc = native_read_tsc();
1552                 kernel_ns = get_kernel_ns();
1553         }
1554
1555         tsc_timestamp = kvm_x86_ops->read_l1_tsc(v, host_tsc);
1556
1557         /*
1558          * We may have to catch up the TSC to match elapsed wall clock
1559          * time for two reasons, even if kvmclock is used.
1560          *   1) CPU could have been running below the maximum TSC rate
1561          *   2) Broken TSC compensation resets the base at each VCPU
1562          *      entry to avoid unknown leaps of TSC even when running
1563          *      again on the same CPU.  This may cause apparent elapsed
1564          *      time to disappear, and the guest to stand still or run
1565          *      very slowly.
1566          */
1567         if (vcpu->tsc_catchup) {
1568                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1569                 if (tsc > tsc_timestamp) {
1570                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1571                         tsc_timestamp = tsc;
1572                 }
1573         }
1574
1575         local_irq_restore(flags);
1576
1577         if (!vcpu->pv_time_enabled)
1578                 return 0;
1579
1580         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1581                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1582                                    &vcpu->hv_clock.tsc_shift,
1583                                    &vcpu->hv_clock.tsc_to_system_mul);
1584                 vcpu->hw_tsc_khz = this_tsc_khz;
1585         }
1586
1587         /* With all the info we got, fill in the values */
1588         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1589         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1590         vcpu->last_guest_tsc = tsc_timestamp;
1591
1592         /*
1593          * The interface expects us to write an even number signaling that the
1594          * update is finished. Since the guest won't see the intermediate
1595          * state, we just increase by 2 at the end.
1596          */
1597         vcpu->hv_clock.version += 2;
1598
1599         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1600                 &guest_hv_clock, sizeof(guest_hv_clock))))
1601                 return 0;
1602
1603         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1604         pvclock_flags = (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1605
1606         if (vcpu->pvclock_set_guest_stopped_request) {
1607                 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1608                 vcpu->pvclock_set_guest_stopped_request = false;
1609         }
1610
1611         /* If the host uses TSC clocksource, then it is stable */
1612         if (use_master_clock)
1613                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1614
1615         vcpu->hv_clock.flags = pvclock_flags;
1616
1617         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1618                                 &vcpu->hv_clock,
1619                                 sizeof(vcpu->hv_clock));
1620         return 0;
1621 }
1622
1623 /*
1624  * kvmclock updates which are isolated to a given vcpu, such as
1625  * vcpu->cpu migration, should not allow system_timestamp from
1626  * the rest of the vcpus to remain static. Otherwise ntp frequency
1627  * correction applies to one vcpu's system_timestamp but not
1628  * the others.
1629  *
1630  * So in those cases, request a kvmclock update for all vcpus.
1631  * The worst case for a remote vcpu to update its kvmclock
1632  * is then bounded by maximum nohz sleep latency.
1633  */
1634
1635 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1636 {
1637         int i;
1638         struct kvm *kvm = v->kvm;
1639         struct kvm_vcpu *vcpu;
1640
1641         kvm_for_each_vcpu(i, vcpu, kvm) {
1642                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
1643                 kvm_vcpu_kick(vcpu);
1644         }
1645 }
1646
1647 static bool msr_mtrr_valid(unsigned msr)
1648 {
1649         switch (msr) {
1650         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1651         case MSR_MTRRfix64K_00000:
1652         case MSR_MTRRfix16K_80000:
1653         case MSR_MTRRfix16K_A0000:
1654         case MSR_MTRRfix4K_C0000:
1655         case MSR_MTRRfix4K_C8000:
1656         case MSR_MTRRfix4K_D0000:
1657         case MSR_MTRRfix4K_D8000:
1658         case MSR_MTRRfix4K_E0000:
1659         case MSR_MTRRfix4K_E8000:
1660         case MSR_MTRRfix4K_F0000:
1661         case MSR_MTRRfix4K_F8000:
1662         case MSR_MTRRdefType:
1663         case MSR_IA32_CR_PAT:
1664                 return true;
1665         case 0x2f8:
1666                 return true;
1667         }
1668         return false;
1669 }
1670
1671 static bool valid_pat_type(unsigned t)
1672 {
1673         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1674 }
1675
1676 static bool valid_mtrr_type(unsigned t)
1677 {
1678         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1679 }
1680
1681 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1682 {
1683         int i;
1684
1685         if (!msr_mtrr_valid(msr))
1686                 return false;
1687
1688         if (msr == MSR_IA32_CR_PAT) {
1689                 for (i = 0; i < 8; i++)
1690                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1691                                 return false;
1692                 return true;
1693         } else if (msr == MSR_MTRRdefType) {
1694                 if (data & ~0xcff)
1695                         return false;
1696                 return valid_mtrr_type(data & 0xff);
1697         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1698                 for (i = 0; i < 8 ; i++)
1699                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1700                                 return false;
1701                 return true;
1702         }
1703
1704         /* variable MTRRs */
1705         return valid_mtrr_type(data & 0xff);
1706 }
1707
1708 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1709 {
1710         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1711
1712         if (!mtrr_valid(vcpu, msr, data))
1713                 return 1;
1714
1715         if (msr == MSR_MTRRdefType) {
1716                 vcpu->arch.mtrr_state.def_type = data;
1717                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1718         } else if (msr == MSR_MTRRfix64K_00000)
1719                 p[0] = data;
1720         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1721                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1722         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1723                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1724         else if (msr == MSR_IA32_CR_PAT)
1725                 vcpu->arch.pat = data;
1726         else {  /* Variable MTRRs */
1727                 int idx, is_mtrr_mask;
1728                 u64 *pt;
1729
1730                 idx = (msr - 0x200) / 2;
1731                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1732                 if (!is_mtrr_mask)
1733                         pt =
1734                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1735                 else
1736                         pt =
1737                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1738                 *pt = data;
1739         }
1740
1741         kvm_mmu_reset_context(vcpu);
1742         return 0;
1743 }
1744
1745 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1746 {
1747         u64 mcg_cap = vcpu->arch.mcg_cap;
1748         unsigned bank_num = mcg_cap & 0xff;
1749
1750         switch (msr) {
1751         case MSR_IA32_MCG_STATUS:
1752                 vcpu->arch.mcg_status = data;
1753                 break;
1754         case MSR_IA32_MCG_CTL:
1755                 if (!(mcg_cap & MCG_CTL_P))
1756                         return 1;
1757                 if (data != 0 && data != ~(u64)0)
1758                         return -1;
1759                 vcpu->arch.mcg_ctl = data;
1760                 break;
1761         default:
1762                 if (msr >= MSR_IA32_MC0_CTL &&
1763                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1764                         u32 offset = msr - MSR_IA32_MC0_CTL;
1765                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1766                          * some Linux kernels though clear bit 10 in bank 4 to
1767                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1768                          * this to avoid an uncatched #GP in the guest
1769                          */
1770                         if ((offset & 0x3) == 0 &&
1771                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1772                                 return -1;
1773                         vcpu->arch.mce_banks[offset] = data;
1774                         break;
1775                 }
1776                 return 1;
1777         }
1778         return 0;
1779 }
1780
1781 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1782 {
1783         struct kvm *kvm = vcpu->kvm;
1784         int lm = is_long_mode(vcpu);
1785         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1786                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1787         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1788                 : kvm->arch.xen_hvm_config.blob_size_32;
1789         u32 page_num = data & ~PAGE_MASK;
1790         u64 page_addr = data & PAGE_MASK;
1791         u8 *page;
1792         int r;
1793
1794         r = -E2BIG;
1795         if (page_num >= blob_size)
1796                 goto out;
1797         r = -ENOMEM;
1798         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1799         if (IS_ERR(page)) {
1800                 r = PTR_ERR(page);
1801                 goto out;
1802         }
1803         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1804                 goto out_free;
1805         r = 0;
1806 out_free:
1807         kfree(page);
1808 out:
1809         return r;
1810 }
1811
1812 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1813 {
1814         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1815 }
1816
1817 static bool kvm_hv_msr_partition_wide(u32 msr)
1818 {
1819         bool r = false;
1820         switch (msr) {
1821         case HV_X64_MSR_GUEST_OS_ID:
1822         case HV_X64_MSR_HYPERCALL:
1823         case HV_X64_MSR_REFERENCE_TSC:
1824         case HV_X64_MSR_TIME_REF_COUNT:
1825                 r = true;
1826                 break;
1827         }
1828
1829         return r;
1830 }
1831
1832 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1833 {
1834         struct kvm *kvm = vcpu->kvm;
1835
1836         switch (msr) {
1837         case HV_X64_MSR_GUEST_OS_ID:
1838                 kvm->arch.hv_guest_os_id = data;
1839                 /* setting guest os id to zero disables hypercall page */
1840                 if (!kvm->arch.hv_guest_os_id)
1841                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1842                 break;
1843         case HV_X64_MSR_HYPERCALL: {
1844                 u64 gfn;
1845                 unsigned long addr;
1846                 u8 instructions[4];
1847
1848                 /* if guest os id is not set hypercall should remain disabled */
1849                 if (!kvm->arch.hv_guest_os_id)
1850                         break;
1851                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1852                         kvm->arch.hv_hypercall = data;
1853                         break;
1854                 }
1855                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1856                 addr = gfn_to_hva(kvm, gfn);
1857                 if (kvm_is_error_hva(addr))
1858                         return 1;
1859                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1860                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1861                 if (__copy_to_user((void __user *)addr, instructions, 4))
1862                         return 1;
1863                 kvm->arch.hv_hypercall = data;
1864                 mark_page_dirty(kvm, gfn);
1865                 break;
1866         }
1867         case HV_X64_MSR_REFERENCE_TSC: {
1868                 u64 gfn;
1869                 HV_REFERENCE_TSC_PAGE tsc_ref;
1870                 memset(&tsc_ref, 0, sizeof(tsc_ref));
1871                 kvm->arch.hv_tsc_page = data;
1872                 if (!(data & HV_X64_MSR_TSC_REFERENCE_ENABLE))
1873                         break;
1874                 gfn = data >> HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT;
1875                 if (kvm_write_guest(kvm, data,
1876                         &tsc_ref, sizeof(tsc_ref)))
1877                         return 1;
1878                 mark_page_dirty(kvm, gfn);
1879                 break;
1880         }
1881         default:
1882                 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1883                             "data 0x%llx\n", msr, data);
1884                 return 1;
1885         }
1886         return 0;
1887 }
1888
1889 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1890 {
1891         switch (msr) {
1892         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1893                 u64 gfn;
1894                 unsigned long addr;
1895
1896                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1897                         vcpu->arch.hv_vapic = data;
1898                         break;
1899                 }
1900                 gfn = data >> HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT;
1901                 addr = gfn_to_hva(vcpu->kvm, gfn);
1902                 if (kvm_is_error_hva(addr))
1903                         return 1;
1904                 if (__clear_user((void __user *)addr, PAGE_SIZE))
1905                         return 1;
1906                 vcpu->arch.hv_vapic = data;
1907                 mark_page_dirty(vcpu->kvm, gfn);
1908                 break;
1909         }
1910         case HV_X64_MSR_EOI:
1911                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1912         case HV_X64_MSR_ICR:
1913                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1914         case HV_X64_MSR_TPR:
1915                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1916         default:
1917                 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1918                             "data 0x%llx\n", msr, data);
1919                 return 1;
1920         }
1921
1922         return 0;
1923 }
1924
1925 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1926 {
1927         gpa_t gpa = data & ~0x3f;
1928
1929         /* Bits 2:5 are reserved, Should be zero */
1930         if (data & 0x3c)
1931                 return 1;
1932
1933         vcpu->arch.apf.msr_val = data;
1934
1935         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1936                 kvm_clear_async_pf_completion_queue(vcpu);
1937                 kvm_async_pf_hash_reset(vcpu);
1938                 return 0;
1939         }
1940
1941         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
1942                                         sizeof(u32)))
1943                 return 1;
1944
1945         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1946         kvm_async_pf_wakeup_all(vcpu);
1947         return 0;
1948 }
1949
1950 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1951 {
1952         vcpu->arch.pv_time_enabled = false;
1953 }
1954
1955 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1956 {
1957         u64 delta;
1958
1959         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1960                 return;
1961
1962         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1963         vcpu->arch.st.last_steal = current->sched_info.run_delay;
1964         vcpu->arch.st.accum_steal = delta;
1965 }
1966
1967 static void record_steal_time(struct kvm_vcpu *vcpu)
1968 {
1969         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1970                 return;
1971
1972         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1973                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1974                 return;
1975
1976         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1977         vcpu->arch.st.steal.version += 2;
1978         vcpu->arch.st.accum_steal = 0;
1979
1980         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1981                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1982 }
1983
1984 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1985 {
1986         bool pr = false;
1987         u32 msr = msr_info->index;
1988         u64 data = msr_info->data;
1989
1990         switch (msr) {
1991         case MSR_AMD64_NB_CFG:
1992         case MSR_IA32_UCODE_REV:
1993         case MSR_IA32_UCODE_WRITE:
1994         case MSR_VM_HSAVE_PA:
1995         case MSR_AMD64_PATCH_LOADER:
1996         case MSR_AMD64_BU_CFG2:
1997                 break;
1998
1999         case MSR_EFER:
2000                 return set_efer(vcpu, data);
2001         case MSR_K7_HWCR:
2002                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2003                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2004                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2005                 if (data != 0) {
2006                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2007                                     data);
2008                         return 1;
2009                 }
2010                 break;
2011         case MSR_FAM10H_MMIO_CONF_BASE:
2012                 if (data != 0) {
2013                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2014                                     "0x%llx\n", data);
2015                         return 1;
2016                 }
2017                 break;
2018         case MSR_IA32_DEBUGCTLMSR:
2019                 if (!data) {
2020                         /* We support the non-activated case already */
2021                         break;
2022                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2023                         /* Values other than LBR and BTF are vendor-specific,
2024                            thus reserved and should throw a #GP */
2025                         return 1;
2026                 }
2027                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2028                             __func__, data);
2029                 break;
2030         case 0x200 ... 0x2ff:
2031                 return set_msr_mtrr(vcpu, msr, data);
2032         case MSR_IA32_APICBASE:
2033                 return kvm_set_apic_base(vcpu, msr_info);
2034         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2035                 return kvm_x2apic_msr_write(vcpu, msr, data);
2036         case MSR_IA32_TSCDEADLINE:
2037                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2038                 break;
2039         case MSR_IA32_TSC_ADJUST:
2040                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
2041                         if (!msr_info->host_initiated) {
2042                                 u64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2043                                 kvm_x86_ops->adjust_tsc_offset(vcpu, adj, true);
2044                         }
2045                         vcpu->arch.ia32_tsc_adjust_msr = data;
2046                 }
2047                 break;
2048         case MSR_IA32_MISC_ENABLE:
2049                 vcpu->arch.ia32_misc_enable_msr = data;
2050                 break;
2051         case MSR_KVM_WALL_CLOCK_NEW:
2052         case MSR_KVM_WALL_CLOCK:
2053                 vcpu->kvm->arch.wall_clock = data;
2054                 kvm_write_wall_clock(vcpu->kvm, data);
2055                 break;
2056         case MSR_KVM_SYSTEM_TIME_NEW:
2057         case MSR_KVM_SYSTEM_TIME: {
2058                 u64 gpa_offset;
2059                 kvmclock_reset(vcpu);
2060
2061                 vcpu->arch.time = data;
2062                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2063
2064                 /* we verify if the enable bit is set... */
2065                 if (!(data & 1))
2066                         break;
2067
2068                 gpa_offset = data & ~(PAGE_MASK | 1);
2069
2070                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2071                      &vcpu->arch.pv_time, data & ~1ULL,
2072                      sizeof(struct pvclock_vcpu_time_info)))
2073                         vcpu->arch.pv_time_enabled = false;
2074                 else
2075                         vcpu->arch.pv_time_enabled = true;
2076
2077                 break;
2078         }
2079         case MSR_KVM_ASYNC_PF_EN:
2080                 if (kvm_pv_enable_async_pf(vcpu, data))
2081                         return 1;
2082                 break;
2083         case MSR_KVM_STEAL_TIME:
2084
2085                 if (unlikely(!sched_info_on()))
2086                         return 1;
2087
2088                 if (data & KVM_STEAL_RESERVED_MASK)
2089                         return 1;
2090
2091                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2092                                                 data & KVM_STEAL_VALID_BITS,
2093                                                 sizeof(struct kvm_steal_time)))
2094                         return 1;
2095
2096                 vcpu->arch.st.msr_val = data;
2097
2098                 if (!(data & KVM_MSR_ENABLED))
2099                         break;
2100
2101                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
2102
2103                 preempt_disable();
2104                 accumulate_steal_time(vcpu);
2105                 preempt_enable();
2106
2107                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2108
2109                 break;
2110         case MSR_KVM_PV_EOI_EN:
2111                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2112                         return 1;
2113                 break;
2114
2115         case MSR_IA32_MCG_CTL:
2116         case MSR_IA32_MCG_STATUS:
2117         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
2118                 return set_msr_mce(vcpu, msr, data);
2119
2120         /* Performance counters are not protected by a CPUID bit,
2121          * so we should check all of them in the generic path for the sake of
2122          * cross vendor migration.
2123          * Writing a zero into the event select MSRs disables them,
2124          * which we perfectly emulate ;-). Any other value should be at least
2125          * reported, some guests depend on them.
2126          */
2127         case MSR_K7_EVNTSEL0:
2128         case MSR_K7_EVNTSEL1:
2129         case MSR_K7_EVNTSEL2:
2130         case MSR_K7_EVNTSEL3:
2131                 if (data != 0)
2132                         vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
2133                                     "0x%x data 0x%llx\n", msr, data);
2134                 break;
2135         /* at least RHEL 4 unconditionally writes to the perfctr registers,
2136          * so we ignore writes to make it happy.
2137          */
2138         case MSR_K7_PERFCTR0:
2139         case MSR_K7_PERFCTR1:
2140         case MSR_K7_PERFCTR2:
2141         case MSR_K7_PERFCTR3:
2142                 vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
2143                             "0x%x data 0x%llx\n", msr, data);
2144                 break;
2145         case MSR_P6_PERFCTR0:
2146         case MSR_P6_PERFCTR1:
2147                 pr = true;
2148         case MSR_P6_EVNTSEL0:
2149         case MSR_P6_EVNTSEL1:
2150                 if (kvm_pmu_msr(vcpu, msr))
2151                         return kvm_pmu_set_msr(vcpu, msr_info);
2152
2153                 if (pr || data != 0)
2154                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2155                                     "0x%x data 0x%llx\n", msr, data);
2156                 break;
2157         case MSR_K7_CLK_CTL:
2158                 /*
2159                  * Ignore all writes to this no longer documented MSR.
2160                  * Writes are only relevant for old K7 processors,
2161                  * all pre-dating SVM, but a recommended workaround from
2162                  * AMD for these chips. It is possible to specify the
2163                  * affected processor models on the command line, hence
2164                  * the need to ignore the workaround.
2165                  */
2166                 break;
2167         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2168                 if (kvm_hv_msr_partition_wide(msr)) {
2169                         int r;
2170                         mutex_lock(&vcpu->kvm->lock);
2171                         r = set_msr_hyperv_pw(vcpu, msr, data);
2172                         mutex_unlock(&vcpu->kvm->lock);
2173                         return r;
2174                 } else
2175                         return set_msr_hyperv(vcpu, msr, data);
2176                 break;
2177         case MSR_IA32_BBL_CR_CTL3:
2178                 /* Drop writes to this legacy MSR -- see rdmsr
2179                  * counterpart for further detail.
2180                  */
2181                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2182                 break;
2183         case MSR_AMD64_OSVW_ID_LENGTH:
2184                 if (!guest_cpuid_has_osvw(vcpu))
2185                         return 1;
2186                 vcpu->arch.osvw.length = data;
2187                 break;
2188         case MSR_AMD64_OSVW_STATUS:
2189                 if (!guest_cpuid_has_osvw(vcpu))
2190                         return 1;
2191                 vcpu->arch.osvw.status = data;
2192                 break;
2193         default:
2194                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2195                         return xen_hvm_config(vcpu, data);
2196                 if (kvm_pmu_msr(vcpu, msr))
2197                         return kvm_pmu_set_msr(vcpu, msr_info);
2198                 if (!ignore_msrs) {
2199                         vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2200                                     msr, data);
2201                         return 1;
2202                 } else {
2203                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2204                                     msr, data);
2205                         break;
2206                 }
2207         }
2208         return 0;
2209 }
2210 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2211
2212
2213 /*
2214  * Reads an msr value (of 'msr_index') into 'pdata'.
2215  * Returns 0 on success, non-0 otherwise.
2216  * Assumes vcpu_load() was already called.
2217  */
2218 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
2219 {
2220         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
2221 }
2222
2223 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2224 {
2225         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
2226
2227         if (!msr_mtrr_valid(msr))
2228                 return 1;
2229
2230         if (msr == MSR_MTRRdefType)
2231                 *pdata = vcpu->arch.mtrr_state.def_type +
2232                          (vcpu->arch.mtrr_state.enabled << 10);
2233         else if (msr == MSR_MTRRfix64K_00000)
2234                 *pdata = p[0];
2235         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
2236                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
2237         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
2238                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
2239         else if (msr == MSR_IA32_CR_PAT)
2240                 *pdata = vcpu->arch.pat;
2241         else {  /* Variable MTRRs */
2242                 int idx, is_mtrr_mask;
2243                 u64 *pt;
2244
2245                 idx = (msr - 0x200) / 2;
2246                 is_mtrr_mask = msr - 0x200 - 2 * idx;
2247                 if (!is_mtrr_mask)
2248                         pt =
2249                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
2250                 else
2251                         pt =
2252                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
2253                 *pdata = *pt;
2254         }
2255
2256         return 0;
2257 }
2258
2259 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2260 {
2261         u64 data;
2262         u64 mcg_cap = vcpu->arch.mcg_cap;
2263         unsigned bank_num = mcg_cap & 0xff;
2264
2265         switch (msr) {
2266         case MSR_IA32_P5_MC_ADDR:
2267         case MSR_IA32_P5_MC_TYPE:
2268                 data = 0;
2269                 break;
2270         case MSR_IA32_MCG_CAP:
2271                 data = vcpu->arch.mcg_cap;
2272                 break;
2273         case MSR_IA32_MCG_CTL:
2274                 if (!(mcg_cap & MCG_CTL_P))
2275                         return 1;
2276                 data = vcpu->arch.mcg_ctl;
2277                 break;
2278         case MSR_IA32_MCG_STATUS:
2279                 data = vcpu->arch.mcg_status;
2280                 break;
2281         default:
2282                 if (msr >= MSR_IA32_MC0_CTL &&
2283                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
2284                         u32 offset = msr - MSR_IA32_MC0_CTL;
2285                         data = vcpu->arch.mce_banks[offset];
2286                         break;
2287                 }
2288                 return 1;
2289         }
2290         *pdata = data;
2291         return 0;
2292 }
2293
2294 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2295 {
2296         u64 data = 0;
2297         struct kvm *kvm = vcpu->kvm;
2298
2299         switch (msr) {
2300         case HV_X64_MSR_GUEST_OS_ID:
2301                 data = kvm->arch.hv_guest_os_id;
2302                 break;
2303         case HV_X64_MSR_HYPERCALL:
2304                 data = kvm->arch.hv_hypercall;
2305                 break;
2306         case HV_X64_MSR_TIME_REF_COUNT: {
2307                 data =
2308                      div_u64(get_kernel_ns() + kvm->arch.kvmclock_offset, 100);
2309                 break;
2310         }
2311         case HV_X64_MSR_REFERENCE_TSC:
2312                 data = kvm->arch.hv_tsc_page;
2313                 break;
2314         default:
2315                 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
2316                 return 1;
2317         }
2318
2319         *pdata = data;
2320         return 0;
2321 }
2322
2323 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2324 {
2325         u64 data = 0;
2326
2327         switch (msr) {
2328         case HV_X64_MSR_VP_INDEX: {
2329                 int r;
2330                 struct kvm_vcpu *v;
2331                 kvm_for_each_vcpu(r, v, vcpu->kvm)
2332                         if (v == vcpu)
2333                                 data = r;
2334                 break;
2335         }
2336         case HV_X64_MSR_EOI:
2337                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
2338         case HV_X64_MSR_ICR:
2339                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
2340         case HV_X64_MSR_TPR:
2341                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
2342         case HV_X64_MSR_APIC_ASSIST_PAGE:
2343                 data = vcpu->arch.hv_vapic;
2344                 break;
2345         default:
2346                 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
2347                 return 1;
2348         }
2349         *pdata = data;
2350         return 0;
2351 }
2352
2353 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2354 {
2355         u64 data;
2356
2357         switch (msr) {
2358         case MSR_IA32_PLATFORM_ID:
2359         case MSR_IA32_EBL_CR_POWERON:
2360         case MSR_IA32_DEBUGCTLMSR:
2361         case MSR_IA32_LASTBRANCHFROMIP:
2362         case MSR_IA32_LASTBRANCHTOIP:
2363         case MSR_IA32_LASTINTFROMIP:
2364         case MSR_IA32_LASTINTTOIP:
2365         case MSR_K8_SYSCFG:
2366         case MSR_K7_HWCR:
2367         case MSR_VM_HSAVE_PA:
2368         case MSR_K7_EVNTSEL0:
2369         case MSR_K7_PERFCTR0:
2370         case MSR_K8_INT_PENDING_MSG:
2371         case MSR_AMD64_NB_CFG:
2372         case MSR_FAM10H_MMIO_CONF_BASE:
2373         case MSR_AMD64_BU_CFG2:
2374                 data = 0;
2375                 break;
2376         case MSR_P6_PERFCTR0:
2377         case MSR_P6_PERFCTR1:
2378         case MSR_P6_EVNTSEL0:
2379         case MSR_P6_EVNTSEL1:
2380                 if (kvm_pmu_msr(vcpu, msr))
2381                         return kvm_pmu_get_msr(vcpu, msr, pdata);
2382                 data = 0;
2383                 break;
2384         case MSR_IA32_UCODE_REV:
2385                 data = 0x100000000ULL;
2386                 break;
2387         case MSR_MTRRcap:
2388                 data = 0x500 | KVM_NR_VAR_MTRR;
2389                 break;
2390         case 0x200 ... 0x2ff:
2391                 return get_msr_mtrr(vcpu, msr, pdata);
2392         case 0xcd: /* fsb frequency */
2393                 data = 3;
2394                 break;
2395                 /*
2396                  * MSR_EBC_FREQUENCY_ID
2397                  * Conservative value valid for even the basic CPU models.
2398                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2399                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2400                  * and 266MHz for model 3, or 4. Set Core Clock
2401                  * Frequency to System Bus Frequency Ratio to 1 (bits
2402                  * 31:24) even though these are only valid for CPU
2403                  * models > 2, however guests may end up dividing or
2404                  * multiplying by zero otherwise.
2405                  */
2406         case MSR_EBC_FREQUENCY_ID:
2407                 data = 1 << 24;
2408                 break;
2409         case MSR_IA32_APICBASE:
2410                 data = kvm_get_apic_base(vcpu);
2411                 break;
2412         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2413                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
2414                 break;
2415         case MSR_IA32_TSCDEADLINE:
2416                 data = kvm_get_lapic_tscdeadline_msr(vcpu);
2417                 break;
2418         case MSR_IA32_TSC_ADJUST:
2419                 data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2420                 break;
2421         case MSR_IA32_MISC_ENABLE:
2422                 data = vcpu->arch.ia32_misc_enable_msr;
2423                 break;
2424         case MSR_IA32_PERF_STATUS:
2425                 /* TSC increment by tick */
2426                 data = 1000ULL;
2427                 /* CPU multiplier */
2428                 data |= (((uint64_t)4ULL) << 40);
2429                 break;
2430         case MSR_EFER:
2431                 data = vcpu->arch.efer;
2432                 break;
2433         case MSR_KVM_WALL_CLOCK:
2434         case MSR_KVM_WALL_CLOCK_NEW:
2435                 data = vcpu->kvm->arch.wall_clock;
2436                 break;
2437         case MSR_KVM_SYSTEM_TIME:
2438         case MSR_KVM_SYSTEM_TIME_NEW:
2439                 data = vcpu->arch.time;
2440                 break;
2441         case MSR_KVM_ASYNC_PF_EN:
2442                 data = vcpu->arch.apf.msr_val;
2443                 break;
2444         case MSR_KVM_STEAL_TIME:
2445                 data = vcpu->arch.st.msr_val;
2446                 break;
2447         case MSR_KVM_PV_EOI_EN:
2448                 data = vcpu->arch.pv_eoi.msr_val;
2449                 break;
2450         case MSR_IA32_P5_MC_ADDR:
2451         case MSR_IA32_P5_MC_TYPE:
2452         case MSR_IA32_MCG_CAP:
2453         case MSR_IA32_MCG_CTL:
2454         case MSR_IA32_MCG_STATUS:
2455         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
2456                 return get_msr_mce(vcpu, msr, pdata);
2457         case MSR_K7_CLK_CTL:
2458                 /*
2459                  * Provide expected ramp-up count for K7. All other
2460                  * are set to zero, indicating minimum divisors for
2461                  * every field.
2462                  *
2463                  * This prevents guest kernels on AMD host with CPU
2464                  * type 6, model 8 and higher from exploding due to
2465                  * the rdmsr failing.
2466                  */
2467                 data = 0x20000000;
2468                 break;
2469         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2470                 if (kvm_hv_msr_partition_wide(msr)) {
2471                         int r;
2472                         mutex_lock(&vcpu->kvm->lock);
2473                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
2474                         mutex_unlock(&vcpu->kvm->lock);
2475                         return r;
2476                 } else
2477                         return get_msr_hyperv(vcpu, msr, pdata);
2478                 break;
2479         case MSR_IA32_BBL_CR_CTL3:
2480                 /* This legacy MSR exists but isn't fully documented in current
2481                  * silicon.  It is however accessed by winxp in very narrow
2482                  * scenarios where it sets bit #19, itself documented as
2483                  * a "reserved" bit.  Best effort attempt to source coherent
2484                  * read data here should the balance of the register be
2485                  * interpreted by the guest:
2486                  *
2487                  * L2 cache control register 3: 64GB range, 256KB size,
2488                  * enabled, latency 0x1, configured
2489                  */
2490                 data = 0xbe702111;
2491                 break;
2492         case MSR_AMD64_OSVW_ID_LENGTH:
2493                 if (!guest_cpuid_has_osvw(vcpu))
2494                         return 1;
2495                 data = vcpu->arch.osvw.length;
2496                 break;
2497         case MSR_AMD64_OSVW_STATUS:
2498                 if (!guest_cpuid_has_osvw(vcpu))
2499                         return 1;
2500                 data = vcpu->arch.osvw.status;
2501                 break;
2502         default:
2503                 if (kvm_pmu_msr(vcpu, msr))
2504                         return kvm_pmu_get_msr(vcpu, msr, pdata);
2505                 if (!ignore_msrs) {
2506                         vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
2507                         return 1;
2508                 } else {
2509                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
2510                         data = 0;
2511                 }
2512                 break;
2513         }
2514         *pdata = data;
2515         return 0;
2516 }
2517 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2518
2519 /*
2520  * Read or write a bunch of msrs. All parameters are kernel addresses.
2521  *
2522  * @return number of msrs set successfully.
2523  */
2524 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2525                     struct kvm_msr_entry *entries,
2526                     int (*do_msr)(struct kvm_vcpu *vcpu,
2527                                   unsigned index, u64 *data))
2528 {
2529         int i, idx;
2530
2531         idx = srcu_read_lock(&vcpu->kvm->srcu);
2532         for (i = 0; i < msrs->nmsrs; ++i)
2533                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2534                         break;
2535         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2536
2537         return i;
2538 }
2539
2540 /*
2541  * Read or write a bunch of msrs. Parameters are user addresses.
2542  *
2543  * @return number of msrs set successfully.
2544  */
2545 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2546                   int (*do_msr)(struct kvm_vcpu *vcpu,
2547                                 unsigned index, u64 *data),
2548                   int writeback)
2549 {
2550         struct kvm_msrs msrs;
2551         struct kvm_msr_entry *entries;
2552         int r, n;
2553         unsigned size;
2554
2555         r = -EFAULT;
2556         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2557                 goto out;
2558
2559         r = -E2BIG;
2560         if (msrs.nmsrs >= MAX_IO_MSRS)
2561                 goto out;
2562
2563         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2564         entries = memdup_user(user_msrs->entries, size);
2565         if (IS_ERR(entries)) {
2566                 r = PTR_ERR(entries);
2567                 goto out;
2568         }
2569
2570         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2571         if (r < 0)
2572                 goto out_free;
2573
2574         r = -EFAULT;
2575         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2576                 goto out_free;
2577
2578         r = n;
2579
2580 out_free:
2581         kfree(entries);
2582 out:
2583         return r;
2584 }
2585
2586 int kvm_dev_ioctl_check_extension(long ext)
2587 {
2588         int r;
2589
2590         switch (ext) {
2591         case KVM_CAP_IRQCHIP:
2592         case KVM_CAP_HLT:
2593         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2594         case KVM_CAP_SET_TSS_ADDR:
2595         case KVM_CAP_EXT_CPUID:
2596         case KVM_CAP_EXT_EMUL_CPUID:
2597         case KVM_CAP_CLOCKSOURCE:
2598         case KVM_CAP_PIT:
2599         case KVM_CAP_NOP_IO_DELAY:
2600         case KVM_CAP_MP_STATE:
2601         case KVM_CAP_SYNC_MMU:
2602         case KVM_CAP_USER_NMI:
2603         case KVM_CAP_REINJECT_CONTROL:
2604         case KVM_CAP_IRQ_INJECT_STATUS:
2605         case KVM_CAP_IRQFD:
2606         case KVM_CAP_IOEVENTFD:
2607         case KVM_CAP_PIT2:
2608         case KVM_CAP_PIT_STATE2:
2609         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2610         case KVM_CAP_XEN_HVM:
2611         case KVM_CAP_ADJUST_CLOCK:
2612         case KVM_CAP_VCPU_EVENTS:
2613         case KVM_CAP_HYPERV:
2614         case KVM_CAP_HYPERV_VAPIC:
2615         case KVM_CAP_HYPERV_SPIN:
2616         case KVM_CAP_PCI_SEGMENT:
2617         case KVM_CAP_DEBUGREGS:
2618         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2619         case KVM_CAP_XSAVE:
2620         case KVM_CAP_ASYNC_PF:
2621         case KVM_CAP_GET_TSC_KHZ:
2622         case KVM_CAP_KVMCLOCK_CTRL:
2623         case KVM_CAP_READONLY_MEM:
2624         case KVM_CAP_HYPERV_TIME:
2625 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2626         case KVM_CAP_ASSIGN_DEV_IRQ:
2627         case KVM_CAP_PCI_2_3:
2628 #endif
2629                 r = 1;
2630                 break;
2631         case KVM_CAP_COALESCED_MMIO:
2632                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2633                 break;
2634         case KVM_CAP_VAPIC:
2635                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2636                 break;
2637         case KVM_CAP_NR_VCPUS:
2638                 r = KVM_SOFT_MAX_VCPUS;
2639                 break;
2640         case KVM_CAP_MAX_VCPUS:
2641                 r = KVM_MAX_VCPUS;
2642                 break;
2643         case KVM_CAP_NR_MEMSLOTS:
2644                 r = KVM_USER_MEM_SLOTS;
2645                 break;
2646         case KVM_CAP_PV_MMU:    /* obsolete */
2647                 r = 0;
2648                 break;
2649 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2650         case KVM_CAP_IOMMU:
2651                 r = iommu_present(&pci_bus_type);
2652                 break;
2653 #endif
2654         case KVM_CAP_MCE:
2655                 r = KVM_MAX_MCE_BANKS;
2656                 break;
2657         case KVM_CAP_XCRS:
2658                 r = cpu_has_xsave;
2659                 break;
2660         case KVM_CAP_TSC_CONTROL:
2661                 r = kvm_has_tsc_control;
2662                 break;
2663         case KVM_CAP_TSC_DEADLINE_TIMER:
2664                 r = boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER);
2665                 break;
2666         default:
2667                 r = 0;
2668                 break;
2669         }
2670         return r;
2671
2672 }
2673
2674 long kvm_arch_dev_ioctl(struct file *filp,
2675                         unsigned int ioctl, unsigned long arg)
2676 {
2677         void __user *argp = (void __user *)arg;
2678         long r;
2679
2680         switch (ioctl) {
2681         case KVM_GET_MSR_INDEX_LIST: {
2682                 struct kvm_msr_list __user *user_msr_list = argp;
2683                 struct kvm_msr_list msr_list;
2684                 unsigned n;
2685
2686                 r = -EFAULT;
2687                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2688                         goto out;
2689                 n = msr_list.nmsrs;
2690                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2691                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2692                         goto out;
2693                 r = -E2BIG;
2694                 if (n < msr_list.nmsrs)
2695                         goto out;
2696                 r = -EFAULT;
2697                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2698                                  num_msrs_to_save * sizeof(u32)))
2699                         goto out;
2700                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2701                                  &emulated_msrs,
2702                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2703                         goto out;
2704                 r = 0;
2705                 break;
2706         }
2707         case KVM_GET_SUPPORTED_CPUID:
2708         case KVM_GET_EMULATED_CPUID: {
2709                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2710                 struct kvm_cpuid2 cpuid;
2711
2712                 r = -EFAULT;
2713                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2714                         goto out;
2715
2716                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2717                                             ioctl);
2718                 if (r)
2719                         goto out;
2720
2721                 r = -EFAULT;
2722                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2723                         goto out;
2724                 r = 0;
2725                 break;
2726         }
2727         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2728                 u64 mce_cap;
2729
2730                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2731                 r = -EFAULT;
2732                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2733                         goto out;
2734                 r = 0;
2735                 break;
2736         }
2737         default:
2738                 r = -EINVAL;
2739         }
2740 out:
2741         return r;
2742 }
2743
2744 static void wbinvd_ipi(void *garbage)
2745 {
2746         wbinvd();
2747 }
2748
2749 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2750 {
2751         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2752 }
2753
2754 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2755 {
2756         /* Address WBINVD may be executed by guest */
2757         if (need_emulate_wbinvd(vcpu)) {
2758                 if (kvm_x86_ops->has_wbinvd_exit())
2759                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2760                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2761                         smp_call_function_single(vcpu->cpu,
2762                                         wbinvd_ipi, NULL, 1);
2763         }
2764
2765         kvm_x86_ops->vcpu_load(vcpu, cpu);
2766
2767         /* Apply any externally detected TSC adjustments (due to suspend) */
2768         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2769                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2770                 vcpu->arch.tsc_offset_adjustment = 0;
2771                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
2772         }
2773
2774         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2775                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2776                                 native_read_tsc() - vcpu->arch.last_host_tsc;
2777                 if (tsc_delta < 0)
2778                         mark_tsc_unstable("KVM discovered backwards TSC");
2779                 if (check_tsc_unstable()) {
2780                         u64 offset = kvm_x86_ops->compute_tsc_offset(vcpu,
2781                                                 vcpu->arch.last_guest_tsc);
2782                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
2783                         vcpu->arch.tsc_catchup = 1;
2784                 }
2785                 /*
2786                  * On a host with synchronized TSC, there is no need to update
2787                  * kvmclock on vcpu->cpu migration
2788                  */
2789                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2790                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2791                 if (vcpu->cpu != cpu)
2792                         kvm_migrate_timers(vcpu);
2793                 vcpu->cpu = cpu;
2794         }
2795
2796         accumulate_steal_time(vcpu);
2797         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2798 }
2799
2800 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2801 {
2802         kvm_x86_ops->vcpu_put(vcpu);
2803         kvm_put_guest_fpu(vcpu);
2804         vcpu->arch.last_host_tsc = native_read_tsc();
2805 }
2806
2807 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2808                                     struct kvm_lapic_state *s)
2809 {
2810         kvm_x86_ops->sync_pir_to_irr(vcpu);
2811         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2812
2813         return 0;
2814 }
2815
2816 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2817                                     struct kvm_lapic_state *s)
2818 {
2819         kvm_apic_post_state_restore(vcpu, s);
2820         update_cr8_intercept(vcpu);
2821
2822         return 0;
2823 }
2824
2825 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2826                                     struct kvm_interrupt *irq)
2827 {
2828         if (irq->irq >= KVM_NR_INTERRUPTS)
2829                 return -EINVAL;
2830         if (irqchip_in_kernel(vcpu->kvm))
2831                 return -ENXIO;
2832
2833         kvm_queue_interrupt(vcpu, irq->irq, false);
2834         kvm_make_request(KVM_REQ_EVENT, vcpu);
2835
2836         return 0;
2837 }
2838
2839 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2840 {
2841         kvm_inject_nmi(vcpu);
2842
2843         return 0;
2844 }
2845
2846 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2847                                            struct kvm_tpr_access_ctl *tac)
2848 {
2849         if (tac->flags)
2850                 return -EINVAL;
2851         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2852         return 0;
2853 }
2854
2855 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2856                                         u64 mcg_cap)
2857 {
2858         int r;
2859         unsigned bank_num = mcg_cap & 0xff, bank;
2860
2861         r = -EINVAL;
2862         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2863                 goto out;
2864         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2865                 goto out;
2866         r = 0;
2867         vcpu->arch.mcg_cap = mcg_cap;
2868         /* Init IA32_MCG_CTL to all 1s */
2869         if (mcg_cap & MCG_CTL_P)
2870                 vcpu->arch.mcg_ctl = ~(u64)0;
2871         /* Init IA32_MCi_CTL to all 1s */
2872         for (bank = 0; bank < bank_num; bank++)
2873                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2874 out:
2875         return r;
2876 }
2877
2878 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2879                                       struct kvm_x86_mce *mce)
2880 {
2881         u64 mcg_cap = vcpu->arch.mcg_cap;
2882         unsigned bank_num = mcg_cap & 0xff;
2883         u64 *banks = vcpu->arch.mce_banks;
2884
2885         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2886                 return -EINVAL;
2887         /*
2888          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2889          * reporting is disabled
2890          */
2891         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2892             vcpu->arch.mcg_ctl != ~(u64)0)
2893                 return 0;
2894         banks += 4 * mce->bank;
2895         /*
2896          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2897          * reporting is disabled for the bank
2898          */
2899         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2900                 return 0;
2901         if (mce->status & MCI_STATUS_UC) {
2902                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2903                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2904                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2905                         return 0;
2906                 }
2907                 if (banks[1] & MCI_STATUS_VAL)
2908                         mce->status |= MCI_STATUS_OVER;
2909                 banks[2] = mce->addr;
2910                 banks[3] = mce->misc;
2911                 vcpu->arch.mcg_status = mce->mcg_status;
2912                 banks[1] = mce->status;
2913                 kvm_queue_exception(vcpu, MC_VECTOR);
2914         } else if (!(banks[1] & MCI_STATUS_VAL)
2915                    || !(banks[1] & MCI_STATUS_UC)) {
2916                 if (banks[1] & MCI_STATUS_VAL)
2917                         mce->status |= MCI_STATUS_OVER;
2918                 banks[2] = mce->addr;
2919                 banks[3] = mce->misc;
2920                 banks[1] = mce->status;
2921         } else
2922                 banks[1] |= MCI_STATUS_OVER;
2923         return 0;
2924 }
2925
2926 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2927                                                struct kvm_vcpu_events *events)
2928 {
2929         process_nmi(vcpu);
2930         events->exception.injected =
2931                 vcpu->arch.exception.pending &&
2932                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2933         events->exception.nr = vcpu->arch.exception.nr;
2934         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2935         events->exception.pad = 0;
2936         events->exception.error_code = vcpu->arch.exception.error_code;
2937
2938         events->interrupt.injected =
2939                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2940         events->interrupt.nr = vcpu->arch.interrupt.nr;
2941         events->interrupt.soft = 0;
2942         events->interrupt.shadow =
2943                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2944                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2945
2946         events->nmi.injected = vcpu->arch.nmi_injected;
2947         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2948         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2949         events->nmi.pad = 0;
2950
2951         events->sipi_vector = 0; /* never valid when reporting to user space */
2952
2953         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2954                          | KVM_VCPUEVENT_VALID_SHADOW);
2955         memset(&events->reserved, 0, sizeof(events->reserved));
2956 }
2957
2958 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2959                                               struct kvm_vcpu_events *events)
2960 {
2961         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2962                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2963                               | KVM_VCPUEVENT_VALID_SHADOW))
2964                 return -EINVAL;
2965
2966         process_nmi(vcpu);
2967         vcpu->arch.exception.pending = events->exception.injected;
2968         vcpu->arch.exception.nr = events->exception.nr;
2969         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2970         vcpu->arch.exception.error_code = events->exception.error_code;
2971
2972         vcpu->arch.interrupt.pending = events->interrupt.injected;
2973         vcpu->arch.interrupt.nr = events->interrupt.nr;
2974         vcpu->arch.interrupt.soft = events->interrupt.soft;
2975         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2976                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2977                                                   events->interrupt.shadow);
2978
2979         vcpu->arch.nmi_injected = events->nmi.injected;
2980         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2981                 vcpu->arch.nmi_pending = events->nmi.pending;
2982         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2983
2984         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
2985             kvm_vcpu_has_lapic(vcpu))
2986                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
2987
2988         kvm_make_request(KVM_REQ_EVENT, vcpu);
2989
2990         return 0;
2991 }
2992
2993 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2994                                              struct kvm_debugregs *dbgregs)
2995 {
2996         unsigned long val;
2997
2998         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2999         _kvm_get_dr(vcpu, 6, &val);
3000         dbgregs->dr6 = val;
3001         dbgregs->dr7 = vcpu->arch.dr7;
3002         dbgregs->flags = 0;
3003         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3004 }
3005
3006 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3007                                             struct kvm_debugregs *dbgregs)
3008 {
3009         if (dbgregs->flags)
3010                 return -EINVAL;
3011
3012         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3013         vcpu->arch.dr6 = dbgregs->dr6;
3014         kvm_update_dr6(vcpu);
3015         vcpu->arch.dr7 = dbgregs->dr7;
3016         kvm_update_dr7(vcpu);
3017
3018         return 0;
3019 }
3020
3021 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3022                                          struct kvm_xsave *guest_xsave)
3023 {
3024         if (cpu_has_xsave) {
3025                 memcpy(guest_xsave->region,
3026                         &vcpu->arch.guest_fpu.state->xsave,
3027                         vcpu->arch.guest_xstate_size);
3028                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] &=
3029                         vcpu->arch.guest_supported_xcr0 | XSTATE_FPSSE;
3030         } else {
3031                 memcpy(guest_xsave->region,
3032                         &vcpu->arch.guest_fpu.state->fxsave,
3033                         sizeof(struct i387_fxsave_struct));
3034                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3035                         XSTATE_FPSSE;
3036         }
3037 }
3038
3039 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3040                                         struct kvm_xsave *guest_xsave)
3041 {
3042         u64 xstate_bv =
3043                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3044
3045         if (cpu_has_xsave) {
3046                 /*
3047                  * Here we allow setting states that are not present in
3048                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3049                  * with old userspace.
3050                  */
3051                 if (xstate_bv & ~KVM_SUPPORTED_XCR0)
3052                         return -EINVAL;
3053                 if (xstate_bv & ~host_xcr0)
3054                         return -EINVAL;
3055                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
3056                         guest_xsave->region, vcpu->arch.guest_xstate_size);
3057         } else {
3058                 if (xstate_bv & ~XSTATE_FPSSE)
3059                         return -EINVAL;
3060                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
3061                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
3062         }
3063         return 0;
3064 }
3065
3066 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3067                                         struct kvm_xcrs *guest_xcrs)
3068 {
3069         if (!cpu_has_xsave) {
3070                 guest_xcrs->nr_xcrs = 0;
3071                 return;
3072         }
3073
3074         guest_xcrs->nr_xcrs = 1;
3075         guest_xcrs->flags = 0;
3076         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3077         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3078 }
3079
3080 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3081                                        struct kvm_xcrs *guest_xcrs)
3082 {
3083         int i, r = 0;
3084
3085         if (!cpu_has_xsave)
3086                 return -EINVAL;
3087
3088         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3089                 return -EINVAL;
3090
3091         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3092                 /* Only support XCR0 currently */
3093                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3094                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3095                                 guest_xcrs->xcrs[i].value);
3096                         break;
3097                 }
3098         if (r)
3099                 r = -EINVAL;
3100         return r;
3101 }
3102
3103 /*
3104  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3105  * stopped by the hypervisor.  This function will be called from the host only.
3106  * EINVAL is returned when the host attempts to set the flag for a guest that
3107  * does not support pv clocks.
3108  */
3109 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3110 {
3111         if (!vcpu->arch.pv_time_enabled)
3112                 return -EINVAL;
3113         vcpu->arch.pvclock_set_guest_stopped_request = true;
3114         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3115         return 0;
3116 }
3117
3118 long kvm_arch_vcpu_ioctl(struct file *filp,
3119                          unsigned int ioctl, unsigned long arg)
3120 {
3121         struct kvm_vcpu *vcpu = filp->private_data;
3122         void __user *argp = (void __user *)arg;
3123         int r;
3124         union {
3125                 struct kvm_lapic_state *lapic;
3126                 struct kvm_xsave *xsave;
3127                 struct kvm_xcrs *xcrs;
3128                 void *buffer;
3129         } u;
3130
3131         u.buffer = NULL;
3132         switch (ioctl) {
3133         case KVM_GET_LAPIC: {
3134                 r = -EINVAL;
3135                 if (!vcpu->arch.apic)
3136                         goto out;
3137                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3138
3139                 r = -ENOMEM;
3140                 if (!u.lapic)
3141                         goto out;
3142                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3143                 if (r)
3144                         goto out;
3145                 r = -EFAULT;
3146                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3147                         goto out;
3148                 r = 0;
3149                 break;
3150         }
3151         case KVM_SET_LAPIC: {
3152                 r = -EINVAL;
3153                 if (!vcpu->arch.apic)
3154                         goto out;
3155                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3156                 if (IS_ERR(u.lapic))
3157                         return PTR_ERR(u.lapic);
3158
3159                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3160                 break;
3161         }
3162         case KVM_INTERRUPT: {
3163                 struct kvm_interrupt irq;
3164
3165                 r = -EFAULT;
3166                 if (copy_from_user(&irq, argp, sizeof irq))
3167                         goto out;
3168                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3169                 break;
3170         }
3171         case KVM_NMI: {
3172                 r = kvm_vcpu_ioctl_nmi(vcpu);
3173                 break;
3174         }
3175         case KVM_SET_CPUID: {
3176                 struct kvm_cpuid __user *cpuid_arg = argp;
3177                 struct kvm_cpuid cpuid;
3178
3179                 r = -EFAULT;
3180                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3181                         goto out;
3182                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3183                 break;
3184         }
3185         case KVM_SET_CPUID2: {
3186                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3187                 struct kvm_cpuid2 cpuid;
3188
3189                 r = -EFAULT;
3190                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3191                         goto out;
3192                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3193                                               cpuid_arg->entries);
3194                 break;
3195         }
3196         case KVM_GET_CPUID2: {
3197                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3198                 struct kvm_cpuid2 cpuid;
3199
3200                 r = -EFAULT;
3201                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3202                         goto out;
3203                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3204                                               cpuid_arg->entries);
3205                 if (r)
3206                         goto out;
3207                 r = -EFAULT;
3208                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3209                         goto out;
3210                 r = 0;
3211                 break;
3212         }
3213         case KVM_GET_MSRS:
3214                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
3215                 break;
3216         case KVM_SET_MSRS:
3217                 r = msr_io(vcpu, argp, do_set_msr, 0);
3218                 break;
3219         case KVM_TPR_ACCESS_REPORTING: {
3220                 struct kvm_tpr_access_ctl tac;
3221
3222                 r = -EFAULT;
3223                 if (copy_from_user(&tac, argp, sizeof tac))
3224                         goto out;
3225                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3226                 if (r)
3227                         goto out;
3228                 r = -EFAULT;
3229                 if (copy_to_user(argp, &tac, sizeof tac))
3230                         goto out;
3231                 r = 0;
3232                 break;
3233         };
3234         case KVM_SET_VAPIC_ADDR: {
3235                 struct kvm_vapic_addr va;
3236
3237                 r = -EINVAL;
3238                 if (!irqchip_in_kernel(vcpu->kvm))
3239                         goto out;
3240                 r = -EFAULT;
3241                 if (copy_from_user(&va, argp, sizeof va))
3242                         goto out;
3243                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3244                 break;
3245         }
3246         case KVM_X86_SETUP_MCE: {
3247                 u64 mcg_cap;
3248
3249                 r = -EFAULT;
3250                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3251                         goto out;
3252                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3253                 break;
3254         }
3255         case KVM_X86_SET_MCE: {
3256                 struct kvm_x86_mce mce;
3257
3258                 r = -EFAULT;
3259                 if (copy_from_user(&mce, argp, sizeof mce))
3260                         goto out;
3261                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3262                 break;
3263         }
3264         case KVM_GET_VCPU_EVENTS: {
3265                 struct kvm_vcpu_events events;
3266
3267                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3268
3269                 r = -EFAULT;
3270                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3271                         break;
3272                 r = 0;
3273                 break;
3274         }
3275         case KVM_SET_VCPU_EVENTS: {
3276                 struct kvm_vcpu_events events;
3277
3278                 r = -EFAULT;
3279                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3280                         break;
3281
3282                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3283                 break;
3284         }
3285         case KVM_GET_DEBUGREGS: {
3286                 struct kvm_debugregs dbgregs;
3287
3288                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3289
3290                 r = -EFAULT;
3291                 if (copy_to_user(argp, &dbgregs,
3292                                  sizeof(struct kvm_debugregs)))
3293                         break;
3294                 r = 0;
3295                 break;
3296         }
3297         case KVM_SET_DEBUGREGS: {
3298                 struct kvm_debugregs dbgregs;
3299
3300                 r = -EFAULT;
3301                 if (copy_from_user(&dbgregs, argp,
3302                                    sizeof(struct kvm_debugregs)))
3303                         break;
3304
3305                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3306                 break;
3307         }
3308         case KVM_GET_XSAVE: {
3309                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3310                 r = -ENOMEM;
3311                 if (!u.xsave)
3312                         break;
3313
3314                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3315
3316                 r = -EFAULT;
3317                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3318                         break;
3319                 r = 0;
3320                 break;
3321         }
3322         case KVM_SET_XSAVE: {
3323                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3324                 if (IS_ERR(u.xsave))
3325                         return PTR_ERR(u.xsave);
3326
3327                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3328                 break;
3329         }
3330         case KVM_GET_XCRS: {
3331                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3332                 r = -ENOMEM;
3333                 if (!u.xcrs)
3334                         break;
3335
3336                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3337
3338                 r = -EFAULT;
3339                 if (copy_to_user(argp, u.xcrs,
3340                                  sizeof(struct kvm_xcrs)))
3341                         break;
3342                 r = 0;
3343                 break;
3344         }
3345         case KVM_SET_XCRS: {
3346                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3347                 if (IS_ERR(u.xcrs))
3348                         return PTR_ERR(u.xcrs);
3349
3350                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3351                 break;
3352         }
3353         case KVM_SET_TSC_KHZ: {
3354                 u32 user_tsc_khz;
3355
3356                 r = -EINVAL;
3357                 user_tsc_khz = (u32)arg;
3358
3359                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3360                         goto out;
3361
3362                 if (user_tsc_khz == 0)
3363                         user_tsc_khz = tsc_khz;
3364
3365                 kvm_set_tsc_khz(vcpu, user_tsc_khz);
3366
3367                 r = 0;
3368                 goto out;
3369         }
3370         case KVM_GET_TSC_KHZ: {
3371                 r = vcpu->arch.virtual_tsc_khz;
3372                 goto out;
3373         }
3374         case KVM_KVMCLOCK_CTRL: {
3375                 r = kvm_set_guest_paused(vcpu);
3376                 goto out;
3377         }
3378         default:
3379                 r = -EINVAL;
3380         }
3381 out:
3382         kfree(u.buffer);
3383         return r;
3384 }
3385
3386 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3387 {
3388         return VM_FAULT_SIGBUS;
3389 }
3390
3391 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3392 {
3393         int ret;
3394
3395         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3396                 return -EINVAL;
3397         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3398         return ret;
3399 }
3400
3401 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3402                                               u64 ident_addr)
3403 {
3404         kvm->arch.ept_identity_map_addr = ident_addr;
3405         return 0;
3406 }
3407
3408 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3409                                           u32 kvm_nr_mmu_pages)
3410 {
3411         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3412                 return -EINVAL;
3413
3414         mutex_lock(&kvm->slots_lock);
3415
3416         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3417         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3418
3419         mutex_unlock(&kvm->slots_lock);
3420         return 0;
3421 }
3422
3423 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3424 {
3425         return kvm->arch.n_max_mmu_pages;
3426 }
3427
3428 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3429 {
3430         int r;
3431
3432         r = 0;
3433         switch (chip->chip_id) {
3434         case KVM_IRQCHIP_PIC_MASTER:
3435                 memcpy(&chip->chip.pic,
3436                         &pic_irqchip(kvm)->pics[0],
3437                         sizeof(struct kvm_pic_state));
3438                 break;
3439         case KVM_IRQCHIP_PIC_SLAVE:
3440                 memcpy(&chip->chip.pic,
3441                         &pic_irqchip(kvm)->pics[1],
3442                         sizeof(struct kvm_pic_state));
3443                 break;
3444         case KVM_IRQCHIP_IOAPIC:
3445                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3446                 break;
3447         default:
3448                 r = -EINVAL;
3449                 break;
3450         }
3451         return r;
3452 }
3453
3454 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3455 {
3456         int r;
3457
3458         r = 0;
3459         switch (chip->chip_id) {
3460         case KVM_IRQCHIP_PIC_MASTER:
3461                 spin_lock(&pic_irqchip(kvm)->lock);
3462                 memcpy(&pic_irqchip(kvm)->pics[0],
3463                         &chip->chip.pic,
3464                         sizeof(struct kvm_pic_state));
3465                 spin_unlock(&pic_irqchip(kvm)->lock);
3466                 break;
3467         case KVM_IRQCHIP_PIC_SLAVE:
3468                 spin_lock(&pic_irqchip(kvm)->lock);
3469                 memcpy(&pic_irqchip(kvm)->pics[1],
3470                         &chip->chip.pic,
3471                         sizeof(struct kvm_pic_state));
3472                 spin_unlock(&pic_irqchip(kvm)->lock);
3473                 break;
3474         case KVM_IRQCHIP_IOAPIC:
3475                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3476                 break;
3477         default:
3478                 r = -EINVAL;
3479                 break;
3480         }
3481         kvm_pic_update_irq(pic_irqchip(kvm));
3482         return r;
3483 }
3484
3485 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3486 {
3487         int r = 0;
3488
3489         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3490         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3491         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3492         return r;
3493 }
3494
3495 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3496 {
3497         int r = 0;
3498
3499         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3500         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3501         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3502         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3503         return r;
3504 }
3505
3506 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3507 {
3508         int r = 0;
3509
3510         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3511         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3512                 sizeof(ps->channels));
3513         ps->flags = kvm->arch.vpit->pit_state.flags;
3514         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3515         memset(&ps->reserved, 0, sizeof(ps->reserved));
3516         return r;
3517 }
3518
3519 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3520 {
3521         int r = 0, start = 0;
3522         u32 prev_legacy, cur_legacy;
3523         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3524         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3525         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3526         if (!prev_legacy && cur_legacy)
3527                 start = 1;
3528         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3529                sizeof(kvm->arch.vpit->pit_state.channels));
3530         kvm->arch.vpit->pit_state.flags = ps->flags;
3531         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3532         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3533         return r;
3534 }
3535
3536 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3537                                  struct kvm_reinject_control *control)
3538 {
3539         if (!kvm->arch.vpit)
3540                 return -ENXIO;
3541         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3542         kvm->arch.vpit->pit_state.reinject = control->pit_reinject;
3543         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3544         return 0;
3545 }
3546
3547 /**
3548  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3549  * @kvm: kvm instance
3550  * @log: slot id and address to which we copy the log
3551  *
3552  * We need to keep it in mind that VCPU threads can write to the bitmap
3553  * concurrently.  So, to avoid losing data, we keep the following order for
3554  * each bit:
3555  *
3556  *   1. Take a snapshot of the bit and clear it if needed.
3557  *   2. Write protect the corresponding page.
3558  *   3. Flush TLB's if needed.
3559  *   4. Copy the snapshot to the userspace.
3560  *
3561  * Between 2 and 3, the guest may write to the page using the remaining TLB
3562  * entry.  This is not a problem because the page will be reported dirty at
3563  * step 4 using the snapshot taken before and step 3 ensures that successive
3564  * writes will be logged for the next call.
3565  */
3566 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3567 {
3568         int r;
3569         struct kvm_memory_slot *memslot;
3570         unsigned long n, i;
3571         unsigned long *dirty_bitmap;
3572         unsigned long *dirty_bitmap_buffer;
3573         bool is_dirty = false;
3574
3575         mutex_lock(&kvm->slots_lock);
3576
3577         r = -EINVAL;
3578         if (log->slot >= KVM_USER_MEM_SLOTS)
3579                 goto out;
3580
3581         memslot = id_to_memslot(kvm->memslots, log->slot);
3582
3583         dirty_bitmap = memslot->dirty_bitmap;
3584         r = -ENOENT;
3585         if (!dirty_bitmap)
3586                 goto out;
3587
3588         n = kvm_dirty_bitmap_bytes(memslot);
3589
3590         dirty_bitmap_buffer = dirty_bitmap + n / sizeof(long);
3591         memset(dirty_bitmap_buffer, 0, n);
3592
3593         spin_lock(&kvm->mmu_lock);
3594
3595         for (i = 0; i < n / sizeof(long); i++) {
3596                 unsigned long mask;
3597                 gfn_t offset;
3598
3599                 if (!dirty_bitmap[i])
3600                         continue;
3601
3602                 is_dirty = true;
3603
3604                 mask = xchg(&dirty_bitmap[i], 0);
3605                 dirty_bitmap_buffer[i] = mask;
3606
3607                 offset = i * BITS_PER_LONG;
3608                 kvm_mmu_write_protect_pt_masked(kvm, memslot, offset, mask);
3609         }
3610         if (is_dirty)
3611                 kvm_flush_remote_tlbs(kvm);
3612
3613         spin_unlock(&kvm->mmu_lock);
3614
3615         r = -EFAULT;
3616         if (copy_to_user(log->dirty_bitmap, dirty_bitmap_buffer, n))
3617                 goto out;
3618
3619         r = 0;
3620 out:
3621         mutex_unlock(&kvm->slots_lock);
3622         return r;
3623 }
3624
3625 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3626                         bool line_status)
3627 {
3628         if (!irqchip_in_kernel(kvm))
3629                 return -ENXIO;
3630
3631         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3632                                         irq_event->irq, irq_event->level,
3633                                         line_status);
3634         return 0;
3635 }
3636
3637 long kvm_arch_vm_ioctl(struct file *filp,
3638                        unsigned int ioctl, unsigned long arg)
3639 {
3640         struct kvm *kvm = filp->private_data;
3641         void __user *argp = (void __user *)arg;
3642         int r = -ENOTTY;
3643         /*
3644          * This union makes it completely explicit to gcc-3.x
3645          * that these two variables' stack usage should be
3646          * combined, not added together.
3647          */
3648         union {
3649                 struct kvm_pit_state ps;
3650                 struct kvm_pit_state2 ps2;
3651                 struct kvm_pit_config pit_config;
3652         } u;
3653
3654         switch (ioctl) {
3655         case KVM_SET_TSS_ADDR:
3656                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3657                 break;
3658         case KVM_SET_IDENTITY_MAP_ADDR: {
3659                 u64 ident_addr;
3660
3661                 r = -EFAULT;
3662                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3663                         goto out;
3664                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3665                 break;
3666         }
3667         case KVM_SET_NR_MMU_PAGES:
3668                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3669                 break;
3670         case KVM_GET_NR_MMU_PAGES:
3671                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3672                 break;
3673         case KVM_CREATE_IRQCHIP: {
3674                 struct kvm_pic *vpic;
3675
3676                 mutex_lock(&kvm->lock);
3677                 r = -EEXIST;
3678                 if (kvm->arch.vpic)
3679                         goto create_irqchip_unlock;
3680                 r = -EINVAL;
3681                 if (atomic_read(&kvm->online_vcpus))
3682                         goto create_irqchip_unlock;
3683                 r = -ENOMEM;
3684                 vpic = kvm_create_pic(kvm);
3685                 if (vpic) {
3686                         r = kvm_ioapic_init(kvm);
3687                         if (r) {
3688                                 mutex_lock(&kvm->slots_lock);
3689                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3690                                                           &vpic->dev_master);
3691                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3692                                                           &vpic->dev_slave);
3693                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3694                                                           &vpic->dev_eclr);
3695                                 mutex_unlock(&kvm->slots_lock);
3696                                 kfree(vpic);
3697                                 goto create_irqchip_unlock;
3698                         }
3699                 } else
3700                         goto create_irqchip_unlock;
3701                 smp_wmb();
3702                 kvm->arch.vpic = vpic;
3703                 smp_wmb();
3704                 r = kvm_setup_default_irq_routing(kvm);
3705                 if (r) {
3706                         mutex_lock(&kvm->slots_lock);
3707                         mutex_lock(&kvm->irq_lock);
3708                         kvm_ioapic_destroy(kvm);
3709                         kvm_destroy_pic(kvm);
3710                         mutex_unlock(&kvm->irq_lock);
3711                         mutex_unlock(&kvm->slots_lock);
3712                 }
3713         create_irqchip_unlock:
3714                 mutex_unlock(&kvm->lock);
3715                 break;
3716         }
3717         case KVM_CREATE_PIT:
3718                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3719                 goto create_pit;
3720         case KVM_CREATE_PIT2:
3721                 r = -EFAULT;
3722                 if (copy_from_user(&u.pit_config, argp,
3723                                    sizeof(struct kvm_pit_config)))
3724                         goto out;
3725         create_pit:
3726                 mutex_lock(&kvm->slots_lock);
3727                 r = -EEXIST;
3728                 if (kvm->arch.vpit)
3729                         goto create_pit_unlock;
3730                 r = -ENOMEM;
3731                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3732                 if (kvm->arch.vpit)
3733                         r = 0;
3734         create_pit_unlock:
3735                 mutex_unlock(&kvm->slots_lock);
3736                 break;
3737         case KVM_GET_IRQCHIP: {
3738                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3739                 struct kvm_irqchip *chip;
3740
3741                 chip = memdup_user(argp, sizeof(*chip));
3742                 if (IS_ERR(chip)) {
3743                         r = PTR_ERR(chip);
3744                         goto out;
3745                 }
3746
3747                 r = -ENXIO;
3748                 if (!irqchip_in_kernel(kvm))
3749                         goto get_irqchip_out;
3750                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3751                 if (r)
3752                         goto get_irqchip_out;
3753                 r = -EFAULT;
3754                 if (copy_to_user(argp, chip, sizeof *chip))
3755                         goto get_irqchip_out;
3756                 r = 0;
3757         get_irqchip_out:
3758                 kfree(chip);
3759                 break;
3760         }
3761         case KVM_SET_IRQCHIP: {
3762                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3763                 struct kvm_irqchip *chip;
3764
3765                 chip = memdup_user(argp, sizeof(*chip));
3766                 if (IS_ERR(chip)) {
3767                         r = PTR_ERR(chip);
3768                         goto out;
3769                 }
3770
3771                 r = -ENXIO;
3772                 if (!irqchip_in_kernel(kvm))
3773                         goto set_irqchip_out;
3774                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3775                 if (r)
3776                         goto set_irqchip_out;
3777                 r = 0;
3778         set_irqchip_out:
3779                 kfree(chip);
3780                 break;
3781         }
3782         case KVM_GET_PIT: {
3783                 r = -EFAULT;
3784                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3785                         goto out;
3786                 r = -ENXIO;
3787                 if (!kvm->arch.vpit)
3788                         goto out;
3789                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3790                 if (r)
3791                         goto out;
3792                 r = -EFAULT;
3793                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3794                         goto out;
3795                 r = 0;
3796                 break;
3797         }
3798         case KVM_SET_PIT: {
3799                 r = -EFAULT;
3800                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3801                         goto out;
3802                 r = -ENXIO;
3803                 if (!kvm->arch.vpit)
3804                         goto out;
3805                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3806                 break;
3807         }
3808         case KVM_GET_PIT2: {
3809                 r = -ENXIO;
3810                 if (!kvm->arch.vpit)
3811                         goto out;
3812                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3813                 if (r)
3814                         goto out;
3815                 r = -EFAULT;
3816                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3817                         goto out;
3818                 r = 0;
3819                 break;
3820         }
3821         case KVM_SET_PIT2: {
3822                 r = -EFAULT;
3823                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3824                         goto out;
3825                 r = -ENXIO;
3826                 if (!kvm->arch.vpit)
3827                         goto out;
3828                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3829                 break;
3830         }
3831         case KVM_REINJECT_CONTROL: {
3832                 struct kvm_reinject_control control;
3833                 r =  -EFAULT;
3834                 if (copy_from_user(&control, argp, sizeof(control)))
3835                         goto out;
3836                 r = kvm_vm_ioctl_reinject(kvm, &control);
3837                 break;
3838         }
3839         case KVM_XEN_HVM_CONFIG: {
3840                 r = -EFAULT;
3841                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3842                                    sizeof(struct kvm_xen_hvm_config)))
3843                         goto out;
3844                 r = -EINVAL;
3845                 if (kvm->arch.xen_hvm_config.flags)
3846                         goto out;
3847                 r = 0;
3848                 break;
3849         }
3850         case KVM_SET_CLOCK: {
3851                 struct kvm_clock_data user_ns;
3852                 u64 now_ns;
3853                 s64 delta;
3854
3855                 r = -EFAULT;
3856                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3857                         goto out;
3858
3859                 r = -EINVAL;
3860                 if (user_ns.flags)
3861                         goto out;
3862
3863                 r = 0;
3864                 local_irq_disable();
3865                 now_ns = get_kernel_ns();
3866                 delta = user_ns.clock - now_ns;
3867                 local_irq_enable();
3868                 kvm->arch.kvmclock_offset = delta;
3869                 kvm_gen_update_masterclock(kvm);
3870                 break;
3871         }
3872         case KVM_GET_CLOCK: {
3873                 struct kvm_clock_data user_ns;
3874                 u64 now_ns;
3875
3876                 local_irq_disable();
3877                 now_ns = get_kernel_ns();
3878                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3879                 local_irq_enable();
3880                 user_ns.flags = 0;
3881                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3882
3883                 r = -EFAULT;
3884                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3885                         goto out;
3886                 r = 0;
3887                 break;
3888         }
3889
3890         default:
3891                 ;
3892         }
3893 out:
3894         return r;
3895 }
3896
3897 static void kvm_init_msr_list(void)
3898 {
3899         u32 dummy[2];
3900         unsigned i, j;
3901
3902         /* skip the first msrs in the list. KVM-specific */
3903         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3904                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3905                         continue;
3906                 if (j < i)
3907                         msrs_to_save[j] = msrs_to_save[i];
3908                 j++;
3909         }
3910         num_msrs_to_save = j;
3911 }
3912
3913 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3914                            const void *v)
3915 {
3916         int handled = 0;
3917         int n;
3918
3919         do {
3920                 n = min(len, 8);
3921                 if (!(vcpu->arch.apic &&
3922                       !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3923                     && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3924                         break;
3925                 handled += n;
3926                 addr += n;
3927                 len -= n;
3928                 v += n;
3929         } while (len);
3930
3931         return handled;
3932 }
3933
3934 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3935 {
3936         int handled = 0;
3937         int n;
3938
3939         do {
3940                 n = min(len, 8);
3941                 if (!(vcpu->arch.apic &&
3942                       !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3943                     && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3944                         break;
3945                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3946                 handled += n;
3947                 addr += n;
3948                 len -= n;
3949                 v += n;
3950         } while (len);
3951
3952         return handled;
3953 }
3954
3955 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3956                         struct kvm_segment *var, int seg)
3957 {
3958         kvm_x86_ops->set_segment(vcpu, var, seg);
3959 }
3960
3961 void kvm_get_segment(struct kvm_vcpu *vcpu,
3962                      struct kvm_segment *var, int seg)
3963 {
3964         kvm_x86_ops->get_segment(vcpu, var, seg);
3965 }
3966
3967 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3968 {
3969         gpa_t t_gpa;
3970         struct x86_exception exception;
3971
3972         BUG_ON(!mmu_is_nested(vcpu));
3973
3974         /* NPT walks are always user-walks */
3975         access |= PFERR_USER_MASK;
3976         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3977
3978         return t_gpa;
3979 }
3980
3981 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3982                               struct x86_exception *exception)
3983 {
3984         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3985         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3986 }
3987
3988  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3989                                 struct x86_exception *exception)
3990 {
3991         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3992         access |= PFERR_FETCH_MASK;
3993         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3994 }
3995
3996 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3997                                struct x86_exception *exception)
3998 {
3999         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4000         access |= PFERR_WRITE_MASK;
4001         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4002 }
4003
4004 /* uses this to access any guest's mapped memory without checking CPL */
4005 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4006                                 struct x86_exception *exception)
4007 {
4008         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4009 }
4010
4011 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4012                                       struct kvm_vcpu *vcpu, u32 access,
4013                                       struct x86_exception *exception)
4014 {
4015         void *data = val;
4016         int r = X86EMUL_CONTINUE;
4017
4018         while (bytes) {
4019                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4020                                                             exception);
4021                 unsigned offset = addr & (PAGE_SIZE-1);
4022                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4023                 int ret;
4024
4025                 if (gpa == UNMAPPED_GVA)
4026                         return X86EMUL_PROPAGATE_FAULT;
4027                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
4028                 if (ret < 0) {
4029                         r = X86EMUL_IO_NEEDED;
4030                         goto out;
4031                 }
4032
4033                 bytes -= toread;
4034                 data += toread;
4035                 addr += toread;
4036         }
4037 out:
4038         return r;
4039 }
4040
4041 /* used for instruction fetching */
4042 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4043                                 gva_t addr, void *val, unsigned int bytes,
4044                                 struct x86_exception *exception)
4045 {
4046         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4047         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4048
4049         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
4050                                           access | PFERR_FETCH_MASK,
4051                                           exception);
4052 }
4053
4054 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4055                                gva_t addr, void *val, unsigned int bytes,
4056                                struct x86_exception *exception)
4057 {
4058         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4059         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4060
4061         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4062                                           exception);
4063 }
4064 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4065
4066 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4067                                       gva_t addr, void *val, unsigned int bytes,
4068                                       struct x86_exception *exception)
4069 {
4070         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4071         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4072 }
4073
4074 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4075                                        gva_t addr, void *val,
4076                                        unsigned int bytes,
4077                                        struct x86_exception *exception)
4078 {
4079         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4080         void *data = val;
4081         int r = X86EMUL_CONTINUE;
4082
4083         while (bytes) {
4084                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4085                                                              PFERR_WRITE_MASK,
4086                                                              exception);
4087                 unsigned offset = addr & (PAGE_SIZE-1);
4088                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4089                 int ret;
4090
4091                 if (gpa == UNMAPPED_GVA)
4092                         return X86EMUL_PROPAGATE_FAULT;
4093                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
4094                 if (ret < 0) {
4095                         r = X86EMUL_IO_NEEDED;
4096                         goto out;
4097                 }
4098
4099                 bytes -= towrite;
4100                 data += towrite;
4101                 addr += towrite;
4102         }
4103 out:
4104         return r;
4105 }
4106 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4107
4108 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4109                                 gpa_t *gpa, struct x86_exception *exception,
4110                                 bool write)
4111 {
4112         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4113                 | (write ? PFERR_WRITE_MASK : 0);
4114
4115         if (vcpu_match_mmio_gva(vcpu, gva)
4116             && !permission_fault(vcpu->arch.walk_mmu, vcpu->arch.access, access)) {
4117                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4118                                         (gva & (PAGE_SIZE - 1));
4119                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4120                 return 1;
4121         }
4122
4123         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4124
4125         if (*gpa == UNMAPPED_GVA)
4126                 return -1;
4127
4128         /* For APIC access vmexit */
4129         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4130                 return 1;
4131
4132         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4133                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4134                 return 1;
4135         }
4136
4137         return 0;
4138 }
4139
4140 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4141                         const void *val, int bytes)
4142 {
4143         int ret;
4144
4145         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
4146         if (ret < 0)
4147                 return 0;
4148         kvm_mmu_pte_write(vcpu, gpa, val, bytes);
4149         return 1;
4150 }
4151
4152 struct read_write_emulator_ops {
4153         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4154                                   int bytes);
4155         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4156                                   void *val, int bytes);
4157         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4158                                int bytes, void *val);
4159         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4160                                     void *val, int bytes);
4161         bool write;
4162 };
4163
4164 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4165 {
4166         if (vcpu->mmio_read_completed) {
4167                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4168                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4169                 vcpu->mmio_read_completed = 0;
4170                 return 1;
4171         }
4172
4173         return 0;
4174 }
4175
4176 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4177                         void *val, int bytes)
4178 {
4179         return !kvm_read_guest(vcpu->kvm, gpa, val, bytes);
4180 }
4181
4182 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4183                          void *val, int bytes)
4184 {
4185         return emulator_write_phys(vcpu, gpa, val, bytes);
4186 }
4187
4188 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4189 {
4190         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4191         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4192 }
4193
4194 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4195                           void *val, int bytes)
4196 {
4197         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4198         return X86EMUL_IO_NEEDED;
4199 }
4200
4201 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4202                            void *val, int bytes)
4203 {
4204         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4205
4206         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4207         return X86EMUL_CONTINUE;
4208 }
4209
4210 static const struct read_write_emulator_ops read_emultor = {
4211         .read_write_prepare = read_prepare,
4212         .read_write_emulate = read_emulate,
4213         .read_write_mmio = vcpu_mmio_read,
4214         .read_write_exit_mmio = read_exit_mmio,
4215 };
4216
4217 static const struct read_write_emulator_ops write_emultor = {
4218         .read_write_emulate = write_emulate,
4219         .read_write_mmio = write_mmio,
4220         .read_write_exit_mmio = write_exit_mmio,
4221         .write = true,
4222 };
4223
4224 static int emulator_read_write_onepage(unsigned long addr, void *val,
4225                                        unsigned int bytes,
4226                                        struct x86_exception *exception,
4227                                        struct kvm_vcpu *vcpu,
4228                                        const struct read_write_emulator_ops *ops)
4229 {
4230         gpa_t gpa;
4231         int handled, ret;
4232         bool write = ops->write;
4233         struct kvm_mmio_fragment *frag;
4234
4235         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4236
4237         if (ret < 0)
4238                 return X86EMUL_PROPAGATE_FAULT;
4239
4240         /* For APIC access vmexit */
4241         if (ret)
4242                 goto mmio;
4243
4244         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4245                 return X86EMUL_CONTINUE;
4246
4247 mmio:
4248         /*
4249          * Is this MMIO handled locally?
4250          */
4251         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4252         if (handled == bytes)
4253                 return X86EMUL_CONTINUE;
4254
4255         gpa += handled;
4256         bytes -= handled;
4257         val += handled;
4258
4259         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4260         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4261         frag->gpa = gpa;
4262         frag->data = val;
4263         frag->len = bytes;
4264         return X86EMUL_CONTINUE;
4265 }
4266
4267 int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,
4268                         void *val, unsigned int bytes,
4269                         struct x86_exception *exception,
4270                         const struct read_write_emulator_ops *ops)
4271 {
4272         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4273         gpa_t gpa;
4274         int rc;
4275
4276         if (ops->read_write_prepare &&
4277                   ops->read_write_prepare(vcpu, val, bytes))
4278                 return X86EMUL_CONTINUE;
4279
4280         vcpu->mmio_nr_fragments = 0;
4281
4282         /* Crossing a page boundary? */
4283         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4284                 int now;
4285
4286                 now = -addr & ~PAGE_MASK;
4287                 rc = emulator_read_write_onepage(addr, val, now, exception,
4288                                                  vcpu, ops);
4289
4290                 if (rc != X86EMUL_CONTINUE)
4291                         return rc;
4292                 addr += now;
4293                 val += now;
4294                 bytes -= now;
4295         }
4296
4297         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4298                                          vcpu, ops);
4299         if (rc != X86EMUL_CONTINUE)
4300                 return rc;
4301
4302         if (!vcpu->mmio_nr_fragments)
4303                 return rc;
4304
4305         gpa = vcpu->mmio_fragments[0].gpa;
4306
4307         vcpu->mmio_needed = 1;
4308         vcpu->mmio_cur_fragment = 0;
4309
4310         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4311         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4312         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4313         vcpu->run->mmio.phys_addr = gpa;
4314
4315         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4316 }
4317
4318 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4319                                   unsigned long addr,
4320                                   void *val,
4321                                   unsigned int bytes,
4322                                   struct x86_exception *exception)
4323 {
4324         return emulator_read_write(ctxt, addr, val, bytes,
4325                                    exception, &read_emultor);
4326 }
4327
4328 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4329                             unsigned long addr,
4330                             const void *val,
4331                             unsigned int bytes,
4332                             struct x86_exception *exception)
4333 {
4334         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4335                                    exception, &write_emultor);
4336 }
4337
4338 #define CMPXCHG_TYPE(t, ptr, old, new) \
4339         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4340
4341 #ifdef CONFIG_X86_64
4342 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4343 #else
4344 #  define CMPXCHG64(ptr, old, new) \
4345         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4346 #endif
4347
4348 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4349                                      unsigned long addr,
4350                                      const void *old,
4351                                      const void *new,
4352                                      unsigned int bytes,
4353                                      struct x86_exception *exception)
4354 {
4355         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4356         gpa_t gpa;
4357         struct page *page;
4358         char *kaddr;
4359         bool exchanged;
4360
4361         /* guests cmpxchg8b have to be emulated atomically */
4362         if (bytes > 8 || (bytes & (bytes - 1)))
4363                 goto emul_write;
4364
4365         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4366
4367         if (gpa == UNMAPPED_GVA ||
4368             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4369                 goto emul_write;
4370
4371         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4372                 goto emul_write;
4373
4374         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4375         if (is_error_page(page))
4376                 goto emul_write;
4377
4378         kaddr = kmap_atomic(page);
4379         kaddr += offset_in_page(gpa);
4380         switch (bytes) {
4381         case 1:
4382                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4383                 break;
4384         case 2:
4385                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4386                 break;
4387         case 4:
4388                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4389                 break;
4390         case 8:
4391                 exchanged = CMPXCHG64(kaddr, old, new);
4392                 break;
4393         default:
4394                 BUG();
4395         }
4396         kunmap_atomic(kaddr);
4397         kvm_release_page_dirty(page);
4398
4399         if (!exchanged)
4400                 return X86EMUL_CMPXCHG_FAILED;
4401
4402         kvm_mmu_pte_write(vcpu, gpa, new, bytes);
4403
4404         return X86EMUL_CONTINUE;
4405
4406 emul_write:
4407         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4408
4409         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4410 }
4411
4412 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4413 {
4414         /* TODO: String I/O for in kernel device */
4415         int r;
4416
4417         if (vcpu->arch.pio.in)
4418                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
4419                                     vcpu->arch.pio.size, pd);
4420         else
4421                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
4422                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4423                                      pd);
4424         return r;
4425 }
4426
4427 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4428                                unsigned short port, void *val,
4429                                unsigned int count, bool in)
4430 {
4431         trace_kvm_pio(!in, port, size, count);
4432
4433         vcpu->arch.pio.port = port;
4434         vcpu->arch.pio.in = in;
4435         vcpu->arch.pio.count  = count;
4436         vcpu->arch.pio.size = size;
4437
4438         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4439                 vcpu->arch.pio.count = 0;
4440                 return 1;
4441         }
4442
4443         vcpu->run->exit_reason = KVM_EXIT_IO;
4444         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4445         vcpu->run->io.size = size;
4446         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4447         vcpu->run->io.count = count;
4448         vcpu->run->io.port = port;
4449
4450         return 0;
4451 }
4452
4453 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4454                                     int size, unsigned short port, void *val,
4455                                     unsigned int count)
4456 {
4457         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4458         int ret;
4459
4460         if (vcpu->arch.pio.count)
4461                 goto data_avail;
4462
4463         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4464         if (ret) {
4465 data_avail:
4466                 memcpy(val, vcpu->arch.pio_data, size * count);
4467                 vcpu->arch.pio.count = 0;
4468                 return 1;
4469         }
4470
4471         return 0;
4472 }
4473
4474 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4475                                      int size, unsigned short port,
4476                                      const void *val, unsigned int count)
4477 {
4478         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4479
4480         memcpy(vcpu->arch.pio_data, val, size * count);
4481         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4482 }
4483
4484 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4485 {
4486         return kvm_x86_ops->get_segment_base(vcpu, seg);
4487 }
4488
4489 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4490 {
4491         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4492 }
4493
4494 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4495 {
4496         if (!need_emulate_wbinvd(vcpu))
4497                 return X86EMUL_CONTINUE;
4498
4499         if (kvm_x86_ops->has_wbinvd_exit()) {
4500                 int cpu = get_cpu();
4501
4502                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4503                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4504                                 wbinvd_ipi, NULL, 1);
4505                 put_cpu();
4506                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4507         } else
4508                 wbinvd();
4509         return X86EMUL_CONTINUE;
4510 }
4511 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4512
4513 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4514 {
4515         kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4516 }
4517
4518 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4519 {
4520         return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4521 }
4522
4523 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4524 {
4525
4526         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4527 }
4528
4529 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4530 {
4531         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4532 }
4533
4534 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4535 {
4536         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4537         unsigned long value;
4538
4539         switch (cr) {
4540         case 0:
4541                 value = kvm_read_cr0(vcpu);
4542                 break;
4543         case 2:
4544                 value = vcpu->arch.cr2;
4545                 break;
4546         case 3:
4547                 value = kvm_read_cr3(vcpu);
4548                 break;
4549         case 4:
4550                 value = kvm_read_cr4(vcpu);
4551                 break;
4552         case 8:
4553                 value = kvm_get_cr8(vcpu);
4554                 break;
4555         default:
4556                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4557                 return 0;
4558         }
4559
4560         return value;
4561 }
4562
4563 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4564 {
4565         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4566         int res = 0;
4567
4568         switch (cr) {
4569         case 0:
4570                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4571                 break;
4572         case 2:
4573                 vcpu->arch.cr2 = val;
4574                 break;
4575         case 3:
4576                 res = kvm_set_cr3(vcpu, val);
4577                 break;
4578         case 4:
4579                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4580                 break;
4581         case 8:
4582                 res = kvm_set_cr8(vcpu, val);
4583                 break;
4584         default:
4585                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4586                 res = -1;
4587         }
4588
4589         return res;
4590 }
4591
4592 static void emulator_set_rflags(struct x86_emulate_ctxt *ctxt, ulong val)
4593 {
4594         kvm_set_rflags(emul_to_vcpu(ctxt), val);
4595 }
4596
4597 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4598 {
4599         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4600 }
4601
4602 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4603 {
4604         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4605 }
4606
4607 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4608 {
4609         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4610 }
4611
4612 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4613 {
4614         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4615 }
4616
4617 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4618 {
4619         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4620 }
4621
4622 static unsigned long emulator_get_cached_segment_base(
4623         struct x86_emulate_ctxt *ctxt, int seg)
4624 {
4625         return get_segment_base(emul_to_vcpu(ctxt), seg);
4626 }
4627
4628 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4629                                  struct desc_struct *desc, u32 *base3,
4630                                  int seg)
4631 {
4632         struct kvm_segment var;
4633
4634         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4635         *selector = var.selector;
4636
4637         if (var.unusable) {
4638                 memset(desc, 0, sizeof(*desc));
4639                 return false;
4640         }
4641
4642         if (var.g)
4643                 var.limit >>= 12;
4644         set_desc_limit(desc, var.limit);
4645         set_desc_base(desc, (unsigned long)var.base);
4646 #ifdef CONFIG_X86_64
4647         if (base3)
4648                 *base3 = var.base >> 32;
4649 #endif
4650         desc->type = var.type;
4651         desc->s = var.s;
4652         desc->dpl = var.dpl;
4653         desc->p = var.present;
4654         desc->avl = var.avl;
4655         desc->l = var.l;
4656         desc->d = var.db;
4657         desc->g = var.g;
4658
4659         return true;
4660 }
4661
4662 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4663                                  struct desc_struct *desc, u32 base3,
4664                                  int seg)
4665 {
4666         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4667         struct kvm_segment var;
4668
4669         var.selector = selector;
4670         var.base = get_desc_base(desc);
4671 #ifdef CONFIG_X86_64
4672         var.base |= ((u64)base3) << 32;
4673 #endif
4674         var.limit = get_desc_limit(desc);
4675         if (desc->g)
4676                 var.limit = (var.limit << 12) | 0xfff;
4677         var.type = desc->type;
4678         var.present = desc->p;
4679         var.dpl = desc->dpl;
4680         var.db = desc->d;
4681         var.s = desc->s;
4682         var.l = desc->l;
4683         var.g = desc->g;
4684         var.avl = desc->avl;
4685         var.present = desc->p;
4686         var.unusable = !var.present;
4687         var.padding = 0;
4688
4689         kvm_set_segment(vcpu, &var, seg);
4690         return;
4691 }
4692
4693 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4694                             u32 msr_index, u64 *pdata)
4695 {
4696         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4697 }
4698
4699 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4700                             u32 msr_index, u64 data)
4701 {
4702         struct msr_data msr;
4703
4704         msr.data = data;
4705         msr.index = msr_index;
4706         msr.host_initiated = false;
4707         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
4708 }
4709
4710 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4711                              u32 pmc, u64 *pdata)
4712 {
4713         return kvm_pmu_read_pmc(emul_to_vcpu(ctxt), pmc, pdata);
4714 }
4715
4716 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4717 {
4718         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4719 }
4720
4721 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4722 {
4723         preempt_disable();
4724         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4725         /*
4726          * CR0.TS may reference the host fpu state, not the guest fpu state,
4727          * so it may be clear at this point.
4728          */
4729         clts();
4730 }
4731
4732 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4733 {
4734         preempt_enable();
4735 }
4736
4737 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4738                               struct x86_instruction_info *info,
4739                               enum x86_intercept_stage stage)
4740 {
4741         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4742 }
4743
4744 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4745                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4746 {
4747         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
4748 }
4749
4750 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
4751 {
4752         return kvm_register_read(emul_to_vcpu(ctxt), reg);
4753 }
4754
4755 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
4756 {
4757         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
4758 }
4759
4760 static const struct x86_emulate_ops emulate_ops = {
4761         .read_gpr            = emulator_read_gpr,
4762         .write_gpr           = emulator_write_gpr,
4763         .read_std            = kvm_read_guest_virt_system,
4764         .write_std           = kvm_write_guest_virt_system,
4765         .fetch               = kvm_fetch_guest_virt,
4766         .read_emulated       = emulator_read_emulated,
4767         .write_emulated      = emulator_write_emulated,
4768         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4769         .invlpg              = emulator_invlpg,
4770         .pio_in_emulated     = emulator_pio_in_emulated,
4771         .pio_out_emulated    = emulator_pio_out_emulated,
4772         .get_segment         = emulator_get_segment,
4773         .set_segment         = emulator_set_segment,
4774         .get_cached_segment_base = emulator_get_cached_segment_base,
4775         .get_gdt             = emulator_get_gdt,
4776         .get_idt             = emulator_get_idt,
4777         .set_gdt             = emulator_set_gdt,
4778         .set_idt             = emulator_set_idt,
4779         .get_cr              = emulator_get_cr,
4780         .set_cr              = emulator_set_cr,
4781         .set_rflags          = emulator_set_rflags,
4782         .cpl                 = emulator_get_cpl,
4783         .get_dr              = emulator_get_dr,
4784         .set_dr              = emulator_set_dr,
4785         .set_msr             = emulator_set_msr,
4786         .get_msr             = emulator_get_msr,
4787         .read_pmc            = emulator_read_pmc,
4788         .halt                = emulator_halt,
4789         .wbinvd              = emulator_wbinvd,
4790         .fix_hypercall       = emulator_fix_hypercall,
4791         .get_fpu             = emulator_get_fpu,
4792         .put_fpu             = emulator_put_fpu,
4793         .intercept           = emulator_intercept,
4794         .get_cpuid           = emulator_get_cpuid,
4795 };
4796
4797 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4798 {
4799         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4800         /*
4801          * an sti; sti; sequence only disable interrupts for the first
4802          * instruction. So, if the last instruction, be it emulated or
4803          * not, left the system with the INT_STI flag enabled, it
4804          * means that the last instruction is an sti. We should not
4805          * leave the flag on in this case. The same goes for mov ss
4806          */
4807         if (!(int_shadow & mask))
4808                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4809 }
4810
4811 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4812 {
4813         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4814         if (ctxt->exception.vector == PF_VECTOR)
4815                 kvm_propagate_fault(vcpu, &ctxt->exception);
4816         else if (ctxt->exception.error_code_valid)
4817                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4818                                       ctxt->exception.error_code);
4819         else
4820                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4821 }
4822
4823 static void init_decode_cache(struct x86_emulate_ctxt *ctxt)
4824 {
4825         memset(&ctxt->opcode_len, 0,
4826                (void *)&ctxt->_regs - (void *)&ctxt->opcode_len);
4827
4828         ctxt->fetch.start = 0;
4829         ctxt->fetch.end = 0;
4830         ctxt->io_read.pos = 0;
4831         ctxt->io_read.end = 0;
4832         ctxt->mem_read.pos = 0;
4833         ctxt->mem_read.end = 0;
4834 }
4835
4836 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4837 {
4838         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4839         int cs_db, cs_l;
4840
4841         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4842
4843         ctxt->eflags = kvm_get_rflags(vcpu);
4844         ctxt->eip = kvm_rip_read(vcpu);
4845         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4846                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4847                      cs_l                               ? X86EMUL_MODE_PROT64 :
4848                      cs_db                              ? X86EMUL_MODE_PROT32 :
4849                                                           X86EMUL_MODE_PROT16;
4850         ctxt->guest_mode = is_guest_mode(vcpu);
4851
4852         init_decode_cache(ctxt);
4853         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4854 }
4855
4856 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4857 {
4858         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4859         int ret;
4860
4861         init_emulate_ctxt(vcpu);
4862
4863         ctxt->op_bytes = 2;
4864         ctxt->ad_bytes = 2;
4865         ctxt->_eip = ctxt->eip + inc_eip;
4866         ret = emulate_int_real(ctxt, irq);
4867
4868         if (ret != X86EMUL_CONTINUE)
4869                 return EMULATE_FAIL;
4870
4871         ctxt->eip = ctxt->_eip;
4872         kvm_rip_write(vcpu, ctxt->eip);
4873         kvm_set_rflags(vcpu, ctxt->eflags);
4874
4875         if (irq == NMI_VECTOR)
4876                 vcpu->arch.nmi_pending = 0;
4877         else
4878                 vcpu->arch.interrupt.pending = false;
4879
4880         return EMULATE_DONE;
4881 }
4882 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4883
4884 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4885 {
4886         int r = EMULATE_DONE;
4887
4888         ++vcpu->stat.insn_emulation_fail;
4889         trace_kvm_emulate_insn_failed(vcpu);
4890         if (!is_guest_mode(vcpu)) {
4891                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4892                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4893                 vcpu->run->internal.ndata = 0;
4894                 r = EMULATE_FAIL;
4895         }
4896         kvm_queue_exception(vcpu, UD_VECTOR);
4897
4898         return r;
4899 }
4900
4901 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
4902                                   bool write_fault_to_shadow_pgtable,
4903                                   int emulation_type)
4904 {
4905         gpa_t gpa = cr2;
4906         pfn_t pfn;
4907
4908         if (emulation_type & EMULTYPE_NO_REEXECUTE)
4909                 return false;
4910
4911         if (!vcpu->arch.mmu.direct_map) {
4912                 /*
4913                  * Write permission should be allowed since only
4914                  * write access need to be emulated.
4915                  */
4916                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4917
4918                 /*
4919                  * If the mapping is invalid in guest, let cpu retry
4920                  * it to generate fault.
4921                  */
4922                 if (gpa == UNMAPPED_GVA)
4923                         return true;
4924         }
4925
4926         /*
4927          * Do not retry the unhandleable instruction if it faults on the
4928          * readonly host memory, otherwise it will goto a infinite loop:
4929          * retry instruction -> write #PF -> emulation fail -> retry
4930          * instruction -> ...
4931          */
4932         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
4933
4934         /*
4935          * If the instruction failed on the error pfn, it can not be fixed,
4936          * report the error to userspace.
4937          */
4938         if (is_error_noslot_pfn(pfn))
4939                 return false;
4940
4941         kvm_release_pfn_clean(pfn);
4942
4943         /* The instructions are well-emulated on direct mmu. */
4944         if (vcpu->arch.mmu.direct_map) {
4945                 unsigned int indirect_shadow_pages;
4946
4947                 spin_lock(&vcpu->kvm->mmu_lock);
4948                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
4949                 spin_unlock(&vcpu->kvm->mmu_lock);
4950
4951                 if (indirect_shadow_pages)
4952                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
4953
4954                 return true;
4955         }
4956
4957         /*
4958          * if emulation was due to access to shadowed page table
4959          * and it failed try to unshadow page and re-enter the
4960          * guest to let CPU execute the instruction.
4961          */
4962         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
4963
4964         /*
4965          * If the access faults on its page table, it can not
4966          * be fixed by unprotecting shadow page and it should
4967          * be reported to userspace.
4968          */
4969         return !write_fault_to_shadow_pgtable;
4970 }
4971
4972 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
4973                               unsigned long cr2,  int emulation_type)
4974 {
4975         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4976         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
4977
4978         last_retry_eip = vcpu->arch.last_retry_eip;
4979         last_retry_addr = vcpu->arch.last_retry_addr;
4980
4981         /*
4982          * If the emulation is caused by #PF and it is non-page_table
4983          * writing instruction, it means the VM-EXIT is caused by shadow
4984          * page protected, we can zap the shadow page and retry this
4985          * instruction directly.
4986          *
4987          * Note: if the guest uses a non-page-table modifying instruction
4988          * on the PDE that points to the instruction, then we will unmap
4989          * the instruction and go to an infinite loop. So, we cache the
4990          * last retried eip and the last fault address, if we meet the eip
4991          * and the address again, we can break out of the potential infinite
4992          * loop.
4993          */
4994         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
4995
4996         if (!(emulation_type & EMULTYPE_RETRY))
4997                 return false;
4998
4999         if (x86_page_table_writing_insn(ctxt))
5000                 return false;
5001
5002         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5003                 return false;
5004
5005         vcpu->arch.last_retry_eip = ctxt->eip;
5006         vcpu->arch.last_retry_addr = cr2;
5007
5008         if (!vcpu->arch.mmu.direct_map)
5009                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5010
5011         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5012
5013         return true;
5014 }
5015
5016 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5017 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5018
5019 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5020                                 unsigned long *db)
5021 {
5022         u32 dr6 = 0;
5023         int i;
5024         u32 enable, rwlen;
5025
5026         enable = dr7;
5027         rwlen = dr7 >> 16;
5028         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5029                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5030                         dr6 |= (1 << i);
5031         return dr6;
5032 }
5033
5034 static void kvm_vcpu_check_singlestep(struct kvm_vcpu *vcpu, int *r)
5035 {
5036         struct kvm_run *kvm_run = vcpu->run;
5037
5038         /*
5039          * Use the "raw" value to see if TF was passed to the processor.
5040          * Note that the new value of the flags has not been saved yet.
5041          *
5042          * This is correct even for TF set by the guest, because "the
5043          * processor will not generate this exception after the instruction
5044          * that sets the TF flag".
5045          */
5046         unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5047
5048         if (unlikely(rflags & X86_EFLAGS_TF)) {
5049                 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5050                         kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1;
5051                         kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5052                         kvm_run->debug.arch.exception = DB_VECTOR;
5053                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5054                         *r = EMULATE_USER_EXIT;
5055                 } else {
5056                         vcpu->arch.emulate_ctxt.eflags &= ~X86_EFLAGS_TF;
5057                         /*
5058                          * "Certain debug exceptions may clear bit 0-3.  The
5059                          * remaining contents of the DR6 register are never
5060                          * cleared by the processor".
5061                          */
5062                         vcpu->arch.dr6 &= ~15;
5063                         vcpu->arch.dr6 |= DR6_BS;
5064                         kvm_queue_exception(vcpu, DB_VECTOR);
5065                 }
5066         }
5067 }
5068
5069 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5070 {
5071         struct kvm_run *kvm_run = vcpu->run;
5072         unsigned long eip = vcpu->arch.emulate_ctxt.eip;
5073         u32 dr6 = 0;
5074
5075         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5076             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5077                 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5078                                            vcpu->arch.guest_debug_dr7,
5079                                            vcpu->arch.eff_db);
5080
5081                 if (dr6 != 0) {
5082                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1;
5083                         kvm_run->debug.arch.pc = kvm_rip_read(vcpu) +
5084                                 get_segment_base(vcpu, VCPU_SREG_CS);
5085
5086                         kvm_run->debug.arch.exception = DB_VECTOR;
5087                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5088                         *r = EMULATE_USER_EXIT;
5089                         return true;
5090                 }
5091         }
5092
5093         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK)) {
5094                 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5095                                            vcpu->arch.dr7,
5096                                            vcpu->arch.db);
5097
5098                 if (dr6 != 0) {
5099                         vcpu->arch.dr6 &= ~15;
5100                         vcpu->arch.dr6 |= dr6;
5101                         kvm_queue_exception(vcpu, DB_VECTOR);
5102                         *r = EMULATE_DONE;
5103                         return true;
5104                 }
5105         }
5106
5107         return false;
5108 }
5109
5110 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5111                             unsigned long cr2,
5112                             int emulation_type,
5113                             void *insn,
5114                             int insn_len)
5115 {
5116         int r;
5117         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5118         bool writeback = true;
5119         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5120
5121         /*
5122          * Clear write_fault_to_shadow_pgtable here to ensure it is
5123          * never reused.
5124          */
5125         vcpu->arch.write_fault_to_shadow_pgtable = false;
5126         kvm_clear_exception_queue(vcpu);
5127
5128         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5129                 init_emulate_ctxt(vcpu);
5130
5131                 /*
5132                  * We will reenter on the same instruction since
5133                  * we do not set complete_userspace_io.  This does not
5134                  * handle watchpoints yet, those would be handled in
5135                  * the emulate_ops.
5136                  */
5137                 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5138                         return r;
5139
5140                 ctxt->interruptibility = 0;
5141                 ctxt->have_exception = false;
5142                 ctxt->perm_ok = false;
5143
5144                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5145
5146                 r = x86_decode_insn(ctxt, insn, insn_len);
5147
5148                 trace_kvm_emulate_insn_start(vcpu);
5149                 ++vcpu->stat.insn_emulation;
5150                 if (r != EMULATION_OK)  {
5151                         if (emulation_type & EMULTYPE_TRAP_UD)
5152                                 return EMULATE_FAIL;
5153                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5154                                                 emulation_type))
5155                                 return EMULATE_DONE;
5156                         if (emulation_type & EMULTYPE_SKIP)
5157                                 return EMULATE_FAIL;
5158                         return handle_emulation_failure(vcpu);
5159                 }
5160         }
5161
5162         if (emulation_type & EMULTYPE_SKIP) {
5163                 kvm_rip_write(vcpu, ctxt->_eip);
5164                 return EMULATE_DONE;
5165         }
5166
5167         if (retry_instruction(ctxt, cr2, emulation_type))
5168                 return EMULATE_DONE;
5169
5170         /* this is needed for vmware backdoor interface to work since it
5171            changes registers values  during IO operation */
5172         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5173                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5174                 emulator_invalidate_register_cache(ctxt);
5175         }
5176
5177 restart:
5178         r = x86_emulate_insn(ctxt);
5179
5180         if (r == EMULATION_INTERCEPTED)
5181                 return EMULATE_DONE;
5182
5183         if (r == EMULATION_FAILED) {
5184                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5185                                         emulation_type))
5186                         return EMULATE_DONE;
5187
5188                 return handle_emulation_failure(vcpu);
5189         }
5190
5191         if (ctxt->have_exception) {
5192                 inject_emulated_exception(vcpu);
5193                 r = EMULATE_DONE;
5194         } else if (vcpu->arch.pio.count) {
5195                 if (!vcpu->arch.pio.in) {
5196                         /* FIXME: return into emulator if single-stepping.  */
5197                         vcpu->arch.pio.count = 0;
5198                 } else {
5199                         writeback = false;
5200                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5201                 }
5202                 r = EMULATE_USER_EXIT;
5203         } else if (vcpu->mmio_needed) {
5204                 if (!vcpu->mmio_is_write)
5205                         writeback = false;
5206                 r = EMULATE_USER_EXIT;
5207                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5208         } else if (r == EMULATION_RESTART)
5209                 goto restart;
5210         else
5211                 r = EMULATE_DONE;
5212
5213         if (writeback) {
5214                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5215                 kvm_make_request(KVM_REQ_EVENT, vcpu);
5216                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5217                 kvm_rip_write(vcpu, ctxt->eip);
5218                 if (r == EMULATE_DONE)
5219                         kvm_vcpu_check_singlestep(vcpu, &r);
5220                 kvm_set_rflags(vcpu, ctxt->eflags);
5221         } else
5222                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5223
5224         return r;
5225 }
5226 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5227
5228 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5229 {
5230         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5231         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5232                                             size, port, &val, 1);
5233         /* do not return to emulator after return from userspace */
5234         vcpu->arch.pio.count = 0;
5235         return ret;
5236 }
5237 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5238
5239 static void tsc_bad(void *info)
5240 {
5241         __this_cpu_write(cpu_tsc_khz, 0);
5242 }
5243
5244 static void tsc_khz_changed(void *data)
5245 {
5246         struct cpufreq_freqs *freq = data;
5247         unsigned long khz = 0;
5248
5249         if (data)
5250                 khz = freq->new;
5251         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5252                 khz = cpufreq_quick_get(raw_smp_processor_id());
5253         if (!khz)
5254                 khz = tsc_khz;
5255         __this_cpu_write(cpu_tsc_khz, khz);
5256 }
5257
5258 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5259                                      void *data)
5260 {
5261         struct cpufreq_freqs *freq = data;
5262         struct kvm *kvm;
5263         struct kvm_vcpu *vcpu;
5264         int i, send_ipi = 0;
5265
5266         /*
5267          * We allow guests to temporarily run on slowing clocks,
5268          * provided we notify them after, or to run on accelerating
5269          * clocks, provided we notify them before.  Thus time never
5270          * goes backwards.
5271          *
5272          * However, we have a problem.  We can't atomically update
5273          * the frequency of a given CPU from this function; it is
5274          * merely a notifier, which can be called from any CPU.
5275          * Changing the TSC frequency at arbitrary points in time
5276          * requires a recomputation of local variables related to
5277          * the TSC for each VCPU.  We must flag these local variables
5278          * to be updated and be sure the update takes place with the
5279          * new frequency before any guests proceed.
5280          *
5281          * Unfortunately, the combination of hotplug CPU and frequency
5282          * change creates an intractable locking scenario; the order
5283          * of when these callouts happen is undefined with respect to
5284          * CPU hotplug, and they can race with each other.  As such,
5285          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5286          * undefined; you can actually have a CPU frequency change take
5287          * place in between the computation of X and the setting of the
5288          * variable.  To protect against this problem, all updates of
5289          * the per_cpu tsc_khz variable are done in an interrupt
5290          * protected IPI, and all callers wishing to update the value
5291          * must wait for a synchronous IPI to complete (which is trivial
5292          * if the caller is on the CPU already).  This establishes the
5293          * necessary total order on variable updates.
5294          *
5295          * Note that because a guest time update may take place
5296          * anytime after the setting of the VCPU's request bit, the
5297          * correct TSC value must be set before the request.  However,
5298          * to ensure the update actually makes it to any guest which
5299          * starts running in hardware virtualization between the set
5300          * and the acquisition of the spinlock, we must also ping the
5301          * CPU after setting the request bit.
5302          *
5303          */
5304
5305         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5306                 return 0;
5307         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5308                 return 0;
5309
5310         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5311
5312         spin_lock(&kvm_lock);
5313         list_for_each_entry(kvm, &vm_list, vm_list) {
5314                 kvm_for_each_vcpu(i, vcpu, kvm) {
5315                         if (vcpu->cpu != freq->cpu)
5316                                 continue;
5317                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5318                         if (vcpu->cpu != smp_processor_id())
5319                                 send_ipi = 1;
5320                 }
5321         }
5322         spin_unlock(&kvm_lock);
5323
5324         if (freq->old < freq->new && send_ipi) {
5325                 /*
5326                  * We upscale the frequency.  Must make the guest
5327                  * doesn't see old kvmclock values while running with
5328                  * the new frequency, otherwise we risk the guest sees
5329                  * time go backwards.
5330                  *
5331                  * In case we update the frequency for another cpu
5332                  * (which might be in guest context) send an interrupt
5333                  * to kick the cpu out of guest context.  Next time
5334                  * guest context is entered kvmclock will be updated,
5335                  * so the guest will not see stale values.
5336                  */
5337                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5338         }
5339         return 0;
5340 }
5341
5342 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5343         .notifier_call  = kvmclock_cpufreq_notifier
5344 };
5345
5346 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5347                                         unsigned long action, void *hcpu)
5348 {
5349         unsigned int cpu = (unsigned long)hcpu;
5350
5351         switch (action) {
5352                 case CPU_ONLINE:
5353                 case CPU_DOWN_FAILED:
5354                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5355                         break;
5356                 case CPU_DOWN_PREPARE:
5357                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5358                         break;
5359         }
5360         return NOTIFY_OK;
5361 }
5362
5363 static struct notifier_block kvmclock_cpu_notifier_block = {
5364         .notifier_call  = kvmclock_cpu_notifier,
5365         .priority = -INT_MAX
5366 };
5367
5368 static void kvm_timer_init(void)
5369 {
5370         int cpu;
5371
5372         max_tsc_khz = tsc_khz;
5373         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5374         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5375 #ifdef CONFIG_CPU_FREQ
5376                 struct cpufreq_policy policy;
5377                 memset(&policy, 0, sizeof(policy));
5378                 cpu = get_cpu();
5379                 cpufreq_get_policy(&policy, cpu);
5380                 if (policy.cpuinfo.max_freq)
5381                         max_tsc_khz = policy.cpuinfo.max_freq;
5382                 put_cpu();
5383 #endif
5384                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5385                                           CPUFREQ_TRANSITION_NOTIFIER);
5386         }
5387         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5388         for_each_online_cpu(cpu)
5389                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5390 }
5391
5392 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5393
5394 int kvm_is_in_guest(void)
5395 {
5396         return __this_cpu_read(current_vcpu) != NULL;
5397 }
5398
5399 static int kvm_is_user_mode(void)
5400 {
5401         int user_mode = 3;
5402
5403         if (__this_cpu_read(current_vcpu))
5404                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5405
5406         return user_mode != 0;
5407 }
5408
5409 static unsigned long kvm_get_guest_ip(void)
5410 {
5411         unsigned long ip = 0;
5412
5413         if (__this_cpu_read(current_vcpu))
5414                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5415
5416         return ip;
5417 }
5418
5419 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5420         .is_in_guest            = kvm_is_in_guest,
5421         .is_user_mode           = kvm_is_user_mode,
5422         .get_guest_ip           = kvm_get_guest_ip,
5423 };
5424
5425 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5426 {
5427         __this_cpu_write(current_vcpu, vcpu);
5428 }
5429 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5430
5431 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5432 {
5433         __this_cpu_write(current_vcpu, NULL);
5434 }
5435 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5436
5437 static void kvm_set_mmio_spte_mask(void)
5438 {
5439         u64 mask;
5440         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5441
5442         /*
5443          * Set the reserved bits and the present bit of an paging-structure
5444          * entry to generate page fault with PFER.RSV = 1.
5445          */
5446          /* Mask the reserved physical address bits. */
5447         mask = ((1ull << (51 - maxphyaddr + 1)) - 1) << maxphyaddr;
5448
5449         /* Bit 62 is always reserved for 32bit host. */
5450         mask |= 0x3ull << 62;
5451
5452         /* Set the present bit. */
5453         mask |= 1ull;
5454
5455 #ifdef CONFIG_X86_64
5456         /*
5457          * If reserved bit is not supported, clear the present bit to disable
5458          * mmio page fault.
5459          */
5460         if (maxphyaddr == 52)
5461                 mask &= ~1ull;
5462 #endif
5463
5464         kvm_mmu_set_mmio_spte_mask(mask);
5465 }
5466
5467 #ifdef CONFIG_X86_64
5468 static void pvclock_gtod_update_fn(struct work_struct *work)
5469 {
5470         struct kvm *kvm;
5471
5472         struct kvm_vcpu *vcpu;
5473         int i;
5474
5475         spin_lock(&kvm_lock);
5476         list_for_each_entry(kvm, &vm_list, vm_list)
5477                 kvm_for_each_vcpu(i, vcpu, kvm)
5478                         set_bit(KVM_REQ_MASTERCLOCK_UPDATE, &vcpu->requests);
5479         atomic_set(&kvm_guest_has_master_clock, 0);
5480         spin_unlock(&kvm_lock);
5481 }
5482
5483 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5484
5485 /*
5486  * Notification about pvclock gtod data update.
5487  */
5488 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5489                                void *priv)
5490 {
5491         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5492         struct timekeeper *tk = priv;
5493
5494         update_pvclock_gtod(tk);
5495
5496         /* disable master clock if host does not trust, or does not
5497          * use, TSC clocksource
5498          */
5499         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5500             atomic_read(&kvm_guest_has_master_clock) != 0)
5501                 queue_work(system_long_wq, &pvclock_gtod_work);
5502
5503         return 0;
5504 }
5505
5506 static struct notifier_block pvclock_gtod_notifier = {
5507         .notifier_call = pvclock_gtod_notify,
5508 };
5509 #endif
5510
5511 int kvm_arch_init(void *opaque)
5512 {
5513         int r;
5514         struct kvm_x86_ops *ops = opaque;
5515
5516         if (kvm_x86_ops) {
5517                 printk(KERN_ERR "kvm: already loaded the other module\n");
5518                 r = -EEXIST;
5519                 goto out;
5520         }
5521
5522         if (!ops->cpu_has_kvm_support()) {
5523                 printk(KERN_ERR "kvm: no hardware support\n");
5524                 r = -EOPNOTSUPP;
5525                 goto out;
5526         }
5527         if (ops->disabled_by_bios()) {
5528                 printk(KERN_ERR "kvm: disabled by bios\n");
5529                 r = -EOPNOTSUPP;
5530                 goto out;
5531         }
5532
5533         r = -ENOMEM;
5534         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
5535         if (!shared_msrs) {
5536                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
5537                 goto out;
5538         }
5539
5540         r = kvm_mmu_module_init();
5541         if (r)
5542                 goto out_free_percpu;
5543
5544         kvm_set_mmio_spte_mask();
5545         kvm_init_msr_list();
5546
5547         kvm_x86_ops = ops;
5548         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5549                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5550
5551         kvm_timer_init();
5552
5553         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5554
5555         if (cpu_has_xsave)
5556                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5557
5558         kvm_lapic_init();
5559 #ifdef CONFIG_X86_64
5560         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5561 #endif
5562
5563         return 0;
5564
5565 out_free_percpu:
5566         free_percpu(shared_msrs);
5567 out:
5568         return r;
5569 }
5570
5571 void kvm_arch_exit(void)
5572 {
5573         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5574
5575         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5576                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5577                                             CPUFREQ_TRANSITION_NOTIFIER);
5578         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5579 #ifdef CONFIG_X86_64
5580         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5581 #endif
5582         kvm_x86_ops = NULL;
5583         kvm_mmu_module_exit();
5584         free_percpu(shared_msrs);
5585 }
5586
5587 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5588 {
5589         ++vcpu->stat.halt_exits;
5590         if (irqchip_in_kernel(vcpu->kvm)) {
5591                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5592                 return 1;
5593         } else {
5594                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5595                 return 0;
5596         }
5597 }
5598 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5599
5600 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
5601 {
5602         u64 param, ingpa, outgpa, ret;
5603         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
5604         bool fast, longmode;
5605         int cs_db, cs_l;
5606
5607         /*
5608          * hypercall generates UD from non zero cpl and real mode
5609          * per HYPER-V spec
5610          */
5611         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
5612                 kvm_queue_exception(vcpu, UD_VECTOR);
5613                 return 0;
5614         }
5615
5616         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5617         longmode = is_long_mode(vcpu) && cs_l == 1;
5618
5619         if (!longmode) {
5620                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
5621                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
5622                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
5623                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
5624                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
5625                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
5626         }
5627 #ifdef CONFIG_X86_64
5628         else {
5629                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
5630                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
5631                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
5632         }
5633 #endif
5634
5635         code = param & 0xffff;
5636         fast = (param >> 16) & 0x1;
5637         rep_cnt = (param >> 32) & 0xfff;
5638         rep_idx = (param >> 48) & 0xfff;
5639
5640         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
5641
5642         switch (code) {
5643         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
5644                 kvm_vcpu_on_spin(vcpu);
5645                 break;
5646         default:
5647                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
5648                 break;
5649         }
5650
5651         ret = res | (((u64)rep_done & 0xfff) << 32);
5652         if (longmode) {
5653                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5654         } else {
5655                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
5656                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
5657         }
5658
5659         return 1;
5660 }
5661
5662 /*
5663  * kvm_pv_kick_cpu_op:  Kick a vcpu.
5664  *
5665  * @apicid - apicid of vcpu to be kicked.
5666  */
5667 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
5668 {
5669         struct kvm_lapic_irq lapic_irq;
5670
5671         lapic_irq.shorthand = 0;
5672         lapic_irq.dest_mode = 0;
5673         lapic_irq.dest_id = apicid;
5674
5675         lapic_irq.delivery_mode = APIC_DM_REMRD;
5676         kvm_irq_delivery_to_apic(kvm, 0, &lapic_irq, NULL);
5677 }
5678
5679 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5680 {
5681         unsigned long nr, a0, a1, a2, a3, ret;
5682         int r = 1;
5683
5684         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5685                 return kvm_hv_hypercall(vcpu);
5686
5687         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5688         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5689         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5690         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5691         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5692
5693         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5694
5695         if (!is_long_mode(vcpu)) {
5696                 nr &= 0xFFFFFFFF;
5697                 a0 &= 0xFFFFFFFF;
5698                 a1 &= 0xFFFFFFFF;
5699                 a2 &= 0xFFFFFFFF;
5700                 a3 &= 0xFFFFFFFF;
5701         }
5702
5703         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5704                 ret = -KVM_EPERM;
5705                 goto out;
5706         }
5707
5708         switch (nr) {
5709         case KVM_HC_VAPIC_POLL_IRQ:
5710                 ret = 0;
5711                 break;
5712         case KVM_HC_KICK_CPU:
5713                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
5714                 ret = 0;
5715                 break;
5716         default:
5717                 ret = -KVM_ENOSYS;
5718                 break;
5719         }
5720 out:
5721         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5722         ++vcpu->stat.hypercalls;
5723         return r;
5724 }
5725 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5726
5727 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5728 {
5729         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5730         char instruction[3];
5731         unsigned long rip = kvm_rip_read(vcpu);
5732
5733         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5734
5735         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5736 }
5737
5738 /*
5739  * Check if userspace requested an interrupt window, and that the
5740  * interrupt window is open.
5741  *
5742  * No need to exit to userspace if we already have an interrupt queued.
5743  */
5744 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5745 {
5746         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5747                 vcpu->run->request_interrupt_window &&
5748                 kvm_arch_interrupt_allowed(vcpu));
5749 }
5750
5751 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5752 {
5753         struct kvm_run *kvm_run = vcpu->run;
5754
5755         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5756         kvm_run->cr8 = kvm_get_cr8(vcpu);
5757         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5758         if (irqchip_in_kernel(vcpu->kvm))
5759                 kvm_run->ready_for_interrupt_injection = 1;
5760         else
5761                 kvm_run->ready_for_interrupt_injection =
5762                         kvm_arch_interrupt_allowed(vcpu) &&
5763                         !kvm_cpu_has_interrupt(vcpu) &&
5764                         !kvm_event_needs_reinjection(vcpu);
5765 }
5766
5767 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5768 {
5769         int max_irr, tpr;
5770
5771         if (!kvm_x86_ops->update_cr8_intercept)
5772                 return;
5773
5774         if (!vcpu->arch.apic)
5775                 return;
5776
5777         if (!vcpu->arch.apic->vapic_addr)
5778                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5779         else
5780                 max_irr = -1;
5781
5782         if (max_irr != -1)
5783                 max_irr >>= 4;
5784
5785         tpr = kvm_lapic_get_cr8(vcpu);
5786
5787         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5788 }
5789
5790 static void inject_pending_event(struct kvm_vcpu *vcpu)
5791 {
5792         /* try to reinject previous events if any */
5793         if (vcpu->arch.exception.pending) {
5794                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5795                                         vcpu->arch.exception.has_error_code,
5796                                         vcpu->arch.exception.error_code);
5797                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5798                                           vcpu->arch.exception.has_error_code,
5799                                           vcpu->arch.exception.error_code,
5800                                           vcpu->arch.exception.reinject);
5801                 return;
5802         }
5803
5804         if (vcpu->arch.nmi_injected) {
5805                 kvm_x86_ops->set_nmi(vcpu);
5806                 return;
5807         }
5808
5809         if (vcpu->arch.interrupt.pending) {
5810                 kvm_x86_ops->set_irq(vcpu);
5811                 return;
5812         }
5813
5814         /* try to inject new event if pending */
5815         if (vcpu->arch.nmi_pending) {
5816                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5817                         --vcpu->arch.nmi_pending;
5818                         vcpu->arch.nmi_injected = true;
5819                         kvm_x86_ops->set_nmi(vcpu);
5820                 }
5821         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
5822                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5823                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5824                                             false);
5825                         kvm_x86_ops->set_irq(vcpu);
5826                 }
5827         }
5828 }
5829
5830 static void process_nmi(struct kvm_vcpu *vcpu)
5831 {
5832         unsigned limit = 2;
5833
5834         /*
5835          * x86 is limited to one NMI running, and one NMI pending after it.
5836          * If an NMI is already in progress, limit further NMIs to just one.
5837          * Otherwise, allow two (and we'll inject the first one immediately).
5838          */
5839         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
5840                 limit = 1;
5841
5842         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
5843         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
5844         kvm_make_request(KVM_REQ_EVENT, vcpu);
5845 }
5846
5847 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
5848 {
5849         u64 eoi_exit_bitmap[4];
5850         u32 tmr[8];
5851
5852         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
5853                 return;
5854
5855         memset(eoi_exit_bitmap, 0, 32);
5856         memset(tmr, 0, 32);
5857
5858         kvm_ioapic_scan_entry(vcpu, eoi_exit_bitmap, tmr);
5859         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
5860         kvm_apic_update_tmr(vcpu, tmr);
5861 }
5862
5863 /*
5864  * Returns 1 to let __vcpu_run() continue the guest execution loop without
5865  * exiting to the userspace.  Otherwise, the value will be returned to the
5866  * userspace.
5867  */
5868 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5869 {
5870         int r;
5871         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5872                 vcpu->run->request_interrupt_window;
5873         bool req_immediate_exit = false;
5874
5875         if (vcpu->requests) {
5876                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5877                         kvm_mmu_unload(vcpu);
5878                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5879                         __kvm_migrate_timers(vcpu);
5880                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
5881                         kvm_gen_update_masterclock(vcpu->kvm);
5882                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
5883                         kvm_gen_kvmclock_update(vcpu);
5884                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5885                         r = kvm_guest_time_update(vcpu);
5886                         if (unlikely(r))
5887                                 goto out;
5888                 }
5889                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5890                         kvm_mmu_sync_roots(vcpu);
5891                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5892                         kvm_x86_ops->tlb_flush(vcpu);
5893                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5894                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5895                         r = 0;
5896                         goto out;
5897                 }
5898                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5899                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5900                         r = 0;
5901                         goto out;
5902                 }
5903                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5904                         vcpu->fpu_active = 0;
5905                         kvm_x86_ops->fpu_deactivate(vcpu);
5906                 }
5907                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5908                         /* Page is swapped out. Do synthetic halt */
5909                         vcpu->arch.apf.halted = true;
5910                         r = 1;
5911                         goto out;
5912                 }
5913                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
5914                         record_steal_time(vcpu);
5915                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
5916                         process_nmi(vcpu);
5917                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
5918                         kvm_handle_pmu_event(vcpu);
5919                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
5920                         kvm_deliver_pmi(vcpu);
5921                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
5922                         vcpu_scan_ioapic(vcpu);
5923         }
5924
5925         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5926                 kvm_apic_accept_events(vcpu);
5927                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
5928                         r = 1;
5929                         goto out;
5930                 }
5931
5932                 inject_pending_event(vcpu);
5933
5934                 /* enable NMI/IRQ window open exits if needed */
5935                 if (vcpu->arch.nmi_pending)
5936                         req_immediate_exit =
5937                                 kvm_x86_ops->enable_nmi_window(vcpu) != 0;
5938                 else if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
5939                         req_immediate_exit =
5940                                 kvm_x86_ops->enable_irq_window(vcpu) != 0;
5941
5942                 if (kvm_lapic_enabled(vcpu)) {
5943                         /*
5944                          * Update architecture specific hints for APIC
5945                          * virtual interrupt delivery.
5946                          */
5947                         if (kvm_x86_ops->hwapic_irr_update)
5948                                 kvm_x86_ops->hwapic_irr_update(vcpu,
5949                                         kvm_lapic_find_highest_irr(vcpu));
5950                         update_cr8_intercept(vcpu);
5951                         kvm_lapic_sync_to_vapic(vcpu);
5952                 }
5953         }
5954
5955         r = kvm_mmu_reload(vcpu);
5956         if (unlikely(r)) {
5957                 goto cancel_injection;
5958         }
5959
5960         preempt_disable();
5961
5962         kvm_x86_ops->prepare_guest_switch(vcpu);
5963         if (vcpu->fpu_active)
5964                 kvm_load_guest_fpu(vcpu);
5965         kvm_load_guest_xcr0(vcpu);
5966
5967         vcpu->mode = IN_GUEST_MODE;
5968
5969         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5970
5971         /* We should set ->mode before check ->requests,
5972          * see the comment in make_all_cpus_request.
5973          */
5974         smp_mb__after_srcu_read_unlock();
5975
5976         local_irq_disable();
5977
5978         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5979             || need_resched() || signal_pending(current)) {
5980                 vcpu->mode = OUTSIDE_GUEST_MODE;
5981                 smp_wmb();
5982                 local_irq_enable();
5983                 preempt_enable();
5984                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5985                 r = 1;
5986                 goto cancel_injection;
5987         }
5988
5989         if (req_immediate_exit)
5990                 smp_send_reschedule(vcpu->cpu);
5991
5992         kvm_guest_enter();
5993
5994         if (unlikely(vcpu->arch.switch_db_regs)) {
5995                 set_debugreg(0, 7);
5996                 set_debugreg(vcpu->arch.eff_db[0], 0);
5997                 set_debugreg(vcpu->arch.eff_db[1], 1);
5998                 set_debugreg(vcpu->arch.eff_db[2], 2);
5999                 set_debugreg(vcpu->arch.eff_db[3], 3);
6000         }
6001
6002         trace_kvm_entry(vcpu->vcpu_id);
6003         kvm_x86_ops->run(vcpu);
6004
6005         /*
6006          * If the guest has used debug registers, at least dr7
6007          * will be disabled while returning to the host.
6008          * If we don't have active breakpoints in the host, we don't
6009          * care about the messed up debug address registers. But if
6010          * we have some of them active, restore the old state.
6011          */
6012         if (hw_breakpoint_active())
6013                 hw_breakpoint_restore();
6014
6015         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu,
6016                                                            native_read_tsc());
6017
6018         vcpu->mode = OUTSIDE_GUEST_MODE;
6019         smp_wmb();
6020
6021         /* Interrupt is enabled by handle_external_intr() */
6022         kvm_x86_ops->handle_external_intr(vcpu);
6023
6024         ++vcpu->stat.exits;
6025
6026         /*
6027          * We must have an instruction between local_irq_enable() and
6028          * kvm_guest_exit(), so the timer interrupt isn't delayed by
6029          * the interrupt shadow.  The stat.exits increment will do nicely.
6030          * But we need to prevent reordering, hence this barrier():
6031          */
6032         barrier();
6033
6034         kvm_guest_exit();
6035
6036         preempt_enable();
6037
6038         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6039
6040         /*
6041          * Profile KVM exit RIPs:
6042          */
6043         if (unlikely(prof_on == KVM_PROFILING)) {
6044                 unsigned long rip = kvm_rip_read(vcpu);
6045                 profile_hit(KVM_PROFILING, (void *)rip);
6046         }
6047
6048         if (unlikely(vcpu->arch.tsc_always_catchup))
6049                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6050
6051         if (vcpu->arch.apic_attention)
6052                 kvm_lapic_sync_from_vapic(vcpu);
6053
6054         r = kvm_x86_ops->handle_exit(vcpu);
6055         return r;
6056
6057 cancel_injection:
6058         kvm_x86_ops->cancel_injection(vcpu);
6059         if (unlikely(vcpu->arch.apic_attention))
6060                 kvm_lapic_sync_from_vapic(vcpu);
6061 out:
6062         return r;
6063 }
6064
6065
6066 static int __vcpu_run(struct kvm_vcpu *vcpu)
6067 {
6068         int r;
6069         struct kvm *kvm = vcpu->kvm;
6070
6071         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6072
6073         r = 1;
6074         while (r > 0) {
6075                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6076                     !vcpu->arch.apf.halted)
6077                         r = vcpu_enter_guest(vcpu);
6078                 else {
6079                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6080                         kvm_vcpu_block(vcpu);
6081                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6082                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu)) {
6083                                 kvm_apic_accept_events(vcpu);
6084                                 switch(vcpu->arch.mp_state) {
6085                                 case KVM_MP_STATE_HALTED:
6086                                         vcpu->arch.pv.pv_unhalted = false;
6087                                         vcpu->arch.mp_state =
6088                                                 KVM_MP_STATE_RUNNABLE;
6089                                 case KVM_MP_STATE_RUNNABLE:
6090                                         vcpu->arch.apf.halted = false;
6091                                         break;
6092                                 case KVM_MP_STATE_INIT_RECEIVED:
6093                                         break;
6094                                 default:
6095                                         r = -EINTR;
6096                                         break;
6097                                 }
6098                         }
6099                 }
6100
6101                 if (r <= 0)
6102                         break;
6103
6104                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
6105                 if (kvm_cpu_has_pending_timer(vcpu))
6106                         kvm_inject_pending_timer_irqs(vcpu);
6107
6108                 if (dm_request_for_irq_injection(vcpu)) {
6109                         r = -EINTR;
6110                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6111                         ++vcpu->stat.request_irq_exits;
6112                 }
6113
6114                 kvm_check_async_pf_completion(vcpu);
6115
6116                 if (signal_pending(current)) {
6117                         r = -EINTR;
6118                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6119                         ++vcpu->stat.signal_exits;
6120                 }
6121                 if (need_resched()) {
6122                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6123                         cond_resched();
6124                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6125                 }
6126         }
6127
6128         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6129
6130         return r;
6131 }
6132
6133 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
6134 {
6135         int r;
6136         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6137         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
6138         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6139         if (r != EMULATE_DONE)
6140                 return 0;
6141         return 1;
6142 }
6143
6144 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
6145 {
6146         BUG_ON(!vcpu->arch.pio.count);
6147
6148         return complete_emulated_io(vcpu);
6149 }
6150
6151 /*
6152  * Implements the following, as a state machine:
6153  *
6154  * read:
6155  *   for each fragment
6156  *     for each mmio piece in the fragment
6157  *       write gpa, len
6158  *       exit
6159  *       copy data
6160  *   execute insn
6161  *
6162  * write:
6163  *   for each fragment
6164  *     for each mmio piece in the fragment
6165  *       write gpa, len
6166  *       copy data
6167  *       exit
6168  */
6169 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
6170 {
6171         struct kvm_run *run = vcpu->run;
6172         struct kvm_mmio_fragment *frag;
6173         unsigned len;
6174
6175         BUG_ON(!vcpu->mmio_needed);
6176
6177         /* Complete previous fragment */
6178         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
6179         len = min(8u, frag->len);
6180         if (!vcpu->mmio_is_write)
6181                 memcpy(frag->data, run->mmio.data, len);
6182
6183         if (frag->len <= 8) {
6184                 /* Switch to the next fragment. */
6185                 frag++;
6186                 vcpu->mmio_cur_fragment++;
6187         } else {
6188                 /* Go forward to the next mmio piece. */
6189                 frag->data += len;
6190                 frag->gpa += len;
6191                 frag->len -= len;
6192         }
6193
6194         if (vcpu->mmio_cur_fragment == vcpu->mmio_nr_fragments) {
6195                 vcpu->mmio_needed = 0;
6196
6197                 /* FIXME: return into emulator if single-stepping.  */
6198                 if (vcpu->mmio_is_write)
6199                         return 1;
6200                 vcpu->mmio_read_completed = 1;
6201                 return complete_emulated_io(vcpu);
6202         }
6203
6204         run->exit_reason = KVM_EXIT_MMIO;
6205         run->mmio.phys_addr = frag->gpa;
6206         if (vcpu->mmio_is_write)
6207                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
6208         run->mmio.len = min(8u, frag->len);
6209         run->mmio.is_write = vcpu->mmio_is_write;
6210         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6211         return 0;
6212 }
6213
6214
6215 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
6216 {
6217         int r;
6218         sigset_t sigsaved;
6219
6220         if (!tsk_used_math(current) && init_fpu(current))
6221                 return -ENOMEM;
6222
6223         if (vcpu->sigset_active)
6224                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
6225
6226         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
6227                 kvm_vcpu_block(vcpu);
6228                 kvm_apic_accept_events(vcpu);
6229                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
6230                 r = -EAGAIN;
6231                 goto out;
6232         }
6233
6234         /* re-sync apic's tpr */
6235         if (!irqchip_in_kernel(vcpu->kvm)) {
6236                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
6237                         r = -EINVAL;
6238                         goto out;
6239                 }
6240         }
6241
6242         if (unlikely(vcpu->arch.complete_userspace_io)) {
6243                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
6244                 vcpu->arch.complete_userspace_io = NULL;
6245                 r = cui(vcpu);
6246                 if (r <= 0)
6247                         goto out;
6248         } else
6249                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
6250
6251         r = __vcpu_run(vcpu);
6252
6253 out:
6254         post_kvm_run_save(vcpu);
6255         if (vcpu->sigset_active)
6256                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
6257
6258         return r;
6259 }
6260
6261 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6262 {
6263         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
6264                 /*
6265                  * We are here if userspace calls get_regs() in the middle of
6266                  * instruction emulation. Registers state needs to be copied
6267                  * back from emulation context to vcpu. Userspace shouldn't do
6268                  * that usually, but some bad designed PV devices (vmware
6269                  * backdoor interface) need this to work
6270                  */
6271                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
6272                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6273         }
6274         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
6275         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
6276         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
6277         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6278         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6279         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6280         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6281         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6282 #ifdef CONFIG_X86_64
6283         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6284         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6285         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6286         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6287         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6288         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6289         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6290         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6291 #endif
6292
6293         regs->rip = kvm_rip_read(vcpu);
6294         regs->rflags = kvm_get_rflags(vcpu);
6295
6296         return 0;
6297 }
6298
6299 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6300 {
6301         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6302         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6303
6304         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6305         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6306         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6307         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6308         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6309         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6310         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6311         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6312 #ifdef CONFIG_X86_64
6313         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6314         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6315         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6316         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6317         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6318         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6319         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6320         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6321 #endif
6322
6323         kvm_rip_write(vcpu, regs->rip);
6324         kvm_set_rflags(vcpu, regs->rflags);
6325
6326         vcpu->arch.exception.pending = false;
6327
6328         kvm_make_request(KVM_REQ_EVENT, vcpu);
6329
6330         return 0;
6331 }
6332
6333 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6334 {
6335         struct kvm_segment cs;
6336
6337         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6338         *db = cs.db;
6339         *l = cs.l;
6340 }
6341 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6342
6343 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6344                                   struct kvm_sregs *sregs)
6345 {
6346         struct desc_ptr dt;
6347
6348         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6349         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6350         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6351         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6352         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6353         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6354
6355         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6356         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6357
6358         kvm_x86_ops->get_idt(vcpu, &dt);
6359         sregs->idt.limit = dt.size;
6360         sregs->idt.base = dt.address;
6361         kvm_x86_ops->get_gdt(vcpu, &dt);
6362         sregs->gdt.limit = dt.size;
6363         sregs->gdt.base = dt.address;
6364
6365         sregs->cr0 = kvm_read_cr0(vcpu);
6366         sregs->cr2 = vcpu->arch.cr2;
6367         sregs->cr3 = kvm_read_cr3(vcpu);
6368         sregs->cr4 = kvm_read_cr4(vcpu);
6369         sregs->cr8 = kvm_get_cr8(vcpu);
6370         sregs->efer = vcpu->arch.efer;
6371         sregs->apic_base = kvm_get_apic_base(vcpu);
6372
6373         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6374
6375         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6376                 set_bit(vcpu->arch.interrupt.nr,
6377                         (unsigned long *)sregs->interrupt_bitmap);
6378
6379         return 0;
6380 }
6381
6382 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6383                                     struct kvm_mp_state *mp_state)
6384 {
6385         kvm_apic_accept_events(vcpu);
6386         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
6387                                         vcpu->arch.pv.pv_unhalted)
6388                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
6389         else
6390                 mp_state->mp_state = vcpu->arch.mp_state;
6391
6392         return 0;
6393 }
6394
6395 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
6396                                     struct kvm_mp_state *mp_state)
6397 {
6398         if (!kvm_vcpu_has_lapic(vcpu) &&
6399             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
6400                 return -EINVAL;
6401
6402         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
6403                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
6404                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
6405         } else
6406                 vcpu->arch.mp_state = mp_state->mp_state;
6407         kvm_make_request(KVM_REQ_EVENT, vcpu);
6408         return 0;
6409 }
6410
6411 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
6412                     int reason, bool has_error_code, u32 error_code)
6413 {
6414         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6415         int ret;
6416
6417         init_emulate_ctxt(vcpu);
6418
6419         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
6420                                    has_error_code, error_code);
6421
6422         if (ret)
6423                 return EMULATE_FAIL;
6424
6425         kvm_rip_write(vcpu, ctxt->eip);
6426         kvm_set_rflags(vcpu, ctxt->eflags);
6427         kvm_make_request(KVM_REQ_EVENT, vcpu);
6428         return EMULATE_DONE;
6429 }
6430 EXPORT_SYMBOL_GPL(kvm_task_switch);
6431
6432 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
6433                                   struct kvm_sregs *sregs)
6434 {
6435         struct msr_data apic_base_msr;
6436         int mmu_reset_needed = 0;
6437         int pending_vec, max_bits, idx;
6438         struct desc_ptr dt;
6439
6440         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
6441                 return -EINVAL;
6442
6443         dt.size = sregs->idt.limit;
6444         dt.address = sregs->idt.base;
6445         kvm_x86_ops->set_idt(vcpu, &dt);
6446         dt.size = sregs->gdt.limit;
6447         dt.address = sregs->gdt.base;
6448         kvm_x86_ops->set_gdt(vcpu, &dt);
6449
6450         vcpu->arch.cr2 = sregs->cr2;
6451         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
6452         vcpu->arch.cr3 = sregs->cr3;
6453         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
6454
6455         kvm_set_cr8(vcpu, sregs->cr8);
6456
6457         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
6458         kvm_x86_ops->set_efer(vcpu, sregs->efer);
6459         apic_base_msr.data = sregs->apic_base;
6460         apic_base_msr.host_initiated = true;
6461         kvm_set_apic_base(vcpu, &apic_base_msr);
6462
6463         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
6464         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
6465         vcpu->arch.cr0 = sregs->cr0;
6466
6467         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
6468         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
6469         if (sregs->cr4 & X86_CR4_OSXSAVE)
6470                 kvm_update_cpuid(vcpu);
6471
6472         idx = srcu_read_lock(&vcpu->kvm->srcu);
6473         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
6474                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
6475                 mmu_reset_needed = 1;
6476         }
6477         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6478
6479         if (mmu_reset_needed)
6480                 kvm_mmu_reset_context(vcpu);
6481
6482         max_bits = KVM_NR_INTERRUPTS;
6483         pending_vec = find_first_bit(
6484                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
6485         if (pending_vec < max_bits) {
6486                 kvm_queue_interrupt(vcpu, pending_vec, false);
6487                 pr_debug("Set back pending irq %d\n", pending_vec);
6488         }
6489
6490         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6491         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6492         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6493         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6494         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6495         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6496
6497         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6498         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6499
6500         update_cr8_intercept(vcpu);
6501
6502         /* Older userspace won't unhalt the vcpu on reset. */
6503         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
6504             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
6505             !is_protmode(vcpu))
6506                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6507
6508         kvm_make_request(KVM_REQ_EVENT, vcpu);
6509
6510         return 0;
6511 }
6512
6513 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
6514                                         struct kvm_guest_debug *dbg)
6515 {
6516         unsigned long rflags;
6517         int i, r;
6518
6519         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
6520                 r = -EBUSY;
6521                 if (vcpu->arch.exception.pending)
6522                         goto out;
6523                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
6524                         kvm_queue_exception(vcpu, DB_VECTOR);
6525                 else
6526                         kvm_queue_exception(vcpu, BP_VECTOR);
6527         }
6528
6529         /*
6530          * Read rflags as long as potentially injected trace flags are still
6531          * filtered out.
6532          */
6533         rflags = kvm_get_rflags(vcpu);
6534
6535         vcpu->guest_debug = dbg->control;
6536         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
6537                 vcpu->guest_debug = 0;
6538
6539         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
6540                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
6541                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
6542                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
6543         } else {
6544                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6545                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6546         }
6547         kvm_update_dr7(vcpu);
6548
6549         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6550                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
6551                         get_segment_base(vcpu, VCPU_SREG_CS);
6552
6553         /*
6554          * Trigger an rflags update that will inject or remove the trace
6555          * flags.
6556          */
6557         kvm_set_rflags(vcpu, rflags);
6558
6559         kvm_x86_ops->update_db_bp_intercept(vcpu);
6560
6561         r = 0;
6562
6563 out:
6564
6565         return r;
6566 }
6567
6568 /*
6569  * Translate a guest virtual address to a guest physical address.
6570  */
6571 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
6572                                     struct kvm_translation *tr)
6573 {
6574         unsigned long vaddr = tr->linear_address;
6575         gpa_t gpa;
6576         int idx;
6577
6578         idx = srcu_read_lock(&vcpu->kvm->srcu);
6579         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
6580         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6581         tr->physical_address = gpa;
6582         tr->valid = gpa != UNMAPPED_GVA;
6583         tr->writeable = 1;
6584         tr->usermode = 0;
6585
6586         return 0;
6587 }
6588
6589 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6590 {
6591         struct i387_fxsave_struct *fxsave =
6592                         &vcpu->arch.guest_fpu.state->fxsave;
6593
6594         memcpy(fpu->fpr, fxsave->st_space, 128);
6595         fpu->fcw = fxsave->cwd;
6596         fpu->fsw = fxsave->swd;
6597         fpu->ftwx = fxsave->twd;
6598         fpu->last_opcode = fxsave->fop;
6599         fpu->last_ip = fxsave->rip;
6600         fpu->last_dp = fxsave->rdp;
6601         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
6602
6603         return 0;
6604 }
6605
6606 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6607 {
6608         struct i387_fxsave_struct *fxsave =
6609                         &vcpu->arch.guest_fpu.state->fxsave;
6610
6611         memcpy(fxsave->st_space, fpu->fpr, 128);
6612         fxsave->cwd = fpu->fcw;
6613         fxsave->swd = fpu->fsw;
6614         fxsave->twd = fpu->ftwx;
6615         fxsave->fop = fpu->last_opcode;
6616         fxsave->rip = fpu->last_ip;
6617         fxsave->rdp = fpu->last_dp;
6618         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
6619
6620         return 0;
6621 }
6622
6623 int fx_init(struct kvm_vcpu *vcpu)
6624 {
6625         int err;
6626
6627         err = fpu_alloc(&vcpu->arch.guest_fpu);
6628         if (err)
6629                 return err;
6630
6631         fpu_finit(&vcpu->arch.guest_fpu);
6632
6633         /*
6634          * Ensure guest xcr0 is valid for loading
6635          */
6636         vcpu->arch.xcr0 = XSTATE_FP;
6637
6638         vcpu->arch.cr0 |= X86_CR0_ET;
6639
6640         return 0;
6641 }
6642 EXPORT_SYMBOL_GPL(fx_init);
6643
6644 static void fx_free(struct kvm_vcpu *vcpu)
6645 {
6646         fpu_free(&vcpu->arch.guest_fpu);
6647 }
6648
6649 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
6650 {
6651         if (vcpu->guest_fpu_loaded)
6652                 return;
6653
6654         /*
6655          * Restore all possible states in the guest,
6656          * and assume host would use all available bits.
6657          * Guest xcr0 would be loaded later.
6658          */
6659         kvm_put_guest_xcr0(vcpu);
6660         vcpu->guest_fpu_loaded = 1;
6661         __kernel_fpu_begin();
6662         fpu_restore_checking(&vcpu->arch.guest_fpu);
6663         trace_kvm_fpu(1);
6664 }
6665
6666 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
6667 {
6668         kvm_put_guest_xcr0(vcpu);
6669
6670         if (!vcpu->guest_fpu_loaded)
6671                 return;
6672
6673         vcpu->guest_fpu_loaded = 0;
6674         fpu_save_init(&vcpu->arch.guest_fpu);
6675         __kernel_fpu_end();
6676         ++vcpu->stat.fpu_reload;
6677         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
6678         trace_kvm_fpu(0);
6679 }
6680
6681 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
6682 {
6683         kvmclock_reset(vcpu);
6684
6685         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6686         fx_free(vcpu);
6687         kvm_x86_ops->vcpu_free(vcpu);
6688 }
6689
6690 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
6691                                                 unsigned int id)
6692 {
6693         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
6694                 printk_once(KERN_WARNING
6695                 "kvm: SMP vm created on host with unstable TSC; "
6696                 "guest TSC will not be reliable\n");
6697         return kvm_x86_ops->vcpu_create(kvm, id);
6698 }
6699
6700 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
6701 {
6702         int r;
6703
6704         vcpu->arch.mtrr_state.have_fixed = 1;
6705         r = vcpu_load(vcpu);
6706         if (r)
6707                 return r;
6708         kvm_vcpu_reset(vcpu);
6709         kvm_mmu_setup(vcpu);
6710         vcpu_put(vcpu);
6711
6712         return r;
6713 }
6714
6715 int kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
6716 {
6717         int r;
6718         struct msr_data msr;
6719
6720         r = vcpu_load(vcpu);
6721         if (r)
6722                 return r;
6723         msr.data = 0x0;
6724         msr.index = MSR_IA32_TSC;
6725         msr.host_initiated = true;
6726         kvm_write_tsc(vcpu, &msr);
6727         vcpu_put(vcpu);
6728
6729         return r;
6730 }
6731
6732 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
6733 {
6734         int r;
6735         vcpu->arch.apf.msr_val = 0;
6736
6737         r = vcpu_load(vcpu);
6738         BUG_ON(r);
6739         kvm_mmu_unload(vcpu);
6740         vcpu_put(vcpu);
6741
6742         fx_free(vcpu);
6743         kvm_x86_ops->vcpu_free(vcpu);
6744 }
6745
6746 void kvm_vcpu_reset(struct kvm_vcpu *vcpu)
6747 {
6748         atomic_set(&vcpu->arch.nmi_queued, 0);
6749         vcpu->arch.nmi_pending = 0;
6750         vcpu->arch.nmi_injected = false;
6751
6752         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
6753         vcpu->arch.dr6 = DR6_FIXED_1;
6754         kvm_update_dr6(vcpu);
6755         vcpu->arch.dr7 = DR7_FIXED_1;
6756         kvm_update_dr7(vcpu);
6757
6758         kvm_make_request(KVM_REQ_EVENT, vcpu);
6759         vcpu->arch.apf.msr_val = 0;
6760         vcpu->arch.st.msr_val = 0;
6761
6762         kvmclock_reset(vcpu);
6763
6764         kvm_clear_async_pf_completion_queue(vcpu);
6765         kvm_async_pf_hash_reset(vcpu);
6766         vcpu->arch.apf.halted = false;
6767
6768         kvm_pmu_reset(vcpu);
6769
6770         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
6771         vcpu->arch.regs_avail = ~0;
6772         vcpu->arch.regs_dirty = ~0;
6773
6774         kvm_x86_ops->vcpu_reset(vcpu);
6775 }
6776
6777 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, unsigned int vector)
6778 {
6779         struct kvm_segment cs;
6780
6781         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6782         cs.selector = vector << 8;
6783         cs.base = vector << 12;
6784         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6785         kvm_rip_write(vcpu, 0);
6786 }
6787
6788 int kvm_arch_hardware_enable(void *garbage)
6789 {
6790         struct kvm *kvm;
6791         struct kvm_vcpu *vcpu;
6792         int i;
6793         int ret;
6794         u64 local_tsc;
6795         u64 max_tsc = 0;
6796         bool stable, backwards_tsc = false;
6797
6798         kvm_shared_msr_cpu_online();
6799         ret = kvm_x86_ops->hardware_enable(garbage);
6800         if (ret != 0)
6801                 return ret;
6802
6803         local_tsc = native_read_tsc();
6804         stable = !check_tsc_unstable();
6805         list_for_each_entry(kvm, &vm_list, vm_list) {
6806                 kvm_for_each_vcpu(i, vcpu, kvm) {
6807                         if (!stable && vcpu->cpu == smp_processor_id())
6808                                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
6809                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
6810                                 backwards_tsc = true;
6811                                 if (vcpu->arch.last_host_tsc > max_tsc)
6812                                         max_tsc = vcpu->arch.last_host_tsc;
6813                         }
6814                 }
6815         }
6816
6817         /*
6818          * Sometimes, even reliable TSCs go backwards.  This happens on
6819          * platforms that reset TSC during suspend or hibernate actions, but
6820          * maintain synchronization.  We must compensate.  Fortunately, we can
6821          * detect that condition here, which happens early in CPU bringup,
6822          * before any KVM threads can be running.  Unfortunately, we can't
6823          * bring the TSCs fully up to date with real time, as we aren't yet far
6824          * enough into CPU bringup that we know how much real time has actually
6825          * elapsed; our helper function, get_kernel_ns() will be using boot
6826          * variables that haven't been updated yet.
6827          *
6828          * So we simply find the maximum observed TSC above, then record the
6829          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
6830          * the adjustment will be applied.  Note that we accumulate
6831          * adjustments, in case multiple suspend cycles happen before some VCPU
6832          * gets a chance to run again.  In the event that no KVM threads get a
6833          * chance to run, we will miss the entire elapsed period, as we'll have
6834          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
6835          * loose cycle time.  This isn't too big a deal, since the loss will be
6836          * uniform across all VCPUs (not to mention the scenario is extremely
6837          * unlikely). It is possible that a second hibernate recovery happens
6838          * much faster than a first, causing the observed TSC here to be
6839          * smaller; this would require additional padding adjustment, which is
6840          * why we set last_host_tsc to the local tsc observed here.
6841          *
6842          * N.B. - this code below runs only on platforms with reliable TSC,
6843          * as that is the only way backwards_tsc is set above.  Also note
6844          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
6845          * have the same delta_cyc adjustment applied if backwards_tsc
6846          * is detected.  Note further, this adjustment is only done once,
6847          * as we reset last_host_tsc on all VCPUs to stop this from being
6848          * called multiple times (one for each physical CPU bringup).
6849          *
6850          * Platforms with unreliable TSCs don't have to deal with this, they
6851          * will be compensated by the logic in vcpu_load, which sets the TSC to
6852          * catchup mode.  This will catchup all VCPUs to real time, but cannot
6853          * guarantee that they stay in perfect synchronization.
6854          */
6855         if (backwards_tsc) {
6856                 u64 delta_cyc = max_tsc - local_tsc;
6857                 list_for_each_entry(kvm, &vm_list, vm_list) {
6858                         kvm_for_each_vcpu(i, vcpu, kvm) {
6859                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
6860                                 vcpu->arch.last_host_tsc = local_tsc;
6861                                 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
6862                                         &vcpu->requests);
6863                         }
6864
6865                         /*
6866                          * We have to disable TSC offset matching.. if you were
6867                          * booting a VM while issuing an S4 host suspend....
6868                          * you may have some problem.  Solving this issue is
6869                          * left as an exercise to the reader.
6870                          */
6871                         kvm->arch.last_tsc_nsec = 0;
6872                         kvm->arch.last_tsc_write = 0;
6873                 }
6874
6875         }
6876         return 0;
6877 }
6878
6879 void kvm_arch_hardware_disable(void *garbage)
6880 {
6881         kvm_x86_ops->hardware_disable(garbage);
6882         drop_user_return_notifiers(garbage);
6883 }
6884
6885 int kvm_arch_hardware_setup(void)
6886 {
6887         return kvm_x86_ops->hardware_setup();
6888 }
6889
6890 void kvm_arch_hardware_unsetup(void)
6891 {
6892         kvm_x86_ops->hardware_unsetup();
6893 }
6894
6895 void kvm_arch_check_processor_compat(void *rtn)
6896 {
6897         kvm_x86_ops->check_processor_compatibility(rtn);
6898 }
6899
6900 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
6901 {
6902         return irqchip_in_kernel(vcpu->kvm) == (vcpu->arch.apic != NULL);
6903 }
6904
6905 struct static_key kvm_no_apic_vcpu __read_mostly;
6906
6907 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
6908 {
6909         struct page *page;
6910         struct kvm *kvm;
6911         int r;
6912
6913         BUG_ON(vcpu->kvm == NULL);
6914         kvm = vcpu->kvm;
6915
6916         vcpu->arch.pv.pv_unhalted = false;
6917         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
6918         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
6919                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6920         else
6921                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
6922
6923         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
6924         if (!page) {
6925                 r = -ENOMEM;
6926                 goto fail;
6927         }
6928         vcpu->arch.pio_data = page_address(page);
6929
6930         kvm_set_tsc_khz(vcpu, max_tsc_khz);
6931
6932         r = kvm_mmu_create(vcpu);
6933         if (r < 0)
6934                 goto fail_free_pio_data;
6935
6936         if (irqchip_in_kernel(kvm)) {
6937                 r = kvm_create_lapic(vcpu);
6938                 if (r < 0)
6939                         goto fail_mmu_destroy;
6940         } else
6941                 static_key_slow_inc(&kvm_no_apic_vcpu);
6942
6943         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
6944                                        GFP_KERNEL);
6945         if (!vcpu->arch.mce_banks) {
6946                 r = -ENOMEM;
6947                 goto fail_free_lapic;
6948         }
6949         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
6950
6951         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
6952                 r = -ENOMEM;
6953                 goto fail_free_mce_banks;
6954         }
6955
6956         r = fx_init(vcpu);
6957         if (r)
6958                 goto fail_free_wbinvd_dirty_mask;
6959
6960         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
6961         vcpu->arch.pv_time_enabled = false;
6962
6963         vcpu->arch.guest_supported_xcr0 = 0;
6964         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
6965
6966         kvm_async_pf_hash_reset(vcpu);
6967         kvm_pmu_init(vcpu);
6968
6969         return 0;
6970 fail_free_wbinvd_dirty_mask:
6971         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6972 fail_free_mce_banks:
6973         kfree(vcpu->arch.mce_banks);
6974 fail_free_lapic:
6975         kvm_free_lapic(vcpu);
6976 fail_mmu_destroy:
6977         kvm_mmu_destroy(vcpu);
6978 fail_free_pio_data:
6979         free_page((unsigned long)vcpu->arch.pio_data);
6980 fail:
6981         return r;
6982 }
6983
6984 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
6985 {
6986         int idx;
6987
6988         kvm_pmu_destroy(vcpu);
6989         kfree(vcpu->arch.mce_banks);
6990         kvm_free_lapic(vcpu);
6991         idx = srcu_read_lock(&vcpu->kvm->srcu);
6992         kvm_mmu_destroy(vcpu);
6993         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6994         free_page((unsigned long)vcpu->arch.pio_data);
6995         if (!irqchip_in_kernel(vcpu->kvm))
6996                 static_key_slow_dec(&kvm_no_apic_vcpu);
6997 }
6998
6999 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
7000 {
7001         if (type)
7002                 return -EINVAL;
7003
7004         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
7005         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
7006         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
7007         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
7008
7009         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7010         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
7011         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7012         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
7013                 &kvm->arch.irq_sources_bitmap);
7014
7015         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
7016         mutex_init(&kvm->arch.apic_map_lock);
7017         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
7018
7019         pvclock_update_vm_gtod_copy(kvm);
7020
7021         return 0;
7022 }
7023
7024 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
7025 {
7026         int r;
7027         r = vcpu_load(vcpu);
7028         BUG_ON(r);
7029         kvm_mmu_unload(vcpu);
7030         vcpu_put(vcpu);
7031 }
7032
7033 static void kvm_free_vcpus(struct kvm *kvm)
7034 {
7035         unsigned int i;
7036         struct kvm_vcpu *vcpu;
7037
7038         /*
7039          * Unpin any mmu pages first.
7040          */
7041         kvm_for_each_vcpu(i, vcpu, kvm) {
7042                 kvm_clear_async_pf_completion_queue(vcpu);
7043                 kvm_unload_vcpu_mmu(vcpu);
7044         }
7045         kvm_for_each_vcpu(i, vcpu, kvm)
7046                 kvm_arch_vcpu_free(vcpu);
7047
7048         mutex_lock(&kvm->lock);
7049         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
7050                 kvm->vcpus[i] = NULL;
7051
7052         atomic_set(&kvm->online_vcpus, 0);
7053         mutex_unlock(&kvm->lock);
7054 }
7055
7056 void kvm_arch_sync_events(struct kvm *kvm)
7057 {
7058         kvm_free_all_assigned_devices(kvm);
7059         kvm_free_pit(kvm);
7060 }
7061
7062 void kvm_arch_destroy_vm(struct kvm *kvm)
7063 {
7064         if (current->mm == kvm->mm) {
7065                 /*
7066                  * Free memory regions allocated on behalf of userspace,
7067                  * unless the the memory map has changed due to process exit
7068                  * or fd copying.
7069                  */
7070                 struct kvm_userspace_memory_region mem;
7071                 memset(&mem, 0, sizeof(mem));
7072                 mem.slot = APIC_ACCESS_PAGE_PRIVATE_MEMSLOT;
7073                 kvm_set_memory_region(kvm, &mem);
7074
7075                 mem.slot = IDENTITY_PAGETABLE_PRIVATE_MEMSLOT;
7076                 kvm_set_memory_region(kvm, &mem);
7077
7078                 mem.slot = TSS_PRIVATE_MEMSLOT;
7079                 kvm_set_memory_region(kvm, &mem);
7080         }
7081         kvm_iommu_unmap_guest(kvm);
7082         kfree(kvm->arch.vpic);
7083         kfree(kvm->arch.vioapic);
7084         kvm_free_vcpus(kvm);
7085         if (kvm->arch.apic_access_page)
7086                 put_page(kvm->arch.apic_access_page);
7087         if (kvm->arch.ept_identity_pagetable)
7088                 put_page(kvm->arch.ept_identity_pagetable);
7089         kfree(rcu_dereference_check(kvm->arch.apic_map, 1));
7090 }
7091
7092 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
7093                            struct kvm_memory_slot *dont)
7094 {
7095         int i;
7096
7097         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7098                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
7099                         kvm_kvfree(free->arch.rmap[i]);
7100                         free->arch.rmap[i] = NULL;
7101                 }
7102                 if (i == 0)
7103                         continue;
7104
7105                 if (!dont || free->arch.lpage_info[i - 1] !=
7106                              dont->arch.lpage_info[i - 1]) {
7107                         kvm_kvfree(free->arch.lpage_info[i - 1]);
7108                         free->arch.lpage_info[i - 1] = NULL;
7109                 }
7110         }
7111 }
7112
7113 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
7114                             unsigned long npages)
7115 {
7116         int i;
7117
7118         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7119                 unsigned long ugfn;
7120                 int lpages;
7121                 int level = i + 1;
7122
7123                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
7124                                       slot->base_gfn, level) + 1;
7125
7126                 slot->arch.rmap[i] =
7127                         kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
7128                 if (!slot->arch.rmap[i])
7129                         goto out_free;
7130                 if (i == 0)
7131                         continue;
7132
7133                 slot->arch.lpage_info[i - 1] = kvm_kvzalloc(lpages *
7134                                         sizeof(*slot->arch.lpage_info[i - 1]));
7135                 if (!slot->arch.lpage_info[i - 1])
7136                         goto out_free;
7137
7138                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
7139                         slot->arch.lpage_info[i - 1][0].write_count = 1;
7140                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
7141                         slot->arch.lpage_info[i - 1][lpages - 1].write_count = 1;
7142                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
7143                 /*
7144                  * If the gfn and userspace address are not aligned wrt each
7145                  * other, or if explicitly asked to, disable large page
7146                  * support for this slot
7147                  */
7148                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
7149                     !kvm_largepages_enabled()) {
7150                         unsigned long j;
7151
7152                         for (j = 0; j < lpages; ++j)
7153                                 slot->arch.lpage_info[i - 1][j].write_count = 1;
7154                 }
7155         }
7156
7157         return 0;
7158
7159 out_free:
7160         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7161                 kvm_kvfree(slot->arch.rmap[i]);
7162                 slot->arch.rmap[i] = NULL;
7163                 if (i == 0)
7164                         continue;
7165
7166                 kvm_kvfree(slot->arch.lpage_info[i - 1]);
7167                 slot->arch.lpage_info[i - 1] = NULL;
7168         }
7169         return -ENOMEM;
7170 }
7171
7172 void kvm_arch_memslots_updated(struct kvm *kvm)
7173 {
7174         /*
7175          * memslots->generation has been incremented.
7176          * mmio generation may have reached its maximum value.
7177          */
7178         kvm_mmu_invalidate_mmio_sptes(kvm);
7179 }
7180
7181 int kvm_arch_prepare_memory_region(struct kvm *kvm,
7182                                 struct kvm_memory_slot *memslot,
7183                                 struct kvm_userspace_memory_region *mem,
7184                                 enum kvm_mr_change change)
7185 {
7186         /*
7187          * Only private memory slots need to be mapped here since
7188          * KVM_SET_MEMORY_REGION ioctl is no longer supported.
7189          */
7190         if ((memslot->id >= KVM_USER_MEM_SLOTS) && (change == KVM_MR_CREATE)) {
7191                 unsigned long userspace_addr;
7192
7193                 /*
7194                  * MAP_SHARED to prevent internal slot pages from being moved
7195                  * by fork()/COW.
7196                  */
7197                 userspace_addr = vm_mmap(NULL, 0, memslot->npages * PAGE_SIZE,
7198                                          PROT_READ | PROT_WRITE,
7199                                          MAP_SHARED | MAP_ANONYMOUS, 0);
7200
7201                 if (IS_ERR((void *)userspace_addr))
7202                         return PTR_ERR((void *)userspace_addr);
7203
7204                 memslot->userspace_addr = userspace_addr;
7205         }
7206
7207         return 0;
7208 }
7209
7210 void kvm_arch_commit_memory_region(struct kvm *kvm,
7211                                 struct kvm_userspace_memory_region *mem,
7212                                 const struct kvm_memory_slot *old,
7213                                 enum kvm_mr_change change)
7214 {
7215
7216         int nr_mmu_pages = 0;
7217
7218         if ((mem->slot >= KVM_USER_MEM_SLOTS) && (change == KVM_MR_DELETE)) {
7219                 int ret;
7220
7221                 ret = vm_munmap(old->userspace_addr,
7222                                 old->npages * PAGE_SIZE);
7223                 if (ret < 0)
7224                         printk(KERN_WARNING
7225                                "kvm_vm_ioctl_set_memory_region: "
7226                                "failed to munmap memory\n");
7227         }
7228
7229         if (!kvm->arch.n_requested_mmu_pages)
7230                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
7231
7232         if (nr_mmu_pages)
7233                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
7234         /*
7235          * Write protect all pages for dirty logging.
7236          * Existing largepage mappings are destroyed here and new ones will
7237          * not be created until the end of the logging.
7238          */
7239         if ((change != KVM_MR_DELETE) && (mem->flags & KVM_MEM_LOG_DIRTY_PAGES))
7240                 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
7241 }
7242
7243 void kvm_arch_flush_shadow_all(struct kvm *kvm)
7244 {
7245         kvm_mmu_invalidate_zap_all_pages(kvm);
7246 }
7247
7248 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
7249                                    struct kvm_memory_slot *slot)
7250 {
7251         kvm_mmu_invalidate_zap_all_pages(kvm);
7252 }
7253
7254 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
7255 {
7256         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
7257                 !vcpu->arch.apf.halted)
7258                 || !list_empty_careful(&vcpu->async_pf.done)
7259                 || kvm_apic_has_events(vcpu)
7260                 || vcpu->arch.pv.pv_unhalted
7261                 || atomic_read(&vcpu->arch.nmi_queued) ||
7262                 (kvm_arch_interrupt_allowed(vcpu) &&
7263                  kvm_cpu_has_interrupt(vcpu));
7264 }
7265
7266 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
7267 {
7268         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
7269 }
7270
7271 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
7272 {
7273         return kvm_x86_ops->interrupt_allowed(vcpu);
7274 }
7275
7276 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
7277 {
7278         unsigned long current_rip = kvm_rip_read(vcpu) +
7279                 get_segment_base(vcpu, VCPU_SREG_CS);
7280
7281         return current_rip == linear_rip;
7282 }
7283 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
7284
7285 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
7286 {
7287         unsigned long rflags;
7288
7289         rflags = kvm_x86_ops->get_rflags(vcpu);
7290         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7291                 rflags &= ~X86_EFLAGS_TF;
7292         return rflags;
7293 }
7294 EXPORT_SYMBOL_GPL(kvm_get_rflags);
7295
7296 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
7297 {
7298         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
7299             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
7300                 rflags |= X86_EFLAGS_TF;
7301         kvm_x86_ops->set_rflags(vcpu, rflags);
7302         kvm_make_request(KVM_REQ_EVENT, vcpu);
7303 }
7304 EXPORT_SYMBOL_GPL(kvm_set_rflags);
7305
7306 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
7307 {
7308         int r;
7309
7310         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
7311               work->wakeup_all)
7312                 return;
7313
7314         r = kvm_mmu_reload(vcpu);
7315         if (unlikely(r))
7316                 return;
7317
7318         if (!vcpu->arch.mmu.direct_map &&
7319               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
7320                 return;
7321
7322         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
7323 }
7324
7325 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
7326 {
7327         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
7328 }
7329
7330 static inline u32 kvm_async_pf_next_probe(u32 key)
7331 {
7332         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
7333 }
7334
7335 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7336 {
7337         u32 key = kvm_async_pf_hash_fn(gfn);
7338
7339         while (vcpu->arch.apf.gfns[key] != ~0)
7340                 key = kvm_async_pf_next_probe(key);
7341
7342         vcpu->arch.apf.gfns[key] = gfn;
7343 }
7344
7345 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
7346 {
7347         int i;
7348         u32 key = kvm_async_pf_hash_fn(gfn);
7349
7350         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
7351                      (vcpu->arch.apf.gfns[key] != gfn &&
7352                       vcpu->arch.apf.gfns[key] != ~0); i++)
7353                 key = kvm_async_pf_next_probe(key);
7354
7355         return key;
7356 }
7357
7358 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7359 {
7360         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
7361 }
7362
7363 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7364 {
7365         u32 i, j, k;
7366
7367         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
7368         while (true) {
7369                 vcpu->arch.apf.gfns[i] = ~0;
7370                 do {
7371                         j = kvm_async_pf_next_probe(j);
7372                         if (vcpu->arch.apf.gfns[j] == ~0)
7373                                 return;
7374                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
7375                         /*
7376                          * k lies cyclically in ]i,j]
7377                          * |    i.k.j |
7378                          * |....j i.k.| or  |.k..j i...|
7379                          */
7380                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
7381                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
7382                 i = j;
7383         }
7384 }
7385
7386 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
7387 {
7388
7389         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
7390                                       sizeof(val));
7391 }
7392
7393 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
7394                                      struct kvm_async_pf *work)
7395 {
7396         struct x86_exception fault;
7397
7398         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
7399         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
7400
7401         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
7402             (vcpu->arch.apf.send_user_only &&
7403              kvm_x86_ops->get_cpl(vcpu) == 0))
7404                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
7405         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
7406                 fault.vector = PF_VECTOR;
7407                 fault.error_code_valid = true;
7408                 fault.error_code = 0;
7409                 fault.nested_page_fault = false;
7410                 fault.address = work->arch.token;
7411                 kvm_inject_page_fault(vcpu, &fault);
7412         }
7413 }
7414
7415 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
7416                                  struct kvm_async_pf *work)
7417 {
7418         struct x86_exception fault;
7419
7420         trace_kvm_async_pf_ready(work->arch.token, work->gva);
7421         if (work->wakeup_all)
7422                 work->arch.token = ~0; /* broadcast wakeup */
7423         else
7424                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
7425
7426         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
7427             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
7428                 fault.vector = PF_VECTOR;
7429                 fault.error_code_valid = true;
7430                 fault.error_code = 0;
7431                 fault.nested_page_fault = false;
7432                 fault.address = work->arch.token;
7433                 kvm_inject_page_fault(vcpu, &fault);
7434         }
7435         vcpu->arch.apf.halted = false;
7436         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7437 }
7438
7439 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
7440 {
7441         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
7442                 return true;
7443         else
7444                 return !kvm_event_needs_reinjection(vcpu) &&
7445                         kvm_x86_ops->interrupt_allowed(vcpu);
7446 }
7447
7448 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
7449 {
7450         atomic_inc(&kvm->arch.noncoherent_dma_count);
7451 }
7452 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
7453
7454 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
7455 {
7456         atomic_dec(&kvm->arch.noncoherent_dma_count);
7457 }
7458 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
7459
7460 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
7461 {
7462         return atomic_read(&kvm->arch.noncoherent_dma_count);
7463 }
7464 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
7465
7466 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
7467 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
7468 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
7469 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
7470 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
7471 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
7472 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
7473 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
7474 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
7475 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
7476 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
7477 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
7478 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);