arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *   Yaniv Kamay  <yaniv@qumranet.com>
  15  *   Amit Shah    <amit.shah@qumranet.com>
  16  *   Ben-Ami Yassour <benami@il.ibm.com>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "mmu.h"
  22 #include "i8254.h"
  23 #include "tss.h"
  24 #include "kvm_cache_regs.h"
  25 #include "x86.h"
  26 #include "cpuid.h"
  27 #include "pmu.h"
  28 #include "hyperv.h"
  29
  30 #include <linux/clocksource.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/kvm.h>
  33 #include <linux/fs.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/export.h>
  36 #include <linux/moduleparam.h>
  37 #include <linux/mman.h>
  38 #include <linux/highmem.h>
  39 #include <linux/iommu.h>
  40 #include <linux/intel-iommu.h>
  41 #include <linux/cpufreq.h>
  42 #include <linux/user-return-notifier.h>
  43 #include <linux/srcu.h>
  44 #include <linux/slab.h>
  45 #include <linux/perf_event.h>
  46 #include <linux/uaccess.h>
  47 #include <linux/hash.h>
  48 #include <linux/pci.h>
  49 #include <linux/timekeeper_internal.h>
  50 #include <linux/pvclock_gtod.h>
  51 #include <linux/kvm_irqfd.h>
  52 #include <linux/irqbypass.h>
  53 #include <linux/sched/stat.h>
  54 #include <linux/sched/isolation.h>
  55 #include <linux/mem_encrypt.h>
  56
  57 #include <trace/events/kvm.h>
  58
  59 #include <asm/debugreg.h>
  60 #include <asm/msr.h>
  61 #include <asm/desc.h>
  62 #include <asm/mce.h>
  63 #include <linux/kernel_stat.h>
  64 #include <asm/fpu/internal.h> /* Ugh! */
  65 #include <asm/pvclock.h>
  66 #include <asm/div64.h>
  67 #include <asm/irq_remapping.h>
  68 #include <asm/mshyperv.h>
  69 #include <asm/hypervisor.h>
  70 #include <asm/intel_pt.h>
  71 #include <clocksource/hyperv_timer.h>
  72
  73 #define CREATE_TRACE_POINTS
  74 #include "trace.h"
  75
  76 #define MAX_IO_MSRS 256
  77 #define KVM_MAX_MCE_BANKS 32
  78 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  79 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  80
  81 #define emul_to_vcpu(ctxt) \
  82         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  83
  84 /* EFER defaults:
  85  * - enable syscall per default because its emulated by KVM
  86  * - enable LME and LMA per default on 64 bit KVM
  87  */
  88 #ifdef CONFIG_X86_64
  89 static
  90 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  91 #else
  92 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  93 #endif
  94
  95 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  96 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  97
  98 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
  99                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 100
 101 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 102 static void process_nmi(struct kvm_vcpu *vcpu);
 103 static void enter_smm(struct kvm_vcpu *vcpu);
 104 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 105 static void store_regs(struct kvm_vcpu *vcpu);
 106 static int sync_regs(struct kvm_vcpu *vcpu);
 107
 108 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
 109 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 110
 111 static bool __read_mostly ignore_msrs = 0;
 112 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 113
 114 static bool __read_mostly report_ignored_msrs = true;
 115 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 116
 117 unsigned int min_timer_period_us = 200;
 118 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 119
 120 static bool __read_mostly kvmclock_periodic_sync = true;
 121 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 122
 123 bool __read_mostly kvm_has_tsc_control;
 124 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 125 u32  __read_mostly kvm_max_guest_tsc_khz;
 126 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 127 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 128 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 129 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 130 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 131 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 132 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 133
 134 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 135 static u32 __read_mostly tsc_tolerance_ppm = 250;
 136 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 137
 138 /*
 139  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 140  * adaptive tuning starting from default advancment of 1000ns.  '0' disables
 141  * advancement entirely.  Any other value is used as-is and disables adaptive
 142  * tuning, i.e. allows priveleged userspace to set an exact advancement time.
 143  */
 144 static int __read_mostly lapic_timer_advance_ns = -1;
 145 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 146
 147 static bool __read_mostly vector_hashing = true;
 148 module_param(vector_hashing, bool, S_IRUGO);
 149
 150 bool __read_mostly enable_vmware_backdoor = false;
 151 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 152 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 153
 154 static bool __read_mostly force_emulation_prefix = false;
 155 module_param(force_emulation_prefix, bool, S_IRUGO);
 156
 157 int __read_mostly pi_inject_timer = -1;
 158 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
 159
 160 #define KVM_NR_SHARED_MSRS 16
 161
 162 struct kvm_shared_msrs_global {
 163         int nr;
 164         u32 msrs[KVM_NR_SHARED_MSRS];
 165 };
 166
 167 struct kvm_shared_msrs {
 168         struct user_return_notifier urn;
 169         bool registered;
 170         struct kvm_shared_msr_values {
 171                 u64 host;
 172                 u64 curr;
 173         } values[KVM_NR_SHARED_MSRS];
 174 };
 175
 176 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 177 static struct kvm_shared_msrs __percpu *shared_msrs;
 178
 179 struct kvm_stats_debugfs_item debugfs_entries[] = {
 180         { "pf_fixed", VCPU_STAT(pf_fixed) },
 181         { "pf_guest", VCPU_STAT(pf_guest) },
 182         { "tlb_flush", VCPU_STAT(tlb_flush) },
 183         { "invlpg", VCPU_STAT(invlpg) },
 184         { "exits", VCPU_STAT(exits) },
 185         { "io_exits", VCPU_STAT(io_exits) },
 186         { "mmio_exits", VCPU_STAT(mmio_exits) },
 187         { "signal_exits", VCPU_STAT(signal_exits) },
 188         { "irq_window", VCPU_STAT(irq_window_exits) },
 189         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 190         { "halt_exits", VCPU_STAT(halt_exits) },
 191         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 192         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 193         { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
 194         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 195         { "hypercalls", VCPU_STAT(hypercalls) },
 196         { "request_irq", VCPU_STAT(request_irq_exits) },
 197         { "irq_exits", VCPU_STAT(irq_exits) },
 198         { "host_state_reload", VCPU_STAT(host_state_reload) },
 199         { "fpu_reload", VCPU_STAT(fpu_reload) },
 200         { "insn_emulation", VCPU_STAT(insn_emulation) },
 201         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 202         { "irq_injections", VCPU_STAT(irq_injections) },
 203         { "nmi_injections", VCPU_STAT(nmi_injections) },
 204         { "req_event", VCPU_STAT(req_event) },
 205         { "l1d_flush", VCPU_STAT(l1d_flush) },
 206         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 207         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 208         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 209         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 210         { "mmu_flooded", VM_STAT(mmu_flooded) },
 211         { "mmu_recycled", VM_STAT(mmu_recycled) },
 212         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 213         { "mmu_unsync", VM_STAT(mmu_unsync) },
 214         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 215         { "largepages", VM_STAT(lpages) },
 216         { "max_mmu_page_hash_collisions",
 217                 VM_STAT(max_mmu_page_hash_collisions) },
 218         { NULL }
 219 };
 220
 221 u64 __read_mostly host_xcr0;
 222
 223 struct kmem_cache *x86_fpu_cache;
 224 EXPORT_SYMBOL_GPL(x86_fpu_cache);
 225
 226 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 227
 228 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 229 {
 230         int i;
 231         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 232                 vcpu->arch.apf.gfns[i] = ~0;
 233 }
 234
 235 static void kvm_on_user_return(struct user_return_notifier *urn)
 236 {
 237         unsigned slot;
 238         struct kvm_shared_msrs *locals
 239                 = container_of(urn, struct kvm_shared_msrs, urn);
 240         struct kvm_shared_msr_values *values;
 241         unsigned long flags;
 242
 243         /*
 244          * Disabling irqs at this point since the following code could be
 245          * interrupted and executed through kvm_arch_hardware_disable()
 246          */
 247         local_irq_save(flags);
 248         if (locals->registered) {
 249                 locals->registered = false;
 250                 user_return_notifier_unregister(urn);
 251         }
 252         local_irq_restore(flags);
 253         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 254                 values = &locals->values[slot];
 255                 if (values->host != values->curr) {
 256                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 257                         values->curr = values->host;
 258                 }
 259         }
 260 }
 261
 262 static void shared_msr_update(unsigned slot, u32 msr)
 263 {
 264         u64 value;
 265         unsigned int cpu = smp_processor_id();
 266         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 267
 268         /* only read, and nobody should modify it at this time,
 269          * so don't need lock */
 270         if (slot >= shared_msrs_global.nr) {
 271                 printk(KERN_ERR "kvm: invalid MSR slot!");
 272                 return;
 273         }
 274         rdmsrl_safe(msr, &value);
 275         smsr->values[slot].host = value;
 276         smsr->values[slot].curr = value;
 277 }
 278
 279 void kvm_define_shared_msr(unsigned slot, u32 msr)
 280 {
 281         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 282         shared_msrs_global.msrs[slot] = msr;
 283         if (slot >= shared_msrs_global.nr)
 284                 shared_msrs_global.nr = slot + 1;
 285 }
 286 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 287
 288 static void kvm_shared_msr_cpu_online(void)
 289 {
 290         unsigned i;
 291
 292         for (i = 0; i < shared_msrs_global.nr; ++i)
 293                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 294 }
 295
 296 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 297 {
 298         unsigned int cpu = smp_processor_id();
 299         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 300         int err;
 301
 302         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 303                 return 0;
 304         smsr->values[slot].curr = value;
 305         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 306         if (err)
 307                 return 1;
 308
 309         if (!smsr->registered) {
 310                 smsr->urn.on_user_return = kvm_on_user_return;
 311                 user_return_notifier_register(&smsr->urn);
 312                 smsr->registered = true;
 313         }
 314         return 0;
 315 }
 316 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 317
 318 static void drop_user_return_notifiers(void)
 319 {
 320         unsigned int cpu = smp_processor_id();
 321         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 322
 323         if (smsr->registered)
 324                 kvm_on_user_return(&smsr->urn);
 325 }
 326
 327 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 328 {
 329         return vcpu->arch.apic_base;
 330 }
 331 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 332
 333 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 334 {
 335         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 336 }
 337 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 338
 339 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 340 {
 341         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 342         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 343         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) | 0x2ff |
 344                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 345
 346         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 347                 return 1;
 348         if (!msr_info->host_initiated) {
 349                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 350                         return 1;
 351                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 352                         return 1;
 353         }
 354
 355         kvm_lapic_set_base(vcpu, msr_info->data);
 356         return 0;
 357 }
 358 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 359
 360 asmlinkage __visible void kvm_spurious_fault(void)
 361 {
 362         /* Fault while not rebooting.  We want the trace. */
 363         BUG();
 364 }
 365 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 366
 367 #define EXCPT_BENIGN            0
 368 #define EXCPT_CONTRIBUTORY      1
 369 #define EXCPT_PF                2
 370
 371 static int exception_class(int vector)
 372 {
 373         switch (vector) {
 374         case PF_VECTOR:
 375                 return EXCPT_PF;
 376         case DE_VECTOR:
 377         case TS_VECTOR:
 378         case NP_VECTOR:
 379         case SS_VECTOR:
 380         case GP_VECTOR:
 381                 return EXCPT_CONTRIBUTORY;
 382         default:
 383                 break;
 384         }
 385         return EXCPT_BENIGN;
 386 }
 387
 388 #define EXCPT_FAULT             0
 389 #define EXCPT_TRAP              1
 390 #define EXCPT_ABORT             2
 391 #define EXCPT_INTERRUPT         3
 392
 393 static int exception_type(int vector)
 394 {
 395         unsigned int mask;
 396
 397         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 398                 return EXCPT_INTERRUPT;
 399
 400         mask = 1 << vector;
 401
 402         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 403         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 404                 return EXCPT_TRAP;
 405
 406         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 407                 return EXCPT_ABORT;
 408
 409         /* Reserved exceptions will result in fault */
 410         return EXCPT_FAULT;
 411 }
 412
 413 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 414 {
 415         unsigned nr = vcpu->arch.exception.nr;
 416         bool has_payload = vcpu->arch.exception.has_payload;
 417         unsigned long payload = vcpu->arch.exception.payload;
 418
 419         if (!has_payload)
 420                 return;
 421
 422         switch (nr) {
 423         case DB_VECTOR:
 424                 /*
 425                  * "Certain debug exceptions may clear bit 0-3.  The
 426                  * remaining contents of the DR6 register are never
 427                  * cleared by the processor".
 428                  */
 429                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 430                 /*
 431                  * DR6.RTM is set by all #DB exceptions that don't clear it.
 432                  */
 433                 vcpu->arch.dr6 |= DR6_RTM;
 434                 vcpu->arch.dr6 |= payload;
 435                 /*
 436                  * Bit 16 should be set in the payload whenever the #DB
 437                  * exception should clear DR6.RTM. This makes the payload
 438                  * compatible with the pending debug exceptions under VMX.
 439                  * Though not currently documented in the SDM, this also
 440                  * makes the payload compatible with the exit qualification
 441                  * for #DB exceptions under VMX.
 442                  */
 443                 vcpu->arch.dr6 ^= payload & DR6_RTM;
 444                 break;
 445         case PF_VECTOR:
 446                 vcpu->arch.cr2 = payload;
 447                 break;
 448         }
 449
 450         vcpu->arch.exception.has_payload = false;
 451         vcpu->arch.exception.payload = 0;
 452 }
 453 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 454
 455 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 456                 unsigned nr, bool has_error, u32 error_code,
 457                 bool has_payload, unsigned long payload, bool reinject)
 458 {
 459         u32 prev_nr;
 460         int class1, class2;
 461
 462         kvm_make_request(KVM_REQ_EVENT, vcpu);
 463
 464         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 465         queue:
 466                 if (has_error && !is_protmode(vcpu))
 467                         has_error = false;
 468                 if (reinject) {
 469                         /*
 470                          * On vmentry, vcpu->arch.exception.pending is only
 471                          * true if an event injection was blocked by
 472                          * nested_run_pending.  In that case, however,
 473                          * vcpu_enter_guest requests an immediate exit,
 474                          * and the guest shouldn't proceed far enough to
 475                          * need reinjection.
 476                          */
 477                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 478                         vcpu->arch.exception.injected = true;
 479                         if (WARN_ON_ONCE(has_payload)) {
 480                                 /*
 481                                  * A reinjected event has already
 482                                  * delivered its payload.
 483                                  */
 484                                 has_payload = false;
 485                                 payload = 0;
 486                         }
 487                 } else {
 488                         vcpu->arch.exception.pending = true;
 489                         vcpu->arch.exception.injected = false;
 490                 }
 491                 vcpu->arch.exception.has_error_code = has_error;
 492                 vcpu->arch.exception.nr = nr;
 493                 vcpu->arch.exception.error_code = error_code;
 494                 vcpu->arch.exception.has_payload = has_payload;
 495                 vcpu->arch.exception.payload = payload;
 496                 /*
 497                  * In guest mode, payload delivery should be deferred,
 498                  * so that the L1 hypervisor can intercept #PF before
 499                  * CR2 is modified (or intercept #DB before DR6 is
 500                  * modified under nVMX).  However, for ABI
 501                  * compatibility with KVM_GET_VCPU_EVENTS and
 502                  * KVM_SET_VCPU_EVENTS, we can't delay payload
 503                  * delivery unless userspace has enabled this
 504                  * functionality via the per-VM capability,
 505                  * KVM_CAP_EXCEPTION_PAYLOAD.
 506                  */
 507                 if (!vcpu->kvm->arch.exception_payload_enabled ||
 508                     !is_guest_mode(vcpu))
 509                         kvm_deliver_exception_payload(vcpu);
 510                 return;
 511         }
 512
 513         /* to check exception */
 514         prev_nr = vcpu->arch.exception.nr;
 515         if (prev_nr == DF_VECTOR) {
 516                 /* triple fault -> shutdown */
 517                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 518                 return;
 519         }
 520         class1 = exception_class(prev_nr);
 521         class2 = exception_class(nr);
 522         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 523                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 524                 /*
 525                  * Generate double fault per SDM Table 5-5.  Set
 526                  * exception.pending = true so that the double fault
 527                  * can trigger a nested vmexit.
 528                  */
 529                 vcpu->arch.exception.pending = true;
 530                 vcpu->arch.exception.injected = false;
 531                 vcpu->arch.exception.has_error_code = true;
 532                 vcpu->arch.exception.nr = DF_VECTOR;
 533                 vcpu->arch.exception.error_code = 0;
 534                 vcpu->arch.exception.has_payload = false;
 535                 vcpu->arch.exception.payload = 0;
 536         } else
 537                 /* replace previous exception with a new one in a hope
 538                    that instruction re-execution will regenerate lost
 539                    exception */
 540                 goto queue;
 541 }
 542
 543 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 544 {
 545         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 546 }
 547 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 548
 549 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 550 {
 551         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 552 }
 553 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 554
 555 static void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 556                                   unsigned long payload)
 557 {
 558         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 559 }
 560
 561 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 562                                     u32 error_code, unsigned long payload)
 563 {
 564         kvm_multiple_exception(vcpu, nr, true, error_code,
 565                                true, payload, false);
 566 }
 567
 568 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 569 {
 570         if (err)
 571                 kvm_inject_gp(vcpu, 0);
 572         else
 573                 return kvm_skip_emulated_instruction(vcpu);
 574
 575         return 1;
 576 }
 577 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 578
 579 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 580 {
 581         ++vcpu->stat.pf_guest;
 582         vcpu->arch.exception.nested_apf =
 583                 is_guest_mode(vcpu) && fault->async_page_fault;
 584         if (vcpu->arch.exception.nested_apf) {
 585                 vcpu->arch.apf.nested_apf_token = fault->address;
 586                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 587         } else {
 588                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 589                                         fault->address);
 590         }
 591 }
 592 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 593
 594 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 595 {
 596         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 597                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 598         else
 599                 vcpu->arch.mmu->inject_page_fault(vcpu, fault);
 600
 601         return fault->nested_page_fault;
 602 }
 603
 604 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 605 {
 606         atomic_inc(&vcpu->arch.nmi_queued);
 607         kvm_make_request(KVM_REQ_NMI, vcpu);
 608 }
 609 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 610
 611 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 612 {
 613         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 614 }
 615 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 616
 617 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 618 {
 619         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 620 }
 621 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 622
 623 /*
 624  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 625  * a #GP and return false.
 626  */
 627 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 628 {
 629         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 630                 return true;
 631         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 632         return false;
 633 }
 634 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 635
 636 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 637 {
 638         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 639                 return true;
 640
 641         kvm_queue_exception(vcpu, UD_VECTOR);
 642         return false;
 643 }
 644 EXPORT_SYMBOL_GPL(kvm_require_dr);
 645
 646 /*
 647  * This function will be used to read from the physical memory of the currently
 648  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 649  * can read from guest physical or from the guest's guest physical memory.
 650  */
 651 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 652                             gfn_t ngfn, void *data, int offset, int len,
 653                             u32 access)
 654 {
 655         struct x86_exception exception;
 656         gfn_t real_gfn;
 657         gpa_t ngpa;
 658
 659         ngpa     = gfn_to_gpa(ngfn);
 660         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 661         if (real_gfn == UNMAPPED_GVA)
 662                 return -EFAULT;
 663
 664         real_gfn = gpa_to_gfn(real_gfn);
 665
 666         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 667 }
 668 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 669
 670 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 671                                void *data, int offset, int len, u32 access)
 672 {
 673         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 674                                        data, offset, len, access);
 675 }
 676
 677 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
 678 {
 679         return rsvd_bits(cpuid_maxphyaddr(vcpu), 63) | rsvd_bits(5, 8) |
 680                rsvd_bits(1, 2);
 681 }
 682
 683 /*
 684  * Load the pae pdptrs.  Return 1 if they are all valid, 0 otherwise.
 685  */
 686 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 687 {
 688         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 689         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 690         int i;
 691         int ret;
 692         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 693
 694         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 695                                       offset * sizeof(u64), sizeof(pdpte),
 696                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 697         if (ret < 0) {
 698                 ret = 0;
 699                 goto out;
 700         }
 701         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 702                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 703                     (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
 704                         ret = 0;
 705                         goto out;
 706                 }
 707         }
 708         ret = 1;
 709
 710         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 711         __set_bit(VCPU_EXREG_PDPTR,
 712                   (unsigned long *)&vcpu->arch.regs_avail);
 713         __set_bit(VCPU_EXREG_PDPTR,
 714                   (unsigned long *)&vcpu->arch.regs_dirty);
 715 out:
 716
 717         return ret;
 718 }
 719 EXPORT_SYMBOL_GPL(load_pdptrs);
 720
 721 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 722 {
 723         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 724         bool changed = true;
 725         int offset;
 726         gfn_t gfn;
 727         int r;
 728
 729         if (!is_pae_paging(vcpu))
 730                 return false;
 731
 732         if (!test_bit(VCPU_EXREG_PDPTR,
 733                       (unsigned long *)&vcpu->arch.regs_avail))
 734                 return true;
 735
 736         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 737         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 738         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 739                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 740         if (r < 0)
 741                 goto out;
 742         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 743 out:
 744
 745         return changed;
 746 }
 747 EXPORT_SYMBOL_GPL(pdptrs_changed);
 748
 749 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 750 {
 751         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 752         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 753
 754         cr0 |= X86_CR0_ET;
 755
 756 #ifdef CONFIG_X86_64
 757         if (cr0 & 0xffffffff00000000UL)
 758                 return 1;
 759 #endif
 760
 761         cr0 &= ~CR0_RESERVED_BITS;
 762
 763         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 764                 return 1;
 765
 766         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 767                 return 1;
 768
 769         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 770 #ifdef CONFIG_X86_64
 771                 if ((vcpu->arch.efer & EFER_LME)) {
 772                         int cs_db, cs_l;
 773
 774                         if (!is_pae(vcpu))
 775                                 return 1;
 776                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 777                         if (cs_l)
 778                                 return 1;
 779                 } else
 780 #endif
 781                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 782                                                  kvm_read_cr3(vcpu)))
 783                         return 1;
 784         }
 785
 786         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 787                 return 1;
 788
 789         kvm_x86_ops->set_cr0(vcpu, cr0);
 790
 791         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 792                 kvm_clear_async_pf_completion_queue(vcpu);
 793                 kvm_async_pf_hash_reset(vcpu);
 794         }
 795
 796         if ((cr0 ^ old_cr0) & update_bits)
 797                 kvm_mmu_reset_context(vcpu);
 798
 799         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 800             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 801             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 802                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 803
 804         return 0;
 805 }
 806 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 807
 808 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 809 {
 810         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 811 }
 812 EXPORT_SYMBOL_GPL(kvm_lmsw);
 813
 814 void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 815 {
 816         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 817                         !vcpu->guest_xcr0_loaded) {
 818                 /* kvm_set_xcr() also depends on this */
 819                 if (vcpu->arch.xcr0 != host_xcr0)
 820                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 821                 vcpu->guest_xcr0_loaded = 1;
 822         }
 823 }
 824 EXPORT_SYMBOL_GPL(kvm_load_guest_xcr0);
 825
 826 void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 827 {
 828         if (vcpu->guest_xcr0_loaded) {
 829                 if (vcpu->arch.xcr0 != host_xcr0)
 830                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 831                 vcpu->guest_xcr0_loaded = 0;
 832         }
 833 }
 834 EXPORT_SYMBOL_GPL(kvm_put_guest_xcr0);
 835
 836 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 837 {
 838         u64 xcr0 = xcr;
 839         u64 old_xcr0 = vcpu->arch.xcr0;
 840         u64 valid_bits;
 841
 842         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 843         if (index != XCR_XFEATURE_ENABLED_MASK)
 844                 return 1;
 845         if (!(xcr0 & XFEATURE_MASK_FP))
 846                 return 1;
 847         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 848                 return 1;
 849
 850         /*
 851          * Do not allow the guest to set bits that we do not support
 852          * saving.  However, xcr0 bit 0 is always set, even if the
 853          * emulated CPU does not support XSAVE (see fx_init).
 854          */
 855         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 856         if (xcr0 & ~valid_bits)
 857                 return 1;
 858
 859         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 860             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 861                 return 1;
 862
 863         if (xcr0 & XFEATURE_MASK_AVX512) {
 864                 if (!(xcr0 & XFEATURE_MASK_YMM))
 865                         return 1;
 866                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 867                         return 1;
 868         }
 869         vcpu->arch.xcr0 = xcr0;
 870
 871         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 872                 kvm_update_cpuid(vcpu);
 873         return 0;
 874 }
 875
 876 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 877 {
 878         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 879             __kvm_set_xcr(vcpu, index, xcr)) {
 880                 kvm_inject_gp(vcpu, 0);
 881                 return 1;
 882         }
 883         return 0;
 884 }
 885 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 886
 887 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 888 {
 889         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 890         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 891                                    X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
 892
 893         if (cr4 & CR4_RESERVED_BITS)
 894                 return 1;
 895
 896         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) && (cr4 & X86_CR4_OSXSAVE))
 897                 return 1;
 898
 899         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMEP) && (cr4 & X86_CR4_SMEP))
 900                 return 1;
 901
 902         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMAP) && (cr4 & X86_CR4_SMAP))
 903                 return 1;
 904
 905         if (!guest_cpuid_has(vcpu, X86_FEATURE_FSGSBASE) && (cr4 & X86_CR4_FSGSBASE))
 906                 return 1;
 907
 908         if (!guest_cpuid_has(vcpu, X86_FEATURE_PKU) && (cr4 & X86_CR4_PKE))
 909                 return 1;
 910
 911         if (!guest_cpuid_has(vcpu, X86_FEATURE_LA57) && (cr4 & X86_CR4_LA57))
 912                 return 1;
 913
 914         if (!guest_cpuid_has(vcpu, X86_FEATURE_UMIP) && (cr4 & X86_CR4_UMIP))
 915                 return 1;
 916
 917         if (is_long_mode(vcpu)) {
 918                 if (!(cr4 & X86_CR4_PAE))
 919                         return 1;
 920         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 921                    && ((cr4 ^ old_cr4) & pdptr_bits)
 922                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 923                                    kvm_read_cr3(vcpu)))
 924                 return 1;
 925
 926         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 927                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
 928                         return 1;
 929
 930                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 931                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 932                         return 1;
 933         }
 934
 935         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 936                 return 1;
 937
 938         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 939             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 940                 kvm_mmu_reset_context(vcpu);
 941
 942         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
 943                 kvm_update_cpuid(vcpu);
 944
 945         return 0;
 946 }
 947 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 948
 949 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 950 {
 951         bool skip_tlb_flush = false;
 952 #ifdef CONFIG_X86_64
 953         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
 954
 955         if (pcid_enabled) {
 956                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
 957                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
 958         }
 959 #endif
 960
 961         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 962                 if (!skip_tlb_flush) {
 963                         kvm_mmu_sync_roots(vcpu);
 964                         kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 965                 }
 966                 return 0;
 967         }
 968
 969         if (is_long_mode(vcpu) &&
 970             (cr3 & rsvd_bits(cpuid_maxphyaddr(vcpu), 63)))
 971                 return 1;
 972         else if (is_pae_paging(vcpu) &&
 973                  !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 974                 return 1;
 975
 976         kvm_mmu_new_cr3(vcpu, cr3, skip_tlb_flush);
 977         vcpu->arch.cr3 = cr3;
 978         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 979
 980         return 0;
 981 }
 982 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 983
 984 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 985 {
 986         if (cr8 & CR8_RESERVED_BITS)
 987                 return 1;
 988         if (lapic_in_kernel(vcpu))
 989                 kvm_lapic_set_tpr(vcpu, cr8);
 990         else
 991                 vcpu->arch.cr8 = cr8;
 992         return 0;
 993 }
 994 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 995
 996 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 997 {
 998         if (lapic_in_kernel(vcpu))
 999                 return kvm_lapic_get_cr8(vcpu);
1000         else
1001                 return vcpu->arch.cr8;
1002 }
1003 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1004
1005 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1006 {
1007         int i;
1008
1009         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1010                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1011                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1012                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
1013         }
1014 }
1015
1016 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
1017 {
1018         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1019                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
1020 }
1021
1022 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
1023 {
1024         unsigned long dr7;
1025
1026         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1027                 dr7 = vcpu->arch.guest_debug_dr7;
1028         else
1029                 dr7 = vcpu->arch.dr7;
1030         kvm_x86_ops->set_dr7(vcpu, dr7);
1031         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1032         if (dr7 & DR7_BP_EN_MASK)
1033                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1034 }
1035
1036 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1037 {
1038         u64 fixed = DR6_FIXED_1;
1039
1040         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1041                 fixed |= DR6_RTM;
1042         return fixed;
1043 }
1044
1045 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1046 {
1047         switch (dr) {
1048         case 0 ... 3:
1049                 vcpu->arch.db[dr] = val;
1050                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1051                         vcpu->arch.eff_db[dr] = val;
1052                 break;
1053         case 4:
1054                 /* fall through */
1055         case 6:
1056                 if (val & 0xffffffff00000000ULL)
1057                         return -1; /* #GP */
1058                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1059                 kvm_update_dr6(vcpu);
1060                 break;
1061         case 5:
1062                 /* fall through */
1063         default: /* 7 */
1064                 if (val & 0xffffffff00000000ULL)
1065                         return -1; /* #GP */
1066                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1067                 kvm_update_dr7(vcpu);
1068                 break;
1069         }
1070
1071         return 0;
1072 }
1073
1074 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1075 {
1076         if (__kvm_set_dr(vcpu, dr, val)) {
1077                 kvm_inject_gp(vcpu, 0);
1078                 return 1;
1079         }
1080         return 0;
1081 }
1082 EXPORT_SYMBOL_GPL(kvm_set_dr);
1083
1084 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1085 {
1086         switch (dr) {
1087         case 0 ... 3:
1088                 *val = vcpu->arch.db[dr];
1089                 break;
1090         case 4:
1091                 /* fall through */
1092         case 6:
1093                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1094                         *val = vcpu->arch.dr6;
1095                 else
1096                         *val = kvm_x86_ops->get_dr6(vcpu);
1097                 break;
1098         case 5:
1099                 /* fall through */
1100         default: /* 7 */
1101                 *val = vcpu->arch.dr7;
1102                 break;
1103         }
1104         return 0;
1105 }
1106 EXPORT_SYMBOL_GPL(kvm_get_dr);
1107
1108 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
1109 {
1110         u32 ecx = kvm_rcx_read(vcpu);
1111         u64 data;
1112         int err;
1113
1114         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
1115         if (err)
1116                 return err;
1117         kvm_rax_write(vcpu, (u32)data);
1118         kvm_rdx_write(vcpu, data >> 32);
1119         return err;
1120 }
1121 EXPORT_SYMBOL_GPL(kvm_rdpmc);
1122
1123 /*
1124  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1125  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1126  *
1127  * This list is modified at module load time to reflect the
1128  * capabilities of the host cpu. This capabilities test skips MSRs that are
1129  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
1130  * may depend on host virtualization features rather than host cpu features.
1131  */
1132
1133 static u32 msrs_to_save[] = {
1134         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1135         MSR_STAR,
1136 #ifdef CONFIG_X86_64
1137         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1138 #endif
1139         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1140         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1141         MSR_IA32_SPEC_CTRL,
1142         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1143         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1144         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1145         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1146         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1147         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1148         MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1149         MSR_ARCH_PERFMON_FIXED_CTR0 + 2, MSR_ARCH_PERFMON_FIXED_CTR0 + 3,
1150         MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1151         MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1152         MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1153         MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1154         MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1155         MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1156         MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1157         MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1158         MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1159         MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1160         MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1161         MSR_ARCH_PERFMON_PERFCTR0 + 18, MSR_ARCH_PERFMON_PERFCTR0 + 19,
1162         MSR_ARCH_PERFMON_PERFCTR0 + 20, MSR_ARCH_PERFMON_PERFCTR0 + 21,
1163         MSR_ARCH_PERFMON_PERFCTR0 + 22, MSR_ARCH_PERFMON_PERFCTR0 + 23,
1164         MSR_ARCH_PERFMON_PERFCTR0 + 24, MSR_ARCH_PERFMON_PERFCTR0 + 25,
1165         MSR_ARCH_PERFMON_PERFCTR0 + 26, MSR_ARCH_PERFMON_PERFCTR0 + 27,
1166         MSR_ARCH_PERFMON_PERFCTR0 + 28, MSR_ARCH_PERFMON_PERFCTR0 + 29,
1167         MSR_ARCH_PERFMON_PERFCTR0 + 30, MSR_ARCH_PERFMON_PERFCTR0 + 31,
1168         MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1169         MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1170         MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1171         MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1172         MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1173         MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1174         MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1175         MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1176         MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1177         MSR_ARCH_PERFMON_EVENTSEL0 + 18, MSR_ARCH_PERFMON_EVENTSEL0 + 19,
1178         MSR_ARCH_PERFMON_EVENTSEL0 + 20, MSR_ARCH_PERFMON_EVENTSEL0 + 21,
1179         MSR_ARCH_PERFMON_EVENTSEL0 + 22, MSR_ARCH_PERFMON_EVENTSEL0 + 23,
1180         MSR_ARCH_PERFMON_EVENTSEL0 + 24, MSR_ARCH_PERFMON_EVENTSEL0 + 25,
1181         MSR_ARCH_PERFMON_EVENTSEL0 + 26, MSR_ARCH_PERFMON_EVENTSEL0 + 27,
1182         MSR_ARCH_PERFMON_EVENTSEL0 + 28, MSR_ARCH_PERFMON_EVENTSEL0 + 29,
1183         MSR_ARCH_PERFMON_EVENTSEL0 + 30, MSR_ARCH_PERFMON_EVENTSEL0 + 31,
1184 };
1185
1186 static unsigned num_msrs_to_save;
1187
1188 static u32 emulated_msrs[] = {
1189         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1190         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1191         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1192         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1193         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1194         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1195         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1196         HV_X64_MSR_RESET,
1197         HV_X64_MSR_VP_INDEX,
1198         HV_X64_MSR_VP_RUNTIME,
1199         HV_X64_MSR_SCONTROL,
1200         HV_X64_MSR_STIMER0_CONFIG,
1201         HV_X64_MSR_VP_ASSIST_PAGE,
1202         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1203         HV_X64_MSR_TSC_EMULATION_STATUS,
1204
1205         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1206         MSR_KVM_PV_EOI_EN,
1207
1208         MSR_IA32_TSC_ADJUST,
1209         MSR_IA32_TSCDEADLINE,
1210         MSR_IA32_ARCH_CAPABILITIES,
1211         MSR_IA32_MISC_ENABLE,
1212         MSR_IA32_MCG_STATUS,
1213         MSR_IA32_MCG_CTL,
1214         MSR_IA32_MCG_EXT_CTL,
1215         MSR_IA32_SMBASE,
1216         MSR_SMI_COUNT,
1217         MSR_PLATFORM_INFO,
1218         MSR_MISC_FEATURES_ENABLES,
1219         MSR_AMD64_VIRT_SPEC_CTRL,
1220         MSR_IA32_POWER_CTL,
1221
1222         /*
1223          * The following list leaves out MSRs whose values are determined
1224          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1225          * We always support the "true" VMX control MSRs, even if the host
1226          * processor does not, so I am putting these registers here rather
1227          * than in msrs_to_save.
1228          */
1229         MSR_IA32_VMX_BASIC,
1230         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1231         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1232         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1233         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1234         MSR_IA32_VMX_MISC,
1235         MSR_IA32_VMX_CR0_FIXED0,
1236         MSR_IA32_VMX_CR4_FIXED0,
1237         MSR_IA32_VMX_VMCS_ENUM,
1238         MSR_IA32_VMX_PROCBASED_CTLS2,
1239         MSR_IA32_VMX_EPT_VPID_CAP,
1240         MSR_IA32_VMX_VMFUNC,
1241
1242         MSR_K7_HWCR,
1243         MSR_KVM_POLL_CONTROL,
1244 };
1245
1246 static unsigned num_emulated_msrs;
1247
1248 /*
1249  * List of msr numbers which are used to expose MSR-based features that
1250  * can be used by a hypervisor to validate requested CPU features.
1251  */
1252 static u32 msr_based_features[] = {
1253         MSR_IA32_VMX_BASIC,
1254         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1255         MSR_IA32_VMX_PINBASED_CTLS,
1256         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1257         MSR_IA32_VMX_PROCBASED_CTLS,
1258         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1259         MSR_IA32_VMX_EXIT_CTLS,
1260         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1261         MSR_IA32_VMX_ENTRY_CTLS,
1262         MSR_IA32_VMX_MISC,
1263         MSR_IA32_VMX_CR0_FIXED0,
1264         MSR_IA32_VMX_CR0_FIXED1,
1265         MSR_IA32_VMX_CR4_FIXED0,
1266         MSR_IA32_VMX_CR4_FIXED1,
1267         MSR_IA32_VMX_VMCS_ENUM,
1268         MSR_IA32_VMX_PROCBASED_CTLS2,
1269         MSR_IA32_VMX_EPT_VPID_CAP,
1270         MSR_IA32_VMX_VMFUNC,
1271
1272         MSR_F10H_DECFG,
1273         MSR_IA32_UCODE_REV,
1274         MSR_IA32_ARCH_CAPABILITIES,
1275 };
1276
1277 static unsigned int num_msr_based_features;
1278
1279 static u64 kvm_get_arch_capabilities(void)
1280 {
1281         u64 data = 0;
1282
1283         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1284                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1285
1286         /*
1287          * If we're doing cache flushes (either "always" or "cond")
1288          * we will do one whenever the guest does a vmlaunch/vmresume.
1289          * If an outer hypervisor is doing the cache flush for us
1290          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1291          * capability to the guest too, and if EPT is disabled we're not
1292          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1293          * require a nested hypervisor to do a flush of its own.
1294          */
1295         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1296                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1297
1298         if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1299                 data |= ARCH_CAP_RDCL_NO;
1300         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1301                 data |= ARCH_CAP_SSB_NO;
1302         if (!boot_cpu_has_bug(X86_BUG_MDS))
1303                 data |= ARCH_CAP_MDS_NO;
1304
1305         return data;
1306 }
1307
1308 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1309 {
1310         switch (msr->index) {
1311         case MSR_IA32_ARCH_CAPABILITIES:
1312                 msr->data = kvm_get_arch_capabilities();
1313                 break;
1314         case MSR_IA32_UCODE_REV:
1315                 rdmsrl_safe(msr->index, &msr->data);
1316                 break;
1317         default:
1318                 if (kvm_x86_ops->get_msr_feature(msr))
1319                         return 1;
1320         }
1321         return 0;
1322 }
1323
1324 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1325 {
1326         struct kvm_msr_entry msr;
1327         int r;
1328
1329         msr.index = index;
1330         r = kvm_get_msr_feature(&msr);
1331         if (r)
1332                 return r;
1333
1334         *data = msr.data;
1335
1336         return 0;
1337 }
1338
1339 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1340 {
1341         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1342                 return false;
1343
1344         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1345                 return false;
1346
1347         if (efer & (EFER_LME | EFER_LMA) &&
1348             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1349                 return false;
1350
1351         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1352                 return false;
1353
1354         return true;
1355
1356 }
1357 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1358 {
1359         if (efer & efer_reserved_bits)
1360                 return false;
1361
1362         return __kvm_valid_efer(vcpu, efer);
1363 }
1364 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1365
1366 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1367 {
1368         u64 old_efer = vcpu->arch.efer;
1369         u64 efer = msr_info->data;
1370
1371         if (efer & efer_reserved_bits)
1372                 return 1;
1373
1374         if (!msr_info->host_initiated) {
1375                 if (!__kvm_valid_efer(vcpu, efer))
1376                         return 1;
1377
1378                 if (is_paging(vcpu) &&
1379                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1380                         return 1;
1381         }
1382
1383         efer &= ~EFER_LMA;
1384         efer |= vcpu->arch.efer & EFER_LMA;
1385
1386         kvm_x86_ops->set_efer(vcpu, efer);
1387
1388         /* Update reserved bits */
1389         if ((efer ^ old_efer) & EFER_NX)
1390                 kvm_mmu_reset_context(vcpu);
1391
1392         return 0;
1393 }
1394
1395 void kvm_enable_efer_bits(u64 mask)
1396 {
1397        efer_reserved_bits &= ~mask;
1398 }
1399 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1400
1401 /*
1402  * Write @data into the MSR specified by @index.  Select MSR specific fault
1403  * checks are bypassed if @host_initiated is %true.
1404  * Returns 0 on success, non-0 otherwise.
1405  * Assumes vcpu_load() was already called.
1406  */
1407 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1408                          bool host_initiated)
1409 {
1410         struct msr_data msr;
1411
1412         switch (index) {
1413         case MSR_FS_BASE:
1414         case MSR_GS_BASE:
1415         case MSR_KERNEL_GS_BASE:
1416         case MSR_CSTAR:
1417         case MSR_LSTAR:
1418                 if (is_noncanonical_address(data, vcpu))
1419                         return 1;
1420                 break;
1421         case MSR_IA32_SYSENTER_EIP:
1422         case MSR_IA32_SYSENTER_ESP:
1423                 /*
1424                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1425                  * non-canonical address is written on Intel but not on
1426                  * AMD (which ignores the top 32-bits, because it does
1427                  * not implement 64-bit SYSENTER).
1428                  *
1429                  * 64-bit code should hence be able to write a non-canonical
1430                  * value on AMD.  Making the address canonical ensures that
1431                  * vmentry does not fail on Intel after writing a non-canonical
1432                  * value, and that something deterministic happens if the guest
1433                  * invokes 64-bit SYSENTER.
1434                  */
1435                 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1436         }
1437
1438         msr.data = data;
1439         msr.index = index;
1440         msr.host_initiated = host_initiated;
1441
1442         return kvm_x86_ops->set_msr(vcpu, &msr);
1443 }
1444
1445 /*
1446  * Read the MSR specified by @index into @data.  Select MSR specific fault
1447  * checks are bypassed if @host_initiated is %true.
1448  * Returns 0 on success, non-0 otherwise.
1449  * Assumes vcpu_load() was already called.
1450  */
1451 static int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1452                          bool host_initiated)
1453 {
1454         struct msr_data msr;
1455         int ret;
1456
1457         msr.index = index;
1458         msr.host_initiated = host_initiated;
1459
1460         ret = kvm_x86_ops->get_msr(vcpu, &msr);
1461         if (!ret)
1462                 *data = msr.data;
1463         return ret;
1464 }
1465
1466 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1467 {
1468         return __kvm_get_msr(vcpu, index, data, false);
1469 }
1470 EXPORT_SYMBOL_GPL(kvm_get_msr);
1471
1472 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1473 {
1474         return __kvm_set_msr(vcpu, index, data, false);
1475 }
1476 EXPORT_SYMBOL_GPL(kvm_set_msr);
1477
1478 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1479 {
1480         u32 ecx = kvm_rcx_read(vcpu);
1481         u64 data;
1482
1483         if (kvm_get_msr(vcpu, ecx, &data)) {
1484                 trace_kvm_msr_read_ex(ecx);
1485                 kvm_inject_gp(vcpu, 0);
1486                 return 1;
1487         }
1488
1489         trace_kvm_msr_read(ecx, data);
1490
1491         kvm_rax_write(vcpu, data & -1u);
1492         kvm_rdx_write(vcpu, (data >> 32) & -1u);
1493         return kvm_skip_emulated_instruction(vcpu);
1494 }
1495 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1496
1497 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1498 {
1499         u32 ecx = kvm_rcx_read(vcpu);
1500         u64 data = kvm_read_edx_eax(vcpu);
1501
1502         if (kvm_set_msr(vcpu, ecx, data)) {
1503                 trace_kvm_msr_write_ex(ecx, data);
1504                 kvm_inject_gp(vcpu, 0);
1505                 return 1;
1506         }
1507
1508         trace_kvm_msr_write(ecx, data);
1509         return kvm_skip_emulated_instruction(vcpu);
1510 }
1511 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1512
1513 /*
1514  * Adapt set_msr() to msr_io()'s calling convention
1515  */
1516 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1517 {
1518         return __kvm_get_msr(vcpu, index, data, true);
1519 }
1520
1521 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1522 {
1523         return __kvm_set_msr(vcpu, index, *data, true);
1524 }
1525
1526 #ifdef CONFIG_X86_64
1527 struct pvclock_gtod_data {
1528         seqcount_t      seq;
1529
1530         struct { /* extract of a clocksource struct */
1531                 int vclock_mode;
1532                 u64     cycle_last;
1533                 u64     mask;
1534                 u32     mult;
1535                 u32     shift;
1536         } clock;
1537
1538         u64             boot_ns;
1539         u64             nsec_base;
1540         u64             wall_time_sec;
1541 };
1542
1543 static struct pvclock_gtod_data pvclock_gtod_data;
1544
1545 static void update_pvclock_gtod(struct timekeeper *tk)
1546 {
1547         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1548         u64 boot_ns;
1549
1550         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1551
1552         write_seqcount_begin(&vdata->seq);
1553
1554         /* copy pvclock gtod data */
1555         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1556         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1557         vdata->clock.mask               = tk->tkr_mono.mask;
1558         vdata->clock.mult               = tk->tkr_mono.mult;
1559         vdata->clock.shift              = tk->tkr_mono.shift;
1560
1561         vdata->boot_ns                  = boot_ns;
1562         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1563
1564         vdata->wall_time_sec            = tk->xtime_sec;
1565
1566         write_seqcount_end(&vdata->seq);
1567 }
1568 #endif
1569
1570 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1571 {
1572         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1573         kvm_vcpu_kick(vcpu);
1574 }
1575
1576 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1577 {
1578         int version;
1579         int r;
1580         struct pvclock_wall_clock wc;
1581         struct timespec64 boot;
1582
1583         if (!wall_clock)
1584                 return;
1585
1586         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1587         if (r)
1588                 return;
1589
1590         if (version & 1)
1591                 ++version;  /* first time write, random junk */
1592
1593         ++version;
1594
1595         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1596                 return;
1597
1598         /*
1599          * The guest calculates current wall clock time by adding
1600          * system time (updated by kvm_guest_time_update below) to the
1601          * wall clock specified here.  guest system time equals host
1602          * system time for us, thus we must fill in host boot time here.
1603          */
1604         getboottime64(&boot);
1605
1606         if (kvm->arch.kvmclock_offset) {
1607                 struct timespec64 ts = ns_to_timespec64(kvm->arch.kvmclock_offset);
1608                 boot = timespec64_sub(boot, ts);
1609         }
1610         wc.sec = (u32)boot.tv_sec; /* overflow in 2106 guest time */
1611         wc.nsec = boot.tv_nsec;
1612         wc.version = version;
1613
1614         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1615
1616         version++;
1617         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1618 }
1619
1620 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1621 {
1622         do_shl32_div32(dividend, divisor);
1623         return dividend;
1624 }
1625
1626 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1627                                s8 *pshift, u32 *pmultiplier)
1628 {
1629         uint64_t scaled64;
1630         int32_t  shift = 0;
1631         uint64_t tps64;
1632         uint32_t tps32;
1633
1634         tps64 = base_hz;
1635         scaled64 = scaled_hz;
1636         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1637                 tps64 >>= 1;
1638                 shift--;
1639         }
1640
1641         tps32 = (uint32_t)tps64;
1642         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1643                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1644                         scaled64 >>= 1;
1645                 else
1646                         tps32 <<= 1;
1647                 shift++;
1648         }
1649
1650         *pshift = shift;
1651         *pmultiplier = div_frac(scaled64, tps32);
1652 }
1653
1654 #ifdef CONFIG_X86_64
1655 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1656 #endif
1657
1658 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1659 static unsigned long max_tsc_khz;
1660
1661 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1662 {
1663         u64 v = (u64)khz * (1000000 + ppm);
1664         do_div(v, 1000000);
1665         return v;
1666 }
1667
1668 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1669 {
1670         u64 ratio;
1671
1672         /* Guest TSC same frequency as host TSC? */
1673         if (!scale) {
1674                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1675                 return 0;
1676         }
1677
1678         /* TSC scaling supported? */
1679         if (!kvm_has_tsc_control) {
1680                 if (user_tsc_khz > tsc_khz) {
1681                         vcpu->arch.tsc_catchup = 1;
1682                         vcpu->arch.tsc_always_catchup = 1;
1683                         return 0;
1684                 } else {
1685                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
1686                         return -1;
1687                 }
1688         }
1689
1690         /* TSC scaling required  - calculate ratio */
1691         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1692                                 user_tsc_khz, tsc_khz);
1693
1694         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1695                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1696                                     user_tsc_khz);
1697                 return -1;
1698         }
1699
1700         vcpu->arch.tsc_scaling_ratio = ratio;
1701         return 0;
1702 }
1703
1704 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1705 {
1706         u32 thresh_lo, thresh_hi;
1707         int use_scaling = 0;
1708
1709         /* tsc_khz can be zero if TSC calibration fails */
1710         if (user_tsc_khz == 0) {
1711                 /* set tsc_scaling_ratio to a safe value */
1712                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1713                 return -1;
1714         }
1715
1716         /* Compute a scale to convert nanoseconds in TSC cycles */
1717         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
1718                            &vcpu->arch.virtual_tsc_shift,
1719                            &vcpu->arch.virtual_tsc_mult);
1720         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
1721
1722         /*
1723          * Compute the variation in TSC rate which is acceptable
1724          * within the range of tolerance and decide if the
1725          * rate being applied is within that bounds of the hardware
1726          * rate.  If so, no scaling or compensation need be done.
1727          */
1728         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1729         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1730         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
1731                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
1732                 use_scaling = 1;
1733         }
1734         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
1735 }
1736
1737 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1738 {
1739         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1740                                       vcpu->arch.virtual_tsc_mult,
1741                                       vcpu->arch.virtual_tsc_shift);
1742         tsc += vcpu->arch.this_tsc_write;
1743         return tsc;
1744 }
1745
1746 static inline int gtod_is_based_on_tsc(int mode)
1747 {
1748         return mode == VCLOCK_TSC || mode == VCLOCK_HVCLOCK;
1749 }
1750
1751 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1752 {
1753 #ifdef CONFIG_X86_64
1754         bool vcpus_matched;
1755         struct kvm_arch *ka = &vcpu->kvm->arch;
1756         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1757
1758         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1759                          atomic_read(&vcpu->kvm->online_vcpus));
1760
1761         /*
1762          * Once the masterclock is enabled, always perform request in
1763          * order to update it.
1764          *
1765          * In order to enable masterclock, the host clocksource must be TSC
1766          * and the vcpus need to have matched TSCs.  When that happens,
1767          * perform request to enable masterclock.
1768          */
1769         if (ka->use_master_clock ||
1770             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
1771                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1772
1773         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1774                             atomic_read(&vcpu->kvm->online_vcpus),
1775                             ka->use_master_clock, gtod->clock.vclock_mode);
1776 #endif
1777 }
1778
1779 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1780 {
1781         u64 curr_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1782         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1783 }
1784
1785 /*
1786  * Multiply tsc by a fixed point number represented by ratio.
1787  *
1788  * The most significant 64-N bits (mult) of ratio represent the
1789  * integral part of the fixed point number; the remaining N bits
1790  * (frac) represent the fractional part, ie. ratio represents a fixed
1791  * point number (mult + frac * 2^(-N)).
1792  *
1793  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1794  */
1795 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1796 {
1797         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1798 }
1799
1800 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1801 {
1802         u64 _tsc = tsc;
1803         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1804
1805         if (ratio != kvm_default_tsc_scaling_ratio)
1806                 _tsc = __scale_tsc(ratio, tsc);
1807
1808         return _tsc;
1809 }
1810 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1811
1812 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1813 {
1814         u64 tsc;
1815
1816         tsc = kvm_scale_tsc(vcpu, rdtsc());
1817
1818         return target_tsc - tsc;
1819 }
1820
1821 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1822 {
1823         u64 tsc_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1824
1825         return tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
1826 }
1827 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1828
1829 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
1830 {
1831         vcpu->arch.tsc_offset = kvm_x86_ops->write_l1_tsc_offset(vcpu, offset);
1832 }
1833
1834 static inline bool kvm_check_tsc_unstable(void)
1835 {
1836 #ifdef CONFIG_X86_64
1837         /*
1838          * TSC is marked unstable when we're running on Hyper-V,
1839          * 'TSC page' clocksource is good.
1840          */
1841         if (pvclock_gtod_data.clock.vclock_mode == VCLOCK_HVCLOCK)
1842                 return false;
1843 #endif
1844         return check_tsc_unstable();
1845 }
1846
1847 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1848 {
1849         struct kvm *kvm = vcpu->kvm;
1850         u64 offset, ns, elapsed;
1851         unsigned long flags;
1852         bool matched;
1853         bool already_matched;
1854         u64 data = msr->data;
1855         bool synchronizing = false;
1856
1857         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1858         offset = kvm_compute_tsc_offset(vcpu, data);
1859         ns = ktime_get_boottime_ns();
1860         elapsed = ns - kvm->arch.last_tsc_nsec;
1861
1862         if (vcpu->arch.virtual_tsc_khz) {
1863                 if (data == 0 && msr->host_initiated) {
1864                         /*
1865                          * detection of vcpu initialization -- need to sync
1866                          * with other vCPUs. This particularly helps to keep
1867                          * kvm_clock stable after CPU hotplug
1868                          */
1869                         synchronizing = true;
1870                 } else {
1871                         u64 tsc_exp = kvm->arch.last_tsc_write +
1872                                                 nsec_to_cycles(vcpu, elapsed);
1873                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
1874                         /*
1875                          * Special case: TSC write with a small delta (1 second)
1876                          * of virtual cycle time against real time is
1877                          * interpreted as an attempt to synchronize the CPU.
1878                          */
1879                         synchronizing = data < tsc_exp + tsc_hz &&
1880                                         data + tsc_hz > tsc_exp;
1881                 }
1882         }
1883
1884         /*
1885          * For a reliable TSC, we can match TSC offsets, and for an unstable
1886          * TSC, we add elapsed time in this computation.  We could let the
1887          * compensation code attempt to catch up if we fall behind, but
1888          * it's better to try to match offsets from the beginning.
1889          */
1890         if (synchronizing &&
1891             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1892                 if (!kvm_check_tsc_unstable()) {
1893                         offset = kvm->arch.cur_tsc_offset;
1894                 } else {
1895                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1896                         data += delta;
1897                         offset = kvm_compute_tsc_offset(vcpu, data);
1898                 }
1899                 matched = true;
1900                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1901         } else {
1902                 /*
1903                  * We split periods of matched TSC writes into generations.
1904                  * For each generation, we track the original measured
1905                  * nanosecond time, offset, and write, so if TSCs are in
1906                  * sync, we can match exact offset, and if not, we can match
1907                  * exact software computation in compute_guest_tsc()
1908                  *
1909                  * These values are tracked in kvm->arch.cur_xxx variables.
1910                  */
1911                 kvm->arch.cur_tsc_generation++;
1912                 kvm->arch.cur_tsc_nsec = ns;
1913                 kvm->arch.cur_tsc_write = data;
1914                 kvm->arch.cur_tsc_offset = offset;
1915                 matched = false;
1916         }
1917
1918         /*
1919          * We also track th most recent recorded KHZ, write and time to
1920          * allow the matching interval to be extended at each write.
1921          */
1922         kvm->arch.last_tsc_nsec = ns;
1923         kvm->arch.last_tsc_write = data;
1924         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1925
1926         vcpu->arch.last_guest_tsc = data;
1927
1928         /* Keep track of which generation this VCPU has synchronized to */
1929         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1930         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1931         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1932
1933         if (!msr->host_initiated && guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST))
1934                 update_ia32_tsc_adjust_msr(vcpu, offset);
1935
1936         kvm_vcpu_write_tsc_offset(vcpu, offset);
1937         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1938
1939         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1940         if (!matched) {
1941                 kvm->arch.nr_vcpus_matched_tsc = 0;
1942         } else if (!already_matched) {
1943                 kvm->arch.nr_vcpus_matched_tsc++;
1944         }
1945
1946         kvm_track_tsc_matching(vcpu);
1947         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1948 }
1949
1950 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1951
1952 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1953                                            s64 adjustment)
1954 {
1955         u64 tsc_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1956         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
1957 }
1958
1959 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1960 {
1961         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1962                 WARN_ON(adjustment < 0);
1963         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1964         adjust_tsc_offset_guest(vcpu, adjustment);
1965 }
1966
1967 #ifdef CONFIG_X86_64
1968
1969 static u64 read_tsc(void)
1970 {
1971         u64 ret = (u64)rdtsc_ordered();
1972         u64 last = pvclock_gtod_data.clock.cycle_last;
1973
1974         if (likely(ret >= last))
1975                 return ret;
1976
1977         /*
1978          * GCC likes to generate cmov here, but this branch is extremely
1979          * predictable (it's just a function of time and the likely is
1980          * very likely) and there's a data dependence, so force GCC
1981          * to generate a branch instead.  I don't barrier() because
1982          * we don't actually need a barrier, and if this function
1983          * ever gets inlined it will generate worse code.
1984          */
1985         asm volatile ("");
1986         return last;
1987 }
1988
1989 static inline u64 vgettsc(u64 *tsc_timestamp, int *mode)
1990 {
1991         long v;
1992         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1993         u64 tsc_pg_val;
1994
1995         switch (gtod->clock.vclock_mode) {
1996         case VCLOCK_HVCLOCK:
1997                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
1998                                                   tsc_timestamp);
1999                 if (tsc_pg_val != U64_MAX) {
2000                         /* TSC page valid */
2001                         *mode = VCLOCK_HVCLOCK;
2002                         v = (tsc_pg_val - gtod->clock.cycle_last) &
2003                                 gtod->clock.mask;
2004                 } else {
2005                         /* TSC page invalid */
2006                         *mode = VCLOCK_NONE;
2007                 }
2008                 break;
2009         case VCLOCK_TSC:
2010                 *mode = VCLOCK_TSC;
2011                 *tsc_timestamp = read_tsc();
2012                 v = (*tsc_timestamp - gtod->clock.cycle_last) &
2013                         gtod->clock.mask;
2014                 break;
2015         default:
2016                 *mode = VCLOCK_NONE;
2017         }
2018
2019         if (*mode == VCLOCK_NONE)
2020                 *tsc_timestamp = v = 0;
2021
2022         return v * gtod->clock.mult;
2023 }
2024
2025 static int do_monotonic_boot(s64 *t, u64 *tsc_timestamp)
2026 {
2027         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2028         unsigned long seq;
2029         int mode;
2030         u64 ns;
2031
2032         do {
2033                 seq = read_seqcount_begin(&gtod->seq);
2034                 ns = gtod->nsec_base;
2035                 ns += vgettsc(tsc_timestamp, &mode);
2036                 ns >>= gtod->clock.shift;
2037                 ns += gtod->boot_ns;
2038         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2039         *t = ns;
2040
2041         return mode;
2042 }
2043
2044 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2045 {
2046         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2047         unsigned long seq;
2048         int mode;
2049         u64 ns;
2050
2051         do {
2052                 seq = read_seqcount_begin(&gtod->seq);
2053                 ts->tv_sec = gtod->wall_time_sec;
2054                 ns = gtod->nsec_base;
2055                 ns += vgettsc(tsc_timestamp, &mode);
2056                 ns >>= gtod->clock.shift;
2057         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2058
2059         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2060         ts->tv_nsec = ns;
2061
2062         return mode;
2063 }
2064
2065 /* returns true if host is using TSC based clocksource */
2066 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2067 {
2068         /* checked again under seqlock below */
2069         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2070                 return false;
2071
2072         return gtod_is_based_on_tsc(do_monotonic_boot(kernel_ns,
2073                                                       tsc_timestamp));
2074 }
2075
2076 /* returns true if host is using TSC based clocksource */
2077 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2078                                            u64 *tsc_timestamp)
2079 {
2080         /* checked again under seqlock below */
2081         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2082                 return false;
2083
2084         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2085 }
2086 #endif
2087
2088 /*
2089  *
2090  * Assuming a stable TSC across physical CPUS, and a stable TSC
2091  * across virtual CPUs, the following condition is possible.
2092  * Each numbered line represents an event visible to both
2093  * CPUs at the next numbered event.
2094  *
2095  * "timespecX" represents host monotonic time. "tscX" represents
2096  * RDTSC value.
2097  *
2098  *              VCPU0 on CPU0           |       VCPU1 on CPU1
2099  *
2100  * 1.  read timespec0,tsc0
2101  * 2.                                   | timespec1 = timespec0 + N
2102  *                                      | tsc1 = tsc0 + M
2103  * 3. transition to guest               | transition to guest
2104  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2105  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2106  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2107  *
2108  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2109  *
2110  *      - ret0 < ret1
2111  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2112  *              ...
2113  *      - 0 < N - M => M < N
2114  *
2115  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2116  * always the case (the difference between two distinct xtime instances
2117  * might be smaller then the difference between corresponding TSC reads,
2118  * when updating guest vcpus pvclock areas).
2119  *
2120  * To avoid that problem, do not allow visibility of distinct
2121  * system_timestamp/tsc_timestamp values simultaneously: use a master
2122  * copy of host monotonic time values. Update that master copy
2123  * in lockstep.
2124  *
2125  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2126  *
2127  */
2128
2129 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2130 {
2131 #ifdef CONFIG_X86_64
2132         struct kvm_arch *ka = &kvm->arch;
2133         int vclock_mode;
2134         bool host_tsc_clocksource, vcpus_matched;
2135
2136         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2137                         atomic_read(&kvm->online_vcpus));
2138
2139         /*
2140          * If the host uses TSC clock, then passthrough TSC as stable
2141          * to the guest.
2142          */
2143         host_tsc_clocksource = kvm_get_time_and_clockread(
2144                                         &ka->master_kernel_ns,
2145                                         &ka->master_cycle_now);
2146
2147         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2148                                 && !ka->backwards_tsc_observed
2149                                 && !ka->boot_vcpu_runs_old_kvmclock;
2150
2151         if (ka->use_master_clock)
2152                 atomic_set(&kvm_guest_has_master_clock, 1);
2153
2154         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2155         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2156                                         vcpus_matched);
2157 #endif
2158 }
2159
2160 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2161 {
2162         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2163 }
2164
2165 static void kvm_gen_update_masterclock(struct kvm *kvm)
2166 {
2167 #ifdef CONFIG_X86_64
2168         int i;
2169         struct kvm_vcpu *vcpu;
2170         struct kvm_arch *ka = &kvm->arch;
2171
2172         spin_lock(&ka->pvclock_gtod_sync_lock);
2173         kvm_make_mclock_inprogress_request(kvm);
2174         /* no guest entries from this point */
2175         pvclock_update_vm_gtod_copy(kvm);
2176
2177         kvm_for_each_vcpu(i, vcpu, kvm)
2178                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2179
2180         /* guest entries allowed */
2181         kvm_for_each_vcpu(i, vcpu, kvm)
2182                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2183
2184         spin_unlock(&ka->pvclock_gtod_sync_lock);
2185 #endif
2186 }
2187
2188 u64 get_kvmclock_ns(struct kvm *kvm)
2189 {
2190         struct kvm_arch *ka = &kvm->arch;
2191         struct pvclock_vcpu_time_info hv_clock;
2192         u64 ret;
2193
2194         spin_lock(&ka->pvclock_gtod_sync_lock);
2195         if (!ka->use_master_clock) {
2196                 spin_unlock(&ka->pvclock_gtod_sync_lock);
2197                 return ktime_get_boottime_ns() + ka->kvmclock_offset;
2198         }
2199
2200         hv_clock.tsc_timestamp = ka->master_cycle_now;
2201         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2202         spin_unlock(&ka->pvclock_gtod_sync_lock);
2203
2204         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2205         get_cpu();
2206
2207         if (__this_cpu_read(cpu_tsc_khz)) {
2208                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2209                                    &hv_clock.tsc_shift,
2210                                    &hv_clock.tsc_to_system_mul);
2211                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2212         } else
2213                 ret = ktime_get_boottime_ns() + ka->kvmclock_offset;
2214
2215         put_cpu();
2216
2217         return ret;
2218 }
2219
2220 static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
2221 {
2222         struct kvm_vcpu_arch *vcpu = &v->arch;
2223         struct pvclock_vcpu_time_info guest_hv_clock;
2224
2225         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
2226                 &guest_hv_clock, sizeof(guest_hv_clock))))
2227                 return;
2228
2229         /* This VCPU is paused, but it's legal for a guest to read another
2230          * VCPU's kvmclock, so we really have to follow the specification where
2231          * it says that version is odd if data is being modified, and even after
2232          * it is consistent.
2233          *
2234          * Version field updates must be kept separate.  This is because
2235          * kvm_write_guest_cached might use a "rep movs" instruction, and
2236          * writes within a string instruction are weakly ordered.  So there
2237          * are three writes overall.
2238          *
2239          * As a small optimization, only write the version field in the first
2240          * and third write.  The vcpu->pv_time cache is still valid, because the
2241          * version field is the first in the struct.
2242          */
2243         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2244
2245         if (guest_hv_clock.version & 1)
2246                 ++guest_hv_clock.version;  /* first time write, random junk */
2247
2248         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2249         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2250                                 &vcpu->hv_clock,
2251                                 sizeof(vcpu->hv_clock.version));
2252
2253         smp_wmb();
2254
2255         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2256         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2257
2258         if (vcpu->pvclock_set_guest_stopped_request) {
2259                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2260                 vcpu->pvclock_set_guest_stopped_request = false;
2261         }
2262
2263         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2264
2265         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2266                                 &vcpu->hv_clock,
2267                                 sizeof(vcpu->hv_clock));
2268
2269         smp_wmb();
2270
2271         vcpu->hv_clock.version++;
2272         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2273                                 &vcpu->hv_clock,
2274                                 sizeof(vcpu->hv_clock.version));
2275 }
2276
2277 static int kvm_guest_time_update(struct kvm_vcpu *v)
2278 {
2279         unsigned long flags, tgt_tsc_khz;
2280         struct kvm_vcpu_arch *vcpu = &v->arch;
2281         struct kvm_arch *ka = &v->kvm->arch;
2282         s64 kernel_ns;
2283         u64 tsc_timestamp, host_tsc;
2284         u8 pvclock_flags;
2285         bool use_master_clock;
2286
2287         kernel_ns = 0;
2288         host_tsc = 0;
2289
2290         /*
2291          * If the host uses TSC clock, then passthrough TSC as stable
2292          * to the guest.
2293          */
2294         spin_lock(&ka->pvclock_gtod_sync_lock);
2295         use_master_clock = ka->use_master_clock;
2296         if (use_master_clock) {
2297                 host_tsc = ka->master_cycle_now;
2298                 kernel_ns = ka->master_kernel_ns;
2299         }
2300         spin_unlock(&ka->pvclock_gtod_sync_lock);
2301
2302         /* Keep irq disabled to prevent changes to the clock */
2303         local_irq_save(flags);
2304         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2305         if (unlikely(tgt_tsc_khz == 0)) {
2306                 local_irq_restore(flags);
2307                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2308                 return 1;
2309         }
2310         if (!use_master_clock) {
2311                 host_tsc = rdtsc();
2312                 kernel_ns = ktime_get_boottime_ns();
2313         }
2314
2315         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2316
2317         /*
2318          * We may have to catch up the TSC to match elapsed wall clock
2319          * time for two reasons, even if kvmclock is used.
2320          *   1) CPU could have been running below the maximum TSC rate
2321          *   2) Broken TSC compensation resets the base at each VCPU
2322          *      entry to avoid unknown leaps of TSC even when running
2323          *      again on the same CPU.  This may cause apparent elapsed
2324          *      time to disappear, and the guest to stand still or run
2325          *      very slowly.
2326          */
2327         if (vcpu->tsc_catchup) {
2328                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2329                 if (tsc > tsc_timestamp) {
2330                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2331                         tsc_timestamp = tsc;
2332                 }
2333         }
2334
2335         local_irq_restore(flags);
2336
2337         /* With all the info we got, fill in the values */
2338
2339         if (kvm_has_tsc_control)
2340                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
2341
2342         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2343                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2344                                    &vcpu->hv_clock.tsc_shift,
2345                                    &vcpu->hv_clock.tsc_to_system_mul);
2346                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2347         }
2348
2349         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2350         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2351         vcpu->last_guest_tsc = tsc_timestamp;
2352
2353         /* If the host uses TSC clocksource, then it is stable */
2354         pvclock_flags = 0;
2355         if (use_master_clock)
2356                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2357
2358         vcpu->hv_clock.flags = pvclock_flags;
2359
2360         if (vcpu->pv_time_enabled)
2361                 kvm_setup_pvclock_page(v);
2362         if (v == kvm_get_vcpu(v->kvm, 0))
2363                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2364         return 0;
2365 }
2366
2367 /*
2368  * kvmclock updates which are isolated to a given vcpu, such as
2369  * vcpu->cpu migration, should not allow system_timestamp from
2370  * the rest of the vcpus to remain static. Otherwise ntp frequency
2371  * correction applies to one vcpu's system_timestamp but not
2372  * the others.
2373  *
2374  * So in those cases, request a kvmclock update for all vcpus.
2375  * We need to rate-limit these requests though, as they can
2376  * considerably slow guests that have a large number of vcpus.
2377  * The time for a remote vcpu to update its kvmclock is bound
2378  * by the delay we use to rate-limit the updates.
2379  */
2380
2381 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2382
2383 static void kvmclock_update_fn(struct work_struct *work)
2384 {
2385         int i;
2386         struct delayed_work *dwork = to_delayed_work(work);
2387         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2388                                            kvmclock_update_work);
2389         struct kvm *kvm = container_of(ka, struct kvm, arch);
2390         struct kvm_vcpu *vcpu;
2391
2392         kvm_for_each_vcpu(i, vcpu, kvm) {
2393                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2394                 kvm_vcpu_kick(vcpu);
2395         }
2396 }
2397
2398 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2399 {
2400         struct kvm *kvm = v->kvm;
2401
2402         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2403         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2404                                         KVMCLOCK_UPDATE_DELAY);
2405 }
2406
2407 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2408
2409 static void kvmclock_sync_fn(struct work_struct *work)
2410 {
2411         struct delayed_work *dwork = to_delayed_work(work);
2412         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2413                                            kvmclock_sync_work);
2414         struct kvm *kvm = container_of(ka, struct kvm, arch);
2415
2416         if (!kvmclock_periodic_sync)
2417                 return;
2418
2419         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2420         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2421                                         KVMCLOCK_SYNC_PERIOD);
2422 }
2423
2424 /*
2425  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
2426  */
2427 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
2428 {
2429         /* McStatusWrEn enabled? */
2430         if (guest_cpuid_is_amd(vcpu))
2431                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
2432
2433         return false;
2434 }
2435
2436 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2437 {
2438         u64 mcg_cap = vcpu->arch.mcg_cap;
2439         unsigned bank_num = mcg_cap & 0xff;
2440         u32 msr = msr_info->index;
2441         u64 data = msr_info->data;
2442
2443         switch (msr) {
2444         case MSR_IA32_MCG_STATUS:
2445                 vcpu->arch.mcg_status = data;
2446                 break;
2447         case MSR_IA32_MCG_CTL:
2448                 if (!(mcg_cap & MCG_CTL_P) &&
2449                     (data || !msr_info->host_initiated))
2450                         return 1;
2451                 if (data != 0 && data != ~(u64)0)
2452                         return 1;
2453                 vcpu->arch.mcg_ctl = data;
2454                 break;
2455         default:
2456                 if (msr >= MSR_IA32_MC0_CTL &&
2457                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2458                         u32 offset = msr - MSR_IA32_MC0_CTL;
2459                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2460                          * some Linux kernels though clear bit 10 in bank 4 to
2461                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2462                          * this to avoid an uncatched #GP in the guest
2463                          */
2464                         if ((offset & 0x3) == 0 &&
2465                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2466                                 return -1;
2467
2468                         /* MCi_STATUS */
2469                         if (!msr_info->host_initiated &&
2470                             (offset & 0x3) == 1 && data != 0) {
2471                                 if (!can_set_mci_status(vcpu))
2472                                         return -1;
2473                         }
2474
2475                         vcpu->arch.mce_banks[offset] = data;
2476                         break;
2477                 }
2478                 return 1;
2479         }
2480         return 0;
2481 }
2482
2483 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2484 {
2485         struct kvm *kvm = vcpu->kvm;
2486         int lm = is_long_mode(vcpu);
2487         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2488                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2489         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2490                 : kvm->arch.xen_hvm_config.blob_size_32;
2491         u32 page_num = data & ~PAGE_MASK;
2492         u64 page_addr = data & PAGE_MASK;
2493         u8 *page;
2494         int r;
2495
2496         r = -E2BIG;
2497         if (page_num >= blob_size)
2498                 goto out;
2499         r = -ENOMEM;
2500         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2501         if (IS_ERR(page)) {
2502                 r = PTR_ERR(page);
2503                 goto out;
2504         }
2505         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
2506                 goto out_free;
2507         r = 0;
2508 out_free:
2509         kfree(page);
2510 out:
2511         return r;
2512 }
2513
2514 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2515 {
2516         gpa_t gpa = data & ~0x3f;
2517
2518         /* Bits 3:5 are reserved, Should be zero */
2519         if (data & 0x38)
2520                 return 1;
2521
2522         vcpu->arch.apf.msr_val = data;
2523
2524         if (!(data & KVM_ASYNC_PF_ENABLED)) {
2525                 kvm_clear_async_pf_completion_queue(vcpu);
2526                 kvm_async_pf_hash_reset(vcpu);
2527                 return 0;
2528         }
2529
2530         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2531                                         sizeof(u32)))
2532                 return 1;
2533
2534         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2535         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
2536         kvm_async_pf_wakeup_all(vcpu);
2537         return 0;
2538 }
2539
2540 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2541 {
2542         vcpu->arch.pv_time_enabled = false;
2543 }
2544
2545 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu, bool invalidate_gpa)
2546 {
2547         ++vcpu->stat.tlb_flush;
2548         kvm_x86_ops->tlb_flush(vcpu, invalidate_gpa);
2549 }
2550
2551 static void record_steal_time(struct kvm_vcpu *vcpu)
2552 {
2553         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2554                 return;
2555
2556         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2557                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2558                 return;
2559
2560         /*
2561          * Doing a TLB flush here, on the guest's behalf, can avoid
2562          * expensive IPIs.
2563          */
2564         trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
2565                 vcpu->arch.st.steal.preempted & KVM_VCPU_FLUSH_TLB);
2566         if (xchg(&vcpu->arch.st.steal.preempted, 0) & KVM_VCPU_FLUSH_TLB)
2567                 kvm_vcpu_flush_tlb(vcpu, false);
2568
2569         if (vcpu->arch.st.steal.version & 1)
2570                 vcpu->arch.st.steal.version += 1;  /* first time write, random junk */
2571
2572         vcpu->arch.st.steal.version += 1;
2573
2574         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2575                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2576
2577         smp_wmb();
2578
2579         vcpu->arch.st.steal.steal += current->sched_info.run_delay -
2580                 vcpu->arch.st.last_steal;
2581         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2582
2583         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2584                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2585
2586         smp_wmb();
2587
2588         vcpu->arch.st.steal.version += 1;
2589
2590         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2591                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2592 }
2593
2594 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2595 {
2596         bool pr = false;
2597         u32 msr = msr_info->index;
2598         u64 data = msr_info->data;
2599
2600         switch (msr) {
2601         case MSR_AMD64_NB_CFG:
2602         case MSR_IA32_UCODE_WRITE:
2603         case MSR_VM_HSAVE_PA:
2604         case MSR_AMD64_PATCH_LOADER:
2605         case MSR_AMD64_BU_CFG2:
2606         case MSR_AMD64_DC_CFG:
2607         case MSR_F15H_EX_CFG:
2608                 break;
2609
2610         case MSR_IA32_UCODE_REV:
2611                 if (msr_info->host_initiated)
2612                         vcpu->arch.microcode_version = data;
2613                 break;
2614         case MSR_IA32_ARCH_CAPABILITIES:
2615                 if (!msr_info->host_initiated)
2616                         return 1;
2617                 vcpu->arch.arch_capabilities = data;
2618                 break;
2619         case MSR_EFER:
2620                 return set_efer(vcpu, msr_info);
2621         case MSR_K7_HWCR:
2622                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2623                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2624                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2625
2626                 /* Handle McStatusWrEn */
2627                 if (data == BIT_ULL(18)) {
2628                         vcpu->arch.msr_hwcr = data;
2629                 } else if (data != 0) {
2630                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2631                                     data);
2632                         return 1;
2633                 }
2634                 break;
2635         case MSR_FAM10H_MMIO_CONF_BASE:
2636                 if (data != 0) {
2637                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2638                                     "0x%llx\n", data);
2639                         return 1;
2640                 }
2641                 break;
2642         case MSR_IA32_DEBUGCTLMSR:
2643                 if (!data) {
2644                         /* We support the non-activated case already */
2645                         break;
2646                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2647                         /* Values other than LBR and BTF are vendor-specific,
2648                            thus reserved and should throw a #GP */
2649                         return 1;
2650                 }
2651                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2652                             __func__, data);
2653                 break;
2654         case 0x200 ... 0x2ff:
2655                 return kvm_mtrr_set_msr(vcpu, msr, data);
2656         case MSR_IA32_APICBASE:
2657                 return kvm_set_apic_base(vcpu, msr_info);
2658         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2659                 return kvm_x2apic_msr_write(vcpu, msr, data);
2660         case MSR_IA32_TSCDEADLINE:
2661                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2662                 break;
2663         case MSR_IA32_TSC_ADJUST:
2664                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
2665                         if (!msr_info->host_initiated) {
2666                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2667                                 adjust_tsc_offset_guest(vcpu, adj);
2668                         }
2669                         vcpu->arch.ia32_tsc_adjust_msr = data;
2670                 }
2671                 break;
2672         case MSR_IA32_MISC_ENABLE:
2673                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
2674                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
2675                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
2676                                 return 1;
2677                         vcpu->arch.ia32_misc_enable_msr = data;
2678                         kvm_update_cpuid(vcpu);
2679                 } else {
2680                         vcpu->arch.ia32_misc_enable_msr = data;
2681                 }
2682                 break;
2683         case MSR_IA32_SMBASE:
2684                 if (!msr_info->host_initiated)
2685                         return 1;
2686                 vcpu->arch.smbase = data;
2687                 break;
2688         case MSR_IA32_POWER_CTL:
2689                 vcpu->arch.msr_ia32_power_ctl = data;
2690                 break;
2691         case MSR_IA32_TSC:
2692                 kvm_write_tsc(vcpu, msr_info);
2693                 break;
2694         case MSR_SMI_COUNT:
2695                 if (!msr_info->host_initiated)
2696                         return 1;
2697                 vcpu->arch.smi_count = data;
2698                 break;
2699         case MSR_KVM_WALL_CLOCK_NEW:
2700         case MSR_KVM_WALL_CLOCK:
2701                 vcpu->kvm->arch.wall_clock = data;
2702                 kvm_write_wall_clock(vcpu->kvm, data);
2703                 break;
2704         case MSR_KVM_SYSTEM_TIME_NEW:
2705         case MSR_KVM_SYSTEM_TIME: {
2706                 struct kvm_arch *ka = &vcpu->kvm->arch;
2707
2708                 kvmclock_reset(vcpu);
2709
2710                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2711                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2712
2713                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2714                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2715
2716                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2717                 }
2718
2719                 vcpu->arch.time = data;
2720                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2721
2722                 /* we verify if the enable bit is set... */
2723                 if (!(data & 1))
2724                         break;
2725
2726                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2727                      &vcpu->arch.pv_time, data & ~1ULL,
2728                      sizeof(struct pvclock_vcpu_time_info)))
2729                         vcpu->arch.pv_time_enabled = false;
2730                 else
2731                         vcpu->arch.pv_time_enabled = true;
2732
2733                 break;
2734         }
2735         case MSR_KVM_ASYNC_PF_EN:
2736                 if (kvm_pv_enable_async_pf(vcpu, data))
2737                         return 1;
2738                 break;
2739         case MSR_KVM_STEAL_TIME:
2740
2741                 if (unlikely(!sched_info_on()))
2742                         return 1;
2743
2744                 if (data & KVM_STEAL_RESERVED_MASK)
2745                         return 1;
2746
2747                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2748                                                 data & KVM_STEAL_VALID_BITS,
2749                                                 sizeof(struct kvm_steal_time)))
2750                         return 1;
2751
2752                 vcpu->arch.st.msr_val = data;
2753
2754                 if (!(data & KVM_MSR_ENABLED))
2755                         break;
2756
2757                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2758
2759                 break;
2760         case MSR_KVM_PV_EOI_EN:
2761                 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
2762                         return 1;
2763                 break;
2764
2765         case MSR_KVM_POLL_CONTROL:
2766                 /* only enable bit supported */
2767                 if (data & (-1ULL << 1))
2768                         return 1;
2769
2770                 vcpu->arch.msr_kvm_poll_control = data;
2771                 break;
2772
2773         case MSR_IA32_MCG_CTL:
2774         case MSR_IA32_MCG_STATUS:
2775         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2776                 return set_msr_mce(vcpu, msr_info);
2777
2778         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2779         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2780                 pr = true; /* fall through */
2781         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2782         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2783                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2784                         return kvm_pmu_set_msr(vcpu, msr_info);
2785
2786                 if (pr || data != 0)
2787                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2788                                     "0x%x data 0x%llx\n", msr, data);
2789                 break;
2790         case MSR_K7_CLK_CTL:
2791                 /*
2792                  * Ignore all writes to this no longer documented MSR.
2793                  * Writes are only relevant for old K7 processors,
2794                  * all pre-dating SVM, but a recommended workaround from
2795                  * AMD for these chips. It is possible to specify the
2796                  * affected processor models on the command line, hence
2797                  * the need to ignore the workaround.
2798                  */
2799                 break;
2800         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2801         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2802         case HV_X64_MSR_CRASH_CTL:
2803         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2804         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
2805         case HV_X64_MSR_TSC_EMULATION_CONTROL:
2806         case HV_X64_MSR_TSC_EMULATION_STATUS:
2807                 return kvm_hv_set_msr_common(vcpu, msr, data,
2808                                              msr_info->host_initiated);
2809         case MSR_IA32_BBL_CR_CTL3:
2810                 /* Drop writes to this legacy MSR -- see rdmsr
2811                  * counterpart for further detail.
2812                  */
2813                 if (report_ignored_msrs)
2814                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
2815                                 msr, data);
2816                 break;
2817         case MSR_AMD64_OSVW_ID_LENGTH:
2818                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2819                         return 1;
2820                 vcpu->arch.osvw.length = data;
2821                 break;
2822         case MSR_AMD64_OSVW_STATUS:
2823                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2824                         return 1;
2825                 vcpu->arch.osvw.status = data;
2826                 break;
2827         case MSR_PLATFORM_INFO:
2828                 if (!msr_info->host_initiated ||
2829                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
2830                      cpuid_fault_enabled(vcpu)))
2831                         return 1;
2832                 vcpu->arch.msr_platform_info = data;
2833                 break;
2834         case MSR_MISC_FEATURES_ENABLES:
2835                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
2836                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
2837                      !supports_cpuid_fault(vcpu)))
2838                         return 1;
2839                 vcpu->arch.msr_misc_features_enables = data;
2840                 break;
2841         default:
2842                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2843                         return xen_hvm_config(vcpu, data);
2844                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2845                         return kvm_pmu_set_msr(vcpu, msr_info);
2846                 if (!ignore_msrs) {
2847                         vcpu_debug_ratelimited(vcpu, "unhandled wrmsr: 0x%x data 0x%llx\n",
2848                                     msr, data);
2849                         return 1;
2850                 } else {
2851                         if (report_ignored_msrs)
2852                                 vcpu_unimpl(vcpu,
2853                                         "ignored wrmsr: 0x%x data 0x%llx\n",
2854                                         msr, data);
2855                         break;
2856                 }
2857         }
2858         return 0;
2859 }
2860 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2861
2862 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
2863 {
2864         u64 data;
2865         u64 mcg_cap = vcpu->arch.mcg_cap;
2866         unsigned bank_num = mcg_cap & 0xff;
2867
2868         switch (msr) {
2869         case MSR_IA32_P5_MC_ADDR:
2870         case MSR_IA32_P5_MC_TYPE:
2871                 data = 0;
2872                 break;
2873         case MSR_IA32_MCG_CAP:
2874                 data = vcpu->arch.mcg_cap;
2875                 break;
2876         case MSR_IA32_MCG_CTL:
2877                 if (!(mcg_cap & MCG_CTL_P) && !host)
2878                         return 1;
2879                 data = vcpu->arch.mcg_ctl;
2880                 break;
2881         case MSR_IA32_MCG_STATUS:
2882                 data = vcpu->arch.mcg_status;
2883                 break;
2884         default:
2885                 if (msr >= MSR_IA32_MC0_CTL &&
2886                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2887                         u32 offset = msr - MSR_IA32_MC0_CTL;
2888                         data = vcpu->arch.mce_banks[offset];
2889                         break;
2890                 }
2891                 return 1;
2892         }
2893         *pdata = data;
2894         return 0;
2895 }
2896
2897 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2898 {
2899         switch (msr_info->index) {
2900         case MSR_IA32_PLATFORM_ID:
2901         case MSR_IA32_EBL_CR_POWERON:
2902         case MSR_IA32_DEBUGCTLMSR:
2903         case MSR_IA32_LASTBRANCHFROMIP:
2904         case MSR_IA32_LASTBRANCHTOIP:
2905         case MSR_IA32_LASTINTFROMIP:
2906         case MSR_IA32_LASTINTTOIP:
2907         case MSR_K8_SYSCFG:
2908         case MSR_K8_TSEG_ADDR:
2909         case MSR_K8_TSEG_MASK:
2910         case MSR_VM_HSAVE_PA:
2911         case MSR_K8_INT_PENDING_MSG:
2912         case MSR_AMD64_NB_CFG:
2913         case MSR_FAM10H_MMIO_CONF_BASE:
2914         case MSR_AMD64_BU_CFG2:
2915         case MSR_IA32_PERF_CTL:
2916         case MSR_AMD64_DC_CFG:
2917         case MSR_F15H_EX_CFG:
2918                 msr_info->data = 0;
2919                 break;
2920         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
2921         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2922         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2923         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2924         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2925                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2926                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2927                 msr_info->data = 0;
2928                 break;
2929         case MSR_IA32_UCODE_REV:
2930                 msr_info->data = vcpu->arch.microcode_version;
2931                 break;
2932         case MSR_IA32_ARCH_CAPABILITIES:
2933                 if (!msr_info->host_initiated &&
2934                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
2935                         return 1;
2936                 msr_info->data = vcpu->arch.arch_capabilities;
2937                 break;
2938         case MSR_IA32_POWER_CTL:
2939                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
2940                 break;
2941         case MSR_IA32_TSC:
2942                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc()) + vcpu->arch.tsc_offset;
2943                 break;
2944         case MSR_MTRRcap:
2945         case 0x200 ... 0x2ff:
2946                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2947         case 0xcd: /* fsb frequency */
2948                 msr_info->data = 3;
2949                 break;
2950                 /*
2951                  * MSR_EBC_FREQUENCY_ID
2952                  * Conservative value valid for even the basic CPU models.
2953                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2954                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2955                  * and 266MHz for model 3, or 4. Set Core Clock
2956                  * Frequency to System Bus Frequency Ratio to 1 (bits
2957                  * 31:24) even though these are only valid for CPU
2958                  * models > 2, however guests may end up dividing or
2959                  * multiplying by zero otherwise.
2960                  */
2961         case MSR_EBC_FREQUENCY_ID:
2962                 msr_info->data = 1 << 24;
2963                 break;
2964         case MSR_IA32_APICBASE:
2965                 msr_info->data = kvm_get_apic_base(vcpu);
2966                 break;
2967         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2968                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2969                 break;
2970         case MSR_IA32_TSCDEADLINE:
2971                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2972                 break;
2973         case MSR_IA32_TSC_ADJUST:
2974                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2975                 break;
2976         case MSR_IA32_MISC_ENABLE:
2977                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2978                 break;
2979         case MSR_IA32_SMBASE:
2980                 if (!msr_info->host_initiated)
2981                         return 1;
2982                 msr_info->data = vcpu->arch.smbase;
2983                 break;
2984         case MSR_SMI_COUNT:
2985                 msr_info->data = vcpu->arch.smi_count;
2986                 break;
2987         case MSR_IA32_PERF_STATUS:
2988                 /* TSC increment by tick */
2989                 msr_info->data = 1000ULL;
2990                 /* CPU multiplier */
2991                 msr_info->data |= (((uint64_t)4ULL) << 40);
2992                 break;
2993         case MSR_EFER:
2994                 msr_info->data = vcpu->arch.efer;
2995                 break;
2996         case MSR_KVM_WALL_CLOCK:
2997         case MSR_KVM_WALL_CLOCK_NEW:
2998                 msr_info->data = vcpu->kvm->arch.wall_clock;
2999                 break;
3000         case MSR_KVM_SYSTEM_TIME:
3001         case MSR_KVM_SYSTEM_TIME_NEW:
3002                 msr_info->data = vcpu->arch.time;
3003                 break;
3004         case MSR_KVM_ASYNC_PF_EN:
3005                 msr_info->data = vcpu->arch.apf.msr_val;
3006                 break;
3007         case MSR_KVM_STEAL_TIME:
3008                 msr_info->data = vcpu->arch.st.msr_val;
3009                 break;
3010         case MSR_KVM_PV_EOI_EN:
3011                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3012                 break;
3013         case MSR_KVM_POLL_CONTROL:
3014                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3015                 break;
3016         case MSR_IA32_P5_MC_ADDR:
3017         case MSR_IA32_P5_MC_TYPE:
3018         case MSR_IA32_MCG_CAP:
3019         case MSR_IA32_MCG_CTL:
3020         case MSR_IA32_MCG_STATUS:
3021         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3022                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3023                                    msr_info->host_initiated);
3024         case MSR_K7_CLK_CTL:
3025                 /*
3026                  * Provide expected ramp-up count for K7. All other
3027                  * are set to zero, indicating minimum divisors for
3028                  * every field.
3029                  *
3030                  * This prevents guest kernels on AMD host with CPU
3031                  * type 6, model 8 and higher from exploding due to
3032                  * the rdmsr failing.
3033                  */
3034                 msr_info->data = 0x20000000;
3035                 break;
3036         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3037         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3038         case HV_X64_MSR_CRASH_CTL:
3039         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3040         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3041         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3042         case HV_X64_MSR_TSC_EMULATION_STATUS:
3043                 return kvm_hv_get_msr_common(vcpu,
3044                                              msr_info->index, &msr_info->data,
3045                                              msr_info->host_initiated);
3046                 break;
3047         case MSR_IA32_BBL_CR_CTL3:
3048                 /* This legacy MSR exists but isn't fully documented in current
3049                  * silicon.  It is however accessed by winxp in very narrow
3050                  * scenarios where it sets bit #19, itself documented as
3051                  * a "reserved" bit.  Best effort attempt to source coherent
3052                  * read data here should the balance of the register be
3053                  * interpreted by the guest:
3054                  *
3055                  * L2 cache control register 3: 64GB range, 256KB size,
3056                  * enabled, latency 0x1, configured
3057                  */
3058                 msr_info->data = 0xbe702111;
3059                 break;
3060         case MSR_AMD64_OSVW_ID_LENGTH:
3061                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3062                         return 1;
3063                 msr_info->data = vcpu->arch.osvw.length;
3064                 break;
3065         case MSR_AMD64_OSVW_STATUS:
3066                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3067                         return 1;
3068                 msr_info->data = vcpu->arch.osvw.status;
3069                 break;
3070         case MSR_PLATFORM_INFO:
3071                 if (!msr_info->host_initiated &&
3072                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
3073                         return 1;
3074                 msr_info->data = vcpu->arch.msr_platform_info;
3075                 break;
3076         case MSR_MISC_FEATURES_ENABLES:
3077                 msr_info->data = vcpu->arch.msr_misc_features_enables;
3078                 break;
3079         case MSR_K7_HWCR:
3080                 msr_info->data = vcpu->arch.msr_hwcr;
3081                 break;
3082         default:
3083                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3084                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
3085                 if (!ignore_msrs) {
3086                         vcpu_debug_ratelimited(vcpu, "unhandled rdmsr: 0x%x\n",
3087                                                msr_info->index);
3088                         return 1;
3089                 } else {
3090                         if (report_ignored_msrs)
3091                                 vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n",
3092                                         msr_info->index);
3093                         msr_info->data = 0;
3094                 }
3095                 break;
3096         }
3097         return 0;
3098 }
3099 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
3100
3101 /*
3102  * Read or write a bunch of msrs. All parameters are kernel addresses.
3103  *
3104  * @return number of msrs set successfully.
3105  */
3106 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
3107                     struct kvm_msr_entry *entries,
3108                     int (*do_msr)(struct kvm_vcpu *vcpu,
3109                                   unsigned index, u64 *data))
3110 {
3111         int i;
3112
3113         for (i = 0; i < msrs->nmsrs; ++i)
3114                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
3115                         break;
3116
3117         return i;
3118 }
3119
3120 /*
3121  * Read or write a bunch of msrs. Parameters are user addresses.
3122  *
3123  * @return number of msrs set successfully.
3124  */
3125 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
3126                   int (*do_msr)(struct kvm_vcpu *vcpu,
3127                                 unsigned index, u64 *data),
3128                   int writeback)
3129 {
3130         struct kvm_msrs msrs;
3131         struct kvm_msr_entry *entries;
3132         int r, n;
3133         unsigned size;
3134
3135         r = -EFAULT;
3136         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
3137                 goto out;
3138
3139         r = -E2BIG;
3140         if (msrs.nmsrs >= MAX_IO_MSRS)
3141                 goto out;
3142
3143         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
3144         entries = memdup_user(user_msrs->entries, size);
3145         if (IS_ERR(entries)) {
3146                 r = PTR_ERR(entries);
3147                 goto out;
3148         }
3149
3150         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
3151         if (r < 0)
3152                 goto out_free;
3153
3154         r = -EFAULT;
3155         if (writeback && copy_to_user(user_msrs->entries, entries, size))
3156                 goto out_free;
3157
3158         r = n;
3159
3160 out_free:
3161         kfree(entries);
3162 out:
3163         return r;
3164 }
3165
3166 static inline bool kvm_can_mwait_in_guest(void)
3167 {
3168         return boot_cpu_has(X86_FEATURE_MWAIT) &&
3169                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
3170                 boot_cpu_has(X86_FEATURE_ARAT);
3171 }
3172
3173 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
3174 {
3175         int r = 0;
3176
3177         switch (ext) {
3178         case KVM_CAP_IRQCHIP:
3179         case KVM_CAP_HLT:
3180         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
3181         case KVM_CAP_SET_TSS_ADDR:
3182         case KVM_CAP_EXT_CPUID:
3183         case KVM_CAP_EXT_EMUL_CPUID:
3184         case KVM_CAP_CLOCKSOURCE:
3185         case KVM_CAP_PIT:
3186         case KVM_CAP_NOP_IO_DELAY:
3187         case KVM_CAP_MP_STATE:
3188         case KVM_CAP_SYNC_MMU:
3189         case KVM_CAP_USER_NMI:
3190         case KVM_CAP_REINJECT_CONTROL:
3191         case KVM_CAP_IRQ_INJECT_STATUS:
3192         case KVM_CAP_IOEVENTFD:
3193         case KVM_CAP_IOEVENTFD_NO_LENGTH:
3194         case KVM_CAP_PIT2:
3195         case KVM_CAP_PIT_STATE2:
3196         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
3197         case KVM_CAP_XEN_HVM:
3198         case KVM_CAP_VCPU_EVENTS:
3199         case KVM_CAP_HYPERV:
3200         case KVM_CAP_HYPERV_VAPIC:
3201         case KVM_CAP_HYPERV_SPIN:
3202         case KVM_CAP_HYPERV_SYNIC:
3203         case KVM_CAP_HYPERV_SYNIC2:
3204         case KVM_CAP_HYPERV_VP_INDEX:
3205         case KVM_CAP_HYPERV_EVENTFD:
3206         case KVM_CAP_HYPERV_TLBFLUSH:
3207         case KVM_CAP_HYPERV_SEND_IPI:
3208         case KVM_CAP_HYPERV_CPUID:
3209         case KVM_CAP_PCI_SEGMENT:
3210         case KVM_CAP_DEBUGREGS:
3211         case KVM_CAP_X86_ROBUST_SINGLESTEP:
3212         case KVM_CAP_XSAVE:
3213         case KVM_CAP_ASYNC_PF:
3214         case KVM_CAP_GET_TSC_KHZ:
3215         case KVM_CAP_KVMCLOCK_CTRL:
3216         case KVM_CAP_READONLY_MEM:
3217         case KVM_CAP_HYPERV_TIME:
3218         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
3219         case KVM_CAP_TSC_DEADLINE_TIMER:
3220         case KVM_CAP_DISABLE_QUIRKS:
3221         case KVM_CAP_SET_BOOT_CPU_ID:
3222         case KVM_CAP_SPLIT_IRQCHIP:
3223         case KVM_CAP_IMMEDIATE_EXIT:
3224         case KVM_CAP_PMU_EVENT_FILTER:
3225         case KVM_CAP_GET_MSR_FEATURES:
3226         case KVM_CAP_MSR_PLATFORM_INFO:
3227         case KVM_CAP_EXCEPTION_PAYLOAD:
3228                 r = 1;
3229                 break;
3230         case KVM_CAP_SYNC_REGS:
3231                 r = KVM_SYNC_X86_VALID_FIELDS;
3232                 break;
3233         case KVM_CAP_ADJUST_CLOCK:
3234                 r = KVM_CLOCK_TSC_STABLE;
3235                 break;
3236         case KVM_CAP_X86_DISABLE_EXITS:
3237                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
3238                       KVM_X86_DISABLE_EXITS_CSTATE;
3239                 if(kvm_can_mwait_in_guest())
3240                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
3241                 break;
3242         case KVM_CAP_X86_SMM:
3243                 /* SMBASE is usually relocated above 1M on modern chipsets,
3244                  * and SMM handlers might indeed rely on 4G segment limits,
3245                  * so do not report SMM to be available if real mode is
3246                  * emulated via vm86 mode.  Still, do not go to great lengths
3247                  * to avoid userspace's usage of the feature, because it is a
3248                  * fringe case that is not enabled except via specific settings
3249                  * of the module parameters.
3250                  */
3251                 r = kvm_x86_ops->has_emulated_msr(MSR_IA32_SMBASE);
3252                 break;
3253         case KVM_CAP_VAPIC:
3254                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
3255                 break;
3256         case KVM_CAP_NR_VCPUS:
3257                 r = KVM_SOFT_MAX_VCPUS;
3258                 break;
3259         case KVM_CAP_MAX_VCPUS:
3260                 r = KVM_MAX_VCPUS;
3261                 break;
3262         case KVM_CAP_MAX_VCPU_ID:
3263                 r = KVM_MAX_VCPU_ID;
3264                 break;
3265         case KVM_CAP_PV_MMU:    /* obsolete */
3266                 r = 0;
3267                 break;
3268         case KVM_CAP_MCE:
3269                 r = KVM_MAX_MCE_BANKS;
3270                 break;
3271         case KVM_CAP_XCRS:
3272                 r = boot_cpu_has(X86_FEATURE_XSAVE);
3273                 break;
3274         case KVM_CAP_TSC_CONTROL:
3275                 r = kvm_has_tsc_control;
3276                 break;
3277         case KVM_CAP_X2APIC_API:
3278                 r = KVM_X2APIC_API_VALID_FLAGS;
3279                 break;
3280         case KVM_CAP_NESTED_STATE:
3281                 r = kvm_x86_ops->get_nested_state ?
3282                         kvm_x86_ops->get_nested_state(NULL, NULL, 0) : 0;
3283                 break;
3284         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
3285                 r = kvm_x86_ops->enable_direct_tlbflush != NULL;
3286                 break;
3287         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
3288                 r = kvm_x86_ops->nested_enable_evmcs != NULL;
3289                 break;
3290         default:
3291                 break;
3292         }
3293         return r;
3294
3295 }
3296
3297 long kvm_arch_dev_ioctl(struct file *filp,
3298                         unsigned int ioctl, unsigned long arg)
3299 {
3300         void __user *argp = (void __user *)arg;
3301         long r;
3302
3303         switch (ioctl) {
3304         case KVM_GET_MSR_INDEX_LIST: {
3305                 struct kvm_msr_list __user *user_msr_list = argp;
3306                 struct kvm_msr_list msr_list;
3307                 unsigned n;
3308
3309                 r = -EFAULT;
3310                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3311                         goto out;
3312                 n = msr_list.nmsrs;
3313                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
3314                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3315                         goto out;
3316                 r = -E2BIG;
3317                 if (n < msr_list.nmsrs)
3318                         goto out;
3319                 r = -EFAULT;
3320                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
3321                                  num_msrs_to_save * sizeof(u32)))
3322                         goto out;
3323                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
3324                                  &emulated_msrs,
3325                                  num_emulated_msrs * sizeof(u32)))
3326                         goto out;
3327                 r = 0;
3328                 break;
3329         }
3330         case KVM_GET_SUPPORTED_CPUID:
3331         case KVM_GET_EMULATED_CPUID: {
3332                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3333                 struct kvm_cpuid2 cpuid;
3334
3335                 r = -EFAULT;
3336                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3337                         goto out;
3338
3339                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
3340                                             ioctl);
3341                 if (r)
3342                         goto out;
3343
3344                 r = -EFAULT;
3345                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3346                         goto out;
3347                 r = 0;
3348                 break;
3349         }
3350         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
3351                 r = -EFAULT;
3352                 if (copy_to_user(argp, &kvm_mce_cap_supported,
3353                                  sizeof(kvm_mce_cap_supported)))
3354                         goto out;
3355                 r = 0;
3356                 break;
3357         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
3358                 struct kvm_msr_list __user *user_msr_list = argp;
3359                 struct kvm_msr_list msr_list;
3360                 unsigned int n;
3361
3362                 r = -EFAULT;
3363                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3364                         goto out;
3365                 n = msr_list.nmsrs;
3366                 msr_list.nmsrs = num_msr_based_features;
3367                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3368                         goto out;
3369                 r = -E2BIG;
3370                 if (n < msr_list.nmsrs)
3371                         goto out;
3372                 r = -EFAULT;
3373                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
3374                                  num_msr_based_features * sizeof(u32)))
3375                         goto out;
3376                 r = 0;
3377                 break;
3378         }
3379         case KVM_GET_MSRS:
3380                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
3381                 break;
3382         }
3383         default:
3384                 r = -EINVAL;
3385         }
3386 out:
3387         return r;
3388 }
3389
3390 static void wbinvd_ipi(void *garbage)
3391 {
3392         wbinvd();
3393 }
3394
3395 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
3396 {
3397         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
3398 }
3399
3400 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
3401 {
3402         /* Address WBINVD may be executed by guest */
3403         if (need_emulate_wbinvd(vcpu)) {
3404                 if (kvm_x86_ops->has_wbinvd_exit())
3405                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
3406                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
3407                         smp_call_function_single(vcpu->cpu,
3408                                         wbinvd_ipi, NULL, 1);
3409         }
3410
3411         kvm_x86_ops->vcpu_load(vcpu, cpu);
3412
3413         fpregs_assert_state_consistent();
3414         if (test_thread_flag(TIF_NEED_FPU_LOAD))
3415                 switch_fpu_return();
3416
3417         /* Apply any externally detected TSC adjustments (due to suspend) */
3418         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
3419                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
3420                 vcpu->arch.tsc_offset_adjustment = 0;
3421                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3422         }
3423
3424         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
3425                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
3426                                 rdtsc() - vcpu->arch.last_host_tsc;
3427                 if (tsc_delta < 0)
3428                         mark_tsc_unstable("KVM discovered backwards TSC");
3429
3430                 if (kvm_check_tsc_unstable()) {
3431                         u64 offset = kvm_compute_tsc_offset(vcpu,
3432                                                 vcpu->arch.last_guest_tsc);
3433                         kvm_vcpu_write_tsc_offset(vcpu, offset);
3434                         vcpu->arch.tsc_catchup = 1;
3435                 }
3436
3437                 if (kvm_lapic_hv_timer_in_use(vcpu))
3438                         kvm_lapic_restart_hv_timer(vcpu);
3439
3440                 /*
3441                  * On a host with synchronized TSC, there is no need to update
3442                  * kvmclock on vcpu->cpu migration
3443                  */
3444                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
3445                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
3446                 if (vcpu->cpu != cpu)
3447                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
3448                 vcpu->cpu = cpu;
3449         }
3450
3451         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3452 }
3453
3454 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
3455 {
3456         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3457                 return;
3458
3459         vcpu->arch.st.steal.preempted = KVM_VCPU_PREEMPTED;
3460
3461         kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.st.stime,
3462                         &vcpu->arch.st.steal.preempted,
3463                         offsetof(struct kvm_steal_time, preempted),
3464                         sizeof(vcpu->arch.st.steal.preempted));
3465 }
3466
3467 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
3468 {
3469         int idx;
3470
3471         if (vcpu->preempted)
3472                 vcpu->arch.preempted_in_kernel = !kvm_x86_ops->get_cpl(vcpu);
3473
3474         /*
3475          * Disable page faults because we're in atomic context here.
3476          * kvm_write_guest_offset_cached() would call might_fault()
3477          * that relies on pagefault_disable() to tell if there's a
3478          * bug. NOTE: the write to guest memory may not go through if
3479          * during postcopy live migration or if there's heavy guest
3480          * paging.
3481          */
3482         pagefault_disable();
3483         /*
3484          * kvm_memslots() will be called by
3485          * kvm_write_guest_offset_cached() so take the srcu lock.
3486          */
3487         idx = srcu_read_lock(&vcpu->kvm->srcu);
3488         kvm_steal_time_set_preempted(vcpu);
3489         srcu_read_unlock(&vcpu->kvm->srcu, idx);
3490         pagefault_enable();
3491         kvm_x86_ops->vcpu_put(vcpu);
3492         vcpu->arch.last_host_tsc = rdtsc();
3493         /*
3494          * If userspace has set any breakpoints or watchpoints, dr6 is restored
3495          * on every vmexit, but if not, we might have a stale dr6 from the
3496          * guest. do_debug expects dr6 to be cleared after it runs, do the same.
3497          */
3498         set_debugreg(0, 6);
3499 }
3500
3501 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
3502                                     struct kvm_lapic_state *s)
3503 {
3504         if (vcpu->arch.apicv_active)
3505                 kvm_x86_ops->sync_pir_to_irr(vcpu);
3506
3507         return kvm_apic_get_state(vcpu, s);
3508 }
3509
3510 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
3511                                     struct kvm_lapic_state *s)
3512 {
3513         int r;
3514
3515         r = kvm_apic_set_state(vcpu, s);
3516         if (r)
3517                 return r;
3518         update_cr8_intercept(vcpu);
3519
3520         return 0;
3521 }
3522
3523 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
3524 {
3525         return (!lapic_in_kernel(vcpu) ||
3526                 kvm_apic_accept_pic_intr(vcpu));
3527 }
3528
3529 /*
3530  * if userspace requested an interrupt window, check that the
3531  * interrupt window is open.
3532  *
3533  * No need to exit to userspace if we already have an interrupt queued.
3534  */
3535 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
3536 {
3537         return kvm_arch_interrupt_allowed(vcpu) &&
3538                 !kvm_cpu_has_interrupt(vcpu) &&
3539                 !kvm_event_needs_reinjection(vcpu) &&
3540                 kvm_cpu_accept_dm_intr(vcpu);
3541 }
3542
3543 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
3544                                     struct kvm_interrupt *irq)
3545 {
3546         if (irq->irq >= KVM_NR_INTERRUPTS)
3547                 return -EINVAL;
3548
3549         if (!irqchip_in_kernel(vcpu->kvm)) {
3550                 kvm_queue_interrupt(vcpu, irq->irq, false);
3551                 kvm_make_request(KVM_REQ_EVENT, vcpu);
3552                 return 0;
3553         }
3554
3555         /*
3556          * With in-kernel LAPIC, we only use this to inject EXTINT, so
3557          * fail for in-kernel 8259.
3558          */
3559         if (pic_in_kernel(vcpu->kvm))
3560                 return -ENXIO;
3561
3562         if (vcpu->arch.pending_external_vector != -1)
3563                 return -EEXIST;
3564
3565         vcpu->arch.pending_external_vector = irq->irq;
3566         kvm_make_request(KVM_REQ_EVENT, vcpu);
3567         return 0;
3568 }
3569
3570 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
3571 {
3572         kvm_inject_nmi(vcpu);
3573
3574         return 0;
3575 }
3576
3577 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
3578 {
3579         kvm_make_request(KVM_REQ_SMI, vcpu);
3580
3581         return 0;
3582 }
3583
3584 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
3585                                            struct kvm_tpr_access_ctl *tac)
3586 {
3587         if (tac->flags)
3588                 return -EINVAL;
3589         vcpu->arch.tpr_access_reporting = !!tac->enabled;
3590         return 0;
3591 }
3592
3593 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
3594                                         u64 mcg_cap)
3595 {
3596         int r;
3597         unsigned bank_num = mcg_cap & 0xff, bank;
3598
3599         r = -EINVAL;
3600         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
3601                 goto out;
3602         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
3603                 goto out;
3604         r = 0;
3605         vcpu->arch.mcg_cap = mcg_cap;
3606         /* Init IA32_MCG_CTL to all 1s */
3607         if (mcg_cap & MCG_CTL_P)
3608                 vcpu->arch.mcg_ctl = ~(u64)0;
3609         /* Init IA32_MCi_CTL to all 1s */
3610         for (bank = 0; bank < bank_num; bank++)
3611                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
3612
3613         kvm_x86_ops->setup_mce(vcpu);
3614 out:
3615         return r;
3616 }
3617
3618 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
3619                                       struct kvm_x86_mce *mce)
3620 {
3621         u64 mcg_cap = vcpu->arch.mcg_cap;
3622         unsigned bank_num = mcg_cap & 0xff;
3623         u64 *banks = vcpu->arch.mce_banks;
3624
3625         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
3626                 return -EINVAL;
3627         /*
3628          * if IA32_MCG_CTL is not all 1s, the uncorrected error
3629          * reporting is disabled
3630          */
3631         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
3632             vcpu->arch.mcg_ctl != ~(u64)0)
3633                 return 0;
3634         banks += 4 * mce->bank;
3635         /*
3636          * if IA32_MCi_CTL is not all 1s, the uncorrected error
3637          * reporting is disabled for the bank
3638          */
3639         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
3640                 return 0;
3641         if (mce->status & MCI_STATUS_UC) {
3642                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
3643                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
3644                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3645                         return 0;
3646                 }
3647                 if (banks[1] & MCI_STATUS_VAL)
3648                         mce->status |= MCI_STATUS_OVER;
3649                 banks[2] = mce->addr;
3650                 banks[3] = mce->misc;
3651                 vcpu->arch.mcg_status = mce->mcg_status;
3652                 banks[1] = mce->status;
3653                 kvm_queue_exception(vcpu, MC_VECTOR);
3654         } else if (!(banks[1] & MCI_STATUS_VAL)
3655                    || !(banks[1] & MCI_STATUS_UC)) {
3656                 if (banks[1] & MCI_STATUS_VAL)
3657                         mce->status |= MCI_STATUS_OVER;
3658                 banks[2] = mce->addr;
3659                 banks[3] = mce->misc;
3660                 banks[1] = mce->status;
3661         } else
3662                 banks[1] |= MCI_STATUS_OVER;
3663         return 0;
3664 }
3665
3666 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
3667                                                struct kvm_vcpu_events *events)
3668 {
3669         process_nmi(vcpu);
3670
3671         /*
3672          * The API doesn't provide the instruction length for software
3673          * exceptions, so don't report them. As long as the guest RIP
3674          * isn't advanced, we should expect to encounter the exception
3675          * again.
3676          */
3677         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
3678                 events->exception.injected = 0;
3679                 events->exception.pending = 0;
3680         } else {
3681                 events->exception.injected = vcpu->arch.exception.injected;
3682                 events->exception.pending = vcpu->arch.exception.pending;
3683                 /*
3684                  * For ABI compatibility, deliberately conflate
3685                  * pending and injected exceptions when
3686                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
3687                  */
3688                 if (!vcpu->kvm->arch.exception_payload_enabled)
3689                         events->exception.injected |=
3690                                 vcpu->arch.exception.pending;
3691         }
3692         events->exception.nr = vcpu->arch.exception.nr;
3693         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
3694         events->exception.error_code = vcpu->arch.exception.error_code;
3695         events->exception_has_payload = vcpu->arch.exception.has_payload;
3696         events->exception_payload = vcpu->arch.exception.payload;
3697
3698         events->interrupt.injected =
3699                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
3700         events->interrupt.nr = vcpu->arch.interrupt.nr;
3701         events->interrupt.soft = 0;
3702         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
3703
3704         events->nmi.injected = vcpu->arch.nmi_injected;
3705         events->nmi.pending = vcpu->arch.nmi_pending != 0;
3706         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
3707         events->nmi.pad = 0;
3708
3709         events->sipi_vector = 0; /* never valid when reporting to user space */
3710
3711         events->smi.smm = is_smm(vcpu);
3712         events->smi.pending = vcpu->arch.smi_pending;
3713         events->smi.smm_inside_nmi =
3714                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
3715         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
3716
3717         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
3718                          | KVM_VCPUEVENT_VALID_SHADOW
3719                          | KVM_VCPUEVENT_VALID_SMM);
3720         if (vcpu->kvm->arch.exception_payload_enabled)
3721                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
3722
3723         memset(&events->reserved, 0, sizeof(events->reserved));
3724 }
3725
3726 static void kvm_smm_changed(struct kvm_vcpu *vcpu);
3727
3728 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
3729                                               struct kvm_vcpu_events *events)
3730 {
3731         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3732                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3733                               | KVM_VCPUEVENT_VALID_SHADOW
3734                               | KVM_VCPUEVENT_VALID_SMM
3735                               | KVM_VCPUEVENT_VALID_PAYLOAD))
3736                 return -EINVAL;
3737
3738         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
3739                 if (!vcpu->kvm->arch.exception_payload_enabled)
3740                         return -EINVAL;
3741                 if (events->exception.pending)
3742                         events->exception.injected = 0;
3743                 else
3744                         events->exception_has_payload = 0;
3745         } else {
3746                 events->exception.pending = 0;
3747                 events->exception_has_payload = 0;
3748         }
3749
3750         if ((events->exception.injected || events->exception.pending) &&
3751             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
3752                 return -EINVAL;
3753
3754         /* INITs are latched while in SMM */
3755         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
3756             (events->smi.smm || events->smi.pending) &&
3757             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
3758                 return -EINVAL;
3759
3760         process_nmi(vcpu);
3761         vcpu->arch.exception.injected = events->exception.injected;
3762         vcpu->arch.exception.pending = events->exception.pending;
3763         vcpu->arch.exception.nr = events->exception.nr;
3764         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3765         vcpu->arch.exception.error_code = events->exception.error_code;
3766         vcpu->arch.exception.has_payload = events->exception_has_payload;
3767         vcpu->arch.exception.payload = events->exception_payload;
3768
3769         vcpu->arch.interrupt.injected = events->interrupt.injected;
3770         vcpu->arch.interrupt.nr = events->interrupt.nr;
3771         vcpu->arch.interrupt.soft = events->interrupt.soft;
3772         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3773                 kvm_x86_ops->set_interrupt_shadow(vcpu,
3774                                                   events->interrupt.shadow);
3775
3776         vcpu->arch.nmi_injected = events->nmi.injected;
3777         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3778                 vcpu->arch.nmi_pending = events->nmi.pending;
3779         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3780
3781         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3782             lapic_in_kernel(vcpu))
3783                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3784
3785         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
3786                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
3787                         if (events->smi.smm)
3788                                 vcpu->arch.hflags |= HF_SMM_MASK;
3789                         else
3790                                 vcpu->arch.hflags &= ~HF_SMM_MASK;
3791                         kvm_smm_changed(vcpu);
3792                 }
3793
3794                 vcpu->arch.smi_pending = events->smi.pending;
3795
3796                 if (events->smi.smm) {
3797                         if (events->smi.smm_inside_nmi)
3798                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3799                         else
3800                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3801                         if (lapic_in_kernel(vcpu)) {
3802                                 if (events->smi.latched_init)
3803                                         set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3804                                 else
3805                                         clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3806                         }
3807                 }
3808         }
3809
3810         kvm_make_request(KVM_REQ_EVENT, vcpu);
3811
3812         return 0;
3813 }
3814
3815 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3816                                              struct kvm_debugregs *dbgregs)
3817 {
3818         unsigned long val;
3819
3820         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3821         kvm_get_dr(vcpu, 6, &val);
3822         dbgregs->dr6 = val;
3823         dbgregs->dr7 = vcpu->arch.dr7;
3824         dbgregs->flags = 0;
3825         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3826 }
3827
3828 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3829                                             struct kvm_debugregs *dbgregs)
3830 {
3831         if (dbgregs->flags)
3832                 return -EINVAL;
3833
3834         if (dbgregs->dr6 & ~0xffffffffull)
3835                 return -EINVAL;
3836         if (dbgregs->dr7 & ~0xffffffffull)
3837                 return -EINVAL;
3838
3839         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3840         kvm_update_dr0123(vcpu);
3841         vcpu->arch.dr6 = dbgregs->dr6;
3842         kvm_update_dr6(vcpu);
3843         vcpu->arch.dr7 = dbgregs->dr7;
3844         kvm_update_dr7(vcpu);
3845
3846         return 0;
3847 }
3848
3849 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3850
3851 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3852 {
3853         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
3854         u64 xstate_bv = xsave->header.xfeatures;
3855         u64 valid;
3856
3857         /*
3858          * Copy legacy XSAVE area, to avoid complications with CPUID
3859          * leaves 0 and 1 in the loop below.
3860          */
3861         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3862
3863         /* Set XSTATE_BV */
3864         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
3865         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3866
3867         /*
3868          * Copy each region from the possibly compacted offset to the
3869          * non-compacted offset.
3870          */
3871         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3872         while (valid) {
3873                 u64 xfeature_mask = valid & -valid;
3874                 int xfeature_nr = fls64(xfeature_mask) - 1;
3875                 void *src = get_xsave_addr(xsave, xfeature_nr);
3876
3877                 if (src) {
3878                         u32 size, offset, ecx, edx;
3879                         cpuid_count(XSTATE_CPUID, xfeature_nr,
3880                                     &size, &offset, &ecx, &edx);
3881                         if (xfeature_nr == XFEATURE_PKRU)
3882                                 memcpy(dest + offset, &vcpu->arch.pkru,
3883                                        sizeof(vcpu->arch.pkru));
3884                         else
3885                                 memcpy(dest + offset, src, size);
3886
3887                 }
3888
3889                 valid -= xfeature_mask;
3890         }
3891 }
3892
3893 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3894 {
3895         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
3896         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3897         u64 valid;
3898
3899         /*
3900          * Copy legacy XSAVE area, to avoid complications with CPUID
3901          * leaves 0 and 1 in the loop below.
3902          */
3903         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3904
3905         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3906         xsave->header.xfeatures = xstate_bv;
3907         if (boot_cpu_has(X86_FEATURE_XSAVES))
3908                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3909
3910         /*
3911          * Copy each region from the non-compacted offset to the
3912          * possibly compacted offset.
3913          */
3914         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3915         while (valid) {
3916                 u64 xfeature_mask = valid & -valid;
3917                 int xfeature_nr = fls64(xfeature_mask) - 1;
3918                 void *dest = get_xsave_addr(xsave, xfeature_nr);
3919
3920                 if (dest) {
3921                         u32 size, offset, ecx, edx;
3922                         cpuid_count(XSTATE_CPUID, xfeature_nr,
3923                                     &size, &offset, &ecx, &edx);
3924                         if (xfeature_nr == XFEATURE_PKRU)
3925                                 memcpy(&vcpu->arch.pkru, src + offset,
3926                                        sizeof(vcpu->arch.pkru));
3927                         else
3928                                 memcpy(dest, src + offset, size);
3929                 }
3930
3931                 valid -= xfeature_mask;
3932         }
3933 }
3934
3935 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3936                                          struct kvm_xsave *guest_xsave)
3937 {
3938         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3939                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3940                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3941         } else {
3942                 memcpy(guest_xsave->region,
3943                         &vcpu->arch.guest_fpu->state.fxsave,
3944                         sizeof(struct fxregs_state));
3945                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3946                         XFEATURE_MASK_FPSSE;
3947         }
3948 }
3949
3950 #define XSAVE_MXCSR_OFFSET 24
3951
3952 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3953                                         struct kvm_xsave *guest_xsave)
3954 {
3955         u64 xstate_bv =
3956                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3957         u32 mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
3958
3959         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3960                 /*
3961                  * Here we allow setting states that are not present in
3962                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3963                  * with old userspace.
3964                  */
3965                 if (xstate_bv & ~kvm_supported_xcr0() ||
3966                         mxcsr & ~mxcsr_feature_mask)
3967                         return -EINVAL;
3968                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3969         } else {
3970                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
3971                         mxcsr & ~mxcsr_feature_mask)
3972                         return -EINVAL;
3973                 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
3974                         guest_xsave->region, sizeof(struct fxregs_state));
3975         }
3976         return 0;
3977 }
3978
3979 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3980                                         struct kvm_xcrs *guest_xcrs)
3981 {
3982         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
3983                 guest_xcrs->nr_xcrs = 0;
3984                 return;
3985         }
3986
3987         guest_xcrs->nr_xcrs = 1;
3988         guest_xcrs->flags = 0;
3989         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3990         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3991 }
3992
3993 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3994                                        struct kvm_xcrs *guest_xcrs)
3995 {
3996         int i, r = 0;
3997
3998         if (!boot_cpu_has(X86_FEATURE_XSAVE))
3999                 return -EINVAL;
4000
4001         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
4002                 return -EINVAL;
4003
4004         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
4005                 /* Only support XCR0 currently */
4006                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
4007                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
4008                                 guest_xcrs->xcrs[i].value);
4009                         break;
4010                 }
4011         if (r)
4012                 r = -EINVAL;
4013         return r;
4014 }
4015
4016 /*
4017  * kvm_set_guest_paused() indicates to the guest kernel that it has been
4018  * stopped by the hypervisor.  This function will be called from the host only.
4019  * EINVAL is returned when the host attempts to set the flag for a guest that
4020  * does not support pv clocks.
4021  */
4022 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
4023 {
4024         if (!vcpu->arch.pv_time_enabled)
4025                 return -EINVAL;
4026         vcpu->arch.pvclock_set_guest_stopped_request = true;
4027         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4028         return 0;
4029 }
4030
4031 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
4032                                      struct kvm_enable_cap *cap)
4033 {
4034         int r;
4035         uint16_t vmcs_version;
4036         void __user *user_ptr;
4037
4038         if (cap->flags)
4039                 return -EINVAL;
4040
4041         switch (cap->cap) {
4042         case KVM_CAP_HYPERV_SYNIC2:
4043                 if (cap->args[0])
4044                         return -EINVAL;
4045                 /* fall through */
4046
4047         case KVM_CAP_HYPERV_SYNIC:
4048                 if (!irqchip_in_kernel(vcpu->kvm))
4049                         return -EINVAL;
4050                 return kvm_hv_activate_synic(vcpu, cap->cap ==
4051                                              KVM_CAP_HYPERV_SYNIC2);
4052         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4053                 if (!kvm_x86_ops->nested_enable_evmcs)
4054                         return -ENOTTY;
4055                 r = kvm_x86_ops->nested_enable_evmcs(vcpu, &vmcs_version);
4056                 if (!r) {
4057                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
4058                         if (copy_to_user(user_ptr, &vmcs_version,
4059                                          sizeof(vmcs_version)))
4060                                 r = -EFAULT;
4061                 }
4062                 return r;
4063         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4064                 if (!kvm_x86_ops->enable_direct_tlbflush)
4065                         return -ENOTTY;
4066
4067                 return kvm_x86_ops->enable_direct_tlbflush(vcpu);
4068
4069         default:
4070                 return -EINVAL;
4071         }
4072 }
4073
4074 long kvm_arch_vcpu_ioctl(struct file *filp,
4075                          unsigned int ioctl, unsigned long arg)
4076 {
4077         struct kvm_vcpu *vcpu = filp->private_data;
4078         void __user *argp = (void __user *)arg;
4079         int r;
4080         union {
4081                 struct kvm_lapic_state *lapic;
4082                 struct kvm_xsave *xsave;
4083                 struct kvm_xcrs *xcrs;
4084                 void *buffer;
4085         } u;
4086
4087         vcpu_load(vcpu);
4088
4089         u.buffer = NULL;
4090         switch (ioctl) {
4091         case KVM_GET_LAPIC: {
4092                 r = -EINVAL;
4093                 if (!lapic_in_kernel(vcpu))
4094                         goto out;
4095                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
4096                                 GFP_KERNEL_ACCOUNT);
4097
4098                 r = -ENOMEM;
4099                 if (!u.lapic)
4100                         goto out;
4101                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
4102                 if (r)
4103                         goto out;
4104                 r = -EFAULT;
4105                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
4106                         goto out;
4107                 r = 0;
4108                 break;
4109         }
4110         case KVM_SET_LAPIC: {
4111                 r = -EINVAL;
4112                 if (!lapic_in_kernel(vcpu))
4113                         goto out;
4114                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
4115                 if (IS_ERR(u.lapic)) {
4116                         r = PTR_ERR(u.lapic);
4117                         goto out_nofree;
4118                 }
4119
4120                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
4121                 break;
4122         }
4123         case KVM_INTERRUPT: {
4124                 struct kvm_interrupt irq;
4125
4126                 r = -EFAULT;
4127                 if (copy_from_user(&irq, argp, sizeof(irq)))
4128                         goto out;
4129                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
4130                 break;
4131         }
4132         case KVM_NMI: {
4133                 r = kvm_vcpu_ioctl_nmi(vcpu);
4134                 break;
4135         }
4136         case KVM_SMI: {
4137                 r = kvm_vcpu_ioctl_smi(vcpu);
4138                 break;
4139         }
4140         case KVM_SET_CPUID: {
4141                 struct kvm_cpuid __user *cpuid_arg = argp;
4142                 struct kvm_cpuid cpuid;
4143
4144                 r = -EFAULT;
4145                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4146                         goto out;
4147                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4148                 break;
4149         }
4150         case KVM_SET_CPUID2: {
4151                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4152                 struct kvm_cpuid2 cpuid;
4153
4154                 r = -EFAULT;
4155                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4156                         goto out;
4157                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
4158                                               cpuid_arg->entries);
4159                 break;
4160         }
4161         case KVM_GET_CPUID2: {
4162                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4163                 struct kvm_cpuid2 cpuid;
4164
4165                 r = -EFAULT;
4166                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4167                         goto out;
4168                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
4169                                               cpuid_arg->entries);
4170                 if (r)
4171                         goto out;
4172                 r = -EFAULT;
4173                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4174                         goto out;
4175                 r = 0;
4176                 break;
4177         }
4178         case KVM_GET_MSRS: {
4179                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4180                 r = msr_io(vcpu, argp, do_get_msr, 1);
4181                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4182                 break;
4183         }
4184         case KVM_SET_MSRS: {
4185                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4186                 r = msr_io(vcpu, argp, do_set_msr, 0);
4187                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4188                 break;
4189         }
4190         case KVM_TPR_ACCESS_REPORTING: {
4191                 struct kvm_tpr_access_ctl tac;
4192
4193                 r = -EFAULT;
4194                 if (copy_from_user(&tac, argp, sizeof(tac)))
4195                         goto out;
4196                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
4197                 if (r)
4198                         goto out;
4199                 r = -EFAULT;
4200                 if (copy_to_user(argp, &tac, sizeof(tac)))
4201                         goto out;
4202                 r = 0;
4203                 break;
4204         };
4205         case KVM_SET_VAPIC_ADDR: {
4206                 struct kvm_vapic_addr va;
4207                 int idx;
4208
4209                 r = -EINVAL;
4210                 if (!lapic_in_kernel(vcpu))
4211                         goto out;
4212                 r = -EFAULT;
4213                 if (copy_from_user(&va, argp, sizeof(va)))
4214                         goto out;
4215                 idx = srcu_read_lock(&vcpu->kvm->srcu);
4216                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
4217                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4218                 break;
4219         }
4220         case KVM_X86_SETUP_MCE: {
4221                 u64 mcg_cap;
4222
4223                 r = -EFAULT;
4224                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
4225                         goto out;
4226                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
4227                 break;
4228         }
4229         case KVM_X86_SET_MCE: {
4230                 struct kvm_x86_mce mce;
4231
4232                 r = -EFAULT;
4233                 if (copy_from_user(&mce, argp, sizeof(mce)))
4234                         goto out;
4235                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
4236                 break;
4237         }
4238         case KVM_GET_VCPU_EVENTS: {
4239                 struct kvm_vcpu_events events;
4240
4241                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
4242
4243                 r = -EFAULT;
4244                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
4245                         break;
4246                 r = 0;
4247                 break;
4248         }
4249         case KVM_SET_VCPU_EVENTS: {
4250                 struct kvm_vcpu_events events;
4251
4252                 r = -EFAULT;
4253                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
4254                         break;
4255
4256                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
4257                 break;
4258         }
4259         case KVM_GET_DEBUGREGS: {
4260                 struct kvm_debugregs dbgregs;
4261
4262                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
4263
4264                 r = -EFAULT;
4265                 if (copy_to_user(argp, &dbgregs,
4266                                  sizeof(struct kvm_debugregs)))
4267                         break;
4268                 r = 0;
4269                 break;
4270         }
4271         case KVM_SET_DEBUGREGS: {
4272                 struct kvm_debugregs dbgregs;
4273
4274                 r = -EFAULT;
4275                 if (copy_from_user(&dbgregs, argp,
4276                                    sizeof(struct kvm_debugregs)))
4277                         break;
4278
4279                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
4280                 break;
4281         }
4282         case KVM_GET_XSAVE: {
4283                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
4284                 r = -ENOMEM;
4285                 if (!u.xsave)
4286                         break;
4287
4288                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
4289
4290                 r = -EFAULT;
4291                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
4292                         break;
4293                 r = 0;
4294                 break;
4295         }
4296         case KVM_SET_XSAVE: {
4297                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
4298                 if (IS_ERR(u.xsave)) {
4299                         r = PTR_ERR(u.xsave);
4300                         goto out_nofree;
4301                 }
4302
4303                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
4304                 break;
4305         }
4306         case KVM_GET_XCRS: {
4307                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
4308                 r = -ENOMEM;
4309                 if (!u.xcrs)
4310                         break;
4311
4312                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
4313
4314                 r = -EFAULT;
4315                 if (copy_to_user(argp, u.xcrs,
4316                                  sizeof(struct kvm_xcrs)))
4317                         break;
4318                 r = 0;
4319                 break;
4320         }
4321         case KVM_SET_XCRS: {
4322                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
4323                 if (IS_ERR(u.xcrs)) {
4324                         r = PTR_ERR(u.xcrs);
4325                         goto out_nofree;
4326                 }
4327
4328                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
4329                 break;
4330         }
4331         case KVM_SET_TSC_KHZ: {
4332                 u32 user_tsc_khz;
4333
4334                 r = -EINVAL;
4335                 user_tsc_khz = (u32)arg;
4336
4337                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
4338                         goto out;
4339
4340                 if (user_tsc_khz == 0)
4341                         user_tsc_khz = tsc_khz;
4342
4343                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
4344                         r = 0;
4345
4346                 goto out;
4347         }
4348         case KVM_GET_TSC_KHZ: {
4349                 r = vcpu->arch.virtual_tsc_khz;
4350                 goto out;
4351         }
4352         case KVM_KVMCLOCK_CTRL: {
4353                 r = kvm_set_guest_paused(vcpu);
4354                 goto out;
4355         }
4356         case KVM_ENABLE_CAP: {
4357                 struct kvm_enable_cap cap;
4358
4359                 r = -EFAULT;
4360                 if (copy_from_user(&cap, argp, sizeof(cap)))
4361                         goto out;
4362                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
4363                 break;
4364         }
4365         case KVM_GET_NESTED_STATE: {
4366                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4367                 u32 user_data_size;
4368
4369                 r = -EINVAL;
4370                 if (!kvm_x86_ops->get_nested_state)
4371                         break;
4372
4373                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
4374                 r = -EFAULT;
4375                 if (get_user(user_data_size, &user_kvm_nested_state->size))
4376                         break;
4377
4378                 r = kvm_x86_ops->get_nested_state(vcpu, user_kvm_nested_state,
4379                                                   user_data_size);
4380                 if (r < 0)
4381                         break;
4382
4383                 if (r > user_data_size) {
4384                         if (put_user(r, &user_kvm_nested_state->size))
4385                                 r = -EFAULT;
4386                         else
4387                                 r = -E2BIG;
4388                         break;
4389                 }
4390
4391                 r = 0;
4392                 break;
4393         }
4394         case KVM_SET_NESTED_STATE: {
4395                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4396                 struct kvm_nested_state kvm_state;
4397
4398                 r = -EINVAL;
4399                 if (!kvm_x86_ops->set_nested_state)
4400                         break;
4401
4402                 r = -EFAULT;
4403                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
4404                         break;
4405
4406                 r = -EINVAL;
4407                 if (kvm_state.size < sizeof(kvm_state))
4408                         break;
4409
4410                 if (kvm_state.flags &
4411                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
4412                       | KVM_STATE_NESTED_EVMCS))
4413                         break;
4414
4415                 /* nested_run_pending implies guest_mode.  */
4416                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
4417                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
4418                         break;
4419
4420                 r = kvm_x86_ops->set_nested_state(vcpu, user_kvm_nested_state, &kvm_state);
4421                 break;
4422         }
4423         case KVM_GET_SUPPORTED_HV_CPUID: {
4424                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4425                 struct kvm_cpuid2 cpuid;
4426
4427                 r = -EFAULT;
4428                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4429                         goto out;
4430
4431                 r = kvm_vcpu_ioctl_get_hv_cpuid(vcpu, &cpuid,
4432                                                 cpuid_arg->entries);
4433                 if (r)
4434                         goto out;
4435
4436                 r = -EFAULT;
4437                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4438                         goto out;
4439                 r = 0;
4440                 break;
4441         }
4442         default:
4443                 r = -EINVAL;
4444         }
4445 out:
4446         kfree(u.buffer);
4447 out_nofree:
4448         vcpu_put(vcpu);
4449         return r;
4450 }
4451
4452 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
4453 {
4454         return VM_FAULT_SIGBUS;
4455 }
4456
4457 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
4458 {
4459         int ret;
4460
4461         if (addr > (unsigned int)(-3 * PAGE_SIZE))
4462                 return -EINVAL;
4463         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
4464         return ret;
4465 }
4466
4467 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
4468                                               u64 ident_addr)
4469 {
4470         return kvm_x86_ops->set_identity_map_addr(kvm, ident_addr);
4471 }
4472
4473 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
4474                                          unsigned long kvm_nr_mmu_pages)
4475 {
4476         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
4477                 return -EINVAL;
4478
4479         mutex_lock(&kvm->slots_lock);
4480
4481         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
4482         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
4483
4484         mutex_unlock(&kvm->slots_lock);
4485         return 0;
4486 }
4487
4488 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
4489 {
4490         return kvm->arch.n_max_mmu_pages;
4491 }
4492
4493 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
4494 {
4495         struct kvm_pic *pic = kvm->arch.vpic;
4496         int r;
4497
4498         r = 0;
4499         switch (chip->chip_id) {
4500         case KVM_IRQCHIP_PIC_MASTER:
4501                 memcpy(&chip->chip.pic, &pic->pics[0],
4502                         sizeof(struct kvm_pic_state));
4503                 break;
4504         case KVM_IRQCHIP_PIC_SLAVE:
4505                 memcpy(&chip->chip.pic, &pic->pics[1],
4506                         sizeof(struct kvm_pic_state));
4507                 break;
4508         case KVM_IRQCHIP_IOAPIC:
4509                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
4510                 break;
4511         default:
4512                 r = -EINVAL;
4513                 break;
4514         }
4515         return r;
4516 }
4517
4518 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
4519 {
4520         struct kvm_pic *pic = kvm->arch.vpic;
4521         int r;
4522
4523         r = 0;
4524         switch (chip->chip_id) {
4525         case KVM_IRQCHIP_PIC_MASTER:
4526                 spin_lock(&pic->lock);
4527                 memcpy(&pic->pics[0], &chip->chip.pic,
4528                         sizeof(struct kvm_pic_state));
4529                 spin_unlock(&pic->lock);
4530                 break;
4531         case KVM_IRQCHIP_PIC_SLAVE:
4532                 spin_lock(&pic->lock);
4533                 memcpy(&pic->pics[1], &chip->chip.pic,
4534                         sizeof(struct kvm_pic_state));
4535                 spin_unlock(&pic->lock);
4536                 break;
4537         case KVM_IRQCHIP_IOAPIC:
4538                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
4539                 break;
4540         default:
4541                 r = -EINVAL;
4542                 break;
4543         }
4544         kvm_pic_update_irq(pic);
4545         return r;
4546 }
4547
4548 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4549 {
4550         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
4551
4552         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
4553
4554         mutex_lock(&kps->lock);
4555         memcpy(ps, &kps->channels, sizeof(*ps));
4556         mutex_unlock(&kps->lock);
4557         return 0;
4558 }
4559
4560 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4561 {
4562         int i;
4563         struct kvm_pit *pit = kvm->arch.vpit;
4564
4565         mutex_lock(&pit->pit_state.lock);
4566         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
4567         for (i = 0; i < 3; i++)
4568                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
4569         mutex_unlock(&pit->pit_state.lock);
4570         return 0;
4571 }
4572
4573 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4574 {
4575         mutex_lock(&kvm->arch.vpit->pit_state.lock);
4576         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
4577                 sizeof(ps->channels));
4578         ps->flags = kvm->arch.vpit->pit_state.flags;
4579         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
4580         memset(&ps->reserved, 0, sizeof(ps->reserved));
4581         return 0;
4582 }
4583
4584 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4585 {
4586         int start = 0;
4587         int i;
4588         u32 prev_legacy, cur_legacy;
4589         struct kvm_pit *pit = kvm->arch.vpit;
4590
4591         mutex_lock(&pit->pit_state.lock);
4592         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
4593         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
4594         if (!prev_legacy && cur_legacy)
4595                 start = 1;
4596         memcpy(&pit->pit_state.channels, &ps->channels,
4597                sizeof(pit->pit_state.channels));
4598         pit->pit_state.flags = ps->flags;
4599         for (i = 0; i < 3; i++)
4600                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
4601                                    start && i == 0);
4602         mutex_unlock(&pit->pit_state.lock);
4603         return 0;
4604 }
4605
4606 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
4607                                  struct kvm_reinject_control *control)
4608 {
4609         struct kvm_pit *pit = kvm->arch.vpit;
4610
4611         if (!pit)
4612                 return -ENXIO;
4613
4614         /* pit->pit_state.lock was overloaded to prevent userspace from getting
4615          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
4616          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
4617          */
4618         mutex_lock(&pit->pit_state.lock);
4619         kvm_pit_set_reinject(pit, control->pit_reinject);
4620         mutex_unlock(&pit->pit_state.lock);
4621
4622         return 0;
4623 }
4624
4625 /**
4626  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
4627  * @kvm: kvm instance
4628  * @log: slot id and address to which we copy the log
4629  *
4630  * Steps 1-4 below provide general overview of dirty page logging. See
4631  * kvm_get_dirty_log_protect() function description for additional details.
4632  *
4633  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
4634  * always flush the TLB (step 4) even if previous step failed  and the dirty
4635  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
4636  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
4637  * writes will be marked dirty for next log read.
4638  *
4639  *   1. Take a snapshot of the bit and clear it if needed.
4640  *   2. Write protect the corresponding page.
4641  *   3. Copy the snapshot to the userspace.
4642  *   4. Flush TLB's if needed.
4643  */
4644 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
4645 {
4646         bool flush = false;
4647         int r;
4648
4649         mutex_lock(&kvm->slots_lock);
4650
4651         /*
4652          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4653          */
4654         if (kvm_x86_ops->flush_log_dirty)
4655                 kvm_x86_ops->flush_log_dirty(kvm);
4656
4657         r = kvm_get_dirty_log_protect(kvm, log, &flush);
4658
4659         /*
4660          * All the TLBs can be flushed out of mmu lock, see the comments in
4661          * kvm_mmu_slot_remove_write_access().
4662          */
4663         lockdep_assert_held(&kvm->slots_lock);
4664         if (flush)
4665                 kvm_flush_remote_tlbs(kvm);
4666
4667         mutex_unlock(&kvm->slots_lock);
4668         return r;
4669 }
4670
4671 int kvm_vm_ioctl_clear_dirty_log(struct kvm *kvm, struct kvm_clear_dirty_log *log)
4672 {
4673         bool flush = false;
4674         int r;
4675
4676         mutex_lock(&kvm->slots_lock);
4677
4678         /*
4679          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4680          */
4681         if (kvm_x86_ops->flush_log_dirty)
4682                 kvm_x86_ops->flush_log_dirty(kvm);
4683
4684         r = kvm_clear_dirty_log_protect(kvm, log, &flush);
4685
4686         /*
4687          * All the TLBs can be flushed out of mmu lock, see the comments in
4688          * kvm_mmu_slot_remove_write_access().
4689          */
4690         lockdep_assert_held(&kvm->slots_lock);
4691         if (flush)
4692                 kvm_flush_remote_tlbs(kvm);
4693
4694         mutex_unlock(&kvm->slots_lock);
4695         return r;
4696 }
4697
4698 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
4699                         bool line_status)
4700 {
4701         if (!irqchip_in_kernel(kvm))
4702                 return -ENXIO;
4703
4704         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
4705                                         irq_event->irq, irq_event->level,
4706                                         line_status);
4707         return 0;
4708 }
4709
4710 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
4711                             struct kvm_enable_cap *cap)
4712 {
4713         int r;
4714
4715         if (cap->flags)
4716                 return -EINVAL;
4717
4718         switch (cap->cap) {
4719         case KVM_CAP_DISABLE_QUIRKS:
4720                 kvm->arch.disabled_quirks = cap->args[0];
4721                 r = 0;
4722                 break;
4723         case KVM_CAP_SPLIT_IRQCHIP: {
4724                 mutex_lock(&kvm->lock);
4725                 r = -EINVAL;
4726                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
4727                         goto split_irqchip_unlock;
4728                 r = -EEXIST;
4729                 if (irqchip_in_kernel(kvm))
4730                         goto split_irqchip_unlock;
4731                 if (kvm->created_vcpus)
4732                         goto split_irqchip_unlock;
4733                 r = kvm_setup_empty_irq_routing(kvm);
4734                 if (r)
4735                         goto split_irqchip_unlock;
4736                 /* Pairs with irqchip_in_kernel. */
4737                 smp_wmb();
4738                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
4739                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
4740                 r = 0;
4741 split_irqchip_unlock:
4742                 mutex_unlock(&kvm->lock);
4743                 break;
4744         }
4745         case KVM_CAP_X2APIC_API:
4746                 r = -EINVAL;
4747                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
4748                         break;
4749
4750                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
4751                         kvm->arch.x2apic_format = true;
4752                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
4753                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
4754
4755                 r = 0;
4756                 break;
4757         case KVM_CAP_X86_DISABLE_EXITS:
4758                 r = -EINVAL;
4759                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
4760                         break;
4761
4762                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
4763                         kvm_can_mwait_in_guest())
4764                         kvm->arch.mwait_in_guest = true;
4765                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
4766                         kvm->arch.hlt_in_guest = true;
4767                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
4768                         kvm->arch.pause_in_guest = true;
4769                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
4770                         kvm->arch.cstate_in_guest = true;
4771                 r = 0;
4772                 break;
4773         case KVM_CAP_MSR_PLATFORM_INFO:
4774                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
4775                 r = 0;
4776                 break;
4777         case KVM_CAP_EXCEPTION_PAYLOAD:
4778                 kvm->arch.exception_payload_enabled = cap->args[0];
4779                 r = 0;
4780                 break;
4781         default:
4782                 r = -EINVAL;
4783                 break;
4784         }
4785         return r;
4786 }
4787
4788 long kvm_arch_vm_ioctl(struct file *filp,
4789                        unsigned int ioctl, unsigned long arg)
4790 {
4791         struct kvm *kvm = filp->private_data;
4792         void __user *argp = (void __user *)arg;
4793         int r = -ENOTTY;
4794         /*
4795          * This union makes it completely explicit to gcc-3.x
4796          * that these two variables' stack usage should be
4797          * combined, not added together.
4798          */
4799         union {
4800                 struct kvm_pit_state ps;
4801                 struct kvm_pit_state2 ps2;
4802                 struct kvm_pit_config pit_config;
4803         } u;
4804
4805         switch (ioctl) {
4806         case KVM_SET_TSS_ADDR:
4807                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
4808                 break;
4809         case KVM_SET_IDENTITY_MAP_ADDR: {
4810                 u64 ident_addr;
4811
4812                 mutex_lock(&kvm->lock);
4813                 r = -EINVAL;
4814                 if (kvm->created_vcpus)
4815                         goto set_identity_unlock;
4816                 r = -EFAULT;
4817                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
4818                         goto set_identity_unlock;
4819                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
4820 set_identity_unlock:
4821                 mutex_unlock(&kvm->lock);
4822                 break;
4823         }
4824         case KVM_SET_NR_MMU_PAGES:
4825                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
4826                 break;
4827         case KVM_GET_NR_MMU_PAGES:
4828                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
4829                 break;
4830         case KVM_CREATE_IRQCHIP: {
4831                 mutex_lock(&kvm->lock);
4832
4833                 r = -EEXIST;
4834                 if (irqchip_in_kernel(kvm))
4835                         goto create_irqchip_unlock;
4836
4837                 r = -EINVAL;
4838                 if (kvm->created_vcpus)
4839                         goto create_irqchip_unlock;
4840
4841                 r = kvm_pic_init(kvm);
4842                 if (r)
4843                         goto create_irqchip_unlock;
4844
4845                 r = kvm_ioapic_init(kvm);
4846                 if (r) {
4847                         kvm_pic_destroy(kvm);
4848                         goto create_irqchip_unlock;
4849                 }
4850
4851                 r = kvm_setup_default_irq_routing(kvm);
4852                 if (r) {
4853                         kvm_ioapic_destroy(kvm);
4854                         kvm_pic_destroy(kvm);
4855                         goto create_irqchip_unlock;
4856                 }
4857                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4858                 smp_wmb();
4859                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
4860         create_irqchip_unlock:
4861                 mutex_unlock(&kvm->lock);
4862                 break;
4863         }
4864         case KVM_CREATE_PIT:
4865                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
4866                 goto create_pit;
4867         case KVM_CREATE_PIT2:
4868                 r = -EFAULT;
4869                 if (copy_from_user(&u.pit_config, argp,
4870                                    sizeof(struct kvm_pit_config)))
4871                         goto out;
4872         create_pit:
4873                 mutex_lock(&kvm->lock);
4874                 r = -EEXIST;
4875                 if (kvm->arch.vpit)
4876                         goto create_pit_unlock;
4877                 r = -ENOMEM;
4878                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
4879                 if (kvm->arch.vpit)
4880                         r = 0;
4881         create_pit_unlock:
4882                 mutex_unlock(&kvm->lock);
4883                 break;
4884         case KVM_GET_IRQCHIP: {
4885                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4886                 struct kvm_irqchip *chip;
4887
4888                 chip = memdup_user(argp, sizeof(*chip));
4889                 if (IS_ERR(chip)) {
4890                         r = PTR_ERR(chip);
4891                         goto out;
4892                 }
4893
4894                 r = -ENXIO;
4895                 if (!irqchip_kernel(kvm))
4896                         goto get_irqchip_out;
4897                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
4898                 if (r)
4899                         goto get_irqchip_out;
4900                 r = -EFAULT;
4901                 if (copy_to_user(argp, chip, sizeof(*chip)))
4902                         goto get_irqchip_out;
4903                 r = 0;
4904         get_irqchip_out:
4905                 kfree(chip);
4906                 break;
4907         }
4908         case KVM_SET_IRQCHIP: {
4909                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4910                 struct kvm_irqchip *chip;
4911
4912                 chip = memdup_user(argp, sizeof(*chip));
4913                 if (IS_ERR(chip)) {
4914                         r = PTR_ERR(chip);
4915                         goto out;
4916                 }
4917
4918                 r = -ENXIO;
4919                 if (!irqchip_kernel(kvm))
4920                         goto set_irqchip_out;
4921                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
4922                 if (r)
4923                         goto set_irqchip_out;
4924                 r = 0;
4925         set_irqchip_out:
4926                 kfree(chip);
4927                 break;
4928         }
4929         case KVM_GET_PIT: {
4930                 r = -EFAULT;
4931                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
4932                         goto out;
4933                 r = -ENXIO;
4934                 if (!kvm->arch.vpit)
4935                         goto out;
4936                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
4937                 if (r)
4938                         goto out;
4939                 r = -EFAULT;
4940                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
4941                         goto out;
4942                 r = 0;
4943                 break;
4944         }
4945         case KVM_SET_PIT: {
4946                 r = -EFAULT;
4947                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
4948                         goto out;
4949                 r = -ENXIO;
4950                 if (!kvm->arch.vpit)
4951                         goto out;
4952                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
4953                 break;
4954         }
4955         case KVM_GET_PIT2: {
4956                 r = -ENXIO;
4957                 if (!kvm->arch.vpit)
4958                         goto out;
4959                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
4960                 if (r)
4961                         goto out;
4962                 r = -EFAULT;
4963                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
4964                         goto out;
4965                 r = 0;
4966                 break;
4967         }
4968         case KVM_SET_PIT2: {
4969                 r = -EFAULT;
4970                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
4971                         goto out;
4972                 r = -ENXIO;
4973                 if (!kvm->arch.vpit)
4974                         goto out;
4975                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
4976                 break;
4977         }
4978         case KVM_REINJECT_CONTROL: {
4979                 struct kvm_reinject_control control;
4980                 r =  -EFAULT;
4981                 if (copy_from_user(&control, argp, sizeof(control)))
4982                         goto out;
4983                 r = kvm_vm_ioctl_reinject(kvm, &control);
4984                 break;
4985         }
4986         case KVM_SET_BOOT_CPU_ID:
4987                 r = 0;
4988                 mutex_lock(&kvm->lock);
4989                 if (kvm->created_vcpus)
4990                         r = -EBUSY;
4991                 else
4992                         kvm->arch.bsp_vcpu_id = arg;
4993                 mutex_unlock(&kvm->lock);
4994                 break;
4995         case KVM_XEN_HVM_CONFIG: {
4996                 struct kvm_xen_hvm_config xhc;
4997                 r = -EFAULT;
4998                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
4999                         goto out;
5000                 r = -EINVAL;
5001                 if (xhc.flags)
5002                         goto out;
5003                 memcpy(&kvm->arch.xen_hvm_config, &xhc, sizeof(xhc));
5004                 r = 0;
5005                 break;
5006         }
5007         case KVM_SET_CLOCK: {
5008                 struct kvm_clock_data user_ns;
5009                 u64 now_ns;
5010
5011                 r = -EFAULT;
5012                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
5013                         goto out;
5014
5015                 r = -EINVAL;
5016                 if (user_ns.flags)
5017                         goto out;
5018
5019                 r = 0;
5020                 /*
5021                  * TODO: userspace has to take care of races with VCPU_RUN, so
5022                  * kvm_gen_update_masterclock() can be cut down to locked
5023                  * pvclock_update_vm_gtod_copy().
5024                  */
5025                 kvm_gen_update_masterclock(kvm);
5026                 now_ns = get_kvmclock_ns(kvm);
5027                 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
5028                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
5029                 break;
5030         }
5031         case KVM_GET_CLOCK: {
5032                 struct kvm_clock_data user_ns;
5033                 u64 now_ns;
5034
5035                 now_ns = get_kvmclock_ns(kvm);
5036                 user_ns.clock = now_ns;
5037                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
5038                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
5039
5040                 r = -EFAULT;
5041                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
5042                         goto out;
5043                 r = 0;
5044                 break;
5045         }
5046         case KVM_MEMORY_ENCRYPT_OP: {
5047                 r = -ENOTTY;
5048                 if (kvm_x86_ops->mem_enc_op)
5049                         r = kvm_x86_ops->mem_enc_op(kvm, argp);
5050                 break;
5051         }
5052         case KVM_MEMORY_ENCRYPT_REG_REGION: {
5053                 struct kvm_enc_region region;
5054
5055                 r = -EFAULT;
5056                 if (copy_from_user(&region, argp, sizeof(region)))
5057                         goto out;
5058
5059                 r = -ENOTTY;
5060                 if (kvm_x86_ops->mem_enc_reg_region)
5061                         r = kvm_x86_ops->mem_enc_reg_region(kvm, &region);
5062                 break;
5063         }
5064         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
5065                 struct kvm_enc_region region;
5066
5067                 r = -EFAULT;
5068                 if (copy_from_user(&region, argp, sizeof(region)))
5069                         goto out;
5070
5071                 r = -ENOTTY;
5072                 if (kvm_x86_ops->mem_enc_unreg_region)
5073                         r = kvm_x86_ops->mem_enc_unreg_region(kvm, &region);
5074                 break;
5075         }
5076         case KVM_HYPERV_EVENTFD: {
5077                 struct kvm_hyperv_eventfd hvevfd;
5078
5079                 r = -EFAULT;
5080                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
5081                         goto out;
5082                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
5083                 break;
5084         }
5085         case KVM_SET_PMU_EVENT_FILTER:
5086                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
5087                 break;
5088         default:
5089                 r = -ENOTTY;
5090         }
5091 out:
5092         return r;
5093 }
5094
5095 static void kvm_init_msr_list(void)
5096 {
5097         u32 dummy[2];
5098         unsigned i, j;
5099
5100         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
5101                          "Please update the fixed PMCs in msrs_to_save[]");
5102         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_GENERIC != 32,
5103                          "Please update the generic perfctr/eventsel MSRs in msrs_to_save[]");
5104
5105         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
5106                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
5107                         continue;
5108
5109                 /*
5110                  * Even MSRs that are valid in the host may not be exposed
5111                  * to the guests in some cases.
5112                  */
5113                 switch (msrs_to_save[i]) {
5114                 case MSR_IA32_BNDCFGS:
5115                         if (!kvm_mpx_supported())
5116                                 continue;
5117                         break;
5118                 case MSR_TSC_AUX:
5119                         if (!kvm_x86_ops->rdtscp_supported())
5120                                 continue;
5121                         break;
5122                 case MSR_IA32_RTIT_CTL:
5123                 case MSR_IA32_RTIT_STATUS:
5124                         if (!kvm_x86_ops->pt_supported())
5125                                 continue;
5126                         break;
5127                 case MSR_IA32_RTIT_CR3_MATCH:
5128                         if (!kvm_x86_ops->pt_supported() ||
5129                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
5130                                 continue;
5131                         break;
5132                 case MSR_IA32_RTIT_OUTPUT_BASE:
5133                 case MSR_IA32_RTIT_OUTPUT_MASK:
5134                         if (!kvm_x86_ops->pt_supported() ||
5135                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
5136                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
5137                                 continue;
5138                         break;
5139                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B: {
5140                         if (!kvm_x86_ops->pt_supported() ||
5141                                 msrs_to_save[i] - MSR_IA32_RTIT_ADDR0_A >=
5142                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
5143                                 continue;
5144                         break;
5145                 }
5146                 default:
5147                         break;
5148                 }
5149
5150                 if (j < i)
5151                         msrs_to_save[j] = msrs_to_save[i];
5152                 j++;
5153         }
5154         num_msrs_to_save = j;
5155
5156         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
5157                 if (!kvm_x86_ops->has_emulated_msr(emulated_msrs[i]))
5158                         continue;
5159
5160                 if (j < i)
5161                         emulated_msrs[j] = emulated_msrs[i];
5162                 j++;
5163         }
5164         num_emulated_msrs = j;
5165
5166         for (i = j = 0; i < ARRAY_SIZE(msr_based_features); i++) {
5167                 struct kvm_msr_entry msr;
5168
5169                 msr.index = msr_based_features[i];
5170                 if (kvm_get_msr_feature(&msr))
5171                         continue;
5172
5173                 if (j < i)
5174                         msr_based_features[j] = msr_based_features[i];
5175                 j++;
5176         }
5177         num_msr_based_features = j;
5178 }
5179
5180 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
5181                            const void *v)
5182 {
5183         int handled = 0;
5184         int n;
5185
5186         do {
5187                 n = min(len, 8);
5188                 if (!(lapic_in_kernel(vcpu) &&
5189                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
5190                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
5191                         break;
5192                 handled += n;
5193                 addr += n;
5194                 len -= n;
5195                 v += n;
5196         } while (len);
5197
5198         return handled;
5199 }
5200
5201 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
5202 {
5203         int handled = 0;
5204         int n;
5205
5206         do {
5207                 n = min(len, 8);
5208                 if (!(lapic_in_kernel(vcpu) &&
5209                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
5210                                          addr, n, v))
5211                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
5212                         break;
5213                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
5214                 handled += n;
5215                 addr += n;
5216                 len -= n;
5217                 v += n;
5218         } while (len);
5219
5220         return handled;
5221 }
5222
5223 static void kvm_set_segment(struct kvm_vcpu *vcpu,
5224                         struct kvm_segment *var, int seg)
5225 {
5226         kvm_x86_ops->set_segment(vcpu, var, seg);
5227 }
5228
5229 void kvm_get_segment(struct kvm_vcpu *vcpu,
5230                      struct kvm_segment *var, int seg)
5231 {
5232         kvm_x86_ops->get_segment(vcpu, var, seg);
5233 }
5234
5235 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
5236                            struct x86_exception *exception)
5237 {
5238         gpa_t t_gpa;
5239
5240         BUG_ON(!mmu_is_nested(vcpu));
5241
5242         /* NPT walks are always user-walks */
5243         access |= PFERR_USER_MASK;
5244         t_gpa  = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
5245
5246         return t_gpa;
5247 }
5248
5249 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
5250                               struct x86_exception *exception)
5251 {
5252         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5253         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5254 }
5255
5256  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
5257                                 struct x86_exception *exception)
5258 {
5259         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5260         access |= PFERR_FETCH_MASK;
5261         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5262 }
5263
5264 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
5265                                struct x86_exception *exception)
5266 {
5267         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5268         access |= PFERR_WRITE_MASK;
5269         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5270 }
5271
5272 /* uses this to access any guest's mapped memory without checking CPL */
5273 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
5274                                 struct x86_exception *exception)
5275 {
5276         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
5277 }
5278
5279 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
5280                                       struct kvm_vcpu *vcpu, u32 access,
5281                                       struct x86_exception *exception)
5282 {
5283         void *data = val;
5284         int r = X86EMUL_CONTINUE;
5285
5286         while (bytes) {
5287                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
5288                                                             exception);
5289                 unsigned offset = addr & (PAGE_SIZE-1);
5290                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
5291                 int ret;
5292
5293                 if (gpa == UNMAPPED_GVA)
5294                         return X86EMUL_PROPAGATE_FAULT;
5295                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
5296                                                offset, toread);
5297                 if (ret < 0) {
5298                         r = X86EMUL_IO_NEEDED;
5299                         goto out;
5300                 }
5301
5302                 bytes -= toread;
5303                 data += toread;
5304                 addr += toread;
5305         }
5306 out:
5307         return r;
5308 }
5309
5310 /* used for instruction fetching */
5311 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
5312                                 gva_t addr, void *val, unsigned int bytes,
5313                                 struct x86_exception *exception)
5314 {
5315         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5316         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5317         unsigned offset;
5318         int ret;
5319
5320         /* Inline kvm_read_guest_virt_helper for speed.  */
5321         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
5322                                                     exception);
5323         if (unlikely(gpa == UNMAPPED_GVA))
5324                 return X86EMUL_PROPAGATE_FAULT;
5325
5326         offset = addr & (PAGE_SIZE-1);
5327         if (WARN_ON(offset + bytes > PAGE_SIZE))
5328                 bytes = (unsigned)PAGE_SIZE - offset;
5329         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
5330                                        offset, bytes);
5331         if (unlikely(ret < 0))
5332                 return X86EMUL_IO_NEEDED;
5333
5334         return X86EMUL_CONTINUE;
5335 }
5336
5337 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
5338                                gva_t addr, void *val, unsigned int bytes,
5339                                struct x86_exception *exception)
5340 {
5341         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5342
5343         /*
5344          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
5345          * is returned, but our callers are not ready for that and they blindly
5346          * call kvm_inject_page_fault.  Ensure that they at least do not leak
5347          * uninitialized kernel stack memory into cr2 and error code.
5348          */
5349         memset(exception, 0, sizeof(*exception));
5350         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
5351                                           exception);
5352 }
5353 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
5354
5355 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
5356                              gva_t addr, void *val, unsigned int bytes,
5357                              struct x86_exception *exception, bool system)
5358 {
5359         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5360         u32 access = 0;
5361
5362         if (!system && kvm_x86_ops->get_cpl(vcpu) == 3)
5363                 access |= PFERR_USER_MASK;
5364
5365         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
5366 }
5367
5368 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
5369                 unsigned long addr, void *val, unsigned int bytes)
5370 {
5371         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5372         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
5373
5374         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
5375 }
5376
5377 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
5378                                       struct kvm_vcpu *vcpu, u32 access,
5379                                       struct x86_exception *exception)
5380 {
5381         void *data = val;
5382         int r = X86EMUL_CONTINUE;
5383
5384         while (bytes) {
5385                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
5386                                                              access,
5387                                                              exception);
5388                 unsigned offset = addr & (PAGE_SIZE-1);
5389                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
5390                 int ret;
5391
5392                 if (gpa == UNMAPPED_GVA)
5393                         return X86EMUL_PROPAGATE_FAULT;
5394                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
5395                 if (ret < 0) {
5396                         r = X86EMUL_IO_NEEDED;
5397                         goto out;
5398                 }
5399
5400                 bytes -= towrite;
5401                 data += towrite;
5402                 addr += towrite;
5403         }
5404 out:
5405         return r;
5406 }
5407
5408 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
5409                               unsigned int bytes, struct x86_exception *exception,
5410                               bool system)
5411 {
5412         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5413         u32 access = PFERR_WRITE_MASK;
5414
5415         if (!system && kvm_x86_ops->get_cpl(vcpu) == 3)
5416                 access |= PFERR_USER_MASK;
5417
5418         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
5419                                            access, exception);
5420 }
5421
5422 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
5423                                 unsigned int bytes, struct x86_exception *exception)
5424 {
5425         /* kvm_write_guest_virt_system can pull in tons of pages. */
5426         vcpu->arch.l1tf_flush_l1d = true;
5427
5428         /*
5429          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
5430          * is returned, but our callers are not ready for that and they blindly
5431          * call kvm_inject_page_fault.  Ensure that they at least do not leak
5432          * uninitialized kernel stack memory into cr2 and error code.
5433          */
5434         memset(exception, 0, sizeof(*exception));
5435         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
5436                                            PFERR_WRITE_MASK, exception);
5437 }
5438 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
5439
5440 int handle_ud(struct kvm_vcpu *vcpu)
5441 {
5442         int emul_type = EMULTYPE_TRAP_UD;
5443         enum emulation_result er;
5444         char sig[5]; /* ud2; .ascii "kvm" */
5445         struct x86_exception e;
5446
5447         if (force_emulation_prefix &&
5448             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
5449                                 sig, sizeof(sig), &e) == 0 &&
5450             memcmp(sig, "\xf\xbkvm", sizeof(sig)) == 0) {
5451                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
5452                 emul_type = 0;
5453         }
5454
5455         er = kvm_emulate_instruction(vcpu, emul_type);
5456         if (er == EMULATE_USER_EXIT)
5457                 return 0;
5458         if (er != EMULATE_DONE)
5459                 kvm_queue_exception(vcpu, UD_VECTOR);
5460         return 1;
5461 }
5462 EXPORT_SYMBOL_GPL(handle_ud);
5463
5464 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
5465                             gpa_t gpa, bool write)
5466 {
5467         /* For APIC access vmexit */
5468         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
5469                 return 1;
5470
5471         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
5472                 trace_vcpu_match_mmio(gva, gpa, write, true);
5473                 return 1;
5474         }
5475
5476         return 0;
5477 }
5478
5479 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
5480                                 gpa_t *gpa, struct x86_exception *exception,
5481                                 bool write)
5482 {
5483         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
5484                 | (write ? PFERR_WRITE_MASK : 0);
5485
5486         /*
5487          * currently PKRU is only applied to ept enabled guest so
5488          * there is no pkey in EPT page table for L1 guest or EPT
5489          * shadow page table for L2 guest.
5490          */
5491         if (vcpu_match_mmio_gva(vcpu, gva)
5492             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
5493                                  vcpu->arch.mmio_access, 0, access)) {
5494                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
5495                                         (gva & (PAGE_SIZE - 1));
5496                 trace_vcpu_match_mmio(gva, *gpa, write, false);
5497                 return 1;
5498         }
5499
5500         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5501
5502         if (*gpa == UNMAPPED_GVA)
5503                 return -1;
5504
5505         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
5506 }
5507
5508 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
5509                         const void *val, int bytes)
5510 {
5511         int ret;
5512
5513         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
5514         if (ret < 0)
5515                 return 0;
5516         kvm_page_track_write(vcpu, gpa, val, bytes);
5517         return 1;
5518 }
5519
5520 struct read_write_emulator_ops {
5521         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
5522                                   int bytes);
5523         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
5524                                   void *val, int bytes);
5525         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
5526                                int bytes, void *val);
5527         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
5528                                     void *val, int bytes);
5529         bool write;
5530 };
5531
5532 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
5533 {
5534         if (vcpu->mmio_read_completed) {
5535                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
5536                                vcpu->mmio_fragments[0].gpa, val);
5537                 vcpu->mmio_read_completed = 0;
5538                 return 1;
5539         }
5540
5541         return 0;
5542 }
5543
5544 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
5545                         void *val, int bytes)
5546 {
5547         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
5548 }
5549
5550 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
5551                          void *val, int bytes)
5552 {
5553         return emulator_write_phys(vcpu, gpa, val, bytes);
5554 }
5555
5556 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
5557 {
5558         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
5559         return vcpu_mmio_write(vcpu, gpa, bytes, val);
5560 }
5561
5562 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
5563                           void *val, int bytes)
5564 {
5565         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
5566         return X86EMUL_IO_NEEDED;
5567 }
5568
5569 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
5570                            void *val, int bytes)
5571 {
5572         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
5573
5574         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
5575         return X86EMUL_CONTINUE;
5576 }
5577
5578 static const struct read_write_emulator_ops read_emultor = {
5579         .read_write_prepare = read_prepare,
5580         .read_write_emulate = read_emulate,
5581         .read_write_mmio = vcpu_mmio_read,
5582         .read_write_exit_mmio = read_exit_mmio,
5583 };
5584
5585 static const struct read_write_emulator_ops write_emultor = {
5586         .read_write_emulate = write_emulate,
5587         .read_write_mmio = write_mmio,
5588         .read_write_exit_mmio = write_exit_mmio,
5589         .write = true,
5590 };
5591
5592 static int emulator_read_write_onepage(unsigned long addr, void *val,
5593                                        unsigned int bytes,
5594                                        struct x86_exception *exception,
5595                                        struct kvm_vcpu *vcpu,
5596                                        const struct read_write_emulator_ops *ops)
5597 {
5598         gpa_t gpa;
5599         int handled, ret;
5600         bool write = ops->write;
5601         struct kvm_mmio_fragment *frag;
5602         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5603
5604         /*
5605          * If the exit was due to a NPF we may already have a GPA.
5606          * If the GPA is present, use it to avoid the GVA to GPA table walk.
5607          * Note, this cannot be used on string operations since string
5608          * operation using rep will only have the initial GPA from the NPF
5609          * occurred.
5610          */
5611         if (vcpu->arch.gpa_available &&
5612             emulator_can_use_gpa(ctxt) &&
5613             (addr & ~PAGE_MASK) == (vcpu->arch.gpa_val & ~PAGE_MASK)) {
5614                 gpa = vcpu->arch.gpa_val;
5615                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
5616         } else {
5617                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
5618                 if (ret < 0)
5619                         return X86EMUL_PROPAGATE_FAULT;
5620         }
5621
5622         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
5623                 return X86EMUL_CONTINUE;
5624
5625         /*
5626          * Is this MMIO handled locally?
5627          */
5628         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
5629         if (handled == bytes)
5630                 return X86EMUL_CONTINUE;
5631
5632         gpa += handled;
5633         bytes -= handled;
5634         val += handled;
5635
5636         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
5637         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
5638         frag->gpa = gpa;
5639         frag->data = val;
5640         frag->len = bytes;
5641         return X86EMUL_CONTINUE;
5642 }
5643
5644 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
5645                         unsigned long addr,
5646                         void *val, unsigned int bytes,
5647                         struct x86_exception *exception,
5648                         const struct read_write_emulator_ops *ops)
5649 {
5650         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5651         gpa_t gpa;
5652         int rc;
5653
5654         if (ops->read_write_prepare &&
5655                   ops->read_write_prepare(vcpu, val, bytes))
5656                 return X86EMUL_CONTINUE;
5657
5658         vcpu->mmio_nr_fragments = 0;
5659
5660         /* Crossing a page boundary? */
5661         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
5662                 int now;
5663
5664                 now = -addr & ~PAGE_MASK;
5665                 rc = emulator_read_write_onepage(addr, val, now, exception,
5666                                                  vcpu, ops);
5667
5668                 if (rc != X86EMUL_CONTINUE)
5669                         return rc;
5670                 addr += now;
5671                 if (ctxt->mode != X86EMUL_MODE_PROT64)
5672                         addr = (u32)addr;
5673                 val += now;
5674                 bytes -= now;
5675         }
5676
5677         rc = emulator_read_write_onepage(addr, val, bytes, exception,
5678                                          vcpu, ops);
5679         if (rc != X86EMUL_CONTINUE)
5680                 return rc;
5681
5682         if (!vcpu->mmio_nr_fragments)
5683                 return rc;
5684
5685         gpa = vcpu->mmio_fragments[0].gpa;
5686
5687         vcpu->mmio_needed = 1;
5688         vcpu->mmio_cur_fragment = 0;
5689
5690         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
5691         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
5692         vcpu->run->exit_reason = KVM_EXIT_MMIO;
5693         vcpu->run->mmio.phys_addr = gpa;
5694
5695         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
5696 }
5697
5698 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
5699                                   unsigned long addr,
5700                                   void *val,
5701                                   unsigned int bytes,
5702                                   struct x86_exception *exception)
5703 {
5704         return emulator_read_write(ctxt, addr, val, bytes,
5705                                    exception, &read_emultor);
5706 }
5707
5708 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
5709                             unsigned long addr,
5710                             const void *val,
5711                             unsigned int bytes,
5712                             struct x86_exception *exception)
5713 {
5714         return emulator_read_write(ctxt, addr, (void *)val, bytes,
5715                                    exception, &write_emultor);
5716 }
5717
5718 #define CMPXCHG_TYPE(t, ptr, old, new) \
5719         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
5720
5721 #ifdef CONFIG_X86_64
5722 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
5723 #else
5724 #  define CMPXCHG64(ptr, old, new) \
5725         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
5726 #endif
5727
5728 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
5729                                      unsigned long addr,
5730                                      const void *old,
5731                                      const void *new,
5732                                      unsigned int bytes,
5733                                      struct x86_exception *exception)
5734 {
5735         struct kvm_host_map map;
5736         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5737         gpa_t gpa;
5738         char *kaddr;
5739         bool exchanged;
5740
5741         /* guests cmpxchg8b have to be emulated atomically */
5742         if (bytes > 8 || (bytes & (bytes - 1)))
5743                 goto emul_write;
5744
5745         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
5746
5747         if (gpa == UNMAPPED_GVA ||
5748             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
5749                 goto emul_write;
5750
5751         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
5752                 goto emul_write;
5753
5754         if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
5755                 goto emul_write;
5756
5757         kaddr = map.hva + offset_in_page(gpa);
5758
5759         switch (bytes) {
5760         case 1:
5761                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
5762                 break;
5763         case 2:
5764                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
5765                 break;
5766         case 4:
5767                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
5768                 break;
5769         case 8:
5770                 exchanged = CMPXCHG64(kaddr, old, new);
5771                 break;
5772         default:
5773                 BUG();
5774         }
5775
5776         kvm_vcpu_unmap(vcpu, &map, true);
5777
5778         if (!exchanged)
5779                 return X86EMUL_CMPXCHG_FAILED;
5780
5781         kvm_page_track_write(vcpu, gpa, new, bytes);
5782
5783         return X86EMUL_CONTINUE;
5784
5785 emul_write:
5786         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
5787
5788         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
5789 }
5790
5791 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
5792 {
5793         int r = 0, i;
5794
5795         for (i = 0; i < vcpu->arch.pio.count; i++) {
5796                 if (vcpu->arch.pio.in)
5797                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
5798                                             vcpu->arch.pio.size, pd);
5799                 else
5800                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
5801                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
5802                                              pd);
5803                 if (r)
5804                         break;
5805                 pd += vcpu->arch.pio.size;
5806         }
5807         return r;
5808 }
5809
5810 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
5811                                unsigned short port, void *val,
5812                                unsigned int count, bool in)
5813 {
5814         vcpu->arch.pio.port = port;
5815         vcpu->arch.pio.in = in;
5816         vcpu->arch.pio.count  = count;
5817         vcpu->arch.pio.size = size;
5818
5819         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
5820                 vcpu->arch.pio.count = 0;
5821                 return 1;
5822         }
5823
5824         vcpu->run->exit_reason = KVM_EXIT_IO;
5825         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
5826         vcpu->run->io.size = size;
5827         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
5828         vcpu->run->io.count = count;
5829         vcpu->run->io.port = port;
5830
5831         return 0;
5832 }
5833
5834 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
5835                                     int size, unsigned short port, void *val,
5836                                     unsigned int count)
5837 {
5838         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5839         int ret;
5840
5841         if (vcpu->arch.pio.count)
5842                 goto data_avail;
5843
5844         memset(vcpu->arch.pio_data, 0, size * count);
5845
5846         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
5847         if (ret) {
5848 data_avail:
5849                 memcpy(val, vcpu->arch.pio_data, size * count);
5850                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
5851                 vcpu->arch.pio.count = 0;
5852                 return 1;
5853         }
5854
5855         return 0;
5856 }
5857
5858 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
5859                                      int size, unsigned short port,
5860                                      const void *val, unsigned int count)
5861 {
5862         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5863
5864         memcpy(vcpu->arch.pio_data, val, size * count);
5865         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
5866         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
5867 }
5868
5869 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
5870 {
5871         return kvm_x86_ops->get_segment_base(vcpu, seg);
5872 }
5873
5874 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
5875 {
5876         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
5877 }
5878
5879 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
5880 {
5881         if (!need_emulate_wbinvd(vcpu))
5882                 return X86EMUL_CONTINUE;
5883
5884         if (kvm_x86_ops->has_wbinvd_exit()) {
5885                 int cpu = get_cpu();
5886
5887                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
5888                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
5889                                 wbinvd_ipi, NULL, 1);
5890                 put_cpu();
5891                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
5892         } else
5893                 wbinvd();
5894         return X86EMUL_CONTINUE;
5895 }
5896
5897 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
5898 {
5899         kvm_emulate_wbinvd_noskip(vcpu);
5900         return kvm_skip_emulated_instruction(vcpu);
5901 }
5902 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
5903
5904
5905
5906 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
5907 {
5908         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
5909 }
5910
5911 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
5912                            unsigned long *dest)
5913 {
5914         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
5915 }
5916
5917 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
5918                            unsigned long value)
5919 {
5920
5921         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
5922 }
5923
5924 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
5925 {
5926         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
5927 }
5928
5929 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
5930 {
5931         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5932         unsigned long value;
5933
5934         switch (cr) {
5935         case 0:
5936                 value = kvm_read_cr0(vcpu);
5937                 break;
5938         case 2:
5939                 value = vcpu->arch.cr2;
5940                 break;
5941         case 3:
5942                 value = kvm_read_cr3(vcpu);
5943                 break;
5944         case 4:
5945                 value = kvm_read_cr4(vcpu);
5946                 break;
5947         case 8:
5948                 value = kvm_get_cr8(vcpu);
5949                 break;
5950         default:
5951                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5952                 return 0;
5953         }
5954
5955         return value;
5956 }
5957
5958 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
5959 {
5960         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5961         int res = 0;
5962
5963         switch (cr) {
5964         case 0:
5965                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
5966                 break;
5967         case 2:
5968                 vcpu->arch.cr2 = val;
5969                 break;
5970         case 3:
5971                 res = kvm_set_cr3(vcpu, val);
5972                 break;
5973         case 4:
5974                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
5975                 break;
5976         case 8:
5977                 res = kvm_set_cr8(vcpu, val);
5978                 break;
5979         default:
5980                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5981                 res = -1;
5982         }
5983
5984         return res;
5985 }
5986
5987 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
5988 {
5989         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
5990 }
5991
5992 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5993 {
5994         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
5995 }
5996
5997 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5998 {
5999         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
6000 }
6001
6002 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6003 {
6004         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
6005 }
6006
6007 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6008 {
6009         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
6010 }
6011
6012 static unsigned long emulator_get_cached_segment_base(
6013         struct x86_emulate_ctxt *ctxt, int seg)
6014 {
6015         return get_segment_base(emul_to_vcpu(ctxt), seg);
6016 }
6017
6018 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
6019                                  struct desc_struct *desc, u32 *base3,
6020                                  int seg)
6021 {
6022         struct kvm_segment var;
6023
6024         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
6025         *selector = var.selector;
6026
6027         if (var.unusable) {
6028                 memset(desc, 0, sizeof(*desc));
6029                 if (base3)
6030                         *base3 = 0;
6031                 return false;
6032         }
6033
6034         if (var.g)
6035                 var.limit >>= 12;
6036         set_desc_limit(desc, var.limit);
6037         set_desc_base(desc, (unsigned long)var.base);
6038 #ifdef CONFIG_X86_64
6039         if (base3)
6040                 *base3 = var.base >> 32;
6041 #endif
6042         desc->type = var.type;
6043         desc->s = var.s;
6044         desc->dpl = var.dpl;
6045         desc->p = var.present;
6046         desc->avl = var.avl;
6047         desc->l = var.l;
6048         desc->d = var.db;
6049         desc->g = var.g;
6050
6051         return true;
6052 }
6053
6054 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
6055                                  struct desc_struct *desc, u32 base3,
6056                                  int seg)
6057 {
6058         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6059         struct kvm_segment var;
6060
6061         var.selector = selector;
6062         var.base = get_desc_base(desc);
6063 #ifdef CONFIG_X86_64
6064         var.base |= ((u64)base3) << 32;
6065 #endif
6066         var.limit = get_desc_limit(desc);
6067         if (desc->g)
6068                 var.limit = (var.limit << 12) | 0xfff;
6069         var.type = desc->type;
6070         var.dpl = desc->dpl;
6071         var.db = desc->d;
6072         var.s = desc->s;
6073         var.l = desc->l;
6074         var.g = desc->g;
6075         var.avl = desc->avl;
6076         var.present = desc->p;
6077         var.unusable = !var.present;
6078         var.padding = 0;
6079
6080         kvm_set_segment(vcpu, &var, seg);
6081         return;
6082 }
6083
6084 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
6085                             u32 msr_index, u64 *pdata)
6086 {
6087         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
6088 }
6089
6090 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
6091                             u32 msr_index, u64 data)
6092 {
6093         return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
6094 }
6095
6096 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
6097 {
6098         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6099
6100         return vcpu->arch.smbase;
6101 }
6102
6103 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
6104 {
6105         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6106
6107         vcpu->arch.smbase = smbase;
6108 }
6109
6110 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
6111                               u32 pmc)
6112 {
6113         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
6114 }
6115
6116 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
6117                              u32 pmc, u64 *pdata)
6118 {
6119         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
6120 }
6121
6122 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
6123 {
6124         emul_to_vcpu(ctxt)->arch.halt_request = 1;
6125 }
6126
6127 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
6128                               struct x86_instruction_info *info,
6129                               enum x86_intercept_stage stage)
6130 {
6131         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
6132 }
6133
6134 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
6135                         u32 *eax, u32 *ebx, u32 *ecx, u32 *edx, bool check_limit)
6136 {
6137         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, check_limit);
6138 }
6139
6140 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
6141 {
6142         return kvm_register_read(emul_to_vcpu(ctxt), reg);
6143 }
6144
6145 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
6146 {
6147         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
6148 }
6149
6150 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
6151 {
6152         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
6153 }
6154
6155 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
6156 {
6157         return emul_to_vcpu(ctxt)->arch.hflags;
6158 }
6159
6160 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
6161 {
6162         emul_to_vcpu(ctxt)->arch.hflags = emul_flags;
6163 }
6164
6165 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt,
6166                                   const char *smstate)
6167 {
6168         return kvm_x86_ops->pre_leave_smm(emul_to_vcpu(ctxt), smstate);
6169 }
6170
6171 static void emulator_post_leave_smm(struct x86_emulate_ctxt *ctxt)
6172 {
6173         kvm_smm_changed(emul_to_vcpu(ctxt));
6174 }
6175
6176 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
6177 {
6178         return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
6179 }
6180
6181 static const struct x86_emulate_ops emulate_ops = {
6182         .read_gpr            = emulator_read_gpr,
6183         .write_gpr           = emulator_write_gpr,
6184         .read_std            = emulator_read_std,
6185         .write_std           = emulator_write_std,
6186         .read_phys           = kvm_read_guest_phys_system,
6187         .fetch               = kvm_fetch_guest_virt,
6188         .read_emulated       = emulator_read_emulated,
6189         .write_emulated      = emulator_write_emulated,
6190         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
6191         .invlpg              = emulator_invlpg,
6192         .pio_in_emulated     = emulator_pio_in_emulated,
6193         .pio_out_emulated    = emulator_pio_out_emulated,
6194         .get_segment         = emulator_get_segment,
6195         .set_segment         = emulator_set_segment,
6196         .get_cached_segment_base = emulator_get_cached_segment_base,
6197         .get_gdt             = emulator_get_gdt,
6198         .get_idt             = emulator_get_idt,
6199         .set_gdt             = emulator_set_gdt,
6200         .set_idt             = emulator_set_idt,
6201         .get_cr              = emulator_get_cr,
6202         .set_cr              = emulator_set_cr,
6203         .cpl                 = emulator_get_cpl,
6204         .get_dr              = emulator_get_dr,
6205         .set_dr              = emulator_set_dr,
6206         .get_smbase          = emulator_get_smbase,
6207         .set_smbase          = emulator_set_smbase,
6208         .set_msr             = emulator_set_msr,
6209         .get_msr             = emulator_get_msr,
6210         .check_pmc           = emulator_check_pmc,
6211         .read_pmc            = emulator_read_pmc,
6212         .halt                = emulator_halt,
6213         .wbinvd              = emulator_wbinvd,
6214         .fix_hypercall       = emulator_fix_hypercall,
6215         .intercept           = emulator_intercept,
6216         .get_cpuid           = emulator_get_cpuid,
6217         .set_nmi_mask        = emulator_set_nmi_mask,
6218         .get_hflags          = emulator_get_hflags,
6219         .set_hflags          = emulator_set_hflags,
6220         .pre_leave_smm       = emulator_pre_leave_smm,
6221         .post_leave_smm      = emulator_post_leave_smm,
6222         .set_xcr             = emulator_set_xcr,
6223 };
6224
6225 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
6226 {
6227         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
6228         /*
6229          * an sti; sti; sequence only disable interrupts for the first
6230          * instruction. So, if the last instruction, be it emulated or
6231          * not, left the system with the INT_STI flag enabled, it
6232          * means that the last instruction is an sti. We should not
6233          * leave the flag on in this case. The same goes for mov ss
6234          */
6235         if (int_shadow & mask)
6236                 mask = 0;
6237         if (unlikely(int_shadow || mask)) {
6238                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
6239                 if (!mask)
6240                         kvm_make_request(KVM_REQ_EVENT, vcpu);
6241         }
6242 }
6243
6244 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
6245 {
6246         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6247         if (ctxt->exception.vector == PF_VECTOR)
6248                 return kvm_propagate_fault(vcpu, &ctxt->exception);
6249
6250         if (ctxt->exception.error_code_valid)
6251                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
6252                                       ctxt->exception.error_code);
6253         else
6254                 kvm_queue_exception(vcpu, ctxt->exception.vector);
6255         return false;
6256 }
6257
6258 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
6259 {
6260         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6261         int cs_db, cs_l;
6262
6263         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
6264
6265         ctxt->eflags = kvm_get_rflags(vcpu);
6266         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
6267
6268         ctxt->eip = kvm_rip_read(vcpu);
6269         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
6270                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
6271                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
6272                      cs_db                              ? X86EMUL_MODE_PROT32 :
6273                                                           X86EMUL_MODE_PROT16;
6274         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
6275         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
6276         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
6277
6278         init_decode_cache(ctxt);
6279         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
6280 }
6281
6282 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
6283 {
6284         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6285         int ret;
6286
6287         init_emulate_ctxt(vcpu);
6288
6289         ctxt->op_bytes = 2;
6290         ctxt->ad_bytes = 2;
6291         ctxt->_eip = ctxt->eip + inc_eip;
6292         ret = emulate_int_real(ctxt, irq);
6293
6294         if (ret != X86EMUL_CONTINUE)
6295                 return EMULATE_FAIL;
6296
6297         ctxt->eip = ctxt->_eip;
6298         kvm_rip_write(vcpu, ctxt->eip);
6299         kvm_set_rflags(vcpu, ctxt->eflags);
6300
6301         return EMULATE_DONE;
6302 }
6303 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
6304
6305 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
6306 {
6307         ++vcpu->stat.insn_emulation_fail;
6308         trace_kvm_emulate_insn_failed(vcpu);
6309
6310         if (emulation_type & EMULTYPE_NO_UD_ON_FAIL)
6311                 return EMULATE_FAIL;
6312
6313         kvm_queue_exception(vcpu, UD_VECTOR);
6314
6315         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
6316                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
6317                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
6318                 vcpu->run->internal.ndata = 0;
6319                 return EMULATE_USER_EXIT;
6320         }
6321
6322         return EMULATE_DONE;
6323 }
6324
6325 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
6326                                   bool write_fault_to_shadow_pgtable,
6327                                   int emulation_type)
6328 {
6329         gpa_t gpa = cr2;
6330         kvm_pfn_t pfn;
6331
6332         if (!(emulation_type & EMULTYPE_ALLOW_RETRY))
6333                 return false;
6334
6335         if (WARN_ON_ONCE(is_guest_mode(vcpu)))
6336                 return false;
6337
6338         if (!vcpu->arch.mmu->direct_map) {
6339                 /*
6340                  * Write permission should be allowed since only
6341                  * write access need to be emulated.
6342                  */
6343                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
6344
6345                 /*
6346                  * If the mapping is invalid in guest, let cpu retry
6347                  * it to generate fault.
6348                  */
6349                 if (gpa == UNMAPPED_GVA)
6350                         return true;
6351         }
6352
6353         /*
6354          * Do not retry the unhandleable instruction if it faults on the
6355          * readonly host memory, otherwise it will goto a infinite loop:
6356          * retry instruction -> write #PF -> emulation fail -> retry
6357          * instruction -> ...
6358          */
6359         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
6360
6361         /*
6362          * If the instruction failed on the error pfn, it can not be fixed,
6363          * report the error to userspace.
6364          */
6365         if (is_error_noslot_pfn(pfn))
6366                 return false;
6367
6368         kvm_release_pfn_clean(pfn);
6369
6370         /* The instructions are well-emulated on direct mmu. */
6371         if (vcpu->arch.mmu->direct_map) {
6372                 unsigned int indirect_shadow_pages;
6373
6374                 spin_lock(&vcpu->kvm->mmu_lock);
6375                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
6376                 spin_unlock(&vcpu->kvm->mmu_lock);
6377
6378                 if (indirect_shadow_pages)
6379                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6380
6381                 return true;
6382         }
6383
6384         /*
6385          * if emulation was due to access to shadowed page table
6386          * and it failed try to unshadow page and re-enter the
6387          * guest to let CPU execute the instruction.
6388          */
6389         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6390
6391         /*
6392          * If the access faults on its page table, it can not
6393          * be fixed by unprotecting shadow page and it should
6394          * be reported to userspace.
6395          */
6396         return !write_fault_to_shadow_pgtable;
6397 }
6398
6399 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
6400                               unsigned long cr2,  int emulation_type)
6401 {
6402         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6403         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
6404
6405         last_retry_eip = vcpu->arch.last_retry_eip;
6406         last_retry_addr = vcpu->arch.last_retry_addr;
6407
6408         /*
6409          * If the emulation is caused by #PF and it is non-page_table
6410          * writing instruction, it means the VM-EXIT is caused by shadow
6411          * page protected, we can zap the shadow page and retry this
6412          * instruction directly.
6413          *
6414          * Note: if the guest uses a non-page-table modifying instruction
6415          * on the PDE that points to the instruction, then we will unmap
6416          * the instruction and go to an infinite loop. So, we cache the
6417          * last retried eip and the last fault address, if we meet the eip
6418          * and the address again, we can break out of the potential infinite
6419          * loop.
6420          */
6421         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
6422
6423         if (!(emulation_type & EMULTYPE_ALLOW_RETRY))
6424                 return false;
6425
6426         if (WARN_ON_ONCE(is_guest_mode(vcpu)))
6427                 return false;
6428
6429         if (x86_page_table_writing_insn(ctxt))
6430                 return false;
6431
6432         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
6433                 return false;
6434
6435         vcpu->arch.last_retry_eip = ctxt->eip;
6436         vcpu->arch.last_retry_addr = cr2;
6437
6438         if (!vcpu->arch.mmu->direct_map)
6439                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
6440
6441         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6442
6443         return true;
6444 }
6445
6446 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
6447 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
6448
6449 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
6450 {
6451         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
6452                 /* This is a good place to trace that we are exiting SMM.  */
6453                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
6454
6455                 /* Process a latched INIT or SMI, if any.  */
6456                 kvm_make_request(KVM_REQ_EVENT, vcpu);
6457         }
6458
6459         kvm_mmu_reset_context(vcpu);
6460 }
6461
6462 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
6463                                 unsigned long *db)
6464 {
6465         u32 dr6 = 0;
6466         int i;
6467         u32 enable, rwlen;
6468
6469         enable = dr7;
6470         rwlen = dr7 >> 16;
6471         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
6472                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
6473                         dr6 |= (1 << i);
6474         return dr6;
6475 }
6476
6477 static void kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu, int *r)
6478 {
6479         struct kvm_run *kvm_run = vcpu->run;
6480
6481         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
6482                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 | DR6_RTM;
6483                 kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
6484                 kvm_run->debug.arch.exception = DB_VECTOR;
6485                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
6486                 *r = EMULATE_USER_EXIT;
6487         } else {
6488                 kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
6489         }
6490 }
6491
6492 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
6493 {
6494         unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
6495         int r;
6496
6497         r = kvm_x86_ops->skip_emulated_instruction(vcpu);
6498         if (unlikely(r != EMULATE_DONE))
6499                 return 0;
6500
6501         /*
6502          * rflags is the old, "raw" value of the flags.  The new value has
6503          * not been saved yet.
6504          *
6505          * This is correct even for TF set by the guest, because "the
6506          * processor will not generate this exception after the instruction
6507          * that sets the TF flag".
6508          */
6509         if (unlikely(rflags & X86_EFLAGS_TF))
6510                 kvm_vcpu_do_singlestep(vcpu, &r);
6511         return r == EMULATE_DONE;
6512 }
6513 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
6514
6515 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
6516 {
6517         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
6518             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
6519                 struct kvm_run *kvm_run = vcpu->run;
6520                 unsigned long eip = kvm_get_linear_rip(vcpu);
6521                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
6522                                            vcpu->arch.guest_debug_dr7,
6523                                            vcpu->arch.eff_db);
6524
6525                 if (dr6 != 0) {
6526                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
6527                         kvm_run->debug.arch.pc = eip;
6528                         kvm_run->debug.arch.exception = DB_VECTOR;
6529                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
6530                         *r = EMULATE_USER_EXIT;
6531                         return true;
6532                 }
6533         }
6534
6535         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
6536             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
6537                 unsigned long eip = kvm_get_linear_rip(vcpu);
6538                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
6539                                            vcpu->arch.dr7,
6540                                            vcpu->arch.db);
6541
6542                 if (dr6 != 0) {
6543                         vcpu->arch.dr6 &= ~DR_TRAP_BITS;
6544                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
6545                         kvm_queue_exception(vcpu, DB_VECTOR);
6546                         *r = EMULATE_DONE;
6547                         return true;
6548                 }
6549         }
6550
6551         return false;
6552 }
6553
6554 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
6555 {
6556         switch (ctxt->opcode_len) {
6557         case 1:
6558                 switch (ctxt->b) {
6559                 case 0xe4:      /* IN */
6560                 case 0xe5:
6561                 case 0xec:
6562                 case 0xed:
6563                 case 0xe6:      /* OUT */
6564                 case 0xe7:
6565                 case 0xee:
6566                 case 0xef:
6567                 case 0x6c:      /* INS */
6568                 case 0x6d:
6569                 case 0x6e:      /* OUTS */
6570                 case 0x6f:
6571                         return true;
6572                 }
6573                 break;
6574         case 2:
6575                 switch (ctxt->b) {
6576                 case 0x33:      /* RDPMC */
6577                         return true;
6578                 }
6579                 break;
6580         }
6581
6582         return false;
6583 }
6584
6585 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
6586                             unsigned long cr2,
6587                             int emulation_type,
6588                             void *insn,
6589                             int insn_len)
6590 {
6591         int r;
6592         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6593         bool writeback = true;
6594         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
6595
6596         vcpu->arch.l1tf_flush_l1d = true;
6597
6598         /*
6599          * Clear write_fault_to_shadow_pgtable here to ensure it is
6600          * never reused.
6601          */
6602         vcpu->arch.write_fault_to_shadow_pgtable = false;
6603         kvm_clear_exception_queue(vcpu);
6604
6605         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
6606                 init_emulate_ctxt(vcpu);
6607
6608                 /*
6609                  * We will reenter on the same instruction since
6610                  * we do not set complete_userspace_io.  This does not
6611                  * handle watchpoints yet, those would be handled in
6612                  * the emulate_ops.
6613                  */
6614                 if (!(emulation_type & EMULTYPE_SKIP) &&
6615                     kvm_vcpu_check_breakpoint(vcpu, &r))
6616                         return r;
6617
6618                 ctxt->interruptibility = 0;
6619                 ctxt->have_exception = false;
6620                 ctxt->exception.vector = -1;
6621                 ctxt->perm_ok = false;
6622
6623                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
6624
6625                 r = x86_decode_insn(ctxt, insn, insn_len);
6626
6627                 trace_kvm_emulate_insn_start(vcpu);
6628                 ++vcpu->stat.insn_emulation;
6629                 if (r != EMULATION_OK)  {
6630                         if (emulation_type & EMULTYPE_TRAP_UD)
6631                                 return EMULATE_FAIL;
6632                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
6633                                                 emulation_type))
6634                                 return EMULATE_DONE;
6635                         if (ctxt->have_exception) {
6636                                 /*
6637                                  * #UD should result in just EMULATION_FAILED, and trap-like
6638                                  * exception should not be encountered during decode.
6639                                  */
6640                                 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
6641                                              exception_type(ctxt->exception.vector) == EXCPT_TRAP);
6642                                 inject_emulated_exception(vcpu);
6643                                 return EMULATE_DONE;
6644                         }
6645                         if (emulation_type & EMULTYPE_SKIP)
6646                                 return EMULATE_FAIL;
6647                         return handle_emulation_failure(vcpu, emulation_type);
6648                 }
6649         }
6650
6651         if ((emulation_type & EMULTYPE_VMWARE) &&
6652             !is_vmware_backdoor_opcode(ctxt))
6653                 return EMULATE_FAIL;
6654
6655         if (emulation_type & EMULTYPE_SKIP) {
6656                 kvm_rip_write(vcpu, ctxt->_eip);
6657                 if (ctxt->eflags & X86_EFLAGS_RF)
6658                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
6659                 kvm_x86_ops->set_interrupt_shadow(vcpu, 0);
6660                 return EMULATE_DONE;
6661         }
6662
6663         if (retry_instruction(ctxt, cr2, emulation_type))
6664                 return EMULATE_DONE;
6665
6666         /* this is needed for vmware backdoor interface to work since it
6667            changes registers values  during IO operation */
6668         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
6669                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
6670                 emulator_invalidate_register_cache(ctxt);
6671         }
6672
6673 restart:
6674         /* Save the faulting GPA (cr2) in the address field */
6675         ctxt->exception.address = cr2;
6676
6677         r = x86_emulate_insn(ctxt);
6678
6679         if (r == EMULATION_INTERCEPTED)
6680                 return EMULATE_DONE;
6681
6682         if (r == EMULATION_FAILED) {
6683                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
6684                                         emulation_type))
6685                         return EMULATE_DONE;
6686
6687                 return handle_emulation_failure(vcpu, emulation_type);
6688         }
6689
6690         if (ctxt->have_exception) {
6691                 r = EMULATE_DONE;
6692                 if (inject_emulated_exception(vcpu))
6693                         return r;
6694         } else if (vcpu->arch.pio.count) {
6695                 if (!vcpu->arch.pio.in) {
6696                         /* FIXME: return into emulator if single-stepping.  */
6697                         vcpu->arch.pio.count = 0;
6698                 } else {
6699                         writeback = false;
6700                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
6701                 }
6702                 r = EMULATE_USER_EXIT;
6703         } else if (vcpu->mmio_needed) {
6704                 ++vcpu->stat.mmio_exits;
6705
6706                 if (!vcpu->mmio_is_write)
6707                         writeback = false;
6708                 r = EMULATE_USER_EXIT;
6709                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6710         } else if (r == EMULATION_RESTART)
6711                 goto restart;
6712         else
6713                 r = EMULATE_DONE;
6714
6715         if (writeback) {
6716                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
6717                 toggle_interruptibility(vcpu, ctxt->interruptibility);
6718                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6719                 if (!ctxt->have_exception ||
6720                     exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
6721                         kvm_rip_write(vcpu, ctxt->eip);
6722                         if (r == EMULATE_DONE && ctxt->tf)
6723                                 kvm_vcpu_do_singlestep(vcpu, &r);
6724                         __kvm_set_rflags(vcpu, ctxt->eflags);
6725                 }
6726
6727                 /*
6728                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
6729                  * do nothing, and it will be requested again as soon as
6730                  * the shadow expires.  But we still need to check here,
6731                  * because POPF has no interrupt shadow.
6732                  */
6733                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
6734                         kvm_make_request(KVM_REQ_EVENT, vcpu);
6735         } else
6736                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
6737
6738         return r;
6739 }
6740
6741 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
6742 {
6743         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
6744 }
6745 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
6746
6747 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
6748                                         void *insn, int insn_len)
6749 {
6750         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
6751 }
6752 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
6753
6754 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
6755 {
6756         vcpu->arch.pio.count = 0;
6757         return 1;
6758 }
6759
6760 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
6761 {
6762         vcpu->arch.pio.count = 0;
6763
6764         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
6765                 return 1;
6766
6767         return kvm_skip_emulated_instruction(vcpu);
6768 }
6769
6770 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
6771                             unsigned short port)
6772 {
6773         unsigned long val = kvm_rax_read(vcpu);
6774         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
6775                                             size, port, &val, 1);
6776         if (ret)
6777                 return ret;
6778
6779         /*
6780          * Workaround userspace that relies on old KVM behavior of %rip being
6781          * incremented prior to exiting to userspace to handle "OUT 0x7e".
6782          */
6783         if (port == 0x7e &&
6784             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
6785                 vcpu->arch.complete_userspace_io =
6786                         complete_fast_pio_out_port_0x7e;
6787                 kvm_skip_emulated_instruction(vcpu);
6788         } else {
6789                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
6790                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
6791         }
6792         return 0;
6793 }
6794
6795 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
6796 {
6797         unsigned long val;
6798
6799         /* We should only ever be called with arch.pio.count equal to 1 */
6800         BUG_ON(vcpu->arch.pio.count != 1);
6801
6802         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
6803                 vcpu->arch.pio.count = 0;
6804                 return 1;
6805         }
6806
6807         /* For size less than 4 we merge, else we zero extend */
6808         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
6809
6810         /*
6811          * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
6812          * the copy and tracing
6813          */
6814         emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, vcpu->arch.pio.size,
6815                                  vcpu->arch.pio.port, &val, 1);
6816         kvm_rax_write(vcpu, val);
6817
6818         return kvm_skip_emulated_instruction(vcpu);
6819 }
6820
6821 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
6822                            unsigned short port)
6823 {
6824         unsigned long val;
6825         int ret;
6826
6827         /* For size less than 4 we merge, else we zero extend */
6828         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
6829
6830         ret = emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, size, port,
6831                                        &val, 1);
6832         if (ret) {
6833                 kvm_rax_write(vcpu, val);
6834                 return ret;
6835         }
6836
6837         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
6838         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
6839
6840         return 0;
6841 }
6842
6843 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
6844 {
6845         int ret;
6846
6847         if (in)
6848                 ret = kvm_fast_pio_in(vcpu, size, port);
6849         else
6850                 ret = kvm_fast_pio_out(vcpu, size, port);
6851         return ret && kvm_skip_emulated_instruction(vcpu);
6852 }
6853 EXPORT_SYMBOL_GPL(kvm_fast_pio);
6854
6855 static int kvmclock_cpu_down_prep(unsigned int cpu)
6856 {
6857         __this_cpu_write(cpu_tsc_khz, 0);
6858         return 0;
6859 }
6860
6861 static void tsc_khz_changed(void *data)
6862 {
6863         struct cpufreq_freqs *freq = data;
6864         unsigned long khz = 0;
6865
6866         if (data)
6867                 khz = freq->new;
6868         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6869                 khz = cpufreq_quick_get(raw_smp_processor_id());
6870         if (!khz)
6871                 khz = tsc_khz;
6872         __this_cpu_write(cpu_tsc_khz, khz);
6873 }
6874
6875 #ifdef CONFIG_X86_64
6876 static void kvm_hyperv_tsc_notifier(void)
6877 {
6878         struct kvm *kvm;
6879         struct kvm_vcpu *vcpu;
6880         int cpu;
6881
6882         mutex_lock(&kvm_lock);
6883         list_for_each_entry(kvm, &vm_list, vm_list)
6884                 kvm_make_mclock_inprogress_request(kvm);
6885
6886         hyperv_stop_tsc_emulation();
6887
6888         /* TSC frequency always matches when on Hyper-V */
6889         for_each_present_cpu(cpu)
6890                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
6891         kvm_max_guest_tsc_khz = tsc_khz;
6892
6893         list_for_each_entry(kvm, &vm_list, vm_list) {
6894                 struct kvm_arch *ka = &kvm->arch;
6895
6896                 spin_lock(&ka->pvclock_gtod_sync_lock);
6897
6898                 pvclock_update_vm_gtod_copy(kvm);
6899
6900                 kvm_for_each_vcpu(cpu, vcpu, kvm)
6901                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6902
6903                 kvm_for_each_vcpu(cpu, vcpu, kvm)
6904                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
6905
6906                 spin_unlock(&ka->pvclock_gtod_sync_lock);
6907         }
6908         mutex_unlock(&kvm_lock);
6909 }
6910 #endif
6911
6912 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
6913 {
6914         struct kvm *kvm;
6915         struct kvm_vcpu *vcpu;
6916         int i, send_ipi = 0;
6917
6918         /*
6919          * We allow guests to temporarily run on slowing clocks,
6920          * provided we notify them after, or to run on accelerating
6921          * clocks, provided we notify them before.  Thus time never
6922          * goes backwards.
6923          *
6924          * However, we have a problem.  We can't atomically update
6925          * the frequency of a given CPU from this function; it is
6926          * merely a notifier, which can be called from any CPU.
6927          * Changing the TSC frequency at arbitrary points in time
6928          * requires a recomputation of local variables related to
6929          * the TSC for each VCPU.  We must flag these local variables
6930          * to be updated and be sure the update takes place with the
6931          * new frequency before any guests proceed.
6932          *
6933          * Unfortunately, the combination of hotplug CPU and frequency
6934          * change creates an intractable locking scenario; the order
6935          * of when these callouts happen is undefined with respect to
6936          * CPU hotplug, and they can race with each other.  As such,
6937          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
6938          * undefined; you can actually have a CPU frequency change take
6939          * place in between the computation of X and the setting of the
6940          * variable.  To protect against this problem, all updates of
6941          * the per_cpu tsc_khz variable are done in an interrupt
6942          * protected IPI, and all callers wishing to update the value
6943          * must wait for a synchronous IPI to complete (which is trivial
6944          * if the caller is on the CPU already).  This establishes the
6945          * necessary total order on variable updates.
6946          *
6947          * Note that because a guest time update may take place
6948          * anytime after the setting of the VCPU's request bit, the
6949          * correct TSC value must be set before the request.  However,
6950          * to ensure the update actually makes it to any guest which
6951          * starts running in hardware virtualization between the set
6952          * and the acquisition of the spinlock, we must also ping the
6953          * CPU after setting the request bit.
6954          *
6955          */
6956
6957         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
6958
6959         mutex_lock(&kvm_lock);
6960         list_for_each_entry(kvm, &vm_list, vm_list) {
6961                 kvm_for_each_vcpu(i, vcpu, kvm) {
6962                         if (vcpu->cpu != cpu)
6963                                 continue;
6964                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6965                         if (vcpu->cpu != raw_smp_processor_id())
6966                                 send_ipi = 1;
6967                 }
6968         }
6969         mutex_unlock(&kvm_lock);
6970
6971         if (freq->old < freq->new && send_ipi) {
6972                 /*
6973                  * We upscale the frequency.  Must make the guest
6974                  * doesn't see old kvmclock values while running with
6975                  * the new frequency, otherwise we risk the guest sees
6976                  * time go backwards.
6977                  *
6978                  * In case we update the frequency for another cpu
6979                  * (which might be in guest context) send an interrupt
6980                  * to kick the cpu out of guest context.  Next time
6981                  * guest context is entered kvmclock will be updated,
6982                  * so the guest will not see stale values.
6983                  */
6984                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
6985         }
6986 }
6987
6988 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
6989                                      void *data)
6990 {
6991         struct cpufreq_freqs *freq = data;
6992         int cpu;
6993
6994         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
6995                 return 0;
6996         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
6997                 return 0;
6998
6999         for_each_cpu(cpu, freq->policy->cpus)
7000                 __kvmclock_cpufreq_notifier(freq, cpu);
7001
7002         return 0;
7003 }
7004
7005 static struct notifier_block kvmclock_cpufreq_notifier_block = {
7006         .notifier_call  = kvmclock_cpufreq_notifier
7007 };
7008
7009 static int kvmclock_cpu_online(unsigned int cpu)
7010 {
7011         tsc_khz_changed(NULL);
7012         return 0;
7013 }
7014
7015 static void kvm_timer_init(void)
7016 {
7017         max_tsc_khz = tsc_khz;
7018
7019         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
7020 #ifdef CONFIG_CPU_FREQ
7021                 struct cpufreq_policy policy;
7022                 int cpu;
7023
7024                 memset(&policy, 0, sizeof(policy));
7025                 cpu = get_cpu();
7026                 cpufreq_get_policy(&policy, cpu);
7027                 if (policy.cpuinfo.max_freq)
7028                         max_tsc_khz = policy.cpuinfo.max_freq;
7029                 put_cpu();
7030 #endif
7031                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
7032                                           CPUFREQ_TRANSITION_NOTIFIER);
7033         }
7034
7035         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
7036                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
7037 }
7038
7039 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
7040 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
7041
7042 int kvm_is_in_guest(void)
7043 {
7044         return __this_cpu_read(current_vcpu) != NULL;
7045 }
7046
7047 static int kvm_is_user_mode(void)
7048 {
7049         int user_mode = 3;
7050
7051         if (__this_cpu_read(current_vcpu))
7052                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
7053
7054         return user_mode != 0;
7055 }
7056
7057 static unsigned long kvm_get_guest_ip(void)
7058 {
7059         unsigned long ip = 0;
7060
7061         if (__this_cpu_read(current_vcpu))
7062                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
7063
7064         return ip;
7065 }
7066
7067 static void kvm_handle_intel_pt_intr(void)
7068 {
7069         struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
7070
7071         kvm_make_request(KVM_REQ_PMI, vcpu);
7072         __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
7073                         (unsigned long *)&vcpu->arch.pmu.global_status);
7074 }
7075
7076 static struct perf_guest_info_callbacks kvm_guest_cbs = {
7077         .is_in_guest            = kvm_is_in_guest,
7078         .is_user_mode           = kvm_is_user_mode,
7079         .get_guest_ip           = kvm_get_guest_ip,
7080         .handle_intel_pt_intr   = kvm_handle_intel_pt_intr,
7081 };
7082
7083 #ifdef CONFIG_X86_64
7084 static void pvclock_gtod_update_fn(struct work_struct *work)
7085 {
7086         struct kvm *kvm;
7087
7088         struct kvm_vcpu *vcpu;
7089         int i;
7090
7091         mutex_lock(&kvm_lock);
7092         list_for_each_entry(kvm, &vm_list, vm_list)
7093                 kvm_for_each_vcpu(i, vcpu, kvm)
7094                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7095         atomic_set(&kvm_guest_has_master_clock, 0);
7096         mutex_unlock(&kvm_lock);
7097 }
7098
7099 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
7100
7101 /*
7102  * Notification about pvclock gtod data update.
7103  */
7104 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
7105                                void *priv)
7106 {
7107         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
7108         struct timekeeper *tk = priv;
7109
7110         update_pvclock_gtod(tk);
7111
7112         /* disable master clock if host does not trust, or does not
7113          * use, TSC based clocksource.
7114          */
7115         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
7116             atomic_read(&kvm_guest_has_master_clock) != 0)
7117                 queue_work(system_long_wq, &pvclock_gtod_work);
7118
7119         return 0;
7120 }
7121
7122 static struct notifier_block pvclock_gtod_notifier = {
7123         .notifier_call = pvclock_gtod_notify,
7124 };
7125 #endif
7126
7127 int kvm_arch_init(void *opaque)
7128 {
7129         int r;
7130         struct kvm_x86_ops *ops = opaque;
7131
7132         if (kvm_x86_ops) {
7133                 printk(KERN_ERR "kvm: already loaded the other module\n");
7134                 r = -EEXIST;
7135                 goto out;
7136         }
7137
7138         if (!ops->cpu_has_kvm_support()) {
7139                 printk(KERN_ERR "kvm: no hardware support\n");
7140                 r = -EOPNOTSUPP;
7141                 goto out;
7142         }
7143         if (ops->disabled_by_bios()) {
7144                 printk(KERN_ERR "kvm: disabled by bios\n");
7145                 r = -EOPNOTSUPP;
7146                 goto out;
7147         }
7148
7149         /*
7150          * KVM explicitly assumes that the guest has an FPU and
7151          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
7152          * vCPU's FPU state as a fxregs_state struct.
7153          */
7154         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
7155                 printk(KERN_ERR "kvm: inadequate fpu\n");
7156                 r = -EOPNOTSUPP;
7157                 goto out;
7158         }
7159
7160         r = -ENOMEM;
7161         x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
7162                                           __alignof__(struct fpu), SLAB_ACCOUNT,
7163                                           NULL);
7164         if (!x86_fpu_cache) {
7165                 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
7166                 goto out;
7167         }
7168
7169         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
7170         if (!shared_msrs) {
7171                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
7172                 goto out_free_x86_fpu_cache;
7173         }
7174
7175         r = kvm_mmu_module_init();
7176         if (r)
7177                 goto out_free_percpu;
7178
7179         kvm_x86_ops = ops;
7180
7181         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
7182                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
7183                         PT_PRESENT_MASK, 0, sme_me_mask);
7184         kvm_timer_init();
7185
7186         perf_register_guest_info_callbacks(&kvm_guest_cbs);
7187
7188         if (boot_cpu_has(X86_FEATURE_XSAVE))
7189                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
7190
7191         kvm_lapic_init();
7192         if (pi_inject_timer == -1)
7193                 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
7194 #ifdef CONFIG_X86_64
7195         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
7196
7197         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
7198                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
7199 #endif
7200
7201         return 0;
7202
7203 out_free_percpu:
7204         free_percpu(shared_msrs);
7205 out_free_x86_fpu_cache:
7206         kmem_cache_destroy(x86_fpu_cache);
7207 out:
7208         return r;
7209 }
7210
7211 void kvm_arch_exit(void)
7212 {
7213 #ifdef CONFIG_X86_64
7214         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
7215                 clear_hv_tscchange_cb();
7216 #endif
7217         kvm_lapic_exit();
7218         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
7219
7220         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
7221                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
7222                                             CPUFREQ_TRANSITION_NOTIFIER);
7223         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
7224 #ifdef CONFIG_X86_64
7225         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
7226 #endif
7227         kvm_x86_ops = NULL;
7228         kvm_mmu_module_exit();
7229         free_percpu(shared_msrs);
7230         kmem_cache_destroy(x86_fpu_cache);
7231 }
7232
7233 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
7234 {
7235         ++vcpu->stat.halt_exits;
7236         if (lapic_in_kernel(vcpu)) {
7237                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
7238                 return 1;
7239         } else {
7240                 vcpu->run->exit_reason = KVM_EXIT_HLT;
7241                 return 0;
7242         }
7243 }
7244 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
7245
7246 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
7247 {
7248         int ret = kvm_skip_emulated_instruction(vcpu);
7249         /*
7250          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
7251          * KVM_EXIT_DEBUG here.
7252          */
7253         return kvm_vcpu_halt(vcpu) && ret;
7254 }
7255 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
7256
7257 #ifdef CONFIG_X86_64
7258 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
7259                                 unsigned long clock_type)
7260 {
7261         struct kvm_clock_pairing clock_pairing;
7262         struct timespec64 ts;
7263         u64 cycle;
7264         int ret;
7265
7266         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
7267                 return -KVM_EOPNOTSUPP;
7268
7269         if (kvm_get_walltime_and_clockread(&ts, &cycle) == false)
7270                 return -KVM_EOPNOTSUPP;
7271
7272         clock_pairing.sec = ts.tv_sec;
7273         clock_pairing.nsec = ts.tv_nsec;
7274         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
7275         clock_pairing.flags = 0;
7276         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
7277
7278         ret = 0;
7279         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
7280                             sizeof(struct kvm_clock_pairing)))
7281                 ret = -KVM_EFAULT;
7282
7283         return ret;
7284 }
7285 #endif
7286
7287 /*
7288  * kvm_pv_kick_cpu_op:  Kick a vcpu.
7289  *
7290  * @apicid - apicid of vcpu to be kicked.
7291  */
7292 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
7293 {
7294         struct kvm_lapic_irq lapic_irq;
7295
7296         lapic_irq.shorthand = 0;
7297         lapic_irq.dest_mode = 0;
7298         lapic_irq.level = 0;
7299         lapic_irq.dest_id = apicid;
7300         lapic_irq.msi_redir_hint = false;
7301
7302         lapic_irq.delivery_mode = APIC_DM_REMRD;
7303         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
7304 }
7305
7306 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
7307 {
7308         if (!lapic_in_kernel(vcpu)) {
7309                 WARN_ON_ONCE(vcpu->arch.apicv_active);
7310                 return;
7311         }
7312         if (!vcpu->arch.apicv_active)
7313                 return;
7314
7315         vcpu->arch.apicv_active = false;
7316         kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
7317 }
7318
7319 static void kvm_sched_yield(struct kvm *kvm, unsigned long dest_id)
7320 {
7321         struct kvm_vcpu *target = NULL;
7322         struct kvm_apic_map *map;
7323
7324         rcu_read_lock();
7325         map = rcu_dereference(kvm->arch.apic_map);
7326
7327         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
7328                 target = map->phys_map[dest_id]->vcpu;
7329
7330         rcu_read_unlock();
7331
7332         if (target && READ_ONCE(target->ready))
7333                 kvm_vcpu_yield_to(target);
7334 }
7335
7336 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
7337 {
7338         unsigned long nr, a0, a1, a2, a3, ret;
7339         int op_64_bit;
7340
7341         if (kvm_hv_hypercall_enabled(vcpu->kvm))
7342                 return kvm_hv_hypercall(vcpu);
7343
7344         nr = kvm_rax_read(vcpu);
7345         a0 = kvm_rbx_read(vcpu);
7346         a1 = kvm_rcx_read(vcpu);
7347         a2 = kvm_rdx_read(vcpu);
7348         a3 = kvm_rsi_read(vcpu);
7349
7350         trace_kvm_hypercall(nr, a0, a1, a2, a3);
7351
7352         op_64_bit = is_64_bit_mode(vcpu);
7353         if (!op_64_bit) {
7354                 nr &= 0xFFFFFFFF;
7355                 a0 &= 0xFFFFFFFF;
7356                 a1 &= 0xFFFFFFFF;
7357                 a2 &= 0xFFFFFFFF;
7358                 a3 &= 0xFFFFFFFF;
7359         }
7360
7361         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
7362                 ret = -KVM_EPERM;
7363                 goto out;
7364         }
7365
7366         switch (nr) {
7367         case KVM_HC_VAPIC_POLL_IRQ:
7368                 ret = 0;
7369                 break;
7370         case KVM_HC_KICK_CPU:
7371                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
7372                 kvm_sched_yield(vcpu->kvm, a1);
7373                 ret = 0;
7374                 break;
7375 #ifdef CONFIG_X86_64
7376         case KVM_HC_CLOCK_PAIRING:
7377                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
7378                 break;
7379 #endif
7380         case KVM_HC_SEND_IPI:
7381                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
7382                 break;
7383         case KVM_HC_SCHED_YIELD:
7384                 kvm_sched_yield(vcpu->kvm, a0);
7385                 ret = 0;
7386                 break;
7387         default:
7388                 ret = -KVM_ENOSYS;
7389                 break;
7390         }
7391 out:
7392         if (!op_64_bit)
7393                 ret = (u32)ret;
7394         kvm_rax_write(vcpu, ret);
7395
7396         ++vcpu->stat.hypercalls;
7397         return kvm_skip_emulated_instruction(vcpu);
7398 }
7399 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
7400
7401 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
7402 {
7403         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7404         char instruction[3];
7405         unsigned long rip = kvm_rip_read(vcpu);
7406
7407         kvm_x86_ops->patch_hypercall(vcpu, instruction);
7408
7409         return emulator_write_emulated(ctxt, rip, instruction, 3,
7410                 &ctxt->exception);
7411 }
7412
7413 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
7414 {
7415         return vcpu->run->request_interrupt_window &&
7416                 likely(!pic_in_kernel(vcpu->kvm));
7417 }
7418
7419 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
7420 {
7421         struct kvm_run *kvm_run = vcpu->run;
7422
7423         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
7424         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
7425         kvm_run->cr8 = kvm_get_cr8(vcpu);
7426         kvm_run->apic_base = kvm_get_apic_base(vcpu);
7427         kvm_run->ready_for_interrupt_injection =
7428                 pic_in_kernel(vcpu->kvm) ||
7429                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
7430 }
7431
7432 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
7433 {
7434         int max_irr, tpr;
7435
7436         if (!kvm_x86_ops->update_cr8_intercept)
7437                 return;
7438
7439         if (!lapic_in_kernel(vcpu))
7440                 return;
7441
7442         if (vcpu->arch.apicv_active)
7443                 return;
7444
7445         if (!vcpu->arch.apic->vapic_addr)
7446                 max_irr = kvm_lapic_find_highest_irr(vcpu);
7447         else
7448                 max_irr = -1;
7449
7450         if (max_irr != -1)
7451                 max_irr >>= 4;
7452
7453         tpr = kvm_lapic_get_cr8(vcpu);
7454
7455         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
7456 }
7457
7458 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
7459 {
7460         int r;
7461
7462         /* try to reinject previous events if any */
7463
7464         if (vcpu->arch.exception.injected)
7465                 kvm_x86_ops->queue_exception(vcpu);
7466         /*
7467          * Do not inject an NMI or interrupt if there is a pending
7468          * exception.  Exceptions and interrupts are recognized at
7469          * instruction boundaries, i.e. the start of an instruction.
7470          * Trap-like exceptions, e.g. #DB, have higher priority than
7471          * NMIs and interrupts, i.e. traps are recognized before an
7472          * NMI/interrupt that's pending on the same instruction.
7473          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
7474          * priority, but are only generated (pended) during instruction
7475          * execution, i.e. a pending fault-like exception means the
7476          * fault occurred on the *previous* instruction and must be
7477          * serviced prior to recognizing any new events in order to
7478          * fully complete the previous instruction.
7479          */
7480         else if (!vcpu->arch.exception.pending) {
7481                 if (vcpu->arch.nmi_injected)
7482                         kvm_x86_ops->set_nmi(vcpu);
7483                 else if (vcpu->arch.interrupt.injected)
7484                         kvm_x86_ops->set_irq(vcpu);
7485         }
7486
7487         /*
7488          * Call check_nested_events() even if we reinjected a previous event
7489          * in order for caller to determine if it should require immediate-exit
7490          * from L2 to L1 due to pending L1 events which require exit
7491          * from L2 to L1.
7492          */
7493         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
7494                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
7495                 if (r != 0)
7496                         return r;
7497         }
7498
7499         /* try to inject new event if pending */
7500         if (vcpu->arch.exception.pending) {
7501                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
7502                                         vcpu->arch.exception.has_error_code,
7503                                         vcpu->arch.exception.error_code);
7504
7505                 WARN_ON_ONCE(vcpu->arch.exception.injected);
7506                 vcpu->arch.exception.pending = false;
7507                 vcpu->arch.exception.injected = true;
7508
7509                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
7510                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
7511                                              X86_EFLAGS_RF);
7512
7513                 if (vcpu->arch.exception.nr == DB_VECTOR) {
7514                         /*
7515                          * This code assumes that nSVM doesn't use
7516                          * check_nested_events(). If it does, the
7517                          * DR6/DR7 changes should happen before L1
7518                          * gets a #VMEXIT for an intercepted #DB in
7519                          * L2.  (Under VMX, on the other hand, the
7520                          * DR6/DR7 changes should not happen in the
7521                          * event of a VM-exit to L1 for an intercepted
7522                          * #DB in L2.)
7523                          */
7524                         kvm_deliver_exception_payload(vcpu);
7525                         if (vcpu->arch.dr7 & DR7_GD) {
7526                                 vcpu->arch.dr7 &= ~DR7_GD;
7527                                 kvm_update_dr7(vcpu);
7528                         }
7529                 }
7530
7531                 kvm_x86_ops->queue_exception(vcpu);
7532         }
7533
7534         /* Don't consider new event if we re-injected an event */
7535         if (kvm_event_needs_reinjection(vcpu))
7536                 return 0;
7537
7538         if (vcpu->arch.smi_pending && !is_smm(vcpu) &&
7539             kvm_x86_ops->smi_allowed(vcpu)) {
7540                 vcpu->arch.smi_pending = false;
7541                 ++vcpu->arch.smi_count;
7542                 enter_smm(vcpu);
7543         } else if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
7544                 --vcpu->arch.nmi_pending;
7545                 vcpu->arch.nmi_injected = true;
7546                 kvm_x86_ops->set_nmi(vcpu);
7547         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
7548                 /*
7549                  * Because interrupts can be injected asynchronously, we are
7550                  * calling check_nested_events again here to avoid a race condition.
7551                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
7552                  * proposal and current concerns.  Perhaps we should be setting
7553                  * KVM_REQ_EVENT only on certain events and not unconditionally?
7554                  */
7555                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
7556                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
7557                         if (r != 0)
7558                                 return r;
7559                 }
7560                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
7561                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
7562                                             false);
7563                         kvm_x86_ops->set_irq(vcpu);
7564                 }
7565         }
7566
7567         return 0;
7568 }
7569
7570 static void process_nmi(struct kvm_vcpu *vcpu)
7571 {
7572         unsigned limit = 2;
7573
7574         /*
7575          * x86 is limited to one NMI running, and one NMI pending after it.
7576          * If an NMI is already in progress, limit further NMIs to just one.
7577          * Otherwise, allow two (and we'll inject the first one immediately).
7578          */
7579         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
7580                 limit = 1;
7581
7582         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
7583         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
7584         kvm_make_request(KVM_REQ_EVENT, vcpu);
7585 }
7586
7587 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
7588 {
7589         u32 flags = 0;
7590         flags |= seg->g       << 23;
7591         flags |= seg->db      << 22;
7592         flags |= seg->l       << 21;
7593         flags |= seg->avl     << 20;
7594         flags |= seg->present << 15;
7595         flags |= seg->dpl     << 13;
7596         flags |= seg->s       << 12;
7597         flags |= seg->type    << 8;
7598         return flags;
7599 }
7600
7601 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
7602 {
7603         struct kvm_segment seg;
7604         int offset;
7605
7606         kvm_get_segment(vcpu, &seg, n);
7607         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
7608
7609         if (n < 3)
7610                 offset = 0x7f84 + n * 12;
7611         else
7612                 offset = 0x7f2c + (n - 3) * 12;
7613
7614         put_smstate(u32, buf, offset + 8, seg.base);
7615         put_smstate(u32, buf, offset + 4, seg.limit);
7616         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
7617 }
7618
7619 #ifdef CONFIG_X86_64
7620 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
7621 {
7622         struct kvm_segment seg;
7623         int offset;
7624         u16 flags;
7625
7626         kvm_get_segment(vcpu, &seg, n);
7627         offset = 0x7e00 + n * 16;
7628
7629         flags = enter_smm_get_segment_flags(&seg) >> 8;
7630         put_smstate(u16, buf, offset, seg.selector);
7631         put_smstate(u16, buf, offset + 2, flags);
7632         put_smstate(u32, buf, offset + 4, seg.limit);
7633         put_smstate(u64, buf, offset + 8, seg.base);
7634 }
7635 #endif
7636
7637 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
7638 {
7639         struct desc_ptr dt;
7640         struct kvm_segment seg;
7641         unsigned long val;
7642         int i;
7643
7644         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
7645         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
7646         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
7647         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
7648
7649         for (i = 0; i < 8; i++)
7650                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
7651
7652         kvm_get_dr(vcpu, 6, &val);
7653         put_smstate(u32, buf, 0x7fcc, (u32)val);
7654         kvm_get_dr(vcpu, 7, &val);
7655         put_smstate(u32, buf, 0x7fc8, (u32)val);
7656
7657         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
7658         put_smstate(u32, buf, 0x7fc4, seg.selector);
7659         put_smstate(u32, buf, 0x7f64, seg.base);
7660         put_smstate(u32, buf, 0x7f60, seg.limit);
7661         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
7662
7663         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
7664         put_smstate(u32, buf, 0x7fc0, seg.selector);
7665         put_smstate(u32, buf, 0x7f80, seg.base);
7666         put_smstate(u32, buf, 0x7f7c, seg.limit);
7667         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
7668
7669         kvm_x86_ops->get_gdt(vcpu, &dt);
7670         put_smstate(u32, buf, 0x7f74, dt.address);
7671         put_smstate(u32, buf, 0x7f70, dt.size);
7672
7673         kvm_x86_ops->get_idt(vcpu, &dt);
7674         put_smstate(u32, buf, 0x7f58, dt.address);
7675         put_smstate(u32, buf, 0x7f54, dt.size);
7676
7677         for (i = 0; i < 6; i++)
7678                 enter_smm_save_seg_32(vcpu, buf, i);
7679
7680         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
7681
7682         /* revision id */
7683         put_smstate(u32, buf, 0x7efc, 0x00020000);
7684         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
7685 }
7686
7687 #ifdef CONFIG_X86_64
7688 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
7689 {
7690         struct desc_ptr dt;
7691         struct kvm_segment seg;
7692         unsigned long val;
7693         int i;
7694
7695         for (i = 0; i < 16; i++)
7696                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
7697
7698         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
7699         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
7700
7701         kvm_get_dr(vcpu, 6, &val);
7702         put_smstate(u64, buf, 0x7f68, val);
7703         kvm_get_dr(vcpu, 7, &val);
7704         put_smstate(u64, buf, 0x7f60, val);
7705
7706         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
7707         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
7708         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
7709
7710         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
7711
7712         /* revision id */
7713         put_smstate(u32, buf, 0x7efc, 0x00020064);
7714
7715         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
7716
7717         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
7718         put_smstate(u16, buf, 0x7e90, seg.selector);
7719         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
7720         put_smstate(u32, buf, 0x7e94, seg.limit);
7721         put_smstate(u64, buf, 0x7e98, seg.base);
7722
7723         kvm_x86_ops->get_idt(vcpu, &dt);
7724         put_smstate(u32, buf, 0x7e84, dt.size);
7725         put_smstate(u64, buf, 0x7e88, dt.address);
7726
7727         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
7728         put_smstate(u16, buf, 0x7e70, seg.selector);
7729         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
7730         put_smstate(u32, buf, 0x7e74, seg.limit);
7731         put_smstate(u64, buf, 0x7e78, seg.base);
7732
7733         kvm_x86_ops->get_gdt(vcpu, &dt);
7734         put_smstate(u32, buf, 0x7e64, dt.size);
7735         put_smstate(u64, buf, 0x7e68, dt.address);
7736
7737         for (i = 0; i < 6; i++)
7738                 enter_smm_save_seg_64(vcpu, buf, i);
7739 }
7740 #endif
7741
7742 static void enter_smm(struct kvm_vcpu *vcpu)
7743 {
7744         struct kvm_segment cs, ds;
7745         struct desc_ptr dt;
7746         char buf[512];
7747         u32 cr0;
7748
7749         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
7750         memset(buf, 0, 512);
7751 #ifdef CONFIG_X86_64
7752         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7753                 enter_smm_save_state_64(vcpu, buf);
7754         else
7755 #endif
7756                 enter_smm_save_state_32(vcpu, buf);
7757
7758         /*
7759          * Give pre_enter_smm() a chance to make ISA-specific changes to the
7760          * vCPU state (e.g. leave guest mode) after we've saved the state into
7761          * the SMM state-save area.
7762          */
7763         kvm_x86_ops->pre_enter_smm(vcpu, buf);
7764
7765         vcpu->arch.hflags |= HF_SMM_MASK;
7766         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
7767
7768         if (kvm_x86_ops->get_nmi_mask(vcpu))
7769                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
7770         else
7771                 kvm_x86_ops->set_nmi_mask(vcpu, true);
7772
7773         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
7774         kvm_rip_write(vcpu, 0x8000);
7775
7776         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
7777         kvm_x86_ops->set_cr0(vcpu, cr0);
7778         vcpu->arch.cr0 = cr0;
7779
7780         kvm_x86_ops->set_cr4(vcpu, 0);
7781
7782         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
7783         dt.address = dt.size = 0;
7784         kvm_x86_ops->set_idt(vcpu, &dt);
7785
7786         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
7787
7788         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
7789         cs.base = vcpu->arch.smbase;
7790
7791         ds.selector = 0;
7792         ds.base = 0;
7793
7794         cs.limit    = ds.limit = 0xffffffff;
7795         cs.type     = ds.type = 0x3;
7796         cs.dpl      = ds.dpl = 0;
7797         cs.db       = ds.db = 0;
7798         cs.s        = ds.s = 1;
7799         cs.l        = ds.l = 0;
7800         cs.g        = ds.g = 1;
7801         cs.avl      = ds.avl = 0;
7802         cs.present  = ds.present = 1;
7803         cs.unusable = ds.unusable = 0;
7804         cs.padding  = ds.padding = 0;
7805
7806         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7807         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
7808         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
7809         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
7810         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
7811         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
7812
7813 #ifdef CONFIG_X86_64
7814         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7815                 kvm_x86_ops->set_efer(vcpu, 0);
7816 #endif
7817
7818         kvm_update_cpuid(vcpu);
7819         kvm_mmu_reset_context(vcpu);
7820 }
7821
7822 static void process_smi(struct kvm_vcpu *vcpu)
7823 {
7824         vcpu->arch.smi_pending = true;
7825         kvm_make_request(KVM_REQ_EVENT, vcpu);
7826 }
7827
7828 void kvm_make_scan_ioapic_request(struct kvm *kvm)
7829 {
7830         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
7831 }
7832
7833 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
7834 {
7835         if (!kvm_apic_present(vcpu))
7836                 return;
7837
7838         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
7839
7840         if (irqchip_split(vcpu->kvm))
7841                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
7842         else {
7843                 if (vcpu->arch.apicv_active)
7844                         kvm_x86_ops->sync_pir_to_irr(vcpu);
7845                 if (ioapic_in_kernel(vcpu->kvm))
7846                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
7847         }
7848
7849         if (is_guest_mode(vcpu))
7850                 vcpu->arch.load_eoi_exitmap_pending = true;
7851         else
7852                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
7853 }
7854
7855 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
7856 {
7857         u64 eoi_exit_bitmap[4];
7858
7859         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
7860                 return;
7861
7862         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
7863                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
7864         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
7865 }
7866
7867 int kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
7868                 unsigned long start, unsigned long end,
7869                 bool blockable)
7870 {
7871         unsigned long apic_address;
7872
7873         /*
7874          * The physical address of apic access page is stored in the VMCS.
7875          * Update it when it becomes invalid.
7876          */
7877         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7878         if (start <= apic_address && apic_address < end)
7879                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
7880
7881         return 0;
7882 }
7883
7884 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
7885 {
7886         struct page *page = NULL;
7887
7888         if (!lapic_in_kernel(vcpu))
7889                 return;
7890
7891         if (!kvm_x86_ops->set_apic_access_page_addr)
7892                 return;
7893
7894         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7895         if (is_error_page(page))
7896                 return;
7897         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
7898
7899         /*
7900          * Do not pin apic access page in memory, the MMU notifier
7901          * will call us again if it is migrated or swapped out.
7902          */
7903         put_page(page);
7904 }
7905 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
7906
7907 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
7908 {
7909         smp_send_reschedule(vcpu->cpu);
7910 }
7911 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
7912
7913 /*
7914  * Returns 1 to let vcpu_run() continue the guest execution loop without
7915  * exiting to the userspace.  Otherwise, the value will be returned to the
7916  * userspace.
7917  */
7918 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
7919 {
7920         int r;
7921         bool req_int_win =
7922                 dm_request_for_irq_injection(vcpu) &&
7923                 kvm_cpu_accept_dm_intr(vcpu);
7924
7925         bool req_immediate_exit = false;
7926
7927         if (kvm_request_pending(vcpu)) {
7928                 if (kvm_check_request(KVM_REQ_GET_VMCS12_PAGES, vcpu))
7929                         kvm_x86_ops->get_vmcs12_pages(vcpu);
7930                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
7931                         kvm_mmu_unload(vcpu);
7932                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
7933                         __kvm_migrate_timers(vcpu);
7934                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
7935                         kvm_gen_update_masterclock(vcpu->kvm);
7936                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
7937                         kvm_gen_kvmclock_update(vcpu);
7938                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
7939                         r = kvm_guest_time_update(vcpu);
7940                         if (unlikely(r))
7941                                 goto out;
7942                 }
7943                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
7944                         kvm_mmu_sync_roots(vcpu);
7945                 if (kvm_check_request(KVM_REQ_LOAD_CR3, vcpu))
7946                         kvm_mmu_load_cr3(vcpu);
7947                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
7948                         kvm_vcpu_flush_tlb(vcpu, true);
7949                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
7950                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
7951                         r = 0;
7952                         goto out;
7953                 }
7954                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
7955                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
7956                         vcpu->mmio_needed = 0;
7957                         r = 0;
7958                         goto out;
7959                 }
7960                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
7961                         /* Page is swapped out. Do synthetic halt */
7962                         vcpu->arch.apf.halted = true;
7963                         r = 1;
7964                         goto out;
7965                 }
7966                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
7967                         record_steal_time(vcpu);
7968                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
7969                         process_smi(vcpu);
7970                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
7971                         process_nmi(vcpu);
7972                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
7973                         kvm_pmu_handle_event(vcpu);
7974                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
7975                         kvm_pmu_deliver_pmi(vcpu);
7976                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
7977                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
7978                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
7979                                      vcpu->arch.ioapic_handled_vectors)) {
7980                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
7981                                 vcpu->run->eoi.vector =
7982                                                 vcpu->arch.pending_ioapic_eoi;
7983                                 r = 0;
7984                                 goto out;
7985                         }
7986                 }
7987                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
7988                         vcpu_scan_ioapic(vcpu);
7989                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
7990                         vcpu_load_eoi_exitmap(vcpu);
7991                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
7992                         kvm_vcpu_reload_apic_access_page(vcpu);
7993                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
7994                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
7995                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
7996                         r = 0;
7997                         goto out;
7998                 }
7999                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
8000                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
8001                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
8002                         r = 0;
8003                         goto out;
8004                 }
8005                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
8006                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
8007                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
8008                         r = 0;
8009                         goto out;
8010                 }
8011
8012                 /*
8013                  * KVM_REQ_HV_STIMER has to be processed after
8014                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
8015                  * depend on the guest clock being up-to-date
8016                  */
8017                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
8018                         kvm_hv_process_stimers(vcpu);
8019         }
8020
8021         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
8022                 ++vcpu->stat.req_event;
8023                 kvm_apic_accept_events(vcpu);
8024                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
8025                         r = 1;
8026                         goto out;
8027                 }
8028
8029                 if (inject_pending_event(vcpu, req_int_win) != 0)
8030                         req_immediate_exit = true;
8031                 else {
8032                         /* Enable SMI/NMI/IRQ window open exits if needed.
8033                          *
8034                          * SMIs have three cases:
8035                          * 1) They can be nested, and then there is nothing to
8036                          *    do here because RSM will cause a vmexit anyway.
8037                          * 2) There is an ISA-specific reason why SMI cannot be
8038                          *    injected, and the moment when this changes can be
8039                          *    intercepted.
8040                          * 3) Or the SMI can be pending because
8041                          *    inject_pending_event has completed the injection
8042                          *    of an IRQ or NMI from the previous vmexit, and
8043                          *    then we request an immediate exit to inject the
8044                          *    SMI.
8045                          */
8046                         if (vcpu->arch.smi_pending && !is_smm(vcpu))
8047                                 if (!kvm_x86_ops->enable_smi_window(vcpu))
8048                                         req_immediate_exit = true;
8049                         if (vcpu->arch.nmi_pending)
8050                                 kvm_x86_ops->enable_nmi_window(vcpu);
8051                         if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
8052                                 kvm_x86_ops->enable_irq_window(vcpu);
8053                         WARN_ON(vcpu->arch.exception.pending);
8054                 }
8055
8056                 if (kvm_lapic_enabled(vcpu)) {
8057                         update_cr8_intercept(vcpu);
8058                         kvm_lapic_sync_to_vapic(vcpu);
8059                 }
8060         }
8061
8062         r = kvm_mmu_reload(vcpu);
8063         if (unlikely(r)) {
8064                 goto cancel_injection;
8065         }
8066
8067         preempt_disable();
8068
8069         kvm_x86_ops->prepare_guest_switch(vcpu);
8070
8071         /*
8072          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
8073          * IPI are then delayed after guest entry, which ensures that they
8074          * result in virtual interrupt delivery.
8075          */
8076         local_irq_disable();
8077         vcpu->mode = IN_GUEST_MODE;
8078
8079         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
8080
8081         /*
8082          * 1) We should set ->mode before checking ->requests.  Please see
8083          * the comment in kvm_vcpu_exiting_guest_mode().
8084          *
8085          * 2) For APICv, we should set ->mode before checking PID.ON. This
8086          * pairs with the memory barrier implicit in pi_test_and_set_on
8087          * (see vmx_deliver_posted_interrupt).
8088          *
8089          * 3) This also orders the write to mode from any reads to the page
8090          * tables done while the VCPU is running.  Please see the comment
8091          * in kvm_flush_remote_tlbs.
8092          */
8093         smp_mb__after_srcu_read_unlock();
8094
8095         /*
8096          * This handles the case where a posted interrupt was
8097          * notified with kvm_vcpu_kick.
8098          */
8099         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
8100                 kvm_x86_ops->sync_pir_to_irr(vcpu);
8101
8102         if (vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu)
8103             || need_resched() || signal_pending(current)) {
8104                 vcpu->mode = OUTSIDE_GUEST_MODE;
8105                 smp_wmb();
8106                 local_irq_enable();
8107                 preempt_enable();
8108                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8109                 r = 1;
8110                 goto cancel_injection;
8111         }
8112
8113         if (req_immediate_exit) {
8114                 kvm_make_request(KVM_REQ_EVENT, vcpu);
8115                 kvm_x86_ops->request_immediate_exit(vcpu);
8116         }
8117
8118         trace_kvm_entry(vcpu->vcpu_id);
8119         guest_enter_irqoff();
8120
8121         /* The preempt notifier should have taken care of the FPU already.  */
8122         WARN_ON_ONCE(test_thread_flag(TIF_NEED_FPU_LOAD));
8123
8124         if (unlikely(vcpu->arch.switch_db_regs)) {
8125                 set_debugreg(0, 7);
8126                 set_debugreg(vcpu->arch.eff_db[0], 0);
8127                 set_debugreg(vcpu->arch.eff_db[1], 1);
8128                 set_debugreg(vcpu->arch.eff_db[2], 2);
8129                 set_debugreg(vcpu->arch.eff_db[3], 3);
8130                 set_debugreg(vcpu->arch.dr6, 6);
8131                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
8132         }
8133
8134         kvm_x86_ops->run(vcpu);
8135
8136         /*
8137          * Do this here before restoring debug registers on the host.  And
8138          * since we do this before handling the vmexit, a DR access vmexit
8139          * can (a) read the correct value of the debug registers, (b) set
8140          * KVM_DEBUGREG_WONT_EXIT again.
8141          */
8142         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
8143                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
8144                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
8145                 kvm_update_dr0123(vcpu);
8146                 kvm_update_dr6(vcpu);
8147                 kvm_update_dr7(vcpu);
8148                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
8149         }
8150
8151         /*
8152          * If the guest has used debug registers, at least dr7
8153          * will be disabled while returning to the host.
8154          * If we don't have active breakpoints in the host, we don't
8155          * care about the messed up debug address registers. But if
8156          * we have some of them active, restore the old state.
8157          */
8158         if (hw_breakpoint_active())
8159                 hw_breakpoint_restore();
8160
8161         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
8162
8163         vcpu->mode = OUTSIDE_GUEST_MODE;
8164         smp_wmb();
8165
8166         kvm_x86_ops->handle_exit_irqoff(vcpu);
8167
8168         /*
8169          * Consume any pending interrupts, including the possible source of
8170          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
8171          * An instruction is required after local_irq_enable() to fully unblock
8172          * interrupts on processors that implement an interrupt shadow, the
8173          * stat.exits increment will do nicely.
8174          */
8175         kvm_before_interrupt(vcpu);
8176         local_irq_enable();
8177         ++vcpu->stat.exits;
8178         local_irq_disable();
8179         kvm_after_interrupt(vcpu);
8180
8181         guest_exit_irqoff();
8182         if (lapic_in_kernel(vcpu)) {
8183                 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
8184                 if (delta != S64_MIN) {
8185                         trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
8186                         vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
8187                 }
8188         }
8189
8190         local_irq_enable();
8191         preempt_enable();
8192
8193         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8194
8195         /*
8196          * Profile KVM exit RIPs:
8197          */
8198         if (unlikely(prof_on == KVM_PROFILING)) {
8199                 unsigned long rip = kvm_rip_read(vcpu);
8200                 profile_hit(KVM_PROFILING, (void *)rip);
8201         }
8202
8203         if (unlikely(vcpu->arch.tsc_always_catchup))
8204                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8205
8206         if (vcpu->arch.apic_attention)
8207                 kvm_lapic_sync_from_vapic(vcpu);
8208
8209         vcpu->arch.gpa_available = false;
8210         r = kvm_x86_ops->handle_exit(vcpu);
8211         return r;
8212
8213 cancel_injection:
8214         kvm_x86_ops->cancel_injection(vcpu);
8215         if (unlikely(vcpu->arch.apic_attention))
8216                 kvm_lapic_sync_from_vapic(vcpu);
8217 out:
8218         return r;
8219 }
8220
8221 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
8222 {
8223         if (!kvm_arch_vcpu_runnable(vcpu) &&
8224             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
8225                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
8226                 kvm_vcpu_block(vcpu);
8227                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
8228
8229                 if (kvm_x86_ops->post_block)
8230                         kvm_x86_ops->post_block(vcpu);
8231
8232                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
8233                         return 1;
8234         }
8235
8236         kvm_apic_accept_events(vcpu);
8237         switch(vcpu->arch.mp_state) {
8238         case KVM_MP_STATE_HALTED:
8239                 vcpu->arch.pv.pv_unhalted = false;
8240                 vcpu->arch.mp_state =
8241                         KVM_MP_STATE_RUNNABLE;
8242                 /* fall through */
8243         case KVM_MP_STATE_RUNNABLE:
8244                 vcpu->arch.apf.halted = false;
8245                 break;
8246         case KVM_MP_STATE_INIT_RECEIVED:
8247                 break;
8248         default:
8249                 return -EINTR;
8250                 break;
8251         }
8252         return 1;
8253 }
8254
8255 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
8256 {
8257         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
8258                 kvm_x86_ops->check_nested_events(vcpu, false);
8259
8260         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
8261                 !vcpu->arch.apf.halted);
8262 }
8263
8264 static int vcpu_run(struct kvm_vcpu *vcpu)
8265 {
8266         int r;
8267         struct kvm *kvm = vcpu->kvm;
8268
8269         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
8270         vcpu->arch.l1tf_flush_l1d = true;
8271
8272         for (;;) {
8273                 if (kvm_vcpu_running(vcpu)) {
8274                         r = vcpu_enter_guest(vcpu);
8275                 } else {
8276                         r = vcpu_block(kvm, vcpu);
8277                 }
8278
8279                 if (r <= 0)
8280                         break;
8281
8282                 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
8283                 if (kvm_cpu_has_pending_timer(vcpu))
8284                         kvm_inject_pending_timer_irqs(vcpu);
8285
8286                 if (dm_request_for_irq_injection(vcpu) &&
8287                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
8288                         r = 0;
8289                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
8290                         ++vcpu->stat.request_irq_exits;
8291                         break;
8292                 }
8293
8294                 kvm_check_async_pf_completion(vcpu);
8295
8296                 if (signal_pending(current)) {
8297                         r = -EINTR;
8298                         vcpu->run->exit_reason = KVM_EXIT_INTR;
8299                         ++vcpu->stat.signal_exits;
8300                         break;
8301                 }
8302                 if (need_resched()) {
8303                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
8304                         cond_resched();
8305                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
8306                 }
8307         }
8308
8309         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
8310
8311         return r;
8312 }
8313
8314 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
8315 {
8316         int r;
8317         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8318         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
8319         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
8320         if (r != EMULATE_DONE)
8321                 return 0;
8322         return 1;
8323 }
8324
8325 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
8326 {
8327         BUG_ON(!vcpu->arch.pio.count);
8328
8329         return complete_emulated_io(vcpu);
8330 }
8331
8332 /*
8333  * Implements the following, as a state machine:
8334  *
8335  * read:
8336  *   for each fragment
8337  *     for each mmio piece in the fragment
8338  *       write gpa, len
8339  *       exit
8340  *       copy data
8341  *   execute insn
8342  *
8343  * write:
8344  *   for each fragment
8345  *     for each mmio piece in the fragment
8346  *       write gpa, len
8347  *       copy data
8348  *       exit
8349  */
8350 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
8351 {
8352         struct kvm_run *run = vcpu->run;
8353         struct kvm_mmio_fragment *frag;
8354         unsigned len;
8355
8356         BUG_ON(!vcpu->mmio_needed);
8357
8358         /* Complete previous fragment */
8359         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
8360         len = min(8u, frag->len);
8361         if (!vcpu->mmio_is_write)
8362                 memcpy(frag->data, run->mmio.data, len);
8363
8364         if (frag->len <= 8) {
8365                 /* Switch to the next fragment. */
8366                 frag++;
8367                 vcpu->mmio_cur_fragment++;
8368         } else {
8369                 /* Go forward to the next mmio piece. */
8370                 frag->data += len;
8371                 frag->gpa += len;
8372                 frag->len -= len;
8373         }
8374
8375         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
8376                 vcpu->mmio_needed = 0;
8377
8378                 /* FIXME: return into emulator if single-stepping.  */
8379                 if (vcpu->mmio_is_write)
8380                         return 1;
8381                 vcpu->mmio_read_completed = 1;
8382                 return complete_emulated_io(vcpu);
8383         }
8384
8385         run->exit_reason = KVM_EXIT_MMIO;
8386         run->mmio.phys_addr = frag->gpa;
8387         if (vcpu->mmio_is_write)
8388                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
8389         run->mmio.len = min(8u, frag->len);
8390         run->mmio.is_write = vcpu->mmio_is_write;
8391         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
8392         return 0;
8393 }
8394
8395 /* Swap (qemu) user FPU context for the guest FPU context. */
8396 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
8397 {
8398         fpregs_lock();
8399
8400         copy_fpregs_to_fpstate(vcpu->arch.user_fpu);
8401         /* PKRU is separately restored in kvm_x86_ops->run.  */
8402         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu->state,
8403                                 ~XFEATURE_MASK_PKRU);
8404
8405         fpregs_mark_activate();
8406         fpregs_unlock();
8407
8408         trace_kvm_fpu(1);
8409 }
8410
8411 /* When vcpu_run ends, restore user space FPU context. */
8412 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
8413 {
8414         fpregs_lock();
8415
8416         copy_fpregs_to_fpstate(vcpu->arch.guest_fpu);
8417         copy_kernel_to_fpregs(&vcpu->arch.user_fpu->state);
8418
8419         fpregs_mark_activate();
8420         fpregs_unlock();
8421
8422         ++vcpu->stat.fpu_reload;
8423         trace_kvm_fpu(0);
8424 }
8425
8426 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
8427 {
8428         int r;
8429
8430         vcpu_load(vcpu);
8431         kvm_sigset_activate(vcpu);
8432         kvm_load_guest_fpu(vcpu);
8433
8434         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
8435                 if (kvm_run->immediate_exit) {
8436                         r = -EINTR;
8437                         goto out;
8438                 }
8439                 kvm_vcpu_block(vcpu);
8440                 kvm_apic_accept_events(vcpu);
8441                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
8442                 r = -EAGAIN;
8443                 if (signal_pending(current)) {
8444                         r = -EINTR;
8445                         vcpu->run->exit_reason = KVM_EXIT_INTR;
8446                         ++vcpu->stat.signal_exits;
8447                 }
8448                 goto out;
8449         }
8450
8451         if (vcpu->run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
8452                 r = -EINVAL;
8453                 goto out;
8454         }
8455
8456         if (vcpu->run->kvm_dirty_regs) {
8457                 r = sync_regs(vcpu);
8458                 if (r != 0)
8459                         goto out;
8460         }
8461
8462         /* re-sync apic's tpr */
8463         if (!lapic_in_kernel(vcpu)) {
8464                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
8465                         r = -EINVAL;
8466                         goto out;
8467                 }
8468         }
8469
8470         if (unlikely(vcpu->arch.complete_userspace_io)) {
8471                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
8472                 vcpu->arch.complete_userspace_io = NULL;
8473                 r = cui(vcpu);
8474                 if (r <= 0)
8475                         goto out;
8476         } else
8477                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
8478
8479         if (kvm_run->immediate_exit)
8480                 r = -EINTR;
8481         else
8482                 r = vcpu_run(vcpu);
8483
8484 out:
8485         kvm_put_guest_fpu(vcpu);
8486         if (vcpu->run->kvm_valid_regs)
8487                 store_regs(vcpu);
8488         post_kvm_run_save(vcpu);
8489         kvm_sigset_deactivate(vcpu);
8490
8491         vcpu_put(vcpu);
8492         return r;
8493 }
8494
8495 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8496 {
8497         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
8498                 /*
8499                  * We are here if userspace calls get_regs() in the middle of
8500                  * instruction emulation. Registers state needs to be copied
8501                  * back from emulation context to vcpu. Userspace shouldn't do
8502                  * that usually, but some bad designed PV devices (vmware
8503                  * backdoor interface) need this to work
8504                  */
8505                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
8506                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8507         }
8508         regs->rax = kvm_rax_read(vcpu);
8509         regs->rbx = kvm_rbx_read(vcpu);
8510         regs->rcx = kvm_rcx_read(vcpu);
8511         regs->rdx = kvm_rdx_read(vcpu);
8512         regs->rsi = kvm_rsi_read(vcpu);
8513         regs->rdi = kvm_rdi_read(vcpu);
8514         regs->rsp = kvm_rsp_read(vcpu);
8515         regs->rbp = kvm_rbp_read(vcpu);
8516 #ifdef CONFIG_X86_64
8517         regs->r8 = kvm_r8_read(vcpu);
8518         regs->r9 = kvm_r9_read(vcpu);
8519         regs->r10 = kvm_r10_read(vcpu);
8520         regs->r11 = kvm_r11_read(vcpu);
8521         regs->r12 = kvm_r12_read(vcpu);
8522         regs->r13 = kvm_r13_read(vcpu);
8523         regs->r14 = kvm_r14_read(vcpu);
8524         regs->r15 = kvm_r15_read(vcpu);
8525 #endif
8526
8527         regs->rip = kvm_rip_read(vcpu);
8528         regs->rflags = kvm_get_rflags(vcpu);
8529 }
8530
8531 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8532 {
8533         vcpu_load(vcpu);
8534         __get_regs(vcpu, regs);
8535         vcpu_put(vcpu);
8536         return 0;
8537 }
8538
8539 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8540 {
8541         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
8542         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8543
8544         kvm_rax_write(vcpu, regs->rax);
8545         kvm_rbx_write(vcpu, regs->rbx);
8546         kvm_rcx_write(vcpu, regs->rcx);
8547         kvm_rdx_write(vcpu, regs->rdx);
8548         kvm_rsi_write(vcpu, regs->rsi);
8549         kvm_rdi_write(vcpu, regs->rdi);
8550         kvm_rsp_write(vcpu, regs->rsp);
8551         kvm_rbp_write(vcpu, regs->rbp);
8552 #ifdef CONFIG_X86_64
8553         kvm_r8_write(vcpu, regs->r8);
8554         kvm_r9_write(vcpu, regs->r9);
8555         kvm_r10_write(vcpu, regs->r10);
8556         kvm_r11_write(vcpu, regs->r11);
8557         kvm_r12_write(vcpu, regs->r12);
8558         kvm_r13_write(vcpu, regs->r13);
8559         kvm_r14_write(vcpu, regs->r14);
8560         kvm_r15_write(vcpu, regs->r15);
8561 #endif
8562
8563         kvm_rip_write(vcpu, regs->rip);
8564         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
8565
8566         vcpu->arch.exception.pending = false;
8567
8568         kvm_make_request(KVM_REQ_EVENT, vcpu);
8569 }
8570
8571 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8572 {
8573         vcpu_load(vcpu);
8574         __set_regs(vcpu, regs);
8575         vcpu_put(vcpu);
8576         return 0;
8577 }
8578
8579 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
8580 {
8581         struct kvm_segment cs;
8582
8583         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
8584         *db = cs.db;
8585         *l = cs.l;
8586 }
8587 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
8588
8589 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8590 {
8591         struct desc_ptr dt;
8592
8593         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
8594         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
8595         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
8596         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
8597         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
8598         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
8599
8600         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
8601         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
8602
8603         kvm_x86_ops->get_idt(vcpu, &dt);
8604         sregs->idt.limit = dt.size;
8605         sregs->idt.base = dt.address;
8606         kvm_x86_ops->get_gdt(vcpu, &dt);
8607         sregs->gdt.limit = dt.size;
8608         sregs->gdt.base = dt.address;
8609
8610         sregs->cr0 = kvm_read_cr0(vcpu);
8611         sregs->cr2 = vcpu->arch.cr2;
8612         sregs->cr3 = kvm_read_cr3(vcpu);
8613         sregs->cr4 = kvm_read_cr4(vcpu);
8614         sregs->cr8 = kvm_get_cr8(vcpu);
8615         sregs->efer = vcpu->arch.efer;
8616         sregs->apic_base = kvm_get_apic_base(vcpu);
8617
8618         memset(sregs->interrupt_bitmap, 0, sizeof(sregs->interrupt_bitmap));
8619
8620         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
8621                 set_bit(vcpu->arch.interrupt.nr,
8622                         (unsigned long *)sregs->interrupt_bitmap);
8623 }
8624
8625 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
8626                                   struct kvm_sregs *sregs)
8627 {
8628         vcpu_load(vcpu);
8629         __get_sregs(vcpu, sregs);
8630         vcpu_put(vcpu);
8631         return 0;
8632 }
8633
8634 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
8635                                     struct kvm_mp_state *mp_state)
8636 {
8637         vcpu_load(vcpu);
8638
8639         kvm_apic_accept_events(vcpu);
8640         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
8641                                         vcpu->arch.pv.pv_unhalted)
8642                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
8643         else
8644                 mp_state->mp_state = vcpu->arch.mp_state;
8645
8646         vcpu_put(vcpu);
8647         return 0;
8648 }
8649
8650 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
8651                                     struct kvm_mp_state *mp_state)
8652 {
8653         int ret = -EINVAL;
8654
8655         vcpu_load(vcpu);
8656
8657         if (!lapic_in_kernel(vcpu) &&
8658             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
8659                 goto out;
8660
8661         /* INITs are latched while in SMM */
8662         if ((is_smm(vcpu) || vcpu->arch.smi_pending) &&
8663             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
8664              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
8665                 goto out;
8666
8667         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
8668                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
8669                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
8670         } else
8671                 vcpu->arch.mp_state = mp_state->mp_state;
8672         kvm_make_request(KVM_REQ_EVENT, vcpu);
8673
8674         ret = 0;
8675 out:
8676         vcpu_put(vcpu);
8677         return ret;
8678 }
8679
8680 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
8681                     int reason, bool has_error_code, u32 error_code)
8682 {
8683         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
8684         int ret;
8685
8686         init_emulate_ctxt(vcpu);
8687
8688         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
8689                                    has_error_code, error_code);
8690
8691         if (ret)
8692                 return EMULATE_FAIL;
8693
8694         kvm_rip_write(vcpu, ctxt->eip);
8695         kvm_set_rflags(vcpu, ctxt->eflags);
8696         kvm_make_request(KVM_REQ_EVENT, vcpu);
8697         return EMULATE_DONE;
8698 }
8699 EXPORT_SYMBOL_GPL(kvm_task_switch);
8700
8701 static int kvm_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8702 {
8703         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) &&
8704                         (sregs->cr4 & X86_CR4_OSXSAVE))
8705                 return  -EINVAL;
8706
8707         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
8708                 /*
8709                  * When EFER.LME and CR0.PG are set, the processor is in
8710                  * 64-bit mode (though maybe in a 32-bit code segment).
8711                  * CR4.PAE and EFER.LMA must be set.
8712                  */
8713                 if (!(sregs->cr4 & X86_CR4_PAE)
8714                     || !(sregs->efer & EFER_LMA))
8715                         return -EINVAL;
8716         } else {
8717                 /*
8718                  * Not in 64-bit mode: EFER.LMA is clear and the code
8719                  * segment cannot be 64-bit.
8720                  */
8721                 if (sregs->efer & EFER_LMA || sregs->cs.l)
8722                         return -EINVAL;
8723         }
8724
8725         return 0;
8726 }
8727
8728 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8729 {
8730         struct msr_data apic_base_msr;
8731         int mmu_reset_needed = 0;
8732         int cpuid_update_needed = 0;
8733         int pending_vec, max_bits, idx;
8734         struct desc_ptr dt;
8735         int ret = -EINVAL;
8736
8737         if (kvm_valid_sregs(vcpu, sregs))
8738                 goto out;
8739
8740         apic_base_msr.data = sregs->apic_base;
8741         apic_base_msr.host_initiated = true;
8742         if (kvm_set_apic_base(vcpu, &apic_base_msr))
8743                 goto out;
8744
8745         dt.size = sregs->idt.limit;
8746         dt.address = sregs->idt.base;
8747         kvm_x86_ops->set_idt(vcpu, &dt);
8748         dt.size = sregs->gdt.limit;
8749         dt.address = sregs->gdt.base;
8750         kvm_x86_ops->set_gdt(vcpu, &dt);
8751
8752         vcpu->arch.cr2 = sregs->cr2;
8753         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
8754         vcpu->arch.cr3 = sregs->cr3;
8755         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
8756
8757         kvm_set_cr8(vcpu, sregs->cr8);
8758
8759         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
8760         kvm_x86_ops->set_efer(vcpu, sregs->efer);
8761
8762         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
8763         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
8764         vcpu->arch.cr0 = sregs->cr0;
8765
8766         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
8767         cpuid_update_needed |= ((kvm_read_cr4(vcpu) ^ sregs->cr4) &
8768                                 (X86_CR4_OSXSAVE | X86_CR4_PKE));
8769         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
8770         if (cpuid_update_needed)
8771                 kvm_update_cpuid(vcpu);
8772
8773         idx = srcu_read_lock(&vcpu->kvm->srcu);
8774         if (is_pae_paging(vcpu)) {
8775                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
8776                 mmu_reset_needed = 1;
8777         }
8778         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8779
8780         if (mmu_reset_needed)
8781                 kvm_mmu_reset_context(vcpu);
8782
8783         max_bits = KVM_NR_INTERRUPTS;
8784         pending_vec = find_first_bit(
8785                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
8786         if (pending_vec < max_bits) {
8787                 kvm_queue_interrupt(vcpu, pending_vec, false);
8788                 pr_debug("Set back pending irq %d\n", pending_vec);
8789         }
8790
8791         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
8792         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
8793         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
8794         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
8795         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
8796         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
8797
8798         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
8799         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
8800
8801         update_cr8_intercept(vcpu);
8802
8803         /* Older userspace won't unhalt the vcpu on reset. */
8804         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
8805             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
8806             !is_protmode(vcpu))
8807                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8808
8809         kvm_make_request(KVM_REQ_EVENT, vcpu);
8810
8811         ret = 0;
8812 out:
8813         return ret;
8814 }
8815
8816 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
8817                                   struct kvm_sregs *sregs)
8818 {
8819         int ret;
8820
8821         vcpu_load(vcpu);
8822         ret = __set_sregs(vcpu, sregs);
8823         vcpu_put(vcpu);
8824         return ret;
8825 }
8826
8827 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
8828                                         struct kvm_guest_debug *dbg)
8829 {
8830         unsigned long rflags;
8831         int i, r;
8832
8833         vcpu_load(vcpu);
8834
8835         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
8836                 r = -EBUSY;
8837                 if (vcpu->arch.exception.pending)
8838                         goto out;
8839                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
8840                         kvm_queue_exception(vcpu, DB_VECTOR);
8841                 else
8842                         kvm_queue_exception(vcpu, BP_VECTOR);
8843         }
8844
8845         /*
8846          * Read rflags as long as potentially injected trace flags are still
8847          * filtered out.
8848          */
8849         rflags = kvm_get_rflags(vcpu);
8850
8851         vcpu->guest_debug = dbg->control;
8852         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
8853                 vcpu->guest_debug = 0;
8854
8855         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
8856                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
8857                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
8858                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
8859         } else {
8860                 for (i = 0; i < KVM_NR_DB_REGS; i++)
8861                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
8862         }
8863         kvm_update_dr7(vcpu);
8864
8865         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8866                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
8867                         get_segment_base(vcpu, VCPU_SREG_CS);
8868
8869         /*
8870          * Trigger an rflags update that will inject or remove the trace
8871          * flags.
8872          */
8873         kvm_set_rflags(vcpu, rflags);
8874
8875         kvm_x86_ops->update_bp_intercept(vcpu);
8876
8877         r = 0;
8878
8879 out:
8880         vcpu_put(vcpu);
8881         return r;
8882 }
8883
8884 /*
8885  * Translate a guest virtual address to a guest physical address.
8886  */
8887 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
8888                                     struct kvm_translation *tr)
8889 {
8890         unsigned long vaddr = tr->linear_address;
8891         gpa_t gpa;
8892         int idx;
8893
8894         vcpu_load(vcpu);
8895
8896         idx = srcu_read_lock(&vcpu->kvm->srcu);
8897         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
8898         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8899         tr->physical_address = gpa;
8900         tr->valid = gpa != UNMAPPED_GVA;
8901         tr->writeable = 1;
8902         tr->usermode = 0;
8903
8904         vcpu_put(vcpu);
8905         return 0;
8906 }
8907
8908 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
8909 {
8910         struct fxregs_state *fxsave;
8911
8912         vcpu_load(vcpu);
8913
8914         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
8915         memcpy(fpu->fpr, fxsave->st_space, 128);
8916         fpu->fcw = fxsave->cwd;
8917         fpu->fsw = fxsave->swd;
8918         fpu->ftwx = fxsave->twd;
8919         fpu->last_opcode = fxsave->fop;
8920         fpu->last_ip = fxsave->rip;
8921         fpu->last_dp = fxsave->rdp;
8922         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
8923
8924         vcpu_put(vcpu);
8925         return 0;
8926 }
8927
8928 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
8929 {
8930         struct fxregs_state *fxsave;
8931
8932         vcpu_load(vcpu);
8933
8934         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
8935
8936         memcpy(fxsave->st_space, fpu->fpr, 128);
8937         fxsave->cwd = fpu->fcw;
8938         fxsave->swd = fpu->fsw;
8939         fxsave->twd = fpu->ftwx;
8940         fxsave->fop = fpu->last_opcode;
8941         fxsave->rip = fpu->last_ip;
8942         fxsave->rdp = fpu->last_dp;
8943         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
8944
8945         vcpu_put(vcpu);
8946         return 0;
8947 }
8948
8949 static void store_regs(struct kvm_vcpu *vcpu)
8950 {
8951         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
8952
8953         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
8954                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
8955
8956         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
8957                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
8958
8959         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
8960                 kvm_vcpu_ioctl_x86_get_vcpu_events(
8961                                 vcpu, &vcpu->run->s.regs.events);
8962 }
8963
8964 static int sync_regs(struct kvm_vcpu *vcpu)
8965 {
8966         if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
8967                 return -EINVAL;
8968
8969         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
8970                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
8971                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
8972         }
8973         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
8974                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
8975                         return -EINVAL;
8976                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
8977         }
8978         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
8979                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
8980                                 vcpu, &vcpu->run->s.regs.events))
8981                         return -EINVAL;
8982                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
8983         }
8984
8985         return 0;
8986 }
8987
8988 static void fx_init(struct kvm_vcpu *vcpu)
8989 {
8990         fpstate_init(&vcpu->arch.guest_fpu->state);
8991         if (boot_cpu_has(X86_FEATURE_XSAVES))
8992                 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
8993                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
8994
8995         /*
8996          * Ensure guest xcr0 is valid for loading
8997          */
8998         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
8999
9000         vcpu->arch.cr0 |= X86_CR0_ET;
9001 }
9002
9003 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
9004 {
9005         void *wbinvd_dirty_mask = vcpu->arch.wbinvd_dirty_mask;
9006
9007         kvmclock_reset(vcpu);
9008
9009         kvm_x86_ops->vcpu_free(vcpu);
9010         free_cpumask_var(wbinvd_dirty_mask);
9011 }
9012
9013 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
9014                                                 unsigned int id)
9015 {
9016         struct kvm_vcpu *vcpu;
9017
9018         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
9019                 printk_once(KERN_WARNING
9020                 "kvm: SMP vm created on host with unstable TSC; "
9021                 "guest TSC will not be reliable\n");
9022
9023         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
9024
9025         return vcpu;
9026 }
9027
9028 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
9029 {
9030         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
9031         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
9032         kvm_vcpu_mtrr_init(vcpu);
9033         vcpu_load(vcpu);
9034         kvm_vcpu_reset(vcpu, false);
9035         kvm_init_mmu(vcpu, false);
9036         vcpu_put(vcpu);
9037         return 0;
9038 }
9039
9040 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
9041 {
9042         struct msr_data msr;
9043         struct kvm *kvm = vcpu->kvm;
9044
9045         kvm_hv_vcpu_postcreate(vcpu);
9046
9047         if (mutex_lock_killable(&vcpu->mutex))
9048                 return;
9049         vcpu_load(vcpu);
9050         msr.data = 0x0;
9051         msr.index = MSR_IA32_TSC;
9052         msr.host_initiated = true;
9053         kvm_write_tsc(vcpu, &msr);
9054         vcpu_put(vcpu);
9055
9056         /* poll control enabled by default */
9057         vcpu->arch.msr_kvm_poll_control = 1;
9058
9059         mutex_unlock(&vcpu->mutex);
9060
9061         if (!kvmclock_periodic_sync)
9062                 return;
9063
9064         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
9065                                         KVMCLOCK_SYNC_PERIOD);
9066 }
9067
9068 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
9069 {
9070         vcpu->arch.apf.msr_val = 0;
9071
9072         vcpu_load(vcpu);
9073         kvm_mmu_unload(vcpu);
9074         vcpu_put(vcpu);
9075
9076         kvm_x86_ops->vcpu_free(vcpu);
9077 }
9078
9079 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
9080 {
9081         kvm_lapic_reset(vcpu, init_event);
9082
9083         vcpu->arch.hflags = 0;
9084
9085         vcpu->arch.smi_pending = 0;
9086         vcpu->arch.smi_count = 0;
9087         atomic_set(&vcpu->arch.nmi_queued, 0);
9088         vcpu->arch.nmi_pending = 0;
9089         vcpu->arch.nmi_injected = false;
9090         kvm_clear_interrupt_queue(vcpu);
9091         kvm_clear_exception_queue(vcpu);
9092         vcpu->arch.exception.pending = false;
9093
9094         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
9095         kvm_update_dr0123(vcpu);
9096         vcpu->arch.dr6 = DR6_INIT;
9097         kvm_update_dr6(vcpu);
9098         vcpu->arch.dr7 = DR7_FIXED_1;
9099         kvm_update_dr7(vcpu);
9100
9101         vcpu->arch.cr2 = 0;
9102
9103         kvm_make_request(KVM_REQ_EVENT, vcpu);
9104         vcpu->arch.apf.msr_val = 0;
9105         vcpu->arch.st.msr_val = 0;
9106
9107         kvmclock_reset(vcpu);
9108
9109         kvm_clear_async_pf_completion_queue(vcpu);
9110         kvm_async_pf_hash_reset(vcpu);
9111         vcpu->arch.apf.halted = false;
9112
9113         if (kvm_mpx_supported()) {
9114                 void *mpx_state_buffer;
9115
9116                 /*
9117                  * To avoid have the INIT path from kvm_apic_has_events() that be
9118                  * called with loaded FPU and does not let userspace fix the state.
9119                  */
9120                 if (init_event)
9121                         kvm_put_guest_fpu(vcpu);
9122                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
9123                                         XFEATURE_BNDREGS);
9124                 if (mpx_state_buffer)
9125                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
9126                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
9127                                         XFEATURE_BNDCSR);
9128                 if (mpx_state_buffer)
9129                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
9130                 if (init_event)
9131                         kvm_load_guest_fpu(vcpu);
9132         }
9133
9134         if (!init_event) {
9135                 kvm_pmu_reset(vcpu);
9136                 vcpu->arch.smbase = 0x30000;
9137
9138                 vcpu->arch.msr_misc_features_enables = 0;
9139
9140                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
9141         }
9142
9143         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
9144         vcpu->arch.regs_avail = ~0;
9145         vcpu->arch.regs_dirty = ~0;
9146
9147         vcpu->arch.ia32_xss = 0;
9148
9149         kvm_x86_ops->vcpu_reset(vcpu, init_event);
9150 }
9151
9152 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
9153 {
9154         struct kvm_segment cs;
9155
9156         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
9157         cs.selector = vector << 8;
9158         cs.base = vector << 12;
9159         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
9160         kvm_rip_write(vcpu, 0);
9161 }
9162
9163 int kvm_arch_hardware_enable(void)
9164 {
9165         struct kvm *kvm;
9166         struct kvm_vcpu *vcpu;
9167         int i;
9168         int ret;
9169         u64 local_tsc;
9170         u64 max_tsc = 0;
9171         bool stable, backwards_tsc = false;
9172
9173         kvm_shared_msr_cpu_online();
9174         ret = kvm_x86_ops->hardware_enable();
9175         if (ret != 0)
9176                 return ret;
9177
9178         local_tsc = rdtsc();
9179         stable = !kvm_check_tsc_unstable();
9180         list_for_each_entry(kvm, &vm_list, vm_list) {
9181                 kvm_for_each_vcpu(i, vcpu, kvm) {
9182                         if (!stable && vcpu->cpu == smp_processor_id())
9183                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
9184                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
9185                                 backwards_tsc = true;
9186                                 if (vcpu->arch.last_host_tsc > max_tsc)
9187                                         max_tsc = vcpu->arch.last_host_tsc;
9188                         }
9189                 }
9190         }
9191
9192         /*
9193          * Sometimes, even reliable TSCs go backwards.  This happens on
9194          * platforms that reset TSC during suspend or hibernate actions, but
9195          * maintain synchronization.  We must compensate.  Fortunately, we can
9196          * detect that condition here, which happens early in CPU bringup,
9197          * before any KVM threads can be running.  Unfortunately, we can't
9198          * bring the TSCs fully up to date with real time, as we aren't yet far
9199          * enough into CPU bringup that we know how much real time has actually
9200          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
9201          * variables that haven't been updated yet.
9202          *
9203          * So we simply find the maximum observed TSC above, then record the
9204          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
9205          * the adjustment will be applied.  Note that we accumulate
9206          * adjustments, in case multiple suspend cycles happen before some VCPU
9207          * gets a chance to run again.  In the event that no KVM threads get a
9208          * chance to run, we will miss the entire elapsed period, as we'll have
9209          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
9210          * loose cycle time.  This isn't too big a deal, since the loss will be
9211          * uniform across all VCPUs (not to mention the scenario is extremely
9212          * unlikely). It is possible that a second hibernate recovery happens
9213          * much faster than a first, causing the observed TSC here to be
9214          * smaller; this would require additional padding adjustment, which is
9215          * why we set last_host_tsc to the local tsc observed here.
9216          *
9217          * N.B. - this code below runs only on platforms with reliable TSC,
9218          * as that is the only way backwards_tsc is set above.  Also note
9219          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
9220          * have the same delta_cyc adjustment applied if backwards_tsc
9221          * is detected.  Note further, this adjustment is only done once,
9222          * as we reset last_host_tsc on all VCPUs to stop this from being
9223          * called multiple times (one for each physical CPU bringup).
9224          *
9225          * Platforms with unreliable TSCs don't have to deal with this, they
9226          * will be compensated by the logic in vcpu_load, which sets the TSC to
9227          * catchup mode.  This will catchup all VCPUs to real time, but cannot
9228          * guarantee that they stay in perfect synchronization.
9229          */
9230         if (backwards_tsc) {
9231                 u64 delta_cyc = max_tsc - local_tsc;
9232                 list_for_each_entry(kvm, &vm_list, vm_list) {
9233                         kvm->arch.backwards_tsc_observed = true;
9234                         kvm_for_each_vcpu(i, vcpu, kvm) {
9235                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
9236                                 vcpu->arch.last_host_tsc = local_tsc;
9237                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
9238                         }
9239
9240                         /*
9241                          * We have to disable TSC offset matching.. if you were
9242                          * booting a VM while issuing an S4 host suspend....
9243                          * you may have some problem.  Solving this issue is
9244                          * left as an exercise to the reader.
9245                          */
9246                         kvm->arch.last_tsc_nsec = 0;
9247                         kvm->arch.last_tsc_write = 0;
9248                 }
9249
9250         }
9251         return 0;
9252 }
9253
9254 void kvm_arch_hardware_disable(void)
9255 {
9256         kvm_x86_ops->hardware_disable();
9257         drop_user_return_notifiers();
9258 }
9259
9260 int kvm_arch_hardware_setup(void)
9261 {
9262         int r;
9263
9264         r = kvm_x86_ops->hardware_setup();
9265         if (r != 0)
9266                 return r;
9267
9268         if (kvm_has_tsc_control) {
9269                 /*
9270                  * Make sure the user can only configure tsc_khz values that
9271                  * fit into a signed integer.
9272                  * A min value is not calculated because it will always
9273                  * be 1 on all machines.
9274                  */
9275                 u64 max = min(0x7fffffffULL,
9276                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
9277                 kvm_max_guest_tsc_khz = max;
9278
9279                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
9280         }
9281
9282         kvm_init_msr_list();
9283         return 0;
9284 }
9285
9286 void kvm_arch_hardware_unsetup(void)
9287 {
9288         kvm_x86_ops->hardware_unsetup();
9289 }
9290
9291 int kvm_arch_check_processor_compat(void)
9292 {
9293         return kvm_x86_ops->check_processor_compatibility();
9294 }
9295
9296 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
9297 {
9298         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
9299 }
9300 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
9301
9302 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
9303 {
9304         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
9305 }
9306
9307 struct static_key kvm_no_apic_vcpu __read_mostly;
9308 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
9309
9310 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
9311 {
9312         struct page *page;
9313         int r;
9314
9315         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
9316         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
9317                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9318         else
9319                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
9320
9321         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
9322         if (!page) {
9323                 r = -ENOMEM;
9324                 goto fail;
9325         }
9326         vcpu->arch.pio_data = page_address(page);
9327
9328         kvm_set_tsc_khz(vcpu, max_tsc_khz);
9329
9330         r = kvm_mmu_create(vcpu);
9331         if (r < 0)
9332                 goto fail_free_pio_data;
9333
9334         if (irqchip_in_kernel(vcpu->kvm)) {
9335                 vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv(vcpu);
9336                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
9337                 if (r < 0)
9338                         goto fail_mmu_destroy;
9339         } else
9340                 static_key_slow_inc(&kvm_no_apic_vcpu);
9341
9342         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
9343                                        GFP_KERNEL_ACCOUNT);
9344         if (!vcpu->arch.mce_banks) {
9345                 r = -ENOMEM;
9346                 goto fail_free_lapic;
9347         }
9348         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
9349
9350         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
9351                                 GFP_KERNEL_ACCOUNT)) {
9352                 r = -ENOMEM;
9353                 goto fail_free_mce_banks;
9354         }
9355
9356         fx_init(vcpu);
9357
9358         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
9359
9360         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
9361
9362         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
9363
9364         kvm_async_pf_hash_reset(vcpu);
9365         kvm_pmu_init(vcpu);
9366
9367         vcpu->arch.pending_external_vector = -1;
9368         vcpu->arch.preempted_in_kernel = false;
9369
9370         kvm_hv_vcpu_init(vcpu);
9371
9372         return 0;
9373
9374 fail_free_mce_banks:
9375         kfree(vcpu->arch.mce_banks);
9376 fail_free_lapic:
9377         kvm_free_lapic(vcpu);
9378 fail_mmu_destroy:
9379         kvm_mmu_destroy(vcpu);
9380 fail_free_pio_data:
9381         free_page((unsigned long)vcpu->arch.pio_data);
9382 fail:
9383         return r;
9384 }
9385
9386 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
9387 {
9388         int idx;
9389
9390         kvm_hv_vcpu_uninit(vcpu);
9391         kvm_pmu_destroy(vcpu);
9392         kfree(vcpu->arch.mce_banks);
9393         kvm_free_lapic(vcpu);
9394         idx = srcu_read_lock(&vcpu->kvm->srcu);
9395         kvm_mmu_destroy(vcpu);
9396         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9397         free_page((unsigned long)vcpu->arch.pio_data);
9398         if (!lapic_in_kernel(vcpu))
9399                 static_key_slow_dec(&kvm_no_apic_vcpu);
9400 }
9401
9402 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
9403 {
9404         vcpu->arch.l1tf_flush_l1d = true;
9405         kvm_x86_ops->sched_in(vcpu, cpu);
9406 }
9407
9408 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
9409 {
9410         if (type)
9411                 return -EINVAL;
9412
9413         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
9414         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
9415         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
9416         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
9417
9418         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
9419         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
9420         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
9421         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
9422                 &kvm->arch.irq_sources_bitmap);
9423
9424         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
9425         mutex_init(&kvm->arch.apic_map_lock);
9426         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
9427
9428         kvm->arch.kvmclock_offset = -ktime_get_boottime_ns();
9429         pvclock_update_vm_gtod_copy(kvm);
9430
9431         kvm->arch.guest_can_read_msr_platform_info = true;
9432
9433         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
9434         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
9435
9436         kvm_hv_init_vm(kvm);
9437         kvm_page_track_init(kvm);
9438         kvm_mmu_init_vm(kvm);
9439
9440         return kvm_x86_ops->vm_init(kvm);
9441 }
9442
9443 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
9444 {
9445         vcpu_load(vcpu);
9446         kvm_mmu_unload(vcpu);
9447         vcpu_put(vcpu);
9448 }
9449
9450 static void kvm_free_vcpus(struct kvm *kvm)
9451 {
9452         unsigned int i;
9453         struct kvm_vcpu *vcpu;
9454
9455         /*
9456          * Unpin any mmu pages first.
9457          */
9458         kvm_for_each_vcpu(i, vcpu, kvm) {
9459                 kvm_clear_async_pf_completion_queue(vcpu);
9460                 kvm_unload_vcpu_mmu(vcpu);
9461         }
9462         kvm_for_each_vcpu(i, vcpu, kvm)
9463                 kvm_arch_vcpu_free(vcpu);
9464
9465         mutex_lock(&kvm->lock);
9466         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
9467                 kvm->vcpus[i] = NULL;
9468
9469         atomic_set(&kvm->online_vcpus, 0);
9470         mutex_unlock(&kvm->lock);
9471 }
9472
9473 void kvm_arch_sync_events(struct kvm *kvm)
9474 {
9475         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
9476         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
9477         kvm_free_pit(kvm);
9478 }
9479
9480 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
9481 {
9482         int i, r;
9483         unsigned long hva;
9484         struct kvm_memslots *slots = kvm_memslots(kvm);
9485         struct kvm_memory_slot *slot, old;
9486
9487         /* Called with kvm->slots_lock held.  */
9488         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
9489                 return -EINVAL;
9490
9491         slot = id_to_memslot(slots, id);
9492         if (size) {
9493                 if (slot->npages)
9494                         return -EEXIST;
9495
9496                 /*
9497                  * MAP_SHARED to prevent internal slot pages from being moved
9498                  * by fork()/COW.
9499                  */
9500                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
9501                               MAP_SHARED | MAP_ANONYMOUS, 0);
9502                 if (IS_ERR((void *)hva))
9503                         return PTR_ERR((void *)hva);
9504         } else {
9505                 if (!slot->npages)
9506                         return 0;
9507
9508                 hva = 0;
9509         }
9510
9511         old = *slot;
9512         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
9513                 struct kvm_userspace_memory_region m;
9514
9515                 m.slot = id | (i << 16);
9516                 m.flags = 0;
9517                 m.guest_phys_addr = gpa;
9518                 m.userspace_addr = hva;
9519                 m.memory_size = size;
9520                 r = __kvm_set_memory_region(kvm, &m);
9521                 if (r < 0)
9522                         return r;
9523         }
9524
9525         if (!size)
9526                 vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
9527
9528         return 0;
9529 }
9530 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
9531
9532 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
9533 {
9534         int r;
9535
9536         mutex_lock(&kvm->slots_lock);
9537         r = __x86_set_memory_region(kvm, id, gpa, size);
9538         mutex_unlock(&kvm->slots_lock);
9539
9540         return r;
9541 }
9542 EXPORT_SYMBOL_GPL(x86_set_memory_region);
9543
9544 void kvm_arch_destroy_vm(struct kvm *kvm)
9545 {
9546         if (current->mm == kvm->mm) {
9547                 /*
9548                  * Free memory regions allocated on behalf of userspace,
9549                  * unless the the memory map has changed due to process exit
9550                  * or fd copying.
9551                  */
9552                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
9553                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
9554                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
9555         }
9556         if (kvm_x86_ops->vm_destroy)
9557                 kvm_x86_ops->vm_destroy(kvm);
9558         kvm_pic_destroy(kvm);
9559         kvm_ioapic_destroy(kvm);
9560         kvm_free_vcpus(kvm);
9561         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
9562         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
9563         kvm_mmu_uninit_vm(kvm);
9564         kvm_page_track_cleanup(kvm);
9565         kvm_hv_destroy_vm(kvm);
9566 }
9567
9568 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
9569                            struct kvm_memory_slot *dont)
9570 {
9571         int i;
9572
9573         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9574                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
9575                         kvfree(free->arch.rmap[i]);
9576                         free->arch.rmap[i] = NULL;
9577                 }
9578                 if (i == 0)
9579                         continue;
9580
9581                 if (!dont || free->arch.lpage_info[i - 1] !=
9582                              dont->arch.lpage_info[i - 1]) {
9583                         kvfree(free->arch.lpage_info[i - 1]);
9584                         free->arch.lpage_info[i - 1] = NULL;
9585                 }
9586         }
9587
9588         kvm_page_track_free_memslot(free, dont);
9589 }
9590
9591 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
9592                             unsigned long npages)
9593 {
9594         int i;
9595
9596         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9597                 struct kvm_lpage_info *linfo;
9598                 unsigned long ugfn;
9599                 int lpages;
9600                 int level = i + 1;
9601
9602                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
9603                                       slot->base_gfn, level) + 1;
9604
9605                 slot->arch.rmap[i] =
9606                         kvcalloc(lpages, sizeof(*slot->arch.rmap[i]),
9607                                  GFP_KERNEL_ACCOUNT);
9608                 if (!slot->arch.rmap[i])
9609                         goto out_free;
9610                 if (i == 0)
9611                         continue;
9612
9613                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
9614                 if (!linfo)
9615                         goto out_free;
9616
9617                 slot->arch.lpage_info[i - 1] = linfo;
9618
9619                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
9620                         linfo[0].disallow_lpage = 1;
9621                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
9622                         linfo[lpages - 1].disallow_lpage = 1;
9623                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
9624                 /*
9625                  * If the gfn and userspace address are not aligned wrt each
9626                  * other, or if explicitly asked to, disable large page
9627                  * support for this slot
9628                  */
9629                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
9630                     !kvm_largepages_enabled()) {
9631                         unsigned long j;
9632
9633                         for (j = 0; j < lpages; ++j)
9634                                 linfo[j].disallow_lpage = 1;
9635                 }
9636         }
9637
9638         if (kvm_page_track_create_memslot(slot, npages))
9639                 goto out_free;
9640
9641         return 0;
9642
9643 out_free:
9644         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9645                 kvfree(slot->arch.rmap[i]);
9646                 slot->arch.rmap[i] = NULL;
9647                 if (i == 0)
9648                         continue;
9649
9650                 kvfree(slot->arch.lpage_info[i - 1]);
9651                 slot->arch.lpage_info[i - 1] = NULL;
9652         }
9653         return -ENOMEM;
9654 }
9655
9656 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
9657 {
9658         /*
9659          * memslots->generation has been incremented.
9660          * mmio generation may have reached its maximum value.
9661          */
9662         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
9663 }
9664
9665 int kvm_arch_prepare_memory_region(struct kvm *kvm,
9666                                 struct kvm_memory_slot *memslot,
9667                                 const struct kvm_userspace_memory_region *mem,
9668                                 enum kvm_mr_change change)
9669 {
9670         return 0;
9671 }
9672
9673 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
9674                                      struct kvm_memory_slot *new)
9675 {
9676         /* Still write protect RO slot */
9677         if (new->flags & KVM_MEM_READONLY) {
9678                 kvm_mmu_slot_remove_write_access(kvm, new);
9679                 return;
9680         }
9681
9682         /*
9683          * Call kvm_x86_ops dirty logging hooks when they are valid.
9684          *
9685          * kvm_x86_ops->slot_disable_log_dirty is called when:
9686          *
9687          *  - KVM_MR_CREATE with dirty logging is disabled
9688          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
9689          *
9690          * The reason is, in case of PML, we need to set D-bit for any slots
9691          * with dirty logging disabled in order to eliminate unnecessary GPA
9692          * logging in PML buffer (and potential PML buffer full VMEXT). This
9693          * guarantees leaving PML enabled during guest's lifetime won't have
9694          * any additional overhead from PML when guest is running with dirty
9695          * logging disabled for memory slots.
9696          *
9697          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
9698          * to dirty logging mode.
9699          *
9700          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
9701          *
9702          * In case of write protect:
9703          *
9704          * Write protect all pages for dirty logging.
9705          *
9706          * All the sptes including the large sptes which point to this
9707          * slot are set to readonly. We can not create any new large
9708          * spte on this slot until the end of the logging.
9709          *
9710          * See the comments in fast_page_fault().
9711          */
9712         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
9713                 if (kvm_x86_ops->slot_enable_log_dirty)
9714                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
9715                 else
9716                         kvm_mmu_slot_remove_write_access(kvm, new);
9717         } else {
9718                 if (kvm_x86_ops->slot_disable_log_dirty)
9719                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
9720         }
9721 }
9722
9723 void kvm_arch_commit_memory_region(struct kvm *kvm,
9724                                 const struct kvm_userspace_memory_region *mem,
9725                                 const struct kvm_memory_slot *old,
9726                                 const struct kvm_memory_slot *new,
9727                                 enum kvm_mr_change change)
9728 {
9729         if (!kvm->arch.n_requested_mmu_pages)
9730                 kvm_mmu_change_mmu_pages(kvm,
9731                                 kvm_mmu_calculate_default_mmu_pages(kvm));
9732
9733         /*
9734          * Dirty logging tracks sptes in 4k granularity, meaning that large
9735          * sptes have to be split.  If live migration is successful, the guest
9736          * in the source machine will be destroyed and large sptes will be
9737          * created in the destination. However, if the guest continues to run
9738          * in the source machine (for example if live migration fails), small
9739          * sptes will remain around and cause bad performance.
9740          *
9741          * Scan sptes if dirty logging has been stopped, dropping those
9742          * which can be collapsed into a single large-page spte.  Later
9743          * page faults will create the large-page sptes.
9744          *
9745          * There is no need to do this in any of the following cases:
9746          * CREATE:      No dirty mappings will already exist.
9747          * MOVE/DELETE: The old mappings will already have been cleaned up by
9748          *              kvm_arch_flush_shadow_memslot()
9749          */
9750         if (change == KVM_MR_FLAGS_ONLY &&
9751                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
9752                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
9753                 kvm_mmu_zap_collapsible_sptes(kvm, new);
9754
9755         /*
9756          * Set up write protection and/or dirty logging for the new slot.
9757          *
9758          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
9759          * been zapped so no dirty logging staff is needed for old slot. For
9760          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
9761          * new and it's also covered when dealing with the new slot.
9762          *
9763          * FIXME: const-ify all uses of struct kvm_memory_slot.
9764          */
9765         if (change != KVM_MR_DELETE)
9766                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
9767 }
9768
9769 void kvm_arch_flush_shadow_all(struct kvm *kvm)
9770 {
9771         kvm_mmu_zap_all(kvm);
9772 }
9773
9774 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
9775                                    struct kvm_memory_slot *slot)
9776 {
9777         kvm_page_track_flush_slot(kvm, slot);
9778 }
9779
9780 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
9781 {
9782         return (is_guest_mode(vcpu) &&
9783                         kvm_x86_ops->guest_apic_has_interrupt &&
9784                         kvm_x86_ops->guest_apic_has_interrupt(vcpu));
9785 }
9786
9787 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
9788 {
9789         if (!list_empty_careful(&vcpu->async_pf.done))
9790                 return true;
9791
9792         if (kvm_apic_has_events(vcpu))
9793                 return true;
9794
9795         if (vcpu->arch.pv.pv_unhalted)
9796                 return true;
9797
9798         if (vcpu->arch.exception.pending)
9799                 return true;
9800
9801         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
9802             (vcpu->arch.nmi_pending &&
9803              kvm_x86_ops->nmi_allowed(vcpu)))
9804                 return true;
9805
9806         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
9807             (vcpu->arch.smi_pending && !is_smm(vcpu)))
9808                 return true;
9809
9810         if (kvm_arch_interrupt_allowed(vcpu) &&
9811             (kvm_cpu_has_interrupt(vcpu) ||
9812             kvm_guest_apic_has_interrupt(vcpu)))
9813                 return true;
9814
9815         if (kvm_hv_has_stimer_pending(vcpu))
9816                 return true;
9817
9818         return false;
9819 }
9820
9821 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
9822 {
9823         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
9824 }
9825
9826 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
9827 {
9828         if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
9829                 return true;
9830
9831         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
9832                 kvm_test_request(KVM_REQ_SMI, vcpu) ||
9833                  kvm_test_request(KVM_REQ_EVENT, vcpu))
9834                 return true;
9835
9836         if (vcpu->arch.apicv_active && kvm_x86_ops->dy_apicv_has_pending_interrupt(vcpu))
9837                 return true;
9838
9839         return false;
9840 }
9841
9842 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
9843 {
9844         return vcpu->arch.preempted_in_kernel;
9845 }
9846
9847 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
9848 {
9849         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
9850 }
9851
9852 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
9853 {
9854         return kvm_x86_ops->interrupt_allowed(vcpu);
9855 }
9856
9857 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
9858 {
9859         if (is_64_bit_mode(vcpu))
9860                 return kvm_rip_read(vcpu);
9861         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
9862                      kvm_rip_read(vcpu));
9863 }
9864 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
9865
9866 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
9867 {
9868         return kvm_get_linear_rip(vcpu) == linear_rip;
9869 }
9870 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
9871
9872 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
9873 {
9874         unsigned long rflags;
9875
9876         rflags = kvm_x86_ops->get_rflags(vcpu);
9877         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
9878                 rflags &= ~X86_EFLAGS_TF;
9879         return rflags;
9880 }
9881 EXPORT_SYMBOL_GPL(kvm_get_rflags);
9882
9883 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
9884 {
9885         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
9886             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
9887                 rflags |= X86_EFLAGS_TF;
9888         kvm_x86_ops->set_rflags(vcpu, rflags);
9889 }
9890
9891 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
9892 {
9893         __kvm_set_rflags(vcpu, rflags);
9894         kvm_make_request(KVM_REQ_EVENT, vcpu);
9895 }
9896 EXPORT_SYMBOL_GPL(kvm_set_rflags);
9897
9898 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
9899 {
9900         int r;
9901
9902         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
9903               work->wakeup_all)
9904                 return;
9905
9906         r = kvm_mmu_reload(vcpu);
9907         if (unlikely(r))
9908                 return;
9909
9910         if (!vcpu->arch.mmu->direct_map &&
9911               work->arch.cr3 != vcpu->arch.mmu->get_cr3(vcpu))
9912                 return;
9913
9914         vcpu->arch.mmu->page_fault(vcpu, work->gva, 0, true);
9915 }
9916
9917 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
9918 {
9919         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
9920 }
9921
9922 static inline u32 kvm_async_pf_next_probe(u32 key)
9923 {
9924         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
9925 }
9926
9927 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9928 {
9929         u32 key = kvm_async_pf_hash_fn(gfn);
9930
9931         while (vcpu->arch.apf.gfns[key] != ~0)
9932                 key = kvm_async_pf_next_probe(key);
9933
9934         vcpu->arch.apf.gfns[key] = gfn;
9935 }
9936
9937 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
9938 {
9939         int i;
9940         u32 key = kvm_async_pf_hash_fn(gfn);
9941
9942         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
9943                      (vcpu->arch.apf.gfns[key] != gfn &&
9944                       vcpu->arch.apf.gfns[key] != ~0); i++)
9945                 key = kvm_async_pf_next_probe(key);
9946
9947         return key;
9948 }
9949
9950 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9951 {
9952         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
9953 }
9954
9955 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9956 {
9957         u32 i, j, k;
9958
9959         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
9960         while (true) {
9961                 vcpu->arch.apf.gfns[i] = ~0;
9962                 do {
9963                         j = kvm_async_pf_next_probe(j);
9964                         if (vcpu->arch.apf.gfns[j] == ~0)
9965                                 return;
9966                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
9967                         /*
9968                          * k lies cyclically in ]i,j]
9969                          * |    i.k.j |
9970                          * |....j i.k.| or  |.k..j i...|
9971                          */
9972                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
9973                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
9974                 i = j;
9975         }
9976 }
9977
9978 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
9979 {
9980
9981         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
9982                                       sizeof(val));
9983 }
9984
9985 static int apf_get_user(struct kvm_vcpu *vcpu, u32 *val)
9986 {
9987
9988         return kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, val,
9989                                       sizeof(u32));
9990 }
9991
9992 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
9993 {
9994         if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
9995                 return false;
9996
9997         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
9998             (vcpu->arch.apf.send_user_only &&
9999              kvm_x86_ops->get_cpl(vcpu) == 0))
10000                 return false;
10001
10002         return true;
10003 }
10004
10005 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
10006 {
10007         if (unlikely(!lapic_in_kernel(vcpu) ||
10008                      kvm_event_needs_reinjection(vcpu) ||
10009                      vcpu->arch.exception.pending))
10010                 return false;
10011
10012         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
10013                 return false;
10014
10015         /*
10016          * If interrupts are off we cannot even use an artificial
10017          * halt state.
10018          */
10019         return kvm_x86_ops->interrupt_allowed(vcpu);
10020 }
10021
10022 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
10023                                      struct kvm_async_pf *work)
10024 {
10025         struct x86_exception fault;
10026
10027         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
10028         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
10029
10030         if (kvm_can_deliver_async_pf(vcpu) &&
10031             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
10032                 fault.vector = PF_VECTOR;
10033                 fault.error_code_valid = true;
10034                 fault.error_code = 0;
10035                 fault.nested_page_fault = false;
10036                 fault.address = work->arch.token;
10037                 fault.async_page_fault = true;
10038                 kvm_inject_page_fault(vcpu, &fault);
10039         } else {
10040                 /*
10041                  * It is not possible to deliver a paravirtualized asynchronous
10042                  * page fault, but putting the guest in an artificial halt state
10043                  * can be beneficial nevertheless: if an interrupt arrives, we
10044                  * can deliver it timely and perhaps the guest will schedule
10045                  * another process.  When the instruction that triggered a page
10046                  * fault is retried, hopefully the page will be ready in the host.
10047                  */
10048                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
10049         }
10050 }
10051
10052 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
10053                                  struct kvm_async_pf *work)
10054 {
10055         struct x86_exception fault;
10056         u32 val;
10057
10058         if (work->wakeup_all)
10059                 work->arch.token = ~0; /* broadcast wakeup */
10060         else
10061                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
10062         trace_kvm_async_pf_ready(work->arch.token, work->gva);
10063
10064         if (vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED &&
10065             !apf_get_user(vcpu, &val)) {
10066                 if (val == KVM_PV_REASON_PAGE_NOT_PRESENT &&
10067                     vcpu->arch.exception.pending &&
10068                     vcpu->arch.exception.nr == PF_VECTOR &&
10069                     !apf_put_user(vcpu, 0)) {
10070                         vcpu->arch.exception.injected = false;
10071                         vcpu->arch.exception.pending = false;
10072                         vcpu->arch.exception.nr = 0;
10073                         vcpu->arch.exception.has_error_code = false;
10074                         vcpu->arch.exception.error_code = 0;
10075                         vcpu->arch.exception.has_payload = false;
10076                         vcpu->arch.exception.payload = 0;
10077                 } else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
10078                         fault.vector = PF_VECTOR;
10079                         fault.error_code_valid = true;
10080                         fault.error_code = 0;
10081                         fault.nested_page_fault = false;
10082                         fault.address = work->arch.token;
10083                         fault.async_page_fault = true;
10084                         kvm_inject_page_fault(vcpu, &fault);
10085                 }
10086         }
10087         vcpu->arch.apf.halted = false;
10088         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10089 }
10090
10091 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
10092 {
10093         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
10094                 return true;
10095         else
10096                 return kvm_can_do_async_pf(vcpu);
10097 }
10098
10099 void kvm_arch_start_assignment(struct kvm *kvm)
10100 {
10101         atomic_inc(&kvm->arch.assigned_device_count);
10102 }
10103 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
10104
10105 void kvm_arch_end_assignment(struct kvm *kvm)
10106 {
10107         atomic_dec(&kvm->arch.assigned_device_count);
10108 }
10109 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
10110
10111 bool kvm_arch_has_assigned_device(struct kvm *kvm)
10112 {
10113         return atomic_read(&kvm->arch.assigned_device_count);
10114 }
10115 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
10116
10117 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
10118 {
10119         atomic_inc(&kvm->arch.noncoherent_dma_count);
10120 }
10121 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
10122
10123 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
10124 {
10125         atomic_dec(&kvm->arch.noncoherent_dma_count);
10126 }
10127 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
10128
10129 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
10130 {
10131         return atomic_read(&kvm->arch.noncoherent_dma_count);
10132 }
10133 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
10134
10135 bool kvm_arch_has_irq_bypass(void)
10136 {
10137         return true;
10138 }
10139
10140 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
10141                                       struct irq_bypass_producer *prod)
10142 {
10143         struct kvm_kernel_irqfd *irqfd =
10144                 container_of(cons, struct kvm_kernel_irqfd, consumer);
10145
10146         irqfd->producer = prod;
10147
10148         return kvm_x86_ops->update_pi_irte(irqfd->kvm,
10149                                            prod->irq, irqfd->gsi, 1);
10150 }
10151
10152 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
10153                                       struct irq_bypass_producer *prod)
10154 {
10155         int ret;
10156         struct kvm_kernel_irqfd *irqfd =
10157                 container_of(cons, struct kvm_kernel_irqfd, consumer);
10158
10159         WARN_ON(irqfd->producer != prod);
10160         irqfd->producer = NULL;
10161
10162         /*
10163          * When producer of consumer is unregistered, we change back to
10164          * remapped mode, so we can re-use the current implementation
10165          * when the irq is masked/disabled or the consumer side (KVM
10166          * int this case doesn't want to receive the interrupts.
10167         */
10168         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
10169         if (ret)
10170                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
10171                        " fails: %d\n", irqfd->consumer.token, ret);
10172 }
10173
10174 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
10175                                    uint32_t guest_irq, bool set)
10176 {
10177         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
10178 }
10179
10180 bool kvm_vector_hashing_enabled(void)
10181 {
10182         return vector_hashing;
10183 }
10184 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
10185
10186 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
10187 {
10188         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
10189 }
10190 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
10191
10192
10193 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
10194 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
10195 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
10196 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
10197 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
10198 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
10199 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
10200 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
10201 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
10202 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
10203 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
10204 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
10205 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
10206 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
10207 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
10208 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
10209 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
10210 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
10211 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
10212 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);