arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *   Yaniv Kamay  <yaniv@qumranet.com>
  15  *   Amit Shah    <amit.shah@qumranet.com>
  16  *   Ben-Ami Yassour <benami@il.ibm.com>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "ioapic.h"
  22 #include "mmu.h"
  23 #include "i8254.h"
  24 #include "tss.h"
  25 #include "kvm_cache_regs.h"
  26 #include "kvm_emulate.h"
  27 #include "x86.h"
  28 #include "cpuid.h"
  29 #include "pmu.h"
  30 #include "hyperv.h"
  31 #include "lapic.h"
  32 #include "xen.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/export.h>
  40 #include <linux/moduleparam.h>
  41 #include <linux/mman.h>
  42 #include <linux/highmem.h>
  43 #include <linux/iommu.h>
  44 #include <linux/intel-iommu.h>
  45 #include <linux/cpufreq.h>
  46 #include <linux/user-return-notifier.h>
  47 #include <linux/srcu.h>
  48 #include <linux/slab.h>
  49 #include <linux/perf_event.h>
  50 #include <linux/uaccess.h>
  51 #include <linux/hash.h>
  52 #include <linux/pci.h>
  53 #include <linux/timekeeper_internal.h>
  54 #include <linux/pvclock_gtod.h>
  55 #include <linux/kvm_irqfd.h>
  56 #include <linux/irqbypass.h>
  57 #include <linux/sched/stat.h>
  58 #include <linux/sched/isolation.h>
  59 #include <linux/mem_encrypt.h>
  60 #include <linux/entry-kvm.h>
  61 #include <linux/suspend.h>
  62
  63 #include <trace/events/kvm.h>
  64
  65 #include <asm/debugreg.h>
  66 #include <asm/msr.h>
  67 #include <asm/desc.h>
  68 #include <asm/mce.h>
  69 #include <linux/kernel_stat.h>
  70 #include <asm/fpu/internal.h> /* Ugh! */
  71 #include <asm/pvclock.h>
  72 #include <asm/div64.h>
  73 #include <asm/irq_remapping.h>
  74 #include <asm/mshyperv.h>
  75 #include <asm/hypervisor.h>
  76 #include <asm/tlbflush.h>
  77 #include <asm/intel_pt.h>
  78 #include <asm/emulate_prefix.h>
  79 #include <asm/sgx.h>
  80 #include <clocksource/hyperv_timer.h>
  81
  82 #define CREATE_TRACE_POINTS
  83 #include "trace.h"
  84
  85 #define MAX_IO_MSRS 256
  86 #define KVM_MAX_MCE_BANKS 32
  87 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  88 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  89
  90 #define emul_to_vcpu(ctxt) \
  91         ((struct kvm_vcpu *)(ctxt)->vcpu)
  92
  93 /* EFER defaults:
  94  * - enable syscall per default because its emulated by KVM
  95  * - enable LME and LMA per default on 64 bit KVM
  96  */
  97 #ifdef CONFIG_X86_64
  98 static
  99 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
 100 #else
 101 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
 102 #endif
 103
 104 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
 105
 106 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
 107                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 108
 109 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 110 static void process_nmi(struct kvm_vcpu *vcpu);
 111 static void process_smi(struct kvm_vcpu *vcpu);
 112 static void enter_smm(struct kvm_vcpu *vcpu);
 113 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 114 static void store_regs(struct kvm_vcpu *vcpu);
 115 static int sync_regs(struct kvm_vcpu *vcpu);
 116
 117 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
 118 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
 119
 120 struct kvm_x86_ops kvm_x86_ops __read_mostly;
 121 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 122
 123 #define KVM_X86_OP(func)                                             \
 124         DEFINE_STATIC_CALL_NULL(kvm_x86_##func,                      \
 125                                 *(((struct kvm_x86_ops *)0)->func));
 126 #define KVM_X86_OP_NULL KVM_X86_OP
 127 #include <asm/kvm-x86-ops.h>
 128 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits);
 129 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg);
 130 EXPORT_STATIC_CALL_GPL(kvm_x86_tlb_flush_current);
 131
 132 static bool __read_mostly ignore_msrs = 0;
 133 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 134
 135 bool __read_mostly report_ignored_msrs = true;
 136 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 137 EXPORT_SYMBOL_GPL(report_ignored_msrs);
 138
 139 unsigned int min_timer_period_us = 200;
 140 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 141
 142 static bool __read_mostly kvmclock_periodic_sync = true;
 143 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 144
 145 bool __read_mostly kvm_has_tsc_control;
 146 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 147 u32  __read_mostly kvm_max_guest_tsc_khz;
 148 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 149 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 150 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 151 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 152 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 153 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 154 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 155 bool __read_mostly kvm_has_bus_lock_exit;
 156 EXPORT_SYMBOL_GPL(kvm_has_bus_lock_exit);
 157
 158 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 159 static u32 __read_mostly tsc_tolerance_ppm = 250;
 160 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 161
 162 /*
 163  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 164  * adaptive tuning starting from default advancement of 1000ns.  '0' disables
 165  * advancement entirely.  Any other value is used as-is and disables adaptive
 166  * tuning, i.e. allows privileged userspace to set an exact advancement time.
 167  */
 168 static int __read_mostly lapic_timer_advance_ns = -1;
 169 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 170
 171 static bool __read_mostly vector_hashing = true;
 172 module_param(vector_hashing, bool, S_IRUGO);
 173
 174 bool __read_mostly enable_vmware_backdoor = false;
 175 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 176 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 177
 178 static bool __read_mostly force_emulation_prefix = false;
 179 module_param(force_emulation_prefix, bool, S_IRUGO);
 180
 181 int __read_mostly pi_inject_timer = -1;
 182 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
 183
 184 /*
 185  * Restoring the host value for MSRs that are only consumed when running in
 186  * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
 187  * returns to userspace, i.e. the kernel can run with the guest's value.
 188  */
 189 #define KVM_MAX_NR_USER_RETURN_MSRS 16
 190
 191 struct kvm_user_return_msrs {
 192         struct user_return_notifier urn;
 193         bool registered;
 194         struct kvm_user_return_msr_values {
 195                 u64 host;
 196                 u64 curr;
 197         } values[KVM_MAX_NR_USER_RETURN_MSRS];
 198 };
 199
 200 u32 __read_mostly kvm_nr_uret_msrs;
 201 EXPORT_SYMBOL_GPL(kvm_nr_uret_msrs);
 202 static u32 __read_mostly kvm_uret_msrs_list[KVM_MAX_NR_USER_RETURN_MSRS];
 203 static struct kvm_user_return_msrs __percpu *user_return_msrs;
 204
 205 #define KVM_SUPPORTED_XCR0     (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
 206                                 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
 207                                 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
 208                                 | XFEATURE_MASK_PKRU)
 209
 210 u64 __read_mostly host_efer;
 211 EXPORT_SYMBOL_GPL(host_efer);
 212
 213 bool __read_mostly allow_smaller_maxphyaddr = 0;
 214 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr);
 215
 216 bool __read_mostly enable_apicv = true;
 217 EXPORT_SYMBOL_GPL(enable_apicv);
 218
 219 u64 __read_mostly host_xss;
 220 EXPORT_SYMBOL_GPL(host_xss);
 221 u64 __read_mostly supported_xss;
 222 EXPORT_SYMBOL_GPL(supported_xss);
 223
 224 struct kvm_stats_debugfs_item debugfs_entries[] = {
 225         VCPU_STAT("pf_fixed", pf_fixed),
 226         VCPU_STAT("pf_guest", pf_guest),
 227         VCPU_STAT("tlb_flush", tlb_flush),
 228         VCPU_STAT("invlpg", invlpg),
 229         VCPU_STAT("exits", exits),
 230         VCPU_STAT("io_exits", io_exits),
 231         VCPU_STAT("mmio_exits", mmio_exits),
 232         VCPU_STAT("signal_exits", signal_exits),
 233         VCPU_STAT("irq_window", irq_window_exits),
 234         VCPU_STAT("nmi_window", nmi_window_exits),
 235         VCPU_STAT("halt_exits", halt_exits),
 236         VCPU_STAT("halt_successful_poll", halt_successful_poll),
 237         VCPU_STAT("halt_attempted_poll", halt_attempted_poll),
 238         VCPU_STAT("halt_poll_invalid", halt_poll_invalid),
 239         VCPU_STAT("halt_wakeup", halt_wakeup),
 240         VCPU_STAT("hypercalls", hypercalls),
 241         VCPU_STAT("request_irq", request_irq_exits),
 242         VCPU_STAT("irq_exits", irq_exits),
 243         VCPU_STAT("host_state_reload", host_state_reload),
 244         VCPU_STAT("fpu_reload", fpu_reload),
 245         VCPU_STAT("insn_emulation", insn_emulation),
 246         VCPU_STAT("insn_emulation_fail", insn_emulation_fail),
 247         VCPU_STAT("irq_injections", irq_injections),
 248         VCPU_STAT("nmi_injections", nmi_injections),
 249         VCPU_STAT("req_event", req_event),
 250         VCPU_STAT("l1d_flush", l1d_flush),
 251         VCPU_STAT("halt_poll_success_ns", halt_poll_success_ns),
 252         VCPU_STAT("halt_poll_fail_ns", halt_poll_fail_ns),
 253         VCPU_STAT("nested_run", nested_run),
 254         VCPU_STAT("directed_yield_attempted", directed_yield_attempted),
 255         VCPU_STAT("directed_yield_successful", directed_yield_successful),
 256         VCPU_STAT("guest_mode", guest_mode),
 257         VM_STAT("mmu_shadow_zapped", mmu_shadow_zapped),
 258         VM_STAT("mmu_pte_write", mmu_pte_write),
 259         VM_STAT("mmu_pde_zapped", mmu_pde_zapped),
 260         VM_STAT("mmu_flooded", mmu_flooded),
 261         VM_STAT("mmu_recycled", mmu_recycled),
 262         VM_STAT("mmu_cache_miss", mmu_cache_miss),
 263         VM_STAT("mmu_unsync", mmu_unsync),
 264         VM_STAT("remote_tlb_flush", remote_tlb_flush),
 265         VM_STAT("largepages", lpages, .mode = 0444),
 266         VM_STAT("nx_largepages_splitted", nx_lpage_splits, .mode = 0444),
 267         VM_STAT("max_mmu_page_hash_collisions", max_mmu_page_hash_collisions),
 268         { NULL }
 269 };
 270
 271 u64 __read_mostly host_xcr0;
 272 u64 __read_mostly supported_xcr0;
 273 EXPORT_SYMBOL_GPL(supported_xcr0);
 274
 275 static struct kmem_cache *x86_fpu_cache;
 276
 277 static struct kmem_cache *x86_emulator_cache;
 278
 279 /*
 280  * When called, it means the previous get/set msr reached an invalid msr.
 281  * Return true if we want to ignore/silent this failed msr access.
 282  */
 283 static bool kvm_msr_ignored_check(u32 msr, u64 data, bool write)
 284 {
 285         const char *op = write ? "wrmsr" : "rdmsr";
 286
 287         if (ignore_msrs) {
 288                 if (report_ignored_msrs)
 289                         kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
 290                                       op, msr, data);
 291                 /* Mask the error */
 292                 return true;
 293         } else {
 294                 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
 295                                       op, msr, data);
 296                 return false;
 297         }
 298 }
 299
 300 static struct kmem_cache *kvm_alloc_emulator_cache(void)
 301 {
 302         unsigned int useroffset = offsetof(struct x86_emulate_ctxt, src);
 303         unsigned int size = sizeof(struct x86_emulate_ctxt);
 304
 305         return kmem_cache_create_usercopy("x86_emulator", size,
 306                                           __alignof__(struct x86_emulate_ctxt),
 307                                           SLAB_ACCOUNT, useroffset,
 308                                           size - useroffset, NULL);
 309 }
 310
 311 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 312
 313 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 314 {
 315         int i;
 316         for (i = 0; i < ASYNC_PF_PER_VCPU; i++)
 317                 vcpu->arch.apf.gfns[i] = ~0;
 318 }
 319
 320 static void kvm_on_user_return(struct user_return_notifier *urn)
 321 {
 322         unsigned slot;
 323         struct kvm_user_return_msrs *msrs
 324                 = container_of(urn, struct kvm_user_return_msrs, urn);
 325         struct kvm_user_return_msr_values *values;
 326         unsigned long flags;
 327
 328         /*
 329          * Disabling irqs at this point since the following code could be
 330          * interrupted and executed through kvm_arch_hardware_disable()
 331          */
 332         local_irq_save(flags);
 333         if (msrs->registered) {
 334                 msrs->registered = false;
 335                 user_return_notifier_unregister(urn);
 336         }
 337         local_irq_restore(flags);
 338         for (slot = 0; slot < kvm_nr_uret_msrs; ++slot) {
 339                 values = &msrs->values[slot];
 340                 if (values->host != values->curr) {
 341                         wrmsrl(kvm_uret_msrs_list[slot], values->host);
 342                         values->curr = values->host;
 343                 }
 344         }
 345 }
 346
 347 static int kvm_probe_user_return_msr(u32 msr)
 348 {
 349         u64 val;
 350         int ret;
 351
 352         preempt_disable();
 353         ret = rdmsrl_safe(msr, &val);
 354         if (ret)
 355                 goto out;
 356         ret = wrmsrl_safe(msr, val);
 357 out:
 358         preempt_enable();
 359         return ret;
 360 }
 361
 362 int kvm_add_user_return_msr(u32 msr)
 363 {
 364         BUG_ON(kvm_nr_uret_msrs >= KVM_MAX_NR_USER_RETURN_MSRS);
 365
 366         if (kvm_probe_user_return_msr(msr))
 367                 return -1;
 368
 369         kvm_uret_msrs_list[kvm_nr_uret_msrs] = msr;
 370         return kvm_nr_uret_msrs++;
 371 }
 372 EXPORT_SYMBOL_GPL(kvm_add_user_return_msr);
 373
 374 int kvm_find_user_return_msr(u32 msr)
 375 {
 376         int i;
 377
 378         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 379                 if (kvm_uret_msrs_list[i] == msr)
 380                         return i;
 381         }
 382         return -1;
 383 }
 384 EXPORT_SYMBOL_GPL(kvm_find_user_return_msr);
 385
 386 static void kvm_user_return_msr_cpu_online(void)
 387 {
 388         unsigned int cpu = smp_processor_id();
 389         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 390         u64 value;
 391         int i;
 392
 393         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 394                 rdmsrl_safe(kvm_uret_msrs_list[i], &value);
 395                 msrs->values[i].host = value;
 396                 msrs->values[i].curr = value;
 397         }
 398 }
 399
 400 int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)
 401 {
 402         unsigned int cpu = smp_processor_id();
 403         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 404         int err;
 405
 406         value = (value & mask) | (msrs->values[slot].host & ~mask);
 407         if (value == msrs->values[slot].curr)
 408                 return 0;
 409         err = wrmsrl_safe(kvm_uret_msrs_list[slot], value);
 410         if (err)
 411                 return 1;
 412
 413         msrs->values[slot].curr = value;
 414         if (!msrs->registered) {
 415                 msrs->urn.on_user_return = kvm_on_user_return;
 416                 user_return_notifier_register(&msrs->urn);
 417                 msrs->registered = true;
 418         }
 419         return 0;
 420 }
 421 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr);
 422
 423 static void drop_user_return_notifiers(void)
 424 {
 425         unsigned int cpu = smp_processor_id();
 426         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 427
 428         if (msrs->registered)
 429                 kvm_on_user_return(&msrs->urn);
 430 }
 431
 432 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 433 {
 434         return vcpu->arch.apic_base;
 435 }
 436 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 437
 438 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 439 {
 440         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 441 }
 442 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 443
 444 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 445 {
 446         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 447         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 448         u64 reserved_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu) | 0x2ff |
 449                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 450
 451         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 452                 return 1;
 453         if (!msr_info->host_initiated) {
 454                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 455                         return 1;
 456                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 457                         return 1;
 458         }
 459
 460         kvm_lapic_set_base(vcpu, msr_info->data);
 461         kvm_recalculate_apic_map(vcpu->kvm);
 462         return 0;
 463 }
 464 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 465
 466 asmlinkage __visible noinstr void kvm_spurious_fault(void)
 467 {
 468         /* Fault while not rebooting.  We want the trace. */
 469         BUG_ON(!kvm_rebooting);
 470 }
 471 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 472
 473 #define EXCPT_BENIGN            0
 474 #define EXCPT_CONTRIBUTORY      1
 475 #define EXCPT_PF                2
 476
 477 static int exception_class(int vector)
 478 {
 479         switch (vector) {
 480         case PF_VECTOR:
 481                 return EXCPT_PF;
 482         case DE_VECTOR:
 483         case TS_VECTOR:
 484         case NP_VECTOR:
 485         case SS_VECTOR:
 486         case GP_VECTOR:
 487                 return EXCPT_CONTRIBUTORY;
 488         default:
 489                 break;
 490         }
 491         return EXCPT_BENIGN;
 492 }
 493
 494 #define EXCPT_FAULT             0
 495 #define EXCPT_TRAP              1
 496 #define EXCPT_ABORT             2
 497 #define EXCPT_INTERRUPT         3
 498
 499 static int exception_type(int vector)
 500 {
 501         unsigned int mask;
 502
 503         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 504                 return EXCPT_INTERRUPT;
 505
 506         mask = 1 << vector;
 507
 508         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 509         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 510                 return EXCPT_TRAP;
 511
 512         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 513                 return EXCPT_ABORT;
 514
 515         /* Reserved exceptions will result in fault */
 516         return EXCPT_FAULT;
 517 }
 518
 519 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 520 {
 521         unsigned nr = vcpu->arch.exception.nr;
 522         bool has_payload = vcpu->arch.exception.has_payload;
 523         unsigned long payload = vcpu->arch.exception.payload;
 524
 525         if (!has_payload)
 526                 return;
 527
 528         switch (nr) {
 529         case DB_VECTOR:
 530                 /*
 531                  * "Certain debug exceptions may clear bit 0-3.  The
 532                  * remaining contents of the DR6 register are never
 533                  * cleared by the processor".
 534                  */
 535                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 536                 /*
 537                  * In order to reflect the #DB exception payload in guest
 538                  * dr6, three components need to be considered: active low
 539                  * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
 540                  * DR6_BS and DR6_BT)
 541                  * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
 542                  * In the target guest dr6:
 543                  * FIXED_1 bits should always be set.
 544                  * Active low bits should be cleared if 1-setting in payload.
 545                  * Active high bits should be set if 1-setting in payload.
 546                  *
 547                  * Note, the payload is compatible with the pending debug
 548                  * exceptions/exit qualification under VMX, that active_low bits
 549                  * are active high in payload.
 550                  * So they need to be flipped for DR6.
 551                  */
 552                 vcpu->arch.dr6 |= DR6_ACTIVE_LOW;
 553                 vcpu->arch.dr6 |= payload;
 554                 vcpu->arch.dr6 ^= payload & DR6_ACTIVE_LOW;
 555
 556                 /*
 557                  * The #DB payload is defined as compatible with the 'pending
 558                  * debug exceptions' field under VMX, not DR6. While bit 12 is
 559                  * defined in the 'pending debug exceptions' field (enabled
 560                  * breakpoint), it is reserved and must be zero in DR6.
 561                  */
 562                 vcpu->arch.dr6 &= ~BIT(12);
 563                 break;
 564         case PF_VECTOR:
 565                 vcpu->arch.cr2 = payload;
 566                 break;
 567         }
 568
 569         vcpu->arch.exception.has_payload = false;
 570         vcpu->arch.exception.payload = 0;
 571 }
 572 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 573
 574 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 575                 unsigned nr, bool has_error, u32 error_code,
 576                 bool has_payload, unsigned long payload, bool reinject)
 577 {
 578         u32 prev_nr;
 579         int class1, class2;
 580
 581         kvm_make_request(KVM_REQ_EVENT, vcpu);
 582
 583         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 584         queue:
 585                 if (reinject) {
 586                         /*
 587                          * On vmentry, vcpu->arch.exception.pending is only
 588                          * true if an event injection was blocked by
 589                          * nested_run_pending.  In that case, however,
 590                          * vcpu_enter_guest requests an immediate exit,
 591                          * and the guest shouldn't proceed far enough to
 592                          * need reinjection.
 593                          */
 594                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 595                         vcpu->arch.exception.injected = true;
 596                         if (WARN_ON_ONCE(has_payload)) {
 597                                 /*
 598                                  * A reinjected event has already
 599                                  * delivered its payload.
 600                                  */
 601                                 has_payload = false;
 602                                 payload = 0;
 603                         }
 604                 } else {
 605                         vcpu->arch.exception.pending = true;
 606                         vcpu->arch.exception.injected = false;
 607                 }
 608                 vcpu->arch.exception.has_error_code = has_error;
 609                 vcpu->arch.exception.nr = nr;
 610                 vcpu->arch.exception.error_code = error_code;
 611                 vcpu->arch.exception.has_payload = has_payload;
 612                 vcpu->arch.exception.payload = payload;
 613                 if (!is_guest_mode(vcpu))
 614                         kvm_deliver_exception_payload(vcpu);
 615                 return;
 616         }
 617
 618         /* to check exception */
 619         prev_nr = vcpu->arch.exception.nr;
 620         if (prev_nr == DF_VECTOR) {
 621                 /* triple fault -> shutdown */
 622                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 623                 return;
 624         }
 625         class1 = exception_class(prev_nr);
 626         class2 = exception_class(nr);
 627         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 628                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 629                 /*
 630                  * Generate double fault per SDM Table 5-5.  Set
 631                  * exception.pending = true so that the double fault
 632                  * can trigger a nested vmexit.
 633                  */
 634                 vcpu->arch.exception.pending = true;
 635                 vcpu->arch.exception.injected = false;
 636                 vcpu->arch.exception.has_error_code = true;
 637                 vcpu->arch.exception.nr = DF_VECTOR;
 638                 vcpu->arch.exception.error_code = 0;
 639                 vcpu->arch.exception.has_payload = false;
 640                 vcpu->arch.exception.payload = 0;
 641         } else
 642                 /* replace previous exception with a new one in a hope
 643                    that instruction re-execution will regenerate lost
 644                    exception */
 645                 goto queue;
 646 }
 647
 648 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 649 {
 650         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 651 }
 652 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 653
 654 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 655 {
 656         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 657 }
 658 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 659
 660 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 661                            unsigned long payload)
 662 {
 663         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 664 }
 665 EXPORT_SYMBOL_GPL(kvm_queue_exception_p);
 666
 667 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 668                                     u32 error_code, unsigned long payload)
 669 {
 670         kvm_multiple_exception(vcpu, nr, true, error_code,
 671                                true, payload, false);
 672 }
 673
 674 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 675 {
 676         if (err)
 677                 kvm_inject_gp(vcpu, 0);
 678         else
 679                 return kvm_skip_emulated_instruction(vcpu);
 680
 681         return 1;
 682 }
 683 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 684
 685 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 686 {
 687         ++vcpu->stat.pf_guest;
 688         vcpu->arch.exception.nested_apf =
 689                 is_guest_mode(vcpu) && fault->async_page_fault;
 690         if (vcpu->arch.exception.nested_apf) {
 691                 vcpu->arch.apf.nested_apf_token = fault->address;
 692                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 693         } else {
 694                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 695                                         fault->address);
 696         }
 697 }
 698 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 699
 700 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
 701                                     struct x86_exception *fault)
 702 {
 703         struct kvm_mmu *fault_mmu;
 704         WARN_ON_ONCE(fault->vector != PF_VECTOR);
 705
 706         fault_mmu = fault->nested_page_fault ? vcpu->arch.mmu :
 707                                                vcpu->arch.walk_mmu;
 708
 709         /*
 710          * Invalidate the TLB entry for the faulting address, if it exists,
 711          * else the access will fault indefinitely (and to emulate hardware).
 712          */
 713         if ((fault->error_code & PFERR_PRESENT_MASK) &&
 714             !(fault->error_code & PFERR_RSVD_MASK))
 715                 kvm_mmu_invalidate_gva(vcpu, fault_mmu, fault->address,
 716                                        fault_mmu->root_hpa);
 717
 718         fault_mmu->inject_page_fault(vcpu, fault);
 719         return fault->nested_page_fault;
 720 }
 721 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault);
 722
 723 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 724 {
 725         atomic_inc(&vcpu->arch.nmi_queued);
 726         kvm_make_request(KVM_REQ_NMI, vcpu);
 727 }
 728 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 729
 730 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 731 {
 732         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 733 }
 734 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 735
 736 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 737 {
 738         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 739 }
 740 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 741
 742 /*
 743  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 744  * a #GP and return false.
 745  */
 746 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 747 {
 748         if (static_call(kvm_x86_get_cpl)(vcpu) <= required_cpl)
 749                 return true;
 750         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 751         return false;
 752 }
 753 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 754
 755 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 756 {
 757         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 758                 return true;
 759
 760         kvm_queue_exception(vcpu, UD_VECTOR);
 761         return false;
 762 }
 763 EXPORT_SYMBOL_GPL(kvm_require_dr);
 764
 765 /*
 766  * This function will be used to read from the physical memory of the currently
 767  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 768  * can read from guest physical or from the guest's guest physical memory.
 769  */
 770 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 771                             gfn_t ngfn, void *data, int offset, int len,
 772                             u32 access)
 773 {
 774         struct x86_exception exception;
 775         gfn_t real_gfn;
 776         gpa_t ngpa;
 777
 778         ngpa     = gfn_to_gpa(ngfn);
 779         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 780         if (real_gfn == UNMAPPED_GVA)
 781                 return -EFAULT;
 782
 783         real_gfn = gpa_to_gfn(real_gfn);
 784
 785         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 786 }
 787 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 788
 789 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
 790 {
 791         return vcpu->arch.reserved_gpa_bits | rsvd_bits(5, 8) | rsvd_bits(1, 2);
 792 }
 793
 794 /*
 795  * Load the pae pdptrs.  Return 1 if they are all valid, 0 otherwise.
 796  */
 797 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 798 {
 799         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 800         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 801         int i;
 802         int ret;
 803         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 804
 805         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 806                                       offset * sizeof(u64), sizeof(pdpte),
 807                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 808         if (ret < 0) {
 809                 ret = 0;
 810                 goto out;
 811         }
 812         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 813                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 814                     (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
 815                         ret = 0;
 816                         goto out;
 817                 }
 818         }
 819         ret = 1;
 820
 821         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 822         kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
 823         vcpu->arch.pdptrs_from_userspace = false;
 824
 825 out:
 826
 827         return ret;
 828 }
 829 EXPORT_SYMBOL_GPL(load_pdptrs);
 830
 831 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0)
 832 {
 833         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 834
 835         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 836                 kvm_clear_async_pf_completion_queue(vcpu);
 837                 kvm_async_pf_hash_reset(vcpu);
 838         }
 839
 840         if ((cr0 ^ old_cr0) & update_bits)
 841                 kvm_mmu_reset_context(vcpu);
 842
 843         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 844             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 845             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 846                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 847 }
 848 EXPORT_SYMBOL_GPL(kvm_post_set_cr0);
 849
 850 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 851 {
 852         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 853         unsigned long pdptr_bits = X86_CR0_CD | X86_CR0_NW | X86_CR0_PG;
 854
 855         cr0 |= X86_CR0_ET;
 856
 857 #ifdef CONFIG_X86_64
 858         if (cr0 & 0xffffffff00000000UL)
 859                 return 1;
 860 #endif
 861
 862         cr0 &= ~CR0_RESERVED_BITS;
 863
 864         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 865                 return 1;
 866
 867         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 868                 return 1;
 869
 870 #ifdef CONFIG_X86_64
 871         if ((vcpu->arch.efer & EFER_LME) && !is_paging(vcpu) &&
 872             (cr0 & X86_CR0_PG)) {
 873                 int cs_db, cs_l;
 874
 875                 if (!is_pae(vcpu))
 876                         return 1;
 877                 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
 878                 if (cs_l)
 879                         return 1;
 880         }
 881 #endif
 882         if (!(vcpu->arch.efer & EFER_LME) && (cr0 & X86_CR0_PG) &&
 883             is_pae(vcpu) && ((cr0 ^ old_cr0) & pdptr_bits) &&
 884             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu)))
 885                 return 1;
 886
 887         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 888                 return 1;
 889
 890         static_call(kvm_x86_set_cr0)(vcpu, cr0);
 891
 892         kvm_post_set_cr0(vcpu, old_cr0, cr0);
 893
 894         return 0;
 895 }
 896 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 897
 898 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 899 {
 900         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 901 }
 902 EXPORT_SYMBOL_GPL(kvm_lmsw);
 903
 904 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
 905 {
 906         if (vcpu->arch.guest_state_protected)
 907                 return;
 908
 909         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 910
 911                 if (vcpu->arch.xcr0 != host_xcr0)
 912                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 913
 914                 if (vcpu->arch.xsaves_enabled &&
 915                     vcpu->arch.ia32_xss != host_xss)
 916                         wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
 917         }
 918
 919         if (static_cpu_has(X86_FEATURE_PKU) &&
 920             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 921              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU)) &&
 922             vcpu->arch.pkru != vcpu->arch.host_pkru)
 923                 __write_pkru(vcpu->arch.pkru);
 924 }
 925 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
 926
 927 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
 928 {
 929         if (vcpu->arch.guest_state_protected)
 930                 return;
 931
 932         if (static_cpu_has(X86_FEATURE_PKU) &&
 933             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 934              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU))) {
 935                 vcpu->arch.pkru = rdpkru();
 936                 if (vcpu->arch.pkru != vcpu->arch.host_pkru)
 937                         __write_pkru(vcpu->arch.host_pkru);
 938         }
 939
 940         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 941
 942                 if (vcpu->arch.xcr0 != host_xcr0)
 943                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 944
 945                 if (vcpu->arch.xsaves_enabled &&
 946                     vcpu->arch.ia32_xss != host_xss)
 947                         wrmsrl(MSR_IA32_XSS, host_xss);
 948         }
 949
 950 }
 951 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
 952
 953 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 954 {
 955         u64 xcr0 = xcr;
 956         u64 old_xcr0 = vcpu->arch.xcr0;
 957         u64 valid_bits;
 958
 959         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 960         if (index != XCR_XFEATURE_ENABLED_MASK)
 961                 return 1;
 962         if (!(xcr0 & XFEATURE_MASK_FP))
 963                 return 1;
 964         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 965                 return 1;
 966
 967         /*
 968          * Do not allow the guest to set bits that we do not support
 969          * saving.  However, xcr0 bit 0 is always set, even if the
 970          * emulated CPU does not support XSAVE (see fx_init).
 971          */
 972         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 973         if (xcr0 & ~valid_bits)
 974                 return 1;
 975
 976         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 977             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 978                 return 1;
 979
 980         if (xcr0 & XFEATURE_MASK_AVX512) {
 981                 if (!(xcr0 & XFEATURE_MASK_YMM))
 982                         return 1;
 983                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 984                         return 1;
 985         }
 986         vcpu->arch.xcr0 = xcr0;
 987
 988         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 989                 kvm_update_cpuid_runtime(vcpu);
 990         return 0;
 991 }
 992
 993 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu)
 994 {
 995         if (static_call(kvm_x86_get_cpl)(vcpu) != 0 ||
 996             __kvm_set_xcr(vcpu, kvm_rcx_read(vcpu), kvm_read_edx_eax(vcpu))) {
 997                 kvm_inject_gp(vcpu, 0);
 998                 return 1;
 999         }
1000
1001         return kvm_skip_emulated_instruction(vcpu);
1002 }
1003 EXPORT_SYMBOL_GPL(kvm_emulate_xsetbv);
1004
1005 bool kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1006 {
1007         if (cr4 & cr4_reserved_bits)
1008                 return false;
1009
1010         if (cr4 & vcpu->arch.cr4_guest_rsvd_bits)
1011                 return false;
1012
1013         return static_call(kvm_x86_is_valid_cr4)(vcpu, cr4);
1014 }
1015 EXPORT_SYMBOL_GPL(kvm_is_valid_cr4);
1016
1017 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4)
1018 {
1019         unsigned long mmu_role_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
1020                                       X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
1021
1022         if (((cr4 ^ old_cr4) & mmu_role_bits) ||
1023             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
1024                 kvm_mmu_reset_context(vcpu);
1025 }
1026 EXPORT_SYMBOL_GPL(kvm_post_set_cr4);
1027
1028 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1029 {
1030         unsigned long old_cr4 = kvm_read_cr4(vcpu);
1031         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
1032                                    X86_CR4_SMEP;
1033
1034         if (!kvm_is_valid_cr4(vcpu, cr4))
1035                 return 1;
1036
1037         if (is_long_mode(vcpu)) {
1038                 if (!(cr4 & X86_CR4_PAE))
1039                         return 1;
1040                 if ((cr4 ^ old_cr4) & X86_CR4_LA57)
1041                         return 1;
1042         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
1043                    && ((cr4 ^ old_cr4) & pdptr_bits)
1044                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
1045                                    kvm_read_cr3(vcpu)))
1046                 return 1;
1047
1048         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
1049                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
1050                         return 1;
1051
1052                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1053                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
1054                         return 1;
1055         }
1056
1057         static_call(kvm_x86_set_cr4)(vcpu, cr4);
1058
1059         kvm_post_set_cr4(vcpu, old_cr4, cr4);
1060
1061         return 0;
1062 }
1063 EXPORT_SYMBOL_GPL(kvm_set_cr4);
1064
1065 static void kvm_invalidate_pcid(struct kvm_vcpu *vcpu, unsigned long pcid)
1066 {
1067         struct kvm_mmu *mmu = vcpu->arch.mmu;
1068         unsigned long roots_to_free = 0;
1069         int i;
1070
1071         /*
1072          * If neither the current CR3 nor any of the prev_roots use the given
1073          * PCID, then nothing needs to be done here because a resync will
1074          * happen anyway before switching to any other CR3.
1075          */
1076         if (kvm_get_active_pcid(vcpu) == pcid) {
1077                 kvm_mmu_sync_roots(vcpu);
1078                 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1079         }
1080
1081         for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
1082                 if (kvm_get_pcid(vcpu, mmu->prev_roots[i].pgd) == pcid)
1083                         roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
1084
1085         kvm_mmu_free_roots(vcpu, mmu, roots_to_free);
1086 }
1087
1088 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1089 {
1090         bool skip_tlb_flush = false;
1091         unsigned long pcid = 0;
1092 #ifdef CONFIG_X86_64
1093         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
1094
1095         if (pcid_enabled) {
1096                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
1097                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
1098                 pcid = cr3 & X86_CR3_PCID_MASK;
1099         }
1100 #endif
1101
1102         /* PDPTRs are always reloaded for PAE paging. */
1103         if (cr3 == kvm_read_cr3(vcpu) && !is_pae_paging(vcpu))
1104                 goto handle_tlb_flush;
1105
1106         /*
1107          * Do not condition the GPA check on long mode, this helper is used to
1108          * stuff CR3, e.g. for RSM emulation, and there is no guarantee that
1109          * the current vCPU mode is accurate.
1110          */
1111         if (kvm_vcpu_is_illegal_gpa(vcpu, cr3))
1112                 return 1;
1113
1114         if (is_pae_paging(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
1115                 return 1;
1116
1117         if (cr3 != kvm_read_cr3(vcpu))
1118                 kvm_mmu_new_pgd(vcpu, cr3, skip_tlb_flush, skip_tlb_flush);
1119
1120         vcpu->arch.cr3 = cr3;
1121         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
1122
1123 handle_tlb_flush:
1124         /*
1125          * A load of CR3 that flushes the TLB flushes only the current PCID,
1126          * even if PCID is disabled, in which case PCID=0 is flushed.  It's a
1127          * moot point in the end because _disabling_ PCID will flush all PCIDs,
1128          * and it's impossible to use a non-zero PCID when PCID is disabled,
1129          * i.e. only PCID=0 can be relevant.
1130          */
1131         if (!skip_tlb_flush)
1132                 kvm_invalidate_pcid(vcpu, pcid);
1133
1134         return 0;
1135 }
1136 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1137
1138 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1139 {
1140         if (cr8 & CR8_RESERVED_BITS)
1141                 return 1;
1142         if (lapic_in_kernel(vcpu))
1143                 kvm_lapic_set_tpr(vcpu, cr8);
1144         else
1145                 vcpu->arch.cr8 = cr8;
1146         return 0;
1147 }
1148 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1149
1150 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1151 {
1152         if (lapic_in_kernel(vcpu))
1153                 return kvm_lapic_get_cr8(vcpu);
1154         else
1155                 return vcpu->arch.cr8;
1156 }
1157 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1158
1159 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1160 {
1161         int i;
1162
1163         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1164                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1165                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1166                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
1167         }
1168 }
1169
1170 void kvm_update_dr7(struct kvm_vcpu *vcpu)
1171 {
1172         unsigned long dr7;
1173
1174         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1175                 dr7 = vcpu->arch.guest_debug_dr7;
1176         else
1177                 dr7 = vcpu->arch.dr7;
1178         static_call(kvm_x86_set_dr7)(vcpu, dr7);
1179         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1180         if (dr7 & DR7_BP_EN_MASK)
1181                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1182 }
1183 EXPORT_SYMBOL_GPL(kvm_update_dr7);
1184
1185 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1186 {
1187         u64 fixed = DR6_FIXED_1;
1188
1189         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1190                 fixed |= DR6_RTM;
1191
1192         if (!guest_cpuid_has(vcpu, X86_FEATURE_BUS_LOCK_DETECT))
1193                 fixed |= DR6_BUS_LOCK;
1194         return fixed;
1195 }
1196
1197 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1198 {
1199         size_t size = ARRAY_SIZE(vcpu->arch.db);
1200
1201         switch (dr) {
1202         case 0 ... 3:
1203                 vcpu->arch.db[array_index_nospec(dr, size)] = val;
1204                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1205                         vcpu->arch.eff_db[dr] = val;
1206                 break;
1207         case 4:
1208         case 6:
1209                 if (!kvm_dr6_valid(val))
1210                         return 1; /* #GP */
1211                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1212                 break;
1213         case 5:
1214         default: /* 7 */
1215                 if (!kvm_dr7_valid(val))
1216                         return 1; /* #GP */
1217                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1218                 kvm_update_dr7(vcpu);
1219                 break;
1220         }
1221
1222         return 0;
1223 }
1224 EXPORT_SYMBOL_GPL(kvm_set_dr);
1225
1226 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1227 {
1228         size_t size = ARRAY_SIZE(vcpu->arch.db);
1229
1230         switch (dr) {
1231         case 0 ... 3:
1232                 *val = vcpu->arch.db[array_index_nospec(dr, size)];
1233                 break;
1234         case 4:
1235         case 6:
1236                 *val = vcpu->arch.dr6;
1237                 break;
1238         case 5:
1239         default: /* 7 */
1240                 *val = vcpu->arch.dr7;
1241                 break;
1242         }
1243 }
1244 EXPORT_SYMBOL_GPL(kvm_get_dr);
1245
1246 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu)
1247 {
1248         u32 ecx = kvm_rcx_read(vcpu);
1249         u64 data;
1250
1251         if (kvm_pmu_rdpmc(vcpu, ecx, &data)) {
1252                 kvm_inject_gp(vcpu, 0);
1253                 return 1;
1254         }
1255
1256         kvm_rax_write(vcpu, (u32)data);
1257         kvm_rdx_write(vcpu, data >> 32);
1258         return kvm_skip_emulated_instruction(vcpu);
1259 }
1260 EXPORT_SYMBOL_GPL(kvm_emulate_rdpmc);
1261
1262 /*
1263  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1264  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1265  *
1266  * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1267  * extract the supported MSRs from the related const lists.
1268  * msrs_to_save is selected from the msrs_to_save_all to reflect the
1269  * capabilities of the host cpu. This capabilities test skips MSRs that are
1270  * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1271  * may depend on host virtualization features rather than host cpu features.
1272  */
1273
1274 static const u32 msrs_to_save_all[] = {
1275         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1276         MSR_STAR,
1277 #ifdef CONFIG_X86_64
1278         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1279 #endif
1280         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1281         MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1282         MSR_IA32_SPEC_CTRL,
1283         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1284         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1285         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1286         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1287         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1288         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1289         MSR_IA32_UMWAIT_CONTROL,
1290
1291         MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1292         MSR_ARCH_PERFMON_FIXED_CTR0 + 2, MSR_ARCH_PERFMON_FIXED_CTR0 + 3,
1293         MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1294         MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1295         MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1296         MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1297         MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1298         MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1299         MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1300         MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1301         MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1302         MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1303         MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1304         MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1305         MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1306         MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1307         MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1308         MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1309         MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1310         MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1311         MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1312         MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1313 };
1314
1315 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
1316 static unsigned num_msrs_to_save;
1317
1318 static const u32 emulated_msrs_all[] = {
1319         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1320         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1321         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1322         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1323         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1324         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1325         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1326         HV_X64_MSR_RESET,
1327         HV_X64_MSR_VP_INDEX,
1328         HV_X64_MSR_VP_RUNTIME,
1329         HV_X64_MSR_SCONTROL,
1330         HV_X64_MSR_STIMER0_CONFIG,
1331         HV_X64_MSR_VP_ASSIST_PAGE,
1332         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1333         HV_X64_MSR_TSC_EMULATION_STATUS,
1334         HV_X64_MSR_SYNDBG_OPTIONS,
1335         HV_X64_MSR_SYNDBG_CONTROL, HV_X64_MSR_SYNDBG_STATUS,
1336         HV_X64_MSR_SYNDBG_SEND_BUFFER, HV_X64_MSR_SYNDBG_RECV_BUFFER,
1337         HV_X64_MSR_SYNDBG_PENDING_BUFFER,
1338
1339         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1340         MSR_KVM_PV_EOI_EN, MSR_KVM_ASYNC_PF_INT, MSR_KVM_ASYNC_PF_ACK,
1341
1342         MSR_IA32_TSC_ADJUST,
1343         MSR_IA32_TSC_DEADLINE,
1344         MSR_IA32_ARCH_CAPABILITIES,
1345         MSR_IA32_PERF_CAPABILITIES,
1346         MSR_IA32_MISC_ENABLE,
1347         MSR_IA32_MCG_STATUS,
1348         MSR_IA32_MCG_CTL,
1349         MSR_IA32_MCG_EXT_CTL,
1350         MSR_IA32_SMBASE,
1351         MSR_SMI_COUNT,
1352         MSR_PLATFORM_INFO,
1353         MSR_MISC_FEATURES_ENABLES,
1354         MSR_AMD64_VIRT_SPEC_CTRL,
1355         MSR_IA32_POWER_CTL,
1356         MSR_IA32_UCODE_REV,
1357
1358         /*
1359          * The following list leaves out MSRs whose values are determined
1360          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1361          * We always support the "true" VMX control MSRs, even if the host
1362          * processor does not, so I am putting these registers here rather
1363          * than in msrs_to_save_all.
1364          */
1365         MSR_IA32_VMX_BASIC,
1366         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1367         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1368         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1369         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1370         MSR_IA32_VMX_MISC,
1371         MSR_IA32_VMX_CR0_FIXED0,
1372         MSR_IA32_VMX_CR4_FIXED0,
1373         MSR_IA32_VMX_VMCS_ENUM,
1374         MSR_IA32_VMX_PROCBASED_CTLS2,
1375         MSR_IA32_VMX_EPT_VPID_CAP,
1376         MSR_IA32_VMX_VMFUNC,
1377
1378         MSR_K7_HWCR,
1379         MSR_KVM_POLL_CONTROL,
1380 };
1381
1382 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1383 static unsigned num_emulated_msrs;
1384
1385 /*
1386  * List of msr numbers which are used to expose MSR-based features that
1387  * can be used by a hypervisor to validate requested CPU features.
1388  */
1389 static const u32 msr_based_features_all[] = {
1390         MSR_IA32_VMX_BASIC,
1391         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1392         MSR_IA32_VMX_PINBASED_CTLS,
1393         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1394         MSR_IA32_VMX_PROCBASED_CTLS,
1395         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1396         MSR_IA32_VMX_EXIT_CTLS,
1397         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1398         MSR_IA32_VMX_ENTRY_CTLS,
1399         MSR_IA32_VMX_MISC,
1400         MSR_IA32_VMX_CR0_FIXED0,
1401         MSR_IA32_VMX_CR0_FIXED1,
1402         MSR_IA32_VMX_CR4_FIXED0,
1403         MSR_IA32_VMX_CR4_FIXED1,
1404         MSR_IA32_VMX_VMCS_ENUM,
1405         MSR_IA32_VMX_PROCBASED_CTLS2,
1406         MSR_IA32_VMX_EPT_VPID_CAP,
1407         MSR_IA32_VMX_VMFUNC,
1408
1409         MSR_F10H_DECFG,
1410         MSR_IA32_UCODE_REV,
1411         MSR_IA32_ARCH_CAPABILITIES,
1412         MSR_IA32_PERF_CAPABILITIES,
1413 };
1414
1415 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
1416 static unsigned int num_msr_based_features;
1417
1418 static u64 kvm_get_arch_capabilities(void)
1419 {
1420         u64 data = 0;
1421
1422         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1423                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1424
1425         /*
1426          * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1427          * the nested hypervisor runs with NX huge pages.  If it is not,
1428          * L1 is anyway vulnerable to ITLB_MULTIHIT exploits from other
1429          * L1 guests, so it need not worry about its own (L2) guests.
1430          */
1431         data |= ARCH_CAP_PSCHANGE_MC_NO;
1432
1433         /*
1434          * If we're doing cache flushes (either "always" or "cond")
1435          * we will do one whenever the guest does a vmlaunch/vmresume.
1436          * If an outer hypervisor is doing the cache flush for us
1437          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1438          * capability to the guest too, and if EPT is disabled we're not
1439          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1440          * require a nested hypervisor to do a flush of its own.
1441          */
1442         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1443                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1444
1445         if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1446                 data |= ARCH_CAP_RDCL_NO;
1447         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1448                 data |= ARCH_CAP_SSB_NO;
1449         if (!boot_cpu_has_bug(X86_BUG_MDS))
1450                 data |= ARCH_CAP_MDS_NO;
1451
1452         if (!boot_cpu_has(X86_FEATURE_RTM)) {
1453                 /*
1454                  * If RTM=0 because the kernel has disabled TSX, the host might
1455                  * have TAA_NO or TSX_CTRL.  Clear TAA_NO (the guest sees RTM=0
1456                  * and therefore knows that there cannot be TAA) but keep
1457                  * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1458                  * and we want to allow migrating those guests to tsx=off hosts.
1459                  */
1460                 data &= ~ARCH_CAP_TAA_NO;
1461         } else if (!boot_cpu_has_bug(X86_BUG_TAA)) {
1462                 data |= ARCH_CAP_TAA_NO;
1463         } else {
1464                 /*
1465                  * Nothing to do here; we emulate TSX_CTRL if present on the
1466                  * host so the guest can choose between disabling TSX or
1467                  * using VERW to clear CPU buffers.
1468                  */
1469         }
1470
1471         return data;
1472 }
1473
1474 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1475 {
1476         switch (msr->index) {
1477         case MSR_IA32_ARCH_CAPABILITIES:
1478                 msr->data = kvm_get_arch_capabilities();
1479                 break;
1480         case MSR_IA32_UCODE_REV:
1481                 rdmsrl_safe(msr->index, &msr->data);
1482                 break;
1483         default:
1484                 return static_call(kvm_x86_get_msr_feature)(msr);
1485         }
1486         return 0;
1487 }
1488
1489 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1490 {
1491         struct kvm_msr_entry msr;
1492         int r;
1493
1494         msr.index = index;
1495         r = kvm_get_msr_feature(&msr);
1496
1497         if (r == KVM_MSR_RET_INVALID) {
1498                 /* Unconditionally clear the output for simplicity */
1499                 *data = 0;
1500                 if (kvm_msr_ignored_check(index, 0, false))
1501                         r = 0;
1502         }
1503
1504         if (r)
1505                 return r;
1506
1507         *data = msr.data;
1508
1509         return 0;
1510 }
1511
1512 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1513 {
1514         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1515                 return false;
1516
1517         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1518                 return false;
1519
1520         if (efer & (EFER_LME | EFER_LMA) &&
1521             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1522                 return false;
1523
1524         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1525                 return false;
1526
1527         return true;
1528
1529 }
1530 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1531 {
1532         if (efer & efer_reserved_bits)
1533                 return false;
1534
1535         return __kvm_valid_efer(vcpu, efer);
1536 }
1537 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1538
1539 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1540 {
1541         u64 old_efer = vcpu->arch.efer;
1542         u64 efer = msr_info->data;
1543         int r;
1544
1545         if (efer & efer_reserved_bits)
1546                 return 1;
1547
1548         if (!msr_info->host_initiated) {
1549                 if (!__kvm_valid_efer(vcpu, efer))
1550                         return 1;
1551
1552                 if (is_paging(vcpu) &&
1553                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1554                         return 1;
1555         }
1556
1557         efer &= ~EFER_LMA;
1558         efer |= vcpu->arch.efer & EFER_LMA;
1559
1560         r = static_call(kvm_x86_set_efer)(vcpu, efer);
1561         if (r) {
1562                 WARN_ON(r > 0);
1563                 return r;
1564         }
1565
1566         /* Update reserved bits */
1567         if ((efer ^ old_efer) & EFER_NX)
1568                 kvm_mmu_reset_context(vcpu);
1569
1570         return 0;
1571 }
1572
1573 void kvm_enable_efer_bits(u64 mask)
1574 {
1575        efer_reserved_bits &= ~mask;
1576 }
1577 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1578
1579 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type)
1580 {
1581         struct kvm_x86_msr_filter *msr_filter;
1582         struct msr_bitmap_range *ranges;
1583         struct kvm *kvm = vcpu->kvm;
1584         bool allowed;
1585         int idx;
1586         u32 i;
1587
1588         /* x2APIC MSRs do not support filtering. */
1589         if (index >= 0x800 && index <= 0x8ff)
1590                 return true;
1591
1592         idx = srcu_read_lock(&kvm->srcu);
1593
1594         msr_filter = srcu_dereference(kvm->arch.msr_filter, &kvm->srcu);
1595         if (!msr_filter) {
1596                 allowed = true;
1597                 goto out;
1598         }
1599
1600         allowed = msr_filter->default_allow;
1601         ranges = msr_filter->ranges;
1602
1603         for (i = 0; i < msr_filter->count; i++) {
1604                 u32 start = ranges[i].base;
1605                 u32 end = start + ranges[i].nmsrs;
1606                 u32 flags = ranges[i].flags;
1607                 unsigned long *bitmap = ranges[i].bitmap;
1608
1609                 if ((index >= start) && (index < end) && (flags & type)) {
1610                         allowed = !!test_bit(index - start, bitmap);
1611                         break;
1612                 }
1613         }
1614
1615 out:
1616         srcu_read_unlock(&kvm->srcu, idx);
1617
1618         return allowed;
1619 }
1620 EXPORT_SYMBOL_GPL(kvm_msr_allowed);
1621
1622 /*
1623  * Write @data into the MSR specified by @index.  Select MSR specific fault
1624  * checks are bypassed if @host_initiated is %true.
1625  * Returns 0 on success, non-0 otherwise.
1626  * Assumes vcpu_load() was already called.
1627  */
1628 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1629                          bool host_initiated)
1630 {
1631         struct msr_data msr;
1632
1633         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_WRITE))
1634                 return KVM_MSR_RET_FILTERED;
1635
1636         switch (index) {
1637         case MSR_FS_BASE:
1638         case MSR_GS_BASE:
1639         case MSR_KERNEL_GS_BASE:
1640         case MSR_CSTAR:
1641         case MSR_LSTAR:
1642                 if (is_noncanonical_address(data, vcpu))
1643                         return 1;
1644                 break;
1645         case MSR_IA32_SYSENTER_EIP:
1646         case MSR_IA32_SYSENTER_ESP:
1647                 /*
1648                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1649                  * non-canonical address is written on Intel but not on
1650                  * AMD (which ignores the top 32-bits, because it does
1651                  * not implement 64-bit SYSENTER).
1652                  *
1653                  * 64-bit code should hence be able to write a non-canonical
1654                  * value on AMD.  Making the address canonical ensures that
1655                  * vmentry does not fail on Intel after writing a non-canonical
1656                  * value, and that something deterministic happens if the guest
1657                  * invokes 64-bit SYSENTER.
1658                  */
1659                 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1660                 break;
1661         case MSR_TSC_AUX:
1662                 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1663                         return 1;
1664
1665                 if (!host_initiated &&
1666                     !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1667                     !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1668                         return 1;
1669
1670                 /*
1671                  * Per Intel's SDM, bits 63:32 are reserved, but AMD's APM has
1672                  * incomplete and conflicting architectural behavior.  Current
1673                  * AMD CPUs completely ignore bits 63:32, i.e. they aren't
1674                  * reserved and always read as zeros.  Enforce Intel's reserved
1675                  * bits check if and only if the guest CPU is Intel, and clear
1676                  * the bits in all other cases.  This ensures cross-vendor
1677                  * migration will provide consistent behavior for the guest.
1678                  */
1679                 if (guest_cpuid_is_intel(vcpu) && (data >> 32) != 0)
1680                         return 1;
1681
1682                 data = (u32)data;
1683                 break;
1684         }
1685
1686         msr.data = data;
1687         msr.index = index;
1688         msr.host_initiated = host_initiated;
1689
1690         return static_call(kvm_x86_set_msr)(vcpu, &msr);
1691 }
1692
1693 static int kvm_set_msr_ignored_check(struct kvm_vcpu *vcpu,
1694                                      u32 index, u64 data, bool host_initiated)
1695 {
1696         int ret = __kvm_set_msr(vcpu, index, data, host_initiated);
1697
1698         if (ret == KVM_MSR_RET_INVALID)
1699                 if (kvm_msr_ignored_check(index, data, true))
1700                         ret = 0;
1701
1702         return ret;
1703 }
1704
1705 /*
1706  * Read the MSR specified by @index into @data.  Select MSR specific fault
1707  * checks are bypassed if @host_initiated is %true.
1708  * Returns 0 on success, non-0 otherwise.
1709  * Assumes vcpu_load() was already called.
1710  */
1711 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1712                   bool host_initiated)
1713 {
1714         struct msr_data msr;
1715         int ret;
1716
1717         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_READ))
1718                 return KVM_MSR_RET_FILTERED;
1719
1720         switch (index) {
1721         case MSR_TSC_AUX:
1722                 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1723                         return 1;
1724
1725                 if (!host_initiated &&
1726                     !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1727                     !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1728                         return 1;
1729                 break;
1730         }
1731
1732         msr.index = index;
1733         msr.host_initiated = host_initiated;
1734
1735         ret = static_call(kvm_x86_get_msr)(vcpu, &msr);
1736         if (!ret)
1737                 *data = msr.data;
1738         return ret;
1739 }
1740
1741 static int kvm_get_msr_ignored_check(struct kvm_vcpu *vcpu,
1742                                      u32 index, u64 *data, bool host_initiated)
1743 {
1744         int ret = __kvm_get_msr(vcpu, index, data, host_initiated);
1745
1746         if (ret == KVM_MSR_RET_INVALID) {
1747                 /* Unconditionally clear *data for simplicity */
1748                 *data = 0;
1749                 if (kvm_msr_ignored_check(index, 0, false))
1750                         ret = 0;
1751         }
1752
1753         return ret;
1754 }
1755
1756 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1757 {
1758         return kvm_get_msr_ignored_check(vcpu, index, data, false);
1759 }
1760 EXPORT_SYMBOL_GPL(kvm_get_msr);
1761
1762 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1763 {
1764         return kvm_set_msr_ignored_check(vcpu, index, data, false);
1765 }
1766 EXPORT_SYMBOL_GPL(kvm_set_msr);
1767
1768 static int complete_emulated_rdmsr(struct kvm_vcpu *vcpu)
1769 {
1770         int err = vcpu->run->msr.error;
1771         if (!err) {
1772                 kvm_rax_write(vcpu, (u32)vcpu->run->msr.data);
1773                 kvm_rdx_write(vcpu, vcpu->run->msr.data >> 32);
1774         }
1775
1776         return static_call(kvm_x86_complete_emulated_msr)(vcpu, err);
1777 }
1778
1779 static int complete_emulated_wrmsr(struct kvm_vcpu *vcpu)
1780 {
1781         return static_call(kvm_x86_complete_emulated_msr)(vcpu, vcpu->run->msr.error);
1782 }
1783
1784 static u64 kvm_msr_reason(int r)
1785 {
1786         switch (r) {
1787         case KVM_MSR_RET_INVALID:
1788                 return KVM_MSR_EXIT_REASON_UNKNOWN;
1789         case KVM_MSR_RET_FILTERED:
1790                 return KVM_MSR_EXIT_REASON_FILTER;
1791         default:
1792                 return KVM_MSR_EXIT_REASON_INVAL;
1793         }
1794 }
1795
1796 static int kvm_msr_user_space(struct kvm_vcpu *vcpu, u32 index,
1797                               u32 exit_reason, u64 data,
1798                               int (*completion)(struct kvm_vcpu *vcpu),
1799                               int r)
1800 {
1801         u64 msr_reason = kvm_msr_reason(r);
1802
1803         /* Check if the user wanted to know about this MSR fault */
1804         if (!(vcpu->kvm->arch.user_space_msr_mask & msr_reason))
1805                 return 0;
1806
1807         vcpu->run->exit_reason = exit_reason;
1808         vcpu->run->msr.error = 0;
1809         memset(vcpu->run->msr.pad, 0, sizeof(vcpu->run->msr.pad));
1810         vcpu->run->msr.reason = msr_reason;
1811         vcpu->run->msr.index = index;
1812         vcpu->run->msr.data = data;
1813         vcpu->arch.complete_userspace_io = completion;
1814
1815         return 1;
1816 }
1817
1818 static int kvm_get_msr_user_space(struct kvm_vcpu *vcpu, u32 index, int r)
1819 {
1820         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_RDMSR, 0,
1821                                    complete_emulated_rdmsr, r);
1822 }
1823
1824 static int kvm_set_msr_user_space(struct kvm_vcpu *vcpu, u32 index, u64 data, int r)
1825 {
1826         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_WRMSR, data,
1827                                    complete_emulated_wrmsr, r);
1828 }
1829
1830 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1831 {
1832         u32 ecx = kvm_rcx_read(vcpu);
1833         u64 data;
1834         int r;
1835
1836         r = kvm_get_msr(vcpu, ecx, &data);
1837
1838         /* MSR read failed? See if we should ask user space */
1839         if (r && kvm_get_msr_user_space(vcpu, ecx, r)) {
1840                 /* Bounce to user space */
1841                 return 0;
1842         }
1843
1844         if (!r) {
1845                 trace_kvm_msr_read(ecx, data);
1846
1847                 kvm_rax_write(vcpu, data & -1u);
1848                 kvm_rdx_write(vcpu, (data >> 32) & -1u);
1849         } else {
1850                 trace_kvm_msr_read_ex(ecx);
1851         }
1852
1853         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1854 }
1855 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1856
1857 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1858 {
1859         u32 ecx = kvm_rcx_read(vcpu);
1860         u64 data = kvm_read_edx_eax(vcpu);
1861         int r;
1862
1863         r = kvm_set_msr(vcpu, ecx, data);
1864
1865         /* MSR write failed? See if we should ask user space */
1866         if (r && kvm_set_msr_user_space(vcpu, ecx, data, r))
1867                 /* Bounce to user space */
1868                 return 0;
1869
1870         /* Signal all other negative errors to userspace */
1871         if (r < 0)
1872                 return r;
1873
1874         if (!r)
1875                 trace_kvm_msr_write(ecx, data);
1876         else
1877                 trace_kvm_msr_write_ex(ecx, data);
1878
1879         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1880 }
1881 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1882
1883 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu)
1884 {
1885         return kvm_skip_emulated_instruction(vcpu);
1886 }
1887 EXPORT_SYMBOL_GPL(kvm_emulate_as_nop);
1888
1889 int kvm_emulate_invd(struct kvm_vcpu *vcpu)
1890 {
1891         /* Treat an INVD instruction as a NOP and just skip it. */
1892         return kvm_emulate_as_nop(vcpu);
1893 }
1894 EXPORT_SYMBOL_GPL(kvm_emulate_invd);
1895
1896 int kvm_emulate_mwait(struct kvm_vcpu *vcpu)
1897 {
1898         pr_warn_once("kvm: MWAIT instruction emulated as NOP!\n");
1899         return kvm_emulate_as_nop(vcpu);
1900 }
1901 EXPORT_SYMBOL_GPL(kvm_emulate_mwait);
1902
1903 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu)
1904 {
1905         kvm_queue_exception(vcpu, UD_VECTOR);
1906         return 1;
1907 }
1908 EXPORT_SYMBOL_GPL(kvm_handle_invalid_op);
1909
1910 int kvm_emulate_monitor(struct kvm_vcpu *vcpu)
1911 {
1912         pr_warn_once("kvm: MONITOR instruction emulated as NOP!\n");
1913         return kvm_emulate_as_nop(vcpu);
1914 }
1915 EXPORT_SYMBOL_GPL(kvm_emulate_monitor);
1916
1917 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu)
1918 {
1919         xfer_to_guest_mode_prepare();
1920         return vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu) ||
1921                 xfer_to_guest_mode_work_pending();
1922 }
1923
1924 /*
1925  * The fast path for frequent and performance sensitive wrmsr emulation,
1926  * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
1927  * the latency of virtual IPI by avoiding the expensive bits of transitioning
1928  * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
1929  * other cases which must be called after interrupts are enabled on the host.
1930  */
1931 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
1932 {
1933         if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic))
1934                 return 1;
1935
1936         if (((data & APIC_SHORT_MASK) == APIC_DEST_NOSHORT) &&
1937                 ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
1938                 ((data & APIC_MODE_MASK) == APIC_DM_FIXED) &&
1939                 ((u32)(data >> 32) != X2APIC_BROADCAST)) {
1940
1941                 data &= ~(1 << 12);
1942                 kvm_apic_send_ipi(vcpu->arch.apic, (u32)data, (u32)(data >> 32));
1943                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR2, (u32)(data >> 32));
1944                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR, (u32)data);
1945                 trace_kvm_apic_write(APIC_ICR, (u32)data);
1946                 return 0;
1947         }
1948
1949         return 1;
1950 }
1951
1952 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
1953 {
1954         if (!kvm_can_use_hv_timer(vcpu))
1955                 return 1;
1956
1957         kvm_set_lapic_tscdeadline_msr(vcpu, data);
1958         return 0;
1959 }
1960
1961 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
1962 {
1963         u32 msr = kvm_rcx_read(vcpu);
1964         u64 data;
1965         fastpath_t ret = EXIT_FASTPATH_NONE;
1966
1967         switch (msr) {
1968         case APIC_BASE_MSR + (APIC_ICR >> 4):
1969                 data = kvm_read_edx_eax(vcpu);
1970                 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu, data)) {
1971                         kvm_skip_emulated_instruction(vcpu);
1972                         ret = EXIT_FASTPATH_EXIT_HANDLED;
1973                 }
1974                 break;
1975         case MSR_IA32_TSC_DEADLINE:
1976                 data = kvm_read_edx_eax(vcpu);
1977                 if (!handle_fastpath_set_tscdeadline(vcpu, data)) {
1978                         kvm_skip_emulated_instruction(vcpu);
1979                         ret = EXIT_FASTPATH_REENTER_GUEST;
1980                 }
1981                 break;
1982         default:
1983                 break;
1984         }
1985
1986         if (ret != EXIT_FASTPATH_NONE)
1987                 trace_kvm_msr_write(msr, data);
1988
1989         return ret;
1990 }
1991 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
1992
1993 /*
1994  * Adapt set_msr() to msr_io()'s calling convention
1995  */
1996 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1997 {
1998         return kvm_get_msr_ignored_check(vcpu, index, data, true);
1999 }
2000
2001 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2002 {
2003         return kvm_set_msr_ignored_check(vcpu, index, *data, true);
2004 }
2005
2006 #ifdef CONFIG_X86_64
2007 struct pvclock_clock {
2008         int vclock_mode;
2009         u64 cycle_last;
2010         u64 mask;
2011         u32 mult;
2012         u32 shift;
2013         u64 base_cycles;
2014         u64 offset;
2015 };
2016
2017 struct pvclock_gtod_data {
2018         seqcount_t      seq;
2019
2020         struct pvclock_clock clock; /* extract of a clocksource struct */
2021         struct pvclock_clock raw_clock; /* extract of a clocksource struct */
2022
2023         ktime_t         offs_boot;
2024         u64             wall_time_sec;
2025 };
2026
2027 static struct pvclock_gtod_data pvclock_gtod_data;
2028
2029 static void update_pvclock_gtod(struct timekeeper *tk)
2030 {
2031         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
2032
2033         write_seqcount_begin(&vdata->seq);
2034
2035         /* copy pvclock gtod data */
2036         vdata->clock.vclock_mode        = tk->tkr_mono.clock->vdso_clock_mode;
2037         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
2038         vdata->clock.mask               = tk->tkr_mono.mask;
2039         vdata->clock.mult               = tk->tkr_mono.mult;
2040         vdata->clock.shift              = tk->tkr_mono.shift;
2041         vdata->clock.base_cycles        = tk->tkr_mono.xtime_nsec;
2042         vdata->clock.offset             = tk->tkr_mono.base;
2043
2044         vdata->raw_clock.vclock_mode    = tk->tkr_raw.clock->vdso_clock_mode;
2045         vdata->raw_clock.cycle_last     = tk->tkr_raw.cycle_last;
2046         vdata->raw_clock.mask           = tk->tkr_raw.mask;
2047         vdata->raw_clock.mult           = tk->tkr_raw.mult;
2048         vdata->raw_clock.shift          = tk->tkr_raw.shift;
2049         vdata->raw_clock.base_cycles    = tk->tkr_raw.xtime_nsec;
2050         vdata->raw_clock.offset         = tk->tkr_raw.base;
2051
2052         vdata->wall_time_sec            = tk->xtime_sec;
2053
2054         vdata->offs_boot                = tk->offs_boot;
2055
2056         write_seqcount_end(&vdata->seq);
2057 }
2058
2059 static s64 get_kvmclock_base_ns(void)
2060 {
2061         /* Count up from boot time, but with the frequency of the raw clock.  */
2062         return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot));
2063 }
2064 #else
2065 static s64 get_kvmclock_base_ns(void)
2066 {
2067         /* Master clock not used, so we can just use CLOCK_BOOTTIME.  */
2068         return ktime_get_boottime_ns();
2069 }
2070 #endif
2071
2072 void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock, int sec_hi_ofs)
2073 {
2074         int version;
2075         int r;
2076         struct pvclock_wall_clock wc;
2077         u32 wc_sec_hi;
2078         u64 wall_nsec;
2079
2080         if (!wall_clock)
2081                 return;
2082
2083         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
2084         if (r)
2085                 return;
2086
2087         if (version & 1)
2088                 ++version;  /* first time write, random junk */
2089
2090         ++version;
2091
2092         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
2093                 return;
2094
2095         /*
2096          * The guest calculates current wall clock time by adding
2097          * system time (updated by kvm_guest_time_update below) to the
2098          * wall clock specified here.  We do the reverse here.
2099          */
2100         wall_nsec = ktime_get_real_ns() - get_kvmclock_ns(kvm);
2101
2102         wc.nsec = do_div(wall_nsec, 1000000000);
2103         wc.sec = (u32)wall_nsec; /* overflow in 2106 guest time */
2104         wc.version = version;
2105
2106         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
2107
2108         if (sec_hi_ofs) {
2109                 wc_sec_hi = wall_nsec >> 32;
2110                 kvm_write_guest(kvm, wall_clock + sec_hi_ofs,
2111                                 &wc_sec_hi, sizeof(wc_sec_hi));
2112         }
2113
2114         version++;
2115         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
2116 }
2117
2118 static void kvm_write_system_time(struct kvm_vcpu *vcpu, gpa_t system_time,
2119                                   bool old_msr, bool host_initiated)
2120 {
2121         struct kvm_arch *ka = &vcpu->kvm->arch;
2122
2123         if (vcpu->vcpu_id == 0 && !host_initiated) {
2124                 if (ka->boot_vcpu_runs_old_kvmclock != old_msr)
2125                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2126
2127                 ka->boot_vcpu_runs_old_kvmclock = old_msr;
2128         }
2129
2130         vcpu->arch.time = system_time;
2131         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2132
2133         /* we verify if the enable bit is set... */
2134         vcpu->arch.pv_time_enabled = false;
2135         if (!(system_time & 1))
2136                 return;
2137
2138         if (!kvm_gfn_to_hva_cache_init(vcpu->kvm,
2139                                        &vcpu->arch.pv_time, system_time & ~1ULL,
2140                                        sizeof(struct pvclock_vcpu_time_info)))
2141                 vcpu->arch.pv_time_enabled = true;
2142
2143         return;
2144 }
2145
2146 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
2147 {
2148         do_shl32_div32(dividend, divisor);
2149         return dividend;
2150 }
2151
2152 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
2153                                s8 *pshift, u32 *pmultiplier)
2154 {
2155         uint64_t scaled64;
2156         int32_t  shift = 0;
2157         uint64_t tps64;
2158         uint32_t tps32;
2159
2160         tps64 = base_hz;
2161         scaled64 = scaled_hz;
2162         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
2163                 tps64 >>= 1;
2164                 shift--;
2165         }
2166
2167         tps32 = (uint32_t)tps64;
2168         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
2169                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
2170                         scaled64 >>= 1;
2171                 else
2172                         tps32 <<= 1;
2173                 shift++;
2174         }
2175
2176         *pshift = shift;
2177         *pmultiplier = div_frac(scaled64, tps32);
2178 }
2179
2180 #ifdef CONFIG_X86_64
2181 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
2182 #endif
2183
2184 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
2185 static unsigned long max_tsc_khz;
2186
2187 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
2188 {
2189         u64 v = (u64)khz * (1000000 + ppm);
2190         do_div(v, 1000000);
2191         return v;
2192 }
2193
2194 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier);
2195
2196 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
2197 {
2198         u64 ratio;
2199
2200         /* Guest TSC same frequency as host TSC? */
2201         if (!scale) {
2202                 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2203                 return 0;
2204         }
2205
2206         /* TSC scaling supported? */
2207         if (!kvm_has_tsc_control) {
2208                 if (user_tsc_khz > tsc_khz) {
2209                         vcpu->arch.tsc_catchup = 1;
2210                         vcpu->arch.tsc_always_catchup = 1;
2211                         return 0;
2212                 } else {
2213                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2214                         return -1;
2215                 }
2216         }
2217
2218         /* TSC scaling required  - calculate ratio */
2219         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
2220                                 user_tsc_khz, tsc_khz);
2221
2222         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
2223                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2224                                     user_tsc_khz);
2225                 return -1;
2226         }
2227
2228         kvm_vcpu_write_tsc_multiplier(vcpu, ratio);
2229         return 0;
2230 }
2231
2232 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
2233 {
2234         u32 thresh_lo, thresh_hi;
2235         int use_scaling = 0;
2236
2237         /* tsc_khz can be zero if TSC calibration fails */
2238         if (user_tsc_khz == 0) {
2239                 /* set tsc_scaling_ratio to a safe value */
2240                 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2241                 return -1;
2242         }
2243
2244         /* Compute a scale to convert nanoseconds in TSC cycles */
2245         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
2246                            &vcpu->arch.virtual_tsc_shift,
2247                            &vcpu->arch.virtual_tsc_mult);
2248         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
2249
2250         /*
2251          * Compute the variation in TSC rate which is acceptable
2252          * within the range of tolerance and decide if the
2253          * rate being applied is within that bounds of the hardware
2254          * rate.  If so, no scaling or compensation need be done.
2255          */
2256         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
2257         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
2258         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
2259                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
2260                 use_scaling = 1;
2261         }
2262         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
2263 }
2264
2265 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
2266 {
2267         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
2268                                       vcpu->arch.virtual_tsc_mult,
2269                                       vcpu->arch.virtual_tsc_shift);
2270         tsc += vcpu->arch.this_tsc_write;
2271         return tsc;
2272 }
2273
2274 static inline int gtod_is_based_on_tsc(int mode)
2275 {
2276         return mode == VDSO_CLOCKMODE_TSC || mode == VDSO_CLOCKMODE_HVCLOCK;
2277 }
2278
2279 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
2280 {
2281 #ifdef CONFIG_X86_64
2282         bool vcpus_matched;
2283         struct kvm_arch *ka = &vcpu->kvm->arch;
2284         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2285
2286         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2287                          atomic_read(&vcpu->kvm->online_vcpus));
2288
2289         /*
2290          * Once the masterclock is enabled, always perform request in
2291          * order to update it.
2292          *
2293          * In order to enable masterclock, the host clocksource must be TSC
2294          * and the vcpus need to have matched TSCs.  When that happens,
2295          * perform request to enable masterclock.
2296          */
2297         if (ka->use_master_clock ||
2298             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
2299                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2300
2301         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
2302                             atomic_read(&vcpu->kvm->online_vcpus),
2303                             ka->use_master_clock, gtod->clock.vclock_mode);
2304 #endif
2305 }
2306
2307 /*
2308  * Multiply tsc by a fixed point number represented by ratio.
2309  *
2310  * The most significant 64-N bits (mult) of ratio represent the
2311  * integral part of the fixed point number; the remaining N bits
2312  * (frac) represent the fractional part, ie. ratio represents a fixed
2313  * point number (mult + frac * 2^(-N)).
2314  *
2315  * N equals to kvm_tsc_scaling_ratio_frac_bits.
2316  */
2317 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
2318 {
2319         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
2320 }
2321
2322 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc, u64 ratio)
2323 {
2324         u64 _tsc = tsc;
2325
2326         if (ratio != kvm_default_tsc_scaling_ratio)
2327                 _tsc = __scale_tsc(ratio, tsc);
2328
2329         return _tsc;
2330 }
2331 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
2332
2333 static u64 kvm_compute_l1_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
2334 {
2335         u64 tsc;
2336
2337         tsc = kvm_scale_tsc(vcpu, rdtsc(), vcpu->arch.l1_tsc_scaling_ratio);
2338
2339         return target_tsc - tsc;
2340 }
2341
2342 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
2343 {
2344         return vcpu->arch.l1_tsc_offset +
2345                 kvm_scale_tsc(vcpu, host_tsc, vcpu->arch.l1_tsc_scaling_ratio);
2346 }
2347 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
2348
2349 u64 kvm_calc_nested_tsc_offset(u64 l1_offset, u64 l2_offset, u64 l2_multiplier)
2350 {
2351         u64 nested_offset;
2352
2353         if (l2_multiplier == kvm_default_tsc_scaling_ratio)
2354                 nested_offset = l1_offset;
2355         else
2356                 nested_offset = mul_s64_u64_shr((s64) l1_offset, l2_multiplier,
2357                                                 kvm_tsc_scaling_ratio_frac_bits);
2358
2359         nested_offset += l2_offset;
2360         return nested_offset;
2361 }
2362 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_offset);
2363
2364 u64 kvm_calc_nested_tsc_multiplier(u64 l1_multiplier, u64 l2_multiplier)
2365 {
2366         if (l2_multiplier != kvm_default_tsc_scaling_ratio)
2367                 return mul_u64_u64_shr(l1_multiplier, l2_multiplier,
2368                                        kvm_tsc_scaling_ratio_frac_bits);
2369
2370         return l1_multiplier;
2371 }
2372 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_multiplier);
2373
2374 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 l1_offset)
2375 {
2376         trace_kvm_write_tsc_offset(vcpu->vcpu_id,
2377                                    vcpu->arch.l1_tsc_offset,
2378                                    l1_offset);
2379
2380         vcpu->arch.l1_tsc_offset = l1_offset;
2381
2382         /*
2383          * If we are here because L1 chose not to trap WRMSR to TSC then
2384          * according to the spec this should set L1's TSC (as opposed to
2385          * setting L1's offset for L2).
2386          */
2387         if (is_guest_mode(vcpu))
2388                 vcpu->arch.tsc_offset = kvm_calc_nested_tsc_offset(
2389                         l1_offset,
2390                         static_call(kvm_x86_get_l2_tsc_offset)(vcpu),
2391                         static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2392         else
2393                 vcpu->arch.tsc_offset = l1_offset;
2394
2395         static_call(kvm_x86_write_tsc_offset)(vcpu, vcpu->arch.tsc_offset);
2396 }
2397
2398 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier)
2399 {
2400         vcpu->arch.l1_tsc_scaling_ratio = l1_multiplier;
2401
2402         /* Userspace is changing the multiplier while L2 is active */
2403         if (is_guest_mode(vcpu))
2404                 vcpu->arch.tsc_scaling_ratio = kvm_calc_nested_tsc_multiplier(
2405                         l1_multiplier,
2406                         static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2407         else
2408                 vcpu->arch.tsc_scaling_ratio = l1_multiplier;
2409
2410         if (kvm_has_tsc_control)
2411                 static_call(kvm_x86_write_tsc_multiplier)(
2412                         vcpu, vcpu->arch.tsc_scaling_ratio);
2413 }
2414
2415 static inline bool kvm_check_tsc_unstable(void)
2416 {
2417 #ifdef CONFIG_X86_64
2418         /*
2419          * TSC is marked unstable when we're running on Hyper-V,
2420          * 'TSC page' clocksource is good.
2421          */
2422         if (pvclock_gtod_data.clock.vclock_mode == VDSO_CLOCKMODE_HVCLOCK)
2423                 return false;
2424 #endif
2425         return check_tsc_unstable();
2426 }
2427
2428 static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 data)
2429 {
2430         struct kvm *kvm = vcpu->kvm;
2431         u64 offset, ns, elapsed;
2432         unsigned long flags;
2433         bool matched;
2434         bool already_matched;
2435         bool synchronizing = false;
2436
2437         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
2438         offset = kvm_compute_l1_tsc_offset(vcpu, data);
2439         ns = get_kvmclock_base_ns();
2440         elapsed = ns - kvm->arch.last_tsc_nsec;
2441
2442         if (vcpu->arch.virtual_tsc_khz) {
2443                 if (data == 0) {
2444                         /*
2445                          * detection of vcpu initialization -- need to sync
2446                          * with other vCPUs. This particularly helps to keep
2447                          * kvm_clock stable after CPU hotplug
2448                          */
2449                         synchronizing = true;
2450                 } else {
2451                         u64 tsc_exp = kvm->arch.last_tsc_write +
2452                                                 nsec_to_cycles(vcpu, elapsed);
2453                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
2454                         /*
2455                          * Special case: TSC write with a small delta (1 second)
2456                          * of virtual cycle time against real time is
2457                          * interpreted as an attempt to synchronize the CPU.
2458                          */
2459                         synchronizing = data < tsc_exp + tsc_hz &&
2460                                         data + tsc_hz > tsc_exp;
2461                 }
2462         }
2463
2464         /*
2465          * For a reliable TSC, we can match TSC offsets, and for an unstable
2466          * TSC, we add elapsed time in this computation.  We could let the
2467          * compensation code attempt to catch up if we fall behind, but
2468          * it's better to try to match offsets from the beginning.
2469          */
2470         if (synchronizing &&
2471             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
2472                 if (!kvm_check_tsc_unstable()) {
2473                         offset = kvm->arch.cur_tsc_offset;
2474                 } else {
2475                         u64 delta = nsec_to_cycles(vcpu, elapsed);
2476                         data += delta;
2477                         offset = kvm_compute_l1_tsc_offset(vcpu, data);
2478                 }
2479                 matched = true;
2480                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
2481         } else {
2482                 /*
2483                  * We split periods of matched TSC writes into generations.
2484                  * For each generation, we track the original measured
2485                  * nanosecond time, offset, and write, so if TSCs are in
2486                  * sync, we can match exact offset, and if not, we can match
2487                  * exact software computation in compute_guest_tsc()
2488                  *
2489                  * These values are tracked in kvm->arch.cur_xxx variables.
2490                  */
2491                 kvm->arch.cur_tsc_generation++;
2492                 kvm->arch.cur_tsc_nsec = ns;
2493                 kvm->arch.cur_tsc_write = data;
2494                 kvm->arch.cur_tsc_offset = offset;
2495                 matched = false;
2496         }
2497
2498         /*
2499          * We also track th most recent recorded KHZ, write and time to
2500          * allow the matching interval to be extended at each write.
2501          */
2502         kvm->arch.last_tsc_nsec = ns;
2503         kvm->arch.last_tsc_write = data;
2504         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2505
2506         vcpu->arch.last_guest_tsc = data;
2507
2508         /* Keep track of which generation this VCPU has synchronized to */
2509         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2510         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2511         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2512
2513         kvm_vcpu_write_tsc_offset(vcpu, offset);
2514         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2515
2516         spin_lock_irqsave(&kvm->arch.pvclock_gtod_sync_lock, flags);
2517         if (!matched) {
2518                 kvm->arch.nr_vcpus_matched_tsc = 0;
2519         } else if (!already_matched) {
2520                 kvm->arch.nr_vcpus_matched_tsc++;
2521         }
2522
2523         kvm_track_tsc_matching(vcpu);
2524         spin_unlock_irqrestore(&kvm->arch.pvclock_gtod_sync_lock, flags);
2525 }
2526
2527 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2528                                            s64 adjustment)
2529 {
2530         u64 tsc_offset = vcpu->arch.l1_tsc_offset;
2531         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2532 }
2533
2534 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2535 {
2536         if (vcpu->arch.l1_tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
2537                 WARN_ON(adjustment < 0);
2538         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment,
2539                                    vcpu->arch.l1_tsc_scaling_ratio);
2540         adjust_tsc_offset_guest(vcpu, adjustment);
2541 }
2542
2543 #ifdef CONFIG_X86_64
2544
2545 static u64 read_tsc(void)
2546 {
2547         u64 ret = (u64)rdtsc_ordered();
2548         u64 last = pvclock_gtod_data.clock.cycle_last;
2549
2550         if (likely(ret >= last))
2551                 return ret;
2552
2553         /*
2554          * GCC likes to generate cmov here, but this branch is extremely
2555          * predictable (it's just a function of time and the likely is
2556          * very likely) and there's a data dependence, so force GCC
2557          * to generate a branch instead.  I don't barrier() because
2558          * we don't actually need a barrier, and if this function
2559          * ever gets inlined it will generate worse code.
2560          */
2561         asm volatile ("");
2562         return last;
2563 }
2564
2565 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2566                           int *mode)
2567 {
2568         long v;
2569         u64 tsc_pg_val;
2570
2571         switch (clock->vclock_mode) {
2572         case VDSO_CLOCKMODE_HVCLOCK:
2573                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2574                                                   tsc_timestamp);
2575                 if (tsc_pg_val != U64_MAX) {
2576                         /* TSC page valid */
2577                         *mode = VDSO_CLOCKMODE_HVCLOCK;
2578                         v = (tsc_pg_val - clock->cycle_last) &
2579                                 clock->mask;
2580                 } else {
2581                         /* TSC page invalid */
2582                         *mode = VDSO_CLOCKMODE_NONE;
2583                 }
2584                 break;
2585         case VDSO_CLOCKMODE_TSC:
2586                 *mode = VDSO_CLOCKMODE_TSC;
2587                 *tsc_timestamp = read_tsc();
2588                 v = (*tsc_timestamp - clock->cycle_last) &
2589                         clock->mask;
2590                 break;
2591         default:
2592                 *mode = VDSO_CLOCKMODE_NONE;
2593         }
2594
2595         if (*mode == VDSO_CLOCKMODE_NONE)
2596                 *tsc_timestamp = v = 0;
2597
2598         return v * clock->mult;
2599 }
2600
2601 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2602 {
2603         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2604         unsigned long seq;
2605         int mode;
2606         u64 ns;
2607
2608         do {
2609                 seq = read_seqcount_begin(&gtod->seq);
2610                 ns = gtod->raw_clock.base_cycles;
2611                 ns += vgettsc(&gtod->raw_clock, tsc_timestamp, &mode);
2612                 ns >>= gtod->raw_clock.shift;
2613                 ns += ktime_to_ns(ktime_add(gtod->raw_clock.offset, gtod->offs_boot));
2614         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2615         *t = ns;
2616
2617         return mode;
2618 }
2619
2620 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2621 {
2622         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2623         unsigned long seq;
2624         int mode;
2625         u64 ns;
2626
2627         do {
2628                 seq = read_seqcount_begin(&gtod->seq);
2629                 ts->tv_sec = gtod->wall_time_sec;
2630                 ns = gtod->clock.base_cycles;
2631                 ns += vgettsc(&gtod->clock, tsc_timestamp, &mode);
2632                 ns >>= gtod->clock.shift;
2633         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2634
2635         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2636         ts->tv_nsec = ns;
2637
2638         return mode;
2639 }
2640
2641 /* returns true if host is using TSC based clocksource */
2642 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2643 {
2644         /* checked again under seqlock below */
2645         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2646                 return false;
2647
2648         return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2649                                                       tsc_timestamp));
2650 }
2651
2652 /* returns true if host is using TSC based clocksource */
2653 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2654                                            u64 *tsc_timestamp)
2655 {
2656         /* checked again under seqlock below */
2657         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2658                 return false;
2659
2660         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2661 }
2662 #endif
2663
2664 /*
2665  *
2666  * Assuming a stable TSC across physical CPUS, and a stable TSC
2667  * across virtual CPUs, the following condition is possible.
2668  * Each numbered line represents an event visible to both
2669  * CPUs at the next numbered event.
2670  *
2671  * "timespecX" represents host monotonic time. "tscX" represents
2672  * RDTSC value.
2673  *
2674  *              VCPU0 on CPU0           |       VCPU1 on CPU1
2675  *
2676  * 1.  read timespec0,tsc0
2677  * 2.                                   | timespec1 = timespec0 + N
2678  *                                      | tsc1 = tsc0 + M
2679  * 3. transition to guest               | transition to guest
2680  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2681  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2682  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2683  *
2684  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2685  *
2686  *      - ret0 < ret1
2687  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2688  *              ...
2689  *      - 0 < N - M => M < N
2690  *
2691  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2692  * always the case (the difference between two distinct xtime instances
2693  * might be smaller then the difference between corresponding TSC reads,
2694  * when updating guest vcpus pvclock areas).
2695  *
2696  * To avoid that problem, do not allow visibility of distinct
2697  * system_timestamp/tsc_timestamp values simultaneously: use a master
2698  * copy of host monotonic time values. Update that master copy
2699  * in lockstep.
2700  *
2701  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2702  *
2703  */
2704
2705 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2706 {
2707 #ifdef CONFIG_X86_64
2708         struct kvm_arch *ka = &kvm->arch;
2709         int vclock_mode;
2710         bool host_tsc_clocksource, vcpus_matched;
2711
2712         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2713                         atomic_read(&kvm->online_vcpus));
2714
2715         /*
2716          * If the host uses TSC clock, then passthrough TSC as stable
2717          * to the guest.
2718          */
2719         host_tsc_clocksource = kvm_get_time_and_clockread(
2720                                         &ka->master_kernel_ns,
2721                                         &ka->master_cycle_now);
2722
2723         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2724                                 && !ka->backwards_tsc_observed
2725                                 && !ka->boot_vcpu_runs_old_kvmclock;
2726
2727         if (ka->use_master_clock)
2728                 atomic_set(&kvm_guest_has_master_clock, 1);
2729
2730         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2731         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2732                                         vcpus_matched);
2733 #endif
2734 }
2735
2736 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2737 {
2738         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2739 }
2740
2741 static void kvm_gen_update_masterclock(struct kvm *kvm)
2742 {
2743 #ifdef CONFIG_X86_64
2744         int i;
2745         struct kvm_vcpu *vcpu;
2746         struct kvm_arch *ka = &kvm->arch;
2747         unsigned long flags;
2748
2749         kvm_hv_invalidate_tsc_page(kvm);
2750
2751         kvm_make_mclock_inprogress_request(kvm);
2752
2753         /* no guest entries from this point */
2754         spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2755         pvclock_update_vm_gtod_copy(kvm);
2756         spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2757
2758         kvm_for_each_vcpu(i, vcpu, kvm)
2759                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2760
2761         /* guest entries allowed */
2762         kvm_for_each_vcpu(i, vcpu, kvm)
2763                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2764 #endif
2765 }
2766
2767 u64 get_kvmclock_ns(struct kvm *kvm)
2768 {
2769         struct kvm_arch *ka = &kvm->arch;
2770         struct pvclock_vcpu_time_info hv_clock;
2771         unsigned long flags;
2772         u64 ret;
2773
2774         spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2775         if (!ka->use_master_clock) {
2776                 spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2777                 return get_kvmclock_base_ns() + ka->kvmclock_offset;
2778         }
2779
2780         hv_clock.tsc_timestamp = ka->master_cycle_now;
2781         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2782         spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2783
2784         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2785         get_cpu();
2786
2787         if (__this_cpu_read(cpu_tsc_khz)) {
2788                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2789                                    &hv_clock.tsc_shift,
2790                                    &hv_clock.tsc_to_system_mul);
2791                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2792         } else
2793                 ret = get_kvmclock_base_ns() + ka->kvmclock_offset;
2794
2795         put_cpu();
2796
2797         return ret;
2798 }
2799
2800 static void kvm_setup_pvclock_page(struct kvm_vcpu *v,
2801                                    struct gfn_to_hva_cache *cache,
2802                                    unsigned int offset)
2803 {
2804         struct kvm_vcpu_arch *vcpu = &v->arch;
2805         struct pvclock_vcpu_time_info guest_hv_clock;
2806
2807         if (unlikely(kvm_read_guest_offset_cached(v->kvm, cache,
2808                 &guest_hv_clock, offset, sizeof(guest_hv_clock))))
2809                 return;
2810
2811         /* This VCPU is paused, but it's legal for a guest to read another
2812          * VCPU's kvmclock, so we really have to follow the specification where
2813          * it says that version is odd if data is being modified, and even after
2814          * it is consistent.
2815          *
2816          * Version field updates must be kept separate.  This is because
2817          * kvm_write_guest_cached might use a "rep movs" instruction, and
2818          * writes within a string instruction are weakly ordered.  So there
2819          * are three writes overall.
2820          *
2821          * As a small optimization, only write the version field in the first
2822          * and third write.  The vcpu->pv_time cache is still valid, because the
2823          * version field is the first in the struct.
2824          */
2825         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2826
2827         if (guest_hv_clock.version & 1)
2828                 ++guest_hv_clock.version;  /* first time write, random junk */
2829
2830         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2831         kvm_write_guest_offset_cached(v->kvm, cache,
2832                                       &vcpu->hv_clock, offset,
2833                                       sizeof(vcpu->hv_clock.version));
2834
2835         smp_wmb();
2836
2837         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2838         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2839
2840         if (vcpu->pvclock_set_guest_stopped_request) {
2841                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2842                 vcpu->pvclock_set_guest_stopped_request = false;
2843         }
2844
2845         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2846
2847         kvm_write_guest_offset_cached(v->kvm, cache,
2848                                       &vcpu->hv_clock, offset,
2849                                       sizeof(vcpu->hv_clock));
2850
2851         smp_wmb();
2852
2853         vcpu->hv_clock.version++;
2854         kvm_write_guest_offset_cached(v->kvm, cache,
2855                                      &vcpu->hv_clock, offset,
2856                                      sizeof(vcpu->hv_clock.version));
2857 }
2858
2859 static int kvm_guest_time_update(struct kvm_vcpu *v)
2860 {
2861         unsigned long flags, tgt_tsc_khz;
2862         struct kvm_vcpu_arch *vcpu = &v->arch;
2863         struct kvm_arch *ka = &v->kvm->arch;
2864         s64 kernel_ns;
2865         u64 tsc_timestamp, host_tsc;
2866         u8 pvclock_flags;
2867         bool use_master_clock;
2868
2869         kernel_ns = 0;
2870         host_tsc = 0;
2871
2872         /*
2873          * If the host uses TSC clock, then passthrough TSC as stable
2874          * to the guest.
2875          */
2876         spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2877         use_master_clock = ka->use_master_clock;
2878         if (use_master_clock) {
2879                 host_tsc = ka->master_cycle_now;
2880                 kernel_ns = ka->master_kernel_ns;
2881         }
2882         spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2883
2884         /* Keep irq disabled to prevent changes to the clock */
2885         local_irq_save(flags);
2886         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2887         if (unlikely(tgt_tsc_khz == 0)) {
2888                 local_irq_restore(flags);
2889                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2890                 return 1;
2891         }
2892         if (!use_master_clock) {
2893                 host_tsc = rdtsc();
2894                 kernel_ns = get_kvmclock_base_ns();
2895         }
2896
2897         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2898
2899         /*
2900          * We may have to catch up the TSC to match elapsed wall clock
2901          * time for two reasons, even if kvmclock is used.
2902          *   1) CPU could have been running below the maximum TSC rate
2903          *   2) Broken TSC compensation resets the base at each VCPU
2904          *      entry to avoid unknown leaps of TSC even when running
2905          *      again on the same CPU.  This may cause apparent elapsed
2906          *      time to disappear, and the guest to stand still or run
2907          *      very slowly.
2908          */
2909         if (vcpu->tsc_catchup) {
2910                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2911                 if (tsc > tsc_timestamp) {
2912                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2913                         tsc_timestamp = tsc;
2914                 }
2915         }
2916
2917         local_irq_restore(flags);
2918
2919         /* With all the info we got, fill in the values */
2920
2921         if (kvm_has_tsc_control)
2922                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz,
2923                                             v->arch.l1_tsc_scaling_ratio);
2924
2925         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2926                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2927                                    &vcpu->hv_clock.tsc_shift,
2928                                    &vcpu->hv_clock.tsc_to_system_mul);
2929                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2930         }
2931
2932         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2933         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2934         vcpu->last_guest_tsc = tsc_timestamp;
2935
2936         /* If the host uses TSC clocksource, then it is stable */
2937         pvclock_flags = 0;
2938         if (use_master_clock)
2939                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2940
2941         vcpu->hv_clock.flags = pvclock_flags;
2942
2943         if (vcpu->pv_time_enabled)
2944                 kvm_setup_pvclock_page(v, &vcpu->pv_time, 0);
2945         if (vcpu->xen.vcpu_info_set)
2946                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_info_cache,
2947                                        offsetof(struct compat_vcpu_info, time));
2948         if (vcpu->xen.vcpu_time_info_set)
2949                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_time_info_cache, 0);
2950         if (v == kvm_get_vcpu(v->kvm, 0))
2951                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2952         return 0;
2953 }
2954
2955 /*
2956  * kvmclock updates which are isolated to a given vcpu, such as
2957  * vcpu->cpu migration, should not allow system_timestamp from
2958  * the rest of the vcpus to remain static. Otherwise ntp frequency
2959  * correction applies to one vcpu's system_timestamp but not
2960  * the others.
2961  *
2962  * So in those cases, request a kvmclock update for all vcpus.
2963  * We need to rate-limit these requests though, as they can
2964  * considerably slow guests that have a large number of vcpus.
2965  * The time for a remote vcpu to update its kvmclock is bound
2966  * by the delay we use to rate-limit the updates.
2967  */
2968
2969 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2970
2971 static void kvmclock_update_fn(struct work_struct *work)
2972 {
2973         int i;
2974         struct delayed_work *dwork = to_delayed_work(work);
2975         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2976                                            kvmclock_update_work);
2977         struct kvm *kvm = container_of(ka, struct kvm, arch);
2978         struct kvm_vcpu *vcpu;
2979
2980         kvm_for_each_vcpu(i, vcpu, kvm) {
2981                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2982                 kvm_vcpu_kick(vcpu);
2983         }
2984 }
2985
2986 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2987 {
2988         struct kvm *kvm = v->kvm;
2989
2990         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2991         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2992                                         KVMCLOCK_UPDATE_DELAY);
2993 }
2994
2995 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2996
2997 static void kvmclock_sync_fn(struct work_struct *work)
2998 {
2999         struct delayed_work *dwork = to_delayed_work(work);
3000         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
3001                                            kvmclock_sync_work);
3002         struct kvm *kvm = container_of(ka, struct kvm, arch);
3003
3004         if (!kvmclock_periodic_sync)
3005                 return;
3006
3007         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
3008         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
3009                                         KVMCLOCK_SYNC_PERIOD);
3010 }
3011
3012 /*
3013  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
3014  */
3015 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
3016 {
3017         /* McStatusWrEn enabled? */
3018         if (guest_cpuid_is_amd_or_hygon(vcpu))
3019                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
3020
3021         return false;
3022 }
3023
3024 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3025 {
3026         u64 mcg_cap = vcpu->arch.mcg_cap;
3027         unsigned bank_num = mcg_cap & 0xff;
3028         u32 msr = msr_info->index;
3029         u64 data = msr_info->data;
3030
3031         switch (msr) {
3032         case MSR_IA32_MCG_STATUS:
3033                 vcpu->arch.mcg_status = data;
3034                 break;
3035         case MSR_IA32_MCG_CTL:
3036                 if (!(mcg_cap & MCG_CTL_P) &&
3037                     (data || !msr_info->host_initiated))
3038                         return 1;
3039                 if (data != 0 && data != ~(u64)0)
3040                         return 1;
3041                 vcpu->arch.mcg_ctl = data;
3042                 break;
3043         default:
3044                 if (msr >= MSR_IA32_MC0_CTL &&
3045                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3046                         u32 offset = array_index_nospec(
3047                                 msr - MSR_IA32_MC0_CTL,
3048                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3049
3050                         /* only 0 or all 1s can be written to IA32_MCi_CTL
3051                          * some Linux kernels though clear bit 10 in bank 4 to
3052                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
3053                          * this to avoid an uncatched #GP in the guest
3054                          */
3055                         if ((offset & 0x3) == 0 &&
3056                             data != 0 && (data | (1 << 10)) != ~(u64)0)
3057                                 return -1;
3058
3059                         /* MCi_STATUS */
3060                         if (!msr_info->host_initiated &&
3061                             (offset & 0x3) == 1 && data != 0) {
3062                                 if (!can_set_mci_status(vcpu))
3063                                         return -1;
3064                         }
3065
3066                         vcpu->arch.mce_banks[offset] = data;
3067                         break;
3068                 }
3069                 return 1;
3070         }
3071         return 0;
3072 }
3073
3074 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu)
3075 {
3076         u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT;
3077
3078         return (vcpu->arch.apf.msr_en_val & mask) == mask;
3079 }
3080
3081 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
3082 {
3083         gpa_t gpa = data & ~0x3f;
3084
3085         /* Bits 4:5 are reserved, Should be zero */
3086         if (data & 0x30)
3087                 return 1;
3088
3089         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_VMEXIT) &&
3090             (data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT))
3091                 return 1;
3092
3093         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT) &&
3094             (data & KVM_ASYNC_PF_DELIVERY_AS_INT))
3095                 return 1;
3096
3097         if (!lapic_in_kernel(vcpu))
3098                 return data ? 1 : 0;
3099
3100         vcpu->arch.apf.msr_en_val = data;
3101
3102         if (!kvm_pv_async_pf_enabled(vcpu)) {
3103                 kvm_clear_async_pf_completion_queue(vcpu);
3104                 kvm_async_pf_hash_reset(vcpu);
3105                 return 0;
3106         }
3107
3108         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
3109                                         sizeof(u64)))
3110                 return 1;
3111
3112         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
3113         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
3114
3115         kvm_async_pf_wakeup_all(vcpu);
3116
3117         return 0;
3118 }
3119
3120 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu *vcpu, u64 data)
3121 {
3122         /* Bits 8-63 are reserved */
3123         if (data >> 8)
3124                 return 1;
3125
3126         if (!lapic_in_kernel(vcpu))
3127                 return 1;
3128
3129         vcpu->arch.apf.msr_int_val = data;
3130
3131         vcpu->arch.apf.vec = data & KVM_ASYNC_PF_VEC_MASK;
3132
3133         return 0;
3134 }
3135
3136 static void kvmclock_reset(struct kvm_vcpu *vcpu)
3137 {
3138         vcpu->arch.pv_time_enabled = false;
3139         vcpu->arch.time = 0;
3140 }
3141
3142 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu *vcpu)
3143 {
3144         ++vcpu->stat.tlb_flush;
3145         static_call(kvm_x86_tlb_flush_all)(vcpu);
3146 }
3147
3148 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu)
3149 {
3150         ++vcpu->stat.tlb_flush;
3151
3152         if (!tdp_enabled) {
3153                /*
3154                  * A TLB flush on behalf of the guest is equivalent to
3155                  * INVPCID(all), toggling CR4.PGE, etc., which requires
3156                  * a forced sync of the shadow page tables.  Unload the
3157                  * entire MMU here and the subsequent load will sync the
3158                  * shadow page tables, and also flush the TLB.
3159                  */
3160                 kvm_mmu_unload(vcpu);
3161                 return;
3162         }
3163
3164         static_call(kvm_x86_tlb_flush_guest)(vcpu);
3165 }
3166
3167 static void record_steal_time(struct kvm_vcpu *vcpu)
3168 {
3169         struct kvm_host_map map;
3170         struct kvm_steal_time *st;
3171
3172         if (kvm_xen_msr_enabled(vcpu->kvm)) {
3173                 kvm_xen_runstate_set_running(vcpu);
3174                 return;
3175         }
3176
3177         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3178                 return;
3179
3180         /* -EAGAIN is returned in atomic context so we can just return. */
3181         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT,
3182                         &map, &vcpu->arch.st.cache, false))
3183                 return;
3184
3185         st = map.hva +
3186                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
3187
3188         /*
3189          * Doing a TLB flush here, on the guest's behalf, can avoid
3190          * expensive IPIs.
3191          */
3192         if (guest_pv_has(vcpu, KVM_FEATURE_PV_TLB_FLUSH)) {
3193                 u8 st_preempted = xchg(&st->preempted, 0);
3194
3195                 trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
3196                                        st_preempted & KVM_VCPU_FLUSH_TLB);
3197                 if (st_preempted & KVM_VCPU_FLUSH_TLB)
3198                         kvm_vcpu_flush_tlb_guest(vcpu);
3199         } else {
3200                 st->preempted = 0;
3201         }
3202
3203         vcpu->arch.st.preempted = 0;
3204
3205         if (st->version & 1)
3206                 st->version += 1;  /* first time write, random junk */
3207
3208         st->version += 1;
3209
3210         smp_wmb();
3211
3212         st->steal += current->sched_info.run_delay -
3213                 vcpu->arch.st.last_steal;
3214         vcpu->arch.st.last_steal = current->sched_info.run_delay;
3215
3216         smp_wmb();
3217
3218         st->version += 1;
3219
3220         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, false);
3221 }
3222
3223 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3224 {
3225         bool pr = false;
3226         u32 msr = msr_info->index;
3227         u64 data = msr_info->data;
3228
3229         if (msr && msr == vcpu->kvm->arch.xen_hvm_config.msr)
3230                 return kvm_xen_write_hypercall_page(vcpu, data);
3231
3232         switch (msr) {
3233         case MSR_AMD64_NB_CFG:
3234         case MSR_IA32_UCODE_WRITE:
3235         case MSR_VM_HSAVE_PA:
3236         case MSR_AMD64_PATCH_LOADER:
3237         case MSR_AMD64_BU_CFG2:
3238         case MSR_AMD64_DC_CFG:
3239         case MSR_F15H_EX_CFG:
3240                 break;
3241
3242         case MSR_IA32_UCODE_REV:
3243                 if (msr_info->host_initiated)
3244                         vcpu->arch.microcode_version = data;
3245                 break;
3246         case MSR_IA32_ARCH_CAPABILITIES:
3247                 if (!msr_info->host_initiated)
3248                         return 1;
3249                 vcpu->arch.arch_capabilities = data;
3250                 break;
3251         case MSR_IA32_PERF_CAPABILITIES: {
3252                 struct kvm_msr_entry msr_ent = {.index = msr, .data = 0};
3253
3254                 if (!msr_info->host_initiated)
3255                         return 1;
3256                 if (guest_cpuid_has(vcpu, X86_FEATURE_PDCM) && kvm_get_msr_feature(&msr_ent))
3257                         return 1;
3258                 if (data & ~msr_ent.data)
3259                         return 1;
3260
3261                 vcpu->arch.perf_capabilities = data;
3262
3263                 return 0;
3264                 }
3265         case MSR_EFER:
3266                 return set_efer(vcpu, msr_info);
3267         case MSR_K7_HWCR:
3268                 data &= ~(u64)0x40;     /* ignore flush filter disable */
3269                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
3270                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
3271
3272                 /* Handle McStatusWrEn */
3273                 if (data == BIT_ULL(18)) {
3274                         vcpu->arch.msr_hwcr = data;
3275                 } else if (data != 0) {
3276                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
3277                                     data);
3278                         return 1;
3279                 }
3280                 break;
3281         case MSR_FAM10H_MMIO_CONF_BASE:
3282                 if (data != 0) {
3283                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
3284                                     "0x%llx\n", data);
3285                         return 1;
3286                 }
3287                 break;
3288         case 0x200 ... 0x2ff:
3289                 return kvm_mtrr_set_msr(vcpu, msr, data);
3290         case MSR_IA32_APICBASE:
3291                 return kvm_set_apic_base(vcpu, msr_info);
3292         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3293                 return kvm_x2apic_msr_write(vcpu, msr, data);
3294         case MSR_IA32_TSC_DEADLINE:
3295                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
3296                 break;
3297         case MSR_IA32_TSC_ADJUST:
3298                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
3299                         if (!msr_info->host_initiated) {
3300                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
3301                                 adjust_tsc_offset_guest(vcpu, adj);
3302                         }
3303                         vcpu->arch.ia32_tsc_adjust_msr = data;
3304                 }
3305                 break;
3306         case MSR_IA32_MISC_ENABLE:
3307                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
3308                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
3309                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
3310                                 return 1;
3311                         vcpu->arch.ia32_misc_enable_msr = data;
3312                         kvm_update_cpuid_runtime(vcpu);
3313                 } else {
3314                         vcpu->arch.ia32_misc_enable_msr = data;
3315                 }
3316                 break;
3317         case MSR_IA32_SMBASE:
3318                 if (!msr_info->host_initiated)
3319                         return 1;
3320                 vcpu->arch.smbase = data;
3321                 break;
3322         case MSR_IA32_POWER_CTL:
3323                 vcpu->arch.msr_ia32_power_ctl = data;
3324                 break;
3325         case MSR_IA32_TSC:
3326                 if (msr_info->host_initiated) {
3327                         kvm_synchronize_tsc(vcpu, data);
3328                 } else {
3329                         u64 adj = kvm_compute_l1_tsc_offset(vcpu, data) - vcpu->arch.l1_tsc_offset;
3330                         adjust_tsc_offset_guest(vcpu, adj);
3331                         vcpu->arch.ia32_tsc_adjust_msr += adj;
3332                 }
3333                 break;
3334         case MSR_IA32_XSS:
3335                 if (!msr_info->host_initiated &&
3336                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3337                         return 1;
3338                 /*
3339                  * KVM supports exposing PT to the guest, but does not support
3340                  * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3341                  * XSAVES/XRSTORS to save/restore PT MSRs.
3342                  */
3343                 if (data & ~supported_xss)
3344                         return 1;
3345                 vcpu->arch.ia32_xss = data;
3346                 break;
3347         case MSR_SMI_COUNT:
3348                 if (!msr_info->host_initiated)
3349                         return 1;
3350                 vcpu->arch.smi_count = data;
3351                 break;
3352         case MSR_KVM_WALL_CLOCK_NEW:
3353                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3354                         return 1;
3355
3356                 vcpu->kvm->arch.wall_clock = data;
3357                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3358                 break;
3359         case MSR_KVM_WALL_CLOCK:
3360                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3361                         return 1;
3362
3363                 vcpu->kvm->arch.wall_clock = data;
3364                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3365                 break;
3366         case MSR_KVM_SYSTEM_TIME_NEW:
3367                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3368                         return 1;
3369
3370                 kvm_write_system_time(vcpu, data, false, msr_info->host_initiated);
3371                 break;
3372         case MSR_KVM_SYSTEM_TIME:
3373                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3374                         return 1;
3375
3376                 kvm_write_system_time(vcpu, data, true,  msr_info->host_initiated);
3377                 break;
3378         case MSR_KVM_ASYNC_PF_EN:
3379                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3380                         return 1;
3381
3382                 if (kvm_pv_enable_async_pf(vcpu, data))
3383                         return 1;
3384                 break;
3385         case MSR_KVM_ASYNC_PF_INT:
3386                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3387                         return 1;
3388
3389                 if (kvm_pv_enable_async_pf_int(vcpu, data))
3390                         return 1;
3391                 break;
3392         case MSR_KVM_ASYNC_PF_ACK:
3393                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3394                         return 1;
3395                 if (data & 0x1) {
3396                         vcpu->arch.apf.pageready_pending = false;
3397                         kvm_check_async_pf_completion(vcpu);
3398                 }
3399                 break;
3400         case MSR_KVM_STEAL_TIME:
3401                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3402                         return 1;
3403
3404                 if (unlikely(!sched_info_on()))
3405                         return 1;
3406
3407                 if (data & KVM_STEAL_RESERVED_MASK)
3408                         return 1;
3409
3410                 vcpu->arch.st.msr_val = data;
3411
3412                 if (!(data & KVM_MSR_ENABLED))
3413                         break;
3414
3415                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3416
3417                 break;
3418         case MSR_KVM_PV_EOI_EN:
3419                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3420                         return 1;
3421
3422                 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
3423                         return 1;
3424                 break;
3425
3426         case MSR_KVM_POLL_CONTROL:
3427                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3428                         return 1;
3429
3430                 /* only enable bit supported */
3431                 if (data & (-1ULL << 1))
3432                         return 1;
3433
3434                 vcpu->arch.msr_kvm_poll_control = data;
3435                 break;
3436
3437         case MSR_IA32_MCG_CTL:
3438         case MSR_IA32_MCG_STATUS:
3439         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3440                 return set_msr_mce(vcpu, msr_info);
3441
3442         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3443         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3444                 pr = true;
3445                 fallthrough;
3446         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3447         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3448                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3449                         return kvm_pmu_set_msr(vcpu, msr_info);
3450
3451                 if (pr || data != 0)
3452                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
3453                                     "0x%x data 0x%llx\n", msr, data);
3454                 break;
3455         case MSR_K7_CLK_CTL:
3456                 /*
3457                  * Ignore all writes to this no longer documented MSR.
3458                  * Writes are only relevant for old K7 processors,
3459                  * all pre-dating SVM, but a recommended workaround from
3460                  * AMD for these chips. It is possible to specify the
3461                  * affected processor models on the command line, hence
3462                  * the need to ignore the workaround.
3463                  */
3464                 break;
3465         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3466         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3467         case HV_X64_MSR_SYNDBG_OPTIONS:
3468         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3469         case HV_X64_MSR_CRASH_CTL:
3470         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3471         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3472         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3473         case HV_X64_MSR_TSC_EMULATION_STATUS:
3474                 return kvm_hv_set_msr_common(vcpu, msr, data,
3475                                              msr_info->host_initiated);
3476         case MSR_IA32_BBL_CR_CTL3:
3477                 /* Drop writes to this legacy MSR -- see rdmsr
3478                  * counterpart for further detail.
3479                  */
3480                 if (report_ignored_msrs)
3481                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
3482                                 msr, data);
3483                 break;
3484         case MSR_AMD64_OSVW_ID_LENGTH:
3485                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3486                         return 1;
3487                 vcpu->arch.osvw.length = data;
3488                 break;
3489         case MSR_AMD64_OSVW_STATUS:
3490                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3491                         return 1;
3492                 vcpu->arch.osvw.status = data;
3493                 break;
3494         case MSR_PLATFORM_INFO:
3495                 if (!msr_info->host_initiated ||
3496                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
3497                      cpuid_fault_enabled(vcpu)))
3498                         return 1;
3499                 vcpu->arch.msr_platform_info = data;
3500                 break;
3501         case MSR_MISC_FEATURES_ENABLES:
3502                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
3503                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
3504                      !supports_cpuid_fault(vcpu)))
3505                         return 1;
3506                 vcpu->arch.msr_misc_features_enables = data;
3507                 break;
3508         default:
3509                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3510                         return kvm_pmu_set_msr(vcpu, msr_info);
3511                 return KVM_MSR_RET_INVALID;
3512         }
3513         return 0;
3514 }
3515 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
3516
3517 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
3518 {
3519         u64 data;
3520         u64 mcg_cap = vcpu->arch.mcg_cap;
3521         unsigned bank_num = mcg_cap & 0xff;
3522
3523         switch (msr) {
3524         case MSR_IA32_P5_MC_ADDR:
3525         case MSR_IA32_P5_MC_TYPE:
3526                 data = 0;
3527                 break;
3528         case MSR_IA32_MCG_CAP:
3529                 data = vcpu->arch.mcg_cap;
3530                 break;
3531         case MSR_IA32_MCG_CTL:
3532                 if (!(mcg_cap & MCG_CTL_P) && !host)
3533                         return 1;
3534                 data = vcpu->arch.mcg_ctl;
3535                 break;
3536         case MSR_IA32_MCG_STATUS:
3537                 data = vcpu->arch.mcg_status;
3538                 break;
3539         default:
3540                 if (msr >= MSR_IA32_MC0_CTL &&
3541                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3542                         u32 offset = array_index_nospec(
3543                                 msr - MSR_IA32_MC0_CTL,
3544                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3545
3546                         data = vcpu->arch.mce_banks[offset];
3547                         break;
3548                 }
3549                 return 1;
3550         }
3551         *pdata = data;
3552         return 0;
3553 }
3554
3555 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3556 {
3557         switch (msr_info->index) {
3558         case MSR_IA32_PLATFORM_ID:
3559         case MSR_IA32_EBL_CR_POWERON:
3560         case MSR_IA32_LASTBRANCHFROMIP:
3561         case MSR_IA32_LASTBRANCHTOIP:
3562         case MSR_IA32_LASTINTFROMIP:
3563         case MSR_IA32_LASTINTTOIP:
3564         case MSR_K8_SYSCFG:
3565         case MSR_K8_TSEG_ADDR:
3566         case MSR_K8_TSEG_MASK:
3567         case MSR_VM_HSAVE_PA:
3568         case MSR_K8_INT_PENDING_MSG:
3569         case MSR_AMD64_NB_CFG:
3570         case MSR_FAM10H_MMIO_CONF_BASE:
3571         case MSR_AMD64_BU_CFG2:
3572         case MSR_IA32_PERF_CTL:
3573         case MSR_AMD64_DC_CFG:
3574         case MSR_F15H_EX_CFG:
3575         /*
3576          * Intel Sandy Bridge CPUs must support the RAPL (running average power
3577          * limit) MSRs. Just return 0, as we do not want to expose the host
3578          * data here. Do not conditionalize this on CPUID, as KVM does not do
3579          * so for existing CPU-specific MSRs.
3580          */
3581         case MSR_RAPL_POWER_UNIT:
3582         case MSR_PP0_ENERGY_STATUS:     /* Power plane 0 (core) */
3583         case MSR_PP1_ENERGY_STATUS:     /* Power plane 1 (graphics uncore) */
3584         case MSR_PKG_ENERGY_STATUS:     /* Total package */
3585         case MSR_DRAM_ENERGY_STATUS:    /* DRAM controller */
3586                 msr_info->data = 0;
3587                 break;
3588         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3589                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3590                         return kvm_pmu_get_msr(vcpu, msr_info);
3591                 if (!msr_info->host_initiated)
3592                         return 1;
3593                 msr_info->data = 0;
3594                 break;
3595         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3596         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3597         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3598         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3599                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3600                         return kvm_pmu_get_msr(vcpu, msr_info);
3601                 msr_info->data = 0;
3602                 break;
3603         case MSR_IA32_UCODE_REV:
3604                 msr_info->data = vcpu->arch.microcode_version;
3605                 break;
3606         case MSR_IA32_ARCH_CAPABILITIES:
3607                 if (!msr_info->host_initiated &&
3608                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
3609                         return 1;
3610                 msr_info->data = vcpu->arch.arch_capabilities;
3611                 break;
3612         case MSR_IA32_PERF_CAPABILITIES:
3613                 if (!msr_info->host_initiated &&
3614                     !guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
3615                         return 1;
3616                 msr_info->data = vcpu->arch.perf_capabilities;
3617                 break;
3618         case MSR_IA32_POWER_CTL:
3619                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
3620                 break;
3621         case MSR_IA32_TSC: {
3622                 /*
3623                  * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3624                  * even when not intercepted. AMD manual doesn't explicitly
3625                  * state this but appears to behave the same.
3626                  *
3627                  * On userspace reads and writes, however, we unconditionally
3628                  * return L1's TSC value to ensure backwards-compatible
3629                  * behavior for migration.
3630                  */
3631                 u64 offset, ratio;
3632
3633                 if (msr_info->host_initiated) {
3634                         offset = vcpu->arch.l1_tsc_offset;
3635                         ratio = vcpu->arch.l1_tsc_scaling_ratio;
3636                 } else {
3637                         offset = vcpu->arch.tsc_offset;
3638                         ratio = vcpu->arch.tsc_scaling_ratio;
3639                 }
3640
3641                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc(), ratio) + offset;
3642                 break;
3643         }
3644         case MSR_MTRRcap:
3645         case 0x200 ... 0x2ff:
3646                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
3647         case 0xcd: /* fsb frequency */
3648                 msr_info->data = 3;
3649                 break;
3650                 /*
3651                  * MSR_EBC_FREQUENCY_ID
3652                  * Conservative value valid for even the basic CPU models.
3653                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3654                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3655                  * and 266MHz for model 3, or 4. Set Core Clock
3656                  * Frequency to System Bus Frequency Ratio to 1 (bits
3657                  * 31:24) even though these are only valid for CPU
3658                  * models > 2, however guests may end up dividing or
3659                  * multiplying by zero otherwise.
3660                  */
3661         case MSR_EBC_FREQUENCY_ID:
3662                 msr_info->data = 1 << 24;
3663                 break;
3664         case MSR_IA32_APICBASE:
3665                 msr_info->data = kvm_get_apic_base(vcpu);
3666                 break;
3667         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3668                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
3669         case MSR_IA32_TSC_DEADLINE:
3670                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
3671                 break;
3672         case MSR_IA32_TSC_ADJUST:
3673                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
3674                 break;
3675         case MSR_IA32_MISC_ENABLE:
3676                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
3677                 break;
3678         case MSR_IA32_SMBASE:
3679                 if (!msr_info->host_initiated)
3680                         return 1;
3681                 msr_info->data = vcpu->arch.smbase;
3682                 break;
3683         case MSR_SMI_COUNT:
3684                 msr_info->data = vcpu->arch.smi_count;
3685                 break;
3686         case MSR_IA32_PERF_STATUS:
3687                 /* TSC increment by tick */
3688                 msr_info->data = 1000ULL;
3689                 /* CPU multiplier */
3690                 msr_info->data |= (((uint64_t)4ULL) << 40);
3691                 break;
3692         case MSR_EFER:
3693                 msr_info->data = vcpu->arch.efer;
3694                 break;
3695         case MSR_KVM_WALL_CLOCK:
3696                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3697                         return 1;
3698
3699                 msr_info->data = vcpu->kvm->arch.wall_clock;
3700                 break;
3701         case MSR_KVM_WALL_CLOCK_NEW:
3702                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3703                         return 1;
3704
3705                 msr_info->data = vcpu->kvm->arch.wall_clock;
3706                 break;
3707         case MSR_KVM_SYSTEM_TIME:
3708                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3709                         return 1;
3710
3711                 msr_info->data = vcpu->arch.time;
3712                 break;
3713         case MSR_KVM_SYSTEM_TIME_NEW:
3714                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3715                         return 1;
3716
3717                 msr_info->data = vcpu->arch.time;
3718                 break;
3719         case MSR_KVM_ASYNC_PF_EN:
3720                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3721                         return 1;
3722
3723                 msr_info->data = vcpu->arch.apf.msr_en_val;
3724                 break;
3725         case MSR_KVM_ASYNC_PF_INT:
3726                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3727                         return 1;
3728
3729                 msr_info->data = vcpu->arch.apf.msr_int_val;
3730                 break;
3731         case MSR_KVM_ASYNC_PF_ACK:
3732                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3733                         return 1;
3734
3735                 msr_info->data = 0;
3736                 break;
3737         case MSR_KVM_STEAL_TIME:
3738                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3739                         return 1;
3740
3741                 msr_info->data = vcpu->arch.st.msr_val;
3742                 break;
3743         case MSR_KVM_PV_EOI_EN:
3744                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3745                         return 1;
3746
3747                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3748                 break;
3749         case MSR_KVM_POLL_CONTROL:
3750                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3751                         return 1;
3752
3753                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3754                 break;
3755         case MSR_IA32_P5_MC_ADDR:
3756         case MSR_IA32_P5_MC_TYPE:
3757         case MSR_IA32_MCG_CAP:
3758         case MSR_IA32_MCG_CTL:
3759         case MSR_IA32_MCG_STATUS:
3760         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3761                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3762                                    msr_info->host_initiated);
3763         case MSR_IA32_XSS:
3764                 if (!msr_info->host_initiated &&
3765                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3766                         return 1;
3767                 msr_info->data = vcpu->arch.ia32_xss;
3768                 break;
3769         case MSR_K7_CLK_CTL:
3770                 /*
3771                  * Provide expected ramp-up count for K7. All other
3772                  * are set to zero, indicating minimum divisors for
3773                  * every field.
3774                  *
3775                  * This prevents guest kernels on AMD host with CPU
3776                  * type 6, model 8 and higher from exploding due to
3777                  * the rdmsr failing.
3778                  */
3779                 msr_info->data = 0x20000000;
3780                 break;
3781         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3782         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3783         case HV_X64_MSR_SYNDBG_OPTIONS:
3784         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3785         case HV_X64_MSR_CRASH_CTL:
3786         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3787         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3788         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3789         case HV_X64_MSR_TSC_EMULATION_STATUS:
3790                 return kvm_hv_get_msr_common(vcpu,
3791                                              msr_info->index, &msr_info->data,
3792                                              msr_info->host_initiated);
3793         case MSR_IA32_BBL_CR_CTL3:
3794                 /* This legacy MSR exists but isn't fully documented in current
3795                  * silicon.  It is however accessed by winxp in very narrow
3796                  * scenarios where it sets bit #19, itself documented as
3797                  * a "reserved" bit.  Best effort attempt to source coherent
3798                  * read data here should the balance of the register be
3799                  * interpreted by the guest:
3800                  *
3801                  * L2 cache control register 3: 64GB range, 256KB size,
3802                  * enabled, latency 0x1, configured
3803                  */
3804                 msr_info->data = 0xbe702111;
3805                 break;
3806         case MSR_AMD64_OSVW_ID_LENGTH:
3807                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3808                         return 1;
3809                 msr_info->data = vcpu->arch.osvw.length;
3810                 break;
3811         case MSR_AMD64_OSVW_STATUS:
3812                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3813                         return 1;
3814                 msr_info->data = vcpu->arch.osvw.status;
3815                 break;
3816         case MSR_PLATFORM_INFO:
3817                 if (!msr_info->host_initiated &&
3818                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
3819                         return 1;
3820                 msr_info->data = vcpu->arch.msr_platform_info;
3821                 break;
3822         case MSR_MISC_FEATURES_ENABLES:
3823                 msr_info->data = vcpu->arch.msr_misc_features_enables;
3824                 break;
3825         case MSR_K7_HWCR:
3826                 msr_info->data = vcpu->arch.msr_hwcr;
3827                 break;
3828         default:
3829                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3830                         return kvm_pmu_get_msr(vcpu, msr_info);
3831                 return KVM_MSR_RET_INVALID;
3832         }
3833         return 0;
3834 }
3835 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
3836
3837 /*
3838  * Read or write a bunch of msrs. All parameters are kernel addresses.
3839  *
3840  * @return number of msrs set successfully.
3841  */
3842 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
3843                     struct kvm_msr_entry *entries,
3844                     int (*do_msr)(struct kvm_vcpu *vcpu,
3845                                   unsigned index, u64 *data))
3846 {
3847         int i;
3848
3849         for (i = 0; i < msrs->nmsrs; ++i)
3850                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
3851                         break;
3852
3853         return i;
3854 }
3855
3856 /*
3857  * Read or write a bunch of msrs. Parameters are user addresses.
3858  *
3859  * @return number of msrs set successfully.
3860  */
3861 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
3862                   int (*do_msr)(struct kvm_vcpu *vcpu,
3863                                 unsigned index, u64 *data),
3864                   int writeback)
3865 {
3866         struct kvm_msrs msrs;
3867         struct kvm_msr_entry *entries;
3868         int r, n;
3869         unsigned size;
3870
3871         r = -EFAULT;
3872         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
3873                 goto out;
3874
3875         r = -E2BIG;
3876         if (msrs.nmsrs >= MAX_IO_MSRS)
3877                 goto out;
3878
3879         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
3880         entries = memdup_user(user_msrs->entries, size);
3881         if (IS_ERR(entries)) {
3882                 r = PTR_ERR(entries);
3883                 goto out;
3884         }
3885
3886         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
3887         if (r < 0)
3888                 goto out_free;
3889
3890         r = -EFAULT;
3891         if (writeback && copy_to_user(user_msrs->entries, entries, size))
3892                 goto out_free;
3893
3894         r = n;
3895
3896 out_free:
3897         kfree(entries);
3898 out:
3899         return r;
3900 }
3901
3902 static inline bool kvm_can_mwait_in_guest(void)
3903 {
3904         return boot_cpu_has(X86_FEATURE_MWAIT) &&
3905                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
3906                 boot_cpu_has(X86_FEATURE_ARAT);
3907 }
3908
3909 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu *vcpu,
3910                                             struct kvm_cpuid2 __user *cpuid_arg)
3911 {
3912         struct kvm_cpuid2 cpuid;
3913         int r;
3914
3915         r = -EFAULT;
3916         if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3917                 return r;
3918
3919         r = kvm_get_hv_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3920         if (r)
3921                 return r;
3922
3923         r = -EFAULT;
3924         if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3925                 return r;
3926
3927         return 0;
3928 }
3929
3930 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
3931 {
3932         int r = 0;
3933
3934         switch (ext) {
3935         case KVM_CAP_IRQCHIP:
3936         case KVM_CAP_HLT:
3937         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
3938         case KVM_CAP_SET_TSS_ADDR:
3939         case KVM_CAP_EXT_CPUID:
3940         case KVM_CAP_EXT_EMUL_CPUID:
3941         case KVM_CAP_CLOCKSOURCE:
3942         case KVM_CAP_PIT:
3943         case KVM_CAP_NOP_IO_DELAY:
3944         case KVM_CAP_MP_STATE:
3945         case KVM_CAP_SYNC_MMU:
3946         case KVM_CAP_USER_NMI:
3947         case KVM_CAP_REINJECT_CONTROL:
3948         case KVM_CAP_IRQ_INJECT_STATUS:
3949         case KVM_CAP_IOEVENTFD:
3950         case KVM_CAP_IOEVENTFD_NO_LENGTH:
3951         case KVM_CAP_PIT2:
3952         case KVM_CAP_PIT_STATE2:
3953         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
3954         case KVM_CAP_VCPU_EVENTS:
3955         case KVM_CAP_HYPERV:
3956         case KVM_CAP_HYPERV_VAPIC:
3957         case KVM_CAP_HYPERV_SPIN:
3958         case KVM_CAP_HYPERV_SYNIC:
3959         case KVM_CAP_HYPERV_SYNIC2:
3960         case KVM_CAP_HYPERV_VP_INDEX:
3961         case KVM_CAP_HYPERV_EVENTFD:
3962         case KVM_CAP_HYPERV_TLBFLUSH:
3963         case KVM_CAP_HYPERV_SEND_IPI:
3964         case KVM_CAP_HYPERV_CPUID:
3965         case KVM_CAP_HYPERV_ENFORCE_CPUID:
3966         case KVM_CAP_SYS_HYPERV_CPUID:
3967         case KVM_CAP_PCI_SEGMENT:
3968         case KVM_CAP_DEBUGREGS:
3969         case KVM_CAP_X86_ROBUST_SINGLESTEP:
3970         case KVM_CAP_XSAVE:
3971         case KVM_CAP_ASYNC_PF:
3972         case KVM_CAP_ASYNC_PF_INT:
3973         case KVM_CAP_GET_TSC_KHZ:
3974         case KVM_CAP_KVMCLOCK_CTRL:
3975         case KVM_CAP_READONLY_MEM:
3976         case KVM_CAP_HYPERV_TIME:
3977         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
3978         case KVM_CAP_TSC_DEADLINE_TIMER:
3979         case KVM_CAP_DISABLE_QUIRKS:
3980         case KVM_CAP_SET_BOOT_CPU_ID:
3981         case KVM_CAP_SPLIT_IRQCHIP:
3982         case KVM_CAP_IMMEDIATE_EXIT:
3983         case KVM_CAP_PMU_EVENT_FILTER:
3984         case KVM_CAP_GET_MSR_FEATURES:
3985         case KVM_CAP_MSR_PLATFORM_INFO:
3986         case KVM_CAP_EXCEPTION_PAYLOAD:
3987         case KVM_CAP_SET_GUEST_DEBUG:
3988         case KVM_CAP_LAST_CPU:
3989         case KVM_CAP_X86_USER_SPACE_MSR:
3990         case KVM_CAP_X86_MSR_FILTER:
3991         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
3992 #ifdef CONFIG_X86_SGX_KVM
3993         case KVM_CAP_SGX_ATTRIBUTE:
3994 #endif
3995         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
3996         case KVM_CAP_SREGS2:
3997                 r = 1;
3998                 break;
3999         case KVM_CAP_SET_GUEST_DEBUG2:
4000                 return KVM_GUESTDBG_VALID_MASK;
4001 #ifdef CONFIG_KVM_XEN
4002         case KVM_CAP_XEN_HVM:
4003                 r = KVM_XEN_HVM_CONFIG_HYPERCALL_MSR |
4004                     KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL |
4005                     KVM_XEN_HVM_CONFIG_SHARED_INFO;
4006                 if (sched_info_on())
4007                         r |= KVM_XEN_HVM_CONFIG_RUNSTATE;
4008                 break;
4009 #endif
4010         case KVM_CAP_SYNC_REGS:
4011                 r = KVM_SYNC_X86_VALID_FIELDS;
4012                 break;
4013         case KVM_CAP_ADJUST_CLOCK:
4014                 r = KVM_CLOCK_TSC_STABLE;
4015                 break;
4016         case KVM_CAP_X86_DISABLE_EXITS:
4017                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
4018                       KVM_X86_DISABLE_EXITS_CSTATE;
4019                 if(kvm_can_mwait_in_guest())
4020                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
4021                 break;
4022         case KVM_CAP_X86_SMM:
4023                 /* SMBASE is usually relocated above 1M on modern chipsets,
4024                  * and SMM handlers might indeed rely on 4G segment limits,
4025                  * so do not report SMM to be available if real mode is
4026                  * emulated via vm86 mode.  Still, do not go to great lengths
4027                  * to avoid userspace's usage of the feature, because it is a
4028                  * fringe case that is not enabled except via specific settings
4029                  * of the module parameters.
4030                  */
4031                 r = static_call(kvm_x86_has_emulated_msr)(kvm, MSR_IA32_SMBASE);
4032                 break;
4033         case KVM_CAP_VAPIC:
4034                 r = !static_call(kvm_x86_cpu_has_accelerated_tpr)();
4035                 break;
4036         case KVM_CAP_NR_VCPUS:
4037                 r = KVM_SOFT_MAX_VCPUS;
4038                 break;
4039         case KVM_CAP_MAX_VCPUS:
4040                 r = KVM_MAX_VCPUS;
4041                 break;
4042         case KVM_CAP_MAX_VCPU_ID:
4043                 r = KVM_MAX_VCPU_ID;
4044                 break;
4045         case KVM_CAP_PV_MMU:    /* obsolete */
4046                 r = 0;
4047                 break;
4048         case KVM_CAP_MCE:
4049                 r = KVM_MAX_MCE_BANKS;
4050                 break;
4051         case KVM_CAP_XCRS:
4052                 r = boot_cpu_has(X86_FEATURE_XSAVE);
4053                 break;
4054         case KVM_CAP_TSC_CONTROL:
4055                 r = kvm_has_tsc_control;
4056                 break;
4057         case KVM_CAP_X2APIC_API:
4058                 r = KVM_X2APIC_API_VALID_FLAGS;
4059                 break;
4060         case KVM_CAP_NESTED_STATE:
4061                 r = kvm_x86_ops.nested_ops->get_state ?
4062                         kvm_x86_ops.nested_ops->get_state(NULL, NULL, 0) : 0;
4063                 break;
4064         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4065                 r = kvm_x86_ops.enable_direct_tlbflush != NULL;
4066                 break;
4067         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4068                 r = kvm_x86_ops.nested_ops->enable_evmcs != NULL;
4069                 break;
4070         case KVM_CAP_SMALLER_MAXPHYADDR:
4071                 r = (int) allow_smaller_maxphyaddr;
4072                 break;
4073         case KVM_CAP_STEAL_TIME:
4074                 r = sched_info_on();
4075                 break;
4076         case KVM_CAP_X86_BUS_LOCK_EXIT:
4077                 if (kvm_has_bus_lock_exit)
4078                         r = KVM_BUS_LOCK_DETECTION_OFF |
4079                             KVM_BUS_LOCK_DETECTION_EXIT;
4080                 else
4081                         r = 0;
4082                 break;
4083         default:
4084                 break;
4085         }
4086         return r;
4087
4088 }
4089
4090 long kvm_arch_dev_ioctl(struct file *filp,
4091                         unsigned int ioctl, unsigned long arg)
4092 {
4093         void __user *argp = (void __user *)arg;
4094         long r;
4095
4096         switch (ioctl) {
4097         case KVM_GET_MSR_INDEX_LIST: {
4098                 struct kvm_msr_list __user *user_msr_list = argp;
4099                 struct kvm_msr_list msr_list;
4100                 unsigned n;
4101
4102                 r = -EFAULT;
4103                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4104                         goto out;
4105                 n = msr_list.nmsrs;
4106                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
4107                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4108                         goto out;
4109                 r = -E2BIG;
4110                 if (n < msr_list.nmsrs)
4111                         goto out;
4112                 r = -EFAULT;
4113                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
4114                                  num_msrs_to_save * sizeof(u32)))
4115                         goto out;
4116                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
4117                                  &emulated_msrs,
4118                                  num_emulated_msrs * sizeof(u32)))
4119                         goto out;
4120                 r = 0;
4121                 break;
4122         }
4123         case KVM_GET_SUPPORTED_CPUID:
4124         case KVM_GET_EMULATED_CPUID: {
4125                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4126                 struct kvm_cpuid2 cpuid;
4127
4128                 r = -EFAULT;
4129                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4130                         goto out;
4131
4132                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
4133                                             ioctl);
4134                 if (r)
4135                         goto out;
4136
4137                 r = -EFAULT;
4138                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4139                         goto out;
4140                 r = 0;
4141                 break;
4142         }
4143         case KVM_X86_GET_MCE_CAP_SUPPORTED:
4144                 r = -EFAULT;
4145                 if (copy_to_user(argp, &kvm_mce_cap_supported,
4146                                  sizeof(kvm_mce_cap_supported)))
4147                         goto out;
4148                 r = 0;
4149                 break;
4150         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
4151                 struct kvm_msr_list __user *user_msr_list = argp;
4152                 struct kvm_msr_list msr_list;
4153                 unsigned int n;
4154
4155                 r = -EFAULT;
4156                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4157                         goto out;
4158                 n = msr_list.nmsrs;
4159                 msr_list.nmsrs = num_msr_based_features;
4160                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4161                         goto out;
4162                 r = -E2BIG;
4163                 if (n < msr_list.nmsrs)
4164                         goto out;
4165                 r = -EFAULT;
4166                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
4167                                  num_msr_based_features * sizeof(u32)))
4168                         goto out;
4169                 r = 0;
4170                 break;
4171         }
4172         case KVM_GET_MSRS:
4173                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
4174                 break;
4175         case KVM_GET_SUPPORTED_HV_CPUID:
4176                 r = kvm_ioctl_get_supported_hv_cpuid(NULL, argp);
4177                 break;
4178         default:
4179                 r = -EINVAL;
4180                 break;
4181         }
4182 out:
4183         return r;
4184 }
4185
4186 static void wbinvd_ipi(void *garbage)
4187 {
4188         wbinvd();
4189 }
4190
4191 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
4192 {
4193         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
4194 }
4195
4196 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
4197 {
4198         /* Address WBINVD may be executed by guest */
4199         if (need_emulate_wbinvd(vcpu)) {
4200                 if (static_call(kvm_x86_has_wbinvd_exit)())
4201                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4202                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
4203                         smp_call_function_single(vcpu->cpu,
4204                                         wbinvd_ipi, NULL, 1);
4205         }
4206
4207         static_call(kvm_x86_vcpu_load)(vcpu, cpu);
4208
4209         /* Save host pkru register if supported */
4210         vcpu->arch.host_pkru = read_pkru();
4211
4212         /* Apply any externally detected TSC adjustments (due to suspend) */
4213         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
4214                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
4215                 vcpu->arch.tsc_offset_adjustment = 0;
4216                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4217         }
4218
4219         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
4220                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
4221                                 rdtsc() - vcpu->arch.last_host_tsc;
4222                 if (tsc_delta < 0)
4223                         mark_tsc_unstable("KVM discovered backwards TSC");
4224
4225                 if (kvm_check_tsc_unstable()) {
4226                         u64 offset = kvm_compute_l1_tsc_offset(vcpu,
4227                                                 vcpu->arch.last_guest_tsc);
4228                         kvm_vcpu_write_tsc_offset(vcpu, offset);
4229                         vcpu->arch.tsc_catchup = 1;
4230                 }
4231
4232                 if (kvm_lapic_hv_timer_in_use(vcpu))
4233                         kvm_lapic_restart_hv_timer(vcpu);
4234
4235                 /*
4236                  * On a host with synchronized TSC, there is no need to update
4237                  * kvmclock on vcpu->cpu migration
4238                  */
4239                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
4240                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
4241                 if (vcpu->cpu != cpu)
4242                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
4243                 vcpu->cpu = cpu;
4244         }
4245
4246         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
4247 }
4248
4249 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
4250 {
4251         struct kvm_host_map map;
4252         struct kvm_steal_time *st;
4253
4254         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
4255                 return;
4256
4257         if (vcpu->arch.st.preempted)
4258                 return;
4259
4260         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT, &map,
4261                         &vcpu->arch.st.cache, true))
4262                 return;
4263
4264         st = map.hva +
4265                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
4266
4267         st->preempted = vcpu->arch.st.preempted = KVM_VCPU_PREEMPTED;
4268
4269         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, true);
4270 }
4271
4272 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
4273 {
4274         int idx;
4275
4276         if (vcpu->preempted && !vcpu->arch.guest_state_protected)
4277                 vcpu->arch.preempted_in_kernel = !static_call(kvm_x86_get_cpl)(vcpu);
4278
4279         /*
4280          * Take the srcu lock as memslots will be accessed to check the gfn
4281          * cache generation against the memslots generation.
4282          */
4283         idx = srcu_read_lock(&vcpu->kvm->srcu);
4284         if (kvm_xen_msr_enabled(vcpu->kvm))
4285                 kvm_xen_runstate_set_preempted(vcpu);
4286         else
4287                 kvm_steal_time_set_preempted(vcpu);
4288         srcu_read_unlock(&vcpu->kvm->srcu, idx);
4289
4290         static_call(kvm_x86_vcpu_put)(vcpu);
4291         vcpu->arch.last_host_tsc = rdtsc();
4292         /*
4293          * If userspace has set any breakpoints or watchpoints, dr6 is restored
4294          * on every vmexit, but if not, we might have a stale dr6 from the
4295          * guest. do_debug expects dr6 to be cleared after it runs, do the same.
4296          */
4297         set_debugreg(0, 6);
4298 }
4299
4300 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
4301                                     struct kvm_lapic_state *s)
4302 {
4303         if (vcpu->arch.apicv_active)
4304                 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
4305
4306         return kvm_apic_get_state(vcpu, s);
4307 }
4308
4309 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
4310                                     struct kvm_lapic_state *s)
4311 {
4312         int r;
4313
4314         r = kvm_apic_set_state(vcpu, s);
4315         if (r)
4316                 return r;
4317         update_cr8_intercept(vcpu);
4318
4319         return 0;
4320 }
4321
4322 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
4323 {
4324         /*
4325          * We can accept userspace's request for interrupt injection
4326          * as long as we have a place to store the interrupt number.
4327          * The actual injection will happen when the CPU is able to
4328          * deliver the interrupt.
4329          */
4330         if (kvm_cpu_has_extint(vcpu))
4331                 return false;
4332
4333         /* Acknowledging ExtINT does not happen if LINT0 is masked.  */
4334         return (!lapic_in_kernel(vcpu) ||
4335                 kvm_apic_accept_pic_intr(vcpu));
4336 }
4337
4338 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
4339 {
4340         return kvm_arch_interrupt_allowed(vcpu) &&
4341                 kvm_cpu_accept_dm_intr(vcpu);
4342 }
4343
4344 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
4345                                     struct kvm_interrupt *irq)
4346 {
4347         if (irq->irq >= KVM_NR_INTERRUPTS)
4348                 return -EINVAL;
4349
4350         if (!irqchip_in_kernel(vcpu->kvm)) {
4351                 kvm_queue_interrupt(vcpu, irq->irq, false);
4352                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4353                 return 0;
4354         }
4355
4356         /*
4357          * With in-kernel LAPIC, we only use this to inject EXTINT, so
4358          * fail for in-kernel 8259.
4359          */
4360         if (pic_in_kernel(vcpu->kvm))
4361                 return -ENXIO;
4362
4363         if (vcpu->arch.pending_external_vector != -1)
4364                 return -EEXIST;
4365
4366         vcpu->arch.pending_external_vector = irq->irq;
4367         kvm_make_request(KVM_REQ_EVENT, vcpu);
4368         return 0;
4369 }
4370
4371 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
4372 {
4373         kvm_inject_nmi(vcpu);
4374
4375         return 0;
4376 }
4377
4378 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
4379 {
4380         kvm_make_request(KVM_REQ_SMI, vcpu);
4381
4382         return 0;
4383 }
4384
4385 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
4386                                            struct kvm_tpr_access_ctl *tac)
4387 {
4388         if (tac->flags)
4389                 return -EINVAL;
4390         vcpu->arch.tpr_access_reporting = !!tac->enabled;
4391         return 0;
4392 }
4393
4394 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
4395                                         u64 mcg_cap)
4396 {
4397         int r;
4398         unsigned bank_num = mcg_cap & 0xff, bank;
4399
4400         r = -EINVAL;
4401         if (!bank_num || bank_num > KVM_MAX_MCE_BANKS)
4402                 goto out;
4403         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
4404                 goto out;
4405         r = 0;
4406         vcpu->arch.mcg_cap = mcg_cap;
4407         /* Init IA32_MCG_CTL to all 1s */
4408         if (mcg_cap & MCG_CTL_P)
4409                 vcpu->arch.mcg_ctl = ~(u64)0;
4410         /* Init IA32_MCi_CTL to all 1s */
4411         for (bank = 0; bank < bank_num; bank++)
4412                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
4413
4414         static_call(kvm_x86_setup_mce)(vcpu);
4415 out:
4416         return r;
4417 }
4418
4419 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
4420                                       struct kvm_x86_mce *mce)
4421 {
4422         u64 mcg_cap = vcpu->arch.mcg_cap;
4423         unsigned bank_num = mcg_cap & 0xff;
4424         u64 *banks = vcpu->arch.mce_banks;
4425
4426         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
4427                 return -EINVAL;
4428         /*
4429          * if IA32_MCG_CTL is not all 1s, the uncorrected error
4430          * reporting is disabled
4431          */
4432         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
4433             vcpu->arch.mcg_ctl != ~(u64)0)
4434                 return 0;
4435         banks += 4 * mce->bank;
4436         /*
4437          * if IA32_MCi_CTL is not all 1s, the uncorrected error
4438          * reporting is disabled for the bank
4439          */
4440         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
4441                 return 0;
4442         if (mce->status & MCI_STATUS_UC) {
4443                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
4444                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
4445                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
4446                         return 0;
4447                 }
4448                 if (banks[1] & MCI_STATUS_VAL)
4449                         mce->status |= MCI_STATUS_OVER;
4450                 banks[2] = mce->addr;
4451                 banks[3] = mce->misc;
4452                 vcpu->arch.mcg_status = mce->mcg_status;
4453                 banks[1] = mce->status;
4454                 kvm_queue_exception(vcpu, MC_VECTOR);
4455         } else if (!(banks[1] & MCI_STATUS_VAL)
4456                    || !(banks[1] & MCI_STATUS_UC)) {
4457                 if (banks[1] & MCI_STATUS_VAL)
4458                         mce->status |= MCI_STATUS_OVER;
4459                 banks[2] = mce->addr;
4460                 banks[3] = mce->misc;
4461                 banks[1] = mce->status;
4462         } else
4463                 banks[1] |= MCI_STATUS_OVER;
4464         return 0;
4465 }
4466
4467 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
4468                                                struct kvm_vcpu_events *events)
4469 {
4470         process_nmi(vcpu);
4471
4472         if (kvm_check_request(KVM_REQ_SMI, vcpu))
4473                 process_smi(vcpu);
4474
4475         /*
4476          * In guest mode, payload delivery should be deferred,
4477          * so that the L1 hypervisor can intercept #PF before
4478          * CR2 is modified (or intercept #DB before DR6 is
4479          * modified under nVMX). Unless the per-VM capability,
4480          * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4481          * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4482          * opportunistically defer the exception payload, deliver it if the
4483          * capability hasn't been requested before processing a
4484          * KVM_GET_VCPU_EVENTS.
4485          */
4486         if (!vcpu->kvm->arch.exception_payload_enabled &&
4487             vcpu->arch.exception.pending && vcpu->arch.exception.has_payload)
4488                 kvm_deliver_exception_payload(vcpu);
4489
4490         /*
4491          * The API doesn't provide the instruction length for software
4492          * exceptions, so don't report them. As long as the guest RIP
4493          * isn't advanced, we should expect to encounter the exception
4494          * again.
4495          */
4496         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
4497                 events->exception.injected = 0;
4498                 events->exception.pending = 0;
4499         } else {
4500                 events->exception.injected = vcpu->arch.exception.injected;
4501                 events->exception.pending = vcpu->arch.exception.pending;
4502                 /*
4503                  * For ABI compatibility, deliberately conflate
4504                  * pending and injected exceptions when
4505                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4506                  */
4507                 if (!vcpu->kvm->arch.exception_payload_enabled)
4508                         events->exception.injected |=
4509                                 vcpu->arch.exception.pending;
4510         }
4511         events->exception.nr = vcpu->arch.exception.nr;
4512         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
4513         events->exception.error_code = vcpu->arch.exception.error_code;
4514         events->exception_has_payload = vcpu->arch.exception.has_payload;
4515         events->exception_payload = vcpu->arch.exception.payload;
4516
4517         events->interrupt.injected =
4518                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
4519         events->interrupt.nr = vcpu->arch.interrupt.nr;
4520         events->interrupt.soft = 0;
4521         events->interrupt.shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
4522
4523         events->nmi.injected = vcpu->arch.nmi_injected;
4524         events->nmi.pending = vcpu->arch.nmi_pending != 0;
4525         events->nmi.masked = static_call(kvm_x86_get_nmi_mask)(vcpu);
4526         events->nmi.pad = 0;
4527
4528         events->sipi_vector = 0; /* never valid when reporting to user space */
4529
4530         events->smi.smm = is_smm(vcpu);
4531         events->smi.pending = vcpu->arch.smi_pending;
4532         events->smi.smm_inside_nmi =
4533                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
4534         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
4535
4536         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
4537                          | KVM_VCPUEVENT_VALID_SHADOW
4538                          | KVM_VCPUEVENT_VALID_SMM);
4539         if (vcpu->kvm->arch.exception_payload_enabled)
4540                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
4541
4542         memset(&events->reserved, 0, sizeof(events->reserved));
4543 }
4544
4545 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm);
4546
4547 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
4548                                               struct kvm_vcpu_events *events)
4549 {
4550         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4551                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4552                               | KVM_VCPUEVENT_VALID_SHADOW
4553                               | KVM_VCPUEVENT_VALID_SMM
4554                               | KVM_VCPUEVENT_VALID_PAYLOAD))
4555                 return -EINVAL;
4556
4557         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
4558                 if (!vcpu->kvm->arch.exception_payload_enabled)
4559                         return -EINVAL;
4560                 if (events->exception.pending)
4561                         events->exception.injected = 0;
4562                 else
4563                         events->exception_has_payload = 0;
4564         } else {
4565                 events->exception.pending = 0;
4566                 events->exception_has_payload = 0;
4567         }
4568
4569         if ((events->exception.injected || events->exception.pending) &&
4570             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
4571                 return -EINVAL;
4572
4573         /* INITs are latched while in SMM */
4574         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
4575             (events->smi.smm || events->smi.pending) &&
4576             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
4577                 return -EINVAL;
4578
4579         process_nmi(vcpu);
4580         vcpu->arch.exception.injected = events->exception.injected;
4581         vcpu->arch.exception.pending = events->exception.pending;
4582         vcpu->arch.exception.nr = events->exception.nr;
4583         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
4584         vcpu->arch.exception.error_code = events->exception.error_code;
4585         vcpu->arch.exception.has_payload = events->exception_has_payload;
4586         vcpu->arch.exception.payload = events->exception_payload;
4587
4588         vcpu->arch.interrupt.injected = events->interrupt.injected;
4589         vcpu->arch.interrupt.nr = events->interrupt.nr;
4590         vcpu->arch.interrupt.soft = events->interrupt.soft;
4591         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
4592                 static_call(kvm_x86_set_interrupt_shadow)(vcpu,
4593                                                 events->interrupt.shadow);
4594
4595         vcpu->arch.nmi_injected = events->nmi.injected;
4596         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
4597                 vcpu->arch.nmi_pending = events->nmi.pending;
4598         static_call(kvm_x86_set_nmi_mask)(vcpu, events->nmi.masked);
4599
4600         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
4601             lapic_in_kernel(vcpu))
4602                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
4603
4604         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
4605                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm)
4606                         kvm_smm_changed(vcpu, events->smi.smm);
4607
4608                 vcpu->arch.smi_pending = events->smi.pending;
4609
4610                 if (events->smi.smm) {
4611                         if (events->smi.smm_inside_nmi)
4612                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
4613                         else
4614                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
4615                 }
4616
4617                 if (lapic_in_kernel(vcpu)) {
4618                         if (events->smi.latched_init)
4619                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4620                         else
4621                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4622                 }
4623         }
4624
4625         kvm_make_request(KVM_REQ_EVENT, vcpu);
4626
4627         return 0;
4628 }
4629
4630 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
4631                                              struct kvm_debugregs *dbgregs)
4632 {
4633         unsigned long val;
4634
4635         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
4636         kvm_get_dr(vcpu, 6, &val);
4637         dbgregs->dr6 = val;
4638         dbgregs->dr7 = vcpu->arch.dr7;
4639         dbgregs->flags = 0;
4640         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
4641 }
4642
4643 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
4644                                             struct kvm_debugregs *dbgregs)
4645 {
4646         if (dbgregs->flags)
4647                 return -EINVAL;
4648
4649         if (!kvm_dr6_valid(dbgregs->dr6))
4650                 return -EINVAL;
4651         if (!kvm_dr7_valid(dbgregs->dr7))
4652                 return -EINVAL;
4653
4654         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
4655         kvm_update_dr0123(vcpu);
4656         vcpu->arch.dr6 = dbgregs->dr6;
4657         vcpu->arch.dr7 = dbgregs->dr7;
4658         kvm_update_dr7(vcpu);
4659
4660         return 0;
4661 }
4662
4663 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
4664
4665 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
4666 {
4667         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4668         u64 xstate_bv = xsave->header.xfeatures;
4669         u64 valid;
4670
4671         /*
4672          * Copy legacy XSAVE area, to avoid complications with CPUID
4673          * leaves 0 and 1 in the loop below.
4674          */
4675         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
4676
4677         /* Set XSTATE_BV */
4678         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
4679         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
4680
4681         /*
4682          * Copy each region from the possibly compacted offset to the
4683          * non-compacted offset.
4684          */
4685         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4686         while (valid) {
4687                 u64 xfeature_mask = valid & -valid;
4688                 int xfeature_nr = fls64(xfeature_mask) - 1;
4689                 void *src = get_xsave_addr(xsave, xfeature_nr);
4690
4691                 if (src) {
4692                         u32 size, offset, ecx, edx;
4693                         cpuid_count(XSTATE_CPUID, xfeature_nr,
4694                                     &size, &offset, &ecx, &edx);
4695                         if (xfeature_nr == XFEATURE_PKRU)
4696                                 memcpy(dest + offset, &vcpu->arch.pkru,
4697                                        sizeof(vcpu->arch.pkru));
4698                         else
4699                                 memcpy(dest + offset, src, size);
4700
4701                 }
4702
4703                 valid -= xfeature_mask;
4704         }
4705 }
4706
4707 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
4708 {
4709         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4710         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
4711         u64 valid;
4712
4713         /*
4714          * Copy legacy XSAVE area, to avoid complications with CPUID
4715          * leaves 0 and 1 in the loop below.
4716          */
4717         memcpy(xsave, src, XSAVE_HDR_OFFSET);
4718
4719         /* Set XSTATE_BV and possibly XCOMP_BV.  */
4720         xsave->header.xfeatures = xstate_bv;
4721         if (boot_cpu_has(X86_FEATURE_XSAVES))
4722                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
4723
4724         /*
4725          * Copy each region from the non-compacted offset to the
4726          * possibly compacted offset.
4727          */
4728         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4729         while (valid) {
4730                 u64 xfeature_mask = valid & -valid;
4731                 int xfeature_nr = fls64(xfeature_mask) - 1;
4732                 void *dest = get_xsave_addr(xsave, xfeature_nr);
4733
4734                 if (dest) {
4735                         u32 size, offset, ecx, edx;
4736                         cpuid_count(XSTATE_CPUID, xfeature_nr,
4737                                     &size, &offset, &ecx, &edx);
4738                         if (xfeature_nr == XFEATURE_PKRU)
4739                                 memcpy(&vcpu->arch.pkru, src + offset,
4740                                        sizeof(vcpu->arch.pkru));
4741                         else
4742                                 memcpy(dest, src + offset, size);
4743                 }
4744
4745                 valid -= xfeature_mask;
4746         }
4747 }
4748
4749 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
4750                                          struct kvm_xsave *guest_xsave)
4751 {
4752         if (!vcpu->arch.guest_fpu)
4753                 return;
4754
4755         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4756                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
4757                 fill_xsave((u8 *) guest_xsave->region, vcpu);
4758         } else {
4759                 memcpy(guest_xsave->region,
4760                         &vcpu->arch.guest_fpu->state.fxsave,
4761                         sizeof(struct fxregs_state));
4762                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
4763                         XFEATURE_MASK_FPSSE;
4764         }
4765 }
4766
4767 #define XSAVE_MXCSR_OFFSET 24
4768
4769 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
4770                                         struct kvm_xsave *guest_xsave)
4771 {
4772         u64 xstate_bv;
4773         u32 mxcsr;
4774
4775         if (!vcpu->arch.guest_fpu)
4776                 return 0;
4777
4778         xstate_bv = *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
4779         mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
4780
4781         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4782                 /*
4783                  * Here we allow setting states that are not present in
4784                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
4785                  * with old userspace.
4786                  */
4787                 if (xstate_bv & ~supported_xcr0 || mxcsr & ~mxcsr_feature_mask)
4788                         return -EINVAL;
4789                 load_xsave(vcpu, (u8 *)guest_xsave->region);
4790         } else {
4791                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
4792                         mxcsr & ~mxcsr_feature_mask)
4793                         return -EINVAL;
4794                 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
4795                         guest_xsave->region, sizeof(struct fxregs_state));
4796         }
4797         return 0;
4798 }
4799
4800 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
4801                                         struct kvm_xcrs *guest_xcrs)
4802 {
4803         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
4804                 guest_xcrs->nr_xcrs = 0;
4805                 return;
4806         }
4807
4808         guest_xcrs->nr_xcrs = 1;
4809         guest_xcrs->flags = 0;
4810         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
4811         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
4812 }
4813
4814 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
4815                                        struct kvm_xcrs *guest_xcrs)
4816 {
4817         int i, r = 0;
4818
4819         if (!boot_cpu_has(X86_FEATURE_XSAVE))
4820                 return -EINVAL;
4821
4822         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
4823                 return -EINVAL;
4824
4825         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
4826                 /* Only support XCR0 currently */
4827                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
4828                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
4829                                 guest_xcrs->xcrs[i].value);
4830                         break;
4831                 }
4832         if (r)
4833                 r = -EINVAL;
4834         return r;
4835 }
4836
4837 /*
4838  * kvm_set_guest_paused() indicates to the guest kernel that it has been
4839  * stopped by the hypervisor.  This function will be called from the host only.
4840  * EINVAL is returned when the host attempts to set the flag for a guest that
4841  * does not support pv clocks.
4842  */
4843 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
4844 {
4845         if (!vcpu->arch.pv_time_enabled)
4846                 return -EINVAL;
4847         vcpu->arch.pvclock_set_guest_stopped_request = true;
4848         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4849         return 0;
4850 }
4851
4852 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
4853                                      struct kvm_enable_cap *cap)
4854 {
4855         int r;
4856         uint16_t vmcs_version;
4857         void __user *user_ptr;
4858
4859         if (cap->flags)
4860                 return -EINVAL;
4861
4862         switch (cap->cap) {
4863         case KVM_CAP_HYPERV_SYNIC2:
4864                 if (cap->args[0])
4865                         return -EINVAL;
4866                 fallthrough;
4867
4868         case KVM_CAP_HYPERV_SYNIC:
4869                 if (!irqchip_in_kernel(vcpu->kvm))
4870                         return -EINVAL;
4871                 return kvm_hv_activate_synic(vcpu, cap->cap ==
4872                                              KVM_CAP_HYPERV_SYNIC2);
4873         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4874                 if (!kvm_x86_ops.nested_ops->enable_evmcs)
4875                         return -ENOTTY;
4876                 r = kvm_x86_ops.nested_ops->enable_evmcs(vcpu, &vmcs_version);
4877                 if (!r) {
4878                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
4879                         if (copy_to_user(user_ptr, &vmcs_version,
4880                                          sizeof(vmcs_version)))
4881                                 r = -EFAULT;
4882                 }
4883                 return r;
4884         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4885                 if (!kvm_x86_ops.enable_direct_tlbflush)
4886                         return -ENOTTY;
4887
4888                 return static_call(kvm_x86_enable_direct_tlbflush)(vcpu);
4889
4890         case KVM_CAP_HYPERV_ENFORCE_CPUID:
4891                 return kvm_hv_set_enforce_cpuid(vcpu, cap->args[0]);
4892
4893         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4894                 vcpu->arch.pv_cpuid.enforce = cap->args[0];
4895                 if (vcpu->arch.pv_cpuid.enforce)
4896                         kvm_update_pv_runtime(vcpu);
4897
4898                 return 0;
4899         default:
4900                 return -EINVAL;
4901         }
4902 }
4903
4904 long kvm_arch_vcpu_ioctl(struct file *filp,
4905                          unsigned int ioctl, unsigned long arg)
4906 {
4907         struct kvm_vcpu *vcpu = filp->private_data;
4908         void __user *argp = (void __user *)arg;
4909         int r;
4910         union {
4911                 struct kvm_sregs2 *sregs2;
4912                 struct kvm_lapic_state *lapic;
4913                 struct kvm_xsave *xsave;
4914                 struct kvm_xcrs *xcrs;
4915                 void *buffer;
4916         } u;
4917
4918         vcpu_load(vcpu);
4919
4920         u.buffer = NULL;
4921         switch (ioctl) {
4922         case KVM_GET_LAPIC: {
4923                 r = -EINVAL;
4924                 if (!lapic_in_kernel(vcpu))
4925                         goto out;
4926                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
4927                                 GFP_KERNEL_ACCOUNT);
4928
4929                 r = -ENOMEM;
4930                 if (!u.lapic)
4931                         goto out;
4932                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
4933                 if (r)
4934                         goto out;
4935                 r = -EFAULT;
4936                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
4937                         goto out;
4938                 r = 0;
4939                 break;
4940         }
4941         case KVM_SET_LAPIC: {
4942                 r = -EINVAL;
4943                 if (!lapic_in_kernel(vcpu))
4944                         goto out;
4945                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
4946                 if (IS_ERR(u.lapic)) {
4947                         r = PTR_ERR(u.lapic);
4948                         goto out_nofree;
4949                 }
4950
4951                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
4952                 break;
4953         }
4954         case KVM_INTERRUPT: {
4955                 struct kvm_interrupt irq;
4956
4957                 r = -EFAULT;
4958                 if (copy_from_user(&irq, argp, sizeof(irq)))
4959                         goto out;
4960                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
4961                 break;
4962         }
4963         case KVM_NMI: {
4964                 r = kvm_vcpu_ioctl_nmi(vcpu);
4965                 break;
4966         }
4967         case KVM_SMI: {
4968                 r = kvm_vcpu_ioctl_smi(vcpu);
4969                 break;
4970         }
4971         case KVM_SET_CPUID: {
4972                 struct kvm_cpuid __user *cpuid_arg = argp;
4973                 struct kvm_cpuid cpuid;
4974
4975                 r = -EFAULT;
4976                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4977                         goto out;
4978                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4979                 break;
4980         }
4981         case KVM_SET_CPUID2: {
4982                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4983                 struct kvm_cpuid2 cpuid;
4984
4985                 r = -EFAULT;
4986                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4987                         goto out;
4988                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
4989                                               cpuid_arg->entries);
4990                 break;
4991         }
4992         case KVM_GET_CPUID2: {
4993                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4994                 struct kvm_cpuid2 cpuid;
4995
4996                 r = -EFAULT;
4997                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4998                         goto out;
4999                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
5000                                               cpuid_arg->entries);
5001                 if (r)
5002                         goto out;
5003                 r = -EFAULT;
5004                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
5005                         goto out;
5006                 r = 0;
5007                 break;
5008         }
5009         case KVM_GET_MSRS: {
5010                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5011                 r = msr_io(vcpu, argp, do_get_msr, 1);
5012                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5013                 break;
5014         }
5015         case KVM_SET_MSRS: {
5016                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5017                 r = msr_io(vcpu, argp, do_set_msr, 0);
5018                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5019                 break;
5020         }
5021         case KVM_TPR_ACCESS_REPORTING: {
5022                 struct kvm_tpr_access_ctl tac;
5023
5024                 r = -EFAULT;
5025                 if (copy_from_user(&tac, argp, sizeof(tac)))
5026                         goto out;
5027                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
5028                 if (r)
5029                         goto out;
5030                 r = -EFAULT;
5031                 if (copy_to_user(argp, &tac, sizeof(tac)))
5032                         goto out;
5033                 r = 0;
5034                 break;
5035         };
5036         case KVM_SET_VAPIC_ADDR: {
5037                 struct kvm_vapic_addr va;
5038                 int idx;
5039
5040                 r = -EINVAL;
5041                 if (!lapic_in_kernel(vcpu))
5042                         goto out;
5043                 r = -EFAULT;
5044                 if (copy_from_user(&va, argp, sizeof(va)))
5045                         goto out;
5046                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5047                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
5048                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5049                 break;
5050         }
5051         case KVM_X86_SETUP_MCE: {
5052                 u64 mcg_cap;
5053
5054                 r = -EFAULT;
5055                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
5056                         goto out;
5057                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
5058                 break;
5059         }
5060         case KVM_X86_SET_MCE: {
5061                 struct kvm_x86_mce mce;
5062
5063                 r = -EFAULT;
5064                 if (copy_from_user(&mce, argp, sizeof(mce)))
5065                         goto out;
5066                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
5067                 break;
5068         }
5069         case KVM_GET_VCPU_EVENTS: {
5070                 struct kvm_vcpu_events events;
5071
5072                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
5073
5074                 r = -EFAULT;
5075                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
5076                         break;
5077                 r = 0;
5078                 break;
5079         }
5080         case KVM_SET_VCPU_EVENTS: {
5081                 struct kvm_vcpu_events events;
5082
5083                 r = -EFAULT;
5084                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
5085                         break;
5086
5087                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
5088                 break;
5089         }
5090         case KVM_GET_DEBUGREGS: {
5091                 struct kvm_debugregs dbgregs;
5092
5093                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
5094
5095                 r = -EFAULT;
5096                 if (copy_to_user(argp, &dbgregs,
5097                                  sizeof(struct kvm_debugregs)))
5098                         break;
5099                 r = 0;
5100                 break;
5101         }
5102         case KVM_SET_DEBUGREGS: {
5103                 struct kvm_debugregs dbgregs;
5104
5105                 r = -EFAULT;
5106                 if (copy_from_user(&dbgregs, argp,
5107                                    sizeof(struct kvm_debugregs)))
5108                         break;
5109
5110                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
5111                 break;
5112         }
5113         case KVM_GET_XSAVE: {
5114                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
5115                 r = -ENOMEM;
5116                 if (!u.xsave)
5117                         break;
5118
5119                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
5120
5121                 r = -EFAULT;
5122                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
5123                         break;
5124                 r = 0;
5125                 break;
5126         }
5127         case KVM_SET_XSAVE: {
5128                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
5129                 if (IS_ERR(u.xsave)) {
5130                         r = PTR_ERR(u.xsave);
5131                         goto out_nofree;
5132                 }
5133
5134                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
5135                 break;
5136         }
5137         case KVM_GET_XCRS: {
5138                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
5139                 r = -ENOMEM;
5140                 if (!u.xcrs)
5141                         break;
5142
5143                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
5144
5145                 r = -EFAULT;
5146                 if (copy_to_user(argp, u.xcrs,
5147                                  sizeof(struct kvm_xcrs)))
5148                         break;
5149                 r = 0;
5150                 break;
5151         }
5152         case KVM_SET_XCRS: {
5153                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
5154                 if (IS_ERR(u.xcrs)) {
5155                         r = PTR_ERR(u.xcrs);
5156                         goto out_nofree;
5157                 }
5158
5159                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
5160                 break;
5161         }
5162         case KVM_SET_TSC_KHZ: {
5163                 u32 user_tsc_khz;
5164
5165                 r = -EINVAL;
5166                 user_tsc_khz = (u32)arg;
5167
5168                 if (kvm_has_tsc_control &&
5169                     user_tsc_khz >= kvm_max_guest_tsc_khz)
5170                         goto out;
5171
5172                 if (user_tsc_khz == 0)
5173                         user_tsc_khz = tsc_khz;
5174
5175                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
5176                         r = 0;
5177
5178                 goto out;
5179         }
5180         case KVM_GET_TSC_KHZ: {
5181                 r = vcpu->arch.virtual_tsc_khz;
5182                 goto out;
5183         }
5184         case KVM_KVMCLOCK_CTRL: {
5185                 r = kvm_set_guest_paused(vcpu);
5186                 goto out;
5187         }
5188         case KVM_ENABLE_CAP: {
5189                 struct kvm_enable_cap cap;
5190
5191                 r = -EFAULT;
5192                 if (copy_from_user(&cap, argp, sizeof(cap)))
5193                         goto out;
5194                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
5195                 break;
5196         }
5197         case KVM_GET_NESTED_STATE: {
5198                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5199                 u32 user_data_size;
5200
5201                 r = -EINVAL;
5202                 if (!kvm_x86_ops.nested_ops->get_state)
5203                         break;
5204
5205                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
5206                 r = -EFAULT;
5207                 if (get_user(user_data_size, &user_kvm_nested_state->size))
5208                         break;
5209
5210                 r = kvm_x86_ops.nested_ops->get_state(vcpu, user_kvm_nested_state,
5211                                                      user_data_size);
5212                 if (r < 0)
5213                         break;
5214
5215                 if (r > user_data_size) {
5216                         if (put_user(r, &user_kvm_nested_state->size))
5217                                 r = -EFAULT;
5218                         else
5219                                 r = -E2BIG;
5220                         break;
5221                 }
5222
5223                 r = 0;
5224                 break;
5225         }
5226         case KVM_SET_NESTED_STATE: {
5227                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5228                 struct kvm_nested_state kvm_state;
5229                 int idx;
5230
5231                 r = -EINVAL;
5232                 if (!kvm_x86_ops.nested_ops->set_state)
5233                         break;
5234
5235                 r = -EFAULT;
5236                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
5237                         break;
5238
5239                 r = -EINVAL;
5240                 if (kvm_state.size < sizeof(kvm_state))
5241                         break;
5242
5243                 if (kvm_state.flags &
5244                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
5245                       | KVM_STATE_NESTED_EVMCS | KVM_STATE_NESTED_MTF_PENDING
5246                       | KVM_STATE_NESTED_GIF_SET))
5247                         break;
5248
5249                 /* nested_run_pending implies guest_mode.  */
5250                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
5251                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
5252                         break;
5253
5254                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5255                 r = kvm_x86_ops.nested_ops->set_state(vcpu, user_kvm_nested_state, &kvm_state);
5256                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5257                 break;
5258         }
5259         case KVM_GET_SUPPORTED_HV_CPUID:
5260                 r = kvm_ioctl_get_supported_hv_cpuid(vcpu, argp);
5261                 break;
5262 #ifdef CONFIG_KVM_XEN
5263         case KVM_XEN_VCPU_GET_ATTR: {
5264                 struct kvm_xen_vcpu_attr xva;
5265
5266                 r = -EFAULT;
5267                 if (copy_from_user(&xva, argp, sizeof(xva)))
5268                         goto out;
5269                 r = kvm_xen_vcpu_get_attr(vcpu, &xva);
5270                 if (!r && copy_to_user(argp, &xva, sizeof(xva)))
5271                         r = -EFAULT;
5272                 break;
5273         }
5274         case KVM_XEN_VCPU_SET_ATTR: {
5275                 struct kvm_xen_vcpu_attr xva;
5276
5277                 r = -EFAULT;
5278                 if (copy_from_user(&xva, argp, sizeof(xva)))
5279                         goto out;
5280                 r = kvm_xen_vcpu_set_attr(vcpu, &xva);
5281                 break;
5282         }
5283 #endif
5284         case KVM_GET_SREGS2: {
5285                 u.sregs2 = kzalloc(sizeof(struct kvm_sregs2), GFP_KERNEL);
5286                 r = -ENOMEM;
5287                 if (!u.sregs2)
5288                         goto out;
5289                 __get_sregs2(vcpu, u.sregs2);
5290                 r = -EFAULT;
5291                 if (copy_to_user(argp, u.sregs2, sizeof(struct kvm_sregs2)))
5292                         goto out;
5293                 r = 0;
5294                 break;
5295         }
5296         case KVM_SET_SREGS2: {
5297                 u.sregs2 = memdup_user(argp, sizeof(struct kvm_sregs2));
5298                 if (IS_ERR(u.sregs2)) {
5299                         r = PTR_ERR(u.sregs2);
5300                         u.sregs2 = NULL;
5301                         goto out;
5302                 }
5303                 r = __set_sregs2(vcpu, u.sregs2);
5304                 break;
5305         }
5306         default:
5307                 r = -EINVAL;
5308         }
5309 out:
5310         kfree(u.buffer);
5311 out_nofree:
5312         vcpu_put(vcpu);
5313         return r;
5314 }
5315
5316 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
5317 {
5318         return VM_FAULT_SIGBUS;
5319 }
5320
5321 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
5322 {
5323         int ret;
5324
5325         if (addr > (unsigned int)(-3 * PAGE_SIZE))
5326                 return -EINVAL;
5327         ret = static_call(kvm_x86_set_tss_addr)(kvm, addr);
5328         return ret;
5329 }
5330
5331 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
5332                                               u64 ident_addr)
5333 {
5334         return static_call(kvm_x86_set_identity_map_addr)(kvm, ident_addr);
5335 }
5336
5337 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
5338                                          unsigned long kvm_nr_mmu_pages)
5339 {
5340         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
5341                 return -EINVAL;
5342
5343         mutex_lock(&kvm->slots_lock);
5344
5345         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
5346         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
5347
5348         mutex_unlock(&kvm->slots_lock);
5349         return 0;
5350 }
5351
5352 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
5353 {
5354         return kvm->arch.n_max_mmu_pages;
5355 }
5356
5357 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5358 {
5359         struct kvm_pic *pic = kvm->arch.vpic;
5360         int r;
5361
5362         r = 0;
5363         switch (chip->chip_id) {
5364         case KVM_IRQCHIP_PIC_MASTER:
5365                 memcpy(&chip->chip.pic, &pic->pics[0],
5366                         sizeof(struct kvm_pic_state));
5367                 break;
5368         case KVM_IRQCHIP_PIC_SLAVE:
5369                 memcpy(&chip->chip.pic, &pic->pics[1],
5370                         sizeof(struct kvm_pic_state));
5371                 break;
5372         case KVM_IRQCHIP_IOAPIC:
5373                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
5374                 break;
5375         default:
5376                 r = -EINVAL;
5377                 break;
5378         }
5379         return r;
5380 }
5381
5382 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5383 {
5384         struct kvm_pic *pic = kvm->arch.vpic;
5385         int r;
5386
5387         r = 0;
5388         switch (chip->chip_id) {
5389         case KVM_IRQCHIP_PIC_MASTER:
5390                 spin_lock(&pic->lock);
5391                 memcpy(&pic->pics[0], &chip->chip.pic,
5392                         sizeof(struct kvm_pic_state));
5393                 spin_unlock(&pic->lock);
5394                 break;
5395         case KVM_IRQCHIP_PIC_SLAVE:
5396                 spin_lock(&pic->lock);
5397                 memcpy(&pic->pics[1], &chip->chip.pic,
5398                         sizeof(struct kvm_pic_state));
5399                 spin_unlock(&pic->lock);
5400                 break;
5401         case KVM_IRQCHIP_IOAPIC:
5402                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
5403                 break;
5404         default:
5405                 r = -EINVAL;
5406                 break;
5407         }
5408         kvm_pic_update_irq(pic);
5409         return r;
5410 }
5411
5412 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5413 {
5414         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
5415
5416         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
5417
5418         mutex_lock(&kps->lock);
5419         memcpy(ps, &kps->channels, sizeof(*ps));
5420         mutex_unlock(&kps->lock);
5421         return 0;
5422 }
5423
5424 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5425 {
5426         int i;
5427         struct kvm_pit *pit = kvm->arch.vpit;
5428
5429         mutex_lock(&pit->pit_state.lock);
5430         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
5431         for (i = 0; i < 3; i++)
5432                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
5433         mutex_unlock(&pit->pit_state.lock);
5434         return 0;
5435 }
5436
5437 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5438 {
5439         mutex_lock(&kvm->arch.vpit->pit_state.lock);
5440         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
5441                 sizeof(ps->channels));
5442         ps->flags = kvm->arch.vpit->pit_state.flags;
5443         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
5444         memset(&ps->reserved, 0, sizeof(ps->reserved));
5445         return 0;
5446 }
5447
5448 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5449 {
5450         int start = 0;
5451         int i;
5452         u32 prev_legacy, cur_legacy;
5453         struct kvm_pit *pit = kvm->arch.vpit;
5454
5455         mutex_lock(&pit->pit_state.lock);
5456         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
5457         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
5458         if (!prev_legacy && cur_legacy)
5459                 start = 1;
5460         memcpy(&pit->pit_state.channels, &ps->channels,
5461                sizeof(pit->pit_state.channels));
5462         pit->pit_state.flags = ps->flags;
5463         for (i = 0; i < 3; i++)
5464                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
5465                                    start && i == 0);
5466         mutex_unlock(&pit->pit_state.lock);
5467         return 0;
5468 }
5469
5470 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
5471                                  struct kvm_reinject_control *control)
5472 {
5473         struct kvm_pit *pit = kvm->arch.vpit;
5474
5475         /* pit->pit_state.lock was overloaded to prevent userspace from getting
5476          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5477          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
5478          */
5479         mutex_lock(&pit->pit_state.lock);
5480         kvm_pit_set_reinject(pit, control->pit_reinject);
5481         mutex_unlock(&pit->pit_state.lock);
5482
5483         return 0;
5484 }
5485
5486 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
5487 {
5488
5489         /*
5490          * Flush all CPUs' dirty log buffers to the  dirty_bitmap.  Called
5491          * before reporting dirty_bitmap to userspace.  KVM flushes the buffers
5492          * on all VM-Exits, thus we only need to kick running vCPUs to force a
5493          * VM-Exit.
5494          */
5495         struct kvm_vcpu *vcpu;
5496         int i;
5497
5498         kvm_for_each_vcpu(i, vcpu, kvm)
5499                 kvm_vcpu_kick(vcpu);
5500 }
5501
5502 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
5503                         bool line_status)
5504 {
5505         if (!irqchip_in_kernel(kvm))
5506                 return -ENXIO;
5507
5508         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
5509                                         irq_event->irq, irq_event->level,
5510                                         line_status);
5511         return 0;
5512 }
5513
5514 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
5515                             struct kvm_enable_cap *cap)
5516 {
5517         int r;
5518
5519         if (cap->flags)
5520                 return -EINVAL;
5521
5522         switch (cap->cap) {
5523         case KVM_CAP_DISABLE_QUIRKS:
5524                 kvm->arch.disabled_quirks = cap->args[0];
5525                 r = 0;
5526                 break;
5527         case KVM_CAP_SPLIT_IRQCHIP: {
5528                 mutex_lock(&kvm->lock);
5529                 r = -EINVAL;
5530                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
5531                         goto split_irqchip_unlock;
5532                 r = -EEXIST;
5533                 if (irqchip_in_kernel(kvm))
5534                         goto split_irqchip_unlock;
5535                 if (kvm->created_vcpus)
5536                         goto split_irqchip_unlock;
5537                 r = kvm_setup_empty_irq_routing(kvm);
5538                 if (r)
5539                         goto split_irqchip_unlock;
5540                 /* Pairs with irqchip_in_kernel. */
5541                 smp_wmb();
5542                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
5543                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
5544                 r = 0;
5545 split_irqchip_unlock:
5546                 mutex_unlock(&kvm->lock);
5547                 break;
5548         }
5549         case KVM_CAP_X2APIC_API:
5550                 r = -EINVAL;
5551                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
5552                         break;
5553
5554                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
5555                         kvm->arch.x2apic_format = true;
5556                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
5557                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
5558
5559                 r = 0;
5560                 break;
5561         case KVM_CAP_X86_DISABLE_EXITS:
5562                 r = -EINVAL;
5563                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
5564                         break;
5565
5566                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
5567                         kvm_can_mwait_in_guest())
5568                         kvm->arch.mwait_in_guest = true;
5569                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
5570                         kvm->arch.hlt_in_guest = true;
5571                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
5572                         kvm->arch.pause_in_guest = true;
5573                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
5574                         kvm->arch.cstate_in_guest = true;
5575                 r = 0;
5576                 break;
5577         case KVM_CAP_MSR_PLATFORM_INFO:
5578                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
5579                 r = 0;
5580                 break;
5581         case KVM_CAP_EXCEPTION_PAYLOAD:
5582                 kvm->arch.exception_payload_enabled = cap->args[0];
5583                 r = 0;
5584                 break;
5585         case KVM_CAP_X86_USER_SPACE_MSR:
5586                 kvm->arch.user_space_msr_mask = cap->args[0];
5587                 r = 0;
5588                 break;
5589         case KVM_CAP_X86_BUS_LOCK_EXIT:
5590                 r = -EINVAL;
5591                 if (cap->args[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE)
5592                         break;
5593
5594                 if ((cap->args[0] & KVM_BUS_LOCK_DETECTION_OFF) &&
5595                     (cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT))
5596                         break;
5597
5598                 if (kvm_has_bus_lock_exit &&
5599                     cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT)
5600                         kvm->arch.bus_lock_detection_enabled = true;
5601                 r = 0;
5602                 break;
5603 #ifdef CONFIG_X86_SGX_KVM
5604         case KVM_CAP_SGX_ATTRIBUTE: {
5605                 unsigned long allowed_attributes = 0;
5606
5607                 r = sgx_set_attribute(&allowed_attributes, cap->args[0]);
5608                 if (r)
5609                         break;
5610
5611                 /* KVM only supports the PROVISIONKEY privileged attribute. */
5612                 if ((allowed_attributes & SGX_ATTR_PROVISIONKEY) &&
5613                     !(allowed_attributes & ~SGX_ATTR_PROVISIONKEY))
5614                         kvm->arch.sgx_provisioning_allowed = true;
5615                 else
5616                         r = -EINVAL;
5617                 break;
5618         }
5619 #endif
5620         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
5621                 r = -EINVAL;
5622                 if (kvm_x86_ops.vm_copy_enc_context_from)
5623                         r = kvm_x86_ops.vm_copy_enc_context_from(kvm, cap->args[0]);
5624                 return r;
5625         default:
5626                 r = -EINVAL;
5627                 break;
5628         }
5629         return r;
5630 }
5631
5632 static struct kvm_x86_msr_filter *kvm_alloc_msr_filter(bool default_allow)
5633 {
5634         struct kvm_x86_msr_filter *msr_filter;
5635
5636         msr_filter = kzalloc(sizeof(*msr_filter), GFP_KERNEL_ACCOUNT);
5637         if (!msr_filter)
5638                 return NULL;
5639
5640         msr_filter->default_allow = default_allow;
5641         return msr_filter;
5642 }
5643
5644 static void kvm_free_msr_filter(struct kvm_x86_msr_filter *msr_filter)
5645 {
5646         u32 i;
5647
5648         if (!msr_filter)
5649                 return;
5650
5651         for (i = 0; i < msr_filter->count; i++)
5652                 kfree(msr_filter->ranges[i].bitmap);
5653
5654         kfree(msr_filter);
5655 }
5656
5657 static int kvm_add_msr_filter(struct kvm_x86_msr_filter *msr_filter,
5658                               struct kvm_msr_filter_range *user_range)
5659 {
5660         unsigned long *bitmap = NULL;
5661         size_t bitmap_size;
5662
5663         if (!user_range->nmsrs)
5664                 return 0;
5665
5666         if (user_range->flags & ~(KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE))
5667                 return -EINVAL;
5668
5669         if (!user_range->flags)
5670                 return -EINVAL;
5671
5672         bitmap_size = BITS_TO_LONGS(user_range->nmsrs) * sizeof(long);
5673         if (!bitmap_size || bitmap_size > KVM_MSR_FILTER_MAX_BITMAP_SIZE)
5674                 return -EINVAL;
5675
5676         bitmap = memdup_user((__user u8*)user_range->bitmap, bitmap_size);
5677         if (IS_ERR(bitmap))
5678                 return PTR_ERR(bitmap);
5679
5680         msr_filter->ranges[msr_filter->count] = (struct msr_bitmap_range) {
5681                 .flags = user_range->flags,
5682                 .base = user_range->base,
5683                 .nmsrs = user_range->nmsrs,
5684                 .bitmap = bitmap,
5685         };
5686
5687         msr_filter->count++;
5688         return 0;
5689 }
5690
5691 static int kvm_vm_ioctl_set_msr_filter(struct kvm *kvm, void __user *argp)
5692 {
5693         struct kvm_msr_filter __user *user_msr_filter = argp;
5694         struct kvm_x86_msr_filter *new_filter, *old_filter;
5695         struct kvm_msr_filter filter;
5696         bool default_allow;
5697         bool empty = true;
5698         int r = 0;
5699         u32 i;
5700
5701         if (copy_from_user(&filter, user_msr_filter, sizeof(filter)))
5702                 return -EFAULT;
5703
5704         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++)
5705                 empty &= !filter.ranges[i].nmsrs;
5706
5707         default_allow = !(filter.flags & KVM_MSR_FILTER_DEFAULT_DENY);
5708         if (empty && !default_allow)
5709                 return -EINVAL;
5710
5711         new_filter = kvm_alloc_msr_filter(default_allow);
5712         if (!new_filter)
5713                 return -ENOMEM;
5714
5715         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++) {
5716                 r = kvm_add_msr_filter(new_filter, &filter.ranges[i]);
5717                 if (r) {
5718                         kvm_free_msr_filter(new_filter);
5719                         return r;
5720                 }
5721         }
5722
5723         mutex_lock(&kvm->lock);
5724
5725         /* The per-VM filter is protected by kvm->lock... */
5726         old_filter = srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1);
5727
5728         rcu_assign_pointer(kvm->arch.msr_filter, new_filter);
5729         synchronize_srcu(&kvm->srcu);
5730
5731         kvm_free_msr_filter(old_filter);
5732
5733         kvm_make_all_cpus_request(kvm, KVM_REQ_MSR_FILTER_CHANGED);
5734         mutex_unlock(&kvm->lock);
5735
5736         return 0;
5737 }
5738
5739 #ifdef CONFIG_HAVE_KVM_PM_NOTIFIER
5740 static int kvm_arch_suspend_notifier(struct kvm *kvm)
5741 {
5742         struct kvm_vcpu *vcpu;
5743         int i, ret = 0;
5744
5745         mutex_lock(&kvm->lock);
5746         kvm_for_each_vcpu(i, vcpu, kvm) {
5747                 if (!vcpu->arch.pv_time_enabled)
5748                         continue;
5749
5750                 ret = kvm_set_guest_paused(vcpu);
5751                 if (ret) {
5752                         kvm_err("Failed to pause guest VCPU%d: %d\n",
5753                                 vcpu->vcpu_id, ret);
5754                         break;
5755                 }
5756         }
5757         mutex_unlock(&kvm->lock);
5758
5759         return ret ? NOTIFY_BAD : NOTIFY_DONE;
5760 }
5761
5762 int kvm_arch_pm_notifier(struct kvm *kvm, unsigned long state)
5763 {
5764         switch (state) {
5765         case PM_HIBERNATION_PREPARE:
5766         case PM_SUSPEND_PREPARE:
5767                 return kvm_arch_suspend_notifier(kvm);
5768         }
5769
5770         return NOTIFY_DONE;
5771 }
5772 #endif /* CONFIG_HAVE_KVM_PM_NOTIFIER */
5773
5774 long kvm_arch_vm_ioctl(struct file *filp,
5775                        unsigned int ioctl, unsigned long arg)
5776 {
5777         struct kvm *kvm = filp->private_data;
5778         void __user *argp = (void __user *)arg;
5779         int r = -ENOTTY;
5780         /*
5781          * This union makes it completely explicit to gcc-3.x
5782          * that these two variables' stack usage should be
5783          * combined, not added together.
5784          */
5785         union {
5786                 struct kvm_pit_state ps;
5787                 struct kvm_pit_state2 ps2;
5788                 struct kvm_pit_config pit_config;
5789         } u;
5790
5791         switch (ioctl) {
5792         case KVM_SET_TSS_ADDR:
5793                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
5794                 break;
5795         case KVM_SET_IDENTITY_MAP_ADDR: {
5796                 u64 ident_addr;
5797
5798                 mutex_lock(&kvm->lock);
5799                 r = -EINVAL;
5800                 if (kvm->created_vcpus)
5801                         goto set_identity_unlock;
5802                 r = -EFAULT;
5803                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
5804                         goto set_identity_unlock;
5805                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
5806 set_identity_unlock:
5807                 mutex_unlock(&kvm->lock);
5808                 break;
5809         }
5810         case KVM_SET_NR_MMU_PAGES:
5811                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
5812                 break;
5813         case KVM_GET_NR_MMU_PAGES:
5814                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
5815                 break;
5816         case KVM_CREATE_IRQCHIP: {
5817                 mutex_lock(&kvm->lock);
5818
5819                 r = -EEXIST;
5820                 if (irqchip_in_kernel(kvm))
5821                         goto create_irqchip_unlock;
5822
5823                 r = -EINVAL;
5824                 if (kvm->created_vcpus)
5825                         goto create_irqchip_unlock;
5826
5827                 r = kvm_pic_init(kvm);
5828                 if (r)
5829                         goto create_irqchip_unlock;
5830
5831                 r = kvm_ioapic_init(kvm);
5832                 if (r) {
5833                         kvm_pic_destroy(kvm);
5834                         goto create_irqchip_unlock;
5835                 }
5836
5837                 r = kvm_setup_default_irq_routing(kvm);
5838                 if (r) {
5839                         kvm_ioapic_destroy(kvm);
5840                         kvm_pic_destroy(kvm);
5841                         goto create_irqchip_unlock;
5842                 }
5843                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
5844                 smp_wmb();
5845                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
5846         create_irqchip_unlock:
5847                 mutex_unlock(&kvm->lock);
5848                 break;
5849         }
5850         case KVM_CREATE_PIT:
5851                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
5852                 goto create_pit;
5853         case KVM_CREATE_PIT2:
5854                 r = -EFAULT;
5855                 if (copy_from_user(&u.pit_config, argp,
5856                                    sizeof(struct kvm_pit_config)))
5857                         goto out;
5858         create_pit:
5859                 mutex_lock(&kvm->lock);
5860                 r = -EEXIST;
5861                 if (kvm->arch.vpit)
5862                         goto create_pit_unlock;
5863                 r = -ENOMEM;
5864                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
5865                 if (kvm->arch.vpit)
5866                         r = 0;
5867         create_pit_unlock:
5868                 mutex_unlock(&kvm->lock);
5869                 break;
5870         case KVM_GET_IRQCHIP: {
5871                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5872                 struct kvm_irqchip *chip;
5873
5874                 chip = memdup_user(argp, sizeof(*chip));
5875                 if (IS_ERR(chip)) {
5876                         r = PTR_ERR(chip);
5877                         goto out;
5878                 }
5879
5880                 r = -ENXIO;
5881                 if (!irqchip_kernel(kvm))
5882                         goto get_irqchip_out;
5883                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
5884                 if (r)
5885                         goto get_irqchip_out;
5886                 r = -EFAULT;
5887                 if (copy_to_user(argp, chip, sizeof(*chip)))
5888                         goto get_irqchip_out;
5889                 r = 0;
5890         get_irqchip_out:
5891                 kfree(chip);
5892                 break;
5893         }
5894         case KVM_SET_IRQCHIP: {
5895                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5896                 struct kvm_irqchip *chip;
5897
5898                 chip = memdup_user(argp, sizeof(*chip));
5899                 if (IS_ERR(chip)) {
5900                         r = PTR_ERR(chip);
5901                         goto out;
5902                 }
5903
5904                 r = -ENXIO;
5905                 if (!irqchip_kernel(kvm))
5906                         goto set_irqchip_out;
5907                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
5908         set_irqchip_out:
5909                 kfree(chip);
5910                 break;
5911         }
5912         case KVM_GET_PIT: {
5913                 r = -EFAULT;
5914                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
5915                         goto out;
5916                 r = -ENXIO;
5917                 if (!kvm->arch.vpit)
5918                         goto out;
5919                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
5920                 if (r)
5921                         goto out;
5922                 r = -EFAULT;
5923                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
5924                         goto out;
5925                 r = 0;
5926                 break;
5927         }
5928         case KVM_SET_PIT: {
5929                 r = -EFAULT;
5930                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
5931                         goto out;
5932                 mutex_lock(&kvm->lock);
5933                 r = -ENXIO;
5934                 if (!kvm->arch.vpit)
5935                         goto set_pit_out;
5936                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
5937 set_pit_out:
5938                 mutex_unlock(&kvm->lock);
5939                 break;
5940         }
5941         case KVM_GET_PIT2: {
5942                 r = -ENXIO;
5943                 if (!kvm->arch.vpit)
5944                         goto out;
5945                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
5946                 if (r)
5947                         goto out;
5948                 r = -EFAULT;
5949                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
5950                         goto out;
5951                 r = 0;
5952                 break;
5953         }
5954         case KVM_SET_PIT2: {
5955                 r = -EFAULT;
5956                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
5957                         goto out;
5958                 mutex_lock(&kvm->lock);
5959                 r = -ENXIO;
5960                 if (!kvm->arch.vpit)
5961                         goto set_pit2_out;
5962                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
5963 set_pit2_out:
5964                 mutex_unlock(&kvm->lock);
5965                 break;
5966         }
5967         case KVM_REINJECT_CONTROL: {
5968                 struct kvm_reinject_control control;
5969                 r =  -EFAULT;
5970                 if (copy_from_user(&control, argp, sizeof(control)))
5971                         goto out;
5972                 r = -ENXIO;
5973                 if (!kvm->arch.vpit)
5974                         goto out;
5975                 r = kvm_vm_ioctl_reinject(kvm, &control);
5976                 break;
5977         }
5978         case KVM_SET_BOOT_CPU_ID:
5979                 r = 0;
5980                 mutex_lock(&kvm->lock);
5981                 if (kvm->created_vcpus)
5982                         r = -EBUSY;
5983                 else
5984                         kvm->arch.bsp_vcpu_id = arg;
5985                 mutex_unlock(&kvm->lock);
5986                 break;
5987 #ifdef CONFIG_KVM_XEN
5988         case KVM_XEN_HVM_CONFIG: {
5989                 struct kvm_xen_hvm_config xhc;
5990                 r = -EFAULT;
5991                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
5992                         goto out;
5993                 r = kvm_xen_hvm_config(kvm, &xhc);
5994                 break;
5995         }
5996         case KVM_XEN_HVM_GET_ATTR: {
5997                 struct kvm_xen_hvm_attr xha;
5998
5999                 r = -EFAULT;
6000                 if (copy_from_user(&xha, argp, sizeof(xha)))
6001                         goto out;
6002                 r = kvm_xen_hvm_get_attr(kvm, &xha);
6003                 if (!r && copy_to_user(argp, &xha, sizeof(xha)))
6004                         r = -EFAULT;
6005                 break;
6006         }
6007         case KVM_XEN_HVM_SET_ATTR: {
6008                 struct kvm_xen_hvm_attr xha;
6009
6010                 r = -EFAULT;
6011                 if (copy_from_user(&xha, argp, sizeof(xha)))
6012                         goto out;
6013                 r = kvm_xen_hvm_set_attr(kvm, &xha);
6014                 break;
6015         }
6016 #endif
6017         case KVM_SET_CLOCK: {
6018                 struct kvm_arch *ka = &kvm->arch;
6019                 struct kvm_clock_data user_ns;
6020                 u64 now_ns;
6021
6022                 r = -EFAULT;
6023                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
6024                         goto out;
6025
6026                 r = -EINVAL;
6027                 if (user_ns.flags)
6028                         goto out;
6029
6030                 r = 0;
6031                 /*
6032                  * TODO: userspace has to take care of races with VCPU_RUN, so
6033                  * kvm_gen_update_masterclock() can be cut down to locked
6034                  * pvclock_update_vm_gtod_copy().
6035                  */
6036                 kvm_gen_update_masterclock(kvm);
6037
6038                 /*
6039                  * This pairs with kvm_guest_time_update(): when masterclock is
6040                  * in use, we use master_kernel_ns + kvmclock_offset to set
6041                  * unsigned 'system_time' so if we use get_kvmclock_ns() (which
6042                  * is slightly ahead) here we risk going negative on unsigned
6043                  * 'system_time' when 'user_ns.clock' is very small.
6044                  */
6045                 spin_lock_irq(&ka->pvclock_gtod_sync_lock);
6046                 if (kvm->arch.use_master_clock)
6047                         now_ns = ka->master_kernel_ns;
6048                 else
6049                         now_ns = get_kvmclock_base_ns();
6050                 ka->kvmclock_offset = user_ns.clock - now_ns;
6051                 spin_unlock_irq(&ka->pvclock_gtod_sync_lock);
6052
6053                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
6054                 break;
6055         }
6056         case KVM_GET_CLOCK: {
6057                 struct kvm_clock_data user_ns;
6058                 u64 now_ns;
6059
6060                 now_ns = get_kvmclock_ns(kvm);
6061                 user_ns.clock = now_ns;
6062                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
6063                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
6064
6065                 r = -EFAULT;
6066                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
6067                         goto out;
6068                 r = 0;
6069                 break;
6070         }
6071         case KVM_MEMORY_ENCRYPT_OP: {
6072                 r = -ENOTTY;
6073                 if (kvm_x86_ops.mem_enc_op)
6074                         r = static_call(kvm_x86_mem_enc_op)(kvm, argp);
6075                 break;
6076         }
6077         case KVM_MEMORY_ENCRYPT_REG_REGION: {
6078                 struct kvm_enc_region region;
6079
6080                 r = -EFAULT;
6081                 if (copy_from_user(&region, argp, sizeof(region)))
6082                         goto out;
6083
6084                 r = -ENOTTY;
6085                 if (kvm_x86_ops.mem_enc_reg_region)
6086                         r = static_call(kvm_x86_mem_enc_reg_region)(kvm, &region);
6087                 break;
6088         }
6089         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
6090                 struct kvm_enc_region region;
6091
6092                 r = -EFAULT;
6093                 if (copy_from_user(&region, argp, sizeof(region)))
6094                         goto out;
6095
6096                 r = -ENOTTY;
6097                 if (kvm_x86_ops.mem_enc_unreg_region)
6098                         r = static_call(kvm_x86_mem_enc_unreg_region)(kvm, &region);
6099                 break;
6100         }
6101         case KVM_HYPERV_EVENTFD: {
6102                 struct kvm_hyperv_eventfd hvevfd;
6103
6104                 r = -EFAULT;
6105                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
6106                         goto out;
6107                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
6108                 break;
6109         }
6110         case KVM_SET_PMU_EVENT_FILTER:
6111                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
6112                 break;
6113         case KVM_X86_SET_MSR_FILTER:
6114                 r = kvm_vm_ioctl_set_msr_filter(kvm, argp);
6115                 break;
6116         default:
6117                 r = -ENOTTY;
6118         }
6119 out:
6120         return r;
6121 }
6122
6123 static void kvm_init_msr_list(void)
6124 {
6125         struct x86_pmu_capability x86_pmu;
6126         u32 dummy[2];
6127         unsigned i;
6128
6129         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
6130                          "Please update the fixed PMCs in msrs_to_saved_all[]");
6131
6132         perf_get_x86_pmu_capability(&x86_pmu);
6133
6134         num_msrs_to_save = 0;
6135         num_emulated_msrs = 0;
6136         num_msr_based_features = 0;
6137
6138         for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
6139                 if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
6140                         continue;
6141
6142                 /*
6143                  * Even MSRs that are valid in the host may not be exposed
6144                  * to the guests in some cases.
6145                  */
6146                 switch (msrs_to_save_all[i]) {
6147                 case MSR_IA32_BNDCFGS:
6148                         if (!kvm_mpx_supported())
6149                                 continue;
6150                         break;
6151                 case MSR_TSC_AUX:
6152                         if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP) &&
6153                             !kvm_cpu_cap_has(X86_FEATURE_RDPID))
6154                                 continue;
6155                         break;
6156                 case MSR_IA32_UMWAIT_CONTROL:
6157                         if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG))
6158                                 continue;
6159                         break;
6160                 case MSR_IA32_RTIT_CTL:
6161                 case MSR_IA32_RTIT_STATUS:
6162                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT))
6163                                 continue;
6164                         break;
6165                 case MSR_IA32_RTIT_CR3_MATCH:
6166                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6167                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
6168                                 continue;
6169                         break;
6170                 case MSR_IA32_RTIT_OUTPUT_BASE:
6171                 case MSR_IA32_RTIT_OUTPUT_MASK:
6172                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6173                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
6174                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
6175                                 continue;
6176                         break;
6177                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
6178                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6179                                 msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
6180                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
6181                                 continue;
6182                         break;
6183                 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
6184                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
6185                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6186                                 continue;
6187                         break;
6188                 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
6189                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
6190                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6191                                 continue;
6192                         break;
6193                 default:
6194                         break;
6195                 }
6196
6197                 msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
6198         }
6199
6200         for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
6201                 if (!static_call(kvm_x86_has_emulated_msr)(NULL, emulated_msrs_all[i]))
6202                         continue;
6203
6204                 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
6205         }
6206
6207         for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
6208                 struct kvm_msr_entry msr;
6209
6210                 msr.index = msr_based_features_all[i];
6211                 if (kvm_get_msr_feature(&msr))
6212                         continue;
6213
6214                 msr_based_features[num_msr_based_features++] = msr_based_features_all[i];
6215         }
6216 }
6217
6218 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
6219                            const void *v)
6220 {
6221         int handled = 0;
6222         int n;
6223
6224         do {
6225                 n = min(len, 8);
6226                 if (!(lapic_in_kernel(vcpu) &&
6227                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
6228                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
6229                         break;
6230                 handled += n;
6231                 addr += n;
6232                 len -= n;
6233                 v += n;
6234         } while (len);
6235
6236         return handled;
6237 }
6238
6239 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
6240 {
6241         int handled = 0;
6242         int n;
6243
6244         do {
6245                 n = min(len, 8);
6246                 if (!(lapic_in_kernel(vcpu) &&
6247                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
6248                                          addr, n, v))
6249                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
6250                         break;
6251                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
6252                 handled += n;
6253                 addr += n;
6254                 len -= n;
6255                 v += n;
6256         } while (len);
6257
6258         return handled;
6259 }
6260
6261 static void kvm_set_segment(struct kvm_vcpu *vcpu,
6262                         struct kvm_segment *var, int seg)
6263 {
6264         static_call(kvm_x86_set_segment)(vcpu, var, seg);
6265 }
6266
6267 void kvm_get_segment(struct kvm_vcpu *vcpu,
6268                      struct kvm_segment *var, int seg)
6269 {
6270         static_call(kvm_x86_get_segment)(vcpu, var, seg);
6271 }
6272
6273 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
6274                            struct x86_exception *exception)
6275 {
6276         gpa_t t_gpa;
6277
6278         BUG_ON(!mmu_is_nested(vcpu));
6279
6280         /* NPT walks are always user-walks */
6281         access |= PFERR_USER_MASK;
6282         t_gpa  = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
6283
6284         return t_gpa;
6285 }
6286
6287 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
6288                               struct x86_exception *exception)
6289 {
6290         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6291         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6292 }
6293 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_read);
6294
6295  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
6296                                 struct x86_exception *exception)
6297 {
6298         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6299         access |= PFERR_FETCH_MASK;
6300         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6301 }
6302
6303 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
6304                                struct x86_exception *exception)
6305 {
6306         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6307         access |= PFERR_WRITE_MASK;
6308         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6309 }
6310 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_write);
6311
6312 /* uses this to access any guest's mapped memory without checking CPL */
6313 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
6314                                 struct x86_exception *exception)
6315 {
6316         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
6317 }
6318
6319 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6320                                       struct kvm_vcpu *vcpu, u32 access,
6321                                       struct x86_exception *exception)
6322 {
6323         void *data = val;
6324         int r = X86EMUL_CONTINUE;
6325
6326         while (bytes) {
6327                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
6328                                                             exception);
6329                 unsigned offset = addr & (PAGE_SIZE-1);
6330                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
6331                 int ret;
6332
6333                 if (gpa == UNMAPPED_GVA)
6334                         return X86EMUL_PROPAGATE_FAULT;
6335                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
6336                                                offset, toread);
6337                 if (ret < 0) {
6338                         r = X86EMUL_IO_NEEDED;
6339                         goto out;
6340                 }
6341
6342                 bytes -= toread;
6343                 data += toread;
6344                 addr += toread;
6345         }
6346 out:
6347         return r;
6348 }
6349
6350 /* used for instruction fetching */
6351 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
6352                                 gva_t addr, void *val, unsigned int bytes,
6353                                 struct x86_exception *exception)
6354 {
6355         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6356         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6357         unsigned offset;
6358         int ret;
6359
6360         /* Inline kvm_read_guest_virt_helper for speed.  */
6361         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
6362                                                     exception);
6363         if (unlikely(gpa == UNMAPPED_GVA))
6364                 return X86EMUL_PROPAGATE_FAULT;
6365
6366         offset = addr & (PAGE_SIZE-1);
6367         if (WARN_ON(offset + bytes > PAGE_SIZE))
6368                 bytes = (unsigned)PAGE_SIZE - offset;
6369         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
6370                                        offset, bytes);
6371         if (unlikely(ret < 0))
6372                 return X86EMUL_IO_NEEDED;
6373
6374         return X86EMUL_CONTINUE;
6375 }
6376
6377 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
6378                                gva_t addr, void *val, unsigned int bytes,
6379                                struct x86_exception *exception)
6380 {
6381         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6382
6383         /*
6384          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
6385          * is returned, but our callers are not ready for that and they blindly
6386          * call kvm_inject_page_fault.  Ensure that they at least do not leak
6387          * uninitialized kernel stack memory into cr2 and error code.
6388          */
6389         memset(exception, 0, sizeof(*exception));
6390         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
6391                                           exception);
6392 }
6393 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
6394
6395 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
6396                              gva_t addr, void *val, unsigned int bytes,
6397                              struct x86_exception *exception, bool system)
6398 {
6399         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6400         u32 access = 0;
6401
6402         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6403                 access |= PFERR_USER_MASK;
6404
6405         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
6406 }
6407
6408 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
6409                 unsigned long addr, void *val, unsigned int bytes)
6410 {
6411         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6412         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
6413
6414         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
6415 }
6416
6417 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6418                                       struct kvm_vcpu *vcpu, u32 access,
6419                                       struct x86_exception *exception)
6420 {
6421         void *data = val;
6422         int r = X86EMUL_CONTINUE;
6423
6424         while (bytes) {
6425                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
6426                                                              access,
6427                                                              exception);
6428                 unsigned offset = addr & (PAGE_SIZE-1);
6429                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
6430                 int ret;
6431
6432                 if (gpa == UNMAPPED_GVA)
6433                         return X86EMUL_PROPAGATE_FAULT;
6434                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
6435                 if (ret < 0) {
6436                         r = X86EMUL_IO_NEEDED;
6437                         goto out;
6438                 }
6439
6440                 bytes -= towrite;
6441                 data += towrite;
6442                 addr += towrite;
6443         }
6444 out:
6445         return r;
6446 }
6447
6448 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
6449                               unsigned int bytes, struct x86_exception *exception,
6450                               bool system)
6451 {
6452         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6453         u32 access = PFERR_WRITE_MASK;
6454
6455         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6456                 access |= PFERR_USER_MASK;
6457
6458         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6459                                            access, exception);
6460 }
6461
6462 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
6463                                 unsigned int bytes, struct x86_exception *exception)
6464 {
6465         /* kvm_write_guest_virt_system can pull in tons of pages. */
6466         vcpu->arch.l1tf_flush_l1d = true;
6467
6468         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6469                                            PFERR_WRITE_MASK, exception);
6470 }
6471 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
6472
6473 int handle_ud(struct kvm_vcpu *vcpu)
6474 {
6475         static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
6476         int emul_type = EMULTYPE_TRAP_UD;
6477         char sig[5]; /* ud2; .ascii "kvm" */
6478         struct x86_exception e;
6479
6480         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, NULL, 0)))
6481                 return 1;
6482
6483         if (force_emulation_prefix &&
6484             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
6485                                 sig, sizeof(sig), &e) == 0 &&
6486             memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
6487                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
6488                 emul_type = EMULTYPE_TRAP_UD_FORCED;
6489         }
6490
6491         return kvm_emulate_instruction(vcpu, emul_type);
6492 }
6493 EXPORT_SYMBOL_GPL(handle_ud);
6494
6495 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6496                             gpa_t gpa, bool write)
6497 {
6498         /* For APIC access vmexit */
6499         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6500                 return 1;
6501
6502         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
6503                 trace_vcpu_match_mmio(gva, gpa, write, true);
6504                 return 1;
6505         }
6506
6507         return 0;
6508 }
6509
6510 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6511                                 gpa_t *gpa, struct x86_exception *exception,
6512                                 bool write)
6513 {
6514         u32 access = ((static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0)
6515                 | (write ? PFERR_WRITE_MASK : 0);
6516
6517         /*
6518          * currently PKRU is only applied to ept enabled guest so
6519          * there is no pkey in EPT page table for L1 guest or EPT
6520          * shadow page table for L2 guest.
6521          */
6522         if (vcpu_match_mmio_gva(vcpu, gva)
6523             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
6524                                  vcpu->arch.mmio_access, 0, access)) {
6525                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
6526                                         (gva & (PAGE_SIZE - 1));
6527                 trace_vcpu_match_mmio(gva, *gpa, write, false);
6528                 return 1;
6529         }
6530
6531         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6532
6533         if (*gpa == UNMAPPED_GVA)
6534                 return -1;
6535
6536         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
6537 }
6538
6539 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
6540                         const void *val, int bytes)
6541 {
6542         int ret;
6543
6544         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
6545         if (ret < 0)
6546                 return 0;
6547         kvm_page_track_write(vcpu, gpa, val, bytes);
6548         return 1;
6549 }
6550
6551 struct read_write_emulator_ops {
6552         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
6553                                   int bytes);
6554         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
6555                                   void *val, int bytes);
6556         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6557                                int bytes, void *val);
6558         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6559                                     void *val, int bytes);
6560         bool write;
6561 };
6562
6563 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
6564 {
6565         if (vcpu->mmio_read_completed) {
6566                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
6567                                vcpu->mmio_fragments[0].gpa, val);
6568                 vcpu->mmio_read_completed = 0;
6569                 return 1;
6570         }
6571
6572         return 0;
6573 }
6574
6575 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6576                         void *val, int bytes)
6577 {
6578         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
6579 }
6580
6581 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6582                          void *val, int bytes)
6583 {
6584         return emulator_write_phys(vcpu, gpa, val, bytes);
6585 }
6586
6587 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
6588 {
6589         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
6590         return vcpu_mmio_write(vcpu, gpa, bytes, val);
6591 }
6592
6593 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6594                           void *val, int bytes)
6595 {
6596         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
6597         return X86EMUL_IO_NEEDED;
6598 }
6599
6600 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6601                            void *val, int bytes)
6602 {
6603         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
6604
6605         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
6606         return X86EMUL_CONTINUE;
6607 }
6608
6609 static const struct read_write_emulator_ops read_emultor = {
6610         .read_write_prepare = read_prepare,
6611         .read_write_emulate = read_emulate,
6612         .read_write_mmio = vcpu_mmio_read,
6613         .read_write_exit_mmio = read_exit_mmio,
6614 };
6615
6616 static const struct read_write_emulator_ops write_emultor = {
6617         .read_write_emulate = write_emulate,
6618         .read_write_mmio = write_mmio,
6619         .read_write_exit_mmio = write_exit_mmio,
6620         .write = true,
6621 };
6622
6623 static int emulator_read_write_onepage(unsigned long addr, void *val,
6624                                        unsigned int bytes,
6625                                        struct x86_exception *exception,
6626                                        struct kvm_vcpu *vcpu,
6627                                        const struct read_write_emulator_ops *ops)
6628 {
6629         gpa_t gpa;
6630         int handled, ret;
6631         bool write = ops->write;
6632         struct kvm_mmio_fragment *frag;
6633         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6634
6635         /*
6636          * If the exit was due to a NPF we may already have a GPA.
6637          * If the GPA is present, use it to avoid the GVA to GPA table walk.
6638          * Note, this cannot be used on string operations since string
6639          * operation using rep will only have the initial GPA from the NPF
6640          * occurred.
6641          */
6642         if (ctxt->gpa_available && emulator_can_use_gpa(ctxt) &&
6643             (addr & ~PAGE_MASK) == (ctxt->gpa_val & ~PAGE_MASK)) {
6644                 gpa = ctxt->gpa_val;
6645                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
6646         } else {
6647                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
6648                 if (ret < 0)
6649                         return X86EMUL_PROPAGATE_FAULT;
6650         }
6651
6652         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
6653                 return X86EMUL_CONTINUE;
6654
6655         /*
6656          * Is this MMIO handled locally?
6657          */
6658         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
6659         if (handled == bytes)
6660                 return X86EMUL_CONTINUE;
6661
6662         gpa += handled;
6663         bytes -= handled;
6664         val += handled;
6665
6666         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
6667         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
6668         frag->gpa = gpa;
6669         frag->data = val;
6670         frag->len = bytes;
6671         return X86EMUL_CONTINUE;
6672 }
6673
6674 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
6675                         unsigned long addr,
6676                         void *val, unsigned int bytes,
6677                         struct x86_exception *exception,
6678                         const struct read_write_emulator_ops *ops)
6679 {
6680         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6681         gpa_t gpa;
6682         int rc;
6683
6684         if (ops->read_write_prepare &&
6685                   ops->read_write_prepare(vcpu, val, bytes))
6686                 return X86EMUL_CONTINUE;
6687
6688         vcpu->mmio_nr_fragments = 0;
6689
6690         /* Crossing a page boundary? */
6691         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
6692                 int now;
6693
6694                 now = -addr & ~PAGE_MASK;
6695                 rc = emulator_read_write_onepage(addr, val, now, exception,
6696                                                  vcpu, ops);
6697
6698                 if (rc != X86EMUL_CONTINUE)
6699                         return rc;
6700                 addr += now;
6701                 if (ctxt->mode != X86EMUL_MODE_PROT64)
6702                         addr = (u32)addr;
6703                 val += now;
6704                 bytes -= now;
6705         }
6706
6707         rc = emulator_read_write_onepage(addr, val, bytes, exception,
6708                                          vcpu, ops);
6709         if (rc != X86EMUL_CONTINUE)
6710                 return rc;
6711
6712         if (!vcpu->mmio_nr_fragments)
6713                 return rc;
6714
6715         gpa = vcpu->mmio_fragments[0].gpa;
6716
6717         vcpu->mmio_needed = 1;
6718         vcpu->mmio_cur_fragment = 0;
6719
6720         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
6721         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
6722         vcpu->run->exit_reason = KVM_EXIT_MMIO;
6723         vcpu->run->mmio.phys_addr = gpa;
6724
6725         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
6726 }
6727
6728 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
6729                                   unsigned long addr,
6730                                   void *val,
6731                                   unsigned int bytes,
6732                                   struct x86_exception *exception)
6733 {
6734         return emulator_read_write(ctxt, addr, val, bytes,
6735                                    exception, &read_emultor);
6736 }
6737
6738 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
6739                             unsigned long addr,
6740                             const void *val,
6741                             unsigned int bytes,
6742                             struct x86_exception *exception)
6743 {
6744         return emulator_read_write(ctxt, addr, (void *)val, bytes,
6745                                    exception, &write_emultor);
6746 }
6747
6748 #define CMPXCHG_TYPE(t, ptr, old, new) \
6749         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
6750
6751 #ifdef CONFIG_X86_64
6752 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
6753 #else
6754 #  define CMPXCHG64(ptr, old, new) \
6755         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
6756 #endif
6757
6758 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
6759                                      unsigned long addr,
6760                                      const void *old,
6761                                      const void *new,
6762                                      unsigned int bytes,
6763                                      struct x86_exception *exception)
6764 {
6765         struct kvm_host_map map;
6766         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6767         u64 page_line_mask;
6768         gpa_t gpa;
6769         char *kaddr;
6770         bool exchanged;
6771
6772         /* guests cmpxchg8b have to be emulated atomically */
6773         if (bytes > 8 || (bytes & (bytes - 1)))
6774                 goto emul_write;
6775
6776         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
6777
6778         if (gpa == UNMAPPED_GVA ||
6779             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6780                 goto emul_write;
6781
6782         /*
6783          * Emulate the atomic as a straight write to avoid #AC if SLD is
6784          * enabled in the host and the access splits a cache line.
6785          */
6786         if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))
6787                 page_line_mask = ~(cache_line_size() - 1);
6788         else
6789                 page_line_mask = PAGE_MASK;
6790
6791         if (((gpa + bytes - 1) & page_line_mask) != (gpa & page_line_mask))
6792                 goto emul_write;
6793
6794         if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
6795                 goto emul_write;
6796
6797         kaddr = map.hva + offset_in_page(gpa);
6798
6799         switch (bytes) {
6800         case 1:
6801                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
6802                 break;
6803         case 2:
6804                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
6805                 break;
6806         case 4:
6807                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
6808                 break;
6809         case 8:
6810                 exchanged = CMPXCHG64(kaddr, old, new);
6811                 break;
6812         default:
6813                 BUG();
6814         }
6815
6816         kvm_vcpu_unmap(vcpu, &map, true);
6817
6818         if (!exchanged)
6819                 return X86EMUL_CMPXCHG_FAILED;
6820
6821         kvm_page_track_write(vcpu, gpa, new, bytes);
6822
6823         return X86EMUL_CONTINUE;
6824
6825 emul_write:
6826         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
6827
6828         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
6829 }
6830
6831 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
6832 {
6833         int r = 0, i;
6834
6835         for (i = 0; i < vcpu->arch.pio.count; i++) {
6836                 if (vcpu->arch.pio.in)
6837                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
6838                                             vcpu->arch.pio.size, pd);
6839                 else
6840                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
6841                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
6842                                              pd);
6843                 if (r)
6844                         break;
6845                 pd += vcpu->arch.pio.size;
6846         }
6847         return r;
6848 }
6849
6850 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
6851                                unsigned short port, void *val,
6852                                unsigned int count, bool in)
6853 {
6854         vcpu->arch.pio.port = port;
6855         vcpu->arch.pio.in = in;
6856         vcpu->arch.pio.count  = count;
6857         vcpu->arch.pio.size = size;
6858
6859         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
6860                 vcpu->arch.pio.count = 0;
6861                 return 1;
6862         }
6863
6864         vcpu->run->exit_reason = KVM_EXIT_IO;
6865         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
6866         vcpu->run->io.size = size;
6867         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
6868         vcpu->run->io.count = count;
6869         vcpu->run->io.port = port;
6870
6871         return 0;
6872 }
6873
6874 static int emulator_pio_in(struct kvm_vcpu *vcpu, int size,
6875                            unsigned short port, void *val, unsigned int count)
6876 {
6877         int ret;
6878
6879         if (vcpu->arch.pio.count)
6880                 goto data_avail;
6881
6882         memset(vcpu->arch.pio_data, 0, size * count);
6883
6884         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
6885         if (ret) {
6886 data_avail:
6887                 memcpy(val, vcpu->arch.pio_data, size * count);
6888                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
6889                 vcpu->arch.pio.count = 0;
6890                 return 1;
6891         }
6892
6893         return 0;
6894 }
6895
6896 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
6897                                     int size, unsigned short port, void *val,
6898                                     unsigned int count)
6899 {
6900         return emulator_pio_in(emul_to_vcpu(ctxt), size, port, val, count);
6901
6902 }
6903
6904 static int emulator_pio_out(struct kvm_vcpu *vcpu, int size,
6905                             unsigned short port, const void *val,
6906                             unsigned int count)
6907 {
6908         memcpy(vcpu->arch.pio_data, val, size * count);
6909         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
6910         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
6911 }
6912
6913 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
6914                                      int size, unsigned short port,
6915                                      const void *val, unsigned int count)
6916 {
6917         return emulator_pio_out(emul_to_vcpu(ctxt), size, port, val, count);
6918 }
6919
6920 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
6921 {
6922         return static_call(kvm_x86_get_segment_base)(vcpu, seg);
6923 }
6924
6925 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
6926 {
6927         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
6928 }
6929
6930 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
6931 {
6932         if (!need_emulate_wbinvd(vcpu))
6933                 return X86EMUL_CONTINUE;
6934
6935         if (static_call(kvm_x86_has_wbinvd_exit)()) {
6936                 int cpu = get_cpu();
6937
6938                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
6939                 on_each_cpu_mask(vcpu->arch.wbinvd_dirty_mask,
6940                                 wbinvd_ipi, NULL, 1);
6941                 put_cpu();
6942                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
6943         } else
6944                 wbinvd();
6945         return X86EMUL_CONTINUE;
6946 }
6947
6948 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
6949 {
6950         kvm_emulate_wbinvd_noskip(vcpu);
6951         return kvm_skip_emulated_instruction(vcpu);
6952 }
6953 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
6954
6955
6956
6957 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
6958 {
6959         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
6960 }
6961
6962 static void emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
6963                             unsigned long *dest)
6964 {
6965         kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
6966 }
6967
6968 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
6969                            unsigned long value)
6970 {
6971
6972         return kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
6973 }
6974
6975 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
6976 {
6977         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
6978 }
6979
6980 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
6981 {
6982         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6983         unsigned long value;
6984
6985         switch (cr) {
6986         case 0:
6987                 value = kvm_read_cr0(vcpu);
6988                 break;
6989         case 2:
6990                 value = vcpu->arch.cr2;
6991                 break;
6992         case 3:
6993                 value = kvm_read_cr3(vcpu);
6994                 break;
6995         case 4:
6996                 value = kvm_read_cr4(vcpu);
6997                 break;
6998         case 8:
6999                 value = kvm_get_cr8(vcpu);
7000                 break;
7001         default:
7002                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7003                 return 0;
7004         }
7005
7006         return value;
7007 }
7008
7009 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
7010 {
7011         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7012         int res = 0;
7013
7014         switch (cr) {
7015         case 0:
7016                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
7017                 break;
7018         case 2:
7019                 vcpu->arch.cr2 = val;
7020                 break;
7021         case 3:
7022                 res = kvm_set_cr3(vcpu, val);
7023                 break;
7024         case 4:
7025                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
7026                 break;
7027         case 8:
7028                 res = kvm_set_cr8(vcpu, val);
7029                 break;
7030         default:
7031                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7032                 res = -1;
7033         }
7034
7035         return res;
7036 }
7037
7038 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
7039 {
7040         return static_call(kvm_x86_get_cpl)(emul_to_vcpu(ctxt));
7041 }
7042
7043 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7044 {
7045         static_call(kvm_x86_get_gdt)(emul_to_vcpu(ctxt), dt);
7046 }
7047
7048 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7049 {
7050         static_call(kvm_x86_get_idt)(emul_to_vcpu(ctxt), dt);
7051 }
7052
7053 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7054 {
7055         static_call(kvm_x86_set_gdt)(emul_to_vcpu(ctxt), dt);
7056 }
7057
7058 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7059 {
7060         static_call(kvm_x86_set_idt)(emul_to_vcpu(ctxt), dt);
7061 }
7062
7063 static unsigned long emulator_get_cached_segment_base(
7064         struct x86_emulate_ctxt *ctxt, int seg)
7065 {
7066         return get_segment_base(emul_to_vcpu(ctxt), seg);
7067 }
7068
7069 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
7070                                  struct desc_struct *desc, u32 *base3,
7071                                  int seg)
7072 {
7073         struct kvm_segment var;
7074
7075         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
7076         *selector = var.selector;
7077
7078         if (var.unusable) {
7079                 memset(desc, 0, sizeof(*desc));
7080                 if (base3)
7081                         *base3 = 0;
7082                 return false;
7083         }
7084
7085         if (var.g)
7086                 var.limit >>= 12;
7087         set_desc_limit(desc, var.limit);
7088         set_desc_base(desc, (unsigned long)var.base);
7089 #ifdef CONFIG_X86_64
7090         if (base3)
7091                 *base3 = var.base >> 32;
7092 #endif
7093         desc->type = var.type;
7094         desc->s = var.s;
7095         desc->dpl = var.dpl;
7096         desc->p = var.present;
7097         desc->avl = var.avl;
7098         desc->l = var.l;
7099         desc->d = var.db;
7100         desc->g = var.g;
7101
7102         return true;
7103 }
7104
7105 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
7106                                  struct desc_struct *desc, u32 base3,
7107                                  int seg)
7108 {
7109         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7110         struct kvm_segment var;
7111
7112         var.selector = selector;
7113         var.base = get_desc_base(desc);
7114 #ifdef CONFIG_X86_64
7115         var.base |= ((u64)base3) << 32;
7116 #endif
7117         var.limit = get_desc_limit(desc);
7118         if (desc->g)
7119                 var.limit = (var.limit << 12) | 0xfff;
7120         var.type = desc->type;
7121         var.dpl = desc->dpl;
7122         var.db = desc->d;
7123         var.s = desc->s;
7124         var.l = desc->l;
7125         var.g = desc->g;
7126         var.avl = desc->avl;
7127         var.present = desc->p;
7128         var.unusable = !var.present;
7129         var.padding = 0;
7130
7131         kvm_set_segment(vcpu, &var, seg);
7132         return;
7133 }
7134
7135 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
7136                             u32 msr_index, u64 *pdata)
7137 {
7138         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7139         int r;
7140
7141         r = kvm_get_msr(vcpu, msr_index, pdata);
7142
7143         if (r && kvm_get_msr_user_space(vcpu, msr_index, r)) {
7144                 /* Bounce to user space */
7145                 return X86EMUL_IO_NEEDED;
7146         }
7147
7148         return r;
7149 }
7150
7151 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
7152                             u32 msr_index, u64 data)
7153 {
7154         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7155         int r;
7156
7157         r = kvm_set_msr(vcpu, msr_index, data);
7158
7159         if (r && kvm_set_msr_user_space(vcpu, msr_index, data, r)) {
7160                 /* Bounce to user space */
7161                 return X86EMUL_IO_NEEDED;
7162         }
7163
7164         return r;
7165 }
7166
7167 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
7168 {
7169         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7170
7171         return vcpu->arch.smbase;
7172 }
7173
7174 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
7175 {
7176         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7177
7178         vcpu->arch.smbase = smbase;
7179 }
7180
7181 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
7182                               u32 pmc)
7183 {
7184         return kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc);
7185 }
7186
7187 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
7188                              u32 pmc, u64 *pdata)
7189 {
7190         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
7191 }
7192
7193 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
7194 {
7195         emul_to_vcpu(ctxt)->arch.halt_request = 1;
7196 }
7197
7198 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
7199                               struct x86_instruction_info *info,
7200                               enum x86_intercept_stage stage)
7201 {
7202         return static_call(kvm_x86_check_intercept)(emul_to_vcpu(ctxt), info, stage,
7203                                             &ctxt->exception);
7204 }
7205
7206 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
7207                               u32 *eax, u32 *ebx, u32 *ecx, u32 *edx,
7208                               bool exact_only)
7209 {
7210         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, exact_only);
7211 }
7212
7213 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
7214 {
7215         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
7216 }
7217
7218 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
7219 {
7220         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
7221 }
7222
7223 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
7224 {
7225         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
7226 }
7227
7228 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
7229 {
7230         return kvm_register_read_raw(emul_to_vcpu(ctxt), reg);
7231 }
7232
7233 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
7234 {
7235         kvm_register_write_raw(emul_to_vcpu(ctxt), reg, val);
7236 }
7237
7238 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
7239 {
7240         static_call(kvm_x86_set_nmi_mask)(emul_to_vcpu(ctxt), masked);
7241 }
7242
7243 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
7244 {
7245         return emul_to_vcpu(ctxt)->arch.hflags;
7246 }
7247
7248 static void emulator_exiting_smm(struct x86_emulate_ctxt *ctxt)
7249 {
7250         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7251
7252         kvm_smm_changed(vcpu, false);
7253 }
7254
7255 static int emulator_leave_smm(struct x86_emulate_ctxt *ctxt,
7256                                   const char *smstate)
7257 {
7258         return static_call(kvm_x86_leave_smm)(emul_to_vcpu(ctxt), smstate);
7259 }
7260
7261 static void emulator_triple_fault(struct x86_emulate_ctxt *ctxt)
7262 {
7263         kvm_make_request(KVM_REQ_TRIPLE_FAULT, emul_to_vcpu(ctxt));
7264 }
7265
7266 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
7267 {
7268         return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
7269 }
7270
7271 static const struct x86_emulate_ops emulate_ops = {
7272         .read_gpr            = emulator_read_gpr,
7273         .write_gpr           = emulator_write_gpr,
7274         .read_std            = emulator_read_std,
7275         .write_std           = emulator_write_std,
7276         .read_phys           = kvm_read_guest_phys_system,
7277         .fetch               = kvm_fetch_guest_virt,
7278         .read_emulated       = emulator_read_emulated,
7279         .write_emulated      = emulator_write_emulated,
7280         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
7281         .invlpg              = emulator_invlpg,
7282         .pio_in_emulated     = emulator_pio_in_emulated,
7283         .pio_out_emulated    = emulator_pio_out_emulated,
7284         .get_segment         = emulator_get_segment,
7285         .set_segment         = emulator_set_segment,
7286         .get_cached_segment_base = emulator_get_cached_segment_base,
7287         .get_gdt             = emulator_get_gdt,
7288         .get_idt             = emulator_get_idt,
7289         .set_gdt             = emulator_set_gdt,
7290         .set_idt             = emulator_set_idt,
7291         .get_cr              = emulator_get_cr,
7292         .set_cr              = emulator_set_cr,
7293         .cpl                 = emulator_get_cpl,
7294         .get_dr              = emulator_get_dr,
7295         .set_dr              = emulator_set_dr,
7296         .get_smbase          = emulator_get_smbase,
7297         .set_smbase          = emulator_set_smbase,
7298         .set_msr             = emulator_set_msr,
7299         .get_msr             = emulator_get_msr,
7300         .check_pmc           = emulator_check_pmc,
7301         .read_pmc            = emulator_read_pmc,
7302         .halt                = emulator_halt,
7303         .wbinvd              = emulator_wbinvd,
7304         .fix_hypercall       = emulator_fix_hypercall,
7305         .intercept           = emulator_intercept,
7306         .get_cpuid           = emulator_get_cpuid,
7307         .guest_has_long_mode = emulator_guest_has_long_mode,
7308         .guest_has_movbe     = emulator_guest_has_movbe,
7309         .guest_has_fxsr      = emulator_guest_has_fxsr,
7310         .set_nmi_mask        = emulator_set_nmi_mask,
7311         .get_hflags          = emulator_get_hflags,
7312         .exiting_smm         = emulator_exiting_smm,
7313         .leave_smm           = emulator_leave_smm,
7314         .triple_fault        = emulator_triple_fault,
7315         .set_xcr             = emulator_set_xcr,
7316 };
7317
7318 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
7319 {
7320         u32 int_shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
7321         /*
7322          * an sti; sti; sequence only disable interrupts for the first
7323          * instruction. So, if the last instruction, be it emulated or
7324          * not, left the system with the INT_STI flag enabled, it
7325          * means that the last instruction is an sti. We should not
7326          * leave the flag on in this case. The same goes for mov ss
7327          */
7328         if (int_shadow & mask)
7329                 mask = 0;
7330         if (unlikely(int_shadow || mask)) {
7331                 static_call(kvm_x86_set_interrupt_shadow)(vcpu, mask);
7332                 if (!mask)
7333                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7334         }
7335 }
7336
7337 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
7338 {
7339         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7340         if (ctxt->exception.vector == PF_VECTOR)
7341                 return kvm_inject_emulated_page_fault(vcpu, &ctxt->exception);
7342
7343         if (ctxt->exception.error_code_valid)
7344                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
7345                                       ctxt->exception.error_code);
7346         else
7347                 kvm_queue_exception(vcpu, ctxt->exception.vector);
7348         return false;
7349 }
7350
7351 static struct x86_emulate_ctxt *alloc_emulate_ctxt(struct kvm_vcpu *vcpu)
7352 {
7353         struct x86_emulate_ctxt *ctxt;
7354
7355         ctxt = kmem_cache_zalloc(x86_emulator_cache, GFP_KERNEL_ACCOUNT);
7356         if (!ctxt) {
7357                 pr_err("kvm: failed to allocate vcpu's emulator\n");
7358                 return NULL;
7359         }
7360
7361         ctxt->vcpu = vcpu;
7362         ctxt->ops = &emulate_ops;
7363         vcpu->arch.emulate_ctxt = ctxt;
7364
7365         return ctxt;
7366 }
7367
7368 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
7369 {
7370         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7371         int cs_db, cs_l;
7372
7373         static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
7374
7375         ctxt->gpa_available = false;
7376         ctxt->eflags = kvm_get_rflags(vcpu);
7377         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
7378
7379         ctxt->eip = kvm_rip_read(vcpu);
7380         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
7381                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
7382                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
7383                      cs_db                              ? X86EMUL_MODE_PROT32 :
7384                                                           X86EMUL_MODE_PROT16;
7385         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
7386         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
7387         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
7388
7389         ctxt->interruptibility = 0;
7390         ctxt->have_exception = false;
7391         ctxt->exception.vector = -1;
7392         ctxt->perm_ok = false;
7393
7394         init_decode_cache(ctxt);
7395         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7396 }
7397
7398 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
7399 {
7400         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7401         int ret;
7402
7403         init_emulate_ctxt(vcpu);
7404
7405         ctxt->op_bytes = 2;
7406         ctxt->ad_bytes = 2;
7407         ctxt->_eip = ctxt->eip + inc_eip;
7408         ret = emulate_int_real(ctxt, irq);
7409
7410         if (ret != X86EMUL_CONTINUE) {
7411                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
7412         } else {
7413                 ctxt->eip = ctxt->_eip;
7414                 kvm_rip_write(vcpu, ctxt->eip);
7415                 kvm_set_rflags(vcpu, ctxt->eflags);
7416         }
7417 }
7418 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
7419
7420 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
7421 {
7422         ++vcpu->stat.insn_emulation_fail;
7423         trace_kvm_emulate_insn_failed(vcpu);
7424
7425         if (emulation_type & EMULTYPE_VMWARE_GP) {
7426                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7427                 return 1;
7428         }
7429
7430         if (emulation_type & EMULTYPE_SKIP) {
7431                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7432                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
7433                 vcpu->run->internal.ndata = 0;
7434                 return 0;
7435         }
7436
7437         kvm_queue_exception(vcpu, UD_VECTOR);
7438
7439         if (!is_guest_mode(vcpu) && static_call(kvm_x86_get_cpl)(vcpu) == 0) {
7440                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7441                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
7442                 vcpu->run->internal.ndata = 0;
7443                 return 0;
7444         }
7445
7446         return 1;
7447 }
7448
7449 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7450                                   bool write_fault_to_shadow_pgtable,
7451                                   int emulation_type)
7452 {
7453         gpa_t gpa = cr2_or_gpa;
7454         kvm_pfn_t pfn;
7455
7456         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7457                 return false;
7458
7459         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7460             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7461                 return false;
7462
7463         if (!vcpu->arch.mmu->direct_map) {
7464                 /*
7465                  * Write permission should be allowed since only
7466                  * write access need to be emulated.
7467                  */
7468                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7469
7470                 /*
7471                  * If the mapping is invalid in guest, let cpu retry
7472                  * it to generate fault.
7473                  */
7474                 if (gpa == UNMAPPED_GVA)
7475                         return true;
7476         }
7477
7478         /*
7479          * Do not retry the unhandleable instruction if it faults on the
7480          * readonly host memory, otherwise it will goto a infinite loop:
7481          * retry instruction -> write #PF -> emulation fail -> retry
7482          * instruction -> ...
7483          */
7484         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
7485
7486         /*
7487          * If the instruction failed on the error pfn, it can not be fixed,
7488          * report the error to userspace.
7489          */
7490         if (is_error_noslot_pfn(pfn))
7491                 return false;
7492
7493         kvm_release_pfn_clean(pfn);
7494
7495         /* The instructions are well-emulated on direct mmu. */
7496         if (vcpu->arch.mmu->direct_map) {
7497                 unsigned int indirect_shadow_pages;
7498
7499                 write_lock(&vcpu->kvm->mmu_lock);
7500                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
7501                 write_unlock(&vcpu->kvm->mmu_lock);
7502
7503                 if (indirect_shadow_pages)
7504                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7505
7506                 return true;
7507         }
7508
7509         /*
7510          * if emulation was due to access to shadowed page table
7511          * and it failed try to unshadow page and re-enter the
7512          * guest to let CPU execute the instruction.
7513          */
7514         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7515
7516         /*
7517          * If the access faults on its page table, it can not
7518          * be fixed by unprotecting shadow page and it should
7519          * be reported to userspace.
7520          */
7521         return !write_fault_to_shadow_pgtable;
7522 }
7523
7524 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
7525                               gpa_t cr2_or_gpa,  int emulation_type)
7526 {
7527         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7528         unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
7529
7530         last_retry_eip = vcpu->arch.last_retry_eip;
7531         last_retry_addr = vcpu->arch.last_retry_addr;
7532
7533         /*
7534          * If the emulation is caused by #PF and it is non-page_table
7535          * writing instruction, it means the VM-EXIT is caused by shadow
7536          * page protected, we can zap the shadow page and retry this
7537          * instruction directly.
7538          *
7539          * Note: if the guest uses a non-page-table modifying instruction
7540          * on the PDE that points to the instruction, then we will unmap
7541          * the instruction and go to an infinite loop. So, we cache the
7542          * last retried eip and the last fault address, if we meet the eip
7543          * and the address again, we can break out of the potential infinite
7544          * loop.
7545          */
7546         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
7547
7548         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7549                 return false;
7550
7551         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7552             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7553                 return false;
7554
7555         if (x86_page_table_writing_insn(ctxt))
7556                 return false;
7557
7558         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
7559                 return false;
7560
7561         vcpu->arch.last_retry_eip = ctxt->eip;
7562         vcpu->arch.last_retry_addr = cr2_or_gpa;
7563
7564         if (!vcpu->arch.mmu->direct_map)
7565                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7566
7567         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7568
7569         return true;
7570 }
7571
7572 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
7573 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
7574
7575 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm)
7576 {
7577         trace_kvm_smm_transition(vcpu->vcpu_id, vcpu->arch.smbase, entering_smm);
7578
7579         if (entering_smm) {
7580                 vcpu->arch.hflags |= HF_SMM_MASK;
7581         } else {
7582                 vcpu->arch.hflags &= ~(HF_SMM_MASK | HF_SMM_INSIDE_NMI_MASK);
7583
7584                 /* Process a latched INIT or SMI, if any.  */
7585                 kvm_make_request(KVM_REQ_EVENT, vcpu);
7586         }
7587
7588         kvm_mmu_reset_context(vcpu);
7589 }
7590
7591 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
7592                                 unsigned long *db)
7593 {
7594         u32 dr6 = 0;
7595         int i;
7596         u32 enable, rwlen;
7597
7598         enable = dr7;
7599         rwlen = dr7 >> 16;
7600         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
7601                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
7602                         dr6 |= (1 << i);
7603         return dr6;
7604 }
7605
7606 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
7607 {
7608         struct kvm_run *kvm_run = vcpu->run;
7609
7610         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
7611                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_ACTIVE_LOW;
7612                 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu);
7613                 kvm_run->debug.arch.exception = DB_VECTOR;
7614                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
7615                 return 0;
7616         }
7617         kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
7618         return 1;
7619 }
7620
7621 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
7622 {
7623         unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7624         int r;
7625
7626         r = static_call(kvm_x86_skip_emulated_instruction)(vcpu);
7627         if (unlikely(!r))
7628                 return 0;
7629
7630         /*
7631          * rflags is the old, "raw" value of the flags.  The new value has
7632          * not been saved yet.
7633          *
7634          * This is correct even for TF set by the guest, because "the
7635          * processor will not generate this exception after the instruction
7636          * that sets the TF flag".
7637          */
7638         if (unlikely(rflags & X86_EFLAGS_TF))
7639                 r = kvm_vcpu_do_singlestep(vcpu);
7640         return r;
7641 }
7642 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
7643
7644 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
7645 {
7646         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
7647             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
7648                 struct kvm_run *kvm_run = vcpu->run;
7649                 unsigned long eip = kvm_get_linear_rip(vcpu);
7650                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7651                                            vcpu->arch.guest_debug_dr7,
7652                                            vcpu->arch.eff_db);
7653
7654                 if (dr6 != 0) {
7655                         kvm_run->debug.arch.dr6 = dr6 | DR6_ACTIVE_LOW;
7656                         kvm_run->debug.arch.pc = eip;
7657                         kvm_run->debug.arch.exception = DB_VECTOR;
7658                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
7659                         *r = 0;
7660                         return true;
7661                 }
7662         }
7663
7664         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
7665             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
7666                 unsigned long eip = kvm_get_linear_rip(vcpu);
7667                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7668                                            vcpu->arch.dr7,
7669                                            vcpu->arch.db);
7670
7671                 if (dr6 != 0) {
7672                         kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
7673                         *r = 1;
7674                         return true;
7675                 }
7676         }
7677
7678         return false;
7679 }
7680
7681 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
7682 {
7683         switch (ctxt->opcode_len) {
7684         case 1:
7685                 switch (ctxt->b) {
7686                 case 0xe4:      /* IN */
7687                 case 0xe5:
7688                 case 0xec:
7689                 case 0xed:
7690                 case 0xe6:      /* OUT */
7691                 case 0xe7:
7692                 case 0xee:
7693                 case 0xef:
7694                 case 0x6c:      /* INS */
7695                 case 0x6d:
7696                 case 0x6e:      /* OUTS */
7697                 case 0x6f:
7698                         return true;
7699                 }
7700                 break;
7701         case 2:
7702                 switch (ctxt->b) {
7703                 case 0x33:      /* RDPMC */
7704                         return true;
7705                 }
7706                 break;
7707         }
7708
7709         return false;
7710 }
7711
7712 /*
7713  * Decode to be emulated instruction. Return EMULATION_OK if success.
7714  */
7715 int x86_decode_emulated_instruction(struct kvm_vcpu *vcpu, int emulation_type,
7716                                     void *insn, int insn_len)
7717 {
7718         int r = EMULATION_OK;
7719         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7720
7721         init_emulate_ctxt(vcpu);
7722
7723         /*
7724          * We will reenter on the same instruction since we do not set
7725          * complete_userspace_io. This does not handle watchpoints yet,
7726          * those would be handled in the emulate_ops.
7727          */
7728         if (!(emulation_type & EMULTYPE_SKIP) &&
7729             kvm_vcpu_check_breakpoint(vcpu, &r))
7730                 return r;
7731
7732         r = x86_decode_insn(ctxt, insn, insn_len, emulation_type);
7733
7734         trace_kvm_emulate_insn_start(vcpu);
7735         ++vcpu->stat.insn_emulation;
7736
7737         return r;
7738 }
7739 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction);
7740
7741 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7742                             int emulation_type, void *insn, int insn_len)
7743 {
7744         int r;
7745         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7746         bool writeback = true;
7747         bool write_fault_to_spt;
7748
7749         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, insn, insn_len)))
7750                 return 1;
7751
7752         vcpu->arch.l1tf_flush_l1d = true;
7753
7754         /*
7755          * Clear write_fault_to_shadow_pgtable here to ensure it is
7756          * never reused.
7757          */
7758         write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
7759         vcpu->arch.write_fault_to_shadow_pgtable = false;
7760
7761         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
7762                 kvm_clear_exception_queue(vcpu);
7763
7764                 r = x86_decode_emulated_instruction(vcpu, emulation_type,
7765                                                     insn, insn_len);
7766                 if (r != EMULATION_OK)  {
7767                         if ((emulation_type & EMULTYPE_TRAP_UD) ||
7768                             (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
7769                                 kvm_queue_exception(vcpu, UD_VECTOR);
7770                                 return 1;
7771                         }
7772                         if (reexecute_instruction(vcpu, cr2_or_gpa,
7773                                                   write_fault_to_spt,
7774                                                   emulation_type))
7775                                 return 1;
7776                         if (ctxt->have_exception) {
7777                                 /*
7778                                  * #UD should result in just EMULATION_FAILED, and trap-like
7779                                  * exception should not be encountered during decode.
7780                                  */
7781                                 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
7782                                              exception_type(ctxt->exception.vector) == EXCPT_TRAP);
7783                                 inject_emulated_exception(vcpu);
7784                                 return 1;
7785                         }
7786                         return handle_emulation_failure(vcpu, emulation_type);
7787                 }
7788         }
7789
7790         if ((emulation_type & EMULTYPE_VMWARE_GP) &&
7791             !is_vmware_backdoor_opcode(ctxt)) {
7792                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7793                 return 1;
7794         }
7795
7796         /*
7797          * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
7798          * for kvm_skip_emulated_instruction().  The caller is responsible for
7799          * updating interruptibility state and injecting single-step #DBs.
7800          */
7801         if (emulation_type & EMULTYPE_SKIP) {
7802                 kvm_rip_write(vcpu, ctxt->_eip);
7803                 if (ctxt->eflags & X86_EFLAGS_RF)
7804                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
7805                 return 1;
7806         }
7807
7808         if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
7809                 return 1;
7810
7811         /* this is needed for vmware backdoor interface to work since it
7812            changes registers values  during IO operation */
7813         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
7814                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7815                 emulator_invalidate_register_cache(ctxt);
7816         }
7817
7818 restart:
7819         if (emulation_type & EMULTYPE_PF) {
7820                 /* Save the faulting GPA (cr2) in the address field */
7821                 ctxt->exception.address = cr2_or_gpa;
7822
7823                 /* With shadow page tables, cr2 contains a GVA or nGPA. */
7824                 if (vcpu->arch.mmu->direct_map) {
7825                         ctxt->gpa_available = true;
7826                         ctxt->gpa_val = cr2_or_gpa;
7827                 }
7828         } else {
7829                 /* Sanitize the address out of an abundance of paranoia. */
7830                 ctxt->exception.address = 0;
7831         }
7832
7833         r = x86_emulate_insn(ctxt);
7834
7835         if (r == EMULATION_INTERCEPTED)
7836                 return 1;
7837
7838         if (r == EMULATION_FAILED) {
7839                 if (reexecute_instruction(vcpu, cr2_or_gpa, write_fault_to_spt,
7840                                         emulation_type))
7841                         return 1;
7842
7843                 return handle_emulation_failure(vcpu, emulation_type);
7844         }
7845
7846         if (ctxt->have_exception) {
7847                 r = 1;
7848                 if (inject_emulated_exception(vcpu))
7849                         return r;
7850         } else if (vcpu->arch.pio.count) {
7851                 if (!vcpu->arch.pio.in) {
7852                         /* FIXME: return into emulator if single-stepping.  */
7853                         vcpu->arch.pio.count = 0;
7854                 } else {
7855                         writeback = false;
7856                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
7857                 }
7858                 r = 0;
7859         } else if (vcpu->mmio_needed) {
7860                 ++vcpu->stat.mmio_exits;
7861
7862                 if (!vcpu->mmio_is_write)
7863                         writeback = false;
7864                 r = 0;
7865                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7866         } else if (r == EMULATION_RESTART)
7867                 goto restart;
7868         else
7869                 r = 1;
7870
7871         if (writeback) {
7872                 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7873                 toggle_interruptibility(vcpu, ctxt->interruptibility);
7874                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7875                 if (!ctxt->have_exception ||
7876                     exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
7877                         kvm_rip_write(vcpu, ctxt->eip);
7878                         if (r && (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
7879                                 r = kvm_vcpu_do_singlestep(vcpu);
7880                         if (kvm_x86_ops.update_emulated_instruction)
7881                                 static_call(kvm_x86_update_emulated_instruction)(vcpu);
7882                         __kvm_set_rflags(vcpu, ctxt->eflags);
7883                 }
7884
7885                 /*
7886                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
7887                  * do nothing, and it will be requested again as soon as
7888                  * the shadow expires.  But we still need to check here,
7889                  * because POPF has no interrupt shadow.
7890                  */
7891                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
7892                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7893         } else
7894                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
7895
7896         return r;
7897 }
7898
7899 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
7900 {
7901         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
7902 }
7903 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
7904
7905 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
7906                                         void *insn, int insn_len)
7907 {
7908         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
7909 }
7910 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
7911
7912 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
7913 {
7914         vcpu->arch.pio.count = 0;
7915         return 1;
7916 }
7917
7918 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
7919 {
7920         vcpu->arch.pio.count = 0;
7921
7922         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
7923                 return 1;
7924
7925         return kvm_skip_emulated_instruction(vcpu);
7926 }
7927
7928 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
7929                             unsigned short port)
7930 {
7931         unsigned long val = kvm_rax_read(vcpu);
7932         int ret = emulator_pio_out(vcpu, size, port, &val, 1);
7933
7934         if (ret)
7935                 return ret;
7936
7937         /*
7938          * Workaround userspace that relies on old KVM behavior of %rip being
7939          * incremented prior to exiting to userspace to handle "OUT 0x7e".
7940          */
7941         if (port == 0x7e &&
7942             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
7943                 vcpu->arch.complete_userspace_io =
7944                         complete_fast_pio_out_port_0x7e;
7945                 kvm_skip_emulated_instruction(vcpu);
7946         } else {
7947                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
7948                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
7949         }
7950         return 0;
7951 }
7952
7953 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
7954 {
7955         unsigned long val;
7956
7957         /* We should only ever be called with arch.pio.count equal to 1 */
7958         BUG_ON(vcpu->arch.pio.count != 1);
7959
7960         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
7961                 vcpu->arch.pio.count = 0;
7962                 return 1;
7963         }
7964
7965         /* For size less than 4 we merge, else we zero extend */
7966         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
7967
7968         /*
7969          * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
7970          * the copy and tracing
7971          */
7972         emulator_pio_in(vcpu, vcpu->arch.pio.size, vcpu->arch.pio.port, &val, 1);
7973         kvm_rax_write(vcpu, val);
7974
7975         return kvm_skip_emulated_instruction(vcpu);
7976 }
7977
7978 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
7979                            unsigned short port)
7980 {
7981         unsigned long val;
7982         int ret;
7983
7984         /* For size less than 4 we merge, else we zero extend */
7985         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
7986
7987         ret = emulator_pio_in(vcpu, size, port, &val, 1);
7988         if (ret) {
7989                 kvm_rax_write(vcpu, val);
7990                 return ret;
7991         }
7992
7993         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
7994         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
7995
7996         return 0;
7997 }
7998
7999 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
8000 {
8001         int ret;
8002
8003         if (in)
8004                 ret = kvm_fast_pio_in(vcpu, size, port);
8005         else
8006                 ret = kvm_fast_pio_out(vcpu, size, port);
8007         return ret && kvm_skip_emulated_instruction(vcpu);
8008 }
8009 EXPORT_SYMBOL_GPL(kvm_fast_pio);
8010
8011 static int kvmclock_cpu_down_prep(unsigned int cpu)
8012 {
8013         __this_cpu_write(cpu_tsc_khz, 0);
8014         return 0;
8015 }
8016
8017 static void tsc_khz_changed(void *data)
8018 {
8019         struct cpufreq_freqs *freq = data;
8020         unsigned long khz = 0;
8021
8022         if (data)
8023                 khz = freq->new;
8024         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8025                 khz = cpufreq_quick_get(raw_smp_processor_id());
8026         if (!khz)
8027                 khz = tsc_khz;
8028         __this_cpu_write(cpu_tsc_khz, khz);
8029 }
8030
8031 #ifdef CONFIG_X86_64
8032 static void kvm_hyperv_tsc_notifier(void)
8033 {
8034         struct kvm *kvm;
8035         struct kvm_vcpu *vcpu;
8036         int cpu;
8037         unsigned long flags;
8038
8039         mutex_lock(&kvm_lock);
8040         list_for_each_entry(kvm, &vm_list, vm_list)
8041                 kvm_make_mclock_inprogress_request(kvm);
8042
8043         hyperv_stop_tsc_emulation();
8044
8045         /* TSC frequency always matches when on Hyper-V */
8046         for_each_present_cpu(cpu)
8047                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
8048         kvm_max_guest_tsc_khz = tsc_khz;
8049
8050         list_for_each_entry(kvm, &vm_list, vm_list) {
8051                 struct kvm_arch *ka = &kvm->arch;
8052
8053                 spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
8054                 pvclock_update_vm_gtod_copy(kvm);
8055                 spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
8056
8057                 kvm_for_each_vcpu(cpu, vcpu, kvm)
8058                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8059
8060                 kvm_for_each_vcpu(cpu, vcpu, kvm)
8061                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
8062         }
8063         mutex_unlock(&kvm_lock);
8064 }
8065 #endif
8066
8067 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
8068 {
8069         struct kvm *kvm;
8070         struct kvm_vcpu *vcpu;
8071         int i, send_ipi = 0;
8072
8073         /*
8074          * We allow guests to temporarily run on slowing clocks,
8075          * provided we notify them after, or to run on accelerating
8076          * clocks, provided we notify them before.  Thus time never
8077          * goes backwards.
8078          *
8079          * However, we have a problem.  We can't atomically update
8080          * the frequency of a given CPU from this function; it is
8081          * merely a notifier, which can be called from any CPU.
8082          * Changing the TSC frequency at arbitrary points in time
8083          * requires a recomputation of local variables related to
8084          * the TSC for each VCPU.  We must flag these local variables
8085          * to be updated and be sure the update takes place with the
8086          * new frequency before any guests proceed.
8087          *
8088          * Unfortunately, the combination of hotplug CPU and frequency
8089          * change creates an intractable locking scenario; the order
8090          * of when these callouts happen is undefined with respect to
8091          * CPU hotplug, and they can race with each other.  As such,
8092          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
8093          * undefined; you can actually have a CPU frequency change take
8094          * place in between the computation of X and the setting of the
8095          * variable.  To protect against this problem, all updates of
8096          * the per_cpu tsc_khz variable are done in an interrupt
8097          * protected IPI, and all callers wishing to update the value
8098          * must wait for a synchronous IPI to complete (which is trivial
8099          * if the caller is on the CPU already).  This establishes the
8100          * necessary total order on variable updates.
8101          *
8102          * Note that because a guest time update may take place
8103          * anytime after the setting of the VCPU's request bit, the
8104          * correct TSC value must be set before the request.  However,
8105          * to ensure the update actually makes it to any guest which
8106          * starts running in hardware virtualization between the set
8107          * and the acquisition of the spinlock, we must also ping the
8108          * CPU after setting the request bit.
8109          *
8110          */
8111
8112         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8113
8114         mutex_lock(&kvm_lock);
8115         list_for_each_entry(kvm, &vm_list, vm_list) {
8116                 kvm_for_each_vcpu(i, vcpu, kvm) {
8117                         if (vcpu->cpu != cpu)
8118                                 continue;
8119                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8120                         if (vcpu->cpu != raw_smp_processor_id())
8121                                 send_ipi = 1;
8122                 }
8123         }
8124         mutex_unlock(&kvm_lock);
8125
8126         if (freq->old < freq->new && send_ipi) {
8127                 /*
8128                  * We upscale the frequency.  Must make the guest
8129                  * doesn't see old kvmclock values while running with
8130                  * the new frequency, otherwise we risk the guest sees
8131                  * time go backwards.
8132                  *
8133                  * In case we update the frequency for another cpu
8134                  * (which might be in guest context) send an interrupt
8135                  * to kick the cpu out of guest context.  Next time
8136                  * guest context is entered kvmclock will be updated,
8137                  * so the guest will not see stale values.
8138                  */
8139                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8140         }
8141 }
8142
8143 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
8144                                      void *data)
8145 {
8146         struct cpufreq_freqs *freq = data;
8147         int cpu;
8148
8149         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
8150                 return 0;
8151         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
8152                 return 0;
8153
8154         for_each_cpu(cpu, freq->policy->cpus)
8155                 __kvmclock_cpufreq_notifier(freq, cpu);
8156
8157         return 0;
8158 }
8159
8160 static struct notifier_block kvmclock_cpufreq_notifier_block = {
8161         .notifier_call  = kvmclock_cpufreq_notifier
8162 };
8163
8164 static int kvmclock_cpu_online(unsigned int cpu)
8165 {
8166         tsc_khz_changed(NULL);
8167         return 0;
8168 }
8169
8170 static void kvm_timer_init(void)
8171 {
8172         max_tsc_khz = tsc_khz;
8173
8174         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
8175 #ifdef CONFIG_CPU_FREQ
8176                 struct cpufreq_policy *policy;
8177                 int cpu;
8178
8179                 cpu = get_cpu();
8180                 policy = cpufreq_cpu_get(cpu);
8181                 if (policy) {
8182                         if (policy->cpuinfo.max_freq)
8183                                 max_tsc_khz = policy->cpuinfo.max_freq;
8184                         cpufreq_cpu_put(policy);
8185                 }
8186                 put_cpu();
8187 #endif
8188                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
8189                                           CPUFREQ_TRANSITION_NOTIFIER);
8190         }
8191
8192         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
8193                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
8194 }
8195
8196 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
8197 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
8198
8199 int kvm_is_in_guest(void)
8200 {
8201         return __this_cpu_read(current_vcpu) != NULL;
8202 }
8203
8204 static int kvm_is_user_mode(void)
8205 {
8206         int user_mode = 3;
8207
8208         if (__this_cpu_read(current_vcpu))
8209                 user_mode = static_call(kvm_x86_get_cpl)(__this_cpu_read(current_vcpu));
8210
8211         return user_mode != 0;
8212 }
8213
8214 static unsigned long kvm_get_guest_ip(void)
8215 {
8216         unsigned long ip = 0;
8217
8218         if (__this_cpu_read(current_vcpu))
8219                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
8220
8221         return ip;
8222 }
8223
8224 static void kvm_handle_intel_pt_intr(void)
8225 {
8226         struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
8227
8228         kvm_make_request(KVM_REQ_PMI, vcpu);
8229         __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
8230                         (unsigned long *)&vcpu->arch.pmu.global_status);
8231 }
8232
8233 static struct perf_guest_info_callbacks kvm_guest_cbs = {
8234         .is_in_guest            = kvm_is_in_guest,
8235         .is_user_mode           = kvm_is_user_mode,
8236         .get_guest_ip           = kvm_get_guest_ip,
8237         .handle_intel_pt_intr   = kvm_handle_intel_pt_intr,
8238 };
8239
8240 #ifdef CONFIG_X86_64
8241 static void pvclock_gtod_update_fn(struct work_struct *work)
8242 {
8243         struct kvm *kvm;
8244
8245         struct kvm_vcpu *vcpu;
8246         int i;
8247
8248         mutex_lock(&kvm_lock);
8249         list_for_each_entry(kvm, &vm_list, vm_list)
8250                 kvm_for_each_vcpu(i, vcpu, kvm)
8251                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
8252         atomic_set(&kvm_guest_has_master_clock, 0);
8253         mutex_unlock(&kvm_lock);
8254 }
8255
8256 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
8257
8258 /*
8259  * Indirection to move queue_work() out of the tk_core.seq write held
8260  * region to prevent possible deadlocks against time accessors which
8261  * are invoked with work related locks held.
8262  */
8263 static void pvclock_irq_work_fn(struct irq_work *w)
8264 {
8265         queue_work(system_long_wq, &pvclock_gtod_work);
8266 }
8267
8268 static DEFINE_IRQ_WORK(pvclock_irq_work, pvclock_irq_work_fn);
8269
8270 /*
8271  * Notification about pvclock gtod data update.
8272  */
8273 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
8274                                void *priv)
8275 {
8276         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
8277         struct timekeeper *tk = priv;
8278
8279         update_pvclock_gtod(tk);
8280
8281         /*
8282          * Disable master clock if host does not trust, or does not use,
8283          * TSC based clocksource. Delegate queue_work() to irq_work as
8284          * this is invoked with tk_core.seq write held.
8285          */
8286         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
8287             atomic_read(&kvm_guest_has_master_clock) != 0)
8288                 irq_work_queue(&pvclock_irq_work);
8289         return 0;
8290 }
8291
8292 static struct notifier_block pvclock_gtod_notifier = {
8293         .notifier_call = pvclock_gtod_notify,
8294 };
8295 #endif
8296
8297 int kvm_arch_init(void *opaque)
8298 {
8299         struct kvm_x86_init_ops *ops = opaque;
8300         int r;
8301
8302         if (kvm_x86_ops.hardware_enable) {
8303                 printk(KERN_ERR "kvm: already loaded the other module\n");
8304                 r = -EEXIST;
8305                 goto out;
8306         }
8307
8308         if (!ops->cpu_has_kvm_support()) {
8309                 pr_err_ratelimited("kvm: no hardware support\n");
8310                 r = -EOPNOTSUPP;
8311                 goto out;
8312         }
8313         if (ops->disabled_by_bios()) {
8314                 pr_err_ratelimited("kvm: disabled by bios\n");
8315                 r = -EOPNOTSUPP;
8316                 goto out;
8317         }
8318
8319         /*
8320          * KVM explicitly assumes that the guest has an FPU and
8321          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
8322          * vCPU's FPU state as a fxregs_state struct.
8323          */
8324         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
8325                 printk(KERN_ERR "kvm: inadequate fpu\n");
8326                 r = -EOPNOTSUPP;
8327                 goto out;
8328         }
8329
8330         r = -ENOMEM;
8331         x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
8332                                           __alignof__(struct fpu), SLAB_ACCOUNT,
8333                                           NULL);
8334         if (!x86_fpu_cache) {
8335                 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
8336                 goto out;
8337         }
8338
8339         x86_emulator_cache = kvm_alloc_emulator_cache();
8340         if (!x86_emulator_cache) {
8341                 pr_err("kvm: failed to allocate cache for x86 emulator\n");
8342                 goto out_free_x86_fpu_cache;
8343         }
8344
8345         user_return_msrs = alloc_percpu(struct kvm_user_return_msrs);
8346         if (!user_return_msrs) {
8347                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_user_return_msrs\n");
8348                 goto out_free_x86_emulator_cache;
8349         }
8350         kvm_nr_uret_msrs = 0;
8351
8352         r = kvm_mmu_module_init();
8353         if (r)
8354                 goto out_free_percpu;
8355
8356         kvm_timer_init();
8357
8358         perf_register_guest_info_callbacks(&kvm_guest_cbs);
8359
8360         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
8361                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
8362                 supported_xcr0 = host_xcr0 & KVM_SUPPORTED_XCR0;
8363         }
8364
8365         if (pi_inject_timer == -1)
8366                 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
8367 #ifdef CONFIG_X86_64
8368         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
8369
8370         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8371                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
8372 #endif
8373
8374         return 0;
8375
8376 out_free_percpu:
8377         free_percpu(user_return_msrs);
8378 out_free_x86_emulator_cache:
8379         kmem_cache_destroy(x86_emulator_cache);
8380 out_free_x86_fpu_cache:
8381         kmem_cache_destroy(x86_fpu_cache);
8382 out:
8383         return r;
8384 }
8385
8386 void kvm_arch_exit(void)
8387 {
8388 #ifdef CONFIG_X86_64
8389         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8390                 clear_hv_tscchange_cb();
8391 #endif
8392         kvm_lapic_exit();
8393         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
8394
8395         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8396                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
8397                                             CPUFREQ_TRANSITION_NOTIFIER);
8398         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
8399 #ifdef CONFIG_X86_64
8400         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
8401         irq_work_sync(&pvclock_irq_work);
8402         cancel_work_sync(&pvclock_gtod_work);
8403 #endif
8404         kvm_x86_ops.hardware_enable = NULL;
8405         kvm_mmu_module_exit();
8406         free_percpu(user_return_msrs);
8407         kmem_cache_destroy(x86_emulator_cache);
8408         kmem_cache_destroy(x86_fpu_cache);
8409 #ifdef CONFIG_KVM_XEN
8410         static_key_deferred_flush(&kvm_xen_enabled);
8411         WARN_ON(static_branch_unlikely(&kvm_xen_enabled.key));
8412 #endif
8413 }
8414
8415 static int __kvm_vcpu_halt(struct kvm_vcpu *vcpu, int state, int reason)
8416 {
8417         ++vcpu->stat.halt_exits;
8418         if (lapic_in_kernel(vcpu)) {
8419                 vcpu->arch.mp_state = state;
8420                 return 1;
8421         } else {
8422                 vcpu->run->exit_reason = reason;
8423                 return 0;
8424         }
8425 }
8426
8427 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
8428 {
8429         return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_HALTED, KVM_EXIT_HLT);
8430 }
8431 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
8432
8433 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
8434 {
8435         int ret = kvm_skip_emulated_instruction(vcpu);
8436         /*
8437          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
8438          * KVM_EXIT_DEBUG here.
8439          */
8440         return kvm_vcpu_halt(vcpu) && ret;
8441 }
8442 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
8443
8444 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu)
8445 {
8446         int ret = kvm_skip_emulated_instruction(vcpu);
8447
8448         return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_AP_RESET_HOLD, KVM_EXIT_AP_RESET_HOLD) && ret;
8449 }
8450 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold);
8451
8452 #ifdef CONFIG_X86_64
8453 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
8454                                 unsigned long clock_type)
8455 {
8456         struct kvm_clock_pairing clock_pairing;
8457         struct timespec64 ts;
8458         u64 cycle;
8459         int ret;
8460
8461         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
8462                 return -KVM_EOPNOTSUPP;
8463
8464         if (!kvm_get_walltime_and_clockread(&ts, &cycle))
8465                 return -KVM_EOPNOTSUPP;
8466
8467         clock_pairing.sec = ts.tv_sec;
8468         clock_pairing.nsec = ts.tv_nsec;
8469         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
8470         clock_pairing.flags = 0;
8471         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
8472
8473         ret = 0;
8474         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
8475                             sizeof(struct kvm_clock_pairing)))
8476                 ret = -KVM_EFAULT;
8477
8478         return ret;
8479 }
8480 #endif
8481
8482 /*
8483  * kvm_pv_kick_cpu_op:  Kick a vcpu.
8484  *
8485  * @apicid - apicid of vcpu to be kicked.
8486  */
8487 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
8488 {
8489         struct kvm_lapic_irq lapic_irq;
8490
8491         lapic_irq.shorthand = APIC_DEST_NOSHORT;
8492         lapic_irq.dest_mode = APIC_DEST_PHYSICAL;
8493         lapic_irq.level = 0;
8494         lapic_irq.dest_id = apicid;
8495         lapic_irq.msi_redir_hint = false;
8496
8497         lapic_irq.delivery_mode = APIC_DM_REMRD;
8498         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
8499 }
8500
8501 bool kvm_apicv_activated(struct kvm *kvm)
8502 {
8503         return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
8504 }
8505 EXPORT_SYMBOL_GPL(kvm_apicv_activated);
8506
8507 static void kvm_apicv_init(struct kvm *kvm)
8508 {
8509         if (enable_apicv)
8510                 clear_bit(APICV_INHIBIT_REASON_DISABLE,
8511                           &kvm->arch.apicv_inhibit_reasons);
8512         else
8513                 set_bit(APICV_INHIBIT_REASON_DISABLE,
8514                         &kvm->arch.apicv_inhibit_reasons);
8515 }
8516
8517 static void kvm_sched_yield(struct kvm_vcpu *vcpu, unsigned long dest_id)
8518 {
8519         struct kvm_vcpu *target = NULL;
8520         struct kvm_apic_map *map;
8521
8522         vcpu->stat.directed_yield_attempted++;
8523
8524         if (single_task_running())
8525                 goto no_yield;
8526
8527         rcu_read_lock();
8528         map = rcu_dereference(vcpu->kvm->arch.apic_map);
8529
8530         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
8531                 target = map->phys_map[dest_id]->vcpu;
8532
8533         rcu_read_unlock();
8534
8535         if (!target || !READ_ONCE(target->ready))
8536                 goto no_yield;
8537
8538         /* Ignore requests to yield to self */
8539         if (vcpu == target)
8540                 goto no_yield;
8541
8542         if (kvm_vcpu_yield_to(target) <= 0)
8543                 goto no_yield;
8544
8545         vcpu->stat.directed_yield_successful++;
8546
8547 no_yield:
8548         return;
8549 }
8550
8551 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
8552 {
8553         unsigned long nr, a0, a1, a2, a3, ret;
8554         int op_64_bit;
8555
8556         if (kvm_xen_hypercall_enabled(vcpu->kvm))
8557                 return kvm_xen_hypercall(vcpu);
8558
8559         if (kvm_hv_hypercall_enabled(vcpu))
8560                 return kvm_hv_hypercall(vcpu);
8561
8562         nr = kvm_rax_read(vcpu);
8563         a0 = kvm_rbx_read(vcpu);
8564         a1 = kvm_rcx_read(vcpu);
8565         a2 = kvm_rdx_read(vcpu);
8566         a3 = kvm_rsi_read(vcpu);
8567
8568         trace_kvm_hypercall(nr, a0, a1, a2, a3);
8569
8570         op_64_bit = is_64_bit_mode(vcpu);
8571         if (!op_64_bit) {
8572                 nr &= 0xFFFFFFFF;
8573                 a0 &= 0xFFFFFFFF;
8574                 a1 &= 0xFFFFFFFF;
8575                 a2 &= 0xFFFFFFFF;
8576                 a3 &= 0xFFFFFFFF;
8577         }
8578
8579         if (static_call(kvm_x86_get_cpl)(vcpu) != 0) {
8580                 ret = -KVM_EPERM;
8581                 goto out;
8582         }
8583
8584         ret = -KVM_ENOSYS;
8585
8586         switch (nr) {
8587         case KVM_HC_VAPIC_POLL_IRQ:
8588                 ret = 0;
8589                 break;
8590         case KVM_HC_KICK_CPU:
8591                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_UNHALT))
8592                         break;
8593
8594                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
8595                 kvm_sched_yield(vcpu, a1);
8596                 ret = 0;
8597                 break;
8598 #ifdef CONFIG_X86_64
8599         case KVM_HC_CLOCK_PAIRING:
8600                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
8601                 break;
8602 #endif
8603         case KVM_HC_SEND_IPI:
8604                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SEND_IPI))
8605                         break;
8606
8607                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
8608                 break;
8609         case KVM_HC_SCHED_YIELD:
8610                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SCHED_YIELD))
8611                         break;
8612
8613                 kvm_sched_yield(vcpu, a0);
8614                 ret = 0;
8615                 break;
8616         default:
8617                 ret = -KVM_ENOSYS;
8618                 break;
8619         }
8620 out:
8621         if (!op_64_bit)
8622                 ret = (u32)ret;
8623         kvm_rax_write(vcpu, ret);
8624
8625         ++vcpu->stat.hypercalls;
8626         return kvm_skip_emulated_instruction(vcpu);
8627 }
8628 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
8629
8630 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
8631 {
8632         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8633         char instruction[3];
8634         unsigned long rip = kvm_rip_read(vcpu);
8635
8636         static_call(kvm_x86_patch_hypercall)(vcpu, instruction);
8637
8638         return emulator_write_emulated(ctxt, rip, instruction, 3,
8639                 &ctxt->exception);
8640 }
8641
8642 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
8643 {
8644         return vcpu->run->request_interrupt_window &&
8645                 likely(!pic_in_kernel(vcpu->kvm));
8646 }
8647
8648 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
8649 {
8650         struct kvm_run *kvm_run = vcpu->run;
8651
8652         /*
8653          * if_flag is obsolete and useless, so do not bother
8654          * setting it for SEV-ES guests.  Userspace can just
8655          * use kvm_run->ready_for_interrupt_injection.
8656          */
8657         kvm_run->if_flag = !vcpu->arch.guest_state_protected
8658                 && (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
8659
8660         kvm_run->cr8 = kvm_get_cr8(vcpu);
8661         kvm_run->apic_base = kvm_get_apic_base(vcpu);
8662         kvm_run->ready_for_interrupt_injection =
8663                 pic_in_kernel(vcpu->kvm) ||
8664                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
8665
8666         if (is_smm(vcpu))
8667                 kvm_run->flags |= KVM_RUN_X86_SMM;
8668 }
8669
8670 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
8671 {
8672         int max_irr, tpr;
8673
8674         if (!kvm_x86_ops.update_cr8_intercept)
8675                 return;
8676
8677         if (!lapic_in_kernel(vcpu))
8678                 return;
8679
8680         if (vcpu->arch.apicv_active)
8681                 return;
8682
8683         if (!vcpu->arch.apic->vapic_addr)
8684                 max_irr = kvm_lapic_find_highest_irr(vcpu);
8685         else
8686                 max_irr = -1;
8687
8688         if (max_irr != -1)
8689                 max_irr >>= 4;
8690
8691         tpr = kvm_lapic_get_cr8(vcpu);
8692
8693         static_call(kvm_x86_update_cr8_intercept)(vcpu, tpr, max_irr);
8694 }
8695
8696
8697 int kvm_check_nested_events(struct kvm_vcpu *vcpu)
8698 {
8699         if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
8700                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
8701                 return 1;
8702         }
8703
8704         return kvm_x86_ops.nested_ops->check_events(vcpu);
8705 }
8706
8707 static void kvm_inject_exception(struct kvm_vcpu *vcpu)
8708 {
8709         if (vcpu->arch.exception.error_code && !is_protmode(vcpu))
8710                 vcpu->arch.exception.error_code = false;
8711         static_call(kvm_x86_queue_exception)(vcpu);
8712 }
8713
8714 static int inject_pending_event(struct kvm_vcpu *vcpu, bool *req_immediate_exit)
8715 {
8716         int r;
8717         bool can_inject = true;
8718
8719         /* try to reinject previous events if any */
8720
8721         if (vcpu->arch.exception.injected) {
8722                 kvm_inject_exception(vcpu);
8723                 can_inject = false;
8724         }
8725         /*
8726          * Do not inject an NMI or interrupt if there is a pending
8727          * exception.  Exceptions and interrupts are recognized at
8728          * instruction boundaries, i.e. the start of an instruction.
8729          * Trap-like exceptions, e.g. #DB, have higher priority than
8730          * NMIs and interrupts, i.e. traps are recognized before an
8731          * NMI/interrupt that's pending on the same instruction.
8732          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
8733          * priority, but are only generated (pended) during instruction
8734          * execution, i.e. a pending fault-like exception means the
8735          * fault occurred on the *previous* instruction and must be
8736          * serviced prior to recognizing any new events in order to
8737          * fully complete the previous instruction.
8738          */
8739         else if (!vcpu->arch.exception.pending) {
8740                 if (vcpu->arch.nmi_injected) {
8741                         static_call(kvm_x86_set_nmi)(vcpu);
8742                         can_inject = false;
8743                 } else if (vcpu->arch.interrupt.injected) {
8744                         static_call(kvm_x86_set_irq)(vcpu);
8745                         can_inject = false;
8746                 }
8747         }
8748
8749         WARN_ON_ONCE(vcpu->arch.exception.injected &&
8750                      vcpu->arch.exception.pending);
8751
8752         /*
8753          * Call check_nested_events() even if we reinjected a previous event
8754          * in order for caller to determine if it should require immediate-exit
8755          * from L2 to L1 due to pending L1 events which require exit
8756          * from L2 to L1.
8757          */
8758         if (is_guest_mode(vcpu)) {
8759                 r = kvm_check_nested_events(vcpu);
8760                 if (r < 0)
8761                         goto out;
8762         }
8763
8764         /* try to inject new event if pending */
8765         if (vcpu->arch.exception.pending) {
8766                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
8767                                         vcpu->arch.exception.has_error_code,
8768                                         vcpu->arch.exception.error_code);
8769
8770                 vcpu->arch.exception.pending = false;
8771                 vcpu->arch.exception.injected = true;
8772
8773                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
8774                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
8775                                              X86_EFLAGS_RF);
8776
8777                 if (vcpu->arch.exception.nr == DB_VECTOR) {
8778                         kvm_deliver_exception_payload(vcpu);
8779                         if (vcpu->arch.dr7 & DR7_GD) {
8780                                 vcpu->arch.dr7 &= ~DR7_GD;
8781                                 kvm_update_dr7(vcpu);
8782                         }
8783                 }
8784
8785                 kvm_inject_exception(vcpu);
8786                 can_inject = false;
8787         }
8788
8789         /*
8790          * Finally, inject interrupt events.  If an event cannot be injected
8791          * due to architectural conditions (e.g. IF=0) a window-open exit
8792          * will re-request KVM_REQ_EVENT.  Sometimes however an event is pending
8793          * and can architecturally be injected, but we cannot do it right now:
8794          * an interrupt could have arrived just now and we have to inject it
8795          * as a vmexit, or there could already an event in the queue, which is
8796          * indicated by can_inject.  In that case we request an immediate exit
8797          * in order to make progress and get back here for another iteration.
8798          * The kvm_x86_ops hooks communicate this by returning -EBUSY.
8799          */
8800         if (vcpu->arch.smi_pending) {
8801                 r = can_inject ? static_call(kvm_x86_smi_allowed)(vcpu, true) : -EBUSY;
8802                 if (r < 0)
8803                         goto out;
8804                 if (r) {
8805                         vcpu->arch.smi_pending = false;
8806                         ++vcpu->arch.smi_count;
8807                         enter_smm(vcpu);
8808                         can_inject = false;
8809                 } else
8810                         static_call(kvm_x86_enable_smi_window)(vcpu);
8811         }
8812
8813         if (vcpu->arch.nmi_pending) {
8814                 r = can_inject ? static_call(kvm_x86_nmi_allowed)(vcpu, true) : -EBUSY;
8815                 if (r < 0)
8816                         goto out;
8817                 if (r) {
8818                         --vcpu->arch.nmi_pending;
8819                         vcpu->arch.nmi_injected = true;
8820                         static_call(kvm_x86_set_nmi)(vcpu);
8821                         can_inject = false;
8822                         WARN_ON(static_call(kvm_x86_nmi_allowed)(vcpu, true) < 0);
8823                 }
8824                 if (vcpu->arch.nmi_pending)
8825                         static_call(kvm_x86_enable_nmi_window)(vcpu);
8826         }
8827
8828         if (kvm_cpu_has_injectable_intr(vcpu)) {
8829                 r = can_inject ? static_call(kvm_x86_interrupt_allowed)(vcpu, true) : -EBUSY;
8830                 if (r < 0)
8831                         goto out;
8832                 if (r) {
8833                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu), false);
8834                         static_call(kvm_x86_set_irq)(vcpu);
8835                         WARN_ON(static_call(kvm_x86_interrupt_allowed)(vcpu, true) < 0);
8836                 }
8837                 if (kvm_cpu_has_injectable_intr(vcpu))
8838                         static_call(kvm_x86_enable_irq_window)(vcpu);
8839         }
8840
8841         if (is_guest_mode(vcpu) &&
8842             kvm_x86_ops.nested_ops->hv_timer_pending &&
8843             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
8844                 *req_immediate_exit = true;
8845
8846         WARN_ON(vcpu->arch.exception.pending);
8847         return 0;
8848
8849 out:
8850         if (r == -EBUSY) {
8851                 *req_immediate_exit = true;
8852                 r = 0;
8853         }
8854         return r;
8855 }
8856
8857 static void process_nmi(struct kvm_vcpu *vcpu)
8858 {
8859         unsigned limit = 2;
8860
8861         /*
8862          * x86 is limited to one NMI running, and one NMI pending after it.
8863          * If an NMI is already in progress, limit further NMIs to just one.
8864          * Otherwise, allow two (and we'll inject the first one immediately).
8865          */
8866         if (static_call(kvm_x86_get_nmi_mask)(vcpu) || vcpu->arch.nmi_injected)
8867                 limit = 1;
8868
8869         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
8870         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
8871         kvm_make_request(KVM_REQ_EVENT, vcpu);
8872 }
8873
8874 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
8875 {
8876         u32 flags = 0;
8877         flags |= seg->g       << 23;
8878         flags |= seg->db      << 22;
8879         flags |= seg->l       << 21;
8880         flags |= seg->avl     << 20;
8881         flags |= seg->present << 15;
8882         flags |= seg->dpl     << 13;
8883         flags |= seg->s       << 12;
8884         flags |= seg->type    << 8;
8885         return flags;
8886 }
8887
8888 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
8889 {
8890         struct kvm_segment seg;
8891         int offset;
8892
8893         kvm_get_segment(vcpu, &seg, n);
8894         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
8895
8896         if (n < 3)
8897                 offset = 0x7f84 + n * 12;
8898         else
8899                 offset = 0x7f2c + (n - 3) * 12;
8900
8901         put_smstate(u32, buf, offset + 8, seg.base);
8902         put_smstate(u32, buf, offset + 4, seg.limit);
8903         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
8904 }
8905
8906 #ifdef CONFIG_X86_64
8907 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
8908 {
8909         struct kvm_segment seg;
8910         int offset;
8911         u16 flags;
8912
8913         kvm_get_segment(vcpu, &seg, n);
8914         offset = 0x7e00 + n * 16;
8915
8916         flags = enter_smm_get_segment_flags(&seg) >> 8;
8917         put_smstate(u16, buf, offset, seg.selector);
8918         put_smstate(u16, buf, offset + 2, flags);
8919         put_smstate(u32, buf, offset + 4, seg.limit);
8920         put_smstate(u64, buf, offset + 8, seg.base);
8921 }
8922 #endif
8923
8924 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
8925 {
8926         struct desc_ptr dt;
8927         struct kvm_segment seg;
8928         unsigned long val;
8929         int i;
8930
8931         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
8932         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
8933         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
8934         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
8935
8936         for (i = 0; i < 8; i++)
8937                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read_raw(vcpu, i));
8938
8939         kvm_get_dr(vcpu, 6, &val);
8940         put_smstate(u32, buf, 0x7fcc, (u32)val);
8941         kvm_get_dr(vcpu, 7, &val);
8942         put_smstate(u32, buf, 0x7fc8, (u32)val);
8943
8944         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
8945         put_smstate(u32, buf, 0x7fc4, seg.selector);
8946         put_smstate(u32, buf, 0x7f64, seg.base);
8947         put_smstate(u32, buf, 0x7f60, seg.limit);
8948         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
8949
8950         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
8951         put_smstate(u32, buf, 0x7fc0, seg.selector);
8952         put_smstate(u32, buf, 0x7f80, seg.base);
8953         put_smstate(u32, buf, 0x7f7c, seg.limit);
8954         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
8955
8956         static_call(kvm_x86_get_gdt)(vcpu, &dt);
8957         put_smstate(u32, buf, 0x7f74, dt.address);
8958         put_smstate(u32, buf, 0x7f70, dt.size);
8959
8960         static_call(kvm_x86_get_idt)(vcpu, &dt);
8961         put_smstate(u32, buf, 0x7f58, dt.address);
8962         put_smstate(u32, buf, 0x7f54, dt.size);
8963
8964         for (i = 0; i < 6; i++)
8965                 enter_smm_save_seg_32(vcpu, buf, i);
8966
8967         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
8968
8969         /* revision id */
8970         put_smstate(u32, buf, 0x7efc, 0x00020000);
8971         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
8972 }
8973
8974 #ifdef CONFIG_X86_64
8975 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
8976 {
8977         struct desc_ptr dt;
8978         struct kvm_segment seg;
8979         unsigned long val;
8980         int i;
8981
8982         for (i = 0; i < 16; i++)
8983                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read_raw(vcpu, i));
8984
8985         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
8986         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
8987
8988         kvm_get_dr(vcpu, 6, &val);
8989         put_smstate(u64, buf, 0x7f68, val);
8990         kvm_get_dr(vcpu, 7, &val);
8991         put_smstate(u64, buf, 0x7f60, val);
8992
8993         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
8994         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
8995         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
8996
8997         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
8998
8999         /* revision id */
9000         put_smstate(u32, buf, 0x7efc, 0x00020064);
9001
9002         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
9003
9004         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
9005         put_smstate(u16, buf, 0x7e90, seg.selector);
9006         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
9007         put_smstate(u32, buf, 0x7e94, seg.limit);
9008         put_smstate(u64, buf, 0x7e98, seg.base);
9009
9010         static_call(kvm_x86_get_idt)(vcpu, &dt);
9011         put_smstate(u32, buf, 0x7e84, dt.size);
9012         put_smstate(u64, buf, 0x7e88, dt.address);
9013
9014         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
9015         put_smstate(u16, buf, 0x7e70, seg.selector);
9016         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
9017         put_smstate(u32, buf, 0x7e74, seg.limit);
9018         put_smstate(u64, buf, 0x7e78, seg.base);
9019
9020         static_call(kvm_x86_get_gdt)(vcpu, &dt);
9021         put_smstate(u32, buf, 0x7e64, dt.size);
9022         put_smstate(u64, buf, 0x7e68, dt.address);
9023
9024         for (i = 0; i < 6; i++)
9025                 enter_smm_save_seg_64(vcpu, buf, i);
9026 }
9027 #endif
9028
9029 static void enter_smm(struct kvm_vcpu *vcpu)
9030 {
9031         struct kvm_segment cs, ds;
9032         struct desc_ptr dt;
9033         char buf[512];
9034         u32 cr0;
9035
9036         memset(buf, 0, 512);
9037 #ifdef CONFIG_X86_64
9038         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9039                 enter_smm_save_state_64(vcpu, buf);
9040         else
9041 #endif
9042                 enter_smm_save_state_32(vcpu, buf);
9043
9044         /*
9045          * Give enter_smm() a chance to make ISA-specific changes to the vCPU
9046          * state (e.g. leave guest mode) after we've saved the state into the
9047          * SMM state-save area.
9048          */
9049         static_call(kvm_x86_enter_smm)(vcpu, buf);
9050
9051         kvm_smm_changed(vcpu, true);
9052         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
9053
9054         if (static_call(kvm_x86_get_nmi_mask)(vcpu))
9055                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
9056         else
9057                 static_call(kvm_x86_set_nmi_mask)(vcpu, true);
9058
9059         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
9060         kvm_rip_write(vcpu, 0x8000);
9061
9062         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
9063         static_call(kvm_x86_set_cr0)(vcpu, cr0);
9064         vcpu->arch.cr0 = cr0;
9065
9066         static_call(kvm_x86_set_cr4)(vcpu, 0);
9067
9068         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
9069         dt.address = dt.size = 0;
9070         static_call(kvm_x86_set_idt)(vcpu, &dt);
9071
9072         kvm_set_dr(vcpu, 7, DR7_FIXED_1);
9073
9074         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
9075         cs.base = vcpu->arch.smbase;
9076
9077         ds.selector = 0;
9078         ds.base = 0;
9079
9080         cs.limit    = ds.limit = 0xffffffff;
9081         cs.type     = ds.type = 0x3;
9082         cs.dpl      = ds.dpl = 0;
9083         cs.db       = ds.db = 0;
9084         cs.s        = ds.s = 1;
9085         cs.l        = ds.l = 0;
9086         cs.g        = ds.g = 1;
9087         cs.avl      = ds.avl = 0;
9088         cs.present  = ds.present = 1;
9089         cs.unusable = ds.unusable = 0;
9090         cs.padding  = ds.padding = 0;
9091
9092         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
9093         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
9094         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
9095         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
9096         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
9097         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
9098
9099 #ifdef CONFIG_X86_64
9100         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9101                 static_call(kvm_x86_set_efer)(vcpu, 0);
9102 #endif
9103
9104         kvm_update_cpuid_runtime(vcpu);
9105         kvm_mmu_reset_context(vcpu);
9106 }
9107
9108 static void process_smi(struct kvm_vcpu *vcpu)
9109 {
9110         vcpu->arch.smi_pending = true;
9111         kvm_make_request(KVM_REQ_EVENT, vcpu);
9112 }
9113
9114 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
9115                                        unsigned long *vcpu_bitmap)
9116 {
9117         cpumask_var_t cpus;
9118
9119         zalloc_cpumask_var(&cpus, GFP_ATOMIC);
9120
9121         kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC,
9122                                     NULL, vcpu_bitmap, cpus);
9123
9124         free_cpumask_var(cpus);
9125 }
9126
9127 void kvm_make_scan_ioapic_request(struct kvm *kvm)
9128 {
9129         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
9130 }
9131
9132 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
9133 {
9134         if (!lapic_in_kernel(vcpu))
9135                 return;
9136
9137         vcpu->arch.apicv_active = kvm_apicv_activated(vcpu->kvm);
9138         kvm_apic_update_apicv(vcpu);
9139         static_call(kvm_x86_refresh_apicv_exec_ctrl)(vcpu);
9140 }
9141 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv);
9142
9143 /*
9144  * NOTE: Do not hold any lock prior to calling this.
9145  *
9146  * In particular, kvm_request_apicv_update() expects kvm->srcu not to be
9147  * locked, because it calls __x86_set_memory_region() which does
9148  * synchronize_srcu(&kvm->srcu).
9149  */
9150 void kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
9151 {
9152         struct kvm_vcpu *except;
9153         unsigned long old, new, expected;
9154
9155         if (!kvm_x86_ops.check_apicv_inhibit_reasons ||
9156             !static_call(kvm_x86_check_apicv_inhibit_reasons)(bit))
9157                 return;
9158
9159         old = READ_ONCE(kvm->arch.apicv_inhibit_reasons);
9160         do {
9161                 expected = new = old;
9162                 if (activate)
9163                         __clear_bit(bit, &new);
9164                 else
9165                         __set_bit(bit, &new);
9166                 if (new == old)
9167                         break;
9168                 old = cmpxchg(&kvm->arch.apicv_inhibit_reasons, expected, new);
9169         } while (old != expected);
9170
9171         if (!!old == !!new)
9172                 return;
9173
9174         trace_kvm_apicv_update_request(activate, bit);
9175         if (kvm_x86_ops.pre_update_apicv_exec_ctrl)
9176                 static_call(kvm_x86_pre_update_apicv_exec_ctrl)(kvm, activate);
9177
9178         /*
9179          * Sending request to update APICV for all other vcpus,
9180          * while update the calling vcpu immediately instead of
9181          * waiting for another #VMEXIT to handle the request.
9182          */
9183         except = kvm_get_running_vcpu();
9184         kvm_make_all_cpus_request_except(kvm, KVM_REQ_APICV_UPDATE,
9185                                          except);
9186         if (except)
9187                 kvm_vcpu_update_apicv(except);
9188 }
9189 EXPORT_SYMBOL_GPL(kvm_request_apicv_update);
9190
9191 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
9192 {
9193         if (!kvm_apic_present(vcpu))
9194                 return;
9195
9196         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
9197
9198         if (irqchip_split(vcpu->kvm))
9199                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
9200         else {
9201                 if (vcpu->arch.apicv_active)
9202                         static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9203                 if (ioapic_in_kernel(vcpu->kvm))
9204                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
9205         }
9206
9207         if (is_guest_mode(vcpu))
9208                 vcpu->arch.load_eoi_exitmap_pending = true;
9209         else
9210                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
9211 }
9212
9213 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
9214 {
9215         u64 eoi_exit_bitmap[4];
9216
9217         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
9218                 return;
9219
9220         if (to_hv_vcpu(vcpu))
9221                 bitmap_or((ulong *)eoi_exit_bitmap,
9222                           vcpu->arch.ioapic_handled_vectors,
9223                           to_hv_synic(vcpu)->vec_bitmap, 256);
9224
9225         static_call(kvm_x86_load_eoi_exitmap)(vcpu, eoi_exit_bitmap);
9226 }
9227
9228 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
9229                                             unsigned long start, unsigned long end)
9230 {
9231         unsigned long apic_address;
9232
9233         /*
9234          * The physical address of apic access page is stored in the VMCS.
9235          * Update it when it becomes invalid.
9236          */
9237         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
9238         if (start <= apic_address && apic_address < end)
9239                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
9240 }
9241
9242 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
9243 {
9244         if (!lapic_in_kernel(vcpu))
9245                 return;
9246
9247         if (!kvm_x86_ops.set_apic_access_page_addr)
9248                 return;
9249
9250         static_call(kvm_x86_set_apic_access_page_addr)(vcpu);
9251 }
9252
9253 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
9254 {
9255         smp_send_reschedule(vcpu->cpu);
9256 }
9257 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
9258
9259 /*
9260  * Returns 1 to let vcpu_run() continue the guest execution loop without
9261  * exiting to the userspace.  Otherwise, the value will be returned to the
9262  * userspace.
9263  */
9264 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
9265 {
9266         int r;
9267         bool req_int_win =
9268                 dm_request_for_irq_injection(vcpu) &&
9269                 kvm_cpu_accept_dm_intr(vcpu);
9270         fastpath_t exit_fastpath;
9271
9272         bool req_immediate_exit = false;
9273
9274         /* Forbid vmenter if vcpu dirty ring is soft-full */
9275         if (unlikely(vcpu->kvm->dirty_ring_size &&
9276                      kvm_dirty_ring_soft_full(&vcpu->dirty_ring))) {
9277                 vcpu->run->exit_reason = KVM_EXIT_DIRTY_RING_FULL;
9278                 trace_kvm_dirty_ring_exit(vcpu);
9279                 r = 0;
9280                 goto out;
9281         }
9282
9283         if (kvm_request_pending(vcpu)) {
9284                 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu)) {
9285                         if (unlikely(!kvm_x86_ops.nested_ops->get_nested_state_pages(vcpu))) {
9286                                 r = 0;
9287                                 goto out;
9288                         }
9289                 }
9290                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
9291                         kvm_mmu_unload(vcpu);
9292                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
9293                         __kvm_migrate_timers(vcpu);
9294                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
9295                         kvm_gen_update_masterclock(vcpu->kvm);
9296                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
9297                         kvm_gen_kvmclock_update(vcpu);
9298                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
9299                         r = kvm_guest_time_update(vcpu);
9300                         if (unlikely(r))
9301                                 goto out;
9302                 }
9303                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
9304                         kvm_mmu_sync_roots(vcpu);
9305                 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD, vcpu))
9306                         kvm_mmu_load_pgd(vcpu);
9307                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) {
9308                         kvm_vcpu_flush_tlb_all(vcpu);
9309
9310                         /* Flushing all ASIDs flushes the current ASID... */
9311                         kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
9312                 }
9313                 if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu))
9314                         kvm_vcpu_flush_tlb_current(vcpu);
9315                 if (kvm_check_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu))
9316                         kvm_vcpu_flush_tlb_guest(vcpu);
9317
9318                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
9319                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
9320                         r = 0;
9321                         goto out;
9322                 }
9323                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
9324                         if (is_guest_mode(vcpu)) {
9325                                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
9326                         } else {
9327                                 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
9328                                 vcpu->mmio_needed = 0;
9329                                 r = 0;
9330                                 goto out;
9331                         }
9332                 }
9333                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
9334                         /* Page is swapped out. Do synthetic halt */
9335                         vcpu->arch.apf.halted = true;
9336                         r = 1;
9337                         goto out;
9338                 }
9339                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
9340                         record_steal_time(vcpu);
9341                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
9342                         process_smi(vcpu);
9343                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
9344                         process_nmi(vcpu);
9345                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
9346                         kvm_pmu_handle_event(vcpu);
9347                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
9348                         kvm_pmu_deliver_pmi(vcpu);
9349                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
9350                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
9351                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
9352                                      vcpu->arch.ioapic_handled_vectors)) {
9353                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
9354                                 vcpu->run->eoi.vector =
9355                                                 vcpu->arch.pending_ioapic_eoi;
9356                                 r = 0;
9357                                 goto out;
9358                         }
9359                 }
9360                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
9361                         vcpu_scan_ioapic(vcpu);
9362                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
9363                         vcpu_load_eoi_exitmap(vcpu);
9364                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
9365                         kvm_vcpu_reload_apic_access_page(vcpu);
9366                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
9367                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9368                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
9369                         r = 0;
9370                         goto out;
9371                 }
9372                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
9373                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9374                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
9375                         r = 0;
9376                         goto out;
9377                 }
9378                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
9379                         struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
9380
9381                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
9382                         vcpu->run->hyperv = hv_vcpu->exit;
9383                         r = 0;
9384                         goto out;
9385                 }
9386
9387                 /*
9388                  * KVM_REQ_HV_STIMER has to be processed after
9389                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
9390                  * depend on the guest clock being up-to-date
9391                  */
9392                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
9393                         kvm_hv_process_stimers(vcpu);
9394                 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
9395                         kvm_vcpu_update_apicv(vcpu);
9396                 if (kvm_check_request(KVM_REQ_APF_READY, vcpu))
9397                         kvm_check_async_pf_completion(vcpu);
9398                 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED, vcpu))
9399                         static_call(kvm_x86_msr_filter_changed)(vcpu);
9400
9401                 if (kvm_check_request(KVM_REQ_UPDATE_CPU_DIRTY_LOGGING, vcpu))
9402                         static_call(kvm_x86_update_cpu_dirty_logging)(vcpu);
9403         }
9404
9405         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win ||
9406             kvm_xen_has_interrupt(vcpu)) {
9407                 ++vcpu->stat.req_event;
9408                 r = kvm_apic_accept_events(vcpu);
9409                 if (r < 0) {
9410                         r = 0;
9411                         goto out;
9412                 }
9413                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
9414                         r = 1;
9415                         goto out;
9416                 }
9417
9418                 r = inject_pending_event(vcpu, &req_immediate_exit);
9419                 if (r < 0) {
9420                         r = 0;
9421                         goto out;
9422                 }
9423                 if (req_int_win)
9424                         static_call(kvm_x86_enable_irq_window)(vcpu);
9425
9426                 if (kvm_lapic_enabled(vcpu)) {
9427                         update_cr8_intercept(vcpu);
9428                         kvm_lapic_sync_to_vapic(vcpu);
9429                 }
9430         }
9431
9432         r = kvm_mmu_reload(vcpu);
9433         if (unlikely(r)) {
9434                 goto cancel_injection;
9435         }
9436
9437         preempt_disable();
9438
9439         static_call(kvm_x86_prepare_guest_switch)(vcpu);
9440
9441         /*
9442          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
9443          * IPI are then delayed after guest entry, which ensures that they
9444          * result in virtual interrupt delivery.
9445          */
9446         local_irq_disable();
9447         vcpu->mode = IN_GUEST_MODE;
9448
9449         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9450
9451         /*
9452          * 1) We should set ->mode before checking ->requests.  Please see
9453          * the comment in kvm_vcpu_exiting_guest_mode().
9454          *
9455          * 2) For APICv, we should set ->mode before checking PID.ON. This
9456          * pairs with the memory barrier implicit in pi_test_and_set_on
9457          * (see vmx_deliver_posted_interrupt).
9458          *
9459          * 3) This also orders the write to mode from any reads to the page
9460          * tables done while the VCPU is running.  Please see the comment
9461          * in kvm_flush_remote_tlbs.
9462          */
9463         smp_mb__after_srcu_read_unlock();
9464
9465         /*
9466          * This handles the case where a posted interrupt was
9467          * notified with kvm_vcpu_kick.
9468          */
9469         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
9470                 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9471
9472         if (kvm_vcpu_exit_request(vcpu)) {
9473                 vcpu->mode = OUTSIDE_GUEST_MODE;
9474                 smp_wmb();
9475                 local_irq_enable();
9476                 preempt_enable();
9477                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9478                 r = 1;
9479                 goto cancel_injection;
9480         }
9481
9482         if (req_immediate_exit) {
9483                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9484                 static_call(kvm_x86_request_immediate_exit)(vcpu);
9485         }
9486
9487         fpregs_assert_state_consistent();
9488         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9489                 switch_fpu_return();
9490
9491         if (unlikely(vcpu->arch.switch_db_regs)) {
9492                 set_debugreg(0, 7);
9493                 set_debugreg(vcpu->arch.eff_db[0], 0);
9494                 set_debugreg(vcpu->arch.eff_db[1], 1);
9495                 set_debugreg(vcpu->arch.eff_db[2], 2);
9496                 set_debugreg(vcpu->arch.eff_db[3], 3);
9497                 set_debugreg(vcpu->arch.dr6, 6);
9498                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
9499         }
9500
9501         for (;;) {
9502                 exit_fastpath = static_call(kvm_x86_run)(vcpu);
9503                 if (likely(exit_fastpath != EXIT_FASTPATH_REENTER_GUEST))
9504                         break;
9505
9506                 if (unlikely(kvm_vcpu_exit_request(vcpu))) {
9507                         exit_fastpath = EXIT_FASTPATH_EXIT_HANDLED;
9508                         break;
9509                 }
9510
9511                 if (vcpu->arch.apicv_active)
9512                         static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9513         }
9514
9515         /*
9516          * Do this here before restoring debug registers on the host.  And
9517          * since we do this before handling the vmexit, a DR access vmexit
9518          * can (a) read the correct value of the debug registers, (b) set
9519          * KVM_DEBUGREG_WONT_EXIT again.
9520          */
9521         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
9522                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
9523                 static_call(kvm_x86_sync_dirty_debug_regs)(vcpu);
9524                 kvm_update_dr0123(vcpu);
9525                 kvm_update_dr7(vcpu);
9526                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
9527         }
9528
9529         /*
9530          * If the guest has used debug registers, at least dr7
9531          * will be disabled while returning to the host.
9532          * If we don't have active breakpoints in the host, we don't
9533          * care about the messed up debug address registers. But if
9534          * we have some of them active, restore the old state.
9535          */
9536         if (hw_breakpoint_active())
9537                 hw_breakpoint_restore();
9538
9539         vcpu->arch.last_vmentry_cpu = vcpu->cpu;
9540         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
9541
9542         vcpu->mode = OUTSIDE_GUEST_MODE;
9543         smp_wmb();
9544
9545         static_call(kvm_x86_handle_exit_irqoff)(vcpu);
9546
9547         /*
9548          * Consume any pending interrupts, including the possible source of
9549          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
9550          * An instruction is required after local_irq_enable() to fully unblock
9551          * interrupts on processors that implement an interrupt shadow, the
9552          * stat.exits increment will do nicely.
9553          */
9554         kvm_before_interrupt(vcpu);
9555         local_irq_enable();
9556         ++vcpu->stat.exits;
9557         local_irq_disable();
9558         kvm_after_interrupt(vcpu);
9559
9560         /*
9561          * Wait until after servicing IRQs to account guest time so that any
9562          * ticks that occurred while running the guest are properly accounted
9563          * to the guest.  Waiting until IRQs are enabled degrades the accuracy
9564          * of accounting via context tracking, but the loss of accuracy is
9565          * acceptable for all known use cases.
9566          */
9567         vtime_account_guest_exit();
9568
9569         if (lapic_in_kernel(vcpu)) {
9570                 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
9571                 if (delta != S64_MIN) {
9572                         trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
9573                         vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
9574                 }
9575         }
9576
9577         local_irq_enable();
9578         preempt_enable();
9579
9580         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9581
9582         /*
9583          * Profile KVM exit RIPs:
9584          */
9585         if (unlikely(prof_on == KVM_PROFILING)) {
9586                 unsigned long rip = kvm_rip_read(vcpu);
9587                 profile_hit(KVM_PROFILING, (void *)rip);
9588         }
9589
9590         if (unlikely(vcpu->arch.tsc_always_catchup))
9591                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
9592
9593         if (vcpu->arch.apic_attention)
9594                 kvm_lapic_sync_from_vapic(vcpu);
9595
9596         r = static_call(kvm_x86_handle_exit)(vcpu, exit_fastpath);
9597         return r;
9598
9599 cancel_injection:
9600         if (req_immediate_exit)
9601                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9602         static_call(kvm_x86_cancel_injection)(vcpu);
9603         if (unlikely(vcpu->arch.apic_attention))
9604                 kvm_lapic_sync_from_vapic(vcpu);
9605 out:
9606         return r;
9607 }
9608
9609 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
9610 {
9611         if (!kvm_arch_vcpu_runnable(vcpu) &&
9612             (!kvm_x86_ops.pre_block || static_call(kvm_x86_pre_block)(vcpu) == 0)) {
9613                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9614                 kvm_vcpu_block(vcpu);
9615                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9616
9617                 if (kvm_x86_ops.post_block)
9618                         static_call(kvm_x86_post_block)(vcpu);
9619
9620                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
9621                         return 1;
9622         }
9623
9624         if (kvm_apic_accept_events(vcpu) < 0)
9625                 return 0;
9626         switch(vcpu->arch.mp_state) {
9627         case KVM_MP_STATE_HALTED:
9628         case KVM_MP_STATE_AP_RESET_HOLD:
9629                 vcpu->arch.pv.pv_unhalted = false;
9630                 vcpu->arch.mp_state =
9631                         KVM_MP_STATE_RUNNABLE;
9632                 fallthrough;
9633         case KVM_MP_STATE_RUNNABLE:
9634                 vcpu->arch.apf.halted = false;
9635                 break;
9636         case KVM_MP_STATE_INIT_RECEIVED:
9637                 break;
9638         default:
9639                 return -EINTR;
9640         }
9641         return 1;
9642 }
9643
9644 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
9645 {
9646         if (is_guest_mode(vcpu))
9647                 kvm_check_nested_events(vcpu);
9648
9649         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
9650                 !vcpu->arch.apf.halted);
9651 }
9652
9653 static int vcpu_run(struct kvm_vcpu *vcpu)
9654 {
9655         int r;
9656         struct kvm *kvm = vcpu->kvm;
9657
9658         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9659         vcpu->arch.l1tf_flush_l1d = true;
9660
9661         for (;;) {
9662                 if (kvm_vcpu_running(vcpu)) {
9663                         r = vcpu_enter_guest(vcpu);
9664                 } else {
9665                         r = vcpu_block(kvm, vcpu);
9666                 }
9667
9668                 if (r <= 0)
9669                         break;
9670
9671                 kvm_clear_request(KVM_REQ_UNBLOCK, vcpu);
9672                 if (kvm_cpu_has_pending_timer(vcpu))
9673                         kvm_inject_pending_timer_irqs(vcpu);
9674
9675                 if (dm_request_for_irq_injection(vcpu) &&
9676                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
9677                         r = 0;
9678                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
9679                         ++vcpu->stat.request_irq_exits;
9680                         break;
9681                 }
9682
9683                 if (__xfer_to_guest_mode_work_pending()) {
9684                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9685                         r = xfer_to_guest_mode_handle_work(vcpu);
9686                         if (r)
9687                                 return r;
9688                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9689                 }
9690         }
9691
9692         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9693
9694         return r;
9695 }
9696
9697 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
9698 {
9699         int r;
9700
9701         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9702         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
9703         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9704         return r;
9705 }
9706
9707 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
9708 {
9709         BUG_ON(!vcpu->arch.pio.count);
9710
9711         return complete_emulated_io(vcpu);
9712 }
9713
9714 /*
9715  * Implements the following, as a state machine:
9716  *
9717  * read:
9718  *   for each fragment
9719  *     for each mmio piece in the fragment
9720  *       write gpa, len
9721  *       exit
9722  *       copy data
9723  *   execute insn
9724  *
9725  * write:
9726  *   for each fragment
9727  *     for each mmio piece in the fragment
9728  *       write gpa, len
9729  *       copy data
9730  *       exit
9731  */
9732 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
9733 {
9734         struct kvm_run *run = vcpu->run;
9735         struct kvm_mmio_fragment *frag;
9736         unsigned len;
9737
9738         BUG_ON(!vcpu->mmio_needed);
9739
9740         /* Complete previous fragment */
9741         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
9742         len = min(8u, frag->len);
9743         if (!vcpu->mmio_is_write)
9744                 memcpy(frag->data, run->mmio.data, len);
9745
9746         if (frag->len <= 8) {
9747                 /* Switch to the next fragment. */
9748                 frag++;
9749                 vcpu->mmio_cur_fragment++;
9750         } else {
9751                 /* Go forward to the next mmio piece. */
9752                 frag->data += len;
9753                 frag->gpa += len;
9754                 frag->len -= len;
9755         }
9756
9757         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
9758                 vcpu->mmio_needed = 0;
9759
9760                 /* FIXME: return into emulator if single-stepping.  */
9761                 if (vcpu->mmio_is_write)
9762                         return 1;
9763                 vcpu->mmio_read_completed = 1;
9764                 return complete_emulated_io(vcpu);
9765         }
9766
9767         run->exit_reason = KVM_EXIT_MMIO;
9768         run->mmio.phys_addr = frag->gpa;
9769         if (vcpu->mmio_is_write)
9770                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
9771         run->mmio.len = min(8u, frag->len);
9772         run->mmio.is_write = vcpu->mmio_is_write;
9773         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
9774         return 0;
9775 }
9776
9777 static void kvm_save_current_fpu(struct fpu *fpu)
9778 {
9779         /*
9780          * If the target FPU state is not resident in the CPU registers, just
9781          * memcpy() from current, else save CPU state directly to the target.
9782          */
9783         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9784                 memcpy(&fpu->state, &current->thread.fpu.state,
9785                        fpu_kernel_xstate_size);
9786         else
9787                 copy_fpregs_to_fpstate(fpu);
9788 }
9789
9790 /* Swap (qemu) user FPU context for the guest FPU context. */
9791 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
9792 {
9793         fpregs_lock();
9794
9795         kvm_save_current_fpu(vcpu->arch.user_fpu);
9796
9797         /*
9798          * Guests with protected state can't have it set by the hypervisor,
9799          * so skip trying to set it.
9800          */
9801         if (vcpu->arch.guest_fpu)
9802                 /* PKRU is separately restored in kvm_x86_ops.run. */
9803                 __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu->state,
9804                                         ~XFEATURE_MASK_PKRU);
9805
9806         fpregs_mark_activate();
9807         fpregs_unlock();
9808
9809         trace_kvm_fpu(1);
9810 }
9811
9812 /* When vcpu_run ends, restore user space FPU context. */
9813 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
9814 {
9815         fpregs_lock();
9816
9817         /*
9818          * Guests with protected state can't have it read by the hypervisor,
9819          * so skip trying to save it.
9820          */
9821         if (vcpu->arch.guest_fpu)
9822                 kvm_save_current_fpu(vcpu->arch.guest_fpu);
9823
9824         copy_kernel_to_fpregs(&vcpu->arch.user_fpu->state);
9825
9826         fpregs_mark_activate();
9827         fpregs_unlock();
9828
9829         ++vcpu->stat.fpu_reload;
9830         trace_kvm_fpu(0);
9831 }
9832
9833 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
9834 {
9835         struct kvm_run *kvm_run = vcpu->run;
9836         int r;
9837
9838         vcpu_load(vcpu);
9839         kvm_sigset_activate(vcpu);
9840         kvm_run->flags = 0;
9841         kvm_load_guest_fpu(vcpu);
9842
9843         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
9844                 if (kvm_run->immediate_exit) {
9845                         r = -EINTR;
9846                         goto out;
9847                 }
9848                 kvm_vcpu_block(vcpu);
9849                 if (kvm_apic_accept_events(vcpu) < 0) {
9850                         r = 0;
9851                         goto out;
9852                 }
9853                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
9854                 r = -EAGAIN;
9855                 if (signal_pending(current)) {
9856                         r = -EINTR;
9857                         kvm_run->exit_reason = KVM_EXIT_INTR;
9858                         ++vcpu->stat.signal_exits;
9859                 }
9860                 goto out;
9861         }
9862
9863         if (kvm_run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
9864                 r = -EINVAL;
9865                 goto out;
9866         }
9867
9868         if (kvm_run->kvm_dirty_regs) {
9869                 r = sync_regs(vcpu);
9870                 if (r != 0)
9871                         goto out;
9872         }
9873
9874         /* re-sync apic's tpr */
9875         if (!lapic_in_kernel(vcpu)) {
9876                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
9877                         r = -EINVAL;
9878                         goto out;
9879                 }
9880         }
9881
9882         if (unlikely(vcpu->arch.complete_userspace_io)) {
9883                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
9884                 vcpu->arch.complete_userspace_io = NULL;
9885                 r = cui(vcpu);
9886                 if (r <= 0)
9887                         goto out;
9888         } else
9889                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
9890
9891         if (kvm_run->immediate_exit)
9892                 r = -EINTR;
9893         else
9894                 r = vcpu_run(vcpu);
9895
9896 out:
9897         kvm_put_guest_fpu(vcpu);
9898         if (kvm_run->kvm_valid_regs)
9899                 store_regs(vcpu);
9900         post_kvm_run_save(vcpu);
9901         kvm_sigset_deactivate(vcpu);
9902
9903         vcpu_put(vcpu);
9904         return r;
9905 }
9906
9907 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9908 {
9909         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
9910                 /*
9911                  * We are here if userspace calls get_regs() in the middle of
9912                  * instruction emulation. Registers state needs to be copied
9913                  * back from emulation context to vcpu. Userspace shouldn't do
9914                  * that usually, but some bad designed PV devices (vmware
9915                  * backdoor interface) need this to work
9916                  */
9917                 emulator_writeback_register_cache(vcpu->arch.emulate_ctxt);
9918                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
9919         }
9920         regs->rax = kvm_rax_read(vcpu);
9921         regs->rbx = kvm_rbx_read(vcpu);
9922         regs->rcx = kvm_rcx_read(vcpu);
9923         regs->rdx = kvm_rdx_read(vcpu);
9924         regs->rsi = kvm_rsi_read(vcpu);
9925         regs->rdi = kvm_rdi_read(vcpu);
9926         regs->rsp = kvm_rsp_read(vcpu);
9927         regs->rbp = kvm_rbp_read(vcpu);
9928 #ifdef CONFIG_X86_64
9929         regs->r8 = kvm_r8_read(vcpu);
9930         regs->r9 = kvm_r9_read(vcpu);
9931         regs->r10 = kvm_r10_read(vcpu);
9932         regs->r11 = kvm_r11_read(vcpu);
9933         regs->r12 = kvm_r12_read(vcpu);
9934         regs->r13 = kvm_r13_read(vcpu);
9935         regs->r14 = kvm_r14_read(vcpu);
9936         regs->r15 = kvm_r15_read(vcpu);
9937 #endif
9938
9939         regs->rip = kvm_rip_read(vcpu);
9940         regs->rflags = kvm_get_rflags(vcpu);
9941 }
9942
9943 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9944 {
9945         vcpu_load(vcpu);
9946         __get_regs(vcpu, regs);
9947         vcpu_put(vcpu);
9948         return 0;
9949 }
9950
9951 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9952 {
9953         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
9954         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
9955
9956         kvm_rax_write(vcpu, regs->rax);
9957         kvm_rbx_write(vcpu, regs->rbx);
9958         kvm_rcx_write(vcpu, regs->rcx);
9959         kvm_rdx_write(vcpu, regs->rdx);
9960         kvm_rsi_write(vcpu, regs->rsi);
9961         kvm_rdi_write(vcpu, regs->rdi);
9962         kvm_rsp_write(vcpu, regs->rsp);
9963         kvm_rbp_write(vcpu, regs->rbp);
9964 #ifdef CONFIG_X86_64
9965         kvm_r8_write(vcpu, regs->r8);
9966         kvm_r9_write(vcpu, regs->r9);
9967         kvm_r10_write(vcpu, regs->r10);
9968         kvm_r11_write(vcpu, regs->r11);
9969         kvm_r12_write(vcpu, regs->r12);
9970         kvm_r13_write(vcpu, regs->r13);
9971         kvm_r14_write(vcpu, regs->r14);
9972         kvm_r15_write(vcpu, regs->r15);
9973 #endif
9974
9975         kvm_rip_write(vcpu, regs->rip);
9976         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
9977
9978         vcpu->arch.exception.pending = false;
9979
9980         kvm_make_request(KVM_REQ_EVENT, vcpu);
9981 }
9982
9983 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9984 {
9985         vcpu_load(vcpu);
9986         __set_regs(vcpu, regs);
9987         vcpu_put(vcpu);
9988         return 0;
9989 }
9990
9991 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
9992 {
9993         struct kvm_segment cs;
9994
9995         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
9996         *db = cs.db;
9997         *l = cs.l;
9998 }
9999 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
10000
10001 static void __get_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10002 {
10003         struct desc_ptr dt;
10004
10005         if (vcpu->arch.guest_state_protected)
10006                 goto skip_protected_regs;
10007
10008         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10009         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10010         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10011         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10012         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10013         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10014
10015         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10016         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10017
10018         static_call(kvm_x86_get_idt)(vcpu, &dt);
10019         sregs->idt.limit = dt.size;
10020         sregs->idt.base = dt.address;
10021         static_call(kvm_x86_get_gdt)(vcpu, &dt);
10022         sregs->gdt.limit = dt.size;
10023         sregs->gdt.base = dt.address;
10024
10025         sregs->cr2 = vcpu->arch.cr2;
10026         sregs->cr3 = kvm_read_cr3(vcpu);
10027
10028 skip_protected_regs:
10029         sregs->cr0 = kvm_read_cr0(vcpu);
10030         sregs->cr4 = kvm_read_cr4(vcpu);
10031         sregs->cr8 = kvm_get_cr8(vcpu);
10032         sregs->efer = vcpu->arch.efer;
10033         sregs->apic_base = kvm_get_apic_base(vcpu);
10034 }
10035
10036 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10037 {
10038         __get_sregs_common(vcpu, sregs);
10039
10040         if (vcpu->arch.guest_state_protected)
10041                 return;
10042
10043         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
10044                 set_bit(vcpu->arch.interrupt.nr,
10045                         (unsigned long *)sregs->interrupt_bitmap);
10046 }
10047
10048 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
10049 {
10050         int i;
10051
10052         __get_sregs_common(vcpu, (struct kvm_sregs *)sregs2);
10053
10054         if (vcpu->arch.guest_state_protected)
10055                 return;
10056
10057         if (is_pae_paging(vcpu)) {
10058                 for (i = 0 ; i < 4 ; i++)
10059                         sregs2->pdptrs[i] = kvm_pdptr_read(vcpu, i);
10060                 sregs2->flags |= KVM_SREGS2_FLAGS_PDPTRS_VALID;
10061         }
10062 }
10063
10064 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
10065                                   struct kvm_sregs *sregs)
10066 {
10067         vcpu_load(vcpu);
10068         __get_sregs(vcpu, sregs);
10069         vcpu_put(vcpu);
10070         return 0;
10071 }
10072
10073 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
10074                                     struct kvm_mp_state *mp_state)
10075 {
10076         int r;
10077
10078         vcpu_load(vcpu);
10079         if (kvm_mpx_supported())
10080                 kvm_load_guest_fpu(vcpu);
10081
10082         r = kvm_apic_accept_events(vcpu);
10083         if (r < 0)
10084                 goto out;
10085         r = 0;
10086
10087         if ((vcpu->arch.mp_state == KVM_MP_STATE_HALTED ||
10088              vcpu->arch.mp_state == KVM_MP_STATE_AP_RESET_HOLD) &&
10089             vcpu->arch.pv.pv_unhalted)
10090                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
10091         else
10092                 mp_state->mp_state = vcpu->arch.mp_state;
10093
10094 out:
10095         if (kvm_mpx_supported())
10096                 kvm_put_guest_fpu(vcpu);
10097         vcpu_put(vcpu);
10098         return r;
10099 }
10100
10101 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
10102                                     struct kvm_mp_state *mp_state)
10103 {
10104         int ret = -EINVAL;
10105
10106         vcpu_load(vcpu);
10107
10108         if (!lapic_in_kernel(vcpu) &&
10109             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
10110                 goto out;
10111
10112         /*
10113          * KVM_MP_STATE_INIT_RECEIVED means the processor is in
10114          * INIT state; latched init should be reported using
10115          * KVM_SET_VCPU_EVENTS, so reject it here.
10116          */
10117         if ((kvm_vcpu_latch_init(vcpu) || vcpu->arch.smi_pending) &&
10118             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
10119              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
10120                 goto out;
10121
10122         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
10123                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
10124                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
10125         } else
10126                 vcpu->arch.mp_state = mp_state->mp_state;
10127         kvm_make_request(KVM_REQ_EVENT, vcpu);
10128
10129         ret = 0;
10130 out:
10131         vcpu_put(vcpu);
10132         return ret;
10133 }
10134
10135 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
10136                     int reason, bool has_error_code, u32 error_code)
10137 {
10138         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
10139         int ret;
10140
10141         init_emulate_ctxt(vcpu);
10142
10143         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
10144                                    has_error_code, error_code);
10145         if (ret) {
10146                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
10147                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
10148                 vcpu->run->internal.ndata = 0;
10149                 return 0;
10150         }
10151
10152         kvm_rip_write(vcpu, ctxt->eip);
10153         kvm_set_rflags(vcpu, ctxt->eflags);
10154         return 1;
10155 }
10156 EXPORT_SYMBOL_GPL(kvm_task_switch);
10157
10158 static bool kvm_is_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10159 {
10160         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
10161                 /*
10162                  * When EFER.LME and CR0.PG are set, the processor is in
10163                  * 64-bit mode (though maybe in a 32-bit code segment).
10164                  * CR4.PAE and EFER.LMA must be set.
10165                  */
10166                 if (!(sregs->cr4 & X86_CR4_PAE) || !(sregs->efer & EFER_LMA))
10167                         return false;
10168                 if (kvm_vcpu_is_illegal_gpa(vcpu, sregs->cr3))
10169                         return false;
10170         } else {
10171                 /*
10172                  * Not in 64-bit mode: EFER.LMA is clear and the code
10173                  * segment cannot be 64-bit.
10174                  */
10175                 if (sregs->efer & EFER_LMA || sregs->cs.l)
10176                         return false;
10177         }
10178
10179         return kvm_is_valid_cr4(vcpu, sregs->cr4);
10180 }
10181
10182 static int __set_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs,
10183                 int *mmu_reset_needed, bool update_pdptrs)
10184 {
10185         struct msr_data apic_base_msr;
10186         int idx;
10187         struct desc_ptr dt;
10188
10189         if (!kvm_is_valid_sregs(vcpu, sregs))
10190                 return -EINVAL;
10191
10192         apic_base_msr.data = sregs->apic_base;
10193         apic_base_msr.host_initiated = true;
10194         if (kvm_set_apic_base(vcpu, &apic_base_msr))
10195                 return -EINVAL;
10196
10197         if (vcpu->arch.guest_state_protected)
10198                 return 0;
10199
10200         dt.size = sregs->idt.limit;
10201         dt.address = sregs->idt.base;
10202         static_call(kvm_x86_set_idt)(vcpu, &dt);
10203         dt.size = sregs->gdt.limit;
10204         dt.address = sregs->gdt.base;
10205         static_call(kvm_x86_set_gdt)(vcpu, &dt);
10206
10207         vcpu->arch.cr2 = sregs->cr2;
10208         *mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
10209         vcpu->arch.cr3 = sregs->cr3;
10210         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
10211
10212         kvm_set_cr8(vcpu, sregs->cr8);
10213
10214         *mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
10215         static_call(kvm_x86_set_efer)(vcpu, sregs->efer);
10216
10217         *mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
10218         static_call(kvm_x86_set_cr0)(vcpu, sregs->cr0);
10219         vcpu->arch.cr0 = sregs->cr0;
10220
10221         *mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
10222         static_call(kvm_x86_set_cr4)(vcpu, sregs->cr4);
10223
10224         if (update_pdptrs) {
10225                 idx = srcu_read_lock(&vcpu->kvm->srcu);
10226                 if (is_pae_paging(vcpu)) {
10227                         load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
10228                         *mmu_reset_needed = 1;
10229                 }
10230                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
10231         }
10232
10233         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10234         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10235         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10236         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10237         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10238         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10239
10240         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10241         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10242
10243         update_cr8_intercept(vcpu);
10244
10245         /* Older userspace won't unhalt the vcpu on reset. */
10246         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
10247             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
10248             !is_protmode(vcpu))
10249                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10250
10251         return 0;
10252 }
10253
10254 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10255 {
10256         int pending_vec, max_bits;
10257         int mmu_reset_needed = 0;
10258         int ret = __set_sregs_common(vcpu, sregs, &mmu_reset_needed, true);
10259
10260         if (ret)
10261                 return ret;
10262
10263         if (mmu_reset_needed)
10264                 kvm_mmu_reset_context(vcpu);
10265
10266         max_bits = KVM_NR_INTERRUPTS;
10267         pending_vec = find_first_bit(
10268                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
10269
10270         if (pending_vec < max_bits) {
10271                 kvm_queue_interrupt(vcpu, pending_vec, false);
10272                 pr_debug("Set back pending irq %d\n", pending_vec);
10273                 kvm_make_request(KVM_REQ_EVENT, vcpu);
10274         }
10275         return 0;
10276 }
10277
10278 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
10279 {
10280         int mmu_reset_needed = 0;
10281         bool valid_pdptrs = sregs2->flags & KVM_SREGS2_FLAGS_PDPTRS_VALID;
10282         bool pae = (sregs2->cr0 & X86_CR0_PG) && (sregs2->cr4 & X86_CR4_PAE) &&
10283                 !(sregs2->efer & EFER_LMA);
10284         int i, ret;
10285
10286         if (sregs2->flags & ~KVM_SREGS2_FLAGS_PDPTRS_VALID)
10287                 return -EINVAL;
10288
10289         if (valid_pdptrs && (!pae || vcpu->arch.guest_state_protected))
10290                 return -EINVAL;
10291
10292         ret = __set_sregs_common(vcpu, (struct kvm_sregs *)sregs2,
10293                                  &mmu_reset_needed, !valid_pdptrs);
10294         if (ret)
10295                 return ret;
10296
10297         if (valid_pdptrs) {
10298                 for (i = 0; i < 4 ; i++)
10299                         kvm_pdptr_write(vcpu, i, sregs2->pdptrs[i]);
10300
10301                 kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
10302                 mmu_reset_needed = 1;
10303                 vcpu->arch.pdptrs_from_userspace = true;
10304         }
10305         if (mmu_reset_needed)
10306                 kvm_mmu_reset_context(vcpu);
10307         return 0;
10308 }
10309
10310 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
10311                                   struct kvm_sregs *sregs)
10312 {
10313         int ret;
10314
10315         vcpu_load(vcpu);
10316         ret = __set_sregs(vcpu, sregs);
10317         vcpu_put(vcpu);
10318         return ret;
10319 }
10320
10321 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
10322                                         struct kvm_guest_debug *dbg)
10323 {
10324         unsigned long rflags;
10325         int i, r;
10326
10327         if (vcpu->arch.guest_state_protected)
10328                 return -EINVAL;
10329
10330         vcpu_load(vcpu);
10331
10332         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
10333                 r = -EBUSY;
10334                 if (vcpu->arch.exception.pending)
10335                         goto out;
10336                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
10337                         kvm_queue_exception(vcpu, DB_VECTOR);
10338                 else
10339                         kvm_queue_exception(vcpu, BP_VECTOR);
10340         }
10341
10342         /*
10343          * Read rflags as long as potentially injected trace flags are still
10344          * filtered out.
10345          */
10346         rflags = kvm_get_rflags(vcpu);
10347
10348         vcpu->guest_debug = dbg->control;
10349         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
10350                 vcpu->guest_debug = 0;
10351
10352         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
10353                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
10354                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
10355                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
10356         } else {
10357                 for (i = 0; i < KVM_NR_DB_REGS; i++)
10358                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
10359         }
10360         kvm_update_dr7(vcpu);
10361
10362         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
10363                 vcpu->arch.singlestep_rip = kvm_get_linear_rip(vcpu);
10364
10365         /*
10366          * Trigger an rflags update that will inject or remove the trace
10367          * flags.
10368          */
10369         kvm_set_rflags(vcpu, rflags);
10370
10371         static_call(kvm_x86_update_exception_bitmap)(vcpu);
10372
10373         r = 0;
10374
10375 out:
10376         vcpu_put(vcpu);
10377         return r;
10378 }
10379
10380 /*
10381  * Translate a guest virtual address to a guest physical address.
10382  */
10383 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
10384                                     struct kvm_translation *tr)
10385 {
10386         unsigned long vaddr = tr->linear_address;
10387         gpa_t gpa;
10388         int idx;
10389
10390         vcpu_load(vcpu);
10391
10392         idx = srcu_read_lock(&vcpu->kvm->srcu);
10393         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
10394         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10395         tr->physical_address = gpa;
10396         tr->valid = gpa != UNMAPPED_GVA;
10397         tr->writeable = 1;
10398         tr->usermode = 0;
10399
10400         vcpu_put(vcpu);
10401         return 0;
10402 }
10403
10404 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10405 {
10406         struct fxregs_state *fxsave;
10407
10408         if (!vcpu->arch.guest_fpu)
10409                 return 0;
10410
10411         vcpu_load(vcpu);
10412
10413         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
10414         memcpy(fpu->fpr, fxsave->st_space, 128);
10415         fpu->fcw = fxsave->cwd;
10416         fpu->fsw = fxsave->swd;
10417         fpu->ftwx = fxsave->twd;
10418         fpu->last_opcode = fxsave->fop;
10419         fpu->last_ip = fxsave->rip;
10420         fpu->last_dp = fxsave->rdp;
10421         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
10422
10423         vcpu_put(vcpu);
10424         return 0;
10425 }
10426
10427 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10428 {
10429         struct fxregs_state *fxsave;
10430
10431         if (!vcpu->arch.guest_fpu)
10432                 return 0;
10433
10434         vcpu_load(vcpu);
10435
10436         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
10437
10438         memcpy(fxsave->st_space, fpu->fpr, 128);
10439         fxsave->cwd = fpu->fcw;
10440         fxsave->swd = fpu->fsw;
10441         fxsave->twd = fpu->ftwx;
10442         fxsave->fop = fpu->last_opcode;
10443         fxsave->rip = fpu->last_ip;
10444         fxsave->rdp = fpu->last_dp;
10445         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
10446
10447         vcpu_put(vcpu);
10448         return 0;
10449 }
10450
10451 static void store_regs(struct kvm_vcpu *vcpu)
10452 {
10453         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
10454
10455         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
10456                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
10457
10458         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
10459                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
10460
10461         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
10462                 kvm_vcpu_ioctl_x86_get_vcpu_events(
10463                                 vcpu, &vcpu->run->s.regs.events);
10464 }
10465
10466 static int sync_regs(struct kvm_vcpu *vcpu)
10467 {
10468         if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
10469                 return -EINVAL;
10470
10471         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
10472                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
10473                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
10474         }
10475         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
10476                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
10477                         return -EINVAL;
10478                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
10479         }
10480         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
10481                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
10482                                 vcpu, &vcpu->run->s.regs.events))
10483                         return -EINVAL;
10484                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
10485         }
10486
10487         return 0;
10488 }
10489
10490 static void fx_init(struct kvm_vcpu *vcpu)
10491 {
10492         if (!vcpu->arch.guest_fpu)
10493                 return;
10494
10495         fpstate_init(&vcpu->arch.guest_fpu->state);
10496         if (boot_cpu_has(X86_FEATURE_XSAVES))
10497                 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
10498                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
10499
10500         /*
10501          * Ensure guest xcr0 is valid for loading
10502          */
10503         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10504
10505         vcpu->arch.cr0 |= X86_CR0_ET;
10506 }
10507
10508 void kvm_free_guest_fpu(struct kvm_vcpu *vcpu)
10509 {
10510         if (vcpu->arch.guest_fpu) {
10511                 kmem_cache_free(x86_fpu_cache, vcpu->arch.guest_fpu);
10512                 vcpu->arch.guest_fpu = NULL;
10513         }
10514 }
10515 EXPORT_SYMBOL_GPL(kvm_free_guest_fpu);
10516
10517 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
10518 {
10519         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
10520                 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
10521                              "guest TSC will not be reliable\n");
10522
10523         return 0;
10524 }
10525
10526 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
10527 {
10528         struct page *page;
10529         int r;
10530
10531         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
10532                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10533         else
10534                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
10535
10536         r = kvm_mmu_create(vcpu);
10537         if (r < 0)
10538                 return r;
10539
10540         if (irqchip_in_kernel(vcpu->kvm)) {
10541                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
10542                 if (r < 0)
10543                         goto fail_mmu_destroy;
10544                 if (kvm_apicv_activated(vcpu->kvm))
10545                         vcpu->arch.apicv_active = true;
10546         } else
10547                 static_branch_inc(&kvm_has_noapic_vcpu);
10548
10549         r = -ENOMEM;
10550
10551         page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO);
10552         if (!page)
10553                 goto fail_free_lapic;
10554         vcpu->arch.pio_data = page_address(page);
10555
10556         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
10557                                        GFP_KERNEL_ACCOUNT);
10558         if (!vcpu->arch.mce_banks)
10559                 goto fail_free_pio_data;
10560         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
10561
10562         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
10563                                 GFP_KERNEL_ACCOUNT))
10564                 goto fail_free_mce_banks;
10565
10566         if (!alloc_emulate_ctxt(vcpu))
10567                 goto free_wbinvd_dirty_mask;
10568
10569         vcpu->arch.user_fpu = kmem_cache_zalloc(x86_fpu_cache,
10570                                                 GFP_KERNEL_ACCOUNT);
10571         if (!vcpu->arch.user_fpu) {
10572                 pr_err("kvm: failed to allocate userspace's fpu\n");
10573                 goto free_emulate_ctxt;
10574         }
10575
10576         vcpu->arch.guest_fpu = kmem_cache_zalloc(x86_fpu_cache,
10577                                                  GFP_KERNEL_ACCOUNT);
10578         if (!vcpu->arch.guest_fpu) {
10579                 pr_err("kvm: failed to allocate vcpu's fpu\n");
10580                 goto free_user_fpu;
10581         }
10582         fx_init(vcpu);
10583
10584         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
10585         vcpu->arch.reserved_gpa_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu);
10586
10587         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
10588
10589         kvm_async_pf_hash_reset(vcpu);
10590         kvm_pmu_init(vcpu);
10591
10592         vcpu->arch.pending_external_vector = -1;
10593         vcpu->arch.preempted_in_kernel = false;
10594
10595 #if IS_ENABLED(CONFIG_HYPERV)
10596         vcpu->arch.hv_root_tdp = INVALID_PAGE;
10597 #endif
10598
10599         r = static_call(kvm_x86_vcpu_create)(vcpu);
10600         if (r)
10601                 goto free_guest_fpu;
10602
10603         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
10604         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
10605         kvm_vcpu_mtrr_init(vcpu);
10606         vcpu_load(vcpu);
10607         kvm_set_tsc_khz(vcpu, max_tsc_khz);
10608         kvm_vcpu_reset(vcpu, false);
10609         kvm_init_mmu(vcpu, false);
10610         vcpu_put(vcpu);
10611         return 0;
10612
10613 free_guest_fpu:
10614         kvm_free_guest_fpu(vcpu);
10615 free_user_fpu:
10616         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
10617 free_emulate_ctxt:
10618         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10619 free_wbinvd_dirty_mask:
10620         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10621 fail_free_mce_banks:
10622         kfree(vcpu->arch.mce_banks);
10623 fail_free_pio_data:
10624         free_page((unsigned long)vcpu->arch.pio_data);
10625 fail_free_lapic:
10626         kvm_free_lapic(vcpu);
10627 fail_mmu_destroy:
10628         kvm_mmu_destroy(vcpu);
10629         return r;
10630 }
10631
10632 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
10633 {
10634         struct kvm *kvm = vcpu->kvm;
10635
10636         if (mutex_lock_killable(&vcpu->mutex))
10637                 return;
10638         vcpu_load(vcpu);
10639         kvm_synchronize_tsc(vcpu, 0);
10640         vcpu_put(vcpu);
10641
10642         /* poll control enabled by default */
10643         vcpu->arch.msr_kvm_poll_control = 1;
10644
10645         mutex_unlock(&vcpu->mutex);
10646
10647         if (kvmclock_periodic_sync && vcpu->vcpu_idx == 0)
10648                 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
10649                                                 KVMCLOCK_SYNC_PERIOD);
10650 }
10651
10652 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
10653 {
10654         struct gfn_to_pfn_cache *cache = &vcpu->arch.st.cache;
10655         int idx;
10656
10657         kvm_release_pfn(cache->pfn, cache->dirty, cache);
10658
10659         kvmclock_reset(vcpu);
10660
10661         static_call(kvm_x86_vcpu_free)(vcpu);
10662
10663         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10664         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10665         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
10666         kvm_free_guest_fpu(vcpu);
10667
10668         kvm_hv_vcpu_uninit(vcpu);
10669         kvm_pmu_destroy(vcpu);
10670         kfree(vcpu->arch.mce_banks);
10671         kvm_free_lapic(vcpu);
10672         idx = srcu_read_lock(&vcpu->kvm->srcu);
10673         kvm_mmu_destroy(vcpu);
10674         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10675         free_page((unsigned long)vcpu->arch.pio_data);
10676         kvfree(vcpu->arch.cpuid_entries);
10677         if (!lapic_in_kernel(vcpu))
10678                 static_branch_dec(&kvm_has_noapic_vcpu);
10679 }
10680
10681 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
10682 {
10683         kvm_lapic_reset(vcpu, init_event);
10684
10685         vcpu->arch.hflags = 0;
10686
10687         vcpu->arch.smi_pending = 0;
10688         vcpu->arch.smi_count = 0;
10689         atomic_set(&vcpu->arch.nmi_queued, 0);
10690         vcpu->arch.nmi_pending = 0;
10691         vcpu->arch.nmi_injected = false;
10692         kvm_clear_interrupt_queue(vcpu);
10693         kvm_clear_exception_queue(vcpu);
10694
10695         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
10696         kvm_update_dr0123(vcpu);
10697         vcpu->arch.dr6 = DR6_ACTIVE_LOW;
10698         vcpu->arch.dr7 = DR7_FIXED_1;
10699         kvm_update_dr7(vcpu);
10700
10701         vcpu->arch.cr2 = 0;
10702
10703         kvm_make_request(KVM_REQ_EVENT, vcpu);
10704         vcpu->arch.apf.msr_en_val = 0;
10705         vcpu->arch.apf.msr_int_val = 0;
10706         vcpu->arch.st.msr_val = 0;
10707
10708         kvmclock_reset(vcpu);
10709
10710         kvm_clear_async_pf_completion_queue(vcpu);
10711         kvm_async_pf_hash_reset(vcpu);
10712         vcpu->arch.apf.halted = false;
10713
10714         if (vcpu->arch.guest_fpu && kvm_mpx_supported()) {
10715                 void *mpx_state_buffer;
10716
10717                 /*
10718                  * To avoid have the INIT path from kvm_apic_has_events() that be
10719                  * called with loaded FPU and does not let userspace fix the state.
10720                  */
10721                 if (init_event)
10722                         kvm_put_guest_fpu(vcpu);
10723                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10724                                         XFEATURE_BNDREGS);
10725                 if (mpx_state_buffer)
10726                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
10727                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10728                                         XFEATURE_BNDCSR);
10729                 if (mpx_state_buffer)
10730                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
10731                 if (init_event)
10732                         kvm_load_guest_fpu(vcpu);
10733         }
10734
10735         if (!init_event) {
10736                 kvm_pmu_reset(vcpu);
10737                 vcpu->arch.smbase = 0x30000;
10738
10739                 vcpu->arch.msr_misc_features_enables = 0;
10740
10741                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10742         }
10743
10744         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
10745         vcpu->arch.regs_avail = ~0;
10746         vcpu->arch.regs_dirty = ~0;
10747
10748         vcpu->arch.ia32_xss = 0;
10749
10750         static_call(kvm_x86_vcpu_reset)(vcpu, init_event);
10751 }
10752
10753 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
10754 {
10755         struct kvm_segment cs;
10756
10757         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
10758         cs.selector = vector << 8;
10759         cs.base = vector << 12;
10760         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
10761         kvm_rip_write(vcpu, 0);
10762 }
10763 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector);
10764
10765 int kvm_arch_hardware_enable(void)
10766 {
10767         struct kvm *kvm;
10768         struct kvm_vcpu *vcpu;
10769         int i;
10770         int ret;
10771         u64 local_tsc;
10772         u64 max_tsc = 0;
10773         bool stable, backwards_tsc = false;
10774
10775         kvm_user_return_msr_cpu_online();
10776         ret = static_call(kvm_x86_hardware_enable)();
10777         if (ret != 0)
10778                 return ret;
10779
10780         local_tsc = rdtsc();
10781         stable = !kvm_check_tsc_unstable();
10782         list_for_each_entry(kvm, &vm_list, vm_list) {
10783                 kvm_for_each_vcpu(i, vcpu, kvm) {
10784                         if (!stable && vcpu->cpu == smp_processor_id())
10785                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
10786                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
10787                                 backwards_tsc = true;
10788                                 if (vcpu->arch.last_host_tsc > max_tsc)
10789                                         max_tsc = vcpu->arch.last_host_tsc;
10790                         }
10791                 }
10792         }
10793
10794         /*
10795          * Sometimes, even reliable TSCs go backwards.  This happens on
10796          * platforms that reset TSC during suspend or hibernate actions, but
10797          * maintain synchronization.  We must compensate.  Fortunately, we can
10798          * detect that condition here, which happens early in CPU bringup,
10799          * before any KVM threads can be running.  Unfortunately, we can't
10800          * bring the TSCs fully up to date with real time, as we aren't yet far
10801          * enough into CPU bringup that we know how much real time has actually
10802          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
10803          * variables that haven't been updated yet.
10804          *
10805          * So we simply find the maximum observed TSC above, then record the
10806          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
10807          * the adjustment will be applied.  Note that we accumulate
10808          * adjustments, in case multiple suspend cycles happen before some VCPU
10809          * gets a chance to run again.  In the event that no KVM threads get a
10810          * chance to run, we will miss the entire elapsed period, as we'll have
10811          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
10812          * loose cycle time.  This isn't too big a deal, since the loss will be
10813          * uniform across all VCPUs (not to mention the scenario is extremely
10814          * unlikely). It is possible that a second hibernate recovery happens
10815          * much faster than a first, causing the observed TSC here to be
10816          * smaller; this would require additional padding adjustment, which is
10817          * why we set last_host_tsc to the local tsc observed here.
10818          *
10819          * N.B. - this code below runs only on platforms with reliable TSC,
10820          * as that is the only way backwards_tsc is set above.  Also note
10821          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
10822          * have the same delta_cyc adjustment applied if backwards_tsc
10823          * is detected.  Note further, this adjustment is only done once,
10824          * as we reset last_host_tsc on all VCPUs to stop this from being
10825          * called multiple times (one for each physical CPU bringup).
10826          *
10827          * Platforms with unreliable TSCs don't have to deal with this, they
10828          * will be compensated by the logic in vcpu_load, which sets the TSC to
10829          * catchup mode.  This will catchup all VCPUs to real time, but cannot
10830          * guarantee that they stay in perfect synchronization.
10831          */
10832         if (backwards_tsc) {
10833                 u64 delta_cyc = max_tsc - local_tsc;
10834                 list_for_each_entry(kvm, &vm_list, vm_list) {
10835                         kvm->arch.backwards_tsc_observed = true;
10836                         kvm_for_each_vcpu(i, vcpu, kvm) {
10837                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
10838                                 vcpu->arch.last_host_tsc = local_tsc;
10839                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
10840                         }
10841
10842                         /*
10843                          * We have to disable TSC offset matching.. if you were
10844                          * booting a VM while issuing an S4 host suspend....
10845                          * you may have some problem.  Solving this issue is
10846                          * left as an exercise to the reader.
10847                          */
10848                         kvm->arch.last_tsc_nsec = 0;
10849                         kvm->arch.last_tsc_write = 0;
10850                 }
10851
10852         }
10853         return 0;
10854 }
10855
10856 void kvm_arch_hardware_disable(void)
10857 {
10858         static_call(kvm_x86_hardware_disable)();
10859         drop_user_return_notifiers();
10860 }
10861
10862 int kvm_arch_hardware_setup(void *opaque)
10863 {
10864         struct kvm_x86_init_ops *ops = opaque;
10865         int r;
10866
10867         rdmsrl_safe(MSR_EFER, &host_efer);
10868
10869         if (boot_cpu_has(X86_FEATURE_XSAVES))
10870                 rdmsrl(MSR_IA32_XSS, host_xss);
10871
10872         r = ops->hardware_setup();
10873         if (r != 0)
10874                 return r;
10875
10876         memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops));
10877         kvm_ops_static_call_update();
10878
10879         if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
10880                 supported_xss = 0;
10881
10882 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
10883         cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
10884 #undef __kvm_cpu_cap_has
10885
10886         if (kvm_has_tsc_control) {
10887                 /*
10888                  * Make sure the user can only configure tsc_khz values that
10889                  * fit into a signed integer.
10890                  * A min value is not calculated because it will always
10891                  * be 1 on all machines.
10892                  */
10893                 u64 max = min(0x7fffffffULL,
10894                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
10895                 kvm_max_guest_tsc_khz = max;
10896
10897                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
10898         }
10899
10900         kvm_init_msr_list();
10901         return 0;
10902 }
10903
10904 void kvm_arch_hardware_unsetup(void)
10905 {
10906         static_call(kvm_x86_hardware_unsetup)();
10907 }
10908
10909 int kvm_arch_check_processor_compat(void *opaque)
10910 {
10911         struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
10912         struct kvm_x86_init_ops *ops = opaque;
10913
10914         WARN_ON(!irqs_disabled());
10915
10916         if (__cr4_reserved_bits(cpu_has, c) !=
10917             __cr4_reserved_bits(cpu_has, &boot_cpu_data))
10918                 return -EIO;
10919
10920         return ops->check_processor_compatibility();
10921 }
10922
10923 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
10924 {
10925         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
10926 }
10927 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
10928
10929 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
10930 {
10931         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
10932 }
10933
10934 __read_mostly DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu);
10935 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu);
10936
10937 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
10938 {
10939         struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
10940
10941         vcpu->arch.l1tf_flush_l1d = true;
10942         if (pmu->version && unlikely(pmu->event_count)) {
10943                 pmu->need_cleanup = true;
10944                 kvm_make_request(KVM_REQ_PMU, vcpu);
10945         }
10946         static_call(kvm_x86_sched_in)(vcpu, cpu);
10947 }
10948
10949 void kvm_arch_free_vm(struct kvm *kvm)
10950 {
10951         kfree(to_kvm_hv(kvm)->hv_pa_pg);
10952         vfree(kvm);
10953 }
10954
10955
10956 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
10957 {
10958         if (type)
10959                 return -EINVAL;
10960
10961         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
10962         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
10963         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
10964         INIT_LIST_HEAD(&kvm->arch.lpage_disallowed_mmu_pages);
10965         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
10966         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
10967
10968         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
10969         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
10970         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
10971         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
10972                 &kvm->arch.irq_sources_bitmap);
10973
10974         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
10975         mutex_init(&kvm->arch.apic_map_lock);
10976         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
10977
10978         kvm->arch.kvmclock_offset = -get_kvmclock_base_ns();
10979         pvclock_update_vm_gtod_copy(kvm);
10980
10981         kvm->arch.guest_can_read_msr_platform_info = true;
10982
10983 #if IS_ENABLED(CONFIG_HYPERV)
10984         spin_lock_init(&kvm->arch.hv_root_tdp_lock);
10985         kvm->arch.hv_root_tdp = INVALID_PAGE;
10986 #endif
10987
10988         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
10989         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
10990
10991         kvm_apicv_init(kvm);
10992         kvm_hv_init_vm(kvm);
10993         kvm_page_track_init(kvm);
10994         kvm_mmu_init_vm(kvm);
10995
10996         return static_call(kvm_x86_vm_init)(kvm);
10997 }
10998
10999 int kvm_arch_post_init_vm(struct kvm *kvm)
11000 {
11001         return kvm_mmu_post_init_vm(kvm);
11002 }
11003
11004 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
11005 {
11006         vcpu_load(vcpu);
11007         kvm_mmu_unload(vcpu);
11008         vcpu_put(vcpu);
11009 }
11010
11011 static void kvm_free_vcpus(struct kvm *kvm)
11012 {
11013         unsigned int i;
11014         struct kvm_vcpu *vcpu;
11015
11016         /*
11017          * Unpin any mmu pages first.
11018          */
11019         kvm_for_each_vcpu(i, vcpu, kvm) {
11020                 kvm_clear_async_pf_completion_queue(vcpu);
11021                 kvm_unload_vcpu_mmu(vcpu);
11022         }
11023         kvm_for_each_vcpu(i, vcpu, kvm)
11024                 kvm_vcpu_destroy(vcpu);
11025
11026         mutex_lock(&kvm->lock);
11027         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
11028                 kvm->vcpus[i] = NULL;
11029
11030         atomic_set(&kvm->online_vcpus, 0);
11031         mutex_unlock(&kvm->lock);
11032 }
11033
11034 void kvm_arch_sync_events(struct kvm *kvm)
11035 {
11036         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
11037         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
11038         kvm_free_pit(kvm);
11039 }
11040
11041 #define  ERR_PTR_USR(e)  ((void __user *)ERR_PTR(e))
11042
11043 /**
11044  * __x86_set_memory_region: Setup KVM internal memory slot
11045  *
11046  * @kvm: the kvm pointer to the VM.
11047  * @id: the slot ID to setup.
11048  * @gpa: the GPA to install the slot (unused when @size == 0).
11049  * @size: the size of the slot. Set to zero to uninstall a slot.
11050  *
11051  * This function helps to setup a KVM internal memory slot.  Specify
11052  * @size > 0 to install a new slot, while @size == 0 to uninstall a
11053  * slot.  The return code can be one of the following:
11054  *
11055  *   HVA:           on success (uninstall will return a bogus HVA)
11056  *   -errno:        on error
11057  *
11058  * The caller should always use IS_ERR() to check the return value
11059  * before use.  Note, the KVM internal memory slots are guaranteed to
11060  * remain valid and unchanged until the VM is destroyed, i.e., the
11061  * GPA->HVA translation will not change.  However, the HVA is a user
11062  * address, i.e. its accessibility is not guaranteed, and must be
11063  * accessed via __copy_{to,from}_user().
11064  */
11065 void __user * __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
11066                                       u32 size)
11067 {
11068         int i, r;
11069         unsigned long hva, old_npages;
11070         struct kvm_memslots *slots = kvm_memslots(kvm);
11071         struct kvm_memory_slot *slot;
11072
11073         /* Called with kvm->slots_lock held.  */
11074         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
11075                 return ERR_PTR_USR(-EINVAL);
11076
11077         slot = id_to_memslot(slots, id);
11078         if (size) {
11079                 if (slot && slot->npages)
11080                         return ERR_PTR_USR(-EEXIST);
11081
11082                 /*
11083                  * MAP_SHARED to prevent internal slot pages from being moved
11084                  * by fork()/COW.
11085                  */
11086                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
11087                               MAP_SHARED | MAP_ANONYMOUS, 0);
11088                 if (IS_ERR((void *)hva))
11089                         return (void __user *)hva;
11090         } else {
11091                 if (!slot || !slot->npages)
11092                         return NULL;
11093
11094                 old_npages = slot->npages;
11095                 hva = slot->userspace_addr;
11096         }
11097
11098         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
11099                 struct kvm_userspace_memory_region m;
11100
11101                 m.slot = id | (i << 16);
11102                 m.flags = 0;
11103                 m.guest_phys_addr = gpa;
11104                 m.userspace_addr = hva;
11105                 m.memory_size = size;
11106                 r = __kvm_set_memory_region(kvm, &m);
11107                 if (r < 0)
11108                         return ERR_PTR_USR(r);
11109         }
11110
11111         if (!size)
11112                 vm_munmap(hva, old_npages * PAGE_SIZE);
11113
11114         return (void __user *)hva;
11115 }
11116 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
11117
11118 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
11119 {
11120         kvm_mmu_pre_destroy_vm(kvm);
11121 }
11122
11123 void kvm_arch_destroy_vm(struct kvm *kvm)
11124 {
11125         if (current->mm == kvm->mm) {
11126                 /*
11127                  * Free memory regions allocated on behalf of userspace,
11128                  * unless the the memory map has changed due to process exit
11129                  * or fd copying.
11130                  */
11131                 mutex_lock(&kvm->slots_lock);
11132                 __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
11133                                         0, 0);
11134                 __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
11135                                         0, 0);
11136                 __x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
11137                 mutex_unlock(&kvm->slots_lock);
11138         }
11139         static_call_cond(kvm_x86_vm_destroy)(kvm);
11140         kvm_free_msr_filter(srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1));
11141         kvm_pic_destroy(kvm);
11142         kvm_ioapic_destroy(kvm);
11143         kvm_free_vcpus(kvm);
11144         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
11145         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
11146         kvm_mmu_uninit_vm(kvm);
11147         kvm_page_track_cleanup(kvm);
11148         kvm_xen_destroy_vm(kvm);
11149         kvm_hv_destroy_vm(kvm);
11150 }
11151
11152 static void memslot_rmap_free(struct kvm_memory_slot *slot)
11153 {
11154         int i;
11155
11156         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11157                 kvfree(slot->arch.rmap[i]);
11158                 slot->arch.rmap[i] = NULL;
11159         }
11160 }
11161
11162 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
11163 {
11164         int i;
11165
11166         memslot_rmap_free(slot);
11167
11168         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11169                 kvfree(slot->arch.lpage_info[i - 1]);
11170                 slot->arch.lpage_info[i - 1] = NULL;
11171         }
11172
11173         kvm_page_track_free_memslot(slot);
11174 }
11175
11176 static int memslot_rmap_alloc(struct kvm_memory_slot *slot,
11177                               unsigned long npages)
11178 {
11179         const int sz = sizeof(*slot->arch.rmap[0]);
11180         int i;
11181
11182         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11183                 int level = i + 1;
11184                 int lpages = gfn_to_index(slot->base_gfn + npages - 1,
11185                                           slot->base_gfn, level) + 1;
11186
11187                 WARN_ON(slot->arch.rmap[i]);
11188
11189                 slot->arch.rmap[i] = kvcalloc(lpages, sz, GFP_KERNEL_ACCOUNT);
11190                 if (!slot->arch.rmap[i]) {
11191                         memslot_rmap_free(slot);
11192                         return -ENOMEM;
11193                 }
11194         }
11195
11196         return 0;
11197 }
11198
11199 int alloc_all_memslots_rmaps(struct kvm *kvm)
11200 {
11201         struct kvm_memslots *slots;
11202         struct kvm_memory_slot *slot;
11203         int r, i;
11204
11205         /*
11206          * Check if memslots alreday have rmaps early before acquiring
11207          * the slots_arch_lock below.
11208          */
11209         if (kvm_memslots_have_rmaps(kvm))
11210                 return 0;
11211
11212         mutex_lock(&kvm->slots_arch_lock);
11213
11214         /*
11215          * Read memslots_have_rmaps again, under the slots arch lock,
11216          * before allocating the rmaps
11217          */
11218         if (kvm_memslots_have_rmaps(kvm)) {
11219                 mutex_unlock(&kvm->slots_arch_lock);
11220                 return 0;
11221         }
11222
11223         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
11224                 slots = __kvm_memslots(kvm, i);
11225                 kvm_for_each_memslot(slot, slots) {
11226                         r = memslot_rmap_alloc(slot, slot->npages);
11227                         if (r) {
11228                                 mutex_unlock(&kvm->slots_arch_lock);
11229                                 return r;
11230                         }
11231                 }
11232         }
11233
11234         /*
11235          * Ensure that memslots_have_rmaps becomes true strictly after
11236          * all the rmap pointers are set.
11237          */
11238         smp_store_release(&kvm->arch.memslots_have_rmaps, true);
11239         mutex_unlock(&kvm->slots_arch_lock);
11240         return 0;
11241 }
11242
11243 static int kvm_alloc_memslot_metadata(struct kvm *kvm,
11244                                       struct kvm_memory_slot *slot,
11245                                       unsigned long npages)
11246 {
11247         int i, r;
11248
11249         /*
11250          * Clear out the previous array pointers for the KVM_MR_MOVE case.  The
11251          * old arrays will be freed by __kvm_set_memory_region() if installing
11252          * the new memslot is successful.
11253          */
11254         memset(&slot->arch, 0, sizeof(slot->arch));
11255
11256         if (kvm_memslots_have_rmaps(kvm)) {
11257                 r = memslot_rmap_alloc(slot, npages);
11258                 if (r)
11259                         return r;
11260         }
11261
11262         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11263                 struct kvm_lpage_info *linfo;
11264                 unsigned long ugfn;
11265                 int lpages;
11266                 int level = i + 1;
11267
11268                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
11269                                       slot->base_gfn, level) + 1;
11270
11271                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
11272                 if (!linfo)
11273                         goto out_free;
11274
11275                 slot->arch.lpage_info[i - 1] = linfo;
11276
11277                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
11278                         linfo[0].disallow_lpage = 1;
11279                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
11280                         linfo[lpages - 1].disallow_lpage = 1;
11281                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
11282                 /*
11283                  * If the gfn and userspace address are not aligned wrt each
11284                  * other, disable large page support for this slot.
11285                  */
11286                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1)) {
11287                         unsigned long j;
11288
11289                         for (j = 0; j < lpages; ++j)
11290                                 linfo[j].disallow_lpage = 1;
11291                 }
11292         }
11293
11294         if (kvm_page_track_create_memslot(slot, npages))
11295                 goto out_free;
11296
11297         return 0;
11298
11299 out_free:
11300         memslot_rmap_free(slot);
11301
11302         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11303                 kvfree(slot->arch.lpage_info[i - 1]);
11304                 slot->arch.lpage_info[i - 1] = NULL;
11305         }
11306         return -ENOMEM;
11307 }
11308
11309 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
11310 {
11311         struct kvm_vcpu *vcpu;
11312         int i;
11313
11314         /*
11315          * memslots->generation has been incremented.
11316          * mmio generation may have reached its maximum value.
11317          */
11318         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
11319
11320         /* Force re-initialization of steal_time cache */
11321         kvm_for_each_vcpu(i, vcpu, kvm)
11322                 kvm_vcpu_kick(vcpu);
11323 }
11324
11325 int kvm_arch_prepare_memory_region(struct kvm *kvm,
11326                                 struct kvm_memory_slot *memslot,
11327                                 const struct kvm_userspace_memory_region *mem,
11328                                 enum kvm_mr_change change)
11329 {
11330         if (change == KVM_MR_CREATE || change == KVM_MR_MOVE)
11331                 return kvm_alloc_memslot_metadata(kvm, memslot,
11332                                                   mem->memory_size >> PAGE_SHIFT);
11333         return 0;
11334 }
11335
11336
11337 static void kvm_mmu_update_cpu_dirty_logging(struct kvm *kvm, bool enable)
11338 {
11339         struct kvm_arch *ka = &kvm->arch;
11340
11341         if (!kvm_x86_ops.cpu_dirty_log_size)
11342                 return;
11343
11344         if ((enable && ++ka->cpu_dirty_logging_count == 1) ||
11345             (!enable && --ka->cpu_dirty_logging_count == 0))
11346                 kvm_make_all_cpus_request(kvm, KVM_REQ_UPDATE_CPU_DIRTY_LOGGING);
11347
11348         WARN_ON_ONCE(ka->cpu_dirty_logging_count < 0);
11349 }
11350
11351 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
11352                                      struct kvm_memory_slot *old,
11353                                      struct kvm_memory_slot *new,
11354                                      enum kvm_mr_change change)
11355 {
11356         bool log_dirty_pages = new->flags & KVM_MEM_LOG_DIRTY_PAGES;
11357
11358         /*
11359          * Update CPU dirty logging if dirty logging is being toggled.  This
11360          * applies to all operations.
11361          */
11362         if ((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)
11363                 kvm_mmu_update_cpu_dirty_logging(kvm, log_dirty_pages);
11364
11365         /*
11366          * Nothing more to do for RO slots (which can't be dirtied and can't be
11367          * made writable) or CREATE/MOVE/DELETE of a slot.
11368          *
11369          * For a memslot with dirty logging disabled:
11370          * CREATE:      No dirty mappings will already exist.
11371          * MOVE/DELETE: The old mappings will already have been cleaned up by
11372          *              kvm_arch_flush_shadow_memslot()
11373          *
11374          * For a memslot with dirty logging enabled:
11375          * CREATE:      No shadow pages exist, thus nothing to write-protect
11376          *              and no dirty bits to clear.
11377          * MOVE/DELETE: The old mappings will already have been cleaned up by
11378          *              kvm_arch_flush_shadow_memslot().
11379          */
11380         if ((change != KVM_MR_FLAGS_ONLY) || (new->flags & KVM_MEM_READONLY))
11381                 return;
11382
11383         /*
11384          * READONLY and non-flags changes were filtered out above, and the only
11385          * other flag is LOG_DIRTY_PAGES, i.e. something is wrong if dirty
11386          * logging isn't being toggled on or off.
11387          */
11388         if (WARN_ON_ONCE(!((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)))
11389                 return;
11390
11391         if (!log_dirty_pages) {
11392                 /*
11393                  * Dirty logging tracks sptes in 4k granularity, meaning that
11394                  * large sptes have to be split.  If live migration succeeds,
11395                  * the guest in the source machine will be destroyed and large
11396                  * sptes will be created in the destination.  However, if the
11397                  * guest continues to run in the source machine (for example if
11398                  * live migration fails), small sptes will remain around and
11399                  * cause bad performance.
11400                  *
11401                  * Scan sptes if dirty logging has been stopped, dropping those
11402                  * which can be collapsed into a single large-page spte.  Later
11403                  * page faults will create the large-page sptes.
11404                  */
11405                 kvm_mmu_zap_collapsible_sptes(kvm, new);
11406         } else {
11407                 /*
11408                  * Initially-all-set does not require write protecting any page,
11409                  * because they're all assumed to be dirty.
11410                  */
11411                 if (kvm_dirty_log_manual_protect_and_init_set(kvm))
11412                         return;
11413
11414                 if (kvm_x86_ops.cpu_dirty_log_size) {
11415                         kvm_mmu_slot_leaf_clear_dirty(kvm, new);
11416                         kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_2M);
11417                 } else {
11418                         kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_4K);
11419                 }
11420         }
11421 }
11422
11423 void kvm_arch_commit_memory_region(struct kvm *kvm,
11424                                 const struct kvm_userspace_memory_region *mem,
11425                                 struct kvm_memory_slot *old,
11426                                 const struct kvm_memory_slot *new,
11427                                 enum kvm_mr_change change)
11428 {
11429         if (!kvm->arch.n_requested_mmu_pages)
11430                 kvm_mmu_change_mmu_pages(kvm,
11431                                 kvm_mmu_calculate_default_mmu_pages(kvm));
11432
11433         /*
11434          * FIXME: const-ify all uses of struct kvm_memory_slot.
11435          */
11436         kvm_mmu_slot_apply_flags(kvm, old, (struct kvm_memory_slot *) new, change);
11437
11438         /* Free the arrays associated with the old memslot. */
11439         if (change == KVM_MR_MOVE)
11440                 kvm_arch_free_memslot(kvm, old);
11441 }
11442
11443 void kvm_arch_flush_shadow_all(struct kvm *kvm)
11444 {
11445         kvm_mmu_zap_all(kvm);
11446 }
11447
11448 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
11449                                    struct kvm_memory_slot *slot)
11450 {
11451         kvm_page_track_flush_slot(kvm, slot);
11452 }
11453
11454 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
11455 {
11456         return (is_guest_mode(vcpu) &&
11457                         kvm_x86_ops.guest_apic_has_interrupt &&
11458                         static_call(kvm_x86_guest_apic_has_interrupt)(vcpu));
11459 }
11460
11461 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
11462 {
11463         if (!list_empty_careful(&vcpu->async_pf.done))
11464                 return true;
11465
11466         if (kvm_apic_has_events(vcpu))
11467                 return true;
11468
11469         if (vcpu->arch.pv.pv_unhalted)
11470                 return true;
11471
11472         if (vcpu->arch.exception.pending)
11473                 return true;
11474
11475         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
11476             (vcpu->arch.nmi_pending &&
11477              static_call(kvm_x86_nmi_allowed)(vcpu, false)))
11478                 return true;
11479
11480         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
11481             (vcpu->arch.smi_pending &&
11482              static_call(kvm_x86_smi_allowed)(vcpu, false)))
11483                 return true;
11484
11485         if (kvm_arch_interrupt_allowed(vcpu) &&
11486             (kvm_cpu_has_interrupt(vcpu) ||
11487             kvm_guest_apic_has_interrupt(vcpu)))
11488                 return true;
11489
11490         if (kvm_hv_has_stimer_pending(vcpu))
11491                 return true;
11492
11493         if (is_guest_mode(vcpu) &&
11494             kvm_x86_ops.nested_ops->hv_timer_pending &&
11495             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
11496                 return true;
11497
11498         return false;
11499 }
11500
11501 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
11502 {
11503         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
11504 }
11505
11506 bool kvm_arch_dy_has_pending_interrupt(struct kvm_vcpu *vcpu)
11507 {
11508         if (vcpu->arch.apicv_active && static_call(kvm_x86_dy_apicv_has_pending_interrupt)(vcpu))
11509                 return true;
11510
11511         return false;
11512 }
11513
11514 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
11515 {
11516         if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
11517                 return true;
11518
11519         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
11520                 kvm_test_request(KVM_REQ_SMI, vcpu) ||
11521                  kvm_test_request(KVM_REQ_EVENT, vcpu))
11522                 return true;
11523
11524         return kvm_arch_dy_has_pending_interrupt(vcpu);
11525 }
11526
11527 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
11528 {
11529         if (vcpu->arch.guest_state_protected)
11530                 return true;
11531
11532         return vcpu->arch.preempted_in_kernel;
11533 }
11534
11535 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
11536 {
11537         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
11538 }
11539
11540 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
11541 {
11542         return static_call(kvm_x86_interrupt_allowed)(vcpu, false);
11543 }
11544
11545 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
11546 {
11547         /* Can't read the RIP when guest state is protected, just return 0 */
11548         if (vcpu->arch.guest_state_protected)
11549                 return 0;
11550
11551         if (is_64_bit_mode(vcpu))
11552                 return kvm_rip_read(vcpu);
11553         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
11554                      kvm_rip_read(vcpu));
11555 }
11556 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
11557
11558 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
11559 {
11560         return kvm_get_linear_rip(vcpu) == linear_rip;
11561 }
11562 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
11563
11564 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
11565 {
11566         unsigned long rflags;
11567
11568         rflags = static_call(kvm_x86_get_rflags)(vcpu);
11569         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
11570                 rflags &= ~X86_EFLAGS_TF;
11571         return rflags;
11572 }
11573 EXPORT_SYMBOL_GPL(kvm_get_rflags);
11574
11575 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
11576 {
11577         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
11578             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
11579                 rflags |= X86_EFLAGS_TF;
11580         static_call(kvm_x86_set_rflags)(vcpu, rflags);
11581 }
11582
11583 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
11584 {
11585         __kvm_set_rflags(vcpu, rflags);
11586         kvm_make_request(KVM_REQ_EVENT, vcpu);
11587 }
11588 EXPORT_SYMBOL_GPL(kvm_set_rflags);
11589
11590 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
11591 {
11592         int r;
11593
11594         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
11595               work->wakeup_all)
11596                 return;
11597
11598         r = kvm_mmu_reload(vcpu);
11599         if (unlikely(r))
11600                 return;
11601
11602         if (!vcpu->arch.mmu->direct_map &&
11603               work->arch.cr3 != vcpu->arch.mmu->get_guest_pgd(vcpu))
11604                 return;
11605
11606         kvm_mmu_do_page_fault(vcpu, work->cr2_or_gpa, 0, true);
11607 }
11608
11609 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
11610 {
11611         BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU));
11612
11613         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
11614 }
11615
11616 static inline u32 kvm_async_pf_next_probe(u32 key)
11617 {
11618         return (key + 1) & (ASYNC_PF_PER_VCPU - 1);
11619 }
11620
11621 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11622 {
11623         u32 key = kvm_async_pf_hash_fn(gfn);
11624
11625         while (vcpu->arch.apf.gfns[key] != ~0)
11626                 key = kvm_async_pf_next_probe(key);
11627
11628         vcpu->arch.apf.gfns[key] = gfn;
11629 }
11630
11631 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
11632 {
11633         int i;
11634         u32 key = kvm_async_pf_hash_fn(gfn);
11635
11636         for (i = 0; i < ASYNC_PF_PER_VCPU &&
11637                      (vcpu->arch.apf.gfns[key] != gfn &&
11638                       vcpu->arch.apf.gfns[key] != ~0); i++)
11639                 key = kvm_async_pf_next_probe(key);
11640
11641         return key;
11642 }
11643
11644 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11645 {
11646         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
11647 }
11648
11649 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11650 {
11651         u32 i, j, k;
11652
11653         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
11654
11655         if (WARN_ON_ONCE(vcpu->arch.apf.gfns[i] != gfn))
11656                 return;
11657
11658         while (true) {
11659                 vcpu->arch.apf.gfns[i] = ~0;
11660                 do {
11661                         j = kvm_async_pf_next_probe(j);
11662                         if (vcpu->arch.apf.gfns[j] == ~0)
11663                                 return;
11664                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
11665                         /*
11666                          * k lies cyclically in ]i,j]
11667                          * |    i.k.j |
11668                          * |....j i.k.| or  |.k..j i...|
11669                          */
11670                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
11671                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
11672                 i = j;
11673         }
11674 }
11675
11676 static inline int apf_put_user_notpresent(struct kvm_vcpu *vcpu)
11677 {
11678         u32 reason = KVM_PV_REASON_PAGE_NOT_PRESENT;
11679
11680         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &reason,
11681                                       sizeof(reason));
11682 }
11683
11684 static inline int apf_put_user_ready(struct kvm_vcpu *vcpu, u32 token)
11685 {
11686         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
11687
11688         return kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
11689                                              &token, offset, sizeof(token));
11690 }
11691
11692 static inline bool apf_pageready_slot_free(struct kvm_vcpu *vcpu)
11693 {
11694         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
11695         u32 val;
11696
11697         if (kvm_read_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
11698                                          &val, offset, sizeof(val)))
11699                 return false;
11700
11701         return !val;
11702 }
11703
11704 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
11705 {
11706         if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
11707                 return false;
11708
11709         if (!kvm_pv_async_pf_enabled(vcpu) ||
11710             (vcpu->arch.apf.send_user_only && static_call(kvm_x86_get_cpl)(vcpu) == 0))
11711                 return false;
11712
11713         return true;
11714 }
11715
11716 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
11717 {
11718         if (unlikely(!lapic_in_kernel(vcpu) ||
11719                      kvm_event_needs_reinjection(vcpu) ||
11720                      vcpu->arch.exception.pending))
11721                 return false;
11722
11723         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
11724                 return false;
11725
11726         /*
11727          * If interrupts are off we cannot even use an artificial
11728          * halt state.
11729          */
11730         return kvm_arch_interrupt_allowed(vcpu);
11731 }
11732
11733 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
11734                                      struct kvm_async_pf *work)
11735 {
11736         struct x86_exception fault;
11737
11738         trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
11739         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
11740
11741         if (kvm_can_deliver_async_pf(vcpu) &&
11742             !apf_put_user_notpresent(vcpu)) {
11743                 fault.vector = PF_VECTOR;
11744                 fault.error_code_valid = true;
11745                 fault.error_code = 0;
11746                 fault.nested_page_fault = false;
11747                 fault.address = work->arch.token;
11748                 fault.async_page_fault = true;
11749                 kvm_inject_page_fault(vcpu, &fault);
11750                 return true;
11751         } else {
11752                 /*
11753                  * It is not possible to deliver a paravirtualized asynchronous
11754                  * page fault, but putting the guest in an artificial halt state
11755                  * can be beneficial nevertheless: if an interrupt arrives, we
11756                  * can deliver it timely and perhaps the guest will schedule
11757                  * another process.  When the instruction that triggered a page
11758                  * fault is retried, hopefully the page will be ready in the host.
11759                  */
11760                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
11761                 return false;
11762         }
11763 }
11764
11765 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
11766                                  struct kvm_async_pf *work)
11767 {
11768         struct kvm_lapic_irq irq = {
11769                 .delivery_mode = APIC_DM_FIXED,
11770                 .vector = vcpu->arch.apf.vec
11771         };
11772
11773         if (work->wakeup_all)
11774                 work->arch.token = ~0; /* broadcast wakeup */
11775         else
11776                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
11777         trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
11778
11779         if ((work->wakeup_all || work->notpresent_injected) &&
11780             kvm_pv_async_pf_enabled(vcpu) &&
11781             !apf_put_user_ready(vcpu, work->arch.token)) {
11782                 vcpu->arch.apf.pageready_pending = true;
11783                 kvm_apic_set_irq(vcpu, &irq, NULL);
11784         }
11785
11786         vcpu->arch.apf.halted = false;
11787         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
11788 }
11789
11790 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu)
11791 {
11792         kvm_make_request(KVM_REQ_APF_READY, vcpu);
11793         if (!vcpu->arch.apf.pageready_pending)
11794                 kvm_vcpu_kick(vcpu);
11795 }
11796
11797 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu)
11798 {
11799         if (!kvm_pv_async_pf_enabled(vcpu))
11800                 return true;
11801         else
11802                 return kvm_lapic_enabled(vcpu) && apf_pageready_slot_free(vcpu);
11803 }
11804
11805 void kvm_arch_start_assignment(struct kvm *kvm)
11806 {
11807         if (atomic_inc_return(&kvm->arch.assigned_device_count) == 1)
11808                 static_call_cond(kvm_x86_start_assignment)(kvm);
11809 }
11810 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
11811
11812 void kvm_arch_end_assignment(struct kvm *kvm)
11813 {
11814         atomic_dec(&kvm->arch.assigned_device_count);
11815 }
11816 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
11817
11818 bool kvm_arch_has_assigned_device(struct kvm *kvm)
11819 {
11820         return atomic_read(&kvm->arch.assigned_device_count);
11821 }
11822 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
11823
11824 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
11825 {
11826         atomic_inc(&kvm->arch.noncoherent_dma_count);
11827 }
11828 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
11829
11830 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
11831 {
11832         atomic_dec(&kvm->arch.noncoherent_dma_count);
11833 }
11834 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
11835
11836 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
11837 {
11838         return atomic_read(&kvm->arch.noncoherent_dma_count);
11839 }
11840 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
11841
11842 bool kvm_arch_has_irq_bypass(void)
11843 {
11844         return true;
11845 }
11846
11847 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
11848                                       struct irq_bypass_producer *prod)
11849 {
11850         struct kvm_kernel_irqfd *irqfd =
11851                 container_of(cons, struct kvm_kernel_irqfd, consumer);
11852         int ret;
11853
11854         irqfd->producer = prod;
11855         kvm_arch_start_assignment(irqfd->kvm);
11856         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm,
11857                                          prod->irq, irqfd->gsi, 1);
11858
11859         if (ret)
11860                 kvm_arch_end_assignment(irqfd->kvm);
11861
11862         return ret;
11863 }
11864
11865 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
11866                                       struct irq_bypass_producer *prod)
11867 {
11868         int ret;
11869         struct kvm_kernel_irqfd *irqfd =
11870                 container_of(cons, struct kvm_kernel_irqfd, consumer);
11871
11872         WARN_ON(irqfd->producer != prod);
11873         irqfd->producer = NULL;
11874
11875         /*
11876          * When producer of consumer is unregistered, we change back to
11877          * remapped mode, so we can re-use the current implementation
11878          * when the irq is masked/disabled or the consumer side (KVM
11879          * int this case doesn't want to receive the interrupts.
11880         */
11881         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm, prod->irq, irqfd->gsi, 0);
11882         if (ret)
11883                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
11884                        " fails: %d\n", irqfd->consumer.token, ret);
11885
11886         kvm_arch_end_assignment(irqfd->kvm);
11887 }
11888
11889 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
11890                                    uint32_t guest_irq, bool set)
11891 {
11892         return static_call(kvm_x86_update_pi_irte)(kvm, host_irq, guest_irq, set);
11893 }
11894
11895 bool kvm_vector_hashing_enabled(void)
11896 {
11897         return vector_hashing;
11898 }
11899
11900 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
11901 {
11902         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
11903 }
11904 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
11905
11906
11907 int kvm_spec_ctrl_test_value(u64 value)
11908 {
11909         /*
11910          * test that setting IA32_SPEC_CTRL to given value
11911          * is allowed by the host processor
11912          */
11913
11914         u64 saved_value;
11915         unsigned long flags;
11916         int ret = 0;
11917
11918         local_irq_save(flags);
11919
11920         if (rdmsrl_safe(MSR_IA32_SPEC_CTRL, &saved_value))
11921                 ret = 1;
11922         else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value))
11923                 ret = 1;
11924         else
11925                 wrmsrl(MSR_IA32_SPEC_CTRL, saved_value);
11926
11927         local_irq_restore(flags);
11928
11929         return ret;
11930 }
11931 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value);
11932
11933 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code)
11934 {
11935         struct x86_exception fault;
11936         u32 access = error_code &
11937                 (PFERR_WRITE_MASK | PFERR_FETCH_MASK | PFERR_USER_MASK);
11938
11939         if (!(error_code & PFERR_PRESENT_MASK) ||
11940             vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, &fault) != UNMAPPED_GVA) {
11941                 /*
11942                  * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
11943                  * tables probably do not match the TLB.  Just proceed
11944                  * with the error code that the processor gave.
11945                  */
11946                 fault.vector = PF_VECTOR;
11947                 fault.error_code_valid = true;
11948                 fault.error_code = error_code;
11949                 fault.nested_page_fault = false;
11950                 fault.address = gva;
11951         }
11952         vcpu->arch.walk_mmu->inject_page_fault(vcpu, &fault);
11953 }
11954 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error);
11955
11956 /*
11957  * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
11958  * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
11959  * indicates whether exit to userspace is needed.
11960  */
11961 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
11962                               struct x86_exception *e)
11963 {
11964         if (r == X86EMUL_PROPAGATE_FAULT) {
11965                 kvm_inject_emulated_page_fault(vcpu, e);
11966                 return 1;
11967         }
11968
11969         /*
11970          * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
11971          * while handling a VMX instruction KVM could've handled the request
11972          * correctly by exiting to userspace and performing I/O but there
11973          * doesn't seem to be a real use-case behind such requests, just return
11974          * KVM_EXIT_INTERNAL_ERROR for now.
11975          */
11976         vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
11977         vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
11978         vcpu->run->internal.ndata = 0;
11979
11980         return 0;
11981 }
11982 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure);
11983
11984 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva)
11985 {
11986         bool pcid_enabled;
11987         struct x86_exception e;
11988         struct {
11989                 u64 pcid;
11990                 u64 gla;
11991         } operand;
11992         int r;
11993
11994         r = kvm_read_guest_virt(vcpu, gva, &operand, sizeof(operand), &e);
11995         if (r != X86EMUL_CONTINUE)
11996                 return kvm_handle_memory_failure(vcpu, r, &e);
11997
11998         if (operand.pcid >> 12 != 0) {
11999                 kvm_inject_gp(vcpu, 0);
12000                 return 1;
12001         }
12002
12003         pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
12004
12005         switch (type) {
12006         case INVPCID_TYPE_INDIV_ADDR:
12007                 if ((!pcid_enabled && (operand.pcid != 0)) ||
12008                     is_noncanonical_address(operand.gla, vcpu)) {
12009                         kvm_inject_gp(vcpu, 0);
12010                         return 1;
12011                 }
12012                 kvm_mmu_invpcid_gva(vcpu, operand.gla, operand.pcid);
12013                 return kvm_skip_emulated_instruction(vcpu);
12014
12015         case INVPCID_TYPE_SINGLE_CTXT:
12016                 if (!pcid_enabled && (operand.pcid != 0)) {
12017                         kvm_inject_gp(vcpu, 0);
12018                         return 1;
12019                 }
12020
12021                 kvm_invalidate_pcid(vcpu, operand.pcid);
12022                 return kvm_skip_emulated_instruction(vcpu);
12023
12024         case INVPCID_TYPE_ALL_NON_GLOBAL:
12025                 /*
12026                  * Currently, KVM doesn't mark global entries in the shadow
12027                  * page tables, so a non-global flush just degenerates to a
12028                  * global flush. If needed, we could optimize this later by
12029                  * keeping track of global entries in shadow page tables.
12030                  */
12031
12032                 fallthrough;
12033         case INVPCID_TYPE_ALL_INCL_GLOBAL:
12034                 kvm_make_request(KVM_REQ_MMU_RELOAD, vcpu);
12035                 return kvm_skip_emulated_instruction(vcpu);
12036
12037         default:
12038                 BUG(); /* We have already checked above that type <= 3 */
12039         }
12040 }
12041 EXPORT_SYMBOL_GPL(kvm_handle_invpcid);
12042
12043 static int complete_sev_es_emulated_mmio(struct kvm_vcpu *vcpu)
12044 {
12045         struct kvm_run *run = vcpu->run;
12046         struct kvm_mmio_fragment *frag;
12047         unsigned int len;
12048
12049         BUG_ON(!vcpu->mmio_needed);
12050
12051         /* Complete previous fragment */
12052         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
12053         len = min(8u, frag->len);
12054         if (!vcpu->mmio_is_write)
12055                 memcpy(frag->data, run->mmio.data, len);
12056
12057         if (frag->len <= 8) {
12058                 /* Switch to the next fragment. */
12059                 frag++;
12060                 vcpu->mmio_cur_fragment++;
12061         } else {
12062                 /* Go forward to the next mmio piece. */
12063                 frag->data += len;
12064                 frag->gpa += len;
12065                 frag->len -= len;
12066         }
12067
12068         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
12069                 vcpu->mmio_needed = 0;
12070
12071                 // VMG change, at this point, we're always done
12072                 // RIP has already been advanced
12073                 return 1;
12074         }
12075
12076         // More MMIO is needed
12077         run->mmio.phys_addr = frag->gpa;
12078         run->mmio.len = min(8u, frag->len);
12079         run->mmio.is_write = vcpu->mmio_is_write;
12080         if (run->mmio.is_write)
12081                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
12082         run->exit_reason = KVM_EXIT_MMIO;
12083
12084         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12085
12086         return 0;
12087 }
12088
12089 int kvm_sev_es_mmio_write(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12090                           void *data)
12091 {
12092         int handled;
12093         struct kvm_mmio_fragment *frag;
12094
12095         if (!data)
12096                 return -EINVAL;
12097
12098         handled = write_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12099         if (handled == bytes)
12100                 return 1;
12101
12102         bytes -= handled;
12103         gpa += handled;
12104         data += handled;
12105
12106         /*TODO: Check if need to increment number of frags */
12107         frag = vcpu->mmio_fragments;
12108         vcpu->mmio_nr_fragments = 1;
12109         frag->len = bytes;
12110         frag->gpa = gpa;
12111         frag->data = data;
12112
12113         vcpu->mmio_needed = 1;
12114         vcpu->mmio_cur_fragment = 0;
12115
12116         vcpu->run->mmio.phys_addr = gpa;
12117         vcpu->run->mmio.len = min(8u, frag->len);
12118         vcpu->run->mmio.is_write = 1;
12119         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
12120         vcpu->run->exit_reason = KVM_EXIT_MMIO;
12121
12122         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12123
12124         return 0;
12125 }
12126 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write);
12127
12128 int kvm_sev_es_mmio_read(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12129                          void *data)
12130 {
12131         int handled;
12132         struct kvm_mmio_fragment *frag;
12133
12134         if (!data)
12135                 return -EINVAL;
12136
12137         handled = read_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12138         if (handled == bytes)
12139                 return 1;
12140
12141         bytes -= handled;
12142         gpa += handled;
12143         data += handled;
12144
12145         /*TODO: Check if need to increment number of frags */
12146         frag = vcpu->mmio_fragments;
12147         vcpu->mmio_nr_fragments = 1;
12148         frag->len = bytes;
12149         frag->gpa = gpa;
12150         frag->data = data;
12151
12152         vcpu->mmio_needed = 1;
12153         vcpu->mmio_cur_fragment = 0;
12154
12155         vcpu->run->mmio.phys_addr = gpa;
12156         vcpu->run->mmio.len = min(8u, frag->len);
12157         vcpu->run->mmio.is_write = 0;
12158         vcpu->run->exit_reason = KVM_EXIT_MMIO;
12159
12160         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12161
12162         return 0;
12163 }
12164 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read);
12165
12166 static int complete_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
12167 {
12168         memcpy(vcpu->arch.guest_ins_data, vcpu->arch.pio_data,
12169                vcpu->arch.pio.count * vcpu->arch.pio.size);
12170         vcpu->arch.pio.count = 0;
12171
12172         return 1;
12173 }
12174
12175 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
12176                            unsigned int port, void *data,  unsigned int count)
12177 {
12178         int ret;
12179
12180         ret = emulator_pio_out_emulated(vcpu->arch.emulate_ctxt, size, port,
12181                                         data, count);
12182         if (ret)
12183                 return ret;
12184
12185         vcpu->arch.pio.count = 0;
12186
12187         return 0;
12188 }
12189
12190 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
12191                           unsigned int port, void *data, unsigned int count)
12192 {
12193         int ret;
12194
12195         ret = emulator_pio_in_emulated(vcpu->arch.emulate_ctxt, size, port,
12196                                        data, count);
12197         if (ret) {
12198                 vcpu->arch.pio.count = 0;
12199         } else {
12200                 vcpu->arch.guest_ins_data = data;
12201                 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_ins;
12202         }
12203
12204         return 0;
12205 }
12206
12207 int kvm_sev_es_string_io(struct kvm_vcpu *vcpu, unsigned int size,
12208                          unsigned int port, void *data,  unsigned int count,
12209                          int in)
12210 {
12211         return in ? kvm_sev_es_ins(vcpu, size, port, data, count)
12212                   : kvm_sev_es_outs(vcpu, size, port, data, count);
12213 }
12214 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io);
12215
12216 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry);
12217 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
12218 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
12219 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
12220 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
12221 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
12222 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
12223 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
12224 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
12225 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
12226 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
12227 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
12228 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
12229 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
12230 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
12231 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
12232 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
12233 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
12234 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
12235 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
12236 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
12237 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log);
12238 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request);
12239 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter);
12240 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit);
12241 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter);
12242 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit);