arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *   Yaniv Kamay  <yaniv@qumranet.com>
  15  *   Amit Shah    <amit.shah@qumranet.com>
  16  *   Ben-Ami Yassour <benami@il.ibm.com>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "ioapic.h"
  22 #include "mmu.h"
  23 #include "i8254.h"
  24 #include "tss.h"
  25 #include "kvm_cache_regs.h"
  26 #include "kvm_emulate.h"
  27 #include "x86.h"
  28 #include "cpuid.h"
  29 #include "pmu.h"
  30 #include "hyperv.h"
  31 #include "lapic.h"
  32 #include "xen.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/export.h>
  40 #include <linux/moduleparam.h>
  41 #include <linux/mman.h>
  42 #include <linux/highmem.h>
  43 #include <linux/iommu.h>
  44 #include <linux/intel-iommu.h>
  45 #include <linux/cpufreq.h>
  46 #include <linux/user-return-notifier.h>
  47 #include <linux/srcu.h>
  48 #include <linux/slab.h>
  49 #include <linux/perf_event.h>
  50 #include <linux/uaccess.h>
  51 #include <linux/hash.h>
  52 #include <linux/pci.h>
  53 #include <linux/timekeeper_internal.h>
  54 #include <linux/pvclock_gtod.h>
  55 #include <linux/kvm_irqfd.h>
  56 #include <linux/irqbypass.h>
  57 #include <linux/sched/stat.h>
  58 #include <linux/sched/isolation.h>
  59 #include <linux/mem_encrypt.h>
  60 #include <linux/entry-kvm.h>
  61 #include <linux/suspend.h>
  62
  63 #include <trace/events/kvm.h>
  64
  65 #include <asm/debugreg.h>
  66 #include <asm/msr.h>
  67 #include <asm/desc.h>
  68 #include <asm/mce.h>
  69 #include <linux/kernel_stat.h>
  70 #include <asm/fpu/internal.h> /* Ugh! */
  71 #include <asm/pvclock.h>
  72 #include <asm/div64.h>
  73 #include <asm/irq_remapping.h>
  74 #include <asm/mshyperv.h>
  75 #include <asm/hypervisor.h>
  76 #include <asm/tlbflush.h>
  77 #include <asm/intel_pt.h>
  78 #include <asm/emulate_prefix.h>
  79 #include <asm/sgx.h>
  80 #include <clocksource/hyperv_timer.h>
  81
  82 #define CREATE_TRACE_POINTS
  83 #include "trace.h"
  84
  85 #define MAX_IO_MSRS 256
  86 #define KVM_MAX_MCE_BANKS 32
  87 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  88 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  89
  90 #define emul_to_vcpu(ctxt) \
  91         ((struct kvm_vcpu *)(ctxt)->vcpu)
  92
  93 /* EFER defaults:
  94  * - enable syscall per default because its emulated by KVM
  95  * - enable LME and LMA per default on 64 bit KVM
  96  */
  97 #ifdef CONFIG_X86_64
  98 static
  99 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
 100 #else
 101 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
 102 #endif
 103
 104 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
 105
 106 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
 107                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 108
 109 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 110 static void process_nmi(struct kvm_vcpu *vcpu);
 111 static void process_smi(struct kvm_vcpu *vcpu);
 112 static void enter_smm(struct kvm_vcpu *vcpu);
 113 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 114 static void store_regs(struct kvm_vcpu *vcpu);
 115 static int sync_regs(struct kvm_vcpu *vcpu);
 116
 117 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
 118 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
 119
 120 struct kvm_x86_ops kvm_x86_ops __read_mostly;
 121 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 122
 123 #define KVM_X86_OP(func)                                             \
 124         DEFINE_STATIC_CALL_NULL(kvm_x86_##func,                      \
 125                                 *(((struct kvm_x86_ops *)0)->func));
 126 #define KVM_X86_OP_NULL KVM_X86_OP
 127 #include <asm/kvm-x86-ops.h>
 128 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits);
 129 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg);
 130 EXPORT_STATIC_CALL_GPL(kvm_x86_tlb_flush_current);
 131
 132 static bool __read_mostly ignore_msrs = 0;
 133 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 134
 135 bool __read_mostly report_ignored_msrs = true;
 136 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 137 EXPORT_SYMBOL_GPL(report_ignored_msrs);
 138
 139 unsigned int min_timer_period_us = 200;
 140 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 141
 142 static bool __read_mostly kvmclock_periodic_sync = true;
 143 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 144
 145 bool __read_mostly kvm_has_tsc_control;
 146 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 147 u32  __read_mostly kvm_max_guest_tsc_khz;
 148 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 149 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 150 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 151 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 152 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 153 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 154 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 155 bool __read_mostly kvm_has_bus_lock_exit;
 156 EXPORT_SYMBOL_GPL(kvm_has_bus_lock_exit);
 157
 158 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 159 static u32 __read_mostly tsc_tolerance_ppm = 250;
 160 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 161
 162 /*
 163  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 164  * adaptive tuning starting from default advancement of 1000ns.  '0' disables
 165  * advancement entirely.  Any other value is used as-is and disables adaptive
 166  * tuning, i.e. allows privileged userspace to set an exact advancement time.
 167  */
 168 static int __read_mostly lapic_timer_advance_ns = -1;
 169 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 170
 171 static bool __read_mostly vector_hashing = true;
 172 module_param(vector_hashing, bool, S_IRUGO);
 173
 174 bool __read_mostly enable_vmware_backdoor = false;
 175 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 176 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 177
 178 static bool __read_mostly force_emulation_prefix = false;
 179 module_param(force_emulation_prefix, bool, S_IRUGO);
 180
 181 int __read_mostly pi_inject_timer = -1;
 182 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
 183
 184 /*
 185  * Restoring the host value for MSRs that are only consumed when running in
 186  * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
 187  * returns to userspace, i.e. the kernel can run with the guest's value.
 188  */
 189 #define KVM_MAX_NR_USER_RETURN_MSRS 16
 190
 191 struct kvm_user_return_msrs {
 192         struct user_return_notifier urn;
 193         bool registered;
 194         struct kvm_user_return_msr_values {
 195                 u64 host;
 196                 u64 curr;
 197         } values[KVM_MAX_NR_USER_RETURN_MSRS];
 198 };
 199
 200 u32 __read_mostly kvm_nr_uret_msrs;
 201 EXPORT_SYMBOL_GPL(kvm_nr_uret_msrs);
 202 static u32 __read_mostly kvm_uret_msrs_list[KVM_MAX_NR_USER_RETURN_MSRS];
 203 static struct kvm_user_return_msrs __percpu *user_return_msrs;
 204
 205 #define KVM_SUPPORTED_XCR0     (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
 206                                 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
 207                                 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
 208                                 | XFEATURE_MASK_PKRU)
 209
 210 u64 __read_mostly host_efer;
 211 EXPORT_SYMBOL_GPL(host_efer);
 212
 213 bool __read_mostly allow_smaller_maxphyaddr = 0;
 214 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr);
 215
 216 bool __read_mostly enable_apicv = true;
 217 EXPORT_SYMBOL_GPL(enable_apicv);
 218
 219 u64 __read_mostly host_xss;
 220 EXPORT_SYMBOL_GPL(host_xss);
 221 u64 __read_mostly supported_xss;
 222 EXPORT_SYMBOL_GPL(supported_xss);
 223
 224 struct kvm_stats_debugfs_item debugfs_entries[] = {
 225         VCPU_STAT("pf_fixed", pf_fixed),
 226         VCPU_STAT("pf_guest", pf_guest),
 227         VCPU_STAT("tlb_flush", tlb_flush),
 228         VCPU_STAT("invlpg", invlpg),
 229         VCPU_STAT("exits", exits),
 230         VCPU_STAT("io_exits", io_exits),
 231         VCPU_STAT("mmio_exits", mmio_exits),
 232         VCPU_STAT("signal_exits", signal_exits),
 233         VCPU_STAT("irq_window", irq_window_exits),
 234         VCPU_STAT("nmi_window", nmi_window_exits),
 235         VCPU_STAT("halt_exits", halt_exits),
 236         VCPU_STAT("halt_successful_poll", halt_successful_poll),
 237         VCPU_STAT("halt_attempted_poll", halt_attempted_poll),
 238         VCPU_STAT("halt_poll_invalid", halt_poll_invalid),
 239         VCPU_STAT("halt_wakeup", halt_wakeup),
 240         VCPU_STAT("hypercalls", hypercalls),
 241         VCPU_STAT("request_irq", request_irq_exits),
 242         VCPU_STAT("irq_exits", irq_exits),
 243         VCPU_STAT("host_state_reload", host_state_reload),
 244         VCPU_STAT("fpu_reload", fpu_reload),
 245         VCPU_STAT("insn_emulation", insn_emulation),
 246         VCPU_STAT("insn_emulation_fail", insn_emulation_fail),
 247         VCPU_STAT("irq_injections", irq_injections),
 248         VCPU_STAT("nmi_injections", nmi_injections),
 249         VCPU_STAT("req_event", req_event),
 250         VCPU_STAT("l1d_flush", l1d_flush),
 251         VCPU_STAT("halt_poll_success_ns", halt_poll_success_ns),
 252         VCPU_STAT("halt_poll_fail_ns", halt_poll_fail_ns),
 253         VCPU_STAT("nested_run", nested_run),
 254         VCPU_STAT("directed_yield_attempted", directed_yield_attempted),
 255         VCPU_STAT("directed_yield_successful", directed_yield_successful),
 256         VCPU_STAT("guest_mode", guest_mode),
 257         VM_STAT("mmu_shadow_zapped", mmu_shadow_zapped),
 258         VM_STAT("mmu_pte_write", mmu_pte_write),
 259         VM_STAT("mmu_pde_zapped", mmu_pde_zapped),
 260         VM_STAT("mmu_flooded", mmu_flooded),
 261         VM_STAT("mmu_recycled", mmu_recycled),
 262         VM_STAT("mmu_cache_miss", mmu_cache_miss),
 263         VM_STAT("mmu_unsync", mmu_unsync),
 264         VM_STAT("remote_tlb_flush", remote_tlb_flush),
 265         VM_STAT("largepages", lpages, .mode = 0444),
 266         VM_STAT("nx_largepages_splitted", nx_lpage_splits, .mode = 0444),
 267         VM_STAT("max_mmu_page_hash_collisions", max_mmu_page_hash_collisions),
 268         { NULL }
 269 };
 270
 271 u64 __read_mostly host_xcr0;
 272 u64 __read_mostly supported_xcr0;
 273 EXPORT_SYMBOL_GPL(supported_xcr0);
 274
 275 static struct kmem_cache *x86_fpu_cache;
 276
 277 static struct kmem_cache *x86_emulator_cache;
 278
 279 /*
 280  * When called, it means the previous get/set msr reached an invalid msr.
 281  * Return true if we want to ignore/silent this failed msr access.
 282  */
 283 static bool kvm_msr_ignored_check(u32 msr, u64 data, bool write)
 284 {
 285         const char *op = write ? "wrmsr" : "rdmsr";
 286
 287         if (ignore_msrs) {
 288                 if (report_ignored_msrs)
 289                         kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
 290                                       op, msr, data);
 291                 /* Mask the error */
 292                 return true;
 293         } else {
 294                 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
 295                                       op, msr, data);
 296                 return false;
 297         }
 298 }
 299
 300 static struct kmem_cache *kvm_alloc_emulator_cache(void)
 301 {
 302         unsigned int useroffset = offsetof(struct x86_emulate_ctxt, src);
 303         unsigned int size = sizeof(struct x86_emulate_ctxt);
 304
 305         return kmem_cache_create_usercopy("x86_emulator", size,
 306                                           __alignof__(struct x86_emulate_ctxt),
 307                                           SLAB_ACCOUNT, useroffset,
 308                                           size - useroffset, NULL);
 309 }
 310
 311 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 312
 313 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 314 {
 315         int i;
 316         for (i = 0; i < ASYNC_PF_PER_VCPU; i++)
 317                 vcpu->arch.apf.gfns[i] = ~0;
 318 }
 319
 320 static void kvm_on_user_return(struct user_return_notifier *urn)
 321 {
 322         unsigned slot;
 323         struct kvm_user_return_msrs *msrs
 324                 = container_of(urn, struct kvm_user_return_msrs, urn);
 325         struct kvm_user_return_msr_values *values;
 326         unsigned long flags;
 327
 328         /*
 329          * Disabling irqs at this point since the following code could be
 330          * interrupted and executed through kvm_arch_hardware_disable()
 331          */
 332         local_irq_save(flags);
 333         if (msrs->registered) {
 334                 msrs->registered = false;
 335                 user_return_notifier_unregister(urn);
 336         }
 337         local_irq_restore(flags);
 338         for (slot = 0; slot < kvm_nr_uret_msrs; ++slot) {
 339                 values = &msrs->values[slot];
 340                 if (values->host != values->curr) {
 341                         wrmsrl(kvm_uret_msrs_list[slot], values->host);
 342                         values->curr = values->host;
 343                 }
 344         }
 345 }
 346
 347 static int kvm_probe_user_return_msr(u32 msr)
 348 {
 349         u64 val;
 350         int ret;
 351
 352         preempt_disable();
 353         ret = rdmsrl_safe(msr, &val);
 354         if (ret)
 355                 goto out;
 356         ret = wrmsrl_safe(msr, val);
 357 out:
 358         preempt_enable();
 359         return ret;
 360 }
 361
 362 int kvm_add_user_return_msr(u32 msr)
 363 {
 364         BUG_ON(kvm_nr_uret_msrs >= KVM_MAX_NR_USER_RETURN_MSRS);
 365
 366         if (kvm_probe_user_return_msr(msr))
 367                 return -1;
 368
 369         kvm_uret_msrs_list[kvm_nr_uret_msrs] = msr;
 370         return kvm_nr_uret_msrs++;
 371 }
 372 EXPORT_SYMBOL_GPL(kvm_add_user_return_msr);
 373
 374 int kvm_find_user_return_msr(u32 msr)
 375 {
 376         int i;
 377
 378         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 379                 if (kvm_uret_msrs_list[i] == msr)
 380                         return i;
 381         }
 382         return -1;
 383 }
 384 EXPORT_SYMBOL_GPL(kvm_find_user_return_msr);
 385
 386 static void kvm_user_return_msr_cpu_online(void)
 387 {
 388         unsigned int cpu = smp_processor_id();
 389         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 390         u64 value;
 391         int i;
 392
 393         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 394                 rdmsrl_safe(kvm_uret_msrs_list[i], &value);
 395                 msrs->values[i].host = value;
 396                 msrs->values[i].curr = value;
 397         }
 398 }
 399
 400 int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)
 401 {
 402         unsigned int cpu = smp_processor_id();
 403         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 404         int err;
 405
 406         value = (value & mask) | (msrs->values[slot].host & ~mask);
 407         if (value == msrs->values[slot].curr)
 408                 return 0;
 409         err = wrmsrl_safe(kvm_uret_msrs_list[slot], value);
 410         if (err)
 411                 return 1;
 412
 413         msrs->values[slot].curr = value;
 414         if (!msrs->registered) {
 415                 msrs->urn.on_user_return = kvm_on_user_return;
 416                 user_return_notifier_register(&msrs->urn);
 417                 msrs->registered = true;
 418         }
 419         return 0;
 420 }
 421 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr);
 422
 423 static void drop_user_return_notifiers(void)
 424 {
 425         unsigned int cpu = smp_processor_id();
 426         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 427
 428         if (msrs->registered)
 429                 kvm_on_user_return(&msrs->urn);
 430 }
 431
 432 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 433 {
 434         return vcpu->arch.apic_base;
 435 }
 436 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 437
 438 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 439 {
 440         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 441 }
 442 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 443
 444 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 445 {
 446         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 447         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 448         u64 reserved_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu) | 0x2ff |
 449                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 450
 451         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 452                 return 1;
 453         if (!msr_info->host_initiated) {
 454                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 455                         return 1;
 456                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 457                         return 1;
 458         }
 459
 460         kvm_lapic_set_base(vcpu, msr_info->data);
 461         kvm_recalculate_apic_map(vcpu->kvm);
 462         return 0;
 463 }
 464 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 465
 466 asmlinkage __visible noinstr void kvm_spurious_fault(void)
 467 {
 468         /* Fault while not rebooting.  We want the trace. */
 469         BUG_ON(!kvm_rebooting);
 470 }
 471 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 472
 473 #define EXCPT_BENIGN            0
 474 #define EXCPT_CONTRIBUTORY      1
 475 #define EXCPT_PF                2
 476
 477 static int exception_class(int vector)
 478 {
 479         switch (vector) {
 480         case PF_VECTOR:
 481                 return EXCPT_PF;
 482         case DE_VECTOR:
 483         case TS_VECTOR:
 484         case NP_VECTOR:
 485         case SS_VECTOR:
 486         case GP_VECTOR:
 487                 return EXCPT_CONTRIBUTORY;
 488         default:
 489                 break;
 490         }
 491         return EXCPT_BENIGN;
 492 }
 493
 494 #define EXCPT_FAULT             0
 495 #define EXCPT_TRAP              1
 496 #define EXCPT_ABORT             2
 497 #define EXCPT_INTERRUPT         3
 498
 499 static int exception_type(int vector)
 500 {
 501         unsigned int mask;
 502
 503         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 504                 return EXCPT_INTERRUPT;
 505
 506         mask = 1 << vector;
 507
 508         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 509         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 510                 return EXCPT_TRAP;
 511
 512         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 513                 return EXCPT_ABORT;
 514
 515         /* Reserved exceptions will result in fault */
 516         return EXCPT_FAULT;
 517 }
 518
 519 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 520 {
 521         unsigned nr = vcpu->arch.exception.nr;
 522         bool has_payload = vcpu->arch.exception.has_payload;
 523         unsigned long payload = vcpu->arch.exception.payload;
 524
 525         if (!has_payload)
 526                 return;
 527
 528         switch (nr) {
 529         case DB_VECTOR:
 530                 /*
 531                  * "Certain debug exceptions may clear bit 0-3.  The
 532                  * remaining contents of the DR6 register are never
 533                  * cleared by the processor".
 534                  */
 535                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 536                 /*
 537                  * In order to reflect the #DB exception payload in guest
 538                  * dr6, three components need to be considered: active low
 539                  * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
 540                  * DR6_BS and DR6_BT)
 541                  * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
 542                  * In the target guest dr6:
 543                  * FIXED_1 bits should always be set.
 544                  * Active low bits should be cleared if 1-setting in payload.
 545                  * Active high bits should be set if 1-setting in payload.
 546                  *
 547                  * Note, the payload is compatible with the pending debug
 548                  * exceptions/exit qualification under VMX, that active_low bits
 549                  * are active high in payload.
 550                  * So they need to be flipped for DR6.
 551                  */
 552                 vcpu->arch.dr6 |= DR6_ACTIVE_LOW;
 553                 vcpu->arch.dr6 |= payload;
 554                 vcpu->arch.dr6 ^= payload & DR6_ACTIVE_LOW;
 555
 556                 /*
 557                  * The #DB payload is defined as compatible with the 'pending
 558                  * debug exceptions' field under VMX, not DR6. While bit 12 is
 559                  * defined in the 'pending debug exceptions' field (enabled
 560                  * breakpoint), it is reserved and must be zero in DR6.
 561                  */
 562                 vcpu->arch.dr6 &= ~BIT(12);
 563                 break;
 564         case PF_VECTOR:
 565                 vcpu->arch.cr2 = payload;
 566                 break;
 567         }
 568
 569         vcpu->arch.exception.has_payload = false;
 570         vcpu->arch.exception.payload = 0;
 571 }
 572 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 573
 574 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 575                 unsigned nr, bool has_error, u32 error_code,
 576                 bool has_payload, unsigned long payload, bool reinject)
 577 {
 578         u32 prev_nr;
 579         int class1, class2;
 580
 581         kvm_make_request(KVM_REQ_EVENT, vcpu);
 582
 583         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 584         queue:
 585                 if (reinject) {
 586                         /*
 587                          * On vmentry, vcpu->arch.exception.pending is only
 588                          * true if an event injection was blocked by
 589                          * nested_run_pending.  In that case, however,
 590                          * vcpu_enter_guest requests an immediate exit,
 591                          * and the guest shouldn't proceed far enough to
 592                          * need reinjection.
 593                          */
 594                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 595                         vcpu->arch.exception.injected = true;
 596                         if (WARN_ON_ONCE(has_payload)) {
 597                                 /*
 598                                  * A reinjected event has already
 599                                  * delivered its payload.
 600                                  */
 601                                 has_payload = false;
 602                                 payload = 0;
 603                         }
 604                 } else {
 605                         vcpu->arch.exception.pending = true;
 606                         vcpu->arch.exception.injected = false;
 607                 }
 608                 vcpu->arch.exception.has_error_code = has_error;
 609                 vcpu->arch.exception.nr = nr;
 610                 vcpu->arch.exception.error_code = error_code;
 611                 vcpu->arch.exception.has_payload = has_payload;
 612                 vcpu->arch.exception.payload = payload;
 613                 if (!is_guest_mode(vcpu))
 614                         kvm_deliver_exception_payload(vcpu);
 615                 return;
 616         }
 617
 618         /* to check exception */
 619         prev_nr = vcpu->arch.exception.nr;
 620         if (prev_nr == DF_VECTOR) {
 621                 /* triple fault -> shutdown */
 622                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 623                 return;
 624         }
 625         class1 = exception_class(prev_nr);
 626         class2 = exception_class(nr);
 627         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 628                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 629                 /*
 630                  * Generate double fault per SDM Table 5-5.  Set
 631                  * exception.pending = true so that the double fault
 632                  * can trigger a nested vmexit.
 633                  */
 634                 vcpu->arch.exception.pending = true;
 635                 vcpu->arch.exception.injected = false;
 636                 vcpu->arch.exception.has_error_code = true;
 637                 vcpu->arch.exception.nr = DF_VECTOR;
 638                 vcpu->arch.exception.error_code = 0;
 639                 vcpu->arch.exception.has_payload = false;
 640                 vcpu->arch.exception.payload = 0;
 641         } else
 642                 /* replace previous exception with a new one in a hope
 643                    that instruction re-execution will regenerate lost
 644                    exception */
 645                 goto queue;
 646 }
 647
 648 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 649 {
 650         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 651 }
 652 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 653
 654 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 655 {
 656         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 657 }
 658 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 659
 660 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 661                            unsigned long payload)
 662 {
 663         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 664 }
 665 EXPORT_SYMBOL_GPL(kvm_queue_exception_p);
 666
 667 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 668                                     u32 error_code, unsigned long payload)
 669 {
 670         kvm_multiple_exception(vcpu, nr, true, error_code,
 671                                true, payload, false);
 672 }
 673
 674 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 675 {
 676         if (err)
 677                 kvm_inject_gp(vcpu, 0);
 678         else
 679                 return kvm_skip_emulated_instruction(vcpu);
 680
 681         return 1;
 682 }
 683 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 684
 685 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 686 {
 687         ++vcpu->stat.pf_guest;
 688         vcpu->arch.exception.nested_apf =
 689                 is_guest_mode(vcpu) && fault->async_page_fault;
 690         if (vcpu->arch.exception.nested_apf) {
 691                 vcpu->arch.apf.nested_apf_token = fault->address;
 692                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 693         } else {
 694                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 695                                         fault->address);
 696         }
 697 }
 698 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 699
 700 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
 701                                     struct x86_exception *fault)
 702 {
 703         struct kvm_mmu *fault_mmu;
 704         WARN_ON_ONCE(fault->vector != PF_VECTOR);
 705
 706         fault_mmu = fault->nested_page_fault ? vcpu->arch.mmu :
 707                                                vcpu->arch.walk_mmu;
 708
 709         /*
 710          * Invalidate the TLB entry for the faulting address, if it exists,
 711          * else the access will fault indefinitely (and to emulate hardware).
 712          */
 713         if ((fault->error_code & PFERR_PRESENT_MASK) &&
 714             !(fault->error_code & PFERR_RSVD_MASK))
 715                 kvm_mmu_invalidate_gva(vcpu, fault_mmu, fault->address,
 716                                        fault_mmu->root_hpa);
 717
 718         fault_mmu->inject_page_fault(vcpu, fault);
 719         return fault->nested_page_fault;
 720 }
 721 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault);
 722
 723 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 724 {
 725         atomic_inc(&vcpu->arch.nmi_queued);
 726         kvm_make_request(KVM_REQ_NMI, vcpu);
 727 }
 728 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 729
 730 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 731 {
 732         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 733 }
 734 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 735
 736 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 737 {
 738         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 739 }
 740 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 741
 742 /*
 743  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 744  * a #GP and return false.
 745  */
 746 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 747 {
 748         if (static_call(kvm_x86_get_cpl)(vcpu) <= required_cpl)
 749                 return true;
 750         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 751         return false;
 752 }
 753 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 754
 755 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 756 {
 757         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 758                 return true;
 759
 760         kvm_queue_exception(vcpu, UD_VECTOR);
 761         return false;
 762 }
 763 EXPORT_SYMBOL_GPL(kvm_require_dr);
 764
 765 /*
 766  * This function will be used to read from the physical memory of the currently
 767  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 768  * can read from guest physical or from the guest's guest physical memory.
 769  */
 770 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 771                             gfn_t ngfn, void *data, int offset, int len,
 772                             u32 access)
 773 {
 774         struct x86_exception exception;
 775         gfn_t real_gfn;
 776         gpa_t ngpa;
 777
 778         ngpa     = gfn_to_gpa(ngfn);
 779         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 780         if (real_gfn == UNMAPPED_GVA)
 781                 return -EFAULT;
 782
 783         real_gfn = gpa_to_gfn(real_gfn);
 784
 785         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 786 }
 787 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 788
 789 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
 790 {
 791         return vcpu->arch.reserved_gpa_bits | rsvd_bits(5, 8) | rsvd_bits(1, 2);
 792 }
 793
 794 /*
 795  * Load the pae pdptrs.  Return 1 if they are all valid, 0 otherwise.
 796  */
 797 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 798 {
 799         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 800         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 801         int i;
 802         int ret;
 803         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 804
 805         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 806                                       offset * sizeof(u64), sizeof(pdpte),
 807                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 808         if (ret < 0) {
 809                 ret = 0;
 810                 goto out;
 811         }
 812         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 813                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 814                     (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
 815                         ret = 0;
 816                         goto out;
 817                 }
 818         }
 819         ret = 1;
 820
 821         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 822         kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
 823         vcpu->arch.pdptrs_from_userspace = false;
 824
 825 out:
 826
 827         return ret;
 828 }
 829 EXPORT_SYMBOL_GPL(load_pdptrs);
 830
 831 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0)
 832 {
 833         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 834
 835         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 836                 kvm_clear_async_pf_completion_queue(vcpu);
 837                 kvm_async_pf_hash_reset(vcpu);
 838         }
 839
 840         if ((cr0 ^ old_cr0) & update_bits)
 841                 kvm_mmu_reset_context(vcpu);
 842
 843         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 844             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 845             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 846                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 847 }
 848 EXPORT_SYMBOL_GPL(kvm_post_set_cr0);
 849
 850 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 851 {
 852         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 853         unsigned long pdptr_bits = X86_CR0_CD | X86_CR0_NW | X86_CR0_PG;
 854
 855         cr0 |= X86_CR0_ET;
 856
 857 #ifdef CONFIG_X86_64
 858         if (cr0 & 0xffffffff00000000UL)
 859                 return 1;
 860 #endif
 861
 862         cr0 &= ~CR0_RESERVED_BITS;
 863
 864         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 865                 return 1;
 866
 867         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 868                 return 1;
 869
 870 #ifdef CONFIG_X86_64
 871         if ((vcpu->arch.efer & EFER_LME) && !is_paging(vcpu) &&
 872             (cr0 & X86_CR0_PG)) {
 873                 int cs_db, cs_l;
 874
 875                 if (!is_pae(vcpu))
 876                         return 1;
 877                 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
 878                 if (cs_l)
 879                         return 1;
 880         }
 881 #endif
 882         if (!(vcpu->arch.efer & EFER_LME) && (cr0 & X86_CR0_PG) &&
 883             is_pae(vcpu) && ((cr0 ^ old_cr0) & pdptr_bits) &&
 884             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu)))
 885                 return 1;
 886
 887         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 888                 return 1;
 889
 890         static_call(kvm_x86_set_cr0)(vcpu, cr0);
 891
 892         kvm_post_set_cr0(vcpu, old_cr0, cr0);
 893
 894         return 0;
 895 }
 896 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 897
 898 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 899 {
 900         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 901 }
 902 EXPORT_SYMBOL_GPL(kvm_lmsw);
 903
 904 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
 905 {
 906         if (vcpu->arch.guest_state_protected)
 907                 return;
 908
 909         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 910
 911                 if (vcpu->arch.xcr0 != host_xcr0)
 912                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 913
 914                 if (vcpu->arch.xsaves_enabled &&
 915                     vcpu->arch.ia32_xss != host_xss)
 916                         wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
 917         }
 918
 919         if (static_cpu_has(X86_FEATURE_PKU) &&
 920             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 921              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU)) &&
 922             vcpu->arch.pkru != vcpu->arch.host_pkru)
 923                 __write_pkru(vcpu->arch.pkru);
 924 }
 925 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
 926
 927 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
 928 {
 929         if (vcpu->arch.guest_state_protected)
 930                 return;
 931
 932         if (static_cpu_has(X86_FEATURE_PKU) &&
 933             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 934              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU))) {
 935                 vcpu->arch.pkru = rdpkru();
 936                 if (vcpu->arch.pkru != vcpu->arch.host_pkru)
 937                         __write_pkru(vcpu->arch.host_pkru);
 938         }
 939
 940         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 941
 942                 if (vcpu->arch.xcr0 != host_xcr0)
 943                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 944
 945                 if (vcpu->arch.xsaves_enabled &&
 946                     vcpu->arch.ia32_xss != host_xss)
 947                         wrmsrl(MSR_IA32_XSS, host_xss);
 948         }
 949
 950 }
 951 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
 952
 953 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 954 {
 955         u64 xcr0 = xcr;
 956         u64 old_xcr0 = vcpu->arch.xcr0;
 957         u64 valid_bits;
 958
 959         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 960         if (index != XCR_XFEATURE_ENABLED_MASK)
 961                 return 1;
 962         if (!(xcr0 & XFEATURE_MASK_FP))
 963                 return 1;
 964         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 965                 return 1;
 966
 967         /*
 968          * Do not allow the guest to set bits that we do not support
 969          * saving.  However, xcr0 bit 0 is always set, even if the
 970          * emulated CPU does not support XSAVE (see fx_init).
 971          */
 972         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 973         if (xcr0 & ~valid_bits)
 974                 return 1;
 975
 976         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 977             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 978                 return 1;
 979
 980         if (xcr0 & XFEATURE_MASK_AVX512) {
 981                 if (!(xcr0 & XFEATURE_MASK_YMM))
 982                         return 1;
 983                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 984                         return 1;
 985         }
 986         vcpu->arch.xcr0 = xcr0;
 987
 988         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 989                 kvm_update_cpuid_runtime(vcpu);
 990         return 0;
 991 }
 992
 993 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu)
 994 {
 995         if (static_call(kvm_x86_get_cpl)(vcpu) != 0 ||
 996             __kvm_set_xcr(vcpu, kvm_rcx_read(vcpu), kvm_read_edx_eax(vcpu))) {
 997                 kvm_inject_gp(vcpu, 0);
 998                 return 1;
 999         }
1000
1001         return kvm_skip_emulated_instruction(vcpu);
1002 }
1003 EXPORT_SYMBOL_GPL(kvm_emulate_xsetbv);
1004
1005 bool kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1006 {
1007         if (cr4 & cr4_reserved_bits)
1008                 return false;
1009
1010         if (cr4 & vcpu->arch.cr4_guest_rsvd_bits)
1011                 return false;
1012
1013         return static_call(kvm_x86_is_valid_cr4)(vcpu, cr4);
1014 }
1015 EXPORT_SYMBOL_GPL(kvm_is_valid_cr4);
1016
1017 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4)
1018 {
1019         unsigned long mmu_role_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
1020                                       X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
1021
1022         if (((cr4 ^ old_cr4) & mmu_role_bits) ||
1023             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
1024                 kvm_mmu_reset_context(vcpu);
1025 }
1026 EXPORT_SYMBOL_GPL(kvm_post_set_cr4);
1027
1028 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1029 {
1030         unsigned long old_cr4 = kvm_read_cr4(vcpu);
1031         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
1032                                    X86_CR4_SMEP;
1033
1034         if (!kvm_is_valid_cr4(vcpu, cr4))
1035                 return 1;
1036
1037         if (is_long_mode(vcpu)) {
1038                 if (!(cr4 & X86_CR4_PAE))
1039                         return 1;
1040                 if ((cr4 ^ old_cr4) & X86_CR4_LA57)
1041                         return 1;
1042         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
1043                    && ((cr4 ^ old_cr4) & pdptr_bits)
1044                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
1045                                    kvm_read_cr3(vcpu)))
1046                 return 1;
1047
1048         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
1049                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
1050                         return 1;
1051
1052                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1053                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
1054                         return 1;
1055         }
1056
1057         static_call(kvm_x86_set_cr4)(vcpu, cr4);
1058
1059         kvm_post_set_cr4(vcpu, old_cr4, cr4);
1060
1061         return 0;
1062 }
1063 EXPORT_SYMBOL_GPL(kvm_set_cr4);
1064
1065 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1066 {
1067         bool skip_tlb_flush = false;
1068 #ifdef CONFIG_X86_64
1069         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
1070
1071         if (pcid_enabled) {
1072                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
1073                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
1074         }
1075 #endif
1076
1077         /* PDPTRs are always reloaded for PAE paging. */
1078         if (cr3 == kvm_read_cr3(vcpu) && !is_pae_paging(vcpu)) {
1079                 if (!skip_tlb_flush) {
1080                         kvm_mmu_sync_roots(vcpu);
1081                         kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1082                 }
1083                 return 0;
1084         }
1085
1086         /*
1087          * Do not condition the GPA check on long mode, this helper is used to
1088          * stuff CR3, e.g. for RSM emulation, and there is no guarantee that
1089          * the current vCPU mode is accurate.
1090          */
1091         if (kvm_vcpu_is_illegal_gpa(vcpu, cr3))
1092                 return 1;
1093
1094         if (is_pae_paging(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
1095                 return 1;
1096
1097         kvm_mmu_new_pgd(vcpu, cr3, skip_tlb_flush, skip_tlb_flush);
1098         vcpu->arch.cr3 = cr3;
1099         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
1100
1101         return 0;
1102 }
1103 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1104
1105 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1106 {
1107         if (cr8 & CR8_RESERVED_BITS)
1108                 return 1;
1109         if (lapic_in_kernel(vcpu))
1110                 kvm_lapic_set_tpr(vcpu, cr8);
1111         else
1112                 vcpu->arch.cr8 = cr8;
1113         return 0;
1114 }
1115 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1116
1117 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1118 {
1119         if (lapic_in_kernel(vcpu))
1120                 return kvm_lapic_get_cr8(vcpu);
1121         else
1122                 return vcpu->arch.cr8;
1123 }
1124 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1125
1126 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1127 {
1128         int i;
1129
1130         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1131                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1132                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1133                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
1134         }
1135 }
1136
1137 void kvm_update_dr7(struct kvm_vcpu *vcpu)
1138 {
1139         unsigned long dr7;
1140
1141         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1142                 dr7 = vcpu->arch.guest_debug_dr7;
1143         else
1144                 dr7 = vcpu->arch.dr7;
1145         static_call(kvm_x86_set_dr7)(vcpu, dr7);
1146         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1147         if (dr7 & DR7_BP_EN_MASK)
1148                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1149 }
1150 EXPORT_SYMBOL_GPL(kvm_update_dr7);
1151
1152 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1153 {
1154         u64 fixed = DR6_FIXED_1;
1155
1156         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1157                 fixed |= DR6_RTM;
1158
1159         if (!guest_cpuid_has(vcpu, X86_FEATURE_BUS_LOCK_DETECT))
1160                 fixed |= DR6_BUS_LOCK;
1161         return fixed;
1162 }
1163
1164 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1165 {
1166         size_t size = ARRAY_SIZE(vcpu->arch.db);
1167
1168         switch (dr) {
1169         case 0 ... 3:
1170                 vcpu->arch.db[array_index_nospec(dr, size)] = val;
1171                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1172                         vcpu->arch.eff_db[dr] = val;
1173                 break;
1174         case 4:
1175         case 6:
1176                 if (!kvm_dr6_valid(val))
1177                         return 1; /* #GP */
1178                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1179                 break;
1180         case 5:
1181         default: /* 7 */
1182                 if (!kvm_dr7_valid(val))
1183                         return 1; /* #GP */
1184                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1185                 kvm_update_dr7(vcpu);
1186                 break;
1187         }
1188
1189         return 0;
1190 }
1191 EXPORT_SYMBOL_GPL(kvm_set_dr);
1192
1193 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1194 {
1195         size_t size = ARRAY_SIZE(vcpu->arch.db);
1196
1197         switch (dr) {
1198         case 0 ... 3:
1199                 *val = vcpu->arch.db[array_index_nospec(dr, size)];
1200                 break;
1201         case 4:
1202         case 6:
1203                 *val = vcpu->arch.dr6;
1204                 break;
1205         case 5:
1206         default: /* 7 */
1207                 *val = vcpu->arch.dr7;
1208                 break;
1209         }
1210 }
1211 EXPORT_SYMBOL_GPL(kvm_get_dr);
1212
1213 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu)
1214 {
1215         u32 ecx = kvm_rcx_read(vcpu);
1216         u64 data;
1217
1218         if (kvm_pmu_rdpmc(vcpu, ecx, &data)) {
1219                 kvm_inject_gp(vcpu, 0);
1220                 return 1;
1221         }
1222
1223         kvm_rax_write(vcpu, (u32)data);
1224         kvm_rdx_write(vcpu, data >> 32);
1225         return kvm_skip_emulated_instruction(vcpu);
1226 }
1227 EXPORT_SYMBOL_GPL(kvm_emulate_rdpmc);
1228
1229 /*
1230  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1231  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1232  *
1233  * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1234  * extract the supported MSRs from the related const lists.
1235  * msrs_to_save is selected from the msrs_to_save_all to reflect the
1236  * capabilities of the host cpu. This capabilities test skips MSRs that are
1237  * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1238  * may depend on host virtualization features rather than host cpu features.
1239  */
1240
1241 static const u32 msrs_to_save_all[] = {
1242         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1243         MSR_STAR,
1244 #ifdef CONFIG_X86_64
1245         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1246 #endif
1247         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1248         MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1249         MSR_IA32_SPEC_CTRL,
1250         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1251         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1252         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1253         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1254         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1255         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1256         MSR_IA32_UMWAIT_CONTROL,
1257
1258         MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1259         MSR_ARCH_PERFMON_FIXED_CTR0 + 2, MSR_ARCH_PERFMON_FIXED_CTR0 + 3,
1260         MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1261         MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1262         MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1263         MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1264         MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1265         MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1266         MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1267         MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1268         MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1269         MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1270         MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1271         MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1272         MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1273         MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1274         MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1275         MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1276         MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1277         MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1278         MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1279         MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1280 };
1281
1282 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
1283 static unsigned num_msrs_to_save;
1284
1285 static const u32 emulated_msrs_all[] = {
1286         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1287         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1288         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1289         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1290         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1291         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1292         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1293         HV_X64_MSR_RESET,
1294         HV_X64_MSR_VP_INDEX,
1295         HV_X64_MSR_VP_RUNTIME,
1296         HV_X64_MSR_SCONTROL,
1297         HV_X64_MSR_STIMER0_CONFIG,
1298         HV_X64_MSR_VP_ASSIST_PAGE,
1299         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1300         HV_X64_MSR_TSC_EMULATION_STATUS,
1301         HV_X64_MSR_SYNDBG_OPTIONS,
1302         HV_X64_MSR_SYNDBG_CONTROL, HV_X64_MSR_SYNDBG_STATUS,
1303         HV_X64_MSR_SYNDBG_SEND_BUFFER, HV_X64_MSR_SYNDBG_RECV_BUFFER,
1304         HV_X64_MSR_SYNDBG_PENDING_BUFFER,
1305
1306         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1307         MSR_KVM_PV_EOI_EN, MSR_KVM_ASYNC_PF_INT, MSR_KVM_ASYNC_PF_ACK,
1308
1309         MSR_IA32_TSC_ADJUST,
1310         MSR_IA32_TSC_DEADLINE,
1311         MSR_IA32_ARCH_CAPABILITIES,
1312         MSR_IA32_PERF_CAPABILITIES,
1313         MSR_IA32_MISC_ENABLE,
1314         MSR_IA32_MCG_STATUS,
1315         MSR_IA32_MCG_CTL,
1316         MSR_IA32_MCG_EXT_CTL,
1317         MSR_IA32_SMBASE,
1318         MSR_SMI_COUNT,
1319         MSR_PLATFORM_INFO,
1320         MSR_MISC_FEATURES_ENABLES,
1321         MSR_AMD64_VIRT_SPEC_CTRL,
1322         MSR_IA32_POWER_CTL,
1323         MSR_IA32_UCODE_REV,
1324
1325         /*
1326          * The following list leaves out MSRs whose values are determined
1327          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1328          * We always support the "true" VMX control MSRs, even if the host
1329          * processor does not, so I am putting these registers here rather
1330          * than in msrs_to_save_all.
1331          */
1332         MSR_IA32_VMX_BASIC,
1333         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1334         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1335         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1336         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1337         MSR_IA32_VMX_MISC,
1338         MSR_IA32_VMX_CR0_FIXED0,
1339         MSR_IA32_VMX_CR4_FIXED0,
1340         MSR_IA32_VMX_VMCS_ENUM,
1341         MSR_IA32_VMX_PROCBASED_CTLS2,
1342         MSR_IA32_VMX_EPT_VPID_CAP,
1343         MSR_IA32_VMX_VMFUNC,
1344
1345         MSR_K7_HWCR,
1346         MSR_KVM_POLL_CONTROL,
1347 };
1348
1349 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1350 static unsigned num_emulated_msrs;
1351
1352 /*
1353  * List of msr numbers which are used to expose MSR-based features that
1354  * can be used by a hypervisor to validate requested CPU features.
1355  */
1356 static const u32 msr_based_features_all[] = {
1357         MSR_IA32_VMX_BASIC,
1358         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1359         MSR_IA32_VMX_PINBASED_CTLS,
1360         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1361         MSR_IA32_VMX_PROCBASED_CTLS,
1362         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1363         MSR_IA32_VMX_EXIT_CTLS,
1364         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1365         MSR_IA32_VMX_ENTRY_CTLS,
1366         MSR_IA32_VMX_MISC,
1367         MSR_IA32_VMX_CR0_FIXED0,
1368         MSR_IA32_VMX_CR0_FIXED1,
1369         MSR_IA32_VMX_CR4_FIXED0,
1370         MSR_IA32_VMX_CR4_FIXED1,
1371         MSR_IA32_VMX_VMCS_ENUM,
1372         MSR_IA32_VMX_PROCBASED_CTLS2,
1373         MSR_IA32_VMX_EPT_VPID_CAP,
1374         MSR_IA32_VMX_VMFUNC,
1375
1376         MSR_F10H_DECFG,
1377         MSR_IA32_UCODE_REV,
1378         MSR_IA32_ARCH_CAPABILITIES,
1379         MSR_IA32_PERF_CAPABILITIES,
1380 };
1381
1382 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
1383 static unsigned int num_msr_based_features;
1384
1385 static u64 kvm_get_arch_capabilities(void)
1386 {
1387         u64 data = 0;
1388
1389         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1390                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1391
1392         /*
1393          * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1394          * the nested hypervisor runs with NX huge pages.  If it is not,
1395          * L1 is anyway vulnerable to ITLB_MULTIHIT exploits from other
1396          * L1 guests, so it need not worry about its own (L2) guests.
1397          */
1398         data |= ARCH_CAP_PSCHANGE_MC_NO;
1399
1400         /*
1401          * If we're doing cache flushes (either "always" or "cond")
1402          * we will do one whenever the guest does a vmlaunch/vmresume.
1403          * If an outer hypervisor is doing the cache flush for us
1404          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1405          * capability to the guest too, and if EPT is disabled we're not
1406          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1407          * require a nested hypervisor to do a flush of its own.
1408          */
1409         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1410                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1411
1412         if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1413                 data |= ARCH_CAP_RDCL_NO;
1414         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1415                 data |= ARCH_CAP_SSB_NO;
1416         if (!boot_cpu_has_bug(X86_BUG_MDS))
1417                 data |= ARCH_CAP_MDS_NO;
1418
1419         if (!boot_cpu_has(X86_FEATURE_RTM)) {
1420                 /*
1421                  * If RTM=0 because the kernel has disabled TSX, the host might
1422                  * have TAA_NO or TSX_CTRL.  Clear TAA_NO (the guest sees RTM=0
1423                  * and therefore knows that there cannot be TAA) but keep
1424                  * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1425                  * and we want to allow migrating those guests to tsx=off hosts.
1426                  */
1427                 data &= ~ARCH_CAP_TAA_NO;
1428         } else if (!boot_cpu_has_bug(X86_BUG_TAA)) {
1429                 data |= ARCH_CAP_TAA_NO;
1430         } else {
1431                 /*
1432                  * Nothing to do here; we emulate TSX_CTRL if present on the
1433                  * host so the guest can choose between disabling TSX or
1434                  * using VERW to clear CPU buffers.
1435                  */
1436         }
1437
1438         return data;
1439 }
1440
1441 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1442 {
1443         switch (msr->index) {
1444         case MSR_IA32_ARCH_CAPABILITIES:
1445                 msr->data = kvm_get_arch_capabilities();
1446                 break;
1447         case MSR_IA32_UCODE_REV:
1448                 rdmsrl_safe(msr->index, &msr->data);
1449                 break;
1450         default:
1451                 return static_call(kvm_x86_get_msr_feature)(msr);
1452         }
1453         return 0;
1454 }
1455
1456 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1457 {
1458         struct kvm_msr_entry msr;
1459         int r;
1460
1461         msr.index = index;
1462         r = kvm_get_msr_feature(&msr);
1463
1464         if (r == KVM_MSR_RET_INVALID) {
1465                 /* Unconditionally clear the output for simplicity */
1466                 *data = 0;
1467                 if (kvm_msr_ignored_check(index, 0, false))
1468                         r = 0;
1469         }
1470
1471         if (r)
1472                 return r;
1473
1474         *data = msr.data;
1475
1476         return 0;
1477 }
1478
1479 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1480 {
1481         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1482                 return false;
1483
1484         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1485                 return false;
1486
1487         if (efer & (EFER_LME | EFER_LMA) &&
1488             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1489                 return false;
1490
1491         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1492                 return false;
1493
1494         return true;
1495
1496 }
1497 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1498 {
1499         if (efer & efer_reserved_bits)
1500                 return false;
1501
1502         return __kvm_valid_efer(vcpu, efer);
1503 }
1504 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1505
1506 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1507 {
1508         u64 old_efer = vcpu->arch.efer;
1509         u64 efer = msr_info->data;
1510         int r;
1511
1512         if (efer & efer_reserved_bits)
1513                 return 1;
1514
1515         if (!msr_info->host_initiated) {
1516                 if (!__kvm_valid_efer(vcpu, efer))
1517                         return 1;
1518
1519                 if (is_paging(vcpu) &&
1520                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1521                         return 1;
1522         }
1523
1524         efer &= ~EFER_LMA;
1525         efer |= vcpu->arch.efer & EFER_LMA;
1526
1527         r = static_call(kvm_x86_set_efer)(vcpu, efer);
1528         if (r) {
1529                 WARN_ON(r > 0);
1530                 return r;
1531         }
1532
1533         /* Update reserved bits */
1534         if ((efer ^ old_efer) & EFER_NX)
1535                 kvm_mmu_reset_context(vcpu);
1536
1537         return 0;
1538 }
1539
1540 void kvm_enable_efer_bits(u64 mask)
1541 {
1542        efer_reserved_bits &= ~mask;
1543 }
1544 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1545
1546 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type)
1547 {
1548         struct kvm_x86_msr_filter *msr_filter;
1549         struct msr_bitmap_range *ranges;
1550         struct kvm *kvm = vcpu->kvm;
1551         bool allowed;
1552         int idx;
1553         u32 i;
1554
1555         /* x2APIC MSRs do not support filtering. */
1556         if (index >= 0x800 && index <= 0x8ff)
1557                 return true;
1558
1559         idx = srcu_read_lock(&kvm->srcu);
1560
1561         msr_filter = srcu_dereference(kvm->arch.msr_filter, &kvm->srcu);
1562         if (!msr_filter) {
1563                 allowed = true;
1564                 goto out;
1565         }
1566
1567         allowed = msr_filter->default_allow;
1568         ranges = msr_filter->ranges;
1569
1570         for (i = 0; i < msr_filter->count; i++) {
1571                 u32 start = ranges[i].base;
1572                 u32 end = start + ranges[i].nmsrs;
1573                 u32 flags = ranges[i].flags;
1574                 unsigned long *bitmap = ranges[i].bitmap;
1575
1576                 if ((index >= start) && (index < end) && (flags & type)) {
1577                         allowed = !!test_bit(index - start, bitmap);
1578                         break;
1579                 }
1580         }
1581
1582 out:
1583         srcu_read_unlock(&kvm->srcu, idx);
1584
1585         return allowed;
1586 }
1587 EXPORT_SYMBOL_GPL(kvm_msr_allowed);
1588
1589 /*
1590  * Write @data into the MSR specified by @index.  Select MSR specific fault
1591  * checks are bypassed if @host_initiated is %true.
1592  * Returns 0 on success, non-0 otherwise.
1593  * Assumes vcpu_load() was already called.
1594  */
1595 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1596                          bool host_initiated)
1597 {
1598         struct msr_data msr;
1599
1600         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_WRITE))
1601                 return KVM_MSR_RET_FILTERED;
1602
1603         switch (index) {
1604         case MSR_FS_BASE:
1605         case MSR_GS_BASE:
1606         case MSR_KERNEL_GS_BASE:
1607         case MSR_CSTAR:
1608         case MSR_LSTAR:
1609                 if (is_noncanonical_address(data, vcpu))
1610                         return 1;
1611                 break;
1612         case MSR_IA32_SYSENTER_EIP:
1613         case MSR_IA32_SYSENTER_ESP:
1614                 /*
1615                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1616                  * non-canonical address is written on Intel but not on
1617                  * AMD (which ignores the top 32-bits, because it does
1618                  * not implement 64-bit SYSENTER).
1619                  *
1620                  * 64-bit code should hence be able to write a non-canonical
1621                  * value on AMD.  Making the address canonical ensures that
1622                  * vmentry does not fail on Intel after writing a non-canonical
1623                  * value, and that something deterministic happens if the guest
1624                  * invokes 64-bit SYSENTER.
1625                  */
1626                 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1627                 break;
1628         case MSR_TSC_AUX:
1629                 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1630                         return 1;
1631
1632                 if (!host_initiated &&
1633                     !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1634                     !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1635                         return 1;
1636
1637                 /*
1638                  * Per Intel's SDM, bits 63:32 are reserved, but AMD's APM has
1639                  * incomplete and conflicting architectural behavior.  Current
1640                  * AMD CPUs completely ignore bits 63:32, i.e. they aren't
1641                  * reserved and always read as zeros.  Enforce Intel's reserved
1642                  * bits check if and only if the guest CPU is Intel, and clear
1643                  * the bits in all other cases.  This ensures cross-vendor
1644                  * migration will provide consistent behavior for the guest.
1645                  */
1646                 if (guest_cpuid_is_intel(vcpu) && (data >> 32) != 0)
1647                         return 1;
1648
1649                 data = (u32)data;
1650                 break;
1651         }
1652
1653         msr.data = data;
1654         msr.index = index;
1655         msr.host_initiated = host_initiated;
1656
1657         return static_call(kvm_x86_set_msr)(vcpu, &msr);
1658 }
1659
1660 static int kvm_set_msr_ignored_check(struct kvm_vcpu *vcpu,
1661                                      u32 index, u64 data, bool host_initiated)
1662 {
1663         int ret = __kvm_set_msr(vcpu, index, data, host_initiated);
1664
1665         if (ret == KVM_MSR_RET_INVALID)
1666                 if (kvm_msr_ignored_check(index, data, true))
1667                         ret = 0;
1668
1669         return ret;
1670 }
1671
1672 /*
1673  * Read the MSR specified by @index into @data.  Select MSR specific fault
1674  * checks are bypassed if @host_initiated is %true.
1675  * Returns 0 on success, non-0 otherwise.
1676  * Assumes vcpu_load() was already called.
1677  */
1678 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1679                   bool host_initiated)
1680 {
1681         struct msr_data msr;
1682         int ret;
1683
1684         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_READ))
1685                 return KVM_MSR_RET_FILTERED;
1686
1687         switch (index) {
1688         case MSR_TSC_AUX:
1689                 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1690                         return 1;
1691
1692                 if (!host_initiated &&
1693                     !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1694                     !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1695                         return 1;
1696                 break;
1697         }
1698
1699         msr.index = index;
1700         msr.host_initiated = host_initiated;
1701
1702         ret = static_call(kvm_x86_get_msr)(vcpu, &msr);
1703         if (!ret)
1704                 *data = msr.data;
1705         return ret;
1706 }
1707
1708 static int kvm_get_msr_ignored_check(struct kvm_vcpu *vcpu,
1709                                      u32 index, u64 *data, bool host_initiated)
1710 {
1711         int ret = __kvm_get_msr(vcpu, index, data, host_initiated);
1712
1713         if (ret == KVM_MSR_RET_INVALID) {
1714                 /* Unconditionally clear *data for simplicity */
1715                 *data = 0;
1716                 if (kvm_msr_ignored_check(index, 0, false))
1717                         ret = 0;
1718         }
1719
1720         return ret;
1721 }
1722
1723 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1724 {
1725         return kvm_get_msr_ignored_check(vcpu, index, data, false);
1726 }
1727 EXPORT_SYMBOL_GPL(kvm_get_msr);
1728
1729 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1730 {
1731         return kvm_set_msr_ignored_check(vcpu, index, data, false);
1732 }
1733 EXPORT_SYMBOL_GPL(kvm_set_msr);
1734
1735 static int complete_emulated_rdmsr(struct kvm_vcpu *vcpu)
1736 {
1737         int err = vcpu->run->msr.error;
1738         if (!err) {
1739                 kvm_rax_write(vcpu, (u32)vcpu->run->msr.data);
1740                 kvm_rdx_write(vcpu, vcpu->run->msr.data >> 32);
1741         }
1742
1743         return static_call(kvm_x86_complete_emulated_msr)(vcpu, err);
1744 }
1745
1746 static int complete_emulated_wrmsr(struct kvm_vcpu *vcpu)
1747 {
1748         return static_call(kvm_x86_complete_emulated_msr)(vcpu, vcpu->run->msr.error);
1749 }
1750
1751 static u64 kvm_msr_reason(int r)
1752 {
1753         switch (r) {
1754         case KVM_MSR_RET_INVALID:
1755                 return KVM_MSR_EXIT_REASON_UNKNOWN;
1756         case KVM_MSR_RET_FILTERED:
1757                 return KVM_MSR_EXIT_REASON_FILTER;
1758         default:
1759                 return KVM_MSR_EXIT_REASON_INVAL;
1760         }
1761 }
1762
1763 static int kvm_msr_user_space(struct kvm_vcpu *vcpu, u32 index,
1764                               u32 exit_reason, u64 data,
1765                               int (*completion)(struct kvm_vcpu *vcpu),
1766                               int r)
1767 {
1768         u64 msr_reason = kvm_msr_reason(r);
1769
1770         /* Check if the user wanted to know about this MSR fault */
1771         if (!(vcpu->kvm->arch.user_space_msr_mask & msr_reason))
1772                 return 0;
1773
1774         vcpu->run->exit_reason = exit_reason;
1775         vcpu->run->msr.error = 0;
1776         memset(vcpu->run->msr.pad, 0, sizeof(vcpu->run->msr.pad));
1777         vcpu->run->msr.reason = msr_reason;
1778         vcpu->run->msr.index = index;
1779         vcpu->run->msr.data = data;
1780         vcpu->arch.complete_userspace_io = completion;
1781
1782         return 1;
1783 }
1784
1785 static int kvm_get_msr_user_space(struct kvm_vcpu *vcpu, u32 index, int r)
1786 {
1787         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_RDMSR, 0,
1788                                    complete_emulated_rdmsr, r);
1789 }
1790
1791 static int kvm_set_msr_user_space(struct kvm_vcpu *vcpu, u32 index, u64 data, int r)
1792 {
1793         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_WRMSR, data,
1794                                    complete_emulated_wrmsr, r);
1795 }
1796
1797 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1798 {
1799         u32 ecx = kvm_rcx_read(vcpu);
1800         u64 data;
1801         int r;
1802
1803         r = kvm_get_msr(vcpu, ecx, &data);
1804
1805         /* MSR read failed? See if we should ask user space */
1806         if (r && kvm_get_msr_user_space(vcpu, ecx, r)) {
1807                 /* Bounce to user space */
1808                 return 0;
1809         }
1810
1811         if (!r) {
1812                 trace_kvm_msr_read(ecx, data);
1813
1814                 kvm_rax_write(vcpu, data & -1u);
1815                 kvm_rdx_write(vcpu, (data >> 32) & -1u);
1816         } else {
1817                 trace_kvm_msr_read_ex(ecx);
1818         }
1819
1820         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1821 }
1822 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1823
1824 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1825 {
1826         u32 ecx = kvm_rcx_read(vcpu);
1827         u64 data = kvm_read_edx_eax(vcpu);
1828         int r;
1829
1830         r = kvm_set_msr(vcpu, ecx, data);
1831
1832         /* MSR write failed? See if we should ask user space */
1833         if (r && kvm_set_msr_user_space(vcpu, ecx, data, r))
1834                 /* Bounce to user space */
1835                 return 0;
1836
1837         /* Signal all other negative errors to userspace */
1838         if (r < 0)
1839                 return r;
1840
1841         if (!r)
1842                 trace_kvm_msr_write(ecx, data);
1843         else
1844                 trace_kvm_msr_write_ex(ecx, data);
1845
1846         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1847 }
1848 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1849
1850 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu)
1851 {
1852         return kvm_skip_emulated_instruction(vcpu);
1853 }
1854 EXPORT_SYMBOL_GPL(kvm_emulate_as_nop);
1855
1856 int kvm_emulate_invd(struct kvm_vcpu *vcpu)
1857 {
1858         /* Treat an INVD instruction as a NOP and just skip it. */
1859         return kvm_emulate_as_nop(vcpu);
1860 }
1861 EXPORT_SYMBOL_GPL(kvm_emulate_invd);
1862
1863 int kvm_emulate_mwait(struct kvm_vcpu *vcpu)
1864 {
1865         pr_warn_once("kvm: MWAIT instruction emulated as NOP!\n");
1866         return kvm_emulate_as_nop(vcpu);
1867 }
1868 EXPORT_SYMBOL_GPL(kvm_emulate_mwait);
1869
1870 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu)
1871 {
1872         kvm_queue_exception(vcpu, UD_VECTOR);
1873         return 1;
1874 }
1875 EXPORT_SYMBOL_GPL(kvm_handle_invalid_op);
1876
1877 int kvm_emulate_monitor(struct kvm_vcpu *vcpu)
1878 {
1879         pr_warn_once("kvm: MONITOR instruction emulated as NOP!\n");
1880         return kvm_emulate_as_nop(vcpu);
1881 }
1882 EXPORT_SYMBOL_GPL(kvm_emulate_monitor);
1883
1884 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu)
1885 {
1886         xfer_to_guest_mode_prepare();
1887         return vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu) ||
1888                 xfer_to_guest_mode_work_pending();
1889 }
1890
1891 /*
1892  * The fast path for frequent and performance sensitive wrmsr emulation,
1893  * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
1894  * the latency of virtual IPI by avoiding the expensive bits of transitioning
1895  * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
1896  * other cases which must be called after interrupts are enabled on the host.
1897  */
1898 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
1899 {
1900         if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic))
1901                 return 1;
1902
1903         if (((data & APIC_SHORT_MASK) == APIC_DEST_NOSHORT) &&
1904                 ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
1905                 ((data & APIC_MODE_MASK) == APIC_DM_FIXED) &&
1906                 ((u32)(data >> 32) != X2APIC_BROADCAST)) {
1907
1908                 data &= ~(1 << 12);
1909                 kvm_apic_send_ipi(vcpu->arch.apic, (u32)data, (u32)(data >> 32));
1910                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR2, (u32)(data >> 32));
1911                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR, (u32)data);
1912                 trace_kvm_apic_write(APIC_ICR, (u32)data);
1913                 return 0;
1914         }
1915
1916         return 1;
1917 }
1918
1919 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
1920 {
1921         if (!kvm_can_use_hv_timer(vcpu))
1922                 return 1;
1923
1924         kvm_set_lapic_tscdeadline_msr(vcpu, data);
1925         return 0;
1926 }
1927
1928 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
1929 {
1930         u32 msr = kvm_rcx_read(vcpu);
1931         u64 data;
1932         fastpath_t ret = EXIT_FASTPATH_NONE;
1933
1934         switch (msr) {
1935         case APIC_BASE_MSR + (APIC_ICR >> 4):
1936                 data = kvm_read_edx_eax(vcpu);
1937                 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu, data)) {
1938                         kvm_skip_emulated_instruction(vcpu);
1939                         ret = EXIT_FASTPATH_EXIT_HANDLED;
1940                 }
1941                 break;
1942         case MSR_IA32_TSC_DEADLINE:
1943                 data = kvm_read_edx_eax(vcpu);
1944                 if (!handle_fastpath_set_tscdeadline(vcpu, data)) {
1945                         kvm_skip_emulated_instruction(vcpu);
1946                         ret = EXIT_FASTPATH_REENTER_GUEST;
1947                 }
1948                 break;
1949         default:
1950                 break;
1951         }
1952
1953         if (ret != EXIT_FASTPATH_NONE)
1954                 trace_kvm_msr_write(msr, data);
1955
1956         return ret;
1957 }
1958 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
1959
1960 /*
1961  * Adapt set_msr() to msr_io()'s calling convention
1962  */
1963 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1964 {
1965         return kvm_get_msr_ignored_check(vcpu, index, data, true);
1966 }
1967
1968 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1969 {
1970         return kvm_set_msr_ignored_check(vcpu, index, *data, true);
1971 }
1972
1973 #ifdef CONFIG_X86_64
1974 struct pvclock_clock {
1975         int vclock_mode;
1976         u64 cycle_last;
1977         u64 mask;
1978         u32 mult;
1979         u32 shift;
1980         u64 base_cycles;
1981         u64 offset;
1982 };
1983
1984 struct pvclock_gtod_data {
1985         seqcount_t      seq;
1986
1987         struct pvclock_clock clock; /* extract of a clocksource struct */
1988         struct pvclock_clock raw_clock; /* extract of a clocksource struct */
1989
1990         ktime_t         offs_boot;
1991         u64             wall_time_sec;
1992 };
1993
1994 static struct pvclock_gtod_data pvclock_gtod_data;
1995
1996 static void update_pvclock_gtod(struct timekeeper *tk)
1997 {
1998         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1999
2000         write_seqcount_begin(&vdata->seq);
2001
2002         /* copy pvclock gtod data */
2003         vdata->clock.vclock_mode        = tk->tkr_mono.clock->vdso_clock_mode;
2004         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
2005         vdata->clock.mask               = tk->tkr_mono.mask;
2006         vdata->clock.mult               = tk->tkr_mono.mult;
2007         vdata->clock.shift              = tk->tkr_mono.shift;
2008         vdata->clock.base_cycles        = tk->tkr_mono.xtime_nsec;
2009         vdata->clock.offset             = tk->tkr_mono.base;
2010
2011         vdata->raw_clock.vclock_mode    = tk->tkr_raw.clock->vdso_clock_mode;
2012         vdata->raw_clock.cycle_last     = tk->tkr_raw.cycle_last;
2013         vdata->raw_clock.mask           = tk->tkr_raw.mask;
2014         vdata->raw_clock.mult           = tk->tkr_raw.mult;
2015         vdata->raw_clock.shift          = tk->tkr_raw.shift;
2016         vdata->raw_clock.base_cycles    = tk->tkr_raw.xtime_nsec;
2017         vdata->raw_clock.offset         = tk->tkr_raw.base;
2018
2019         vdata->wall_time_sec            = tk->xtime_sec;
2020
2021         vdata->offs_boot                = tk->offs_boot;
2022
2023         write_seqcount_end(&vdata->seq);
2024 }
2025
2026 static s64 get_kvmclock_base_ns(void)
2027 {
2028         /* Count up from boot time, but with the frequency of the raw clock.  */
2029         return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot));
2030 }
2031 #else
2032 static s64 get_kvmclock_base_ns(void)
2033 {
2034         /* Master clock not used, so we can just use CLOCK_BOOTTIME.  */
2035         return ktime_get_boottime_ns();
2036 }
2037 #endif
2038
2039 void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock, int sec_hi_ofs)
2040 {
2041         int version;
2042         int r;
2043         struct pvclock_wall_clock wc;
2044         u32 wc_sec_hi;
2045         u64 wall_nsec;
2046
2047         if (!wall_clock)
2048                 return;
2049
2050         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
2051         if (r)
2052                 return;
2053
2054         if (version & 1)
2055                 ++version;  /* first time write, random junk */
2056
2057         ++version;
2058
2059         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
2060                 return;
2061
2062         /*
2063          * The guest calculates current wall clock time by adding
2064          * system time (updated by kvm_guest_time_update below) to the
2065          * wall clock specified here.  We do the reverse here.
2066          */
2067         wall_nsec = ktime_get_real_ns() - get_kvmclock_ns(kvm);
2068
2069         wc.nsec = do_div(wall_nsec, 1000000000);
2070         wc.sec = (u32)wall_nsec; /* overflow in 2106 guest time */
2071         wc.version = version;
2072
2073         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
2074
2075         if (sec_hi_ofs) {
2076                 wc_sec_hi = wall_nsec >> 32;
2077                 kvm_write_guest(kvm, wall_clock + sec_hi_ofs,
2078                                 &wc_sec_hi, sizeof(wc_sec_hi));
2079         }
2080
2081         version++;
2082         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
2083 }
2084
2085 static void kvm_write_system_time(struct kvm_vcpu *vcpu, gpa_t system_time,
2086                                   bool old_msr, bool host_initiated)
2087 {
2088         struct kvm_arch *ka = &vcpu->kvm->arch;
2089
2090         if (vcpu->vcpu_id == 0 && !host_initiated) {
2091                 if (ka->boot_vcpu_runs_old_kvmclock != old_msr)
2092                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2093
2094                 ka->boot_vcpu_runs_old_kvmclock = old_msr;
2095         }
2096
2097         vcpu->arch.time = system_time;
2098         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2099
2100         /* we verify if the enable bit is set... */
2101         vcpu->arch.pv_time_enabled = false;
2102         if (!(system_time & 1))
2103                 return;
2104
2105         if (!kvm_gfn_to_hva_cache_init(vcpu->kvm,
2106                                        &vcpu->arch.pv_time, system_time & ~1ULL,
2107                                        sizeof(struct pvclock_vcpu_time_info)))
2108                 vcpu->arch.pv_time_enabled = true;
2109
2110         return;
2111 }
2112
2113 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
2114 {
2115         do_shl32_div32(dividend, divisor);
2116         return dividend;
2117 }
2118
2119 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
2120                                s8 *pshift, u32 *pmultiplier)
2121 {
2122         uint64_t scaled64;
2123         int32_t  shift = 0;
2124         uint64_t tps64;
2125         uint32_t tps32;
2126
2127         tps64 = base_hz;
2128         scaled64 = scaled_hz;
2129         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
2130                 tps64 >>= 1;
2131                 shift--;
2132         }
2133
2134         tps32 = (uint32_t)tps64;
2135         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
2136                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
2137                         scaled64 >>= 1;
2138                 else
2139                         tps32 <<= 1;
2140                 shift++;
2141         }
2142
2143         *pshift = shift;
2144         *pmultiplier = div_frac(scaled64, tps32);
2145 }
2146
2147 #ifdef CONFIG_X86_64
2148 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
2149 #endif
2150
2151 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
2152 static unsigned long max_tsc_khz;
2153
2154 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
2155 {
2156         u64 v = (u64)khz * (1000000 + ppm);
2157         do_div(v, 1000000);
2158         return v;
2159 }
2160
2161 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier);
2162
2163 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
2164 {
2165         u64 ratio;
2166
2167         /* Guest TSC same frequency as host TSC? */
2168         if (!scale) {
2169                 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2170                 return 0;
2171         }
2172
2173         /* TSC scaling supported? */
2174         if (!kvm_has_tsc_control) {
2175                 if (user_tsc_khz > tsc_khz) {
2176                         vcpu->arch.tsc_catchup = 1;
2177                         vcpu->arch.tsc_always_catchup = 1;
2178                         return 0;
2179                 } else {
2180                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2181                         return -1;
2182                 }
2183         }
2184
2185         /* TSC scaling required  - calculate ratio */
2186         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
2187                                 user_tsc_khz, tsc_khz);
2188
2189         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
2190                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2191                                     user_tsc_khz);
2192                 return -1;
2193         }
2194
2195         kvm_vcpu_write_tsc_multiplier(vcpu, ratio);
2196         return 0;
2197 }
2198
2199 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
2200 {
2201         u32 thresh_lo, thresh_hi;
2202         int use_scaling = 0;
2203
2204         /* tsc_khz can be zero if TSC calibration fails */
2205         if (user_tsc_khz == 0) {
2206                 /* set tsc_scaling_ratio to a safe value */
2207                 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2208                 return -1;
2209         }
2210
2211         /* Compute a scale to convert nanoseconds in TSC cycles */
2212         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
2213                            &vcpu->arch.virtual_tsc_shift,
2214                            &vcpu->arch.virtual_tsc_mult);
2215         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
2216
2217         /*
2218          * Compute the variation in TSC rate which is acceptable
2219          * within the range of tolerance and decide if the
2220          * rate being applied is within that bounds of the hardware
2221          * rate.  If so, no scaling or compensation need be done.
2222          */
2223         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
2224         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
2225         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
2226                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
2227                 use_scaling = 1;
2228         }
2229         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
2230 }
2231
2232 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
2233 {
2234         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
2235                                       vcpu->arch.virtual_tsc_mult,
2236                                       vcpu->arch.virtual_tsc_shift);
2237         tsc += vcpu->arch.this_tsc_write;
2238         return tsc;
2239 }
2240
2241 static inline int gtod_is_based_on_tsc(int mode)
2242 {
2243         return mode == VDSO_CLOCKMODE_TSC || mode == VDSO_CLOCKMODE_HVCLOCK;
2244 }
2245
2246 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
2247 {
2248 #ifdef CONFIG_X86_64
2249         bool vcpus_matched;
2250         struct kvm_arch *ka = &vcpu->kvm->arch;
2251         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2252
2253         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2254                          atomic_read(&vcpu->kvm->online_vcpus));
2255
2256         /*
2257          * Once the masterclock is enabled, always perform request in
2258          * order to update it.
2259          *
2260          * In order to enable masterclock, the host clocksource must be TSC
2261          * and the vcpus need to have matched TSCs.  When that happens,
2262          * perform request to enable masterclock.
2263          */
2264         if (ka->use_master_clock ||
2265             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
2266                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2267
2268         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
2269                             atomic_read(&vcpu->kvm->online_vcpus),
2270                             ka->use_master_clock, gtod->clock.vclock_mode);
2271 #endif
2272 }
2273
2274 /*
2275  * Multiply tsc by a fixed point number represented by ratio.
2276  *
2277  * The most significant 64-N bits (mult) of ratio represent the
2278  * integral part of the fixed point number; the remaining N bits
2279  * (frac) represent the fractional part, ie. ratio represents a fixed
2280  * point number (mult + frac * 2^(-N)).
2281  *
2282  * N equals to kvm_tsc_scaling_ratio_frac_bits.
2283  */
2284 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
2285 {
2286         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
2287 }
2288
2289 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc, u64 ratio)
2290 {
2291         u64 _tsc = tsc;
2292
2293         if (ratio != kvm_default_tsc_scaling_ratio)
2294                 _tsc = __scale_tsc(ratio, tsc);
2295
2296         return _tsc;
2297 }
2298 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
2299
2300 static u64 kvm_compute_l1_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
2301 {
2302         u64 tsc;
2303
2304         tsc = kvm_scale_tsc(vcpu, rdtsc(), vcpu->arch.l1_tsc_scaling_ratio);
2305
2306         return target_tsc - tsc;
2307 }
2308
2309 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
2310 {
2311         return vcpu->arch.l1_tsc_offset +
2312                 kvm_scale_tsc(vcpu, host_tsc, vcpu->arch.l1_tsc_scaling_ratio);
2313 }
2314 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
2315
2316 u64 kvm_calc_nested_tsc_offset(u64 l1_offset, u64 l2_offset, u64 l2_multiplier)
2317 {
2318         u64 nested_offset;
2319
2320         if (l2_multiplier == kvm_default_tsc_scaling_ratio)
2321                 nested_offset = l1_offset;
2322         else
2323                 nested_offset = mul_s64_u64_shr((s64) l1_offset, l2_multiplier,
2324                                                 kvm_tsc_scaling_ratio_frac_bits);
2325
2326         nested_offset += l2_offset;
2327         return nested_offset;
2328 }
2329 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_offset);
2330
2331 u64 kvm_calc_nested_tsc_multiplier(u64 l1_multiplier, u64 l2_multiplier)
2332 {
2333         if (l2_multiplier != kvm_default_tsc_scaling_ratio)
2334                 return mul_u64_u64_shr(l1_multiplier, l2_multiplier,
2335                                        kvm_tsc_scaling_ratio_frac_bits);
2336
2337         return l1_multiplier;
2338 }
2339 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_multiplier);
2340
2341 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 l1_offset)
2342 {
2343         trace_kvm_write_tsc_offset(vcpu->vcpu_id,
2344                                    vcpu->arch.l1_tsc_offset,
2345                                    l1_offset);
2346
2347         vcpu->arch.l1_tsc_offset = l1_offset;
2348
2349         /*
2350          * If we are here because L1 chose not to trap WRMSR to TSC then
2351          * according to the spec this should set L1's TSC (as opposed to
2352          * setting L1's offset for L2).
2353          */
2354         if (is_guest_mode(vcpu))
2355                 vcpu->arch.tsc_offset = kvm_calc_nested_tsc_offset(
2356                         l1_offset,
2357                         static_call(kvm_x86_get_l2_tsc_offset)(vcpu),
2358                         static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2359         else
2360                 vcpu->arch.tsc_offset = l1_offset;
2361
2362         static_call(kvm_x86_write_tsc_offset)(vcpu, vcpu->arch.tsc_offset);
2363 }
2364
2365 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier)
2366 {
2367         vcpu->arch.l1_tsc_scaling_ratio = l1_multiplier;
2368
2369         /* Userspace is changing the multiplier while L2 is active */
2370         if (is_guest_mode(vcpu))
2371                 vcpu->arch.tsc_scaling_ratio = kvm_calc_nested_tsc_multiplier(
2372                         l1_multiplier,
2373                         static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2374         else
2375                 vcpu->arch.tsc_scaling_ratio = l1_multiplier;
2376
2377         if (kvm_has_tsc_control)
2378                 static_call(kvm_x86_write_tsc_multiplier)(
2379                         vcpu, vcpu->arch.tsc_scaling_ratio);
2380 }
2381
2382 static inline bool kvm_check_tsc_unstable(void)
2383 {
2384 #ifdef CONFIG_X86_64
2385         /*
2386          * TSC is marked unstable when we're running on Hyper-V,
2387          * 'TSC page' clocksource is good.
2388          */
2389         if (pvclock_gtod_data.clock.vclock_mode == VDSO_CLOCKMODE_HVCLOCK)
2390                 return false;
2391 #endif
2392         return check_tsc_unstable();
2393 }
2394
2395 static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 data)
2396 {
2397         struct kvm *kvm = vcpu->kvm;
2398         u64 offset, ns, elapsed;
2399         unsigned long flags;
2400         bool matched;
2401         bool already_matched;
2402         bool synchronizing = false;
2403
2404         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
2405         offset = kvm_compute_l1_tsc_offset(vcpu, data);
2406         ns = get_kvmclock_base_ns();
2407         elapsed = ns - kvm->arch.last_tsc_nsec;
2408
2409         if (vcpu->arch.virtual_tsc_khz) {
2410                 if (data == 0) {
2411                         /*
2412                          * detection of vcpu initialization -- need to sync
2413                          * with other vCPUs. This particularly helps to keep
2414                          * kvm_clock stable after CPU hotplug
2415                          */
2416                         synchronizing = true;
2417                 } else {
2418                         u64 tsc_exp = kvm->arch.last_tsc_write +
2419                                                 nsec_to_cycles(vcpu, elapsed);
2420                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
2421                         /*
2422                          * Special case: TSC write with a small delta (1 second)
2423                          * of virtual cycle time against real time is
2424                          * interpreted as an attempt to synchronize the CPU.
2425                          */
2426                         synchronizing = data < tsc_exp + tsc_hz &&
2427                                         data + tsc_hz > tsc_exp;
2428                 }
2429         }
2430
2431         /*
2432          * For a reliable TSC, we can match TSC offsets, and for an unstable
2433          * TSC, we add elapsed time in this computation.  We could let the
2434          * compensation code attempt to catch up if we fall behind, but
2435          * it's better to try to match offsets from the beginning.
2436          */
2437         if (synchronizing &&
2438             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
2439                 if (!kvm_check_tsc_unstable()) {
2440                         offset = kvm->arch.cur_tsc_offset;
2441                 } else {
2442                         u64 delta = nsec_to_cycles(vcpu, elapsed);
2443                         data += delta;
2444                         offset = kvm_compute_l1_tsc_offset(vcpu, data);
2445                 }
2446                 matched = true;
2447                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
2448         } else {
2449                 /*
2450                  * We split periods of matched TSC writes into generations.
2451                  * For each generation, we track the original measured
2452                  * nanosecond time, offset, and write, so if TSCs are in
2453                  * sync, we can match exact offset, and if not, we can match
2454                  * exact software computation in compute_guest_tsc()
2455                  *
2456                  * These values are tracked in kvm->arch.cur_xxx variables.
2457                  */
2458                 kvm->arch.cur_tsc_generation++;
2459                 kvm->arch.cur_tsc_nsec = ns;
2460                 kvm->arch.cur_tsc_write = data;
2461                 kvm->arch.cur_tsc_offset = offset;
2462                 matched = false;
2463         }
2464
2465         /*
2466          * We also track th most recent recorded KHZ, write and time to
2467          * allow the matching interval to be extended at each write.
2468          */
2469         kvm->arch.last_tsc_nsec = ns;
2470         kvm->arch.last_tsc_write = data;
2471         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2472
2473         vcpu->arch.last_guest_tsc = data;
2474
2475         /* Keep track of which generation this VCPU has synchronized to */
2476         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2477         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2478         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2479
2480         kvm_vcpu_write_tsc_offset(vcpu, offset);
2481         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2482
2483         spin_lock_irqsave(&kvm->arch.pvclock_gtod_sync_lock, flags);
2484         if (!matched) {
2485                 kvm->arch.nr_vcpus_matched_tsc = 0;
2486         } else if (!already_matched) {
2487                 kvm->arch.nr_vcpus_matched_tsc++;
2488         }
2489
2490         kvm_track_tsc_matching(vcpu);
2491         spin_unlock_irqrestore(&kvm->arch.pvclock_gtod_sync_lock, flags);
2492 }
2493
2494 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2495                                            s64 adjustment)
2496 {
2497         u64 tsc_offset = vcpu->arch.l1_tsc_offset;
2498         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2499 }
2500
2501 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2502 {
2503         if (vcpu->arch.l1_tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
2504                 WARN_ON(adjustment < 0);
2505         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment,
2506                                    vcpu->arch.l1_tsc_scaling_ratio);
2507         adjust_tsc_offset_guest(vcpu, adjustment);
2508 }
2509
2510 #ifdef CONFIG_X86_64
2511
2512 static u64 read_tsc(void)
2513 {
2514         u64 ret = (u64)rdtsc_ordered();
2515         u64 last = pvclock_gtod_data.clock.cycle_last;
2516
2517         if (likely(ret >= last))
2518                 return ret;
2519
2520         /*
2521          * GCC likes to generate cmov here, but this branch is extremely
2522          * predictable (it's just a function of time and the likely is
2523          * very likely) and there's a data dependence, so force GCC
2524          * to generate a branch instead.  I don't barrier() because
2525          * we don't actually need a barrier, and if this function
2526          * ever gets inlined it will generate worse code.
2527          */
2528         asm volatile ("");
2529         return last;
2530 }
2531
2532 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2533                           int *mode)
2534 {
2535         long v;
2536         u64 tsc_pg_val;
2537
2538         switch (clock->vclock_mode) {
2539         case VDSO_CLOCKMODE_HVCLOCK:
2540                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2541                                                   tsc_timestamp);
2542                 if (tsc_pg_val != U64_MAX) {
2543                         /* TSC page valid */
2544                         *mode = VDSO_CLOCKMODE_HVCLOCK;
2545                         v = (tsc_pg_val - clock->cycle_last) &
2546                                 clock->mask;
2547                 } else {
2548                         /* TSC page invalid */
2549                         *mode = VDSO_CLOCKMODE_NONE;
2550                 }
2551                 break;
2552         case VDSO_CLOCKMODE_TSC:
2553                 *mode = VDSO_CLOCKMODE_TSC;
2554                 *tsc_timestamp = read_tsc();
2555                 v = (*tsc_timestamp - clock->cycle_last) &
2556                         clock->mask;
2557                 break;
2558         default:
2559                 *mode = VDSO_CLOCKMODE_NONE;
2560         }
2561
2562         if (*mode == VDSO_CLOCKMODE_NONE)
2563                 *tsc_timestamp = v = 0;
2564
2565         return v * clock->mult;
2566 }
2567
2568 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2569 {
2570         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2571         unsigned long seq;
2572         int mode;
2573         u64 ns;
2574
2575         do {
2576                 seq = read_seqcount_begin(&gtod->seq);
2577                 ns = gtod->raw_clock.base_cycles;
2578                 ns += vgettsc(&gtod->raw_clock, tsc_timestamp, &mode);
2579                 ns >>= gtod->raw_clock.shift;
2580                 ns += ktime_to_ns(ktime_add(gtod->raw_clock.offset, gtod->offs_boot));
2581         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2582         *t = ns;
2583
2584         return mode;
2585 }
2586
2587 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2588 {
2589         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2590         unsigned long seq;
2591         int mode;
2592         u64 ns;
2593
2594         do {
2595                 seq = read_seqcount_begin(&gtod->seq);
2596                 ts->tv_sec = gtod->wall_time_sec;
2597                 ns = gtod->clock.base_cycles;
2598                 ns += vgettsc(&gtod->clock, tsc_timestamp, &mode);
2599                 ns >>= gtod->clock.shift;
2600         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2601
2602         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2603         ts->tv_nsec = ns;
2604
2605         return mode;
2606 }
2607
2608 /* returns true if host is using TSC based clocksource */
2609 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2610 {
2611         /* checked again under seqlock below */
2612         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2613                 return false;
2614
2615         return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2616                                                       tsc_timestamp));
2617 }
2618
2619 /* returns true if host is using TSC based clocksource */
2620 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2621                                            u64 *tsc_timestamp)
2622 {
2623         /* checked again under seqlock below */
2624         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2625                 return false;
2626
2627         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2628 }
2629 #endif
2630
2631 /*
2632  *
2633  * Assuming a stable TSC across physical CPUS, and a stable TSC
2634  * across virtual CPUs, the following condition is possible.
2635  * Each numbered line represents an event visible to both
2636  * CPUs at the next numbered event.
2637  *
2638  * "timespecX" represents host monotonic time. "tscX" represents
2639  * RDTSC value.
2640  *
2641  *              VCPU0 on CPU0           |       VCPU1 on CPU1
2642  *
2643  * 1.  read timespec0,tsc0
2644  * 2.                                   | timespec1 = timespec0 + N
2645  *                                      | tsc1 = tsc0 + M
2646  * 3. transition to guest               | transition to guest
2647  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2648  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2649  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2650  *
2651  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2652  *
2653  *      - ret0 < ret1
2654  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2655  *              ...
2656  *      - 0 < N - M => M < N
2657  *
2658  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2659  * always the case (the difference between two distinct xtime instances
2660  * might be smaller then the difference between corresponding TSC reads,
2661  * when updating guest vcpus pvclock areas).
2662  *
2663  * To avoid that problem, do not allow visibility of distinct
2664  * system_timestamp/tsc_timestamp values simultaneously: use a master
2665  * copy of host monotonic time values. Update that master copy
2666  * in lockstep.
2667  *
2668  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2669  *
2670  */
2671
2672 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2673 {
2674 #ifdef CONFIG_X86_64
2675         struct kvm_arch *ka = &kvm->arch;
2676         int vclock_mode;
2677         bool host_tsc_clocksource, vcpus_matched;
2678
2679         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2680                         atomic_read(&kvm->online_vcpus));
2681
2682         /*
2683          * If the host uses TSC clock, then passthrough TSC as stable
2684          * to the guest.
2685          */
2686         host_tsc_clocksource = kvm_get_time_and_clockread(
2687                                         &ka->master_kernel_ns,
2688                                         &ka->master_cycle_now);
2689
2690         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2691                                 && !ka->backwards_tsc_observed
2692                                 && !ka->boot_vcpu_runs_old_kvmclock;
2693
2694         if (ka->use_master_clock)
2695                 atomic_set(&kvm_guest_has_master_clock, 1);
2696
2697         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2698         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2699                                         vcpus_matched);
2700 #endif
2701 }
2702
2703 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2704 {
2705         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2706 }
2707
2708 static void kvm_gen_update_masterclock(struct kvm *kvm)
2709 {
2710 #ifdef CONFIG_X86_64
2711         int i;
2712         struct kvm_vcpu *vcpu;
2713         struct kvm_arch *ka = &kvm->arch;
2714         unsigned long flags;
2715
2716         kvm_hv_invalidate_tsc_page(kvm);
2717
2718         kvm_make_mclock_inprogress_request(kvm);
2719
2720         /* no guest entries from this point */
2721         spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2722         pvclock_update_vm_gtod_copy(kvm);
2723         spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2724
2725         kvm_for_each_vcpu(i, vcpu, kvm)
2726                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2727
2728         /* guest entries allowed */
2729         kvm_for_each_vcpu(i, vcpu, kvm)
2730                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2731 #endif
2732 }
2733
2734 u64 get_kvmclock_ns(struct kvm *kvm)
2735 {
2736         struct kvm_arch *ka = &kvm->arch;
2737         struct pvclock_vcpu_time_info hv_clock;
2738         unsigned long flags;
2739         u64 ret;
2740
2741         spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2742         if (!ka->use_master_clock) {
2743                 spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2744                 return get_kvmclock_base_ns() + ka->kvmclock_offset;
2745         }
2746
2747         hv_clock.tsc_timestamp = ka->master_cycle_now;
2748         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2749         spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2750
2751         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2752         get_cpu();
2753
2754         if (__this_cpu_read(cpu_tsc_khz)) {
2755                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2756                                    &hv_clock.tsc_shift,
2757                                    &hv_clock.tsc_to_system_mul);
2758                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2759         } else
2760                 ret = get_kvmclock_base_ns() + ka->kvmclock_offset;
2761
2762         put_cpu();
2763
2764         return ret;
2765 }
2766
2767 static void kvm_setup_pvclock_page(struct kvm_vcpu *v,
2768                                    struct gfn_to_hva_cache *cache,
2769                                    unsigned int offset)
2770 {
2771         struct kvm_vcpu_arch *vcpu = &v->arch;
2772         struct pvclock_vcpu_time_info guest_hv_clock;
2773
2774         if (unlikely(kvm_read_guest_offset_cached(v->kvm, cache,
2775                 &guest_hv_clock, offset, sizeof(guest_hv_clock))))
2776                 return;
2777
2778         /* This VCPU is paused, but it's legal for a guest to read another
2779          * VCPU's kvmclock, so we really have to follow the specification where
2780          * it says that version is odd if data is being modified, and even after
2781          * it is consistent.
2782          *
2783          * Version field updates must be kept separate.  This is because
2784          * kvm_write_guest_cached might use a "rep movs" instruction, and
2785          * writes within a string instruction are weakly ordered.  So there
2786          * are three writes overall.
2787          *
2788          * As a small optimization, only write the version field in the first
2789          * and third write.  The vcpu->pv_time cache is still valid, because the
2790          * version field is the first in the struct.
2791          */
2792         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2793
2794         if (guest_hv_clock.version & 1)
2795                 ++guest_hv_clock.version;  /* first time write, random junk */
2796
2797         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2798         kvm_write_guest_offset_cached(v->kvm, cache,
2799                                       &vcpu->hv_clock, offset,
2800                                       sizeof(vcpu->hv_clock.version));
2801
2802         smp_wmb();
2803
2804         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2805         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2806
2807         if (vcpu->pvclock_set_guest_stopped_request) {
2808                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2809                 vcpu->pvclock_set_guest_stopped_request = false;
2810         }
2811
2812         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2813
2814         kvm_write_guest_offset_cached(v->kvm, cache,
2815                                       &vcpu->hv_clock, offset,
2816                                       sizeof(vcpu->hv_clock));
2817
2818         smp_wmb();
2819
2820         vcpu->hv_clock.version++;
2821         kvm_write_guest_offset_cached(v->kvm, cache,
2822                                      &vcpu->hv_clock, offset,
2823                                      sizeof(vcpu->hv_clock.version));
2824 }
2825
2826 static int kvm_guest_time_update(struct kvm_vcpu *v)
2827 {
2828         unsigned long flags, tgt_tsc_khz;
2829         struct kvm_vcpu_arch *vcpu = &v->arch;
2830         struct kvm_arch *ka = &v->kvm->arch;
2831         s64 kernel_ns;
2832         u64 tsc_timestamp, host_tsc;
2833         u8 pvclock_flags;
2834         bool use_master_clock;
2835
2836         kernel_ns = 0;
2837         host_tsc = 0;
2838
2839         /*
2840          * If the host uses TSC clock, then passthrough TSC as stable
2841          * to the guest.
2842          */
2843         spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2844         use_master_clock = ka->use_master_clock;
2845         if (use_master_clock) {
2846                 host_tsc = ka->master_cycle_now;
2847                 kernel_ns = ka->master_kernel_ns;
2848         }
2849         spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2850
2851         /* Keep irq disabled to prevent changes to the clock */
2852         local_irq_save(flags);
2853         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2854         if (unlikely(tgt_tsc_khz == 0)) {
2855                 local_irq_restore(flags);
2856                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2857                 return 1;
2858         }
2859         if (!use_master_clock) {
2860                 host_tsc = rdtsc();
2861                 kernel_ns = get_kvmclock_base_ns();
2862         }
2863
2864         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2865
2866         /*
2867          * We may have to catch up the TSC to match elapsed wall clock
2868          * time for two reasons, even if kvmclock is used.
2869          *   1) CPU could have been running below the maximum TSC rate
2870          *   2) Broken TSC compensation resets the base at each VCPU
2871          *      entry to avoid unknown leaps of TSC even when running
2872          *      again on the same CPU.  This may cause apparent elapsed
2873          *      time to disappear, and the guest to stand still or run
2874          *      very slowly.
2875          */
2876         if (vcpu->tsc_catchup) {
2877                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2878                 if (tsc > tsc_timestamp) {
2879                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2880                         tsc_timestamp = tsc;
2881                 }
2882         }
2883
2884         local_irq_restore(flags);
2885
2886         /* With all the info we got, fill in the values */
2887
2888         if (kvm_has_tsc_control)
2889                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz,
2890                                             v->arch.l1_tsc_scaling_ratio);
2891
2892         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2893                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2894                                    &vcpu->hv_clock.tsc_shift,
2895                                    &vcpu->hv_clock.tsc_to_system_mul);
2896                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2897         }
2898
2899         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2900         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2901         vcpu->last_guest_tsc = tsc_timestamp;
2902
2903         /* If the host uses TSC clocksource, then it is stable */
2904         pvclock_flags = 0;
2905         if (use_master_clock)
2906                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2907
2908         vcpu->hv_clock.flags = pvclock_flags;
2909
2910         if (vcpu->pv_time_enabled)
2911                 kvm_setup_pvclock_page(v, &vcpu->pv_time, 0);
2912         if (vcpu->xen.vcpu_info_set)
2913                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_info_cache,
2914                                        offsetof(struct compat_vcpu_info, time));
2915         if (vcpu->xen.vcpu_time_info_set)
2916                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_time_info_cache, 0);
2917         if (v == kvm_get_vcpu(v->kvm, 0))
2918                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2919         return 0;
2920 }
2921
2922 /*
2923  * kvmclock updates which are isolated to a given vcpu, such as
2924  * vcpu->cpu migration, should not allow system_timestamp from
2925  * the rest of the vcpus to remain static. Otherwise ntp frequency
2926  * correction applies to one vcpu's system_timestamp but not
2927  * the others.
2928  *
2929  * So in those cases, request a kvmclock update for all vcpus.
2930  * We need to rate-limit these requests though, as they can
2931  * considerably slow guests that have a large number of vcpus.
2932  * The time for a remote vcpu to update its kvmclock is bound
2933  * by the delay we use to rate-limit the updates.
2934  */
2935
2936 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2937
2938 static void kvmclock_update_fn(struct work_struct *work)
2939 {
2940         int i;
2941         struct delayed_work *dwork = to_delayed_work(work);
2942         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2943                                            kvmclock_update_work);
2944         struct kvm *kvm = container_of(ka, struct kvm, arch);
2945         struct kvm_vcpu *vcpu;
2946
2947         kvm_for_each_vcpu(i, vcpu, kvm) {
2948                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2949                 kvm_vcpu_kick(vcpu);
2950         }
2951 }
2952
2953 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2954 {
2955         struct kvm *kvm = v->kvm;
2956
2957         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2958         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2959                                         KVMCLOCK_UPDATE_DELAY);
2960 }
2961
2962 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2963
2964 static void kvmclock_sync_fn(struct work_struct *work)
2965 {
2966         struct delayed_work *dwork = to_delayed_work(work);
2967         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2968                                            kvmclock_sync_work);
2969         struct kvm *kvm = container_of(ka, struct kvm, arch);
2970
2971         if (!kvmclock_periodic_sync)
2972                 return;
2973
2974         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2975         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2976                                         KVMCLOCK_SYNC_PERIOD);
2977 }
2978
2979 /*
2980  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
2981  */
2982 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
2983 {
2984         /* McStatusWrEn enabled? */
2985         if (guest_cpuid_is_amd_or_hygon(vcpu))
2986                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
2987
2988         return false;
2989 }
2990
2991 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2992 {
2993         u64 mcg_cap = vcpu->arch.mcg_cap;
2994         unsigned bank_num = mcg_cap & 0xff;
2995         u32 msr = msr_info->index;
2996         u64 data = msr_info->data;
2997
2998         switch (msr) {
2999         case MSR_IA32_MCG_STATUS:
3000                 vcpu->arch.mcg_status = data;
3001                 break;
3002         case MSR_IA32_MCG_CTL:
3003                 if (!(mcg_cap & MCG_CTL_P) &&
3004                     (data || !msr_info->host_initiated))
3005                         return 1;
3006                 if (data != 0 && data != ~(u64)0)
3007                         return 1;
3008                 vcpu->arch.mcg_ctl = data;
3009                 break;
3010         default:
3011                 if (msr >= MSR_IA32_MC0_CTL &&
3012                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3013                         u32 offset = array_index_nospec(
3014                                 msr - MSR_IA32_MC0_CTL,
3015                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3016
3017                         /* only 0 or all 1s can be written to IA32_MCi_CTL
3018                          * some Linux kernels though clear bit 10 in bank 4 to
3019                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
3020                          * this to avoid an uncatched #GP in the guest
3021                          */
3022                         if ((offset & 0x3) == 0 &&
3023                             data != 0 && (data | (1 << 10)) != ~(u64)0)
3024                                 return -1;
3025
3026                         /* MCi_STATUS */
3027                         if (!msr_info->host_initiated &&
3028                             (offset & 0x3) == 1 && data != 0) {
3029                                 if (!can_set_mci_status(vcpu))
3030                                         return -1;
3031                         }
3032
3033                         vcpu->arch.mce_banks[offset] = data;
3034                         break;
3035                 }
3036                 return 1;
3037         }
3038         return 0;
3039 }
3040
3041 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu)
3042 {
3043         u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT;
3044
3045         return (vcpu->arch.apf.msr_en_val & mask) == mask;
3046 }
3047
3048 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
3049 {
3050         gpa_t gpa = data & ~0x3f;
3051
3052         /* Bits 4:5 are reserved, Should be zero */
3053         if (data & 0x30)
3054                 return 1;
3055
3056         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_VMEXIT) &&
3057             (data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT))
3058                 return 1;
3059
3060         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT) &&
3061             (data & KVM_ASYNC_PF_DELIVERY_AS_INT))
3062                 return 1;
3063
3064         if (!lapic_in_kernel(vcpu))
3065                 return data ? 1 : 0;
3066
3067         vcpu->arch.apf.msr_en_val = data;
3068
3069         if (!kvm_pv_async_pf_enabled(vcpu)) {
3070                 kvm_clear_async_pf_completion_queue(vcpu);
3071                 kvm_async_pf_hash_reset(vcpu);
3072                 return 0;
3073         }
3074
3075         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
3076                                         sizeof(u64)))
3077                 return 1;
3078
3079         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
3080         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
3081
3082         kvm_async_pf_wakeup_all(vcpu);
3083
3084         return 0;
3085 }
3086
3087 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu *vcpu, u64 data)
3088 {
3089         /* Bits 8-63 are reserved */
3090         if (data >> 8)
3091                 return 1;
3092
3093         if (!lapic_in_kernel(vcpu))
3094                 return 1;
3095
3096         vcpu->arch.apf.msr_int_val = data;
3097
3098         vcpu->arch.apf.vec = data & KVM_ASYNC_PF_VEC_MASK;
3099
3100         return 0;
3101 }
3102
3103 static void kvmclock_reset(struct kvm_vcpu *vcpu)
3104 {
3105         vcpu->arch.pv_time_enabled = false;
3106         vcpu->arch.time = 0;
3107 }
3108
3109 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu *vcpu)
3110 {
3111         ++vcpu->stat.tlb_flush;
3112         static_call(kvm_x86_tlb_flush_all)(vcpu);
3113 }
3114
3115 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu)
3116 {
3117         ++vcpu->stat.tlb_flush;
3118
3119         if (!tdp_enabled) {
3120                /*
3121                  * A TLB flush on behalf of the guest is equivalent to
3122                  * INVPCID(all), toggling CR4.PGE, etc., which requires
3123                  * a forced sync of the shadow page tables.  Unload the
3124                  * entire MMU here and the subsequent load will sync the
3125                  * shadow page tables, and also flush the TLB.
3126                  */
3127                 kvm_mmu_unload(vcpu);
3128                 return;
3129         }
3130
3131         static_call(kvm_x86_tlb_flush_guest)(vcpu);
3132 }
3133
3134 static void record_steal_time(struct kvm_vcpu *vcpu)
3135 {
3136         struct kvm_host_map map;
3137         struct kvm_steal_time *st;
3138
3139         if (kvm_xen_msr_enabled(vcpu->kvm)) {
3140                 kvm_xen_runstate_set_running(vcpu);
3141                 return;
3142         }
3143
3144         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3145                 return;
3146
3147         /* -EAGAIN is returned in atomic context so we can just return. */
3148         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT,
3149                         &map, &vcpu->arch.st.cache, false))
3150                 return;
3151
3152         st = map.hva +
3153                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
3154
3155         /*
3156          * Doing a TLB flush here, on the guest's behalf, can avoid
3157          * expensive IPIs.
3158          */
3159         if (guest_pv_has(vcpu, KVM_FEATURE_PV_TLB_FLUSH)) {
3160                 u8 st_preempted = xchg(&st->preempted, 0);
3161
3162                 trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
3163                                        st_preempted & KVM_VCPU_FLUSH_TLB);
3164                 if (st_preempted & KVM_VCPU_FLUSH_TLB)
3165                         kvm_vcpu_flush_tlb_guest(vcpu);
3166         } else {
3167                 st->preempted = 0;
3168         }
3169
3170         vcpu->arch.st.preempted = 0;
3171
3172         if (st->version & 1)
3173                 st->version += 1;  /* first time write, random junk */
3174
3175         st->version += 1;
3176
3177         smp_wmb();
3178
3179         st->steal += current->sched_info.run_delay -
3180                 vcpu->arch.st.last_steal;
3181         vcpu->arch.st.last_steal = current->sched_info.run_delay;
3182
3183         smp_wmb();
3184
3185         st->version += 1;
3186
3187         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, false);
3188 }
3189
3190 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3191 {
3192         bool pr = false;
3193         u32 msr = msr_info->index;
3194         u64 data = msr_info->data;
3195
3196         if (msr && msr == vcpu->kvm->arch.xen_hvm_config.msr)
3197                 return kvm_xen_write_hypercall_page(vcpu, data);
3198
3199         switch (msr) {
3200         case MSR_AMD64_NB_CFG:
3201         case MSR_IA32_UCODE_WRITE:
3202         case MSR_VM_HSAVE_PA:
3203         case MSR_AMD64_PATCH_LOADER:
3204         case MSR_AMD64_BU_CFG2:
3205         case MSR_AMD64_DC_CFG:
3206         case MSR_F15H_EX_CFG:
3207                 break;
3208
3209         case MSR_IA32_UCODE_REV:
3210                 if (msr_info->host_initiated)
3211                         vcpu->arch.microcode_version = data;
3212                 break;
3213         case MSR_IA32_ARCH_CAPABILITIES:
3214                 if (!msr_info->host_initiated)
3215                         return 1;
3216                 vcpu->arch.arch_capabilities = data;
3217                 break;
3218         case MSR_IA32_PERF_CAPABILITIES: {
3219                 struct kvm_msr_entry msr_ent = {.index = msr, .data = 0};
3220
3221                 if (!msr_info->host_initiated)
3222                         return 1;
3223                 if (guest_cpuid_has(vcpu, X86_FEATURE_PDCM) && kvm_get_msr_feature(&msr_ent))
3224                         return 1;
3225                 if (data & ~msr_ent.data)
3226                         return 1;
3227
3228                 vcpu->arch.perf_capabilities = data;
3229
3230                 return 0;
3231                 }
3232         case MSR_EFER:
3233                 return set_efer(vcpu, msr_info);
3234         case MSR_K7_HWCR:
3235                 data &= ~(u64)0x40;     /* ignore flush filter disable */
3236                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
3237                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
3238
3239                 /* Handle McStatusWrEn */
3240                 if (data == BIT_ULL(18)) {
3241                         vcpu->arch.msr_hwcr = data;
3242                 } else if (data != 0) {
3243                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
3244                                     data);
3245                         return 1;
3246                 }
3247                 break;
3248         case MSR_FAM10H_MMIO_CONF_BASE:
3249                 if (data != 0) {
3250                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
3251                                     "0x%llx\n", data);
3252                         return 1;
3253                 }
3254                 break;
3255         case 0x200 ... 0x2ff:
3256                 return kvm_mtrr_set_msr(vcpu, msr, data);
3257         case MSR_IA32_APICBASE:
3258                 return kvm_set_apic_base(vcpu, msr_info);
3259         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3260                 return kvm_x2apic_msr_write(vcpu, msr, data);
3261         case MSR_IA32_TSC_DEADLINE:
3262                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
3263                 break;
3264         case MSR_IA32_TSC_ADJUST:
3265                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
3266                         if (!msr_info->host_initiated) {
3267                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
3268                                 adjust_tsc_offset_guest(vcpu, adj);
3269                         }
3270                         vcpu->arch.ia32_tsc_adjust_msr = data;
3271                 }
3272                 break;
3273         case MSR_IA32_MISC_ENABLE:
3274                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
3275                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
3276                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
3277                                 return 1;
3278                         vcpu->arch.ia32_misc_enable_msr = data;
3279                         kvm_update_cpuid_runtime(vcpu);
3280                 } else {
3281                         vcpu->arch.ia32_misc_enable_msr = data;
3282                 }
3283                 break;
3284         case MSR_IA32_SMBASE:
3285                 if (!msr_info->host_initiated)
3286                         return 1;
3287                 vcpu->arch.smbase = data;
3288                 break;
3289         case MSR_IA32_POWER_CTL:
3290                 vcpu->arch.msr_ia32_power_ctl = data;
3291                 break;
3292         case MSR_IA32_TSC:
3293                 if (msr_info->host_initiated) {
3294                         kvm_synchronize_tsc(vcpu, data);
3295                 } else {
3296                         u64 adj = kvm_compute_l1_tsc_offset(vcpu, data) - vcpu->arch.l1_tsc_offset;
3297                         adjust_tsc_offset_guest(vcpu, adj);
3298                         vcpu->arch.ia32_tsc_adjust_msr += adj;
3299                 }
3300                 break;
3301         case MSR_IA32_XSS:
3302                 if (!msr_info->host_initiated &&
3303                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3304                         return 1;
3305                 /*
3306                  * KVM supports exposing PT to the guest, but does not support
3307                  * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3308                  * XSAVES/XRSTORS to save/restore PT MSRs.
3309                  */
3310                 if (data & ~supported_xss)
3311                         return 1;
3312                 vcpu->arch.ia32_xss = data;
3313                 break;
3314         case MSR_SMI_COUNT:
3315                 if (!msr_info->host_initiated)
3316                         return 1;
3317                 vcpu->arch.smi_count = data;
3318                 break;
3319         case MSR_KVM_WALL_CLOCK_NEW:
3320                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3321                         return 1;
3322
3323                 vcpu->kvm->arch.wall_clock = data;
3324                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3325                 break;
3326         case MSR_KVM_WALL_CLOCK:
3327                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3328                         return 1;
3329
3330                 vcpu->kvm->arch.wall_clock = data;
3331                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3332                 break;
3333         case MSR_KVM_SYSTEM_TIME_NEW:
3334                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3335                         return 1;
3336
3337                 kvm_write_system_time(vcpu, data, false, msr_info->host_initiated);
3338                 break;
3339         case MSR_KVM_SYSTEM_TIME:
3340                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3341                         return 1;
3342
3343                 kvm_write_system_time(vcpu, data, true,  msr_info->host_initiated);
3344                 break;
3345         case MSR_KVM_ASYNC_PF_EN:
3346                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3347                         return 1;
3348
3349                 if (kvm_pv_enable_async_pf(vcpu, data))
3350                         return 1;
3351                 break;
3352         case MSR_KVM_ASYNC_PF_INT:
3353                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3354                         return 1;
3355
3356                 if (kvm_pv_enable_async_pf_int(vcpu, data))
3357                         return 1;
3358                 break;
3359         case MSR_KVM_ASYNC_PF_ACK:
3360                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3361                         return 1;
3362                 if (data & 0x1) {
3363                         vcpu->arch.apf.pageready_pending = false;
3364                         kvm_check_async_pf_completion(vcpu);
3365                 }
3366                 break;
3367         case MSR_KVM_STEAL_TIME:
3368                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3369                         return 1;
3370
3371                 if (unlikely(!sched_info_on()))
3372                         return 1;
3373
3374                 if (data & KVM_STEAL_RESERVED_MASK)
3375                         return 1;
3376
3377                 vcpu->arch.st.msr_val = data;
3378
3379                 if (!(data & KVM_MSR_ENABLED))
3380                         break;
3381
3382                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3383
3384                 break;
3385         case MSR_KVM_PV_EOI_EN:
3386                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3387                         return 1;
3388
3389                 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
3390                         return 1;
3391                 break;
3392
3393         case MSR_KVM_POLL_CONTROL:
3394                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3395                         return 1;
3396
3397                 /* only enable bit supported */
3398                 if (data & (-1ULL << 1))
3399                         return 1;
3400
3401                 vcpu->arch.msr_kvm_poll_control = data;
3402                 break;
3403
3404         case MSR_IA32_MCG_CTL:
3405         case MSR_IA32_MCG_STATUS:
3406         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3407                 return set_msr_mce(vcpu, msr_info);
3408
3409         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3410         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3411                 pr = true;
3412                 fallthrough;
3413         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3414         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3415                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3416                         return kvm_pmu_set_msr(vcpu, msr_info);
3417
3418                 if (pr || data != 0)
3419                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
3420                                     "0x%x data 0x%llx\n", msr, data);
3421                 break;
3422         case MSR_K7_CLK_CTL:
3423                 /*
3424                  * Ignore all writes to this no longer documented MSR.
3425                  * Writes are only relevant for old K7 processors,
3426                  * all pre-dating SVM, but a recommended workaround from
3427                  * AMD for these chips. It is possible to specify the
3428                  * affected processor models on the command line, hence
3429                  * the need to ignore the workaround.
3430                  */
3431                 break;
3432         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3433         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3434         case HV_X64_MSR_SYNDBG_OPTIONS:
3435         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3436         case HV_X64_MSR_CRASH_CTL:
3437         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3438         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3439         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3440         case HV_X64_MSR_TSC_EMULATION_STATUS:
3441                 return kvm_hv_set_msr_common(vcpu, msr, data,
3442                                              msr_info->host_initiated);
3443         case MSR_IA32_BBL_CR_CTL3:
3444                 /* Drop writes to this legacy MSR -- see rdmsr
3445                  * counterpart for further detail.
3446                  */
3447                 if (report_ignored_msrs)
3448                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
3449                                 msr, data);
3450                 break;
3451         case MSR_AMD64_OSVW_ID_LENGTH:
3452                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3453                         return 1;
3454                 vcpu->arch.osvw.length = data;
3455                 break;
3456         case MSR_AMD64_OSVW_STATUS:
3457                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3458                         return 1;
3459                 vcpu->arch.osvw.status = data;
3460                 break;
3461         case MSR_PLATFORM_INFO:
3462                 if (!msr_info->host_initiated ||
3463                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
3464                      cpuid_fault_enabled(vcpu)))
3465                         return 1;
3466                 vcpu->arch.msr_platform_info = data;
3467                 break;
3468         case MSR_MISC_FEATURES_ENABLES:
3469                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
3470                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
3471                      !supports_cpuid_fault(vcpu)))
3472                         return 1;
3473                 vcpu->arch.msr_misc_features_enables = data;
3474                 break;
3475         default:
3476                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3477                         return kvm_pmu_set_msr(vcpu, msr_info);
3478                 return KVM_MSR_RET_INVALID;
3479         }
3480         return 0;
3481 }
3482 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
3483
3484 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
3485 {
3486         u64 data;
3487         u64 mcg_cap = vcpu->arch.mcg_cap;
3488         unsigned bank_num = mcg_cap & 0xff;
3489
3490         switch (msr) {
3491         case MSR_IA32_P5_MC_ADDR:
3492         case MSR_IA32_P5_MC_TYPE:
3493                 data = 0;
3494                 break;
3495         case MSR_IA32_MCG_CAP:
3496                 data = vcpu->arch.mcg_cap;
3497                 break;
3498         case MSR_IA32_MCG_CTL:
3499                 if (!(mcg_cap & MCG_CTL_P) && !host)
3500                         return 1;
3501                 data = vcpu->arch.mcg_ctl;
3502                 break;
3503         case MSR_IA32_MCG_STATUS:
3504                 data = vcpu->arch.mcg_status;
3505                 break;
3506         default:
3507                 if (msr >= MSR_IA32_MC0_CTL &&
3508                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3509                         u32 offset = array_index_nospec(
3510                                 msr - MSR_IA32_MC0_CTL,
3511                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3512
3513                         data = vcpu->arch.mce_banks[offset];
3514                         break;
3515                 }
3516                 return 1;
3517         }
3518         *pdata = data;
3519         return 0;
3520 }
3521
3522 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3523 {
3524         switch (msr_info->index) {
3525         case MSR_IA32_PLATFORM_ID:
3526         case MSR_IA32_EBL_CR_POWERON:
3527         case MSR_IA32_LASTBRANCHFROMIP:
3528         case MSR_IA32_LASTBRANCHTOIP:
3529         case MSR_IA32_LASTINTFROMIP:
3530         case MSR_IA32_LASTINTTOIP:
3531         case MSR_K8_SYSCFG:
3532         case MSR_K8_TSEG_ADDR:
3533         case MSR_K8_TSEG_MASK:
3534         case MSR_VM_HSAVE_PA:
3535         case MSR_K8_INT_PENDING_MSG:
3536         case MSR_AMD64_NB_CFG:
3537         case MSR_FAM10H_MMIO_CONF_BASE:
3538         case MSR_AMD64_BU_CFG2:
3539         case MSR_IA32_PERF_CTL:
3540         case MSR_AMD64_DC_CFG:
3541         case MSR_F15H_EX_CFG:
3542         /*
3543          * Intel Sandy Bridge CPUs must support the RAPL (running average power
3544          * limit) MSRs. Just return 0, as we do not want to expose the host
3545          * data here. Do not conditionalize this on CPUID, as KVM does not do
3546          * so for existing CPU-specific MSRs.
3547          */
3548         case MSR_RAPL_POWER_UNIT:
3549         case MSR_PP0_ENERGY_STATUS:     /* Power plane 0 (core) */
3550         case MSR_PP1_ENERGY_STATUS:     /* Power plane 1 (graphics uncore) */
3551         case MSR_PKG_ENERGY_STATUS:     /* Total package */
3552         case MSR_DRAM_ENERGY_STATUS:    /* DRAM controller */
3553                 msr_info->data = 0;
3554                 break;
3555         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3556                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3557                         return kvm_pmu_get_msr(vcpu, msr_info);
3558                 if (!msr_info->host_initiated)
3559                         return 1;
3560                 msr_info->data = 0;
3561                 break;
3562         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3563         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3564         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3565         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3566                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3567                         return kvm_pmu_get_msr(vcpu, msr_info);
3568                 msr_info->data = 0;
3569                 break;
3570         case MSR_IA32_UCODE_REV:
3571                 msr_info->data = vcpu->arch.microcode_version;
3572                 break;
3573         case MSR_IA32_ARCH_CAPABILITIES:
3574                 if (!msr_info->host_initiated &&
3575                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
3576                         return 1;
3577                 msr_info->data = vcpu->arch.arch_capabilities;
3578                 break;
3579         case MSR_IA32_PERF_CAPABILITIES:
3580                 if (!msr_info->host_initiated &&
3581                     !guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
3582                         return 1;
3583                 msr_info->data = vcpu->arch.perf_capabilities;
3584                 break;
3585         case MSR_IA32_POWER_CTL:
3586                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
3587                 break;
3588         case MSR_IA32_TSC: {
3589                 /*
3590                  * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3591                  * even when not intercepted. AMD manual doesn't explicitly
3592                  * state this but appears to behave the same.
3593                  *
3594                  * On userspace reads and writes, however, we unconditionally
3595                  * return L1's TSC value to ensure backwards-compatible
3596                  * behavior for migration.
3597                  */
3598                 u64 offset, ratio;
3599
3600                 if (msr_info->host_initiated) {
3601                         offset = vcpu->arch.l1_tsc_offset;
3602                         ratio = vcpu->arch.l1_tsc_scaling_ratio;
3603                 } else {
3604                         offset = vcpu->arch.tsc_offset;
3605                         ratio = vcpu->arch.tsc_scaling_ratio;
3606                 }
3607
3608                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc(), ratio) + offset;
3609                 break;
3610         }
3611         case MSR_MTRRcap:
3612         case 0x200 ... 0x2ff:
3613                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
3614         case 0xcd: /* fsb frequency */
3615                 msr_info->data = 3;
3616                 break;
3617                 /*
3618                  * MSR_EBC_FREQUENCY_ID
3619                  * Conservative value valid for even the basic CPU models.
3620                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3621                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3622                  * and 266MHz for model 3, or 4. Set Core Clock
3623                  * Frequency to System Bus Frequency Ratio to 1 (bits
3624                  * 31:24) even though these are only valid for CPU
3625                  * models > 2, however guests may end up dividing or
3626                  * multiplying by zero otherwise.
3627                  */
3628         case MSR_EBC_FREQUENCY_ID:
3629                 msr_info->data = 1 << 24;
3630                 break;
3631         case MSR_IA32_APICBASE:
3632                 msr_info->data = kvm_get_apic_base(vcpu);
3633                 break;
3634         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3635                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
3636         case MSR_IA32_TSC_DEADLINE:
3637                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
3638                 break;
3639         case MSR_IA32_TSC_ADJUST:
3640                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
3641                 break;
3642         case MSR_IA32_MISC_ENABLE:
3643                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
3644                 break;
3645         case MSR_IA32_SMBASE:
3646                 if (!msr_info->host_initiated)
3647                         return 1;
3648                 msr_info->data = vcpu->arch.smbase;
3649                 break;
3650         case MSR_SMI_COUNT:
3651                 msr_info->data = vcpu->arch.smi_count;
3652                 break;
3653         case MSR_IA32_PERF_STATUS:
3654                 /* TSC increment by tick */
3655                 msr_info->data = 1000ULL;
3656                 /* CPU multiplier */
3657                 msr_info->data |= (((uint64_t)4ULL) << 40);
3658                 break;
3659         case MSR_EFER:
3660                 msr_info->data = vcpu->arch.efer;
3661                 break;
3662         case MSR_KVM_WALL_CLOCK:
3663                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3664                         return 1;
3665
3666                 msr_info->data = vcpu->kvm->arch.wall_clock;
3667                 break;
3668         case MSR_KVM_WALL_CLOCK_NEW:
3669                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3670                         return 1;
3671
3672                 msr_info->data = vcpu->kvm->arch.wall_clock;
3673                 break;
3674         case MSR_KVM_SYSTEM_TIME:
3675                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3676                         return 1;
3677
3678                 msr_info->data = vcpu->arch.time;
3679                 break;
3680         case MSR_KVM_SYSTEM_TIME_NEW:
3681                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3682                         return 1;
3683
3684                 msr_info->data = vcpu->arch.time;
3685                 break;
3686         case MSR_KVM_ASYNC_PF_EN:
3687                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3688                         return 1;
3689
3690                 msr_info->data = vcpu->arch.apf.msr_en_val;
3691                 break;
3692         case MSR_KVM_ASYNC_PF_INT:
3693                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3694                         return 1;
3695
3696                 msr_info->data = vcpu->arch.apf.msr_int_val;
3697                 break;
3698         case MSR_KVM_ASYNC_PF_ACK:
3699                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3700                         return 1;
3701
3702                 msr_info->data = 0;
3703                 break;
3704         case MSR_KVM_STEAL_TIME:
3705                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3706                         return 1;
3707
3708                 msr_info->data = vcpu->arch.st.msr_val;
3709                 break;
3710         case MSR_KVM_PV_EOI_EN:
3711                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3712                         return 1;
3713
3714                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3715                 break;
3716         case MSR_KVM_POLL_CONTROL:
3717                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3718                         return 1;
3719
3720                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3721                 break;
3722         case MSR_IA32_P5_MC_ADDR:
3723         case MSR_IA32_P5_MC_TYPE:
3724         case MSR_IA32_MCG_CAP:
3725         case MSR_IA32_MCG_CTL:
3726         case MSR_IA32_MCG_STATUS:
3727         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3728                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3729                                    msr_info->host_initiated);
3730         case MSR_IA32_XSS:
3731                 if (!msr_info->host_initiated &&
3732                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3733                         return 1;
3734                 msr_info->data = vcpu->arch.ia32_xss;
3735                 break;
3736         case MSR_K7_CLK_CTL:
3737                 /*
3738                  * Provide expected ramp-up count for K7. All other
3739                  * are set to zero, indicating minimum divisors for
3740                  * every field.
3741                  *
3742                  * This prevents guest kernels on AMD host with CPU
3743                  * type 6, model 8 and higher from exploding due to
3744                  * the rdmsr failing.
3745                  */
3746                 msr_info->data = 0x20000000;
3747                 break;
3748         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3749         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3750         case HV_X64_MSR_SYNDBG_OPTIONS:
3751         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3752         case HV_X64_MSR_CRASH_CTL:
3753         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3754         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3755         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3756         case HV_X64_MSR_TSC_EMULATION_STATUS:
3757                 return kvm_hv_get_msr_common(vcpu,
3758                                              msr_info->index, &msr_info->data,
3759                                              msr_info->host_initiated);
3760         case MSR_IA32_BBL_CR_CTL3:
3761                 /* This legacy MSR exists but isn't fully documented in current
3762                  * silicon.  It is however accessed by winxp in very narrow
3763                  * scenarios where it sets bit #19, itself documented as
3764                  * a "reserved" bit.  Best effort attempt to source coherent
3765                  * read data here should the balance of the register be
3766                  * interpreted by the guest:
3767                  *
3768                  * L2 cache control register 3: 64GB range, 256KB size,
3769                  * enabled, latency 0x1, configured
3770                  */
3771                 msr_info->data = 0xbe702111;
3772                 break;
3773         case MSR_AMD64_OSVW_ID_LENGTH:
3774                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3775                         return 1;
3776                 msr_info->data = vcpu->arch.osvw.length;
3777                 break;
3778         case MSR_AMD64_OSVW_STATUS:
3779                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3780                         return 1;
3781                 msr_info->data = vcpu->arch.osvw.status;
3782                 break;
3783         case MSR_PLATFORM_INFO:
3784                 if (!msr_info->host_initiated &&
3785                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
3786                         return 1;
3787                 msr_info->data = vcpu->arch.msr_platform_info;
3788                 break;
3789         case MSR_MISC_FEATURES_ENABLES:
3790                 msr_info->data = vcpu->arch.msr_misc_features_enables;
3791                 break;
3792         case MSR_K7_HWCR:
3793                 msr_info->data = vcpu->arch.msr_hwcr;
3794                 break;
3795         default:
3796                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3797                         return kvm_pmu_get_msr(vcpu, msr_info);
3798                 return KVM_MSR_RET_INVALID;
3799         }
3800         return 0;
3801 }
3802 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
3803
3804 /*
3805  * Read or write a bunch of msrs. All parameters are kernel addresses.
3806  *
3807  * @return number of msrs set successfully.
3808  */
3809 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
3810                     struct kvm_msr_entry *entries,
3811                     int (*do_msr)(struct kvm_vcpu *vcpu,
3812                                   unsigned index, u64 *data))
3813 {
3814         int i;
3815
3816         for (i = 0; i < msrs->nmsrs; ++i)
3817                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
3818                         break;
3819
3820         return i;
3821 }
3822
3823 /*
3824  * Read or write a bunch of msrs. Parameters are user addresses.
3825  *
3826  * @return number of msrs set successfully.
3827  */
3828 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
3829                   int (*do_msr)(struct kvm_vcpu *vcpu,
3830                                 unsigned index, u64 *data),
3831                   int writeback)
3832 {
3833         struct kvm_msrs msrs;
3834         struct kvm_msr_entry *entries;
3835         int r, n;
3836         unsigned size;
3837
3838         r = -EFAULT;
3839         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
3840                 goto out;
3841
3842         r = -E2BIG;
3843         if (msrs.nmsrs >= MAX_IO_MSRS)
3844                 goto out;
3845
3846         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
3847         entries = memdup_user(user_msrs->entries, size);
3848         if (IS_ERR(entries)) {
3849                 r = PTR_ERR(entries);
3850                 goto out;
3851         }
3852
3853         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
3854         if (r < 0)
3855                 goto out_free;
3856
3857         r = -EFAULT;
3858         if (writeback && copy_to_user(user_msrs->entries, entries, size))
3859                 goto out_free;
3860
3861         r = n;
3862
3863 out_free:
3864         kfree(entries);
3865 out:
3866         return r;
3867 }
3868
3869 static inline bool kvm_can_mwait_in_guest(void)
3870 {
3871         return boot_cpu_has(X86_FEATURE_MWAIT) &&
3872                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
3873                 boot_cpu_has(X86_FEATURE_ARAT);
3874 }
3875
3876 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu *vcpu,
3877                                             struct kvm_cpuid2 __user *cpuid_arg)
3878 {
3879         struct kvm_cpuid2 cpuid;
3880         int r;
3881
3882         r = -EFAULT;
3883         if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3884                 return r;
3885
3886         r = kvm_get_hv_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3887         if (r)
3888                 return r;
3889
3890         r = -EFAULT;
3891         if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3892                 return r;
3893
3894         return 0;
3895 }
3896
3897 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
3898 {
3899         int r = 0;
3900
3901         switch (ext) {
3902         case KVM_CAP_IRQCHIP:
3903         case KVM_CAP_HLT:
3904         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
3905         case KVM_CAP_SET_TSS_ADDR:
3906         case KVM_CAP_EXT_CPUID:
3907         case KVM_CAP_EXT_EMUL_CPUID:
3908         case KVM_CAP_CLOCKSOURCE:
3909         case KVM_CAP_PIT:
3910         case KVM_CAP_NOP_IO_DELAY:
3911         case KVM_CAP_MP_STATE:
3912         case KVM_CAP_SYNC_MMU:
3913         case KVM_CAP_USER_NMI:
3914         case KVM_CAP_REINJECT_CONTROL:
3915         case KVM_CAP_IRQ_INJECT_STATUS:
3916         case KVM_CAP_IOEVENTFD:
3917         case KVM_CAP_IOEVENTFD_NO_LENGTH:
3918         case KVM_CAP_PIT2:
3919         case KVM_CAP_PIT_STATE2:
3920         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
3921         case KVM_CAP_VCPU_EVENTS:
3922         case KVM_CAP_HYPERV:
3923         case KVM_CAP_HYPERV_VAPIC:
3924         case KVM_CAP_HYPERV_SPIN:
3925         case KVM_CAP_HYPERV_SYNIC:
3926         case KVM_CAP_HYPERV_SYNIC2:
3927         case KVM_CAP_HYPERV_VP_INDEX:
3928         case KVM_CAP_HYPERV_EVENTFD:
3929         case KVM_CAP_HYPERV_TLBFLUSH:
3930         case KVM_CAP_HYPERV_SEND_IPI:
3931         case KVM_CAP_HYPERV_CPUID:
3932         case KVM_CAP_HYPERV_ENFORCE_CPUID:
3933         case KVM_CAP_SYS_HYPERV_CPUID:
3934         case KVM_CAP_PCI_SEGMENT:
3935         case KVM_CAP_DEBUGREGS:
3936         case KVM_CAP_X86_ROBUST_SINGLESTEP:
3937         case KVM_CAP_XSAVE:
3938         case KVM_CAP_ASYNC_PF:
3939         case KVM_CAP_ASYNC_PF_INT:
3940         case KVM_CAP_GET_TSC_KHZ:
3941         case KVM_CAP_KVMCLOCK_CTRL:
3942         case KVM_CAP_READONLY_MEM:
3943         case KVM_CAP_HYPERV_TIME:
3944         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
3945         case KVM_CAP_TSC_DEADLINE_TIMER:
3946         case KVM_CAP_DISABLE_QUIRKS:
3947         case KVM_CAP_SET_BOOT_CPU_ID:
3948         case KVM_CAP_SPLIT_IRQCHIP:
3949         case KVM_CAP_IMMEDIATE_EXIT:
3950         case KVM_CAP_PMU_EVENT_FILTER:
3951         case KVM_CAP_GET_MSR_FEATURES:
3952         case KVM_CAP_MSR_PLATFORM_INFO:
3953         case KVM_CAP_EXCEPTION_PAYLOAD:
3954         case KVM_CAP_SET_GUEST_DEBUG:
3955         case KVM_CAP_LAST_CPU:
3956         case KVM_CAP_X86_USER_SPACE_MSR:
3957         case KVM_CAP_X86_MSR_FILTER:
3958         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
3959 #ifdef CONFIG_X86_SGX_KVM
3960         case KVM_CAP_SGX_ATTRIBUTE:
3961 #endif
3962         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
3963         case KVM_CAP_SREGS2:
3964                 r = 1;
3965                 break;
3966         case KVM_CAP_SET_GUEST_DEBUG2:
3967                 return KVM_GUESTDBG_VALID_MASK;
3968 #ifdef CONFIG_KVM_XEN
3969         case KVM_CAP_XEN_HVM:
3970                 r = KVM_XEN_HVM_CONFIG_HYPERCALL_MSR |
3971                     KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL |
3972                     KVM_XEN_HVM_CONFIG_SHARED_INFO;
3973                 if (sched_info_on())
3974                         r |= KVM_XEN_HVM_CONFIG_RUNSTATE;
3975                 break;
3976 #endif
3977         case KVM_CAP_SYNC_REGS:
3978                 r = KVM_SYNC_X86_VALID_FIELDS;
3979                 break;
3980         case KVM_CAP_ADJUST_CLOCK:
3981                 r = KVM_CLOCK_TSC_STABLE;
3982                 break;
3983         case KVM_CAP_X86_DISABLE_EXITS:
3984                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
3985                       KVM_X86_DISABLE_EXITS_CSTATE;
3986                 if(kvm_can_mwait_in_guest())
3987                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
3988                 break;
3989         case KVM_CAP_X86_SMM:
3990                 /* SMBASE is usually relocated above 1M on modern chipsets,
3991                  * and SMM handlers might indeed rely on 4G segment limits,
3992                  * so do not report SMM to be available if real mode is
3993                  * emulated via vm86 mode.  Still, do not go to great lengths
3994                  * to avoid userspace's usage of the feature, because it is a
3995                  * fringe case that is not enabled except via specific settings
3996                  * of the module parameters.
3997                  */
3998                 r = static_call(kvm_x86_has_emulated_msr)(kvm, MSR_IA32_SMBASE);
3999                 break;
4000         case KVM_CAP_VAPIC:
4001                 r = !static_call(kvm_x86_cpu_has_accelerated_tpr)();
4002                 break;
4003         case KVM_CAP_NR_VCPUS:
4004                 r = KVM_SOFT_MAX_VCPUS;
4005                 break;
4006         case KVM_CAP_MAX_VCPUS:
4007                 r = KVM_MAX_VCPUS;
4008                 break;
4009         case KVM_CAP_MAX_VCPU_ID:
4010                 r = KVM_MAX_VCPU_ID;
4011                 break;
4012         case KVM_CAP_PV_MMU:    /* obsolete */
4013                 r = 0;
4014                 break;
4015         case KVM_CAP_MCE:
4016                 r = KVM_MAX_MCE_BANKS;
4017                 break;
4018         case KVM_CAP_XCRS:
4019                 r = boot_cpu_has(X86_FEATURE_XSAVE);
4020                 break;
4021         case KVM_CAP_TSC_CONTROL:
4022                 r = kvm_has_tsc_control;
4023                 break;
4024         case KVM_CAP_X2APIC_API:
4025                 r = KVM_X2APIC_API_VALID_FLAGS;
4026                 break;
4027         case KVM_CAP_NESTED_STATE:
4028                 r = kvm_x86_ops.nested_ops->get_state ?
4029                         kvm_x86_ops.nested_ops->get_state(NULL, NULL, 0) : 0;
4030                 break;
4031         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4032                 r = kvm_x86_ops.enable_direct_tlbflush != NULL;
4033                 break;
4034         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4035                 r = kvm_x86_ops.nested_ops->enable_evmcs != NULL;
4036                 break;
4037         case KVM_CAP_SMALLER_MAXPHYADDR:
4038                 r = (int) allow_smaller_maxphyaddr;
4039                 break;
4040         case KVM_CAP_STEAL_TIME:
4041                 r = sched_info_on();
4042                 break;
4043         case KVM_CAP_X86_BUS_LOCK_EXIT:
4044                 if (kvm_has_bus_lock_exit)
4045                         r = KVM_BUS_LOCK_DETECTION_OFF |
4046                             KVM_BUS_LOCK_DETECTION_EXIT;
4047                 else
4048                         r = 0;
4049                 break;
4050         default:
4051                 break;
4052         }
4053         return r;
4054
4055 }
4056
4057 long kvm_arch_dev_ioctl(struct file *filp,
4058                         unsigned int ioctl, unsigned long arg)
4059 {
4060         void __user *argp = (void __user *)arg;
4061         long r;
4062
4063         switch (ioctl) {
4064         case KVM_GET_MSR_INDEX_LIST: {
4065                 struct kvm_msr_list __user *user_msr_list = argp;
4066                 struct kvm_msr_list msr_list;
4067                 unsigned n;
4068
4069                 r = -EFAULT;
4070                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4071                         goto out;
4072                 n = msr_list.nmsrs;
4073                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
4074                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4075                         goto out;
4076                 r = -E2BIG;
4077                 if (n < msr_list.nmsrs)
4078                         goto out;
4079                 r = -EFAULT;
4080                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
4081                                  num_msrs_to_save * sizeof(u32)))
4082                         goto out;
4083                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
4084                                  &emulated_msrs,
4085                                  num_emulated_msrs * sizeof(u32)))
4086                         goto out;
4087                 r = 0;
4088                 break;
4089         }
4090         case KVM_GET_SUPPORTED_CPUID:
4091         case KVM_GET_EMULATED_CPUID: {
4092                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4093                 struct kvm_cpuid2 cpuid;
4094
4095                 r = -EFAULT;
4096                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4097                         goto out;
4098
4099                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
4100                                             ioctl);
4101                 if (r)
4102                         goto out;
4103
4104                 r = -EFAULT;
4105                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4106                         goto out;
4107                 r = 0;
4108                 break;
4109         }
4110         case KVM_X86_GET_MCE_CAP_SUPPORTED:
4111                 r = -EFAULT;
4112                 if (copy_to_user(argp, &kvm_mce_cap_supported,
4113                                  sizeof(kvm_mce_cap_supported)))
4114                         goto out;
4115                 r = 0;
4116                 break;
4117         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
4118                 struct kvm_msr_list __user *user_msr_list = argp;
4119                 struct kvm_msr_list msr_list;
4120                 unsigned int n;
4121
4122                 r = -EFAULT;
4123                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4124                         goto out;
4125                 n = msr_list.nmsrs;
4126                 msr_list.nmsrs = num_msr_based_features;
4127                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4128                         goto out;
4129                 r = -E2BIG;
4130                 if (n < msr_list.nmsrs)
4131                         goto out;
4132                 r = -EFAULT;
4133                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
4134                                  num_msr_based_features * sizeof(u32)))
4135                         goto out;
4136                 r = 0;
4137                 break;
4138         }
4139         case KVM_GET_MSRS:
4140                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
4141                 break;
4142         case KVM_GET_SUPPORTED_HV_CPUID:
4143                 r = kvm_ioctl_get_supported_hv_cpuid(NULL, argp);
4144                 break;
4145         default:
4146                 r = -EINVAL;
4147                 break;
4148         }
4149 out:
4150         return r;
4151 }
4152
4153 static void wbinvd_ipi(void *garbage)
4154 {
4155         wbinvd();
4156 }
4157
4158 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
4159 {
4160         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
4161 }
4162
4163 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
4164 {
4165         /* Address WBINVD may be executed by guest */
4166         if (need_emulate_wbinvd(vcpu)) {
4167                 if (static_call(kvm_x86_has_wbinvd_exit)())
4168                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4169                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
4170                         smp_call_function_single(vcpu->cpu,
4171                                         wbinvd_ipi, NULL, 1);
4172         }
4173
4174         static_call(kvm_x86_vcpu_load)(vcpu, cpu);
4175
4176         /* Save host pkru register if supported */
4177         vcpu->arch.host_pkru = read_pkru();
4178
4179         /* Apply any externally detected TSC adjustments (due to suspend) */
4180         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
4181                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
4182                 vcpu->arch.tsc_offset_adjustment = 0;
4183                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4184         }
4185
4186         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
4187                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
4188                                 rdtsc() - vcpu->arch.last_host_tsc;
4189                 if (tsc_delta < 0)
4190                         mark_tsc_unstable("KVM discovered backwards TSC");
4191
4192                 if (kvm_check_tsc_unstable()) {
4193                         u64 offset = kvm_compute_l1_tsc_offset(vcpu,
4194                                                 vcpu->arch.last_guest_tsc);
4195                         kvm_vcpu_write_tsc_offset(vcpu, offset);
4196                         vcpu->arch.tsc_catchup = 1;
4197                 }
4198
4199                 if (kvm_lapic_hv_timer_in_use(vcpu))
4200                         kvm_lapic_restart_hv_timer(vcpu);
4201
4202                 /*
4203                  * On a host with synchronized TSC, there is no need to update
4204                  * kvmclock on vcpu->cpu migration
4205                  */
4206                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
4207                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
4208                 if (vcpu->cpu != cpu)
4209                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
4210                 vcpu->cpu = cpu;
4211         }
4212
4213         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
4214 }
4215
4216 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
4217 {
4218         struct kvm_host_map map;
4219         struct kvm_steal_time *st;
4220
4221         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
4222                 return;
4223
4224         if (vcpu->arch.st.preempted)
4225                 return;
4226
4227         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT, &map,
4228                         &vcpu->arch.st.cache, true))
4229                 return;
4230
4231         st = map.hva +
4232                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
4233
4234         st->preempted = vcpu->arch.st.preempted = KVM_VCPU_PREEMPTED;
4235
4236         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, true);
4237 }
4238
4239 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
4240 {
4241         int idx;
4242
4243         if (vcpu->preempted && !vcpu->arch.guest_state_protected)
4244                 vcpu->arch.preempted_in_kernel = !static_call(kvm_x86_get_cpl)(vcpu);
4245
4246         /*
4247          * Take the srcu lock as memslots will be accessed to check the gfn
4248          * cache generation against the memslots generation.
4249          */
4250         idx = srcu_read_lock(&vcpu->kvm->srcu);
4251         if (kvm_xen_msr_enabled(vcpu->kvm))
4252                 kvm_xen_runstate_set_preempted(vcpu);
4253         else
4254                 kvm_steal_time_set_preempted(vcpu);
4255         srcu_read_unlock(&vcpu->kvm->srcu, idx);
4256
4257         static_call(kvm_x86_vcpu_put)(vcpu);
4258         vcpu->arch.last_host_tsc = rdtsc();
4259         /*
4260          * If userspace has set any breakpoints or watchpoints, dr6 is restored
4261          * on every vmexit, but if not, we might have a stale dr6 from the
4262          * guest. do_debug expects dr6 to be cleared after it runs, do the same.
4263          */
4264         set_debugreg(0, 6);
4265 }
4266
4267 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
4268                                     struct kvm_lapic_state *s)
4269 {
4270         if (vcpu->arch.apicv_active)
4271                 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
4272
4273         return kvm_apic_get_state(vcpu, s);
4274 }
4275
4276 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
4277                                     struct kvm_lapic_state *s)
4278 {
4279         int r;
4280
4281         r = kvm_apic_set_state(vcpu, s);
4282         if (r)
4283                 return r;
4284         update_cr8_intercept(vcpu);
4285
4286         return 0;
4287 }
4288
4289 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
4290 {
4291         /*
4292          * We can accept userspace's request for interrupt injection
4293          * as long as we have a place to store the interrupt number.
4294          * The actual injection will happen when the CPU is able to
4295          * deliver the interrupt.
4296          */
4297         if (kvm_cpu_has_extint(vcpu))
4298                 return false;
4299
4300         /* Acknowledging ExtINT does not happen if LINT0 is masked.  */
4301         return (!lapic_in_kernel(vcpu) ||
4302                 kvm_apic_accept_pic_intr(vcpu));
4303 }
4304
4305 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
4306 {
4307         return kvm_arch_interrupt_allowed(vcpu) &&
4308                 kvm_cpu_accept_dm_intr(vcpu);
4309 }
4310
4311 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
4312                                     struct kvm_interrupt *irq)
4313 {
4314         if (irq->irq >= KVM_NR_INTERRUPTS)
4315                 return -EINVAL;
4316
4317         if (!irqchip_in_kernel(vcpu->kvm)) {
4318                 kvm_queue_interrupt(vcpu, irq->irq, false);
4319                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4320                 return 0;
4321         }
4322
4323         /*
4324          * With in-kernel LAPIC, we only use this to inject EXTINT, so
4325          * fail for in-kernel 8259.
4326          */
4327         if (pic_in_kernel(vcpu->kvm))
4328                 return -ENXIO;
4329
4330         if (vcpu->arch.pending_external_vector != -1)
4331                 return -EEXIST;
4332
4333         vcpu->arch.pending_external_vector = irq->irq;
4334         kvm_make_request(KVM_REQ_EVENT, vcpu);
4335         return 0;
4336 }
4337
4338 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
4339 {
4340         kvm_inject_nmi(vcpu);
4341
4342         return 0;
4343 }
4344
4345 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
4346 {
4347         kvm_make_request(KVM_REQ_SMI, vcpu);
4348
4349         return 0;
4350 }
4351
4352 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
4353                                            struct kvm_tpr_access_ctl *tac)
4354 {
4355         if (tac->flags)
4356                 return -EINVAL;
4357         vcpu->arch.tpr_access_reporting = !!tac->enabled;
4358         return 0;
4359 }
4360
4361 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
4362                                         u64 mcg_cap)
4363 {
4364         int r;
4365         unsigned bank_num = mcg_cap & 0xff, bank;
4366
4367         r = -EINVAL;
4368         if (!bank_num || bank_num > KVM_MAX_MCE_BANKS)
4369                 goto out;
4370         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
4371                 goto out;
4372         r = 0;
4373         vcpu->arch.mcg_cap = mcg_cap;
4374         /* Init IA32_MCG_CTL to all 1s */
4375         if (mcg_cap & MCG_CTL_P)
4376                 vcpu->arch.mcg_ctl = ~(u64)0;
4377         /* Init IA32_MCi_CTL to all 1s */
4378         for (bank = 0; bank < bank_num; bank++)
4379                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
4380
4381         static_call(kvm_x86_setup_mce)(vcpu);
4382 out:
4383         return r;
4384 }
4385
4386 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
4387                                       struct kvm_x86_mce *mce)
4388 {
4389         u64 mcg_cap = vcpu->arch.mcg_cap;
4390         unsigned bank_num = mcg_cap & 0xff;
4391         u64 *banks = vcpu->arch.mce_banks;
4392
4393         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
4394                 return -EINVAL;
4395         /*
4396          * if IA32_MCG_CTL is not all 1s, the uncorrected error
4397          * reporting is disabled
4398          */
4399         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
4400             vcpu->arch.mcg_ctl != ~(u64)0)
4401                 return 0;
4402         banks += 4 * mce->bank;
4403         /*
4404          * if IA32_MCi_CTL is not all 1s, the uncorrected error
4405          * reporting is disabled for the bank
4406          */
4407         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
4408                 return 0;
4409         if (mce->status & MCI_STATUS_UC) {
4410                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
4411                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
4412                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
4413                         return 0;
4414                 }
4415                 if (banks[1] & MCI_STATUS_VAL)
4416                         mce->status |= MCI_STATUS_OVER;
4417                 banks[2] = mce->addr;
4418                 banks[3] = mce->misc;
4419                 vcpu->arch.mcg_status = mce->mcg_status;
4420                 banks[1] = mce->status;
4421                 kvm_queue_exception(vcpu, MC_VECTOR);
4422         } else if (!(banks[1] & MCI_STATUS_VAL)
4423                    || !(banks[1] & MCI_STATUS_UC)) {
4424                 if (banks[1] & MCI_STATUS_VAL)
4425                         mce->status |= MCI_STATUS_OVER;
4426                 banks[2] = mce->addr;
4427                 banks[3] = mce->misc;
4428                 banks[1] = mce->status;
4429         } else
4430                 banks[1] |= MCI_STATUS_OVER;
4431         return 0;
4432 }
4433
4434 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
4435                                                struct kvm_vcpu_events *events)
4436 {
4437         process_nmi(vcpu);
4438
4439         if (kvm_check_request(KVM_REQ_SMI, vcpu))
4440                 process_smi(vcpu);
4441
4442         /*
4443          * In guest mode, payload delivery should be deferred,
4444          * so that the L1 hypervisor can intercept #PF before
4445          * CR2 is modified (or intercept #DB before DR6 is
4446          * modified under nVMX). Unless the per-VM capability,
4447          * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4448          * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4449          * opportunistically defer the exception payload, deliver it if the
4450          * capability hasn't been requested before processing a
4451          * KVM_GET_VCPU_EVENTS.
4452          */
4453         if (!vcpu->kvm->arch.exception_payload_enabled &&
4454             vcpu->arch.exception.pending && vcpu->arch.exception.has_payload)
4455                 kvm_deliver_exception_payload(vcpu);
4456
4457         /*
4458          * The API doesn't provide the instruction length for software
4459          * exceptions, so don't report them. As long as the guest RIP
4460          * isn't advanced, we should expect to encounter the exception
4461          * again.
4462          */
4463         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
4464                 events->exception.injected = 0;
4465                 events->exception.pending = 0;
4466         } else {
4467                 events->exception.injected = vcpu->arch.exception.injected;
4468                 events->exception.pending = vcpu->arch.exception.pending;
4469                 /*
4470                  * For ABI compatibility, deliberately conflate
4471                  * pending and injected exceptions when
4472                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4473                  */
4474                 if (!vcpu->kvm->arch.exception_payload_enabled)
4475                         events->exception.injected |=
4476                                 vcpu->arch.exception.pending;
4477         }
4478         events->exception.nr = vcpu->arch.exception.nr;
4479         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
4480         events->exception.error_code = vcpu->arch.exception.error_code;
4481         events->exception_has_payload = vcpu->arch.exception.has_payload;
4482         events->exception_payload = vcpu->arch.exception.payload;
4483
4484         events->interrupt.injected =
4485                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
4486         events->interrupt.nr = vcpu->arch.interrupt.nr;
4487         events->interrupt.soft = 0;
4488         events->interrupt.shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
4489
4490         events->nmi.injected = vcpu->arch.nmi_injected;
4491         events->nmi.pending = vcpu->arch.nmi_pending != 0;
4492         events->nmi.masked = static_call(kvm_x86_get_nmi_mask)(vcpu);
4493         events->nmi.pad = 0;
4494
4495         events->sipi_vector = 0; /* never valid when reporting to user space */
4496
4497         events->smi.smm = is_smm(vcpu);
4498         events->smi.pending = vcpu->arch.smi_pending;
4499         events->smi.smm_inside_nmi =
4500                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
4501         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
4502
4503         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
4504                          | KVM_VCPUEVENT_VALID_SHADOW
4505                          | KVM_VCPUEVENT_VALID_SMM);
4506         if (vcpu->kvm->arch.exception_payload_enabled)
4507                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
4508
4509         memset(&events->reserved, 0, sizeof(events->reserved));
4510 }
4511
4512 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm);
4513
4514 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
4515                                               struct kvm_vcpu_events *events)
4516 {
4517         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4518                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4519                               | KVM_VCPUEVENT_VALID_SHADOW
4520                               | KVM_VCPUEVENT_VALID_SMM
4521                               | KVM_VCPUEVENT_VALID_PAYLOAD))
4522                 return -EINVAL;
4523
4524         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
4525                 if (!vcpu->kvm->arch.exception_payload_enabled)
4526                         return -EINVAL;
4527                 if (events->exception.pending)
4528                         events->exception.injected = 0;
4529                 else
4530                         events->exception_has_payload = 0;
4531         } else {
4532                 events->exception.pending = 0;
4533                 events->exception_has_payload = 0;
4534         }
4535
4536         if ((events->exception.injected || events->exception.pending) &&
4537             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
4538                 return -EINVAL;
4539
4540         /* INITs are latched while in SMM */
4541         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
4542             (events->smi.smm || events->smi.pending) &&
4543             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
4544                 return -EINVAL;
4545
4546         process_nmi(vcpu);
4547         vcpu->arch.exception.injected = events->exception.injected;
4548         vcpu->arch.exception.pending = events->exception.pending;
4549         vcpu->arch.exception.nr = events->exception.nr;
4550         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
4551         vcpu->arch.exception.error_code = events->exception.error_code;
4552         vcpu->arch.exception.has_payload = events->exception_has_payload;
4553         vcpu->arch.exception.payload = events->exception_payload;
4554
4555         vcpu->arch.interrupt.injected = events->interrupt.injected;
4556         vcpu->arch.interrupt.nr = events->interrupt.nr;
4557         vcpu->arch.interrupt.soft = events->interrupt.soft;
4558         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
4559                 static_call(kvm_x86_set_interrupt_shadow)(vcpu,
4560                                                 events->interrupt.shadow);
4561
4562         vcpu->arch.nmi_injected = events->nmi.injected;
4563         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
4564                 vcpu->arch.nmi_pending = events->nmi.pending;
4565         static_call(kvm_x86_set_nmi_mask)(vcpu, events->nmi.masked);
4566
4567         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
4568             lapic_in_kernel(vcpu))
4569                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
4570
4571         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
4572                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm)
4573                         kvm_smm_changed(vcpu, events->smi.smm);
4574
4575                 vcpu->arch.smi_pending = events->smi.pending;
4576
4577                 if (events->smi.smm) {
4578                         if (events->smi.smm_inside_nmi)
4579                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
4580                         else
4581                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
4582                 }
4583
4584                 if (lapic_in_kernel(vcpu)) {
4585                         if (events->smi.latched_init)
4586                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4587                         else
4588                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4589                 }
4590         }
4591
4592         kvm_make_request(KVM_REQ_EVENT, vcpu);
4593
4594         return 0;
4595 }
4596
4597 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
4598                                              struct kvm_debugregs *dbgregs)
4599 {
4600         unsigned long val;
4601
4602         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
4603         kvm_get_dr(vcpu, 6, &val);
4604         dbgregs->dr6 = val;
4605         dbgregs->dr7 = vcpu->arch.dr7;
4606         dbgregs->flags = 0;
4607         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
4608 }
4609
4610 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
4611                                             struct kvm_debugregs *dbgregs)
4612 {
4613         if (dbgregs->flags)
4614                 return -EINVAL;
4615
4616         if (!kvm_dr6_valid(dbgregs->dr6))
4617                 return -EINVAL;
4618         if (!kvm_dr7_valid(dbgregs->dr7))
4619                 return -EINVAL;
4620
4621         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
4622         kvm_update_dr0123(vcpu);
4623         vcpu->arch.dr6 = dbgregs->dr6;
4624         vcpu->arch.dr7 = dbgregs->dr7;
4625         kvm_update_dr7(vcpu);
4626
4627         return 0;
4628 }
4629
4630 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
4631
4632 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
4633 {
4634         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4635         u64 xstate_bv = xsave->header.xfeatures;
4636         u64 valid;
4637
4638         /*
4639          * Copy legacy XSAVE area, to avoid complications with CPUID
4640          * leaves 0 and 1 in the loop below.
4641          */
4642         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
4643
4644         /* Set XSTATE_BV */
4645         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
4646         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
4647
4648         /*
4649          * Copy each region from the possibly compacted offset to the
4650          * non-compacted offset.
4651          */
4652         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4653         while (valid) {
4654                 u64 xfeature_mask = valid & -valid;
4655                 int xfeature_nr = fls64(xfeature_mask) - 1;
4656                 void *src = get_xsave_addr(xsave, xfeature_nr);
4657
4658                 if (src) {
4659                         u32 size, offset, ecx, edx;
4660                         cpuid_count(XSTATE_CPUID, xfeature_nr,
4661                                     &size, &offset, &ecx, &edx);
4662                         if (xfeature_nr == XFEATURE_PKRU)
4663                                 memcpy(dest + offset, &vcpu->arch.pkru,
4664                                        sizeof(vcpu->arch.pkru));
4665                         else
4666                                 memcpy(dest + offset, src, size);
4667
4668                 }
4669
4670                 valid -= xfeature_mask;
4671         }
4672 }
4673
4674 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
4675 {
4676         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4677         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
4678         u64 valid;
4679
4680         /*
4681          * Copy legacy XSAVE area, to avoid complications with CPUID
4682          * leaves 0 and 1 in the loop below.
4683          */
4684         memcpy(xsave, src, XSAVE_HDR_OFFSET);
4685
4686         /* Set XSTATE_BV and possibly XCOMP_BV.  */
4687         xsave->header.xfeatures = xstate_bv;
4688         if (boot_cpu_has(X86_FEATURE_XSAVES))
4689                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
4690
4691         /*
4692          * Copy each region from the non-compacted offset to the
4693          * possibly compacted offset.
4694          */
4695         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4696         while (valid) {
4697                 u64 xfeature_mask = valid & -valid;
4698                 int xfeature_nr = fls64(xfeature_mask) - 1;
4699                 void *dest = get_xsave_addr(xsave, xfeature_nr);
4700
4701                 if (dest) {
4702                         u32 size, offset, ecx, edx;
4703                         cpuid_count(XSTATE_CPUID, xfeature_nr,
4704                                     &size, &offset, &ecx, &edx);
4705                         if (xfeature_nr == XFEATURE_PKRU)
4706                                 memcpy(&vcpu->arch.pkru, src + offset,
4707                                        sizeof(vcpu->arch.pkru));
4708                         else
4709                                 memcpy(dest, src + offset, size);
4710                 }
4711
4712                 valid -= xfeature_mask;
4713         }
4714 }
4715
4716 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
4717                                          struct kvm_xsave *guest_xsave)
4718 {
4719         if (!vcpu->arch.guest_fpu)
4720                 return;
4721
4722         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4723                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
4724                 fill_xsave((u8 *) guest_xsave->region, vcpu);
4725         } else {
4726                 memcpy(guest_xsave->region,
4727                         &vcpu->arch.guest_fpu->state.fxsave,
4728                         sizeof(struct fxregs_state));
4729                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
4730                         XFEATURE_MASK_FPSSE;
4731         }
4732 }
4733
4734 #define XSAVE_MXCSR_OFFSET 24
4735
4736 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
4737                                         struct kvm_xsave *guest_xsave)
4738 {
4739         u64 xstate_bv;
4740         u32 mxcsr;
4741
4742         if (!vcpu->arch.guest_fpu)
4743                 return 0;
4744
4745         xstate_bv = *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
4746         mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
4747
4748         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4749                 /*
4750                  * Here we allow setting states that are not present in
4751                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
4752                  * with old userspace.
4753                  */
4754                 if (xstate_bv & ~supported_xcr0 || mxcsr & ~mxcsr_feature_mask)
4755                         return -EINVAL;
4756                 load_xsave(vcpu, (u8 *)guest_xsave->region);
4757         } else {
4758                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
4759                         mxcsr & ~mxcsr_feature_mask)
4760                         return -EINVAL;
4761                 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
4762                         guest_xsave->region, sizeof(struct fxregs_state));
4763         }
4764         return 0;
4765 }
4766
4767 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
4768                                         struct kvm_xcrs *guest_xcrs)
4769 {
4770         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
4771                 guest_xcrs->nr_xcrs = 0;
4772                 return;
4773         }
4774
4775         guest_xcrs->nr_xcrs = 1;
4776         guest_xcrs->flags = 0;
4777         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
4778         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
4779 }
4780
4781 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
4782                                        struct kvm_xcrs *guest_xcrs)
4783 {
4784         int i, r = 0;
4785
4786         if (!boot_cpu_has(X86_FEATURE_XSAVE))
4787                 return -EINVAL;
4788
4789         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
4790                 return -EINVAL;
4791
4792         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
4793                 /* Only support XCR0 currently */
4794                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
4795                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
4796                                 guest_xcrs->xcrs[i].value);
4797                         break;
4798                 }
4799         if (r)
4800                 r = -EINVAL;
4801         return r;
4802 }
4803
4804 /*
4805  * kvm_set_guest_paused() indicates to the guest kernel that it has been
4806  * stopped by the hypervisor.  This function will be called from the host only.
4807  * EINVAL is returned when the host attempts to set the flag for a guest that
4808  * does not support pv clocks.
4809  */
4810 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
4811 {
4812         if (!vcpu->arch.pv_time_enabled)
4813                 return -EINVAL;
4814         vcpu->arch.pvclock_set_guest_stopped_request = true;
4815         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4816         return 0;
4817 }
4818
4819 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
4820                                      struct kvm_enable_cap *cap)
4821 {
4822         int r;
4823         uint16_t vmcs_version;
4824         void __user *user_ptr;
4825
4826         if (cap->flags)
4827                 return -EINVAL;
4828
4829         switch (cap->cap) {
4830         case KVM_CAP_HYPERV_SYNIC2:
4831                 if (cap->args[0])
4832                         return -EINVAL;
4833                 fallthrough;
4834
4835         case KVM_CAP_HYPERV_SYNIC:
4836                 if (!irqchip_in_kernel(vcpu->kvm))
4837                         return -EINVAL;
4838                 return kvm_hv_activate_synic(vcpu, cap->cap ==
4839                                              KVM_CAP_HYPERV_SYNIC2);
4840         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4841                 if (!kvm_x86_ops.nested_ops->enable_evmcs)
4842                         return -ENOTTY;
4843                 r = kvm_x86_ops.nested_ops->enable_evmcs(vcpu, &vmcs_version);
4844                 if (!r) {
4845                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
4846                         if (copy_to_user(user_ptr, &vmcs_version,
4847                                          sizeof(vmcs_version)))
4848                                 r = -EFAULT;
4849                 }
4850                 return r;
4851         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4852                 if (!kvm_x86_ops.enable_direct_tlbflush)
4853                         return -ENOTTY;
4854
4855                 return static_call(kvm_x86_enable_direct_tlbflush)(vcpu);
4856
4857         case KVM_CAP_HYPERV_ENFORCE_CPUID:
4858                 return kvm_hv_set_enforce_cpuid(vcpu, cap->args[0]);
4859
4860         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4861                 vcpu->arch.pv_cpuid.enforce = cap->args[0];
4862                 if (vcpu->arch.pv_cpuid.enforce)
4863                         kvm_update_pv_runtime(vcpu);
4864
4865                 return 0;
4866         default:
4867                 return -EINVAL;
4868         }
4869 }
4870
4871 long kvm_arch_vcpu_ioctl(struct file *filp,
4872                          unsigned int ioctl, unsigned long arg)
4873 {
4874         struct kvm_vcpu *vcpu = filp->private_data;
4875         void __user *argp = (void __user *)arg;
4876         int r;
4877         union {
4878                 struct kvm_sregs2 *sregs2;
4879                 struct kvm_lapic_state *lapic;
4880                 struct kvm_xsave *xsave;
4881                 struct kvm_xcrs *xcrs;
4882                 void *buffer;
4883         } u;
4884
4885         vcpu_load(vcpu);
4886
4887         u.buffer = NULL;
4888         switch (ioctl) {
4889         case KVM_GET_LAPIC: {
4890                 r = -EINVAL;
4891                 if (!lapic_in_kernel(vcpu))
4892                         goto out;
4893                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
4894                                 GFP_KERNEL_ACCOUNT);
4895
4896                 r = -ENOMEM;
4897                 if (!u.lapic)
4898                         goto out;
4899                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
4900                 if (r)
4901                         goto out;
4902                 r = -EFAULT;
4903                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
4904                         goto out;
4905                 r = 0;
4906                 break;
4907         }
4908         case KVM_SET_LAPIC: {
4909                 r = -EINVAL;
4910                 if (!lapic_in_kernel(vcpu))
4911                         goto out;
4912                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
4913                 if (IS_ERR(u.lapic)) {
4914                         r = PTR_ERR(u.lapic);
4915                         goto out_nofree;
4916                 }
4917
4918                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
4919                 break;
4920         }
4921         case KVM_INTERRUPT: {
4922                 struct kvm_interrupt irq;
4923
4924                 r = -EFAULT;
4925                 if (copy_from_user(&irq, argp, sizeof(irq)))
4926                         goto out;
4927                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
4928                 break;
4929         }
4930         case KVM_NMI: {
4931                 r = kvm_vcpu_ioctl_nmi(vcpu);
4932                 break;
4933         }
4934         case KVM_SMI: {
4935                 r = kvm_vcpu_ioctl_smi(vcpu);
4936                 break;
4937         }
4938         case KVM_SET_CPUID: {
4939                 struct kvm_cpuid __user *cpuid_arg = argp;
4940                 struct kvm_cpuid cpuid;
4941
4942                 r = -EFAULT;
4943                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4944                         goto out;
4945                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4946                 break;
4947         }
4948         case KVM_SET_CPUID2: {
4949                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4950                 struct kvm_cpuid2 cpuid;
4951
4952                 r = -EFAULT;
4953                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4954                         goto out;
4955                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
4956                                               cpuid_arg->entries);
4957                 break;
4958         }
4959         case KVM_GET_CPUID2: {
4960                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4961                 struct kvm_cpuid2 cpuid;
4962
4963                 r = -EFAULT;
4964                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4965                         goto out;
4966                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
4967                                               cpuid_arg->entries);
4968                 if (r)
4969                         goto out;
4970                 r = -EFAULT;
4971                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4972                         goto out;
4973                 r = 0;
4974                 break;
4975         }
4976         case KVM_GET_MSRS: {
4977                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4978                 r = msr_io(vcpu, argp, do_get_msr, 1);
4979                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4980                 break;
4981         }
4982         case KVM_SET_MSRS: {
4983                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4984                 r = msr_io(vcpu, argp, do_set_msr, 0);
4985                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4986                 break;
4987         }
4988         case KVM_TPR_ACCESS_REPORTING: {
4989                 struct kvm_tpr_access_ctl tac;
4990
4991                 r = -EFAULT;
4992                 if (copy_from_user(&tac, argp, sizeof(tac)))
4993                         goto out;
4994                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
4995                 if (r)
4996                         goto out;
4997                 r = -EFAULT;
4998                 if (copy_to_user(argp, &tac, sizeof(tac)))
4999                         goto out;
5000                 r = 0;
5001                 break;
5002         };
5003         case KVM_SET_VAPIC_ADDR: {
5004                 struct kvm_vapic_addr va;
5005                 int idx;
5006
5007                 r = -EINVAL;
5008                 if (!lapic_in_kernel(vcpu))
5009                         goto out;
5010                 r = -EFAULT;
5011                 if (copy_from_user(&va, argp, sizeof(va)))
5012                         goto out;
5013                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5014                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
5015                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5016                 break;
5017         }
5018         case KVM_X86_SETUP_MCE: {
5019                 u64 mcg_cap;
5020
5021                 r = -EFAULT;
5022                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
5023                         goto out;
5024                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
5025                 break;
5026         }
5027         case KVM_X86_SET_MCE: {
5028                 struct kvm_x86_mce mce;
5029
5030                 r = -EFAULT;
5031                 if (copy_from_user(&mce, argp, sizeof(mce)))
5032                         goto out;
5033                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
5034                 break;
5035         }
5036         case KVM_GET_VCPU_EVENTS: {
5037                 struct kvm_vcpu_events events;
5038
5039                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
5040
5041                 r = -EFAULT;
5042                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
5043                         break;
5044                 r = 0;
5045                 break;
5046         }
5047         case KVM_SET_VCPU_EVENTS: {
5048                 struct kvm_vcpu_events events;
5049
5050                 r = -EFAULT;
5051                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
5052                         break;
5053
5054                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
5055                 break;
5056         }
5057         case KVM_GET_DEBUGREGS: {
5058                 struct kvm_debugregs dbgregs;
5059
5060                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
5061
5062                 r = -EFAULT;
5063                 if (copy_to_user(argp, &dbgregs,
5064                                  sizeof(struct kvm_debugregs)))
5065                         break;
5066                 r = 0;
5067                 break;
5068         }
5069         case KVM_SET_DEBUGREGS: {
5070                 struct kvm_debugregs dbgregs;
5071
5072                 r = -EFAULT;
5073                 if (copy_from_user(&dbgregs, argp,
5074                                    sizeof(struct kvm_debugregs)))
5075                         break;
5076
5077                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
5078                 break;
5079         }
5080         case KVM_GET_XSAVE: {
5081                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
5082                 r = -ENOMEM;
5083                 if (!u.xsave)
5084                         break;
5085
5086                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
5087
5088                 r = -EFAULT;
5089                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
5090                         break;
5091                 r = 0;
5092                 break;
5093         }
5094         case KVM_SET_XSAVE: {
5095                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
5096                 if (IS_ERR(u.xsave)) {
5097                         r = PTR_ERR(u.xsave);
5098                         goto out_nofree;
5099                 }
5100
5101                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
5102                 break;
5103         }
5104         case KVM_GET_XCRS: {
5105                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
5106                 r = -ENOMEM;
5107                 if (!u.xcrs)
5108                         break;
5109
5110                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
5111
5112                 r = -EFAULT;
5113                 if (copy_to_user(argp, u.xcrs,
5114                                  sizeof(struct kvm_xcrs)))
5115                         break;
5116                 r = 0;
5117                 break;
5118         }
5119         case KVM_SET_XCRS: {
5120                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
5121                 if (IS_ERR(u.xcrs)) {
5122                         r = PTR_ERR(u.xcrs);
5123                         goto out_nofree;
5124                 }
5125
5126                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
5127                 break;
5128         }
5129         case KVM_SET_TSC_KHZ: {
5130                 u32 user_tsc_khz;
5131
5132                 r = -EINVAL;
5133                 user_tsc_khz = (u32)arg;
5134
5135                 if (kvm_has_tsc_control &&
5136                     user_tsc_khz >= kvm_max_guest_tsc_khz)
5137                         goto out;
5138
5139                 if (user_tsc_khz == 0)
5140                         user_tsc_khz = tsc_khz;
5141
5142                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
5143                         r = 0;
5144
5145                 goto out;
5146         }
5147         case KVM_GET_TSC_KHZ: {
5148                 r = vcpu->arch.virtual_tsc_khz;
5149                 goto out;
5150         }
5151         case KVM_KVMCLOCK_CTRL: {
5152                 r = kvm_set_guest_paused(vcpu);
5153                 goto out;
5154         }
5155         case KVM_ENABLE_CAP: {
5156                 struct kvm_enable_cap cap;
5157
5158                 r = -EFAULT;
5159                 if (copy_from_user(&cap, argp, sizeof(cap)))
5160                         goto out;
5161                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
5162                 break;
5163         }
5164         case KVM_GET_NESTED_STATE: {
5165                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5166                 u32 user_data_size;
5167
5168                 r = -EINVAL;
5169                 if (!kvm_x86_ops.nested_ops->get_state)
5170                         break;
5171
5172                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
5173                 r = -EFAULT;
5174                 if (get_user(user_data_size, &user_kvm_nested_state->size))
5175                         break;
5176
5177                 r = kvm_x86_ops.nested_ops->get_state(vcpu, user_kvm_nested_state,
5178                                                      user_data_size);
5179                 if (r < 0)
5180                         break;
5181
5182                 if (r > user_data_size) {
5183                         if (put_user(r, &user_kvm_nested_state->size))
5184                                 r = -EFAULT;
5185                         else
5186                                 r = -E2BIG;
5187                         break;
5188                 }
5189
5190                 r = 0;
5191                 break;
5192         }
5193         case KVM_SET_NESTED_STATE: {
5194                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5195                 struct kvm_nested_state kvm_state;
5196                 int idx;
5197
5198                 r = -EINVAL;
5199                 if (!kvm_x86_ops.nested_ops->set_state)
5200                         break;
5201
5202                 r = -EFAULT;
5203                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
5204                         break;
5205
5206                 r = -EINVAL;
5207                 if (kvm_state.size < sizeof(kvm_state))
5208                         break;
5209
5210                 if (kvm_state.flags &
5211                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
5212                       | KVM_STATE_NESTED_EVMCS | KVM_STATE_NESTED_MTF_PENDING
5213                       | KVM_STATE_NESTED_GIF_SET))
5214                         break;
5215
5216                 /* nested_run_pending implies guest_mode.  */
5217                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
5218                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
5219                         break;
5220
5221                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5222                 r = kvm_x86_ops.nested_ops->set_state(vcpu, user_kvm_nested_state, &kvm_state);
5223                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5224                 break;
5225         }
5226         case KVM_GET_SUPPORTED_HV_CPUID:
5227                 r = kvm_ioctl_get_supported_hv_cpuid(vcpu, argp);
5228                 break;
5229 #ifdef CONFIG_KVM_XEN
5230         case KVM_XEN_VCPU_GET_ATTR: {
5231                 struct kvm_xen_vcpu_attr xva;
5232
5233                 r = -EFAULT;
5234                 if (copy_from_user(&xva, argp, sizeof(xva)))
5235                         goto out;
5236                 r = kvm_xen_vcpu_get_attr(vcpu, &xva);
5237                 if (!r && copy_to_user(argp, &xva, sizeof(xva)))
5238                         r = -EFAULT;
5239                 break;
5240         }
5241         case KVM_XEN_VCPU_SET_ATTR: {
5242                 struct kvm_xen_vcpu_attr xva;
5243
5244                 r = -EFAULT;
5245                 if (copy_from_user(&xva, argp, sizeof(xva)))
5246                         goto out;
5247                 r = kvm_xen_vcpu_set_attr(vcpu, &xva);
5248                 break;
5249         }
5250 #endif
5251         case KVM_GET_SREGS2: {
5252                 u.sregs2 = kzalloc(sizeof(struct kvm_sregs2), GFP_KERNEL);
5253                 r = -ENOMEM;
5254                 if (!u.sregs2)
5255                         goto out;
5256                 __get_sregs2(vcpu, u.sregs2);
5257                 r = -EFAULT;
5258                 if (copy_to_user(argp, u.sregs2, sizeof(struct kvm_sregs2)))
5259                         goto out;
5260                 r = 0;
5261                 break;
5262         }
5263         case KVM_SET_SREGS2: {
5264                 u.sregs2 = memdup_user(argp, sizeof(struct kvm_sregs2));
5265                 if (IS_ERR(u.sregs2)) {
5266                         r = PTR_ERR(u.sregs2);
5267                         u.sregs2 = NULL;
5268                         goto out;
5269                 }
5270                 r = __set_sregs2(vcpu, u.sregs2);
5271                 break;
5272         }
5273         default:
5274                 r = -EINVAL;
5275         }
5276 out:
5277         kfree(u.buffer);
5278 out_nofree:
5279         vcpu_put(vcpu);
5280         return r;
5281 }
5282
5283 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
5284 {
5285         return VM_FAULT_SIGBUS;
5286 }
5287
5288 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
5289 {
5290         int ret;
5291
5292         if (addr > (unsigned int)(-3 * PAGE_SIZE))
5293                 return -EINVAL;
5294         ret = static_call(kvm_x86_set_tss_addr)(kvm, addr);
5295         return ret;
5296 }
5297
5298 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
5299                                               u64 ident_addr)
5300 {
5301         return static_call(kvm_x86_set_identity_map_addr)(kvm, ident_addr);
5302 }
5303
5304 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
5305                                          unsigned long kvm_nr_mmu_pages)
5306 {
5307         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
5308                 return -EINVAL;
5309
5310         mutex_lock(&kvm->slots_lock);
5311
5312         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
5313         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
5314
5315         mutex_unlock(&kvm->slots_lock);
5316         return 0;
5317 }
5318
5319 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
5320 {
5321         return kvm->arch.n_max_mmu_pages;
5322 }
5323
5324 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5325 {
5326         struct kvm_pic *pic = kvm->arch.vpic;
5327         int r;
5328
5329         r = 0;
5330         switch (chip->chip_id) {
5331         case KVM_IRQCHIP_PIC_MASTER:
5332                 memcpy(&chip->chip.pic, &pic->pics[0],
5333                         sizeof(struct kvm_pic_state));
5334                 break;
5335         case KVM_IRQCHIP_PIC_SLAVE:
5336                 memcpy(&chip->chip.pic, &pic->pics[1],
5337                         sizeof(struct kvm_pic_state));
5338                 break;
5339         case KVM_IRQCHIP_IOAPIC:
5340                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
5341                 break;
5342         default:
5343                 r = -EINVAL;
5344                 break;
5345         }
5346         return r;
5347 }
5348
5349 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5350 {
5351         struct kvm_pic *pic = kvm->arch.vpic;
5352         int r;
5353
5354         r = 0;
5355         switch (chip->chip_id) {
5356         case KVM_IRQCHIP_PIC_MASTER:
5357                 spin_lock(&pic->lock);
5358                 memcpy(&pic->pics[0], &chip->chip.pic,
5359                         sizeof(struct kvm_pic_state));
5360                 spin_unlock(&pic->lock);
5361                 break;
5362         case KVM_IRQCHIP_PIC_SLAVE:
5363                 spin_lock(&pic->lock);
5364                 memcpy(&pic->pics[1], &chip->chip.pic,
5365                         sizeof(struct kvm_pic_state));
5366                 spin_unlock(&pic->lock);
5367                 break;
5368         case KVM_IRQCHIP_IOAPIC:
5369                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
5370                 break;
5371         default:
5372                 r = -EINVAL;
5373                 break;
5374         }
5375         kvm_pic_update_irq(pic);
5376         return r;
5377 }
5378
5379 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5380 {
5381         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
5382
5383         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
5384
5385         mutex_lock(&kps->lock);
5386         memcpy(ps, &kps->channels, sizeof(*ps));
5387         mutex_unlock(&kps->lock);
5388         return 0;
5389 }
5390
5391 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5392 {
5393         int i;
5394         struct kvm_pit *pit = kvm->arch.vpit;
5395
5396         mutex_lock(&pit->pit_state.lock);
5397         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
5398         for (i = 0; i < 3; i++)
5399                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
5400         mutex_unlock(&pit->pit_state.lock);
5401         return 0;
5402 }
5403
5404 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5405 {
5406         mutex_lock(&kvm->arch.vpit->pit_state.lock);
5407         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
5408                 sizeof(ps->channels));
5409         ps->flags = kvm->arch.vpit->pit_state.flags;
5410         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
5411         memset(&ps->reserved, 0, sizeof(ps->reserved));
5412         return 0;
5413 }
5414
5415 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5416 {
5417         int start = 0;
5418         int i;
5419         u32 prev_legacy, cur_legacy;
5420         struct kvm_pit *pit = kvm->arch.vpit;
5421
5422         mutex_lock(&pit->pit_state.lock);
5423         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
5424         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
5425         if (!prev_legacy && cur_legacy)
5426                 start = 1;
5427         memcpy(&pit->pit_state.channels, &ps->channels,
5428                sizeof(pit->pit_state.channels));
5429         pit->pit_state.flags = ps->flags;
5430         for (i = 0; i < 3; i++)
5431                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
5432                                    start && i == 0);
5433         mutex_unlock(&pit->pit_state.lock);
5434         return 0;
5435 }
5436
5437 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
5438                                  struct kvm_reinject_control *control)
5439 {
5440         struct kvm_pit *pit = kvm->arch.vpit;
5441
5442         /* pit->pit_state.lock was overloaded to prevent userspace from getting
5443          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5444          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
5445          */
5446         mutex_lock(&pit->pit_state.lock);
5447         kvm_pit_set_reinject(pit, control->pit_reinject);
5448         mutex_unlock(&pit->pit_state.lock);
5449
5450         return 0;
5451 }
5452
5453 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
5454 {
5455
5456         /*
5457          * Flush all CPUs' dirty log buffers to the  dirty_bitmap.  Called
5458          * before reporting dirty_bitmap to userspace.  KVM flushes the buffers
5459          * on all VM-Exits, thus we only need to kick running vCPUs to force a
5460          * VM-Exit.
5461          */
5462         struct kvm_vcpu *vcpu;
5463         int i;
5464
5465         kvm_for_each_vcpu(i, vcpu, kvm)
5466                 kvm_vcpu_kick(vcpu);
5467 }
5468
5469 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
5470                         bool line_status)
5471 {
5472         if (!irqchip_in_kernel(kvm))
5473                 return -ENXIO;
5474
5475         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
5476                                         irq_event->irq, irq_event->level,
5477                                         line_status);
5478         return 0;
5479 }
5480
5481 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
5482                             struct kvm_enable_cap *cap)
5483 {
5484         int r;
5485
5486         if (cap->flags)
5487                 return -EINVAL;
5488
5489         switch (cap->cap) {
5490         case KVM_CAP_DISABLE_QUIRKS:
5491                 kvm->arch.disabled_quirks = cap->args[0];
5492                 r = 0;
5493                 break;
5494         case KVM_CAP_SPLIT_IRQCHIP: {
5495                 mutex_lock(&kvm->lock);
5496                 r = -EINVAL;
5497                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
5498                         goto split_irqchip_unlock;
5499                 r = -EEXIST;
5500                 if (irqchip_in_kernel(kvm))
5501                         goto split_irqchip_unlock;
5502                 if (kvm->created_vcpus)
5503                         goto split_irqchip_unlock;
5504                 r = kvm_setup_empty_irq_routing(kvm);
5505                 if (r)
5506                         goto split_irqchip_unlock;
5507                 /* Pairs with irqchip_in_kernel. */
5508                 smp_wmb();
5509                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
5510                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
5511                 r = 0;
5512 split_irqchip_unlock:
5513                 mutex_unlock(&kvm->lock);
5514                 break;
5515         }
5516         case KVM_CAP_X2APIC_API:
5517                 r = -EINVAL;
5518                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
5519                         break;
5520
5521                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
5522                         kvm->arch.x2apic_format = true;
5523                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
5524                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
5525
5526                 r = 0;
5527                 break;
5528         case KVM_CAP_X86_DISABLE_EXITS:
5529                 r = -EINVAL;
5530                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
5531                         break;
5532
5533                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
5534                         kvm_can_mwait_in_guest())
5535                         kvm->arch.mwait_in_guest = true;
5536                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
5537                         kvm->arch.hlt_in_guest = true;
5538                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
5539                         kvm->arch.pause_in_guest = true;
5540                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
5541                         kvm->arch.cstate_in_guest = true;
5542                 r = 0;
5543                 break;
5544         case KVM_CAP_MSR_PLATFORM_INFO:
5545                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
5546                 r = 0;
5547                 break;
5548         case KVM_CAP_EXCEPTION_PAYLOAD:
5549                 kvm->arch.exception_payload_enabled = cap->args[0];
5550                 r = 0;
5551                 break;
5552         case KVM_CAP_X86_USER_SPACE_MSR:
5553                 kvm->arch.user_space_msr_mask = cap->args[0];
5554                 r = 0;
5555                 break;
5556         case KVM_CAP_X86_BUS_LOCK_EXIT:
5557                 r = -EINVAL;
5558                 if (cap->args[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE)
5559                         break;
5560
5561                 if ((cap->args[0] & KVM_BUS_LOCK_DETECTION_OFF) &&
5562                     (cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT))
5563                         break;
5564
5565                 if (kvm_has_bus_lock_exit &&
5566                     cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT)
5567                         kvm->arch.bus_lock_detection_enabled = true;
5568                 r = 0;
5569                 break;
5570 #ifdef CONFIG_X86_SGX_KVM
5571         case KVM_CAP_SGX_ATTRIBUTE: {
5572                 unsigned long allowed_attributes = 0;
5573
5574                 r = sgx_set_attribute(&allowed_attributes, cap->args[0]);
5575                 if (r)
5576                         break;
5577
5578                 /* KVM only supports the PROVISIONKEY privileged attribute. */
5579                 if ((allowed_attributes & SGX_ATTR_PROVISIONKEY) &&
5580                     !(allowed_attributes & ~SGX_ATTR_PROVISIONKEY))
5581                         kvm->arch.sgx_provisioning_allowed = true;
5582                 else
5583                         r = -EINVAL;
5584                 break;
5585         }
5586 #endif
5587         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
5588                 r = -EINVAL;
5589                 if (kvm_x86_ops.vm_copy_enc_context_from)
5590                         r = kvm_x86_ops.vm_copy_enc_context_from(kvm, cap->args[0]);
5591                 return r;
5592         default:
5593                 r = -EINVAL;
5594                 break;
5595         }
5596         return r;
5597 }
5598
5599 static struct kvm_x86_msr_filter *kvm_alloc_msr_filter(bool default_allow)
5600 {
5601         struct kvm_x86_msr_filter *msr_filter;
5602
5603         msr_filter = kzalloc(sizeof(*msr_filter), GFP_KERNEL_ACCOUNT);
5604         if (!msr_filter)
5605                 return NULL;
5606
5607         msr_filter->default_allow = default_allow;
5608         return msr_filter;
5609 }
5610
5611 static void kvm_free_msr_filter(struct kvm_x86_msr_filter *msr_filter)
5612 {
5613         u32 i;
5614
5615         if (!msr_filter)
5616                 return;
5617
5618         for (i = 0; i < msr_filter->count; i++)
5619                 kfree(msr_filter->ranges[i].bitmap);
5620
5621         kfree(msr_filter);
5622 }
5623
5624 static int kvm_add_msr_filter(struct kvm_x86_msr_filter *msr_filter,
5625                               struct kvm_msr_filter_range *user_range)
5626 {
5627         unsigned long *bitmap = NULL;
5628         size_t bitmap_size;
5629
5630         if (!user_range->nmsrs)
5631                 return 0;
5632
5633         if (user_range->flags & ~(KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE))
5634                 return -EINVAL;
5635
5636         if (!user_range->flags)
5637                 return -EINVAL;
5638
5639         bitmap_size = BITS_TO_LONGS(user_range->nmsrs) * sizeof(long);
5640         if (!bitmap_size || bitmap_size > KVM_MSR_FILTER_MAX_BITMAP_SIZE)
5641                 return -EINVAL;
5642
5643         bitmap = memdup_user((__user u8*)user_range->bitmap, bitmap_size);
5644         if (IS_ERR(bitmap))
5645                 return PTR_ERR(bitmap);
5646
5647         msr_filter->ranges[msr_filter->count] = (struct msr_bitmap_range) {
5648                 .flags = user_range->flags,
5649                 .base = user_range->base,
5650                 .nmsrs = user_range->nmsrs,
5651                 .bitmap = bitmap,
5652         };
5653
5654         msr_filter->count++;
5655         return 0;
5656 }
5657
5658 static int kvm_vm_ioctl_set_msr_filter(struct kvm *kvm, void __user *argp)
5659 {
5660         struct kvm_msr_filter __user *user_msr_filter = argp;
5661         struct kvm_x86_msr_filter *new_filter, *old_filter;
5662         struct kvm_msr_filter filter;
5663         bool default_allow;
5664         bool empty = true;
5665         int r = 0;
5666         u32 i;
5667
5668         if (copy_from_user(&filter, user_msr_filter, sizeof(filter)))
5669                 return -EFAULT;
5670
5671         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++)
5672                 empty &= !filter.ranges[i].nmsrs;
5673
5674         default_allow = !(filter.flags & KVM_MSR_FILTER_DEFAULT_DENY);
5675         if (empty && !default_allow)
5676                 return -EINVAL;
5677
5678         new_filter = kvm_alloc_msr_filter(default_allow);
5679         if (!new_filter)
5680                 return -ENOMEM;
5681
5682         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++) {
5683                 r = kvm_add_msr_filter(new_filter, &filter.ranges[i]);
5684                 if (r) {
5685                         kvm_free_msr_filter(new_filter);
5686                         return r;
5687                 }
5688         }
5689
5690         mutex_lock(&kvm->lock);
5691
5692         /* The per-VM filter is protected by kvm->lock... */
5693         old_filter = srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1);
5694
5695         rcu_assign_pointer(kvm->arch.msr_filter, new_filter);
5696         synchronize_srcu(&kvm->srcu);
5697
5698         kvm_free_msr_filter(old_filter);
5699
5700         kvm_make_all_cpus_request(kvm, KVM_REQ_MSR_FILTER_CHANGED);
5701         mutex_unlock(&kvm->lock);
5702
5703         return 0;
5704 }
5705
5706 #ifdef CONFIG_HAVE_KVM_PM_NOTIFIER
5707 static int kvm_arch_suspend_notifier(struct kvm *kvm)
5708 {
5709         struct kvm_vcpu *vcpu;
5710         int i, ret = 0;
5711
5712         mutex_lock(&kvm->lock);
5713         kvm_for_each_vcpu(i, vcpu, kvm) {
5714                 if (!vcpu->arch.pv_time_enabled)
5715                         continue;
5716
5717                 ret = kvm_set_guest_paused(vcpu);
5718                 if (ret) {
5719                         kvm_err("Failed to pause guest VCPU%d: %d\n",
5720                                 vcpu->vcpu_id, ret);
5721                         break;
5722                 }
5723         }
5724         mutex_unlock(&kvm->lock);
5725
5726         return ret ? NOTIFY_BAD : NOTIFY_DONE;
5727 }
5728
5729 int kvm_arch_pm_notifier(struct kvm *kvm, unsigned long state)
5730 {
5731         switch (state) {
5732         case PM_HIBERNATION_PREPARE:
5733         case PM_SUSPEND_PREPARE:
5734                 return kvm_arch_suspend_notifier(kvm);
5735         }
5736
5737         return NOTIFY_DONE;
5738 }
5739 #endif /* CONFIG_HAVE_KVM_PM_NOTIFIER */
5740
5741 long kvm_arch_vm_ioctl(struct file *filp,
5742                        unsigned int ioctl, unsigned long arg)
5743 {
5744         struct kvm *kvm = filp->private_data;
5745         void __user *argp = (void __user *)arg;
5746         int r = -ENOTTY;
5747         /*
5748          * This union makes it completely explicit to gcc-3.x
5749          * that these two variables' stack usage should be
5750          * combined, not added together.
5751          */
5752         union {
5753                 struct kvm_pit_state ps;
5754                 struct kvm_pit_state2 ps2;
5755                 struct kvm_pit_config pit_config;
5756         } u;
5757
5758         switch (ioctl) {
5759         case KVM_SET_TSS_ADDR:
5760                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
5761                 break;
5762         case KVM_SET_IDENTITY_MAP_ADDR: {
5763                 u64 ident_addr;
5764
5765                 mutex_lock(&kvm->lock);
5766                 r = -EINVAL;
5767                 if (kvm->created_vcpus)
5768                         goto set_identity_unlock;
5769                 r = -EFAULT;
5770                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
5771                         goto set_identity_unlock;
5772                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
5773 set_identity_unlock:
5774                 mutex_unlock(&kvm->lock);
5775                 break;
5776         }
5777         case KVM_SET_NR_MMU_PAGES:
5778                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
5779                 break;
5780         case KVM_GET_NR_MMU_PAGES:
5781                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
5782                 break;
5783         case KVM_CREATE_IRQCHIP: {
5784                 mutex_lock(&kvm->lock);
5785
5786                 r = -EEXIST;
5787                 if (irqchip_in_kernel(kvm))
5788                         goto create_irqchip_unlock;
5789
5790                 r = -EINVAL;
5791                 if (kvm->created_vcpus)
5792                         goto create_irqchip_unlock;
5793
5794                 r = kvm_pic_init(kvm);
5795                 if (r)
5796                         goto create_irqchip_unlock;
5797
5798                 r = kvm_ioapic_init(kvm);
5799                 if (r) {
5800                         kvm_pic_destroy(kvm);
5801                         goto create_irqchip_unlock;
5802                 }
5803
5804                 r = kvm_setup_default_irq_routing(kvm);
5805                 if (r) {
5806                         kvm_ioapic_destroy(kvm);
5807                         kvm_pic_destroy(kvm);
5808                         goto create_irqchip_unlock;
5809                 }
5810                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
5811                 smp_wmb();
5812                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
5813         create_irqchip_unlock:
5814                 mutex_unlock(&kvm->lock);
5815                 break;
5816         }
5817         case KVM_CREATE_PIT:
5818                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
5819                 goto create_pit;
5820         case KVM_CREATE_PIT2:
5821                 r = -EFAULT;
5822                 if (copy_from_user(&u.pit_config, argp,
5823                                    sizeof(struct kvm_pit_config)))
5824                         goto out;
5825         create_pit:
5826                 mutex_lock(&kvm->lock);
5827                 r = -EEXIST;
5828                 if (kvm->arch.vpit)
5829                         goto create_pit_unlock;
5830                 r = -ENOMEM;
5831                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
5832                 if (kvm->arch.vpit)
5833                         r = 0;
5834         create_pit_unlock:
5835                 mutex_unlock(&kvm->lock);
5836                 break;
5837         case KVM_GET_IRQCHIP: {
5838                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5839                 struct kvm_irqchip *chip;
5840
5841                 chip = memdup_user(argp, sizeof(*chip));
5842                 if (IS_ERR(chip)) {
5843                         r = PTR_ERR(chip);
5844                         goto out;
5845                 }
5846
5847                 r = -ENXIO;
5848                 if (!irqchip_kernel(kvm))
5849                         goto get_irqchip_out;
5850                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
5851                 if (r)
5852                         goto get_irqchip_out;
5853                 r = -EFAULT;
5854                 if (copy_to_user(argp, chip, sizeof(*chip)))
5855                         goto get_irqchip_out;
5856                 r = 0;
5857         get_irqchip_out:
5858                 kfree(chip);
5859                 break;
5860         }
5861         case KVM_SET_IRQCHIP: {
5862                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5863                 struct kvm_irqchip *chip;
5864
5865                 chip = memdup_user(argp, sizeof(*chip));
5866                 if (IS_ERR(chip)) {
5867                         r = PTR_ERR(chip);
5868                         goto out;
5869                 }
5870
5871                 r = -ENXIO;
5872                 if (!irqchip_kernel(kvm))
5873                         goto set_irqchip_out;
5874                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
5875         set_irqchip_out:
5876                 kfree(chip);
5877                 break;
5878         }
5879         case KVM_GET_PIT: {
5880                 r = -EFAULT;
5881                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
5882                         goto out;
5883                 r = -ENXIO;
5884                 if (!kvm->arch.vpit)
5885                         goto out;
5886                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
5887                 if (r)
5888                         goto out;
5889                 r = -EFAULT;
5890                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
5891                         goto out;
5892                 r = 0;
5893                 break;
5894         }
5895         case KVM_SET_PIT: {
5896                 r = -EFAULT;
5897                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
5898                         goto out;
5899                 mutex_lock(&kvm->lock);
5900                 r = -ENXIO;
5901                 if (!kvm->arch.vpit)
5902                         goto set_pit_out;
5903                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
5904 set_pit_out:
5905                 mutex_unlock(&kvm->lock);
5906                 break;
5907         }
5908         case KVM_GET_PIT2: {
5909                 r = -ENXIO;
5910                 if (!kvm->arch.vpit)
5911                         goto out;
5912                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
5913                 if (r)
5914                         goto out;
5915                 r = -EFAULT;
5916                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
5917                         goto out;
5918                 r = 0;
5919                 break;
5920         }
5921         case KVM_SET_PIT2: {
5922                 r = -EFAULT;
5923                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
5924                         goto out;
5925                 mutex_lock(&kvm->lock);
5926                 r = -ENXIO;
5927                 if (!kvm->arch.vpit)
5928                         goto set_pit2_out;
5929                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
5930 set_pit2_out:
5931                 mutex_unlock(&kvm->lock);
5932                 break;
5933         }
5934         case KVM_REINJECT_CONTROL: {
5935                 struct kvm_reinject_control control;
5936                 r =  -EFAULT;
5937                 if (copy_from_user(&control, argp, sizeof(control)))
5938                         goto out;
5939                 r = -ENXIO;
5940                 if (!kvm->arch.vpit)
5941                         goto out;
5942                 r = kvm_vm_ioctl_reinject(kvm, &control);
5943                 break;
5944         }
5945         case KVM_SET_BOOT_CPU_ID:
5946                 r = 0;
5947                 mutex_lock(&kvm->lock);
5948                 if (kvm->created_vcpus)
5949                         r = -EBUSY;
5950                 else
5951                         kvm->arch.bsp_vcpu_id = arg;
5952                 mutex_unlock(&kvm->lock);
5953                 break;
5954 #ifdef CONFIG_KVM_XEN
5955         case KVM_XEN_HVM_CONFIG: {
5956                 struct kvm_xen_hvm_config xhc;
5957                 r = -EFAULT;
5958                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
5959                         goto out;
5960                 r = kvm_xen_hvm_config(kvm, &xhc);
5961                 break;
5962         }
5963         case KVM_XEN_HVM_GET_ATTR: {
5964                 struct kvm_xen_hvm_attr xha;
5965
5966                 r = -EFAULT;
5967                 if (copy_from_user(&xha, argp, sizeof(xha)))
5968                         goto out;
5969                 r = kvm_xen_hvm_get_attr(kvm, &xha);
5970                 if (!r && copy_to_user(argp, &xha, sizeof(xha)))
5971                         r = -EFAULT;
5972                 break;
5973         }
5974         case KVM_XEN_HVM_SET_ATTR: {
5975                 struct kvm_xen_hvm_attr xha;
5976
5977                 r = -EFAULT;
5978                 if (copy_from_user(&xha, argp, sizeof(xha)))
5979                         goto out;
5980                 r = kvm_xen_hvm_set_attr(kvm, &xha);
5981                 break;
5982         }
5983 #endif
5984         case KVM_SET_CLOCK: {
5985                 struct kvm_arch *ka = &kvm->arch;
5986                 struct kvm_clock_data user_ns;
5987                 u64 now_ns;
5988
5989                 r = -EFAULT;
5990                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
5991                         goto out;
5992
5993                 r = -EINVAL;
5994                 if (user_ns.flags)
5995                         goto out;
5996
5997                 r = 0;
5998                 /*
5999                  * TODO: userspace has to take care of races with VCPU_RUN, so
6000                  * kvm_gen_update_masterclock() can be cut down to locked
6001                  * pvclock_update_vm_gtod_copy().
6002                  */
6003                 kvm_gen_update_masterclock(kvm);
6004
6005                 /*
6006                  * This pairs with kvm_guest_time_update(): when masterclock is
6007                  * in use, we use master_kernel_ns + kvmclock_offset to set
6008                  * unsigned 'system_time' so if we use get_kvmclock_ns() (which
6009                  * is slightly ahead) here we risk going negative on unsigned
6010                  * 'system_time' when 'user_ns.clock' is very small.
6011                  */
6012                 spin_lock_irq(&ka->pvclock_gtod_sync_lock);
6013                 if (kvm->arch.use_master_clock)
6014                         now_ns = ka->master_kernel_ns;
6015                 else
6016                         now_ns = get_kvmclock_base_ns();
6017                 ka->kvmclock_offset = user_ns.clock - now_ns;
6018                 spin_unlock_irq(&ka->pvclock_gtod_sync_lock);
6019
6020                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
6021                 break;
6022         }
6023         case KVM_GET_CLOCK: {
6024                 struct kvm_clock_data user_ns;
6025                 u64 now_ns;
6026
6027                 now_ns = get_kvmclock_ns(kvm);
6028                 user_ns.clock = now_ns;
6029                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
6030                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
6031
6032                 r = -EFAULT;
6033                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
6034                         goto out;
6035                 r = 0;
6036                 break;
6037         }
6038         case KVM_MEMORY_ENCRYPT_OP: {
6039                 r = -ENOTTY;
6040                 if (kvm_x86_ops.mem_enc_op)
6041                         r = static_call(kvm_x86_mem_enc_op)(kvm, argp);
6042                 break;
6043         }
6044         case KVM_MEMORY_ENCRYPT_REG_REGION: {
6045                 struct kvm_enc_region region;
6046
6047                 r = -EFAULT;
6048                 if (copy_from_user(&region, argp, sizeof(region)))
6049                         goto out;
6050
6051                 r = -ENOTTY;
6052                 if (kvm_x86_ops.mem_enc_reg_region)
6053                         r = static_call(kvm_x86_mem_enc_reg_region)(kvm, &region);
6054                 break;
6055         }
6056         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
6057                 struct kvm_enc_region region;
6058
6059                 r = -EFAULT;
6060                 if (copy_from_user(&region, argp, sizeof(region)))
6061                         goto out;
6062
6063                 r = -ENOTTY;
6064                 if (kvm_x86_ops.mem_enc_unreg_region)
6065                         r = static_call(kvm_x86_mem_enc_unreg_region)(kvm, &region);
6066                 break;
6067         }
6068         case KVM_HYPERV_EVENTFD: {
6069                 struct kvm_hyperv_eventfd hvevfd;
6070
6071                 r = -EFAULT;
6072                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
6073                         goto out;
6074                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
6075                 break;
6076         }
6077         case KVM_SET_PMU_EVENT_FILTER:
6078                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
6079                 break;
6080         case KVM_X86_SET_MSR_FILTER:
6081                 r = kvm_vm_ioctl_set_msr_filter(kvm, argp);
6082                 break;
6083         default:
6084                 r = -ENOTTY;
6085         }
6086 out:
6087         return r;
6088 }
6089
6090 static void kvm_init_msr_list(void)
6091 {
6092         struct x86_pmu_capability x86_pmu;
6093         u32 dummy[2];
6094         unsigned i;
6095
6096         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
6097                          "Please update the fixed PMCs in msrs_to_saved_all[]");
6098
6099         perf_get_x86_pmu_capability(&x86_pmu);
6100
6101         num_msrs_to_save = 0;
6102         num_emulated_msrs = 0;
6103         num_msr_based_features = 0;
6104
6105         for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
6106                 if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
6107                         continue;
6108
6109                 /*
6110                  * Even MSRs that are valid in the host may not be exposed
6111                  * to the guests in some cases.
6112                  */
6113                 switch (msrs_to_save_all[i]) {
6114                 case MSR_IA32_BNDCFGS:
6115                         if (!kvm_mpx_supported())
6116                                 continue;
6117                         break;
6118                 case MSR_TSC_AUX:
6119                         if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP) &&
6120                             !kvm_cpu_cap_has(X86_FEATURE_RDPID))
6121                                 continue;
6122                         break;
6123                 case MSR_IA32_UMWAIT_CONTROL:
6124                         if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG))
6125                                 continue;
6126                         break;
6127                 case MSR_IA32_RTIT_CTL:
6128                 case MSR_IA32_RTIT_STATUS:
6129                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT))
6130                                 continue;
6131                         break;
6132                 case MSR_IA32_RTIT_CR3_MATCH:
6133                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6134                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
6135                                 continue;
6136                         break;
6137                 case MSR_IA32_RTIT_OUTPUT_BASE:
6138                 case MSR_IA32_RTIT_OUTPUT_MASK:
6139                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6140                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
6141                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
6142                                 continue;
6143                         break;
6144                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
6145                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6146                                 msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
6147                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
6148                                 continue;
6149                         break;
6150                 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
6151                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
6152                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6153                                 continue;
6154                         break;
6155                 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
6156                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
6157                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6158                                 continue;
6159                         break;
6160                 default:
6161                         break;
6162                 }
6163
6164                 msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
6165         }
6166
6167         for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
6168                 if (!static_call(kvm_x86_has_emulated_msr)(NULL, emulated_msrs_all[i]))
6169                         continue;
6170
6171                 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
6172         }
6173
6174         for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
6175                 struct kvm_msr_entry msr;
6176
6177                 msr.index = msr_based_features_all[i];
6178                 if (kvm_get_msr_feature(&msr))
6179                         continue;
6180
6181                 msr_based_features[num_msr_based_features++] = msr_based_features_all[i];
6182         }
6183 }
6184
6185 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
6186                            const void *v)
6187 {
6188         int handled = 0;
6189         int n;
6190
6191         do {
6192                 n = min(len, 8);
6193                 if (!(lapic_in_kernel(vcpu) &&
6194                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
6195                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
6196                         break;
6197                 handled += n;
6198                 addr += n;
6199                 len -= n;
6200                 v += n;
6201         } while (len);
6202
6203         return handled;
6204 }
6205
6206 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
6207 {
6208         int handled = 0;
6209         int n;
6210
6211         do {
6212                 n = min(len, 8);
6213                 if (!(lapic_in_kernel(vcpu) &&
6214                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
6215                                          addr, n, v))
6216                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
6217                         break;
6218                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
6219                 handled += n;
6220                 addr += n;
6221                 len -= n;
6222                 v += n;
6223         } while (len);
6224
6225         return handled;
6226 }
6227
6228 static void kvm_set_segment(struct kvm_vcpu *vcpu,
6229                         struct kvm_segment *var, int seg)
6230 {
6231         static_call(kvm_x86_set_segment)(vcpu, var, seg);
6232 }
6233
6234 void kvm_get_segment(struct kvm_vcpu *vcpu,
6235                      struct kvm_segment *var, int seg)
6236 {
6237         static_call(kvm_x86_get_segment)(vcpu, var, seg);
6238 }
6239
6240 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
6241                            struct x86_exception *exception)
6242 {
6243         gpa_t t_gpa;
6244
6245         BUG_ON(!mmu_is_nested(vcpu));
6246
6247         /* NPT walks are always user-walks */
6248         access |= PFERR_USER_MASK;
6249         t_gpa  = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
6250
6251         return t_gpa;
6252 }
6253
6254 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
6255                               struct x86_exception *exception)
6256 {
6257         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6258         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6259 }
6260 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_read);
6261
6262  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
6263                                 struct x86_exception *exception)
6264 {
6265         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6266         access |= PFERR_FETCH_MASK;
6267         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6268 }
6269
6270 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
6271                                struct x86_exception *exception)
6272 {
6273         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6274         access |= PFERR_WRITE_MASK;
6275         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6276 }
6277 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_write);
6278
6279 /* uses this to access any guest's mapped memory without checking CPL */
6280 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
6281                                 struct x86_exception *exception)
6282 {
6283         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
6284 }
6285
6286 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6287                                       struct kvm_vcpu *vcpu, u32 access,
6288                                       struct x86_exception *exception)
6289 {
6290         void *data = val;
6291         int r = X86EMUL_CONTINUE;
6292
6293         while (bytes) {
6294                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
6295                                                             exception);
6296                 unsigned offset = addr & (PAGE_SIZE-1);
6297                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
6298                 int ret;
6299
6300                 if (gpa == UNMAPPED_GVA)
6301                         return X86EMUL_PROPAGATE_FAULT;
6302                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
6303                                                offset, toread);
6304                 if (ret < 0) {
6305                         r = X86EMUL_IO_NEEDED;
6306                         goto out;
6307                 }
6308
6309                 bytes -= toread;
6310                 data += toread;
6311                 addr += toread;
6312         }
6313 out:
6314         return r;
6315 }
6316
6317 /* used for instruction fetching */
6318 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
6319                                 gva_t addr, void *val, unsigned int bytes,
6320                                 struct x86_exception *exception)
6321 {
6322         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6323         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6324         unsigned offset;
6325         int ret;
6326
6327         /* Inline kvm_read_guest_virt_helper for speed.  */
6328         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
6329                                                     exception);
6330         if (unlikely(gpa == UNMAPPED_GVA))
6331                 return X86EMUL_PROPAGATE_FAULT;
6332
6333         offset = addr & (PAGE_SIZE-1);
6334         if (WARN_ON(offset + bytes > PAGE_SIZE))
6335                 bytes = (unsigned)PAGE_SIZE - offset;
6336         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
6337                                        offset, bytes);
6338         if (unlikely(ret < 0))
6339                 return X86EMUL_IO_NEEDED;
6340
6341         return X86EMUL_CONTINUE;
6342 }
6343
6344 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
6345                                gva_t addr, void *val, unsigned int bytes,
6346                                struct x86_exception *exception)
6347 {
6348         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6349
6350         /*
6351          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
6352          * is returned, but our callers are not ready for that and they blindly
6353          * call kvm_inject_page_fault.  Ensure that they at least do not leak
6354          * uninitialized kernel stack memory into cr2 and error code.
6355          */
6356         memset(exception, 0, sizeof(*exception));
6357         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
6358                                           exception);
6359 }
6360 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
6361
6362 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
6363                              gva_t addr, void *val, unsigned int bytes,
6364                              struct x86_exception *exception, bool system)
6365 {
6366         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6367         u32 access = 0;
6368
6369         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6370                 access |= PFERR_USER_MASK;
6371
6372         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
6373 }
6374
6375 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
6376                 unsigned long addr, void *val, unsigned int bytes)
6377 {
6378         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6379         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
6380
6381         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
6382 }
6383
6384 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6385                                       struct kvm_vcpu *vcpu, u32 access,
6386                                       struct x86_exception *exception)
6387 {
6388         void *data = val;
6389         int r = X86EMUL_CONTINUE;
6390
6391         while (bytes) {
6392                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
6393                                                              access,
6394                                                              exception);
6395                 unsigned offset = addr & (PAGE_SIZE-1);
6396                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
6397                 int ret;
6398
6399                 if (gpa == UNMAPPED_GVA)
6400                         return X86EMUL_PROPAGATE_FAULT;
6401                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
6402                 if (ret < 0) {
6403                         r = X86EMUL_IO_NEEDED;
6404                         goto out;
6405                 }
6406
6407                 bytes -= towrite;
6408                 data += towrite;
6409                 addr += towrite;
6410         }
6411 out:
6412         return r;
6413 }
6414
6415 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
6416                               unsigned int bytes, struct x86_exception *exception,
6417                               bool system)
6418 {
6419         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6420         u32 access = PFERR_WRITE_MASK;
6421
6422         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6423                 access |= PFERR_USER_MASK;
6424
6425         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6426                                            access, exception);
6427 }
6428
6429 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
6430                                 unsigned int bytes, struct x86_exception *exception)
6431 {
6432         /* kvm_write_guest_virt_system can pull in tons of pages. */
6433         vcpu->arch.l1tf_flush_l1d = true;
6434
6435         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6436                                            PFERR_WRITE_MASK, exception);
6437 }
6438 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
6439
6440 int handle_ud(struct kvm_vcpu *vcpu)
6441 {
6442         static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
6443         int emul_type = EMULTYPE_TRAP_UD;
6444         char sig[5]; /* ud2; .ascii "kvm" */
6445         struct x86_exception e;
6446
6447         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, NULL, 0)))
6448                 return 1;
6449
6450         if (force_emulation_prefix &&
6451             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
6452                                 sig, sizeof(sig), &e) == 0 &&
6453             memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
6454                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
6455                 emul_type = EMULTYPE_TRAP_UD_FORCED;
6456         }
6457
6458         return kvm_emulate_instruction(vcpu, emul_type);
6459 }
6460 EXPORT_SYMBOL_GPL(handle_ud);
6461
6462 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6463                             gpa_t gpa, bool write)
6464 {
6465         /* For APIC access vmexit */
6466         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6467                 return 1;
6468
6469         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
6470                 trace_vcpu_match_mmio(gva, gpa, write, true);
6471                 return 1;
6472         }
6473
6474         return 0;
6475 }
6476
6477 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6478                                 gpa_t *gpa, struct x86_exception *exception,
6479                                 bool write)
6480 {
6481         u32 access = ((static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0)
6482                 | (write ? PFERR_WRITE_MASK : 0);
6483
6484         /*
6485          * currently PKRU is only applied to ept enabled guest so
6486          * there is no pkey in EPT page table for L1 guest or EPT
6487          * shadow page table for L2 guest.
6488          */
6489         if (vcpu_match_mmio_gva(vcpu, gva)
6490             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
6491                                  vcpu->arch.mmio_access, 0, access)) {
6492                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
6493                                         (gva & (PAGE_SIZE - 1));
6494                 trace_vcpu_match_mmio(gva, *gpa, write, false);
6495                 return 1;
6496         }
6497
6498         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6499
6500         if (*gpa == UNMAPPED_GVA)
6501                 return -1;
6502
6503         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
6504 }
6505
6506 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
6507                         const void *val, int bytes)
6508 {
6509         int ret;
6510
6511         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
6512         if (ret < 0)
6513                 return 0;
6514         kvm_page_track_write(vcpu, gpa, val, bytes);
6515         return 1;
6516 }
6517
6518 struct read_write_emulator_ops {
6519         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
6520                                   int bytes);
6521         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
6522                                   void *val, int bytes);
6523         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6524                                int bytes, void *val);
6525         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6526                                     void *val, int bytes);
6527         bool write;
6528 };
6529
6530 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
6531 {
6532         if (vcpu->mmio_read_completed) {
6533                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
6534                                vcpu->mmio_fragments[0].gpa, val);
6535                 vcpu->mmio_read_completed = 0;
6536                 return 1;
6537         }
6538
6539         return 0;
6540 }
6541
6542 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6543                         void *val, int bytes)
6544 {
6545         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
6546 }
6547
6548 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6549                          void *val, int bytes)
6550 {
6551         return emulator_write_phys(vcpu, gpa, val, bytes);
6552 }
6553
6554 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
6555 {
6556         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
6557         return vcpu_mmio_write(vcpu, gpa, bytes, val);
6558 }
6559
6560 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6561                           void *val, int bytes)
6562 {
6563         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
6564         return X86EMUL_IO_NEEDED;
6565 }
6566
6567 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6568                            void *val, int bytes)
6569 {
6570         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
6571
6572         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
6573         return X86EMUL_CONTINUE;
6574 }
6575
6576 static const struct read_write_emulator_ops read_emultor = {
6577         .read_write_prepare = read_prepare,
6578         .read_write_emulate = read_emulate,
6579         .read_write_mmio = vcpu_mmio_read,
6580         .read_write_exit_mmio = read_exit_mmio,
6581 };
6582
6583 static const struct read_write_emulator_ops write_emultor = {
6584         .read_write_emulate = write_emulate,
6585         .read_write_mmio = write_mmio,
6586         .read_write_exit_mmio = write_exit_mmio,
6587         .write = true,
6588 };
6589
6590 static int emulator_read_write_onepage(unsigned long addr, void *val,
6591                                        unsigned int bytes,
6592                                        struct x86_exception *exception,
6593                                        struct kvm_vcpu *vcpu,
6594                                        const struct read_write_emulator_ops *ops)
6595 {
6596         gpa_t gpa;
6597         int handled, ret;
6598         bool write = ops->write;
6599         struct kvm_mmio_fragment *frag;
6600         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6601
6602         /*
6603          * If the exit was due to a NPF we may already have a GPA.
6604          * If the GPA is present, use it to avoid the GVA to GPA table walk.
6605          * Note, this cannot be used on string operations since string
6606          * operation using rep will only have the initial GPA from the NPF
6607          * occurred.
6608          */
6609         if (ctxt->gpa_available && emulator_can_use_gpa(ctxt) &&
6610             (addr & ~PAGE_MASK) == (ctxt->gpa_val & ~PAGE_MASK)) {
6611                 gpa = ctxt->gpa_val;
6612                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
6613         } else {
6614                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
6615                 if (ret < 0)
6616                         return X86EMUL_PROPAGATE_FAULT;
6617         }
6618
6619         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
6620                 return X86EMUL_CONTINUE;
6621
6622         /*
6623          * Is this MMIO handled locally?
6624          */
6625         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
6626         if (handled == bytes)
6627                 return X86EMUL_CONTINUE;
6628
6629         gpa += handled;
6630         bytes -= handled;
6631         val += handled;
6632
6633         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
6634         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
6635         frag->gpa = gpa;
6636         frag->data = val;
6637         frag->len = bytes;
6638         return X86EMUL_CONTINUE;
6639 }
6640
6641 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
6642                         unsigned long addr,
6643                         void *val, unsigned int bytes,
6644                         struct x86_exception *exception,
6645                         const struct read_write_emulator_ops *ops)
6646 {
6647         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6648         gpa_t gpa;
6649         int rc;
6650
6651         if (ops->read_write_prepare &&
6652                   ops->read_write_prepare(vcpu, val, bytes))
6653                 return X86EMUL_CONTINUE;
6654
6655         vcpu->mmio_nr_fragments = 0;
6656
6657         /* Crossing a page boundary? */
6658         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
6659                 int now;
6660
6661                 now = -addr & ~PAGE_MASK;
6662                 rc = emulator_read_write_onepage(addr, val, now, exception,
6663                                                  vcpu, ops);
6664
6665                 if (rc != X86EMUL_CONTINUE)
6666                         return rc;
6667                 addr += now;
6668                 if (ctxt->mode != X86EMUL_MODE_PROT64)
6669                         addr = (u32)addr;
6670                 val += now;
6671                 bytes -= now;
6672         }
6673
6674         rc = emulator_read_write_onepage(addr, val, bytes, exception,
6675                                          vcpu, ops);
6676         if (rc != X86EMUL_CONTINUE)
6677                 return rc;
6678
6679         if (!vcpu->mmio_nr_fragments)
6680                 return rc;
6681
6682         gpa = vcpu->mmio_fragments[0].gpa;
6683
6684         vcpu->mmio_needed = 1;
6685         vcpu->mmio_cur_fragment = 0;
6686
6687         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
6688         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
6689         vcpu->run->exit_reason = KVM_EXIT_MMIO;
6690         vcpu->run->mmio.phys_addr = gpa;
6691
6692         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
6693 }
6694
6695 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
6696                                   unsigned long addr,
6697                                   void *val,
6698                                   unsigned int bytes,
6699                                   struct x86_exception *exception)
6700 {
6701         return emulator_read_write(ctxt, addr, val, bytes,
6702                                    exception, &read_emultor);
6703 }
6704
6705 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
6706                             unsigned long addr,
6707                             const void *val,
6708                             unsigned int bytes,
6709                             struct x86_exception *exception)
6710 {
6711         return emulator_read_write(ctxt, addr, (void *)val, bytes,
6712                                    exception, &write_emultor);
6713 }
6714
6715 #define CMPXCHG_TYPE(t, ptr, old, new) \
6716         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
6717
6718 #ifdef CONFIG_X86_64
6719 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
6720 #else
6721 #  define CMPXCHG64(ptr, old, new) \
6722         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
6723 #endif
6724
6725 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
6726                                      unsigned long addr,
6727                                      const void *old,
6728                                      const void *new,
6729                                      unsigned int bytes,
6730                                      struct x86_exception *exception)
6731 {
6732         struct kvm_host_map map;
6733         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6734         u64 page_line_mask;
6735         gpa_t gpa;
6736         char *kaddr;
6737         bool exchanged;
6738
6739         /* guests cmpxchg8b have to be emulated atomically */
6740         if (bytes > 8 || (bytes & (bytes - 1)))
6741                 goto emul_write;
6742
6743         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
6744
6745         if (gpa == UNMAPPED_GVA ||
6746             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6747                 goto emul_write;
6748
6749         /*
6750          * Emulate the atomic as a straight write to avoid #AC if SLD is
6751          * enabled in the host and the access splits a cache line.
6752          */
6753         if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))
6754                 page_line_mask = ~(cache_line_size() - 1);
6755         else
6756                 page_line_mask = PAGE_MASK;
6757
6758         if (((gpa + bytes - 1) & page_line_mask) != (gpa & page_line_mask))
6759                 goto emul_write;
6760
6761         if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
6762                 goto emul_write;
6763
6764         kaddr = map.hva + offset_in_page(gpa);
6765
6766         switch (bytes) {
6767         case 1:
6768                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
6769                 break;
6770         case 2:
6771                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
6772                 break;
6773         case 4:
6774                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
6775                 break;
6776         case 8:
6777                 exchanged = CMPXCHG64(kaddr, old, new);
6778                 break;
6779         default:
6780                 BUG();
6781         }
6782
6783         kvm_vcpu_unmap(vcpu, &map, true);
6784
6785         if (!exchanged)
6786                 return X86EMUL_CMPXCHG_FAILED;
6787
6788         kvm_page_track_write(vcpu, gpa, new, bytes);
6789
6790         return X86EMUL_CONTINUE;
6791
6792 emul_write:
6793         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
6794
6795         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
6796 }
6797
6798 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
6799 {
6800         int r = 0, i;
6801
6802         for (i = 0; i < vcpu->arch.pio.count; i++) {
6803                 if (vcpu->arch.pio.in)
6804                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
6805                                             vcpu->arch.pio.size, pd);
6806                 else
6807                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
6808                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
6809                                              pd);
6810                 if (r)
6811                         break;
6812                 pd += vcpu->arch.pio.size;
6813         }
6814         return r;
6815 }
6816
6817 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
6818                                unsigned short port, void *val,
6819                                unsigned int count, bool in)
6820 {
6821         vcpu->arch.pio.port = port;
6822         vcpu->arch.pio.in = in;
6823         vcpu->arch.pio.count  = count;
6824         vcpu->arch.pio.size = size;
6825
6826         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
6827                 vcpu->arch.pio.count = 0;
6828                 return 1;
6829         }
6830
6831         vcpu->run->exit_reason = KVM_EXIT_IO;
6832         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
6833         vcpu->run->io.size = size;
6834         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
6835         vcpu->run->io.count = count;
6836         vcpu->run->io.port = port;
6837
6838         return 0;
6839 }
6840
6841 static int emulator_pio_in(struct kvm_vcpu *vcpu, int size,
6842                            unsigned short port, void *val, unsigned int count)
6843 {
6844         int ret;
6845
6846         if (vcpu->arch.pio.count)
6847                 goto data_avail;
6848
6849         memset(vcpu->arch.pio_data, 0, size * count);
6850
6851         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
6852         if (ret) {
6853 data_avail:
6854                 memcpy(val, vcpu->arch.pio_data, size * count);
6855                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
6856                 vcpu->arch.pio.count = 0;
6857                 return 1;
6858         }
6859
6860         return 0;
6861 }
6862
6863 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
6864                                     int size, unsigned short port, void *val,
6865                                     unsigned int count)
6866 {
6867         return emulator_pio_in(emul_to_vcpu(ctxt), size, port, val, count);
6868
6869 }
6870
6871 static int emulator_pio_out(struct kvm_vcpu *vcpu, int size,
6872                             unsigned short port, const void *val,
6873                             unsigned int count)
6874 {
6875         memcpy(vcpu->arch.pio_data, val, size * count);
6876         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
6877         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
6878 }
6879
6880 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
6881                                      int size, unsigned short port,
6882                                      const void *val, unsigned int count)
6883 {
6884         return emulator_pio_out(emul_to_vcpu(ctxt), size, port, val, count);
6885 }
6886
6887 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
6888 {
6889         return static_call(kvm_x86_get_segment_base)(vcpu, seg);
6890 }
6891
6892 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
6893 {
6894         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
6895 }
6896
6897 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
6898 {
6899         if (!need_emulate_wbinvd(vcpu))
6900                 return X86EMUL_CONTINUE;
6901
6902         if (static_call(kvm_x86_has_wbinvd_exit)()) {
6903                 int cpu = get_cpu();
6904
6905                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
6906                 on_each_cpu_mask(vcpu->arch.wbinvd_dirty_mask,
6907                                 wbinvd_ipi, NULL, 1);
6908                 put_cpu();
6909                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
6910         } else
6911                 wbinvd();
6912         return X86EMUL_CONTINUE;
6913 }
6914
6915 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
6916 {
6917         kvm_emulate_wbinvd_noskip(vcpu);
6918         return kvm_skip_emulated_instruction(vcpu);
6919 }
6920 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
6921
6922
6923
6924 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
6925 {
6926         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
6927 }
6928
6929 static void emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
6930                             unsigned long *dest)
6931 {
6932         kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
6933 }
6934
6935 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
6936                            unsigned long value)
6937 {
6938
6939         return kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
6940 }
6941
6942 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
6943 {
6944         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
6945 }
6946
6947 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
6948 {
6949         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6950         unsigned long value;
6951
6952         switch (cr) {
6953         case 0:
6954                 value = kvm_read_cr0(vcpu);
6955                 break;
6956         case 2:
6957                 value = vcpu->arch.cr2;
6958                 break;
6959         case 3:
6960                 value = kvm_read_cr3(vcpu);
6961                 break;
6962         case 4:
6963                 value = kvm_read_cr4(vcpu);
6964                 break;
6965         case 8:
6966                 value = kvm_get_cr8(vcpu);
6967                 break;
6968         default:
6969                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
6970                 return 0;
6971         }
6972
6973         return value;
6974 }
6975
6976 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
6977 {
6978         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6979         int res = 0;
6980
6981         switch (cr) {
6982         case 0:
6983                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
6984                 break;
6985         case 2:
6986                 vcpu->arch.cr2 = val;
6987                 break;
6988         case 3:
6989                 res = kvm_set_cr3(vcpu, val);
6990                 break;
6991         case 4:
6992                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
6993                 break;
6994         case 8:
6995                 res = kvm_set_cr8(vcpu, val);
6996                 break;
6997         default:
6998                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
6999                 res = -1;
7000         }
7001
7002         return res;
7003 }
7004
7005 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
7006 {
7007         return static_call(kvm_x86_get_cpl)(emul_to_vcpu(ctxt));
7008 }
7009
7010 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7011 {
7012         static_call(kvm_x86_get_gdt)(emul_to_vcpu(ctxt), dt);
7013 }
7014
7015 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7016 {
7017         static_call(kvm_x86_get_idt)(emul_to_vcpu(ctxt), dt);
7018 }
7019
7020 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7021 {
7022         static_call(kvm_x86_set_gdt)(emul_to_vcpu(ctxt), dt);
7023 }
7024
7025 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7026 {
7027         static_call(kvm_x86_set_idt)(emul_to_vcpu(ctxt), dt);
7028 }
7029
7030 static unsigned long emulator_get_cached_segment_base(
7031         struct x86_emulate_ctxt *ctxt, int seg)
7032 {
7033         return get_segment_base(emul_to_vcpu(ctxt), seg);
7034 }
7035
7036 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
7037                                  struct desc_struct *desc, u32 *base3,
7038                                  int seg)
7039 {
7040         struct kvm_segment var;
7041
7042         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
7043         *selector = var.selector;
7044
7045         if (var.unusable) {
7046                 memset(desc, 0, sizeof(*desc));
7047                 if (base3)
7048                         *base3 = 0;
7049                 return false;
7050         }
7051
7052         if (var.g)
7053                 var.limit >>= 12;
7054         set_desc_limit(desc, var.limit);
7055         set_desc_base(desc, (unsigned long)var.base);
7056 #ifdef CONFIG_X86_64
7057         if (base3)
7058                 *base3 = var.base >> 32;
7059 #endif
7060         desc->type = var.type;
7061         desc->s = var.s;
7062         desc->dpl = var.dpl;
7063         desc->p = var.present;
7064         desc->avl = var.avl;
7065         desc->l = var.l;
7066         desc->d = var.db;
7067         desc->g = var.g;
7068
7069         return true;
7070 }
7071
7072 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
7073                                  struct desc_struct *desc, u32 base3,
7074                                  int seg)
7075 {
7076         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7077         struct kvm_segment var;
7078
7079         var.selector = selector;
7080         var.base = get_desc_base(desc);
7081 #ifdef CONFIG_X86_64
7082         var.base |= ((u64)base3) << 32;
7083 #endif
7084         var.limit = get_desc_limit(desc);
7085         if (desc->g)
7086                 var.limit = (var.limit << 12) | 0xfff;
7087         var.type = desc->type;
7088         var.dpl = desc->dpl;
7089         var.db = desc->d;
7090         var.s = desc->s;
7091         var.l = desc->l;
7092         var.g = desc->g;
7093         var.avl = desc->avl;
7094         var.present = desc->p;
7095         var.unusable = !var.present;
7096         var.padding = 0;
7097
7098         kvm_set_segment(vcpu, &var, seg);
7099         return;
7100 }
7101
7102 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
7103                             u32 msr_index, u64 *pdata)
7104 {
7105         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7106         int r;
7107
7108         r = kvm_get_msr(vcpu, msr_index, pdata);
7109
7110         if (r && kvm_get_msr_user_space(vcpu, msr_index, r)) {
7111                 /* Bounce to user space */
7112                 return X86EMUL_IO_NEEDED;
7113         }
7114
7115         return r;
7116 }
7117
7118 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
7119                             u32 msr_index, u64 data)
7120 {
7121         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7122         int r;
7123
7124         r = kvm_set_msr(vcpu, msr_index, data);
7125
7126         if (r && kvm_set_msr_user_space(vcpu, msr_index, data, r)) {
7127                 /* Bounce to user space */
7128                 return X86EMUL_IO_NEEDED;
7129         }
7130
7131         return r;
7132 }
7133
7134 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
7135 {
7136         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7137
7138         return vcpu->arch.smbase;
7139 }
7140
7141 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
7142 {
7143         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7144
7145         vcpu->arch.smbase = smbase;
7146 }
7147
7148 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
7149                               u32 pmc)
7150 {
7151         return kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc);
7152 }
7153
7154 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
7155                              u32 pmc, u64 *pdata)
7156 {
7157         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
7158 }
7159
7160 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
7161 {
7162         emul_to_vcpu(ctxt)->arch.halt_request = 1;
7163 }
7164
7165 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
7166                               struct x86_instruction_info *info,
7167                               enum x86_intercept_stage stage)
7168 {
7169         return static_call(kvm_x86_check_intercept)(emul_to_vcpu(ctxt), info, stage,
7170                                             &ctxt->exception);
7171 }
7172
7173 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
7174                               u32 *eax, u32 *ebx, u32 *ecx, u32 *edx,
7175                               bool exact_only)
7176 {
7177         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, exact_only);
7178 }
7179
7180 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
7181 {
7182         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
7183 }
7184
7185 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
7186 {
7187         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
7188 }
7189
7190 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
7191 {
7192         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
7193 }
7194
7195 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
7196 {
7197         return kvm_register_read_raw(emul_to_vcpu(ctxt), reg);
7198 }
7199
7200 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
7201 {
7202         kvm_register_write_raw(emul_to_vcpu(ctxt), reg, val);
7203 }
7204
7205 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
7206 {
7207         static_call(kvm_x86_set_nmi_mask)(emul_to_vcpu(ctxt), masked);
7208 }
7209
7210 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
7211 {
7212         return emul_to_vcpu(ctxt)->arch.hflags;
7213 }
7214
7215 static void emulator_exiting_smm(struct x86_emulate_ctxt *ctxt)
7216 {
7217         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7218
7219         kvm_smm_changed(vcpu, false);
7220 }
7221
7222 static int emulator_leave_smm(struct x86_emulate_ctxt *ctxt,
7223                                   const char *smstate)
7224 {
7225         return static_call(kvm_x86_leave_smm)(emul_to_vcpu(ctxt), smstate);
7226 }
7227
7228 static void emulator_triple_fault(struct x86_emulate_ctxt *ctxt)
7229 {
7230         kvm_make_request(KVM_REQ_TRIPLE_FAULT, emul_to_vcpu(ctxt));
7231 }
7232
7233 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
7234 {
7235         return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
7236 }
7237
7238 static const struct x86_emulate_ops emulate_ops = {
7239         .read_gpr            = emulator_read_gpr,
7240         .write_gpr           = emulator_write_gpr,
7241         .read_std            = emulator_read_std,
7242         .write_std           = emulator_write_std,
7243         .read_phys           = kvm_read_guest_phys_system,
7244         .fetch               = kvm_fetch_guest_virt,
7245         .read_emulated       = emulator_read_emulated,
7246         .write_emulated      = emulator_write_emulated,
7247         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
7248         .invlpg              = emulator_invlpg,
7249         .pio_in_emulated     = emulator_pio_in_emulated,
7250         .pio_out_emulated    = emulator_pio_out_emulated,
7251         .get_segment         = emulator_get_segment,
7252         .set_segment         = emulator_set_segment,
7253         .get_cached_segment_base = emulator_get_cached_segment_base,
7254         .get_gdt             = emulator_get_gdt,
7255         .get_idt             = emulator_get_idt,
7256         .set_gdt             = emulator_set_gdt,
7257         .set_idt             = emulator_set_idt,
7258         .get_cr              = emulator_get_cr,
7259         .set_cr              = emulator_set_cr,
7260         .cpl                 = emulator_get_cpl,
7261         .get_dr              = emulator_get_dr,
7262         .set_dr              = emulator_set_dr,
7263         .get_smbase          = emulator_get_smbase,
7264         .set_smbase          = emulator_set_smbase,
7265         .set_msr             = emulator_set_msr,
7266         .get_msr             = emulator_get_msr,
7267         .check_pmc           = emulator_check_pmc,
7268         .read_pmc            = emulator_read_pmc,
7269         .halt                = emulator_halt,
7270         .wbinvd              = emulator_wbinvd,
7271         .fix_hypercall       = emulator_fix_hypercall,
7272         .intercept           = emulator_intercept,
7273         .get_cpuid           = emulator_get_cpuid,
7274         .guest_has_long_mode = emulator_guest_has_long_mode,
7275         .guest_has_movbe     = emulator_guest_has_movbe,
7276         .guest_has_fxsr      = emulator_guest_has_fxsr,
7277         .set_nmi_mask        = emulator_set_nmi_mask,
7278         .get_hflags          = emulator_get_hflags,
7279         .exiting_smm         = emulator_exiting_smm,
7280         .leave_smm           = emulator_leave_smm,
7281         .triple_fault        = emulator_triple_fault,
7282         .set_xcr             = emulator_set_xcr,
7283 };
7284
7285 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
7286 {
7287         u32 int_shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
7288         /*
7289          * an sti; sti; sequence only disable interrupts for the first
7290          * instruction. So, if the last instruction, be it emulated or
7291          * not, left the system with the INT_STI flag enabled, it
7292          * means that the last instruction is an sti. We should not
7293          * leave the flag on in this case. The same goes for mov ss
7294          */
7295         if (int_shadow & mask)
7296                 mask = 0;
7297         if (unlikely(int_shadow || mask)) {
7298                 static_call(kvm_x86_set_interrupt_shadow)(vcpu, mask);
7299                 if (!mask)
7300                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7301         }
7302 }
7303
7304 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
7305 {
7306         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7307         if (ctxt->exception.vector == PF_VECTOR)
7308                 return kvm_inject_emulated_page_fault(vcpu, &ctxt->exception);
7309
7310         if (ctxt->exception.error_code_valid)
7311                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
7312                                       ctxt->exception.error_code);
7313         else
7314                 kvm_queue_exception(vcpu, ctxt->exception.vector);
7315         return false;
7316 }
7317
7318 static struct x86_emulate_ctxt *alloc_emulate_ctxt(struct kvm_vcpu *vcpu)
7319 {
7320         struct x86_emulate_ctxt *ctxt;
7321
7322         ctxt = kmem_cache_zalloc(x86_emulator_cache, GFP_KERNEL_ACCOUNT);
7323         if (!ctxt) {
7324                 pr_err("kvm: failed to allocate vcpu's emulator\n");
7325                 return NULL;
7326         }
7327
7328         ctxt->vcpu = vcpu;
7329         ctxt->ops = &emulate_ops;
7330         vcpu->arch.emulate_ctxt = ctxt;
7331
7332         return ctxt;
7333 }
7334
7335 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
7336 {
7337         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7338         int cs_db, cs_l;
7339
7340         static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
7341
7342         ctxt->gpa_available = false;
7343         ctxt->eflags = kvm_get_rflags(vcpu);
7344         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
7345
7346         ctxt->eip = kvm_rip_read(vcpu);
7347         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
7348                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
7349                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
7350                      cs_db                              ? X86EMUL_MODE_PROT32 :
7351                                                           X86EMUL_MODE_PROT16;
7352         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
7353         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
7354         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
7355
7356         ctxt->interruptibility = 0;
7357         ctxt->have_exception = false;
7358         ctxt->exception.vector = -1;
7359         ctxt->perm_ok = false;
7360
7361         init_decode_cache(ctxt);
7362         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7363 }
7364
7365 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
7366 {
7367         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7368         int ret;
7369
7370         init_emulate_ctxt(vcpu);
7371
7372         ctxt->op_bytes = 2;
7373         ctxt->ad_bytes = 2;
7374         ctxt->_eip = ctxt->eip + inc_eip;
7375         ret = emulate_int_real(ctxt, irq);
7376
7377         if (ret != X86EMUL_CONTINUE) {
7378                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
7379         } else {
7380                 ctxt->eip = ctxt->_eip;
7381                 kvm_rip_write(vcpu, ctxt->eip);
7382                 kvm_set_rflags(vcpu, ctxt->eflags);
7383         }
7384 }
7385 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
7386
7387 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
7388 {
7389         ++vcpu->stat.insn_emulation_fail;
7390         trace_kvm_emulate_insn_failed(vcpu);
7391
7392         if (emulation_type & EMULTYPE_VMWARE_GP) {
7393                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7394                 return 1;
7395         }
7396
7397         if (emulation_type & EMULTYPE_SKIP) {
7398                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7399                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
7400                 vcpu->run->internal.ndata = 0;
7401                 return 0;
7402         }
7403
7404         kvm_queue_exception(vcpu, UD_VECTOR);
7405
7406         if (!is_guest_mode(vcpu) && static_call(kvm_x86_get_cpl)(vcpu) == 0) {
7407                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7408                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
7409                 vcpu->run->internal.ndata = 0;
7410                 return 0;
7411         }
7412
7413         return 1;
7414 }
7415
7416 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7417                                   bool write_fault_to_shadow_pgtable,
7418                                   int emulation_type)
7419 {
7420         gpa_t gpa = cr2_or_gpa;
7421         kvm_pfn_t pfn;
7422
7423         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7424                 return false;
7425
7426         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7427             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7428                 return false;
7429
7430         if (!vcpu->arch.mmu->direct_map) {
7431                 /*
7432                  * Write permission should be allowed since only
7433                  * write access need to be emulated.
7434                  */
7435                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7436
7437                 /*
7438                  * If the mapping is invalid in guest, let cpu retry
7439                  * it to generate fault.
7440                  */
7441                 if (gpa == UNMAPPED_GVA)
7442                         return true;
7443         }
7444
7445         /*
7446          * Do not retry the unhandleable instruction if it faults on the
7447          * readonly host memory, otherwise it will goto a infinite loop:
7448          * retry instruction -> write #PF -> emulation fail -> retry
7449          * instruction -> ...
7450          */
7451         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
7452
7453         /*
7454          * If the instruction failed on the error pfn, it can not be fixed,
7455          * report the error to userspace.
7456          */
7457         if (is_error_noslot_pfn(pfn))
7458                 return false;
7459
7460         kvm_release_pfn_clean(pfn);
7461
7462         /* The instructions are well-emulated on direct mmu. */
7463         if (vcpu->arch.mmu->direct_map) {
7464                 unsigned int indirect_shadow_pages;
7465
7466                 write_lock(&vcpu->kvm->mmu_lock);
7467                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
7468                 write_unlock(&vcpu->kvm->mmu_lock);
7469
7470                 if (indirect_shadow_pages)
7471                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7472
7473                 return true;
7474         }
7475
7476         /*
7477          * if emulation was due to access to shadowed page table
7478          * and it failed try to unshadow page and re-enter the
7479          * guest to let CPU execute the instruction.
7480          */
7481         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7482
7483         /*
7484          * If the access faults on its page table, it can not
7485          * be fixed by unprotecting shadow page and it should
7486          * be reported to userspace.
7487          */
7488         return !write_fault_to_shadow_pgtable;
7489 }
7490
7491 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
7492                               gpa_t cr2_or_gpa,  int emulation_type)
7493 {
7494         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7495         unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
7496
7497         last_retry_eip = vcpu->arch.last_retry_eip;
7498         last_retry_addr = vcpu->arch.last_retry_addr;
7499
7500         /*
7501          * If the emulation is caused by #PF and it is non-page_table
7502          * writing instruction, it means the VM-EXIT is caused by shadow
7503          * page protected, we can zap the shadow page and retry this
7504          * instruction directly.
7505          *
7506          * Note: if the guest uses a non-page-table modifying instruction
7507          * on the PDE that points to the instruction, then we will unmap
7508          * the instruction and go to an infinite loop. So, we cache the
7509          * last retried eip and the last fault address, if we meet the eip
7510          * and the address again, we can break out of the potential infinite
7511          * loop.
7512          */
7513         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
7514
7515         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7516                 return false;
7517
7518         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7519             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7520                 return false;
7521
7522         if (x86_page_table_writing_insn(ctxt))
7523                 return false;
7524
7525         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
7526                 return false;
7527
7528         vcpu->arch.last_retry_eip = ctxt->eip;
7529         vcpu->arch.last_retry_addr = cr2_or_gpa;
7530
7531         if (!vcpu->arch.mmu->direct_map)
7532                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7533
7534         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7535
7536         return true;
7537 }
7538
7539 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
7540 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
7541
7542 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm)
7543 {
7544         trace_kvm_smm_transition(vcpu->vcpu_id, vcpu->arch.smbase, entering_smm);
7545
7546         if (entering_smm) {
7547                 vcpu->arch.hflags |= HF_SMM_MASK;
7548         } else {
7549                 vcpu->arch.hflags &= ~(HF_SMM_MASK | HF_SMM_INSIDE_NMI_MASK);
7550
7551                 /* Process a latched INIT or SMI, if any.  */
7552                 kvm_make_request(KVM_REQ_EVENT, vcpu);
7553         }
7554
7555         kvm_mmu_reset_context(vcpu);
7556 }
7557
7558 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
7559                                 unsigned long *db)
7560 {
7561         u32 dr6 = 0;
7562         int i;
7563         u32 enable, rwlen;
7564
7565         enable = dr7;
7566         rwlen = dr7 >> 16;
7567         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
7568                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
7569                         dr6 |= (1 << i);
7570         return dr6;
7571 }
7572
7573 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
7574 {
7575         struct kvm_run *kvm_run = vcpu->run;
7576
7577         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
7578                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_ACTIVE_LOW;
7579                 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu);
7580                 kvm_run->debug.arch.exception = DB_VECTOR;
7581                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
7582                 return 0;
7583         }
7584         kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
7585         return 1;
7586 }
7587
7588 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
7589 {
7590         unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7591         int r;
7592
7593         r = static_call(kvm_x86_skip_emulated_instruction)(vcpu);
7594         if (unlikely(!r))
7595                 return 0;
7596
7597         /*
7598          * rflags is the old, "raw" value of the flags.  The new value has
7599          * not been saved yet.
7600          *
7601          * This is correct even for TF set by the guest, because "the
7602          * processor will not generate this exception after the instruction
7603          * that sets the TF flag".
7604          */
7605         if (unlikely(rflags & X86_EFLAGS_TF))
7606                 r = kvm_vcpu_do_singlestep(vcpu);
7607         return r;
7608 }
7609 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
7610
7611 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
7612 {
7613         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
7614             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
7615                 struct kvm_run *kvm_run = vcpu->run;
7616                 unsigned long eip = kvm_get_linear_rip(vcpu);
7617                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7618                                            vcpu->arch.guest_debug_dr7,
7619                                            vcpu->arch.eff_db);
7620
7621                 if (dr6 != 0) {
7622                         kvm_run->debug.arch.dr6 = dr6 | DR6_ACTIVE_LOW;
7623                         kvm_run->debug.arch.pc = eip;
7624                         kvm_run->debug.arch.exception = DB_VECTOR;
7625                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
7626                         *r = 0;
7627                         return true;
7628                 }
7629         }
7630
7631         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
7632             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
7633                 unsigned long eip = kvm_get_linear_rip(vcpu);
7634                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7635                                            vcpu->arch.dr7,
7636                                            vcpu->arch.db);
7637
7638                 if (dr6 != 0) {
7639                         kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
7640                         *r = 1;
7641                         return true;
7642                 }
7643         }
7644
7645         return false;
7646 }
7647
7648 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
7649 {
7650         switch (ctxt->opcode_len) {
7651         case 1:
7652                 switch (ctxt->b) {
7653                 case 0xe4:      /* IN */
7654                 case 0xe5:
7655                 case 0xec:
7656                 case 0xed:
7657                 case 0xe6:      /* OUT */
7658                 case 0xe7:
7659                 case 0xee:
7660                 case 0xef:
7661                 case 0x6c:      /* INS */
7662                 case 0x6d:
7663                 case 0x6e:      /* OUTS */
7664                 case 0x6f:
7665                         return true;
7666                 }
7667                 break;
7668         case 2:
7669                 switch (ctxt->b) {
7670                 case 0x33:      /* RDPMC */
7671                         return true;
7672                 }
7673                 break;
7674         }
7675
7676         return false;
7677 }
7678
7679 /*
7680  * Decode to be emulated instruction. Return EMULATION_OK if success.
7681  */
7682 int x86_decode_emulated_instruction(struct kvm_vcpu *vcpu, int emulation_type,
7683                                     void *insn, int insn_len)
7684 {
7685         int r = EMULATION_OK;
7686         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7687
7688         init_emulate_ctxt(vcpu);
7689
7690         /*
7691          * We will reenter on the same instruction since we do not set
7692          * complete_userspace_io. This does not handle watchpoints yet,
7693          * those would be handled in the emulate_ops.
7694          */
7695         if (!(emulation_type & EMULTYPE_SKIP) &&
7696             kvm_vcpu_check_breakpoint(vcpu, &r))
7697                 return r;
7698
7699         r = x86_decode_insn(ctxt, insn, insn_len, emulation_type);
7700
7701         trace_kvm_emulate_insn_start(vcpu);
7702         ++vcpu->stat.insn_emulation;
7703
7704         return r;
7705 }
7706 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction);
7707
7708 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7709                             int emulation_type, void *insn, int insn_len)
7710 {
7711         int r;
7712         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7713         bool writeback = true;
7714         bool write_fault_to_spt;
7715
7716         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, insn, insn_len)))
7717                 return 1;
7718
7719         vcpu->arch.l1tf_flush_l1d = true;
7720
7721         /*
7722          * Clear write_fault_to_shadow_pgtable here to ensure it is
7723          * never reused.
7724          */
7725         write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
7726         vcpu->arch.write_fault_to_shadow_pgtable = false;
7727
7728         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
7729                 kvm_clear_exception_queue(vcpu);
7730
7731                 r = x86_decode_emulated_instruction(vcpu, emulation_type,
7732                                                     insn, insn_len);
7733                 if (r != EMULATION_OK)  {
7734                         if ((emulation_type & EMULTYPE_TRAP_UD) ||
7735                             (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
7736                                 kvm_queue_exception(vcpu, UD_VECTOR);
7737                                 return 1;
7738                         }
7739                         if (reexecute_instruction(vcpu, cr2_or_gpa,
7740                                                   write_fault_to_spt,
7741                                                   emulation_type))
7742                                 return 1;
7743                         if (ctxt->have_exception) {
7744                                 /*
7745                                  * #UD should result in just EMULATION_FAILED, and trap-like
7746                                  * exception should not be encountered during decode.
7747                                  */
7748                                 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
7749                                              exception_type(ctxt->exception.vector) == EXCPT_TRAP);
7750                                 inject_emulated_exception(vcpu);
7751                                 return 1;
7752                         }
7753                         return handle_emulation_failure(vcpu, emulation_type);
7754                 }
7755         }
7756
7757         if ((emulation_type & EMULTYPE_VMWARE_GP) &&
7758             !is_vmware_backdoor_opcode(ctxt)) {
7759                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7760                 return 1;
7761         }
7762
7763         /*
7764          * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
7765          * for kvm_skip_emulated_instruction().  The caller is responsible for
7766          * updating interruptibility state and injecting single-step #DBs.
7767          */
7768         if (emulation_type & EMULTYPE_SKIP) {
7769                 kvm_rip_write(vcpu, ctxt->_eip);
7770                 if (ctxt->eflags & X86_EFLAGS_RF)
7771                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
7772                 return 1;
7773         }
7774
7775         if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
7776                 return 1;
7777
7778         /* this is needed for vmware backdoor interface to work since it
7779            changes registers values  during IO operation */
7780         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
7781                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7782                 emulator_invalidate_register_cache(ctxt);
7783         }
7784
7785 restart:
7786         if (emulation_type & EMULTYPE_PF) {
7787                 /* Save the faulting GPA (cr2) in the address field */
7788                 ctxt->exception.address = cr2_or_gpa;
7789
7790                 /* With shadow page tables, cr2 contains a GVA or nGPA. */
7791                 if (vcpu->arch.mmu->direct_map) {
7792                         ctxt->gpa_available = true;
7793                         ctxt->gpa_val = cr2_or_gpa;
7794                 }
7795         } else {
7796                 /* Sanitize the address out of an abundance of paranoia. */
7797                 ctxt->exception.address = 0;
7798         }
7799
7800         r = x86_emulate_insn(ctxt);
7801
7802         if (r == EMULATION_INTERCEPTED)
7803                 return 1;
7804
7805         if (r == EMULATION_FAILED) {
7806                 if (reexecute_instruction(vcpu, cr2_or_gpa, write_fault_to_spt,
7807                                         emulation_type))
7808                         return 1;
7809
7810                 return handle_emulation_failure(vcpu, emulation_type);
7811         }
7812
7813         if (ctxt->have_exception) {
7814                 r = 1;
7815                 if (inject_emulated_exception(vcpu))
7816                         return r;
7817         } else if (vcpu->arch.pio.count) {
7818                 if (!vcpu->arch.pio.in) {
7819                         /* FIXME: return into emulator if single-stepping.  */
7820                         vcpu->arch.pio.count = 0;
7821                 } else {
7822                         writeback = false;
7823                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
7824                 }
7825                 r = 0;
7826         } else if (vcpu->mmio_needed) {
7827                 ++vcpu->stat.mmio_exits;
7828
7829                 if (!vcpu->mmio_is_write)
7830                         writeback = false;
7831                 r = 0;
7832                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7833         } else if (r == EMULATION_RESTART)
7834                 goto restart;
7835         else
7836                 r = 1;
7837
7838         if (writeback) {
7839                 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7840                 toggle_interruptibility(vcpu, ctxt->interruptibility);
7841                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7842                 if (!ctxt->have_exception ||
7843                     exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
7844                         kvm_rip_write(vcpu, ctxt->eip);
7845                         if (r && (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
7846                                 r = kvm_vcpu_do_singlestep(vcpu);
7847                         if (kvm_x86_ops.update_emulated_instruction)
7848                                 static_call(kvm_x86_update_emulated_instruction)(vcpu);
7849                         __kvm_set_rflags(vcpu, ctxt->eflags);
7850                 }
7851
7852                 /*
7853                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
7854                  * do nothing, and it will be requested again as soon as
7855                  * the shadow expires.  But we still need to check here,
7856                  * because POPF has no interrupt shadow.
7857                  */
7858                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
7859                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7860         } else
7861                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
7862
7863         return r;
7864 }
7865
7866 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
7867 {
7868         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
7869 }
7870 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
7871
7872 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
7873                                         void *insn, int insn_len)
7874 {
7875         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
7876 }
7877 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
7878
7879 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
7880 {
7881         vcpu->arch.pio.count = 0;
7882         return 1;
7883 }
7884
7885 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
7886 {
7887         vcpu->arch.pio.count = 0;
7888
7889         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
7890                 return 1;
7891
7892         return kvm_skip_emulated_instruction(vcpu);
7893 }
7894
7895 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
7896                             unsigned short port)
7897 {
7898         unsigned long val = kvm_rax_read(vcpu);
7899         int ret = emulator_pio_out(vcpu, size, port, &val, 1);
7900
7901         if (ret)
7902                 return ret;
7903
7904         /*
7905          * Workaround userspace that relies on old KVM behavior of %rip being
7906          * incremented prior to exiting to userspace to handle "OUT 0x7e".
7907          */
7908         if (port == 0x7e &&
7909             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
7910                 vcpu->arch.complete_userspace_io =
7911                         complete_fast_pio_out_port_0x7e;
7912                 kvm_skip_emulated_instruction(vcpu);
7913         } else {
7914                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
7915                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
7916         }
7917         return 0;
7918 }
7919
7920 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
7921 {
7922         unsigned long val;
7923
7924         /* We should only ever be called with arch.pio.count equal to 1 */
7925         BUG_ON(vcpu->arch.pio.count != 1);
7926
7927         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
7928                 vcpu->arch.pio.count = 0;
7929                 return 1;
7930         }
7931
7932         /* For size less than 4 we merge, else we zero extend */
7933         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
7934
7935         /*
7936          * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
7937          * the copy and tracing
7938          */
7939         emulator_pio_in(vcpu, vcpu->arch.pio.size, vcpu->arch.pio.port, &val, 1);
7940         kvm_rax_write(vcpu, val);
7941
7942         return kvm_skip_emulated_instruction(vcpu);
7943 }
7944
7945 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
7946                            unsigned short port)
7947 {
7948         unsigned long val;
7949         int ret;
7950
7951         /* For size less than 4 we merge, else we zero extend */
7952         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
7953
7954         ret = emulator_pio_in(vcpu, size, port, &val, 1);
7955         if (ret) {
7956                 kvm_rax_write(vcpu, val);
7957                 return ret;
7958         }
7959
7960         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
7961         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
7962
7963         return 0;
7964 }
7965
7966 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
7967 {
7968         int ret;
7969
7970         if (in)
7971                 ret = kvm_fast_pio_in(vcpu, size, port);
7972         else
7973                 ret = kvm_fast_pio_out(vcpu, size, port);
7974         return ret && kvm_skip_emulated_instruction(vcpu);
7975 }
7976 EXPORT_SYMBOL_GPL(kvm_fast_pio);
7977
7978 static int kvmclock_cpu_down_prep(unsigned int cpu)
7979 {
7980         __this_cpu_write(cpu_tsc_khz, 0);
7981         return 0;
7982 }
7983
7984 static void tsc_khz_changed(void *data)
7985 {
7986         struct cpufreq_freqs *freq = data;
7987         unsigned long khz = 0;
7988
7989         if (data)
7990                 khz = freq->new;
7991         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
7992                 khz = cpufreq_quick_get(raw_smp_processor_id());
7993         if (!khz)
7994                 khz = tsc_khz;
7995         __this_cpu_write(cpu_tsc_khz, khz);
7996 }
7997
7998 #ifdef CONFIG_X86_64
7999 static void kvm_hyperv_tsc_notifier(void)
8000 {
8001         struct kvm *kvm;
8002         struct kvm_vcpu *vcpu;
8003         int cpu;
8004         unsigned long flags;
8005
8006         mutex_lock(&kvm_lock);
8007         list_for_each_entry(kvm, &vm_list, vm_list)
8008                 kvm_make_mclock_inprogress_request(kvm);
8009
8010         hyperv_stop_tsc_emulation();
8011
8012         /* TSC frequency always matches when on Hyper-V */
8013         for_each_present_cpu(cpu)
8014                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
8015         kvm_max_guest_tsc_khz = tsc_khz;
8016
8017         list_for_each_entry(kvm, &vm_list, vm_list) {
8018                 struct kvm_arch *ka = &kvm->arch;
8019
8020                 spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
8021                 pvclock_update_vm_gtod_copy(kvm);
8022                 spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
8023
8024                 kvm_for_each_vcpu(cpu, vcpu, kvm)
8025                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8026
8027                 kvm_for_each_vcpu(cpu, vcpu, kvm)
8028                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
8029         }
8030         mutex_unlock(&kvm_lock);
8031 }
8032 #endif
8033
8034 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
8035 {
8036         struct kvm *kvm;
8037         struct kvm_vcpu *vcpu;
8038         int i, send_ipi = 0;
8039
8040         /*
8041          * We allow guests to temporarily run on slowing clocks,
8042          * provided we notify them after, or to run on accelerating
8043          * clocks, provided we notify them before.  Thus time never
8044          * goes backwards.
8045          *
8046          * However, we have a problem.  We can't atomically update
8047          * the frequency of a given CPU from this function; it is
8048          * merely a notifier, which can be called from any CPU.
8049          * Changing the TSC frequency at arbitrary points in time
8050          * requires a recomputation of local variables related to
8051          * the TSC for each VCPU.  We must flag these local variables
8052          * to be updated and be sure the update takes place with the
8053          * new frequency before any guests proceed.
8054          *
8055          * Unfortunately, the combination of hotplug CPU and frequency
8056          * change creates an intractable locking scenario; the order
8057          * of when these callouts happen is undefined with respect to
8058          * CPU hotplug, and they can race with each other.  As such,
8059          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
8060          * undefined; you can actually have a CPU frequency change take
8061          * place in between the computation of X and the setting of the
8062          * variable.  To protect against this problem, all updates of
8063          * the per_cpu tsc_khz variable are done in an interrupt
8064          * protected IPI, and all callers wishing to update the value
8065          * must wait for a synchronous IPI to complete (which is trivial
8066          * if the caller is on the CPU already).  This establishes the
8067          * necessary total order on variable updates.
8068          *
8069          * Note that because a guest time update may take place
8070          * anytime after the setting of the VCPU's request bit, the
8071          * correct TSC value must be set before the request.  However,
8072          * to ensure the update actually makes it to any guest which
8073          * starts running in hardware virtualization between the set
8074          * and the acquisition of the spinlock, we must also ping the
8075          * CPU after setting the request bit.
8076          *
8077          */
8078
8079         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8080
8081         mutex_lock(&kvm_lock);
8082         list_for_each_entry(kvm, &vm_list, vm_list) {
8083                 kvm_for_each_vcpu(i, vcpu, kvm) {
8084                         if (vcpu->cpu != cpu)
8085                                 continue;
8086                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8087                         if (vcpu->cpu != raw_smp_processor_id())
8088                                 send_ipi = 1;
8089                 }
8090         }
8091         mutex_unlock(&kvm_lock);
8092
8093         if (freq->old < freq->new && send_ipi) {
8094                 /*
8095                  * We upscale the frequency.  Must make the guest
8096                  * doesn't see old kvmclock values while running with
8097                  * the new frequency, otherwise we risk the guest sees
8098                  * time go backwards.
8099                  *
8100                  * In case we update the frequency for another cpu
8101                  * (which might be in guest context) send an interrupt
8102                  * to kick the cpu out of guest context.  Next time
8103                  * guest context is entered kvmclock will be updated,
8104                  * so the guest will not see stale values.
8105                  */
8106                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8107         }
8108 }
8109
8110 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
8111                                      void *data)
8112 {
8113         struct cpufreq_freqs *freq = data;
8114         int cpu;
8115
8116         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
8117                 return 0;
8118         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
8119                 return 0;
8120
8121         for_each_cpu(cpu, freq->policy->cpus)
8122                 __kvmclock_cpufreq_notifier(freq, cpu);
8123
8124         return 0;
8125 }
8126
8127 static struct notifier_block kvmclock_cpufreq_notifier_block = {
8128         .notifier_call  = kvmclock_cpufreq_notifier
8129 };
8130
8131 static int kvmclock_cpu_online(unsigned int cpu)
8132 {
8133         tsc_khz_changed(NULL);
8134         return 0;
8135 }
8136
8137 static void kvm_timer_init(void)
8138 {
8139         max_tsc_khz = tsc_khz;
8140
8141         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
8142 #ifdef CONFIG_CPU_FREQ
8143                 struct cpufreq_policy *policy;
8144                 int cpu;
8145
8146                 cpu = get_cpu();
8147                 policy = cpufreq_cpu_get(cpu);
8148                 if (policy) {
8149                         if (policy->cpuinfo.max_freq)
8150                                 max_tsc_khz = policy->cpuinfo.max_freq;
8151                         cpufreq_cpu_put(policy);
8152                 }
8153                 put_cpu();
8154 #endif
8155                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
8156                                           CPUFREQ_TRANSITION_NOTIFIER);
8157         }
8158
8159         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
8160                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
8161 }
8162
8163 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
8164 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
8165
8166 int kvm_is_in_guest(void)
8167 {
8168         return __this_cpu_read(current_vcpu) != NULL;
8169 }
8170
8171 static int kvm_is_user_mode(void)
8172 {
8173         int user_mode = 3;
8174
8175         if (__this_cpu_read(current_vcpu))
8176                 user_mode = static_call(kvm_x86_get_cpl)(__this_cpu_read(current_vcpu));
8177
8178         return user_mode != 0;
8179 }
8180
8181 static unsigned long kvm_get_guest_ip(void)
8182 {
8183         unsigned long ip = 0;
8184
8185         if (__this_cpu_read(current_vcpu))
8186                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
8187
8188         return ip;
8189 }
8190
8191 static void kvm_handle_intel_pt_intr(void)
8192 {
8193         struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
8194
8195         kvm_make_request(KVM_REQ_PMI, vcpu);
8196         __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
8197                         (unsigned long *)&vcpu->arch.pmu.global_status);
8198 }
8199
8200 static struct perf_guest_info_callbacks kvm_guest_cbs = {
8201         .is_in_guest            = kvm_is_in_guest,
8202         .is_user_mode           = kvm_is_user_mode,
8203         .get_guest_ip           = kvm_get_guest_ip,
8204         .handle_intel_pt_intr   = kvm_handle_intel_pt_intr,
8205 };
8206
8207 #ifdef CONFIG_X86_64
8208 static void pvclock_gtod_update_fn(struct work_struct *work)
8209 {
8210         struct kvm *kvm;
8211
8212         struct kvm_vcpu *vcpu;
8213         int i;
8214
8215         mutex_lock(&kvm_lock);
8216         list_for_each_entry(kvm, &vm_list, vm_list)
8217                 kvm_for_each_vcpu(i, vcpu, kvm)
8218                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
8219         atomic_set(&kvm_guest_has_master_clock, 0);
8220         mutex_unlock(&kvm_lock);
8221 }
8222
8223 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
8224
8225 /*
8226  * Indirection to move queue_work() out of the tk_core.seq write held
8227  * region to prevent possible deadlocks against time accessors which
8228  * are invoked with work related locks held.
8229  */
8230 static void pvclock_irq_work_fn(struct irq_work *w)
8231 {
8232         queue_work(system_long_wq, &pvclock_gtod_work);
8233 }
8234
8235 static DEFINE_IRQ_WORK(pvclock_irq_work, pvclock_irq_work_fn);
8236
8237 /*
8238  * Notification about pvclock gtod data update.
8239  */
8240 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
8241                                void *priv)
8242 {
8243         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
8244         struct timekeeper *tk = priv;
8245
8246         update_pvclock_gtod(tk);
8247
8248         /*
8249          * Disable master clock if host does not trust, or does not use,
8250          * TSC based clocksource. Delegate queue_work() to irq_work as
8251          * this is invoked with tk_core.seq write held.
8252          */
8253         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
8254             atomic_read(&kvm_guest_has_master_clock) != 0)
8255                 irq_work_queue(&pvclock_irq_work);
8256         return 0;
8257 }
8258
8259 static struct notifier_block pvclock_gtod_notifier = {
8260         .notifier_call = pvclock_gtod_notify,
8261 };
8262 #endif
8263
8264 int kvm_arch_init(void *opaque)
8265 {
8266         struct kvm_x86_init_ops *ops = opaque;
8267         int r;
8268
8269         if (kvm_x86_ops.hardware_enable) {
8270                 printk(KERN_ERR "kvm: already loaded the other module\n");
8271                 r = -EEXIST;
8272                 goto out;
8273         }
8274
8275         if (!ops->cpu_has_kvm_support()) {
8276                 pr_err_ratelimited("kvm: no hardware support\n");
8277                 r = -EOPNOTSUPP;
8278                 goto out;
8279         }
8280         if (ops->disabled_by_bios()) {
8281                 pr_err_ratelimited("kvm: disabled by bios\n");
8282                 r = -EOPNOTSUPP;
8283                 goto out;
8284         }
8285
8286         /*
8287          * KVM explicitly assumes that the guest has an FPU and
8288          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
8289          * vCPU's FPU state as a fxregs_state struct.
8290          */
8291         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
8292                 printk(KERN_ERR "kvm: inadequate fpu\n");
8293                 r = -EOPNOTSUPP;
8294                 goto out;
8295         }
8296
8297         r = -ENOMEM;
8298         x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
8299                                           __alignof__(struct fpu), SLAB_ACCOUNT,
8300                                           NULL);
8301         if (!x86_fpu_cache) {
8302                 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
8303                 goto out;
8304         }
8305
8306         x86_emulator_cache = kvm_alloc_emulator_cache();
8307         if (!x86_emulator_cache) {
8308                 pr_err("kvm: failed to allocate cache for x86 emulator\n");
8309                 goto out_free_x86_fpu_cache;
8310         }
8311
8312         user_return_msrs = alloc_percpu(struct kvm_user_return_msrs);
8313         if (!user_return_msrs) {
8314                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_user_return_msrs\n");
8315                 goto out_free_x86_emulator_cache;
8316         }
8317         kvm_nr_uret_msrs = 0;
8318
8319         r = kvm_mmu_module_init();
8320         if (r)
8321                 goto out_free_percpu;
8322
8323         kvm_timer_init();
8324
8325         perf_register_guest_info_callbacks(&kvm_guest_cbs);
8326
8327         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
8328                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
8329                 supported_xcr0 = host_xcr0 & KVM_SUPPORTED_XCR0;
8330         }
8331
8332         if (pi_inject_timer == -1)
8333                 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
8334 #ifdef CONFIG_X86_64
8335         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
8336
8337         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8338                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
8339 #endif
8340
8341         return 0;
8342
8343 out_free_percpu:
8344         free_percpu(user_return_msrs);
8345 out_free_x86_emulator_cache:
8346         kmem_cache_destroy(x86_emulator_cache);
8347 out_free_x86_fpu_cache:
8348         kmem_cache_destroy(x86_fpu_cache);
8349 out:
8350         return r;
8351 }
8352
8353 void kvm_arch_exit(void)
8354 {
8355 #ifdef CONFIG_X86_64
8356         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8357                 clear_hv_tscchange_cb();
8358 #endif
8359         kvm_lapic_exit();
8360         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
8361
8362         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8363                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
8364                                             CPUFREQ_TRANSITION_NOTIFIER);
8365         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
8366 #ifdef CONFIG_X86_64
8367         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
8368         irq_work_sync(&pvclock_irq_work);
8369         cancel_work_sync(&pvclock_gtod_work);
8370 #endif
8371         kvm_x86_ops.hardware_enable = NULL;
8372         kvm_mmu_module_exit();
8373         free_percpu(user_return_msrs);
8374         kmem_cache_destroy(x86_emulator_cache);
8375         kmem_cache_destroy(x86_fpu_cache);
8376 #ifdef CONFIG_KVM_XEN
8377         static_key_deferred_flush(&kvm_xen_enabled);
8378         WARN_ON(static_branch_unlikely(&kvm_xen_enabled.key));
8379 #endif
8380 }
8381
8382 static int __kvm_vcpu_halt(struct kvm_vcpu *vcpu, int state, int reason)
8383 {
8384         ++vcpu->stat.halt_exits;
8385         if (lapic_in_kernel(vcpu)) {
8386                 vcpu->arch.mp_state = state;
8387                 return 1;
8388         } else {
8389                 vcpu->run->exit_reason = reason;
8390                 return 0;
8391         }
8392 }
8393
8394 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
8395 {
8396         return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_HALTED, KVM_EXIT_HLT);
8397 }
8398 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
8399
8400 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
8401 {
8402         int ret = kvm_skip_emulated_instruction(vcpu);
8403         /*
8404          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
8405          * KVM_EXIT_DEBUG here.
8406          */
8407         return kvm_vcpu_halt(vcpu) && ret;
8408 }
8409 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
8410
8411 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu)
8412 {
8413         int ret = kvm_skip_emulated_instruction(vcpu);
8414
8415         return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_AP_RESET_HOLD, KVM_EXIT_AP_RESET_HOLD) && ret;
8416 }
8417 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold);
8418
8419 #ifdef CONFIG_X86_64
8420 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
8421                                 unsigned long clock_type)
8422 {
8423         struct kvm_clock_pairing clock_pairing;
8424         struct timespec64 ts;
8425         u64 cycle;
8426         int ret;
8427
8428         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
8429                 return -KVM_EOPNOTSUPP;
8430
8431         if (!kvm_get_walltime_and_clockread(&ts, &cycle))
8432                 return -KVM_EOPNOTSUPP;
8433
8434         clock_pairing.sec = ts.tv_sec;
8435         clock_pairing.nsec = ts.tv_nsec;
8436         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
8437         clock_pairing.flags = 0;
8438         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
8439
8440         ret = 0;
8441         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
8442                             sizeof(struct kvm_clock_pairing)))
8443                 ret = -KVM_EFAULT;
8444
8445         return ret;
8446 }
8447 #endif
8448
8449 /*
8450  * kvm_pv_kick_cpu_op:  Kick a vcpu.
8451  *
8452  * @apicid - apicid of vcpu to be kicked.
8453  */
8454 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
8455 {
8456         struct kvm_lapic_irq lapic_irq;
8457
8458         lapic_irq.shorthand = APIC_DEST_NOSHORT;
8459         lapic_irq.dest_mode = APIC_DEST_PHYSICAL;
8460         lapic_irq.level = 0;
8461         lapic_irq.dest_id = apicid;
8462         lapic_irq.msi_redir_hint = false;
8463
8464         lapic_irq.delivery_mode = APIC_DM_REMRD;
8465         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
8466 }
8467
8468 bool kvm_apicv_activated(struct kvm *kvm)
8469 {
8470         return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
8471 }
8472 EXPORT_SYMBOL_GPL(kvm_apicv_activated);
8473
8474 static void kvm_apicv_init(struct kvm *kvm)
8475 {
8476         if (enable_apicv)
8477                 clear_bit(APICV_INHIBIT_REASON_DISABLE,
8478                           &kvm->arch.apicv_inhibit_reasons);
8479         else
8480                 set_bit(APICV_INHIBIT_REASON_DISABLE,
8481                         &kvm->arch.apicv_inhibit_reasons);
8482 }
8483
8484 static void kvm_sched_yield(struct kvm_vcpu *vcpu, unsigned long dest_id)
8485 {
8486         struct kvm_vcpu *target = NULL;
8487         struct kvm_apic_map *map;
8488
8489         vcpu->stat.directed_yield_attempted++;
8490
8491         if (single_task_running())
8492                 goto no_yield;
8493
8494         rcu_read_lock();
8495         map = rcu_dereference(vcpu->kvm->arch.apic_map);
8496
8497         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
8498                 target = map->phys_map[dest_id]->vcpu;
8499
8500         rcu_read_unlock();
8501
8502         if (!target || !READ_ONCE(target->ready))
8503                 goto no_yield;
8504
8505         /* Ignore requests to yield to self */
8506         if (vcpu == target)
8507                 goto no_yield;
8508
8509         if (kvm_vcpu_yield_to(target) <= 0)
8510                 goto no_yield;
8511
8512         vcpu->stat.directed_yield_successful++;
8513
8514 no_yield:
8515         return;
8516 }
8517
8518 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
8519 {
8520         unsigned long nr, a0, a1, a2, a3, ret;
8521         int op_64_bit;
8522
8523         if (kvm_xen_hypercall_enabled(vcpu->kvm))
8524                 return kvm_xen_hypercall(vcpu);
8525
8526         if (kvm_hv_hypercall_enabled(vcpu))
8527                 return kvm_hv_hypercall(vcpu);
8528
8529         nr = kvm_rax_read(vcpu);
8530         a0 = kvm_rbx_read(vcpu);
8531         a1 = kvm_rcx_read(vcpu);
8532         a2 = kvm_rdx_read(vcpu);
8533         a3 = kvm_rsi_read(vcpu);
8534
8535         trace_kvm_hypercall(nr, a0, a1, a2, a3);
8536
8537         op_64_bit = is_64_bit_mode(vcpu);
8538         if (!op_64_bit) {
8539                 nr &= 0xFFFFFFFF;
8540                 a0 &= 0xFFFFFFFF;
8541                 a1 &= 0xFFFFFFFF;
8542                 a2 &= 0xFFFFFFFF;
8543                 a3 &= 0xFFFFFFFF;
8544         }
8545
8546         if (static_call(kvm_x86_get_cpl)(vcpu) != 0) {
8547                 ret = -KVM_EPERM;
8548                 goto out;
8549         }
8550
8551         ret = -KVM_ENOSYS;
8552
8553         switch (nr) {
8554         case KVM_HC_VAPIC_POLL_IRQ:
8555                 ret = 0;
8556                 break;
8557         case KVM_HC_KICK_CPU:
8558                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_UNHALT))
8559                         break;
8560
8561                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
8562                 kvm_sched_yield(vcpu, a1);
8563                 ret = 0;
8564                 break;
8565 #ifdef CONFIG_X86_64
8566         case KVM_HC_CLOCK_PAIRING:
8567                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
8568                 break;
8569 #endif
8570         case KVM_HC_SEND_IPI:
8571                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SEND_IPI))
8572                         break;
8573
8574                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
8575                 break;
8576         case KVM_HC_SCHED_YIELD:
8577                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SCHED_YIELD))
8578                         break;
8579
8580                 kvm_sched_yield(vcpu, a0);
8581                 ret = 0;
8582                 break;
8583         default:
8584                 ret = -KVM_ENOSYS;
8585                 break;
8586         }
8587 out:
8588         if (!op_64_bit)
8589                 ret = (u32)ret;
8590         kvm_rax_write(vcpu, ret);
8591
8592         ++vcpu->stat.hypercalls;
8593         return kvm_skip_emulated_instruction(vcpu);
8594 }
8595 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
8596
8597 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
8598 {
8599         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8600         char instruction[3];
8601         unsigned long rip = kvm_rip_read(vcpu);
8602
8603         static_call(kvm_x86_patch_hypercall)(vcpu, instruction);
8604
8605         return emulator_write_emulated(ctxt, rip, instruction, 3,
8606                 &ctxt->exception);
8607 }
8608
8609 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
8610 {
8611         return vcpu->run->request_interrupt_window &&
8612                 likely(!pic_in_kernel(vcpu->kvm));
8613 }
8614
8615 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
8616 {
8617         struct kvm_run *kvm_run = vcpu->run;
8618
8619         /*
8620          * if_flag is obsolete and useless, so do not bother
8621          * setting it for SEV-ES guests.  Userspace can just
8622          * use kvm_run->ready_for_interrupt_injection.
8623          */
8624         kvm_run->if_flag = !vcpu->arch.guest_state_protected
8625                 && (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
8626
8627         kvm_run->cr8 = kvm_get_cr8(vcpu);
8628         kvm_run->apic_base = kvm_get_apic_base(vcpu);
8629         kvm_run->ready_for_interrupt_injection =
8630                 pic_in_kernel(vcpu->kvm) ||
8631                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
8632
8633         if (is_smm(vcpu))
8634                 kvm_run->flags |= KVM_RUN_X86_SMM;
8635 }
8636
8637 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
8638 {
8639         int max_irr, tpr;
8640
8641         if (!kvm_x86_ops.update_cr8_intercept)
8642                 return;
8643
8644         if (!lapic_in_kernel(vcpu))
8645                 return;
8646
8647         if (vcpu->arch.apicv_active)
8648                 return;
8649
8650         if (!vcpu->arch.apic->vapic_addr)
8651                 max_irr = kvm_lapic_find_highest_irr(vcpu);
8652         else
8653                 max_irr = -1;
8654
8655         if (max_irr != -1)
8656                 max_irr >>= 4;
8657
8658         tpr = kvm_lapic_get_cr8(vcpu);
8659
8660         static_call(kvm_x86_update_cr8_intercept)(vcpu, tpr, max_irr);
8661 }
8662
8663
8664 int kvm_check_nested_events(struct kvm_vcpu *vcpu)
8665 {
8666         if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
8667                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
8668                 return 1;
8669         }
8670
8671         return kvm_x86_ops.nested_ops->check_events(vcpu);
8672 }
8673
8674 static void kvm_inject_exception(struct kvm_vcpu *vcpu)
8675 {
8676         if (vcpu->arch.exception.error_code && !is_protmode(vcpu))
8677                 vcpu->arch.exception.error_code = false;
8678         static_call(kvm_x86_queue_exception)(vcpu);
8679 }
8680
8681 static int inject_pending_event(struct kvm_vcpu *vcpu, bool *req_immediate_exit)
8682 {
8683         int r;
8684         bool can_inject = true;
8685
8686         /* try to reinject previous events if any */
8687
8688         if (vcpu->arch.exception.injected) {
8689                 kvm_inject_exception(vcpu);
8690                 can_inject = false;
8691         }
8692         /*
8693          * Do not inject an NMI or interrupt if there is a pending
8694          * exception.  Exceptions and interrupts are recognized at
8695          * instruction boundaries, i.e. the start of an instruction.
8696          * Trap-like exceptions, e.g. #DB, have higher priority than
8697          * NMIs and interrupts, i.e. traps are recognized before an
8698          * NMI/interrupt that's pending on the same instruction.
8699          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
8700          * priority, but are only generated (pended) during instruction
8701          * execution, i.e. a pending fault-like exception means the
8702          * fault occurred on the *previous* instruction and must be
8703          * serviced prior to recognizing any new events in order to
8704          * fully complete the previous instruction.
8705          */
8706         else if (!vcpu->arch.exception.pending) {
8707                 if (vcpu->arch.nmi_injected) {
8708                         static_call(kvm_x86_set_nmi)(vcpu);
8709                         can_inject = false;
8710                 } else if (vcpu->arch.interrupt.injected) {
8711                         static_call(kvm_x86_set_irq)(vcpu);
8712                         can_inject = false;
8713                 }
8714         }
8715
8716         WARN_ON_ONCE(vcpu->arch.exception.injected &&
8717                      vcpu->arch.exception.pending);
8718
8719         /*
8720          * Call check_nested_events() even if we reinjected a previous event
8721          * in order for caller to determine if it should require immediate-exit
8722          * from L2 to L1 due to pending L1 events which require exit
8723          * from L2 to L1.
8724          */
8725         if (is_guest_mode(vcpu)) {
8726                 r = kvm_check_nested_events(vcpu);
8727                 if (r < 0)
8728                         goto out;
8729         }
8730
8731         /* try to inject new event if pending */
8732         if (vcpu->arch.exception.pending) {
8733                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
8734                                         vcpu->arch.exception.has_error_code,
8735                                         vcpu->arch.exception.error_code);
8736
8737                 vcpu->arch.exception.pending = false;
8738                 vcpu->arch.exception.injected = true;
8739
8740                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
8741                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
8742                                              X86_EFLAGS_RF);
8743
8744                 if (vcpu->arch.exception.nr == DB_VECTOR) {
8745                         kvm_deliver_exception_payload(vcpu);
8746                         if (vcpu->arch.dr7 & DR7_GD) {
8747                                 vcpu->arch.dr7 &= ~DR7_GD;
8748                                 kvm_update_dr7(vcpu);
8749                         }
8750                 }
8751
8752                 kvm_inject_exception(vcpu);
8753                 can_inject = false;
8754         }
8755
8756         /*
8757          * Finally, inject interrupt events.  If an event cannot be injected
8758          * due to architectural conditions (e.g. IF=0) a window-open exit
8759          * will re-request KVM_REQ_EVENT.  Sometimes however an event is pending
8760          * and can architecturally be injected, but we cannot do it right now:
8761          * an interrupt could have arrived just now and we have to inject it
8762          * as a vmexit, or there could already an event in the queue, which is
8763          * indicated by can_inject.  In that case we request an immediate exit
8764          * in order to make progress and get back here for another iteration.
8765          * The kvm_x86_ops hooks communicate this by returning -EBUSY.
8766          */
8767         if (vcpu->arch.smi_pending) {
8768                 r = can_inject ? static_call(kvm_x86_smi_allowed)(vcpu, true) : -EBUSY;
8769                 if (r < 0)
8770                         goto out;
8771                 if (r) {
8772                         vcpu->arch.smi_pending = false;
8773                         ++vcpu->arch.smi_count;
8774                         enter_smm(vcpu);
8775                         can_inject = false;
8776                 } else
8777                         static_call(kvm_x86_enable_smi_window)(vcpu);
8778         }
8779
8780         if (vcpu->arch.nmi_pending) {
8781                 r = can_inject ? static_call(kvm_x86_nmi_allowed)(vcpu, true) : -EBUSY;
8782                 if (r < 0)
8783                         goto out;
8784                 if (r) {
8785                         --vcpu->arch.nmi_pending;
8786                         vcpu->arch.nmi_injected = true;
8787                         static_call(kvm_x86_set_nmi)(vcpu);
8788                         can_inject = false;
8789                         WARN_ON(static_call(kvm_x86_nmi_allowed)(vcpu, true) < 0);
8790                 }
8791                 if (vcpu->arch.nmi_pending)
8792                         static_call(kvm_x86_enable_nmi_window)(vcpu);
8793         }
8794
8795         if (kvm_cpu_has_injectable_intr(vcpu)) {
8796                 r = can_inject ? static_call(kvm_x86_interrupt_allowed)(vcpu, true) : -EBUSY;
8797                 if (r < 0)
8798                         goto out;
8799                 if (r) {
8800                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu), false);
8801                         static_call(kvm_x86_set_irq)(vcpu);
8802                         WARN_ON(static_call(kvm_x86_interrupt_allowed)(vcpu, true) < 0);
8803                 }
8804                 if (kvm_cpu_has_injectable_intr(vcpu))
8805                         static_call(kvm_x86_enable_irq_window)(vcpu);
8806         }
8807
8808         if (is_guest_mode(vcpu) &&
8809             kvm_x86_ops.nested_ops->hv_timer_pending &&
8810             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
8811                 *req_immediate_exit = true;
8812
8813         WARN_ON(vcpu->arch.exception.pending);
8814         return 0;
8815
8816 out:
8817         if (r == -EBUSY) {
8818                 *req_immediate_exit = true;
8819                 r = 0;
8820         }
8821         return r;
8822 }
8823
8824 static void process_nmi(struct kvm_vcpu *vcpu)
8825 {
8826         unsigned limit = 2;
8827
8828         /*
8829          * x86 is limited to one NMI running, and one NMI pending after it.
8830          * If an NMI is already in progress, limit further NMIs to just one.
8831          * Otherwise, allow two (and we'll inject the first one immediately).
8832          */
8833         if (static_call(kvm_x86_get_nmi_mask)(vcpu) || vcpu->arch.nmi_injected)
8834                 limit = 1;
8835
8836         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
8837         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
8838         kvm_make_request(KVM_REQ_EVENT, vcpu);
8839 }
8840
8841 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
8842 {
8843         u32 flags = 0;
8844         flags |= seg->g       << 23;
8845         flags |= seg->db      << 22;
8846         flags |= seg->l       << 21;
8847         flags |= seg->avl     << 20;
8848         flags |= seg->present << 15;
8849         flags |= seg->dpl     << 13;
8850         flags |= seg->s       << 12;
8851         flags |= seg->type    << 8;
8852         return flags;
8853 }
8854
8855 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
8856 {
8857         struct kvm_segment seg;
8858         int offset;
8859
8860         kvm_get_segment(vcpu, &seg, n);
8861         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
8862
8863         if (n < 3)
8864                 offset = 0x7f84 + n * 12;
8865         else
8866                 offset = 0x7f2c + (n - 3) * 12;
8867
8868         put_smstate(u32, buf, offset + 8, seg.base);
8869         put_smstate(u32, buf, offset + 4, seg.limit);
8870         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
8871 }
8872
8873 #ifdef CONFIG_X86_64
8874 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
8875 {
8876         struct kvm_segment seg;
8877         int offset;
8878         u16 flags;
8879
8880         kvm_get_segment(vcpu, &seg, n);
8881         offset = 0x7e00 + n * 16;
8882
8883         flags = enter_smm_get_segment_flags(&seg) >> 8;
8884         put_smstate(u16, buf, offset, seg.selector);
8885         put_smstate(u16, buf, offset + 2, flags);
8886         put_smstate(u32, buf, offset + 4, seg.limit);
8887         put_smstate(u64, buf, offset + 8, seg.base);
8888 }
8889 #endif
8890
8891 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
8892 {
8893         struct desc_ptr dt;
8894         struct kvm_segment seg;
8895         unsigned long val;
8896         int i;
8897
8898         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
8899         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
8900         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
8901         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
8902
8903         for (i = 0; i < 8; i++)
8904                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read_raw(vcpu, i));
8905
8906         kvm_get_dr(vcpu, 6, &val);
8907         put_smstate(u32, buf, 0x7fcc, (u32)val);
8908         kvm_get_dr(vcpu, 7, &val);
8909         put_smstate(u32, buf, 0x7fc8, (u32)val);
8910
8911         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
8912         put_smstate(u32, buf, 0x7fc4, seg.selector);
8913         put_smstate(u32, buf, 0x7f64, seg.base);
8914         put_smstate(u32, buf, 0x7f60, seg.limit);
8915         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
8916
8917         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
8918         put_smstate(u32, buf, 0x7fc0, seg.selector);
8919         put_smstate(u32, buf, 0x7f80, seg.base);
8920         put_smstate(u32, buf, 0x7f7c, seg.limit);
8921         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
8922
8923         static_call(kvm_x86_get_gdt)(vcpu, &dt);
8924         put_smstate(u32, buf, 0x7f74, dt.address);
8925         put_smstate(u32, buf, 0x7f70, dt.size);
8926
8927         static_call(kvm_x86_get_idt)(vcpu, &dt);
8928         put_smstate(u32, buf, 0x7f58, dt.address);
8929         put_smstate(u32, buf, 0x7f54, dt.size);
8930
8931         for (i = 0; i < 6; i++)
8932                 enter_smm_save_seg_32(vcpu, buf, i);
8933
8934         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
8935
8936         /* revision id */
8937         put_smstate(u32, buf, 0x7efc, 0x00020000);
8938         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
8939 }
8940
8941 #ifdef CONFIG_X86_64
8942 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
8943 {
8944         struct desc_ptr dt;
8945         struct kvm_segment seg;
8946         unsigned long val;
8947         int i;
8948
8949         for (i = 0; i < 16; i++)
8950                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read_raw(vcpu, i));
8951
8952         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
8953         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
8954
8955         kvm_get_dr(vcpu, 6, &val);
8956         put_smstate(u64, buf, 0x7f68, val);
8957         kvm_get_dr(vcpu, 7, &val);
8958         put_smstate(u64, buf, 0x7f60, val);
8959
8960         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
8961         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
8962         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
8963
8964         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
8965
8966         /* revision id */
8967         put_smstate(u32, buf, 0x7efc, 0x00020064);
8968
8969         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
8970
8971         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
8972         put_smstate(u16, buf, 0x7e90, seg.selector);
8973         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
8974         put_smstate(u32, buf, 0x7e94, seg.limit);
8975         put_smstate(u64, buf, 0x7e98, seg.base);
8976
8977         static_call(kvm_x86_get_idt)(vcpu, &dt);
8978         put_smstate(u32, buf, 0x7e84, dt.size);
8979         put_smstate(u64, buf, 0x7e88, dt.address);
8980
8981         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
8982         put_smstate(u16, buf, 0x7e70, seg.selector);
8983         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
8984         put_smstate(u32, buf, 0x7e74, seg.limit);
8985         put_smstate(u64, buf, 0x7e78, seg.base);
8986
8987         static_call(kvm_x86_get_gdt)(vcpu, &dt);
8988         put_smstate(u32, buf, 0x7e64, dt.size);
8989         put_smstate(u64, buf, 0x7e68, dt.address);
8990
8991         for (i = 0; i < 6; i++)
8992                 enter_smm_save_seg_64(vcpu, buf, i);
8993 }
8994 #endif
8995
8996 static void enter_smm(struct kvm_vcpu *vcpu)
8997 {
8998         struct kvm_segment cs, ds;
8999         struct desc_ptr dt;
9000         char buf[512];
9001         u32 cr0;
9002
9003         memset(buf, 0, 512);
9004 #ifdef CONFIG_X86_64
9005         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9006                 enter_smm_save_state_64(vcpu, buf);
9007         else
9008 #endif
9009                 enter_smm_save_state_32(vcpu, buf);
9010
9011         /*
9012          * Give enter_smm() a chance to make ISA-specific changes to the vCPU
9013          * state (e.g. leave guest mode) after we've saved the state into the
9014          * SMM state-save area.
9015          */
9016         static_call(kvm_x86_enter_smm)(vcpu, buf);
9017
9018         kvm_smm_changed(vcpu, true);
9019         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
9020
9021         if (static_call(kvm_x86_get_nmi_mask)(vcpu))
9022                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
9023         else
9024                 static_call(kvm_x86_set_nmi_mask)(vcpu, true);
9025
9026         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
9027         kvm_rip_write(vcpu, 0x8000);
9028
9029         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
9030         static_call(kvm_x86_set_cr0)(vcpu, cr0);
9031         vcpu->arch.cr0 = cr0;
9032
9033         static_call(kvm_x86_set_cr4)(vcpu, 0);
9034
9035         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
9036         dt.address = dt.size = 0;
9037         static_call(kvm_x86_set_idt)(vcpu, &dt);
9038
9039         kvm_set_dr(vcpu, 7, DR7_FIXED_1);
9040
9041         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
9042         cs.base = vcpu->arch.smbase;
9043
9044         ds.selector = 0;
9045         ds.base = 0;
9046
9047         cs.limit    = ds.limit = 0xffffffff;
9048         cs.type     = ds.type = 0x3;
9049         cs.dpl      = ds.dpl = 0;
9050         cs.db       = ds.db = 0;
9051         cs.s        = ds.s = 1;
9052         cs.l        = ds.l = 0;
9053         cs.g        = ds.g = 1;
9054         cs.avl      = ds.avl = 0;
9055         cs.present  = ds.present = 1;
9056         cs.unusable = ds.unusable = 0;
9057         cs.padding  = ds.padding = 0;
9058
9059         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
9060         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
9061         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
9062         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
9063         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
9064         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
9065
9066 #ifdef CONFIG_X86_64
9067         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9068                 static_call(kvm_x86_set_efer)(vcpu, 0);
9069 #endif
9070
9071         kvm_update_cpuid_runtime(vcpu);
9072         kvm_mmu_reset_context(vcpu);
9073 }
9074
9075 static void process_smi(struct kvm_vcpu *vcpu)
9076 {
9077         vcpu->arch.smi_pending = true;
9078         kvm_make_request(KVM_REQ_EVENT, vcpu);
9079 }
9080
9081 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
9082                                        unsigned long *vcpu_bitmap)
9083 {
9084         cpumask_var_t cpus;
9085
9086         zalloc_cpumask_var(&cpus, GFP_ATOMIC);
9087
9088         kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC,
9089                                     NULL, vcpu_bitmap, cpus);
9090
9091         free_cpumask_var(cpus);
9092 }
9093
9094 void kvm_make_scan_ioapic_request(struct kvm *kvm)
9095 {
9096         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
9097 }
9098
9099 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
9100 {
9101         if (!lapic_in_kernel(vcpu))
9102                 return;
9103
9104         vcpu->arch.apicv_active = kvm_apicv_activated(vcpu->kvm);
9105         kvm_apic_update_apicv(vcpu);
9106         static_call(kvm_x86_refresh_apicv_exec_ctrl)(vcpu);
9107 }
9108 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv);
9109
9110 /*
9111  * NOTE: Do not hold any lock prior to calling this.
9112  *
9113  * In particular, kvm_request_apicv_update() expects kvm->srcu not to be
9114  * locked, because it calls __x86_set_memory_region() which does
9115  * synchronize_srcu(&kvm->srcu).
9116  */
9117 void kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
9118 {
9119         struct kvm_vcpu *except;
9120         unsigned long old, new, expected;
9121
9122         if (!kvm_x86_ops.check_apicv_inhibit_reasons ||
9123             !static_call(kvm_x86_check_apicv_inhibit_reasons)(bit))
9124                 return;
9125
9126         old = READ_ONCE(kvm->arch.apicv_inhibit_reasons);
9127         do {
9128                 expected = new = old;
9129                 if (activate)
9130                         __clear_bit(bit, &new);
9131                 else
9132                         __set_bit(bit, &new);
9133                 if (new == old)
9134                         break;
9135                 old = cmpxchg(&kvm->arch.apicv_inhibit_reasons, expected, new);
9136         } while (old != expected);
9137
9138         if (!!old == !!new)
9139                 return;
9140
9141         trace_kvm_apicv_update_request(activate, bit);
9142         if (kvm_x86_ops.pre_update_apicv_exec_ctrl)
9143                 static_call(kvm_x86_pre_update_apicv_exec_ctrl)(kvm, activate);
9144
9145         /*
9146          * Sending request to update APICV for all other vcpus,
9147          * while update the calling vcpu immediately instead of
9148          * waiting for another #VMEXIT to handle the request.
9149          */
9150         except = kvm_get_running_vcpu();
9151         kvm_make_all_cpus_request_except(kvm, KVM_REQ_APICV_UPDATE,
9152                                          except);
9153         if (except)
9154                 kvm_vcpu_update_apicv(except);
9155 }
9156 EXPORT_SYMBOL_GPL(kvm_request_apicv_update);
9157
9158 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
9159 {
9160         if (!kvm_apic_present(vcpu))
9161                 return;
9162
9163         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
9164
9165         if (irqchip_split(vcpu->kvm))
9166                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
9167         else {
9168                 if (vcpu->arch.apicv_active)
9169                         static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9170                 if (ioapic_in_kernel(vcpu->kvm))
9171                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
9172         }
9173
9174         if (is_guest_mode(vcpu))
9175                 vcpu->arch.load_eoi_exitmap_pending = true;
9176         else
9177                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
9178 }
9179
9180 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
9181 {
9182         u64 eoi_exit_bitmap[4];
9183
9184         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
9185                 return;
9186
9187         if (to_hv_vcpu(vcpu))
9188                 bitmap_or((ulong *)eoi_exit_bitmap,
9189                           vcpu->arch.ioapic_handled_vectors,
9190                           to_hv_synic(vcpu)->vec_bitmap, 256);
9191
9192         static_call(kvm_x86_load_eoi_exitmap)(vcpu, eoi_exit_bitmap);
9193 }
9194
9195 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
9196                                             unsigned long start, unsigned long end)
9197 {
9198         unsigned long apic_address;
9199
9200         /*
9201          * The physical address of apic access page is stored in the VMCS.
9202          * Update it when it becomes invalid.
9203          */
9204         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
9205         if (start <= apic_address && apic_address < end)
9206                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
9207 }
9208
9209 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
9210 {
9211         if (!lapic_in_kernel(vcpu))
9212                 return;
9213
9214         if (!kvm_x86_ops.set_apic_access_page_addr)
9215                 return;
9216
9217         static_call(kvm_x86_set_apic_access_page_addr)(vcpu);
9218 }
9219
9220 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
9221 {
9222         smp_send_reschedule(vcpu->cpu);
9223 }
9224 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
9225
9226 /*
9227  * Returns 1 to let vcpu_run() continue the guest execution loop without
9228  * exiting to the userspace.  Otherwise, the value will be returned to the
9229  * userspace.
9230  */
9231 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
9232 {
9233         int r;
9234         bool req_int_win =
9235                 dm_request_for_irq_injection(vcpu) &&
9236                 kvm_cpu_accept_dm_intr(vcpu);
9237         fastpath_t exit_fastpath;
9238
9239         bool req_immediate_exit = false;
9240
9241         /* Forbid vmenter if vcpu dirty ring is soft-full */
9242         if (unlikely(vcpu->kvm->dirty_ring_size &&
9243                      kvm_dirty_ring_soft_full(&vcpu->dirty_ring))) {
9244                 vcpu->run->exit_reason = KVM_EXIT_DIRTY_RING_FULL;
9245                 trace_kvm_dirty_ring_exit(vcpu);
9246                 r = 0;
9247                 goto out;
9248         }
9249
9250         if (kvm_request_pending(vcpu)) {
9251                 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu)) {
9252                         if (unlikely(!kvm_x86_ops.nested_ops->get_nested_state_pages(vcpu))) {
9253                                 r = 0;
9254                                 goto out;
9255                         }
9256                 }
9257                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
9258                         kvm_mmu_unload(vcpu);
9259                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
9260                         __kvm_migrate_timers(vcpu);
9261                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
9262                         kvm_gen_update_masterclock(vcpu->kvm);
9263                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
9264                         kvm_gen_kvmclock_update(vcpu);
9265                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
9266                         r = kvm_guest_time_update(vcpu);
9267                         if (unlikely(r))
9268                                 goto out;
9269                 }
9270                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
9271                         kvm_mmu_sync_roots(vcpu);
9272                 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD, vcpu))
9273                         kvm_mmu_load_pgd(vcpu);
9274                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) {
9275                         kvm_vcpu_flush_tlb_all(vcpu);
9276
9277                         /* Flushing all ASIDs flushes the current ASID... */
9278                         kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
9279                 }
9280                 if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu))
9281                         kvm_vcpu_flush_tlb_current(vcpu);
9282                 if (kvm_check_request(KVM_REQ_HV_TLB_FLUSH, vcpu))
9283                         kvm_vcpu_flush_tlb_guest(vcpu);
9284
9285                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
9286                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
9287                         r = 0;
9288                         goto out;
9289                 }
9290                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
9291                         if (is_guest_mode(vcpu)) {
9292                                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
9293                         } else {
9294                                 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
9295                                 vcpu->mmio_needed = 0;
9296                                 r = 0;
9297                                 goto out;
9298                         }
9299                 }
9300                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
9301                         /* Page is swapped out. Do synthetic halt */
9302                         vcpu->arch.apf.halted = true;
9303                         r = 1;
9304                         goto out;
9305                 }
9306                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
9307                         record_steal_time(vcpu);
9308                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
9309                         process_smi(vcpu);
9310                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
9311                         process_nmi(vcpu);
9312                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
9313                         kvm_pmu_handle_event(vcpu);
9314                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
9315                         kvm_pmu_deliver_pmi(vcpu);
9316                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
9317                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
9318                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
9319                                      vcpu->arch.ioapic_handled_vectors)) {
9320                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
9321                                 vcpu->run->eoi.vector =
9322                                                 vcpu->arch.pending_ioapic_eoi;
9323                                 r = 0;
9324                                 goto out;
9325                         }
9326                 }
9327                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
9328                         vcpu_scan_ioapic(vcpu);
9329                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
9330                         vcpu_load_eoi_exitmap(vcpu);
9331                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
9332                         kvm_vcpu_reload_apic_access_page(vcpu);
9333                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
9334                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9335                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
9336                         r = 0;
9337                         goto out;
9338                 }
9339                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
9340                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9341                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
9342                         r = 0;
9343                         goto out;
9344                 }
9345                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
9346                         struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
9347
9348                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
9349                         vcpu->run->hyperv = hv_vcpu->exit;
9350                         r = 0;
9351                         goto out;
9352                 }
9353
9354                 /*
9355                  * KVM_REQ_HV_STIMER has to be processed after
9356                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
9357                  * depend on the guest clock being up-to-date
9358                  */
9359                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
9360                         kvm_hv_process_stimers(vcpu);
9361                 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
9362                         kvm_vcpu_update_apicv(vcpu);
9363                 if (kvm_check_request(KVM_REQ_APF_READY, vcpu))
9364                         kvm_check_async_pf_completion(vcpu);
9365                 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED, vcpu))
9366                         static_call(kvm_x86_msr_filter_changed)(vcpu);
9367
9368                 if (kvm_check_request(KVM_REQ_UPDATE_CPU_DIRTY_LOGGING, vcpu))
9369                         static_call(kvm_x86_update_cpu_dirty_logging)(vcpu);
9370         }
9371
9372         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win ||
9373             kvm_xen_has_interrupt(vcpu)) {
9374                 ++vcpu->stat.req_event;
9375                 r = kvm_apic_accept_events(vcpu);
9376                 if (r < 0) {
9377                         r = 0;
9378                         goto out;
9379                 }
9380                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
9381                         r = 1;
9382                         goto out;
9383                 }
9384
9385                 r = inject_pending_event(vcpu, &req_immediate_exit);
9386                 if (r < 0) {
9387                         r = 0;
9388                         goto out;
9389                 }
9390                 if (req_int_win)
9391                         static_call(kvm_x86_enable_irq_window)(vcpu);
9392
9393                 if (kvm_lapic_enabled(vcpu)) {
9394                         update_cr8_intercept(vcpu);
9395                         kvm_lapic_sync_to_vapic(vcpu);
9396                 }
9397         }
9398
9399         r = kvm_mmu_reload(vcpu);
9400         if (unlikely(r)) {
9401                 goto cancel_injection;
9402         }
9403
9404         preempt_disable();
9405
9406         static_call(kvm_x86_prepare_guest_switch)(vcpu);
9407
9408         /*
9409          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
9410          * IPI are then delayed after guest entry, which ensures that they
9411          * result in virtual interrupt delivery.
9412          */
9413         local_irq_disable();
9414         vcpu->mode = IN_GUEST_MODE;
9415
9416         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9417
9418         /*
9419          * 1) We should set ->mode before checking ->requests.  Please see
9420          * the comment in kvm_vcpu_exiting_guest_mode().
9421          *
9422          * 2) For APICv, we should set ->mode before checking PID.ON. This
9423          * pairs with the memory barrier implicit in pi_test_and_set_on
9424          * (see vmx_deliver_posted_interrupt).
9425          *
9426          * 3) This also orders the write to mode from any reads to the page
9427          * tables done while the VCPU is running.  Please see the comment
9428          * in kvm_flush_remote_tlbs.
9429          */
9430         smp_mb__after_srcu_read_unlock();
9431
9432         /*
9433          * This handles the case where a posted interrupt was
9434          * notified with kvm_vcpu_kick.
9435          */
9436         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
9437                 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9438
9439         if (kvm_vcpu_exit_request(vcpu)) {
9440                 vcpu->mode = OUTSIDE_GUEST_MODE;
9441                 smp_wmb();
9442                 local_irq_enable();
9443                 preempt_enable();
9444                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9445                 r = 1;
9446                 goto cancel_injection;
9447         }
9448
9449         if (req_immediate_exit) {
9450                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9451                 static_call(kvm_x86_request_immediate_exit)(vcpu);
9452         }
9453
9454         fpregs_assert_state_consistent();
9455         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9456                 switch_fpu_return();
9457
9458         if (unlikely(vcpu->arch.switch_db_regs)) {
9459                 set_debugreg(0, 7);
9460                 set_debugreg(vcpu->arch.eff_db[0], 0);
9461                 set_debugreg(vcpu->arch.eff_db[1], 1);
9462                 set_debugreg(vcpu->arch.eff_db[2], 2);
9463                 set_debugreg(vcpu->arch.eff_db[3], 3);
9464                 set_debugreg(vcpu->arch.dr6, 6);
9465                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
9466         }
9467
9468         for (;;) {
9469                 exit_fastpath = static_call(kvm_x86_run)(vcpu);
9470                 if (likely(exit_fastpath != EXIT_FASTPATH_REENTER_GUEST))
9471                         break;
9472
9473                 if (unlikely(kvm_vcpu_exit_request(vcpu))) {
9474                         exit_fastpath = EXIT_FASTPATH_EXIT_HANDLED;
9475                         break;
9476                 }
9477
9478                 if (vcpu->arch.apicv_active)
9479                         static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9480         }
9481
9482         /*
9483          * Do this here before restoring debug registers on the host.  And
9484          * since we do this before handling the vmexit, a DR access vmexit
9485          * can (a) read the correct value of the debug registers, (b) set
9486          * KVM_DEBUGREG_WONT_EXIT again.
9487          */
9488         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
9489                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
9490                 static_call(kvm_x86_sync_dirty_debug_regs)(vcpu);
9491                 kvm_update_dr0123(vcpu);
9492                 kvm_update_dr7(vcpu);
9493                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
9494         }
9495
9496         /*
9497          * If the guest has used debug registers, at least dr7
9498          * will be disabled while returning to the host.
9499          * If we don't have active breakpoints in the host, we don't
9500          * care about the messed up debug address registers. But if
9501          * we have some of them active, restore the old state.
9502          */
9503         if (hw_breakpoint_active())
9504                 hw_breakpoint_restore();
9505
9506         vcpu->arch.last_vmentry_cpu = vcpu->cpu;
9507         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
9508
9509         vcpu->mode = OUTSIDE_GUEST_MODE;
9510         smp_wmb();
9511
9512         static_call(kvm_x86_handle_exit_irqoff)(vcpu);
9513
9514         /*
9515          * Consume any pending interrupts, including the possible source of
9516          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
9517          * An instruction is required after local_irq_enable() to fully unblock
9518          * interrupts on processors that implement an interrupt shadow, the
9519          * stat.exits increment will do nicely.
9520          */
9521         kvm_before_interrupt(vcpu);
9522         local_irq_enable();
9523         ++vcpu->stat.exits;
9524         local_irq_disable();
9525         kvm_after_interrupt(vcpu);
9526
9527         /*
9528          * Wait until after servicing IRQs to account guest time so that any
9529          * ticks that occurred while running the guest are properly accounted
9530          * to the guest.  Waiting until IRQs are enabled degrades the accuracy
9531          * of accounting via context tracking, but the loss of accuracy is
9532          * acceptable for all known use cases.
9533          */
9534         vtime_account_guest_exit();
9535
9536         if (lapic_in_kernel(vcpu)) {
9537                 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
9538                 if (delta != S64_MIN) {
9539                         trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
9540                         vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
9541                 }
9542         }
9543
9544         local_irq_enable();
9545         preempt_enable();
9546
9547         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9548
9549         /*
9550          * Profile KVM exit RIPs:
9551          */
9552         if (unlikely(prof_on == KVM_PROFILING)) {
9553                 unsigned long rip = kvm_rip_read(vcpu);
9554                 profile_hit(KVM_PROFILING, (void *)rip);
9555         }
9556
9557         if (unlikely(vcpu->arch.tsc_always_catchup))
9558                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
9559
9560         if (vcpu->arch.apic_attention)
9561                 kvm_lapic_sync_from_vapic(vcpu);
9562
9563         r = static_call(kvm_x86_handle_exit)(vcpu, exit_fastpath);
9564         return r;
9565
9566 cancel_injection:
9567         if (req_immediate_exit)
9568                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9569         static_call(kvm_x86_cancel_injection)(vcpu);
9570         if (unlikely(vcpu->arch.apic_attention))
9571                 kvm_lapic_sync_from_vapic(vcpu);
9572 out:
9573         return r;
9574 }
9575
9576 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
9577 {
9578         if (!kvm_arch_vcpu_runnable(vcpu) &&
9579             (!kvm_x86_ops.pre_block || static_call(kvm_x86_pre_block)(vcpu) == 0)) {
9580                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9581                 kvm_vcpu_block(vcpu);
9582                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9583
9584                 if (kvm_x86_ops.post_block)
9585                         static_call(kvm_x86_post_block)(vcpu);
9586
9587                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
9588                         return 1;
9589         }
9590
9591         if (kvm_apic_accept_events(vcpu) < 0)
9592                 return 0;
9593         switch(vcpu->arch.mp_state) {
9594         case KVM_MP_STATE_HALTED:
9595         case KVM_MP_STATE_AP_RESET_HOLD:
9596                 vcpu->arch.pv.pv_unhalted = false;
9597                 vcpu->arch.mp_state =
9598                         KVM_MP_STATE_RUNNABLE;
9599                 fallthrough;
9600         case KVM_MP_STATE_RUNNABLE:
9601                 vcpu->arch.apf.halted = false;
9602                 break;
9603         case KVM_MP_STATE_INIT_RECEIVED:
9604                 break;
9605         default:
9606                 return -EINTR;
9607         }
9608         return 1;
9609 }
9610
9611 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
9612 {
9613         if (is_guest_mode(vcpu))
9614                 kvm_check_nested_events(vcpu);
9615
9616         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
9617                 !vcpu->arch.apf.halted);
9618 }
9619
9620 static int vcpu_run(struct kvm_vcpu *vcpu)
9621 {
9622         int r;
9623         struct kvm *kvm = vcpu->kvm;
9624
9625         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9626         vcpu->arch.l1tf_flush_l1d = true;
9627
9628         for (;;) {
9629                 if (kvm_vcpu_running(vcpu)) {
9630                         r = vcpu_enter_guest(vcpu);
9631                 } else {
9632                         r = vcpu_block(kvm, vcpu);
9633                 }
9634
9635                 if (r <= 0)
9636                         break;
9637
9638                 kvm_clear_request(KVM_REQ_UNBLOCK, vcpu);
9639                 if (kvm_cpu_has_pending_timer(vcpu))
9640                         kvm_inject_pending_timer_irqs(vcpu);
9641
9642                 if (dm_request_for_irq_injection(vcpu) &&
9643                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
9644                         r = 0;
9645                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
9646                         ++vcpu->stat.request_irq_exits;
9647                         break;
9648                 }
9649
9650                 if (__xfer_to_guest_mode_work_pending()) {
9651                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9652                         r = xfer_to_guest_mode_handle_work(vcpu);
9653                         if (r)
9654                                 return r;
9655                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9656                 }
9657         }
9658
9659         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9660
9661         return r;
9662 }
9663
9664 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
9665 {
9666         int r;
9667
9668         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9669         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
9670         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9671         return r;
9672 }
9673
9674 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
9675 {
9676         BUG_ON(!vcpu->arch.pio.count);
9677
9678         return complete_emulated_io(vcpu);
9679 }
9680
9681 /*
9682  * Implements the following, as a state machine:
9683  *
9684  * read:
9685  *   for each fragment
9686  *     for each mmio piece in the fragment
9687  *       write gpa, len
9688  *       exit
9689  *       copy data
9690  *   execute insn
9691  *
9692  * write:
9693  *   for each fragment
9694  *     for each mmio piece in the fragment
9695  *       write gpa, len
9696  *       copy data
9697  *       exit
9698  */
9699 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
9700 {
9701         struct kvm_run *run = vcpu->run;
9702         struct kvm_mmio_fragment *frag;
9703         unsigned len;
9704
9705         BUG_ON(!vcpu->mmio_needed);
9706
9707         /* Complete previous fragment */
9708         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
9709         len = min(8u, frag->len);
9710         if (!vcpu->mmio_is_write)
9711                 memcpy(frag->data, run->mmio.data, len);
9712
9713         if (frag->len <= 8) {
9714                 /* Switch to the next fragment. */
9715                 frag++;
9716                 vcpu->mmio_cur_fragment++;
9717         } else {
9718                 /* Go forward to the next mmio piece. */
9719                 frag->data += len;
9720                 frag->gpa += len;
9721                 frag->len -= len;
9722         }
9723
9724         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
9725                 vcpu->mmio_needed = 0;
9726
9727                 /* FIXME: return into emulator if single-stepping.  */
9728                 if (vcpu->mmio_is_write)
9729                         return 1;
9730                 vcpu->mmio_read_completed = 1;
9731                 return complete_emulated_io(vcpu);
9732         }
9733
9734         run->exit_reason = KVM_EXIT_MMIO;
9735         run->mmio.phys_addr = frag->gpa;
9736         if (vcpu->mmio_is_write)
9737                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
9738         run->mmio.len = min(8u, frag->len);
9739         run->mmio.is_write = vcpu->mmio_is_write;
9740         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
9741         return 0;
9742 }
9743
9744 static void kvm_save_current_fpu(struct fpu *fpu)
9745 {
9746         /*
9747          * If the target FPU state is not resident in the CPU registers, just
9748          * memcpy() from current, else save CPU state directly to the target.
9749          */
9750         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9751                 memcpy(&fpu->state, &current->thread.fpu.state,
9752                        fpu_kernel_xstate_size);
9753         else
9754                 copy_fpregs_to_fpstate(fpu);
9755 }
9756
9757 /* Swap (qemu) user FPU context for the guest FPU context. */
9758 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
9759 {
9760         fpregs_lock();
9761
9762         kvm_save_current_fpu(vcpu->arch.user_fpu);
9763
9764         /*
9765          * Guests with protected state can't have it set by the hypervisor,
9766          * so skip trying to set it.
9767          */
9768         if (vcpu->arch.guest_fpu)
9769                 /* PKRU is separately restored in kvm_x86_ops.run. */
9770                 __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu->state,
9771                                         ~XFEATURE_MASK_PKRU);
9772
9773         fpregs_mark_activate();
9774         fpregs_unlock();
9775
9776         trace_kvm_fpu(1);
9777 }
9778
9779 /* When vcpu_run ends, restore user space FPU context. */
9780 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
9781 {
9782         fpregs_lock();
9783
9784         /*
9785          * Guests with protected state can't have it read by the hypervisor,
9786          * so skip trying to save it.
9787          */
9788         if (vcpu->arch.guest_fpu)
9789                 kvm_save_current_fpu(vcpu->arch.guest_fpu);
9790
9791         copy_kernel_to_fpregs(&vcpu->arch.user_fpu->state);
9792
9793         fpregs_mark_activate();
9794         fpregs_unlock();
9795
9796         ++vcpu->stat.fpu_reload;
9797         trace_kvm_fpu(0);
9798 }
9799
9800 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
9801 {
9802         struct kvm_run *kvm_run = vcpu->run;
9803         int r;
9804
9805         vcpu_load(vcpu);
9806         kvm_sigset_activate(vcpu);
9807         kvm_run->flags = 0;
9808         kvm_load_guest_fpu(vcpu);
9809
9810         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
9811                 if (kvm_run->immediate_exit) {
9812                         r = -EINTR;
9813                         goto out;
9814                 }
9815                 kvm_vcpu_block(vcpu);
9816                 if (kvm_apic_accept_events(vcpu) < 0) {
9817                         r = 0;
9818                         goto out;
9819                 }
9820                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
9821                 r = -EAGAIN;
9822                 if (signal_pending(current)) {
9823                         r = -EINTR;
9824                         kvm_run->exit_reason = KVM_EXIT_INTR;
9825                         ++vcpu->stat.signal_exits;
9826                 }
9827                 goto out;
9828         }
9829
9830         if (kvm_run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
9831                 r = -EINVAL;
9832                 goto out;
9833         }
9834
9835         if (kvm_run->kvm_dirty_regs) {
9836                 r = sync_regs(vcpu);
9837                 if (r != 0)
9838                         goto out;
9839         }
9840
9841         /* re-sync apic's tpr */
9842         if (!lapic_in_kernel(vcpu)) {
9843                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
9844                         r = -EINVAL;
9845                         goto out;
9846                 }
9847         }
9848
9849         if (unlikely(vcpu->arch.complete_userspace_io)) {
9850                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
9851                 vcpu->arch.complete_userspace_io = NULL;
9852                 r = cui(vcpu);
9853                 if (r <= 0)
9854                         goto out;
9855         } else
9856                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
9857
9858         if (kvm_run->immediate_exit)
9859                 r = -EINTR;
9860         else
9861                 r = vcpu_run(vcpu);
9862
9863 out:
9864         kvm_put_guest_fpu(vcpu);
9865         if (kvm_run->kvm_valid_regs)
9866                 store_regs(vcpu);
9867         post_kvm_run_save(vcpu);
9868         kvm_sigset_deactivate(vcpu);
9869
9870         vcpu_put(vcpu);
9871         return r;
9872 }
9873
9874 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9875 {
9876         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
9877                 /*
9878                  * We are here if userspace calls get_regs() in the middle of
9879                  * instruction emulation. Registers state needs to be copied
9880                  * back from emulation context to vcpu. Userspace shouldn't do
9881                  * that usually, but some bad designed PV devices (vmware
9882                  * backdoor interface) need this to work
9883                  */
9884                 emulator_writeback_register_cache(vcpu->arch.emulate_ctxt);
9885                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
9886         }
9887         regs->rax = kvm_rax_read(vcpu);
9888         regs->rbx = kvm_rbx_read(vcpu);
9889         regs->rcx = kvm_rcx_read(vcpu);
9890         regs->rdx = kvm_rdx_read(vcpu);
9891         regs->rsi = kvm_rsi_read(vcpu);
9892         regs->rdi = kvm_rdi_read(vcpu);
9893         regs->rsp = kvm_rsp_read(vcpu);
9894         regs->rbp = kvm_rbp_read(vcpu);
9895 #ifdef CONFIG_X86_64
9896         regs->r8 = kvm_r8_read(vcpu);
9897         regs->r9 = kvm_r9_read(vcpu);
9898         regs->r10 = kvm_r10_read(vcpu);
9899         regs->r11 = kvm_r11_read(vcpu);
9900         regs->r12 = kvm_r12_read(vcpu);
9901         regs->r13 = kvm_r13_read(vcpu);
9902         regs->r14 = kvm_r14_read(vcpu);
9903         regs->r15 = kvm_r15_read(vcpu);
9904 #endif
9905
9906         regs->rip = kvm_rip_read(vcpu);
9907         regs->rflags = kvm_get_rflags(vcpu);
9908 }
9909
9910 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9911 {
9912         vcpu_load(vcpu);
9913         __get_regs(vcpu, regs);
9914         vcpu_put(vcpu);
9915         return 0;
9916 }
9917
9918 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9919 {
9920         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
9921         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
9922
9923         kvm_rax_write(vcpu, regs->rax);
9924         kvm_rbx_write(vcpu, regs->rbx);
9925         kvm_rcx_write(vcpu, regs->rcx);
9926         kvm_rdx_write(vcpu, regs->rdx);
9927         kvm_rsi_write(vcpu, regs->rsi);
9928         kvm_rdi_write(vcpu, regs->rdi);
9929         kvm_rsp_write(vcpu, regs->rsp);
9930         kvm_rbp_write(vcpu, regs->rbp);
9931 #ifdef CONFIG_X86_64
9932         kvm_r8_write(vcpu, regs->r8);
9933         kvm_r9_write(vcpu, regs->r9);
9934         kvm_r10_write(vcpu, regs->r10);
9935         kvm_r11_write(vcpu, regs->r11);
9936         kvm_r12_write(vcpu, regs->r12);
9937         kvm_r13_write(vcpu, regs->r13);
9938         kvm_r14_write(vcpu, regs->r14);
9939         kvm_r15_write(vcpu, regs->r15);
9940 #endif
9941
9942         kvm_rip_write(vcpu, regs->rip);
9943         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
9944
9945         vcpu->arch.exception.pending = false;
9946
9947         kvm_make_request(KVM_REQ_EVENT, vcpu);
9948 }
9949
9950 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9951 {
9952         vcpu_load(vcpu);
9953         __set_regs(vcpu, regs);
9954         vcpu_put(vcpu);
9955         return 0;
9956 }
9957
9958 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
9959 {
9960         struct kvm_segment cs;
9961
9962         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
9963         *db = cs.db;
9964         *l = cs.l;
9965 }
9966 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
9967
9968 static void __get_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9969 {
9970         struct desc_ptr dt;
9971
9972         if (vcpu->arch.guest_state_protected)
9973                 goto skip_protected_regs;
9974
9975         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
9976         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
9977         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
9978         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
9979         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
9980         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
9981
9982         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
9983         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
9984
9985         static_call(kvm_x86_get_idt)(vcpu, &dt);
9986         sregs->idt.limit = dt.size;
9987         sregs->idt.base = dt.address;
9988         static_call(kvm_x86_get_gdt)(vcpu, &dt);
9989         sregs->gdt.limit = dt.size;
9990         sregs->gdt.base = dt.address;
9991
9992         sregs->cr2 = vcpu->arch.cr2;
9993         sregs->cr3 = kvm_read_cr3(vcpu);
9994
9995 skip_protected_regs:
9996         sregs->cr0 = kvm_read_cr0(vcpu);
9997         sregs->cr4 = kvm_read_cr4(vcpu);
9998         sregs->cr8 = kvm_get_cr8(vcpu);
9999         sregs->efer = vcpu->arch.efer;
10000         sregs->apic_base = kvm_get_apic_base(vcpu);
10001 }
10002
10003 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10004 {
10005         __get_sregs_common(vcpu, sregs);
10006
10007         if (vcpu->arch.guest_state_protected)
10008                 return;
10009
10010         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
10011                 set_bit(vcpu->arch.interrupt.nr,
10012                         (unsigned long *)sregs->interrupt_bitmap);
10013 }
10014
10015 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
10016 {
10017         int i;
10018
10019         __get_sregs_common(vcpu, (struct kvm_sregs *)sregs2);
10020
10021         if (vcpu->arch.guest_state_protected)
10022                 return;
10023
10024         if (is_pae_paging(vcpu)) {
10025                 for (i = 0 ; i < 4 ; i++)
10026                         sregs2->pdptrs[i] = kvm_pdptr_read(vcpu, i);
10027                 sregs2->flags |= KVM_SREGS2_FLAGS_PDPTRS_VALID;
10028         }
10029 }
10030
10031 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
10032                                   struct kvm_sregs *sregs)
10033 {
10034         vcpu_load(vcpu);
10035         __get_sregs(vcpu, sregs);
10036         vcpu_put(vcpu);
10037         return 0;
10038 }
10039
10040 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
10041                                     struct kvm_mp_state *mp_state)
10042 {
10043         int r;
10044
10045         vcpu_load(vcpu);
10046         if (kvm_mpx_supported())
10047                 kvm_load_guest_fpu(vcpu);
10048
10049         r = kvm_apic_accept_events(vcpu);
10050         if (r < 0)
10051                 goto out;
10052         r = 0;
10053
10054         if ((vcpu->arch.mp_state == KVM_MP_STATE_HALTED ||
10055              vcpu->arch.mp_state == KVM_MP_STATE_AP_RESET_HOLD) &&
10056             vcpu->arch.pv.pv_unhalted)
10057                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
10058         else
10059                 mp_state->mp_state = vcpu->arch.mp_state;
10060
10061 out:
10062         if (kvm_mpx_supported())
10063                 kvm_put_guest_fpu(vcpu);
10064         vcpu_put(vcpu);
10065         return r;
10066 }
10067
10068 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
10069                                     struct kvm_mp_state *mp_state)
10070 {
10071         int ret = -EINVAL;
10072
10073         vcpu_load(vcpu);
10074
10075         if (!lapic_in_kernel(vcpu) &&
10076             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
10077                 goto out;
10078
10079         /*
10080          * KVM_MP_STATE_INIT_RECEIVED means the processor is in
10081          * INIT state; latched init should be reported using
10082          * KVM_SET_VCPU_EVENTS, so reject it here.
10083          */
10084         if ((kvm_vcpu_latch_init(vcpu) || vcpu->arch.smi_pending) &&
10085             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
10086              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
10087                 goto out;
10088
10089         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
10090                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
10091                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
10092         } else
10093                 vcpu->arch.mp_state = mp_state->mp_state;
10094         kvm_make_request(KVM_REQ_EVENT, vcpu);
10095
10096         ret = 0;
10097 out:
10098         vcpu_put(vcpu);
10099         return ret;
10100 }
10101
10102 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
10103                     int reason, bool has_error_code, u32 error_code)
10104 {
10105         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
10106         int ret;
10107
10108         init_emulate_ctxt(vcpu);
10109
10110         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
10111                                    has_error_code, error_code);
10112         if (ret) {
10113                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
10114                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
10115                 vcpu->run->internal.ndata = 0;
10116                 return 0;
10117         }
10118
10119         kvm_rip_write(vcpu, ctxt->eip);
10120         kvm_set_rflags(vcpu, ctxt->eflags);
10121         return 1;
10122 }
10123 EXPORT_SYMBOL_GPL(kvm_task_switch);
10124
10125 static bool kvm_is_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10126 {
10127         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
10128                 /*
10129                  * When EFER.LME and CR0.PG are set, the processor is in
10130                  * 64-bit mode (though maybe in a 32-bit code segment).
10131                  * CR4.PAE and EFER.LMA must be set.
10132                  */
10133                 if (!(sregs->cr4 & X86_CR4_PAE) || !(sregs->efer & EFER_LMA))
10134                         return false;
10135                 if (kvm_vcpu_is_illegal_gpa(vcpu, sregs->cr3))
10136                         return false;
10137         } else {
10138                 /*
10139                  * Not in 64-bit mode: EFER.LMA is clear and the code
10140                  * segment cannot be 64-bit.
10141                  */
10142                 if (sregs->efer & EFER_LMA || sregs->cs.l)
10143                         return false;
10144         }
10145
10146         return kvm_is_valid_cr4(vcpu, sregs->cr4);
10147 }
10148
10149 static int __set_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs,
10150                 int *mmu_reset_needed, bool update_pdptrs)
10151 {
10152         struct msr_data apic_base_msr;
10153         int idx;
10154         struct desc_ptr dt;
10155
10156         if (!kvm_is_valid_sregs(vcpu, sregs))
10157                 return -EINVAL;
10158
10159         apic_base_msr.data = sregs->apic_base;
10160         apic_base_msr.host_initiated = true;
10161         if (kvm_set_apic_base(vcpu, &apic_base_msr))
10162                 return -EINVAL;
10163
10164         if (vcpu->arch.guest_state_protected)
10165                 return 0;
10166
10167         dt.size = sregs->idt.limit;
10168         dt.address = sregs->idt.base;
10169         static_call(kvm_x86_set_idt)(vcpu, &dt);
10170         dt.size = sregs->gdt.limit;
10171         dt.address = sregs->gdt.base;
10172         static_call(kvm_x86_set_gdt)(vcpu, &dt);
10173
10174         vcpu->arch.cr2 = sregs->cr2;
10175         *mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
10176         vcpu->arch.cr3 = sregs->cr3;
10177         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
10178
10179         kvm_set_cr8(vcpu, sregs->cr8);
10180
10181         *mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
10182         static_call(kvm_x86_set_efer)(vcpu, sregs->efer);
10183
10184         *mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
10185         static_call(kvm_x86_set_cr0)(vcpu, sregs->cr0);
10186         vcpu->arch.cr0 = sregs->cr0;
10187
10188         *mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
10189         static_call(kvm_x86_set_cr4)(vcpu, sregs->cr4);
10190
10191         if (update_pdptrs) {
10192                 idx = srcu_read_lock(&vcpu->kvm->srcu);
10193                 if (is_pae_paging(vcpu)) {
10194                         load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
10195                         *mmu_reset_needed = 1;
10196                 }
10197                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
10198         }
10199
10200         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10201         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10202         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10203         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10204         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10205         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10206
10207         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10208         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10209
10210         update_cr8_intercept(vcpu);
10211
10212         /* Older userspace won't unhalt the vcpu on reset. */
10213         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
10214             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
10215             !is_protmode(vcpu))
10216                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10217
10218         return 0;
10219 }
10220
10221 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10222 {
10223         int pending_vec, max_bits;
10224         int mmu_reset_needed = 0;
10225         int ret = __set_sregs_common(vcpu, sregs, &mmu_reset_needed, true);
10226
10227         if (ret)
10228                 return ret;
10229
10230         if (mmu_reset_needed)
10231                 kvm_mmu_reset_context(vcpu);
10232
10233         max_bits = KVM_NR_INTERRUPTS;
10234         pending_vec = find_first_bit(
10235                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
10236
10237         if (pending_vec < max_bits) {
10238                 kvm_queue_interrupt(vcpu, pending_vec, false);
10239                 pr_debug("Set back pending irq %d\n", pending_vec);
10240                 kvm_make_request(KVM_REQ_EVENT, vcpu);
10241         }
10242         return 0;
10243 }
10244
10245 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
10246 {
10247         int mmu_reset_needed = 0;
10248         bool valid_pdptrs = sregs2->flags & KVM_SREGS2_FLAGS_PDPTRS_VALID;
10249         bool pae = (sregs2->cr0 & X86_CR0_PG) && (sregs2->cr4 & X86_CR4_PAE) &&
10250                 !(sregs2->efer & EFER_LMA);
10251         int i, ret;
10252
10253         if (sregs2->flags & ~KVM_SREGS2_FLAGS_PDPTRS_VALID)
10254                 return -EINVAL;
10255
10256         if (valid_pdptrs && (!pae || vcpu->arch.guest_state_protected))
10257                 return -EINVAL;
10258
10259         ret = __set_sregs_common(vcpu, (struct kvm_sregs *)sregs2,
10260                                  &mmu_reset_needed, !valid_pdptrs);
10261         if (ret)
10262                 return ret;
10263
10264         if (valid_pdptrs) {
10265                 for (i = 0; i < 4 ; i++)
10266                         kvm_pdptr_write(vcpu, i, sregs2->pdptrs[i]);
10267
10268                 kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
10269                 mmu_reset_needed = 1;
10270                 vcpu->arch.pdptrs_from_userspace = true;
10271         }
10272         if (mmu_reset_needed)
10273                 kvm_mmu_reset_context(vcpu);
10274         return 0;
10275 }
10276
10277 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
10278                                   struct kvm_sregs *sregs)
10279 {
10280         int ret;
10281
10282         vcpu_load(vcpu);
10283         ret = __set_sregs(vcpu, sregs);
10284         vcpu_put(vcpu);
10285         return ret;
10286 }
10287
10288 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
10289                                         struct kvm_guest_debug *dbg)
10290 {
10291         unsigned long rflags;
10292         int i, r;
10293
10294         if (vcpu->arch.guest_state_protected)
10295                 return -EINVAL;
10296
10297         vcpu_load(vcpu);
10298
10299         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
10300                 r = -EBUSY;
10301                 if (vcpu->arch.exception.pending)
10302                         goto out;
10303                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
10304                         kvm_queue_exception(vcpu, DB_VECTOR);
10305                 else
10306                         kvm_queue_exception(vcpu, BP_VECTOR);
10307         }
10308
10309         /*
10310          * Read rflags as long as potentially injected trace flags are still
10311          * filtered out.
10312          */
10313         rflags = kvm_get_rflags(vcpu);
10314
10315         vcpu->guest_debug = dbg->control;
10316         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
10317                 vcpu->guest_debug = 0;
10318
10319         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
10320                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
10321                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
10322                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
10323         } else {
10324                 for (i = 0; i < KVM_NR_DB_REGS; i++)
10325                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
10326         }
10327         kvm_update_dr7(vcpu);
10328
10329         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
10330                 vcpu->arch.singlestep_rip = kvm_get_linear_rip(vcpu);
10331
10332         /*
10333          * Trigger an rflags update that will inject or remove the trace
10334          * flags.
10335          */
10336         kvm_set_rflags(vcpu, rflags);
10337
10338         static_call(kvm_x86_update_exception_bitmap)(vcpu);
10339
10340         r = 0;
10341
10342 out:
10343         vcpu_put(vcpu);
10344         return r;
10345 }
10346
10347 /*
10348  * Translate a guest virtual address to a guest physical address.
10349  */
10350 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
10351                                     struct kvm_translation *tr)
10352 {
10353         unsigned long vaddr = tr->linear_address;
10354         gpa_t gpa;
10355         int idx;
10356
10357         vcpu_load(vcpu);
10358
10359         idx = srcu_read_lock(&vcpu->kvm->srcu);
10360         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
10361         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10362         tr->physical_address = gpa;
10363         tr->valid = gpa != UNMAPPED_GVA;
10364         tr->writeable = 1;
10365         tr->usermode = 0;
10366
10367         vcpu_put(vcpu);
10368         return 0;
10369 }
10370
10371 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10372 {
10373         struct fxregs_state *fxsave;
10374
10375         if (!vcpu->arch.guest_fpu)
10376                 return 0;
10377
10378         vcpu_load(vcpu);
10379
10380         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
10381         memcpy(fpu->fpr, fxsave->st_space, 128);
10382         fpu->fcw = fxsave->cwd;
10383         fpu->fsw = fxsave->swd;
10384         fpu->ftwx = fxsave->twd;
10385         fpu->last_opcode = fxsave->fop;
10386         fpu->last_ip = fxsave->rip;
10387         fpu->last_dp = fxsave->rdp;
10388         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
10389
10390         vcpu_put(vcpu);
10391         return 0;
10392 }
10393
10394 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10395 {
10396         struct fxregs_state *fxsave;
10397
10398         if (!vcpu->arch.guest_fpu)
10399                 return 0;
10400
10401         vcpu_load(vcpu);
10402
10403         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
10404
10405         memcpy(fxsave->st_space, fpu->fpr, 128);
10406         fxsave->cwd = fpu->fcw;
10407         fxsave->swd = fpu->fsw;
10408         fxsave->twd = fpu->ftwx;
10409         fxsave->fop = fpu->last_opcode;
10410         fxsave->rip = fpu->last_ip;
10411         fxsave->rdp = fpu->last_dp;
10412         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
10413
10414         vcpu_put(vcpu);
10415         return 0;
10416 }
10417
10418 static void store_regs(struct kvm_vcpu *vcpu)
10419 {
10420         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
10421
10422         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
10423                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
10424
10425         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
10426                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
10427
10428         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
10429                 kvm_vcpu_ioctl_x86_get_vcpu_events(
10430                                 vcpu, &vcpu->run->s.regs.events);
10431 }
10432
10433 static int sync_regs(struct kvm_vcpu *vcpu)
10434 {
10435         if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
10436                 return -EINVAL;
10437
10438         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
10439                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
10440                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
10441         }
10442         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
10443                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
10444                         return -EINVAL;
10445                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
10446         }
10447         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
10448                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
10449                                 vcpu, &vcpu->run->s.regs.events))
10450                         return -EINVAL;
10451                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
10452         }
10453
10454         return 0;
10455 }
10456
10457 static void fx_init(struct kvm_vcpu *vcpu)
10458 {
10459         if (!vcpu->arch.guest_fpu)
10460                 return;
10461
10462         fpstate_init(&vcpu->arch.guest_fpu->state);
10463         if (boot_cpu_has(X86_FEATURE_XSAVES))
10464                 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
10465                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
10466
10467         /*
10468          * Ensure guest xcr0 is valid for loading
10469          */
10470         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10471
10472         vcpu->arch.cr0 |= X86_CR0_ET;
10473 }
10474
10475 void kvm_free_guest_fpu(struct kvm_vcpu *vcpu)
10476 {
10477         if (vcpu->arch.guest_fpu) {
10478                 kmem_cache_free(x86_fpu_cache, vcpu->arch.guest_fpu);
10479                 vcpu->arch.guest_fpu = NULL;
10480         }
10481 }
10482 EXPORT_SYMBOL_GPL(kvm_free_guest_fpu);
10483
10484 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
10485 {
10486         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
10487                 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
10488                              "guest TSC will not be reliable\n");
10489
10490         return 0;
10491 }
10492
10493 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
10494 {
10495         struct page *page;
10496         int r;
10497
10498         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
10499                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10500         else
10501                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
10502
10503         r = kvm_mmu_create(vcpu);
10504         if (r < 0)
10505                 return r;
10506
10507         if (irqchip_in_kernel(vcpu->kvm)) {
10508                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
10509                 if (r < 0)
10510                         goto fail_mmu_destroy;
10511                 if (kvm_apicv_activated(vcpu->kvm))
10512                         vcpu->arch.apicv_active = true;
10513         } else
10514                 static_branch_inc(&kvm_has_noapic_vcpu);
10515
10516         r = -ENOMEM;
10517
10518         page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO);
10519         if (!page)
10520                 goto fail_free_lapic;
10521         vcpu->arch.pio_data = page_address(page);
10522
10523         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
10524                                        GFP_KERNEL_ACCOUNT);
10525         if (!vcpu->arch.mce_banks)
10526                 goto fail_free_pio_data;
10527         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
10528
10529         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
10530                                 GFP_KERNEL_ACCOUNT))
10531                 goto fail_free_mce_banks;
10532
10533         if (!alloc_emulate_ctxt(vcpu))
10534                 goto free_wbinvd_dirty_mask;
10535
10536         vcpu->arch.user_fpu = kmem_cache_zalloc(x86_fpu_cache,
10537                                                 GFP_KERNEL_ACCOUNT);
10538         if (!vcpu->arch.user_fpu) {
10539                 pr_err("kvm: failed to allocate userspace's fpu\n");
10540                 goto free_emulate_ctxt;
10541         }
10542
10543         vcpu->arch.guest_fpu = kmem_cache_zalloc(x86_fpu_cache,
10544                                                  GFP_KERNEL_ACCOUNT);
10545         if (!vcpu->arch.guest_fpu) {
10546                 pr_err("kvm: failed to allocate vcpu's fpu\n");
10547                 goto free_user_fpu;
10548         }
10549         fx_init(vcpu);
10550
10551         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
10552         vcpu->arch.reserved_gpa_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu);
10553
10554         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
10555
10556         kvm_async_pf_hash_reset(vcpu);
10557         kvm_pmu_init(vcpu);
10558
10559         vcpu->arch.pending_external_vector = -1;
10560         vcpu->arch.preempted_in_kernel = false;
10561
10562 #if IS_ENABLED(CONFIG_HYPERV)
10563         vcpu->arch.hv_root_tdp = INVALID_PAGE;
10564 #endif
10565
10566         r = static_call(kvm_x86_vcpu_create)(vcpu);
10567         if (r)
10568                 goto free_guest_fpu;
10569
10570         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
10571         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
10572         kvm_vcpu_mtrr_init(vcpu);
10573         vcpu_load(vcpu);
10574         kvm_set_tsc_khz(vcpu, max_tsc_khz);
10575         kvm_vcpu_reset(vcpu, false);
10576         kvm_init_mmu(vcpu, false);
10577         vcpu_put(vcpu);
10578         return 0;
10579
10580 free_guest_fpu:
10581         kvm_free_guest_fpu(vcpu);
10582 free_user_fpu:
10583         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
10584 free_emulate_ctxt:
10585         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10586 free_wbinvd_dirty_mask:
10587         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10588 fail_free_mce_banks:
10589         kfree(vcpu->arch.mce_banks);
10590 fail_free_pio_data:
10591         free_page((unsigned long)vcpu->arch.pio_data);
10592 fail_free_lapic:
10593         kvm_free_lapic(vcpu);
10594 fail_mmu_destroy:
10595         kvm_mmu_destroy(vcpu);
10596         return r;
10597 }
10598
10599 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
10600 {
10601         struct kvm *kvm = vcpu->kvm;
10602
10603         if (mutex_lock_killable(&vcpu->mutex))
10604                 return;
10605         vcpu_load(vcpu);
10606         kvm_synchronize_tsc(vcpu, 0);
10607         vcpu_put(vcpu);
10608
10609         /* poll control enabled by default */
10610         vcpu->arch.msr_kvm_poll_control = 1;
10611
10612         mutex_unlock(&vcpu->mutex);
10613
10614         if (kvmclock_periodic_sync && vcpu->vcpu_idx == 0)
10615                 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
10616                                                 KVMCLOCK_SYNC_PERIOD);
10617 }
10618
10619 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
10620 {
10621         struct gfn_to_pfn_cache *cache = &vcpu->arch.st.cache;
10622         int idx;
10623
10624         kvm_release_pfn(cache->pfn, cache->dirty, cache);
10625
10626         kvmclock_reset(vcpu);
10627
10628         static_call(kvm_x86_vcpu_free)(vcpu);
10629
10630         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10631         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10632         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
10633         kvm_free_guest_fpu(vcpu);
10634
10635         kvm_hv_vcpu_uninit(vcpu);
10636         kvm_pmu_destroy(vcpu);
10637         kfree(vcpu->arch.mce_banks);
10638         kvm_free_lapic(vcpu);
10639         idx = srcu_read_lock(&vcpu->kvm->srcu);
10640         kvm_mmu_destroy(vcpu);
10641         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10642         free_page((unsigned long)vcpu->arch.pio_data);
10643         kvfree(vcpu->arch.cpuid_entries);
10644         if (!lapic_in_kernel(vcpu))
10645                 static_branch_dec(&kvm_has_noapic_vcpu);
10646 }
10647
10648 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
10649 {
10650         kvm_lapic_reset(vcpu, init_event);
10651
10652         vcpu->arch.hflags = 0;
10653
10654         vcpu->arch.smi_pending = 0;
10655         vcpu->arch.smi_count = 0;
10656         atomic_set(&vcpu->arch.nmi_queued, 0);
10657         vcpu->arch.nmi_pending = 0;
10658         vcpu->arch.nmi_injected = false;
10659         kvm_clear_interrupt_queue(vcpu);
10660         kvm_clear_exception_queue(vcpu);
10661
10662         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
10663         kvm_update_dr0123(vcpu);
10664         vcpu->arch.dr6 = DR6_ACTIVE_LOW;
10665         vcpu->arch.dr7 = DR7_FIXED_1;
10666         kvm_update_dr7(vcpu);
10667
10668         vcpu->arch.cr2 = 0;
10669
10670         kvm_make_request(KVM_REQ_EVENT, vcpu);
10671         vcpu->arch.apf.msr_en_val = 0;
10672         vcpu->arch.apf.msr_int_val = 0;
10673         vcpu->arch.st.msr_val = 0;
10674
10675         kvmclock_reset(vcpu);
10676
10677         kvm_clear_async_pf_completion_queue(vcpu);
10678         kvm_async_pf_hash_reset(vcpu);
10679         vcpu->arch.apf.halted = false;
10680
10681         if (vcpu->arch.guest_fpu && kvm_mpx_supported()) {
10682                 void *mpx_state_buffer;
10683
10684                 /*
10685                  * To avoid have the INIT path from kvm_apic_has_events() that be
10686                  * called with loaded FPU and does not let userspace fix the state.
10687                  */
10688                 if (init_event)
10689                         kvm_put_guest_fpu(vcpu);
10690                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10691                                         XFEATURE_BNDREGS);
10692                 if (mpx_state_buffer)
10693                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
10694                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10695                                         XFEATURE_BNDCSR);
10696                 if (mpx_state_buffer)
10697                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
10698                 if (init_event)
10699                         kvm_load_guest_fpu(vcpu);
10700         }
10701
10702         if (!init_event) {
10703                 kvm_pmu_reset(vcpu);
10704                 vcpu->arch.smbase = 0x30000;
10705
10706                 vcpu->arch.msr_misc_features_enables = 0;
10707
10708                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10709         }
10710
10711         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
10712         vcpu->arch.regs_avail = ~0;
10713         vcpu->arch.regs_dirty = ~0;
10714
10715         vcpu->arch.ia32_xss = 0;
10716
10717         static_call(kvm_x86_vcpu_reset)(vcpu, init_event);
10718 }
10719
10720 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
10721 {
10722         struct kvm_segment cs;
10723
10724         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
10725         cs.selector = vector << 8;
10726         cs.base = vector << 12;
10727         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
10728         kvm_rip_write(vcpu, 0);
10729 }
10730 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector);
10731
10732 int kvm_arch_hardware_enable(void)
10733 {
10734         struct kvm *kvm;
10735         struct kvm_vcpu *vcpu;
10736         int i;
10737         int ret;
10738         u64 local_tsc;
10739         u64 max_tsc = 0;
10740         bool stable, backwards_tsc = false;
10741
10742         kvm_user_return_msr_cpu_online();
10743         ret = static_call(kvm_x86_hardware_enable)();
10744         if (ret != 0)
10745                 return ret;
10746
10747         local_tsc = rdtsc();
10748         stable = !kvm_check_tsc_unstable();
10749         list_for_each_entry(kvm, &vm_list, vm_list) {
10750                 kvm_for_each_vcpu(i, vcpu, kvm) {
10751                         if (!stable && vcpu->cpu == smp_processor_id())
10752                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
10753                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
10754                                 backwards_tsc = true;
10755                                 if (vcpu->arch.last_host_tsc > max_tsc)
10756                                         max_tsc = vcpu->arch.last_host_tsc;
10757                         }
10758                 }
10759         }
10760
10761         /*
10762          * Sometimes, even reliable TSCs go backwards.  This happens on
10763          * platforms that reset TSC during suspend or hibernate actions, but
10764          * maintain synchronization.  We must compensate.  Fortunately, we can
10765          * detect that condition here, which happens early in CPU bringup,
10766          * before any KVM threads can be running.  Unfortunately, we can't
10767          * bring the TSCs fully up to date with real time, as we aren't yet far
10768          * enough into CPU bringup that we know how much real time has actually
10769          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
10770          * variables that haven't been updated yet.
10771          *
10772          * So we simply find the maximum observed TSC above, then record the
10773          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
10774          * the adjustment will be applied.  Note that we accumulate
10775          * adjustments, in case multiple suspend cycles happen before some VCPU
10776          * gets a chance to run again.  In the event that no KVM threads get a
10777          * chance to run, we will miss the entire elapsed period, as we'll have
10778          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
10779          * loose cycle time.  This isn't too big a deal, since the loss will be
10780          * uniform across all VCPUs (not to mention the scenario is extremely
10781          * unlikely). It is possible that a second hibernate recovery happens
10782          * much faster than a first, causing the observed TSC here to be
10783          * smaller; this would require additional padding adjustment, which is
10784          * why we set last_host_tsc to the local tsc observed here.
10785          *
10786          * N.B. - this code below runs only on platforms with reliable TSC,
10787          * as that is the only way backwards_tsc is set above.  Also note
10788          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
10789          * have the same delta_cyc adjustment applied if backwards_tsc
10790          * is detected.  Note further, this adjustment is only done once,
10791          * as we reset last_host_tsc on all VCPUs to stop this from being
10792          * called multiple times (one for each physical CPU bringup).
10793          *
10794          * Platforms with unreliable TSCs don't have to deal with this, they
10795          * will be compensated by the logic in vcpu_load, which sets the TSC to
10796          * catchup mode.  This will catchup all VCPUs to real time, but cannot
10797          * guarantee that they stay in perfect synchronization.
10798          */
10799         if (backwards_tsc) {
10800                 u64 delta_cyc = max_tsc - local_tsc;
10801                 list_for_each_entry(kvm, &vm_list, vm_list) {
10802                         kvm->arch.backwards_tsc_observed = true;
10803                         kvm_for_each_vcpu(i, vcpu, kvm) {
10804                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
10805                                 vcpu->arch.last_host_tsc = local_tsc;
10806                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
10807                         }
10808
10809                         /*
10810                          * We have to disable TSC offset matching.. if you were
10811                          * booting a VM while issuing an S4 host suspend....
10812                          * you may have some problem.  Solving this issue is
10813                          * left as an exercise to the reader.
10814                          */
10815                         kvm->arch.last_tsc_nsec = 0;
10816                         kvm->arch.last_tsc_write = 0;
10817                 }
10818
10819         }
10820         return 0;
10821 }
10822
10823 void kvm_arch_hardware_disable(void)
10824 {
10825         static_call(kvm_x86_hardware_disable)();
10826         drop_user_return_notifiers();
10827 }
10828
10829 int kvm_arch_hardware_setup(void *opaque)
10830 {
10831         struct kvm_x86_init_ops *ops = opaque;
10832         int r;
10833
10834         rdmsrl_safe(MSR_EFER, &host_efer);
10835
10836         if (boot_cpu_has(X86_FEATURE_XSAVES))
10837                 rdmsrl(MSR_IA32_XSS, host_xss);
10838
10839         r = ops->hardware_setup();
10840         if (r != 0)
10841                 return r;
10842
10843         memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops));
10844         kvm_ops_static_call_update();
10845
10846         if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
10847                 supported_xss = 0;
10848
10849 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
10850         cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
10851 #undef __kvm_cpu_cap_has
10852
10853         if (kvm_has_tsc_control) {
10854                 /*
10855                  * Make sure the user can only configure tsc_khz values that
10856                  * fit into a signed integer.
10857                  * A min value is not calculated because it will always
10858                  * be 1 on all machines.
10859                  */
10860                 u64 max = min(0x7fffffffULL,
10861                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
10862                 kvm_max_guest_tsc_khz = max;
10863
10864                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
10865         }
10866
10867         kvm_init_msr_list();
10868         return 0;
10869 }
10870
10871 void kvm_arch_hardware_unsetup(void)
10872 {
10873         static_call(kvm_x86_hardware_unsetup)();
10874 }
10875
10876 int kvm_arch_check_processor_compat(void *opaque)
10877 {
10878         struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
10879         struct kvm_x86_init_ops *ops = opaque;
10880
10881         WARN_ON(!irqs_disabled());
10882
10883         if (__cr4_reserved_bits(cpu_has, c) !=
10884             __cr4_reserved_bits(cpu_has, &boot_cpu_data))
10885                 return -EIO;
10886
10887         return ops->check_processor_compatibility();
10888 }
10889
10890 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
10891 {
10892         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
10893 }
10894 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
10895
10896 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
10897 {
10898         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
10899 }
10900
10901 __read_mostly DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu);
10902 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu);
10903
10904 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
10905 {
10906         struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
10907
10908         vcpu->arch.l1tf_flush_l1d = true;
10909         if (pmu->version && unlikely(pmu->event_count)) {
10910                 pmu->need_cleanup = true;
10911                 kvm_make_request(KVM_REQ_PMU, vcpu);
10912         }
10913         static_call(kvm_x86_sched_in)(vcpu, cpu);
10914 }
10915
10916 void kvm_arch_free_vm(struct kvm *kvm)
10917 {
10918         kfree(to_kvm_hv(kvm)->hv_pa_pg);
10919         vfree(kvm);
10920 }
10921
10922
10923 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
10924 {
10925         if (type)
10926                 return -EINVAL;
10927
10928         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
10929         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
10930         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
10931         INIT_LIST_HEAD(&kvm->arch.lpage_disallowed_mmu_pages);
10932         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
10933         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
10934
10935         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
10936         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
10937         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
10938         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
10939                 &kvm->arch.irq_sources_bitmap);
10940
10941         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
10942         mutex_init(&kvm->arch.apic_map_lock);
10943         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
10944
10945         kvm->arch.kvmclock_offset = -get_kvmclock_base_ns();
10946         pvclock_update_vm_gtod_copy(kvm);
10947
10948         kvm->arch.guest_can_read_msr_platform_info = true;
10949
10950 #if IS_ENABLED(CONFIG_HYPERV)
10951         spin_lock_init(&kvm->arch.hv_root_tdp_lock);
10952         kvm->arch.hv_root_tdp = INVALID_PAGE;
10953 #endif
10954
10955         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
10956         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
10957
10958         kvm_apicv_init(kvm);
10959         kvm_hv_init_vm(kvm);
10960         kvm_page_track_init(kvm);
10961         kvm_mmu_init_vm(kvm);
10962
10963         return static_call(kvm_x86_vm_init)(kvm);
10964 }
10965
10966 int kvm_arch_post_init_vm(struct kvm *kvm)
10967 {
10968         return kvm_mmu_post_init_vm(kvm);
10969 }
10970
10971 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
10972 {
10973         vcpu_load(vcpu);
10974         kvm_mmu_unload(vcpu);
10975         vcpu_put(vcpu);
10976 }
10977
10978 static void kvm_free_vcpus(struct kvm *kvm)
10979 {
10980         unsigned int i;
10981         struct kvm_vcpu *vcpu;
10982
10983         /*
10984          * Unpin any mmu pages first.
10985          */
10986         kvm_for_each_vcpu(i, vcpu, kvm) {
10987                 kvm_clear_async_pf_completion_queue(vcpu);
10988                 kvm_unload_vcpu_mmu(vcpu);
10989         }
10990         kvm_for_each_vcpu(i, vcpu, kvm)
10991                 kvm_vcpu_destroy(vcpu);
10992
10993         mutex_lock(&kvm->lock);
10994         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
10995                 kvm->vcpus[i] = NULL;
10996
10997         atomic_set(&kvm->online_vcpus, 0);
10998         mutex_unlock(&kvm->lock);
10999 }
11000
11001 void kvm_arch_sync_events(struct kvm *kvm)
11002 {
11003         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
11004         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
11005         kvm_free_pit(kvm);
11006 }
11007
11008 #define  ERR_PTR_USR(e)  ((void __user *)ERR_PTR(e))
11009
11010 /**
11011  * __x86_set_memory_region: Setup KVM internal memory slot
11012  *
11013  * @kvm: the kvm pointer to the VM.
11014  * @id: the slot ID to setup.
11015  * @gpa: the GPA to install the slot (unused when @size == 0).
11016  * @size: the size of the slot. Set to zero to uninstall a slot.
11017  *
11018  * This function helps to setup a KVM internal memory slot.  Specify
11019  * @size > 0 to install a new slot, while @size == 0 to uninstall a
11020  * slot.  The return code can be one of the following:
11021  *
11022  *   HVA:           on success (uninstall will return a bogus HVA)
11023  *   -errno:        on error
11024  *
11025  * The caller should always use IS_ERR() to check the return value
11026  * before use.  Note, the KVM internal memory slots are guaranteed to
11027  * remain valid and unchanged until the VM is destroyed, i.e., the
11028  * GPA->HVA translation will not change.  However, the HVA is a user
11029  * address, i.e. its accessibility is not guaranteed, and must be
11030  * accessed via __copy_{to,from}_user().
11031  */
11032 void __user * __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
11033                                       u32 size)
11034 {
11035         int i, r;
11036         unsigned long hva, old_npages;
11037         struct kvm_memslots *slots = kvm_memslots(kvm);
11038         struct kvm_memory_slot *slot;
11039
11040         /* Called with kvm->slots_lock held.  */
11041         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
11042                 return ERR_PTR_USR(-EINVAL);
11043
11044         slot = id_to_memslot(slots, id);
11045         if (size) {
11046                 if (slot && slot->npages)
11047                         return ERR_PTR_USR(-EEXIST);
11048
11049                 /*
11050                  * MAP_SHARED to prevent internal slot pages from being moved
11051                  * by fork()/COW.
11052                  */
11053                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
11054                               MAP_SHARED | MAP_ANONYMOUS, 0);
11055                 if (IS_ERR((void *)hva))
11056                         return (void __user *)hva;
11057         } else {
11058                 if (!slot || !slot->npages)
11059                         return NULL;
11060
11061                 old_npages = slot->npages;
11062                 hva = slot->userspace_addr;
11063         }
11064
11065         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
11066                 struct kvm_userspace_memory_region m;
11067
11068                 m.slot = id | (i << 16);
11069                 m.flags = 0;
11070                 m.guest_phys_addr = gpa;
11071                 m.userspace_addr = hva;
11072                 m.memory_size = size;
11073                 r = __kvm_set_memory_region(kvm, &m);
11074                 if (r < 0)
11075                         return ERR_PTR_USR(r);
11076         }
11077
11078         if (!size)
11079                 vm_munmap(hva, old_npages * PAGE_SIZE);
11080
11081         return (void __user *)hva;
11082 }
11083 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
11084
11085 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
11086 {
11087         kvm_mmu_pre_destroy_vm(kvm);
11088 }
11089
11090 void kvm_arch_destroy_vm(struct kvm *kvm)
11091 {
11092         if (current->mm == kvm->mm) {
11093                 /*
11094                  * Free memory regions allocated on behalf of userspace,
11095                  * unless the the memory map has changed due to process exit
11096                  * or fd copying.
11097                  */
11098                 mutex_lock(&kvm->slots_lock);
11099                 __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
11100                                         0, 0);
11101                 __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
11102                                         0, 0);
11103                 __x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
11104                 mutex_unlock(&kvm->slots_lock);
11105         }
11106         static_call_cond(kvm_x86_vm_destroy)(kvm);
11107         kvm_free_msr_filter(srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1));
11108         kvm_pic_destroy(kvm);
11109         kvm_ioapic_destroy(kvm);
11110         kvm_free_vcpus(kvm);
11111         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
11112         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
11113         kvm_mmu_uninit_vm(kvm);
11114         kvm_page_track_cleanup(kvm);
11115         kvm_xen_destroy_vm(kvm);
11116         kvm_hv_destroy_vm(kvm);
11117 }
11118
11119 static void memslot_rmap_free(struct kvm_memory_slot *slot)
11120 {
11121         int i;
11122
11123         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11124                 kvfree(slot->arch.rmap[i]);
11125                 slot->arch.rmap[i] = NULL;
11126         }
11127 }
11128
11129 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
11130 {
11131         int i;
11132
11133         memslot_rmap_free(slot);
11134
11135         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11136                 kvfree(slot->arch.lpage_info[i - 1]);
11137                 slot->arch.lpage_info[i - 1] = NULL;
11138         }
11139
11140         kvm_page_track_free_memslot(slot);
11141 }
11142
11143 static int memslot_rmap_alloc(struct kvm_memory_slot *slot,
11144                               unsigned long npages)
11145 {
11146         const int sz = sizeof(*slot->arch.rmap[0]);
11147         int i;
11148
11149         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11150                 int level = i + 1;
11151                 int lpages = gfn_to_index(slot->base_gfn + npages - 1,
11152                                           slot->base_gfn, level) + 1;
11153
11154                 WARN_ON(slot->arch.rmap[i]);
11155
11156                 slot->arch.rmap[i] = kvcalloc(lpages, sz, GFP_KERNEL_ACCOUNT);
11157                 if (!slot->arch.rmap[i]) {
11158                         memslot_rmap_free(slot);
11159                         return -ENOMEM;
11160                 }
11161         }
11162
11163         return 0;
11164 }
11165
11166 int alloc_all_memslots_rmaps(struct kvm *kvm)
11167 {
11168         struct kvm_memslots *slots;
11169         struct kvm_memory_slot *slot;
11170         int r, i;
11171
11172         /*
11173          * Check if memslots alreday have rmaps early before acquiring
11174          * the slots_arch_lock below.
11175          */
11176         if (kvm_memslots_have_rmaps(kvm))
11177                 return 0;
11178
11179         mutex_lock(&kvm->slots_arch_lock);
11180
11181         /*
11182          * Read memslots_have_rmaps again, under the slots arch lock,
11183          * before allocating the rmaps
11184          */
11185         if (kvm_memslots_have_rmaps(kvm)) {
11186                 mutex_unlock(&kvm->slots_arch_lock);
11187                 return 0;
11188         }
11189
11190         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
11191                 slots = __kvm_memslots(kvm, i);
11192                 kvm_for_each_memslot(slot, slots) {
11193                         r = memslot_rmap_alloc(slot, slot->npages);
11194                         if (r) {
11195                                 mutex_unlock(&kvm->slots_arch_lock);
11196                                 return r;
11197                         }
11198                 }
11199         }
11200
11201         /*
11202          * Ensure that memslots_have_rmaps becomes true strictly after
11203          * all the rmap pointers are set.
11204          */
11205         smp_store_release(&kvm->arch.memslots_have_rmaps, true);
11206         mutex_unlock(&kvm->slots_arch_lock);
11207         return 0;
11208 }
11209
11210 static int kvm_alloc_memslot_metadata(struct kvm *kvm,
11211                                       struct kvm_memory_slot *slot,
11212                                       unsigned long npages)
11213 {
11214         int i, r;
11215
11216         /*
11217          * Clear out the previous array pointers for the KVM_MR_MOVE case.  The
11218          * old arrays will be freed by __kvm_set_memory_region() if installing
11219          * the new memslot is successful.
11220          */
11221         memset(&slot->arch, 0, sizeof(slot->arch));
11222
11223         if (kvm_memslots_have_rmaps(kvm)) {
11224                 r = memslot_rmap_alloc(slot, npages);
11225                 if (r)
11226                         return r;
11227         }
11228
11229         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11230                 struct kvm_lpage_info *linfo;
11231                 unsigned long ugfn;
11232                 int lpages;
11233                 int level = i + 1;
11234
11235                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
11236                                       slot->base_gfn, level) + 1;
11237
11238                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
11239                 if (!linfo)
11240                         goto out_free;
11241
11242                 slot->arch.lpage_info[i - 1] = linfo;
11243
11244                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
11245                         linfo[0].disallow_lpage = 1;
11246                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
11247                         linfo[lpages - 1].disallow_lpage = 1;
11248                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
11249                 /*
11250                  * If the gfn and userspace address are not aligned wrt each
11251                  * other, disable large page support for this slot.
11252                  */
11253                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1)) {
11254                         unsigned long j;
11255
11256                         for (j = 0; j < lpages; ++j)
11257                                 linfo[j].disallow_lpage = 1;
11258                 }
11259         }
11260
11261         if (kvm_page_track_create_memslot(slot, npages))
11262                 goto out_free;
11263
11264         return 0;
11265
11266 out_free:
11267         memslot_rmap_free(slot);
11268
11269         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11270                 kvfree(slot->arch.lpage_info[i - 1]);
11271                 slot->arch.lpage_info[i - 1] = NULL;
11272         }
11273         return -ENOMEM;
11274 }
11275
11276 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
11277 {
11278         struct kvm_vcpu *vcpu;
11279         int i;
11280
11281         /*
11282          * memslots->generation has been incremented.
11283          * mmio generation may have reached its maximum value.
11284          */
11285         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
11286
11287         /* Force re-initialization of steal_time cache */
11288         kvm_for_each_vcpu(i, vcpu, kvm)
11289                 kvm_vcpu_kick(vcpu);
11290 }
11291
11292 int kvm_arch_prepare_memory_region(struct kvm *kvm,
11293                                 struct kvm_memory_slot *memslot,
11294                                 const struct kvm_userspace_memory_region *mem,
11295                                 enum kvm_mr_change change)
11296 {
11297         if (change == KVM_MR_CREATE || change == KVM_MR_MOVE)
11298                 return kvm_alloc_memslot_metadata(kvm, memslot,
11299                                                   mem->memory_size >> PAGE_SHIFT);
11300         return 0;
11301 }
11302
11303
11304 static void kvm_mmu_update_cpu_dirty_logging(struct kvm *kvm, bool enable)
11305 {
11306         struct kvm_arch *ka = &kvm->arch;
11307
11308         if (!kvm_x86_ops.cpu_dirty_log_size)
11309                 return;
11310
11311         if ((enable && ++ka->cpu_dirty_logging_count == 1) ||
11312             (!enable && --ka->cpu_dirty_logging_count == 0))
11313                 kvm_make_all_cpus_request(kvm, KVM_REQ_UPDATE_CPU_DIRTY_LOGGING);
11314
11315         WARN_ON_ONCE(ka->cpu_dirty_logging_count < 0);
11316 }
11317
11318 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
11319                                      struct kvm_memory_slot *old,
11320                                      struct kvm_memory_slot *new,
11321                                      enum kvm_mr_change change)
11322 {
11323         bool log_dirty_pages = new->flags & KVM_MEM_LOG_DIRTY_PAGES;
11324
11325         /*
11326          * Update CPU dirty logging if dirty logging is being toggled.  This
11327          * applies to all operations.
11328          */
11329         if ((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)
11330                 kvm_mmu_update_cpu_dirty_logging(kvm, log_dirty_pages);
11331
11332         /*
11333          * Nothing more to do for RO slots (which can't be dirtied and can't be
11334          * made writable) or CREATE/MOVE/DELETE of a slot.
11335          *
11336          * For a memslot with dirty logging disabled:
11337          * CREATE:      No dirty mappings will already exist.
11338          * MOVE/DELETE: The old mappings will already have been cleaned up by
11339          *              kvm_arch_flush_shadow_memslot()
11340          *
11341          * For a memslot with dirty logging enabled:
11342          * CREATE:      No shadow pages exist, thus nothing to write-protect
11343          *              and no dirty bits to clear.
11344          * MOVE/DELETE: The old mappings will already have been cleaned up by
11345          *              kvm_arch_flush_shadow_memslot().
11346          */
11347         if ((change != KVM_MR_FLAGS_ONLY) || (new->flags & KVM_MEM_READONLY))
11348                 return;
11349
11350         /*
11351          * READONLY and non-flags changes were filtered out above, and the only
11352          * other flag is LOG_DIRTY_PAGES, i.e. something is wrong if dirty
11353          * logging isn't being toggled on or off.
11354          */
11355         if (WARN_ON_ONCE(!((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)))
11356                 return;
11357
11358         if (!log_dirty_pages) {
11359                 /*
11360                  * Dirty logging tracks sptes in 4k granularity, meaning that
11361                  * large sptes have to be split.  If live migration succeeds,
11362                  * the guest in the source machine will be destroyed and large
11363                  * sptes will be created in the destination.  However, if the
11364                  * guest continues to run in the source machine (for example if
11365                  * live migration fails), small sptes will remain around and
11366                  * cause bad performance.
11367                  *
11368                  * Scan sptes if dirty logging has been stopped, dropping those
11369                  * which can be collapsed into a single large-page spte.  Later
11370                  * page faults will create the large-page sptes.
11371                  */
11372                 kvm_mmu_zap_collapsible_sptes(kvm, new);
11373         } else {
11374                 /*
11375                  * Initially-all-set does not require write protecting any page,
11376                  * because they're all assumed to be dirty.
11377                  */
11378                 if (kvm_dirty_log_manual_protect_and_init_set(kvm))
11379                         return;
11380
11381                 if (kvm_x86_ops.cpu_dirty_log_size) {
11382                         kvm_mmu_slot_leaf_clear_dirty(kvm, new);
11383                         kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_2M);
11384                 } else {
11385                         kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_4K);
11386                 }
11387         }
11388 }
11389
11390 void kvm_arch_commit_memory_region(struct kvm *kvm,
11391                                 const struct kvm_userspace_memory_region *mem,
11392                                 struct kvm_memory_slot *old,
11393                                 const struct kvm_memory_slot *new,
11394                                 enum kvm_mr_change change)
11395 {
11396         if (!kvm->arch.n_requested_mmu_pages)
11397                 kvm_mmu_change_mmu_pages(kvm,
11398                                 kvm_mmu_calculate_default_mmu_pages(kvm));
11399
11400         /*
11401          * FIXME: const-ify all uses of struct kvm_memory_slot.
11402          */
11403         kvm_mmu_slot_apply_flags(kvm, old, (struct kvm_memory_slot *) new, change);
11404
11405         /* Free the arrays associated with the old memslot. */
11406         if (change == KVM_MR_MOVE)
11407                 kvm_arch_free_memslot(kvm, old);
11408 }
11409
11410 void kvm_arch_flush_shadow_all(struct kvm *kvm)
11411 {
11412         kvm_mmu_zap_all(kvm);
11413 }
11414
11415 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
11416                                    struct kvm_memory_slot *slot)
11417 {
11418         kvm_page_track_flush_slot(kvm, slot);
11419 }
11420
11421 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
11422 {
11423         return (is_guest_mode(vcpu) &&
11424                         kvm_x86_ops.guest_apic_has_interrupt &&
11425                         static_call(kvm_x86_guest_apic_has_interrupt)(vcpu));
11426 }
11427
11428 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
11429 {
11430         if (!list_empty_careful(&vcpu->async_pf.done))
11431                 return true;
11432
11433         if (kvm_apic_has_events(vcpu))
11434                 return true;
11435
11436         if (vcpu->arch.pv.pv_unhalted)
11437                 return true;
11438
11439         if (vcpu->arch.exception.pending)
11440                 return true;
11441
11442         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
11443             (vcpu->arch.nmi_pending &&
11444              static_call(kvm_x86_nmi_allowed)(vcpu, false)))
11445                 return true;
11446
11447         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
11448             (vcpu->arch.smi_pending &&
11449              static_call(kvm_x86_smi_allowed)(vcpu, false)))
11450                 return true;
11451
11452         if (kvm_arch_interrupt_allowed(vcpu) &&
11453             (kvm_cpu_has_interrupt(vcpu) ||
11454             kvm_guest_apic_has_interrupt(vcpu)))
11455                 return true;
11456
11457         if (kvm_hv_has_stimer_pending(vcpu))
11458                 return true;
11459
11460         if (is_guest_mode(vcpu) &&
11461             kvm_x86_ops.nested_ops->hv_timer_pending &&
11462             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
11463                 return true;
11464
11465         return false;
11466 }
11467
11468 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
11469 {
11470         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
11471 }
11472
11473 bool kvm_arch_dy_has_pending_interrupt(struct kvm_vcpu *vcpu)
11474 {
11475         if (vcpu->arch.apicv_active && static_call(kvm_x86_dy_apicv_has_pending_interrupt)(vcpu))
11476                 return true;
11477
11478         return false;
11479 }
11480
11481 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
11482 {
11483         if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
11484                 return true;
11485
11486         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
11487                 kvm_test_request(KVM_REQ_SMI, vcpu) ||
11488                  kvm_test_request(KVM_REQ_EVENT, vcpu))
11489                 return true;
11490
11491         return kvm_arch_dy_has_pending_interrupt(vcpu);
11492 }
11493
11494 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
11495 {
11496         if (vcpu->arch.guest_state_protected)
11497                 return true;
11498
11499         return vcpu->arch.preempted_in_kernel;
11500 }
11501
11502 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
11503 {
11504         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
11505 }
11506
11507 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
11508 {
11509         return static_call(kvm_x86_interrupt_allowed)(vcpu, false);
11510 }
11511
11512 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
11513 {
11514         /* Can't read the RIP when guest state is protected, just return 0 */
11515         if (vcpu->arch.guest_state_protected)
11516                 return 0;
11517
11518         if (is_64_bit_mode(vcpu))
11519                 return kvm_rip_read(vcpu);
11520         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
11521                      kvm_rip_read(vcpu));
11522 }
11523 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
11524
11525 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
11526 {
11527         return kvm_get_linear_rip(vcpu) == linear_rip;
11528 }
11529 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
11530
11531 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
11532 {
11533         unsigned long rflags;
11534
11535         rflags = static_call(kvm_x86_get_rflags)(vcpu);
11536         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
11537                 rflags &= ~X86_EFLAGS_TF;
11538         return rflags;
11539 }
11540 EXPORT_SYMBOL_GPL(kvm_get_rflags);
11541
11542 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
11543 {
11544         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
11545             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
11546                 rflags |= X86_EFLAGS_TF;
11547         static_call(kvm_x86_set_rflags)(vcpu, rflags);
11548 }
11549
11550 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
11551 {
11552         __kvm_set_rflags(vcpu, rflags);
11553         kvm_make_request(KVM_REQ_EVENT, vcpu);
11554 }
11555 EXPORT_SYMBOL_GPL(kvm_set_rflags);
11556
11557 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
11558 {
11559         int r;
11560
11561         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
11562               work->wakeup_all)
11563                 return;
11564
11565         r = kvm_mmu_reload(vcpu);
11566         if (unlikely(r))
11567                 return;
11568
11569         if (!vcpu->arch.mmu->direct_map &&
11570               work->arch.cr3 != vcpu->arch.mmu->get_guest_pgd(vcpu))
11571                 return;
11572
11573         kvm_mmu_do_page_fault(vcpu, work->cr2_or_gpa, 0, true);
11574 }
11575
11576 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
11577 {
11578         BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU));
11579
11580         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
11581 }
11582
11583 static inline u32 kvm_async_pf_next_probe(u32 key)
11584 {
11585         return (key + 1) & (ASYNC_PF_PER_VCPU - 1);
11586 }
11587
11588 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11589 {
11590         u32 key = kvm_async_pf_hash_fn(gfn);
11591
11592         while (vcpu->arch.apf.gfns[key] != ~0)
11593                 key = kvm_async_pf_next_probe(key);
11594
11595         vcpu->arch.apf.gfns[key] = gfn;
11596 }
11597
11598 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
11599 {
11600         int i;
11601         u32 key = kvm_async_pf_hash_fn(gfn);
11602
11603         for (i = 0; i < ASYNC_PF_PER_VCPU &&
11604                      (vcpu->arch.apf.gfns[key] != gfn &&
11605                       vcpu->arch.apf.gfns[key] != ~0); i++)
11606                 key = kvm_async_pf_next_probe(key);
11607
11608         return key;
11609 }
11610
11611 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11612 {
11613         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
11614 }
11615
11616 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11617 {
11618         u32 i, j, k;
11619
11620         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
11621
11622         if (WARN_ON_ONCE(vcpu->arch.apf.gfns[i] != gfn))
11623                 return;
11624
11625         while (true) {
11626                 vcpu->arch.apf.gfns[i] = ~0;
11627                 do {
11628                         j = kvm_async_pf_next_probe(j);
11629                         if (vcpu->arch.apf.gfns[j] == ~0)
11630                                 return;
11631                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
11632                         /*
11633                          * k lies cyclically in ]i,j]
11634                          * |    i.k.j |
11635                          * |....j i.k.| or  |.k..j i...|
11636                          */
11637                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
11638                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
11639                 i = j;
11640         }
11641 }
11642
11643 static inline int apf_put_user_notpresent(struct kvm_vcpu *vcpu)
11644 {
11645         u32 reason = KVM_PV_REASON_PAGE_NOT_PRESENT;
11646
11647         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &reason,
11648                                       sizeof(reason));
11649 }
11650
11651 static inline int apf_put_user_ready(struct kvm_vcpu *vcpu, u32 token)
11652 {
11653         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
11654
11655         return kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
11656                                              &token, offset, sizeof(token));
11657 }
11658
11659 static inline bool apf_pageready_slot_free(struct kvm_vcpu *vcpu)
11660 {
11661         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
11662         u32 val;
11663
11664         if (kvm_read_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
11665                                          &val, offset, sizeof(val)))
11666                 return false;
11667
11668         return !val;
11669 }
11670
11671 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
11672 {
11673         if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
11674                 return false;
11675
11676         if (!kvm_pv_async_pf_enabled(vcpu) ||
11677             (vcpu->arch.apf.send_user_only && static_call(kvm_x86_get_cpl)(vcpu) == 0))
11678                 return false;
11679
11680         return true;
11681 }
11682
11683 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
11684 {
11685         if (unlikely(!lapic_in_kernel(vcpu) ||
11686                      kvm_event_needs_reinjection(vcpu) ||
11687                      vcpu->arch.exception.pending))
11688                 return false;
11689
11690         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
11691                 return false;
11692
11693         /*
11694          * If interrupts are off we cannot even use an artificial
11695          * halt state.
11696          */
11697         return kvm_arch_interrupt_allowed(vcpu);
11698 }
11699
11700 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
11701                                      struct kvm_async_pf *work)
11702 {
11703         struct x86_exception fault;
11704
11705         trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
11706         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
11707
11708         if (kvm_can_deliver_async_pf(vcpu) &&
11709             !apf_put_user_notpresent(vcpu)) {
11710                 fault.vector = PF_VECTOR;
11711                 fault.error_code_valid = true;
11712                 fault.error_code = 0;
11713                 fault.nested_page_fault = false;
11714                 fault.address = work->arch.token;
11715                 fault.async_page_fault = true;
11716                 kvm_inject_page_fault(vcpu, &fault);
11717                 return true;
11718         } else {
11719                 /*
11720                  * It is not possible to deliver a paravirtualized asynchronous
11721                  * page fault, but putting the guest in an artificial halt state
11722                  * can be beneficial nevertheless: if an interrupt arrives, we
11723                  * can deliver it timely and perhaps the guest will schedule
11724                  * another process.  When the instruction that triggered a page
11725                  * fault is retried, hopefully the page will be ready in the host.
11726                  */
11727                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
11728                 return false;
11729         }
11730 }
11731
11732 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
11733                                  struct kvm_async_pf *work)
11734 {
11735         struct kvm_lapic_irq irq = {
11736                 .delivery_mode = APIC_DM_FIXED,
11737                 .vector = vcpu->arch.apf.vec
11738         };
11739
11740         if (work->wakeup_all)
11741                 work->arch.token = ~0; /* broadcast wakeup */
11742         else
11743                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
11744         trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
11745
11746         if ((work->wakeup_all || work->notpresent_injected) &&
11747             kvm_pv_async_pf_enabled(vcpu) &&
11748             !apf_put_user_ready(vcpu, work->arch.token)) {
11749                 vcpu->arch.apf.pageready_pending = true;
11750                 kvm_apic_set_irq(vcpu, &irq, NULL);
11751         }
11752
11753         vcpu->arch.apf.halted = false;
11754         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
11755 }
11756
11757 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu)
11758 {
11759         kvm_make_request(KVM_REQ_APF_READY, vcpu);
11760         if (!vcpu->arch.apf.pageready_pending)
11761                 kvm_vcpu_kick(vcpu);
11762 }
11763
11764 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu)
11765 {
11766         if (!kvm_pv_async_pf_enabled(vcpu))
11767                 return true;
11768         else
11769                 return kvm_lapic_enabled(vcpu) && apf_pageready_slot_free(vcpu);
11770 }
11771
11772 void kvm_arch_start_assignment(struct kvm *kvm)
11773 {
11774         if (atomic_inc_return(&kvm->arch.assigned_device_count) == 1)
11775                 static_call_cond(kvm_x86_start_assignment)(kvm);
11776 }
11777 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
11778
11779 void kvm_arch_end_assignment(struct kvm *kvm)
11780 {
11781         atomic_dec(&kvm->arch.assigned_device_count);
11782 }
11783 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
11784
11785 bool kvm_arch_has_assigned_device(struct kvm *kvm)
11786 {
11787         return atomic_read(&kvm->arch.assigned_device_count);
11788 }
11789 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
11790
11791 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
11792 {
11793         atomic_inc(&kvm->arch.noncoherent_dma_count);
11794 }
11795 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
11796
11797 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
11798 {
11799         atomic_dec(&kvm->arch.noncoherent_dma_count);
11800 }
11801 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
11802
11803 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
11804 {
11805         return atomic_read(&kvm->arch.noncoherent_dma_count);
11806 }
11807 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
11808
11809 bool kvm_arch_has_irq_bypass(void)
11810 {
11811         return true;
11812 }
11813
11814 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
11815                                       struct irq_bypass_producer *prod)
11816 {
11817         struct kvm_kernel_irqfd *irqfd =
11818                 container_of(cons, struct kvm_kernel_irqfd, consumer);
11819         int ret;
11820
11821         irqfd->producer = prod;
11822         kvm_arch_start_assignment(irqfd->kvm);
11823         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm,
11824                                          prod->irq, irqfd->gsi, 1);
11825
11826         if (ret)
11827                 kvm_arch_end_assignment(irqfd->kvm);
11828
11829         return ret;
11830 }
11831
11832 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
11833                                       struct irq_bypass_producer *prod)
11834 {
11835         int ret;
11836         struct kvm_kernel_irqfd *irqfd =
11837                 container_of(cons, struct kvm_kernel_irqfd, consumer);
11838
11839         WARN_ON(irqfd->producer != prod);
11840         irqfd->producer = NULL;
11841
11842         /*
11843          * When producer of consumer is unregistered, we change back to
11844          * remapped mode, so we can re-use the current implementation
11845          * when the irq is masked/disabled or the consumer side (KVM
11846          * int this case doesn't want to receive the interrupts.
11847         */
11848         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm, prod->irq, irqfd->gsi, 0);
11849         if (ret)
11850                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
11851                        " fails: %d\n", irqfd->consumer.token, ret);
11852
11853         kvm_arch_end_assignment(irqfd->kvm);
11854 }
11855
11856 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
11857                                    uint32_t guest_irq, bool set)
11858 {
11859         return static_call(kvm_x86_update_pi_irte)(kvm, host_irq, guest_irq, set);
11860 }
11861
11862 bool kvm_vector_hashing_enabled(void)
11863 {
11864         return vector_hashing;
11865 }
11866
11867 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
11868 {
11869         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
11870 }
11871 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
11872
11873
11874 int kvm_spec_ctrl_test_value(u64 value)
11875 {
11876         /*
11877          * test that setting IA32_SPEC_CTRL to given value
11878          * is allowed by the host processor
11879          */
11880
11881         u64 saved_value;
11882         unsigned long flags;
11883         int ret = 0;
11884
11885         local_irq_save(flags);
11886
11887         if (rdmsrl_safe(MSR_IA32_SPEC_CTRL, &saved_value))
11888                 ret = 1;
11889         else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value))
11890                 ret = 1;
11891         else
11892                 wrmsrl(MSR_IA32_SPEC_CTRL, saved_value);
11893
11894         local_irq_restore(flags);
11895
11896         return ret;
11897 }
11898 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value);
11899
11900 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code)
11901 {
11902         struct x86_exception fault;
11903         u32 access = error_code &
11904                 (PFERR_WRITE_MASK | PFERR_FETCH_MASK | PFERR_USER_MASK);
11905
11906         if (!(error_code & PFERR_PRESENT_MASK) ||
11907             vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, &fault) != UNMAPPED_GVA) {
11908                 /*
11909                  * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
11910                  * tables probably do not match the TLB.  Just proceed
11911                  * with the error code that the processor gave.
11912                  */
11913                 fault.vector = PF_VECTOR;
11914                 fault.error_code_valid = true;
11915                 fault.error_code = error_code;
11916                 fault.nested_page_fault = false;
11917                 fault.address = gva;
11918         }
11919         vcpu->arch.walk_mmu->inject_page_fault(vcpu, &fault);
11920 }
11921 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error);
11922
11923 /*
11924  * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
11925  * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
11926  * indicates whether exit to userspace is needed.
11927  */
11928 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
11929                               struct x86_exception *e)
11930 {
11931         if (r == X86EMUL_PROPAGATE_FAULT) {
11932                 kvm_inject_emulated_page_fault(vcpu, e);
11933                 return 1;
11934         }
11935
11936         /*
11937          * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
11938          * while handling a VMX instruction KVM could've handled the request
11939          * correctly by exiting to userspace and performing I/O but there
11940          * doesn't seem to be a real use-case behind such requests, just return
11941          * KVM_EXIT_INTERNAL_ERROR for now.
11942          */
11943         vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
11944         vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
11945         vcpu->run->internal.ndata = 0;
11946
11947         return 0;
11948 }
11949 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure);
11950
11951 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva)
11952 {
11953         bool pcid_enabled;
11954         struct x86_exception e;
11955         unsigned i;
11956         unsigned long roots_to_free = 0;
11957         struct {
11958                 u64 pcid;
11959                 u64 gla;
11960         } operand;
11961         int r;
11962
11963         r = kvm_read_guest_virt(vcpu, gva, &operand, sizeof(operand), &e);
11964         if (r != X86EMUL_CONTINUE)
11965                 return kvm_handle_memory_failure(vcpu, r, &e);
11966
11967         if (operand.pcid >> 12 != 0) {
11968                 kvm_inject_gp(vcpu, 0);
11969                 return 1;
11970         }
11971
11972         pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
11973
11974         switch (type) {
11975         case INVPCID_TYPE_INDIV_ADDR:
11976                 if ((!pcid_enabled && (operand.pcid != 0)) ||
11977                     is_noncanonical_address(operand.gla, vcpu)) {
11978                         kvm_inject_gp(vcpu, 0);
11979                         return 1;
11980                 }
11981                 kvm_mmu_invpcid_gva(vcpu, operand.gla, operand.pcid);
11982                 return kvm_skip_emulated_instruction(vcpu);
11983
11984         case INVPCID_TYPE_SINGLE_CTXT:
11985                 if (!pcid_enabled && (operand.pcid != 0)) {
11986                         kvm_inject_gp(vcpu, 0);
11987                         return 1;
11988                 }
11989
11990                 if (kvm_get_active_pcid(vcpu) == operand.pcid) {
11991                         kvm_mmu_sync_roots(vcpu);
11992                         kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
11993                 }
11994
11995                 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
11996                         if (kvm_get_pcid(vcpu, vcpu->arch.mmu->prev_roots[i].pgd)
11997                             == operand.pcid)
11998                                 roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
11999
12000                 kvm_mmu_free_roots(vcpu, vcpu->arch.mmu, roots_to_free);
12001                 /*
12002                  * If neither the current cr3 nor any of the prev_roots use the
12003                  * given PCID, then nothing needs to be done here because a
12004                  * resync will happen anyway before switching to any other CR3.
12005                  */
12006
12007                 return kvm_skip_emulated_instruction(vcpu);
12008
12009         case INVPCID_TYPE_ALL_NON_GLOBAL:
12010                 /*
12011                  * Currently, KVM doesn't mark global entries in the shadow
12012                  * page tables, so a non-global flush just degenerates to a
12013                  * global flush. If needed, we could optimize this later by
12014                  * keeping track of global entries in shadow page tables.
12015                  */
12016
12017                 fallthrough;
12018         case INVPCID_TYPE_ALL_INCL_GLOBAL:
12019                 kvm_make_request(KVM_REQ_MMU_RELOAD, vcpu);
12020                 return kvm_skip_emulated_instruction(vcpu);
12021
12022         default:
12023                 BUG(); /* We have already checked above that type <= 3 */
12024         }
12025 }
12026 EXPORT_SYMBOL_GPL(kvm_handle_invpcid);
12027
12028 static int complete_sev_es_emulated_mmio(struct kvm_vcpu *vcpu)
12029 {
12030         struct kvm_run *run = vcpu->run;
12031         struct kvm_mmio_fragment *frag;
12032         unsigned int len;
12033
12034         BUG_ON(!vcpu->mmio_needed);
12035
12036         /* Complete previous fragment */
12037         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
12038         len = min(8u, frag->len);
12039         if (!vcpu->mmio_is_write)
12040                 memcpy(frag->data, run->mmio.data, len);
12041
12042         if (frag->len <= 8) {
12043                 /* Switch to the next fragment. */
12044                 frag++;
12045                 vcpu->mmio_cur_fragment++;
12046         } else {
12047                 /* Go forward to the next mmio piece. */
12048                 frag->data += len;
12049                 frag->gpa += len;
12050                 frag->len -= len;
12051         }
12052
12053         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
12054                 vcpu->mmio_needed = 0;
12055
12056                 // VMG change, at this point, we're always done
12057                 // RIP has already been advanced
12058                 return 1;
12059         }
12060
12061         // More MMIO is needed
12062         run->mmio.phys_addr = frag->gpa;
12063         run->mmio.len = min(8u, frag->len);
12064         run->mmio.is_write = vcpu->mmio_is_write;
12065         if (run->mmio.is_write)
12066                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
12067         run->exit_reason = KVM_EXIT_MMIO;
12068
12069         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12070
12071         return 0;
12072 }
12073
12074 int kvm_sev_es_mmio_write(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12075                           void *data)
12076 {
12077         int handled;
12078         struct kvm_mmio_fragment *frag;
12079
12080         if (!data)
12081                 return -EINVAL;
12082
12083         handled = write_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12084         if (handled == bytes)
12085                 return 1;
12086
12087         bytes -= handled;
12088         gpa += handled;
12089         data += handled;
12090
12091         /*TODO: Check if need to increment number of frags */
12092         frag = vcpu->mmio_fragments;
12093         vcpu->mmio_nr_fragments = 1;
12094         frag->len = bytes;
12095         frag->gpa = gpa;
12096         frag->data = data;
12097
12098         vcpu->mmio_needed = 1;
12099         vcpu->mmio_cur_fragment = 0;
12100
12101         vcpu->run->mmio.phys_addr = gpa;
12102         vcpu->run->mmio.len = min(8u, frag->len);
12103         vcpu->run->mmio.is_write = 1;
12104         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
12105         vcpu->run->exit_reason = KVM_EXIT_MMIO;
12106
12107         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12108
12109         return 0;
12110 }
12111 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write);
12112
12113 int kvm_sev_es_mmio_read(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12114                          void *data)
12115 {
12116         int handled;
12117         struct kvm_mmio_fragment *frag;
12118
12119         if (!data)
12120                 return -EINVAL;
12121
12122         handled = read_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12123         if (handled == bytes)
12124                 return 1;
12125
12126         bytes -= handled;
12127         gpa += handled;
12128         data += handled;
12129
12130         /*TODO: Check if need to increment number of frags */
12131         frag = vcpu->mmio_fragments;
12132         vcpu->mmio_nr_fragments = 1;
12133         frag->len = bytes;
12134         frag->gpa = gpa;
12135         frag->data = data;
12136
12137         vcpu->mmio_needed = 1;
12138         vcpu->mmio_cur_fragment = 0;
12139
12140         vcpu->run->mmio.phys_addr = gpa;
12141         vcpu->run->mmio.len = min(8u, frag->len);
12142         vcpu->run->mmio.is_write = 0;
12143         vcpu->run->exit_reason = KVM_EXIT_MMIO;
12144
12145         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12146
12147         return 0;
12148 }
12149 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read);
12150
12151 static int complete_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
12152 {
12153         memcpy(vcpu->arch.guest_ins_data, vcpu->arch.pio_data,
12154                vcpu->arch.pio.count * vcpu->arch.pio.size);
12155         vcpu->arch.pio.count = 0;
12156
12157         return 1;
12158 }
12159
12160 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
12161                            unsigned int port, void *data,  unsigned int count)
12162 {
12163         int ret;
12164
12165         ret = emulator_pio_out_emulated(vcpu->arch.emulate_ctxt, size, port,
12166                                         data, count);
12167         if (ret)
12168                 return ret;
12169
12170         vcpu->arch.pio.count = 0;
12171
12172         return 0;
12173 }
12174
12175 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
12176                           unsigned int port, void *data, unsigned int count)
12177 {
12178         int ret;
12179
12180         ret = emulator_pio_in_emulated(vcpu->arch.emulate_ctxt, size, port,
12181                                        data, count);
12182         if (ret) {
12183                 vcpu->arch.pio.count = 0;
12184         } else {
12185                 vcpu->arch.guest_ins_data = data;
12186                 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_ins;
12187         }
12188
12189         return 0;
12190 }
12191
12192 int kvm_sev_es_string_io(struct kvm_vcpu *vcpu, unsigned int size,
12193                          unsigned int port, void *data,  unsigned int count,
12194                          int in)
12195 {
12196         return in ? kvm_sev_es_ins(vcpu, size, port, data, count)
12197                   : kvm_sev_es_outs(vcpu, size, port, data, count);
12198 }
12199 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io);
12200
12201 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry);
12202 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
12203 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
12204 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
12205 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
12206 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
12207 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
12208 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
12209 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
12210 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
12211 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
12212 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
12213 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
12214 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
12215 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
12216 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
12217 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
12218 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
12219 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
12220 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
12221 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
12222 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log);
12223 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request);
12224 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter);
12225 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit);
12226 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter);
12227 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit);