arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *   Yaniv Kamay  <yaniv@qumranet.com>
  15  *   Amit Shah    <amit.shah@qumranet.com>
  16  *   Ben-Ami Yassour <benami@il.ibm.com>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "ioapic.h"
  22 #include "mmu.h"
  23 #include "i8254.h"
  24 #include "tss.h"
  25 #include "kvm_cache_regs.h"
  26 #include "kvm_emulate.h"
  27 #include "x86.h"
  28 #include "cpuid.h"
  29 #include "pmu.h"
  30 #include "hyperv.h"
  31 #include "lapic.h"
  32 #include "xen.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/export.h>
  40 #include <linux/moduleparam.h>
  41 #include <linux/mman.h>
  42 #include <linux/highmem.h>
  43 #include <linux/iommu.h>
  44 #include <linux/intel-iommu.h>
  45 #include <linux/cpufreq.h>
  46 #include <linux/user-return-notifier.h>
  47 #include <linux/srcu.h>
  48 #include <linux/slab.h>
  49 #include <linux/perf_event.h>
  50 #include <linux/uaccess.h>
  51 #include <linux/hash.h>
  52 #include <linux/pci.h>
  53 #include <linux/timekeeper_internal.h>
  54 #include <linux/pvclock_gtod.h>
  55 #include <linux/kvm_irqfd.h>
  56 #include <linux/irqbypass.h>
  57 #include <linux/sched/stat.h>
  58 #include <linux/sched/isolation.h>
  59 #include <linux/mem_encrypt.h>
  60 #include <linux/entry-kvm.h>
  61 #include <linux/suspend.h>
  62
  63 #include <trace/events/kvm.h>
  64
  65 #include <asm/debugreg.h>
  66 #include <asm/msr.h>
  67 #include <asm/desc.h>
  68 #include <asm/mce.h>
  69 #include <linux/kernel_stat.h>
  70 #include <asm/fpu/internal.h> /* Ugh! */
  71 #include <asm/pvclock.h>
  72 #include <asm/div64.h>
  73 #include <asm/irq_remapping.h>
  74 #include <asm/mshyperv.h>
  75 #include <asm/hypervisor.h>
  76 #include <asm/tlbflush.h>
  77 #include <asm/intel_pt.h>
  78 #include <asm/emulate_prefix.h>
  79 #include <asm/sgx.h>
  80 #include <clocksource/hyperv_timer.h>
  81
  82 #define CREATE_TRACE_POINTS
  83 #include "trace.h"
  84
  85 #define MAX_IO_MSRS 256
  86 #define KVM_MAX_MCE_BANKS 32
  87 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  88 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  89
  90 #define emul_to_vcpu(ctxt) \
  91         ((struct kvm_vcpu *)(ctxt)->vcpu)
  92
  93 /* EFER defaults:
  94  * - enable syscall per default because its emulated by KVM
  95  * - enable LME and LMA per default on 64 bit KVM
  96  */
  97 #ifdef CONFIG_X86_64
  98 static
  99 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
 100 #else
 101 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
 102 #endif
 103
 104 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
 105
 106 #define KVM_EXIT_HYPERCALL_VALID_MASK (1 << KVM_HC_MAP_GPA_RANGE)
 107
 108 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
 109                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 110
 111 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 112 static void process_nmi(struct kvm_vcpu *vcpu);
 113 static void process_smi(struct kvm_vcpu *vcpu);
 114 static void enter_smm(struct kvm_vcpu *vcpu);
 115 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 116 static void store_regs(struct kvm_vcpu *vcpu);
 117 static int sync_regs(struct kvm_vcpu *vcpu);
 118
 119 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
 120 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
 121
 122 struct kvm_x86_ops kvm_x86_ops __read_mostly;
 123 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 124
 125 #define KVM_X86_OP(func)                                             \
 126         DEFINE_STATIC_CALL_NULL(kvm_x86_##func,                      \
 127                                 *(((struct kvm_x86_ops *)0)->func));
 128 #define KVM_X86_OP_NULL KVM_X86_OP
 129 #include <asm/kvm-x86-ops.h>
 130 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits);
 131 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg);
 132 EXPORT_STATIC_CALL_GPL(kvm_x86_tlb_flush_current);
 133
 134 static bool __read_mostly ignore_msrs = 0;
 135 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 136
 137 bool __read_mostly report_ignored_msrs = true;
 138 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 139 EXPORT_SYMBOL_GPL(report_ignored_msrs);
 140
 141 unsigned int min_timer_period_us = 200;
 142 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 143
 144 static bool __read_mostly kvmclock_periodic_sync = true;
 145 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 146
 147 bool __read_mostly kvm_has_tsc_control;
 148 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 149 u32  __read_mostly kvm_max_guest_tsc_khz;
 150 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 151 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 152 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 153 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 154 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 155 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 156 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 157 bool __read_mostly kvm_has_bus_lock_exit;
 158 EXPORT_SYMBOL_GPL(kvm_has_bus_lock_exit);
 159
 160 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 161 static u32 __read_mostly tsc_tolerance_ppm = 250;
 162 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 163
 164 /*
 165  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 166  * adaptive tuning starting from default advancement of 1000ns.  '0' disables
 167  * advancement entirely.  Any other value is used as-is and disables adaptive
 168  * tuning, i.e. allows privileged userspace to set an exact advancement time.
 169  */
 170 static int __read_mostly lapic_timer_advance_ns = -1;
 171 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 172
 173 static bool __read_mostly vector_hashing = true;
 174 module_param(vector_hashing, bool, S_IRUGO);
 175
 176 bool __read_mostly enable_vmware_backdoor = false;
 177 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 178 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 179
 180 static bool __read_mostly force_emulation_prefix = false;
 181 module_param(force_emulation_prefix, bool, S_IRUGO);
 182
 183 int __read_mostly pi_inject_timer = -1;
 184 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
 185
 186 /*
 187  * Restoring the host value for MSRs that are only consumed when running in
 188  * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
 189  * returns to userspace, i.e. the kernel can run with the guest's value.
 190  */
 191 #define KVM_MAX_NR_USER_RETURN_MSRS 16
 192
 193 struct kvm_user_return_msrs {
 194         struct user_return_notifier urn;
 195         bool registered;
 196         struct kvm_user_return_msr_values {
 197                 u64 host;
 198                 u64 curr;
 199         } values[KVM_MAX_NR_USER_RETURN_MSRS];
 200 };
 201
 202 u32 __read_mostly kvm_nr_uret_msrs;
 203 EXPORT_SYMBOL_GPL(kvm_nr_uret_msrs);
 204 static u32 __read_mostly kvm_uret_msrs_list[KVM_MAX_NR_USER_RETURN_MSRS];
 205 static struct kvm_user_return_msrs __percpu *user_return_msrs;
 206
 207 #define KVM_SUPPORTED_XCR0     (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
 208                                 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
 209                                 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
 210                                 | XFEATURE_MASK_PKRU)
 211
 212 u64 __read_mostly host_efer;
 213 EXPORT_SYMBOL_GPL(host_efer);
 214
 215 bool __read_mostly allow_smaller_maxphyaddr = 0;
 216 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr);
 217
 218 bool __read_mostly enable_apicv = true;
 219 EXPORT_SYMBOL_GPL(enable_apicv);
 220
 221 u64 __read_mostly host_xss;
 222 EXPORT_SYMBOL_GPL(host_xss);
 223 u64 __read_mostly supported_xss;
 224 EXPORT_SYMBOL_GPL(supported_xss);
 225
 226 struct kvm_stats_debugfs_item debugfs_entries[] = {
 227         VCPU_STAT("pf_fixed", pf_fixed),
 228         VCPU_STAT("pf_guest", pf_guest),
 229         VCPU_STAT("tlb_flush", tlb_flush),
 230         VCPU_STAT("invlpg", invlpg),
 231         VCPU_STAT("exits", exits),
 232         VCPU_STAT("io_exits", io_exits),
 233         VCPU_STAT("mmio_exits", mmio_exits),
 234         VCPU_STAT("signal_exits", signal_exits),
 235         VCPU_STAT("irq_window", irq_window_exits),
 236         VCPU_STAT("nmi_window", nmi_window_exits),
 237         VCPU_STAT("halt_exits", halt_exits),
 238         VCPU_STAT("halt_successful_poll", generic.halt_successful_poll),
 239         VCPU_STAT("halt_attempted_poll", generic.halt_attempted_poll),
 240         VCPU_STAT("halt_poll_invalid", generic.halt_poll_invalid),
 241         VCPU_STAT("halt_wakeup", generic.halt_wakeup),
 242         VCPU_STAT("hypercalls", hypercalls),
 243         VCPU_STAT("request_irq", request_irq_exits),
 244         VCPU_STAT("irq_exits", irq_exits),
 245         VCPU_STAT("host_state_reload", host_state_reload),
 246         VCPU_STAT("fpu_reload", fpu_reload),
 247         VCPU_STAT("insn_emulation", insn_emulation),
 248         VCPU_STAT("insn_emulation_fail", insn_emulation_fail),
 249         VCPU_STAT("irq_injections", irq_injections),
 250         VCPU_STAT("nmi_injections", nmi_injections),
 251         VCPU_STAT("req_event", req_event),
 252         VCPU_STAT("l1d_flush", l1d_flush),
 253         VCPU_STAT("halt_poll_success_ns", generic.halt_poll_success_ns),
 254         VCPU_STAT("halt_poll_fail_ns", generic.halt_poll_fail_ns),
 255         VCPU_STAT("nested_run", nested_run),
 256         VCPU_STAT("directed_yield_attempted", directed_yield_attempted),
 257         VCPU_STAT("directed_yield_successful", directed_yield_successful),
 258         VCPU_STAT("guest_mode", guest_mode),
 259         VM_STAT("mmu_shadow_zapped", mmu_shadow_zapped),
 260         VM_STAT("mmu_pte_write", mmu_pte_write),
 261         VM_STAT("mmu_pde_zapped", mmu_pde_zapped),
 262         VM_STAT("mmu_flooded", mmu_flooded),
 263         VM_STAT("mmu_recycled", mmu_recycled),
 264         VM_STAT("mmu_cache_miss", mmu_cache_miss),
 265         VM_STAT("mmu_unsync", mmu_unsync),
 266         VM_STAT("remote_tlb_flush", generic.remote_tlb_flush),
 267         VM_STAT("largepages", lpages, .mode = 0444),
 268         VM_STAT("nx_largepages_splitted", nx_lpage_splits, .mode = 0444),
 269         VM_STAT("max_mmu_page_hash_collisions", max_mmu_page_hash_collisions),
 270         { NULL }
 271 };
 272
 273 u64 __read_mostly host_xcr0;
 274 u64 __read_mostly supported_xcr0;
 275 EXPORT_SYMBOL_GPL(supported_xcr0);
 276
 277 static struct kmem_cache *x86_fpu_cache;
 278
 279 static struct kmem_cache *x86_emulator_cache;
 280
 281 /*
 282  * When called, it means the previous get/set msr reached an invalid msr.
 283  * Return true if we want to ignore/silent this failed msr access.
 284  */
 285 static bool kvm_msr_ignored_check(u32 msr, u64 data, bool write)
 286 {
 287         const char *op = write ? "wrmsr" : "rdmsr";
 288
 289         if (ignore_msrs) {
 290                 if (report_ignored_msrs)
 291                         kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
 292                                       op, msr, data);
 293                 /* Mask the error */
 294                 return true;
 295         } else {
 296                 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
 297                                       op, msr, data);
 298                 return false;
 299         }
 300 }
 301
 302 static struct kmem_cache *kvm_alloc_emulator_cache(void)
 303 {
 304         unsigned int useroffset = offsetof(struct x86_emulate_ctxt, src);
 305         unsigned int size = sizeof(struct x86_emulate_ctxt);
 306
 307         return kmem_cache_create_usercopy("x86_emulator", size,
 308                                           __alignof__(struct x86_emulate_ctxt),
 309                                           SLAB_ACCOUNT, useroffset,
 310                                           size - useroffset, NULL);
 311 }
 312
 313 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 314
 315 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 316 {
 317         int i;
 318         for (i = 0; i < ASYNC_PF_PER_VCPU; i++)
 319                 vcpu->arch.apf.gfns[i] = ~0;
 320 }
 321
 322 static void kvm_on_user_return(struct user_return_notifier *urn)
 323 {
 324         unsigned slot;
 325         struct kvm_user_return_msrs *msrs
 326                 = container_of(urn, struct kvm_user_return_msrs, urn);
 327         struct kvm_user_return_msr_values *values;
 328         unsigned long flags;
 329
 330         /*
 331          * Disabling irqs at this point since the following code could be
 332          * interrupted and executed through kvm_arch_hardware_disable()
 333          */
 334         local_irq_save(flags);
 335         if (msrs->registered) {
 336                 msrs->registered = false;
 337                 user_return_notifier_unregister(urn);
 338         }
 339         local_irq_restore(flags);
 340         for (slot = 0; slot < kvm_nr_uret_msrs; ++slot) {
 341                 values = &msrs->values[slot];
 342                 if (values->host != values->curr) {
 343                         wrmsrl(kvm_uret_msrs_list[slot], values->host);
 344                         values->curr = values->host;
 345                 }
 346         }
 347 }
 348
 349 static int kvm_probe_user_return_msr(u32 msr)
 350 {
 351         u64 val;
 352         int ret;
 353
 354         preempt_disable();
 355         ret = rdmsrl_safe(msr, &val);
 356         if (ret)
 357                 goto out;
 358         ret = wrmsrl_safe(msr, val);
 359 out:
 360         preempt_enable();
 361         return ret;
 362 }
 363
 364 int kvm_add_user_return_msr(u32 msr)
 365 {
 366         BUG_ON(kvm_nr_uret_msrs >= KVM_MAX_NR_USER_RETURN_MSRS);
 367
 368         if (kvm_probe_user_return_msr(msr))
 369                 return -1;
 370
 371         kvm_uret_msrs_list[kvm_nr_uret_msrs] = msr;
 372         return kvm_nr_uret_msrs++;
 373 }
 374 EXPORT_SYMBOL_GPL(kvm_add_user_return_msr);
 375
 376 int kvm_find_user_return_msr(u32 msr)
 377 {
 378         int i;
 379
 380         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 381                 if (kvm_uret_msrs_list[i] == msr)
 382                         return i;
 383         }
 384         return -1;
 385 }
 386 EXPORT_SYMBOL_GPL(kvm_find_user_return_msr);
 387
 388 static void kvm_user_return_msr_cpu_online(void)
 389 {
 390         unsigned int cpu = smp_processor_id();
 391         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 392         u64 value;
 393         int i;
 394
 395         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 396                 rdmsrl_safe(kvm_uret_msrs_list[i], &value);
 397                 msrs->values[i].host = value;
 398                 msrs->values[i].curr = value;
 399         }
 400 }
 401
 402 int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)
 403 {
 404         unsigned int cpu = smp_processor_id();
 405         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 406         int err;
 407
 408         value = (value & mask) | (msrs->values[slot].host & ~mask);
 409         if (value == msrs->values[slot].curr)
 410                 return 0;
 411         err = wrmsrl_safe(kvm_uret_msrs_list[slot], value);
 412         if (err)
 413                 return 1;
 414
 415         msrs->values[slot].curr = value;
 416         if (!msrs->registered) {
 417                 msrs->urn.on_user_return = kvm_on_user_return;
 418                 user_return_notifier_register(&msrs->urn);
 419                 msrs->registered = true;
 420         }
 421         return 0;
 422 }
 423 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr);
 424
 425 static void drop_user_return_notifiers(void)
 426 {
 427         unsigned int cpu = smp_processor_id();
 428         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 429
 430         if (msrs->registered)
 431                 kvm_on_user_return(&msrs->urn);
 432 }
 433
 434 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 435 {
 436         return vcpu->arch.apic_base;
 437 }
 438 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 439
 440 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 441 {
 442         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 443 }
 444 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 445
 446 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 447 {
 448         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 449         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 450         u64 reserved_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu) | 0x2ff |
 451                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 452
 453         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 454                 return 1;
 455         if (!msr_info->host_initiated) {
 456                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 457                         return 1;
 458                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 459                         return 1;
 460         }
 461
 462         kvm_lapic_set_base(vcpu, msr_info->data);
 463         kvm_recalculate_apic_map(vcpu->kvm);
 464         return 0;
 465 }
 466 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 467
 468 asmlinkage __visible noinstr void kvm_spurious_fault(void)
 469 {
 470         /* Fault while not rebooting.  We want the trace. */
 471         BUG_ON(!kvm_rebooting);
 472 }
 473 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 474
 475 #define EXCPT_BENIGN            0
 476 #define EXCPT_CONTRIBUTORY      1
 477 #define EXCPT_PF                2
 478
 479 static int exception_class(int vector)
 480 {
 481         switch (vector) {
 482         case PF_VECTOR:
 483                 return EXCPT_PF;
 484         case DE_VECTOR:
 485         case TS_VECTOR:
 486         case NP_VECTOR:
 487         case SS_VECTOR:
 488         case GP_VECTOR:
 489                 return EXCPT_CONTRIBUTORY;
 490         default:
 491                 break;
 492         }
 493         return EXCPT_BENIGN;
 494 }
 495
 496 #define EXCPT_FAULT             0
 497 #define EXCPT_TRAP              1
 498 #define EXCPT_ABORT             2
 499 #define EXCPT_INTERRUPT         3
 500
 501 static int exception_type(int vector)
 502 {
 503         unsigned int mask;
 504
 505         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 506                 return EXCPT_INTERRUPT;
 507
 508         mask = 1 << vector;
 509
 510         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 511         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 512                 return EXCPT_TRAP;
 513
 514         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 515                 return EXCPT_ABORT;
 516
 517         /* Reserved exceptions will result in fault */
 518         return EXCPT_FAULT;
 519 }
 520
 521 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 522 {
 523         unsigned nr = vcpu->arch.exception.nr;
 524         bool has_payload = vcpu->arch.exception.has_payload;
 525         unsigned long payload = vcpu->arch.exception.payload;
 526
 527         if (!has_payload)
 528                 return;
 529
 530         switch (nr) {
 531         case DB_VECTOR:
 532                 /*
 533                  * "Certain debug exceptions may clear bit 0-3.  The
 534                  * remaining contents of the DR6 register are never
 535                  * cleared by the processor".
 536                  */
 537                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 538                 /*
 539                  * In order to reflect the #DB exception payload in guest
 540                  * dr6, three components need to be considered: active low
 541                  * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
 542                  * DR6_BS and DR6_BT)
 543                  * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
 544                  * In the target guest dr6:
 545                  * FIXED_1 bits should always be set.
 546                  * Active low bits should be cleared if 1-setting in payload.
 547                  * Active high bits should be set if 1-setting in payload.
 548                  *
 549                  * Note, the payload is compatible with the pending debug
 550                  * exceptions/exit qualification under VMX, that active_low bits
 551                  * are active high in payload.
 552                  * So they need to be flipped for DR6.
 553                  */
 554                 vcpu->arch.dr6 |= DR6_ACTIVE_LOW;
 555                 vcpu->arch.dr6 |= payload;
 556                 vcpu->arch.dr6 ^= payload & DR6_ACTIVE_LOW;
 557
 558                 /*
 559                  * The #DB payload is defined as compatible with the 'pending
 560                  * debug exceptions' field under VMX, not DR6. While bit 12 is
 561                  * defined in the 'pending debug exceptions' field (enabled
 562                  * breakpoint), it is reserved and must be zero in DR6.
 563                  */
 564                 vcpu->arch.dr6 &= ~BIT(12);
 565                 break;
 566         case PF_VECTOR:
 567                 vcpu->arch.cr2 = payload;
 568                 break;
 569         }
 570
 571         vcpu->arch.exception.has_payload = false;
 572         vcpu->arch.exception.payload = 0;
 573 }
 574 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 575
 576 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 577                 unsigned nr, bool has_error, u32 error_code,
 578                 bool has_payload, unsigned long payload, bool reinject)
 579 {
 580         u32 prev_nr;
 581         int class1, class2;
 582
 583         kvm_make_request(KVM_REQ_EVENT, vcpu);
 584
 585         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 586         queue:
 587                 if (reinject) {
 588                         /*
 589                          * On vmentry, vcpu->arch.exception.pending is only
 590                          * true if an event injection was blocked by
 591                          * nested_run_pending.  In that case, however,
 592                          * vcpu_enter_guest requests an immediate exit,
 593                          * and the guest shouldn't proceed far enough to
 594                          * need reinjection.
 595                          */
 596                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 597                         vcpu->arch.exception.injected = true;
 598                         if (WARN_ON_ONCE(has_payload)) {
 599                                 /*
 600                                  * A reinjected event has already
 601                                  * delivered its payload.
 602                                  */
 603                                 has_payload = false;
 604                                 payload = 0;
 605                         }
 606                 } else {
 607                         vcpu->arch.exception.pending = true;
 608                         vcpu->arch.exception.injected = false;
 609                 }
 610                 vcpu->arch.exception.has_error_code = has_error;
 611                 vcpu->arch.exception.nr = nr;
 612                 vcpu->arch.exception.error_code = error_code;
 613                 vcpu->arch.exception.has_payload = has_payload;
 614                 vcpu->arch.exception.payload = payload;
 615                 if (!is_guest_mode(vcpu))
 616                         kvm_deliver_exception_payload(vcpu);
 617                 return;
 618         }
 619
 620         /* to check exception */
 621         prev_nr = vcpu->arch.exception.nr;
 622         if (prev_nr == DF_VECTOR) {
 623                 /* triple fault -> shutdown */
 624                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 625                 return;
 626         }
 627         class1 = exception_class(prev_nr);
 628         class2 = exception_class(nr);
 629         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 630                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 631                 /*
 632                  * Generate double fault per SDM Table 5-5.  Set
 633                  * exception.pending = true so that the double fault
 634                  * can trigger a nested vmexit.
 635                  */
 636                 vcpu->arch.exception.pending = true;
 637                 vcpu->arch.exception.injected = false;
 638                 vcpu->arch.exception.has_error_code = true;
 639                 vcpu->arch.exception.nr = DF_VECTOR;
 640                 vcpu->arch.exception.error_code = 0;
 641                 vcpu->arch.exception.has_payload = false;
 642                 vcpu->arch.exception.payload = 0;
 643         } else
 644                 /* replace previous exception with a new one in a hope
 645                    that instruction re-execution will regenerate lost
 646                    exception */
 647                 goto queue;
 648 }
 649
 650 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 651 {
 652         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 653 }
 654 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 655
 656 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 657 {
 658         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 659 }
 660 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 661
 662 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 663                            unsigned long payload)
 664 {
 665         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 666 }
 667 EXPORT_SYMBOL_GPL(kvm_queue_exception_p);
 668
 669 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 670                                     u32 error_code, unsigned long payload)
 671 {
 672         kvm_multiple_exception(vcpu, nr, true, error_code,
 673                                true, payload, false);
 674 }
 675
 676 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 677 {
 678         if (err)
 679                 kvm_inject_gp(vcpu, 0);
 680         else
 681                 return kvm_skip_emulated_instruction(vcpu);
 682
 683         return 1;
 684 }
 685 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 686
 687 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 688 {
 689         ++vcpu->stat.pf_guest;
 690         vcpu->arch.exception.nested_apf =
 691                 is_guest_mode(vcpu) && fault->async_page_fault;
 692         if (vcpu->arch.exception.nested_apf) {
 693                 vcpu->arch.apf.nested_apf_token = fault->address;
 694                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 695         } else {
 696                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 697                                         fault->address);
 698         }
 699 }
 700 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 701
 702 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
 703                                     struct x86_exception *fault)
 704 {
 705         struct kvm_mmu *fault_mmu;
 706         WARN_ON_ONCE(fault->vector != PF_VECTOR);
 707
 708         fault_mmu = fault->nested_page_fault ? vcpu->arch.mmu :
 709                                                vcpu->arch.walk_mmu;
 710
 711         /*
 712          * Invalidate the TLB entry for the faulting address, if it exists,
 713          * else the access will fault indefinitely (and to emulate hardware).
 714          */
 715         if ((fault->error_code & PFERR_PRESENT_MASK) &&
 716             !(fault->error_code & PFERR_RSVD_MASK))
 717                 kvm_mmu_invalidate_gva(vcpu, fault_mmu, fault->address,
 718                                        fault_mmu->root_hpa);
 719
 720         fault_mmu->inject_page_fault(vcpu, fault);
 721         return fault->nested_page_fault;
 722 }
 723 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault);
 724
 725 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 726 {
 727         atomic_inc(&vcpu->arch.nmi_queued);
 728         kvm_make_request(KVM_REQ_NMI, vcpu);
 729 }
 730 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 731
 732 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 733 {
 734         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 735 }
 736 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 737
 738 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 739 {
 740         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 741 }
 742 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 743
 744 /*
 745  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 746  * a #GP and return false.
 747  */
 748 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 749 {
 750         if (static_call(kvm_x86_get_cpl)(vcpu) <= required_cpl)
 751                 return true;
 752         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 753         return false;
 754 }
 755 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 756
 757 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 758 {
 759         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 760                 return true;
 761
 762         kvm_queue_exception(vcpu, UD_VECTOR);
 763         return false;
 764 }
 765 EXPORT_SYMBOL_GPL(kvm_require_dr);
 766
 767 /*
 768  * This function will be used to read from the physical memory of the currently
 769  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 770  * can read from guest physical or from the guest's guest physical memory.
 771  */
 772 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 773                             gfn_t ngfn, void *data, int offset, int len,
 774                             u32 access)
 775 {
 776         struct x86_exception exception;
 777         gfn_t real_gfn;
 778         gpa_t ngpa;
 779
 780         ngpa     = gfn_to_gpa(ngfn);
 781         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 782         if (real_gfn == UNMAPPED_GVA)
 783                 return -EFAULT;
 784
 785         real_gfn = gpa_to_gfn(real_gfn);
 786
 787         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 788 }
 789 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 790
 791 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
 792 {
 793         return vcpu->arch.reserved_gpa_bits | rsvd_bits(5, 8) | rsvd_bits(1, 2);
 794 }
 795
 796 /*
 797  * Load the pae pdptrs.  Return 1 if they are all valid, 0 otherwise.
 798  */
 799 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 800 {
 801         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 802         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 803         int i;
 804         int ret;
 805         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 806
 807         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 808                                       offset * sizeof(u64), sizeof(pdpte),
 809                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 810         if (ret < 0) {
 811                 ret = 0;
 812                 goto out;
 813         }
 814         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 815                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 816                     (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
 817                         ret = 0;
 818                         goto out;
 819                 }
 820         }
 821         ret = 1;
 822
 823         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 824         kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
 825         vcpu->arch.pdptrs_from_userspace = false;
 826
 827 out:
 828
 829         return ret;
 830 }
 831 EXPORT_SYMBOL_GPL(load_pdptrs);
 832
 833 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0)
 834 {
 835         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 836
 837         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 838                 kvm_clear_async_pf_completion_queue(vcpu);
 839                 kvm_async_pf_hash_reset(vcpu);
 840         }
 841
 842         if ((cr0 ^ old_cr0) & update_bits)
 843                 kvm_mmu_reset_context(vcpu);
 844
 845         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 846             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 847             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 848                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 849 }
 850 EXPORT_SYMBOL_GPL(kvm_post_set_cr0);
 851
 852 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 853 {
 854         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 855         unsigned long pdptr_bits = X86_CR0_CD | X86_CR0_NW | X86_CR0_PG;
 856
 857         cr0 |= X86_CR0_ET;
 858
 859 #ifdef CONFIG_X86_64
 860         if (cr0 & 0xffffffff00000000UL)
 861                 return 1;
 862 #endif
 863
 864         cr0 &= ~CR0_RESERVED_BITS;
 865
 866         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 867                 return 1;
 868
 869         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 870                 return 1;
 871
 872 #ifdef CONFIG_X86_64
 873         if ((vcpu->arch.efer & EFER_LME) && !is_paging(vcpu) &&
 874             (cr0 & X86_CR0_PG)) {
 875                 int cs_db, cs_l;
 876
 877                 if (!is_pae(vcpu))
 878                         return 1;
 879                 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
 880                 if (cs_l)
 881                         return 1;
 882         }
 883 #endif
 884         if (!(vcpu->arch.efer & EFER_LME) && (cr0 & X86_CR0_PG) &&
 885             is_pae(vcpu) && ((cr0 ^ old_cr0) & pdptr_bits) &&
 886             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu)))
 887                 return 1;
 888
 889         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 890                 return 1;
 891
 892         static_call(kvm_x86_set_cr0)(vcpu, cr0);
 893
 894         kvm_post_set_cr0(vcpu, old_cr0, cr0);
 895
 896         return 0;
 897 }
 898 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 899
 900 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 901 {
 902         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 903 }
 904 EXPORT_SYMBOL_GPL(kvm_lmsw);
 905
 906 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
 907 {
 908         if (vcpu->arch.guest_state_protected)
 909                 return;
 910
 911         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 912
 913                 if (vcpu->arch.xcr0 != host_xcr0)
 914                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 915
 916                 if (vcpu->arch.xsaves_enabled &&
 917                     vcpu->arch.ia32_xss != host_xss)
 918                         wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
 919         }
 920
 921         if (static_cpu_has(X86_FEATURE_PKU) &&
 922             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 923              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU)) &&
 924             vcpu->arch.pkru != vcpu->arch.host_pkru)
 925                 __write_pkru(vcpu->arch.pkru);
 926 }
 927 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
 928
 929 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
 930 {
 931         if (vcpu->arch.guest_state_protected)
 932                 return;
 933
 934         if (static_cpu_has(X86_FEATURE_PKU) &&
 935             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 936              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU))) {
 937                 vcpu->arch.pkru = rdpkru();
 938                 if (vcpu->arch.pkru != vcpu->arch.host_pkru)
 939                         __write_pkru(vcpu->arch.host_pkru);
 940         }
 941
 942         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 943
 944                 if (vcpu->arch.xcr0 != host_xcr0)
 945                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 946
 947                 if (vcpu->arch.xsaves_enabled &&
 948                     vcpu->arch.ia32_xss != host_xss)
 949                         wrmsrl(MSR_IA32_XSS, host_xss);
 950         }
 951
 952 }
 953 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
 954
 955 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 956 {
 957         u64 xcr0 = xcr;
 958         u64 old_xcr0 = vcpu->arch.xcr0;
 959         u64 valid_bits;
 960
 961         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 962         if (index != XCR_XFEATURE_ENABLED_MASK)
 963                 return 1;
 964         if (!(xcr0 & XFEATURE_MASK_FP))
 965                 return 1;
 966         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 967                 return 1;
 968
 969         /*
 970          * Do not allow the guest to set bits that we do not support
 971          * saving.  However, xcr0 bit 0 is always set, even if the
 972          * emulated CPU does not support XSAVE (see fx_init).
 973          */
 974         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 975         if (xcr0 & ~valid_bits)
 976                 return 1;
 977
 978         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 979             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 980                 return 1;
 981
 982         if (xcr0 & XFEATURE_MASK_AVX512) {
 983                 if (!(xcr0 & XFEATURE_MASK_YMM))
 984                         return 1;
 985                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 986                         return 1;
 987         }
 988         vcpu->arch.xcr0 = xcr0;
 989
 990         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 991                 kvm_update_cpuid_runtime(vcpu);
 992         return 0;
 993 }
 994
 995 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu)
 996 {
 997         if (static_call(kvm_x86_get_cpl)(vcpu) != 0 ||
 998             __kvm_set_xcr(vcpu, kvm_rcx_read(vcpu), kvm_read_edx_eax(vcpu))) {
 999                 kvm_inject_gp(vcpu, 0);
1000                 return 1;
1001         }
1002
1003         return kvm_skip_emulated_instruction(vcpu);
1004 }
1005 EXPORT_SYMBOL_GPL(kvm_emulate_xsetbv);
1006
1007 bool kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1008 {
1009         if (cr4 & cr4_reserved_bits)
1010                 return false;
1011
1012         if (cr4 & vcpu->arch.cr4_guest_rsvd_bits)
1013                 return false;
1014
1015         return static_call(kvm_x86_is_valid_cr4)(vcpu, cr4);
1016 }
1017 EXPORT_SYMBOL_GPL(kvm_is_valid_cr4);
1018
1019 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4)
1020 {
1021         unsigned long mmu_role_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
1022                                       X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
1023
1024         if (((cr4 ^ old_cr4) & mmu_role_bits) ||
1025             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
1026                 kvm_mmu_reset_context(vcpu);
1027 }
1028 EXPORT_SYMBOL_GPL(kvm_post_set_cr4);
1029
1030 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1031 {
1032         unsigned long old_cr4 = kvm_read_cr4(vcpu);
1033         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
1034                                    X86_CR4_SMEP;
1035
1036         if (!kvm_is_valid_cr4(vcpu, cr4))
1037                 return 1;
1038
1039         if (is_long_mode(vcpu)) {
1040                 if (!(cr4 & X86_CR4_PAE))
1041                         return 1;
1042                 if ((cr4 ^ old_cr4) & X86_CR4_LA57)
1043                         return 1;
1044         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
1045                    && ((cr4 ^ old_cr4) & pdptr_bits)
1046                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
1047                                    kvm_read_cr3(vcpu)))
1048                 return 1;
1049
1050         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
1051                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
1052                         return 1;
1053
1054                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1055                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
1056                         return 1;
1057         }
1058
1059         static_call(kvm_x86_set_cr4)(vcpu, cr4);
1060
1061         kvm_post_set_cr4(vcpu, old_cr4, cr4);
1062
1063         return 0;
1064 }
1065 EXPORT_SYMBOL_GPL(kvm_set_cr4);
1066
1067 static void kvm_invalidate_pcid(struct kvm_vcpu *vcpu, unsigned long pcid)
1068 {
1069         struct kvm_mmu *mmu = vcpu->arch.mmu;
1070         unsigned long roots_to_free = 0;
1071         int i;
1072
1073         /*
1074          * If neither the current CR3 nor any of the prev_roots use the given
1075          * PCID, then nothing needs to be done here because a resync will
1076          * happen anyway before switching to any other CR3.
1077          */
1078         if (kvm_get_active_pcid(vcpu) == pcid) {
1079                 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
1080                 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1081         }
1082
1083         for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
1084                 if (kvm_get_pcid(vcpu, mmu->prev_roots[i].pgd) == pcid)
1085                         roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
1086
1087         kvm_mmu_free_roots(vcpu, mmu, roots_to_free);
1088 }
1089
1090 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1091 {
1092         bool skip_tlb_flush = false;
1093         unsigned long pcid = 0;
1094 #ifdef CONFIG_X86_64
1095         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
1096
1097         if (pcid_enabled) {
1098                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
1099                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
1100                 pcid = cr3 & X86_CR3_PCID_MASK;
1101         }
1102 #endif
1103
1104         /* PDPTRs are always reloaded for PAE paging. */
1105         if (cr3 == kvm_read_cr3(vcpu) && !is_pae_paging(vcpu))
1106                 goto handle_tlb_flush;
1107
1108         /*
1109          * Do not condition the GPA check on long mode, this helper is used to
1110          * stuff CR3, e.g. for RSM emulation, and there is no guarantee that
1111          * the current vCPU mode is accurate.
1112          */
1113         if (kvm_vcpu_is_illegal_gpa(vcpu, cr3))
1114                 return 1;
1115
1116         if (is_pae_paging(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
1117                 return 1;
1118
1119         if (cr3 != kvm_read_cr3(vcpu))
1120                 kvm_mmu_new_pgd(vcpu, cr3);
1121
1122         vcpu->arch.cr3 = cr3;
1123         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
1124
1125 handle_tlb_flush:
1126         /*
1127          * A load of CR3 that flushes the TLB flushes only the current PCID,
1128          * even if PCID is disabled, in which case PCID=0 is flushed.  It's a
1129          * moot point in the end because _disabling_ PCID will flush all PCIDs,
1130          * and it's impossible to use a non-zero PCID when PCID is disabled,
1131          * i.e. only PCID=0 can be relevant.
1132          */
1133         if (!skip_tlb_flush)
1134                 kvm_invalidate_pcid(vcpu, pcid);
1135
1136         return 0;
1137 }
1138 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1139
1140 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1141 {
1142         if (cr8 & CR8_RESERVED_BITS)
1143                 return 1;
1144         if (lapic_in_kernel(vcpu))
1145                 kvm_lapic_set_tpr(vcpu, cr8);
1146         else
1147                 vcpu->arch.cr8 = cr8;
1148         return 0;
1149 }
1150 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1151
1152 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1153 {
1154         if (lapic_in_kernel(vcpu))
1155                 return kvm_lapic_get_cr8(vcpu);
1156         else
1157                 return vcpu->arch.cr8;
1158 }
1159 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1160
1161 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1162 {
1163         int i;
1164
1165         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1166                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1167                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1168                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
1169         }
1170 }
1171
1172 void kvm_update_dr7(struct kvm_vcpu *vcpu)
1173 {
1174         unsigned long dr7;
1175
1176         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1177                 dr7 = vcpu->arch.guest_debug_dr7;
1178         else
1179                 dr7 = vcpu->arch.dr7;
1180         static_call(kvm_x86_set_dr7)(vcpu, dr7);
1181         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1182         if (dr7 & DR7_BP_EN_MASK)
1183                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1184 }
1185 EXPORT_SYMBOL_GPL(kvm_update_dr7);
1186
1187 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1188 {
1189         u64 fixed = DR6_FIXED_1;
1190
1191         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1192                 fixed |= DR6_RTM;
1193
1194         if (!guest_cpuid_has(vcpu, X86_FEATURE_BUS_LOCK_DETECT))
1195                 fixed |= DR6_BUS_LOCK;
1196         return fixed;
1197 }
1198
1199 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1200 {
1201         size_t size = ARRAY_SIZE(vcpu->arch.db);
1202
1203         switch (dr) {
1204         case 0 ... 3:
1205                 vcpu->arch.db[array_index_nospec(dr, size)] = val;
1206                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1207                         vcpu->arch.eff_db[dr] = val;
1208                 break;
1209         case 4:
1210         case 6:
1211                 if (!kvm_dr6_valid(val))
1212                         return 1; /* #GP */
1213                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1214                 break;
1215         case 5:
1216         default: /* 7 */
1217                 if (!kvm_dr7_valid(val))
1218                         return 1; /* #GP */
1219                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1220                 kvm_update_dr7(vcpu);
1221                 break;
1222         }
1223
1224         return 0;
1225 }
1226 EXPORT_SYMBOL_GPL(kvm_set_dr);
1227
1228 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1229 {
1230         size_t size = ARRAY_SIZE(vcpu->arch.db);
1231
1232         switch (dr) {
1233         case 0 ... 3:
1234                 *val = vcpu->arch.db[array_index_nospec(dr, size)];
1235                 break;
1236         case 4:
1237         case 6:
1238                 *val = vcpu->arch.dr6;
1239                 break;
1240         case 5:
1241         default: /* 7 */
1242                 *val = vcpu->arch.dr7;
1243                 break;
1244         }
1245 }
1246 EXPORT_SYMBOL_GPL(kvm_get_dr);
1247
1248 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu)
1249 {
1250         u32 ecx = kvm_rcx_read(vcpu);
1251         u64 data;
1252
1253         if (kvm_pmu_rdpmc(vcpu, ecx, &data)) {
1254                 kvm_inject_gp(vcpu, 0);
1255                 return 1;
1256         }
1257
1258         kvm_rax_write(vcpu, (u32)data);
1259         kvm_rdx_write(vcpu, data >> 32);
1260         return kvm_skip_emulated_instruction(vcpu);
1261 }
1262 EXPORT_SYMBOL_GPL(kvm_emulate_rdpmc);
1263
1264 /*
1265  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1266  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1267  *
1268  * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1269  * extract the supported MSRs from the related const lists.
1270  * msrs_to_save is selected from the msrs_to_save_all to reflect the
1271  * capabilities of the host cpu. This capabilities test skips MSRs that are
1272  * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1273  * may depend on host virtualization features rather than host cpu features.
1274  */
1275
1276 static const u32 msrs_to_save_all[] = {
1277         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1278         MSR_STAR,
1279 #ifdef CONFIG_X86_64
1280         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1281 #endif
1282         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1283         MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1284         MSR_IA32_SPEC_CTRL,
1285         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1286         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1287         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1288         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1289         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1290         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1291         MSR_IA32_UMWAIT_CONTROL,
1292
1293         MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1294         MSR_ARCH_PERFMON_FIXED_CTR0 + 2, MSR_ARCH_PERFMON_FIXED_CTR0 + 3,
1295         MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1296         MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1297         MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1298         MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1299         MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1300         MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1301         MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1302         MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1303         MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1304         MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1305         MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1306         MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1307         MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1308         MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1309         MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1310         MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1311         MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1312         MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1313         MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1314         MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1315 };
1316
1317 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
1318 static unsigned num_msrs_to_save;
1319
1320 static const u32 emulated_msrs_all[] = {
1321         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1322         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1323         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1324         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1325         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1326         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1327         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1328         HV_X64_MSR_RESET,
1329         HV_X64_MSR_VP_INDEX,
1330         HV_X64_MSR_VP_RUNTIME,
1331         HV_X64_MSR_SCONTROL,
1332         HV_X64_MSR_STIMER0_CONFIG,
1333         HV_X64_MSR_VP_ASSIST_PAGE,
1334         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1335         HV_X64_MSR_TSC_EMULATION_STATUS,
1336         HV_X64_MSR_SYNDBG_OPTIONS,
1337         HV_X64_MSR_SYNDBG_CONTROL, HV_X64_MSR_SYNDBG_STATUS,
1338         HV_X64_MSR_SYNDBG_SEND_BUFFER, HV_X64_MSR_SYNDBG_RECV_BUFFER,
1339         HV_X64_MSR_SYNDBG_PENDING_BUFFER,
1340
1341         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1342         MSR_KVM_PV_EOI_EN, MSR_KVM_ASYNC_PF_INT, MSR_KVM_ASYNC_PF_ACK,
1343
1344         MSR_IA32_TSC_ADJUST,
1345         MSR_IA32_TSC_DEADLINE,
1346         MSR_IA32_ARCH_CAPABILITIES,
1347         MSR_IA32_PERF_CAPABILITIES,
1348         MSR_IA32_MISC_ENABLE,
1349         MSR_IA32_MCG_STATUS,
1350         MSR_IA32_MCG_CTL,
1351         MSR_IA32_MCG_EXT_CTL,
1352         MSR_IA32_SMBASE,
1353         MSR_SMI_COUNT,
1354         MSR_PLATFORM_INFO,
1355         MSR_MISC_FEATURES_ENABLES,
1356         MSR_AMD64_VIRT_SPEC_CTRL,
1357         MSR_IA32_POWER_CTL,
1358         MSR_IA32_UCODE_REV,
1359
1360         /*
1361          * The following list leaves out MSRs whose values are determined
1362          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1363          * We always support the "true" VMX control MSRs, even if the host
1364          * processor does not, so I am putting these registers here rather
1365          * than in msrs_to_save_all.
1366          */
1367         MSR_IA32_VMX_BASIC,
1368         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1369         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1370         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1371         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1372         MSR_IA32_VMX_MISC,
1373         MSR_IA32_VMX_CR0_FIXED0,
1374         MSR_IA32_VMX_CR4_FIXED0,
1375         MSR_IA32_VMX_VMCS_ENUM,
1376         MSR_IA32_VMX_PROCBASED_CTLS2,
1377         MSR_IA32_VMX_EPT_VPID_CAP,
1378         MSR_IA32_VMX_VMFUNC,
1379
1380         MSR_K7_HWCR,
1381         MSR_KVM_POLL_CONTROL,
1382 };
1383
1384 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1385 static unsigned num_emulated_msrs;
1386
1387 /*
1388  * List of msr numbers which are used to expose MSR-based features that
1389  * can be used by a hypervisor to validate requested CPU features.
1390  */
1391 static const u32 msr_based_features_all[] = {
1392         MSR_IA32_VMX_BASIC,
1393         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1394         MSR_IA32_VMX_PINBASED_CTLS,
1395         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1396         MSR_IA32_VMX_PROCBASED_CTLS,
1397         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1398         MSR_IA32_VMX_EXIT_CTLS,
1399         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1400         MSR_IA32_VMX_ENTRY_CTLS,
1401         MSR_IA32_VMX_MISC,
1402         MSR_IA32_VMX_CR0_FIXED0,
1403         MSR_IA32_VMX_CR0_FIXED1,
1404         MSR_IA32_VMX_CR4_FIXED0,
1405         MSR_IA32_VMX_CR4_FIXED1,
1406         MSR_IA32_VMX_VMCS_ENUM,
1407         MSR_IA32_VMX_PROCBASED_CTLS2,
1408         MSR_IA32_VMX_EPT_VPID_CAP,
1409         MSR_IA32_VMX_VMFUNC,
1410
1411         MSR_F10H_DECFG,
1412         MSR_IA32_UCODE_REV,
1413         MSR_IA32_ARCH_CAPABILITIES,
1414         MSR_IA32_PERF_CAPABILITIES,
1415 };
1416
1417 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
1418 static unsigned int num_msr_based_features;
1419
1420 static u64 kvm_get_arch_capabilities(void)
1421 {
1422         u64 data = 0;
1423
1424         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1425                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1426
1427         /*
1428          * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1429          * the nested hypervisor runs with NX huge pages.  If it is not,
1430          * L1 is anyway vulnerable to ITLB_MULTIHIT exploits from other
1431          * L1 guests, so it need not worry about its own (L2) guests.
1432          */
1433         data |= ARCH_CAP_PSCHANGE_MC_NO;
1434
1435         /*
1436          * If we're doing cache flushes (either "always" or "cond")
1437          * we will do one whenever the guest does a vmlaunch/vmresume.
1438          * If an outer hypervisor is doing the cache flush for us
1439          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1440          * capability to the guest too, and if EPT is disabled we're not
1441          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1442          * require a nested hypervisor to do a flush of its own.
1443          */
1444         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1445                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1446
1447         if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1448                 data |= ARCH_CAP_RDCL_NO;
1449         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1450                 data |= ARCH_CAP_SSB_NO;
1451         if (!boot_cpu_has_bug(X86_BUG_MDS))
1452                 data |= ARCH_CAP_MDS_NO;
1453
1454         if (!boot_cpu_has(X86_FEATURE_RTM)) {
1455                 /*
1456                  * If RTM=0 because the kernel has disabled TSX, the host might
1457                  * have TAA_NO or TSX_CTRL.  Clear TAA_NO (the guest sees RTM=0
1458                  * and therefore knows that there cannot be TAA) but keep
1459                  * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1460                  * and we want to allow migrating those guests to tsx=off hosts.
1461                  */
1462                 data &= ~ARCH_CAP_TAA_NO;
1463         } else if (!boot_cpu_has_bug(X86_BUG_TAA)) {
1464                 data |= ARCH_CAP_TAA_NO;
1465         } else {
1466                 /*
1467                  * Nothing to do here; we emulate TSX_CTRL if present on the
1468                  * host so the guest can choose between disabling TSX or
1469                  * using VERW to clear CPU buffers.
1470                  */
1471         }
1472
1473         return data;
1474 }
1475
1476 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1477 {
1478         switch (msr->index) {
1479         case MSR_IA32_ARCH_CAPABILITIES:
1480                 msr->data = kvm_get_arch_capabilities();
1481                 break;
1482         case MSR_IA32_UCODE_REV:
1483                 rdmsrl_safe(msr->index, &msr->data);
1484                 break;
1485         default:
1486                 return static_call(kvm_x86_get_msr_feature)(msr);
1487         }
1488         return 0;
1489 }
1490
1491 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1492 {
1493         struct kvm_msr_entry msr;
1494         int r;
1495
1496         msr.index = index;
1497         r = kvm_get_msr_feature(&msr);
1498
1499         if (r == KVM_MSR_RET_INVALID) {
1500                 /* Unconditionally clear the output for simplicity */
1501                 *data = 0;
1502                 if (kvm_msr_ignored_check(index, 0, false))
1503                         r = 0;
1504         }
1505
1506         if (r)
1507                 return r;
1508
1509         *data = msr.data;
1510
1511         return 0;
1512 }
1513
1514 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1515 {
1516         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1517                 return false;
1518
1519         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1520                 return false;
1521
1522         if (efer & (EFER_LME | EFER_LMA) &&
1523             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1524                 return false;
1525
1526         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1527                 return false;
1528
1529         return true;
1530
1531 }
1532 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1533 {
1534         if (efer & efer_reserved_bits)
1535                 return false;
1536
1537         return __kvm_valid_efer(vcpu, efer);
1538 }
1539 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1540
1541 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1542 {
1543         u64 old_efer = vcpu->arch.efer;
1544         u64 efer = msr_info->data;
1545         int r;
1546
1547         if (efer & efer_reserved_bits)
1548                 return 1;
1549
1550         if (!msr_info->host_initiated) {
1551                 if (!__kvm_valid_efer(vcpu, efer))
1552                         return 1;
1553
1554                 if (is_paging(vcpu) &&
1555                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1556                         return 1;
1557         }
1558
1559         efer &= ~EFER_LMA;
1560         efer |= vcpu->arch.efer & EFER_LMA;
1561
1562         r = static_call(kvm_x86_set_efer)(vcpu, efer);
1563         if (r) {
1564                 WARN_ON(r > 0);
1565                 return r;
1566         }
1567
1568         /* Update reserved bits */
1569         if ((efer ^ old_efer) & EFER_NX)
1570                 kvm_mmu_reset_context(vcpu);
1571
1572         return 0;
1573 }
1574
1575 void kvm_enable_efer_bits(u64 mask)
1576 {
1577        efer_reserved_bits &= ~mask;
1578 }
1579 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1580
1581 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type)
1582 {
1583         struct kvm_x86_msr_filter *msr_filter;
1584         struct msr_bitmap_range *ranges;
1585         struct kvm *kvm = vcpu->kvm;
1586         bool allowed;
1587         int idx;
1588         u32 i;
1589
1590         /* x2APIC MSRs do not support filtering. */
1591         if (index >= 0x800 && index <= 0x8ff)
1592                 return true;
1593
1594         idx = srcu_read_lock(&kvm->srcu);
1595
1596         msr_filter = srcu_dereference(kvm->arch.msr_filter, &kvm->srcu);
1597         if (!msr_filter) {
1598                 allowed = true;
1599                 goto out;
1600         }
1601
1602         allowed = msr_filter->default_allow;
1603         ranges = msr_filter->ranges;
1604
1605         for (i = 0; i < msr_filter->count; i++) {
1606                 u32 start = ranges[i].base;
1607                 u32 end = start + ranges[i].nmsrs;
1608                 u32 flags = ranges[i].flags;
1609                 unsigned long *bitmap = ranges[i].bitmap;
1610
1611                 if ((index >= start) && (index < end) && (flags & type)) {
1612                         allowed = !!test_bit(index - start, bitmap);
1613                         break;
1614                 }
1615         }
1616
1617 out:
1618         srcu_read_unlock(&kvm->srcu, idx);
1619
1620         return allowed;
1621 }
1622 EXPORT_SYMBOL_GPL(kvm_msr_allowed);
1623
1624 /*
1625  * Write @data into the MSR specified by @index.  Select MSR specific fault
1626  * checks are bypassed if @host_initiated is %true.
1627  * Returns 0 on success, non-0 otherwise.
1628  * Assumes vcpu_load() was already called.
1629  */
1630 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1631                          bool host_initiated)
1632 {
1633         struct msr_data msr;
1634
1635         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_WRITE))
1636                 return KVM_MSR_RET_FILTERED;
1637
1638         switch (index) {
1639         case MSR_FS_BASE:
1640         case MSR_GS_BASE:
1641         case MSR_KERNEL_GS_BASE:
1642         case MSR_CSTAR:
1643         case MSR_LSTAR:
1644                 if (is_noncanonical_address(data, vcpu))
1645                         return 1;
1646                 break;
1647         case MSR_IA32_SYSENTER_EIP:
1648         case MSR_IA32_SYSENTER_ESP:
1649                 /*
1650                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1651                  * non-canonical address is written on Intel but not on
1652                  * AMD (which ignores the top 32-bits, because it does
1653                  * not implement 64-bit SYSENTER).
1654                  *
1655                  * 64-bit code should hence be able to write a non-canonical
1656                  * value on AMD.  Making the address canonical ensures that
1657                  * vmentry does not fail on Intel after writing a non-canonical
1658                  * value, and that something deterministic happens if the guest
1659                  * invokes 64-bit SYSENTER.
1660                  */
1661                 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1662                 break;
1663         case MSR_TSC_AUX:
1664                 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1665                         return 1;
1666
1667                 if (!host_initiated &&
1668                     !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1669                     !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1670                         return 1;
1671
1672                 /*
1673                  * Per Intel's SDM, bits 63:32 are reserved, but AMD's APM has
1674                  * incomplete and conflicting architectural behavior.  Current
1675                  * AMD CPUs completely ignore bits 63:32, i.e. they aren't
1676                  * reserved and always read as zeros.  Enforce Intel's reserved
1677                  * bits check if and only if the guest CPU is Intel, and clear
1678                  * the bits in all other cases.  This ensures cross-vendor
1679                  * migration will provide consistent behavior for the guest.
1680                  */
1681                 if (guest_cpuid_is_intel(vcpu) && (data >> 32) != 0)
1682                         return 1;
1683
1684                 data = (u32)data;
1685                 break;
1686         }
1687
1688         msr.data = data;
1689         msr.index = index;
1690         msr.host_initiated = host_initiated;
1691
1692         return static_call(kvm_x86_set_msr)(vcpu, &msr);
1693 }
1694
1695 static int kvm_set_msr_ignored_check(struct kvm_vcpu *vcpu,
1696                                      u32 index, u64 data, bool host_initiated)
1697 {
1698         int ret = __kvm_set_msr(vcpu, index, data, host_initiated);
1699
1700         if (ret == KVM_MSR_RET_INVALID)
1701                 if (kvm_msr_ignored_check(index, data, true))
1702                         ret = 0;
1703
1704         return ret;
1705 }
1706
1707 /*
1708  * Read the MSR specified by @index into @data.  Select MSR specific fault
1709  * checks are bypassed if @host_initiated is %true.
1710  * Returns 0 on success, non-0 otherwise.
1711  * Assumes vcpu_load() was already called.
1712  */
1713 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1714                   bool host_initiated)
1715 {
1716         struct msr_data msr;
1717         int ret;
1718
1719         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_READ))
1720                 return KVM_MSR_RET_FILTERED;
1721
1722         switch (index) {
1723         case MSR_TSC_AUX:
1724                 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1725                         return 1;
1726
1727                 if (!host_initiated &&
1728                     !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1729                     !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1730                         return 1;
1731                 break;
1732         }
1733
1734         msr.index = index;
1735         msr.host_initiated = host_initiated;
1736
1737         ret = static_call(kvm_x86_get_msr)(vcpu, &msr);
1738         if (!ret)
1739                 *data = msr.data;
1740         return ret;
1741 }
1742
1743 static int kvm_get_msr_ignored_check(struct kvm_vcpu *vcpu,
1744                                      u32 index, u64 *data, bool host_initiated)
1745 {
1746         int ret = __kvm_get_msr(vcpu, index, data, host_initiated);
1747
1748         if (ret == KVM_MSR_RET_INVALID) {
1749                 /* Unconditionally clear *data for simplicity */
1750                 *data = 0;
1751                 if (kvm_msr_ignored_check(index, 0, false))
1752                         ret = 0;
1753         }
1754
1755         return ret;
1756 }
1757
1758 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1759 {
1760         return kvm_get_msr_ignored_check(vcpu, index, data, false);
1761 }
1762 EXPORT_SYMBOL_GPL(kvm_get_msr);
1763
1764 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1765 {
1766         return kvm_set_msr_ignored_check(vcpu, index, data, false);
1767 }
1768 EXPORT_SYMBOL_GPL(kvm_set_msr);
1769
1770 static int complete_emulated_rdmsr(struct kvm_vcpu *vcpu)
1771 {
1772         int err = vcpu->run->msr.error;
1773         if (!err) {
1774                 kvm_rax_write(vcpu, (u32)vcpu->run->msr.data);
1775                 kvm_rdx_write(vcpu, vcpu->run->msr.data >> 32);
1776         }
1777
1778         return static_call(kvm_x86_complete_emulated_msr)(vcpu, err);
1779 }
1780
1781 static int complete_emulated_wrmsr(struct kvm_vcpu *vcpu)
1782 {
1783         return static_call(kvm_x86_complete_emulated_msr)(vcpu, vcpu->run->msr.error);
1784 }
1785
1786 static u64 kvm_msr_reason(int r)
1787 {
1788         switch (r) {
1789         case KVM_MSR_RET_INVALID:
1790                 return KVM_MSR_EXIT_REASON_UNKNOWN;
1791         case KVM_MSR_RET_FILTERED:
1792                 return KVM_MSR_EXIT_REASON_FILTER;
1793         default:
1794                 return KVM_MSR_EXIT_REASON_INVAL;
1795         }
1796 }
1797
1798 static int kvm_msr_user_space(struct kvm_vcpu *vcpu, u32 index,
1799                               u32 exit_reason, u64 data,
1800                               int (*completion)(struct kvm_vcpu *vcpu),
1801                               int r)
1802 {
1803         u64 msr_reason = kvm_msr_reason(r);
1804
1805         /* Check if the user wanted to know about this MSR fault */
1806         if (!(vcpu->kvm->arch.user_space_msr_mask & msr_reason))
1807                 return 0;
1808
1809         vcpu->run->exit_reason = exit_reason;
1810         vcpu->run->msr.error = 0;
1811         memset(vcpu->run->msr.pad, 0, sizeof(vcpu->run->msr.pad));
1812         vcpu->run->msr.reason = msr_reason;
1813         vcpu->run->msr.index = index;
1814         vcpu->run->msr.data = data;
1815         vcpu->arch.complete_userspace_io = completion;
1816
1817         return 1;
1818 }
1819
1820 static int kvm_get_msr_user_space(struct kvm_vcpu *vcpu, u32 index, int r)
1821 {
1822         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_RDMSR, 0,
1823                                    complete_emulated_rdmsr, r);
1824 }
1825
1826 static int kvm_set_msr_user_space(struct kvm_vcpu *vcpu, u32 index, u64 data, int r)
1827 {
1828         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_WRMSR, data,
1829                                    complete_emulated_wrmsr, r);
1830 }
1831
1832 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1833 {
1834         u32 ecx = kvm_rcx_read(vcpu);
1835         u64 data;
1836         int r;
1837
1838         r = kvm_get_msr(vcpu, ecx, &data);
1839
1840         /* MSR read failed? See if we should ask user space */
1841         if (r && kvm_get_msr_user_space(vcpu, ecx, r)) {
1842                 /* Bounce to user space */
1843                 return 0;
1844         }
1845
1846         if (!r) {
1847                 trace_kvm_msr_read(ecx, data);
1848
1849                 kvm_rax_write(vcpu, data & -1u);
1850                 kvm_rdx_write(vcpu, (data >> 32) & -1u);
1851         } else {
1852                 trace_kvm_msr_read_ex(ecx);
1853         }
1854
1855         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1856 }
1857 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1858
1859 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1860 {
1861         u32 ecx = kvm_rcx_read(vcpu);
1862         u64 data = kvm_read_edx_eax(vcpu);
1863         int r;
1864
1865         r = kvm_set_msr(vcpu, ecx, data);
1866
1867         /* MSR write failed? See if we should ask user space */
1868         if (r && kvm_set_msr_user_space(vcpu, ecx, data, r))
1869                 /* Bounce to user space */
1870                 return 0;
1871
1872         /* Signal all other negative errors to userspace */
1873         if (r < 0)
1874                 return r;
1875
1876         if (!r)
1877                 trace_kvm_msr_write(ecx, data);
1878         else
1879                 trace_kvm_msr_write_ex(ecx, data);
1880
1881         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1882 }
1883 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1884
1885 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu)
1886 {
1887         return kvm_skip_emulated_instruction(vcpu);
1888 }
1889 EXPORT_SYMBOL_GPL(kvm_emulate_as_nop);
1890
1891 int kvm_emulate_invd(struct kvm_vcpu *vcpu)
1892 {
1893         /* Treat an INVD instruction as a NOP and just skip it. */
1894         return kvm_emulate_as_nop(vcpu);
1895 }
1896 EXPORT_SYMBOL_GPL(kvm_emulate_invd);
1897
1898 int kvm_emulate_mwait(struct kvm_vcpu *vcpu)
1899 {
1900         pr_warn_once("kvm: MWAIT instruction emulated as NOP!\n");
1901         return kvm_emulate_as_nop(vcpu);
1902 }
1903 EXPORT_SYMBOL_GPL(kvm_emulate_mwait);
1904
1905 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu)
1906 {
1907         kvm_queue_exception(vcpu, UD_VECTOR);
1908         return 1;
1909 }
1910 EXPORT_SYMBOL_GPL(kvm_handle_invalid_op);
1911
1912 int kvm_emulate_monitor(struct kvm_vcpu *vcpu)
1913 {
1914         pr_warn_once("kvm: MONITOR instruction emulated as NOP!\n");
1915         return kvm_emulate_as_nop(vcpu);
1916 }
1917 EXPORT_SYMBOL_GPL(kvm_emulate_monitor);
1918
1919 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu)
1920 {
1921         xfer_to_guest_mode_prepare();
1922         return vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu) ||
1923                 xfer_to_guest_mode_work_pending();
1924 }
1925
1926 /*
1927  * The fast path for frequent and performance sensitive wrmsr emulation,
1928  * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
1929  * the latency of virtual IPI by avoiding the expensive bits of transitioning
1930  * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
1931  * other cases which must be called after interrupts are enabled on the host.
1932  */
1933 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
1934 {
1935         if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic))
1936                 return 1;
1937
1938         if (((data & APIC_SHORT_MASK) == APIC_DEST_NOSHORT) &&
1939                 ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
1940                 ((data & APIC_MODE_MASK) == APIC_DM_FIXED) &&
1941                 ((u32)(data >> 32) != X2APIC_BROADCAST)) {
1942
1943                 data &= ~(1 << 12);
1944                 kvm_apic_send_ipi(vcpu->arch.apic, (u32)data, (u32)(data >> 32));
1945                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR2, (u32)(data >> 32));
1946                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR, (u32)data);
1947                 trace_kvm_apic_write(APIC_ICR, (u32)data);
1948                 return 0;
1949         }
1950
1951         return 1;
1952 }
1953
1954 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
1955 {
1956         if (!kvm_can_use_hv_timer(vcpu))
1957                 return 1;
1958
1959         kvm_set_lapic_tscdeadline_msr(vcpu, data);
1960         return 0;
1961 }
1962
1963 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
1964 {
1965         u32 msr = kvm_rcx_read(vcpu);
1966         u64 data;
1967         fastpath_t ret = EXIT_FASTPATH_NONE;
1968
1969         switch (msr) {
1970         case APIC_BASE_MSR + (APIC_ICR >> 4):
1971                 data = kvm_read_edx_eax(vcpu);
1972                 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu, data)) {
1973                         kvm_skip_emulated_instruction(vcpu);
1974                         ret = EXIT_FASTPATH_EXIT_HANDLED;
1975                 }
1976                 break;
1977         case MSR_IA32_TSC_DEADLINE:
1978                 data = kvm_read_edx_eax(vcpu);
1979                 if (!handle_fastpath_set_tscdeadline(vcpu, data)) {
1980                         kvm_skip_emulated_instruction(vcpu);
1981                         ret = EXIT_FASTPATH_REENTER_GUEST;
1982                 }
1983                 break;
1984         default:
1985                 break;
1986         }
1987
1988         if (ret != EXIT_FASTPATH_NONE)
1989                 trace_kvm_msr_write(msr, data);
1990
1991         return ret;
1992 }
1993 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
1994
1995 /*
1996  * Adapt set_msr() to msr_io()'s calling convention
1997  */
1998 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1999 {
2000         return kvm_get_msr_ignored_check(vcpu, index, data, true);
2001 }
2002
2003 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2004 {
2005         return kvm_set_msr_ignored_check(vcpu, index, *data, true);
2006 }
2007
2008 #ifdef CONFIG_X86_64
2009 struct pvclock_clock {
2010         int vclock_mode;
2011         u64 cycle_last;
2012         u64 mask;
2013         u32 mult;
2014         u32 shift;
2015         u64 base_cycles;
2016         u64 offset;
2017 };
2018
2019 struct pvclock_gtod_data {
2020         seqcount_t      seq;
2021
2022         struct pvclock_clock clock; /* extract of a clocksource struct */
2023         struct pvclock_clock raw_clock; /* extract of a clocksource struct */
2024
2025         ktime_t         offs_boot;
2026         u64             wall_time_sec;
2027 };
2028
2029 static struct pvclock_gtod_data pvclock_gtod_data;
2030
2031 static void update_pvclock_gtod(struct timekeeper *tk)
2032 {
2033         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
2034
2035         write_seqcount_begin(&vdata->seq);
2036
2037         /* copy pvclock gtod data */
2038         vdata->clock.vclock_mode        = tk->tkr_mono.clock->vdso_clock_mode;
2039         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
2040         vdata->clock.mask               = tk->tkr_mono.mask;
2041         vdata->clock.mult               = tk->tkr_mono.mult;
2042         vdata->clock.shift              = tk->tkr_mono.shift;
2043         vdata->clock.base_cycles        = tk->tkr_mono.xtime_nsec;
2044         vdata->clock.offset             = tk->tkr_mono.base;
2045
2046         vdata->raw_clock.vclock_mode    = tk->tkr_raw.clock->vdso_clock_mode;
2047         vdata->raw_clock.cycle_last     = tk->tkr_raw.cycle_last;
2048         vdata->raw_clock.mask           = tk->tkr_raw.mask;
2049         vdata->raw_clock.mult           = tk->tkr_raw.mult;
2050         vdata->raw_clock.shift          = tk->tkr_raw.shift;
2051         vdata->raw_clock.base_cycles    = tk->tkr_raw.xtime_nsec;
2052         vdata->raw_clock.offset         = tk->tkr_raw.base;
2053
2054         vdata->wall_time_sec            = tk->xtime_sec;
2055
2056         vdata->offs_boot                = tk->offs_boot;
2057
2058         write_seqcount_end(&vdata->seq);
2059 }
2060
2061 static s64 get_kvmclock_base_ns(void)
2062 {
2063         /* Count up from boot time, but with the frequency of the raw clock.  */
2064         return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot));
2065 }
2066 #else
2067 static s64 get_kvmclock_base_ns(void)
2068 {
2069         /* Master clock not used, so we can just use CLOCK_BOOTTIME.  */
2070         return ktime_get_boottime_ns();
2071 }
2072 #endif
2073
2074 void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock, int sec_hi_ofs)
2075 {
2076         int version;
2077         int r;
2078         struct pvclock_wall_clock wc;
2079         u32 wc_sec_hi;
2080         u64 wall_nsec;
2081
2082         if (!wall_clock)
2083                 return;
2084
2085         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
2086         if (r)
2087                 return;
2088
2089         if (version & 1)
2090                 ++version;  /* first time write, random junk */
2091
2092         ++version;
2093
2094         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
2095                 return;
2096
2097         /*
2098          * The guest calculates current wall clock time by adding
2099          * system time (updated by kvm_guest_time_update below) to the
2100          * wall clock specified here.  We do the reverse here.
2101          */
2102         wall_nsec = ktime_get_real_ns() - get_kvmclock_ns(kvm);
2103
2104         wc.nsec = do_div(wall_nsec, 1000000000);
2105         wc.sec = (u32)wall_nsec; /* overflow in 2106 guest time */
2106         wc.version = version;
2107
2108         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
2109
2110         if (sec_hi_ofs) {
2111                 wc_sec_hi = wall_nsec >> 32;
2112                 kvm_write_guest(kvm, wall_clock + sec_hi_ofs,
2113                                 &wc_sec_hi, sizeof(wc_sec_hi));
2114         }
2115
2116         version++;
2117         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
2118 }
2119
2120 static void kvm_write_system_time(struct kvm_vcpu *vcpu, gpa_t system_time,
2121                                   bool old_msr, bool host_initiated)
2122 {
2123         struct kvm_arch *ka = &vcpu->kvm->arch;
2124
2125         if (vcpu->vcpu_id == 0 && !host_initiated) {
2126                 if (ka->boot_vcpu_runs_old_kvmclock != old_msr)
2127                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2128
2129                 ka->boot_vcpu_runs_old_kvmclock = old_msr;
2130         }
2131
2132         vcpu->arch.time = system_time;
2133         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2134
2135         /* we verify if the enable bit is set... */
2136         vcpu->arch.pv_time_enabled = false;
2137         if (!(system_time & 1))
2138                 return;
2139
2140         if (!kvm_gfn_to_hva_cache_init(vcpu->kvm,
2141                                        &vcpu->arch.pv_time, system_time & ~1ULL,
2142                                        sizeof(struct pvclock_vcpu_time_info)))
2143                 vcpu->arch.pv_time_enabled = true;
2144
2145         return;
2146 }
2147
2148 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
2149 {
2150         do_shl32_div32(dividend, divisor);
2151         return dividend;
2152 }
2153
2154 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
2155                                s8 *pshift, u32 *pmultiplier)
2156 {
2157         uint64_t scaled64;
2158         int32_t  shift = 0;
2159         uint64_t tps64;
2160         uint32_t tps32;
2161
2162         tps64 = base_hz;
2163         scaled64 = scaled_hz;
2164         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
2165                 tps64 >>= 1;
2166                 shift--;
2167         }
2168
2169         tps32 = (uint32_t)tps64;
2170         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
2171                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
2172                         scaled64 >>= 1;
2173                 else
2174                         tps32 <<= 1;
2175                 shift++;
2176         }
2177
2178         *pshift = shift;
2179         *pmultiplier = div_frac(scaled64, tps32);
2180 }
2181
2182 #ifdef CONFIG_X86_64
2183 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
2184 #endif
2185
2186 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
2187 static unsigned long max_tsc_khz;
2188
2189 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
2190 {
2191         u64 v = (u64)khz * (1000000 + ppm);
2192         do_div(v, 1000000);
2193         return v;
2194 }
2195
2196 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier);
2197
2198 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
2199 {
2200         u64 ratio;
2201
2202         /* Guest TSC same frequency as host TSC? */
2203         if (!scale) {
2204                 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2205                 return 0;
2206         }
2207
2208         /* TSC scaling supported? */
2209         if (!kvm_has_tsc_control) {
2210                 if (user_tsc_khz > tsc_khz) {
2211                         vcpu->arch.tsc_catchup = 1;
2212                         vcpu->arch.tsc_always_catchup = 1;
2213                         return 0;
2214                 } else {
2215                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2216                         return -1;
2217                 }
2218         }
2219
2220         /* TSC scaling required  - calculate ratio */
2221         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
2222                                 user_tsc_khz, tsc_khz);
2223
2224         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
2225                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2226                                     user_tsc_khz);
2227                 return -1;
2228         }
2229
2230         kvm_vcpu_write_tsc_multiplier(vcpu, ratio);
2231         return 0;
2232 }
2233
2234 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
2235 {
2236         u32 thresh_lo, thresh_hi;
2237         int use_scaling = 0;
2238
2239         /* tsc_khz can be zero if TSC calibration fails */
2240         if (user_tsc_khz == 0) {
2241                 /* set tsc_scaling_ratio to a safe value */
2242                 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2243                 return -1;
2244         }
2245
2246         /* Compute a scale to convert nanoseconds in TSC cycles */
2247         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
2248                            &vcpu->arch.virtual_tsc_shift,
2249                            &vcpu->arch.virtual_tsc_mult);
2250         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
2251
2252         /*
2253          * Compute the variation in TSC rate which is acceptable
2254          * within the range of tolerance and decide if the
2255          * rate being applied is within that bounds of the hardware
2256          * rate.  If so, no scaling or compensation need be done.
2257          */
2258         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
2259         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
2260         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
2261                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
2262                 use_scaling = 1;
2263         }
2264         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
2265 }
2266
2267 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
2268 {
2269         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
2270                                       vcpu->arch.virtual_tsc_mult,
2271                                       vcpu->arch.virtual_tsc_shift);
2272         tsc += vcpu->arch.this_tsc_write;
2273         return tsc;
2274 }
2275
2276 static inline int gtod_is_based_on_tsc(int mode)
2277 {
2278         return mode == VDSO_CLOCKMODE_TSC || mode == VDSO_CLOCKMODE_HVCLOCK;
2279 }
2280
2281 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
2282 {
2283 #ifdef CONFIG_X86_64
2284         bool vcpus_matched;
2285         struct kvm_arch *ka = &vcpu->kvm->arch;
2286         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2287
2288         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2289                          atomic_read(&vcpu->kvm->online_vcpus));
2290
2291         /*
2292          * Once the masterclock is enabled, always perform request in
2293          * order to update it.
2294          *
2295          * In order to enable masterclock, the host clocksource must be TSC
2296          * and the vcpus need to have matched TSCs.  When that happens,
2297          * perform request to enable masterclock.
2298          */
2299         if (ka->use_master_clock ||
2300             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
2301                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2302
2303         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
2304                             atomic_read(&vcpu->kvm->online_vcpus),
2305                             ka->use_master_clock, gtod->clock.vclock_mode);
2306 #endif
2307 }
2308
2309 /*
2310  * Multiply tsc by a fixed point number represented by ratio.
2311  *
2312  * The most significant 64-N bits (mult) of ratio represent the
2313  * integral part of the fixed point number; the remaining N bits
2314  * (frac) represent the fractional part, ie. ratio represents a fixed
2315  * point number (mult + frac * 2^(-N)).
2316  *
2317  * N equals to kvm_tsc_scaling_ratio_frac_bits.
2318  */
2319 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
2320 {
2321         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
2322 }
2323
2324 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc, u64 ratio)
2325 {
2326         u64 _tsc = tsc;
2327
2328         if (ratio != kvm_default_tsc_scaling_ratio)
2329                 _tsc = __scale_tsc(ratio, tsc);
2330
2331         return _tsc;
2332 }
2333 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
2334
2335 static u64 kvm_compute_l1_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
2336 {
2337         u64 tsc;
2338
2339         tsc = kvm_scale_tsc(vcpu, rdtsc(), vcpu->arch.l1_tsc_scaling_ratio);
2340
2341         return target_tsc - tsc;
2342 }
2343
2344 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
2345 {
2346         return vcpu->arch.l1_tsc_offset +
2347                 kvm_scale_tsc(vcpu, host_tsc, vcpu->arch.l1_tsc_scaling_ratio);
2348 }
2349 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
2350
2351 u64 kvm_calc_nested_tsc_offset(u64 l1_offset, u64 l2_offset, u64 l2_multiplier)
2352 {
2353         u64 nested_offset;
2354
2355         if (l2_multiplier == kvm_default_tsc_scaling_ratio)
2356                 nested_offset = l1_offset;
2357         else
2358                 nested_offset = mul_s64_u64_shr((s64) l1_offset, l2_multiplier,
2359                                                 kvm_tsc_scaling_ratio_frac_bits);
2360
2361         nested_offset += l2_offset;
2362         return nested_offset;
2363 }
2364 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_offset);
2365
2366 u64 kvm_calc_nested_tsc_multiplier(u64 l1_multiplier, u64 l2_multiplier)
2367 {
2368         if (l2_multiplier != kvm_default_tsc_scaling_ratio)
2369                 return mul_u64_u64_shr(l1_multiplier, l2_multiplier,
2370                                        kvm_tsc_scaling_ratio_frac_bits);
2371
2372         return l1_multiplier;
2373 }
2374 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_multiplier);
2375
2376 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 l1_offset)
2377 {
2378         trace_kvm_write_tsc_offset(vcpu->vcpu_id,
2379                                    vcpu->arch.l1_tsc_offset,
2380                                    l1_offset);
2381
2382         vcpu->arch.l1_tsc_offset = l1_offset;
2383
2384         /*
2385          * If we are here because L1 chose not to trap WRMSR to TSC then
2386          * according to the spec this should set L1's TSC (as opposed to
2387          * setting L1's offset for L2).
2388          */
2389         if (is_guest_mode(vcpu))
2390                 vcpu->arch.tsc_offset = kvm_calc_nested_tsc_offset(
2391                         l1_offset,
2392                         static_call(kvm_x86_get_l2_tsc_offset)(vcpu),
2393                         static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2394         else
2395                 vcpu->arch.tsc_offset = l1_offset;
2396
2397         static_call(kvm_x86_write_tsc_offset)(vcpu, vcpu->arch.tsc_offset);
2398 }
2399
2400 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier)
2401 {
2402         vcpu->arch.l1_tsc_scaling_ratio = l1_multiplier;
2403
2404         /* Userspace is changing the multiplier while L2 is active */
2405         if (is_guest_mode(vcpu))
2406                 vcpu->arch.tsc_scaling_ratio = kvm_calc_nested_tsc_multiplier(
2407                         l1_multiplier,
2408                         static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2409         else
2410                 vcpu->arch.tsc_scaling_ratio = l1_multiplier;
2411
2412         if (kvm_has_tsc_control)
2413                 static_call(kvm_x86_write_tsc_multiplier)(
2414                         vcpu, vcpu->arch.tsc_scaling_ratio);
2415 }
2416
2417 static inline bool kvm_check_tsc_unstable(void)
2418 {
2419 #ifdef CONFIG_X86_64
2420         /*
2421          * TSC is marked unstable when we're running on Hyper-V,
2422          * 'TSC page' clocksource is good.
2423          */
2424         if (pvclock_gtod_data.clock.vclock_mode == VDSO_CLOCKMODE_HVCLOCK)
2425                 return false;
2426 #endif
2427         return check_tsc_unstable();
2428 }
2429
2430 static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 data)
2431 {
2432         struct kvm *kvm = vcpu->kvm;
2433         u64 offset, ns, elapsed;
2434         unsigned long flags;
2435         bool matched;
2436         bool already_matched;
2437         bool synchronizing = false;
2438
2439         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
2440         offset = kvm_compute_l1_tsc_offset(vcpu, data);
2441         ns = get_kvmclock_base_ns();
2442         elapsed = ns - kvm->arch.last_tsc_nsec;
2443
2444         if (vcpu->arch.virtual_tsc_khz) {
2445                 if (data == 0) {
2446                         /*
2447                          * detection of vcpu initialization -- need to sync
2448                          * with other vCPUs. This particularly helps to keep
2449                          * kvm_clock stable after CPU hotplug
2450                          */
2451                         synchronizing = true;
2452                 } else {
2453                         u64 tsc_exp = kvm->arch.last_tsc_write +
2454                                                 nsec_to_cycles(vcpu, elapsed);
2455                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
2456                         /*
2457                          * Special case: TSC write with a small delta (1 second)
2458                          * of virtual cycle time against real time is
2459                          * interpreted as an attempt to synchronize the CPU.
2460                          */
2461                         synchronizing = data < tsc_exp + tsc_hz &&
2462                                         data + tsc_hz > tsc_exp;
2463                 }
2464         }
2465
2466         /*
2467          * For a reliable TSC, we can match TSC offsets, and for an unstable
2468          * TSC, we add elapsed time in this computation.  We could let the
2469          * compensation code attempt to catch up if we fall behind, but
2470          * it's better to try to match offsets from the beginning.
2471          */
2472         if (synchronizing &&
2473             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
2474                 if (!kvm_check_tsc_unstable()) {
2475                         offset = kvm->arch.cur_tsc_offset;
2476                 } else {
2477                         u64 delta = nsec_to_cycles(vcpu, elapsed);
2478                         data += delta;
2479                         offset = kvm_compute_l1_tsc_offset(vcpu, data);
2480                 }
2481                 matched = true;
2482                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
2483         } else {
2484                 /*
2485                  * We split periods of matched TSC writes into generations.
2486                  * For each generation, we track the original measured
2487                  * nanosecond time, offset, and write, so if TSCs are in
2488                  * sync, we can match exact offset, and if not, we can match
2489                  * exact software computation in compute_guest_tsc()
2490                  *
2491                  * These values are tracked in kvm->arch.cur_xxx variables.
2492                  */
2493                 kvm->arch.cur_tsc_generation++;
2494                 kvm->arch.cur_tsc_nsec = ns;
2495                 kvm->arch.cur_tsc_write = data;
2496                 kvm->arch.cur_tsc_offset = offset;
2497                 matched = false;
2498         }
2499
2500         /*
2501          * We also track th most recent recorded KHZ, write and time to
2502          * allow the matching interval to be extended at each write.
2503          */
2504         kvm->arch.last_tsc_nsec = ns;
2505         kvm->arch.last_tsc_write = data;
2506         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2507
2508         vcpu->arch.last_guest_tsc = data;
2509
2510         /* Keep track of which generation this VCPU has synchronized to */
2511         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2512         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2513         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2514
2515         kvm_vcpu_write_tsc_offset(vcpu, offset);
2516         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2517
2518         spin_lock_irqsave(&kvm->arch.pvclock_gtod_sync_lock, flags);
2519         if (!matched) {
2520                 kvm->arch.nr_vcpus_matched_tsc = 0;
2521         } else if (!already_matched) {
2522                 kvm->arch.nr_vcpus_matched_tsc++;
2523         }
2524
2525         kvm_track_tsc_matching(vcpu);
2526         spin_unlock_irqrestore(&kvm->arch.pvclock_gtod_sync_lock, flags);
2527 }
2528
2529 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2530                                            s64 adjustment)
2531 {
2532         u64 tsc_offset = vcpu->arch.l1_tsc_offset;
2533         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2534 }
2535
2536 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2537 {
2538         if (vcpu->arch.l1_tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
2539                 WARN_ON(adjustment < 0);
2540         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment,
2541                                    vcpu->arch.l1_tsc_scaling_ratio);
2542         adjust_tsc_offset_guest(vcpu, adjustment);
2543 }
2544
2545 #ifdef CONFIG_X86_64
2546
2547 static u64 read_tsc(void)
2548 {
2549         u64 ret = (u64)rdtsc_ordered();
2550         u64 last = pvclock_gtod_data.clock.cycle_last;
2551
2552         if (likely(ret >= last))
2553                 return ret;
2554
2555         /*
2556          * GCC likes to generate cmov here, but this branch is extremely
2557          * predictable (it's just a function of time and the likely is
2558          * very likely) and there's a data dependence, so force GCC
2559          * to generate a branch instead.  I don't barrier() because
2560          * we don't actually need a barrier, and if this function
2561          * ever gets inlined it will generate worse code.
2562          */
2563         asm volatile ("");
2564         return last;
2565 }
2566
2567 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2568                           int *mode)
2569 {
2570         long v;
2571         u64 tsc_pg_val;
2572
2573         switch (clock->vclock_mode) {
2574         case VDSO_CLOCKMODE_HVCLOCK:
2575                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2576                                                   tsc_timestamp);
2577                 if (tsc_pg_val != U64_MAX) {
2578                         /* TSC page valid */
2579                         *mode = VDSO_CLOCKMODE_HVCLOCK;
2580                         v = (tsc_pg_val - clock->cycle_last) &
2581                                 clock->mask;
2582                 } else {
2583                         /* TSC page invalid */
2584                         *mode = VDSO_CLOCKMODE_NONE;
2585                 }
2586                 break;
2587         case VDSO_CLOCKMODE_TSC:
2588                 *mode = VDSO_CLOCKMODE_TSC;
2589                 *tsc_timestamp = read_tsc();
2590                 v = (*tsc_timestamp - clock->cycle_last) &
2591                         clock->mask;
2592                 break;
2593         default:
2594                 *mode = VDSO_CLOCKMODE_NONE;
2595         }
2596
2597         if (*mode == VDSO_CLOCKMODE_NONE)
2598                 *tsc_timestamp = v = 0;
2599
2600         return v * clock->mult;
2601 }
2602
2603 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2604 {
2605         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2606         unsigned long seq;
2607         int mode;
2608         u64 ns;
2609
2610         do {
2611                 seq = read_seqcount_begin(&gtod->seq);
2612                 ns = gtod->raw_clock.base_cycles;
2613                 ns += vgettsc(&gtod->raw_clock, tsc_timestamp, &mode);
2614                 ns >>= gtod->raw_clock.shift;
2615                 ns += ktime_to_ns(ktime_add(gtod->raw_clock.offset, gtod->offs_boot));
2616         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2617         *t = ns;
2618
2619         return mode;
2620 }
2621
2622 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2623 {
2624         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2625         unsigned long seq;
2626         int mode;
2627         u64 ns;
2628
2629         do {
2630                 seq = read_seqcount_begin(&gtod->seq);
2631                 ts->tv_sec = gtod->wall_time_sec;
2632                 ns = gtod->clock.base_cycles;
2633                 ns += vgettsc(&gtod->clock, tsc_timestamp, &mode);
2634                 ns >>= gtod->clock.shift;
2635         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2636
2637         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2638         ts->tv_nsec = ns;
2639
2640         return mode;
2641 }
2642
2643 /* returns true if host is using TSC based clocksource */
2644 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2645 {
2646         /* checked again under seqlock below */
2647         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2648                 return false;
2649
2650         return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2651                                                       tsc_timestamp));
2652 }
2653
2654 /* returns true if host is using TSC based clocksource */
2655 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2656                                            u64 *tsc_timestamp)
2657 {
2658         /* checked again under seqlock below */
2659         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2660                 return false;
2661
2662         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2663 }
2664 #endif
2665
2666 /*
2667  *
2668  * Assuming a stable TSC across physical CPUS, and a stable TSC
2669  * across virtual CPUs, the following condition is possible.
2670  * Each numbered line represents an event visible to both
2671  * CPUs at the next numbered event.
2672  *
2673  * "timespecX" represents host monotonic time. "tscX" represents
2674  * RDTSC value.
2675  *
2676  *              VCPU0 on CPU0           |       VCPU1 on CPU1
2677  *
2678  * 1.  read timespec0,tsc0
2679  * 2.                                   | timespec1 = timespec0 + N
2680  *                                      | tsc1 = tsc0 + M
2681  * 3. transition to guest               | transition to guest
2682  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2683  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2684  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2685  *
2686  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2687  *
2688  *      - ret0 < ret1
2689  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2690  *              ...
2691  *      - 0 < N - M => M < N
2692  *
2693  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2694  * always the case (the difference between two distinct xtime instances
2695  * might be smaller then the difference between corresponding TSC reads,
2696  * when updating guest vcpus pvclock areas).
2697  *
2698  * To avoid that problem, do not allow visibility of distinct
2699  * system_timestamp/tsc_timestamp values simultaneously: use a master
2700  * copy of host monotonic time values. Update that master copy
2701  * in lockstep.
2702  *
2703  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2704  *
2705  */
2706
2707 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2708 {
2709 #ifdef CONFIG_X86_64
2710         struct kvm_arch *ka = &kvm->arch;
2711         int vclock_mode;
2712         bool host_tsc_clocksource, vcpus_matched;
2713
2714         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2715                         atomic_read(&kvm->online_vcpus));
2716
2717         /*
2718          * If the host uses TSC clock, then passthrough TSC as stable
2719          * to the guest.
2720          */
2721         host_tsc_clocksource = kvm_get_time_and_clockread(
2722                                         &ka->master_kernel_ns,
2723                                         &ka->master_cycle_now);
2724
2725         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2726                                 && !ka->backwards_tsc_observed
2727                                 && !ka->boot_vcpu_runs_old_kvmclock;
2728
2729         if (ka->use_master_clock)
2730                 atomic_set(&kvm_guest_has_master_clock, 1);
2731
2732         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2733         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2734                                         vcpus_matched);
2735 #endif
2736 }
2737
2738 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2739 {
2740         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2741 }
2742
2743 static void kvm_gen_update_masterclock(struct kvm *kvm)
2744 {
2745 #ifdef CONFIG_X86_64
2746         int i;
2747         struct kvm_vcpu *vcpu;
2748         struct kvm_arch *ka = &kvm->arch;
2749         unsigned long flags;
2750
2751         kvm_hv_invalidate_tsc_page(kvm);
2752
2753         kvm_make_mclock_inprogress_request(kvm);
2754
2755         /* no guest entries from this point */
2756         spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2757         pvclock_update_vm_gtod_copy(kvm);
2758         spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2759
2760         kvm_for_each_vcpu(i, vcpu, kvm)
2761                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2762
2763         /* guest entries allowed */
2764         kvm_for_each_vcpu(i, vcpu, kvm)
2765                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2766 #endif
2767 }
2768
2769 u64 get_kvmclock_ns(struct kvm *kvm)
2770 {
2771         struct kvm_arch *ka = &kvm->arch;
2772         struct pvclock_vcpu_time_info hv_clock;
2773         unsigned long flags;
2774         u64 ret;
2775
2776         spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2777         if (!ka->use_master_clock) {
2778                 spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2779                 return get_kvmclock_base_ns() + ka->kvmclock_offset;
2780         }
2781
2782         hv_clock.tsc_timestamp = ka->master_cycle_now;
2783         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2784         spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2785
2786         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2787         get_cpu();
2788
2789         if (__this_cpu_read(cpu_tsc_khz)) {
2790                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2791                                    &hv_clock.tsc_shift,
2792                                    &hv_clock.tsc_to_system_mul);
2793                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2794         } else
2795                 ret = get_kvmclock_base_ns() + ka->kvmclock_offset;
2796
2797         put_cpu();
2798
2799         return ret;
2800 }
2801
2802 static void kvm_setup_pvclock_page(struct kvm_vcpu *v,
2803                                    struct gfn_to_hva_cache *cache,
2804                                    unsigned int offset)
2805 {
2806         struct kvm_vcpu_arch *vcpu = &v->arch;
2807         struct pvclock_vcpu_time_info guest_hv_clock;
2808
2809         if (unlikely(kvm_read_guest_offset_cached(v->kvm, cache,
2810                 &guest_hv_clock, offset, sizeof(guest_hv_clock))))
2811                 return;
2812
2813         /* This VCPU is paused, but it's legal for a guest to read another
2814          * VCPU's kvmclock, so we really have to follow the specification where
2815          * it says that version is odd if data is being modified, and even after
2816          * it is consistent.
2817          *
2818          * Version field updates must be kept separate.  This is because
2819          * kvm_write_guest_cached might use a "rep movs" instruction, and
2820          * writes within a string instruction are weakly ordered.  So there
2821          * are three writes overall.
2822          *
2823          * As a small optimization, only write the version field in the first
2824          * and third write.  The vcpu->pv_time cache is still valid, because the
2825          * version field is the first in the struct.
2826          */
2827         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2828
2829         if (guest_hv_clock.version & 1)
2830                 ++guest_hv_clock.version;  /* first time write, random junk */
2831
2832         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2833         kvm_write_guest_offset_cached(v->kvm, cache,
2834                                       &vcpu->hv_clock, offset,
2835                                       sizeof(vcpu->hv_clock.version));
2836
2837         smp_wmb();
2838
2839         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2840         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2841
2842         if (vcpu->pvclock_set_guest_stopped_request) {
2843                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2844                 vcpu->pvclock_set_guest_stopped_request = false;
2845         }
2846
2847         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2848
2849         kvm_write_guest_offset_cached(v->kvm, cache,
2850                                       &vcpu->hv_clock, offset,
2851                                       sizeof(vcpu->hv_clock));
2852
2853         smp_wmb();
2854
2855         vcpu->hv_clock.version++;
2856         kvm_write_guest_offset_cached(v->kvm, cache,
2857                                      &vcpu->hv_clock, offset,
2858                                      sizeof(vcpu->hv_clock.version));
2859 }
2860
2861 static int kvm_guest_time_update(struct kvm_vcpu *v)
2862 {
2863         unsigned long flags, tgt_tsc_khz;
2864         struct kvm_vcpu_arch *vcpu = &v->arch;
2865         struct kvm_arch *ka = &v->kvm->arch;
2866         s64 kernel_ns;
2867         u64 tsc_timestamp, host_tsc;
2868         u8 pvclock_flags;
2869         bool use_master_clock;
2870
2871         kernel_ns = 0;
2872         host_tsc = 0;
2873
2874         /*
2875          * If the host uses TSC clock, then passthrough TSC as stable
2876          * to the guest.
2877          */
2878         spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2879         use_master_clock = ka->use_master_clock;
2880         if (use_master_clock) {
2881                 host_tsc = ka->master_cycle_now;
2882                 kernel_ns = ka->master_kernel_ns;
2883         }
2884         spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2885
2886         /* Keep irq disabled to prevent changes to the clock */
2887         local_irq_save(flags);
2888         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2889         if (unlikely(tgt_tsc_khz == 0)) {
2890                 local_irq_restore(flags);
2891                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2892                 return 1;
2893         }
2894         if (!use_master_clock) {
2895                 host_tsc = rdtsc();
2896                 kernel_ns = get_kvmclock_base_ns();
2897         }
2898
2899         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2900
2901         /*
2902          * We may have to catch up the TSC to match elapsed wall clock
2903          * time for two reasons, even if kvmclock is used.
2904          *   1) CPU could have been running below the maximum TSC rate
2905          *   2) Broken TSC compensation resets the base at each VCPU
2906          *      entry to avoid unknown leaps of TSC even when running
2907          *      again on the same CPU.  This may cause apparent elapsed
2908          *      time to disappear, and the guest to stand still or run
2909          *      very slowly.
2910          */
2911         if (vcpu->tsc_catchup) {
2912                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2913                 if (tsc > tsc_timestamp) {
2914                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2915                         tsc_timestamp = tsc;
2916                 }
2917         }
2918
2919         local_irq_restore(flags);
2920
2921         /* With all the info we got, fill in the values */
2922
2923         if (kvm_has_tsc_control)
2924                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz,
2925                                             v->arch.l1_tsc_scaling_ratio);
2926
2927         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2928                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2929                                    &vcpu->hv_clock.tsc_shift,
2930                                    &vcpu->hv_clock.tsc_to_system_mul);
2931                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2932         }
2933
2934         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2935         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2936         vcpu->last_guest_tsc = tsc_timestamp;
2937
2938         /* If the host uses TSC clocksource, then it is stable */
2939         pvclock_flags = 0;
2940         if (use_master_clock)
2941                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2942
2943         vcpu->hv_clock.flags = pvclock_flags;
2944
2945         if (vcpu->pv_time_enabled)
2946                 kvm_setup_pvclock_page(v, &vcpu->pv_time, 0);
2947         if (vcpu->xen.vcpu_info_set)
2948                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_info_cache,
2949                                        offsetof(struct compat_vcpu_info, time));
2950         if (vcpu->xen.vcpu_time_info_set)
2951                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_time_info_cache, 0);
2952         if (v == kvm_get_vcpu(v->kvm, 0))
2953                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2954         return 0;
2955 }
2956
2957 /*
2958  * kvmclock updates which are isolated to a given vcpu, such as
2959  * vcpu->cpu migration, should not allow system_timestamp from
2960  * the rest of the vcpus to remain static. Otherwise ntp frequency
2961  * correction applies to one vcpu's system_timestamp but not
2962  * the others.
2963  *
2964  * So in those cases, request a kvmclock update for all vcpus.
2965  * We need to rate-limit these requests though, as they can
2966  * considerably slow guests that have a large number of vcpus.
2967  * The time for a remote vcpu to update its kvmclock is bound
2968  * by the delay we use to rate-limit the updates.
2969  */
2970
2971 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2972
2973 static void kvmclock_update_fn(struct work_struct *work)
2974 {
2975         int i;
2976         struct delayed_work *dwork = to_delayed_work(work);
2977         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2978                                            kvmclock_update_work);
2979         struct kvm *kvm = container_of(ka, struct kvm, arch);
2980         struct kvm_vcpu *vcpu;
2981
2982         kvm_for_each_vcpu(i, vcpu, kvm) {
2983                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2984                 kvm_vcpu_kick(vcpu);
2985         }
2986 }
2987
2988 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2989 {
2990         struct kvm *kvm = v->kvm;
2991
2992         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2993         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2994                                         KVMCLOCK_UPDATE_DELAY);
2995 }
2996
2997 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2998
2999 static void kvmclock_sync_fn(struct work_struct *work)
3000 {
3001         struct delayed_work *dwork = to_delayed_work(work);
3002         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
3003                                            kvmclock_sync_work);
3004         struct kvm *kvm = container_of(ka, struct kvm, arch);
3005
3006         if (!kvmclock_periodic_sync)
3007                 return;
3008
3009         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
3010         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
3011                                         KVMCLOCK_SYNC_PERIOD);
3012 }
3013
3014 /*
3015  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
3016  */
3017 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
3018 {
3019         /* McStatusWrEn enabled? */
3020         if (guest_cpuid_is_amd_or_hygon(vcpu))
3021                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
3022
3023         return false;
3024 }
3025
3026 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3027 {
3028         u64 mcg_cap = vcpu->arch.mcg_cap;
3029         unsigned bank_num = mcg_cap & 0xff;
3030         u32 msr = msr_info->index;
3031         u64 data = msr_info->data;
3032
3033         switch (msr) {
3034         case MSR_IA32_MCG_STATUS:
3035                 vcpu->arch.mcg_status = data;
3036                 break;
3037         case MSR_IA32_MCG_CTL:
3038                 if (!(mcg_cap & MCG_CTL_P) &&
3039                     (data || !msr_info->host_initiated))
3040                         return 1;
3041                 if (data != 0 && data != ~(u64)0)
3042                         return 1;
3043                 vcpu->arch.mcg_ctl = data;
3044                 break;
3045         default:
3046                 if (msr >= MSR_IA32_MC0_CTL &&
3047                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3048                         u32 offset = array_index_nospec(
3049                                 msr - MSR_IA32_MC0_CTL,
3050                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3051
3052                         /* only 0 or all 1s can be written to IA32_MCi_CTL
3053                          * some Linux kernels though clear bit 10 in bank 4 to
3054                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
3055                          * this to avoid an uncatched #GP in the guest
3056                          */
3057                         if ((offset & 0x3) == 0 &&
3058                             data != 0 && (data | (1 << 10)) != ~(u64)0)
3059                                 return -1;
3060
3061                         /* MCi_STATUS */
3062                         if (!msr_info->host_initiated &&
3063                             (offset & 0x3) == 1 && data != 0) {
3064                                 if (!can_set_mci_status(vcpu))
3065                                         return -1;
3066                         }
3067
3068                         vcpu->arch.mce_banks[offset] = data;
3069                         break;
3070                 }
3071                 return 1;
3072         }
3073         return 0;
3074 }
3075
3076 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu)
3077 {
3078         u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT;
3079
3080         return (vcpu->arch.apf.msr_en_val & mask) == mask;
3081 }
3082
3083 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
3084 {
3085         gpa_t gpa = data & ~0x3f;
3086
3087         /* Bits 4:5 are reserved, Should be zero */
3088         if (data & 0x30)
3089                 return 1;
3090
3091         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_VMEXIT) &&
3092             (data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT))
3093                 return 1;
3094
3095         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT) &&
3096             (data & KVM_ASYNC_PF_DELIVERY_AS_INT))
3097                 return 1;
3098
3099         if (!lapic_in_kernel(vcpu))
3100                 return data ? 1 : 0;
3101
3102         vcpu->arch.apf.msr_en_val = data;
3103
3104         if (!kvm_pv_async_pf_enabled(vcpu)) {
3105                 kvm_clear_async_pf_completion_queue(vcpu);
3106                 kvm_async_pf_hash_reset(vcpu);
3107                 return 0;
3108         }
3109
3110         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
3111                                         sizeof(u64)))
3112                 return 1;
3113
3114         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
3115         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
3116
3117         kvm_async_pf_wakeup_all(vcpu);
3118
3119         return 0;
3120 }
3121
3122 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu *vcpu, u64 data)
3123 {
3124         /* Bits 8-63 are reserved */
3125         if (data >> 8)
3126                 return 1;
3127
3128         if (!lapic_in_kernel(vcpu))
3129                 return 1;
3130
3131         vcpu->arch.apf.msr_int_val = data;
3132
3133         vcpu->arch.apf.vec = data & KVM_ASYNC_PF_VEC_MASK;
3134
3135         return 0;
3136 }
3137
3138 static void kvmclock_reset(struct kvm_vcpu *vcpu)
3139 {
3140         vcpu->arch.pv_time_enabled = false;
3141         vcpu->arch.time = 0;
3142 }
3143
3144 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu *vcpu)
3145 {
3146         ++vcpu->stat.tlb_flush;
3147         static_call(kvm_x86_tlb_flush_all)(vcpu);
3148 }
3149
3150 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu)
3151 {
3152         ++vcpu->stat.tlb_flush;
3153
3154         if (!tdp_enabled) {
3155                /*
3156                  * A TLB flush on behalf of the guest is equivalent to
3157                  * INVPCID(all), toggling CR4.PGE, etc., which requires
3158                  * a forced sync of the shadow page tables.  Unload the
3159                  * entire MMU here and the subsequent load will sync the
3160                  * shadow page tables, and also flush the TLB.
3161                  */
3162                 kvm_mmu_unload(vcpu);
3163                 return;
3164         }
3165
3166         static_call(kvm_x86_tlb_flush_guest)(vcpu);
3167 }
3168
3169 static void record_steal_time(struct kvm_vcpu *vcpu)
3170 {
3171         struct kvm_host_map map;
3172         struct kvm_steal_time *st;
3173
3174         if (kvm_xen_msr_enabled(vcpu->kvm)) {
3175                 kvm_xen_runstate_set_running(vcpu);
3176                 return;
3177         }
3178
3179         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3180                 return;
3181
3182         /* -EAGAIN is returned in atomic context so we can just return. */
3183         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT,
3184                         &map, &vcpu->arch.st.cache, false))
3185                 return;
3186
3187         st = map.hva +
3188                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
3189
3190         /*
3191          * Doing a TLB flush here, on the guest's behalf, can avoid
3192          * expensive IPIs.
3193          */
3194         if (guest_pv_has(vcpu, KVM_FEATURE_PV_TLB_FLUSH)) {
3195                 u8 st_preempted = xchg(&st->preempted, 0);
3196
3197                 trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
3198                                        st_preempted & KVM_VCPU_FLUSH_TLB);
3199                 if (st_preempted & KVM_VCPU_FLUSH_TLB)
3200                         kvm_vcpu_flush_tlb_guest(vcpu);
3201         } else {
3202                 st->preempted = 0;
3203         }
3204
3205         vcpu->arch.st.preempted = 0;
3206
3207         if (st->version & 1)
3208                 st->version += 1;  /* first time write, random junk */
3209
3210         st->version += 1;
3211
3212         smp_wmb();
3213
3214         st->steal += current->sched_info.run_delay -
3215                 vcpu->arch.st.last_steal;
3216         vcpu->arch.st.last_steal = current->sched_info.run_delay;
3217
3218         smp_wmb();
3219
3220         st->version += 1;
3221
3222         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, false);
3223 }
3224
3225 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3226 {
3227         bool pr = false;
3228         u32 msr = msr_info->index;
3229         u64 data = msr_info->data;
3230
3231         if (msr && msr == vcpu->kvm->arch.xen_hvm_config.msr)
3232                 return kvm_xen_write_hypercall_page(vcpu, data);
3233
3234         switch (msr) {
3235         case MSR_AMD64_NB_CFG:
3236         case MSR_IA32_UCODE_WRITE:
3237         case MSR_VM_HSAVE_PA:
3238         case MSR_AMD64_PATCH_LOADER:
3239         case MSR_AMD64_BU_CFG2:
3240         case MSR_AMD64_DC_CFG:
3241         case MSR_F15H_EX_CFG:
3242                 break;
3243
3244         case MSR_IA32_UCODE_REV:
3245                 if (msr_info->host_initiated)
3246                         vcpu->arch.microcode_version = data;
3247                 break;
3248         case MSR_IA32_ARCH_CAPABILITIES:
3249                 if (!msr_info->host_initiated)
3250                         return 1;
3251                 vcpu->arch.arch_capabilities = data;
3252                 break;
3253         case MSR_IA32_PERF_CAPABILITIES: {
3254                 struct kvm_msr_entry msr_ent = {.index = msr, .data = 0};
3255
3256                 if (!msr_info->host_initiated)
3257                         return 1;
3258                 if (guest_cpuid_has(vcpu, X86_FEATURE_PDCM) && kvm_get_msr_feature(&msr_ent))
3259                         return 1;
3260                 if (data & ~msr_ent.data)
3261                         return 1;
3262
3263                 vcpu->arch.perf_capabilities = data;
3264
3265                 return 0;
3266                 }
3267         case MSR_EFER:
3268                 return set_efer(vcpu, msr_info);
3269         case MSR_K7_HWCR:
3270                 data &= ~(u64)0x40;     /* ignore flush filter disable */
3271                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
3272                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
3273
3274                 /* Handle McStatusWrEn */
3275                 if (data == BIT_ULL(18)) {
3276                         vcpu->arch.msr_hwcr = data;
3277                 } else if (data != 0) {
3278                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
3279                                     data);
3280                         return 1;
3281                 }
3282                 break;
3283         case MSR_FAM10H_MMIO_CONF_BASE:
3284                 if (data != 0) {
3285                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
3286                                     "0x%llx\n", data);
3287                         return 1;
3288                 }
3289                 break;
3290         case 0x200 ... 0x2ff:
3291                 return kvm_mtrr_set_msr(vcpu, msr, data);
3292         case MSR_IA32_APICBASE:
3293                 return kvm_set_apic_base(vcpu, msr_info);
3294         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3295                 return kvm_x2apic_msr_write(vcpu, msr, data);
3296         case MSR_IA32_TSC_DEADLINE:
3297                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
3298                 break;
3299         case MSR_IA32_TSC_ADJUST:
3300                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
3301                         if (!msr_info->host_initiated) {
3302                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
3303                                 adjust_tsc_offset_guest(vcpu, adj);
3304                         }
3305                         vcpu->arch.ia32_tsc_adjust_msr = data;
3306                 }
3307                 break;
3308         case MSR_IA32_MISC_ENABLE:
3309                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
3310                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
3311                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
3312                                 return 1;
3313                         vcpu->arch.ia32_misc_enable_msr = data;
3314                         kvm_update_cpuid_runtime(vcpu);
3315                 } else {
3316                         vcpu->arch.ia32_misc_enable_msr = data;
3317                 }
3318                 break;
3319         case MSR_IA32_SMBASE:
3320                 if (!msr_info->host_initiated)
3321                         return 1;
3322                 vcpu->arch.smbase = data;
3323                 break;
3324         case MSR_IA32_POWER_CTL:
3325                 vcpu->arch.msr_ia32_power_ctl = data;
3326                 break;
3327         case MSR_IA32_TSC:
3328                 if (msr_info->host_initiated) {
3329                         kvm_synchronize_tsc(vcpu, data);
3330                 } else {
3331                         u64 adj = kvm_compute_l1_tsc_offset(vcpu, data) - vcpu->arch.l1_tsc_offset;
3332                         adjust_tsc_offset_guest(vcpu, adj);
3333                         vcpu->arch.ia32_tsc_adjust_msr += adj;
3334                 }
3335                 break;
3336         case MSR_IA32_XSS:
3337                 if (!msr_info->host_initiated &&
3338                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3339                         return 1;
3340                 /*
3341                  * KVM supports exposing PT to the guest, but does not support
3342                  * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3343                  * XSAVES/XRSTORS to save/restore PT MSRs.
3344                  */
3345                 if (data & ~supported_xss)
3346                         return 1;
3347                 vcpu->arch.ia32_xss = data;
3348                 break;
3349         case MSR_SMI_COUNT:
3350                 if (!msr_info->host_initiated)
3351                         return 1;
3352                 vcpu->arch.smi_count = data;
3353                 break;
3354         case MSR_KVM_WALL_CLOCK_NEW:
3355                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3356                         return 1;
3357
3358                 vcpu->kvm->arch.wall_clock = data;
3359                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3360                 break;
3361         case MSR_KVM_WALL_CLOCK:
3362                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3363                         return 1;
3364
3365                 vcpu->kvm->arch.wall_clock = data;
3366                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3367                 break;
3368         case MSR_KVM_SYSTEM_TIME_NEW:
3369                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3370                         return 1;
3371
3372                 kvm_write_system_time(vcpu, data, false, msr_info->host_initiated);
3373                 break;
3374         case MSR_KVM_SYSTEM_TIME:
3375                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3376                         return 1;
3377
3378                 kvm_write_system_time(vcpu, data, true,  msr_info->host_initiated);
3379                 break;
3380         case MSR_KVM_ASYNC_PF_EN:
3381                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3382                         return 1;
3383
3384                 if (kvm_pv_enable_async_pf(vcpu, data))
3385                         return 1;
3386                 break;
3387         case MSR_KVM_ASYNC_PF_INT:
3388                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3389                         return 1;
3390
3391                 if (kvm_pv_enable_async_pf_int(vcpu, data))
3392                         return 1;
3393                 break;
3394         case MSR_KVM_ASYNC_PF_ACK:
3395                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3396                         return 1;
3397                 if (data & 0x1) {
3398                         vcpu->arch.apf.pageready_pending = false;
3399                         kvm_check_async_pf_completion(vcpu);
3400                 }
3401                 break;
3402         case MSR_KVM_STEAL_TIME:
3403                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3404                         return 1;
3405
3406                 if (unlikely(!sched_info_on()))
3407                         return 1;
3408
3409                 if (data & KVM_STEAL_RESERVED_MASK)
3410                         return 1;
3411
3412                 vcpu->arch.st.msr_val = data;
3413
3414                 if (!(data & KVM_MSR_ENABLED))
3415                         break;
3416
3417                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3418
3419                 break;
3420         case MSR_KVM_PV_EOI_EN:
3421                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3422                         return 1;
3423
3424                 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
3425                         return 1;
3426                 break;
3427
3428         case MSR_KVM_POLL_CONTROL:
3429                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3430                         return 1;
3431
3432                 /* only enable bit supported */
3433                 if (data & (-1ULL << 1))
3434                         return 1;
3435
3436                 vcpu->arch.msr_kvm_poll_control = data;
3437                 break;
3438
3439         case MSR_IA32_MCG_CTL:
3440         case MSR_IA32_MCG_STATUS:
3441         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3442                 return set_msr_mce(vcpu, msr_info);
3443
3444         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3445         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3446                 pr = true;
3447                 fallthrough;
3448         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3449         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3450                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3451                         return kvm_pmu_set_msr(vcpu, msr_info);
3452
3453                 if (pr || data != 0)
3454                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
3455                                     "0x%x data 0x%llx\n", msr, data);
3456                 break;
3457         case MSR_K7_CLK_CTL:
3458                 /*
3459                  * Ignore all writes to this no longer documented MSR.
3460                  * Writes are only relevant for old K7 processors,
3461                  * all pre-dating SVM, but a recommended workaround from
3462                  * AMD for these chips. It is possible to specify the
3463                  * affected processor models on the command line, hence
3464                  * the need to ignore the workaround.
3465                  */
3466                 break;
3467         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3468         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3469         case HV_X64_MSR_SYNDBG_OPTIONS:
3470         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3471         case HV_X64_MSR_CRASH_CTL:
3472         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3473         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3474         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3475         case HV_X64_MSR_TSC_EMULATION_STATUS:
3476                 return kvm_hv_set_msr_common(vcpu, msr, data,
3477                                              msr_info->host_initiated);
3478         case MSR_IA32_BBL_CR_CTL3:
3479                 /* Drop writes to this legacy MSR -- see rdmsr
3480                  * counterpart for further detail.
3481                  */
3482                 if (report_ignored_msrs)
3483                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
3484                                 msr, data);
3485                 break;
3486         case MSR_AMD64_OSVW_ID_LENGTH:
3487                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3488                         return 1;
3489                 vcpu->arch.osvw.length = data;
3490                 break;
3491         case MSR_AMD64_OSVW_STATUS:
3492                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3493                         return 1;
3494                 vcpu->arch.osvw.status = data;
3495                 break;
3496         case MSR_PLATFORM_INFO:
3497                 if (!msr_info->host_initiated ||
3498                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
3499                      cpuid_fault_enabled(vcpu)))
3500                         return 1;
3501                 vcpu->arch.msr_platform_info = data;
3502                 break;
3503         case MSR_MISC_FEATURES_ENABLES:
3504                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
3505                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
3506                      !supports_cpuid_fault(vcpu)))
3507                         return 1;
3508                 vcpu->arch.msr_misc_features_enables = data;
3509                 break;
3510         default:
3511                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3512                         return kvm_pmu_set_msr(vcpu, msr_info);
3513                 return KVM_MSR_RET_INVALID;
3514         }
3515         return 0;
3516 }
3517 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
3518
3519 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
3520 {
3521         u64 data;
3522         u64 mcg_cap = vcpu->arch.mcg_cap;
3523         unsigned bank_num = mcg_cap & 0xff;
3524
3525         switch (msr) {
3526         case MSR_IA32_P5_MC_ADDR:
3527         case MSR_IA32_P5_MC_TYPE:
3528                 data = 0;
3529                 break;
3530         case MSR_IA32_MCG_CAP:
3531                 data = vcpu->arch.mcg_cap;
3532                 break;
3533         case MSR_IA32_MCG_CTL:
3534                 if (!(mcg_cap & MCG_CTL_P) && !host)
3535                         return 1;
3536                 data = vcpu->arch.mcg_ctl;
3537                 break;
3538         case MSR_IA32_MCG_STATUS:
3539                 data = vcpu->arch.mcg_status;
3540                 break;
3541         default:
3542                 if (msr >= MSR_IA32_MC0_CTL &&
3543                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3544                         u32 offset = array_index_nospec(
3545                                 msr - MSR_IA32_MC0_CTL,
3546                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3547
3548                         data = vcpu->arch.mce_banks[offset];
3549                         break;
3550                 }
3551                 return 1;
3552         }
3553         *pdata = data;
3554         return 0;
3555 }
3556
3557 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3558 {
3559         switch (msr_info->index) {
3560         case MSR_IA32_PLATFORM_ID:
3561         case MSR_IA32_EBL_CR_POWERON:
3562         case MSR_IA32_LASTBRANCHFROMIP:
3563         case MSR_IA32_LASTBRANCHTOIP:
3564         case MSR_IA32_LASTINTFROMIP:
3565         case MSR_IA32_LASTINTTOIP:
3566         case MSR_AMD64_SYSCFG:
3567         case MSR_K8_TSEG_ADDR:
3568         case MSR_K8_TSEG_MASK:
3569         case MSR_VM_HSAVE_PA:
3570         case MSR_K8_INT_PENDING_MSG:
3571         case MSR_AMD64_NB_CFG:
3572         case MSR_FAM10H_MMIO_CONF_BASE:
3573         case MSR_AMD64_BU_CFG2:
3574         case MSR_IA32_PERF_CTL:
3575         case MSR_AMD64_DC_CFG:
3576         case MSR_F15H_EX_CFG:
3577         /*
3578          * Intel Sandy Bridge CPUs must support the RAPL (running average power
3579          * limit) MSRs. Just return 0, as we do not want to expose the host
3580          * data here. Do not conditionalize this on CPUID, as KVM does not do
3581          * so for existing CPU-specific MSRs.
3582          */
3583         case MSR_RAPL_POWER_UNIT:
3584         case MSR_PP0_ENERGY_STATUS:     /* Power plane 0 (core) */
3585         case MSR_PP1_ENERGY_STATUS:     /* Power plane 1 (graphics uncore) */
3586         case MSR_PKG_ENERGY_STATUS:     /* Total package */
3587         case MSR_DRAM_ENERGY_STATUS:    /* DRAM controller */
3588                 msr_info->data = 0;
3589                 break;
3590         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3591                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3592                         return kvm_pmu_get_msr(vcpu, msr_info);
3593                 if (!msr_info->host_initiated)
3594                         return 1;
3595                 msr_info->data = 0;
3596                 break;
3597         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3598         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3599         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3600         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3601                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3602                         return kvm_pmu_get_msr(vcpu, msr_info);
3603                 msr_info->data = 0;
3604                 break;
3605         case MSR_IA32_UCODE_REV:
3606                 msr_info->data = vcpu->arch.microcode_version;
3607                 break;
3608         case MSR_IA32_ARCH_CAPABILITIES:
3609                 if (!msr_info->host_initiated &&
3610                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
3611                         return 1;
3612                 msr_info->data = vcpu->arch.arch_capabilities;
3613                 break;
3614         case MSR_IA32_PERF_CAPABILITIES:
3615                 if (!msr_info->host_initiated &&
3616                     !guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
3617                         return 1;
3618                 msr_info->data = vcpu->arch.perf_capabilities;
3619                 break;
3620         case MSR_IA32_POWER_CTL:
3621                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
3622                 break;
3623         case MSR_IA32_TSC: {
3624                 /*
3625                  * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3626                  * even when not intercepted. AMD manual doesn't explicitly
3627                  * state this but appears to behave the same.
3628                  *
3629                  * On userspace reads and writes, however, we unconditionally
3630                  * return L1's TSC value to ensure backwards-compatible
3631                  * behavior for migration.
3632                  */
3633                 u64 offset, ratio;
3634
3635                 if (msr_info->host_initiated) {
3636                         offset = vcpu->arch.l1_tsc_offset;
3637                         ratio = vcpu->arch.l1_tsc_scaling_ratio;
3638                 } else {
3639                         offset = vcpu->arch.tsc_offset;
3640                         ratio = vcpu->arch.tsc_scaling_ratio;
3641                 }
3642
3643                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc(), ratio) + offset;
3644                 break;
3645         }
3646         case MSR_MTRRcap:
3647         case 0x200 ... 0x2ff:
3648                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
3649         case 0xcd: /* fsb frequency */
3650                 msr_info->data = 3;
3651                 break;
3652                 /*
3653                  * MSR_EBC_FREQUENCY_ID
3654                  * Conservative value valid for even the basic CPU models.
3655                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3656                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3657                  * and 266MHz for model 3, or 4. Set Core Clock
3658                  * Frequency to System Bus Frequency Ratio to 1 (bits
3659                  * 31:24) even though these are only valid for CPU
3660                  * models > 2, however guests may end up dividing or
3661                  * multiplying by zero otherwise.
3662                  */
3663         case MSR_EBC_FREQUENCY_ID:
3664                 msr_info->data = 1 << 24;
3665                 break;
3666         case MSR_IA32_APICBASE:
3667                 msr_info->data = kvm_get_apic_base(vcpu);
3668                 break;
3669         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3670                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
3671         case MSR_IA32_TSC_DEADLINE:
3672                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
3673                 break;
3674         case MSR_IA32_TSC_ADJUST:
3675                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
3676                 break;
3677         case MSR_IA32_MISC_ENABLE:
3678                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
3679                 break;
3680         case MSR_IA32_SMBASE:
3681                 if (!msr_info->host_initiated)
3682                         return 1;
3683                 msr_info->data = vcpu->arch.smbase;
3684                 break;
3685         case MSR_SMI_COUNT:
3686                 msr_info->data = vcpu->arch.smi_count;
3687                 break;
3688         case MSR_IA32_PERF_STATUS:
3689                 /* TSC increment by tick */
3690                 msr_info->data = 1000ULL;
3691                 /* CPU multiplier */
3692                 msr_info->data |= (((uint64_t)4ULL) << 40);
3693                 break;
3694         case MSR_EFER:
3695                 msr_info->data = vcpu->arch.efer;
3696                 break;
3697         case MSR_KVM_WALL_CLOCK:
3698                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3699                         return 1;
3700
3701                 msr_info->data = vcpu->kvm->arch.wall_clock;
3702                 break;
3703         case MSR_KVM_WALL_CLOCK_NEW:
3704                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3705                         return 1;
3706
3707                 msr_info->data = vcpu->kvm->arch.wall_clock;
3708                 break;
3709         case MSR_KVM_SYSTEM_TIME:
3710                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3711                         return 1;
3712
3713                 msr_info->data = vcpu->arch.time;
3714                 break;
3715         case MSR_KVM_SYSTEM_TIME_NEW:
3716                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3717                         return 1;
3718
3719                 msr_info->data = vcpu->arch.time;
3720                 break;
3721         case MSR_KVM_ASYNC_PF_EN:
3722                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3723                         return 1;
3724
3725                 msr_info->data = vcpu->arch.apf.msr_en_val;
3726                 break;
3727         case MSR_KVM_ASYNC_PF_INT:
3728                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3729                         return 1;
3730
3731                 msr_info->data = vcpu->arch.apf.msr_int_val;
3732                 break;
3733         case MSR_KVM_ASYNC_PF_ACK:
3734                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3735                         return 1;
3736
3737                 msr_info->data = 0;
3738                 break;
3739         case MSR_KVM_STEAL_TIME:
3740                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3741                         return 1;
3742
3743                 msr_info->data = vcpu->arch.st.msr_val;
3744                 break;
3745         case MSR_KVM_PV_EOI_EN:
3746                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3747                         return 1;
3748
3749                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3750                 break;
3751         case MSR_KVM_POLL_CONTROL:
3752                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3753                         return 1;
3754
3755                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3756                 break;
3757         case MSR_IA32_P5_MC_ADDR:
3758         case MSR_IA32_P5_MC_TYPE:
3759         case MSR_IA32_MCG_CAP:
3760         case MSR_IA32_MCG_CTL:
3761         case MSR_IA32_MCG_STATUS:
3762         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3763                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3764                                    msr_info->host_initiated);
3765         case MSR_IA32_XSS:
3766                 if (!msr_info->host_initiated &&
3767                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3768                         return 1;
3769                 msr_info->data = vcpu->arch.ia32_xss;
3770                 break;
3771         case MSR_K7_CLK_CTL:
3772                 /*
3773                  * Provide expected ramp-up count for K7. All other
3774                  * are set to zero, indicating minimum divisors for
3775                  * every field.
3776                  *
3777                  * This prevents guest kernels on AMD host with CPU
3778                  * type 6, model 8 and higher from exploding due to
3779                  * the rdmsr failing.
3780                  */
3781                 msr_info->data = 0x20000000;
3782                 break;
3783         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3784         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3785         case HV_X64_MSR_SYNDBG_OPTIONS:
3786         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3787         case HV_X64_MSR_CRASH_CTL:
3788         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3789         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3790         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3791         case HV_X64_MSR_TSC_EMULATION_STATUS:
3792                 return kvm_hv_get_msr_common(vcpu,
3793                                              msr_info->index, &msr_info->data,
3794                                              msr_info->host_initiated);
3795         case MSR_IA32_BBL_CR_CTL3:
3796                 /* This legacy MSR exists but isn't fully documented in current
3797                  * silicon.  It is however accessed by winxp in very narrow
3798                  * scenarios where it sets bit #19, itself documented as
3799                  * a "reserved" bit.  Best effort attempt to source coherent
3800                  * read data here should the balance of the register be
3801                  * interpreted by the guest:
3802                  *
3803                  * L2 cache control register 3: 64GB range, 256KB size,
3804                  * enabled, latency 0x1, configured
3805                  */
3806                 msr_info->data = 0xbe702111;
3807                 break;
3808         case MSR_AMD64_OSVW_ID_LENGTH:
3809                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3810                         return 1;
3811                 msr_info->data = vcpu->arch.osvw.length;
3812                 break;
3813         case MSR_AMD64_OSVW_STATUS:
3814                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3815                         return 1;
3816                 msr_info->data = vcpu->arch.osvw.status;
3817                 break;
3818         case MSR_PLATFORM_INFO:
3819                 if (!msr_info->host_initiated &&
3820                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
3821                         return 1;
3822                 msr_info->data = vcpu->arch.msr_platform_info;
3823                 break;
3824         case MSR_MISC_FEATURES_ENABLES:
3825                 msr_info->data = vcpu->arch.msr_misc_features_enables;
3826                 break;
3827         case MSR_K7_HWCR:
3828                 msr_info->data = vcpu->arch.msr_hwcr;
3829                 break;
3830         default:
3831                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3832                         return kvm_pmu_get_msr(vcpu, msr_info);
3833                 return KVM_MSR_RET_INVALID;
3834         }
3835         return 0;
3836 }
3837 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
3838
3839 /*
3840  * Read or write a bunch of msrs. All parameters are kernel addresses.
3841  *
3842  * @return number of msrs set successfully.
3843  */
3844 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
3845                     struct kvm_msr_entry *entries,
3846                     int (*do_msr)(struct kvm_vcpu *vcpu,
3847                                   unsigned index, u64 *data))
3848 {
3849         int i;
3850
3851         for (i = 0; i < msrs->nmsrs; ++i)
3852                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
3853                         break;
3854
3855         return i;
3856 }
3857
3858 /*
3859  * Read or write a bunch of msrs. Parameters are user addresses.
3860  *
3861  * @return number of msrs set successfully.
3862  */
3863 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
3864                   int (*do_msr)(struct kvm_vcpu *vcpu,
3865                                 unsigned index, u64 *data),
3866                   int writeback)
3867 {
3868         struct kvm_msrs msrs;
3869         struct kvm_msr_entry *entries;
3870         int r, n;
3871         unsigned size;
3872
3873         r = -EFAULT;
3874         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
3875                 goto out;
3876
3877         r = -E2BIG;
3878         if (msrs.nmsrs >= MAX_IO_MSRS)
3879                 goto out;
3880
3881         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
3882         entries = memdup_user(user_msrs->entries, size);
3883         if (IS_ERR(entries)) {
3884                 r = PTR_ERR(entries);
3885                 goto out;
3886         }
3887
3888         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
3889         if (r < 0)
3890                 goto out_free;
3891
3892         r = -EFAULT;
3893         if (writeback && copy_to_user(user_msrs->entries, entries, size))
3894                 goto out_free;
3895
3896         r = n;
3897
3898 out_free:
3899         kfree(entries);
3900 out:
3901         return r;
3902 }
3903
3904 static inline bool kvm_can_mwait_in_guest(void)
3905 {
3906         return boot_cpu_has(X86_FEATURE_MWAIT) &&
3907                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
3908                 boot_cpu_has(X86_FEATURE_ARAT);
3909 }
3910
3911 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu *vcpu,
3912                                             struct kvm_cpuid2 __user *cpuid_arg)
3913 {
3914         struct kvm_cpuid2 cpuid;
3915         int r;
3916
3917         r = -EFAULT;
3918         if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3919                 return r;
3920
3921         r = kvm_get_hv_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3922         if (r)
3923                 return r;
3924
3925         r = -EFAULT;
3926         if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3927                 return r;
3928
3929         return 0;
3930 }
3931
3932 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
3933 {
3934         int r = 0;
3935
3936         switch (ext) {
3937         case KVM_CAP_IRQCHIP:
3938         case KVM_CAP_HLT:
3939         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
3940         case KVM_CAP_SET_TSS_ADDR:
3941         case KVM_CAP_EXT_CPUID:
3942         case KVM_CAP_EXT_EMUL_CPUID:
3943         case KVM_CAP_CLOCKSOURCE:
3944         case KVM_CAP_PIT:
3945         case KVM_CAP_NOP_IO_DELAY:
3946         case KVM_CAP_MP_STATE:
3947         case KVM_CAP_SYNC_MMU:
3948         case KVM_CAP_USER_NMI:
3949         case KVM_CAP_REINJECT_CONTROL:
3950         case KVM_CAP_IRQ_INJECT_STATUS:
3951         case KVM_CAP_IOEVENTFD:
3952         case KVM_CAP_IOEVENTFD_NO_LENGTH:
3953         case KVM_CAP_PIT2:
3954         case KVM_CAP_PIT_STATE2:
3955         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
3956         case KVM_CAP_VCPU_EVENTS:
3957         case KVM_CAP_HYPERV:
3958         case KVM_CAP_HYPERV_VAPIC:
3959         case KVM_CAP_HYPERV_SPIN:
3960         case KVM_CAP_HYPERV_SYNIC:
3961         case KVM_CAP_HYPERV_SYNIC2:
3962         case KVM_CAP_HYPERV_VP_INDEX:
3963         case KVM_CAP_HYPERV_EVENTFD:
3964         case KVM_CAP_HYPERV_TLBFLUSH:
3965         case KVM_CAP_HYPERV_SEND_IPI:
3966         case KVM_CAP_HYPERV_CPUID:
3967         case KVM_CAP_HYPERV_ENFORCE_CPUID:
3968         case KVM_CAP_SYS_HYPERV_CPUID:
3969         case KVM_CAP_PCI_SEGMENT:
3970         case KVM_CAP_DEBUGREGS:
3971         case KVM_CAP_X86_ROBUST_SINGLESTEP:
3972         case KVM_CAP_XSAVE:
3973         case KVM_CAP_ASYNC_PF:
3974         case KVM_CAP_ASYNC_PF_INT:
3975         case KVM_CAP_GET_TSC_KHZ:
3976         case KVM_CAP_KVMCLOCK_CTRL:
3977         case KVM_CAP_READONLY_MEM:
3978         case KVM_CAP_HYPERV_TIME:
3979         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
3980         case KVM_CAP_TSC_DEADLINE_TIMER:
3981         case KVM_CAP_DISABLE_QUIRKS:
3982         case KVM_CAP_SET_BOOT_CPU_ID:
3983         case KVM_CAP_SPLIT_IRQCHIP:
3984         case KVM_CAP_IMMEDIATE_EXIT:
3985         case KVM_CAP_PMU_EVENT_FILTER:
3986         case KVM_CAP_GET_MSR_FEATURES:
3987         case KVM_CAP_MSR_PLATFORM_INFO:
3988         case KVM_CAP_EXCEPTION_PAYLOAD:
3989         case KVM_CAP_SET_GUEST_DEBUG:
3990         case KVM_CAP_LAST_CPU:
3991         case KVM_CAP_X86_USER_SPACE_MSR:
3992         case KVM_CAP_X86_MSR_FILTER:
3993         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
3994 #ifdef CONFIG_X86_SGX_KVM
3995         case KVM_CAP_SGX_ATTRIBUTE:
3996 #endif
3997         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
3998         case KVM_CAP_SREGS2:
3999                 r = 1;
4000                 break;
4001         case KVM_CAP_EXIT_HYPERCALL:
4002                 r = KVM_EXIT_HYPERCALL_VALID_MASK;
4003                 break;
4004         case KVM_CAP_SET_GUEST_DEBUG2:
4005                 return KVM_GUESTDBG_VALID_MASK;
4006 #ifdef CONFIG_KVM_XEN
4007         case KVM_CAP_XEN_HVM:
4008                 r = KVM_XEN_HVM_CONFIG_HYPERCALL_MSR |
4009                     KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL |
4010                     KVM_XEN_HVM_CONFIG_SHARED_INFO;
4011                 if (sched_info_on())
4012                         r |= KVM_XEN_HVM_CONFIG_RUNSTATE;
4013                 break;
4014 #endif
4015         case KVM_CAP_SYNC_REGS:
4016                 r = KVM_SYNC_X86_VALID_FIELDS;
4017                 break;
4018         case KVM_CAP_ADJUST_CLOCK:
4019                 r = KVM_CLOCK_TSC_STABLE;
4020                 break;
4021         case KVM_CAP_X86_DISABLE_EXITS:
4022                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
4023                       KVM_X86_DISABLE_EXITS_CSTATE;
4024                 if(kvm_can_mwait_in_guest())
4025                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
4026                 break;
4027         case KVM_CAP_X86_SMM:
4028                 /* SMBASE is usually relocated above 1M on modern chipsets,
4029                  * and SMM handlers might indeed rely on 4G segment limits,
4030                  * so do not report SMM to be available if real mode is
4031                  * emulated via vm86 mode.  Still, do not go to great lengths
4032                  * to avoid userspace's usage of the feature, because it is a
4033                  * fringe case that is not enabled except via specific settings
4034                  * of the module parameters.
4035                  */
4036                 r = static_call(kvm_x86_has_emulated_msr)(kvm, MSR_IA32_SMBASE);
4037                 break;
4038         case KVM_CAP_VAPIC:
4039                 r = !static_call(kvm_x86_cpu_has_accelerated_tpr)();
4040                 break;
4041         case KVM_CAP_NR_VCPUS:
4042                 r = KVM_SOFT_MAX_VCPUS;
4043                 break;
4044         case KVM_CAP_MAX_VCPUS:
4045                 r = KVM_MAX_VCPUS;
4046                 break;
4047         case KVM_CAP_MAX_VCPU_ID:
4048                 r = KVM_MAX_VCPU_ID;
4049                 break;
4050         case KVM_CAP_PV_MMU:    /* obsolete */
4051                 r = 0;
4052                 break;
4053         case KVM_CAP_MCE:
4054                 r = KVM_MAX_MCE_BANKS;
4055                 break;
4056         case KVM_CAP_XCRS:
4057                 r = boot_cpu_has(X86_FEATURE_XSAVE);
4058                 break;
4059         case KVM_CAP_TSC_CONTROL:
4060                 r = kvm_has_tsc_control;
4061                 break;
4062         case KVM_CAP_X2APIC_API:
4063                 r = KVM_X2APIC_API_VALID_FLAGS;
4064                 break;
4065         case KVM_CAP_NESTED_STATE:
4066                 r = kvm_x86_ops.nested_ops->get_state ?
4067                         kvm_x86_ops.nested_ops->get_state(NULL, NULL, 0) : 0;
4068                 break;
4069         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4070                 r = kvm_x86_ops.enable_direct_tlbflush != NULL;
4071                 break;
4072         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4073                 r = kvm_x86_ops.nested_ops->enable_evmcs != NULL;
4074                 break;
4075         case KVM_CAP_SMALLER_MAXPHYADDR:
4076                 r = (int) allow_smaller_maxphyaddr;
4077                 break;
4078         case KVM_CAP_STEAL_TIME:
4079                 r = sched_info_on();
4080                 break;
4081         case KVM_CAP_X86_BUS_LOCK_EXIT:
4082                 if (kvm_has_bus_lock_exit)
4083                         r = KVM_BUS_LOCK_DETECTION_OFF |
4084                             KVM_BUS_LOCK_DETECTION_EXIT;
4085                 else
4086                         r = 0;
4087                 break;
4088         default:
4089                 break;
4090         }
4091         return r;
4092
4093 }
4094
4095 long kvm_arch_dev_ioctl(struct file *filp,
4096                         unsigned int ioctl, unsigned long arg)
4097 {
4098         void __user *argp = (void __user *)arg;
4099         long r;
4100
4101         switch (ioctl) {
4102         case KVM_GET_MSR_INDEX_LIST: {
4103                 struct kvm_msr_list __user *user_msr_list = argp;
4104                 struct kvm_msr_list msr_list;
4105                 unsigned n;
4106
4107                 r = -EFAULT;
4108                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4109                         goto out;
4110                 n = msr_list.nmsrs;
4111                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
4112                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4113                         goto out;
4114                 r = -E2BIG;
4115                 if (n < msr_list.nmsrs)
4116                         goto out;
4117                 r = -EFAULT;
4118                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
4119                                  num_msrs_to_save * sizeof(u32)))
4120                         goto out;
4121                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
4122                                  &emulated_msrs,
4123                                  num_emulated_msrs * sizeof(u32)))
4124                         goto out;
4125                 r = 0;
4126                 break;
4127         }
4128         case KVM_GET_SUPPORTED_CPUID:
4129         case KVM_GET_EMULATED_CPUID: {
4130                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4131                 struct kvm_cpuid2 cpuid;
4132
4133                 r = -EFAULT;
4134                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4135                         goto out;
4136
4137                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
4138                                             ioctl);
4139                 if (r)
4140                         goto out;
4141
4142                 r = -EFAULT;
4143                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4144                         goto out;
4145                 r = 0;
4146                 break;
4147         }
4148         case KVM_X86_GET_MCE_CAP_SUPPORTED:
4149                 r = -EFAULT;
4150                 if (copy_to_user(argp, &kvm_mce_cap_supported,
4151                                  sizeof(kvm_mce_cap_supported)))
4152                         goto out;
4153                 r = 0;
4154                 break;
4155         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
4156                 struct kvm_msr_list __user *user_msr_list = argp;
4157                 struct kvm_msr_list msr_list;
4158                 unsigned int n;
4159
4160                 r = -EFAULT;
4161                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4162                         goto out;
4163                 n = msr_list.nmsrs;
4164                 msr_list.nmsrs = num_msr_based_features;
4165                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4166                         goto out;
4167                 r = -E2BIG;
4168                 if (n < msr_list.nmsrs)
4169                         goto out;
4170                 r = -EFAULT;
4171                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
4172                                  num_msr_based_features * sizeof(u32)))
4173                         goto out;
4174                 r = 0;
4175                 break;
4176         }
4177         case KVM_GET_MSRS:
4178                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
4179                 break;
4180         case KVM_GET_SUPPORTED_HV_CPUID:
4181                 r = kvm_ioctl_get_supported_hv_cpuid(NULL, argp);
4182                 break;
4183         default:
4184                 r = -EINVAL;
4185                 break;
4186         }
4187 out:
4188         return r;
4189 }
4190
4191 static void wbinvd_ipi(void *garbage)
4192 {
4193         wbinvd();
4194 }
4195
4196 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
4197 {
4198         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
4199 }
4200
4201 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
4202 {
4203         /* Address WBINVD may be executed by guest */
4204         if (need_emulate_wbinvd(vcpu)) {
4205                 if (static_call(kvm_x86_has_wbinvd_exit)())
4206                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4207                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
4208                         smp_call_function_single(vcpu->cpu,
4209                                         wbinvd_ipi, NULL, 1);
4210         }
4211
4212         static_call(kvm_x86_vcpu_load)(vcpu, cpu);
4213
4214         /* Save host pkru register if supported */
4215         vcpu->arch.host_pkru = read_pkru();
4216
4217         /* Apply any externally detected TSC adjustments (due to suspend) */
4218         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
4219                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
4220                 vcpu->arch.tsc_offset_adjustment = 0;
4221                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4222         }
4223
4224         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
4225                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
4226                                 rdtsc() - vcpu->arch.last_host_tsc;
4227                 if (tsc_delta < 0)
4228                         mark_tsc_unstable("KVM discovered backwards TSC");
4229
4230                 if (kvm_check_tsc_unstable()) {
4231                         u64 offset = kvm_compute_l1_tsc_offset(vcpu,
4232                                                 vcpu->arch.last_guest_tsc);
4233                         kvm_vcpu_write_tsc_offset(vcpu, offset);
4234                         vcpu->arch.tsc_catchup = 1;
4235                 }
4236
4237                 if (kvm_lapic_hv_timer_in_use(vcpu))
4238                         kvm_lapic_restart_hv_timer(vcpu);
4239
4240                 /*
4241                  * On a host with synchronized TSC, there is no need to update
4242                  * kvmclock on vcpu->cpu migration
4243                  */
4244                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
4245                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
4246                 if (vcpu->cpu != cpu)
4247                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
4248                 vcpu->cpu = cpu;
4249         }
4250
4251         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
4252 }
4253
4254 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
4255 {
4256         struct kvm_host_map map;
4257         struct kvm_steal_time *st;
4258
4259         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
4260                 return;
4261
4262         if (vcpu->arch.st.preempted)
4263                 return;
4264
4265         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT, &map,
4266                         &vcpu->arch.st.cache, true))
4267                 return;
4268
4269         st = map.hva +
4270                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
4271
4272         st->preempted = vcpu->arch.st.preempted = KVM_VCPU_PREEMPTED;
4273
4274         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, true);
4275 }
4276
4277 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
4278 {
4279         int idx;
4280
4281         if (vcpu->preempted && !vcpu->arch.guest_state_protected)
4282                 vcpu->arch.preempted_in_kernel = !static_call(kvm_x86_get_cpl)(vcpu);
4283
4284         /*
4285          * Take the srcu lock as memslots will be accessed to check the gfn
4286          * cache generation against the memslots generation.
4287          */
4288         idx = srcu_read_lock(&vcpu->kvm->srcu);
4289         if (kvm_xen_msr_enabled(vcpu->kvm))
4290                 kvm_xen_runstate_set_preempted(vcpu);
4291         else
4292                 kvm_steal_time_set_preempted(vcpu);
4293         srcu_read_unlock(&vcpu->kvm->srcu, idx);
4294
4295         static_call(kvm_x86_vcpu_put)(vcpu);
4296         vcpu->arch.last_host_tsc = rdtsc();
4297         /*
4298          * If userspace has set any breakpoints or watchpoints, dr6 is restored
4299          * on every vmexit, but if not, we might have a stale dr6 from the
4300          * guest. do_debug expects dr6 to be cleared after it runs, do the same.
4301          */
4302         set_debugreg(0, 6);
4303 }
4304
4305 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
4306                                     struct kvm_lapic_state *s)
4307 {
4308         if (vcpu->arch.apicv_active)
4309                 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
4310
4311         return kvm_apic_get_state(vcpu, s);
4312 }
4313
4314 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
4315                                     struct kvm_lapic_state *s)
4316 {
4317         int r;
4318
4319         r = kvm_apic_set_state(vcpu, s);
4320         if (r)
4321                 return r;
4322         update_cr8_intercept(vcpu);
4323
4324         return 0;
4325 }
4326
4327 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
4328 {
4329         /*
4330          * We can accept userspace's request for interrupt injection
4331          * as long as we have a place to store the interrupt number.
4332          * The actual injection will happen when the CPU is able to
4333          * deliver the interrupt.
4334          */
4335         if (kvm_cpu_has_extint(vcpu))
4336                 return false;
4337
4338         /* Acknowledging ExtINT does not happen if LINT0 is masked.  */
4339         return (!lapic_in_kernel(vcpu) ||
4340                 kvm_apic_accept_pic_intr(vcpu));
4341 }
4342
4343 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
4344 {
4345         return kvm_arch_interrupt_allowed(vcpu) &&
4346                 kvm_cpu_accept_dm_intr(vcpu);
4347 }
4348
4349 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
4350                                     struct kvm_interrupt *irq)
4351 {
4352         if (irq->irq >= KVM_NR_INTERRUPTS)
4353                 return -EINVAL;
4354
4355         if (!irqchip_in_kernel(vcpu->kvm)) {
4356                 kvm_queue_interrupt(vcpu, irq->irq, false);
4357                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4358                 return 0;
4359         }
4360
4361         /*
4362          * With in-kernel LAPIC, we only use this to inject EXTINT, so
4363          * fail for in-kernel 8259.
4364          */
4365         if (pic_in_kernel(vcpu->kvm))
4366                 return -ENXIO;
4367
4368         if (vcpu->arch.pending_external_vector != -1)
4369                 return -EEXIST;
4370
4371         vcpu->arch.pending_external_vector = irq->irq;
4372         kvm_make_request(KVM_REQ_EVENT, vcpu);
4373         return 0;
4374 }
4375
4376 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
4377 {
4378         kvm_inject_nmi(vcpu);
4379
4380         return 0;
4381 }
4382
4383 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
4384 {
4385         kvm_make_request(KVM_REQ_SMI, vcpu);
4386
4387         return 0;
4388 }
4389
4390 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
4391                                            struct kvm_tpr_access_ctl *tac)
4392 {
4393         if (tac->flags)
4394                 return -EINVAL;
4395         vcpu->arch.tpr_access_reporting = !!tac->enabled;
4396         return 0;
4397 }
4398
4399 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
4400                                         u64 mcg_cap)
4401 {
4402         int r;
4403         unsigned bank_num = mcg_cap & 0xff, bank;
4404
4405         r = -EINVAL;
4406         if (!bank_num || bank_num > KVM_MAX_MCE_BANKS)
4407                 goto out;
4408         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
4409                 goto out;
4410         r = 0;
4411         vcpu->arch.mcg_cap = mcg_cap;
4412         /* Init IA32_MCG_CTL to all 1s */
4413         if (mcg_cap & MCG_CTL_P)
4414                 vcpu->arch.mcg_ctl = ~(u64)0;
4415         /* Init IA32_MCi_CTL to all 1s */
4416         for (bank = 0; bank < bank_num; bank++)
4417                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
4418
4419         static_call(kvm_x86_setup_mce)(vcpu);
4420 out:
4421         return r;
4422 }
4423
4424 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
4425                                       struct kvm_x86_mce *mce)
4426 {
4427         u64 mcg_cap = vcpu->arch.mcg_cap;
4428         unsigned bank_num = mcg_cap & 0xff;
4429         u64 *banks = vcpu->arch.mce_banks;
4430
4431         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
4432                 return -EINVAL;
4433         /*
4434          * if IA32_MCG_CTL is not all 1s, the uncorrected error
4435          * reporting is disabled
4436          */
4437         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
4438             vcpu->arch.mcg_ctl != ~(u64)0)
4439                 return 0;
4440         banks += 4 * mce->bank;
4441         /*
4442          * if IA32_MCi_CTL is not all 1s, the uncorrected error
4443          * reporting is disabled for the bank
4444          */
4445         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
4446                 return 0;
4447         if (mce->status & MCI_STATUS_UC) {
4448                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
4449                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
4450                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
4451                         return 0;
4452                 }
4453                 if (banks[1] & MCI_STATUS_VAL)
4454                         mce->status |= MCI_STATUS_OVER;
4455                 banks[2] = mce->addr;
4456                 banks[3] = mce->misc;
4457                 vcpu->arch.mcg_status = mce->mcg_status;
4458                 banks[1] = mce->status;
4459                 kvm_queue_exception(vcpu, MC_VECTOR);
4460         } else if (!(banks[1] & MCI_STATUS_VAL)
4461                    || !(banks[1] & MCI_STATUS_UC)) {
4462                 if (banks[1] & MCI_STATUS_VAL)
4463                         mce->status |= MCI_STATUS_OVER;
4464                 banks[2] = mce->addr;
4465                 banks[3] = mce->misc;
4466                 banks[1] = mce->status;
4467         } else
4468                 banks[1] |= MCI_STATUS_OVER;
4469         return 0;
4470 }
4471
4472 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
4473                                                struct kvm_vcpu_events *events)
4474 {
4475         process_nmi(vcpu);
4476
4477         if (kvm_check_request(KVM_REQ_SMI, vcpu))
4478                 process_smi(vcpu);
4479
4480         /*
4481          * In guest mode, payload delivery should be deferred,
4482          * so that the L1 hypervisor can intercept #PF before
4483          * CR2 is modified (or intercept #DB before DR6 is
4484          * modified under nVMX). Unless the per-VM capability,
4485          * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4486          * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4487          * opportunistically defer the exception payload, deliver it if the
4488          * capability hasn't been requested before processing a
4489          * KVM_GET_VCPU_EVENTS.
4490          */
4491         if (!vcpu->kvm->arch.exception_payload_enabled &&
4492             vcpu->arch.exception.pending && vcpu->arch.exception.has_payload)
4493                 kvm_deliver_exception_payload(vcpu);
4494
4495         /*
4496          * The API doesn't provide the instruction length for software
4497          * exceptions, so don't report them. As long as the guest RIP
4498          * isn't advanced, we should expect to encounter the exception
4499          * again.
4500          */
4501         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
4502                 events->exception.injected = 0;
4503                 events->exception.pending = 0;
4504         } else {
4505                 events->exception.injected = vcpu->arch.exception.injected;
4506                 events->exception.pending = vcpu->arch.exception.pending;
4507                 /*
4508                  * For ABI compatibility, deliberately conflate
4509                  * pending and injected exceptions when
4510                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4511                  */
4512                 if (!vcpu->kvm->arch.exception_payload_enabled)
4513                         events->exception.injected |=
4514                                 vcpu->arch.exception.pending;
4515         }
4516         events->exception.nr = vcpu->arch.exception.nr;
4517         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
4518         events->exception.error_code = vcpu->arch.exception.error_code;
4519         events->exception_has_payload = vcpu->arch.exception.has_payload;
4520         events->exception_payload = vcpu->arch.exception.payload;
4521
4522         events->interrupt.injected =
4523                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
4524         events->interrupt.nr = vcpu->arch.interrupt.nr;
4525         events->interrupt.soft = 0;
4526         events->interrupt.shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
4527
4528         events->nmi.injected = vcpu->arch.nmi_injected;
4529         events->nmi.pending = vcpu->arch.nmi_pending != 0;
4530         events->nmi.masked = static_call(kvm_x86_get_nmi_mask)(vcpu);
4531         events->nmi.pad = 0;
4532
4533         events->sipi_vector = 0; /* never valid when reporting to user space */
4534
4535         events->smi.smm = is_smm(vcpu);
4536         events->smi.pending = vcpu->arch.smi_pending;
4537         events->smi.smm_inside_nmi =
4538                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
4539         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
4540
4541         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
4542                          | KVM_VCPUEVENT_VALID_SHADOW
4543                          | KVM_VCPUEVENT_VALID_SMM);
4544         if (vcpu->kvm->arch.exception_payload_enabled)
4545                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
4546
4547         memset(&events->reserved, 0, sizeof(events->reserved));
4548 }
4549
4550 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm);
4551
4552 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
4553                                               struct kvm_vcpu_events *events)
4554 {
4555         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4556                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4557                               | KVM_VCPUEVENT_VALID_SHADOW
4558                               | KVM_VCPUEVENT_VALID_SMM
4559                               | KVM_VCPUEVENT_VALID_PAYLOAD))
4560                 return -EINVAL;
4561
4562         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
4563                 if (!vcpu->kvm->arch.exception_payload_enabled)
4564                         return -EINVAL;
4565                 if (events->exception.pending)
4566                         events->exception.injected = 0;
4567                 else
4568                         events->exception_has_payload = 0;
4569         } else {
4570                 events->exception.pending = 0;
4571                 events->exception_has_payload = 0;
4572         }
4573
4574         if ((events->exception.injected || events->exception.pending) &&
4575             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
4576                 return -EINVAL;
4577
4578         /* INITs are latched while in SMM */
4579         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
4580             (events->smi.smm || events->smi.pending) &&
4581             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
4582                 return -EINVAL;
4583
4584         process_nmi(vcpu);
4585         vcpu->arch.exception.injected = events->exception.injected;
4586         vcpu->arch.exception.pending = events->exception.pending;
4587         vcpu->arch.exception.nr = events->exception.nr;
4588         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
4589         vcpu->arch.exception.error_code = events->exception.error_code;
4590         vcpu->arch.exception.has_payload = events->exception_has_payload;
4591         vcpu->arch.exception.payload = events->exception_payload;
4592
4593         vcpu->arch.interrupt.injected = events->interrupt.injected;
4594         vcpu->arch.interrupt.nr = events->interrupt.nr;
4595         vcpu->arch.interrupt.soft = events->interrupt.soft;
4596         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
4597                 static_call(kvm_x86_set_interrupt_shadow)(vcpu,
4598                                                 events->interrupt.shadow);
4599
4600         vcpu->arch.nmi_injected = events->nmi.injected;
4601         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
4602                 vcpu->arch.nmi_pending = events->nmi.pending;
4603         static_call(kvm_x86_set_nmi_mask)(vcpu, events->nmi.masked);
4604
4605         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
4606             lapic_in_kernel(vcpu))
4607                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
4608
4609         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
4610                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm)
4611                         kvm_smm_changed(vcpu, events->smi.smm);
4612
4613                 vcpu->arch.smi_pending = events->smi.pending;
4614
4615                 if (events->smi.smm) {
4616                         if (events->smi.smm_inside_nmi)
4617                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
4618                         else
4619                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
4620                 }
4621
4622                 if (lapic_in_kernel(vcpu)) {
4623                         if (events->smi.latched_init)
4624                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4625                         else
4626                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4627                 }
4628         }
4629
4630         kvm_make_request(KVM_REQ_EVENT, vcpu);
4631
4632         return 0;
4633 }
4634
4635 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
4636                                              struct kvm_debugregs *dbgregs)
4637 {
4638         unsigned long val;
4639
4640         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
4641         kvm_get_dr(vcpu, 6, &val);
4642         dbgregs->dr6 = val;
4643         dbgregs->dr7 = vcpu->arch.dr7;
4644         dbgregs->flags = 0;
4645         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
4646 }
4647
4648 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
4649                                             struct kvm_debugregs *dbgregs)
4650 {
4651         if (dbgregs->flags)
4652                 return -EINVAL;
4653
4654         if (!kvm_dr6_valid(dbgregs->dr6))
4655                 return -EINVAL;
4656         if (!kvm_dr7_valid(dbgregs->dr7))
4657                 return -EINVAL;
4658
4659         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
4660         kvm_update_dr0123(vcpu);
4661         vcpu->arch.dr6 = dbgregs->dr6;
4662         vcpu->arch.dr7 = dbgregs->dr7;
4663         kvm_update_dr7(vcpu);
4664
4665         return 0;
4666 }
4667
4668 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
4669
4670 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
4671 {
4672         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4673         u64 xstate_bv = xsave->header.xfeatures;
4674         u64 valid;
4675
4676         /*
4677          * Copy legacy XSAVE area, to avoid complications with CPUID
4678          * leaves 0 and 1 in the loop below.
4679          */
4680         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
4681
4682         /* Set XSTATE_BV */
4683         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
4684         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
4685
4686         /*
4687          * Copy each region from the possibly compacted offset to the
4688          * non-compacted offset.
4689          */
4690         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4691         while (valid) {
4692                 u64 xfeature_mask = valid & -valid;
4693                 int xfeature_nr = fls64(xfeature_mask) - 1;
4694                 void *src = get_xsave_addr(xsave, xfeature_nr);
4695
4696                 if (src) {
4697                         u32 size, offset, ecx, edx;
4698                         cpuid_count(XSTATE_CPUID, xfeature_nr,
4699                                     &size, &offset, &ecx, &edx);
4700                         if (xfeature_nr == XFEATURE_PKRU)
4701                                 memcpy(dest + offset, &vcpu->arch.pkru,
4702                                        sizeof(vcpu->arch.pkru));
4703                         else
4704                                 memcpy(dest + offset, src, size);
4705
4706                 }
4707
4708                 valid -= xfeature_mask;
4709         }
4710 }
4711
4712 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
4713 {
4714         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4715         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
4716         u64 valid;
4717
4718         /*
4719          * Copy legacy XSAVE area, to avoid complications with CPUID
4720          * leaves 0 and 1 in the loop below.
4721          */
4722         memcpy(xsave, src, XSAVE_HDR_OFFSET);
4723
4724         /* Set XSTATE_BV and possibly XCOMP_BV.  */
4725         xsave->header.xfeatures = xstate_bv;
4726         if (boot_cpu_has(X86_FEATURE_XSAVES))
4727                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
4728
4729         /*
4730          * Copy each region from the non-compacted offset to the
4731          * possibly compacted offset.
4732          */
4733         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4734         while (valid) {
4735                 u64 xfeature_mask = valid & -valid;
4736                 int xfeature_nr = fls64(xfeature_mask) - 1;
4737                 void *dest = get_xsave_addr(xsave, xfeature_nr);
4738
4739                 if (dest) {
4740                         u32 size, offset, ecx, edx;
4741                         cpuid_count(XSTATE_CPUID, xfeature_nr,
4742                                     &size, &offset, &ecx, &edx);
4743                         if (xfeature_nr == XFEATURE_PKRU)
4744                                 memcpy(&vcpu->arch.pkru, src + offset,
4745                                        sizeof(vcpu->arch.pkru));
4746                         else
4747                                 memcpy(dest, src + offset, size);
4748                 }
4749
4750                 valid -= xfeature_mask;
4751         }
4752 }
4753
4754 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
4755                                          struct kvm_xsave *guest_xsave)
4756 {
4757         if (!vcpu->arch.guest_fpu)
4758                 return;
4759
4760         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4761                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
4762                 fill_xsave((u8 *) guest_xsave->region, vcpu);
4763         } else {
4764                 memcpy(guest_xsave->region,
4765                         &vcpu->arch.guest_fpu->state.fxsave,
4766                         sizeof(struct fxregs_state));
4767                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
4768                         XFEATURE_MASK_FPSSE;
4769         }
4770 }
4771
4772 #define XSAVE_MXCSR_OFFSET 24
4773
4774 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
4775                                         struct kvm_xsave *guest_xsave)
4776 {
4777         u64 xstate_bv;
4778         u32 mxcsr;
4779
4780         if (!vcpu->arch.guest_fpu)
4781                 return 0;
4782
4783         xstate_bv = *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
4784         mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
4785
4786         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4787                 /*
4788                  * Here we allow setting states that are not present in
4789                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
4790                  * with old userspace.
4791                  */
4792                 if (xstate_bv & ~supported_xcr0 || mxcsr & ~mxcsr_feature_mask)
4793                         return -EINVAL;
4794                 load_xsave(vcpu, (u8 *)guest_xsave->region);
4795         } else {
4796                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
4797                         mxcsr & ~mxcsr_feature_mask)
4798                         return -EINVAL;
4799                 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
4800                         guest_xsave->region, sizeof(struct fxregs_state));
4801         }
4802         return 0;
4803 }
4804
4805 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
4806                                         struct kvm_xcrs *guest_xcrs)
4807 {
4808         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
4809                 guest_xcrs->nr_xcrs = 0;
4810                 return;
4811         }
4812
4813         guest_xcrs->nr_xcrs = 1;
4814         guest_xcrs->flags = 0;
4815         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
4816         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
4817 }
4818
4819 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
4820                                        struct kvm_xcrs *guest_xcrs)
4821 {
4822         int i, r = 0;
4823
4824         if (!boot_cpu_has(X86_FEATURE_XSAVE))
4825                 return -EINVAL;
4826
4827         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
4828                 return -EINVAL;
4829
4830         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
4831                 /* Only support XCR0 currently */
4832                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
4833                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
4834                                 guest_xcrs->xcrs[i].value);
4835                         break;
4836                 }
4837         if (r)
4838                 r = -EINVAL;
4839         return r;
4840 }
4841
4842 /*
4843  * kvm_set_guest_paused() indicates to the guest kernel that it has been
4844  * stopped by the hypervisor.  This function will be called from the host only.
4845  * EINVAL is returned when the host attempts to set the flag for a guest that
4846  * does not support pv clocks.
4847  */
4848 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
4849 {
4850         if (!vcpu->arch.pv_time_enabled)
4851                 return -EINVAL;
4852         vcpu->arch.pvclock_set_guest_stopped_request = true;
4853         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4854         return 0;
4855 }
4856
4857 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
4858                                      struct kvm_enable_cap *cap)
4859 {
4860         int r;
4861         uint16_t vmcs_version;
4862         void __user *user_ptr;
4863
4864         if (cap->flags)
4865                 return -EINVAL;
4866
4867         switch (cap->cap) {
4868         case KVM_CAP_HYPERV_SYNIC2:
4869                 if (cap->args[0])
4870                         return -EINVAL;
4871                 fallthrough;
4872
4873         case KVM_CAP_HYPERV_SYNIC:
4874                 if (!irqchip_in_kernel(vcpu->kvm))
4875                         return -EINVAL;
4876                 return kvm_hv_activate_synic(vcpu, cap->cap ==
4877                                              KVM_CAP_HYPERV_SYNIC2);
4878         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4879                 if (!kvm_x86_ops.nested_ops->enable_evmcs)
4880                         return -ENOTTY;
4881                 r = kvm_x86_ops.nested_ops->enable_evmcs(vcpu, &vmcs_version);
4882                 if (!r) {
4883                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
4884                         if (copy_to_user(user_ptr, &vmcs_version,
4885                                          sizeof(vmcs_version)))
4886                                 r = -EFAULT;
4887                 }
4888                 return r;
4889         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4890                 if (!kvm_x86_ops.enable_direct_tlbflush)
4891                         return -ENOTTY;
4892
4893                 return static_call(kvm_x86_enable_direct_tlbflush)(vcpu);
4894
4895         case KVM_CAP_HYPERV_ENFORCE_CPUID:
4896                 return kvm_hv_set_enforce_cpuid(vcpu, cap->args[0]);
4897
4898         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4899                 vcpu->arch.pv_cpuid.enforce = cap->args[0];
4900                 if (vcpu->arch.pv_cpuid.enforce)
4901                         kvm_update_pv_runtime(vcpu);
4902
4903                 return 0;
4904         default:
4905                 return -EINVAL;
4906         }
4907 }
4908
4909 long kvm_arch_vcpu_ioctl(struct file *filp,
4910                          unsigned int ioctl, unsigned long arg)
4911 {
4912         struct kvm_vcpu *vcpu = filp->private_data;
4913         void __user *argp = (void __user *)arg;
4914         int r;
4915         union {
4916                 struct kvm_sregs2 *sregs2;
4917                 struct kvm_lapic_state *lapic;
4918                 struct kvm_xsave *xsave;
4919                 struct kvm_xcrs *xcrs;
4920                 void *buffer;
4921         } u;
4922
4923         vcpu_load(vcpu);
4924
4925         u.buffer = NULL;
4926         switch (ioctl) {
4927         case KVM_GET_LAPIC: {
4928                 r = -EINVAL;
4929                 if (!lapic_in_kernel(vcpu))
4930                         goto out;
4931                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
4932                                 GFP_KERNEL_ACCOUNT);
4933
4934                 r = -ENOMEM;
4935                 if (!u.lapic)
4936                         goto out;
4937                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
4938                 if (r)
4939                         goto out;
4940                 r = -EFAULT;
4941                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
4942                         goto out;
4943                 r = 0;
4944                 break;
4945         }
4946         case KVM_SET_LAPIC: {
4947                 r = -EINVAL;
4948                 if (!lapic_in_kernel(vcpu))
4949                         goto out;
4950                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
4951                 if (IS_ERR(u.lapic)) {
4952                         r = PTR_ERR(u.lapic);
4953                         goto out_nofree;
4954                 }
4955
4956                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
4957                 break;
4958         }
4959         case KVM_INTERRUPT: {
4960                 struct kvm_interrupt irq;
4961
4962                 r = -EFAULT;
4963                 if (copy_from_user(&irq, argp, sizeof(irq)))
4964                         goto out;
4965                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
4966                 break;
4967         }
4968         case KVM_NMI: {
4969                 r = kvm_vcpu_ioctl_nmi(vcpu);
4970                 break;
4971         }
4972         case KVM_SMI: {
4973                 r = kvm_vcpu_ioctl_smi(vcpu);
4974                 break;
4975         }
4976         case KVM_SET_CPUID: {
4977                 struct kvm_cpuid __user *cpuid_arg = argp;
4978                 struct kvm_cpuid cpuid;
4979
4980                 r = -EFAULT;
4981                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4982                         goto out;
4983                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4984                 break;
4985         }
4986         case KVM_SET_CPUID2: {
4987                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4988                 struct kvm_cpuid2 cpuid;
4989
4990                 r = -EFAULT;
4991                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4992                         goto out;
4993                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
4994                                               cpuid_arg->entries);
4995                 break;
4996         }
4997         case KVM_GET_CPUID2: {
4998                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4999                 struct kvm_cpuid2 cpuid;
5000
5001                 r = -EFAULT;
5002                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5003                         goto out;
5004                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
5005                                               cpuid_arg->entries);
5006                 if (r)
5007                         goto out;
5008                 r = -EFAULT;
5009                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
5010                         goto out;
5011                 r = 0;
5012                 break;
5013         }
5014         case KVM_GET_MSRS: {
5015                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5016                 r = msr_io(vcpu, argp, do_get_msr, 1);
5017                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5018                 break;
5019         }
5020         case KVM_SET_MSRS: {
5021                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5022                 r = msr_io(vcpu, argp, do_set_msr, 0);
5023                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5024                 break;
5025         }
5026         case KVM_TPR_ACCESS_REPORTING: {
5027                 struct kvm_tpr_access_ctl tac;
5028
5029                 r = -EFAULT;
5030                 if (copy_from_user(&tac, argp, sizeof(tac)))
5031                         goto out;
5032                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
5033                 if (r)
5034                         goto out;
5035                 r = -EFAULT;
5036                 if (copy_to_user(argp, &tac, sizeof(tac)))
5037                         goto out;
5038                 r = 0;
5039                 break;
5040         };
5041         case KVM_SET_VAPIC_ADDR: {
5042                 struct kvm_vapic_addr va;
5043                 int idx;
5044
5045                 r = -EINVAL;
5046                 if (!lapic_in_kernel(vcpu))
5047                         goto out;
5048                 r = -EFAULT;
5049                 if (copy_from_user(&va, argp, sizeof(va)))
5050                         goto out;
5051                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5052                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
5053                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5054                 break;
5055         }
5056         case KVM_X86_SETUP_MCE: {
5057                 u64 mcg_cap;
5058
5059                 r = -EFAULT;
5060                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
5061                         goto out;
5062                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
5063                 break;
5064         }
5065         case KVM_X86_SET_MCE: {
5066                 struct kvm_x86_mce mce;
5067
5068                 r = -EFAULT;
5069                 if (copy_from_user(&mce, argp, sizeof(mce)))
5070                         goto out;
5071                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
5072                 break;
5073         }
5074         case KVM_GET_VCPU_EVENTS: {
5075                 struct kvm_vcpu_events events;
5076
5077                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
5078
5079                 r = -EFAULT;
5080                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
5081                         break;
5082                 r = 0;
5083                 break;
5084         }
5085         case KVM_SET_VCPU_EVENTS: {
5086                 struct kvm_vcpu_events events;
5087
5088                 r = -EFAULT;
5089                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
5090                         break;
5091
5092                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
5093                 break;
5094         }
5095         case KVM_GET_DEBUGREGS: {
5096                 struct kvm_debugregs dbgregs;
5097
5098                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
5099
5100                 r = -EFAULT;
5101                 if (copy_to_user(argp, &dbgregs,
5102                                  sizeof(struct kvm_debugregs)))
5103                         break;
5104                 r = 0;
5105                 break;
5106         }
5107         case KVM_SET_DEBUGREGS: {
5108                 struct kvm_debugregs dbgregs;
5109
5110                 r = -EFAULT;
5111                 if (copy_from_user(&dbgregs, argp,
5112                                    sizeof(struct kvm_debugregs)))
5113                         break;
5114
5115                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
5116                 break;
5117         }
5118         case KVM_GET_XSAVE: {
5119                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
5120                 r = -ENOMEM;
5121                 if (!u.xsave)
5122                         break;
5123
5124                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
5125
5126                 r = -EFAULT;
5127                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
5128                         break;
5129                 r = 0;
5130                 break;
5131         }
5132         case KVM_SET_XSAVE: {
5133                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
5134                 if (IS_ERR(u.xsave)) {
5135                         r = PTR_ERR(u.xsave);
5136                         goto out_nofree;
5137                 }
5138
5139                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
5140                 break;
5141         }
5142         case KVM_GET_XCRS: {
5143                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
5144                 r = -ENOMEM;
5145                 if (!u.xcrs)
5146                         break;
5147
5148                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
5149
5150                 r = -EFAULT;
5151                 if (copy_to_user(argp, u.xcrs,
5152                                  sizeof(struct kvm_xcrs)))
5153                         break;
5154                 r = 0;
5155                 break;
5156         }
5157         case KVM_SET_XCRS: {
5158                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
5159                 if (IS_ERR(u.xcrs)) {
5160                         r = PTR_ERR(u.xcrs);
5161                         goto out_nofree;
5162                 }
5163
5164                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
5165                 break;
5166         }
5167         case KVM_SET_TSC_KHZ: {
5168                 u32 user_tsc_khz;
5169
5170                 r = -EINVAL;
5171                 user_tsc_khz = (u32)arg;
5172
5173                 if (kvm_has_tsc_control &&
5174                     user_tsc_khz >= kvm_max_guest_tsc_khz)
5175                         goto out;
5176
5177                 if (user_tsc_khz == 0)
5178                         user_tsc_khz = tsc_khz;
5179
5180                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
5181                         r = 0;
5182
5183                 goto out;
5184         }
5185         case KVM_GET_TSC_KHZ: {
5186                 r = vcpu->arch.virtual_tsc_khz;
5187                 goto out;
5188         }
5189         case KVM_KVMCLOCK_CTRL: {
5190                 r = kvm_set_guest_paused(vcpu);
5191                 goto out;
5192         }
5193         case KVM_ENABLE_CAP: {
5194                 struct kvm_enable_cap cap;
5195
5196                 r = -EFAULT;
5197                 if (copy_from_user(&cap, argp, sizeof(cap)))
5198                         goto out;
5199                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
5200                 break;
5201         }
5202         case KVM_GET_NESTED_STATE: {
5203                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5204                 u32 user_data_size;
5205
5206                 r = -EINVAL;
5207                 if (!kvm_x86_ops.nested_ops->get_state)
5208                         break;
5209
5210                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
5211                 r = -EFAULT;
5212                 if (get_user(user_data_size, &user_kvm_nested_state->size))
5213                         break;
5214
5215                 r = kvm_x86_ops.nested_ops->get_state(vcpu, user_kvm_nested_state,
5216                                                      user_data_size);
5217                 if (r < 0)
5218                         break;
5219
5220                 if (r > user_data_size) {
5221                         if (put_user(r, &user_kvm_nested_state->size))
5222                                 r = -EFAULT;
5223                         else
5224                                 r = -E2BIG;
5225                         break;
5226                 }
5227
5228                 r = 0;
5229                 break;
5230         }
5231         case KVM_SET_NESTED_STATE: {
5232                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5233                 struct kvm_nested_state kvm_state;
5234                 int idx;
5235
5236                 r = -EINVAL;
5237                 if (!kvm_x86_ops.nested_ops->set_state)
5238                         break;
5239
5240                 r = -EFAULT;
5241                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
5242                         break;
5243
5244                 r = -EINVAL;
5245                 if (kvm_state.size < sizeof(kvm_state))
5246                         break;
5247
5248                 if (kvm_state.flags &
5249                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
5250                       | KVM_STATE_NESTED_EVMCS | KVM_STATE_NESTED_MTF_PENDING
5251                       | KVM_STATE_NESTED_GIF_SET))
5252                         break;
5253
5254                 /* nested_run_pending implies guest_mode.  */
5255                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
5256                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
5257                         break;
5258
5259                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5260                 r = kvm_x86_ops.nested_ops->set_state(vcpu, user_kvm_nested_state, &kvm_state);
5261                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5262                 break;
5263         }
5264         case KVM_GET_SUPPORTED_HV_CPUID:
5265                 r = kvm_ioctl_get_supported_hv_cpuid(vcpu, argp);
5266                 break;
5267 #ifdef CONFIG_KVM_XEN
5268         case KVM_XEN_VCPU_GET_ATTR: {
5269                 struct kvm_xen_vcpu_attr xva;
5270
5271                 r = -EFAULT;
5272                 if (copy_from_user(&xva, argp, sizeof(xva)))
5273                         goto out;
5274                 r = kvm_xen_vcpu_get_attr(vcpu, &xva);
5275                 if (!r && copy_to_user(argp, &xva, sizeof(xva)))
5276                         r = -EFAULT;
5277                 break;
5278         }
5279         case KVM_XEN_VCPU_SET_ATTR: {
5280                 struct kvm_xen_vcpu_attr xva;
5281
5282                 r = -EFAULT;
5283                 if (copy_from_user(&xva, argp, sizeof(xva)))
5284                         goto out;
5285                 r = kvm_xen_vcpu_set_attr(vcpu, &xva);
5286                 break;
5287         }
5288 #endif
5289         case KVM_GET_SREGS2: {
5290                 u.sregs2 = kzalloc(sizeof(struct kvm_sregs2), GFP_KERNEL);
5291                 r = -ENOMEM;
5292                 if (!u.sregs2)
5293                         goto out;
5294                 __get_sregs2(vcpu, u.sregs2);
5295                 r = -EFAULT;
5296                 if (copy_to_user(argp, u.sregs2, sizeof(struct kvm_sregs2)))
5297                         goto out;
5298                 r = 0;
5299                 break;
5300         }
5301         case KVM_SET_SREGS2: {
5302                 u.sregs2 = memdup_user(argp, sizeof(struct kvm_sregs2));
5303                 if (IS_ERR(u.sregs2)) {
5304                         r = PTR_ERR(u.sregs2);
5305                         u.sregs2 = NULL;
5306                         goto out;
5307                 }
5308                 r = __set_sregs2(vcpu, u.sregs2);
5309                 break;
5310         }
5311         default:
5312                 r = -EINVAL;
5313         }
5314 out:
5315         kfree(u.buffer);
5316 out_nofree:
5317         vcpu_put(vcpu);
5318         return r;
5319 }
5320
5321 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
5322 {
5323         return VM_FAULT_SIGBUS;
5324 }
5325
5326 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
5327 {
5328         int ret;
5329
5330         if (addr > (unsigned int)(-3 * PAGE_SIZE))
5331                 return -EINVAL;
5332         ret = static_call(kvm_x86_set_tss_addr)(kvm, addr);
5333         return ret;
5334 }
5335
5336 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
5337                                               u64 ident_addr)
5338 {
5339         return static_call(kvm_x86_set_identity_map_addr)(kvm, ident_addr);
5340 }
5341
5342 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
5343                                          unsigned long kvm_nr_mmu_pages)
5344 {
5345         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
5346                 return -EINVAL;
5347
5348         mutex_lock(&kvm->slots_lock);
5349
5350         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
5351         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
5352
5353         mutex_unlock(&kvm->slots_lock);
5354         return 0;
5355 }
5356
5357 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
5358 {
5359         return kvm->arch.n_max_mmu_pages;
5360 }
5361
5362 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5363 {
5364         struct kvm_pic *pic = kvm->arch.vpic;
5365         int r;
5366
5367         r = 0;
5368         switch (chip->chip_id) {
5369         case KVM_IRQCHIP_PIC_MASTER:
5370                 memcpy(&chip->chip.pic, &pic->pics[0],
5371                         sizeof(struct kvm_pic_state));
5372                 break;
5373         case KVM_IRQCHIP_PIC_SLAVE:
5374                 memcpy(&chip->chip.pic, &pic->pics[1],
5375                         sizeof(struct kvm_pic_state));
5376                 break;
5377         case KVM_IRQCHIP_IOAPIC:
5378                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
5379                 break;
5380         default:
5381                 r = -EINVAL;
5382                 break;
5383         }
5384         return r;
5385 }
5386
5387 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5388 {
5389         struct kvm_pic *pic = kvm->arch.vpic;
5390         int r;
5391
5392         r = 0;
5393         switch (chip->chip_id) {
5394         case KVM_IRQCHIP_PIC_MASTER:
5395                 spin_lock(&pic->lock);
5396                 memcpy(&pic->pics[0], &chip->chip.pic,
5397                         sizeof(struct kvm_pic_state));
5398                 spin_unlock(&pic->lock);
5399                 break;
5400         case KVM_IRQCHIP_PIC_SLAVE:
5401                 spin_lock(&pic->lock);
5402                 memcpy(&pic->pics[1], &chip->chip.pic,
5403                         sizeof(struct kvm_pic_state));
5404                 spin_unlock(&pic->lock);
5405                 break;
5406         case KVM_IRQCHIP_IOAPIC:
5407                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
5408                 break;
5409         default:
5410                 r = -EINVAL;
5411                 break;
5412         }
5413         kvm_pic_update_irq(pic);
5414         return r;
5415 }
5416
5417 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5418 {
5419         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
5420
5421         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
5422
5423         mutex_lock(&kps->lock);
5424         memcpy(ps, &kps->channels, sizeof(*ps));
5425         mutex_unlock(&kps->lock);
5426         return 0;
5427 }
5428
5429 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5430 {
5431         int i;
5432         struct kvm_pit *pit = kvm->arch.vpit;
5433
5434         mutex_lock(&pit->pit_state.lock);
5435         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
5436         for (i = 0; i < 3; i++)
5437                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
5438         mutex_unlock(&pit->pit_state.lock);
5439         return 0;
5440 }
5441
5442 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5443 {
5444         mutex_lock(&kvm->arch.vpit->pit_state.lock);
5445         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
5446                 sizeof(ps->channels));
5447         ps->flags = kvm->arch.vpit->pit_state.flags;
5448         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
5449         memset(&ps->reserved, 0, sizeof(ps->reserved));
5450         return 0;
5451 }
5452
5453 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5454 {
5455         int start = 0;
5456         int i;
5457         u32 prev_legacy, cur_legacy;
5458         struct kvm_pit *pit = kvm->arch.vpit;
5459
5460         mutex_lock(&pit->pit_state.lock);
5461         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
5462         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
5463         if (!prev_legacy && cur_legacy)
5464                 start = 1;
5465         memcpy(&pit->pit_state.channels, &ps->channels,
5466                sizeof(pit->pit_state.channels));
5467         pit->pit_state.flags = ps->flags;
5468         for (i = 0; i < 3; i++)
5469                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
5470                                    start && i == 0);
5471         mutex_unlock(&pit->pit_state.lock);
5472         return 0;
5473 }
5474
5475 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
5476                                  struct kvm_reinject_control *control)
5477 {
5478         struct kvm_pit *pit = kvm->arch.vpit;
5479
5480         /* pit->pit_state.lock was overloaded to prevent userspace from getting
5481          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5482          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
5483          */
5484         mutex_lock(&pit->pit_state.lock);
5485         kvm_pit_set_reinject(pit, control->pit_reinject);
5486         mutex_unlock(&pit->pit_state.lock);
5487
5488         return 0;
5489 }
5490
5491 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
5492 {
5493
5494         /*
5495          * Flush all CPUs' dirty log buffers to the  dirty_bitmap.  Called
5496          * before reporting dirty_bitmap to userspace.  KVM flushes the buffers
5497          * on all VM-Exits, thus we only need to kick running vCPUs to force a
5498          * VM-Exit.
5499          */
5500         struct kvm_vcpu *vcpu;
5501         int i;
5502
5503         kvm_for_each_vcpu(i, vcpu, kvm)
5504                 kvm_vcpu_kick(vcpu);
5505 }
5506
5507 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
5508                         bool line_status)
5509 {
5510         if (!irqchip_in_kernel(kvm))
5511                 return -ENXIO;
5512
5513         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
5514                                         irq_event->irq, irq_event->level,
5515                                         line_status);
5516         return 0;
5517 }
5518
5519 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
5520                             struct kvm_enable_cap *cap)
5521 {
5522         int r;
5523
5524         if (cap->flags)
5525                 return -EINVAL;
5526
5527         switch (cap->cap) {
5528         case KVM_CAP_DISABLE_QUIRKS:
5529                 kvm->arch.disabled_quirks = cap->args[0];
5530                 r = 0;
5531                 break;
5532         case KVM_CAP_SPLIT_IRQCHIP: {
5533                 mutex_lock(&kvm->lock);
5534                 r = -EINVAL;
5535                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
5536                         goto split_irqchip_unlock;
5537                 r = -EEXIST;
5538                 if (irqchip_in_kernel(kvm))
5539                         goto split_irqchip_unlock;
5540                 if (kvm->created_vcpus)
5541                         goto split_irqchip_unlock;
5542                 r = kvm_setup_empty_irq_routing(kvm);
5543                 if (r)
5544                         goto split_irqchip_unlock;
5545                 /* Pairs with irqchip_in_kernel. */
5546                 smp_wmb();
5547                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
5548                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
5549                 r = 0;
5550 split_irqchip_unlock:
5551                 mutex_unlock(&kvm->lock);
5552                 break;
5553         }
5554         case KVM_CAP_X2APIC_API:
5555                 r = -EINVAL;
5556                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
5557                         break;
5558
5559                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
5560                         kvm->arch.x2apic_format = true;
5561                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
5562                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
5563
5564                 r = 0;
5565                 break;
5566         case KVM_CAP_X86_DISABLE_EXITS:
5567                 r = -EINVAL;
5568                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
5569                         break;
5570
5571                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
5572                         kvm_can_mwait_in_guest())
5573                         kvm->arch.mwait_in_guest = true;
5574                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
5575                         kvm->arch.hlt_in_guest = true;
5576                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
5577                         kvm->arch.pause_in_guest = true;
5578                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
5579                         kvm->arch.cstate_in_guest = true;
5580                 r = 0;
5581                 break;
5582         case KVM_CAP_MSR_PLATFORM_INFO:
5583                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
5584                 r = 0;
5585                 break;
5586         case KVM_CAP_EXCEPTION_PAYLOAD:
5587                 kvm->arch.exception_payload_enabled = cap->args[0];
5588                 r = 0;
5589                 break;
5590         case KVM_CAP_X86_USER_SPACE_MSR:
5591                 kvm->arch.user_space_msr_mask = cap->args[0];
5592                 r = 0;
5593                 break;
5594         case KVM_CAP_X86_BUS_LOCK_EXIT:
5595                 r = -EINVAL;
5596                 if (cap->args[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE)
5597                         break;
5598
5599                 if ((cap->args[0] & KVM_BUS_LOCK_DETECTION_OFF) &&
5600                     (cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT))
5601                         break;
5602
5603                 if (kvm_has_bus_lock_exit &&
5604                     cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT)
5605                         kvm->arch.bus_lock_detection_enabled = true;
5606                 r = 0;
5607                 break;
5608 #ifdef CONFIG_X86_SGX_KVM
5609         case KVM_CAP_SGX_ATTRIBUTE: {
5610                 unsigned long allowed_attributes = 0;
5611
5612                 r = sgx_set_attribute(&allowed_attributes, cap->args[0]);
5613                 if (r)
5614                         break;
5615
5616                 /* KVM only supports the PROVISIONKEY privileged attribute. */
5617                 if ((allowed_attributes & SGX_ATTR_PROVISIONKEY) &&
5618                     !(allowed_attributes & ~SGX_ATTR_PROVISIONKEY))
5619                         kvm->arch.sgx_provisioning_allowed = true;
5620                 else
5621                         r = -EINVAL;
5622                 break;
5623         }
5624 #endif
5625         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
5626                 r = -EINVAL;
5627                 if (kvm_x86_ops.vm_copy_enc_context_from)
5628                         r = kvm_x86_ops.vm_copy_enc_context_from(kvm, cap->args[0]);
5629                 return r;
5630         case KVM_CAP_EXIT_HYPERCALL:
5631                 if (cap->args[0] & ~KVM_EXIT_HYPERCALL_VALID_MASK) {
5632                         r = -EINVAL;
5633                         break;
5634                 }
5635                 kvm->arch.hypercall_exit_enabled = cap->args[0];
5636                 r = 0;
5637                 break;
5638         default:
5639                 r = -EINVAL;
5640                 break;
5641         }
5642         return r;
5643 }
5644
5645 static struct kvm_x86_msr_filter *kvm_alloc_msr_filter(bool default_allow)
5646 {
5647         struct kvm_x86_msr_filter *msr_filter;
5648
5649         msr_filter = kzalloc(sizeof(*msr_filter), GFP_KERNEL_ACCOUNT);
5650         if (!msr_filter)
5651                 return NULL;
5652
5653         msr_filter->default_allow = default_allow;
5654         return msr_filter;
5655 }
5656
5657 static void kvm_free_msr_filter(struct kvm_x86_msr_filter *msr_filter)
5658 {
5659         u32 i;
5660
5661         if (!msr_filter)
5662                 return;
5663
5664         for (i = 0; i < msr_filter->count; i++)
5665                 kfree(msr_filter->ranges[i].bitmap);
5666
5667         kfree(msr_filter);
5668 }
5669
5670 static int kvm_add_msr_filter(struct kvm_x86_msr_filter *msr_filter,
5671                               struct kvm_msr_filter_range *user_range)
5672 {
5673         unsigned long *bitmap = NULL;
5674         size_t bitmap_size;
5675
5676         if (!user_range->nmsrs)
5677                 return 0;
5678
5679         if (user_range->flags & ~(KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE))
5680                 return -EINVAL;
5681
5682         if (!user_range->flags)
5683                 return -EINVAL;
5684
5685         bitmap_size = BITS_TO_LONGS(user_range->nmsrs) * sizeof(long);
5686         if (!bitmap_size || bitmap_size > KVM_MSR_FILTER_MAX_BITMAP_SIZE)
5687                 return -EINVAL;
5688
5689         bitmap = memdup_user((__user u8*)user_range->bitmap, bitmap_size);
5690         if (IS_ERR(bitmap))
5691                 return PTR_ERR(bitmap);
5692
5693         msr_filter->ranges[msr_filter->count] = (struct msr_bitmap_range) {
5694                 .flags = user_range->flags,
5695                 .base = user_range->base,
5696                 .nmsrs = user_range->nmsrs,
5697                 .bitmap = bitmap,
5698         };
5699
5700         msr_filter->count++;
5701         return 0;
5702 }
5703
5704 static int kvm_vm_ioctl_set_msr_filter(struct kvm *kvm, void __user *argp)
5705 {
5706         struct kvm_msr_filter __user *user_msr_filter = argp;
5707         struct kvm_x86_msr_filter *new_filter, *old_filter;
5708         struct kvm_msr_filter filter;
5709         bool default_allow;
5710         bool empty = true;
5711         int r = 0;
5712         u32 i;
5713
5714         if (copy_from_user(&filter, user_msr_filter, sizeof(filter)))
5715                 return -EFAULT;
5716
5717         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++)
5718                 empty &= !filter.ranges[i].nmsrs;
5719
5720         default_allow = !(filter.flags & KVM_MSR_FILTER_DEFAULT_DENY);
5721         if (empty && !default_allow)
5722                 return -EINVAL;
5723
5724         new_filter = kvm_alloc_msr_filter(default_allow);
5725         if (!new_filter)
5726                 return -ENOMEM;
5727
5728         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++) {
5729                 r = kvm_add_msr_filter(new_filter, &filter.ranges[i]);
5730                 if (r) {
5731                         kvm_free_msr_filter(new_filter);
5732                         return r;
5733                 }
5734         }
5735
5736         mutex_lock(&kvm->lock);
5737
5738         /* The per-VM filter is protected by kvm->lock... */
5739         old_filter = srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1);
5740
5741         rcu_assign_pointer(kvm->arch.msr_filter, new_filter);
5742         synchronize_srcu(&kvm->srcu);
5743
5744         kvm_free_msr_filter(old_filter);
5745
5746         kvm_make_all_cpus_request(kvm, KVM_REQ_MSR_FILTER_CHANGED);
5747         mutex_unlock(&kvm->lock);
5748
5749         return 0;
5750 }
5751
5752 #ifdef CONFIG_HAVE_KVM_PM_NOTIFIER
5753 static int kvm_arch_suspend_notifier(struct kvm *kvm)
5754 {
5755         struct kvm_vcpu *vcpu;
5756         int i, ret = 0;
5757
5758         mutex_lock(&kvm->lock);
5759         kvm_for_each_vcpu(i, vcpu, kvm) {
5760                 if (!vcpu->arch.pv_time_enabled)
5761                         continue;
5762
5763                 ret = kvm_set_guest_paused(vcpu);
5764                 if (ret) {
5765                         kvm_err("Failed to pause guest VCPU%d: %d\n",
5766                                 vcpu->vcpu_id, ret);
5767                         break;
5768                 }
5769         }
5770         mutex_unlock(&kvm->lock);
5771
5772         return ret ? NOTIFY_BAD : NOTIFY_DONE;
5773 }
5774
5775 int kvm_arch_pm_notifier(struct kvm *kvm, unsigned long state)
5776 {
5777         switch (state) {
5778         case PM_HIBERNATION_PREPARE:
5779         case PM_SUSPEND_PREPARE:
5780                 return kvm_arch_suspend_notifier(kvm);
5781         }
5782
5783         return NOTIFY_DONE;
5784 }
5785 #endif /* CONFIG_HAVE_KVM_PM_NOTIFIER */
5786
5787 long kvm_arch_vm_ioctl(struct file *filp,
5788                        unsigned int ioctl, unsigned long arg)
5789 {
5790         struct kvm *kvm = filp->private_data;
5791         void __user *argp = (void __user *)arg;
5792         int r = -ENOTTY;
5793         /*
5794          * This union makes it completely explicit to gcc-3.x
5795          * that these two variables' stack usage should be
5796          * combined, not added together.
5797          */
5798         union {
5799                 struct kvm_pit_state ps;
5800                 struct kvm_pit_state2 ps2;
5801                 struct kvm_pit_config pit_config;
5802         } u;
5803
5804         switch (ioctl) {
5805         case KVM_SET_TSS_ADDR:
5806                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
5807                 break;
5808         case KVM_SET_IDENTITY_MAP_ADDR: {
5809                 u64 ident_addr;
5810
5811                 mutex_lock(&kvm->lock);
5812                 r = -EINVAL;
5813                 if (kvm->created_vcpus)
5814                         goto set_identity_unlock;
5815                 r = -EFAULT;
5816                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
5817                         goto set_identity_unlock;
5818                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
5819 set_identity_unlock:
5820                 mutex_unlock(&kvm->lock);
5821                 break;
5822         }
5823         case KVM_SET_NR_MMU_PAGES:
5824                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
5825                 break;
5826         case KVM_GET_NR_MMU_PAGES:
5827                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
5828                 break;
5829         case KVM_CREATE_IRQCHIP: {
5830                 mutex_lock(&kvm->lock);
5831
5832                 r = -EEXIST;
5833                 if (irqchip_in_kernel(kvm))
5834                         goto create_irqchip_unlock;
5835
5836                 r = -EINVAL;
5837                 if (kvm->created_vcpus)
5838                         goto create_irqchip_unlock;
5839
5840                 r = kvm_pic_init(kvm);
5841                 if (r)
5842                         goto create_irqchip_unlock;
5843
5844                 r = kvm_ioapic_init(kvm);
5845                 if (r) {
5846                         kvm_pic_destroy(kvm);
5847                         goto create_irqchip_unlock;
5848                 }
5849
5850                 r = kvm_setup_default_irq_routing(kvm);
5851                 if (r) {
5852                         kvm_ioapic_destroy(kvm);
5853                         kvm_pic_destroy(kvm);
5854                         goto create_irqchip_unlock;
5855                 }
5856                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
5857                 smp_wmb();
5858                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
5859         create_irqchip_unlock:
5860                 mutex_unlock(&kvm->lock);
5861                 break;
5862         }
5863         case KVM_CREATE_PIT:
5864                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
5865                 goto create_pit;
5866         case KVM_CREATE_PIT2:
5867                 r = -EFAULT;
5868                 if (copy_from_user(&u.pit_config, argp,
5869                                    sizeof(struct kvm_pit_config)))
5870                         goto out;
5871         create_pit:
5872                 mutex_lock(&kvm->lock);
5873                 r = -EEXIST;
5874                 if (kvm->arch.vpit)
5875                         goto create_pit_unlock;
5876                 r = -ENOMEM;
5877                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
5878                 if (kvm->arch.vpit)
5879                         r = 0;
5880         create_pit_unlock:
5881                 mutex_unlock(&kvm->lock);
5882                 break;
5883         case KVM_GET_IRQCHIP: {
5884                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5885                 struct kvm_irqchip *chip;
5886
5887                 chip = memdup_user(argp, sizeof(*chip));
5888                 if (IS_ERR(chip)) {
5889                         r = PTR_ERR(chip);
5890                         goto out;
5891                 }
5892
5893                 r = -ENXIO;
5894                 if (!irqchip_kernel(kvm))
5895                         goto get_irqchip_out;
5896                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
5897                 if (r)
5898                         goto get_irqchip_out;
5899                 r = -EFAULT;
5900                 if (copy_to_user(argp, chip, sizeof(*chip)))
5901                         goto get_irqchip_out;
5902                 r = 0;
5903         get_irqchip_out:
5904                 kfree(chip);
5905                 break;
5906         }
5907         case KVM_SET_IRQCHIP: {
5908                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5909                 struct kvm_irqchip *chip;
5910
5911                 chip = memdup_user(argp, sizeof(*chip));
5912                 if (IS_ERR(chip)) {
5913                         r = PTR_ERR(chip);
5914                         goto out;
5915                 }
5916
5917                 r = -ENXIO;
5918                 if (!irqchip_kernel(kvm))
5919                         goto set_irqchip_out;
5920                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
5921         set_irqchip_out:
5922                 kfree(chip);
5923                 break;
5924         }
5925         case KVM_GET_PIT: {
5926                 r = -EFAULT;
5927                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
5928                         goto out;
5929                 r = -ENXIO;
5930                 if (!kvm->arch.vpit)
5931                         goto out;
5932                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
5933                 if (r)
5934                         goto out;
5935                 r = -EFAULT;
5936                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
5937                         goto out;
5938                 r = 0;
5939                 break;
5940         }
5941         case KVM_SET_PIT: {
5942                 r = -EFAULT;
5943                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
5944                         goto out;
5945                 mutex_lock(&kvm->lock);
5946                 r = -ENXIO;
5947                 if (!kvm->arch.vpit)
5948                         goto set_pit_out;
5949                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
5950 set_pit_out:
5951                 mutex_unlock(&kvm->lock);
5952                 break;
5953         }
5954         case KVM_GET_PIT2: {
5955                 r = -ENXIO;
5956                 if (!kvm->arch.vpit)
5957                         goto out;
5958                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
5959                 if (r)
5960                         goto out;
5961                 r = -EFAULT;
5962                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
5963                         goto out;
5964                 r = 0;
5965                 break;
5966         }
5967         case KVM_SET_PIT2: {
5968                 r = -EFAULT;
5969                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
5970                         goto out;
5971                 mutex_lock(&kvm->lock);
5972                 r = -ENXIO;
5973                 if (!kvm->arch.vpit)
5974                         goto set_pit2_out;
5975                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
5976 set_pit2_out:
5977                 mutex_unlock(&kvm->lock);
5978                 break;
5979         }
5980         case KVM_REINJECT_CONTROL: {
5981                 struct kvm_reinject_control control;
5982                 r =  -EFAULT;
5983                 if (copy_from_user(&control, argp, sizeof(control)))
5984                         goto out;
5985                 r = -ENXIO;
5986                 if (!kvm->arch.vpit)
5987                         goto out;
5988                 r = kvm_vm_ioctl_reinject(kvm, &control);
5989                 break;
5990         }
5991         case KVM_SET_BOOT_CPU_ID:
5992                 r = 0;
5993                 mutex_lock(&kvm->lock);
5994                 if (kvm->created_vcpus)
5995                         r = -EBUSY;
5996                 else
5997                         kvm->arch.bsp_vcpu_id = arg;
5998                 mutex_unlock(&kvm->lock);
5999                 break;
6000 #ifdef CONFIG_KVM_XEN
6001         case KVM_XEN_HVM_CONFIG: {
6002                 struct kvm_xen_hvm_config xhc;
6003                 r = -EFAULT;
6004                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
6005                         goto out;
6006                 r = kvm_xen_hvm_config(kvm, &xhc);
6007                 break;
6008         }
6009         case KVM_XEN_HVM_GET_ATTR: {
6010                 struct kvm_xen_hvm_attr xha;
6011
6012                 r = -EFAULT;
6013                 if (copy_from_user(&xha, argp, sizeof(xha)))
6014                         goto out;
6015                 r = kvm_xen_hvm_get_attr(kvm, &xha);
6016                 if (!r && copy_to_user(argp, &xha, sizeof(xha)))
6017                         r = -EFAULT;
6018                 break;
6019         }
6020         case KVM_XEN_HVM_SET_ATTR: {
6021                 struct kvm_xen_hvm_attr xha;
6022
6023                 r = -EFAULT;
6024                 if (copy_from_user(&xha, argp, sizeof(xha)))
6025                         goto out;
6026                 r = kvm_xen_hvm_set_attr(kvm, &xha);
6027                 break;
6028         }
6029 #endif
6030         case KVM_SET_CLOCK: {
6031                 struct kvm_arch *ka = &kvm->arch;
6032                 struct kvm_clock_data user_ns;
6033                 u64 now_ns;
6034
6035                 r = -EFAULT;
6036                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
6037                         goto out;
6038
6039                 r = -EINVAL;
6040                 if (user_ns.flags)
6041                         goto out;
6042
6043                 r = 0;
6044                 /*
6045                  * TODO: userspace has to take care of races with VCPU_RUN, so
6046                  * kvm_gen_update_masterclock() can be cut down to locked
6047                  * pvclock_update_vm_gtod_copy().
6048                  */
6049                 kvm_gen_update_masterclock(kvm);
6050
6051                 /*
6052                  * This pairs with kvm_guest_time_update(): when masterclock is
6053                  * in use, we use master_kernel_ns + kvmclock_offset to set
6054                  * unsigned 'system_time' so if we use get_kvmclock_ns() (which
6055                  * is slightly ahead) here we risk going negative on unsigned
6056                  * 'system_time' when 'user_ns.clock' is very small.
6057                  */
6058                 spin_lock_irq(&ka->pvclock_gtod_sync_lock);
6059                 if (kvm->arch.use_master_clock)
6060                         now_ns = ka->master_kernel_ns;
6061                 else
6062                         now_ns = get_kvmclock_base_ns();
6063                 ka->kvmclock_offset = user_ns.clock - now_ns;
6064                 spin_unlock_irq(&ka->pvclock_gtod_sync_lock);
6065
6066                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
6067                 break;
6068         }
6069         case KVM_GET_CLOCK: {
6070                 struct kvm_clock_data user_ns;
6071                 u64 now_ns;
6072
6073                 now_ns = get_kvmclock_ns(kvm);
6074                 user_ns.clock = now_ns;
6075                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
6076                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
6077
6078                 r = -EFAULT;
6079                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
6080                         goto out;
6081                 r = 0;
6082                 break;
6083         }
6084         case KVM_MEMORY_ENCRYPT_OP: {
6085                 r = -ENOTTY;
6086                 if (kvm_x86_ops.mem_enc_op)
6087                         r = static_call(kvm_x86_mem_enc_op)(kvm, argp);
6088                 break;
6089         }
6090         case KVM_MEMORY_ENCRYPT_REG_REGION: {
6091                 struct kvm_enc_region region;
6092
6093                 r = -EFAULT;
6094                 if (copy_from_user(&region, argp, sizeof(region)))
6095                         goto out;
6096
6097                 r = -ENOTTY;
6098                 if (kvm_x86_ops.mem_enc_reg_region)
6099                         r = static_call(kvm_x86_mem_enc_reg_region)(kvm, &region);
6100                 break;
6101         }
6102         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
6103                 struct kvm_enc_region region;
6104
6105                 r = -EFAULT;
6106                 if (copy_from_user(&region, argp, sizeof(region)))
6107                         goto out;
6108
6109                 r = -ENOTTY;
6110                 if (kvm_x86_ops.mem_enc_unreg_region)
6111                         r = static_call(kvm_x86_mem_enc_unreg_region)(kvm, &region);
6112                 break;
6113         }
6114         case KVM_HYPERV_EVENTFD: {
6115                 struct kvm_hyperv_eventfd hvevfd;
6116
6117                 r = -EFAULT;
6118                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
6119                         goto out;
6120                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
6121                 break;
6122         }
6123         case KVM_SET_PMU_EVENT_FILTER:
6124                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
6125                 break;
6126         case KVM_X86_SET_MSR_FILTER:
6127                 r = kvm_vm_ioctl_set_msr_filter(kvm, argp);
6128                 break;
6129         default:
6130                 r = -ENOTTY;
6131         }
6132 out:
6133         return r;
6134 }
6135
6136 static void kvm_init_msr_list(void)
6137 {
6138         struct x86_pmu_capability x86_pmu;
6139         u32 dummy[2];
6140         unsigned i;
6141
6142         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
6143                          "Please update the fixed PMCs in msrs_to_saved_all[]");
6144
6145         perf_get_x86_pmu_capability(&x86_pmu);
6146
6147         num_msrs_to_save = 0;
6148         num_emulated_msrs = 0;
6149         num_msr_based_features = 0;
6150
6151         for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
6152                 if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
6153                         continue;
6154
6155                 /*
6156                  * Even MSRs that are valid in the host may not be exposed
6157                  * to the guests in some cases.
6158                  */
6159                 switch (msrs_to_save_all[i]) {
6160                 case MSR_IA32_BNDCFGS:
6161                         if (!kvm_mpx_supported())
6162                                 continue;
6163                         break;
6164                 case MSR_TSC_AUX:
6165                         if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP) &&
6166                             !kvm_cpu_cap_has(X86_FEATURE_RDPID))
6167                                 continue;
6168                         break;
6169                 case MSR_IA32_UMWAIT_CONTROL:
6170                         if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG))
6171                                 continue;
6172                         break;
6173                 case MSR_IA32_RTIT_CTL:
6174                 case MSR_IA32_RTIT_STATUS:
6175                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT))
6176                                 continue;
6177                         break;
6178                 case MSR_IA32_RTIT_CR3_MATCH:
6179                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6180                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
6181                                 continue;
6182                         break;
6183                 case MSR_IA32_RTIT_OUTPUT_BASE:
6184                 case MSR_IA32_RTIT_OUTPUT_MASK:
6185                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6186                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
6187                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
6188                                 continue;
6189                         break;
6190                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
6191                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6192                                 msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
6193                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
6194                                 continue;
6195                         break;
6196                 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
6197                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
6198                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6199                                 continue;
6200                         break;
6201                 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
6202                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
6203                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6204                                 continue;
6205                         break;
6206                 default:
6207                         break;
6208                 }
6209
6210                 msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
6211         }
6212
6213         for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
6214                 if (!static_call(kvm_x86_has_emulated_msr)(NULL, emulated_msrs_all[i]))
6215                         continue;
6216
6217                 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
6218         }
6219
6220         for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
6221                 struct kvm_msr_entry msr;
6222
6223                 msr.index = msr_based_features_all[i];
6224                 if (kvm_get_msr_feature(&msr))
6225                         continue;
6226
6227                 msr_based_features[num_msr_based_features++] = msr_based_features_all[i];
6228         }
6229 }
6230
6231 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
6232                            const void *v)
6233 {
6234         int handled = 0;
6235         int n;
6236
6237         do {
6238                 n = min(len, 8);
6239                 if (!(lapic_in_kernel(vcpu) &&
6240                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
6241                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
6242                         break;
6243                 handled += n;
6244                 addr += n;
6245                 len -= n;
6246                 v += n;
6247         } while (len);
6248
6249         return handled;
6250 }
6251
6252 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
6253 {
6254         int handled = 0;
6255         int n;
6256
6257         do {
6258                 n = min(len, 8);
6259                 if (!(lapic_in_kernel(vcpu) &&
6260                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
6261                                          addr, n, v))
6262                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
6263                         break;
6264                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
6265                 handled += n;
6266                 addr += n;
6267                 len -= n;
6268                 v += n;
6269         } while (len);
6270
6271         return handled;
6272 }
6273
6274 static void kvm_set_segment(struct kvm_vcpu *vcpu,
6275                         struct kvm_segment *var, int seg)
6276 {
6277         static_call(kvm_x86_set_segment)(vcpu, var, seg);
6278 }
6279
6280 void kvm_get_segment(struct kvm_vcpu *vcpu,
6281                      struct kvm_segment *var, int seg)
6282 {
6283         static_call(kvm_x86_get_segment)(vcpu, var, seg);
6284 }
6285
6286 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
6287                            struct x86_exception *exception)
6288 {
6289         gpa_t t_gpa;
6290
6291         BUG_ON(!mmu_is_nested(vcpu));
6292
6293         /* NPT walks are always user-walks */
6294         access |= PFERR_USER_MASK;
6295         t_gpa  = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
6296
6297         return t_gpa;
6298 }
6299
6300 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
6301                               struct x86_exception *exception)
6302 {
6303         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6304         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6305 }
6306 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_read);
6307
6308  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
6309                                 struct x86_exception *exception)
6310 {
6311         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6312         access |= PFERR_FETCH_MASK;
6313         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6314 }
6315
6316 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
6317                                struct x86_exception *exception)
6318 {
6319         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6320         access |= PFERR_WRITE_MASK;
6321         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6322 }
6323 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_write);
6324
6325 /* uses this to access any guest's mapped memory without checking CPL */
6326 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
6327                                 struct x86_exception *exception)
6328 {
6329         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
6330 }
6331
6332 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6333                                       struct kvm_vcpu *vcpu, u32 access,
6334                                       struct x86_exception *exception)
6335 {
6336         void *data = val;
6337         int r = X86EMUL_CONTINUE;
6338
6339         while (bytes) {
6340                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
6341                                                             exception);
6342                 unsigned offset = addr & (PAGE_SIZE-1);
6343                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
6344                 int ret;
6345
6346                 if (gpa == UNMAPPED_GVA)
6347                         return X86EMUL_PROPAGATE_FAULT;
6348                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
6349                                                offset, toread);
6350                 if (ret < 0) {
6351                         r = X86EMUL_IO_NEEDED;
6352                         goto out;
6353                 }
6354
6355                 bytes -= toread;
6356                 data += toread;
6357                 addr += toread;
6358         }
6359 out:
6360         return r;
6361 }
6362
6363 /* used for instruction fetching */
6364 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
6365                                 gva_t addr, void *val, unsigned int bytes,
6366                                 struct x86_exception *exception)
6367 {
6368         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6369         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6370         unsigned offset;
6371         int ret;
6372
6373         /* Inline kvm_read_guest_virt_helper for speed.  */
6374         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
6375                                                     exception);
6376         if (unlikely(gpa == UNMAPPED_GVA))
6377                 return X86EMUL_PROPAGATE_FAULT;
6378
6379         offset = addr & (PAGE_SIZE-1);
6380         if (WARN_ON(offset + bytes > PAGE_SIZE))
6381                 bytes = (unsigned)PAGE_SIZE - offset;
6382         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
6383                                        offset, bytes);
6384         if (unlikely(ret < 0))
6385                 return X86EMUL_IO_NEEDED;
6386
6387         return X86EMUL_CONTINUE;
6388 }
6389
6390 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
6391                                gva_t addr, void *val, unsigned int bytes,
6392                                struct x86_exception *exception)
6393 {
6394         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6395
6396         /*
6397          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
6398          * is returned, but our callers are not ready for that and they blindly
6399          * call kvm_inject_page_fault.  Ensure that they at least do not leak
6400          * uninitialized kernel stack memory into cr2 and error code.
6401          */
6402         memset(exception, 0, sizeof(*exception));
6403         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
6404                                           exception);
6405 }
6406 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
6407
6408 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
6409                              gva_t addr, void *val, unsigned int bytes,
6410                              struct x86_exception *exception, bool system)
6411 {
6412         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6413         u32 access = 0;
6414
6415         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6416                 access |= PFERR_USER_MASK;
6417
6418         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
6419 }
6420
6421 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
6422                 unsigned long addr, void *val, unsigned int bytes)
6423 {
6424         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6425         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
6426
6427         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
6428 }
6429
6430 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6431                                       struct kvm_vcpu *vcpu, u32 access,
6432                                       struct x86_exception *exception)
6433 {
6434         void *data = val;
6435         int r = X86EMUL_CONTINUE;
6436
6437         while (bytes) {
6438                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
6439                                                              access,
6440                                                              exception);
6441                 unsigned offset = addr & (PAGE_SIZE-1);
6442                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
6443                 int ret;
6444
6445                 if (gpa == UNMAPPED_GVA)
6446                         return X86EMUL_PROPAGATE_FAULT;
6447                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
6448                 if (ret < 0) {
6449                         r = X86EMUL_IO_NEEDED;
6450                         goto out;
6451                 }
6452
6453                 bytes -= towrite;
6454                 data += towrite;
6455                 addr += towrite;
6456         }
6457 out:
6458         return r;
6459 }
6460
6461 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
6462                               unsigned int bytes, struct x86_exception *exception,
6463                               bool system)
6464 {
6465         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6466         u32 access = PFERR_WRITE_MASK;
6467
6468         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6469                 access |= PFERR_USER_MASK;
6470
6471         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6472                                            access, exception);
6473 }
6474
6475 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
6476                                 unsigned int bytes, struct x86_exception *exception)
6477 {
6478         /* kvm_write_guest_virt_system can pull in tons of pages. */
6479         vcpu->arch.l1tf_flush_l1d = true;
6480
6481         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6482                                            PFERR_WRITE_MASK, exception);
6483 }
6484 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
6485
6486 int handle_ud(struct kvm_vcpu *vcpu)
6487 {
6488         static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
6489         int emul_type = EMULTYPE_TRAP_UD;
6490         char sig[5]; /* ud2; .ascii "kvm" */
6491         struct x86_exception e;
6492
6493         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, NULL, 0)))
6494                 return 1;
6495
6496         if (force_emulation_prefix &&
6497             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
6498                                 sig, sizeof(sig), &e) == 0 &&
6499             memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
6500                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
6501                 emul_type = EMULTYPE_TRAP_UD_FORCED;
6502         }
6503
6504         return kvm_emulate_instruction(vcpu, emul_type);
6505 }
6506 EXPORT_SYMBOL_GPL(handle_ud);
6507
6508 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6509                             gpa_t gpa, bool write)
6510 {
6511         /* For APIC access vmexit */
6512         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6513                 return 1;
6514
6515         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
6516                 trace_vcpu_match_mmio(gva, gpa, write, true);
6517                 return 1;
6518         }
6519
6520         return 0;
6521 }
6522
6523 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6524                                 gpa_t *gpa, struct x86_exception *exception,
6525                                 bool write)
6526 {
6527         u32 access = ((static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0)
6528                 | (write ? PFERR_WRITE_MASK : 0);
6529
6530         /*
6531          * currently PKRU is only applied to ept enabled guest so
6532          * there is no pkey in EPT page table for L1 guest or EPT
6533          * shadow page table for L2 guest.
6534          */
6535         if (vcpu_match_mmio_gva(vcpu, gva)
6536             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
6537                                  vcpu->arch.mmio_access, 0, access)) {
6538                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
6539                                         (gva & (PAGE_SIZE - 1));
6540                 trace_vcpu_match_mmio(gva, *gpa, write, false);
6541                 return 1;
6542         }
6543
6544         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6545
6546         if (*gpa == UNMAPPED_GVA)
6547                 return -1;
6548
6549         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
6550 }
6551
6552 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
6553                         const void *val, int bytes)
6554 {
6555         int ret;
6556
6557         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
6558         if (ret < 0)
6559                 return 0;
6560         kvm_page_track_write(vcpu, gpa, val, bytes);
6561         return 1;
6562 }
6563
6564 struct read_write_emulator_ops {
6565         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
6566                                   int bytes);
6567         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
6568                                   void *val, int bytes);
6569         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6570                                int bytes, void *val);
6571         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6572                                     void *val, int bytes);
6573         bool write;
6574 };
6575
6576 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
6577 {
6578         if (vcpu->mmio_read_completed) {
6579                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
6580                                vcpu->mmio_fragments[0].gpa, val);
6581                 vcpu->mmio_read_completed = 0;
6582                 return 1;
6583         }
6584
6585         return 0;
6586 }
6587
6588 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6589                         void *val, int bytes)
6590 {
6591         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
6592 }
6593
6594 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6595                          void *val, int bytes)
6596 {
6597         return emulator_write_phys(vcpu, gpa, val, bytes);
6598 }
6599
6600 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
6601 {
6602         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
6603         return vcpu_mmio_write(vcpu, gpa, bytes, val);
6604 }
6605
6606 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6607                           void *val, int bytes)
6608 {
6609         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
6610         return X86EMUL_IO_NEEDED;
6611 }
6612
6613 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6614                            void *val, int bytes)
6615 {
6616         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
6617
6618         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
6619         return X86EMUL_CONTINUE;
6620 }
6621
6622 static const struct read_write_emulator_ops read_emultor = {
6623         .read_write_prepare = read_prepare,
6624         .read_write_emulate = read_emulate,
6625         .read_write_mmio = vcpu_mmio_read,
6626         .read_write_exit_mmio = read_exit_mmio,
6627 };
6628
6629 static const struct read_write_emulator_ops write_emultor = {
6630         .read_write_emulate = write_emulate,
6631         .read_write_mmio = write_mmio,
6632         .read_write_exit_mmio = write_exit_mmio,
6633         .write = true,
6634 };
6635
6636 static int emulator_read_write_onepage(unsigned long addr, void *val,
6637                                        unsigned int bytes,
6638                                        struct x86_exception *exception,
6639                                        struct kvm_vcpu *vcpu,
6640                                        const struct read_write_emulator_ops *ops)
6641 {
6642         gpa_t gpa;
6643         int handled, ret;
6644         bool write = ops->write;
6645         struct kvm_mmio_fragment *frag;
6646         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6647
6648         /*
6649          * If the exit was due to a NPF we may already have a GPA.
6650          * If the GPA is present, use it to avoid the GVA to GPA table walk.
6651          * Note, this cannot be used on string operations since string
6652          * operation using rep will only have the initial GPA from the NPF
6653          * occurred.
6654          */
6655         if (ctxt->gpa_available && emulator_can_use_gpa(ctxt) &&
6656             (addr & ~PAGE_MASK) == (ctxt->gpa_val & ~PAGE_MASK)) {
6657                 gpa = ctxt->gpa_val;
6658                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
6659         } else {
6660                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
6661                 if (ret < 0)
6662                         return X86EMUL_PROPAGATE_FAULT;
6663         }
6664
6665         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
6666                 return X86EMUL_CONTINUE;
6667
6668         /*
6669          * Is this MMIO handled locally?
6670          */
6671         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
6672         if (handled == bytes)
6673                 return X86EMUL_CONTINUE;
6674
6675         gpa += handled;
6676         bytes -= handled;
6677         val += handled;
6678
6679         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
6680         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
6681         frag->gpa = gpa;
6682         frag->data = val;
6683         frag->len = bytes;
6684         return X86EMUL_CONTINUE;
6685 }
6686
6687 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
6688                         unsigned long addr,
6689                         void *val, unsigned int bytes,
6690                         struct x86_exception *exception,
6691                         const struct read_write_emulator_ops *ops)
6692 {
6693         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6694         gpa_t gpa;
6695         int rc;
6696
6697         if (ops->read_write_prepare &&
6698                   ops->read_write_prepare(vcpu, val, bytes))
6699                 return X86EMUL_CONTINUE;
6700
6701         vcpu->mmio_nr_fragments = 0;
6702
6703         /* Crossing a page boundary? */
6704         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
6705                 int now;
6706
6707                 now = -addr & ~PAGE_MASK;
6708                 rc = emulator_read_write_onepage(addr, val, now, exception,
6709                                                  vcpu, ops);
6710
6711                 if (rc != X86EMUL_CONTINUE)
6712                         return rc;
6713                 addr += now;
6714                 if (ctxt->mode != X86EMUL_MODE_PROT64)
6715                         addr = (u32)addr;
6716                 val += now;
6717                 bytes -= now;
6718         }
6719
6720         rc = emulator_read_write_onepage(addr, val, bytes, exception,
6721                                          vcpu, ops);
6722         if (rc != X86EMUL_CONTINUE)
6723                 return rc;
6724
6725         if (!vcpu->mmio_nr_fragments)
6726                 return rc;
6727
6728         gpa = vcpu->mmio_fragments[0].gpa;
6729
6730         vcpu->mmio_needed = 1;
6731         vcpu->mmio_cur_fragment = 0;
6732
6733         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
6734         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
6735         vcpu->run->exit_reason = KVM_EXIT_MMIO;
6736         vcpu->run->mmio.phys_addr = gpa;
6737
6738         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
6739 }
6740
6741 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
6742                                   unsigned long addr,
6743                                   void *val,
6744                                   unsigned int bytes,
6745                                   struct x86_exception *exception)
6746 {
6747         return emulator_read_write(ctxt, addr, val, bytes,
6748                                    exception, &read_emultor);
6749 }
6750
6751 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
6752                             unsigned long addr,
6753                             const void *val,
6754                             unsigned int bytes,
6755                             struct x86_exception *exception)
6756 {
6757         return emulator_read_write(ctxt, addr, (void *)val, bytes,
6758                                    exception, &write_emultor);
6759 }
6760
6761 #define CMPXCHG_TYPE(t, ptr, old, new) \
6762         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
6763
6764 #ifdef CONFIG_X86_64
6765 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
6766 #else
6767 #  define CMPXCHG64(ptr, old, new) \
6768         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
6769 #endif
6770
6771 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
6772                                      unsigned long addr,
6773                                      const void *old,
6774                                      const void *new,
6775                                      unsigned int bytes,
6776                                      struct x86_exception *exception)
6777 {
6778         struct kvm_host_map map;
6779         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6780         u64 page_line_mask;
6781         gpa_t gpa;
6782         char *kaddr;
6783         bool exchanged;
6784
6785         /* guests cmpxchg8b have to be emulated atomically */
6786         if (bytes > 8 || (bytes & (bytes - 1)))
6787                 goto emul_write;
6788
6789         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
6790
6791         if (gpa == UNMAPPED_GVA ||
6792             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6793                 goto emul_write;
6794
6795         /*
6796          * Emulate the atomic as a straight write to avoid #AC if SLD is
6797          * enabled in the host and the access splits a cache line.
6798          */
6799         if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))
6800                 page_line_mask = ~(cache_line_size() - 1);
6801         else
6802                 page_line_mask = PAGE_MASK;
6803
6804         if (((gpa + bytes - 1) & page_line_mask) != (gpa & page_line_mask))
6805                 goto emul_write;
6806
6807         if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
6808                 goto emul_write;
6809
6810         kaddr = map.hva + offset_in_page(gpa);
6811
6812         switch (bytes) {
6813         case 1:
6814                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
6815                 break;
6816         case 2:
6817                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
6818                 break;
6819         case 4:
6820                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
6821                 break;
6822         case 8:
6823                 exchanged = CMPXCHG64(kaddr, old, new);
6824                 break;
6825         default:
6826                 BUG();
6827         }
6828
6829         kvm_vcpu_unmap(vcpu, &map, true);
6830
6831         if (!exchanged)
6832                 return X86EMUL_CMPXCHG_FAILED;
6833
6834         kvm_page_track_write(vcpu, gpa, new, bytes);
6835
6836         return X86EMUL_CONTINUE;
6837
6838 emul_write:
6839         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
6840
6841         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
6842 }
6843
6844 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
6845 {
6846         int r = 0, i;
6847
6848         for (i = 0; i < vcpu->arch.pio.count; i++) {
6849                 if (vcpu->arch.pio.in)
6850                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
6851                                             vcpu->arch.pio.size, pd);
6852                 else
6853                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
6854                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
6855                                              pd);
6856                 if (r)
6857                         break;
6858                 pd += vcpu->arch.pio.size;
6859         }
6860         return r;
6861 }
6862
6863 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
6864                                unsigned short port, void *val,
6865                                unsigned int count, bool in)
6866 {
6867         vcpu->arch.pio.port = port;
6868         vcpu->arch.pio.in = in;
6869         vcpu->arch.pio.count  = count;
6870         vcpu->arch.pio.size = size;
6871
6872         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
6873                 vcpu->arch.pio.count = 0;
6874                 return 1;
6875         }
6876
6877         vcpu->run->exit_reason = KVM_EXIT_IO;
6878         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
6879         vcpu->run->io.size = size;
6880         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
6881         vcpu->run->io.count = count;
6882         vcpu->run->io.port = port;
6883
6884         return 0;
6885 }
6886
6887 static int emulator_pio_in(struct kvm_vcpu *vcpu, int size,
6888                            unsigned short port, void *val, unsigned int count)
6889 {
6890         int ret;
6891
6892         if (vcpu->arch.pio.count)
6893                 goto data_avail;
6894
6895         memset(vcpu->arch.pio_data, 0, size * count);
6896
6897         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
6898         if (ret) {
6899 data_avail:
6900                 memcpy(val, vcpu->arch.pio_data, size * count);
6901                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
6902                 vcpu->arch.pio.count = 0;
6903                 return 1;
6904         }
6905
6906         return 0;
6907 }
6908
6909 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
6910                                     int size, unsigned short port, void *val,
6911                                     unsigned int count)
6912 {
6913         return emulator_pio_in(emul_to_vcpu(ctxt), size, port, val, count);
6914
6915 }
6916
6917 static int emulator_pio_out(struct kvm_vcpu *vcpu, int size,
6918                             unsigned short port, const void *val,
6919                             unsigned int count)
6920 {
6921         memcpy(vcpu->arch.pio_data, val, size * count);
6922         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
6923         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
6924 }
6925
6926 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
6927                                      int size, unsigned short port,
6928                                      const void *val, unsigned int count)
6929 {
6930         return emulator_pio_out(emul_to_vcpu(ctxt), size, port, val, count);
6931 }
6932
6933 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
6934 {
6935         return static_call(kvm_x86_get_segment_base)(vcpu, seg);
6936 }
6937
6938 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
6939 {
6940         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
6941 }
6942
6943 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
6944 {
6945         if (!need_emulate_wbinvd(vcpu))
6946                 return X86EMUL_CONTINUE;
6947
6948         if (static_call(kvm_x86_has_wbinvd_exit)()) {
6949                 int cpu = get_cpu();
6950
6951                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
6952                 on_each_cpu_mask(vcpu->arch.wbinvd_dirty_mask,
6953                                 wbinvd_ipi, NULL, 1);
6954                 put_cpu();
6955                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
6956         } else
6957                 wbinvd();
6958         return X86EMUL_CONTINUE;
6959 }
6960
6961 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
6962 {
6963         kvm_emulate_wbinvd_noskip(vcpu);
6964         return kvm_skip_emulated_instruction(vcpu);
6965 }
6966 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
6967
6968
6969
6970 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
6971 {
6972         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
6973 }
6974
6975 static void emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
6976                             unsigned long *dest)
6977 {
6978         kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
6979 }
6980
6981 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
6982                            unsigned long value)
6983 {
6984
6985         return kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
6986 }
6987
6988 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
6989 {
6990         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
6991 }
6992
6993 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
6994 {
6995         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6996         unsigned long value;
6997
6998         switch (cr) {
6999         case 0:
7000                 value = kvm_read_cr0(vcpu);
7001                 break;
7002         case 2:
7003                 value = vcpu->arch.cr2;
7004                 break;
7005         case 3:
7006                 value = kvm_read_cr3(vcpu);
7007                 break;
7008         case 4:
7009                 value = kvm_read_cr4(vcpu);
7010                 break;
7011         case 8:
7012                 value = kvm_get_cr8(vcpu);
7013                 break;
7014         default:
7015                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7016                 return 0;
7017         }
7018
7019         return value;
7020 }
7021
7022 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
7023 {
7024         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7025         int res = 0;
7026
7027         switch (cr) {
7028         case 0:
7029                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
7030                 break;
7031         case 2:
7032                 vcpu->arch.cr2 = val;
7033                 break;
7034         case 3:
7035                 res = kvm_set_cr3(vcpu, val);
7036                 break;
7037         case 4:
7038                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
7039                 break;
7040         case 8:
7041                 res = kvm_set_cr8(vcpu, val);
7042                 break;
7043         default:
7044                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7045                 res = -1;
7046         }
7047
7048         return res;
7049 }
7050
7051 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
7052 {
7053         return static_call(kvm_x86_get_cpl)(emul_to_vcpu(ctxt));
7054 }
7055
7056 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7057 {
7058         static_call(kvm_x86_get_gdt)(emul_to_vcpu(ctxt), dt);
7059 }
7060
7061 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7062 {
7063         static_call(kvm_x86_get_idt)(emul_to_vcpu(ctxt), dt);
7064 }
7065
7066 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7067 {
7068         static_call(kvm_x86_set_gdt)(emul_to_vcpu(ctxt), dt);
7069 }
7070
7071 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7072 {
7073         static_call(kvm_x86_set_idt)(emul_to_vcpu(ctxt), dt);
7074 }
7075
7076 static unsigned long emulator_get_cached_segment_base(
7077         struct x86_emulate_ctxt *ctxt, int seg)
7078 {
7079         return get_segment_base(emul_to_vcpu(ctxt), seg);
7080 }
7081
7082 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
7083                                  struct desc_struct *desc, u32 *base3,
7084                                  int seg)
7085 {
7086         struct kvm_segment var;
7087
7088         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
7089         *selector = var.selector;
7090
7091         if (var.unusable) {
7092                 memset(desc, 0, sizeof(*desc));
7093                 if (base3)
7094                         *base3 = 0;
7095                 return false;
7096         }
7097
7098         if (var.g)
7099                 var.limit >>= 12;
7100         set_desc_limit(desc, var.limit);
7101         set_desc_base(desc, (unsigned long)var.base);
7102 #ifdef CONFIG_X86_64
7103         if (base3)
7104                 *base3 = var.base >> 32;
7105 #endif
7106         desc->type = var.type;
7107         desc->s = var.s;
7108         desc->dpl = var.dpl;
7109         desc->p = var.present;
7110         desc->avl = var.avl;
7111         desc->l = var.l;
7112         desc->d = var.db;
7113         desc->g = var.g;
7114
7115         return true;
7116 }
7117
7118 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
7119                                  struct desc_struct *desc, u32 base3,
7120                                  int seg)
7121 {
7122         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7123         struct kvm_segment var;
7124
7125         var.selector = selector;
7126         var.base = get_desc_base(desc);
7127 #ifdef CONFIG_X86_64
7128         var.base |= ((u64)base3) << 32;
7129 #endif
7130         var.limit = get_desc_limit(desc);
7131         if (desc->g)
7132                 var.limit = (var.limit << 12) | 0xfff;
7133         var.type = desc->type;
7134         var.dpl = desc->dpl;
7135         var.db = desc->d;
7136         var.s = desc->s;
7137         var.l = desc->l;
7138         var.g = desc->g;
7139         var.avl = desc->avl;
7140         var.present = desc->p;
7141         var.unusable = !var.present;
7142         var.padding = 0;
7143
7144         kvm_set_segment(vcpu, &var, seg);
7145         return;
7146 }
7147
7148 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
7149                             u32 msr_index, u64 *pdata)
7150 {
7151         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7152         int r;
7153
7154         r = kvm_get_msr(vcpu, msr_index, pdata);
7155
7156         if (r && kvm_get_msr_user_space(vcpu, msr_index, r)) {
7157                 /* Bounce to user space */
7158                 return X86EMUL_IO_NEEDED;
7159         }
7160
7161         return r;
7162 }
7163
7164 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
7165                             u32 msr_index, u64 data)
7166 {
7167         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7168         int r;
7169
7170         r = kvm_set_msr(vcpu, msr_index, data);
7171
7172         if (r && kvm_set_msr_user_space(vcpu, msr_index, data, r)) {
7173                 /* Bounce to user space */
7174                 return X86EMUL_IO_NEEDED;
7175         }
7176
7177         return r;
7178 }
7179
7180 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
7181 {
7182         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7183
7184         return vcpu->arch.smbase;
7185 }
7186
7187 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
7188 {
7189         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7190
7191         vcpu->arch.smbase = smbase;
7192 }
7193
7194 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
7195                               u32 pmc)
7196 {
7197         return kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc);
7198 }
7199
7200 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
7201                              u32 pmc, u64 *pdata)
7202 {
7203         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
7204 }
7205
7206 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
7207 {
7208         emul_to_vcpu(ctxt)->arch.halt_request = 1;
7209 }
7210
7211 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
7212                               struct x86_instruction_info *info,
7213                               enum x86_intercept_stage stage)
7214 {
7215         return static_call(kvm_x86_check_intercept)(emul_to_vcpu(ctxt), info, stage,
7216                                             &ctxt->exception);
7217 }
7218
7219 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
7220                               u32 *eax, u32 *ebx, u32 *ecx, u32 *edx,
7221                               bool exact_only)
7222 {
7223         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, exact_only);
7224 }
7225
7226 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
7227 {
7228         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
7229 }
7230
7231 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
7232 {
7233         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
7234 }
7235
7236 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
7237 {
7238         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
7239 }
7240
7241 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
7242 {
7243         return kvm_register_read_raw(emul_to_vcpu(ctxt), reg);
7244 }
7245
7246 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
7247 {
7248         kvm_register_write_raw(emul_to_vcpu(ctxt), reg, val);
7249 }
7250
7251 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
7252 {
7253         static_call(kvm_x86_set_nmi_mask)(emul_to_vcpu(ctxt), masked);
7254 }
7255
7256 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
7257 {
7258         return emul_to_vcpu(ctxt)->arch.hflags;
7259 }
7260
7261 static void emulator_exiting_smm(struct x86_emulate_ctxt *ctxt)
7262 {
7263         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7264
7265         kvm_smm_changed(vcpu, false);
7266 }
7267
7268 static int emulator_leave_smm(struct x86_emulate_ctxt *ctxt,
7269                                   const char *smstate)
7270 {
7271         return static_call(kvm_x86_leave_smm)(emul_to_vcpu(ctxt), smstate);
7272 }
7273
7274 static void emulator_triple_fault(struct x86_emulate_ctxt *ctxt)
7275 {
7276         kvm_make_request(KVM_REQ_TRIPLE_FAULT, emul_to_vcpu(ctxt));
7277 }
7278
7279 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
7280 {
7281         return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
7282 }
7283
7284 static const struct x86_emulate_ops emulate_ops = {
7285         .read_gpr            = emulator_read_gpr,
7286         .write_gpr           = emulator_write_gpr,
7287         .read_std            = emulator_read_std,
7288         .write_std           = emulator_write_std,
7289         .read_phys           = kvm_read_guest_phys_system,
7290         .fetch               = kvm_fetch_guest_virt,
7291         .read_emulated       = emulator_read_emulated,
7292         .write_emulated      = emulator_write_emulated,
7293         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
7294         .invlpg              = emulator_invlpg,
7295         .pio_in_emulated     = emulator_pio_in_emulated,
7296         .pio_out_emulated    = emulator_pio_out_emulated,
7297         .get_segment         = emulator_get_segment,
7298         .set_segment         = emulator_set_segment,
7299         .get_cached_segment_base = emulator_get_cached_segment_base,
7300         .get_gdt             = emulator_get_gdt,
7301         .get_idt             = emulator_get_idt,
7302         .set_gdt             = emulator_set_gdt,
7303         .set_idt             = emulator_set_idt,
7304         .get_cr              = emulator_get_cr,
7305         .set_cr              = emulator_set_cr,
7306         .cpl                 = emulator_get_cpl,
7307         .get_dr              = emulator_get_dr,
7308         .set_dr              = emulator_set_dr,
7309         .get_smbase          = emulator_get_smbase,
7310         .set_smbase          = emulator_set_smbase,
7311         .set_msr             = emulator_set_msr,
7312         .get_msr             = emulator_get_msr,
7313         .check_pmc           = emulator_check_pmc,
7314         .read_pmc            = emulator_read_pmc,
7315         .halt                = emulator_halt,
7316         .wbinvd              = emulator_wbinvd,
7317         .fix_hypercall       = emulator_fix_hypercall,
7318         .intercept           = emulator_intercept,
7319         .get_cpuid           = emulator_get_cpuid,
7320         .guest_has_long_mode = emulator_guest_has_long_mode,
7321         .guest_has_movbe     = emulator_guest_has_movbe,
7322         .guest_has_fxsr      = emulator_guest_has_fxsr,
7323         .set_nmi_mask        = emulator_set_nmi_mask,
7324         .get_hflags          = emulator_get_hflags,
7325         .exiting_smm         = emulator_exiting_smm,
7326         .leave_smm           = emulator_leave_smm,
7327         .triple_fault        = emulator_triple_fault,
7328         .set_xcr             = emulator_set_xcr,
7329 };
7330
7331 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
7332 {
7333         u32 int_shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
7334         /*
7335          * an sti; sti; sequence only disable interrupts for the first
7336          * instruction. So, if the last instruction, be it emulated or
7337          * not, left the system with the INT_STI flag enabled, it
7338          * means that the last instruction is an sti. We should not
7339          * leave the flag on in this case. The same goes for mov ss
7340          */
7341         if (int_shadow & mask)
7342                 mask = 0;
7343         if (unlikely(int_shadow || mask)) {
7344                 static_call(kvm_x86_set_interrupt_shadow)(vcpu, mask);
7345                 if (!mask)
7346                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7347         }
7348 }
7349
7350 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
7351 {
7352         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7353         if (ctxt->exception.vector == PF_VECTOR)
7354                 return kvm_inject_emulated_page_fault(vcpu, &ctxt->exception);
7355
7356         if (ctxt->exception.error_code_valid)
7357                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
7358                                       ctxt->exception.error_code);
7359         else
7360                 kvm_queue_exception(vcpu, ctxt->exception.vector);
7361         return false;
7362 }
7363
7364 static struct x86_emulate_ctxt *alloc_emulate_ctxt(struct kvm_vcpu *vcpu)
7365 {
7366         struct x86_emulate_ctxt *ctxt;
7367
7368         ctxt = kmem_cache_zalloc(x86_emulator_cache, GFP_KERNEL_ACCOUNT);
7369         if (!ctxt) {
7370                 pr_err("kvm: failed to allocate vcpu's emulator\n");
7371                 return NULL;
7372         }
7373
7374         ctxt->vcpu = vcpu;
7375         ctxt->ops = &emulate_ops;
7376         vcpu->arch.emulate_ctxt = ctxt;
7377
7378         return ctxt;
7379 }
7380
7381 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
7382 {
7383         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7384         int cs_db, cs_l;
7385
7386         static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
7387
7388         ctxt->gpa_available = false;
7389         ctxt->eflags = kvm_get_rflags(vcpu);
7390         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
7391
7392         ctxt->eip = kvm_rip_read(vcpu);
7393         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
7394                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
7395                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
7396                      cs_db                              ? X86EMUL_MODE_PROT32 :
7397                                                           X86EMUL_MODE_PROT16;
7398         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
7399         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
7400         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
7401
7402         ctxt->interruptibility = 0;
7403         ctxt->have_exception = false;
7404         ctxt->exception.vector = -1;
7405         ctxt->perm_ok = false;
7406
7407         init_decode_cache(ctxt);
7408         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7409 }
7410
7411 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
7412 {
7413         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7414         int ret;
7415
7416         init_emulate_ctxt(vcpu);
7417
7418         ctxt->op_bytes = 2;
7419         ctxt->ad_bytes = 2;
7420         ctxt->_eip = ctxt->eip + inc_eip;
7421         ret = emulate_int_real(ctxt, irq);
7422
7423         if (ret != X86EMUL_CONTINUE) {
7424                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
7425         } else {
7426                 ctxt->eip = ctxt->_eip;
7427                 kvm_rip_write(vcpu, ctxt->eip);
7428                 kvm_set_rflags(vcpu, ctxt->eflags);
7429         }
7430 }
7431 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
7432
7433 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
7434 {
7435         ++vcpu->stat.insn_emulation_fail;
7436         trace_kvm_emulate_insn_failed(vcpu);
7437
7438         if (emulation_type & EMULTYPE_VMWARE_GP) {
7439                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7440                 return 1;
7441         }
7442
7443         if (emulation_type & EMULTYPE_SKIP) {
7444                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7445                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
7446                 vcpu->run->internal.ndata = 0;
7447                 return 0;
7448         }
7449
7450         kvm_queue_exception(vcpu, UD_VECTOR);
7451
7452         if (!is_guest_mode(vcpu) && static_call(kvm_x86_get_cpl)(vcpu) == 0) {
7453                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7454                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
7455                 vcpu->run->internal.ndata = 0;
7456                 return 0;
7457         }
7458
7459         return 1;
7460 }
7461
7462 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7463                                   bool write_fault_to_shadow_pgtable,
7464                                   int emulation_type)
7465 {
7466         gpa_t gpa = cr2_or_gpa;
7467         kvm_pfn_t pfn;
7468
7469         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7470                 return false;
7471
7472         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7473             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7474                 return false;
7475
7476         if (!vcpu->arch.mmu->direct_map) {
7477                 /*
7478                  * Write permission should be allowed since only
7479                  * write access need to be emulated.
7480                  */
7481                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7482
7483                 /*
7484                  * If the mapping is invalid in guest, let cpu retry
7485                  * it to generate fault.
7486                  */
7487                 if (gpa == UNMAPPED_GVA)
7488                         return true;
7489         }
7490
7491         /*
7492          * Do not retry the unhandleable instruction if it faults on the
7493          * readonly host memory, otherwise it will goto a infinite loop:
7494          * retry instruction -> write #PF -> emulation fail -> retry
7495          * instruction -> ...
7496          */
7497         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
7498
7499         /*
7500          * If the instruction failed on the error pfn, it can not be fixed,
7501          * report the error to userspace.
7502          */
7503         if (is_error_noslot_pfn(pfn))
7504                 return false;
7505
7506         kvm_release_pfn_clean(pfn);
7507
7508         /* The instructions are well-emulated on direct mmu. */
7509         if (vcpu->arch.mmu->direct_map) {
7510                 unsigned int indirect_shadow_pages;
7511
7512                 write_lock(&vcpu->kvm->mmu_lock);
7513                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
7514                 write_unlock(&vcpu->kvm->mmu_lock);
7515
7516                 if (indirect_shadow_pages)
7517                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7518
7519                 return true;
7520         }
7521
7522         /*
7523          * if emulation was due to access to shadowed page table
7524          * and it failed try to unshadow page and re-enter the
7525          * guest to let CPU execute the instruction.
7526          */
7527         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7528
7529         /*
7530          * If the access faults on its page table, it can not
7531          * be fixed by unprotecting shadow page and it should
7532          * be reported to userspace.
7533          */
7534         return !write_fault_to_shadow_pgtable;
7535 }
7536
7537 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
7538                               gpa_t cr2_or_gpa,  int emulation_type)
7539 {
7540         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7541         unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
7542
7543         last_retry_eip = vcpu->arch.last_retry_eip;
7544         last_retry_addr = vcpu->arch.last_retry_addr;
7545
7546         /*
7547          * If the emulation is caused by #PF and it is non-page_table
7548          * writing instruction, it means the VM-EXIT is caused by shadow
7549          * page protected, we can zap the shadow page and retry this
7550          * instruction directly.
7551          *
7552          * Note: if the guest uses a non-page-table modifying instruction
7553          * on the PDE that points to the instruction, then we will unmap
7554          * the instruction and go to an infinite loop. So, we cache the
7555          * last retried eip and the last fault address, if we meet the eip
7556          * and the address again, we can break out of the potential infinite
7557          * loop.
7558          */
7559         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
7560
7561         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7562                 return false;
7563
7564         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7565             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7566                 return false;
7567
7568         if (x86_page_table_writing_insn(ctxt))
7569                 return false;
7570
7571         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
7572                 return false;
7573
7574         vcpu->arch.last_retry_eip = ctxt->eip;
7575         vcpu->arch.last_retry_addr = cr2_or_gpa;
7576
7577         if (!vcpu->arch.mmu->direct_map)
7578                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7579
7580         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7581
7582         return true;
7583 }
7584
7585 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
7586 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
7587
7588 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm)
7589 {
7590         trace_kvm_smm_transition(vcpu->vcpu_id, vcpu->arch.smbase, entering_smm);
7591
7592         if (entering_smm) {
7593                 vcpu->arch.hflags |= HF_SMM_MASK;
7594         } else {
7595                 vcpu->arch.hflags &= ~(HF_SMM_MASK | HF_SMM_INSIDE_NMI_MASK);
7596
7597                 /* Process a latched INIT or SMI, if any.  */
7598                 kvm_make_request(KVM_REQ_EVENT, vcpu);
7599         }
7600
7601         kvm_mmu_reset_context(vcpu);
7602 }
7603
7604 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
7605                                 unsigned long *db)
7606 {
7607         u32 dr6 = 0;
7608         int i;
7609         u32 enable, rwlen;
7610
7611         enable = dr7;
7612         rwlen = dr7 >> 16;
7613         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
7614                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
7615                         dr6 |= (1 << i);
7616         return dr6;
7617 }
7618
7619 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
7620 {
7621         struct kvm_run *kvm_run = vcpu->run;
7622
7623         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
7624                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_ACTIVE_LOW;
7625                 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu);
7626                 kvm_run->debug.arch.exception = DB_VECTOR;
7627                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
7628                 return 0;
7629         }
7630         kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
7631         return 1;
7632 }
7633
7634 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
7635 {
7636         unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7637         int r;
7638
7639         r = static_call(kvm_x86_skip_emulated_instruction)(vcpu);
7640         if (unlikely(!r))
7641                 return 0;
7642
7643         /*
7644          * rflags is the old, "raw" value of the flags.  The new value has
7645          * not been saved yet.
7646          *
7647          * This is correct even for TF set by the guest, because "the
7648          * processor will not generate this exception after the instruction
7649          * that sets the TF flag".
7650          */
7651         if (unlikely(rflags & X86_EFLAGS_TF))
7652                 r = kvm_vcpu_do_singlestep(vcpu);
7653         return r;
7654 }
7655 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
7656
7657 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
7658 {
7659         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
7660             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
7661                 struct kvm_run *kvm_run = vcpu->run;
7662                 unsigned long eip = kvm_get_linear_rip(vcpu);
7663                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7664                                            vcpu->arch.guest_debug_dr7,
7665                                            vcpu->arch.eff_db);
7666
7667                 if (dr6 != 0) {
7668                         kvm_run->debug.arch.dr6 = dr6 | DR6_ACTIVE_LOW;
7669                         kvm_run->debug.arch.pc = eip;
7670                         kvm_run->debug.arch.exception = DB_VECTOR;
7671                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
7672                         *r = 0;
7673                         return true;
7674                 }
7675         }
7676
7677         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
7678             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
7679                 unsigned long eip = kvm_get_linear_rip(vcpu);
7680                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7681                                            vcpu->arch.dr7,
7682                                            vcpu->arch.db);
7683
7684                 if (dr6 != 0) {
7685                         kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
7686                         *r = 1;
7687                         return true;
7688                 }
7689         }
7690
7691         return false;
7692 }
7693
7694 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
7695 {
7696         switch (ctxt->opcode_len) {
7697         case 1:
7698                 switch (ctxt->b) {
7699                 case 0xe4:      /* IN */
7700                 case 0xe5:
7701                 case 0xec:
7702                 case 0xed:
7703                 case 0xe6:      /* OUT */
7704                 case 0xe7:
7705                 case 0xee:
7706                 case 0xef:
7707                 case 0x6c:      /* INS */
7708                 case 0x6d:
7709                 case 0x6e:      /* OUTS */
7710                 case 0x6f:
7711                         return true;
7712                 }
7713                 break;
7714         case 2:
7715                 switch (ctxt->b) {
7716                 case 0x33:      /* RDPMC */
7717                         return true;
7718                 }
7719                 break;
7720         }
7721
7722         return false;
7723 }
7724
7725 /*
7726  * Decode to be emulated instruction. Return EMULATION_OK if success.
7727  */
7728 int x86_decode_emulated_instruction(struct kvm_vcpu *vcpu, int emulation_type,
7729                                     void *insn, int insn_len)
7730 {
7731         int r = EMULATION_OK;
7732         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7733
7734         init_emulate_ctxt(vcpu);
7735
7736         /*
7737          * We will reenter on the same instruction since we do not set
7738          * complete_userspace_io. This does not handle watchpoints yet,
7739          * those would be handled in the emulate_ops.
7740          */
7741         if (!(emulation_type & EMULTYPE_SKIP) &&
7742             kvm_vcpu_check_breakpoint(vcpu, &r))
7743                 return r;
7744
7745         r = x86_decode_insn(ctxt, insn, insn_len, emulation_type);
7746
7747         trace_kvm_emulate_insn_start(vcpu);
7748         ++vcpu->stat.insn_emulation;
7749
7750         return r;
7751 }
7752 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction);
7753
7754 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7755                             int emulation_type, void *insn, int insn_len)
7756 {
7757         int r;
7758         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7759         bool writeback = true;
7760         bool write_fault_to_spt;
7761
7762         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, insn, insn_len)))
7763                 return 1;
7764
7765         vcpu->arch.l1tf_flush_l1d = true;
7766
7767         /*
7768          * Clear write_fault_to_shadow_pgtable here to ensure it is
7769          * never reused.
7770          */
7771         write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
7772         vcpu->arch.write_fault_to_shadow_pgtable = false;
7773
7774         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
7775                 kvm_clear_exception_queue(vcpu);
7776
7777                 r = x86_decode_emulated_instruction(vcpu, emulation_type,
7778                                                     insn, insn_len);
7779                 if (r != EMULATION_OK)  {
7780                         if ((emulation_type & EMULTYPE_TRAP_UD) ||
7781                             (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
7782                                 kvm_queue_exception(vcpu, UD_VECTOR);
7783                                 return 1;
7784                         }
7785                         if (reexecute_instruction(vcpu, cr2_or_gpa,
7786                                                   write_fault_to_spt,
7787                                                   emulation_type))
7788                                 return 1;
7789                         if (ctxt->have_exception) {
7790                                 /*
7791                                  * #UD should result in just EMULATION_FAILED, and trap-like
7792                                  * exception should not be encountered during decode.
7793                                  */
7794                                 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
7795                                              exception_type(ctxt->exception.vector) == EXCPT_TRAP);
7796                                 inject_emulated_exception(vcpu);
7797                                 return 1;
7798                         }
7799                         return handle_emulation_failure(vcpu, emulation_type);
7800                 }
7801         }
7802
7803         if ((emulation_type & EMULTYPE_VMWARE_GP) &&
7804             !is_vmware_backdoor_opcode(ctxt)) {
7805                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7806                 return 1;
7807         }
7808
7809         /*
7810          * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
7811          * for kvm_skip_emulated_instruction().  The caller is responsible for
7812          * updating interruptibility state and injecting single-step #DBs.
7813          */
7814         if (emulation_type & EMULTYPE_SKIP) {
7815                 kvm_rip_write(vcpu, ctxt->_eip);
7816                 if (ctxt->eflags & X86_EFLAGS_RF)
7817                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
7818                 return 1;
7819         }
7820
7821         if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
7822                 return 1;
7823
7824         /* this is needed for vmware backdoor interface to work since it
7825            changes registers values  during IO operation */
7826         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
7827                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7828                 emulator_invalidate_register_cache(ctxt);
7829         }
7830
7831 restart:
7832         if (emulation_type & EMULTYPE_PF) {
7833                 /* Save the faulting GPA (cr2) in the address field */
7834                 ctxt->exception.address = cr2_or_gpa;
7835
7836                 /* With shadow page tables, cr2 contains a GVA or nGPA. */
7837                 if (vcpu->arch.mmu->direct_map) {
7838                         ctxt->gpa_available = true;
7839                         ctxt->gpa_val = cr2_or_gpa;
7840                 }
7841         } else {
7842                 /* Sanitize the address out of an abundance of paranoia. */
7843                 ctxt->exception.address = 0;
7844         }
7845
7846         r = x86_emulate_insn(ctxt);
7847
7848         if (r == EMULATION_INTERCEPTED)
7849                 return 1;
7850
7851         if (r == EMULATION_FAILED) {
7852                 if (reexecute_instruction(vcpu, cr2_or_gpa, write_fault_to_spt,
7853                                         emulation_type))
7854                         return 1;
7855
7856                 return handle_emulation_failure(vcpu, emulation_type);
7857         }
7858
7859         if (ctxt->have_exception) {
7860                 r = 1;
7861                 if (inject_emulated_exception(vcpu))
7862                         return r;
7863         } else if (vcpu->arch.pio.count) {
7864                 if (!vcpu->arch.pio.in) {
7865                         /* FIXME: return into emulator if single-stepping.  */
7866                         vcpu->arch.pio.count = 0;
7867                 } else {
7868                         writeback = false;
7869                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
7870                 }
7871                 r = 0;
7872         } else if (vcpu->mmio_needed) {
7873                 ++vcpu->stat.mmio_exits;
7874
7875                 if (!vcpu->mmio_is_write)
7876                         writeback = false;
7877                 r = 0;
7878                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7879         } else if (r == EMULATION_RESTART)
7880                 goto restart;
7881         else
7882                 r = 1;
7883
7884         if (writeback) {
7885                 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7886                 toggle_interruptibility(vcpu, ctxt->interruptibility);
7887                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7888                 if (!ctxt->have_exception ||
7889                     exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
7890                         kvm_rip_write(vcpu, ctxt->eip);
7891                         if (r && (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
7892                                 r = kvm_vcpu_do_singlestep(vcpu);
7893                         if (kvm_x86_ops.update_emulated_instruction)
7894                                 static_call(kvm_x86_update_emulated_instruction)(vcpu);
7895                         __kvm_set_rflags(vcpu, ctxt->eflags);
7896                 }
7897
7898                 /*
7899                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
7900                  * do nothing, and it will be requested again as soon as
7901                  * the shadow expires.  But we still need to check here,
7902                  * because POPF has no interrupt shadow.
7903                  */
7904                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
7905                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7906         } else
7907                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
7908
7909         return r;
7910 }
7911
7912 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
7913 {
7914         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
7915 }
7916 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
7917
7918 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
7919                                         void *insn, int insn_len)
7920 {
7921         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
7922 }
7923 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
7924
7925 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
7926 {
7927         vcpu->arch.pio.count = 0;
7928         return 1;
7929 }
7930
7931 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
7932 {
7933         vcpu->arch.pio.count = 0;
7934
7935         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
7936                 return 1;
7937
7938         return kvm_skip_emulated_instruction(vcpu);
7939 }
7940
7941 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
7942                             unsigned short port)
7943 {
7944         unsigned long val = kvm_rax_read(vcpu);
7945         int ret = emulator_pio_out(vcpu, size, port, &val, 1);
7946
7947         if (ret)
7948                 return ret;
7949
7950         /*
7951          * Workaround userspace that relies on old KVM behavior of %rip being
7952          * incremented prior to exiting to userspace to handle "OUT 0x7e".
7953          */
7954         if (port == 0x7e &&
7955             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
7956                 vcpu->arch.complete_userspace_io =
7957                         complete_fast_pio_out_port_0x7e;
7958                 kvm_skip_emulated_instruction(vcpu);
7959         } else {
7960                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
7961                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
7962         }
7963         return 0;
7964 }
7965
7966 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
7967 {
7968         unsigned long val;
7969
7970         /* We should only ever be called with arch.pio.count equal to 1 */
7971         BUG_ON(vcpu->arch.pio.count != 1);
7972
7973         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
7974                 vcpu->arch.pio.count = 0;
7975                 return 1;
7976         }
7977
7978         /* For size less than 4 we merge, else we zero extend */
7979         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
7980
7981         /*
7982          * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
7983          * the copy and tracing
7984          */
7985         emulator_pio_in(vcpu, vcpu->arch.pio.size, vcpu->arch.pio.port, &val, 1);
7986         kvm_rax_write(vcpu, val);
7987
7988         return kvm_skip_emulated_instruction(vcpu);
7989 }
7990
7991 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
7992                            unsigned short port)
7993 {
7994         unsigned long val;
7995         int ret;
7996
7997         /* For size less than 4 we merge, else we zero extend */
7998         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
7999
8000         ret = emulator_pio_in(vcpu, size, port, &val, 1);
8001         if (ret) {
8002                 kvm_rax_write(vcpu, val);
8003                 return ret;
8004         }
8005
8006         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
8007         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
8008
8009         return 0;
8010 }
8011
8012 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
8013 {
8014         int ret;
8015
8016         if (in)
8017                 ret = kvm_fast_pio_in(vcpu, size, port);
8018         else
8019                 ret = kvm_fast_pio_out(vcpu, size, port);
8020         return ret && kvm_skip_emulated_instruction(vcpu);
8021 }
8022 EXPORT_SYMBOL_GPL(kvm_fast_pio);
8023
8024 static int kvmclock_cpu_down_prep(unsigned int cpu)
8025 {
8026         __this_cpu_write(cpu_tsc_khz, 0);
8027         return 0;
8028 }
8029
8030 static void tsc_khz_changed(void *data)
8031 {
8032         struct cpufreq_freqs *freq = data;
8033         unsigned long khz = 0;
8034
8035         if (data)
8036                 khz = freq->new;
8037         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8038                 khz = cpufreq_quick_get(raw_smp_processor_id());
8039         if (!khz)
8040                 khz = tsc_khz;
8041         __this_cpu_write(cpu_tsc_khz, khz);
8042 }
8043
8044 #ifdef CONFIG_X86_64
8045 static void kvm_hyperv_tsc_notifier(void)
8046 {
8047         struct kvm *kvm;
8048         struct kvm_vcpu *vcpu;
8049         int cpu;
8050         unsigned long flags;
8051
8052         mutex_lock(&kvm_lock);
8053         list_for_each_entry(kvm, &vm_list, vm_list)
8054                 kvm_make_mclock_inprogress_request(kvm);
8055
8056         hyperv_stop_tsc_emulation();
8057
8058         /* TSC frequency always matches when on Hyper-V */
8059         for_each_present_cpu(cpu)
8060                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
8061         kvm_max_guest_tsc_khz = tsc_khz;
8062
8063         list_for_each_entry(kvm, &vm_list, vm_list) {
8064                 struct kvm_arch *ka = &kvm->arch;
8065
8066                 spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
8067                 pvclock_update_vm_gtod_copy(kvm);
8068                 spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
8069
8070                 kvm_for_each_vcpu(cpu, vcpu, kvm)
8071                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8072
8073                 kvm_for_each_vcpu(cpu, vcpu, kvm)
8074                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
8075         }
8076         mutex_unlock(&kvm_lock);
8077 }
8078 #endif
8079
8080 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
8081 {
8082         struct kvm *kvm;
8083         struct kvm_vcpu *vcpu;
8084         int i, send_ipi = 0;
8085
8086         /*
8087          * We allow guests to temporarily run on slowing clocks,
8088          * provided we notify them after, or to run on accelerating
8089          * clocks, provided we notify them before.  Thus time never
8090          * goes backwards.
8091          *
8092          * However, we have a problem.  We can't atomically update
8093          * the frequency of a given CPU from this function; it is
8094          * merely a notifier, which can be called from any CPU.
8095          * Changing the TSC frequency at arbitrary points in time
8096          * requires a recomputation of local variables related to
8097          * the TSC for each VCPU.  We must flag these local variables
8098          * to be updated and be sure the update takes place with the
8099          * new frequency before any guests proceed.
8100          *
8101          * Unfortunately, the combination of hotplug CPU and frequency
8102          * change creates an intractable locking scenario; the order
8103          * of when these callouts happen is undefined with respect to
8104          * CPU hotplug, and they can race with each other.  As such,
8105          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
8106          * undefined; you can actually have a CPU frequency change take
8107          * place in between the computation of X and the setting of the
8108          * variable.  To protect against this problem, all updates of
8109          * the per_cpu tsc_khz variable are done in an interrupt
8110          * protected IPI, and all callers wishing to update the value
8111          * must wait for a synchronous IPI to complete (which is trivial
8112          * if the caller is on the CPU already).  This establishes the
8113          * necessary total order on variable updates.
8114          *
8115          * Note that because a guest time update may take place
8116          * anytime after the setting of the VCPU's request bit, the
8117          * correct TSC value must be set before the request.  However,
8118          * to ensure the update actually makes it to any guest which
8119          * starts running in hardware virtualization between the set
8120          * and the acquisition of the spinlock, we must also ping the
8121          * CPU after setting the request bit.
8122          *
8123          */
8124
8125         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8126
8127         mutex_lock(&kvm_lock);
8128         list_for_each_entry(kvm, &vm_list, vm_list) {
8129                 kvm_for_each_vcpu(i, vcpu, kvm) {
8130                         if (vcpu->cpu != cpu)
8131                                 continue;
8132                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8133                         if (vcpu->cpu != raw_smp_processor_id())
8134                                 send_ipi = 1;
8135                 }
8136         }
8137         mutex_unlock(&kvm_lock);
8138
8139         if (freq->old < freq->new && send_ipi) {
8140                 /*
8141                  * We upscale the frequency.  Must make the guest
8142                  * doesn't see old kvmclock values while running with
8143                  * the new frequency, otherwise we risk the guest sees
8144                  * time go backwards.
8145                  *
8146                  * In case we update the frequency for another cpu
8147                  * (which might be in guest context) send an interrupt
8148                  * to kick the cpu out of guest context.  Next time
8149                  * guest context is entered kvmclock will be updated,
8150                  * so the guest will not see stale values.
8151                  */
8152                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8153         }
8154 }
8155
8156 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
8157                                      void *data)
8158 {
8159         struct cpufreq_freqs *freq = data;
8160         int cpu;
8161
8162         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
8163                 return 0;
8164         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
8165                 return 0;
8166
8167         for_each_cpu(cpu, freq->policy->cpus)
8168                 __kvmclock_cpufreq_notifier(freq, cpu);
8169
8170         return 0;
8171 }
8172
8173 static struct notifier_block kvmclock_cpufreq_notifier_block = {
8174         .notifier_call  = kvmclock_cpufreq_notifier
8175 };
8176
8177 static int kvmclock_cpu_online(unsigned int cpu)
8178 {
8179         tsc_khz_changed(NULL);
8180         return 0;
8181 }
8182
8183 static void kvm_timer_init(void)
8184 {
8185         max_tsc_khz = tsc_khz;
8186
8187         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
8188 #ifdef CONFIG_CPU_FREQ
8189                 struct cpufreq_policy *policy;
8190                 int cpu;
8191
8192                 cpu = get_cpu();
8193                 policy = cpufreq_cpu_get(cpu);
8194                 if (policy) {
8195                         if (policy->cpuinfo.max_freq)
8196                                 max_tsc_khz = policy->cpuinfo.max_freq;
8197                         cpufreq_cpu_put(policy);
8198                 }
8199                 put_cpu();
8200 #endif
8201                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
8202                                           CPUFREQ_TRANSITION_NOTIFIER);
8203         }
8204
8205         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
8206                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
8207 }
8208
8209 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
8210 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
8211
8212 int kvm_is_in_guest(void)
8213 {
8214         return __this_cpu_read(current_vcpu) != NULL;
8215 }
8216
8217 static int kvm_is_user_mode(void)
8218 {
8219         int user_mode = 3;
8220
8221         if (__this_cpu_read(current_vcpu))
8222                 user_mode = static_call(kvm_x86_get_cpl)(__this_cpu_read(current_vcpu));
8223
8224         return user_mode != 0;
8225 }
8226
8227 static unsigned long kvm_get_guest_ip(void)
8228 {
8229         unsigned long ip = 0;
8230
8231         if (__this_cpu_read(current_vcpu))
8232                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
8233
8234         return ip;
8235 }
8236
8237 static void kvm_handle_intel_pt_intr(void)
8238 {
8239         struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
8240
8241         kvm_make_request(KVM_REQ_PMI, vcpu);
8242         __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
8243                         (unsigned long *)&vcpu->arch.pmu.global_status);
8244 }
8245
8246 static struct perf_guest_info_callbacks kvm_guest_cbs = {
8247         .is_in_guest            = kvm_is_in_guest,
8248         .is_user_mode           = kvm_is_user_mode,
8249         .get_guest_ip           = kvm_get_guest_ip,
8250         .handle_intel_pt_intr   = kvm_handle_intel_pt_intr,
8251 };
8252
8253 #ifdef CONFIG_X86_64
8254 static void pvclock_gtod_update_fn(struct work_struct *work)
8255 {
8256         struct kvm *kvm;
8257
8258         struct kvm_vcpu *vcpu;
8259         int i;
8260
8261         mutex_lock(&kvm_lock);
8262         list_for_each_entry(kvm, &vm_list, vm_list)
8263                 kvm_for_each_vcpu(i, vcpu, kvm)
8264                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
8265         atomic_set(&kvm_guest_has_master_clock, 0);
8266         mutex_unlock(&kvm_lock);
8267 }
8268
8269 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
8270
8271 /*
8272  * Indirection to move queue_work() out of the tk_core.seq write held
8273  * region to prevent possible deadlocks against time accessors which
8274  * are invoked with work related locks held.
8275  */
8276 static void pvclock_irq_work_fn(struct irq_work *w)
8277 {
8278         queue_work(system_long_wq, &pvclock_gtod_work);
8279 }
8280
8281 static DEFINE_IRQ_WORK(pvclock_irq_work, pvclock_irq_work_fn);
8282
8283 /*
8284  * Notification about pvclock gtod data update.
8285  */
8286 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
8287                                void *priv)
8288 {
8289         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
8290         struct timekeeper *tk = priv;
8291
8292         update_pvclock_gtod(tk);
8293
8294         /*
8295          * Disable master clock if host does not trust, or does not use,
8296          * TSC based clocksource. Delegate queue_work() to irq_work as
8297          * this is invoked with tk_core.seq write held.
8298          */
8299         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
8300             atomic_read(&kvm_guest_has_master_clock) != 0)
8301                 irq_work_queue(&pvclock_irq_work);
8302         return 0;
8303 }
8304
8305 static struct notifier_block pvclock_gtod_notifier = {
8306         .notifier_call = pvclock_gtod_notify,
8307 };
8308 #endif
8309
8310 int kvm_arch_init(void *opaque)
8311 {
8312         struct kvm_x86_init_ops *ops = opaque;
8313         int r;
8314
8315         if (kvm_x86_ops.hardware_enable) {
8316                 printk(KERN_ERR "kvm: already loaded the other module\n");
8317                 r = -EEXIST;
8318                 goto out;
8319         }
8320
8321         if (!ops->cpu_has_kvm_support()) {
8322                 pr_err_ratelimited("kvm: no hardware support\n");
8323                 r = -EOPNOTSUPP;
8324                 goto out;
8325         }
8326         if (ops->disabled_by_bios()) {
8327                 pr_err_ratelimited("kvm: disabled by bios\n");
8328                 r = -EOPNOTSUPP;
8329                 goto out;
8330         }
8331
8332         /*
8333          * KVM explicitly assumes that the guest has an FPU and
8334          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
8335          * vCPU's FPU state as a fxregs_state struct.
8336          */
8337         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
8338                 printk(KERN_ERR "kvm: inadequate fpu\n");
8339                 r = -EOPNOTSUPP;
8340                 goto out;
8341         }
8342
8343         r = -ENOMEM;
8344         x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
8345                                           __alignof__(struct fpu), SLAB_ACCOUNT,
8346                                           NULL);
8347         if (!x86_fpu_cache) {
8348                 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
8349                 goto out;
8350         }
8351
8352         x86_emulator_cache = kvm_alloc_emulator_cache();
8353         if (!x86_emulator_cache) {
8354                 pr_err("kvm: failed to allocate cache for x86 emulator\n");
8355                 goto out_free_x86_fpu_cache;
8356         }
8357
8358         user_return_msrs = alloc_percpu(struct kvm_user_return_msrs);
8359         if (!user_return_msrs) {
8360                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_user_return_msrs\n");
8361                 goto out_free_x86_emulator_cache;
8362         }
8363         kvm_nr_uret_msrs = 0;
8364
8365         r = kvm_mmu_module_init();
8366         if (r)
8367                 goto out_free_percpu;
8368
8369         kvm_timer_init();
8370
8371         perf_register_guest_info_callbacks(&kvm_guest_cbs);
8372
8373         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
8374                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
8375                 supported_xcr0 = host_xcr0 & KVM_SUPPORTED_XCR0;
8376         }
8377
8378         if (pi_inject_timer == -1)
8379                 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
8380 #ifdef CONFIG_X86_64
8381         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
8382
8383         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8384                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
8385 #endif
8386
8387         return 0;
8388
8389 out_free_percpu:
8390         free_percpu(user_return_msrs);
8391 out_free_x86_emulator_cache:
8392         kmem_cache_destroy(x86_emulator_cache);
8393 out_free_x86_fpu_cache:
8394         kmem_cache_destroy(x86_fpu_cache);
8395 out:
8396         return r;
8397 }
8398
8399 void kvm_arch_exit(void)
8400 {
8401 #ifdef CONFIG_X86_64
8402         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8403                 clear_hv_tscchange_cb();
8404 #endif
8405         kvm_lapic_exit();
8406         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
8407
8408         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8409                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
8410                                             CPUFREQ_TRANSITION_NOTIFIER);
8411         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
8412 #ifdef CONFIG_X86_64
8413         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
8414         irq_work_sync(&pvclock_irq_work);
8415         cancel_work_sync(&pvclock_gtod_work);
8416 #endif
8417         kvm_x86_ops.hardware_enable = NULL;
8418         kvm_mmu_module_exit();
8419         free_percpu(user_return_msrs);
8420         kmem_cache_destroy(x86_emulator_cache);
8421         kmem_cache_destroy(x86_fpu_cache);
8422 #ifdef CONFIG_KVM_XEN
8423         static_key_deferred_flush(&kvm_xen_enabled);
8424         WARN_ON(static_branch_unlikely(&kvm_xen_enabled.key));
8425 #endif
8426 }
8427
8428 static int __kvm_vcpu_halt(struct kvm_vcpu *vcpu, int state, int reason)
8429 {
8430         ++vcpu->stat.halt_exits;
8431         if (lapic_in_kernel(vcpu)) {
8432                 vcpu->arch.mp_state = state;
8433                 return 1;
8434         } else {
8435                 vcpu->run->exit_reason = reason;
8436                 return 0;
8437         }
8438 }
8439
8440 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
8441 {
8442         return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_HALTED, KVM_EXIT_HLT);
8443 }
8444 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
8445
8446 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
8447 {
8448         int ret = kvm_skip_emulated_instruction(vcpu);
8449         /*
8450          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
8451          * KVM_EXIT_DEBUG here.
8452          */
8453         return kvm_vcpu_halt(vcpu) && ret;
8454 }
8455 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
8456
8457 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu)
8458 {
8459         int ret = kvm_skip_emulated_instruction(vcpu);
8460
8461         return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_AP_RESET_HOLD, KVM_EXIT_AP_RESET_HOLD) && ret;
8462 }
8463 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold);
8464
8465 #ifdef CONFIG_X86_64
8466 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
8467                                 unsigned long clock_type)
8468 {
8469         struct kvm_clock_pairing clock_pairing;
8470         struct timespec64 ts;
8471         u64 cycle;
8472         int ret;
8473
8474         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
8475                 return -KVM_EOPNOTSUPP;
8476
8477         if (!kvm_get_walltime_and_clockread(&ts, &cycle))
8478                 return -KVM_EOPNOTSUPP;
8479
8480         clock_pairing.sec = ts.tv_sec;
8481         clock_pairing.nsec = ts.tv_nsec;
8482         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
8483         clock_pairing.flags = 0;
8484         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
8485
8486         ret = 0;
8487         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
8488                             sizeof(struct kvm_clock_pairing)))
8489                 ret = -KVM_EFAULT;
8490
8491         return ret;
8492 }
8493 #endif
8494
8495 /*
8496  * kvm_pv_kick_cpu_op:  Kick a vcpu.
8497  *
8498  * @apicid - apicid of vcpu to be kicked.
8499  */
8500 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
8501 {
8502         struct kvm_lapic_irq lapic_irq;
8503
8504         lapic_irq.shorthand = APIC_DEST_NOSHORT;
8505         lapic_irq.dest_mode = APIC_DEST_PHYSICAL;
8506         lapic_irq.level = 0;
8507         lapic_irq.dest_id = apicid;
8508         lapic_irq.msi_redir_hint = false;
8509
8510         lapic_irq.delivery_mode = APIC_DM_REMRD;
8511         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
8512 }
8513
8514 bool kvm_apicv_activated(struct kvm *kvm)
8515 {
8516         return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
8517 }
8518 EXPORT_SYMBOL_GPL(kvm_apicv_activated);
8519
8520 static void kvm_apicv_init(struct kvm *kvm)
8521 {
8522         if (enable_apicv)
8523                 clear_bit(APICV_INHIBIT_REASON_DISABLE,
8524                           &kvm->arch.apicv_inhibit_reasons);
8525         else
8526                 set_bit(APICV_INHIBIT_REASON_DISABLE,
8527                         &kvm->arch.apicv_inhibit_reasons);
8528 }
8529
8530 static void kvm_sched_yield(struct kvm_vcpu *vcpu, unsigned long dest_id)
8531 {
8532         struct kvm_vcpu *target = NULL;
8533         struct kvm_apic_map *map;
8534
8535         vcpu->stat.directed_yield_attempted++;
8536
8537         if (single_task_running())
8538                 goto no_yield;
8539
8540         rcu_read_lock();
8541         map = rcu_dereference(vcpu->kvm->arch.apic_map);
8542
8543         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
8544                 target = map->phys_map[dest_id]->vcpu;
8545
8546         rcu_read_unlock();
8547
8548         if (!target || !READ_ONCE(target->ready))
8549                 goto no_yield;
8550
8551         /* Ignore requests to yield to self */
8552         if (vcpu == target)
8553                 goto no_yield;
8554
8555         if (kvm_vcpu_yield_to(target) <= 0)
8556                 goto no_yield;
8557
8558         vcpu->stat.directed_yield_successful++;
8559
8560 no_yield:
8561         return;
8562 }
8563
8564 static int complete_hypercall_exit(struct kvm_vcpu *vcpu)
8565 {
8566         u64 ret = vcpu->run->hypercall.ret;
8567
8568         if (!is_64_bit_mode(vcpu))
8569                 ret = (u32)ret;
8570         kvm_rax_write(vcpu, ret);
8571         ++vcpu->stat.hypercalls;
8572         return kvm_skip_emulated_instruction(vcpu);
8573 }
8574
8575 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
8576 {
8577         unsigned long nr, a0, a1, a2, a3, ret;
8578         int op_64_bit;
8579
8580         if (kvm_xen_hypercall_enabled(vcpu->kvm))
8581                 return kvm_xen_hypercall(vcpu);
8582
8583         if (kvm_hv_hypercall_enabled(vcpu))
8584                 return kvm_hv_hypercall(vcpu);
8585
8586         nr = kvm_rax_read(vcpu);
8587         a0 = kvm_rbx_read(vcpu);
8588         a1 = kvm_rcx_read(vcpu);
8589         a2 = kvm_rdx_read(vcpu);
8590         a3 = kvm_rsi_read(vcpu);
8591
8592         trace_kvm_hypercall(nr, a0, a1, a2, a3);
8593
8594         op_64_bit = is_64_bit_mode(vcpu);
8595         if (!op_64_bit) {
8596                 nr &= 0xFFFFFFFF;
8597                 a0 &= 0xFFFFFFFF;
8598                 a1 &= 0xFFFFFFFF;
8599                 a2 &= 0xFFFFFFFF;
8600                 a3 &= 0xFFFFFFFF;
8601         }
8602
8603         if (static_call(kvm_x86_get_cpl)(vcpu) != 0) {
8604                 ret = -KVM_EPERM;
8605                 goto out;
8606         }
8607
8608         ret = -KVM_ENOSYS;
8609
8610         switch (nr) {
8611         case KVM_HC_VAPIC_POLL_IRQ:
8612                 ret = 0;
8613                 break;
8614         case KVM_HC_KICK_CPU:
8615                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_UNHALT))
8616                         break;
8617
8618                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
8619                 kvm_sched_yield(vcpu, a1);
8620                 ret = 0;
8621                 break;
8622 #ifdef CONFIG_X86_64
8623         case KVM_HC_CLOCK_PAIRING:
8624                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
8625                 break;
8626 #endif
8627         case KVM_HC_SEND_IPI:
8628                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SEND_IPI))
8629                         break;
8630
8631                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
8632                 break;
8633         case KVM_HC_SCHED_YIELD:
8634                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SCHED_YIELD))
8635                         break;
8636
8637                 kvm_sched_yield(vcpu, a0);
8638                 ret = 0;
8639                 break;
8640         case KVM_HC_MAP_GPA_RANGE: {
8641                 u64 gpa = a0, npages = a1, attrs = a2;
8642
8643                 ret = -KVM_ENOSYS;
8644                 if (!(vcpu->kvm->arch.hypercall_exit_enabled & (1 << KVM_HC_MAP_GPA_RANGE)))
8645                         break;
8646
8647                 if (!PAGE_ALIGNED(gpa) || !npages ||
8648                     gpa_to_gfn(gpa) + npages <= gpa_to_gfn(gpa)) {
8649                         ret = -KVM_EINVAL;
8650                         break;
8651                 }
8652
8653                 vcpu->run->exit_reason        = KVM_EXIT_HYPERCALL;
8654                 vcpu->run->hypercall.nr       = KVM_HC_MAP_GPA_RANGE;
8655                 vcpu->run->hypercall.args[0]  = gpa;
8656                 vcpu->run->hypercall.args[1]  = npages;
8657                 vcpu->run->hypercall.args[2]  = attrs;
8658                 vcpu->run->hypercall.longmode = op_64_bit;
8659                 vcpu->arch.complete_userspace_io = complete_hypercall_exit;
8660                 return 0;
8661         }
8662         default:
8663                 ret = -KVM_ENOSYS;
8664                 break;
8665         }
8666 out:
8667         if (!op_64_bit)
8668                 ret = (u32)ret;
8669         kvm_rax_write(vcpu, ret);
8670
8671         ++vcpu->stat.hypercalls;
8672         return kvm_skip_emulated_instruction(vcpu);
8673 }
8674 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
8675
8676 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
8677 {
8678         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8679         char instruction[3];
8680         unsigned long rip = kvm_rip_read(vcpu);
8681
8682         static_call(kvm_x86_patch_hypercall)(vcpu, instruction);
8683
8684         return emulator_write_emulated(ctxt, rip, instruction, 3,
8685                 &ctxt->exception);
8686 }
8687
8688 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
8689 {
8690         return vcpu->run->request_interrupt_window &&
8691                 likely(!pic_in_kernel(vcpu->kvm));
8692 }
8693
8694 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
8695 {
8696         struct kvm_run *kvm_run = vcpu->run;
8697
8698         /*
8699          * if_flag is obsolete and useless, so do not bother
8700          * setting it for SEV-ES guests.  Userspace can just
8701          * use kvm_run->ready_for_interrupt_injection.
8702          */
8703         kvm_run->if_flag = !vcpu->arch.guest_state_protected
8704                 && (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
8705
8706         kvm_run->cr8 = kvm_get_cr8(vcpu);
8707         kvm_run->apic_base = kvm_get_apic_base(vcpu);
8708         kvm_run->ready_for_interrupt_injection =
8709                 pic_in_kernel(vcpu->kvm) ||
8710                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
8711
8712         if (is_smm(vcpu))
8713                 kvm_run->flags |= KVM_RUN_X86_SMM;
8714 }
8715
8716 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
8717 {
8718         int max_irr, tpr;
8719
8720         if (!kvm_x86_ops.update_cr8_intercept)
8721                 return;
8722
8723         if (!lapic_in_kernel(vcpu))
8724                 return;
8725
8726         if (vcpu->arch.apicv_active)
8727                 return;
8728
8729         if (!vcpu->arch.apic->vapic_addr)
8730                 max_irr = kvm_lapic_find_highest_irr(vcpu);
8731         else
8732                 max_irr = -1;
8733
8734         if (max_irr != -1)
8735                 max_irr >>= 4;
8736
8737         tpr = kvm_lapic_get_cr8(vcpu);
8738
8739         static_call(kvm_x86_update_cr8_intercept)(vcpu, tpr, max_irr);
8740 }
8741
8742
8743 int kvm_check_nested_events(struct kvm_vcpu *vcpu)
8744 {
8745         if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
8746                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
8747                 return 1;
8748         }
8749
8750         return kvm_x86_ops.nested_ops->check_events(vcpu);
8751 }
8752
8753 static void kvm_inject_exception(struct kvm_vcpu *vcpu)
8754 {
8755         if (vcpu->arch.exception.error_code && !is_protmode(vcpu))
8756                 vcpu->arch.exception.error_code = false;
8757         static_call(kvm_x86_queue_exception)(vcpu);
8758 }
8759
8760 static int inject_pending_event(struct kvm_vcpu *vcpu, bool *req_immediate_exit)
8761 {
8762         int r;
8763         bool can_inject = true;
8764
8765         /* try to reinject previous events if any */
8766
8767         if (vcpu->arch.exception.injected) {
8768                 kvm_inject_exception(vcpu);
8769                 can_inject = false;
8770         }
8771         /*
8772          * Do not inject an NMI or interrupt if there is a pending
8773          * exception.  Exceptions and interrupts are recognized at
8774          * instruction boundaries, i.e. the start of an instruction.
8775          * Trap-like exceptions, e.g. #DB, have higher priority than
8776          * NMIs and interrupts, i.e. traps are recognized before an
8777          * NMI/interrupt that's pending on the same instruction.
8778          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
8779          * priority, but are only generated (pended) during instruction
8780          * execution, i.e. a pending fault-like exception means the
8781          * fault occurred on the *previous* instruction and must be
8782          * serviced prior to recognizing any new events in order to
8783          * fully complete the previous instruction.
8784          */
8785         else if (!vcpu->arch.exception.pending) {
8786                 if (vcpu->arch.nmi_injected) {
8787                         static_call(kvm_x86_set_nmi)(vcpu);
8788                         can_inject = false;
8789                 } else if (vcpu->arch.interrupt.injected) {
8790                         static_call(kvm_x86_set_irq)(vcpu);
8791                         can_inject = false;
8792                 }
8793         }
8794
8795         WARN_ON_ONCE(vcpu->arch.exception.injected &&
8796                      vcpu->arch.exception.pending);
8797
8798         /*
8799          * Call check_nested_events() even if we reinjected a previous event
8800          * in order for caller to determine if it should require immediate-exit
8801          * from L2 to L1 due to pending L1 events which require exit
8802          * from L2 to L1.
8803          */
8804         if (is_guest_mode(vcpu)) {
8805                 r = kvm_check_nested_events(vcpu);
8806                 if (r < 0)
8807                         goto out;
8808         }
8809
8810         /* try to inject new event if pending */
8811         if (vcpu->arch.exception.pending) {
8812                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
8813                                         vcpu->arch.exception.has_error_code,
8814                                         vcpu->arch.exception.error_code);
8815
8816                 vcpu->arch.exception.pending = false;
8817                 vcpu->arch.exception.injected = true;
8818
8819                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
8820                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
8821                                              X86_EFLAGS_RF);
8822
8823                 if (vcpu->arch.exception.nr == DB_VECTOR) {
8824                         kvm_deliver_exception_payload(vcpu);
8825                         if (vcpu->arch.dr7 & DR7_GD) {
8826                                 vcpu->arch.dr7 &= ~DR7_GD;
8827                                 kvm_update_dr7(vcpu);
8828                         }
8829                 }
8830
8831                 kvm_inject_exception(vcpu);
8832                 can_inject = false;
8833         }
8834
8835         /*
8836          * Finally, inject interrupt events.  If an event cannot be injected
8837          * due to architectural conditions (e.g. IF=0) a window-open exit
8838          * will re-request KVM_REQ_EVENT.  Sometimes however an event is pending
8839          * and can architecturally be injected, but we cannot do it right now:
8840          * an interrupt could have arrived just now and we have to inject it
8841          * as a vmexit, or there could already an event in the queue, which is
8842          * indicated by can_inject.  In that case we request an immediate exit
8843          * in order to make progress and get back here for another iteration.
8844          * The kvm_x86_ops hooks communicate this by returning -EBUSY.
8845          */
8846         if (vcpu->arch.smi_pending) {
8847                 r = can_inject ? static_call(kvm_x86_smi_allowed)(vcpu, true) : -EBUSY;
8848                 if (r < 0)
8849                         goto out;
8850                 if (r) {
8851                         vcpu->arch.smi_pending = false;
8852                         ++vcpu->arch.smi_count;
8853                         enter_smm(vcpu);
8854                         can_inject = false;
8855                 } else
8856                         static_call(kvm_x86_enable_smi_window)(vcpu);
8857         }
8858
8859         if (vcpu->arch.nmi_pending) {
8860                 r = can_inject ? static_call(kvm_x86_nmi_allowed)(vcpu, true) : -EBUSY;
8861                 if (r < 0)
8862                         goto out;
8863                 if (r) {
8864                         --vcpu->arch.nmi_pending;
8865                         vcpu->arch.nmi_injected = true;
8866                         static_call(kvm_x86_set_nmi)(vcpu);
8867                         can_inject = false;
8868                         WARN_ON(static_call(kvm_x86_nmi_allowed)(vcpu, true) < 0);
8869                 }
8870                 if (vcpu->arch.nmi_pending)
8871                         static_call(kvm_x86_enable_nmi_window)(vcpu);
8872         }
8873
8874         if (kvm_cpu_has_injectable_intr(vcpu)) {
8875                 r = can_inject ? static_call(kvm_x86_interrupt_allowed)(vcpu, true) : -EBUSY;
8876                 if (r < 0)
8877                         goto out;
8878                 if (r) {
8879                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu), false);
8880                         static_call(kvm_x86_set_irq)(vcpu);
8881                         WARN_ON(static_call(kvm_x86_interrupt_allowed)(vcpu, true) < 0);
8882                 }
8883                 if (kvm_cpu_has_injectable_intr(vcpu))
8884                         static_call(kvm_x86_enable_irq_window)(vcpu);
8885         }
8886
8887         if (is_guest_mode(vcpu) &&
8888             kvm_x86_ops.nested_ops->hv_timer_pending &&
8889             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
8890                 *req_immediate_exit = true;
8891
8892         WARN_ON(vcpu->arch.exception.pending);
8893         return 0;
8894
8895 out:
8896         if (r == -EBUSY) {
8897                 *req_immediate_exit = true;
8898                 r = 0;
8899         }
8900         return r;
8901 }
8902
8903 static void process_nmi(struct kvm_vcpu *vcpu)
8904 {
8905         unsigned limit = 2;
8906
8907         /*
8908          * x86 is limited to one NMI running, and one NMI pending after it.
8909          * If an NMI is already in progress, limit further NMIs to just one.
8910          * Otherwise, allow two (and we'll inject the first one immediately).
8911          */
8912         if (static_call(kvm_x86_get_nmi_mask)(vcpu) || vcpu->arch.nmi_injected)
8913                 limit = 1;
8914
8915         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
8916         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
8917         kvm_make_request(KVM_REQ_EVENT, vcpu);
8918 }
8919
8920 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
8921 {
8922         u32 flags = 0;
8923         flags |= seg->g       << 23;
8924         flags |= seg->db      << 22;
8925         flags |= seg->l       << 21;
8926         flags |= seg->avl     << 20;
8927         flags |= seg->present << 15;
8928         flags |= seg->dpl     << 13;
8929         flags |= seg->s       << 12;
8930         flags |= seg->type    << 8;
8931         return flags;
8932 }
8933
8934 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
8935 {
8936         struct kvm_segment seg;
8937         int offset;
8938
8939         kvm_get_segment(vcpu, &seg, n);
8940         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
8941
8942         if (n < 3)
8943                 offset = 0x7f84 + n * 12;
8944         else
8945                 offset = 0x7f2c + (n - 3) * 12;
8946
8947         put_smstate(u32, buf, offset + 8, seg.base);
8948         put_smstate(u32, buf, offset + 4, seg.limit);
8949         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
8950 }
8951
8952 #ifdef CONFIG_X86_64
8953 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
8954 {
8955         struct kvm_segment seg;
8956         int offset;
8957         u16 flags;
8958
8959         kvm_get_segment(vcpu, &seg, n);
8960         offset = 0x7e00 + n * 16;
8961
8962         flags = enter_smm_get_segment_flags(&seg) >> 8;
8963         put_smstate(u16, buf, offset, seg.selector);
8964         put_smstate(u16, buf, offset + 2, flags);
8965         put_smstate(u32, buf, offset + 4, seg.limit);
8966         put_smstate(u64, buf, offset + 8, seg.base);
8967 }
8968 #endif
8969
8970 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
8971 {
8972         struct desc_ptr dt;
8973         struct kvm_segment seg;
8974         unsigned long val;
8975         int i;
8976
8977         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
8978         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
8979         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
8980         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
8981
8982         for (i = 0; i < 8; i++)
8983                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read_raw(vcpu, i));
8984
8985         kvm_get_dr(vcpu, 6, &val);
8986         put_smstate(u32, buf, 0x7fcc, (u32)val);
8987         kvm_get_dr(vcpu, 7, &val);
8988         put_smstate(u32, buf, 0x7fc8, (u32)val);
8989
8990         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
8991         put_smstate(u32, buf, 0x7fc4, seg.selector);
8992         put_smstate(u32, buf, 0x7f64, seg.base);
8993         put_smstate(u32, buf, 0x7f60, seg.limit);
8994         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
8995
8996         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
8997         put_smstate(u32, buf, 0x7fc0, seg.selector);
8998         put_smstate(u32, buf, 0x7f80, seg.base);
8999         put_smstate(u32, buf, 0x7f7c, seg.limit);
9000         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
9001
9002         static_call(kvm_x86_get_gdt)(vcpu, &dt);
9003         put_smstate(u32, buf, 0x7f74, dt.address);
9004         put_smstate(u32, buf, 0x7f70, dt.size);
9005
9006         static_call(kvm_x86_get_idt)(vcpu, &dt);
9007         put_smstate(u32, buf, 0x7f58, dt.address);
9008         put_smstate(u32, buf, 0x7f54, dt.size);
9009
9010         for (i = 0; i < 6; i++)
9011                 enter_smm_save_seg_32(vcpu, buf, i);
9012
9013         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
9014
9015         /* revision id */
9016         put_smstate(u32, buf, 0x7efc, 0x00020000);
9017         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
9018 }
9019
9020 #ifdef CONFIG_X86_64
9021 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
9022 {
9023         struct desc_ptr dt;
9024         struct kvm_segment seg;
9025         unsigned long val;
9026         int i;
9027
9028         for (i = 0; i < 16; i++)
9029                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read_raw(vcpu, i));
9030
9031         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
9032         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
9033
9034         kvm_get_dr(vcpu, 6, &val);
9035         put_smstate(u64, buf, 0x7f68, val);
9036         kvm_get_dr(vcpu, 7, &val);
9037         put_smstate(u64, buf, 0x7f60, val);
9038
9039         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
9040         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
9041         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
9042
9043         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
9044
9045         /* revision id */
9046         put_smstate(u32, buf, 0x7efc, 0x00020064);
9047
9048         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
9049
9050         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
9051         put_smstate(u16, buf, 0x7e90, seg.selector);
9052         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
9053         put_smstate(u32, buf, 0x7e94, seg.limit);
9054         put_smstate(u64, buf, 0x7e98, seg.base);
9055
9056         static_call(kvm_x86_get_idt)(vcpu, &dt);
9057         put_smstate(u32, buf, 0x7e84, dt.size);
9058         put_smstate(u64, buf, 0x7e88, dt.address);
9059
9060         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
9061         put_smstate(u16, buf, 0x7e70, seg.selector);
9062         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
9063         put_smstate(u32, buf, 0x7e74, seg.limit);
9064         put_smstate(u64, buf, 0x7e78, seg.base);
9065
9066         static_call(kvm_x86_get_gdt)(vcpu, &dt);
9067         put_smstate(u32, buf, 0x7e64, dt.size);
9068         put_smstate(u64, buf, 0x7e68, dt.address);
9069
9070         for (i = 0; i < 6; i++)
9071                 enter_smm_save_seg_64(vcpu, buf, i);
9072 }
9073 #endif
9074
9075 static void enter_smm(struct kvm_vcpu *vcpu)
9076 {
9077         struct kvm_segment cs, ds;
9078         struct desc_ptr dt;
9079         char buf[512];
9080         u32 cr0;
9081
9082         memset(buf, 0, 512);
9083 #ifdef CONFIG_X86_64
9084         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9085                 enter_smm_save_state_64(vcpu, buf);
9086         else
9087 #endif
9088                 enter_smm_save_state_32(vcpu, buf);
9089
9090         /*
9091          * Give enter_smm() a chance to make ISA-specific changes to the vCPU
9092          * state (e.g. leave guest mode) after we've saved the state into the
9093          * SMM state-save area.
9094          */
9095         static_call(kvm_x86_enter_smm)(vcpu, buf);
9096
9097         kvm_smm_changed(vcpu, true);
9098         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
9099
9100         if (static_call(kvm_x86_get_nmi_mask)(vcpu))
9101                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
9102         else
9103                 static_call(kvm_x86_set_nmi_mask)(vcpu, true);
9104
9105         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
9106         kvm_rip_write(vcpu, 0x8000);
9107
9108         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
9109         static_call(kvm_x86_set_cr0)(vcpu, cr0);
9110         vcpu->arch.cr0 = cr0;
9111
9112         static_call(kvm_x86_set_cr4)(vcpu, 0);
9113
9114         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
9115         dt.address = dt.size = 0;
9116         static_call(kvm_x86_set_idt)(vcpu, &dt);
9117
9118         kvm_set_dr(vcpu, 7, DR7_FIXED_1);
9119
9120         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
9121         cs.base = vcpu->arch.smbase;
9122
9123         ds.selector = 0;
9124         ds.base = 0;
9125
9126         cs.limit    = ds.limit = 0xffffffff;
9127         cs.type     = ds.type = 0x3;
9128         cs.dpl      = ds.dpl = 0;
9129         cs.db       = ds.db = 0;
9130         cs.s        = ds.s = 1;
9131         cs.l        = ds.l = 0;
9132         cs.g        = ds.g = 1;
9133         cs.avl      = ds.avl = 0;
9134         cs.present  = ds.present = 1;
9135         cs.unusable = ds.unusable = 0;
9136         cs.padding  = ds.padding = 0;
9137
9138         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
9139         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
9140         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
9141         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
9142         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
9143         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
9144
9145 #ifdef CONFIG_X86_64
9146         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9147                 static_call(kvm_x86_set_efer)(vcpu, 0);
9148 #endif
9149
9150         kvm_update_cpuid_runtime(vcpu);
9151         kvm_mmu_reset_context(vcpu);
9152 }
9153
9154 static void process_smi(struct kvm_vcpu *vcpu)
9155 {
9156         vcpu->arch.smi_pending = true;
9157         kvm_make_request(KVM_REQ_EVENT, vcpu);
9158 }
9159
9160 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
9161                                        unsigned long *vcpu_bitmap)
9162 {
9163         cpumask_var_t cpus;
9164
9165         zalloc_cpumask_var(&cpus, GFP_ATOMIC);
9166
9167         kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC,
9168                                     NULL, vcpu_bitmap, cpus);
9169
9170         free_cpumask_var(cpus);
9171 }
9172
9173 void kvm_make_scan_ioapic_request(struct kvm *kvm)
9174 {
9175         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
9176 }
9177
9178 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
9179 {
9180         if (!lapic_in_kernel(vcpu))
9181                 return;
9182
9183         vcpu->arch.apicv_active = kvm_apicv_activated(vcpu->kvm);
9184         kvm_apic_update_apicv(vcpu);
9185         static_call(kvm_x86_refresh_apicv_exec_ctrl)(vcpu);
9186
9187         /*
9188          * When APICv gets disabled, we may still have injected interrupts
9189          * pending. At the same time, KVM_REQ_EVENT may not be set as APICv was
9190          * still active when the interrupt got accepted. Make sure
9191          * inject_pending_event() is called to check for that.
9192          */
9193         if (!vcpu->arch.apicv_active)
9194                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9195 }
9196 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv);
9197
9198 /*
9199  * NOTE: Do not hold any lock prior to calling this.
9200  *
9201  * In particular, kvm_request_apicv_update() expects kvm->srcu not to be
9202  * locked, because it calls __x86_set_memory_region() which does
9203  * synchronize_srcu(&kvm->srcu).
9204  */
9205 void kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
9206 {
9207         struct kvm_vcpu *except;
9208         unsigned long old, new, expected;
9209
9210         if (!kvm_x86_ops.check_apicv_inhibit_reasons ||
9211             !static_call(kvm_x86_check_apicv_inhibit_reasons)(bit))
9212                 return;
9213
9214         old = READ_ONCE(kvm->arch.apicv_inhibit_reasons);
9215         do {
9216                 expected = new = old;
9217                 if (activate)
9218                         __clear_bit(bit, &new);
9219                 else
9220                         __set_bit(bit, &new);
9221                 if (new == old)
9222                         break;
9223                 old = cmpxchg(&kvm->arch.apicv_inhibit_reasons, expected, new);
9224         } while (old != expected);
9225
9226         if (!!old == !!new)
9227                 return;
9228
9229         trace_kvm_apicv_update_request(activate, bit);
9230         if (kvm_x86_ops.pre_update_apicv_exec_ctrl)
9231                 static_call(kvm_x86_pre_update_apicv_exec_ctrl)(kvm, activate);
9232
9233         /*
9234          * Sending request to update APICV for all other vcpus,
9235          * while update the calling vcpu immediately instead of
9236          * waiting for another #VMEXIT to handle the request.
9237          */
9238         except = kvm_get_running_vcpu();
9239         kvm_make_all_cpus_request_except(kvm, KVM_REQ_APICV_UPDATE,
9240                                          except);
9241         if (except)
9242                 kvm_vcpu_update_apicv(except);
9243 }
9244 EXPORT_SYMBOL_GPL(kvm_request_apicv_update);
9245
9246 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
9247 {
9248         if (!kvm_apic_present(vcpu))
9249                 return;
9250
9251         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
9252
9253         if (irqchip_split(vcpu->kvm))
9254                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
9255         else {
9256                 if (vcpu->arch.apicv_active)
9257                         static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9258                 if (ioapic_in_kernel(vcpu->kvm))
9259                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
9260         }
9261
9262         if (is_guest_mode(vcpu))
9263                 vcpu->arch.load_eoi_exitmap_pending = true;
9264         else
9265                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
9266 }
9267
9268 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
9269 {
9270         u64 eoi_exit_bitmap[4];
9271
9272         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
9273                 return;
9274
9275         if (to_hv_vcpu(vcpu))
9276                 bitmap_or((ulong *)eoi_exit_bitmap,
9277                           vcpu->arch.ioapic_handled_vectors,
9278                           to_hv_synic(vcpu)->vec_bitmap, 256);
9279
9280         static_call(kvm_x86_load_eoi_exitmap)(vcpu, eoi_exit_bitmap);
9281 }
9282
9283 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
9284                                             unsigned long start, unsigned long end)
9285 {
9286         unsigned long apic_address;
9287
9288         /*
9289          * The physical address of apic access page is stored in the VMCS.
9290          * Update it when it becomes invalid.
9291          */
9292         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
9293         if (start <= apic_address && apic_address < end)
9294                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
9295 }
9296
9297 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
9298 {
9299         if (!lapic_in_kernel(vcpu))
9300                 return;
9301
9302         if (!kvm_x86_ops.set_apic_access_page_addr)
9303                 return;
9304
9305         static_call(kvm_x86_set_apic_access_page_addr)(vcpu);
9306 }
9307
9308 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
9309 {
9310         smp_send_reschedule(vcpu->cpu);
9311 }
9312 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
9313
9314 /*
9315  * Returns 1 to let vcpu_run() continue the guest execution loop without
9316  * exiting to the userspace.  Otherwise, the value will be returned to the
9317  * userspace.
9318  */
9319 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
9320 {
9321         int r;
9322         bool req_int_win =
9323                 dm_request_for_irq_injection(vcpu) &&
9324                 kvm_cpu_accept_dm_intr(vcpu);
9325         fastpath_t exit_fastpath;
9326
9327         bool req_immediate_exit = false;
9328
9329         /* Forbid vmenter if vcpu dirty ring is soft-full */
9330         if (unlikely(vcpu->kvm->dirty_ring_size &&
9331                      kvm_dirty_ring_soft_full(&vcpu->dirty_ring))) {
9332                 vcpu->run->exit_reason = KVM_EXIT_DIRTY_RING_FULL;
9333                 trace_kvm_dirty_ring_exit(vcpu);
9334                 r = 0;
9335                 goto out;
9336         }
9337
9338         if (kvm_request_pending(vcpu)) {
9339                 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu)) {
9340                         if (unlikely(!kvm_x86_ops.nested_ops->get_nested_state_pages(vcpu))) {
9341                                 r = 0;
9342                                 goto out;
9343                         }
9344                 }
9345                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
9346                         kvm_mmu_unload(vcpu);
9347                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
9348                         __kvm_migrate_timers(vcpu);
9349                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
9350                         kvm_gen_update_masterclock(vcpu->kvm);
9351                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
9352                         kvm_gen_kvmclock_update(vcpu);
9353                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
9354                         r = kvm_guest_time_update(vcpu);
9355                         if (unlikely(r))
9356                                 goto out;
9357                 }
9358                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
9359                         kvm_mmu_sync_roots(vcpu);
9360                 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD, vcpu))
9361                         kvm_mmu_load_pgd(vcpu);
9362                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) {
9363                         kvm_vcpu_flush_tlb_all(vcpu);
9364
9365                         /* Flushing all ASIDs flushes the current ASID... */
9366                         kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
9367                 }
9368                 if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu))
9369                         kvm_vcpu_flush_tlb_current(vcpu);
9370                 if (kvm_check_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu))
9371                         kvm_vcpu_flush_tlb_guest(vcpu);
9372
9373                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
9374                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
9375                         r = 0;
9376                         goto out;
9377                 }
9378                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
9379                         if (is_guest_mode(vcpu)) {
9380                                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
9381                         } else {
9382                                 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
9383                                 vcpu->mmio_needed = 0;
9384                                 r = 0;
9385                                 goto out;
9386                         }
9387                 }
9388                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
9389                         /* Page is swapped out. Do synthetic halt */
9390                         vcpu->arch.apf.halted = true;
9391                         r = 1;
9392                         goto out;
9393                 }
9394                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
9395                         record_steal_time(vcpu);
9396                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
9397                         process_smi(vcpu);
9398                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
9399                         process_nmi(vcpu);
9400                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
9401                         kvm_pmu_handle_event(vcpu);
9402                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
9403                         kvm_pmu_deliver_pmi(vcpu);
9404                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
9405                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
9406                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
9407                                      vcpu->arch.ioapic_handled_vectors)) {
9408                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
9409                                 vcpu->run->eoi.vector =
9410                                                 vcpu->arch.pending_ioapic_eoi;
9411                                 r = 0;
9412                                 goto out;
9413                         }
9414                 }
9415                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
9416                         vcpu_scan_ioapic(vcpu);
9417                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
9418                         vcpu_load_eoi_exitmap(vcpu);
9419                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
9420                         kvm_vcpu_reload_apic_access_page(vcpu);
9421                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
9422                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9423                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
9424                         r = 0;
9425                         goto out;
9426                 }
9427                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
9428                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9429                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
9430                         r = 0;
9431                         goto out;
9432                 }
9433                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
9434                         struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
9435
9436                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
9437                         vcpu->run->hyperv = hv_vcpu->exit;
9438                         r = 0;
9439                         goto out;
9440                 }
9441
9442                 /*
9443                  * KVM_REQ_HV_STIMER has to be processed after
9444                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
9445                  * depend on the guest clock being up-to-date
9446                  */
9447                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
9448                         kvm_hv_process_stimers(vcpu);
9449                 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
9450                         kvm_vcpu_update_apicv(vcpu);
9451                 if (kvm_check_request(KVM_REQ_APF_READY, vcpu))
9452                         kvm_check_async_pf_completion(vcpu);
9453                 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED, vcpu))
9454                         static_call(kvm_x86_msr_filter_changed)(vcpu);
9455
9456                 if (kvm_check_request(KVM_REQ_UPDATE_CPU_DIRTY_LOGGING, vcpu))
9457                         static_call(kvm_x86_update_cpu_dirty_logging)(vcpu);
9458         }
9459
9460         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win ||
9461             kvm_xen_has_interrupt(vcpu)) {
9462                 ++vcpu->stat.req_event;
9463                 r = kvm_apic_accept_events(vcpu);
9464                 if (r < 0) {
9465                         r = 0;
9466                         goto out;
9467                 }
9468                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
9469                         r = 1;
9470                         goto out;
9471                 }
9472
9473                 r = inject_pending_event(vcpu, &req_immediate_exit);
9474                 if (r < 0) {
9475                         r = 0;
9476                         goto out;
9477                 }
9478                 if (req_int_win)
9479                         static_call(kvm_x86_enable_irq_window)(vcpu);
9480
9481                 if (kvm_lapic_enabled(vcpu)) {
9482                         update_cr8_intercept(vcpu);
9483                         kvm_lapic_sync_to_vapic(vcpu);
9484                 }
9485         }
9486
9487         r = kvm_mmu_reload(vcpu);
9488         if (unlikely(r)) {
9489                 goto cancel_injection;
9490         }
9491
9492         preempt_disable();
9493
9494         static_call(kvm_x86_prepare_guest_switch)(vcpu);
9495
9496         /*
9497          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
9498          * IPI are then delayed after guest entry, which ensures that they
9499          * result in virtual interrupt delivery.
9500          */
9501         local_irq_disable();
9502         vcpu->mode = IN_GUEST_MODE;
9503
9504         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9505
9506         /*
9507          * 1) We should set ->mode before checking ->requests.  Please see
9508          * the comment in kvm_vcpu_exiting_guest_mode().
9509          *
9510          * 2) For APICv, we should set ->mode before checking PID.ON. This
9511          * pairs with the memory barrier implicit in pi_test_and_set_on
9512          * (see vmx_deliver_posted_interrupt).
9513          *
9514          * 3) This also orders the write to mode from any reads to the page
9515          * tables done while the VCPU is running.  Please see the comment
9516          * in kvm_flush_remote_tlbs.
9517          */
9518         smp_mb__after_srcu_read_unlock();
9519
9520         /*
9521          * This handles the case where a posted interrupt was
9522          * notified with kvm_vcpu_kick.
9523          */
9524         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
9525                 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9526
9527         if (kvm_vcpu_exit_request(vcpu)) {
9528                 vcpu->mode = OUTSIDE_GUEST_MODE;
9529                 smp_wmb();
9530                 local_irq_enable();
9531                 preempt_enable();
9532                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9533                 r = 1;
9534                 goto cancel_injection;
9535         }
9536
9537         if (req_immediate_exit) {
9538                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9539                 static_call(kvm_x86_request_immediate_exit)(vcpu);
9540         }
9541
9542         fpregs_assert_state_consistent();
9543         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9544                 switch_fpu_return();
9545
9546         if (unlikely(vcpu->arch.switch_db_regs)) {
9547                 set_debugreg(0, 7);
9548                 set_debugreg(vcpu->arch.eff_db[0], 0);
9549                 set_debugreg(vcpu->arch.eff_db[1], 1);
9550                 set_debugreg(vcpu->arch.eff_db[2], 2);
9551                 set_debugreg(vcpu->arch.eff_db[3], 3);
9552                 set_debugreg(vcpu->arch.dr6, 6);
9553                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
9554         }
9555
9556         for (;;) {
9557                 exit_fastpath = static_call(kvm_x86_run)(vcpu);
9558                 if (likely(exit_fastpath != EXIT_FASTPATH_REENTER_GUEST))
9559                         break;
9560
9561                 if (unlikely(kvm_vcpu_exit_request(vcpu))) {
9562                         exit_fastpath = EXIT_FASTPATH_EXIT_HANDLED;
9563                         break;
9564                 }
9565
9566                 if (vcpu->arch.apicv_active)
9567                         static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9568         }
9569
9570         /*
9571          * Do this here before restoring debug registers on the host.  And
9572          * since we do this before handling the vmexit, a DR access vmexit
9573          * can (a) read the correct value of the debug registers, (b) set
9574          * KVM_DEBUGREG_WONT_EXIT again.
9575          */
9576         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
9577                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
9578                 static_call(kvm_x86_sync_dirty_debug_regs)(vcpu);
9579                 kvm_update_dr0123(vcpu);
9580                 kvm_update_dr7(vcpu);
9581                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
9582         }
9583
9584         /*
9585          * If the guest has used debug registers, at least dr7
9586          * will be disabled while returning to the host.
9587          * If we don't have active breakpoints in the host, we don't
9588          * care about the messed up debug address registers. But if
9589          * we have some of them active, restore the old state.
9590          */
9591         if (hw_breakpoint_active())
9592                 hw_breakpoint_restore();
9593
9594         vcpu->arch.last_vmentry_cpu = vcpu->cpu;
9595         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
9596
9597         vcpu->mode = OUTSIDE_GUEST_MODE;
9598         smp_wmb();
9599
9600         static_call(kvm_x86_handle_exit_irqoff)(vcpu);
9601
9602         /*
9603          * Consume any pending interrupts, including the possible source of
9604          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
9605          * An instruction is required after local_irq_enable() to fully unblock
9606          * interrupts on processors that implement an interrupt shadow, the
9607          * stat.exits increment will do nicely.
9608          */
9609         kvm_before_interrupt(vcpu);
9610         local_irq_enable();
9611         ++vcpu->stat.exits;
9612         local_irq_disable();
9613         kvm_after_interrupt(vcpu);
9614
9615         /*
9616          * Wait until after servicing IRQs to account guest time so that any
9617          * ticks that occurred while running the guest are properly accounted
9618          * to the guest.  Waiting until IRQs are enabled degrades the accuracy
9619          * of accounting via context tracking, but the loss of accuracy is
9620          * acceptable for all known use cases.
9621          */
9622         vtime_account_guest_exit();
9623
9624         if (lapic_in_kernel(vcpu)) {
9625                 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
9626                 if (delta != S64_MIN) {
9627                         trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
9628                         vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
9629                 }
9630         }
9631
9632         local_irq_enable();
9633         preempt_enable();
9634
9635         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9636
9637         /*
9638          * Profile KVM exit RIPs:
9639          */
9640         if (unlikely(prof_on == KVM_PROFILING)) {
9641                 unsigned long rip = kvm_rip_read(vcpu);
9642                 profile_hit(KVM_PROFILING, (void *)rip);
9643         }
9644
9645         if (unlikely(vcpu->arch.tsc_always_catchup))
9646                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
9647
9648         if (vcpu->arch.apic_attention)
9649                 kvm_lapic_sync_from_vapic(vcpu);
9650
9651         r = static_call(kvm_x86_handle_exit)(vcpu, exit_fastpath);
9652         return r;
9653
9654 cancel_injection:
9655         if (req_immediate_exit)
9656                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9657         static_call(kvm_x86_cancel_injection)(vcpu);
9658         if (unlikely(vcpu->arch.apic_attention))
9659                 kvm_lapic_sync_from_vapic(vcpu);
9660 out:
9661         return r;
9662 }
9663
9664 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
9665 {
9666         if (!kvm_arch_vcpu_runnable(vcpu) &&
9667             (!kvm_x86_ops.pre_block || static_call(kvm_x86_pre_block)(vcpu) == 0)) {
9668                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9669                 kvm_vcpu_block(vcpu);
9670                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9671
9672                 if (kvm_x86_ops.post_block)
9673                         static_call(kvm_x86_post_block)(vcpu);
9674
9675                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
9676                         return 1;
9677         }
9678
9679         if (kvm_apic_accept_events(vcpu) < 0)
9680                 return 0;
9681         switch(vcpu->arch.mp_state) {
9682         case KVM_MP_STATE_HALTED:
9683         case KVM_MP_STATE_AP_RESET_HOLD:
9684                 vcpu->arch.pv.pv_unhalted = false;
9685                 vcpu->arch.mp_state =
9686                         KVM_MP_STATE_RUNNABLE;
9687                 fallthrough;
9688         case KVM_MP_STATE_RUNNABLE:
9689                 vcpu->arch.apf.halted = false;
9690                 break;
9691         case KVM_MP_STATE_INIT_RECEIVED:
9692                 break;
9693         default:
9694                 return -EINTR;
9695         }
9696         return 1;
9697 }
9698
9699 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
9700 {
9701         if (is_guest_mode(vcpu))
9702                 kvm_check_nested_events(vcpu);
9703
9704         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
9705                 !vcpu->arch.apf.halted);
9706 }
9707
9708 static int vcpu_run(struct kvm_vcpu *vcpu)
9709 {
9710         int r;
9711         struct kvm *kvm = vcpu->kvm;
9712
9713         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9714         vcpu->arch.l1tf_flush_l1d = true;
9715
9716         for (;;) {
9717                 if (kvm_vcpu_running(vcpu)) {
9718                         r = vcpu_enter_guest(vcpu);
9719                 } else {
9720                         r = vcpu_block(kvm, vcpu);
9721                 }
9722
9723                 if (r <= 0)
9724                         break;
9725
9726                 kvm_clear_request(KVM_REQ_UNBLOCK, vcpu);
9727                 if (kvm_cpu_has_pending_timer(vcpu))
9728                         kvm_inject_pending_timer_irqs(vcpu);
9729
9730                 if (dm_request_for_irq_injection(vcpu) &&
9731                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
9732                         r = 0;
9733                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
9734                         ++vcpu->stat.request_irq_exits;
9735                         break;
9736                 }
9737
9738                 if (__xfer_to_guest_mode_work_pending()) {
9739                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9740                         r = xfer_to_guest_mode_handle_work(vcpu);
9741                         if (r)
9742                                 return r;
9743                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9744                 }
9745         }
9746
9747         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9748
9749         return r;
9750 }
9751
9752 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
9753 {
9754         int r;
9755
9756         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9757         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
9758         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9759         return r;
9760 }
9761
9762 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
9763 {
9764         BUG_ON(!vcpu->arch.pio.count);
9765
9766         return complete_emulated_io(vcpu);
9767 }
9768
9769 /*
9770  * Implements the following, as a state machine:
9771  *
9772  * read:
9773  *   for each fragment
9774  *     for each mmio piece in the fragment
9775  *       write gpa, len
9776  *       exit
9777  *       copy data
9778  *   execute insn
9779  *
9780  * write:
9781  *   for each fragment
9782  *     for each mmio piece in the fragment
9783  *       write gpa, len
9784  *       copy data
9785  *       exit
9786  */
9787 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
9788 {
9789         struct kvm_run *run = vcpu->run;
9790         struct kvm_mmio_fragment *frag;
9791         unsigned len;
9792
9793         BUG_ON(!vcpu->mmio_needed);
9794
9795         /* Complete previous fragment */
9796         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
9797         len = min(8u, frag->len);
9798         if (!vcpu->mmio_is_write)
9799                 memcpy(frag->data, run->mmio.data, len);
9800
9801         if (frag->len <= 8) {
9802                 /* Switch to the next fragment. */
9803                 frag++;
9804                 vcpu->mmio_cur_fragment++;
9805         } else {
9806                 /* Go forward to the next mmio piece. */
9807                 frag->data += len;
9808                 frag->gpa += len;
9809                 frag->len -= len;
9810         }
9811
9812         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
9813                 vcpu->mmio_needed = 0;
9814
9815                 /* FIXME: return into emulator if single-stepping.  */
9816                 if (vcpu->mmio_is_write)
9817                         return 1;
9818                 vcpu->mmio_read_completed = 1;
9819                 return complete_emulated_io(vcpu);
9820         }
9821
9822         run->exit_reason = KVM_EXIT_MMIO;
9823         run->mmio.phys_addr = frag->gpa;
9824         if (vcpu->mmio_is_write)
9825                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
9826         run->mmio.len = min(8u, frag->len);
9827         run->mmio.is_write = vcpu->mmio_is_write;
9828         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
9829         return 0;
9830 }
9831
9832 static void kvm_save_current_fpu(struct fpu *fpu)
9833 {
9834         /*
9835          * If the target FPU state is not resident in the CPU registers, just
9836          * memcpy() from current, else save CPU state directly to the target.
9837          */
9838         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9839                 memcpy(&fpu->state, &current->thread.fpu.state,
9840                        fpu_kernel_xstate_size);
9841         else
9842                 copy_fpregs_to_fpstate(fpu);
9843 }
9844
9845 /* Swap (qemu) user FPU context for the guest FPU context. */
9846 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
9847 {
9848         fpregs_lock();
9849
9850         kvm_save_current_fpu(vcpu->arch.user_fpu);
9851
9852         /*
9853          * Guests with protected state can't have it set by the hypervisor,
9854          * so skip trying to set it.
9855          */
9856         if (vcpu->arch.guest_fpu)
9857                 /* PKRU is separately restored in kvm_x86_ops.run. */
9858                 __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu->state,
9859                                         ~XFEATURE_MASK_PKRU);
9860
9861         fpregs_mark_activate();
9862         fpregs_unlock();
9863
9864         trace_kvm_fpu(1);
9865 }
9866
9867 /* When vcpu_run ends, restore user space FPU context. */
9868 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
9869 {
9870         fpregs_lock();
9871
9872         /*
9873          * Guests with protected state can't have it read by the hypervisor,
9874          * so skip trying to save it.
9875          */
9876         if (vcpu->arch.guest_fpu)
9877                 kvm_save_current_fpu(vcpu->arch.guest_fpu);
9878
9879         copy_kernel_to_fpregs(&vcpu->arch.user_fpu->state);
9880
9881         fpregs_mark_activate();
9882         fpregs_unlock();
9883
9884         ++vcpu->stat.fpu_reload;
9885         trace_kvm_fpu(0);
9886 }
9887
9888 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
9889 {
9890         struct kvm_run *kvm_run = vcpu->run;
9891         int r;
9892
9893         vcpu_load(vcpu);
9894         kvm_sigset_activate(vcpu);
9895         kvm_run->flags = 0;
9896         kvm_load_guest_fpu(vcpu);
9897
9898         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
9899                 if (kvm_run->immediate_exit) {
9900                         r = -EINTR;
9901                         goto out;
9902                 }
9903                 kvm_vcpu_block(vcpu);
9904                 if (kvm_apic_accept_events(vcpu) < 0) {
9905                         r = 0;
9906                         goto out;
9907                 }
9908                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
9909                 r = -EAGAIN;
9910                 if (signal_pending(current)) {
9911                         r = -EINTR;
9912                         kvm_run->exit_reason = KVM_EXIT_INTR;
9913                         ++vcpu->stat.signal_exits;
9914                 }
9915                 goto out;
9916         }
9917
9918         if (kvm_run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
9919                 r = -EINVAL;
9920                 goto out;
9921         }
9922
9923         if (kvm_run->kvm_dirty_regs) {
9924                 r = sync_regs(vcpu);
9925                 if (r != 0)
9926                         goto out;
9927         }
9928
9929         /* re-sync apic's tpr */
9930         if (!lapic_in_kernel(vcpu)) {
9931                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
9932                         r = -EINVAL;
9933                         goto out;
9934                 }
9935         }
9936
9937         if (unlikely(vcpu->arch.complete_userspace_io)) {
9938                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
9939                 vcpu->arch.complete_userspace_io = NULL;
9940                 r = cui(vcpu);
9941                 if (r <= 0)
9942                         goto out;
9943         } else
9944                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
9945
9946         if (kvm_run->immediate_exit)
9947                 r = -EINTR;
9948         else
9949                 r = vcpu_run(vcpu);
9950
9951 out:
9952         kvm_put_guest_fpu(vcpu);
9953         if (kvm_run->kvm_valid_regs)
9954                 store_regs(vcpu);
9955         post_kvm_run_save(vcpu);
9956         kvm_sigset_deactivate(vcpu);
9957
9958         vcpu_put(vcpu);
9959         return r;
9960 }
9961
9962 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9963 {
9964         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
9965                 /*
9966                  * We are here if userspace calls get_regs() in the middle of
9967                  * instruction emulation. Registers state needs to be copied
9968                  * back from emulation context to vcpu. Userspace shouldn't do
9969                  * that usually, but some bad designed PV devices (vmware
9970                  * backdoor interface) need this to work
9971                  */
9972                 emulator_writeback_register_cache(vcpu->arch.emulate_ctxt);
9973                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
9974         }
9975         regs->rax = kvm_rax_read(vcpu);
9976         regs->rbx = kvm_rbx_read(vcpu);
9977         regs->rcx = kvm_rcx_read(vcpu);
9978         regs->rdx = kvm_rdx_read(vcpu);
9979         regs->rsi = kvm_rsi_read(vcpu);
9980         regs->rdi = kvm_rdi_read(vcpu);
9981         regs->rsp = kvm_rsp_read(vcpu);
9982         regs->rbp = kvm_rbp_read(vcpu);
9983 #ifdef CONFIG_X86_64
9984         regs->r8 = kvm_r8_read(vcpu);
9985         regs->r9 = kvm_r9_read(vcpu);
9986         regs->r10 = kvm_r10_read(vcpu);
9987         regs->r11 = kvm_r11_read(vcpu);
9988         regs->r12 = kvm_r12_read(vcpu);
9989         regs->r13 = kvm_r13_read(vcpu);
9990         regs->r14 = kvm_r14_read(vcpu);
9991         regs->r15 = kvm_r15_read(vcpu);
9992 #endif
9993
9994         regs->rip = kvm_rip_read(vcpu);
9995         regs->rflags = kvm_get_rflags(vcpu);
9996 }
9997
9998 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9999 {
10000         vcpu_load(vcpu);
10001         __get_regs(vcpu, regs);
10002         vcpu_put(vcpu);
10003         return 0;
10004 }
10005
10006 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10007 {
10008         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
10009         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
10010
10011         kvm_rax_write(vcpu, regs->rax);
10012         kvm_rbx_write(vcpu, regs->rbx);
10013         kvm_rcx_write(vcpu, regs->rcx);
10014         kvm_rdx_write(vcpu, regs->rdx);
10015         kvm_rsi_write(vcpu, regs->rsi);
10016         kvm_rdi_write(vcpu, regs->rdi);
10017         kvm_rsp_write(vcpu, regs->rsp);
10018         kvm_rbp_write(vcpu, regs->rbp);
10019 #ifdef CONFIG_X86_64
10020         kvm_r8_write(vcpu, regs->r8);
10021         kvm_r9_write(vcpu, regs->r9);
10022         kvm_r10_write(vcpu, regs->r10);
10023         kvm_r11_write(vcpu, regs->r11);
10024         kvm_r12_write(vcpu, regs->r12);
10025         kvm_r13_write(vcpu, regs->r13);
10026         kvm_r14_write(vcpu, regs->r14);
10027         kvm_r15_write(vcpu, regs->r15);
10028 #endif
10029
10030         kvm_rip_write(vcpu, regs->rip);
10031         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
10032
10033         vcpu->arch.exception.pending = false;
10034
10035         kvm_make_request(KVM_REQ_EVENT, vcpu);
10036 }
10037
10038 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10039 {
10040         vcpu_load(vcpu);
10041         __set_regs(vcpu, regs);
10042         vcpu_put(vcpu);
10043         return 0;
10044 }
10045
10046 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
10047 {
10048         struct kvm_segment cs;
10049
10050         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
10051         *db = cs.db;
10052         *l = cs.l;
10053 }
10054 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
10055
10056 static void __get_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10057 {
10058         struct desc_ptr dt;
10059
10060         if (vcpu->arch.guest_state_protected)
10061                 goto skip_protected_regs;
10062
10063         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10064         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10065         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10066         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10067         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10068         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10069
10070         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10071         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10072
10073         static_call(kvm_x86_get_idt)(vcpu, &dt);
10074         sregs->idt.limit = dt.size;
10075         sregs->idt.base = dt.address;
10076         static_call(kvm_x86_get_gdt)(vcpu, &dt);
10077         sregs->gdt.limit = dt.size;
10078         sregs->gdt.base = dt.address;
10079
10080         sregs->cr2 = vcpu->arch.cr2;
10081         sregs->cr3 = kvm_read_cr3(vcpu);
10082
10083 skip_protected_regs:
10084         sregs->cr0 = kvm_read_cr0(vcpu);
10085         sregs->cr4 = kvm_read_cr4(vcpu);
10086         sregs->cr8 = kvm_get_cr8(vcpu);
10087         sregs->efer = vcpu->arch.efer;
10088         sregs->apic_base = kvm_get_apic_base(vcpu);
10089 }
10090
10091 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10092 {
10093         __get_sregs_common(vcpu, sregs);
10094
10095         if (vcpu->arch.guest_state_protected)
10096                 return;
10097
10098         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
10099                 set_bit(vcpu->arch.interrupt.nr,
10100                         (unsigned long *)sregs->interrupt_bitmap);
10101 }
10102
10103 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
10104 {
10105         int i;
10106
10107         __get_sregs_common(vcpu, (struct kvm_sregs *)sregs2);
10108
10109         if (vcpu->arch.guest_state_protected)
10110                 return;
10111
10112         if (is_pae_paging(vcpu)) {
10113                 for (i = 0 ; i < 4 ; i++)
10114                         sregs2->pdptrs[i] = kvm_pdptr_read(vcpu, i);
10115                 sregs2->flags |= KVM_SREGS2_FLAGS_PDPTRS_VALID;
10116         }
10117 }
10118
10119 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
10120                                   struct kvm_sregs *sregs)
10121 {
10122         vcpu_load(vcpu);
10123         __get_sregs(vcpu, sregs);
10124         vcpu_put(vcpu);
10125         return 0;
10126 }
10127
10128 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
10129                                     struct kvm_mp_state *mp_state)
10130 {
10131         int r;
10132
10133         vcpu_load(vcpu);
10134         if (kvm_mpx_supported())
10135                 kvm_load_guest_fpu(vcpu);
10136
10137         r = kvm_apic_accept_events(vcpu);
10138         if (r < 0)
10139                 goto out;
10140         r = 0;
10141
10142         if ((vcpu->arch.mp_state == KVM_MP_STATE_HALTED ||
10143              vcpu->arch.mp_state == KVM_MP_STATE_AP_RESET_HOLD) &&
10144             vcpu->arch.pv.pv_unhalted)
10145                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
10146         else
10147                 mp_state->mp_state = vcpu->arch.mp_state;
10148
10149 out:
10150         if (kvm_mpx_supported())
10151                 kvm_put_guest_fpu(vcpu);
10152         vcpu_put(vcpu);
10153         return r;
10154 }
10155
10156 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
10157                                     struct kvm_mp_state *mp_state)
10158 {
10159         int ret = -EINVAL;
10160
10161         vcpu_load(vcpu);
10162
10163         if (!lapic_in_kernel(vcpu) &&
10164             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
10165                 goto out;
10166
10167         /*
10168          * KVM_MP_STATE_INIT_RECEIVED means the processor is in
10169          * INIT state; latched init should be reported using
10170          * KVM_SET_VCPU_EVENTS, so reject it here.
10171          */
10172         if ((kvm_vcpu_latch_init(vcpu) || vcpu->arch.smi_pending) &&
10173             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
10174              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
10175                 goto out;
10176
10177         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
10178                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
10179                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
10180         } else
10181                 vcpu->arch.mp_state = mp_state->mp_state;
10182         kvm_make_request(KVM_REQ_EVENT, vcpu);
10183
10184         ret = 0;
10185 out:
10186         vcpu_put(vcpu);
10187         return ret;
10188 }
10189
10190 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
10191                     int reason, bool has_error_code, u32 error_code)
10192 {
10193         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
10194         int ret;
10195
10196         init_emulate_ctxt(vcpu);
10197
10198         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
10199                                    has_error_code, error_code);
10200         if (ret) {
10201                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
10202                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
10203                 vcpu->run->internal.ndata = 0;
10204                 return 0;
10205         }
10206
10207         kvm_rip_write(vcpu, ctxt->eip);
10208         kvm_set_rflags(vcpu, ctxt->eflags);
10209         return 1;
10210 }
10211 EXPORT_SYMBOL_GPL(kvm_task_switch);
10212
10213 static bool kvm_is_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10214 {
10215         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
10216                 /*
10217                  * When EFER.LME and CR0.PG are set, the processor is in
10218                  * 64-bit mode (though maybe in a 32-bit code segment).
10219                  * CR4.PAE and EFER.LMA must be set.
10220                  */
10221                 if (!(sregs->cr4 & X86_CR4_PAE) || !(sregs->efer & EFER_LMA))
10222                         return false;
10223                 if (kvm_vcpu_is_illegal_gpa(vcpu, sregs->cr3))
10224                         return false;
10225         } else {
10226                 /*
10227                  * Not in 64-bit mode: EFER.LMA is clear and the code
10228                  * segment cannot be 64-bit.
10229                  */
10230                 if (sregs->efer & EFER_LMA || sregs->cs.l)
10231                         return false;
10232         }
10233
10234         return kvm_is_valid_cr4(vcpu, sregs->cr4);
10235 }
10236
10237 static int __set_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs,
10238                 int *mmu_reset_needed, bool update_pdptrs)
10239 {
10240         struct msr_data apic_base_msr;
10241         int idx;
10242         struct desc_ptr dt;
10243
10244         if (!kvm_is_valid_sregs(vcpu, sregs))
10245                 return -EINVAL;
10246
10247         apic_base_msr.data = sregs->apic_base;
10248         apic_base_msr.host_initiated = true;
10249         if (kvm_set_apic_base(vcpu, &apic_base_msr))
10250                 return -EINVAL;
10251
10252         if (vcpu->arch.guest_state_protected)
10253                 return 0;
10254
10255         dt.size = sregs->idt.limit;
10256         dt.address = sregs->idt.base;
10257         static_call(kvm_x86_set_idt)(vcpu, &dt);
10258         dt.size = sregs->gdt.limit;
10259         dt.address = sregs->gdt.base;
10260         static_call(kvm_x86_set_gdt)(vcpu, &dt);
10261
10262         vcpu->arch.cr2 = sregs->cr2;
10263         *mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
10264         vcpu->arch.cr3 = sregs->cr3;
10265         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
10266
10267         kvm_set_cr8(vcpu, sregs->cr8);
10268
10269         *mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
10270         static_call(kvm_x86_set_efer)(vcpu, sregs->efer);
10271
10272         *mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
10273         static_call(kvm_x86_set_cr0)(vcpu, sregs->cr0);
10274         vcpu->arch.cr0 = sregs->cr0;
10275
10276         *mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
10277         static_call(kvm_x86_set_cr4)(vcpu, sregs->cr4);
10278
10279         if (update_pdptrs) {
10280                 idx = srcu_read_lock(&vcpu->kvm->srcu);
10281                 if (is_pae_paging(vcpu)) {
10282                         load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
10283                         *mmu_reset_needed = 1;
10284                 }
10285                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
10286         }
10287
10288         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10289         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10290         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10291         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10292         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10293         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10294
10295         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10296         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10297
10298         update_cr8_intercept(vcpu);
10299
10300         /* Older userspace won't unhalt the vcpu on reset. */
10301         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
10302             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
10303             !is_protmode(vcpu))
10304                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10305
10306         return 0;
10307 }
10308
10309 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10310 {
10311         int pending_vec, max_bits;
10312         int mmu_reset_needed = 0;
10313         int ret = __set_sregs_common(vcpu, sregs, &mmu_reset_needed, true);
10314
10315         if (ret)
10316                 return ret;
10317
10318         if (mmu_reset_needed)
10319                 kvm_mmu_reset_context(vcpu);
10320
10321         max_bits = KVM_NR_INTERRUPTS;
10322         pending_vec = find_first_bit(
10323                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
10324
10325         if (pending_vec < max_bits) {
10326                 kvm_queue_interrupt(vcpu, pending_vec, false);
10327                 pr_debug("Set back pending irq %d\n", pending_vec);
10328                 kvm_make_request(KVM_REQ_EVENT, vcpu);
10329         }
10330         return 0;
10331 }
10332
10333 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
10334 {
10335         int mmu_reset_needed = 0;
10336         bool valid_pdptrs = sregs2->flags & KVM_SREGS2_FLAGS_PDPTRS_VALID;
10337         bool pae = (sregs2->cr0 & X86_CR0_PG) && (sregs2->cr4 & X86_CR4_PAE) &&
10338                 !(sregs2->efer & EFER_LMA);
10339         int i, ret;
10340
10341         if (sregs2->flags & ~KVM_SREGS2_FLAGS_PDPTRS_VALID)
10342                 return -EINVAL;
10343
10344         if (valid_pdptrs && (!pae || vcpu->arch.guest_state_protected))
10345                 return -EINVAL;
10346
10347         ret = __set_sregs_common(vcpu, (struct kvm_sregs *)sregs2,
10348                                  &mmu_reset_needed, !valid_pdptrs);
10349         if (ret)
10350                 return ret;
10351
10352         if (valid_pdptrs) {
10353                 for (i = 0; i < 4 ; i++)
10354                         kvm_pdptr_write(vcpu, i, sregs2->pdptrs[i]);
10355
10356                 kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
10357                 mmu_reset_needed = 1;
10358                 vcpu->arch.pdptrs_from_userspace = true;
10359         }
10360         if (mmu_reset_needed)
10361                 kvm_mmu_reset_context(vcpu);
10362         return 0;
10363 }
10364
10365 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
10366                                   struct kvm_sregs *sregs)
10367 {
10368         int ret;
10369
10370         vcpu_load(vcpu);
10371         ret = __set_sregs(vcpu, sregs);
10372         vcpu_put(vcpu);
10373         return ret;
10374 }
10375
10376 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
10377                                         struct kvm_guest_debug *dbg)
10378 {
10379         unsigned long rflags;
10380         int i, r;
10381
10382         if (vcpu->arch.guest_state_protected)
10383                 return -EINVAL;
10384
10385         vcpu_load(vcpu);
10386
10387         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
10388                 r = -EBUSY;
10389                 if (vcpu->arch.exception.pending)
10390                         goto out;
10391                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
10392                         kvm_queue_exception(vcpu, DB_VECTOR);
10393                 else
10394                         kvm_queue_exception(vcpu, BP_VECTOR);
10395         }
10396
10397         /*
10398          * Read rflags as long as potentially injected trace flags are still
10399          * filtered out.
10400          */
10401         rflags = kvm_get_rflags(vcpu);
10402
10403         vcpu->guest_debug = dbg->control;
10404         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
10405                 vcpu->guest_debug = 0;
10406
10407         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
10408                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
10409                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
10410                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
10411         } else {
10412                 for (i = 0; i < KVM_NR_DB_REGS; i++)
10413                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
10414         }
10415         kvm_update_dr7(vcpu);
10416
10417         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
10418                 vcpu->arch.singlestep_rip = kvm_get_linear_rip(vcpu);
10419
10420         /*
10421          * Trigger an rflags update that will inject or remove the trace
10422          * flags.
10423          */
10424         kvm_set_rflags(vcpu, rflags);
10425
10426         static_call(kvm_x86_update_exception_bitmap)(vcpu);
10427
10428         r = 0;
10429
10430 out:
10431         vcpu_put(vcpu);
10432         return r;
10433 }
10434
10435 /*
10436  * Translate a guest virtual address to a guest physical address.
10437  */
10438 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
10439                                     struct kvm_translation *tr)
10440 {
10441         unsigned long vaddr = tr->linear_address;
10442         gpa_t gpa;
10443         int idx;
10444
10445         vcpu_load(vcpu);
10446
10447         idx = srcu_read_lock(&vcpu->kvm->srcu);
10448         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
10449         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10450         tr->physical_address = gpa;
10451         tr->valid = gpa != UNMAPPED_GVA;
10452         tr->writeable = 1;
10453         tr->usermode = 0;
10454
10455         vcpu_put(vcpu);
10456         return 0;
10457 }
10458
10459 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10460 {
10461         struct fxregs_state *fxsave;
10462
10463         if (!vcpu->arch.guest_fpu)
10464                 return 0;
10465
10466         vcpu_load(vcpu);
10467
10468         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
10469         memcpy(fpu->fpr, fxsave->st_space, 128);
10470         fpu->fcw = fxsave->cwd;
10471         fpu->fsw = fxsave->swd;
10472         fpu->ftwx = fxsave->twd;
10473         fpu->last_opcode = fxsave->fop;
10474         fpu->last_ip = fxsave->rip;
10475         fpu->last_dp = fxsave->rdp;
10476         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
10477
10478         vcpu_put(vcpu);
10479         return 0;
10480 }
10481
10482 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10483 {
10484         struct fxregs_state *fxsave;
10485
10486         if (!vcpu->arch.guest_fpu)
10487                 return 0;
10488
10489         vcpu_load(vcpu);
10490
10491         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
10492
10493         memcpy(fxsave->st_space, fpu->fpr, 128);
10494         fxsave->cwd = fpu->fcw;
10495         fxsave->swd = fpu->fsw;
10496         fxsave->twd = fpu->ftwx;
10497         fxsave->fop = fpu->last_opcode;
10498         fxsave->rip = fpu->last_ip;
10499         fxsave->rdp = fpu->last_dp;
10500         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
10501
10502         vcpu_put(vcpu);
10503         return 0;
10504 }
10505
10506 static void store_regs(struct kvm_vcpu *vcpu)
10507 {
10508         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
10509
10510         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
10511                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
10512
10513         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
10514                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
10515
10516         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
10517                 kvm_vcpu_ioctl_x86_get_vcpu_events(
10518                                 vcpu, &vcpu->run->s.regs.events);
10519 }
10520
10521 static int sync_regs(struct kvm_vcpu *vcpu)
10522 {
10523         if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
10524                 return -EINVAL;
10525
10526         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
10527                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
10528                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
10529         }
10530         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
10531                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
10532                         return -EINVAL;
10533                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
10534         }
10535         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
10536                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
10537                                 vcpu, &vcpu->run->s.regs.events))
10538                         return -EINVAL;
10539                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
10540         }
10541
10542         return 0;
10543 }
10544
10545 static void fx_init(struct kvm_vcpu *vcpu)
10546 {
10547         if (!vcpu->arch.guest_fpu)
10548                 return;
10549
10550         fpstate_init(&vcpu->arch.guest_fpu->state);
10551         if (boot_cpu_has(X86_FEATURE_XSAVES))
10552                 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
10553                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
10554
10555         /*
10556          * Ensure guest xcr0 is valid for loading
10557          */
10558         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10559
10560         vcpu->arch.cr0 |= X86_CR0_ET;
10561 }
10562
10563 void kvm_free_guest_fpu(struct kvm_vcpu *vcpu)
10564 {
10565         if (vcpu->arch.guest_fpu) {
10566                 kmem_cache_free(x86_fpu_cache, vcpu->arch.guest_fpu);
10567                 vcpu->arch.guest_fpu = NULL;
10568         }
10569 }
10570 EXPORT_SYMBOL_GPL(kvm_free_guest_fpu);
10571
10572 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
10573 {
10574         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
10575                 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
10576                              "guest TSC will not be reliable\n");
10577
10578         return 0;
10579 }
10580
10581 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
10582 {
10583         struct page *page;
10584         int r;
10585
10586         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
10587                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10588         else
10589                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
10590
10591         r = kvm_mmu_create(vcpu);
10592         if (r < 0)
10593                 return r;
10594
10595         if (irqchip_in_kernel(vcpu->kvm)) {
10596                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
10597                 if (r < 0)
10598                         goto fail_mmu_destroy;
10599                 if (kvm_apicv_activated(vcpu->kvm))
10600                         vcpu->arch.apicv_active = true;
10601         } else
10602                 static_branch_inc(&kvm_has_noapic_vcpu);
10603
10604         r = -ENOMEM;
10605
10606         page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO);
10607         if (!page)
10608                 goto fail_free_lapic;
10609         vcpu->arch.pio_data = page_address(page);
10610
10611         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
10612                                        GFP_KERNEL_ACCOUNT);
10613         if (!vcpu->arch.mce_banks)
10614                 goto fail_free_pio_data;
10615         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
10616
10617         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
10618                                 GFP_KERNEL_ACCOUNT))
10619                 goto fail_free_mce_banks;
10620
10621         if (!alloc_emulate_ctxt(vcpu))
10622                 goto free_wbinvd_dirty_mask;
10623
10624         vcpu->arch.user_fpu = kmem_cache_zalloc(x86_fpu_cache,
10625                                                 GFP_KERNEL_ACCOUNT);
10626         if (!vcpu->arch.user_fpu) {
10627                 pr_err("kvm: failed to allocate userspace's fpu\n");
10628                 goto free_emulate_ctxt;
10629         }
10630
10631         vcpu->arch.guest_fpu = kmem_cache_zalloc(x86_fpu_cache,
10632                                                  GFP_KERNEL_ACCOUNT);
10633         if (!vcpu->arch.guest_fpu) {
10634                 pr_err("kvm: failed to allocate vcpu's fpu\n");
10635                 goto free_user_fpu;
10636         }
10637         fx_init(vcpu);
10638
10639         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
10640         vcpu->arch.reserved_gpa_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu);
10641
10642         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
10643
10644         kvm_async_pf_hash_reset(vcpu);
10645         kvm_pmu_init(vcpu);
10646
10647         vcpu->arch.pending_external_vector = -1;
10648         vcpu->arch.preempted_in_kernel = false;
10649
10650 #if IS_ENABLED(CONFIG_HYPERV)
10651         vcpu->arch.hv_root_tdp = INVALID_PAGE;
10652 #endif
10653
10654         r = static_call(kvm_x86_vcpu_create)(vcpu);
10655         if (r)
10656                 goto free_guest_fpu;
10657
10658         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
10659         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
10660         kvm_vcpu_mtrr_init(vcpu);
10661         vcpu_load(vcpu);
10662         kvm_set_tsc_khz(vcpu, max_tsc_khz);
10663         kvm_vcpu_reset(vcpu, false);
10664         kvm_init_mmu(vcpu);
10665         vcpu_put(vcpu);
10666         return 0;
10667
10668 free_guest_fpu:
10669         kvm_free_guest_fpu(vcpu);
10670 free_user_fpu:
10671         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
10672 free_emulate_ctxt:
10673         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10674 free_wbinvd_dirty_mask:
10675         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10676 fail_free_mce_banks:
10677         kfree(vcpu->arch.mce_banks);
10678 fail_free_pio_data:
10679         free_page((unsigned long)vcpu->arch.pio_data);
10680 fail_free_lapic:
10681         kvm_free_lapic(vcpu);
10682 fail_mmu_destroy:
10683         kvm_mmu_destroy(vcpu);
10684         return r;
10685 }
10686
10687 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
10688 {
10689         struct kvm *kvm = vcpu->kvm;
10690
10691         if (mutex_lock_killable(&vcpu->mutex))
10692                 return;
10693         vcpu_load(vcpu);
10694         kvm_synchronize_tsc(vcpu, 0);
10695         vcpu_put(vcpu);
10696
10697         /* poll control enabled by default */
10698         vcpu->arch.msr_kvm_poll_control = 1;
10699
10700         mutex_unlock(&vcpu->mutex);
10701
10702         if (kvmclock_periodic_sync && vcpu->vcpu_idx == 0)
10703                 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
10704                                                 KVMCLOCK_SYNC_PERIOD);
10705 }
10706
10707 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
10708 {
10709         struct gfn_to_pfn_cache *cache = &vcpu->arch.st.cache;
10710         int idx;
10711
10712         kvm_release_pfn(cache->pfn, cache->dirty, cache);
10713
10714         kvmclock_reset(vcpu);
10715
10716         static_call(kvm_x86_vcpu_free)(vcpu);
10717
10718         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10719         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10720         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
10721         kvm_free_guest_fpu(vcpu);
10722
10723         kvm_hv_vcpu_uninit(vcpu);
10724         kvm_pmu_destroy(vcpu);
10725         kfree(vcpu->arch.mce_banks);
10726         kvm_free_lapic(vcpu);
10727         idx = srcu_read_lock(&vcpu->kvm->srcu);
10728         kvm_mmu_destroy(vcpu);
10729         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10730         free_page((unsigned long)vcpu->arch.pio_data);
10731         kvfree(vcpu->arch.cpuid_entries);
10732         if (!lapic_in_kernel(vcpu))
10733                 static_branch_dec(&kvm_has_noapic_vcpu);
10734 }
10735
10736 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
10737 {
10738         kvm_lapic_reset(vcpu, init_event);
10739
10740         vcpu->arch.hflags = 0;
10741
10742         vcpu->arch.smi_pending = 0;
10743         vcpu->arch.smi_count = 0;
10744         atomic_set(&vcpu->arch.nmi_queued, 0);
10745         vcpu->arch.nmi_pending = 0;
10746         vcpu->arch.nmi_injected = false;
10747         kvm_clear_interrupt_queue(vcpu);
10748         kvm_clear_exception_queue(vcpu);
10749
10750         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
10751         kvm_update_dr0123(vcpu);
10752         vcpu->arch.dr6 = DR6_ACTIVE_LOW;
10753         vcpu->arch.dr7 = DR7_FIXED_1;
10754         kvm_update_dr7(vcpu);
10755
10756         vcpu->arch.cr2 = 0;
10757
10758         kvm_make_request(KVM_REQ_EVENT, vcpu);
10759         vcpu->arch.apf.msr_en_val = 0;
10760         vcpu->arch.apf.msr_int_val = 0;
10761         vcpu->arch.st.msr_val = 0;
10762
10763         kvmclock_reset(vcpu);
10764
10765         kvm_clear_async_pf_completion_queue(vcpu);
10766         kvm_async_pf_hash_reset(vcpu);
10767         vcpu->arch.apf.halted = false;
10768
10769         if (vcpu->arch.guest_fpu && kvm_mpx_supported()) {
10770                 void *mpx_state_buffer;
10771
10772                 /*
10773                  * To avoid have the INIT path from kvm_apic_has_events() that be
10774                  * called with loaded FPU and does not let userspace fix the state.
10775                  */
10776                 if (init_event)
10777                         kvm_put_guest_fpu(vcpu);
10778                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10779                                         XFEATURE_BNDREGS);
10780                 if (mpx_state_buffer)
10781                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
10782                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10783                                         XFEATURE_BNDCSR);
10784                 if (mpx_state_buffer)
10785                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
10786                 if (init_event)
10787                         kvm_load_guest_fpu(vcpu);
10788         }
10789
10790         if (!init_event) {
10791                 kvm_pmu_reset(vcpu);
10792                 vcpu->arch.smbase = 0x30000;
10793
10794                 vcpu->arch.msr_misc_features_enables = 0;
10795
10796                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10797         }
10798
10799         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
10800         vcpu->arch.regs_avail = ~0;
10801         vcpu->arch.regs_dirty = ~0;
10802
10803         vcpu->arch.ia32_xss = 0;
10804
10805         static_call(kvm_x86_vcpu_reset)(vcpu, init_event);
10806 }
10807
10808 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
10809 {
10810         struct kvm_segment cs;
10811
10812         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
10813         cs.selector = vector << 8;
10814         cs.base = vector << 12;
10815         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
10816         kvm_rip_write(vcpu, 0);
10817 }
10818 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector);
10819
10820 int kvm_arch_hardware_enable(void)
10821 {
10822         struct kvm *kvm;
10823         struct kvm_vcpu *vcpu;
10824         int i;
10825         int ret;
10826         u64 local_tsc;
10827         u64 max_tsc = 0;
10828         bool stable, backwards_tsc = false;
10829
10830         kvm_user_return_msr_cpu_online();
10831         ret = static_call(kvm_x86_hardware_enable)();
10832         if (ret != 0)
10833                 return ret;
10834
10835         local_tsc = rdtsc();
10836         stable = !kvm_check_tsc_unstable();
10837         list_for_each_entry(kvm, &vm_list, vm_list) {
10838                 kvm_for_each_vcpu(i, vcpu, kvm) {
10839                         if (!stable && vcpu->cpu == smp_processor_id())
10840                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
10841                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
10842                                 backwards_tsc = true;
10843                                 if (vcpu->arch.last_host_tsc > max_tsc)
10844                                         max_tsc = vcpu->arch.last_host_tsc;
10845                         }
10846                 }
10847         }
10848
10849         /*
10850          * Sometimes, even reliable TSCs go backwards.  This happens on
10851          * platforms that reset TSC during suspend or hibernate actions, but
10852          * maintain synchronization.  We must compensate.  Fortunately, we can
10853          * detect that condition here, which happens early in CPU bringup,
10854          * before any KVM threads can be running.  Unfortunately, we can't
10855          * bring the TSCs fully up to date with real time, as we aren't yet far
10856          * enough into CPU bringup that we know how much real time has actually
10857          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
10858          * variables that haven't been updated yet.
10859          *
10860          * So we simply find the maximum observed TSC above, then record the
10861          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
10862          * the adjustment will be applied.  Note that we accumulate
10863          * adjustments, in case multiple suspend cycles happen before some VCPU
10864          * gets a chance to run again.  In the event that no KVM threads get a
10865          * chance to run, we will miss the entire elapsed period, as we'll have
10866          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
10867          * loose cycle time.  This isn't too big a deal, since the loss will be
10868          * uniform across all VCPUs (not to mention the scenario is extremely
10869          * unlikely). It is possible that a second hibernate recovery happens
10870          * much faster than a first, causing the observed TSC here to be
10871          * smaller; this would require additional padding adjustment, which is
10872          * why we set last_host_tsc to the local tsc observed here.
10873          *
10874          * N.B. - this code below runs only on platforms with reliable TSC,
10875          * as that is the only way backwards_tsc is set above.  Also note
10876          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
10877          * have the same delta_cyc adjustment applied if backwards_tsc
10878          * is detected.  Note further, this adjustment is only done once,
10879          * as we reset last_host_tsc on all VCPUs to stop this from being
10880          * called multiple times (one for each physical CPU bringup).
10881          *
10882          * Platforms with unreliable TSCs don't have to deal with this, they
10883          * will be compensated by the logic in vcpu_load, which sets the TSC to
10884          * catchup mode.  This will catchup all VCPUs to real time, but cannot
10885          * guarantee that they stay in perfect synchronization.
10886          */
10887         if (backwards_tsc) {
10888                 u64 delta_cyc = max_tsc - local_tsc;
10889                 list_for_each_entry(kvm, &vm_list, vm_list) {
10890                         kvm->arch.backwards_tsc_observed = true;
10891                         kvm_for_each_vcpu(i, vcpu, kvm) {
10892                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
10893                                 vcpu->arch.last_host_tsc = local_tsc;
10894                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
10895                         }
10896
10897                         /*
10898                          * We have to disable TSC offset matching.. if you were
10899                          * booting a VM while issuing an S4 host suspend....
10900                          * you may have some problem.  Solving this issue is
10901                          * left as an exercise to the reader.
10902                          */
10903                         kvm->arch.last_tsc_nsec = 0;
10904                         kvm->arch.last_tsc_write = 0;
10905                 }
10906
10907         }
10908         return 0;
10909 }
10910
10911 void kvm_arch_hardware_disable(void)
10912 {
10913         static_call(kvm_x86_hardware_disable)();
10914         drop_user_return_notifiers();
10915 }
10916
10917 int kvm_arch_hardware_setup(void *opaque)
10918 {
10919         struct kvm_x86_init_ops *ops = opaque;
10920         int r;
10921
10922         rdmsrl_safe(MSR_EFER, &host_efer);
10923         if (WARN_ON_ONCE(boot_cpu_has(X86_FEATURE_NX) &&
10924                          !(host_efer & EFER_NX)))
10925                 return -EIO;
10926
10927         if (boot_cpu_has(X86_FEATURE_XSAVES))
10928                 rdmsrl(MSR_IA32_XSS, host_xss);
10929
10930         r = ops->hardware_setup();
10931         if (r != 0)
10932                 return r;
10933
10934         memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops));
10935         kvm_ops_static_call_update();
10936
10937         if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
10938                 supported_xss = 0;
10939
10940 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
10941         cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
10942 #undef __kvm_cpu_cap_has
10943
10944         if (kvm_has_tsc_control) {
10945                 /*
10946                  * Make sure the user can only configure tsc_khz values that
10947                  * fit into a signed integer.
10948                  * A min value is not calculated because it will always
10949                  * be 1 on all machines.
10950                  */
10951                 u64 max = min(0x7fffffffULL,
10952                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
10953                 kvm_max_guest_tsc_khz = max;
10954
10955                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
10956         }
10957
10958         kvm_init_msr_list();
10959         return 0;
10960 }
10961
10962 void kvm_arch_hardware_unsetup(void)
10963 {
10964         static_call(kvm_x86_hardware_unsetup)();
10965 }
10966
10967 int kvm_arch_check_processor_compat(void *opaque)
10968 {
10969         struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
10970         struct kvm_x86_init_ops *ops = opaque;
10971
10972         WARN_ON(!irqs_disabled());
10973
10974         if (__cr4_reserved_bits(cpu_has, c) !=
10975             __cr4_reserved_bits(cpu_has, &boot_cpu_data))
10976                 return -EIO;
10977
10978         return ops->check_processor_compatibility();
10979 }
10980
10981 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
10982 {
10983         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
10984 }
10985 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
10986
10987 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
10988 {
10989         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
10990 }
10991
10992 __read_mostly DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu);
10993 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu);
10994
10995 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
10996 {
10997         struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
10998
10999         vcpu->arch.l1tf_flush_l1d = true;
11000         if (pmu->version && unlikely(pmu->event_count)) {
11001                 pmu->need_cleanup = true;
11002                 kvm_make_request(KVM_REQ_PMU, vcpu);
11003         }
11004         static_call(kvm_x86_sched_in)(vcpu, cpu);
11005 }
11006
11007 void kvm_arch_free_vm(struct kvm *kvm)
11008 {
11009         kfree(to_kvm_hv(kvm)->hv_pa_pg);
11010         vfree(kvm);
11011 }
11012
11013
11014 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
11015 {
11016         if (type)
11017                 return -EINVAL;
11018
11019         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
11020         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
11021         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
11022         INIT_LIST_HEAD(&kvm->arch.lpage_disallowed_mmu_pages);
11023         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
11024         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
11025
11026         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
11027         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
11028         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
11029         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
11030                 &kvm->arch.irq_sources_bitmap);
11031
11032         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
11033         mutex_init(&kvm->arch.apic_map_lock);
11034         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
11035
11036         kvm->arch.kvmclock_offset = -get_kvmclock_base_ns();
11037         pvclock_update_vm_gtod_copy(kvm);
11038
11039         kvm->arch.guest_can_read_msr_platform_info = true;
11040
11041 #if IS_ENABLED(CONFIG_HYPERV)
11042         spin_lock_init(&kvm->arch.hv_root_tdp_lock);
11043         kvm->arch.hv_root_tdp = INVALID_PAGE;
11044 #endif
11045
11046         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
11047         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
11048
11049         kvm_apicv_init(kvm);
11050         kvm_hv_init_vm(kvm);
11051         kvm_page_track_init(kvm);
11052         kvm_mmu_init_vm(kvm);
11053
11054         return static_call(kvm_x86_vm_init)(kvm);
11055 }
11056
11057 int kvm_arch_post_init_vm(struct kvm *kvm)
11058 {
11059         return kvm_mmu_post_init_vm(kvm);
11060 }
11061
11062 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
11063 {
11064         vcpu_load(vcpu);
11065         kvm_mmu_unload(vcpu);
11066         vcpu_put(vcpu);
11067 }
11068
11069 static void kvm_free_vcpus(struct kvm *kvm)
11070 {
11071         unsigned int i;
11072         struct kvm_vcpu *vcpu;
11073
11074         /*
11075          * Unpin any mmu pages first.
11076          */
11077         kvm_for_each_vcpu(i, vcpu, kvm) {
11078                 kvm_clear_async_pf_completion_queue(vcpu);
11079                 kvm_unload_vcpu_mmu(vcpu);
11080         }
11081         kvm_for_each_vcpu(i, vcpu, kvm)
11082                 kvm_vcpu_destroy(vcpu);
11083
11084         mutex_lock(&kvm->lock);
11085         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
11086                 kvm->vcpus[i] = NULL;
11087
11088         atomic_set(&kvm->online_vcpus, 0);
11089         mutex_unlock(&kvm->lock);
11090 }
11091
11092 void kvm_arch_sync_events(struct kvm *kvm)
11093 {
11094         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
11095         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
11096         kvm_free_pit(kvm);
11097 }
11098
11099 #define  ERR_PTR_USR(e)  ((void __user *)ERR_PTR(e))
11100
11101 /**
11102  * __x86_set_memory_region: Setup KVM internal memory slot
11103  *
11104  * @kvm: the kvm pointer to the VM.
11105  * @id: the slot ID to setup.
11106  * @gpa: the GPA to install the slot (unused when @size == 0).
11107  * @size: the size of the slot. Set to zero to uninstall a slot.
11108  *
11109  * This function helps to setup a KVM internal memory slot.  Specify
11110  * @size > 0 to install a new slot, while @size == 0 to uninstall a
11111  * slot.  The return code can be one of the following:
11112  *
11113  *   HVA:           on success (uninstall will return a bogus HVA)
11114  *   -errno:        on error
11115  *
11116  * The caller should always use IS_ERR() to check the return value
11117  * before use.  Note, the KVM internal memory slots are guaranteed to
11118  * remain valid and unchanged until the VM is destroyed, i.e., the
11119  * GPA->HVA translation will not change.  However, the HVA is a user
11120  * address, i.e. its accessibility is not guaranteed, and must be
11121  * accessed via __copy_{to,from}_user().
11122  */
11123 void __user * __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
11124                                       u32 size)
11125 {
11126         int i, r;
11127         unsigned long hva, old_npages;
11128         struct kvm_memslots *slots = kvm_memslots(kvm);
11129         struct kvm_memory_slot *slot;
11130
11131         /* Called with kvm->slots_lock held.  */
11132         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
11133                 return ERR_PTR_USR(-EINVAL);
11134
11135         slot = id_to_memslot(slots, id);
11136         if (size) {
11137                 if (slot && slot->npages)
11138                         return ERR_PTR_USR(-EEXIST);
11139
11140                 /*
11141                  * MAP_SHARED to prevent internal slot pages from being moved
11142                  * by fork()/COW.
11143                  */
11144                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
11145                               MAP_SHARED | MAP_ANONYMOUS, 0);
11146                 if (IS_ERR((void *)hva))
11147                         return (void __user *)hva;
11148         } else {
11149                 if (!slot || !slot->npages)
11150                         return NULL;
11151
11152                 old_npages = slot->npages;
11153                 hva = slot->userspace_addr;
11154         }
11155
11156         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
11157                 struct kvm_userspace_memory_region m;
11158
11159                 m.slot = id | (i << 16);
11160                 m.flags = 0;
11161                 m.guest_phys_addr = gpa;
11162                 m.userspace_addr = hva;
11163                 m.memory_size = size;
11164                 r = __kvm_set_memory_region(kvm, &m);
11165                 if (r < 0)
11166                         return ERR_PTR_USR(r);
11167         }
11168
11169         if (!size)
11170                 vm_munmap(hva, old_npages * PAGE_SIZE);
11171
11172         return (void __user *)hva;
11173 }
11174 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
11175
11176 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
11177 {
11178         kvm_mmu_pre_destroy_vm(kvm);
11179 }
11180
11181 void kvm_arch_destroy_vm(struct kvm *kvm)
11182 {
11183         if (current->mm == kvm->mm) {
11184                 /*
11185                  * Free memory regions allocated on behalf of userspace,
11186                  * unless the the memory map has changed due to process exit
11187                  * or fd copying.
11188                  */
11189                 mutex_lock(&kvm->slots_lock);
11190                 __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
11191                                         0, 0);
11192                 __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
11193                                         0, 0);
11194                 __x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
11195                 mutex_unlock(&kvm->slots_lock);
11196         }
11197         static_call_cond(kvm_x86_vm_destroy)(kvm);
11198         kvm_free_msr_filter(srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1));
11199         kvm_pic_destroy(kvm);
11200         kvm_ioapic_destroy(kvm);
11201         kvm_free_vcpus(kvm);
11202         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
11203         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
11204         kvm_mmu_uninit_vm(kvm);
11205         kvm_page_track_cleanup(kvm);
11206         kvm_xen_destroy_vm(kvm);
11207         kvm_hv_destroy_vm(kvm);
11208 }
11209
11210 static void memslot_rmap_free(struct kvm_memory_slot *slot)
11211 {
11212         int i;
11213
11214         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11215                 kvfree(slot->arch.rmap[i]);
11216                 slot->arch.rmap[i] = NULL;
11217         }
11218 }
11219
11220 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
11221 {
11222         int i;
11223
11224         memslot_rmap_free(slot);
11225
11226         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11227                 kvfree(slot->arch.lpage_info[i - 1]);
11228                 slot->arch.lpage_info[i - 1] = NULL;
11229         }
11230
11231         kvm_page_track_free_memslot(slot);
11232 }
11233
11234 static int memslot_rmap_alloc(struct kvm_memory_slot *slot,
11235                               unsigned long npages)
11236 {
11237         const int sz = sizeof(*slot->arch.rmap[0]);
11238         int i;
11239
11240         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11241                 int level = i + 1;
11242                 int lpages = gfn_to_index(slot->base_gfn + npages - 1,
11243                                           slot->base_gfn, level) + 1;
11244
11245                 WARN_ON(slot->arch.rmap[i]);
11246
11247                 slot->arch.rmap[i] = kvcalloc(lpages, sz, GFP_KERNEL_ACCOUNT);
11248                 if (!slot->arch.rmap[i]) {
11249                         memslot_rmap_free(slot);
11250                         return -ENOMEM;
11251                 }
11252         }
11253
11254         return 0;
11255 }
11256
11257 int alloc_all_memslots_rmaps(struct kvm *kvm)
11258 {
11259         struct kvm_memslots *slots;
11260         struct kvm_memory_slot *slot;
11261         int r, i;
11262
11263         /*
11264          * Check if memslots alreday have rmaps early before acquiring
11265          * the slots_arch_lock below.
11266          */
11267         if (kvm_memslots_have_rmaps(kvm))
11268                 return 0;
11269
11270         mutex_lock(&kvm->slots_arch_lock);
11271
11272         /*
11273          * Read memslots_have_rmaps again, under the slots arch lock,
11274          * before allocating the rmaps
11275          */
11276         if (kvm_memslots_have_rmaps(kvm)) {
11277                 mutex_unlock(&kvm->slots_arch_lock);
11278                 return 0;
11279         }
11280
11281         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
11282                 slots = __kvm_memslots(kvm, i);
11283                 kvm_for_each_memslot(slot, slots) {
11284                         r = memslot_rmap_alloc(slot, slot->npages);
11285                         if (r) {
11286                                 mutex_unlock(&kvm->slots_arch_lock);
11287                                 return r;
11288                         }
11289                 }
11290         }
11291
11292         /*
11293          * Ensure that memslots_have_rmaps becomes true strictly after
11294          * all the rmap pointers are set.
11295          */
11296         smp_store_release(&kvm->arch.memslots_have_rmaps, true);
11297         mutex_unlock(&kvm->slots_arch_lock);
11298         return 0;
11299 }
11300
11301 static int kvm_alloc_memslot_metadata(struct kvm *kvm,
11302                                       struct kvm_memory_slot *slot,
11303                                       unsigned long npages)
11304 {
11305         int i, r;
11306
11307         /*
11308          * Clear out the previous array pointers for the KVM_MR_MOVE case.  The
11309          * old arrays will be freed by __kvm_set_memory_region() if installing
11310          * the new memslot is successful.
11311          */
11312         memset(&slot->arch, 0, sizeof(slot->arch));
11313
11314         if (kvm_memslots_have_rmaps(kvm)) {
11315                 r = memslot_rmap_alloc(slot, npages);
11316                 if (r)
11317                         return r;
11318         }
11319
11320         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11321                 struct kvm_lpage_info *linfo;
11322                 unsigned long ugfn;
11323                 int lpages;
11324                 int level = i + 1;
11325
11326                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
11327                                       slot->base_gfn, level) + 1;
11328
11329                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
11330                 if (!linfo)
11331                         goto out_free;
11332
11333                 slot->arch.lpage_info[i - 1] = linfo;
11334
11335                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
11336                         linfo[0].disallow_lpage = 1;
11337                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
11338                         linfo[lpages - 1].disallow_lpage = 1;
11339                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
11340                 /*
11341                  * If the gfn and userspace address are not aligned wrt each
11342                  * other, disable large page support for this slot.
11343                  */
11344                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1)) {
11345                         unsigned long j;
11346
11347                         for (j = 0; j < lpages; ++j)
11348                                 linfo[j].disallow_lpage = 1;
11349                 }
11350         }
11351
11352         if (kvm_page_track_create_memslot(slot, npages))
11353                 goto out_free;
11354
11355         return 0;
11356
11357 out_free:
11358         memslot_rmap_free(slot);
11359
11360         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11361                 kvfree(slot->arch.lpage_info[i - 1]);
11362                 slot->arch.lpage_info[i - 1] = NULL;
11363         }
11364         return -ENOMEM;
11365 }
11366
11367 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
11368 {
11369         struct kvm_vcpu *vcpu;
11370         int i;
11371
11372         /*
11373          * memslots->generation has been incremented.
11374          * mmio generation may have reached its maximum value.
11375          */
11376         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
11377
11378         /* Force re-initialization of steal_time cache */
11379         kvm_for_each_vcpu(i, vcpu, kvm)
11380                 kvm_vcpu_kick(vcpu);
11381 }
11382
11383 int kvm_arch_prepare_memory_region(struct kvm *kvm,
11384                                 struct kvm_memory_slot *memslot,
11385                                 const struct kvm_userspace_memory_region *mem,
11386                                 enum kvm_mr_change change)
11387 {
11388         if (change == KVM_MR_CREATE || change == KVM_MR_MOVE)
11389                 return kvm_alloc_memslot_metadata(kvm, memslot,
11390                                                   mem->memory_size >> PAGE_SHIFT);
11391         return 0;
11392 }
11393
11394
11395 static void kvm_mmu_update_cpu_dirty_logging(struct kvm *kvm, bool enable)
11396 {
11397         struct kvm_arch *ka = &kvm->arch;
11398
11399         if (!kvm_x86_ops.cpu_dirty_log_size)
11400                 return;
11401
11402         if ((enable && ++ka->cpu_dirty_logging_count == 1) ||
11403             (!enable && --ka->cpu_dirty_logging_count == 0))
11404                 kvm_make_all_cpus_request(kvm, KVM_REQ_UPDATE_CPU_DIRTY_LOGGING);
11405
11406         WARN_ON_ONCE(ka->cpu_dirty_logging_count < 0);
11407 }
11408
11409 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
11410                                      struct kvm_memory_slot *old,
11411                                      struct kvm_memory_slot *new,
11412                                      enum kvm_mr_change change)
11413 {
11414         bool log_dirty_pages = new->flags & KVM_MEM_LOG_DIRTY_PAGES;
11415
11416         /*
11417          * Update CPU dirty logging if dirty logging is being toggled.  This
11418          * applies to all operations.
11419          */
11420         if ((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)
11421                 kvm_mmu_update_cpu_dirty_logging(kvm, log_dirty_pages);
11422
11423         /*
11424          * Nothing more to do for RO slots (which can't be dirtied and can't be
11425          * made writable) or CREATE/MOVE/DELETE of a slot.
11426          *
11427          * For a memslot with dirty logging disabled:
11428          * CREATE:      No dirty mappings will already exist.
11429          * MOVE/DELETE: The old mappings will already have been cleaned up by
11430          *              kvm_arch_flush_shadow_memslot()
11431          *
11432          * For a memslot with dirty logging enabled:
11433          * CREATE:      No shadow pages exist, thus nothing to write-protect
11434          *              and no dirty bits to clear.
11435          * MOVE/DELETE: The old mappings will already have been cleaned up by
11436          *              kvm_arch_flush_shadow_memslot().
11437          */
11438         if ((change != KVM_MR_FLAGS_ONLY) || (new->flags & KVM_MEM_READONLY))
11439                 return;
11440
11441         /*
11442          * READONLY and non-flags changes were filtered out above, and the only
11443          * other flag is LOG_DIRTY_PAGES, i.e. something is wrong if dirty
11444          * logging isn't being toggled on or off.
11445          */
11446         if (WARN_ON_ONCE(!((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)))
11447                 return;
11448
11449         if (!log_dirty_pages) {
11450                 /*
11451                  * Dirty logging tracks sptes in 4k granularity, meaning that
11452                  * large sptes have to be split.  If live migration succeeds,
11453                  * the guest in the source machine will be destroyed and large
11454                  * sptes will be created in the destination.  However, if the
11455                  * guest continues to run in the source machine (for example if
11456                  * live migration fails), small sptes will remain around and
11457                  * cause bad performance.
11458                  *
11459                  * Scan sptes if dirty logging has been stopped, dropping those
11460                  * which can be collapsed into a single large-page spte.  Later
11461                  * page faults will create the large-page sptes.
11462                  */
11463                 kvm_mmu_zap_collapsible_sptes(kvm, new);
11464         } else {
11465                 /*
11466                  * Initially-all-set does not require write protecting any page,
11467                  * because they're all assumed to be dirty.
11468                  */
11469                 if (kvm_dirty_log_manual_protect_and_init_set(kvm))
11470                         return;
11471
11472                 if (kvm_x86_ops.cpu_dirty_log_size) {
11473                         kvm_mmu_slot_leaf_clear_dirty(kvm, new);
11474                         kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_2M);
11475                 } else {
11476                         kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_4K);
11477                 }
11478         }
11479 }
11480
11481 void kvm_arch_commit_memory_region(struct kvm *kvm,
11482                                 const struct kvm_userspace_memory_region *mem,
11483                                 struct kvm_memory_slot *old,
11484                                 const struct kvm_memory_slot *new,
11485                                 enum kvm_mr_change change)
11486 {
11487         if (!kvm->arch.n_requested_mmu_pages)
11488                 kvm_mmu_change_mmu_pages(kvm,
11489                                 kvm_mmu_calculate_default_mmu_pages(kvm));
11490
11491         /*
11492          * FIXME: const-ify all uses of struct kvm_memory_slot.
11493          */
11494         kvm_mmu_slot_apply_flags(kvm, old, (struct kvm_memory_slot *) new, change);
11495
11496         /* Free the arrays associated with the old memslot. */
11497         if (change == KVM_MR_MOVE)
11498                 kvm_arch_free_memslot(kvm, old);
11499 }
11500
11501 void kvm_arch_flush_shadow_all(struct kvm *kvm)
11502 {
11503         kvm_mmu_zap_all(kvm);
11504 }
11505
11506 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
11507                                    struct kvm_memory_slot *slot)
11508 {
11509         kvm_page_track_flush_slot(kvm, slot);
11510 }
11511
11512 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
11513 {
11514         return (is_guest_mode(vcpu) &&
11515                         kvm_x86_ops.guest_apic_has_interrupt &&
11516                         static_call(kvm_x86_guest_apic_has_interrupt)(vcpu));
11517 }
11518
11519 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
11520 {
11521         if (!list_empty_careful(&vcpu->async_pf.done))
11522                 return true;
11523
11524         if (kvm_apic_has_events(vcpu))
11525                 return true;
11526
11527         if (vcpu->arch.pv.pv_unhalted)
11528                 return true;
11529
11530         if (vcpu->arch.exception.pending)
11531                 return true;
11532
11533         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
11534             (vcpu->arch.nmi_pending &&
11535              static_call(kvm_x86_nmi_allowed)(vcpu, false)))
11536                 return true;
11537
11538         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
11539             (vcpu->arch.smi_pending &&
11540              static_call(kvm_x86_smi_allowed)(vcpu, false)))
11541                 return true;
11542
11543         if (kvm_arch_interrupt_allowed(vcpu) &&
11544             (kvm_cpu_has_interrupt(vcpu) ||
11545             kvm_guest_apic_has_interrupt(vcpu)))
11546                 return true;
11547
11548         if (kvm_hv_has_stimer_pending(vcpu))
11549                 return true;
11550
11551         if (is_guest_mode(vcpu) &&
11552             kvm_x86_ops.nested_ops->hv_timer_pending &&
11553             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
11554                 return true;
11555
11556         return false;
11557 }
11558
11559 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
11560 {
11561         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
11562 }
11563
11564 bool kvm_arch_dy_has_pending_interrupt(struct kvm_vcpu *vcpu)
11565 {
11566         if (vcpu->arch.apicv_active && static_call(kvm_x86_dy_apicv_has_pending_interrupt)(vcpu))
11567                 return true;
11568
11569         return false;
11570 }
11571
11572 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
11573 {
11574         if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
11575                 return true;
11576
11577         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
11578                 kvm_test_request(KVM_REQ_SMI, vcpu) ||
11579                  kvm_test_request(KVM_REQ_EVENT, vcpu))
11580                 return true;
11581
11582         return kvm_arch_dy_has_pending_interrupt(vcpu);
11583 }
11584
11585 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
11586 {
11587         if (vcpu->arch.guest_state_protected)
11588                 return true;
11589
11590         return vcpu->arch.preempted_in_kernel;
11591 }
11592
11593 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
11594 {
11595         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
11596 }
11597
11598 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
11599 {
11600         return static_call(kvm_x86_interrupt_allowed)(vcpu, false);
11601 }
11602
11603 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
11604 {
11605         /* Can't read the RIP when guest state is protected, just return 0 */
11606         if (vcpu->arch.guest_state_protected)
11607                 return 0;
11608
11609         if (is_64_bit_mode(vcpu))
11610                 return kvm_rip_read(vcpu);
11611         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
11612                      kvm_rip_read(vcpu));
11613 }
11614 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
11615
11616 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
11617 {
11618         return kvm_get_linear_rip(vcpu) == linear_rip;
11619 }
11620 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
11621
11622 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
11623 {
11624         unsigned long rflags;
11625
11626         rflags = static_call(kvm_x86_get_rflags)(vcpu);
11627         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
11628                 rflags &= ~X86_EFLAGS_TF;
11629         return rflags;
11630 }
11631 EXPORT_SYMBOL_GPL(kvm_get_rflags);
11632
11633 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
11634 {
11635         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
11636             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
11637                 rflags |= X86_EFLAGS_TF;
11638         static_call(kvm_x86_set_rflags)(vcpu, rflags);
11639 }
11640
11641 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
11642 {
11643         __kvm_set_rflags(vcpu, rflags);
11644         kvm_make_request(KVM_REQ_EVENT, vcpu);
11645 }
11646 EXPORT_SYMBOL_GPL(kvm_set_rflags);
11647
11648 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
11649 {
11650         int r;
11651
11652         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
11653               work->wakeup_all)
11654                 return;
11655
11656         r = kvm_mmu_reload(vcpu);
11657         if (unlikely(r))
11658                 return;
11659
11660         if (!vcpu->arch.mmu->direct_map &&
11661               work->arch.cr3 != vcpu->arch.mmu->get_guest_pgd(vcpu))
11662                 return;
11663
11664         kvm_mmu_do_page_fault(vcpu, work->cr2_or_gpa, 0, true);
11665 }
11666
11667 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
11668 {
11669         BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU));
11670
11671         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
11672 }
11673
11674 static inline u32 kvm_async_pf_next_probe(u32 key)
11675 {
11676         return (key + 1) & (ASYNC_PF_PER_VCPU - 1);
11677 }
11678
11679 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11680 {
11681         u32 key = kvm_async_pf_hash_fn(gfn);
11682
11683         while (vcpu->arch.apf.gfns[key] != ~0)
11684                 key = kvm_async_pf_next_probe(key);
11685
11686         vcpu->arch.apf.gfns[key] = gfn;
11687 }
11688
11689 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
11690 {
11691         int i;
11692         u32 key = kvm_async_pf_hash_fn(gfn);
11693
11694         for (i = 0; i < ASYNC_PF_PER_VCPU &&
11695                      (vcpu->arch.apf.gfns[key] != gfn &&
11696                       vcpu->arch.apf.gfns[key] != ~0); i++)
11697                 key = kvm_async_pf_next_probe(key);
11698
11699         return key;
11700 }
11701
11702 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11703 {
11704         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
11705 }
11706
11707 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11708 {
11709         u32 i, j, k;
11710
11711         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
11712
11713         if (WARN_ON_ONCE(vcpu->arch.apf.gfns[i] != gfn))
11714                 return;
11715
11716         while (true) {
11717                 vcpu->arch.apf.gfns[i] = ~0;
11718                 do {
11719                         j = kvm_async_pf_next_probe(j);
11720                         if (vcpu->arch.apf.gfns[j] == ~0)
11721                                 return;
11722                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
11723                         /*
11724                          * k lies cyclically in ]i,j]
11725                          * |    i.k.j |
11726                          * |....j i.k.| or  |.k..j i...|
11727                          */
11728                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
11729                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
11730                 i = j;
11731         }
11732 }
11733
11734 static inline int apf_put_user_notpresent(struct kvm_vcpu *vcpu)
11735 {
11736         u32 reason = KVM_PV_REASON_PAGE_NOT_PRESENT;
11737
11738         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &reason,
11739                                       sizeof(reason));
11740 }
11741
11742 static inline int apf_put_user_ready(struct kvm_vcpu *vcpu, u32 token)
11743 {
11744         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
11745
11746         return kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
11747                                              &token, offset, sizeof(token));
11748 }
11749
11750 static inline bool apf_pageready_slot_free(struct kvm_vcpu *vcpu)
11751 {
11752         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
11753         u32 val;
11754
11755         if (kvm_read_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
11756                                          &val, offset, sizeof(val)))
11757                 return false;
11758
11759         return !val;
11760 }
11761
11762 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
11763 {
11764         if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
11765                 return false;
11766
11767         if (!kvm_pv_async_pf_enabled(vcpu) ||
11768             (vcpu->arch.apf.send_user_only && static_call(kvm_x86_get_cpl)(vcpu) == 0))
11769                 return false;
11770
11771         return true;
11772 }
11773
11774 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
11775 {
11776         if (unlikely(!lapic_in_kernel(vcpu) ||
11777                      kvm_event_needs_reinjection(vcpu) ||
11778                      vcpu->arch.exception.pending))
11779                 return false;
11780
11781         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
11782                 return false;
11783
11784         /*
11785          * If interrupts are off we cannot even use an artificial
11786          * halt state.
11787          */
11788         return kvm_arch_interrupt_allowed(vcpu);
11789 }
11790
11791 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
11792                                      struct kvm_async_pf *work)
11793 {
11794         struct x86_exception fault;
11795
11796         trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
11797         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
11798
11799         if (kvm_can_deliver_async_pf(vcpu) &&
11800             !apf_put_user_notpresent(vcpu)) {
11801                 fault.vector = PF_VECTOR;
11802                 fault.error_code_valid = true;
11803                 fault.error_code = 0;
11804                 fault.nested_page_fault = false;
11805                 fault.address = work->arch.token;
11806                 fault.async_page_fault = true;
11807                 kvm_inject_page_fault(vcpu, &fault);
11808                 return true;
11809         } else {
11810                 /*
11811                  * It is not possible to deliver a paravirtualized asynchronous
11812                  * page fault, but putting the guest in an artificial halt state
11813                  * can be beneficial nevertheless: if an interrupt arrives, we
11814                  * can deliver it timely and perhaps the guest will schedule
11815                  * another process.  When the instruction that triggered a page
11816                  * fault is retried, hopefully the page will be ready in the host.
11817                  */
11818                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
11819                 return false;
11820         }
11821 }
11822
11823 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
11824                                  struct kvm_async_pf *work)
11825 {
11826         struct kvm_lapic_irq irq = {
11827                 .delivery_mode = APIC_DM_FIXED,
11828                 .vector = vcpu->arch.apf.vec
11829         };
11830
11831         if (work->wakeup_all)
11832                 work->arch.token = ~0; /* broadcast wakeup */
11833         else
11834                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
11835         trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
11836
11837         if ((work->wakeup_all || work->notpresent_injected) &&
11838             kvm_pv_async_pf_enabled(vcpu) &&
11839             !apf_put_user_ready(vcpu, work->arch.token)) {
11840                 vcpu->arch.apf.pageready_pending = true;
11841                 kvm_apic_set_irq(vcpu, &irq, NULL);
11842         }
11843
11844         vcpu->arch.apf.halted = false;
11845         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
11846 }
11847
11848 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu)
11849 {
11850         kvm_make_request(KVM_REQ_APF_READY, vcpu);
11851         if (!vcpu->arch.apf.pageready_pending)
11852                 kvm_vcpu_kick(vcpu);
11853 }
11854
11855 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu)
11856 {
11857         if (!kvm_pv_async_pf_enabled(vcpu))
11858                 return true;
11859         else
11860                 return kvm_lapic_enabled(vcpu) && apf_pageready_slot_free(vcpu);
11861 }
11862
11863 void kvm_arch_start_assignment(struct kvm *kvm)
11864 {
11865         if (atomic_inc_return(&kvm->arch.assigned_device_count) == 1)
11866                 static_call_cond(kvm_x86_start_assignment)(kvm);
11867 }
11868 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
11869
11870 void kvm_arch_end_assignment(struct kvm *kvm)
11871 {
11872         atomic_dec(&kvm->arch.assigned_device_count);
11873 }
11874 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
11875
11876 bool kvm_arch_has_assigned_device(struct kvm *kvm)
11877 {
11878         return atomic_read(&kvm->arch.assigned_device_count);
11879 }
11880 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
11881
11882 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
11883 {
11884         atomic_inc(&kvm->arch.noncoherent_dma_count);
11885 }
11886 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
11887
11888 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
11889 {
11890         atomic_dec(&kvm->arch.noncoherent_dma_count);
11891 }
11892 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
11893
11894 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
11895 {
11896         return atomic_read(&kvm->arch.noncoherent_dma_count);
11897 }
11898 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
11899
11900 bool kvm_arch_has_irq_bypass(void)
11901 {
11902         return true;
11903 }
11904
11905 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
11906                                       struct irq_bypass_producer *prod)
11907 {
11908         struct kvm_kernel_irqfd *irqfd =
11909                 container_of(cons, struct kvm_kernel_irqfd, consumer);
11910         int ret;
11911
11912         irqfd->producer = prod;
11913         kvm_arch_start_assignment(irqfd->kvm);
11914         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm,
11915                                          prod->irq, irqfd->gsi, 1);
11916
11917         if (ret)
11918                 kvm_arch_end_assignment(irqfd->kvm);
11919
11920         return ret;
11921 }
11922
11923 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
11924                                       struct irq_bypass_producer *prod)
11925 {
11926         int ret;
11927         struct kvm_kernel_irqfd *irqfd =
11928                 container_of(cons, struct kvm_kernel_irqfd, consumer);
11929
11930         WARN_ON(irqfd->producer != prod);
11931         irqfd->producer = NULL;
11932
11933         /*
11934          * When producer of consumer is unregistered, we change back to
11935          * remapped mode, so we can re-use the current implementation
11936          * when the irq is masked/disabled or the consumer side (KVM
11937          * int this case doesn't want to receive the interrupts.
11938         */
11939         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm, prod->irq, irqfd->gsi, 0);
11940         if (ret)
11941                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
11942                        " fails: %d\n", irqfd->consumer.token, ret);
11943
11944         kvm_arch_end_assignment(irqfd->kvm);
11945 }
11946
11947 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
11948                                    uint32_t guest_irq, bool set)
11949 {
11950         return static_call(kvm_x86_update_pi_irte)(kvm, host_irq, guest_irq, set);
11951 }
11952
11953 bool kvm_vector_hashing_enabled(void)
11954 {
11955         return vector_hashing;
11956 }
11957
11958 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
11959 {
11960         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
11961 }
11962 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
11963
11964
11965 int kvm_spec_ctrl_test_value(u64 value)
11966 {
11967         /*
11968          * test that setting IA32_SPEC_CTRL to given value
11969          * is allowed by the host processor
11970          */
11971
11972         u64 saved_value;
11973         unsigned long flags;
11974         int ret = 0;
11975
11976         local_irq_save(flags);
11977
11978         if (rdmsrl_safe(MSR_IA32_SPEC_CTRL, &saved_value))
11979                 ret = 1;
11980         else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value))
11981                 ret = 1;
11982         else
11983                 wrmsrl(MSR_IA32_SPEC_CTRL, saved_value);
11984
11985         local_irq_restore(flags);
11986
11987         return ret;
11988 }
11989 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value);
11990
11991 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code)
11992 {
11993         struct x86_exception fault;
11994         u32 access = error_code &
11995                 (PFERR_WRITE_MASK | PFERR_FETCH_MASK | PFERR_USER_MASK);
11996
11997         if (!(error_code & PFERR_PRESENT_MASK) ||
11998             vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, &fault) != UNMAPPED_GVA) {
11999                 /*
12000                  * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
12001                  * tables probably do not match the TLB.  Just proceed
12002                  * with the error code that the processor gave.
12003                  */
12004                 fault.vector = PF_VECTOR;
12005                 fault.error_code_valid = true;
12006                 fault.error_code = error_code;
12007                 fault.nested_page_fault = false;
12008                 fault.address = gva;
12009         }
12010         vcpu->arch.walk_mmu->inject_page_fault(vcpu, &fault);
12011 }
12012 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error);
12013
12014 /*
12015  * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
12016  * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
12017  * indicates whether exit to userspace is needed.
12018  */
12019 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
12020                               struct x86_exception *e)
12021 {
12022         if (r == X86EMUL_PROPAGATE_FAULT) {
12023                 kvm_inject_emulated_page_fault(vcpu, e);
12024                 return 1;
12025         }
12026
12027         /*
12028          * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
12029          * while handling a VMX instruction KVM could've handled the request
12030          * correctly by exiting to userspace and performing I/O but there
12031          * doesn't seem to be a real use-case behind such requests, just return
12032          * KVM_EXIT_INTERNAL_ERROR for now.
12033          */
12034         vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
12035         vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
12036         vcpu->run->internal.ndata = 0;
12037
12038         return 0;
12039 }
12040 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure);
12041
12042 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva)
12043 {
12044         bool pcid_enabled;
12045         struct x86_exception e;
12046         struct {
12047                 u64 pcid;
12048                 u64 gla;
12049         } operand;
12050         int r;
12051
12052         r = kvm_read_guest_virt(vcpu, gva, &operand, sizeof(operand), &e);
12053         if (r != X86EMUL_CONTINUE)
12054                 return kvm_handle_memory_failure(vcpu, r, &e);
12055
12056         if (operand.pcid >> 12 != 0) {
12057                 kvm_inject_gp(vcpu, 0);
12058                 return 1;
12059         }
12060
12061         pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
12062
12063         switch (type) {
12064         case INVPCID_TYPE_INDIV_ADDR:
12065                 if ((!pcid_enabled && (operand.pcid != 0)) ||
12066                     is_noncanonical_address(operand.gla, vcpu)) {
12067                         kvm_inject_gp(vcpu, 0);
12068                         return 1;
12069                 }
12070                 kvm_mmu_invpcid_gva(vcpu, operand.gla, operand.pcid);
12071                 return kvm_skip_emulated_instruction(vcpu);
12072
12073         case INVPCID_TYPE_SINGLE_CTXT:
12074                 if (!pcid_enabled && (operand.pcid != 0)) {
12075                         kvm_inject_gp(vcpu, 0);
12076                         return 1;
12077                 }
12078
12079                 kvm_invalidate_pcid(vcpu, operand.pcid);
12080                 return kvm_skip_emulated_instruction(vcpu);
12081
12082         case INVPCID_TYPE_ALL_NON_GLOBAL:
12083                 /*
12084                  * Currently, KVM doesn't mark global entries in the shadow
12085                  * page tables, so a non-global flush just degenerates to a
12086                  * global flush. If needed, we could optimize this later by
12087                  * keeping track of global entries in shadow page tables.
12088                  */
12089
12090                 fallthrough;
12091         case INVPCID_TYPE_ALL_INCL_GLOBAL:
12092                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
12093                 return kvm_skip_emulated_instruction(vcpu);
12094
12095         default:
12096                 BUG(); /* We have already checked above that type <= 3 */
12097         }
12098 }
12099 EXPORT_SYMBOL_GPL(kvm_handle_invpcid);
12100
12101 static int complete_sev_es_emulated_mmio(struct kvm_vcpu *vcpu)
12102 {
12103         struct kvm_run *run = vcpu->run;
12104         struct kvm_mmio_fragment *frag;
12105         unsigned int len;
12106
12107         BUG_ON(!vcpu->mmio_needed);
12108
12109         /* Complete previous fragment */
12110         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
12111         len = min(8u, frag->len);
12112         if (!vcpu->mmio_is_write)
12113                 memcpy(frag->data, run->mmio.data, len);
12114
12115         if (frag->len <= 8) {
12116                 /* Switch to the next fragment. */
12117                 frag++;
12118                 vcpu->mmio_cur_fragment++;
12119         } else {
12120                 /* Go forward to the next mmio piece. */
12121                 frag->data += len;
12122                 frag->gpa += len;
12123                 frag->len -= len;
12124         }
12125
12126         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
12127                 vcpu->mmio_needed = 0;
12128
12129                 // VMG change, at this point, we're always done
12130                 // RIP has already been advanced
12131                 return 1;
12132         }
12133
12134         // More MMIO is needed
12135         run->mmio.phys_addr = frag->gpa;
12136         run->mmio.len = min(8u, frag->len);
12137         run->mmio.is_write = vcpu->mmio_is_write;
12138         if (run->mmio.is_write)
12139                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
12140         run->exit_reason = KVM_EXIT_MMIO;
12141
12142         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12143
12144         return 0;
12145 }
12146
12147 int kvm_sev_es_mmio_write(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12148                           void *data)
12149 {
12150         int handled;
12151         struct kvm_mmio_fragment *frag;
12152
12153         if (!data)
12154                 return -EINVAL;
12155
12156         handled = write_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12157         if (handled == bytes)
12158                 return 1;
12159
12160         bytes -= handled;
12161         gpa += handled;
12162         data += handled;
12163
12164         /*TODO: Check if need to increment number of frags */
12165         frag = vcpu->mmio_fragments;
12166         vcpu->mmio_nr_fragments = 1;
12167         frag->len = bytes;
12168         frag->gpa = gpa;
12169         frag->data = data;
12170
12171         vcpu->mmio_needed = 1;
12172         vcpu->mmio_cur_fragment = 0;
12173
12174         vcpu->run->mmio.phys_addr = gpa;
12175         vcpu->run->mmio.len = min(8u, frag->len);
12176         vcpu->run->mmio.is_write = 1;
12177         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
12178         vcpu->run->exit_reason = KVM_EXIT_MMIO;
12179
12180         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12181
12182         return 0;
12183 }
12184 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write);
12185
12186 int kvm_sev_es_mmio_read(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12187                          void *data)
12188 {
12189         int handled;
12190         struct kvm_mmio_fragment *frag;
12191
12192         if (!data)
12193                 return -EINVAL;
12194
12195         handled = read_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12196         if (handled == bytes)
12197                 return 1;
12198
12199         bytes -= handled;
12200         gpa += handled;
12201         data += handled;
12202
12203         /*TODO: Check if need to increment number of frags */
12204         frag = vcpu->mmio_fragments;
12205         vcpu->mmio_nr_fragments = 1;
12206         frag->len = bytes;
12207         frag->gpa = gpa;
12208         frag->data = data;
12209
12210         vcpu->mmio_needed = 1;
12211         vcpu->mmio_cur_fragment = 0;
12212
12213         vcpu->run->mmio.phys_addr = gpa;
12214         vcpu->run->mmio.len = min(8u, frag->len);
12215         vcpu->run->mmio.is_write = 0;
12216         vcpu->run->exit_reason = KVM_EXIT_MMIO;
12217
12218         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12219
12220         return 0;
12221 }
12222 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read);
12223
12224 static int complete_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
12225 {
12226         memcpy(vcpu->arch.guest_ins_data, vcpu->arch.pio_data,
12227                vcpu->arch.pio.count * vcpu->arch.pio.size);
12228         vcpu->arch.pio.count = 0;
12229
12230         return 1;
12231 }
12232
12233 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
12234                            unsigned int port, void *data,  unsigned int count)
12235 {
12236         int ret;
12237
12238         ret = emulator_pio_out_emulated(vcpu->arch.emulate_ctxt, size, port,
12239                                         data, count);
12240         if (ret)
12241                 return ret;
12242
12243         vcpu->arch.pio.count = 0;
12244
12245         return 0;
12246 }
12247
12248 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
12249                           unsigned int port, void *data, unsigned int count)
12250 {
12251         int ret;
12252
12253         ret = emulator_pio_in_emulated(vcpu->arch.emulate_ctxt, size, port,
12254                                        data, count);
12255         if (ret) {
12256                 vcpu->arch.pio.count = 0;
12257         } else {
12258                 vcpu->arch.guest_ins_data = data;
12259                 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_ins;
12260         }
12261
12262         return 0;
12263 }
12264
12265 int kvm_sev_es_string_io(struct kvm_vcpu *vcpu, unsigned int size,
12266                          unsigned int port, void *data,  unsigned int count,
12267                          int in)
12268 {
12269         return in ? kvm_sev_es_ins(vcpu, size, port, data, count)
12270                   : kvm_sev_es_outs(vcpu, size, port, data, count);
12271 }
12272 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io);
12273
12274 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry);
12275 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
12276 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
12277 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
12278 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
12279 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
12280 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
12281 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
12282 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
12283 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
12284 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
12285 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
12286 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
12287 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
12288 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
12289 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
12290 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
12291 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
12292 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
12293 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
12294 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
12295 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log);
12296 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request);
12297 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter);
12298 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit);
12299 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter);
12300 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit);