arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30
  31 #include <linux/clocksource.h>
  32 #include <linux/interrupt.h>
  33 #include <linux/kvm.h>
  34 #include <linux/fs.h>
  35 #include <linux/vmalloc.h>
  36 #include <linux/module.h>
  37 #include <linux/mman.h>
  38 #include <linux/highmem.h>
  39 #include <linux/iommu.h>
  40 #include <linux/intel-iommu.h>
  41 #include <linux/cpufreq.h>
  42 #include <linux/user-return-notifier.h>
  43 #include <linux/srcu.h>
  44 #include <linux/slab.h>
  45 #include <linux/perf_event.h>
  46 #include <linux/uaccess.h>
  47 #include <linux/hash.h>
  48 #include <linux/pci.h>
  49 #include <linux/timekeeper_internal.h>
  50 #include <linux/pvclock_gtod.h>
  51 #include <trace/events/kvm.h>
  52
  53 #define CREATE_TRACE_POINTS
  54 #include "trace.h"
  55
  56 #include <asm/debugreg.h>
  57 #include <asm/msr.h>
  58 #include <asm/desc.h>
  59 #include <asm/mtrr.h>
  60 #include <asm/mce.h>
  61 #include <asm/i387.h>
  62 #include <asm/fpu-internal.h> /* Ugh! */
  63 #include <asm/xcr.h>
  64 #include <asm/pvclock.h>
  65 #include <asm/div64.h>
  66
  67 #define MAX_IO_MSRS 256
  68 #define KVM_MAX_MCE_BANKS 32
  69 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  70
  71 #define emul_to_vcpu(ctxt) \
  72         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  73
  74 /* EFER defaults:
  75  * - enable syscall per default because its emulated by KVM
  76  * - enable LME and LMA per default on 64 bit KVM
  77  */
  78 #ifdef CONFIG_X86_64
  79 static
  80 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  81 #else
  82 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  83 #endif
  84
  85 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  86 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  87
  88 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  89 static void process_nmi(struct kvm_vcpu *vcpu);
  90
  91 struct kvm_x86_ops *kvm_x86_ops;
  92 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  93
  94 static bool ignore_msrs = 0;
  95 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
  96
  97 bool kvm_has_tsc_control;
  98 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
  99 u32  kvm_max_guest_tsc_khz;
 100 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 101
 102 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 103 static u32 tsc_tolerance_ppm = 250;
 104 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 105
 106 #define KVM_NR_SHARED_MSRS 16
 107
 108 struct kvm_shared_msrs_global {
 109         int nr;
 110         u32 msrs[KVM_NR_SHARED_MSRS];
 111 };
 112
 113 struct kvm_shared_msrs {
 114         struct user_return_notifier urn;
 115         bool registered;
 116         struct kvm_shared_msr_values {
 117                 u64 host;
 118                 u64 curr;
 119         } values[KVM_NR_SHARED_MSRS];
 120 };
 121
 122 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 123 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
 124
 125 struct kvm_stats_debugfs_item debugfs_entries[] = {
 126         { "pf_fixed", VCPU_STAT(pf_fixed) },
 127         { "pf_guest", VCPU_STAT(pf_guest) },
 128         { "tlb_flush", VCPU_STAT(tlb_flush) },
 129         { "invlpg", VCPU_STAT(invlpg) },
 130         { "exits", VCPU_STAT(exits) },
 131         { "io_exits", VCPU_STAT(io_exits) },
 132         { "mmio_exits", VCPU_STAT(mmio_exits) },
 133         { "signal_exits", VCPU_STAT(signal_exits) },
 134         { "irq_window", VCPU_STAT(irq_window_exits) },
 135         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 136         { "halt_exits", VCPU_STAT(halt_exits) },
 137         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 138         { "hypercalls", VCPU_STAT(hypercalls) },
 139         { "request_irq", VCPU_STAT(request_irq_exits) },
 140         { "irq_exits", VCPU_STAT(irq_exits) },
 141         { "host_state_reload", VCPU_STAT(host_state_reload) },
 142         { "efer_reload", VCPU_STAT(efer_reload) },
 143         { "fpu_reload", VCPU_STAT(fpu_reload) },
 144         { "insn_emulation", VCPU_STAT(insn_emulation) },
 145         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 146         { "irq_injections", VCPU_STAT(irq_injections) },
 147         { "nmi_injections", VCPU_STAT(nmi_injections) },
 148         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 149         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 150         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 151         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 152         { "mmu_flooded", VM_STAT(mmu_flooded) },
 153         { "mmu_recycled", VM_STAT(mmu_recycled) },
 154         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 155         { "mmu_unsync", VM_STAT(mmu_unsync) },
 156         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 157         { "largepages", VM_STAT(lpages) },
 158         { NULL }
 159 };
 160
 161 u64 __read_mostly host_xcr0;
 162
 163 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 164
 165 static int kvm_vcpu_reset(struct kvm_vcpu *vcpu);
 166
 167 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 168 {
 169         int i;
 170         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 171                 vcpu->arch.apf.gfns[i] = ~0;
 172 }
 173
 174 static void kvm_on_user_return(struct user_return_notifier *urn)
 175 {
 176         unsigned slot;
 177         struct kvm_shared_msrs *locals
 178                 = container_of(urn, struct kvm_shared_msrs, urn);
 179         struct kvm_shared_msr_values *values;
 180
 181         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 182                 values = &locals->values[slot];
 183                 if (values->host != values->curr) {
 184                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 185                         values->curr = values->host;
 186                 }
 187         }
 188         locals->registered = false;
 189         user_return_notifier_unregister(urn);
 190 }
 191
 192 static void shared_msr_update(unsigned slot, u32 msr)
 193 {
 194         struct kvm_shared_msrs *smsr;
 195         u64 value;
 196
 197         smsr = &__get_cpu_var(shared_msrs);
 198         /* only read, and nobody should modify it at this time,
 199          * so don't need lock */
 200         if (slot >= shared_msrs_global.nr) {
 201                 printk(KERN_ERR "kvm: invalid MSR slot!");
 202                 return;
 203         }
 204         rdmsrl_safe(msr, &value);
 205         smsr->values[slot].host = value;
 206         smsr->values[slot].curr = value;
 207 }
 208
 209 void kvm_define_shared_msr(unsigned slot, u32 msr)
 210 {
 211         if (slot >= shared_msrs_global.nr)
 212                 shared_msrs_global.nr = slot + 1;
 213         shared_msrs_global.msrs[slot] = msr;
 214         /* we need ensured the shared_msr_global have been updated */
 215         smp_wmb();
 216 }
 217 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 218
 219 static void kvm_shared_msr_cpu_online(void)
 220 {
 221         unsigned i;
 222
 223         for (i = 0; i < shared_msrs_global.nr; ++i)
 224                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 225 }
 226
 227 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 228 {
 229         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 230
 231         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 232                 return;
 233         smsr->values[slot].curr = value;
 234         wrmsrl(shared_msrs_global.msrs[slot], value);
 235         if (!smsr->registered) {
 236                 smsr->urn.on_user_return = kvm_on_user_return;
 237                 user_return_notifier_register(&smsr->urn);
 238                 smsr->registered = true;
 239         }
 240 }
 241 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 242
 243 static void drop_user_return_notifiers(void *ignore)
 244 {
 245         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 246
 247         if (smsr->registered)
 248                 kvm_on_user_return(&smsr->urn);
 249 }
 250
 251 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 252 {
 253         return vcpu->arch.apic_base;
 254 }
 255 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 256
 257 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 258 {
 259         /* TODO: reserve bits check */
 260         kvm_lapic_set_base(vcpu, data);
 261 }
 262 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 263
 264 #define EXCPT_BENIGN            0
 265 #define EXCPT_CONTRIBUTORY      1
 266 #define EXCPT_PF                2
 267
 268 static int exception_class(int vector)
 269 {
 270         switch (vector) {
 271         case PF_VECTOR:
 272                 return EXCPT_PF;
 273         case DE_VECTOR:
 274         case TS_VECTOR:
 275         case NP_VECTOR:
 276         case SS_VECTOR:
 277         case GP_VECTOR:
 278                 return EXCPT_CONTRIBUTORY;
 279         default:
 280                 break;
 281         }
 282         return EXCPT_BENIGN;
 283 }
 284
 285 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 286                 unsigned nr, bool has_error, u32 error_code,
 287                 bool reinject)
 288 {
 289         u32 prev_nr;
 290         int class1, class2;
 291
 292         kvm_make_request(KVM_REQ_EVENT, vcpu);
 293
 294         if (!vcpu->arch.exception.pending) {
 295         queue:
 296                 vcpu->arch.exception.pending = true;
 297                 vcpu->arch.exception.has_error_code = has_error;
 298                 vcpu->arch.exception.nr = nr;
 299                 vcpu->arch.exception.error_code = error_code;
 300                 vcpu->arch.exception.reinject = reinject;
 301                 return;
 302         }
 303
 304         /* to check exception */
 305         prev_nr = vcpu->arch.exception.nr;
 306         if (prev_nr == DF_VECTOR) {
 307                 /* triple fault -> shutdown */
 308                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 309                 return;
 310         }
 311         class1 = exception_class(prev_nr);
 312         class2 = exception_class(nr);
 313         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 314                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 315                 /* generate double fault per SDM Table 5-5 */
 316                 vcpu->arch.exception.pending = true;
 317                 vcpu->arch.exception.has_error_code = true;
 318                 vcpu->arch.exception.nr = DF_VECTOR;
 319                 vcpu->arch.exception.error_code = 0;
 320         } else
 321                 /* replace previous exception with a new one in a hope
 322                    that instruction re-execution will regenerate lost
 323                    exception */
 324                 goto queue;
 325 }
 326
 327 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 328 {
 329         kvm_multiple_exception(vcpu, nr, false, 0, false);
 330 }
 331 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 332
 333 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 334 {
 335         kvm_multiple_exception(vcpu, nr, false, 0, true);
 336 }
 337 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 338
 339 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 340 {
 341         if (err)
 342                 kvm_inject_gp(vcpu, 0);
 343         else
 344                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 345 }
 346 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 347
 348 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 349 {
 350         ++vcpu->stat.pf_guest;
 351         vcpu->arch.cr2 = fault->address;
 352         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 353 }
 354 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 355
 356 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 357 {
 358         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 359                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 360         else
 361                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 362 }
 363
 364 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 365 {
 366         atomic_inc(&vcpu->arch.nmi_queued);
 367         kvm_make_request(KVM_REQ_NMI, vcpu);
 368 }
 369 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 370
 371 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 372 {
 373         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 374 }
 375 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 376
 377 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 378 {
 379         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 380 }
 381 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 382
 383 /*
 384  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 385  * a #GP and return false.
 386  */
 387 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 388 {
 389         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 390                 return true;
 391         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 392         return false;
 393 }
 394 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 395
 396 /*
 397  * This function will be used to read from the physical memory of the currently
 398  * running guest. The difference to kvm_read_guest_page is that this function
 399  * can read from guest physical or from the guest's guest physical memory.
 400  */
 401 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 402                             gfn_t ngfn, void *data, int offset, int len,
 403                             u32 access)
 404 {
 405         gfn_t real_gfn;
 406         gpa_t ngpa;
 407
 408         ngpa     = gfn_to_gpa(ngfn);
 409         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 410         if (real_gfn == UNMAPPED_GVA)
 411                 return -EFAULT;
 412
 413         real_gfn = gpa_to_gfn(real_gfn);
 414
 415         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 416 }
 417 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 418
 419 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 420                                void *data, int offset, int len, u32 access)
 421 {
 422         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 423                                        data, offset, len, access);
 424 }
 425
 426 /*
 427  * Load the pae pdptrs.  Return true is they are all valid.
 428  */
 429 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 430 {
 431         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 432         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 433         int i;
 434         int ret;
 435         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 436
 437         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 438                                       offset * sizeof(u64), sizeof(pdpte),
 439                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 440         if (ret < 0) {
 441                 ret = 0;
 442                 goto out;
 443         }
 444         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 445                 if (is_present_gpte(pdpte[i]) &&
 446                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 447                         ret = 0;
 448                         goto out;
 449                 }
 450         }
 451         ret = 1;
 452
 453         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 454         __set_bit(VCPU_EXREG_PDPTR,
 455                   (unsigned long *)&vcpu->arch.regs_avail);
 456         __set_bit(VCPU_EXREG_PDPTR,
 457                   (unsigned long *)&vcpu->arch.regs_dirty);
 458 out:
 459
 460         return ret;
 461 }
 462 EXPORT_SYMBOL_GPL(load_pdptrs);
 463
 464 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 465 {
 466         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 467         bool changed = true;
 468         int offset;
 469         gfn_t gfn;
 470         int r;
 471
 472         if (is_long_mode(vcpu) || !is_pae(vcpu))
 473                 return false;
 474
 475         if (!test_bit(VCPU_EXREG_PDPTR,
 476                       (unsigned long *)&vcpu->arch.regs_avail))
 477                 return true;
 478
 479         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 480         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 481         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 482                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 483         if (r < 0)
 484                 goto out;
 485         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 486 out:
 487
 488         return changed;
 489 }
 490
 491 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 492 {
 493         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 494         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 495                                     X86_CR0_CD | X86_CR0_NW;
 496
 497         cr0 |= X86_CR0_ET;
 498
 499 #ifdef CONFIG_X86_64
 500         if (cr0 & 0xffffffff00000000UL)
 501                 return 1;
 502 #endif
 503
 504         cr0 &= ~CR0_RESERVED_BITS;
 505
 506         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 507                 return 1;
 508
 509         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 510                 return 1;
 511
 512         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 513 #ifdef CONFIG_X86_64
 514                 if ((vcpu->arch.efer & EFER_LME)) {
 515                         int cs_db, cs_l;
 516
 517                         if (!is_pae(vcpu))
 518                                 return 1;
 519                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 520                         if (cs_l)
 521                                 return 1;
 522                 } else
 523 #endif
 524                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 525                                                  kvm_read_cr3(vcpu)))
 526                         return 1;
 527         }
 528
 529         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 530                 return 1;
 531
 532         kvm_x86_ops->set_cr0(vcpu, cr0);
 533
 534         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 535                 kvm_clear_async_pf_completion_queue(vcpu);
 536                 kvm_async_pf_hash_reset(vcpu);
 537         }
 538
 539         if ((cr0 ^ old_cr0) & update_bits)
 540                 kvm_mmu_reset_context(vcpu);
 541         return 0;
 542 }
 543 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 544
 545 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 546 {
 547         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 548 }
 549 EXPORT_SYMBOL_GPL(kvm_lmsw);
 550
 551 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 552 {
 553         u64 xcr0;
 554
 555         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 556         if (index != XCR_XFEATURE_ENABLED_MASK)
 557                 return 1;
 558         xcr0 = xcr;
 559         if (kvm_x86_ops->get_cpl(vcpu) != 0)
 560                 return 1;
 561         if (!(xcr0 & XSTATE_FP))
 562                 return 1;
 563         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 564                 return 1;
 565         if (xcr0 & ~host_xcr0)
 566                 return 1;
 567         vcpu->arch.xcr0 = xcr0;
 568         vcpu->guest_xcr0_loaded = 0;
 569         return 0;
 570 }
 571
 572 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 573 {
 574         if (__kvm_set_xcr(vcpu, index, xcr)) {
 575                 kvm_inject_gp(vcpu, 0);
 576                 return 1;
 577         }
 578         return 0;
 579 }
 580 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 581
 582 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 583 {
 584         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 585         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
 586                                    X86_CR4_PAE | X86_CR4_SMEP;
 587         if (cr4 & CR4_RESERVED_BITS)
 588                 return 1;
 589
 590         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 591                 return 1;
 592
 593         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 594                 return 1;
 595
 596         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_RDWRGSFS))
 597                 return 1;
 598
 599         if (is_long_mode(vcpu)) {
 600                 if (!(cr4 & X86_CR4_PAE))
 601                         return 1;
 602         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 603                    && ((cr4 ^ old_cr4) & pdptr_bits)
 604                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 605                                    kvm_read_cr3(vcpu)))
 606                 return 1;
 607
 608         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 609                 if (!guest_cpuid_has_pcid(vcpu))
 610                         return 1;
 611
 612                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 613                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 614                         return 1;
 615         }
 616
 617         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 618                 return 1;
 619
 620         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 621             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 622                 kvm_mmu_reset_context(vcpu);
 623
 624         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 625                 kvm_update_cpuid(vcpu);
 626
 627         return 0;
 628 }
 629 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 630
 631 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 632 {
 633         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 634                 kvm_mmu_sync_roots(vcpu);
 635                 kvm_mmu_flush_tlb(vcpu);
 636                 return 0;
 637         }
 638
 639         if (is_long_mode(vcpu)) {
 640                 if (kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE)) {
 641                         if (cr3 & CR3_PCID_ENABLED_RESERVED_BITS)
 642                                 return 1;
 643                 } else
 644                         if (cr3 & CR3_L_MODE_RESERVED_BITS)
 645                                 return 1;
 646         } else {
 647                 if (is_pae(vcpu)) {
 648                         if (cr3 & CR3_PAE_RESERVED_BITS)
 649                                 return 1;
 650                         if (is_paging(vcpu) &&
 651                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 652                                 return 1;
 653                 }
 654                 /*
 655                  * We don't check reserved bits in nonpae mode, because
 656                  * this isn't enforced, and VMware depends on this.
 657                  */
 658         }
 659
 660         /*
 661          * Does the new cr3 value map to physical memory? (Note, we
 662          * catch an invalid cr3 even in real-mode, because it would
 663          * cause trouble later on when we turn on paging anyway.)
 664          *
 665          * A real CPU would silently accept an invalid cr3 and would
 666          * attempt to use it - with largely undefined (and often hard
 667          * to debug) behavior on the guest side.
 668          */
 669         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 670                 return 1;
 671         vcpu->arch.cr3 = cr3;
 672         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 673         vcpu->arch.mmu.new_cr3(vcpu);
 674         return 0;
 675 }
 676 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 677
 678 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 679 {
 680         if (cr8 & CR8_RESERVED_BITS)
 681                 return 1;
 682         if (irqchip_in_kernel(vcpu->kvm))
 683                 kvm_lapic_set_tpr(vcpu, cr8);
 684         else
 685                 vcpu->arch.cr8 = cr8;
 686         return 0;
 687 }
 688 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 689
 690 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 691 {
 692         if (irqchip_in_kernel(vcpu->kvm))
 693                 return kvm_lapic_get_cr8(vcpu);
 694         else
 695                 return vcpu->arch.cr8;
 696 }
 697 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 698
 699 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 700 {
 701         unsigned long dr7;
 702
 703         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 704                 dr7 = vcpu->arch.guest_debug_dr7;
 705         else
 706                 dr7 = vcpu->arch.dr7;
 707         kvm_x86_ops->set_dr7(vcpu, dr7);
 708         vcpu->arch.switch_db_regs = (dr7 & DR7_BP_EN_MASK);
 709 }
 710
 711 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 712 {
 713         switch (dr) {
 714         case 0 ... 3:
 715                 vcpu->arch.db[dr] = val;
 716                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 717                         vcpu->arch.eff_db[dr] = val;
 718                 break;
 719         case 4:
 720                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 721                         return 1; /* #UD */
 722                 /* fall through */
 723         case 6:
 724                 if (val & 0xffffffff00000000ULL)
 725                         return -1; /* #GP */
 726                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 727                 break;
 728         case 5:
 729                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 730                         return 1; /* #UD */
 731                 /* fall through */
 732         default: /* 7 */
 733                 if (val & 0xffffffff00000000ULL)
 734                         return -1; /* #GP */
 735                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 736                 kvm_update_dr7(vcpu);
 737                 break;
 738         }
 739
 740         return 0;
 741 }
 742
 743 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 744 {
 745         int res;
 746
 747         res = __kvm_set_dr(vcpu, dr, val);
 748         if (res > 0)
 749                 kvm_queue_exception(vcpu, UD_VECTOR);
 750         else if (res < 0)
 751                 kvm_inject_gp(vcpu, 0);
 752
 753         return res;
 754 }
 755 EXPORT_SYMBOL_GPL(kvm_set_dr);
 756
 757 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 758 {
 759         switch (dr) {
 760         case 0 ... 3:
 761                 *val = vcpu->arch.db[dr];
 762                 break;
 763         case 4:
 764                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 765                         return 1;
 766                 /* fall through */
 767         case 6:
 768                 *val = vcpu->arch.dr6;
 769                 break;
 770         case 5:
 771                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 772                         return 1;
 773                 /* fall through */
 774         default: /* 7 */
 775                 *val = vcpu->arch.dr7;
 776                 break;
 777         }
 778
 779         return 0;
 780 }
 781
 782 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 783 {
 784         if (_kvm_get_dr(vcpu, dr, val)) {
 785                 kvm_queue_exception(vcpu, UD_VECTOR);
 786                 return 1;
 787         }
 788         return 0;
 789 }
 790 EXPORT_SYMBOL_GPL(kvm_get_dr);
 791
 792 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 793 {
 794         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 795         u64 data;
 796         int err;
 797
 798         err = kvm_pmu_read_pmc(vcpu, ecx, &data);
 799         if (err)
 800                 return err;
 801         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 802         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 803         return err;
 804 }
 805 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 806
 807 /*
 808  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 809  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 810  *
 811  * This list is modified at module load time to reflect the
 812  * capabilities of the host cpu. This capabilities test skips MSRs that are
 813  * kvm-specific. Those are put in the beginning of the list.
 814  */
 815
 816 #define KVM_SAVE_MSRS_BEGIN     10
 817 static u32 msrs_to_save[] = {
 818         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 819         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 820         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 821         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 822         MSR_KVM_PV_EOI_EN,
 823         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 824         MSR_STAR,
 825 #ifdef CONFIG_X86_64
 826         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 827 #endif
 828         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 829 };
 830
 831 static unsigned num_msrs_to_save;
 832
 833 static const u32 emulated_msrs[] = {
 834         MSR_IA32_TSCDEADLINE,
 835         MSR_IA32_MISC_ENABLE,
 836         MSR_IA32_MCG_STATUS,
 837         MSR_IA32_MCG_CTL,
 838 };
 839
 840 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 841 {
 842         u64 old_efer = vcpu->arch.efer;
 843
 844         if (efer & efer_reserved_bits)
 845                 return 1;
 846
 847         if (is_paging(vcpu)
 848             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 849                 return 1;
 850
 851         if (efer & EFER_FFXSR) {
 852                 struct kvm_cpuid_entry2 *feat;
 853
 854                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 855                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 856                         return 1;
 857         }
 858
 859         if (efer & EFER_SVME) {
 860                 struct kvm_cpuid_entry2 *feat;
 861
 862                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 863                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 864                         return 1;
 865         }
 866
 867         efer &= ~EFER_LMA;
 868         efer |= vcpu->arch.efer & EFER_LMA;
 869
 870         kvm_x86_ops->set_efer(vcpu, efer);
 871
 872         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 873
 874         /* Update reserved bits */
 875         if ((efer ^ old_efer) & EFER_NX)
 876                 kvm_mmu_reset_context(vcpu);
 877
 878         return 0;
 879 }
 880
 881 void kvm_enable_efer_bits(u64 mask)
 882 {
 883        efer_reserved_bits &= ~mask;
 884 }
 885 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 886
 887
 888 /*
 889  * Writes msr value into into the appropriate "register".
 890  * Returns 0 on success, non-0 otherwise.
 891  * Assumes vcpu_load() was already called.
 892  */
 893 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 894 {
 895         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 896 }
 897
 898 /*
 899  * Adapt set_msr() to msr_io()'s calling convention
 900  */
 901 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 902 {
 903         return kvm_set_msr(vcpu, index, *data);
 904 }
 905
 906 #ifdef CONFIG_X86_64
 907 struct pvclock_gtod_data {
 908         seqcount_t      seq;
 909
 910         struct { /* extract of a clocksource struct */
 911                 int vclock_mode;
 912                 cycle_t cycle_last;
 913                 cycle_t mask;
 914                 u32     mult;
 915                 u32     shift;
 916         } clock;
 917
 918         /* open coded 'struct timespec' */
 919         u64             monotonic_time_snsec;
 920         time_t          monotonic_time_sec;
 921 };
 922
 923 static struct pvclock_gtod_data pvclock_gtod_data;
 924
 925 static void update_pvclock_gtod(struct timekeeper *tk)
 926 {
 927         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
 928
 929         write_seqcount_begin(&vdata->seq);
 930
 931         /* copy pvclock gtod data */
 932         vdata->clock.vclock_mode        = tk->clock->archdata.vclock_mode;
 933         vdata->clock.cycle_last         = tk->clock->cycle_last;
 934         vdata->clock.mask               = tk->clock->mask;
 935         vdata->clock.mult               = tk->mult;
 936         vdata->clock.shift              = tk->shift;
 937
 938         vdata->monotonic_time_sec       = tk->xtime_sec
 939                                         + tk->wall_to_monotonic.tv_sec;
 940         vdata->monotonic_time_snsec     = tk->xtime_nsec
 941                                         + (tk->wall_to_monotonic.tv_nsec
 942                                                 << tk->shift);
 943         while (vdata->monotonic_time_snsec >=
 944                                         (((u64)NSEC_PER_SEC) << tk->shift)) {
 945                 vdata->monotonic_time_snsec -=
 946                                         ((u64)NSEC_PER_SEC) << tk->shift;
 947                 vdata->monotonic_time_sec++;
 948         }
 949
 950         write_seqcount_end(&vdata->seq);
 951 }
 952 #endif
 953
 954
 955 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 956 {
 957         int version;
 958         int r;
 959         struct pvclock_wall_clock wc;
 960         struct timespec boot;
 961
 962         if (!wall_clock)
 963                 return;
 964
 965         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
 966         if (r)
 967                 return;
 968
 969         if (version & 1)
 970                 ++version;  /* first time write, random junk */
 971
 972         ++version;
 973
 974         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 975
 976         /*
 977          * The guest calculates current wall clock time by adding
 978          * system time (updated by kvm_guest_time_update below) to the
 979          * wall clock specified here.  guest system time equals host
 980          * system time for us, thus we must fill in host boot time here.
 981          */
 982         getboottime(&boot);
 983
 984         if (kvm->arch.kvmclock_offset) {
 985                 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
 986                 boot = timespec_sub(boot, ts);
 987         }
 988         wc.sec = boot.tv_sec;
 989         wc.nsec = boot.tv_nsec;
 990         wc.version = version;
 991
 992         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 993
 994         version++;
 995         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 996 }
 997
 998 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 999 {
1000         uint32_t quotient, remainder;
1001
1002         /* Don't try to replace with do_div(), this one calculates
1003          * "(dividend << 32) / divisor" */
1004         __asm__ ( "divl %4"
1005                   : "=a" (quotient), "=d" (remainder)
1006                   : "0" (0), "1" (dividend), "r" (divisor) );
1007         return quotient;
1008 }
1009
1010 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
1011                                s8 *pshift, u32 *pmultiplier)
1012 {
1013         uint64_t scaled64;
1014         int32_t  shift = 0;
1015         uint64_t tps64;
1016         uint32_t tps32;
1017
1018         tps64 = base_khz * 1000LL;
1019         scaled64 = scaled_khz * 1000LL;
1020         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1021                 tps64 >>= 1;
1022                 shift--;
1023         }
1024
1025         tps32 = (uint32_t)tps64;
1026         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1027                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1028                         scaled64 >>= 1;
1029                 else
1030                         tps32 <<= 1;
1031                 shift++;
1032         }
1033
1034         *pshift = shift;
1035         *pmultiplier = div_frac(scaled64, tps32);
1036
1037         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1038                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
1039 }
1040
1041 static inline u64 get_kernel_ns(void)
1042 {
1043         struct timespec ts;
1044
1045         WARN_ON(preemptible());
1046         ktime_get_ts(&ts);
1047         monotonic_to_bootbased(&ts);
1048         return timespec_to_ns(&ts);
1049 }
1050
1051 #ifdef CONFIG_X86_64
1052 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1053 #endif
1054
1055 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1056 unsigned long max_tsc_khz;
1057
1058 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1059 {
1060         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1061                                    vcpu->arch.virtual_tsc_shift);
1062 }
1063
1064 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1065 {
1066         u64 v = (u64)khz * (1000000 + ppm);
1067         do_div(v, 1000000);
1068         return v;
1069 }
1070
1071 static void kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1072 {
1073         u32 thresh_lo, thresh_hi;
1074         int use_scaling = 0;
1075
1076         /* Compute a scale to convert nanoseconds in TSC cycles */
1077         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1078                            &vcpu->arch.virtual_tsc_shift,
1079                            &vcpu->arch.virtual_tsc_mult);
1080         vcpu->arch.virtual_tsc_khz = this_tsc_khz;
1081
1082         /*
1083          * Compute the variation in TSC rate which is acceptable
1084          * within the range of tolerance and decide if the
1085          * rate being applied is within that bounds of the hardware
1086          * rate.  If so, no scaling or compensation need be done.
1087          */
1088         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1089         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1090         if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1091                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1092                 use_scaling = 1;
1093         }
1094         kvm_x86_ops->set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1095 }
1096
1097 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1098 {
1099         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1100                                       vcpu->arch.virtual_tsc_mult,
1101                                       vcpu->arch.virtual_tsc_shift);
1102         tsc += vcpu->arch.this_tsc_write;
1103         return tsc;
1104 }
1105
1106 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1107 {
1108         struct kvm *kvm = vcpu->kvm;
1109         u64 offset, ns, elapsed;
1110         unsigned long flags;
1111         s64 usdiff;
1112
1113         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1114         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1115         ns = get_kernel_ns();
1116         elapsed = ns - kvm->arch.last_tsc_nsec;
1117
1118         /* n.b - signed multiplication and division required */
1119         usdiff = data - kvm->arch.last_tsc_write;
1120 #ifdef CONFIG_X86_64
1121         usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1122 #else
1123         /* do_div() only does unsigned */
1124         asm("idivl %2; xor %%edx, %%edx"
1125             : "=A"(usdiff)
1126             : "A"(usdiff * 1000), "rm"(vcpu->arch.virtual_tsc_khz));
1127 #endif
1128         do_div(elapsed, 1000);
1129         usdiff -= elapsed;
1130         if (usdiff < 0)
1131                 usdiff = -usdiff;
1132
1133         /*
1134          * Special case: TSC write with a small delta (1 second) of virtual
1135          * cycle time against real time is interpreted as an attempt to
1136          * synchronize the CPU.
1137          *
1138          * For a reliable TSC, we can match TSC offsets, and for an unstable
1139          * TSC, we add elapsed time in this computation.  We could let the
1140          * compensation code attempt to catch up if we fall behind, but
1141          * it's better to try to match offsets from the beginning.
1142          */
1143         if (usdiff < USEC_PER_SEC &&
1144             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1145                 if (!check_tsc_unstable()) {
1146                         offset = kvm->arch.cur_tsc_offset;
1147                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1148                 } else {
1149                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1150                         data += delta;
1151                         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1152                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1153                 }
1154         } else {
1155                 /*
1156                  * We split periods of matched TSC writes into generations.
1157                  * For each generation, we track the original measured
1158                  * nanosecond time, offset, and write, so if TSCs are in
1159                  * sync, we can match exact offset, and if not, we can match
1160                  * exact software computation in compute_guest_tsc()
1161                  *
1162                  * These values are tracked in kvm->arch.cur_xxx variables.
1163                  */
1164                 kvm->arch.cur_tsc_generation++;
1165                 kvm->arch.cur_tsc_nsec = ns;
1166                 kvm->arch.cur_tsc_write = data;
1167                 kvm->arch.cur_tsc_offset = offset;
1168                 pr_debug("kvm: new tsc generation %u, clock %llu\n",
1169                          kvm->arch.cur_tsc_generation, data);
1170         }
1171
1172         /*
1173          * We also track th most recent recorded KHZ, write and time to
1174          * allow the matching interval to be extended at each write.
1175          */
1176         kvm->arch.last_tsc_nsec = ns;
1177         kvm->arch.last_tsc_write = data;
1178         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1179
1180         /* Reset of TSC must disable overshoot protection below */
1181         vcpu->arch.hv_clock.tsc_timestamp = 0;
1182         vcpu->arch.last_guest_tsc = data;
1183
1184         /* Keep track of which generation this VCPU has synchronized to */
1185         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1186         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1187         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1188
1189         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1190         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1191 }
1192
1193 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1194
1195 #ifdef CONFIG_X86_64
1196
1197 static cycle_t read_tsc(void)
1198 {
1199         cycle_t ret;
1200         u64 last;
1201
1202         /*
1203          * Empirically, a fence (of type that depends on the CPU)
1204          * before rdtsc is enough to ensure that rdtsc is ordered
1205          * with respect to loads.  The various CPU manuals are unclear
1206          * as to whether rdtsc can be reordered with later loads,
1207          * but no one has ever seen it happen.
1208          */
1209         rdtsc_barrier();
1210         ret = (cycle_t)vget_cycles();
1211
1212         last = pvclock_gtod_data.clock.cycle_last;
1213
1214         if (likely(ret >= last))
1215                 return ret;
1216
1217         /*
1218          * GCC likes to generate cmov here, but this branch is extremely
1219          * predictable (it's just a funciton of time and the likely is
1220          * very likely) and there's a data dependence, so force GCC
1221          * to generate a branch instead.  I don't barrier() because
1222          * we don't actually need a barrier, and if this function
1223          * ever gets inlined it will generate worse code.
1224          */
1225         asm volatile ("");
1226         return last;
1227 }
1228
1229 static inline u64 vgettsc(cycle_t *cycle_now)
1230 {
1231         long v;
1232         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1233
1234         *cycle_now = read_tsc();
1235
1236         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1237         return v * gtod->clock.mult;
1238 }
1239
1240 static int do_monotonic(struct timespec *ts, cycle_t *cycle_now)
1241 {
1242         unsigned long seq;
1243         u64 ns;
1244         int mode;
1245         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1246
1247         ts->tv_nsec = 0;
1248         do {
1249                 seq = read_seqcount_begin(&gtod->seq);
1250                 mode = gtod->clock.vclock_mode;
1251                 ts->tv_sec = gtod->monotonic_time_sec;
1252                 ns = gtod->monotonic_time_snsec;
1253                 ns += vgettsc(cycle_now);
1254                 ns >>= gtod->clock.shift;
1255         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1256         timespec_add_ns(ts, ns);
1257
1258         return mode;
1259 }
1260
1261 /* returns true if host is using tsc clocksource */
1262 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1263 {
1264         struct timespec ts;
1265
1266         /* checked again under seqlock below */
1267         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1268                 return false;
1269
1270         if (do_monotonic(&ts, cycle_now) != VCLOCK_TSC)
1271                 return false;
1272
1273         monotonic_to_bootbased(&ts);
1274         *kernel_ns = timespec_to_ns(&ts);
1275
1276         return true;
1277 }
1278 #endif
1279
1280 /*
1281  *
1282  * Assuming a stable TSC across physical CPUS, the following condition
1283  * is possible. Each numbered line represents an event visible to both
1284  * CPUs at the next numbered event.
1285  *
1286  * "timespecX" represents host monotonic time. "tscX" represents
1287  * RDTSC value.
1288  *
1289  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1290  *
1291  * 1.  read timespec0,tsc0
1292  * 2.                                   | timespec1 = timespec0 + N
1293  *                                      | tsc1 = tsc0 + M
1294  * 3. transition to guest               | transition to guest
1295  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1296  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1297  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1298  *
1299  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1300  *
1301  *      - ret0 < ret1
1302  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1303  *              ...
1304  *      - 0 < N - M => M < N
1305  *
1306  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1307  * always the case (the difference between two distinct xtime instances
1308  * might be smaller then the difference between corresponding TSC reads,
1309  * when updating guest vcpus pvclock areas).
1310  *
1311  * To avoid that problem, do not allow visibility of distinct
1312  * system_timestamp/tsc_timestamp values simultaneously: use a master
1313  * copy of host monotonic time values. Update that master copy
1314  * in lockstep.
1315  *
1316  * Rely on synchronization of host TSCs for monotonicity.
1317  *
1318  */
1319
1320 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1321 {
1322 #ifdef CONFIG_X86_64
1323         struct kvm_arch *ka = &kvm->arch;
1324         int vclock_mode;
1325
1326         /*
1327          * If the host uses TSC clock, then passthrough TSC as stable
1328          * to the guest.
1329          */
1330         ka->use_master_clock = kvm_get_time_and_clockread(
1331                                         &ka->master_kernel_ns,
1332                                         &ka->master_cycle_now);
1333
1334         if (ka->use_master_clock)
1335                 atomic_set(&kvm_guest_has_master_clock, 1);
1336
1337         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1338         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode);
1339 #endif
1340 }
1341
1342 static int kvm_guest_time_update(struct kvm_vcpu *v)
1343 {
1344         unsigned long flags, this_tsc_khz;
1345         struct kvm_vcpu_arch *vcpu = &v->arch;
1346         struct kvm_arch *ka = &v->kvm->arch;
1347         void *shared_kaddr;
1348         s64 kernel_ns, max_kernel_ns;
1349         u64 tsc_timestamp, host_tsc;
1350         struct pvclock_vcpu_time_info *guest_hv_clock;
1351         u8 pvclock_flags;
1352         bool use_master_clock;
1353
1354         kernel_ns = 0;
1355         host_tsc = 0;
1356
1357         /* Keep irq disabled to prevent changes to the clock */
1358         local_irq_save(flags);
1359         this_tsc_khz = __get_cpu_var(cpu_tsc_khz);
1360         if (unlikely(this_tsc_khz == 0)) {
1361                 local_irq_restore(flags);
1362                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1363                 return 1;
1364         }
1365
1366         /*
1367          * If the host uses TSC clock, then passthrough TSC as stable
1368          * to the guest.
1369          */
1370         spin_lock(&ka->pvclock_gtod_sync_lock);
1371         use_master_clock = ka->use_master_clock;
1372         if (use_master_clock) {
1373                 host_tsc = ka->master_cycle_now;
1374                 kernel_ns = ka->master_kernel_ns;
1375         }
1376         spin_unlock(&ka->pvclock_gtod_sync_lock);
1377         if (!use_master_clock) {
1378                 host_tsc = native_read_tsc();
1379                 kernel_ns = get_kernel_ns();
1380         }
1381
1382         tsc_timestamp = kvm_x86_ops->read_l1_tsc(v, host_tsc);
1383
1384         /*
1385          * We may have to catch up the TSC to match elapsed wall clock
1386          * time for two reasons, even if kvmclock is used.
1387          *   1) CPU could have been running below the maximum TSC rate
1388          *   2) Broken TSC compensation resets the base at each VCPU
1389          *      entry to avoid unknown leaps of TSC even when running
1390          *      again on the same CPU.  This may cause apparent elapsed
1391          *      time to disappear, and the guest to stand still or run
1392          *      very slowly.
1393          */
1394         if (vcpu->tsc_catchup) {
1395                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1396                 if (tsc > tsc_timestamp) {
1397                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1398                         tsc_timestamp = tsc;
1399                 }
1400         }
1401
1402         local_irq_restore(flags);
1403
1404         if (!vcpu->time_page)
1405                 return 0;
1406
1407         /*
1408          * Time as measured by the TSC may go backwards when resetting the base
1409          * tsc_timestamp.  The reason for this is that the TSC resolution is
1410          * higher than the resolution of the other clock scales.  Thus, many
1411          * possible measurments of the TSC correspond to one measurement of any
1412          * other clock, and so a spread of values is possible.  This is not a
1413          * problem for the computation of the nanosecond clock; with TSC rates
1414          * around 1GHZ, there can only be a few cycles which correspond to one
1415          * nanosecond value, and any path through this code will inevitably
1416          * take longer than that.  However, with the kernel_ns value itself,
1417          * the precision may be much lower, down to HZ granularity.  If the
1418          * first sampling of TSC against kernel_ns ends in the low part of the
1419          * range, and the second in the high end of the range, we can get:
1420          *
1421          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1422          *
1423          * As the sampling errors potentially range in the thousands of cycles,
1424          * it is possible such a time value has already been observed by the
1425          * guest.  To protect against this, we must compute the system time as
1426          * observed by the guest and ensure the new system time is greater.
1427          */
1428         max_kernel_ns = 0;
1429         if (vcpu->hv_clock.tsc_timestamp) {
1430                 max_kernel_ns = vcpu->last_guest_tsc -
1431                                 vcpu->hv_clock.tsc_timestamp;
1432                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1433                                     vcpu->hv_clock.tsc_to_system_mul,
1434                                     vcpu->hv_clock.tsc_shift);
1435                 max_kernel_ns += vcpu->last_kernel_ns;
1436         }
1437
1438         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1439                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1440                                    &vcpu->hv_clock.tsc_shift,
1441                                    &vcpu->hv_clock.tsc_to_system_mul);
1442                 vcpu->hw_tsc_khz = this_tsc_khz;
1443         }
1444
1445         /* with a master <monotonic time, tsc value> tuple,
1446          * pvclock clock reads always increase at the (scaled) rate
1447          * of guest TSC - no need to deal with sampling errors.
1448          */
1449         if (!use_master_clock) {
1450                 if (max_kernel_ns > kernel_ns)
1451                         kernel_ns = max_kernel_ns;
1452         }
1453         /* With all the info we got, fill in the values */
1454         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1455         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1456         vcpu->last_kernel_ns = kernel_ns;
1457         vcpu->last_guest_tsc = tsc_timestamp;
1458
1459         /*
1460          * The interface expects us to write an even number signaling that the
1461          * update is finished. Since the guest won't see the intermediate
1462          * state, we just increase by 2 at the end.
1463          */
1464         vcpu->hv_clock.version += 2;
1465
1466         shared_kaddr = kmap_atomic(vcpu->time_page);
1467
1468         guest_hv_clock = shared_kaddr + vcpu->time_offset;
1469
1470         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1471         pvclock_flags = (guest_hv_clock->flags & PVCLOCK_GUEST_STOPPED);
1472
1473         if (vcpu->pvclock_set_guest_stopped_request) {
1474                 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1475                 vcpu->pvclock_set_guest_stopped_request = false;
1476         }
1477
1478         /* If the host uses TSC clocksource, then it is stable */
1479         if (use_master_clock)
1480                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1481
1482         vcpu->hv_clock.flags = pvclock_flags;
1483
1484         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1485                sizeof(vcpu->hv_clock));
1486
1487         kunmap_atomic(shared_kaddr);
1488
1489         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1490         return 0;
1491 }
1492
1493 static bool msr_mtrr_valid(unsigned msr)
1494 {
1495         switch (msr) {
1496         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1497         case MSR_MTRRfix64K_00000:
1498         case MSR_MTRRfix16K_80000:
1499         case MSR_MTRRfix16K_A0000:
1500         case MSR_MTRRfix4K_C0000:
1501         case MSR_MTRRfix4K_C8000:
1502         case MSR_MTRRfix4K_D0000:
1503         case MSR_MTRRfix4K_D8000:
1504         case MSR_MTRRfix4K_E0000:
1505         case MSR_MTRRfix4K_E8000:
1506         case MSR_MTRRfix4K_F0000:
1507         case MSR_MTRRfix4K_F8000:
1508         case MSR_MTRRdefType:
1509         case MSR_IA32_CR_PAT:
1510                 return true;
1511         case 0x2f8:
1512                 return true;
1513         }
1514         return false;
1515 }
1516
1517 static bool valid_pat_type(unsigned t)
1518 {
1519         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1520 }
1521
1522 static bool valid_mtrr_type(unsigned t)
1523 {
1524         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1525 }
1526
1527 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1528 {
1529         int i;
1530
1531         if (!msr_mtrr_valid(msr))
1532                 return false;
1533
1534         if (msr == MSR_IA32_CR_PAT) {
1535                 for (i = 0; i < 8; i++)
1536                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1537                                 return false;
1538                 return true;
1539         } else if (msr == MSR_MTRRdefType) {
1540                 if (data & ~0xcff)
1541                         return false;
1542                 return valid_mtrr_type(data & 0xff);
1543         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1544                 for (i = 0; i < 8 ; i++)
1545                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1546                                 return false;
1547                 return true;
1548         }
1549
1550         /* variable MTRRs */
1551         return valid_mtrr_type(data & 0xff);
1552 }
1553
1554 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1555 {
1556         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1557
1558         if (!mtrr_valid(vcpu, msr, data))
1559                 return 1;
1560
1561         if (msr == MSR_MTRRdefType) {
1562                 vcpu->arch.mtrr_state.def_type = data;
1563                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1564         } else if (msr == MSR_MTRRfix64K_00000)
1565                 p[0] = data;
1566         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1567                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1568         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1569                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1570         else if (msr == MSR_IA32_CR_PAT)
1571                 vcpu->arch.pat = data;
1572         else {  /* Variable MTRRs */
1573                 int idx, is_mtrr_mask;
1574                 u64 *pt;
1575
1576                 idx = (msr - 0x200) / 2;
1577                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1578                 if (!is_mtrr_mask)
1579                         pt =
1580                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1581                 else
1582                         pt =
1583                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1584                 *pt = data;
1585         }
1586
1587         kvm_mmu_reset_context(vcpu);
1588         return 0;
1589 }
1590
1591 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1592 {
1593         u64 mcg_cap = vcpu->arch.mcg_cap;
1594         unsigned bank_num = mcg_cap & 0xff;
1595
1596         switch (msr) {
1597         case MSR_IA32_MCG_STATUS:
1598                 vcpu->arch.mcg_status = data;
1599                 break;
1600         case MSR_IA32_MCG_CTL:
1601                 if (!(mcg_cap & MCG_CTL_P))
1602                         return 1;
1603                 if (data != 0 && data != ~(u64)0)
1604                         return -1;
1605                 vcpu->arch.mcg_ctl = data;
1606                 break;
1607         default:
1608                 if (msr >= MSR_IA32_MC0_CTL &&
1609                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1610                         u32 offset = msr - MSR_IA32_MC0_CTL;
1611                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1612                          * some Linux kernels though clear bit 10 in bank 4 to
1613                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1614                          * this to avoid an uncatched #GP in the guest
1615                          */
1616                         if ((offset & 0x3) == 0 &&
1617                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1618                                 return -1;
1619                         vcpu->arch.mce_banks[offset] = data;
1620                         break;
1621                 }
1622                 return 1;
1623         }
1624         return 0;
1625 }
1626
1627 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1628 {
1629         struct kvm *kvm = vcpu->kvm;
1630         int lm = is_long_mode(vcpu);
1631         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1632                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1633         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1634                 : kvm->arch.xen_hvm_config.blob_size_32;
1635         u32 page_num = data & ~PAGE_MASK;
1636         u64 page_addr = data & PAGE_MASK;
1637         u8 *page;
1638         int r;
1639
1640         r = -E2BIG;
1641         if (page_num >= blob_size)
1642                 goto out;
1643         r = -ENOMEM;
1644         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1645         if (IS_ERR(page)) {
1646                 r = PTR_ERR(page);
1647                 goto out;
1648         }
1649         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1650                 goto out_free;
1651         r = 0;
1652 out_free:
1653         kfree(page);
1654 out:
1655         return r;
1656 }
1657
1658 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1659 {
1660         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1661 }
1662
1663 static bool kvm_hv_msr_partition_wide(u32 msr)
1664 {
1665         bool r = false;
1666         switch (msr) {
1667         case HV_X64_MSR_GUEST_OS_ID:
1668         case HV_X64_MSR_HYPERCALL:
1669                 r = true;
1670                 break;
1671         }
1672
1673         return r;
1674 }
1675
1676 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1677 {
1678         struct kvm *kvm = vcpu->kvm;
1679
1680         switch (msr) {
1681         case HV_X64_MSR_GUEST_OS_ID:
1682                 kvm->arch.hv_guest_os_id = data;
1683                 /* setting guest os id to zero disables hypercall page */
1684                 if (!kvm->arch.hv_guest_os_id)
1685                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1686                 break;
1687         case HV_X64_MSR_HYPERCALL: {
1688                 u64 gfn;
1689                 unsigned long addr;
1690                 u8 instructions[4];
1691
1692                 /* if guest os id is not set hypercall should remain disabled */
1693                 if (!kvm->arch.hv_guest_os_id)
1694                         break;
1695                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1696                         kvm->arch.hv_hypercall = data;
1697                         break;
1698                 }
1699                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1700                 addr = gfn_to_hva(kvm, gfn);
1701                 if (kvm_is_error_hva(addr))
1702                         return 1;
1703                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1704                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1705                 if (__copy_to_user((void __user *)addr, instructions, 4))
1706                         return 1;
1707                 kvm->arch.hv_hypercall = data;
1708                 break;
1709         }
1710         default:
1711                 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1712                             "data 0x%llx\n", msr, data);
1713                 return 1;
1714         }
1715         return 0;
1716 }
1717
1718 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1719 {
1720         switch (msr) {
1721         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1722                 unsigned long addr;
1723
1724                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1725                         vcpu->arch.hv_vapic = data;
1726                         break;
1727                 }
1728                 addr = gfn_to_hva(vcpu->kvm, data >>
1729                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1730                 if (kvm_is_error_hva(addr))
1731                         return 1;
1732                 if (__clear_user((void __user *)addr, PAGE_SIZE))
1733                         return 1;
1734                 vcpu->arch.hv_vapic = data;
1735                 break;
1736         }
1737         case HV_X64_MSR_EOI:
1738                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1739         case HV_X64_MSR_ICR:
1740                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1741         case HV_X64_MSR_TPR:
1742                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1743         default:
1744                 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1745                             "data 0x%llx\n", msr, data);
1746                 return 1;
1747         }
1748
1749         return 0;
1750 }
1751
1752 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1753 {
1754         gpa_t gpa = data & ~0x3f;
1755
1756         /* Bits 2:5 are reserved, Should be zero */
1757         if (data & 0x3c)
1758                 return 1;
1759
1760         vcpu->arch.apf.msr_val = data;
1761
1762         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1763                 kvm_clear_async_pf_completion_queue(vcpu);
1764                 kvm_async_pf_hash_reset(vcpu);
1765                 return 0;
1766         }
1767
1768         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa))
1769                 return 1;
1770
1771         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1772         kvm_async_pf_wakeup_all(vcpu);
1773         return 0;
1774 }
1775
1776 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1777 {
1778         if (vcpu->arch.time_page) {
1779                 kvm_release_page_dirty(vcpu->arch.time_page);
1780                 vcpu->arch.time_page = NULL;
1781         }
1782 }
1783
1784 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1785 {
1786         u64 delta;
1787
1788         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1789                 return;
1790
1791         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1792         vcpu->arch.st.last_steal = current->sched_info.run_delay;
1793         vcpu->arch.st.accum_steal = delta;
1794 }
1795
1796 static void record_steal_time(struct kvm_vcpu *vcpu)
1797 {
1798         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1799                 return;
1800
1801         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1802                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1803                 return;
1804
1805         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1806         vcpu->arch.st.steal.version += 2;
1807         vcpu->arch.st.accum_steal = 0;
1808
1809         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1810                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1811 }
1812
1813 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1814 {
1815         bool pr = false;
1816
1817         switch (msr) {
1818         case MSR_EFER:
1819                 return set_efer(vcpu, data);
1820         case MSR_K7_HWCR:
1821                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1822                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1823                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
1824                 if (data != 0) {
1825                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1826                                     data);
1827                         return 1;
1828                 }
1829                 break;
1830         case MSR_FAM10H_MMIO_CONF_BASE:
1831                 if (data != 0) {
1832                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1833                                     "0x%llx\n", data);
1834                         return 1;
1835                 }
1836                 break;
1837         case MSR_AMD64_NB_CFG:
1838                 break;
1839         case MSR_IA32_DEBUGCTLMSR:
1840                 if (!data) {
1841                         /* We support the non-activated case already */
1842                         break;
1843                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1844                         /* Values other than LBR and BTF are vendor-specific,
1845                            thus reserved and should throw a #GP */
1846                         return 1;
1847                 }
1848                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1849                             __func__, data);
1850                 break;
1851         case MSR_IA32_UCODE_REV:
1852         case MSR_IA32_UCODE_WRITE:
1853         case MSR_VM_HSAVE_PA:
1854         case MSR_AMD64_PATCH_LOADER:
1855                 break;
1856         case 0x200 ... 0x2ff:
1857                 return set_msr_mtrr(vcpu, msr, data);
1858         case MSR_IA32_APICBASE:
1859                 kvm_set_apic_base(vcpu, data);
1860                 break;
1861         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1862                 return kvm_x2apic_msr_write(vcpu, msr, data);
1863         case MSR_IA32_TSCDEADLINE:
1864                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
1865                 break;
1866         case MSR_IA32_MISC_ENABLE:
1867                 vcpu->arch.ia32_misc_enable_msr = data;
1868                 break;
1869         case MSR_KVM_WALL_CLOCK_NEW:
1870         case MSR_KVM_WALL_CLOCK:
1871                 vcpu->kvm->arch.wall_clock = data;
1872                 kvm_write_wall_clock(vcpu->kvm, data);
1873                 break;
1874         case MSR_KVM_SYSTEM_TIME_NEW:
1875         case MSR_KVM_SYSTEM_TIME: {
1876                 kvmclock_reset(vcpu);
1877
1878                 vcpu->arch.time = data;
1879                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1880
1881                 /* we verify if the enable bit is set... */
1882                 if (!(data & 1))
1883                         break;
1884
1885                 /* ...but clean it before doing the actual write */
1886                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1887
1888                 vcpu->arch.time_page =
1889                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1890
1891                 if (is_error_page(vcpu->arch.time_page))
1892                         vcpu->arch.time_page = NULL;
1893
1894                 break;
1895         }
1896         case MSR_KVM_ASYNC_PF_EN:
1897                 if (kvm_pv_enable_async_pf(vcpu, data))
1898                         return 1;
1899                 break;
1900         case MSR_KVM_STEAL_TIME:
1901
1902                 if (unlikely(!sched_info_on()))
1903                         return 1;
1904
1905                 if (data & KVM_STEAL_RESERVED_MASK)
1906                         return 1;
1907
1908                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
1909                                                         data & KVM_STEAL_VALID_BITS))
1910                         return 1;
1911
1912                 vcpu->arch.st.msr_val = data;
1913
1914                 if (!(data & KVM_MSR_ENABLED))
1915                         break;
1916
1917                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
1918
1919                 preempt_disable();
1920                 accumulate_steal_time(vcpu);
1921                 preempt_enable();
1922
1923                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
1924
1925                 break;
1926         case MSR_KVM_PV_EOI_EN:
1927                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
1928                         return 1;
1929                 break;
1930
1931         case MSR_IA32_MCG_CTL:
1932         case MSR_IA32_MCG_STATUS:
1933         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1934                 return set_msr_mce(vcpu, msr, data);
1935
1936         /* Performance counters are not protected by a CPUID bit,
1937          * so we should check all of them in the generic path for the sake of
1938          * cross vendor migration.
1939          * Writing a zero into the event select MSRs disables them,
1940          * which we perfectly emulate ;-). Any other value should be at least
1941          * reported, some guests depend on them.
1942          */
1943         case MSR_K7_EVNTSEL0:
1944         case MSR_K7_EVNTSEL1:
1945         case MSR_K7_EVNTSEL2:
1946         case MSR_K7_EVNTSEL3:
1947                 if (data != 0)
1948                         vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1949                                     "0x%x data 0x%llx\n", msr, data);
1950                 break;
1951         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1952          * so we ignore writes to make it happy.
1953          */
1954         case MSR_K7_PERFCTR0:
1955         case MSR_K7_PERFCTR1:
1956         case MSR_K7_PERFCTR2:
1957         case MSR_K7_PERFCTR3:
1958                 vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1959                             "0x%x data 0x%llx\n", msr, data);
1960                 break;
1961         case MSR_P6_PERFCTR0:
1962         case MSR_P6_PERFCTR1:
1963                 pr = true;
1964         case MSR_P6_EVNTSEL0:
1965         case MSR_P6_EVNTSEL1:
1966                 if (kvm_pmu_msr(vcpu, msr))
1967                         return kvm_pmu_set_msr(vcpu, msr, data);
1968
1969                 if (pr || data != 0)
1970                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
1971                                     "0x%x data 0x%llx\n", msr, data);
1972                 break;
1973         case MSR_K7_CLK_CTL:
1974                 /*
1975                  * Ignore all writes to this no longer documented MSR.
1976                  * Writes are only relevant for old K7 processors,
1977                  * all pre-dating SVM, but a recommended workaround from
1978                  * AMD for these chips. It is possible to specify the
1979                  * affected processor models on the command line, hence
1980                  * the need to ignore the workaround.
1981                  */
1982                 break;
1983         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1984                 if (kvm_hv_msr_partition_wide(msr)) {
1985                         int r;
1986                         mutex_lock(&vcpu->kvm->lock);
1987                         r = set_msr_hyperv_pw(vcpu, msr, data);
1988                         mutex_unlock(&vcpu->kvm->lock);
1989                         return r;
1990                 } else
1991                         return set_msr_hyperv(vcpu, msr, data);
1992                 break;
1993         case MSR_IA32_BBL_CR_CTL3:
1994                 /* Drop writes to this legacy MSR -- see rdmsr
1995                  * counterpart for further detail.
1996                  */
1997                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
1998                 break;
1999         case MSR_AMD64_OSVW_ID_LENGTH:
2000                 if (!guest_cpuid_has_osvw(vcpu))
2001                         return 1;
2002                 vcpu->arch.osvw.length = data;
2003                 break;
2004         case MSR_AMD64_OSVW_STATUS:
2005                 if (!guest_cpuid_has_osvw(vcpu))
2006                         return 1;
2007                 vcpu->arch.osvw.status = data;
2008                 break;
2009         default:
2010                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2011                         return xen_hvm_config(vcpu, data);
2012                 if (kvm_pmu_msr(vcpu, msr))
2013                         return kvm_pmu_set_msr(vcpu, msr, data);
2014                 if (!ignore_msrs) {
2015                         vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2016                                     msr, data);
2017                         return 1;
2018                 } else {
2019                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2020                                     msr, data);
2021                         break;
2022                 }
2023         }
2024         return 0;
2025 }
2026 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2027
2028
2029 /*
2030  * Reads an msr value (of 'msr_index') into 'pdata'.
2031  * Returns 0 on success, non-0 otherwise.
2032  * Assumes vcpu_load() was already called.
2033  */
2034 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
2035 {
2036         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
2037 }
2038
2039 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2040 {
2041         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
2042
2043         if (!msr_mtrr_valid(msr))
2044                 return 1;
2045
2046         if (msr == MSR_MTRRdefType)
2047                 *pdata = vcpu->arch.mtrr_state.def_type +
2048                          (vcpu->arch.mtrr_state.enabled << 10);
2049         else if (msr == MSR_MTRRfix64K_00000)
2050                 *pdata = p[0];
2051         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
2052                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
2053         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
2054                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
2055         else if (msr == MSR_IA32_CR_PAT)
2056                 *pdata = vcpu->arch.pat;
2057         else {  /* Variable MTRRs */
2058                 int idx, is_mtrr_mask;
2059                 u64 *pt;
2060
2061                 idx = (msr - 0x200) / 2;
2062                 is_mtrr_mask = msr - 0x200 - 2 * idx;
2063                 if (!is_mtrr_mask)
2064                         pt =
2065                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
2066                 else
2067                         pt =
2068                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
2069                 *pdata = *pt;
2070         }
2071
2072         return 0;
2073 }
2074
2075 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2076 {
2077         u64 data;
2078         u64 mcg_cap = vcpu->arch.mcg_cap;
2079         unsigned bank_num = mcg_cap & 0xff;
2080
2081         switch (msr) {
2082         case MSR_IA32_P5_MC_ADDR:
2083         case MSR_IA32_P5_MC_TYPE:
2084                 data = 0;
2085                 break;
2086         case MSR_IA32_MCG_CAP:
2087                 data = vcpu->arch.mcg_cap;
2088                 break;
2089         case MSR_IA32_MCG_CTL:
2090                 if (!(mcg_cap & MCG_CTL_P))
2091                         return 1;
2092                 data = vcpu->arch.mcg_ctl;
2093                 break;
2094         case MSR_IA32_MCG_STATUS:
2095                 data = vcpu->arch.mcg_status;
2096                 break;
2097         default:
2098                 if (msr >= MSR_IA32_MC0_CTL &&
2099                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
2100                         u32 offset = msr - MSR_IA32_MC0_CTL;
2101                         data = vcpu->arch.mce_banks[offset];
2102                         break;
2103                 }
2104                 return 1;
2105         }
2106         *pdata = data;
2107         return 0;
2108 }
2109
2110 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2111 {
2112         u64 data = 0;
2113         struct kvm *kvm = vcpu->kvm;
2114
2115         switch (msr) {
2116         case HV_X64_MSR_GUEST_OS_ID:
2117                 data = kvm->arch.hv_guest_os_id;
2118                 break;
2119         case HV_X64_MSR_HYPERCALL:
2120                 data = kvm->arch.hv_hypercall;
2121                 break;
2122         default:
2123                 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
2124                 return 1;
2125         }
2126
2127         *pdata = data;
2128         return 0;
2129 }
2130
2131 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2132 {
2133         u64 data = 0;
2134
2135         switch (msr) {
2136         case HV_X64_MSR_VP_INDEX: {
2137                 int r;
2138                 struct kvm_vcpu *v;
2139                 kvm_for_each_vcpu(r, v, vcpu->kvm)
2140                         if (v == vcpu)
2141                                 data = r;
2142                 break;
2143         }
2144         case HV_X64_MSR_EOI:
2145                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
2146         case HV_X64_MSR_ICR:
2147                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
2148         case HV_X64_MSR_TPR:
2149                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
2150         case HV_X64_MSR_APIC_ASSIST_PAGE:
2151                 data = vcpu->arch.hv_vapic;
2152                 break;
2153         default:
2154                 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
2155                 return 1;
2156         }
2157         *pdata = data;
2158         return 0;
2159 }
2160
2161 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2162 {
2163         u64 data;
2164
2165         switch (msr) {
2166         case MSR_IA32_PLATFORM_ID:
2167         case MSR_IA32_EBL_CR_POWERON:
2168         case MSR_IA32_DEBUGCTLMSR:
2169         case MSR_IA32_LASTBRANCHFROMIP:
2170         case MSR_IA32_LASTBRANCHTOIP:
2171         case MSR_IA32_LASTINTFROMIP:
2172         case MSR_IA32_LASTINTTOIP:
2173         case MSR_K8_SYSCFG:
2174         case MSR_K7_HWCR:
2175         case MSR_VM_HSAVE_PA:
2176         case MSR_K7_EVNTSEL0:
2177         case MSR_K7_PERFCTR0:
2178         case MSR_K8_INT_PENDING_MSG:
2179         case MSR_AMD64_NB_CFG:
2180         case MSR_FAM10H_MMIO_CONF_BASE:
2181                 data = 0;
2182                 break;
2183         case MSR_P6_PERFCTR0:
2184         case MSR_P6_PERFCTR1:
2185         case MSR_P6_EVNTSEL0:
2186         case MSR_P6_EVNTSEL1:
2187                 if (kvm_pmu_msr(vcpu, msr))
2188                         return kvm_pmu_get_msr(vcpu, msr, pdata);
2189                 data = 0;
2190                 break;
2191         case MSR_IA32_UCODE_REV:
2192                 data = 0x100000000ULL;
2193                 break;
2194         case MSR_MTRRcap:
2195                 data = 0x500 | KVM_NR_VAR_MTRR;
2196                 break;
2197         case 0x200 ... 0x2ff:
2198                 return get_msr_mtrr(vcpu, msr, pdata);
2199         case 0xcd: /* fsb frequency */
2200                 data = 3;
2201                 break;
2202                 /*
2203                  * MSR_EBC_FREQUENCY_ID
2204                  * Conservative value valid for even the basic CPU models.
2205                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2206                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2207                  * and 266MHz for model 3, or 4. Set Core Clock
2208                  * Frequency to System Bus Frequency Ratio to 1 (bits
2209                  * 31:24) even though these are only valid for CPU
2210                  * models > 2, however guests may end up dividing or
2211                  * multiplying by zero otherwise.
2212                  */
2213         case MSR_EBC_FREQUENCY_ID:
2214                 data = 1 << 24;
2215                 break;
2216         case MSR_IA32_APICBASE:
2217                 data = kvm_get_apic_base(vcpu);
2218                 break;
2219         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2220                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
2221                 break;
2222         case MSR_IA32_TSCDEADLINE:
2223                 data = kvm_get_lapic_tscdeadline_msr(vcpu);
2224                 break;
2225         case MSR_IA32_MISC_ENABLE:
2226                 data = vcpu->arch.ia32_misc_enable_msr;
2227                 break;
2228         case MSR_IA32_PERF_STATUS:
2229                 /* TSC increment by tick */
2230                 data = 1000ULL;
2231                 /* CPU multiplier */
2232                 data |= (((uint64_t)4ULL) << 40);
2233                 break;
2234         case MSR_EFER:
2235                 data = vcpu->arch.efer;
2236                 break;
2237         case MSR_KVM_WALL_CLOCK:
2238         case MSR_KVM_WALL_CLOCK_NEW:
2239                 data = vcpu->kvm->arch.wall_clock;
2240                 break;
2241         case MSR_KVM_SYSTEM_TIME:
2242         case MSR_KVM_SYSTEM_TIME_NEW:
2243                 data = vcpu->arch.time;
2244                 break;
2245         case MSR_KVM_ASYNC_PF_EN:
2246                 data = vcpu->arch.apf.msr_val;
2247                 break;
2248         case MSR_KVM_STEAL_TIME:
2249                 data = vcpu->arch.st.msr_val;
2250                 break;
2251         case MSR_KVM_PV_EOI_EN:
2252                 data = vcpu->arch.pv_eoi.msr_val;
2253                 break;
2254         case MSR_IA32_P5_MC_ADDR:
2255         case MSR_IA32_P5_MC_TYPE:
2256         case MSR_IA32_MCG_CAP:
2257         case MSR_IA32_MCG_CTL:
2258         case MSR_IA32_MCG_STATUS:
2259         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
2260                 return get_msr_mce(vcpu, msr, pdata);
2261         case MSR_K7_CLK_CTL:
2262                 /*
2263                  * Provide expected ramp-up count for K7. All other
2264                  * are set to zero, indicating minimum divisors for
2265                  * every field.
2266                  *
2267                  * This prevents guest kernels on AMD host with CPU
2268                  * type 6, model 8 and higher from exploding due to
2269                  * the rdmsr failing.
2270                  */
2271                 data = 0x20000000;
2272                 break;
2273         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2274                 if (kvm_hv_msr_partition_wide(msr)) {
2275                         int r;
2276                         mutex_lock(&vcpu->kvm->lock);
2277                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
2278                         mutex_unlock(&vcpu->kvm->lock);
2279                         return r;
2280                 } else
2281                         return get_msr_hyperv(vcpu, msr, pdata);
2282                 break;
2283         case MSR_IA32_BBL_CR_CTL3:
2284                 /* This legacy MSR exists but isn't fully documented in current
2285                  * silicon.  It is however accessed by winxp in very narrow
2286                  * scenarios where it sets bit #19, itself documented as
2287                  * a "reserved" bit.  Best effort attempt to source coherent
2288                  * read data here should the balance of the register be
2289                  * interpreted by the guest:
2290                  *
2291                  * L2 cache control register 3: 64GB range, 256KB size,
2292                  * enabled, latency 0x1, configured
2293                  */
2294                 data = 0xbe702111;
2295                 break;
2296         case MSR_AMD64_OSVW_ID_LENGTH:
2297                 if (!guest_cpuid_has_osvw(vcpu))
2298                         return 1;
2299                 data = vcpu->arch.osvw.length;
2300                 break;
2301         case MSR_AMD64_OSVW_STATUS:
2302                 if (!guest_cpuid_has_osvw(vcpu))
2303                         return 1;
2304                 data = vcpu->arch.osvw.status;
2305                 break;
2306         default:
2307                 if (kvm_pmu_msr(vcpu, msr))
2308                         return kvm_pmu_get_msr(vcpu, msr, pdata);
2309                 if (!ignore_msrs) {
2310                         vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
2311                         return 1;
2312                 } else {
2313                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
2314                         data = 0;
2315                 }
2316                 break;
2317         }
2318         *pdata = data;
2319         return 0;
2320 }
2321 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2322
2323 /*
2324  * Read or write a bunch of msrs. All parameters are kernel addresses.
2325  *
2326  * @return number of msrs set successfully.
2327  */
2328 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2329                     struct kvm_msr_entry *entries,
2330                     int (*do_msr)(struct kvm_vcpu *vcpu,
2331                                   unsigned index, u64 *data))
2332 {
2333         int i, idx;
2334
2335         idx = srcu_read_lock(&vcpu->kvm->srcu);
2336         for (i = 0; i < msrs->nmsrs; ++i)
2337                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2338                         break;
2339         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2340
2341         return i;
2342 }
2343
2344 /*
2345  * Read or write a bunch of msrs. Parameters are user addresses.
2346  *
2347  * @return number of msrs set successfully.
2348  */
2349 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2350                   int (*do_msr)(struct kvm_vcpu *vcpu,
2351                                 unsigned index, u64 *data),
2352                   int writeback)
2353 {
2354         struct kvm_msrs msrs;
2355         struct kvm_msr_entry *entries;
2356         int r, n;
2357         unsigned size;
2358
2359         r = -EFAULT;
2360         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2361                 goto out;
2362
2363         r = -E2BIG;
2364         if (msrs.nmsrs >= MAX_IO_MSRS)
2365                 goto out;
2366
2367         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2368         entries = memdup_user(user_msrs->entries, size);
2369         if (IS_ERR(entries)) {
2370                 r = PTR_ERR(entries);
2371                 goto out;
2372         }
2373
2374         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2375         if (r < 0)
2376                 goto out_free;
2377
2378         r = -EFAULT;
2379         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2380                 goto out_free;
2381
2382         r = n;
2383
2384 out_free:
2385         kfree(entries);
2386 out:
2387         return r;
2388 }
2389
2390 int kvm_dev_ioctl_check_extension(long ext)
2391 {
2392         int r;
2393
2394         switch (ext) {
2395         case KVM_CAP_IRQCHIP:
2396         case KVM_CAP_HLT:
2397         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2398         case KVM_CAP_SET_TSS_ADDR:
2399         case KVM_CAP_EXT_CPUID:
2400         case KVM_CAP_CLOCKSOURCE:
2401         case KVM_CAP_PIT:
2402         case KVM_CAP_NOP_IO_DELAY:
2403         case KVM_CAP_MP_STATE:
2404         case KVM_CAP_SYNC_MMU:
2405         case KVM_CAP_USER_NMI:
2406         case KVM_CAP_REINJECT_CONTROL:
2407         case KVM_CAP_IRQ_INJECT_STATUS:
2408         case KVM_CAP_ASSIGN_DEV_IRQ:
2409         case KVM_CAP_IRQFD:
2410         case KVM_CAP_IOEVENTFD:
2411         case KVM_CAP_PIT2:
2412         case KVM_CAP_PIT_STATE2:
2413         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2414         case KVM_CAP_XEN_HVM:
2415         case KVM_CAP_ADJUST_CLOCK:
2416         case KVM_CAP_VCPU_EVENTS:
2417         case KVM_CAP_HYPERV:
2418         case KVM_CAP_HYPERV_VAPIC:
2419         case KVM_CAP_HYPERV_SPIN:
2420         case KVM_CAP_PCI_SEGMENT:
2421         case KVM_CAP_DEBUGREGS:
2422         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2423         case KVM_CAP_XSAVE:
2424         case KVM_CAP_ASYNC_PF:
2425         case KVM_CAP_GET_TSC_KHZ:
2426         case KVM_CAP_PCI_2_3:
2427         case KVM_CAP_KVMCLOCK_CTRL:
2428         case KVM_CAP_READONLY_MEM:
2429         case KVM_CAP_IRQFD_RESAMPLE:
2430                 r = 1;
2431                 break;
2432         case KVM_CAP_COALESCED_MMIO:
2433                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2434                 break;
2435         case KVM_CAP_VAPIC:
2436                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2437                 break;
2438         case KVM_CAP_NR_VCPUS:
2439                 r = KVM_SOFT_MAX_VCPUS;
2440                 break;
2441         case KVM_CAP_MAX_VCPUS:
2442                 r = KVM_MAX_VCPUS;
2443                 break;
2444         case KVM_CAP_NR_MEMSLOTS:
2445                 r = KVM_MEMORY_SLOTS;
2446                 break;
2447         case KVM_CAP_PV_MMU:    /* obsolete */
2448                 r = 0;
2449                 break;
2450         case KVM_CAP_IOMMU:
2451                 r = iommu_present(&pci_bus_type);
2452                 break;
2453         case KVM_CAP_MCE:
2454                 r = KVM_MAX_MCE_BANKS;
2455                 break;
2456         case KVM_CAP_XCRS:
2457                 r = cpu_has_xsave;
2458                 break;
2459         case KVM_CAP_TSC_CONTROL:
2460                 r = kvm_has_tsc_control;
2461                 break;
2462         case KVM_CAP_TSC_DEADLINE_TIMER:
2463                 r = boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER);
2464                 break;
2465         default:
2466                 r = 0;
2467                 break;
2468         }
2469         return r;
2470
2471 }
2472
2473 long kvm_arch_dev_ioctl(struct file *filp,
2474                         unsigned int ioctl, unsigned long arg)
2475 {
2476         void __user *argp = (void __user *)arg;
2477         long r;
2478
2479         switch (ioctl) {
2480         case KVM_GET_MSR_INDEX_LIST: {
2481                 struct kvm_msr_list __user *user_msr_list = argp;
2482                 struct kvm_msr_list msr_list;
2483                 unsigned n;
2484
2485                 r = -EFAULT;
2486                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2487                         goto out;
2488                 n = msr_list.nmsrs;
2489                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2490                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2491                         goto out;
2492                 r = -E2BIG;
2493                 if (n < msr_list.nmsrs)
2494                         goto out;
2495                 r = -EFAULT;
2496                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2497                                  num_msrs_to_save * sizeof(u32)))
2498                         goto out;
2499                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2500                                  &emulated_msrs,
2501                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2502                         goto out;
2503                 r = 0;
2504                 break;
2505         }
2506         case KVM_GET_SUPPORTED_CPUID: {
2507                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2508                 struct kvm_cpuid2 cpuid;
2509
2510                 r = -EFAULT;
2511                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2512                         goto out;
2513                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2514                                                       cpuid_arg->entries);
2515                 if (r)
2516                         goto out;
2517
2518                 r = -EFAULT;
2519                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2520                         goto out;
2521                 r = 0;
2522                 break;
2523         }
2524         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2525                 u64 mce_cap;
2526
2527                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2528                 r = -EFAULT;
2529                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2530                         goto out;
2531                 r = 0;
2532                 break;
2533         }
2534         default:
2535                 r = -EINVAL;
2536         }
2537 out:
2538         return r;
2539 }
2540
2541 static void wbinvd_ipi(void *garbage)
2542 {
2543         wbinvd();
2544 }
2545
2546 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2547 {
2548         return vcpu->kvm->arch.iommu_domain &&
2549                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2550 }
2551
2552 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2553 {
2554         /* Address WBINVD may be executed by guest */
2555         if (need_emulate_wbinvd(vcpu)) {
2556                 if (kvm_x86_ops->has_wbinvd_exit())
2557                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2558                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2559                         smp_call_function_single(vcpu->cpu,
2560                                         wbinvd_ipi, NULL, 1);
2561         }
2562
2563         kvm_x86_ops->vcpu_load(vcpu, cpu);
2564
2565         /* Apply any externally detected TSC adjustments (due to suspend) */
2566         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2567                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2568                 vcpu->arch.tsc_offset_adjustment = 0;
2569                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
2570         }
2571
2572         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2573                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2574                                 native_read_tsc() - vcpu->arch.last_host_tsc;
2575                 if (tsc_delta < 0)
2576                         mark_tsc_unstable("KVM discovered backwards TSC");
2577                 if (check_tsc_unstable()) {
2578                         u64 offset = kvm_x86_ops->compute_tsc_offset(vcpu,
2579                                                 vcpu->arch.last_guest_tsc);
2580                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
2581                         vcpu->arch.tsc_catchup = 1;
2582                 }
2583                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2584                 if (vcpu->cpu != cpu)
2585                         kvm_migrate_timers(vcpu);
2586                 vcpu->cpu = cpu;
2587         }
2588
2589         accumulate_steal_time(vcpu);
2590         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2591 }
2592
2593 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2594 {
2595         kvm_x86_ops->vcpu_put(vcpu);
2596         kvm_put_guest_fpu(vcpu);
2597         vcpu->arch.last_host_tsc = native_read_tsc();
2598 }
2599
2600 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2601                                     struct kvm_lapic_state *s)
2602 {
2603         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2604
2605         return 0;
2606 }
2607
2608 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2609                                     struct kvm_lapic_state *s)
2610 {
2611         kvm_apic_post_state_restore(vcpu, s);
2612         update_cr8_intercept(vcpu);
2613
2614         return 0;
2615 }
2616
2617 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2618                                     struct kvm_interrupt *irq)
2619 {
2620         if (irq->irq < 0 || irq->irq >= KVM_NR_INTERRUPTS)
2621                 return -EINVAL;
2622         if (irqchip_in_kernel(vcpu->kvm))
2623                 return -ENXIO;
2624
2625         kvm_queue_interrupt(vcpu, irq->irq, false);
2626         kvm_make_request(KVM_REQ_EVENT, vcpu);
2627
2628         return 0;
2629 }
2630
2631 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2632 {
2633         kvm_inject_nmi(vcpu);
2634
2635         return 0;
2636 }
2637
2638 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2639                                            struct kvm_tpr_access_ctl *tac)
2640 {
2641         if (tac->flags)
2642                 return -EINVAL;
2643         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2644         return 0;
2645 }
2646
2647 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2648                                         u64 mcg_cap)
2649 {
2650         int r;
2651         unsigned bank_num = mcg_cap & 0xff, bank;
2652
2653         r = -EINVAL;
2654         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2655                 goto out;
2656         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2657                 goto out;
2658         r = 0;
2659         vcpu->arch.mcg_cap = mcg_cap;
2660         /* Init IA32_MCG_CTL to all 1s */
2661         if (mcg_cap & MCG_CTL_P)
2662                 vcpu->arch.mcg_ctl = ~(u64)0;
2663         /* Init IA32_MCi_CTL to all 1s */
2664         for (bank = 0; bank < bank_num; bank++)
2665                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2666 out:
2667         return r;
2668 }
2669
2670 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2671                                       struct kvm_x86_mce *mce)
2672 {
2673         u64 mcg_cap = vcpu->arch.mcg_cap;
2674         unsigned bank_num = mcg_cap & 0xff;
2675         u64 *banks = vcpu->arch.mce_banks;
2676
2677         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2678                 return -EINVAL;
2679         /*
2680          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2681          * reporting is disabled
2682          */
2683         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2684             vcpu->arch.mcg_ctl != ~(u64)0)
2685                 return 0;
2686         banks += 4 * mce->bank;
2687         /*
2688          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2689          * reporting is disabled for the bank
2690          */
2691         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2692                 return 0;
2693         if (mce->status & MCI_STATUS_UC) {
2694                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2695                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2696                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2697                         return 0;
2698                 }
2699                 if (banks[1] & MCI_STATUS_VAL)
2700                         mce->status |= MCI_STATUS_OVER;
2701                 banks[2] = mce->addr;
2702                 banks[3] = mce->misc;
2703                 vcpu->arch.mcg_status = mce->mcg_status;
2704                 banks[1] = mce->status;
2705                 kvm_queue_exception(vcpu, MC_VECTOR);
2706         } else if (!(banks[1] & MCI_STATUS_VAL)
2707                    || !(banks[1] & MCI_STATUS_UC)) {
2708                 if (banks[1] & MCI_STATUS_VAL)
2709                         mce->status |= MCI_STATUS_OVER;
2710                 banks[2] = mce->addr;
2711                 banks[3] = mce->misc;
2712                 banks[1] = mce->status;
2713         } else
2714                 banks[1] |= MCI_STATUS_OVER;
2715         return 0;
2716 }
2717
2718 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2719                                                struct kvm_vcpu_events *events)
2720 {
2721         process_nmi(vcpu);
2722         events->exception.injected =
2723                 vcpu->arch.exception.pending &&
2724                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2725         events->exception.nr = vcpu->arch.exception.nr;
2726         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2727         events->exception.pad = 0;
2728         events->exception.error_code = vcpu->arch.exception.error_code;
2729
2730         events->interrupt.injected =
2731                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2732         events->interrupt.nr = vcpu->arch.interrupt.nr;
2733         events->interrupt.soft = 0;
2734         events->interrupt.shadow =
2735                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2736                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2737
2738         events->nmi.injected = vcpu->arch.nmi_injected;
2739         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2740         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2741         events->nmi.pad = 0;
2742
2743         events->sipi_vector = vcpu->arch.sipi_vector;
2744
2745         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2746                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2747                          | KVM_VCPUEVENT_VALID_SHADOW);
2748         memset(&events->reserved, 0, sizeof(events->reserved));
2749 }
2750
2751 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2752                                               struct kvm_vcpu_events *events)
2753 {
2754         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2755                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2756                               | KVM_VCPUEVENT_VALID_SHADOW))
2757                 return -EINVAL;
2758
2759         process_nmi(vcpu);
2760         vcpu->arch.exception.pending = events->exception.injected;
2761         vcpu->arch.exception.nr = events->exception.nr;
2762         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2763         vcpu->arch.exception.error_code = events->exception.error_code;
2764
2765         vcpu->arch.interrupt.pending = events->interrupt.injected;
2766         vcpu->arch.interrupt.nr = events->interrupt.nr;
2767         vcpu->arch.interrupt.soft = events->interrupt.soft;
2768         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2769                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2770                                                   events->interrupt.shadow);
2771
2772         vcpu->arch.nmi_injected = events->nmi.injected;
2773         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2774                 vcpu->arch.nmi_pending = events->nmi.pending;
2775         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2776
2777         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2778                 vcpu->arch.sipi_vector = events->sipi_vector;
2779
2780         kvm_make_request(KVM_REQ_EVENT, vcpu);
2781
2782         return 0;
2783 }
2784
2785 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2786                                              struct kvm_debugregs *dbgregs)
2787 {
2788         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2789         dbgregs->dr6 = vcpu->arch.dr6;
2790         dbgregs->dr7 = vcpu->arch.dr7;
2791         dbgregs->flags = 0;
2792         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2793 }
2794
2795 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2796                                             struct kvm_debugregs *dbgregs)
2797 {
2798         if (dbgregs->flags)
2799                 return -EINVAL;
2800
2801         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2802         vcpu->arch.dr6 = dbgregs->dr6;
2803         vcpu->arch.dr7 = dbgregs->dr7;
2804
2805         return 0;
2806 }
2807
2808 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2809                                          struct kvm_xsave *guest_xsave)
2810 {
2811         if (cpu_has_xsave)
2812                 memcpy(guest_xsave->region,
2813                         &vcpu->arch.guest_fpu.state->xsave,
2814                         xstate_size);
2815         else {
2816                 memcpy(guest_xsave->region,
2817                         &vcpu->arch.guest_fpu.state->fxsave,
2818                         sizeof(struct i387_fxsave_struct));
2819                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2820                         XSTATE_FPSSE;
2821         }
2822 }
2823
2824 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2825                                         struct kvm_xsave *guest_xsave)
2826 {
2827         u64 xstate_bv =
2828                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2829
2830         if (cpu_has_xsave)
2831                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2832                         guest_xsave->region, xstate_size);
2833         else {
2834                 if (xstate_bv & ~XSTATE_FPSSE)
2835                         return -EINVAL;
2836                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2837                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2838         }
2839         return 0;
2840 }
2841
2842 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2843                                         struct kvm_xcrs *guest_xcrs)
2844 {
2845         if (!cpu_has_xsave) {
2846                 guest_xcrs->nr_xcrs = 0;
2847                 return;
2848         }
2849
2850         guest_xcrs->nr_xcrs = 1;
2851         guest_xcrs->flags = 0;
2852         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2853         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2854 }
2855
2856 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2857                                        struct kvm_xcrs *guest_xcrs)
2858 {
2859         int i, r = 0;
2860
2861         if (!cpu_has_xsave)
2862                 return -EINVAL;
2863
2864         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2865                 return -EINVAL;
2866
2867         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2868                 /* Only support XCR0 currently */
2869                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2870                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2871                                 guest_xcrs->xcrs[0].value);
2872                         break;
2873                 }
2874         if (r)
2875                 r = -EINVAL;
2876         return r;
2877 }
2878
2879 /*
2880  * kvm_set_guest_paused() indicates to the guest kernel that it has been
2881  * stopped by the hypervisor.  This function will be called from the host only.
2882  * EINVAL is returned when the host attempts to set the flag for a guest that
2883  * does not support pv clocks.
2884  */
2885 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
2886 {
2887         if (!vcpu->arch.time_page)
2888                 return -EINVAL;
2889         vcpu->arch.pvclock_set_guest_stopped_request = true;
2890         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2891         return 0;
2892 }
2893
2894 long kvm_arch_vcpu_ioctl(struct file *filp,
2895                          unsigned int ioctl, unsigned long arg)
2896 {
2897         struct kvm_vcpu *vcpu = filp->private_data;
2898         void __user *argp = (void __user *)arg;
2899         int r;
2900         union {
2901                 struct kvm_lapic_state *lapic;
2902                 struct kvm_xsave *xsave;
2903                 struct kvm_xcrs *xcrs;
2904                 void *buffer;
2905         } u;
2906
2907         u.buffer = NULL;
2908         switch (ioctl) {
2909         case KVM_GET_LAPIC: {
2910                 r = -EINVAL;
2911                 if (!vcpu->arch.apic)
2912                         goto out;
2913                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2914
2915                 r = -ENOMEM;
2916                 if (!u.lapic)
2917                         goto out;
2918                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2919                 if (r)
2920                         goto out;
2921                 r = -EFAULT;
2922                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
2923                         goto out;
2924                 r = 0;
2925                 break;
2926         }
2927         case KVM_SET_LAPIC: {
2928                 if (!vcpu->arch.apic)
2929                         goto out;
2930                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
2931                 if (IS_ERR(u.lapic))
2932                         return PTR_ERR(u.lapic);
2933
2934                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
2935                 break;
2936         }
2937         case KVM_INTERRUPT: {
2938                 struct kvm_interrupt irq;
2939
2940                 r = -EFAULT;
2941                 if (copy_from_user(&irq, argp, sizeof irq))
2942                         goto out;
2943                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2944                 break;
2945         }
2946         case KVM_NMI: {
2947                 r = kvm_vcpu_ioctl_nmi(vcpu);
2948                 break;
2949         }
2950         case KVM_SET_CPUID: {
2951                 struct kvm_cpuid __user *cpuid_arg = argp;
2952                 struct kvm_cpuid cpuid;
2953
2954                 r = -EFAULT;
2955                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2956                         goto out;
2957                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2958                 break;
2959         }
2960         case KVM_SET_CPUID2: {
2961                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2962                 struct kvm_cpuid2 cpuid;
2963
2964                 r = -EFAULT;
2965                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2966                         goto out;
2967                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2968                                               cpuid_arg->entries);
2969                 break;
2970         }
2971         case KVM_GET_CPUID2: {
2972                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2973                 struct kvm_cpuid2 cpuid;
2974
2975                 r = -EFAULT;
2976                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2977                         goto out;
2978                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2979                                               cpuid_arg->entries);
2980                 if (r)
2981                         goto out;
2982                 r = -EFAULT;
2983                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2984                         goto out;
2985                 r = 0;
2986                 break;
2987         }
2988         case KVM_GET_MSRS:
2989                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2990                 break;
2991         case KVM_SET_MSRS:
2992                 r = msr_io(vcpu, argp, do_set_msr, 0);
2993                 break;
2994         case KVM_TPR_ACCESS_REPORTING: {
2995                 struct kvm_tpr_access_ctl tac;
2996
2997                 r = -EFAULT;
2998                 if (copy_from_user(&tac, argp, sizeof tac))
2999                         goto out;
3000                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3001                 if (r)
3002                         goto out;
3003                 r = -EFAULT;
3004                 if (copy_to_user(argp, &tac, sizeof tac))
3005                         goto out;
3006                 r = 0;
3007                 break;
3008         };
3009         case KVM_SET_VAPIC_ADDR: {
3010                 struct kvm_vapic_addr va;
3011
3012                 r = -EINVAL;
3013                 if (!irqchip_in_kernel(vcpu->kvm))
3014                         goto out;
3015                 r = -EFAULT;
3016                 if (copy_from_user(&va, argp, sizeof va))
3017                         goto out;
3018                 r = 0;
3019                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3020                 break;
3021         }
3022         case KVM_X86_SETUP_MCE: {
3023                 u64 mcg_cap;
3024
3025                 r = -EFAULT;
3026                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3027                         goto out;
3028                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3029                 break;
3030         }
3031         case KVM_X86_SET_MCE: {
3032                 struct kvm_x86_mce mce;
3033
3034                 r = -EFAULT;
3035                 if (copy_from_user(&mce, argp, sizeof mce))
3036                         goto out;
3037                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3038                 break;
3039         }
3040         case KVM_GET_VCPU_EVENTS: {
3041                 struct kvm_vcpu_events events;
3042
3043                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3044
3045                 r = -EFAULT;
3046                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3047                         break;
3048                 r = 0;
3049                 break;
3050         }
3051         case KVM_SET_VCPU_EVENTS: {
3052                 struct kvm_vcpu_events events;
3053
3054                 r = -EFAULT;
3055                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3056                         break;
3057
3058                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3059                 break;
3060         }
3061         case KVM_GET_DEBUGREGS: {
3062                 struct kvm_debugregs dbgregs;
3063
3064                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3065
3066                 r = -EFAULT;
3067                 if (copy_to_user(argp, &dbgregs,
3068                                  sizeof(struct kvm_debugregs)))
3069                         break;
3070                 r = 0;
3071                 break;
3072         }
3073         case KVM_SET_DEBUGREGS: {
3074                 struct kvm_debugregs dbgregs;
3075
3076                 r = -EFAULT;
3077                 if (copy_from_user(&dbgregs, argp,
3078                                    sizeof(struct kvm_debugregs)))
3079                         break;
3080
3081                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3082                 break;
3083         }
3084         case KVM_GET_XSAVE: {
3085                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3086                 r = -ENOMEM;
3087                 if (!u.xsave)
3088                         break;
3089
3090                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3091
3092                 r = -EFAULT;
3093                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3094                         break;
3095                 r = 0;
3096                 break;
3097         }
3098         case KVM_SET_XSAVE: {
3099                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3100                 if (IS_ERR(u.xsave))
3101                         return PTR_ERR(u.xsave);
3102
3103                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3104                 break;
3105         }
3106         case KVM_GET_XCRS: {
3107                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3108                 r = -ENOMEM;
3109                 if (!u.xcrs)
3110                         break;
3111
3112                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3113
3114                 r = -EFAULT;
3115                 if (copy_to_user(argp, u.xcrs,
3116                                  sizeof(struct kvm_xcrs)))
3117                         break;
3118                 r = 0;
3119                 break;
3120         }
3121         case KVM_SET_XCRS: {
3122                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3123                 if (IS_ERR(u.xcrs))
3124                         return PTR_ERR(u.xcrs);
3125
3126                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3127                 break;
3128         }
3129         case KVM_SET_TSC_KHZ: {
3130                 u32 user_tsc_khz;
3131
3132                 r = -EINVAL;
3133                 user_tsc_khz = (u32)arg;
3134
3135                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3136                         goto out;
3137
3138                 if (user_tsc_khz == 0)
3139                         user_tsc_khz = tsc_khz;
3140
3141                 kvm_set_tsc_khz(vcpu, user_tsc_khz);
3142
3143                 r = 0;
3144                 goto out;
3145         }
3146         case KVM_GET_TSC_KHZ: {
3147                 r = vcpu->arch.virtual_tsc_khz;
3148                 goto out;
3149         }
3150         case KVM_KVMCLOCK_CTRL: {
3151                 r = kvm_set_guest_paused(vcpu);
3152                 goto out;
3153         }
3154         default:
3155                 r = -EINVAL;
3156         }
3157 out:
3158         kfree(u.buffer);
3159         return r;
3160 }
3161
3162 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3163 {
3164         return VM_FAULT_SIGBUS;
3165 }
3166
3167 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3168 {
3169         int ret;
3170
3171         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3172                 return -EINVAL;
3173         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3174         return ret;
3175 }
3176
3177 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3178                                               u64 ident_addr)
3179 {
3180         kvm->arch.ept_identity_map_addr = ident_addr;
3181         return 0;
3182 }
3183
3184 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3185                                           u32 kvm_nr_mmu_pages)
3186 {
3187         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3188                 return -EINVAL;
3189
3190         mutex_lock(&kvm->slots_lock);
3191         spin_lock(&kvm->mmu_lock);
3192
3193         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3194         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3195
3196         spin_unlock(&kvm->mmu_lock);
3197         mutex_unlock(&kvm->slots_lock);
3198         return 0;
3199 }
3200
3201 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3202 {
3203         return kvm->arch.n_max_mmu_pages;
3204 }
3205
3206 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3207 {
3208         int r;
3209
3210         r = 0;
3211         switch (chip->chip_id) {
3212         case KVM_IRQCHIP_PIC_MASTER:
3213                 memcpy(&chip->chip.pic,
3214                         &pic_irqchip(kvm)->pics[0],
3215                         sizeof(struct kvm_pic_state));
3216                 break;
3217         case KVM_IRQCHIP_PIC_SLAVE:
3218                 memcpy(&chip->chip.pic,
3219                         &pic_irqchip(kvm)->pics[1],
3220                         sizeof(struct kvm_pic_state));
3221                 break;
3222         case KVM_IRQCHIP_IOAPIC:
3223                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3224                 break;
3225         default:
3226                 r = -EINVAL;
3227                 break;
3228         }
3229         return r;
3230 }
3231
3232 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3233 {
3234         int r;
3235
3236         r = 0;
3237         switch (chip->chip_id) {
3238         case KVM_IRQCHIP_PIC_MASTER:
3239                 spin_lock(&pic_irqchip(kvm)->lock);
3240                 memcpy(&pic_irqchip(kvm)->pics[0],
3241                         &chip->chip.pic,
3242                         sizeof(struct kvm_pic_state));
3243                 spin_unlock(&pic_irqchip(kvm)->lock);
3244                 break;
3245         case KVM_IRQCHIP_PIC_SLAVE:
3246                 spin_lock(&pic_irqchip(kvm)->lock);
3247                 memcpy(&pic_irqchip(kvm)->pics[1],
3248                         &chip->chip.pic,
3249                         sizeof(struct kvm_pic_state));
3250                 spin_unlock(&pic_irqchip(kvm)->lock);
3251                 break;
3252         case KVM_IRQCHIP_IOAPIC:
3253                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3254                 break;
3255         default:
3256                 r = -EINVAL;
3257                 break;
3258         }
3259         kvm_pic_update_irq(pic_irqchip(kvm));
3260         return r;
3261 }
3262
3263 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3264 {
3265         int r = 0;
3266
3267         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3268         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3269         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3270         return r;
3271 }
3272
3273 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3274 {
3275         int r = 0;
3276
3277         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3278         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3279         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3280         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3281         return r;
3282 }
3283
3284 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3285 {
3286         int r = 0;
3287
3288         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3289         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3290                 sizeof(ps->channels));
3291         ps->flags = kvm->arch.vpit->pit_state.flags;
3292         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3293         memset(&ps->reserved, 0, sizeof(ps->reserved));
3294         return r;
3295 }
3296
3297 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3298 {
3299         int r = 0, start = 0;
3300         u32 prev_legacy, cur_legacy;
3301         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3302         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3303         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3304         if (!prev_legacy && cur_legacy)
3305                 start = 1;
3306         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3307                sizeof(kvm->arch.vpit->pit_state.channels));
3308         kvm->arch.vpit->pit_state.flags = ps->flags;
3309         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3310         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3311         return r;
3312 }
3313
3314 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3315                                  struct kvm_reinject_control *control)
3316 {
3317         if (!kvm->arch.vpit)
3318                 return -ENXIO;
3319         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3320         kvm->arch.vpit->pit_state.reinject = control->pit_reinject;
3321         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3322         return 0;
3323 }
3324
3325 /**
3326  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3327  * @kvm: kvm instance
3328  * @log: slot id and address to which we copy the log
3329  *
3330  * We need to keep it in mind that VCPU threads can write to the bitmap
3331  * concurrently.  So, to avoid losing data, we keep the following order for
3332  * each bit:
3333  *
3334  *   1. Take a snapshot of the bit and clear it if needed.
3335  *   2. Write protect the corresponding page.
3336  *   3. Flush TLB's if needed.
3337  *   4. Copy the snapshot to the userspace.
3338  *
3339  * Between 2 and 3, the guest may write to the page using the remaining TLB
3340  * entry.  This is not a problem because the page will be reported dirty at
3341  * step 4 using the snapshot taken before and step 3 ensures that successive
3342  * writes will be logged for the next call.
3343  */
3344 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3345 {
3346         int r;
3347         struct kvm_memory_slot *memslot;
3348         unsigned long n, i;
3349         unsigned long *dirty_bitmap;
3350         unsigned long *dirty_bitmap_buffer;
3351         bool is_dirty = false;
3352
3353         mutex_lock(&kvm->slots_lock);
3354
3355         r = -EINVAL;
3356         if (log->slot >= KVM_MEMORY_SLOTS)
3357                 goto out;
3358
3359         memslot = id_to_memslot(kvm->memslots, log->slot);
3360
3361         dirty_bitmap = memslot->dirty_bitmap;
3362         r = -ENOENT;
3363         if (!dirty_bitmap)
3364                 goto out;
3365
3366         n = kvm_dirty_bitmap_bytes(memslot);
3367
3368         dirty_bitmap_buffer = dirty_bitmap + n / sizeof(long);
3369         memset(dirty_bitmap_buffer, 0, n);
3370
3371         spin_lock(&kvm->mmu_lock);
3372
3373         for (i = 0; i < n / sizeof(long); i++) {
3374                 unsigned long mask;
3375                 gfn_t offset;
3376
3377                 if (!dirty_bitmap[i])
3378                         continue;
3379
3380                 is_dirty = true;
3381
3382                 mask = xchg(&dirty_bitmap[i], 0);
3383                 dirty_bitmap_buffer[i] = mask;
3384
3385                 offset = i * BITS_PER_LONG;
3386                 kvm_mmu_write_protect_pt_masked(kvm, memslot, offset, mask);
3387         }
3388         if (is_dirty)
3389                 kvm_flush_remote_tlbs(kvm);
3390
3391         spin_unlock(&kvm->mmu_lock);
3392
3393         r = -EFAULT;
3394         if (copy_to_user(log->dirty_bitmap, dirty_bitmap_buffer, n))
3395                 goto out;
3396
3397         r = 0;
3398 out:
3399         mutex_unlock(&kvm->slots_lock);
3400         return r;
3401 }
3402
3403 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event)
3404 {
3405         if (!irqchip_in_kernel(kvm))
3406                 return -ENXIO;
3407
3408         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3409                                         irq_event->irq, irq_event->level);
3410         return 0;
3411 }
3412
3413 long kvm_arch_vm_ioctl(struct file *filp,
3414                        unsigned int ioctl, unsigned long arg)
3415 {
3416         struct kvm *kvm = filp->private_data;
3417         void __user *argp = (void __user *)arg;
3418         int r = -ENOTTY;
3419         /*
3420          * This union makes it completely explicit to gcc-3.x
3421          * that these two variables' stack usage should be
3422          * combined, not added together.
3423          */
3424         union {
3425                 struct kvm_pit_state ps;
3426                 struct kvm_pit_state2 ps2;
3427                 struct kvm_pit_config pit_config;
3428         } u;
3429
3430         switch (ioctl) {
3431         case KVM_SET_TSS_ADDR:
3432                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3433                 break;
3434         case KVM_SET_IDENTITY_MAP_ADDR: {
3435                 u64 ident_addr;
3436
3437                 r = -EFAULT;
3438                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3439                         goto out;
3440                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3441                 break;
3442         }
3443         case KVM_SET_NR_MMU_PAGES:
3444                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3445                 break;
3446         case KVM_GET_NR_MMU_PAGES:
3447                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3448                 break;
3449         case KVM_CREATE_IRQCHIP: {
3450                 struct kvm_pic *vpic;
3451
3452                 mutex_lock(&kvm->lock);
3453                 r = -EEXIST;
3454                 if (kvm->arch.vpic)
3455                         goto create_irqchip_unlock;
3456                 r = -EINVAL;
3457                 if (atomic_read(&kvm->online_vcpus))
3458                         goto create_irqchip_unlock;
3459                 r = -ENOMEM;
3460                 vpic = kvm_create_pic(kvm);
3461                 if (vpic) {
3462                         r = kvm_ioapic_init(kvm);
3463                         if (r) {
3464                                 mutex_lock(&kvm->slots_lock);
3465                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3466                                                           &vpic->dev_master);
3467                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3468                                                           &vpic->dev_slave);
3469                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3470                                                           &vpic->dev_eclr);
3471                                 mutex_unlock(&kvm->slots_lock);
3472                                 kfree(vpic);
3473                                 goto create_irqchip_unlock;
3474                         }
3475                 } else
3476                         goto create_irqchip_unlock;
3477                 smp_wmb();
3478                 kvm->arch.vpic = vpic;
3479                 smp_wmb();
3480                 r = kvm_setup_default_irq_routing(kvm);
3481                 if (r) {
3482                         mutex_lock(&kvm->slots_lock);
3483                         mutex_lock(&kvm->irq_lock);
3484                         kvm_ioapic_destroy(kvm);
3485                         kvm_destroy_pic(kvm);
3486                         mutex_unlock(&kvm->irq_lock);
3487                         mutex_unlock(&kvm->slots_lock);
3488                 }
3489         create_irqchip_unlock:
3490                 mutex_unlock(&kvm->lock);
3491                 break;
3492         }
3493         case KVM_CREATE_PIT:
3494                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3495                 goto create_pit;
3496         case KVM_CREATE_PIT2:
3497                 r = -EFAULT;
3498                 if (copy_from_user(&u.pit_config, argp,
3499                                    sizeof(struct kvm_pit_config)))
3500                         goto out;
3501         create_pit:
3502                 mutex_lock(&kvm->slots_lock);
3503                 r = -EEXIST;
3504                 if (kvm->arch.vpit)
3505                         goto create_pit_unlock;
3506                 r = -ENOMEM;
3507                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3508                 if (kvm->arch.vpit)
3509                         r = 0;
3510         create_pit_unlock:
3511                 mutex_unlock(&kvm->slots_lock);
3512                 break;
3513         case KVM_GET_IRQCHIP: {
3514                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3515                 struct kvm_irqchip *chip;
3516
3517                 chip = memdup_user(argp, sizeof(*chip));
3518                 if (IS_ERR(chip)) {
3519                         r = PTR_ERR(chip);
3520                         goto out;
3521                 }
3522
3523                 r = -ENXIO;
3524                 if (!irqchip_in_kernel(kvm))
3525                         goto get_irqchip_out;
3526                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3527                 if (r)
3528                         goto get_irqchip_out;
3529                 r = -EFAULT;
3530                 if (copy_to_user(argp, chip, sizeof *chip))
3531                         goto get_irqchip_out;
3532                 r = 0;
3533         get_irqchip_out:
3534                 kfree(chip);
3535                 break;
3536         }
3537         case KVM_SET_IRQCHIP: {
3538                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3539                 struct kvm_irqchip *chip;
3540
3541                 chip = memdup_user(argp, sizeof(*chip));
3542                 if (IS_ERR(chip)) {
3543                         r = PTR_ERR(chip);
3544                         goto out;
3545                 }
3546
3547                 r = -ENXIO;
3548                 if (!irqchip_in_kernel(kvm))
3549                         goto set_irqchip_out;
3550                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3551                 if (r)
3552                         goto set_irqchip_out;
3553                 r = 0;
3554         set_irqchip_out:
3555                 kfree(chip);
3556                 break;
3557         }
3558         case KVM_GET_PIT: {
3559                 r = -EFAULT;
3560                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3561                         goto out;
3562                 r = -ENXIO;
3563                 if (!kvm->arch.vpit)
3564                         goto out;
3565                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3566                 if (r)
3567                         goto out;
3568                 r = -EFAULT;
3569                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3570                         goto out;
3571                 r = 0;
3572                 break;
3573         }
3574         case KVM_SET_PIT: {
3575                 r = -EFAULT;
3576                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3577                         goto out;
3578                 r = -ENXIO;
3579                 if (!kvm->arch.vpit)
3580                         goto out;
3581                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3582                 break;
3583         }
3584         case KVM_GET_PIT2: {
3585                 r = -ENXIO;
3586                 if (!kvm->arch.vpit)
3587                         goto out;
3588                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3589                 if (r)
3590                         goto out;
3591                 r = -EFAULT;
3592                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3593                         goto out;
3594                 r = 0;
3595                 break;
3596         }
3597         case KVM_SET_PIT2: {
3598                 r = -EFAULT;
3599                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3600                         goto out;
3601                 r = -ENXIO;
3602                 if (!kvm->arch.vpit)
3603                         goto out;
3604                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3605                 break;
3606         }
3607         case KVM_REINJECT_CONTROL: {
3608                 struct kvm_reinject_control control;
3609                 r =  -EFAULT;
3610                 if (copy_from_user(&control, argp, sizeof(control)))
3611                         goto out;
3612                 r = kvm_vm_ioctl_reinject(kvm, &control);
3613                 break;
3614         }
3615         case KVM_XEN_HVM_CONFIG: {
3616                 r = -EFAULT;
3617                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3618                                    sizeof(struct kvm_xen_hvm_config)))
3619                         goto out;
3620                 r = -EINVAL;
3621                 if (kvm->arch.xen_hvm_config.flags)
3622                         goto out;
3623                 r = 0;
3624                 break;
3625         }
3626         case KVM_SET_CLOCK: {
3627                 struct kvm_clock_data user_ns;
3628                 u64 now_ns;
3629                 s64 delta;
3630
3631                 r = -EFAULT;
3632                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3633                         goto out;
3634
3635                 r = -EINVAL;
3636                 if (user_ns.flags)
3637                         goto out;
3638
3639                 r = 0;
3640                 local_irq_disable();
3641                 now_ns = get_kernel_ns();
3642                 delta = user_ns.clock - now_ns;
3643                 local_irq_enable();
3644                 kvm->arch.kvmclock_offset = delta;
3645                 break;
3646         }
3647         case KVM_GET_CLOCK: {
3648                 struct kvm_clock_data user_ns;
3649                 u64 now_ns;
3650
3651                 local_irq_disable();
3652                 now_ns = get_kernel_ns();
3653                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3654                 local_irq_enable();
3655                 user_ns.flags = 0;
3656                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3657
3658                 r = -EFAULT;
3659                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3660                         goto out;
3661                 r = 0;
3662                 break;
3663         }
3664
3665         default:
3666                 ;
3667         }
3668 out:
3669         return r;
3670 }
3671
3672 static void kvm_init_msr_list(void)
3673 {
3674         u32 dummy[2];
3675         unsigned i, j;
3676
3677         /* skip the first msrs in the list. KVM-specific */
3678         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3679                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3680                         continue;
3681                 if (j < i)
3682                         msrs_to_save[j] = msrs_to_save[i];
3683                 j++;
3684         }
3685         num_msrs_to_save = j;
3686 }
3687
3688 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3689                            const void *v)
3690 {
3691         int handled = 0;
3692         int n;
3693
3694         do {
3695                 n = min(len, 8);
3696                 if (!(vcpu->arch.apic &&
3697                       !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3698                     && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3699                         break;
3700                 handled += n;
3701                 addr += n;
3702                 len -= n;
3703                 v += n;
3704         } while (len);
3705
3706         return handled;
3707 }
3708
3709 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3710 {
3711         int handled = 0;
3712         int n;
3713
3714         do {
3715                 n = min(len, 8);
3716                 if (!(vcpu->arch.apic &&
3717                       !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3718                     && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3719                         break;
3720                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3721                 handled += n;
3722                 addr += n;
3723                 len -= n;
3724                 v += n;
3725         } while (len);
3726
3727         return handled;
3728 }
3729
3730 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3731                         struct kvm_segment *var, int seg)
3732 {
3733         kvm_x86_ops->set_segment(vcpu, var, seg);
3734 }
3735
3736 void kvm_get_segment(struct kvm_vcpu *vcpu,
3737                      struct kvm_segment *var, int seg)
3738 {
3739         kvm_x86_ops->get_segment(vcpu, var, seg);
3740 }
3741
3742 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3743 {
3744         gpa_t t_gpa;
3745         struct x86_exception exception;
3746
3747         BUG_ON(!mmu_is_nested(vcpu));
3748
3749         /* NPT walks are always user-walks */
3750         access |= PFERR_USER_MASK;
3751         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3752
3753         return t_gpa;
3754 }
3755
3756 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3757                               struct x86_exception *exception)
3758 {
3759         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3760         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3761 }
3762
3763  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3764                                 struct x86_exception *exception)
3765 {
3766         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3767         access |= PFERR_FETCH_MASK;
3768         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3769 }
3770
3771 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3772                                struct x86_exception *exception)
3773 {
3774         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3775         access |= PFERR_WRITE_MASK;
3776         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3777 }
3778
3779 /* uses this to access any guest's mapped memory without checking CPL */
3780 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3781                                 struct x86_exception *exception)
3782 {
3783         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3784 }
3785
3786 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3787                                       struct kvm_vcpu *vcpu, u32 access,
3788                                       struct x86_exception *exception)
3789 {
3790         void *data = val;
3791         int r = X86EMUL_CONTINUE;
3792
3793         while (bytes) {
3794                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3795                                                             exception);
3796                 unsigned offset = addr & (PAGE_SIZE-1);
3797                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3798                 int ret;
3799
3800                 if (gpa == UNMAPPED_GVA)
3801                         return X86EMUL_PROPAGATE_FAULT;
3802                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3803                 if (ret < 0) {
3804                         r = X86EMUL_IO_NEEDED;
3805                         goto out;
3806                 }
3807
3808                 bytes -= toread;
3809                 data += toread;
3810                 addr += toread;
3811         }
3812 out:
3813         return r;
3814 }
3815
3816 /* used for instruction fetching */
3817 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
3818                                 gva_t addr, void *val, unsigned int bytes,
3819                                 struct x86_exception *exception)
3820 {
3821         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3822         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3823
3824         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3825                                           access | PFERR_FETCH_MASK,
3826                                           exception);
3827 }
3828
3829 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
3830                                gva_t addr, void *val, unsigned int bytes,
3831                                struct x86_exception *exception)
3832 {
3833         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3834         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3835
3836         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3837                                           exception);
3838 }
3839 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
3840
3841 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3842                                       gva_t addr, void *val, unsigned int bytes,
3843                                       struct x86_exception *exception)
3844 {
3845         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3846         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
3847 }
3848
3849 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3850                                        gva_t addr, void *val,
3851                                        unsigned int bytes,
3852                                        struct x86_exception *exception)
3853 {
3854         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3855         void *data = val;
3856         int r = X86EMUL_CONTINUE;
3857
3858         while (bytes) {
3859                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3860                                                              PFERR_WRITE_MASK,
3861                                                              exception);
3862                 unsigned offset = addr & (PAGE_SIZE-1);
3863                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3864                 int ret;
3865
3866                 if (gpa == UNMAPPED_GVA)
3867                         return X86EMUL_PROPAGATE_FAULT;
3868                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3869                 if (ret < 0) {
3870                         r = X86EMUL_IO_NEEDED;
3871                         goto out;
3872                 }
3873
3874                 bytes -= towrite;
3875                 data += towrite;
3876                 addr += towrite;
3877         }
3878 out:
3879         return r;
3880 }
3881 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
3882
3883 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
3884                                 gpa_t *gpa, struct x86_exception *exception,
3885                                 bool write)
3886 {
3887         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
3888                 | (write ? PFERR_WRITE_MASK : 0);
3889
3890         if (vcpu_match_mmio_gva(vcpu, gva)
3891             && !permission_fault(vcpu->arch.walk_mmu, vcpu->arch.access, access)) {
3892                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
3893                                         (gva & (PAGE_SIZE - 1));
3894                 trace_vcpu_match_mmio(gva, *gpa, write, false);
3895                 return 1;
3896         }
3897
3898         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3899
3900         if (*gpa == UNMAPPED_GVA)
3901                 return -1;
3902
3903         /* For APIC access vmexit */
3904         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3905                 return 1;
3906
3907         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
3908                 trace_vcpu_match_mmio(gva, *gpa, write, true);
3909                 return 1;
3910         }
3911
3912         return 0;
3913 }
3914
3915 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3916                         const void *val, int bytes)
3917 {
3918         int ret;
3919
3920         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3921         if (ret < 0)
3922                 return 0;
3923         kvm_mmu_pte_write(vcpu, gpa, val, bytes);
3924         return 1;
3925 }
3926
3927 struct read_write_emulator_ops {
3928         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
3929                                   int bytes);
3930         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
3931                                   void *val, int bytes);
3932         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
3933                                int bytes, void *val);
3934         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
3935                                     void *val, int bytes);
3936         bool write;
3937 };
3938
3939 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
3940 {
3941         if (vcpu->mmio_read_completed) {
3942                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3943                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
3944                 vcpu->mmio_read_completed = 0;
3945                 return 1;
3946         }
3947
3948         return 0;
3949 }
3950
3951 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
3952                         void *val, int bytes)
3953 {
3954         return !kvm_read_guest(vcpu->kvm, gpa, val, bytes);
3955 }
3956
3957 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
3958                          void *val, int bytes)
3959 {
3960         return emulator_write_phys(vcpu, gpa, val, bytes);
3961 }
3962
3963 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
3964 {
3965         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3966         return vcpu_mmio_write(vcpu, gpa, bytes, val);
3967 }
3968
3969 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
3970                           void *val, int bytes)
3971 {
3972         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3973         return X86EMUL_IO_NEEDED;
3974 }
3975
3976 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
3977                            void *val, int bytes)
3978 {
3979         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
3980
3981         memcpy(vcpu->run->mmio.data, frag->data, frag->len);
3982         return X86EMUL_CONTINUE;
3983 }
3984
3985 static const struct read_write_emulator_ops read_emultor = {
3986         .read_write_prepare = read_prepare,
3987         .read_write_emulate = read_emulate,
3988         .read_write_mmio = vcpu_mmio_read,
3989         .read_write_exit_mmio = read_exit_mmio,
3990 };
3991
3992 static const struct read_write_emulator_ops write_emultor = {
3993         .read_write_emulate = write_emulate,
3994         .read_write_mmio = write_mmio,
3995         .read_write_exit_mmio = write_exit_mmio,
3996         .write = true,
3997 };
3998
3999 static int emulator_read_write_onepage(unsigned long addr, void *val,
4000                                        unsigned int bytes,
4001                                        struct x86_exception *exception,
4002                                        struct kvm_vcpu *vcpu,
4003                                        const struct read_write_emulator_ops *ops)
4004 {
4005         gpa_t gpa;
4006         int handled, ret;
4007         bool write = ops->write;
4008         struct kvm_mmio_fragment *frag;
4009
4010         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4011
4012         if (ret < 0)
4013                 return X86EMUL_PROPAGATE_FAULT;
4014
4015         /* For APIC access vmexit */
4016         if (ret)
4017                 goto mmio;
4018
4019         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4020                 return X86EMUL_CONTINUE;
4021
4022 mmio:
4023         /*
4024          * Is this MMIO handled locally?
4025          */
4026         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4027         if (handled == bytes)
4028                 return X86EMUL_CONTINUE;
4029
4030         gpa += handled;
4031         bytes -= handled;
4032         val += handled;
4033
4034         while (bytes) {
4035                 unsigned now = min(bytes, 8U);
4036
4037                 frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4038                 frag->gpa = gpa;
4039                 frag->data = val;
4040                 frag->len = now;
4041
4042                 gpa += now;
4043                 val += now;
4044                 bytes -= now;
4045         }
4046         return X86EMUL_CONTINUE;
4047 }
4048
4049 int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,
4050                         void *val, unsigned int bytes,
4051                         struct x86_exception *exception,
4052                         const struct read_write_emulator_ops *ops)
4053 {
4054         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4055         gpa_t gpa;
4056         int rc;
4057
4058         if (ops->read_write_prepare &&
4059                   ops->read_write_prepare(vcpu, val, bytes))
4060                 return X86EMUL_CONTINUE;
4061
4062         vcpu->mmio_nr_fragments = 0;
4063
4064         /* Crossing a page boundary? */
4065         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4066                 int now;
4067
4068                 now = -addr & ~PAGE_MASK;
4069                 rc = emulator_read_write_onepage(addr, val, now, exception,
4070                                                  vcpu, ops);
4071
4072                 if (rc != X86EMUL_CONTINUE)
4073                         return rc;
4074                 addr += now;
4075                 val += now;
4076                 bytes -= now;
4077         }
4078
4079         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4080                                          vcpu, ops);
4081         if (rc != X86EMUL_CONTINUE)
4082                 return rc;
4083
4084         if (!vcpu->mmio_nr_fragments)
4085                 return rc;
4086
4087         gpa = vcpu->mmio_fragments[0].gpa;
4088
4089         vcpu->mmio_needed = 1;
4090         vcpu->mmio_cur_fragment = 0;
4091
4092         vcpu->run->mmio.len = vcpu->mmio_fragments[0].len;
4093         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4094         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4095         vcpu->run->mmio.phys_addr = gpa;
4096
4097         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4098 }
4099
4100 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4101                                   unsigned long addr,
4102                                   void *val,
4103                                   unsigned int bytes,
4104                                   struct x86_exception *exception)
4105 {
4106         return emulator_read_write(ctxt, addr, val, bytes,
4107                                    exception, &read_emultor);
4108 }
4109
4110 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4111                             unsigned long addr,
4112                             const void *val,
4113                             unsigned int bytes,
4114                             struct x86_exception *exception)
4115 {
4116         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4117                                    exception, &write_emultor);
4118 }
4119
4120 #define CMPXCHG_TYPE(t, ptr, old, new) \
4121         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4122
4123 #ifdef CONFIG_X86_64
4124 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4125 #else
4126 #  define CMPXCHG64(ptr, old, new) \
4127         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4128 #endif
4129
4130 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4131                                      unsigned long addr,
4132                                      const void *old,
4133                                      const void *new,
4134                                      unsigned int bytes,
4135                                      struct x86_exception *exception)
4136 {
4137         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4138         gpa_t gpa;
4139         struct page *page;
4140         char *kaddr;
4141         bool exchanged;
4142
4143         /* guests cmpxchg8b have to be emulated atomically */
4144         if (bytes > 8 || (bytes & (bytes - 1)))
4145                 goto emul_write;
4146
4147         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4148
4149         if (gpa == UNMAPPED_GVA ||
4150             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4151                 goto emul_write;
4152
4153         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4154                 goto emul_write;
4155
4156         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4157         if (is_error_page(page))
4158                 goto emul_write;
4159
4160         kaddr = kmap_atomic(page);
4161         kaddr += offset_in_page(gpa);
4162         switch (bytes) {
4163         case 1:
4164                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4165                 break;
4166         case 2:
4167                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4168                 break;
4169         case 4:
4170                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4171                 break;
4172         case 8:
4173                 exchanged = CMPXCHG64(kaddr, old, new);
4174                 break;
4175         default:
4176                 BUG();
4177         }
4178         kunmap_atomic(kaddr);
4179         kvm_release_page_dirty(page);
4180
4181         if (!exchanged)
4182                 return X86EMUL_CMPXCHG_FAILED;
4183
4184         kvm_mmu_pte_write(vcpu, gpa, new, bytes);
4185
4186         return X86EMUL_CONTINUE;
4187
4188 emul_write:
4189         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4190
4191         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4192 }
4193
4194 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4195 {
4196         /* TODO: String I/O for in kernel device */
4197         int r;
4198
4199         if (vcpu->arch.pio.in)
4200                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
4201                                     vcpu->arch.pio.size, pd);
4202         else
4203                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
4204                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4205                                      pd);
4206         return r;
4207 }
4208
4209 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4210                                unsigned short port, void *val,
4211                                unsigned int count, bool in)
4212 {
4213         trace_kvm_pio(!in, port, size, count);
4214
4215         vcpu->arch.pio.port = port;
4216         vcpu->arch.pio.in = in;
4217         vcpu->arch.pio.count  = count;
4218         vcpu->arch.pio.size = size;
4219
4220         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4221                 vcpu->arch.pio.count = 0;
4222                 return 1;
4223         }
4224
4225         vcpu->run->exit_reason = KVM_EXIT_IO;
4226         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4227         vcpu->run->io.size = size;
4228         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4229         vcpu->run->io.count = count;
4230         vcpu->run->io.port = port;
4231
4232         return 0;
4233 }
4234
4235 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4236                                     int size, unsigned short port, void *val,
4237                                     unsigned int count)
4238 {
4239         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4240         int ret;
4241
4242         if (vcpu->arch.pio.count)
4243                 goto data_avail;
4244
4245         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4246         if (ret) {
4247 data_avail:
4248                 memcpy(val, vcpu->arch.pio_data, size * count);
4249                 vcpu->arch.pio.count = 0;
4250                 return 1;
4251         }
4252
4253         return 0;
4254 }
4255
4256 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4257                                      int size, unsigned short port,
4258                                      const void *val, unsigned int count)
4259 {
4260         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4261
4262         memcpy(vcpu->arch.pio_data, val, size * count);
4263         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4264 }
4265
4266 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4267 {
4268         return kvm_x86_ops->get_segment_base(vcpu, seg);
4269 }
4270
4271 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4272 {
4273         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4274 }
4275
4276 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4277 {
4278         if (!need_emulate_wbinvd(vcpu))
4279                 return X86EMUL_CONTINUE;
4280
4281         if (kvm_x86_ops->has_wbinvd_exit()) {
4282                 int cpu = get_cpu();
4283
4284                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4285                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4286                                 wbinvd_ipi, NULL, 1);
4287                 put_cpu();
4288                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4289         } else
4290                 wbinvd();
4291         return X86EMUL_CONTINUE;
4292 }
4293 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4294
4295 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4296 {
4297         kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4298 }
4299
4300 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4301 {
4302         return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4303 }
4304
4305 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4306 {
4307
4308         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4309 }
4310
4311 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4312 {
4313         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4314 }
4315
4316 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4317 {
4318         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4319         unsigned long value;
4320
4321         switch (cr) {
4322         case 0:
4323                 value = kvm_read_cr0(vcpu);
4324                 break;
4325         case 2:
4326                 value = vcpu->arch.cr2;
4327                 break;
4328         case 3:
4329                 value = kvm_read_cr3(vcpu);
4330                 break;
4331         case 4:
4332                 value = kvm_read_cr4(vcpu);
4333                 break;
4334         case 8:
4335                 value = kvm_get_cr8(vcpu);
4336                 break;
4337         default:
4338                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4339                 return 0;
4340         }
4341
4342         return value;
4343 }
4344
4345 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4346 {
4347         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4348         int res = 0;
4349
4350         switch (cr) {
4351         case 0:
4352                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4353                 break;
4354         case 2:
4355                 vcpu->arch.cr2 = val;
4356                 break;
4357         case 3:
4358                 res = kvm_set_cr3(vcpu, val);
4359                 break;
4360         case 4:
4361                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4362                 break;
4363         case 8:
4364                 res = kvm_set_cr8(vcpu, val);
4365                 break;
4366         default:
4367                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4368                 res = -1;
4369         }
4370
4371         return res;
4372 }
4373
4374 static void emulator_set_rflags(struct x86_emulate_ctxt *ctxt, ulong val)
4375 {
4376         kvm_set_rflags(emul_to_vcpu(ctxt), val);
4377 }
4378
4379 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4380 {
4381         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4382 }
4383
4384 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4385 {
4386         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4387 }
4388
4389 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4390 {
4391         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4392 }
4393
4394 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4395 {
4396         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4397 }
4398
4399 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4400 {
4401         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4402 }
4403
4404 static unsigned long emulator_get_cached_segment_base(
4405         struct x86_emulate_ctxt *ctxt, int seg)
4406 {
4407         return get_segment_base(emul_to_vcpu(ctxt), seg);
4408 }
4409
4410 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4411                                  struct desc_struct *desc, u32 *base3,
4412                                  int seg)
4413 {
4414         struct kvm_segment var;
4415
4416         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4417         *selector = var.selector;
4418
4419         if (var.unusable)
4420                 return false;
4421
4422         if (var.g)
4423                 var.limit >>= 12;
4424         set_desc_limit(desc, var.limit);
4425         set_desc_base(desc, (unsigned long)var.base);
4426 #ifdef CONFIG_X86_64
4427         if (base3)
4428                 *base3 = var.base >> 32;
4429 #endif
4430         desc->type = var.type;
4431         desc->s = var.s;
4432         desc->dpl = var.dpl;
4433         desc->p = var.present;
4434         desc->avl = var.avl;
4435         desc->l = var.l;
4436         desc->d = var.db;
4437         desc->g = var.g;
4438
4439         return true;
4440 }
4441
4442 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4443                                  struct desc_struct *desc, u32 base3,
4444                                  int seg)
4445 {
4446         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4447         struct kvm_segment var;
4448
4449         var.selector = selector;
4450         var.base = get_desc_base(desc);
4451 #ifdef CONFIG_X86_64
4452         var.base |= ((u64)base3) << 32;
4453 #endif
4454         var.limit = get_desc_limit(desc);
4455         if (desc->g)
4456                 var.limit = (var.limit << 12) | 0xfff;
4457         var.type = desc->type;
4458         var.present = desc->p;
4459         var.dpl = desc->dpl;
4460         var.db = desc->d;
4461         var.s = desc->s;
4462         var.l = desc->l;
4463         var.g = desc->g;
4464         var.avl = desc->avl;
4465         var.present = desc->p;
4466         var.unusable = !var.present;
4467         var.padding = 0;
4468
4469         kvm_set_segment(vcpu, &var, seg);
4470         return;
4471 }
4472
4473 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4474                             u32 msr_index, u64 *pdata)
4475 {
4476         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4477 }
4478
4479 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4480                             u32 msr_index, u64 data)
4481 {
4482         return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
4483 }
4484
4485 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4486                              u32 pmc, u64 *pdata)
4487 {
4488         return kvm_pmu_read_pmc(emul_to_vcpu(ctxt), pmc, pdata);
4489 }
4490
4491 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4492 {
4493         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4494 }
4495
4496 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4497 {
4498         preempt_disable();
4499         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4500         /*
4501          * CR0.TS may reference the host fpu state, not the guest fpu state,
4502          * so it may be clear at this point.
4503          */
4504         clts();
4505 }
4506
4507 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4508 {
4509         preempt_enable();
4510 }
4511
4512 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4513                               struct x86_instruction_info *info,
4514                               enum x86_intercept_stage stage)
4515 {
4516         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4517 }
4518
4519 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4520                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4521 {
4522         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
4523 }
4524
4525 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
4526 {
4527         return kvm_register_read(emul_to_vcpu(ctxt), reg);
4528 }
4529
4530 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
4531 {
4532         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
4533 }
4534
4535 static const struct x86_emulate_ops emulate_ops = {
4536         .read_gpr            = emulator_read_gpr,
4537         .write_gpr           = emulator_write_gpr,
4538         .read_std            = kvm_read_guest_virt_system,
4539         .write_std           = kvm_write_guest_virt_system,
4540         .fetch               = kvm_fetch_guest_virt,
4541         .read_emulated       = emulator_read_emulated,
4542         .write_emulated      = emulator_write_emulated,
4543         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4544         .invlpg              = emulator_invlpg,
4545         .pio_in_emulated     = emulator_pio_in_emulated,
4546         .pio_out_emulated    = emulator_pio_out_emulated,
4547         .get_segment         = emulator_get_segment,
4548         .set_segment         = emulator_set_segment,
4549         .get_cached_segment_base = emulator_get_cached_segment_base,
4550         .get_gdt             = emulator_get_gdt,
4551         .get_idt             = emulator_get_idt,
4552         .set_gdt             = emulator_set_gdt,
4553         .set_idt             = emulator_set_idt,
4554         .get_cr              = emulator_get_cr,
4555         .set_cr              = emulator_set_cr,
4556         .set_rflags          = emulator_set_rflags,
4557         .cpl                 = emulator_get_cpl,
4558         .get_dr              = emulator_get_dr,
4559         .set_dr              = emulator_set_dr,
4560         .set_msr             = emulator_set_msr,
4561         .get_msr             = emulator_get_msr,
4562         .read_pmc            = emulator_read_pmc,
4563         .halt                = emulator_halt,
4564         .wbinvd              = emulator_wbinvd,
4565         .fix_hypercall       = emulator_fix_hypercall,
4566         .get_fpu             = emulator_get_fpu,
4567         .put_fpu             = emulator_put_fpu,
4568         .intercept           = emulator_intercept,
4569         .get_cpuid           = emulator_get_cpuid,
4570 };
4571
4572 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4573 {
4574         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4575         /*
4576          * an sti; sti; sequence only disable interrupts for the first
4577          * instruction. So, if the last instruction, be it emulated or
4578          * not, left the system with the INT_STI flag enabled, it
4579          * means that the last instruction is an sti. We should not
4580          * leave the flag on in this case. The same goes for mov ss
4581          */
4582         if (!(int_shadow & mask))
4583                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4584 }
4585
4586 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4587 {
4588         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4589         if (ctxt->exception.vector == PF_VECTOR)
4590                 kvm_propagate_fault(vcpu, &ctxt->exception);
4591         else if (ctxt->exception.error_code_valid)
4592                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4593                                       ctxt->exception.error_code);
4594         else
4595                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4596 }
4597
4598 static void init_decode_cache(struct x86_emulate_ctxt *ctxt)
4599 {
4600         memset(&ctxt->twobyte, 0,
4601                (void *)&ctxt->_regs - (void *)&ctxt->twobyte);
4602
4603         ctxt->fetch.start = 0;
4604         ctxt->fetch.end = 0;
4605         ctxt->io_read.pos = 0;
4606         ctxt->io_read.end = 0;
4607         ctxt->mem_read.pos = 0;
4608         ctxt->mem_read.end = 0;
4609 }
4610
4611 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4612 {
4613         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4614         int cs_db, cs_l;
4615
4616         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4617
4618         ctxt->eflags = kvm_get_rflags(vcpu);
4619         ctxt->eip = kvm_rip_read(vcpu);
4620         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4621                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4622                      cs_l                               ? X86EMUL_MODE_PROT64 :
4623                      cs_db                              ? X86EMUL_MODE_PROT32 :
4624                                                           X86EMUL_MODE_PROT16;
4625         ctxt->guest_mode = is_guest_mode(vcpu);
4626
4627         init_decode_cache(ctxt);
4628         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4629 }
4630
4631 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4632 {
4633         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4634         int ret;
4635
4636         init_emulate_ctxt(vcpu);
4637
4638         ctxt->op_bytes = 2;
4639         ctxt->ad_bytes = 2;
4640         ctxt->_eip = ctxt->eip + inc_eip;
4641         ret = emulate_int_real(ctxt, irq);
4642
4643         if (ret != X86EMUL_CONTINUE)
4644                 return EMULATE_FAIL;
4645
4646         ctxt->eip = ctxt->_eip;
4647         kvm_rip_write(vcpu, ctxt->eip);
4648         kvm_set_rflags(vcpu, ctxt->eflags);
4649
4650         if (irq == NMI_VECTOR)
4651                 vcpu->arch.nmi_pending = 0;
4652         else
4653                 vcpu->arch.interrupt.pending = false;
4654
4655         return EMULATE_DONE;
4656 }
4657 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4658
4659 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4660 {
4661         int r = EMULATE_DONE;
4662
4663         ++vcpu->stat.insn_emulation_fail;
4664         trace_kvm_emulate_insn_failed(vcpu);
4665         if (!is_guest_mode(vcpu)) {
4666                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4667                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4668                 vcpu->run->internal.ndata = 0;
4669                 r = EMULATE_FAIL;
4670         }
4671         kvm_queue_exception(vcpu, UD_VECTOR);
4672
4673         return r;
4674 }
4675
4676 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4677 {
4678         gpa_t gpa;
4679         pfn_t pfn;
4680
4681         if (tdp_enabled)
4682                 return false;
4683
4684         /*
4685          * if emulation was due to access to shadowed page table
4686          * and it failed try to unshadow page and re-enter the
4687          * guest to let CPU execute the instruction.
4688          */
4689         if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4690                 return true;
4691
4692         gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4693
4694         if (gpa == UNMAPPED_GVA)
4695                 return true; /* let cpu generate fault */
4696
4697         /*
4698          * Do not retry the unhandleable instruction if it faults on the
4699          * readonly host memory, otherwise it will goto a infinite loop:
4700          * retry instruction -> write #PF -> emulation fail -> retry
4701          * instruction -> ...
4702          */
4703         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
4704         if (!is_error_noslot_pfn(pfn)) {
4705                 kvm_release_pfn_clean(pfn);
4706                 return true;
4707         }
4708
4709         return false;
4710 }
4711
4712 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
4713                               unsigned long cr2,  int emulation_type)
4714 {
4715         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4716         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
4717
4718         last_retry_eip = vcpu->arch.last_retry_eip;
4719         last_retry_addr = vcpu->arch.last_retry_addr;
4720
4721         /*
4722          * If the emulation is caused by #PF and it is non-page_table
4723          * writing instruction, it means the VM-EXIT is caused by shadow
4724          * page protected, we can zap the shadow page and retry this
4725          * instruction directly.
4726          *
4727          * Note: if the guest uses a non-page-table modifying instruction
4728          * on the PDE that points to the instruction, then we will unmap
4729          * the instruction and go to an infinite loop. So, we cache the
4730          * last retried eip and the last fault address, if we meet the eip
4731          * and the address again, we can break out of the potential infinite
4732          * loop.
4733          */
4734         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
4735
4736         if (!(emulation_type & EMULTYPE_RETRY))
4737                 return false;
4738
4739         if (x86_page_table_writing_insn(ctxt))
4740                 return false;
4741
4742         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
4743                 return false;
4744
4745         vcpu->arch.last_retry_eip = ctxt->eip;
4746         vcpu->arch.last_retry_addr = cr2;
4747
4748         if (!vcpu->arch.mmu.direct_map)
4749                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4750
4751         kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4752
4753         return true;
4754 }
4755
4756 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
4757 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
4758
4759 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4760                             unsigned long cr2,
4761                             int emulation_type,
4762                             void *insn,
4763                             int insn_len)
4764 {
4765         int r;
4766         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4767         bool writeback = true;
4768
4769         kvm_clear_exception_queue(vcpu);
4770
4771         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4772                 init_emulate_ctxt(vcpu);
4773                 ctxt->interruptibility = 0;
4774                 ctxt->have_exception = false;
4775                 ctxt->perm_ok = false;
4776
4777                 ctxt->only_vendor_specific_insn
4778                         = emulation_type & EMULTYPE_TRAP_UD;
4779
4780                 r = x86_decode_insn(ctxt, insn, insn_len);
4781
4782                 trace_kvm_emulate_insn_start(vcpu);
4783                 ++vcpu->stat.insn_emulation;
4784                 if (r != EMULATION_OK)  {
4785                         if (emulation_type & EMULTYPE_TRAP_UD)
4786                                 return EMULATE_FAIL;
4787                         if (reexecute_instruction(vcpu, cr2))
4788                                 return EMULATE_DONE;
4789                         if (emulation_type & EMULTYPE_SKIP)
4790                                 return EMULATE_FAIL;
4791                         return handle_emulation_failure(vcpu);
4792                 }
4793         }
4794
4795         if (emulation_type & EMULTYPE_SKIP) {
4796                 kvm_rip_write(vcpu, ctxt->_eip);
4797                 return EMULATE_DONE;
4798         }
4799
4800         if (retry_instruction(ctxt, cr2, emulation_type))
4801                 return EMULATE_DONE;
4802
4803         /* this is needed for vmware backdoor interface to work since it
4804            changes registers values  during IO operation */
4805         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
4806                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4807                 emulator_invalidate_register_cache(ctxt);
4808         }
4809
4810 restart:
4811         r = x86_emulate_insn(ctxt);
4812
4813         if (r == EMULATION_INTERCEPTED)
4814                 return EMULATE_DONE;
4815
4816         if (r == EMULATION_FAILED) {
4817                 if (reexecute_instruction(vcpu, cr2))
4818                         return EMULATE_DONE;
4819
4820                 return handle_emulation_failure(vcpu);
4821         }
4822
4823         if (ctxt->have_exception) {
4824                 inject_emulated_exception(vcpu);
4825                 r = EMULATE_DONE;
4826         } else if (vcpu->arch.pio.count) {
4827                 if (!vcpu->arch.pio.in)
4828                         vcpu->arch.pio.count = 0;
4829                 else {
4830                         writeback = false;
4831                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
4832                 }
4833                 r = EMULATE_DO_MMIO;
4834         } else if (vcpu->mmio_needed) {
4835                 if (!vcpu->mmio_is_write)
4836                         writeback = false;
4837                 r = EMULATE_DO_MMIO;
4838                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
4839         } else if (r == EMULATION_RESTART)
4840                 goto restart;
4841         else
4842                 r = EMULATE_DONE;
4843
4844         if (writeback) {
4845                 toggle_interruptibility(vcpu, ctxt->interruptibility);
4846                 kvm_set_rflags(vcpu, ctxt->eflags);
4847                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4848                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
4849                 kvm_rip_write(vcpu, ctxt->eip);
4850         } else
4851                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
4852
4853         return r;
4854 }
4855 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
4856
4857 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4858 {
4859         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4860         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
4861                                             size, port, &val, 1);
4862         /* do not return to emulator after return from userspace */
4863         vcpu->arch.pio.count = 0;
4864         return ret;
4865 }
4866 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4867
4868 static void tsc_bad(void *info)
4869 {
4870         __this_cpu_write(cpu_tsc_khz, 0);
4871 }
4872
4873 static void tsc_khz_changed(void *data)
4874 {
4875         struct cpufreq_freqs *freq = data;
4876         unsigned long khz = 0;
4877
4878         if (data)
4879                 khz = freq->new;
4880         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4881                 khz = cpufreq_quick_get(raw_smp_processor_id());
4882         if (!khz)
4883                 khz = tsc_khz;
4884         __this_cpu_write(cpu_tsc_khz, khz);
4885 }
4886
4887 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4888                                      void *data)
4889 {
4890         struct cpufreq_freqs *freq = data;
4891         struct kvm *kvm;
4892         struct kvm_vcpu *vcpu;
4893         int i, send_ipi = 0;
4894
4895         /*
4896          * We allow guests to temporarily run on slowing clocks,
4897          * provided we notify them after, or to run on accelerating
4898          * clocks, provided we notify them before.  Thus time never
4899          * goes backwards.
4900          *
4901          * However, we have a problem.  We can't atomically update
4902          * the frequency of a given CPU from this function; it is
4903          * merely a notifier, which can be called from any CPU.
4904          * Changing the TSC frequency at arbitrary points in time
4905          * requires a recomputation of local variables related to
4906          * the TSC for each VCPU.  We must flag these local variables
4907          * to be updated and be sure the update takes place with the
4908          * new frequency before any guests proceed.
4909          *
4910          * Unfortunately, the combination of hotplug CPU and frequency
4911          * change creates an intractable locking scenario; the order
4912          * of when these callouts happen is undefined with respect to
4913          * CPU hotplug, and they can race with each other.  As such,
4914          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4915          * undefined; you can actually have a CPU frequency change take
4916          * place in between the computation of X and the setting of the
4917          * variable.  To protect against this problem, all updates of
4918          * the per_cpu tsc_khz variable are done in an interrupt
4919          * protected IPI, and all callers wishing to update the value
4920          * must wait for a synchronous IPI to complete (which is trivial
4921          * if the caller is on the CPU already).  This establishes the
4922          * necessary total order on variable updates.
4923          *
4924          * Note that because a guest time update may take place
4925          * anytime after the setting of the VCPU's request bit, the
4926          * correct TSC value must be set before the request.  However,
4927          * to ensure the update actually makes it to any guest which
4928          * starts running in hardware virtualization between the set
4929          * and the acquisition of the spinlock, we must also ping the
4930          * CPU after setting the request bit.
4931          *
4932          */
4933
4934         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4935                 return 0;
4936         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4937                 return 0;
4938
4939         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4940
4941         raw_spin_lock(&kvm_lock);
4942         list_for_each_entry(kvm, &vm_list, vm_list) {
4943                 kvm_for_each_vcpu(i, vcpu, kvm) {
4944                         if (vcpu->cpu != freq->cpu)
4945                                 continue;
4946                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4947                         if (vcpu->cpu != smp_processor_id())
4948                                 send_ipi = 1;
4949                 }
4950         }
4951         raw_spin_unlock(&kvm_lock);
4952
4953         if (freq->old < freq->new && send_ipi) {
4954                 /*
4955                  * We upscale the frequency.  Must make the guest
4956                  * doesn't see old kvmclock values while running with
4957                  * the new frequency, otherwise we risk the guest sees
4958                  * time go backwards.
4959                  *
4960                  * In case we update the frequency for another cpu
4961                  * (which might be in guest context) send an interrupt
4962                  * to kick the cpu out of guest context.  Next time
4963                  * guest context is entered kvmclock will be updated,
4964                  * so the guest will not see stale values.
4965                  */
4966                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4967         }
4968         return 0;
4969 }
4970
4971 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4972         .notifier_call  = kvmclock_cpufreq_notifier
4973 };
4974
4975 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
4976                                         unsigned long action, void *hcpu)
4977 {
4978         unsigned int cpu = (unsigned long)hcpu;
4979
4980         switch (action) {
4981                 case CPU_ONLINE:
4982                 case CPU_DOWN_FAILED:
4983                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4984                         break;
4985                 case CPU_DOWN_PREPARE:
4986                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
4987                         break;
4988         }
4989         return NOTIFY_OK;
4990 }
4991
4992 static struct notifier_block kvmclock_cpu_notifier_block = {
4993         .notifier_call  = kvmclock_cpu_notifier,
4994         .priority = -INT_MAX
4995 };
4996
4997 static void kvm_timer_init(void)
4998 {
4999         int cpu;
5000
5001         max_tsc_khz = tsc_khz;
5002         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5003         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5004 #ifdef CONFIG_CPU_FREQ
5005                 struct cpufreq_policy policy;
5006                 memset(&policy, 0, sizeof(policy));
5007                 cpu = get_cpu();
5008                 cpufreq_get_policy(&policy, cpu);
5009                 if (policy.cpuinfo.max_freq)
5010                         max_tsc_khz = policy.cpuinfo.max_freq;
5011                 put_cpu();
5012 #endif
5013                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5014                                           CPUFREQ_TRANSITION_NOTIFIER);
5015         }
5016         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5017         for_each_online_cpu(cpu)
5018                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5019 }
5020
5021 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5022
5023 int kvm_is_in_guest(void)
5024 {
5025         return __this_cpu_read(current_vcpu) != NULL;
5026 }
5027
5028 static int kvm_is_user_mode(void)
5029 {
5030         int user_mode = 3;
5031
5032         if (__this_cpu_read(current_vcpu))
5033                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5034
5035         return user_mode != 0;
5036 }
5037
5038 static unsigned long kvm_get_guest_ip(void)
5039 {
5040         unsigned long ip = 0;
5041
5042         if (__this_cpu_read(current_vcpu))
5043                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5044
5045         return ip;
5046 }
5047
5048 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5049         .is_in_guest            = kvm_is_in_guest,
5050         .is_user_mode           = kvm_is_user_mode,
5051         .get_guest_ip           = kvm_get_guest_ip,
5052 };
5053
5054 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5055 {
5056         __this_cpu_write(current_vcpu, vcpu);
5057 }
5058 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5059
5060 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5061 {
5062         __this_cpu_write(current_vcpu, NULL);
5063 }
5064 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5065
5066 static void kvm_set_mmio_spte_mask(void)
5067 {
5068         u64 mask;
5069         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5070
5071         /*
5072          * Set the reserved bits and the present bit of an paging-structure
5073          * entry to generate page fault with PFER.RSV = 1.
5074          */
5075         mask = ((1ull << (62 - maxphyaddr + 1)) - 1) << maxphyaddr;
5076         mask |= 1ull;
5077
5078 #ifdef CONFIG_X86_64
5079         /*
5080          * If reserved bit is not supported, clear the present bit to disable
5081          * mmio page fault.
5082          */
5083         if (maxphyaddr == 52)
5084                 mask &= ~1ull;
5085 #endif
5086
5087         kvm_mmu_set_mmio_spte_mask(mask);
5088 }
5089
5090 #ifdef CONFIG_X86_64
5091 static void pvclock_gtod_update_fn(struct work_struct *work)
5092 {
5093         struct kvm *kvm;
5094
5095         struct kvm_vcpu *vcpu;
5096         int i;
5097
5098         raw_spin_lock(&kvm_lock);
5099         list_for_each_entry(kvm, &vm_list, vm_list)
5100                 kvm_for_each_vcpu(i, vcpu, kvm)
5101                         set_bit(KVM_REQ_MASTERCLOCK_UPDATE, &vcpu->requests);
5102         atomic_set(&kvm_guest_has_master_clock, 0);
5103         raw_spin_unlock(&kvm_lock);
5104 }
5105
5106 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5107
5108 /*
5109  * Notification about pvclock gtod data update.
5110  */
5111 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5112                                void *priv)
5113 {
5114         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5115         struct timekeeper *tk = priv;
5116
5117         update_pvclock_gtod(tk);
5118
5119         /* disable master clock if host does not trust, or does not
5120          * use, TSC clocksource
5121          */
5122         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5123             atomic_read(&kvm_guest_has_master_clock) != 0)
5124                 queue_work(system_long_wq, &pvclock_gtod_work);
5125
5126         return 0;
5127 }
5128
5129 static struct notifier_block pvclock_gtod_notifier = {
5130         .notifier_call = pvclock_gtod_notify,
5131 };
5132 #endif
5133
5134 int kvm_arch_init(void *opaque)
5135 {
5136         int r;
5137         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
5138
5139         if (kvm_x86_ops) {
5140                 printk(KERN_ERR "kvm: already loaded the other module\n");
5141                 r = -EEXIST;
5142                 goto out;
5143         }
5144
5145         if (!ops->cpu_has_kvm_support()) {
5146                 printk(KERN_ERR "kvm: no hardware support\n");
5147                 r = -EOPNOTSUPP;
5148                 goto out;
5149         }
5150         if (ops->disabled_by_bios()) {
5151                 printk(KERN_ERR "kvm: disabled by bios\n");
5152                 r = -EOPNOTSUPP;
5153                 goto out;
5154         }
5155
5156         r = kvm_mmu_module_init();
5157         if (r)
5158                 goto out;
5159
5160         kvm_set_mmio_spte_mask();
5161         kvm_init_msr_list();
5162
5163         kvm_x86_ops = ops;
5164         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5165                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5166
5167         kvm_timer_init();
5168
5169         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5170
5171         if (cpu_has_xsave)
5172                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5173
5174         kvm_lapic_init();
5175 #ifdef CONFIG_X86_64
5176         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5177 #endif
5178
5179         return 0;
5180
5181 out:
5182         return r;
5183 }
5184
5185 void kvm_arch_exit(void)
5186 {
5187         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5188
5189         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5190                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5191                                             CPUFREQ_TRANSITION_NOTIFIER);
5192         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5193 #ifdef CONFIG_X86_64
5194         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5195 #endif
5196         kvm_x86_ops = NULL;
5197         kvm_mmu_module_exit();
5198 }
5199
5200 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5201 {
5202         ++vcpu->stat.halt_exits;
5203         if (irqchip_in_kernel(vcpu->kvm)) {
5204                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5205                 return 1;
5206         } else {
5207                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5208                 return 0;
5209         }
5210 }
5211 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5212
5213 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
5214 {
5215         u64 param, ingpa, outgpa, ret;
5216         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
5217         bool fast, longmode;
5218         int cs_db, cs_l;
5219
5220         /*
5221          * hypercall generates UD from non zero cpl and real mode
5222          * per HYPER-V spec
5223          */
5224         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
5225                 kvm_queue_exception(vcpu, UD_VECTOR);
5226                 return 0;
5227         }
5228
5229         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5230         longmode = is_long_mode(vcpu) && cs_l == 1;
5231
5232         if (!longmode) {
5233                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
5234                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
5235                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
5236                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
5237                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
5238                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
5239         }
5240 #ifdef CONFIG_X86_64
5241         else {
5242                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
5243                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
5244                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
5245         }
5246 #endif
5247
5248         code = param & 0xffff;
5249         fast = (param >> 16) & 0x1;
5250         rep_cnt = (param >> 32) & 0xfff;
5251         rep_idx = (param >> 48) & 0xfff;
5252
5253         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
5254
5255         switch (code) {
5256         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
5257                 kvm_vcpu_on_spin(vcpu);
5258                 break;
5259         default:
5260                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
5261                 break;
5262         }
5263
5264         ret = res | (((u64)rep_done & 0xfff) << 32);
5265         if (longmode) {
5266                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5267         } else {
5268                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
5269                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
5270         }
5271
5272         return 1;
5273 }
5274
5275 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5276 {
5277         unsigned long nr, a0, a1, a2, a3, ret;
5278         int r = 1;
5279
5280         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5281                 return kvm_hv_hypercall(vcpu);
5282
5283         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5284         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5285         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5286         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5287         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5288
5289         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5290
5291         if (!is_long_mode(vcpu)) {
5292                 nr &= 0xFFFFFFFF;
5293                 a0 &= 0xFFFFFFFF;
5294                 a1 &= 0xFFFFFFFF;
5295                 a2 &= 0xFFFFFFFF;
5296                 a3 &= 0xFFFFFFFF;
5297         }
5298
5299         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5300                 ret = -KVM_EPERM;
5301                 goto out;
5302         }
5303
5304         switch (nr) {
5305         case KVM_HC_VAPIC_POLL_IRQ:
5306                 ret = 0;
5307                 break;
5308         default:
5309                 ret = -KVM_ENOSYS;
5310                 break;
5311         }
5312 out:
5313         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5314         ++vcpu->stat.hypercalls;
5315         return r;
5316 }
5317 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5318
5319 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5320 {
5321         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5322         char instruction[3];
5323         unsigned long rip = kvm_rip_read(vcpu);
5324
5325         /*
5326          * Blow out the MMU to ensure that no other VCPU has an active mapping
5327          * to ensure that the updated hypercall appears atomically across all
5328          * VCPUs.
5329          */
5330         kvm_mmu_zap_all(vcpu->kvm);
5331
5332         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5333
5334         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5335 }
5336
5337 /*
5338  * Check if userspace requested an interrupt window, and that the
5339  * interrupt window is open.
5340  *
5341  * No need to exit to userspace if we already have an interrupt queued.
5342  */
5343 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5344 {
5345         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5346                 vcpu->run->request_interrupt_window &&
5347                 kvm_arch_interrupt_allowed(vcpu));
5348 }
5349
5350 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5351 {
5352         struct kvm_run *kvm_run = vcpu->run;
5353
5354         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5355         kvm_run->cr8 = kvm_get_cr8(vcpu);
5356         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5357         if (irqchip_in_kernel(vcpu->kvm))
5358                 kvm_run->ready_for_interrupt_injection = 1;
5359         else
5360                 kvm_run->ready_for_interrupt_injection =
5361                         kvm_arch_interrupt_allowed(vcpu) &&
5362                         !kvm_cpu_has_interrupt(vcpu) &&
5363                         !kvm_event_needs_reinjection(vcpu);
5364 }
5365
5366 static int vapic_enter(struct kvm_vcpu *vcpu)
5367 {
5368         struct kvm_lapic *apic = vcpu->arch.apic;
5369         struct page *page;
5370
5371         if (!apic || !apic->vapic_addr)
5372                 return 0;
5373
5374         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5375         if (is_error_page(page))
5376                 return -EFAULT;
5377
5378         vcpu->arch.apic->vapic_page = page;
5379         return 0;
5380 }
5381
5382 static void vapic_exit(struct kvm_vcpu *vcpu)
5383 {
5384         struct kvm_lapic *apic = vcpu->arch.apic;
5385         int idx;
5386
5387         if (!apic || !apic->vapic_addr)
5388                 return;
5389
5390         idx = srcu_read_lock(&vcpu->kvm->srcu);
5391         kvm_release_page_dirty(apic->vapic_page);
5392         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5393         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5394 }
5395
5396 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5397 {
5398         int max_irr, tpr;
5399
5400         if (!kvm_x86_ops->update_cr8_intercept)
5401                 return;
5402
5403         if (!vcpu->arch.apic)
5404                 return;
5405
5406         if (!vcpu->arch.apic->vapic_addr)
5407                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5408         else
5409                 max_irr = -1;
5410
5411         if (max_irr != -1)
5412                 max_irr >>= 4;
5413
5414         tpr = kvm_lapic_get_cr8(vcpu);
5415
5416         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5417 }
5418
5419 static void inject_pending_event(struct kvm_vcpu *vcpu)
5420 {
5421         /* try to reinject previous events if any */
5422         if (vcpu->arch.exception.pending) {
5423                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5424                                         vcpu->arch.exception.has_error_code,
5425                                         vcpu->arch.exception.error_code);
5426                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5427                                           vcpu->arch.exception.has_error_code,
5428                                           vcpu->arch.exception.error_code,
5429                                           vcpu->arch.exception.reinject);
5430                 return;
5431         }
5432
5433         if (vcpu->arch.nmi_injected) {
5434                 kvm_x86_ops->set_nmi(vcpu);
5435                 return;
5436         }
5437
5438         if (vcpu->arch.interrupt.pending) {
5439                 kvm_x86_ops->set_irq(vcpu);
5440                 return;
5441         }
5442
5443         /* try to inject new event if pending */
5444         if (vcpu->arch.nmi_pending) {
5445                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5446                         --vcpu->arch.nmi_pending;
5447                         vcpu->arch.nmi_injected = true;
5448                         kvm_x86_ops->set_nmi(vcpu);
5449                 }
5450         } else if (kvm_cpu_has_interrupt(vcpu)) {
5451                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5452                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5453                                             false);
5454                         kvm_x86_ops->set_irq(vcpu);
5455                 }
5456         }
5457 }
5458
5459 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5460 {
5461         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5462                         !vcpu->guest_xcr0_loaded) {
5463                 /* kvm_set_xcr() also depends on this */
5464                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5465                 vcpu->guest_xcr0_loaded = 1;
5466         }
5467 }
5468
5469 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5470 {
5471         if (vcpu->guest_xcr0_loaded) {
5472                 if (vcpu->arch.xcr0 != host_xcr0)
5473                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5474                 vcpu->guest_xcr0_loaded = 0;
5475         }
5476 }
5477
5478 static void process_nmi(struct kvm_vcpu *vcpu)
5479 {
5480         unsigned limit = 2;
5481
5482         /*
5483          * x86 is limited to one NMI running, and one NMI pending after it.
5484          * If an NMI is already in progress, limit further NMIs to just one.
5485          * Otherwise, allow two (and we'll inject the first one immediately).
5486          */
5487         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
5488                 limit = 1;
5489
5490         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
5491         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
5492         kvm_make_request(KVM_REQ_EVENT, vcpu);
5493 }
5494
5495 static void kvm_gen_update_masterclock(struct kvm *kvm)
5496 {
5497 #ifdef CONFIG_X86_64
5498         int i;
5499         struct kvm_vcpu *vcpu;
5500         struct kvm_arch *ka = &kvm->arch;
5501
5502         spin_lock(&ka->pvclock_gtod_sync_lock);
5503         kvm_make_mclock_inprogress_request(kvm);
5504         /* no guest entries from this point */
5505         pvclock_update_vm_gtod_copy(kvm);
5506
5507         kvm_for_each_vcpu(i, vcpu, kvm)
5508                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
5509
5510         /* guest entries allowed */
5511         kvm_for_each_vcpu(i, vcpu, kvm)
5512                 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
5513
5514         spin_unlock(&ka->pvclock_gtod_sync_lock);
5515 #endif
5516 }
5517
5518 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5519 {
5520         int r;
5521         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5522                 vcpu->run->request_interrupt_window;
5523         bool req_immediate_exit = 0;
5524
5525         if (vcpu->requests) {
5526                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5527                         kvm_mmu_unload(vcpu);
5528                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5529                         __kvm_migrate_timers(vcpu);
5530                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
5531                         kvm_gen_update_masterclock(vcpu->kvm);
5532                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5533                         r = kvm_guest_time_update(vcpu);
5534                         if (unlikely(r))
5535                                 goto out;
5536                 }
5537                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5538                         kvm_mmu_sync_roots(vcpu);
5539                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5540                         kvm_x86_ops->tlb_flush(vcpu);
5541                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5542                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5543                         r = 0;
5544                         goto out;
5545                 }
5546                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5547                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5548                         r = 0;
5549                         goto out;
5550                 }
5551                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5552                         vcpu->fpu_active = 0;
5553                         kvm_x86_ops->fpu_deactivate(vcpu);
5554                 }
5555                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5556                         /* Page is swapped out. Do synthetic halt */
5557                         vcpu->arch.apf.halted = true;
5558                         r = 1;
5559                         goto out;
5560                 }
5561                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
5562                         record_steal_time(vcpu);
5563                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
5564                         process_nmi(vcpu);
5565                 req_immediate_exit =
5566                         kvm_check_request(KVM_REQ_IMMEDIATE_EXIT, vcpu);
5567                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
5568                         kvm_handle_pmu_event(vcpu);
5569                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
5570                         kvm_deliver_pmi(vcpu);
5571         }
5572
5573         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5574                 inject_pending_event(vcpu);
5575
5576                 /* enable NMI/IRQ window open exits if needed */
5577                 if (vcpu->arch.nmi_pending)
5578                         kvm_x86_ops->enable_nmi_window(vcpu);
5579                 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5580                         kvm_x86_ops->enable_irq_window(vcpu);
5581
5582                 if (kvm_lapic_enabled(vcpu)) {
5583                         update_cr8_intercept(vcpu);
5584                         kvm_lapic_sync_to_vapic(vcpu);
5585                 }
5586         }
5587
5588         r = kvm_mmu_reload(vcpu);
5589         if (unlikely(r)) {
5590                 goto cancel_injection;
5591         }
5592
5593         preempt_disable();
5594
5595         kvm_x86_ops->prepare_guest_switch(vcpu);
5596         if (vcpu->fpu_active)
5597                 kvm_load_guest_fpu(vcpu);
5598         kvm_load_guest_xcr0(vcpu);
5599
5600         vcpu->mode = IN_GUEST_MODE;
5601
5602         /* We should set ->mode before check ->requests,
5603          * see the comment in make_all_cpus_request.
5604          */
5605         smp_mb();
5606
5607         local_irq_disable();
5608
5609         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5610             || need_resched() || signal_pending(current)) {
5611                 vcpu->mode = OUTSIDE_GUEST_MODE;
5612                 smp_wmb();
5613                 local_irq_enable();
5614                 preempt_enable();
5615                 r = 1;
5616                 goto cancel_injection;
5617         }
5618
5619         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5620
5621         if (req_immediate_exit)
5622                 smp_send_reschedule(vcpu->cpu);
5623
5624         kvm_guest_enter();
5625
5626         if (unlikely(vcpu->arch.switch_db_regs)) {
5627                 set_debugreg(0, 7);
5628                 set_debugreg(vcpu->arch.eff_db[0], 0);
5629                 set_debugreg(vcpu->arch.eff_db[1], 1);
5630                 set_debugreg(vcpu->arch.eff_db[2], 2);
5631                 set_debugreg(vcpu->arch.eff_db[3], 3);
5632         }
5633
5634         trace_kvm_entry(vcpu->vcpu_id);
5635         kvm_x86_ops->run(vcpu);
5636
5637         /*
5638          * If the guest has used debug registers, at least dr7
5639          * will be disabled while returning to the host.
5640          * If we don't have active breakpoints in the host, we don't
5641          * care about the messed up debug address registers. But if
5642          * we have some of them active, restore the old state.
5643          */
5644         if (hw_breakpoint_active())
5645                 hw_breakpoint_restore();
5646
5647         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu,
5648                                                            native_read_tsc());
5649
5650         vcpu->mode = OUTSIDE_GUEST_MODE;
5651         smp_wmb();
5652         local_irq_enable();
5653
5654         ++vcpu->stat.exits;
5655
5656         /*
5657          * We must have an instruction between local_irq_enable() and
5658          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5659          * the interrupt shadow.  The stat.exits increment will do nicely.
5660          * But we need to prevent reordering, hence this barrier():
5661          */
5662         barrier();
5663
5664         kvm_guest_exit();
5665
5666         preempt_enable();
5667
5668         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5669
5670         /*
5671          * Profile KVM exit RIPs:
5672          */
5673         if (unlikely(prof_on == KVM_PROFILING)) {
5674                 unsigned long rip = kvm_rip_read(vcpu);
5675                 profile_hit(KVM_PROFILING, (void *)rip);
5676         }
5677
5678         if (unlikely(vcpu->arch.tsc_always_catchup))
5679                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5680
5681         if (vcpu->arch.apic_attention)
5682                 kvm_lapic_sync_from_vapic(vcpu);
5683
5684         r = kvm_x86_ops->handle_exit(vcpu);
5685         return r;
5686
5687 cancel_injection:
5688         kvm_x86_ops->cancel_injection(vcpu);
5689         if (unlikely(vcpu->arch.apic_attention))
5690                 kvm_lapic_sync_from_vapic(vcpu);
5691 out:
5692         return r;
5693 }
5694
5695
5696 static int __vcpu_run(struct kvm_vcpu *vcpu)
5697 {
5698         int r;
5699         struct kvm *kvm = vcpu->kvm;
5700
5701         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5702                 pr_debug("vcpu %d received sipi with vector # %x\n",
5703                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5704                 kvm_lapic_reset(vcpu);
5705                 r = kvm_vcpu_reset(vcpu);
5706                 if (r)
5707                         return r;
5708                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5709         }
5710
5711         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5712         r = vapic_enter(vcpu);
5713         if (r) {
5714                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5715                 return r;
5716         }
5717
5718         r = 1;
5719         while (r > 0) {
5720                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5721                     !vcpu->arch.apf.halted)
5722                         r = vcpu_enter_guest(vcpu);
5723                 else {
5724                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5725                         kvm_vcpu_block(vcpu);
5726                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5727                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5728                         {
5729                                 switch(vcpu->arch.mp_state) {
5730                                 case KVM_MP_STATE_HALTED:
5731                                         vcpu->arch.mp_state =
5732                                                 KVM_MP_STATE_RUNNABLE;
5733                                 case KVM_MP_STATE_RUNNABLE:
5734                                         vcpu->arch.apf.halted = false;
5735                                         break;
5736                                 case KVM_MP_STATE_SIPI_RECEIVED:
5737                                 default:
5738                                         r = -EINTR;
5739                                         break;
5740                                 }
5741                         }
5742                 }
5743
5744                 if (r <= 0)
5745                         break;
5746
5747                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5748                 if (kvm_cpu_has_pending_timer(vcpu))
5749                         kvm_inject_pending_timer_irqs(vcpu);
5750
5751                 if (dm_request_for_irq_injection(vcpu)) {
5752                         r = -EINTR;
5753                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5754                         ++vcpu->stat.request_irq_exits;
5755                 }
5756
5757                 kvm_check_async_pf_completion(vcpu);
5758
5759                 if (signal_pending(current)) {
5760                         r = -EINTR;
5761                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5762                         ++vcpu->stat.signal_exits;
5763                 }
5764                 if (need_resched()) {
5765                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5766                         kvm_resched(vcpu);
5767                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5768                 }
5769         }
5770
5771         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5772
5773         vapic_exit(vcpu);
5774
5775         return r;
5776 }
5777
5778 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
5779 {
5780         int r;
5781         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5782         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
5783         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5784         if (r != EMULATE_DONE)
5785                 return 0;
5786         return 1;
5787 }
5788
5789 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
5790 {
5791         BUG_ON(!vcpu->arch.pio.count);
5792
5793         return complete_emulated_io(vcpu);
5794 }
5795
5796 /*
5797  * Implements the following, as a state machine:
5798  *
5799  * read:
5800  *   for each fragment
5801  *     write gpa, len
5802  *     exit
5803  *     copy data
5804  *   execute insn
5805  *
5806  * write:
5807  *   for each fragment
5808  *      write gpa, len
5809  *      copy data
5810  *      exit
5811  */
5812 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
5813 {
5814         struct kvm_run *run = vcpu->run;
5815         struct kvm_mmio_fragment *frag;
5816
5817         BUG_ON(!vcpu->mmio_needed);
5818
5819         /* Complete previous fragment */
5820         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment++];
5821         if (!vcpu->mmio_is_write)
5822                 memcpy(frag->data, run->mmio.data, frag->len);
5823         if (vcpu->mmio_cur_fragment == vcpu->mmio_nr_fragments) {
5824                 vcpu->mmio_needed = 0;
5825                 if (vcpu->mmio_is_write)
5826                         return 1;
5827                 vcpu->mmio_read_completed = 1;
5828                 return complete_emulated_io(vcpu);
5829         }
5830         /* Initiate next fragment */
5831         ++frag;
5832         run->exit_reason = KVM_EXIT_MMIO;
5833         run->mmio.phys_addr = frag->gpa;
5834         if (vcpu->mmio_is_write)
5835                 memcpy(run->mmio.data, frag->data, frag->len);
5836         run->mmio.len = frag->len;
5837         run->mmio.is_write = vcpu->mmio_is_write;
5838         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5839         return 0;
5840 }
5841
5842
5843 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5844 {
5845         int r;
5846         sigset_t sigsaved;
5847
5848         if (!tsk_used_math(current) && init_fpu(current))
5849                 return -ENOMEM;
5850
5851         if (vcpu->sigset_active)
5852                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5853
5854         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5855                 kvm_vcpu_block(vcpu);
5856                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5857                 r = -EAGAIN;
5858                 goto out;
5859         }
5860
5861         /* re-sync apic's tpr */
5862         if (!irqchip_in_kernel(vcpu->kvm)) {
5863                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
5864                         r = -EINVAL;
5865                         goto out;
5866                 }
5867         }
5868
5869         if (unlikely(vcpu->arch.complete_userspace_io)) {
5870                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
5871                 vcpu->arch.complete_userspace_io = NULL;
5872                 r = cui(vcpu);
5873                 if (r <= 0)
5874                         goto out;
5875         } else
5876                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
5877
5878         r = __vcpu_run(vcpu);
5879
5880 out:
5881         post_kvm_run_save(vcpu);
5882         if (vcpu->sigset_active)
5883                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5884
5885         return r;
5886 }
5887
5888 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5889 {
5890         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
5891                 /*
5892                  * We are here if userspace calls get_regs() in the middle of
5893                  * instruction emulation. Registers state needs to be copied
5894                  * back from emulation context to vcpu. Userspace shouldn't do
5895                  * that usually, but some bad designed PV devices (vmware
5896                  * backdoor interface) need this to work
5897                  */
5898                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
5899                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5900         }
5901         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5902         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5903         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5904         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5905         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5906         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5907         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5908         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5909 #ifdef CONFIG_X86_64
5910         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5911         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5912         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5913         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5914         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5915         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5916         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5917         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5918 #endif
5919
5920         regs->rip = kvm_rip_read(vcpu);
5921         regs->rflags = kvm_get_rflags(vcpu);
5922
5923         return 0;
5924 }
5925
5926 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5927 {
5928         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
5929         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5930
5931         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5932         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5933         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5934         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5935         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5936         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5937         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5938         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5939 #ifdef CONFIG_X86_64
5940         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5941         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5942         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5943         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5944         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5945         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5946         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5947         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5948 #endif
5949
5950         kvm_rip_write(vcpu, regs->rip);
5951         kvm_set_rflags(vcpu, regs->rflags);
5952
5953         vcpu->arch.exception.pending = false;
5954
5955         kvm_make_request(KVM_REQ_EVENT, vcpu);
5956
5957         return 0;
5958 }
5959
5960 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5961 {
5962         struct kvm_segment cs;
5963
5964         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
5965         *db = cs.db;
5966         *l = cs.l;
5967 }
5968 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
5969
5970 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
5971                                   struct kvm_sregs *sregs)
5972 {
5973         struct desc_ptr dt;
5974
5975         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5976         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5977         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5978         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5979         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5980         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5981
5982         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5983         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5984
5985         kvm_x86_ops->get_idt(vcpu, &dt);
5986         sregs->idt.limit = dt.size;
5987         sregs->idt.base = dt.address;
5988         kvm_x86_ops->get_gdt(vcpu, &dt);
5989         sregs->gdt.limit = dt.size;
5990         sregs->gdt.base = dt.address;
5991
5992         sregs->cr0 = kvm_read_cr0(vcpu);
5993         sregs->cr2 = vcpu->arch.cr2;
5994         sregs->cr3 = kvm_read_cr3(vcpu);
5995         sregs->cr4 = kvm_read_cr4(vcpu);
5996         sregs->cr8 = kvm_get_cr8(vcpu);
5997         sregs->efer = vcpu->arch.efer;
5998         sregs->apic_base = kvm_get_apic_base(vcpu);
5999
6000         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6001
6002         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6003                 set_bit(vcpu->arch.interrupt.nr,
6004                         (unsigned long *)sregs->interrupt_bitmap);
6005
6006         return 0;
6007 }
6008
6009 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6010                                     struct kvm_mp_state *mp_state)
6011 {
6012         mp_state->mp_state = vcpu->arch.mp_state;
6013         return 0;
6014 }
6015
6016 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
6017                                     struct kvm_mp_state *mp_state)
6018 {
6019         vcpu->arch.mp_state = mp_state->mp_state;
6020         kvm_make_request(KVM_REQ_EVENT, vcpu);
6021         return 0;
6022 }
6023
6024 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
6025                     int reason, bool has_error_code, u32 error_code)
6026 {
6027         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6028         int ret;
6029
6030         init_emulate_ctxt(vcpu);
6031
6032         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
6033                                    has_error_code, error_code);
6034
6035         if (ret)
6036                 return EMULATE_FAIL;
6037
6038         kvm_rip_write(vcpu, ctxt->eip);
6039         kvm_set_rflags(vcpu, ctxt->eflags);
6040         kvm_make_request(KVM_REQ_EVENT, vcpu);
6041         return EMULATE_DONE;
6042 }
6043 EXPORT_SYMBOL_GPL(kvm_task_switch);
6044
6045 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
6046                                   struct kvm_sregs *sregs)
6047 {
6048         int mmu_reset_needed = 0;
6049         int pending_vec, max_bits, idx;
6050         struct desc_ptr dt;
6051
6052         dt.size = sregs->idt.limit;
6053         dt.address = sregs->idt.base;
6054         kvm_x86_ops->set_idt(vcpu, &dt);
6055         dt.size = sregs->gdt.limit;
6056         dt.address = sregs->gdt.base;
6057         kvm_x86_ops->set_gdt(vcpu, &dt);
6058
6059         vcpu->arch.cr2 = sregs->cr2;
6060         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
6061         vcpu->arch.cr3 = sregs->cr3;
6062         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
6063
6064         kvm_set_cr8(vcpu, sregs->cr8);
6065
6066         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
6067         kvm_x86_ops->set_efer(vcpu, sregs->efer);
6068         kvm_set_apic_base(vcpu, sregs->apic_base);
6069
6070         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
6071         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
6072         vcpu->arch.cr0 = sregs->cr0;
6073
6074         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
6075         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
6076         if (sregs->cr4 & X86_CR4_OSXSAVE)
6077                 kvm_update_cpuid(vcpu);
6078
6079         idx = srcu_read_lock(&vcpu->kvm->srcu);
6080         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
6081                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
6082                 mmu_reset_needed = 1;
6083         }
6084         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6085
6086         if (mmu_reset_needed)
6087                 kvm_mmu_reset_context(vcpu);
6088
6089         max_bits = KVM_NR_INTERRUPTS;
6090         pending_vec = find_first_bit(
6091                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
6092         if (pending_vec < max_bits) {
6093                 kvm_queue_interrupt(vcpu, pending_vec, false);
6094                 pr_debug("Set back pending irq %d\n", pending_vec);
6095         }
6096
6097         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6098         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6099         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6100         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6101         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6102         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6103
6104         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6105         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6106
6107         update_cr8_intercept(vcpu);
6108
6109         /* Older userspace won't unhalt the vcpu on reset. */
6110         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
6111             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
6112             !is_protmode(vcpu))
6113                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6114
6115         kvm_make_request(KVM_REQ_EVENT, vcpu);
6116
6117         return 0;
6118 }
6119
6120 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
6121                                         struct kvm_guest_debug *dbg)
6122 {
6123         unsigned long rflags;
6124         int i, r;
6125
6126         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
6127                 r = -EBUSY;
6128                 if (vcpu->arch.exception.pending)
6129                         goto out;
6130                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
6131                         kvm_queue_exception(vcpu, DB_VECTOR);
6132                 else
6133                         kvm_queue_exception(vcpu, BP_VECTOR);
6134         }
6135
6136         /*
6137          * Read rflags as long as potentially injected trace flags are still
6138          * filtered out.
6139          */
6140         rflags = kvm_get_rflags(vcpu);
6141
6142         vcpu->guest_debug = dbg->control;
6143         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
6144                 vcpu->guest_debug = 0;
6145
6146         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
6147                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
6148                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
6149                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
6150         } else {
6151                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6152                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6153         }
6154         kvm_update_dr7(vcpu);
6155
6156         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6157                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
6158                         get_segment_base(vcpu, VCPU_SREG_CS);
6159
6160         /*
6161          * Trigger an rflags update that will inject or remove the trace
6162          * flags.
6163          */
6164         kvm_set_rflags(vcpu, rflags);
6165
6166         kvm_x86_ops->update_db_bp_intercept(vcpu);
6167
6168         r = 0;
6169
6170 out:
6171
6172         return r;
6173 }
6174
6175 /*
6176  * Translate a guest virtual address to a guest physical address.
6177  */
6178 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
6179                                     struct kvm_translation *tr)
6180 {
6181         unsigned long vaddr = tr->linear_address;
6182         gpa_t gpa;
6183         int idx;
6184
6185         idx = srcu_read_lock(&vcpu->kvm->srcu);
6186         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
6187         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6188         tr->physical_address = gpa;
6189         tr->valid = gpa != UNMAPPED_GVA;
6190         tr->writeable = 1;
6191         tr->usermode = 0;
6192
6193         return 0;
6194 }
6195
6196 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6197 {
6198         struct i387_fxsave_struct *fxsave =
6199                         &vcpu->arch.guest_fpu.state->fxsave;
6200
6201         memcpy(fpu->fpr, fxsave->st_space, 128);
6202         fpu->fcw = fxsave->cwd;
6203         fpu->fsw = fxsave->swd;
6204         fpu->ftwx = fxsave->twd;
6205         fpu->last_opcode = fxsave->fop;
6206         fpu->last_ip = fxsave->rip;
6207         fpu->last_dp = fxsave->rdp;
6208         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
6209
6210         return 0;
6211 }
6212
6213 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6214 {
6215         struct i387_fxsave_struct *fxsave =
6216                         &vcpu->arch.guest_fpu.state->fxsave;
6217
6218         memcpy(fxsave->st_space, fpu->fpr, 128);
6219         fxsave->cwd = fpu->fcw;
6220         fxsave->swd = fpu->fsw;
6221         fxsave->twd = fpu->ftwx;
6222         fxsave->fop = fpu->last_opcode;
6223         fxsave->rip = fpu->last_ip;
6224         fxsave->rdp = fpu->last_dp;
6225         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
6226
6227         return 0;
6228 }
6229
6230 int fx_init(struct kvm_vcpu *vcpu)
6231 {
6232         int err;
6233
6234         err = fpu_alloc(&vcpu->arch.guest_fpu);
6235         if (err)
6236                 return err;
6237
6238         fpu_finit(&vcpu->arch.guest_fpu);
6239
6240         /*
6241          * Ensure guest xcr0 is valid for loading
6242          */
6243         vcpu->arch.xcr0 = XSTATE_FP;
6244
6245         vcpu->arch.cr0 |= X86_CR0_ET;
6246
6247         return 0;
6248 }
6249 EXPORT_SYMBOL_GPL(fx_init);
6250
6251 static void fx_free(struct kvm_vcpu *vcpu)
6252 {
6253         fpu_free(&vcpu->arch.guest_fpu);
6254 }
6255
6256 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
6257 {
6258         if (vcpu->guest_fpu_loaded)
6259                 return;
6260
6261         /*
6262          * Restore all possible states in the guest,
6263          * and assume host would use all available bits.
6264          * Guest xcr0 would be loaded later.
6265          */
6266         kvm_put_guest_xcr0(vcpu);
6267         vcpu->guest_fpu_loaded = 1;
6268         __kernel_fpu_begin();
6269         fpu_restore_checking(&vcpu->arch.guest_fpu);
6270         trace_kvm_fpu(1);
6271 }
6272
6273 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
6274 {
6275         kvm_put_guest_xcr0(vcpu);
6276
6277         if (!vcpu->guest_fpu_loaded)
6278                 return;
6279
6280         vcpu->guest_fpu_loaded = 0;
6281         fpu_save_init(&vcpu->arch.guest_fpu);
6282         __kernel_fpu_end();
6283         ++vcpu->stat.fpu_reload;
6284         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
6285         trace_kvm_fpu(0);
6286 }
6287
6288 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
6289 {
6290         kvmclock_reset(vcpu);
6291
6292         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6293         fx_free(vcpu);
6294         kvm_x86_ops->vcpu_free(vcpu);
6295 }
6296
6297 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
6298                                                 unsigned int id)
6299 {
6300         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
6301                 printk_once(KERN_WARNING
6302                 "kvm: SMP vm created on host with unstable TSC; "
6303                 "guest TSC will not be reliable\n");
6304         return kvm_x86_ops->vcpu_create(kvm, id);
6305 }
6306
6307 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
6308 {
6309         int r;
6310
6311         vcpu->arch.mtrr_state.have_fixed = 1;
6312         r = vcpu_load(vcpu);
6313         if (r)
6314                 return r;
6315         r = kvm_vcpu_reset(vcpu);
6316         if (r == 0)
6317                 r = kvm_mmu_setup(vcpu);
6318         vcpu_put(vcpu);
6319
6320         return r;
6321 }
6322
6323 int kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
6324 {
6325         int r;
6326
6327         r = vcpu_load(vcpu);
6328         if (r)
6329                 return r;
6330         kvm_write_tsc(vcpu, 0);
6331         vcpu_put(vcpu);
6332
6333         return r;
6334 }
6335
6336 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
6337 {
6338         int r;
6339         vcpu->arch.apf.msr_val = 0;
6340
6341         r = vcpu_load(vcpu);
6342         BUG_ON(r);
6343         kvm_mmu_unload(vcpu);
6344         vcpu_put(vcpu);
6345
6346         fx_free(vcpu);
6347         kvm_x86_ops->vcpu_free(vcpu);
6348 }
6349
6350 static int kvm_vcpu_reset(struct kvm_vcpu *vcpu)
6351 {
6352         atomic_set(&vcpu->arch.nmi_queued, 0);
6353         vcpu->arch.nmi_pending = 0;
6354         vcpu->arch.nmi_injected = false;
6355
6356         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
6357         vcpu->arch.dr6 = DR6_FIXED_1;
6358         vcpu->arch.dr7 = DR7_FIXED_1;
6359         kvm_update_dr7(vcpu);
6360
6361         kvm_make_request(KVM_REQ_EVENT, vcpu);
6362         vcpu->arch.apf.msr_val = 0;
6363         vcpu->arch.st.msr_val = 0;
6364
6365         kvmclock_reset(vcpu);
6366
6367         kvm_clear_async_pf_completion_queue(vcpu);
6368         kvm_async_pf_hash_reset(vcpu);
6369         vcpu->arch.apf.halted = false;
6370
6371         kvm_pmu_reset(vcpu);
6372
6373         return kvm_x86_ops->vcpu_reset(vcpu);
6374 }
6375
6376 int kvm_arch_hardware_enable(void *garbage)
6377 {
6378         struct kvm *kvm;
6379         struct kvm_vcpu *vcpu;
6380         int i;
6381         int ret;
6382         u64 local_tsc;
6383         u64 max_tsc = 0;
6384         bool stable, backwards_tsc = false;
6385
6386         kvm_shared_msr_cpu_online();
6387         ret = kvm_x86_ops->hardware_enable(garbage);
6388         if (ret != 0)
6389                 return ret;
6390
6391         local_tsc = native_read_tsc();
6392         stable = !check_tsc_unstable();
6393         list_for_each_entry(kvm, &vm_list, vm_list) {
6394                 kvm_for_each_vcpu(i, vcpu, kvm) {
6395                         if (!stable && vcpu->cpu == smp_processor_id())
6396                                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
6397                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
6398                                 backwards_tsc = true;
6399                                 if (vcpu->arch.last_host_tsc > max_tsc)
6400                                         max_tsc = vcpu->arch.last_host_tsc;
6401                         }
6402                 }
6403         }
6404
6405         /*
6406          * Sometimes, even reliable TSCs go backwards.  This happens on
6407          * platforms that reset TSC during suspend or hibernate actions, but
6408          * maintain synchronization.  We must compensate.  Fortunately, we can
6409          * detect that condition here, which happens early in CPU bringup,
6410          * before any KVM threads can be running.  Unfortunately, we can't
6411          * bring the TSCs fully up to date with real time, as we aren't yet far
6412          * enough into CPU bringup that we know how much real time has actually
6413          * elapsed; our helper function, get_kernel_ns() will be using boot
6414          * variables that haven't been updated yet.
6415          *
6416          * So we simply find the maximum observed TSC above, then record the
6417          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
6418          * the adjustment will be applied.  Note that we accumulate
6419          * adjustments, in case multiple suspend cycles happen before some VCPU
6420          * gets a chance to run again.  In the event that no KVM threads get a
6421          * chance to run, we will miss the entire elapsed period, as we'll have
6422          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
6423          * loose cycle time.  This isn't too big a deal, since the loss will be
6424          * uniform across all VCPUs (not to mention the scenario is extremely
6425          * unlikely). It is possible that a second hibernate recovery happens
6426          * much faster than a first, causing the observed TSC here to be
6427          * smaller; this would require additional padding adjustment, which is
6428          * why we set last_host_tsc to the local tsc observed here.
6429          *
6430          * N.B. - this code below runs only on platforms with reliable TSC,
6431          * as that is the only way backwards_tsc is set above.  Also note
6432          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
6433          * have the same delta_cyc adjustment applied if backwards_tsc
6434          * is detected.  Note further, this adjustment is only done once,
6435          * as we reset last_host_tsc on all VCPUs to stop this from being
6436          * called multiple times (one for each physical CPU bringup).
6437          *
6438          * Platforms with unreliable TSCs don't have to deal with this, they
6439          * will be compensated by the logic in vcpu_load, which sets the TSC to
6440          * catchup mode.  This will catchup all VCPUs to real time, but cannot
6441          * guarantee that they stay in perfect synchronization.
6442          */
6443         if (backwards_tsc) {
6444                 u64 delta_cyc = max_tsc - local_tsc;
6445                 list_for_each_entry(kvm, &vm_list, vm_list) {
6446                         kvm_for_each_vcpu(i, vcpu, kvm) {
6447                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
6448                                 vcpu->arch.last_host_tsc = local_tsc;
6449                                 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
6450                                         &vcpu->requests);
6451                         }
6452
6453                         /*
6454                          * We have to disable TSC offset matching.. if you were
6455                          * booting a VM while issuing an S4 host suspend....
6456                          * you may have some problem.  Solving this issue is
6457                          * left as an exercise to the reader.
6458                          */
6459                         kvm->arch.last_tsc_nsec = 0;
6460                         kvm->arch.last_tsc_write = 0;
6461                 }
6462
6463         }
6464         return 0;
6465 }
6466
6467 void kvm_arch_hardware_disable(void *garbage)
6468 {
6469         kvm_x86_ops->hardware_disable(garbage);
6470         drop_user_return_notifiers(garbage);
6471 }
6472
6473 int kvm_arch_hardware_setup(void)
6474 {
6475         return kvm_x86_ops->hardware_setup();
6476 }
6477
6478 void kvm_arch_hardware_unsetup(void)
6479 {
6480         kvm_x86_ops->hardware_unsetup();
6481 }
6482
6483 void kvm_arch_check_processor_compat(void *rtn)
6484 {
6485         kvm_x86_ops->check_processor_compatibility(rtn);
6486 }
6487
6488 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
6489 {
6490         return irqchip_in_kernel(vcpu->kvm) == (vcpu->arch.apic != NULL);
6491 }
6492
6493 struct static_key kvm_no_apic_vcpu __read_mostly;
6494
6495 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
6496 {
6497         struct page *page;
6498         struct kvm *kvm;
6499         int r;
6500
6501         BUG_ON(vcpu->kvm == NULL);
6502         kvm = vcpu->kvm;
6503
6504         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
6505         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
6506                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6507         else
6508                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
6509
6510         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
6511         if (!page) {
6512                 r = -ENOMEM;
6513                 goto fail;
6514         }
6515         vcpu->arch.pio_data = page_address(page);
6516
6517         kvm_set_tsc_khz(vcpu, max_tsc_khz);
6518
6519         r = kvm_mmu_create(vcpu);
6520         if (r < 0)
6521                 goto fail_free_pio_data;
6522
6523         if (irqchip_in_kernel(kvm)) {
6524                 r = kvm_create_lapic(vcpu);
6525                 if (r < 0)
6526                         goto fail_mmu_destroy;
6527         } else
6528                 static_key_slow_inc(&kvm_no_apic_vcpu);
6529
6530         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
6531                                        GFP_KERNEL);
6532         if (!vcpu->arch.mce_banks) {
6533                 r = -ENOMEM;
6534                 goto fail_free_lapic;
6535         }
6536         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
6537
6538         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
6539                 goto fail_free_mce_banks;
6540
6541         kvm_async_pf_hash_reset(vcpu);
6542         kvm_pmu_init(vcpu);
6543
6544         return 0;
6545 fail_free_mce_banks:
6546         kfree(vcpu->arch.mce_banks);
6547 fail_free_lapic:
6548         kvm_free_lapic(vcpu);
6549 fail_mmu_destroy:
6550         kvm_mmu_destroy(vcpu);
6551 fail_free_pio_data:
6552         free_page((unsigned long)vcpu->arch.pio_data);
6553 fail:
6554         return r;
6555 }
6556
6557 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
6558 {
6559         int idx;
6560
6561         kvm_pmu_destroy(vcpu);
6562         kfree(vcpu->arch.mce_banks);
6563         kvm_free_lapic(vcpu);
6564         idx = srcu_read_lock(&vcpu->kvm->srcu);
6565         kvm_mmu_destroy(vcpu);
6566         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6567         free_page((unsigned long)vcpu->arch.pio_data);
6568         if (!irqchip_in_kernel(vcpu->kvm))
6569                 static_key_slow_dec(&kvm_no_apic_vcpu);
6570 }
6571
6572 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
6573 {
6574         if (type)
6575                 return -EINVAL;
6576
6577         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
6578         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
6579
6580         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6581         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
6582         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
6583         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
6584                 &kvm->arch.irq_sources_bitmap);
6585
6586         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
6587         mutex_init(&kvm->arch.apic_map_lock);
6588         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
6589
6590         pvclock_update_vm_gtod_copy(kvm);
6591
6592         return 0;
6593 }
6594
6595 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
6596 {
6597         int r;
6598         r = vcpu_load(vcpu);
6599         BUG_ON(r);
6600         kvm_mmu_unload(vcpu);
6601         vcpu_put(vcpu);
6602 }
6603
6604 static void kvm_free_vcpus(struct kvm *kvm)
6605 {
6606         unsigned int i;
6607         struct kvm_vcpu *vcpu;
6608
6609         /*
6610          * Unpin any mmu pages first.
6611          */
6612         kvm_for_each_vcpu(i, vcpu, kvm) {
6613                 kvm_clear_async_pf_completion_queue(vcpu);
6614                 kvm_unload_vcpu_mmu(vcpu);
6615         }
6616         kvm_for_each_vcpu(i, vcpu, kvm)
6617                 kvm_arch_vcpu_free(vcpu);
6618
6619         mutex_lock(&kvm->lock);
6620         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6621                 kvm->vcpus[i] = NULL;
6622
6623         atomic_set(&kvm->online_vcpus, 0);
6624         mutex_unlock(&kvm->lock);
6625 }
6626
6627 void kvm_arch_sync_events(struct kvm *kvm)
6628 {
6629         kvm_free_all_assigned_devices(kvm);
6630         kvm_free_pit(kvm);
6631 }
6632
6633 void kvm_arch_destroy_vm(struct kvm *kvm)
6634 {
6635         kvm_iommu_unmap_guest(kvm);
6636         kfree(kvm->arch.vpic);
6637         kfree(kvm->arch.vioapic);
6638         kvm_free_vcpus(kvm);
6639         if (kvm->arch.apic_access_page)
6640                 put_page(kvm->arch.apic_access_page);
6641         if (kvm->arch.ept_identity_pagetable)
6642                 put_page(kvm->arch.ept_identity_pagetable);
6643         kfree(rcu_dereference_check(kvm->arch.apic_map, 1));
6644 }
6645
6646 void kvm_arch_free_memslot(struct kvm_memory_slot *free,
6647                            struct kvm_memory_slot *dont)
6648 {
6649         int i;
6650
6651         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
6652                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
6653                         kvm_kvfree(free->arch.rmap[i]);
6654                         free->arch.rmap[i] = NULL;
6655                 }
6656                 if (i == 0)
6657                         continue;
6658
6659                 if (!dont || free->arch.lpage_info[i - 1] !=
6660                              dont->arch.lpage_info[i - 1]) {
6661                         kvm_kvfree(free->arch.lpage_info[i - 1]);
6662                         free->arch.lpage_info[i - 1] = NULL;
6663                 }
6664         }
6665 }
6666
6667 int kvm_arch_create_memslot(struct kvm_memory_slot *slot, unsigned long npages)
6668 {
6669         int i;
6670
6671         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
6672                 unsigned long ugfn;
6673                 int lpages;
6674                 int level = i + 1;
6675
6676                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
6677                                       slot->base_gfn, level) + 1;
6678
6679                 slot->arch.rmap[i] =
6680                         kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
6681                 if (!slot->arch.rmap[i])
6682                         goto out_free;
6683                 if (i == 0)
6684                         continue;
6685
6686                 slot->arch.lpage_info[i - 1] = kvm_kvzalloc(lpages *
6687                                         sizeof(*slot->arch.lpage_info[i - 1]));
6688                 if (!slot->arch.lpage_info[i - 1])
6689                         goto out_free;
6690
6691                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
6692                         slot->arch.lpage_info[i - 1][0].write_count = 1;
6693                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
6694                         slot->arch.lpage_info[i - 1][lpages - 1].write_count = 1;
6695                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
6696                 /*
6697                  * If the gfn and userspace address are not aligned wrt each
6698                  * other, or if explicitly asked to, disable large page
6699                  * support for this slot
6700                  */
6701                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
6702                     !kvm_largepages_enabled()) {
6703                         unsigned long j;
6704
6705                         for (j = 0; j < lpages; ++j)
6706                                 slot->arch.lpage_info[i - 1][j].write_count = 1;
6707                 }
6708         }
6709
6710         return 0;
6711
6712 out_free:
6713         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
6714                 kvm_kvfree(slot->arch.rmap[i]);
6715                 slot->arch.rmap[i] = NULL;
6716                 if (i == 0)
6717                         continue;
6718
6719                 kvm_kvfree(slot->arch.lpage_info[i - 1]);
6720                 slot->arch.lpage_info[i - 1] = NULL;
6721         }
6722         return -ENOMEM;
6723 }
6724
6725 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6726                                 struct kvm_memory_slot *memslot,
6727                                 struct kvm_memory_slot old,
6728                                 struct kvm_userspace_memory_region *mem,
6729                                 int user_alloc)
6730 {
6731         int npages = memslot->npages;
6732         int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
6733
6734         /* Prevent internal slot pages from being moved by fork()/COW. */
6735         if (memslot->id >= KVM_MEMORY_SLOTS)
6736                 map_flags = MAP_SHARED | MAP_ANONYMOUS;
6737
6738         /*To keep backward compatibility with older userspace,
6739          *x86 needs to handle !user_alloc case.
6740          */
6741         if (!user_alloc) {
6742                 if (npages && !old.npages) {
6743                         unsigned long userspace_addr;
6744
6745                         userspace_addr = vm_mmap(NULL, 0,
6746                                                  npages * PAGE_SIZE,
6747                                                  PROT_READ | PROT_WRITE,
6748                                                  map_flags,
6749                                                  0);
6750
6751                         if (IS_ERR((void *)userspace_addr))
6752                                 return PTR_ERR((void *)userspace_addr);
6753
6754                         memslot->userspace_addr = userspace_addr;
6755                 }
6756         }
6757
6758
6759         return 0;
6760 }
6761
6762 void kvm_arch_commit_memory_region(struct kvm *kvm,
6763                                 struct kvm_userspace_memory_region *mem,
6764                                 struct kvm_memory_slot old,
6765                                 int user_alloc)
6766 {
6767
6768         int nr_mmu_pages = 0, npages = mem->memory_size >> PAGE_SHIFT;
6769
6770         if (!user_alloc && !old.user_alloc && old.npages && !npages) {
6771                 int ret;
6772
6773                 ret = vm_munmap(old.userspace_addr,
6774                                 old.npages * PAGE_SIZE);
6775                 if (ret < 0)
6776                         printk(KERN_WARNING
6777                                "kvm_vm_ioctl_set_memory_region: "
6778                                "failed to munmap memory\n");
6779         }
6780
6781         if (!kvm->arch.n_requested_mmu_pages)
6782                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
6783
6784         spin_lock(&kvm->mmu_lock);
6785         if (nr_mmu_pages)
6786                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
6787         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
6788         spin_unlock(&kvm->mmu_lock);
6789         /*
6790          * If memory slot is created, or moved, we need to clear all
6791          * mmio sptes.
6792          */
6793         if (npages && old.base_gfn != mem->guest_phys_addr >> PAGE_SHIFT) {
6794                 kvm_mmu_zap_all(kvm);
6795                 kvm_reload_remote_mmus(kvm);
6796         }
6797 }
6798
6799 void kvm_arch_flush_shadow_all(struct kvm *kvm)
6800 {
6801         kvm_mmu_zap_all(kvm);
6802         kvm_reload_remote_mmus(kvm);
6803 }
6804
6805 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
6806                                    struct kvm_memory_slot *slot)
6807 {
6808         kvm_arch_flush_shadow_all(kvm);
6809 }
6810
6811 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
6812 {
6813         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6814                 !vcpu->arch.apf.halted)
6815                 || !list_empty_careful(&vcpu->async_pf.done)
6816                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
6817                 || atomic_read(&vcpu->arch.nmi_queued) ||
6818                 (kvm_arch_interrupt_allowed(vcpu) &&
6819                  kvm_cpu_has_interrupt(vcpu));
6820 }
6821
6822 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
6823 {
6824         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
6825 }
6826
6827 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
6828 {
6829         return kvm_x86_ops->interrupt_allowed(vcpu);
6830 }
6831
6832 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
6833 {
6834         unsigned long current_rip = kvm_rip_read(vcpu) +
6835                 get_segment_base(vcpu, VCPU_SREG_CS);
6836
6837         return current_rip == linear_rip;
6838 }
6839 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
6840
6841 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
6842 {
6843         unsigned long rflags;
6844
6845         rflags = kvm_x86_ops->get_rflags(vcpu);
6846         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6847                 rflags &= ~X86_EFLAGS_TF;
6848         return rflags;
6849 }
6850 EXPORT_SYMBOL_GPL(kvm_get_rflags);
6851
6852 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
6853 {
6854         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
6855             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
6856                 rflags |= X86_EFLAGS_TF;
6857         kvm_x86_ops->set_rflags(vcpu, rflags);
6858         kvm_make_request(KVM_REQ_EVENT, vcpu);
6859 }
6860 EXPORT_SYMBOL_GPL(kvm_set_rflags);
6861
6862 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
6863 {
6864         int r;
6865
6866         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
6867               is_error_page(work->page))
6868                 return;
6869
6870         r = kvm_mmu_reload(vcpu);
6871         if (unlikely(r))
6872                 return;
6873
6874         if (!vcpu->arch.mmu.direct_map &&
6875               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
6876                 return;
6877
6878         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
6879 }
6880
6881 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
6882 {
6883         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
6884 }
6885
6886 static inline u32 kvm_async_pf_next_probe(u32 key)
6887 {
6888         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
6889 }
6890
6891 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6892 {
6893         u32 key = kvm_async_pf_hash_fn(gfn);
6894
6895         while (vcpu->arch.apf.gfns[key] != ~0)
6896                 key = kvm_async_pf_next_probe(key);
6897
6898         vcpu->arch.apf.gfns[key] = gfn;
6899 }
6900
6901 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
6902 {
6903         int i;
6904         u32 key = kvm_async_pf_hash_fn(gfn);
6905
6906         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
6907                      (vcpu->arch.apf.gfns[key] != gfn &&
6908                       vcpu->arch.apf.gfns[key] != ~0); i++)
6909                 key = kvm_async_pf_next_probe(key);
6910
6911         return key;
6912 }
6913
6914 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6915 {
6916         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
6917 }
6918
6919 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6920 {
6921         u32 i, j, k;
6922
6923         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
6924         while (true) {
6925                 vcpu->arch.apf.gfns[i] = ~0;
6926                 do {
6927                         j = kvm_async_pf_next_probe(j);
6928                         if (vcpu->arch.apf.gfns[j] == ~0)
6929                                 return;
6930                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
6931                         /*
6932                          * k lies cyclically in ]i,j]
6933                          * |    i.k.j |
6934                          * |....j i.k.| or  |.k..j i...|
6935                          */
6936                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
6937                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
6938                 i = j;
6939         }
6940 }
6941
6942 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
6943 {
6944
6945         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
6946                                       sizeof(val));
6947 }
6948
6949 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
6950                                      struct kvm_async_pf *work)
6951 {
6952         struct x86_exception fault;
6953
6954         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
6955         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
6956
6957         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
6958             (vcpu->arch.apf.send_user_only &&
6959              kvm_x86_ops->get_cpl(vcpu) == 0))
6960                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
6961         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
6962                 fault.vector = PF_VECTOR;
6963                 fault.error_code_valid = true;
6964                 fault.error_code = 0;
6965                 fault.nested_page_fault = false;
6966                 fault.address = work->arch.token;
6967                 kvm_inject_page_fault(vcpu, &fault);
6968         }
6969 }
6970
6971 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
6972                                  struct kvm_async_pf *work)
6973 {
6974         struct x86_exception fault;
6975
6976         trace_kvm_async_pf_ready(work->arch.token, work->gva);
6977         if (is_error_page(work->page))
6978                 work->arch.token = ~0; /* broadcast wakeup */
6979         else
6980                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
6981
6982         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
6983             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
6984                 fault.vector = PF_VECTOR;
6985                 fault.error_code_valid = true;
6986                 fault.error_code = 0;
6987                 fault.nested_page_fault = false;
6988                 fault.address = work->arch.token;
6989                 kvm_inject_page_fault(vcpu, &fault);
6990         }
6991         vcpu->arch.apf.halted = false;
6992         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6993 }
6994
6995 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
6996 {
6997         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
6998                 return true;
6999         else
7000                 return !kvm_event_needs_reinjection(vcpu) &&
7001                         kvm_x86_ops->interrupt_allowed(vcpu);
7002 }
7003
7004 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
7005 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
7006 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
7007 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
7008 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
7009 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
7010 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
7011 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
7012 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
7013 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
7014 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
7015 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);