arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "pmu.h"
  31 #include "hyperv.h"
  32
  33 #include <linux/clocksource.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/kvm.h>
  36 #include <linux/fs.h>
  37 #include <linux/vmalloc.h>
  38 #include <linux/export.h>
  39 #include <linux/moduleparam.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <linux/kvm_irqfd.h>
  55 #include <linux/irqbypass.h>
  56 #include <linux/sched/stat.h>
  57 #include <linux/mem_encrypt.h>
  58
  59 #include <trace/events/kvm.h>
  60
  61 #include <asm/debugreg.h>
  62 #include <asm/msr.h>
  63 #include <asm/desc.h>
  64 #include <asm/mce.h>
  65 #include <linux/kernel_stat.h>
  66 #include <asm/fpu/internal.h> /* Ugh! */
  67 #include <asm/pvclock.h>
  68 #include <asm/div64.h>
  69 #include <asm/irq_remapping.h>
  70 #include <asm/mshyperv.h>
  71 #include <asm/hypervisor.h>
  72
  73 #define CREATE_TRACE_POINTS
  74 #include "trace.h"
  75
  76 #define MAX_IO_MSRS 256
  77 #define KVM_MAX_MCE_BANKS 32
  78 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  79 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  80
  81 #define emul_to_vcpu(ctxt) \
  82         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  83
  84 /* EFER defaults:
  85  * - enable syscall per default because its emulated by KVM
  86  * - enable LME and LMA per default on 64 bit KVM
  87  */
  88 #ifdef CONFIG_X86_64
  89 static
  90 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  91 #else
  92 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  93 #endif
  94
  95 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  96 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  97
  98 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
  99                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 100
 101 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 102 static void process_nmi(struct kvm_vcpu *vcpu);
 103 static void enter_smm(struct kvm_vcpu *vcpu);
 104 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 105 static void store_regs(struct kvm_vcpu *vcpu);
 106 static int sync_regs(struct kvm_vcpu *vcpu);
 107
 108 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
 109 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 110
 111 static bool __read_mostly ignore_msrs = 0;
 112 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 113
 114 static bool __read_mostly report_ignored_msrs = true;
 115 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 116
 117 unsigned int min_timer_period_us = 200;
 118 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 119
 120 static bool __read_mostly kvmclock_periodic_sync = true;
 121 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 122
 123 bool __read_mostly kvm_has_tsc_control;
 124 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 125 u32  __read_mostly kvm_max_guest_tsc_khz;
 126 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 127 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 128 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 129 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 130 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 131 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 132 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 133
 134 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 135 static u32 __read_mostly tsc_tolerance_ppm = 250;
 136 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 137
 138 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
 139 unsigned int __read_mostly lapic_timer_advance_ns = 1000;
 140 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
 141 EXPORT_SYMBOL_GPL(lapic_timer_advance_ns);
 142
 143 static bool __read_mostly vector_hashing = true;
 144 module_param(vector_hashing, bool, S_IRUGO);
 145
 146 bool __read_mostly enable_vmware_backdoor = false;
 147 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 148 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 149
 150 static bool __read_mostly force_emulation_prefix = false;
 151 module_param(force_emulation_prefix, bool, S_IRUGO);
 152
 153 #define KVM_NR_SHARED_MSRS 16
 154
 155 struct kvm_shared_msrs_global {
 156         int nr;
 157         u32 msrs[KVM_NR_SHARED_MSRS];
 158 };
 159
 160 struct kvm_shared_msrs {
 161         struct user_return_notifier urn;
 162         bool registered;
 163         struct kvm_shared_msr_values {
 164                 u64 host;
 165                 u64 curr;
 166         } values[KVM_NR_SHARED_MSRS];
 167 };
 168
 169 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 170 static struct kvm_shared_msrs __percpu *shared_msrs;
 171
 172 struct kvm_stats_debugfs_item debugfs_entries[] = {
 173         { "pf_fixed", VCPU_STAT(pf_fixed) },
 174         { "pf_guest", VCPU_STAT(pf_guest) },
 175         { "tlb_flush", VCPU_STAT(tlb_flush) },
 176         { "invlpg", VCPU_STAT(invlpg) },
 177         { "exits", VCPU_STAT(exits) },
 178         { "io_exits", VCPU_STAT(io_exits) },
 179         { "mmio_exits", VCPU_STAT(mmio_exits) },
 180         { "signal_exits", VCPU_STAT(signal_exits) },
 181         { "irq_window", VCPU_STAT(irq_window_exits) },
 182         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 183         { "halt_exits", VCPU_STAT(halt_exits) },
 184         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 185         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 186         { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
 187         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 188         { "hypercalls", VCPU_STAT(hypercalls) },
 189         { "request_irq", VCPU_STAT(request_irq_exits) },
 190         { "irq_exits", VCPU_STAT(irq_exits) },
 191         { "host_state_reload", VCPU_STAT(host_state_reload) },
 192         { "fpu_reload", VCPU_STAT(fpu_reload) },
 193         { "insn_emulation", VCPU_STAT(insn_emulation) },
 194         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 195         { "irq_injections", VCPU_STAT(irq_injections) },
 196         { "nmi_injections", VCPU_STAT(nmi_injections) },
 197         { "req_event", VCPU_STAT(req_event) },
 198         { "l1d_flush", VCPU_STAT(l1d_flush) },
 199         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 200         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 201         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 202         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 203         { "mmu_flooded", VM_STAT(mmu_flooded) },
 204         { "mmu_recycled", VM_STAT(mmu_recycled) },
 205         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 206         { "mmu_unsync", VM_STAT(mmu_unsync) },
 207         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 208         { "largepages", VM_STAT(lpages) },
 209         { "max_mmu_page_hash_collisions",
 210                 VM_STAT(max_mmu_page_hash_collisions) },
 211         { NULL }
 212 };
 213
 214 u64 __read_mostly host_xcr0;
 215
 216 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 217
 218 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 219 {
 220         int i;
 221         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 222                 vcpu->arch.apf.gfns[i] = ~0;
 223 }
 224
 225 static void kvm_on_user_return(struct user_return_notifier *urn)
 226 {
 227         unsigned slot;
 228         struct kvm_shared_msrs *locals
 229                 = container_of(urn, struct kvm_shared_msrs, urn);
 230         struct kvm_shared_msr_values *values;
 231         unsigned long flags;
 232
 233         /*
 234          * Disabling irqs at this point since the following code could be
 235          * interrupted and executed through kvm_arch_hardware_disable()
 236          */
 237         local_irq_save(flags);
 238         if (locals->registered) {
 239                 locals->registered = false;
 240                 user_return_notifier_unregister(urn);
 241         }
 242         local_irq_restore(flags);
 243         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 244                 values = &locals->values[slot];
 245                 if (values->host != values->curr) {
 246                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 247                         values->curr = values->host;
 248                 }
 249         }
 250 }
 251
 252 static void shared_msr_update(unsigned slot, u32 msr)
 253 {
 254         u64 value;
 255         unsigned int cpu = smp_processor_id();
 256         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 257
 258         /* only read, and nobody should modify it at this time,
 259          * so don't need lock */
 260         if (slot >= shared_msrs_global.nr) {
 261                 printk(KERN_ERR "kvm: invalid MSR slot!");
 262                 return;
 263         }
 264         rdmsrl_safe(msr, &value);
 265         smsr->values[slot].host = value;
 266         smsr->values[slot].curr = value;
 267 }
 268
 269 void kvm_define_shared_msr(unsigned slot, u32 msr)
 270 {
 271         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 272         shared_msrs_global.msrs[slot] = msr;
 273         if (slot >= shared_msrs_global.nr)
 274                 shared_msrs_global.nr = slot + 1;
 275 }
 276 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 277
 278 static void kvm_shared_msr_cpu_online(void)
 279 {
 280         unsigned i;
 281
 282         for (i = 0; i < shared_msrs_global.nr; ++i)
 283                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 284 }
 285
 286 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 287 {
 288         unsigned int cpu = smp_processor_id();
 289         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 290         int err;
 291
 292         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 293                 return 0;
 294         smsr->values[slot].curr = value;
 295         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 296         if (err)
 297                 return 1;
 298
 299         if (!smsr->registered) {
 300                 smsr->urn.on_user_return = kvm_on_user_return;
 301                 user_return_notifier_register(&smsr->urn);
 302                 smsr->registered = true;
 303         }
 304         return 0;
 305 }
 306 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 307
 308 static void drop_user_return_notifiers(void)
 309 {
 310         unsigned int cpu = smp_processor_id();
 311         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 312
 313         if (smsr->registered)
 314                 kvm_on_user_return(&smsr->urn);
 315 }
 316
 317 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 318 {
 319         return vcpu->arch.apic_base;
 320 }
 321 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 322
 323 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 324 {
 325         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 326 }
 327 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 328
 329 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 330 {
 331         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 332         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 333         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) | 0x2ff |
 334                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 335
 336         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 337                 return 1;
 338         if (!msr_info->host_initiated) {
 339                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 340                         return 1;
 341                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 342                         return 1;
 343         }
 344
 345         kvm_lapic_set_base(vcpu, msr_info->data);
 346         return 0;
 347 }
 348 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 349
 350 asmlinkage __visible void kvm_spurious_fault(void)
 351 {
 352         /* Fault while not rebooting.  We want the trace. */
 353         BUG();
 354 }
 355 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 356
 357 #define EXCPT_BENIGN            0
 358 #define EXCPT_CONTRIBUTORY      1
 359 #define EXCPT_PF                2
 360
 361 static int exception_class(int vector)
 362 {
 363         switch (vector) {
 364         case PF_VECTOR:
 365                 return EXCPT_PF;
 366         case DE_VECTOR:
 367         case TS_VECTOR:
 368         case NP_VECTOR:
 369         case SS_VECTOR:
 370         case GP_VECTOR:
 371                 return EXCPT_CONTRIBUTORY;
 372         default:
 373                 break;
 374         }
 375         return EXCPT_BENIGN;
 376 }
 377
 378 #define EXCPT_FAULT             0
 379 #define EXCPT_TRAP              1
 380 #define EXCPT_ABORT             2
 381 #define EXCPT_INTERRUPT         3
 382
 383 static int exception_type(int vector)
 384 {
 385         unsigned int mask;
 386
 387         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 388                 return EXCPT_INTERRUPT;
 389
 390         mask = 1 << vector;
 391
 392         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 393         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 394                 return EXCPT_TRAP;
 395
 396         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 397                 return EXCPT_ABORT;
 398
 399         /* Reserved exceptions will result in fault */
 400         return EXCPT_FAULT;
 401 }
 402
 403 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 404 {
 405         unsigned nr = vcpu->arch.exception.nr;
 406         bool has_payload = vcpu->arch.exception.has_payload;
 407         unsigned long payload = vcpu->arch.exception.payload;
 408
 409         if (!has_payload)
 410                 return;
 411
 412         switch (nr) {
 413         case DB_VECTOR:
 414                 /*
 415                  * "Certain debug exceptions may clear bit 0-3.  The
 416                  * remaining contents of the DR6 register are never
 417                  * cleared by the processor".
 418                  */
 419                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 420                 /*
 421                  * DR6.RTM is set by all #DB exceptions that don't clear it.
 422                  */
 423                 vcpu->arch.dr6 |= DR6_RTM;
 424                 vcpu->arch.dr6 |= payload;
 425                 /*
 426                  * Bit 16 should be set in the payload whenever the #DB
 427                  * exception should clear DR6.RTM. This makes the payload
 428                  * compatible with the pending debug exceptions under VMX.
 429                  * Though not currently documented in the SDM, this also
 430                  * makes the payload compatible with the exit qualification
 431                  * for #DB exceptions under VMX.
 432                  */
 433                 vcpu->arch.dr6 ^= payload & DR6_RTM;
 434                 break;
 435         case PF_VECTOR:
 436                 vcpu->arch.cr2 = payload;
 437                 break;
 438         }
 439
 440         vcpu->arch.exception.has_payload = false;
 441         vcpu->arch.exception.payload = 0;
 442 }
 443 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 444
 445 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 446                 unsigned nr, bool has_error, u32 error_code,
 447                 bool has_payload, unsigned long payload, bool reinject)
 448 {
 449         u32 prev_nr;
 450         int class1, class2;
 451
 452         kvm_make_request(KVM_REQ_EVENT, vcpu);
 453
 454         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 455         queue:
 456                 if (has_error && !is_protmode(vcpu))
 457                         has_error = false;
 458                 if (reinject) {
 459                         /*
 460                          * On vmentry, vcpu->arch.exception.pending is only
 461                          * true if an event injection was blocked by
 462                          * nested_run_pending.  In that case, however,
 463                          * vcpu_enter_guest requests an immediate exit,
 464                          * and the guest shouldn't proceed far enough to
 465                          * need reinjection.
 466                          */
 467                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 468                         vcpu->arch.exception.injected = true;
 469                         if (WARN_ON_ONCE(has_payload)) {
 470                                 /*
 471                                  * A reinjected event has already
 472                                  * delivered its payload.
 473                                  */
 474                                 has_payload = false;
 475                                 payload = 0;
 476                         }
 477                 } else {
 478                         vcpu->arch.exception.pending = true;
 479                         vcpu->arch.exception.injected = false;
 480                 }
 481                 vcpu->arch.exception.has_error_code = has_error;
 482                 vcpu->arch.exception.nr = nr;
 483                 vcpu->arch.exception.error_code = error_code;
 484                 vcpu->arch.exception.has_payload = has_payload;
 485                 vcpu->arch.exception.payload = payload;
 486                 /*
 487                  * In guest mode, payload delivery should be deferred,
 488                  * so that the L1 hypervisor can intercept #PF before
 489                  * CR2 is modified (or intercept #DB before DR6 is
 490                  * modified under nVMX).  However, for ABI
 491                  * compatibility with KVM_GET_VCPU_EVENTS and
 492                  * KVM_SET_VCPU_EVENTS, we can't delay payload
 493                  * delivery unless userspace has enabled this
 494                  * functionality via the per-VM capability,
 495                  * KVM_CAP_EXCEPTION_PAYLOAD.
 496                  */
 497                 if (!vcpu->kvm->arch.exception_payload_enabled ||
 498                     !is_guest_mode(vcpu))
 499                         kvm_deliver_exception_payload(vcpu);
 500                 return;
 501         }
 502
 503         /* to check exception */
 504         prev_nr = vcpu->arch.exception.nr;
 505         if (prev_nr == DF_VECTOR) {
 506                 /* triple fault -> shutdown */
 507                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 508                 return;
 509         }
 510         class1 = exception_class(prev_nr);
 511         class2 = exception_class(nr);
 512         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 513                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 514                 /*
 515                  * Generate double fault per SDM Table 5-5.  Set
 516                  * exception.pending = true so that the double fault
 517                  * can trigger a nested vmexit.
 518                  */
 519                 vcpu->arch.exception.pending = true;
 520                 vcpu->arch.exception.injected = false;
 521                 vcpu->arch.exception.has_error_code = true;
 522                 vcpu->arch.exception.nr = DF_VECTOR;
 523                 vcpu->arch.exception.error_code = 0;
 524                 vcpu->arch.exception.has_payload = false;
 525                 vcpu->arch.exception.payload = 0;
 526         } else
 527                 /* replace previous exception with a new one in a hope
 528                    that instruction re-execution will regenerate lost
 529                    exception */
 530                 goto queue;
 531 }
 532
 533 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 534 {
 535         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 536 }
 537 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 538
 539 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 540 {
 541         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 542 }
 543 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 544
 545 static void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 546                                   unsigned long payload)
 547 {
 548         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 549 }
 550
 551 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 552                                     u32 error_code, unsigned long payload)
 553 {
 554         kvm_multiple_exception(vcpu, nr, true, error_code,
 555                                true, payload, false);
 556 }
 557
 558 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 559 {
 560         if (err)
 561                 kvm_inject_gp(vcpu, 0);
 562         else
 563                 return kvm_skip_emulated_instruction(vcpu);
 564
 565         return 1;
 566 }
 567 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 568
 569 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 570 {
 571         ++vcpu->stat.pf_guest;
 572         vcpu->arch.exception.nested_apf =
 573                 is_guest_mode(vcpu) && fault->async_page_fault;
 574         if (vcpu->arch.exception.nested_apf) {
 575                 vcpu->arch.apf.nested_apf_token = fault->address;
 576                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 577         } else {
 578                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 579                                         fault->address);
 580         }
 581 }
 582 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 583
 584 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 585 {
 586         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 587                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 588         else
 589                 vcpu->arch.mmu->inject_page_fault(vcpu, fault);
 590
 591         return fault->nested_page_fault;
 592 }
 593
 594 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 595 {
 596         atomic_inc(&vcpu->arch.nmi_queued);
 597         kvm_make_request(KVM_REQ_NMI, vcpu);
 598 }
 599 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 600
 601 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 602 {
 603         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 604 }
 605 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 606
 607 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 608 {
 609         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 610 }
 611 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 612
 613 /*
 614  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 615  * a #GP and return false.
 616  */
 617 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 618 {
 619         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 620                 return true;
 621         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 622         return false;
 623 }
 624 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 625
 626 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 627 {
 628         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 629                 return true;
 630
 631         kvm_queue_exception(vcpu, UD_VECTOR);
 632         return false;
 633 }
 634 EXPORT_SYMBOL_GPL(kvm_require_dr);
 635
 636 /*
 637  * This function will be used to read from the physical memory of the currently
 638  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 639  * can read from guest physical or from the guest's guest physical memory.
 640  */
 641 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 642                             gfn_t ngfn, void *data, int offset, int len,
 643                             u32 access)
 644 {
 645         struct x86_exception exception;
 646         gfn_t real_gfn;
 647         gpa_t ngpa;
 648
 649         ngpa     = gfn_to_gpa(ngfn);
 650         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 651         if (real_gfn == UNMAPPED_GVA)
 652                 return -EFAULT;
 653
 654         real_gfn = gpa_to_gfn(real_gfn);
 655
 656         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 657 }
 658 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 659
 660 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 661                                void *data, int offset, int len, u32 access)
 662 {
 663         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 664                                        data, offset, len, access);
 665 }
 666
 667 /*
 668  * Load the pae pdptrs.  Return true is they are all valid.
 669  */
 670 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 671 {
 672         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 673         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 674         int i;
 675         int ret;
 676         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 677
 678         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 679                                       offset * sizeof(u64), sizeof(pdpte),
 680                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 681         if (ret < 0) {
 682                 ret = 0;
 683                 goto out;
 684         }
 685         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 686                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 687                     (pdpte[i] &
 688                      vcpu->arch.mmu->guest_rsvd_check.rsvd_bits_mask[0][2])) {
 689                         ret = 0;
 690                         goto out;
 691                 }
 692         }
 693         ret = 1;
 694
 695         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 696         __set_bit(VCPU_EXREG_PDPTR,
 697                   (unsigned long *)&vcpu->arch.regs_avail);
 698         __set_bit(VCPU_EXREG_PDPTR,
 699                   (unsigned long *)&vcpu->arch.regs_dirty);
 700 out:
 701
 702         return ret;
 703 }
 704 EXPORT_SYMBOL_GPL(load_pdptrs);
 705
 706 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 707 {
 708         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 709         bool changed = true;
 710         int offset;
 711         gfn_t gfn;
 712         int r;
 713
 714         if (is_long_mode(vcpu) || !is_pae(vcpu) || !is_paging(vcpu))
 715                 return false;
 716
 717         if (!test_bit(VCPU_EXREG_PDPTR,
 718                       (unsigned long *)&vcpu->arch.regs_avail))
 719                 return true;
 720
 721         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 722         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 723         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 724                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 725         if (r < 0)
 726                 goto out;
 727         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 728 out:
 729
 730         return changed;
 731 }
 732 EXPORT_SYMBOL_GPL(pdptrs_changed);
 733
 734 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 735 {
 736         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 737         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 738
 739         cr0 |= X86_CR0_ET;
 740
 741 #ifdef CONFIG_X86_64
 742         if (cr0 & 0xffffffff00000000UL)
 743                 return 1;
 744 #endif
 745
 746         cr0 &= ~CR0_RESERVED_BITS;
 747
 748         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 749                 return 1;
 750
 751         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 752                 return 1;
 753
 754         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 755 #ifdef CONFIG_X86_64
 756                 if ((vcpu->arch.efer & EFER_LME)) {
 757                         int cs_db, cs_l;
 758
 759                         if (!is_pae(vcpu))
 760                                 return 1;
 761                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 762                         if (cs_l)
 763                                 return 1;
 764                 } else
 765 #endif
 766                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 767                                                  kvm_read_cr3(vcpu)))
 768                         return 1;
 769         }
 770
 771         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 772                 return 1;
 773
 774         kvm_x86_ops->set_cr0(vcpu, cr0);
 775
 776         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 777                 kvm_clear_async_pf_completion_queue(vcpu);
 778                 kvm_async_pf_hash_reset(vcpu);
 779         }
 780
 781         if ((cr0 ^ old_cr0) & update_bits)
 782                 kvm_mmu_reset_context(vcpu);
 783
 784         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 785             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 786             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 787                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 788
 789         return 0;
 790 }
 791 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 792
 793 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 794 {
 795         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 796 }
 797 EXPORT_SYMBOL_GPL(kvm_lmsw);
 798
 799 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 800 {
 801         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 802                         !vcpu->guest_xcr0_loaded) {
 803                 /* kvm_set_xcr() also depends on this */
 804                 if (vcpu->arch.xcr0 != host_xcr0)
 805                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 806                 vcpu->guest_xcr0_loaded = 1;
 807         }
 808 }
 809
 810 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 811 {
 812         if (vcpu->guest_xcr0_loaded) {
 813                 if (vcpu->arch.xcr0 != host_xcr0)
 814                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 815                 vcpu->guest_xcr0_loaded = 0;
 816         }
 817 }
 818
 819 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 820 {
 821         u64 xcr0 = xcr;
 822         u64 old_xcr0 = vcpu->arch.xcr0;
 823         u64 valid_bits;
 824
 825         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 826         if (index != XCR_XFEATURE_ENABLED_MASK)
 827                 return 1;
 828         if (!(xcr0 & XFEATURE_MASK_FP))
 829                 return 1;
 830         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 831                 return 1;
 832
 833         /*
 834          * Do not allow the guest to set bits that we do not support
 835          * saving.  However, xcr0 bit 0 is always set, even if the
 836          * emulated CPU does not support XSAVE (see fx_init).
 837          */
 838         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 839         if (xcr0 & ~valid_bits)
 840                 return 1;
 841
 842         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 843             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 844                 return 1;
 845
 846         if (xcr0 & XFEATURE_MASK_AVX512) {
 847                 if (!(xcr0 & XFEATURE_MASK_YMM))
 848                         return 1;
 849                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 850                         return 1;
 851         }
 852         vcpu->arch.xcr0 = xcr0;
 853
 854         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 855                 kvm_update_cpuid(vcpu);
 856         return 0;
 857 }
 858
 859 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 860 {
 861         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 862             __kvm_set_xcr(vcpu, index, xcr)) {
 863                 kvm_inject_gp(vcpu, 0);
 864                 return 1;
 865         }
 866         return 0;
 867 }
 868 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 869
 870 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 871 {
 872         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 873         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 874                                    X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
 875
 876         if (cr4 & CR4_RESERVED_BITS)
 877                 return 1;
 878
 879         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) && (cr4 & X86_CR4_OSXSAVE))
 880                 return 1;
 881
 882         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMEP) && (cr4 & X86_CR4_SMEP))
 883                 return 1;
 884
 885         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMAP) && (cr4 & X86_CR4_SMAP))
 886                 return 1;
 887
 888         if (!guest_cpuid_has(vcpu, X86_FEATURE_FSGSBASE) && (cr4 & X86_CR4_FSGSBASE))
 889                 return 1;
 890
 891         if (!guest_cpuid_has(vcpu, X86_FEATURE_PKU) && (cr4 & X86_CR4_PKE))
 892                 return 1;
 893
 894         if (!guest_cpuid_has(vcpu, X86_FEATURE_LA57) && (cr4 & X86_CR4_LA57))
 895                 return 1;
 896
 897         if (!guest_cpuid_has(vcpu, X86_FEATURE_UMIP) && (cr4 & X86_CR4_UMIP))
 898                 return 1;
 899
 900         if (is_long_mode(vcpu)) {
 901                 if (!(cr4 & X86_CR4_PAE))
 902                         return 1;
 903         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 904                    && ((cr4 ^ old_cr4) & pdptr_bits)
 905                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 906                                    kvm_read_cr3(vcpu)))
 907                 return 1;
 908
 909         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 910                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
 911                         return 1;
 912
 913                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 914                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 915                         return 1;
 916         }
 917
 918         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 919                 return 1;
 920
 921         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 922             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 923                 kvm_mmu_reset_context(vcpu);
 924
 925         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
 926                 kvm_update_cpuid(vcpu);
 927
 928         return 0;
 929 }
 930 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 931
 932 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 933 {
 934         bool skip_tlb_flush = false;
 935 #ifdef CONFIG_X86_64
 936         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
 937
 938         if (pcid_enabled) {
 939                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
 940                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
 941         }
 942 #endif
 943
 944         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 945                 if (!skip_tlb_flush) {
 946                         kvm_mmu_sync_roots(vcpu);
 947                         kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 948                 }
 949                 return 0;
 950         }
 951
 952         if (is_long_mode(vcpu) &&
 953             (cr3 & rsvd_bits(cpuid_maxphyaddr(vcpu), 63)))
 954                 return 1;
 955         else if (is_pae(vcpu) && is_paging(vcpu) &&
 956                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 957                 return 1;
 958
 959         kvm_mmu_new_cr3(vcpu, cr3, skip_tlb_flush);
 960         vcpu->arch.cr3 = cr3;
 961         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 962
 963         return 0;
 964 }
 965 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 966
 967 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 968 {
 969         if (cr8 & CR8_RESERVED_BITS)
 970                 return 1;
 971         if (lapic_in_kernel(vcpu))
 972                 kvm_lapic_set_tpr(vcpu, cr8);
 973         else
 974                 vcpu->arch.cr8 = cr8;
 975         return 0;
 976 }
 977 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 978
 979 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 980 {
 981         if (lapic_in_kernel(vcpu))
 982                 return kvm_lapic_get_cr8(vcpu);
 983         else
 984                 return vcpu->arch.cr8;
 985 }
 986 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 987
 988 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 989 {
 990         int i;
 991
 992         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 993                 for (i = 0; i < KVM_NR_DB_REGS; i++)
 994                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
 995                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
 996         }
 997 }
 998
 999 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
1000 {
1001         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1002                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
1003 }
1004
1005 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
1006 {
1007         unsigned long dr7;
1008
1009         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1010                 dr7 = vcpu->arch.guest_debug_dr7;
1011         else
1012                 dr7 = vcpu->arch.dr7;
1013         kvm_x86_ops->set_dr7(vcpu, dr7);
1014         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1015         if (dr7 & DR7_BP_EN_MASK)
1016                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1017 }
1018
1019 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1020 {
1021         u64 fixed = DR6_FIXED_1;
1022
1023         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1024                 fixed |= DR6_RTM;
1025         return fixed;
1026 }
1027
1028 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1029 {
1030         switch (dr) {
1031         case 0 ... 3:
1032                 vcpu->arch.db[dr] = val;
1033                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1034                         vcpu->arch.eff_db[dr] = val;
1035                 break;
1036         case 4:
1037                 /* fall through */
1038         case 6:
1039                 if (val & 0xffffffff00000000ULL)
1040                         return -1; /* #GP */
1041                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1042                 kvm_update_dr6(vcpu);
1043                 break;
1044         case 5:
1045                 /* fall through */
1046         default: /* 7 */
1047                 if (val & 0xffffffff00000000ULL)
1048                         return -1; /* #GP */
1049                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1050                 kvm_update_dr7(vcpu);
1051                 break;
1052         }
1053
1054         return 0;
1055 }
1056
1057 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1058 {
1059         if (__kvm_set_dr(vcpu, dr, val)) {
1060                 kvm_inject_gp(vcpu, 0);
1061                 return 1;
1062         }
1063         return 0;
1064 }
1065 EXPORT_SYMBOL_GPL(kvm_set_dr);
1066
1067 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1068 {
1069         switch (dr) {
1070         case 0 ... 3:
1071                 *val = vcpu->arch.db[dr];
1072                 break;
1073         case 4:
1074                 /* fall through */
1075         case 6:
1076                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1077                         *val = vcpu->arch.dr6;
1078                 else
1079                         *val = kvm_x86_ops->get_dr6(vcpu);
1080                 break;
1081         case 5:
1082                 /* fall through */
1083         default: /* 7 */
1084                 *val = vcpu->arch.dr7;
1085                 break;
1086         }
1087         return 0;
1088 }
1089 EXPORT_SYMBOL_GPL(kvm_get_dr);
1090
1091 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
1092 {
1093         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
1094         u64 data;
1095         int err;
1096
1097         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
1098         if (err)
1099                 return err;
1100         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
1101         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
1102         return err;
1103 }
1104 EXPORT_SYMBOL_GPL(kvm_rdpmc);
1105
1106 /*
1107  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1108  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1109  *
1110  * This list is modified at module load time to reflect the
1111  * capabilities of the host cpu. This capabilities test skips MSRs that are
1112  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
1113  * may depend on host virtualization features rather than host cpu features.
1114  */
1115
1116 static u32 msrs_to_save[] = {
1117         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1118         MSR_STAR,
1119 #ifdef CONFIG_X86_64
1120         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1121 #endif
1122         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1123         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1124         MSR_IA32_SPEC_CTRL, MSR_IA32_ARCH_CAPABILITIES
1125 };
1126
1127 static unsigned num_msrs_to_save;
1128
1129 static u32 emulated_msrs[] = {
1130         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1131         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1132         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1133         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1134         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1135         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1136         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1137         HV_X64_MSR_RESET,
1138         HV_X64_MSR_VP_INDEX,
1139         HV_X64_MSR_VP_RUNTIME,
1140         HV_X64_MSR_SCONTROL,
1141         HV_X64_MSR_STIMER0_CONFIG,
1142         HV_X64_MSR_VP_ASSIST_PAGE,
1143         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1144         HV_X64_MSR_TSC_EMULATION_STATUS,
1145
1146         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1147         MSR_KVM_PV_EOI_EN,
1148
1149         MSR_IA32_TSC_ADJUST,
1150         MSR_IA32_TSCDEADLINE,
1151         MSR_IA32_MISC_ENABLE,
1152         MSR_IA32_MCG_STATUS,
1153         MSR_IA32_MCG_CTL,
1154         MSR_IA32_MCG_EXT_CTL,
1155         MSR_IA32_SMBASE,
1156         MSR_SMI_COUNT,
1157         MSR_PLATFORM_INFO,
1158         MSR_MISC_FEATURES_ENABLES,
1159         MSR_AMD64_VIRT_SPEC_CTRL,
1160 };
1161
1162 static unsigned num_emulated_msrs;
1163
1164 /*
1165  * List of msr numbers which are used to expose MSR-based features that
1166  * can be used by a hypervisor to validate requested CPU features.
1167  */
1168 static u32 msr_based_features[] = {
1169         MSR_IA32_VMX_BASIC,
1170         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1171         MSR_IA32_VMX_PINBASED_CTLS,
1172         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1173         MSR_IA32_VMX_PROCBASED_CTLS,
1174         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1175         MSR_IA32_VMX_EXIT_CTLS,
1176         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1177         MSR_IA32_VMX_ENTRY_CTLS,
1178         MSR_IA32_VMX_MISC,
1179         MSR_IA32_VMX_CR0_FIXED0,
1180         MSR_IA32_VMX_CR0_FIXED1,
1181         MSR_IA32_VMX_CR4_FIXED0,
1182         MSR_IA32_VMX_CR4_FIXED1,
1183         MSR_IA32_VMX_VMCS_ENUM,
1184         MSR_IA32_VMX_PROCBASED_CTLS2,
1185         MSR_IA32_VMX_EPT_VPID_CAP,
1186         MSR_IA32_VMX_VMFUNC,
1187
1188         MSR_F10H_DECFG,
1189         MSR_IA32_UCODE_REV,
1190         MSR_IA32_ARCH_CAPABILITIES,
1191 };
1192
1193 static unsigned int num_msr_based_features;
1194
1195 u64 kvm_get_arch_capabilities(void)
1196 {
1197         u64 data;
1198
1199         rdmsrl_safe(MSR_IA32_ARCH_CAPABILITIES, &data);
1200
1201         /*
1202          * If we're doing cache flushes (either "always" or "cond")
1203          * we will do one whenever the guest does a vmlaunch/vmresume.
1204          * If an outer hypervisor is doing the cache flush for us
1205          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1206          * capability to the guest too, and if EPT is disabled we're not
1207          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1208          * require a nested hypervisor to do a flush of its own.
1209          */
1210         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1211                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1212
1213         return data;
1214 }
1215 EXPORT_SYMBOL_GPL(kvm_get_arch_capabilities);
1216
1217 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1218 {
1219         switch (msr->index) {
1220         case MSR_IA32_ARCH_CAPABILITIES:
1221                 msr->data = kvm_get_arch_capabilities();
1222                 break;
1223         case MSR_IA32_UCODE_REV:
1224                 rdmsrl_safe(msr->index, &msr->data);
1225                 break;
1226         default:
1227                 if (kvm_x86_ops->get_msr_feature(msr))
1228                         return 1;
1229         }
1230         return 0;
1231 }
1232
1233 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1234 {
1235         struct kvm_msr_entry msr;
1236         int r;
1237
1238         msr.index = index;
1239         r = kvm_get_msr_feature(&msr);
1240         if (r)
1241                 return r;
1242
1243         *data = msr.data;
1244
1245         return 0;
1246 }
1247
1248 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1249 {
1250         if (efer & efer_reserved_bits)
1251                 return false;
1252
1253         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1254                         return false;
1255
1256         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1257                         return false;
1258
1259         return true;
1260 }
1261 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1262
1263 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
1264 {
1265         u64 old_efer = vcpu->arch.efer;
1266
1267         if (!kvm_valid_efer(vcpu, efer))
1268                 return 1;
1269
1270         if (is_paging(vcpu)
1271             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1272                 return 1;
1273
1274         efer &= ~EFER_LMA;
1275         efer |= vcpu->arch.efer & EFER_LMA;
1276
1277         kvm_x86_ops->set_efer(vcpu, efer);
1278
1279         /* Update reserved bits */
1280         if ((efer ^ old_efer) & EFER_NX)
1281                 kvm_mmu_reset_context(vcpu);
1282
1283         return 0;
1284 }
1285
1286 void kvm_enable_efer_bits(u64 mask)
1287 {
1288        efer_reserved_bits &= ~mask;
1289 }
1290 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1291
1292 /*
1293  * Writes msr value into into the appropriate "register".
1294  * Returns 0 on success, non-0 otherwise.
1295  * Assumes vcpu_load() was already called.
1296  */
1297 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1298 {
1299         switch (msr->index) {
1300         case MSR_FS_BASE:
1301         case MSR_GS_BASE:
1302         case MSR_KERNEL_GS_BASE:
1303         case MSR_CSTAR:
1304         case MSR_LSTAR:
1305                 if (is_noncanonical_address(msr->data, vcpu))
1306                         return 1;
1307                 break;
1308         case MSR_IA32_SYSENTER_EIP:
1309         case MSR_IA32_SYSENTER_ESP:
1310                 /*
1311                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1312                  * non-canonical address is written on Intel but not on
1313                  * AMD (which ignores the top 32-bits, because it does
1314                  * not implement 64-bit SYSENTER).
1315                  *
1316                  * 64-bit code should hence be able to write a non-canonical
1317                  * value on AMD.  Making the address canonical ensures that
1318                  * vmentry does not fail on Intel after writing a non-canonical
1319                  * value, and that something deterministic happens if the guest
1320                  * invokes 64-bit SYSENTER.
1321                  */
1322                 msr->data = get_canonical(msr->data, vcpu_virt_addr_bits(vcpu));
1323         }
1324         return kvm_x86_ops->set_msr(vcpu, msr);
1325 }
1326 EXPORT_SYMBOL_GPL(kvm_set_msr);
1327
1328 /*
1329  * Adapt set_msr() to msr_io()'s calling convention
1330  */
1331 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1332 {
1333         struct msr_data msr;
1334         int r;
1335
1336         msr.index = index;
1337         msr.host_initiated = true;
1338         r = kvm_get_msr(vcpu, &msr);
1339         if (r)
1340                 return r;
1341
1342         *data = msr.data;
1343         return 0;
1344 }
1345
1346 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1347 {
1348         struct msr_data msr;
1349
1350         msr.data = *data;
1351         msr.index = index;
1352         msr.host_initiated = true;
1353         return kvm_set_msr(vcpu, &msr);
1354 }
1355
1356 #ifdef CONFIG_X86_64
1357 struct pvclock_gtod_data {
1358         seqcount_t      seq;
1359
1360         struct { /* extract of a clocksource struct */
1361                 int vclock_mode;
1362                 u64     cycle_last;
1363                 u64     mask;
1364                 u32     mult;
1365                 u32     shift;
1366         } clock;
1367
1368         u64             boot_ns;
1369         u64             nsec_base;
1370         u64             wall_time_sec;
1371 };
1372
1373 static struct pvclock_gtod_data pvclock_gtod_data;
1374
1375 static void update_pvclock_gtod(struct timekeeper *tk)
1376 {
1377         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1378         u64 boot_ns;
1379
1380         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1381
1382         write_seqcount_begin(&vdata->seq);
1383
1384         /* copy pvclock gtod data */
1385         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1386         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1387         vdata->clock.mask               = tk->tkr_mono.mask;
1388         vdata->clock.mult               = tk->tkr_mono.mult;
1389         vdata->clock.shift              = tk->tkr_mono.shift;
1390
1391         vdata->boot_ns                  = boot_ns;
1392         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1393
1394         vdata->wall_time_sec            = tk->xtime_sec;
1395
1396         write_seqcount_end(&vdata->seq);
1397 }
1398 #endif
1399
1400 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1401 {
1402         /*
1403          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1404          * vcpu_enter_guest.  This function is only called from
1405          * the physical CPU that is running vcpu.
1406          */
1407         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1408 }
1409
1410 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1411 {
1412         int version;
1413         int r;
1414         struct pvclock_wall_clock wc;
1415         struct timespec64 boot;
1416
1417         if (!wall_clock)
1418                 return;
1419
1420         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1421         if (r)
1422                 return;
1423
1424         if (version & 1)
1425                 ++version;  /* first time write, random junk */
1426
1427         ++version;
1428
1429         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1430                 return;
1431
1432         /*
1433          * The guest calculates current wall clock time by adding
1434          * system time (updated by kvm_guest_time_update below) to the
1435          * wall clock specified here.  guest system time equals host
1436          * system time for us, thus we must fill in host boot time here.
1437          */
1438         getboottime64(&boot);
1439
1440         if (kvm->arch.kvmclock_offset) {
1441                 struct timespec64 ts = ns_to_timespec64(kvm->arch.kvmclock_offset);
1442                 boot = timespec64_sub(boot, ts);
1443         }
1444         wc.sec = (u32)boot.tv_sec; /* overflow in 2106 guest time */
1445         wc.nsec = boot.tv_nsec;
1446         wc.version = version;
1447
1448         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1449
1450         version++;
1451         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1452 }
1453
1454 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1455 {
1456         do_shl32_div32(dividend, divisor);
1457         return dividend;
1458 }
1459
1460 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1461                                s8 *pshift, u32 *pmultiplier)
1462 {
1463         uint64_t scaled64;
1464         int32_t  shift = 0;
1465         uint64_t tps64;
1466         uint32_t tps32;
1467
1468         tps64 = base_hz;
1469         scaled64 = scaled_hz;
1470         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1471                 tps64 >>= 1;
1472                 shift--;
1473         }
1474
1475         tps32 = (uint32_t)tps64;
1476         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1477                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1478                         scaled64 >>= 1;
1479                 else
1480                         tps32 <<= 1;
1481                 shift++;
1482         }
1483
1484         *pshift = shift;
1485         *pmultiplier = div_frac(scaled64, tps32);
1486
1487         pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1488                  __func__, base_hz, scaled_hz, shift, *pmultiplier);
1489 }
1490
1491 #ifdef CONFIG_X86_64
1492 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1493 #endif
1494
1495 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1496 static unsigned long max_tsc_khz;
1497
1498 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1499 {
1500         u64 v = (u64)khz * (1000000 + ppm);
1501         do_div(v, 1000000);
1502         return v;
1503 }
1504
1505 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1506 {
1507         u64 ratio;
1508
1509         /* Guest TSC same frequency as host TSC? */
1510         if (!scale) {
1511                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1512                 return 0;
1513         }
1514
1515         /* TSC scaling supported? */
1516         if (!kvm_has_tsc_control) {
1517                 if (user_tsc_khz > tsc_khz) {
1518                         vcpu->arch.tsc_catchup = 1;
1519                         vcpu->arch.tsc_always_catchup = 1;
1520                         return 0;
1521                 } else {
1522                         WARN(1, "user requested TSC rate below hardware speed\n");
1523                         return -1;
1524                 }
1525         }
1526
1527         /* TSC scaling required  - calculate ratio */
1528         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1529                                 user_tsc_khz, tsc_khz);
1530
1531         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1532                 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1533                           user_tsc_khz);
1534                 return -1;
1535         }
1536
1537         vcpu->arch.tsc_scaling_ratio = ratio;
1538         return 0;
1539 }
1540
1541 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1542 {
1543         u32 thresh_lo, thresh_hi;
1544         int use_scaling = 0;
1545
1546         /* tsc_khz can be zero if TSC calibration fails */
1547         if (user_tsc_khz == 0) {
1548                 /* set tsc_scaling_ratio to a safe value */
1549                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1550                 return -1;
1551         }
1552
1553         /* Compute a scale to convert nanoseconds in TSC cycles */
1554         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
1555                            &vcpu->arch.virtual_tsc_shift,
1556                            &vcpu->arch.virtual_tsc_mult);
1557         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
1558
1559         /*
1560          * Compute the variation in TSC rate which is acceptable
1561          * within the range of tolerance and decide if the
1562          * rate being applied is within that bounds of the hardware
1563          * rate.  If so, no scaling or compensation need be done.
1564          */
1565         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1566         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1567         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
1568                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
1569                 use_scaling = 1;
1570         }
1571         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
1572 }
1573
1574 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1575 {
1576         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1577                                       vcpu->arch.virtual_tsc_mult,
1578                                       vcpu->arch.virtual_tsc_shift);
1579         tsc += vcpu->arch.this_tsc_write;
1580         return tsc;
1581 }
1582
1583 static inline int gtod_is_based_on_tsc(int mode)
1584 {
1585         return mode == VCLOCK_TSC || mode == VCLOCK_HVCLOCK;
1586 }
1587
1588 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1589 {
1590 #ifdef CONFIG_X86_64
1591         bool vcpus_matched;
1592         struct kvm_arch *ka = &vcpu->kvm->arch;
1593         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1594
1595         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1596                          atomic_read(&vcpu->kvm->online_vcpus));
1597
1598         /*
1599          * Once the masterclock is enabled, always perform request in
1600          * order to update it.
1601          *
1602          * In order to enable masterclock, the host clocksource must be TSC
1603          * and the vcpus need to have matched TSCs.  When that happens,
1604          * perform request to enable masterclock.
1605          */
1606         if (ka->use_master_clock ||
1607             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
1608                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1609
1610         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1611                             atomic_read(&vcpu->kvm->online_vcpus),
1612                             ka->use_master_clock, gtod->clock.vclock_mode);
1613 #endif
1614 }
1615
1616 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1617 {
1618         u64 curr_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1619         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1620 }
1621
1622 /*
1623  * Multiply tsc by a fixed point number represented by ratio.
1624  *
1625  * The most significant 64-N bits (mult) of ratio represent the
1626  * integral part of the fixed point number; the remaining N bits
1627  * (frac) represent the fractional part, ie. ratio represents a fixed
1628  * point number (mult + frac * 2^(-N)).
1629  *
1630  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1631  */
1632 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1633 {
1634         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1635 }
1636
1637 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1638 {
1639         u64 _tsc = tsc;
1640         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1641
1642         if (ratio != kvm_default_tsc_scaling_ratio)
1643                 _tsc = __scale_tsc(ratio, tsc);
1644
1645         return _tsc;
1646 }
1647 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1648
1649 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1650 {
1651         u64 tsc;
1652
1653         tsc = kvm_scale_tsc(vcpu, rdtsc());
1654
1655         return target_tsc - tsc;
1656 }
1657
1658 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1659 {
1660         u64 tsc_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1661
1662         return tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
1663 }
1664 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1665
1666 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
1667 {
1668         vcpu->arch.tsc_offset = kvm_x86_ops->write_l1_tsc_offset(vcpu, offset);
1669 }
1670
1671 static inline bool kvm_check_tsc_unstable(void)
1672 {
1673 #ifdef CONFIG_X86_64
1674         /*
1675          * TSC is marked unstable when we're running on Hyper-V,
1676          * 'TSC page' clocksource is good.
1677          */
1678         if (pvclock_gtod_data.clock.vclock_mode == VCLOCK_HVCLOCK)
1679                 return false;
1680 #endif
1681         return check_tsc_unstable();
1682 }
1683
1684 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1685 {
1686         struct kvm *kvm = vcpu->kvm;
1687         u64 offset, ns, elapsed;
1688         unsigned long flags;
1689         bool matched;
1690         bool already_matched;
1691         u64 data = msr->data;
1692         bool synchronizing = false;
1693
1694         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1695         offset = kvm_compute_tsc_offset(vcpu, data);
1696         ns = ktime_get_boot_ns();
1697         elapsed = ns - kvm->arch.last_tsc_nsec;
1698
1699         if (vcpu->arch.virtual_tsc_khz) {
1700                 if (data == 0 && msr->host_initiated) {
1701                         /*
1702                          * detection of vcpu initialization -- need to sync
1703                          * with other vCPUs. This particularly helps to keep
1704                          * kvm_clock stable after CPU hotplug
1705                          */
1706                         synchronizing = true;
1707                 } else {
1708                         u64 tsc_exp = kvm->arch.last_tsc_write +
1709                                                 nsec_to_cycles(vcpu, elapsed);
1710                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
1711                         /*
1712                          * Special case: TSC write with a small delta (1 second)
1713                          * of virtual cycle time against real time is
1714                          * interpreted as an attempt to synchronize the CPU.
1715                          */
1716                         synchronizing = data < tsc_exp + tsc_hz &&
1717                                         data + tsc_hz > tsc_exp;
1718                 }
1719         }
1720
1721         /*
1722          * For a reliable TSC, we can match TSC offsets, and for an unstable
1723          * TSC, we add elapsed time in this computation.  We could let the
1724          * compensation code attempt to catch up if we fall behind, but
1725          * it's better to try to match offsets from the beginning.
1726          */
1727         if (synchronizing &&
1728             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1729                 if (!kvm_check_tsc_unstable()) {
1730                         offset = kvm->arch.cur_tsc_offset;
1731                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1732                 } else {
1733                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1734                         data += delta;
1735                         offset = kvm_compute_tsc_offset(vcpu, data);
1736                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1737                 }
1738                 matched = true;
1739                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1740         } else {
1741                 /*
1742                  * We split periods of matched TSC writes into generations.
1743                  * For each generation, we track the original measured
1744                  * nanosecond time, offset, and write, so if TSCs are in
1745                  * sync, we can match exact offset, and if not, we can match
1746                  * exact software computation in compute_guest_tsc()
1747                  *
1748                  * These values are tracked in kvm->arch.cur_xxx variables.
1749                  */
1750                 kvm->arch.cur_tsc_generation++;
1751                 kvm->arch.cur_tsc_nsec = ns;
1752                 kvm->arch.cur_tsc_write = data;
1753                 kvm->arch.cur_tsc_offset = offset;
1754                 matched = false;
1755                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1756                          kvm->arch.cur_tsc_generation, data);
1757         }
1758
1759         /*
1760          * We also track th most recent recorded KHZ, write and time to
1761          * allow the matching interval to be extended at each write.
1762          */
1763         kvm->arch.last_tsc_nsec = ns;
1764         kvm->arch.last_tsc_write = data;
1765         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1766
1767         vcpu->arch.last_guest_tsc = data;
1768
1769         /* Keep track of which generation this VCPU has synchronized to */
1770         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1771         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1772         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1773
1774         if (!msr->host_initiated && guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST))
1775                 update_ia32_tsc_adjust_msr(vcpu, offset);
1776
1777         kvm_vcpu_write_tsc_offset(vcpu, offset);
1778         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1779
1780         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1781         if (!matched) {
1782                 kvm->arch.nr_vcpus_matched_tsc = 0;
1783         } else if (!already_matched) {
1784                 kvm->arch.nr_vcpus_matched_tsc++;
1785         }
1786
1787         kvm_track_tsc_matching(vcpu);
1788         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1789 }
1790
1791 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1792
1793 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1794                                            s64 adjustment)
1795 {
1796         u64 tsc_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1797         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
1798 }
1799
1800 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1801 {
1802         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1803                 WARN_ON(adjustment < 0);
1804         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1805         adjust_tsc_offset_guest(vcpu, adjustment);
1806 }
1807
1808 #ifdef CONFIG_X86_64
1809
1810 static u64 read_tsc(void)
1811 {
1812         u64 ret = (u64)rdtsc_ordered();
1813         u64 last = pvclock_gtod_data.clock.cycle_last;
1814
1815         if (likely(ret >= last))
1816                 return ret;
1817
1818         /*
1819          * GCC likes to generate cmov here, but this branch is extremely
1820          * predictable (it's just a function of time and the likely is
1821          * very likely) and there's a data dependence, so force GCC
1822          * to generate a branch instead.  I don't barrier() because
1823          * we don't actually need a barrier, and if this function
1824          * ever gets inlined it will generate worse code.
1825          */
1826         asm volatile ("");
1827         return last;
1828 }
1829
1830 static inline u64 vgettsc(u64 *tsc_timestamp, int *mode)
1831 {
1832         long v;
1833         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1834         u64 tsc_pg_val;
1835
1836         switch (gtod->clock.vclock_mode) {
1837         case VCLOCK_HVCLOCK:
1838                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
1839                                                   tsc_timestamp);
1840                 if (tsc_pg_val != U64_MAX) {
1841                         /* TSC page valid */
1842                         *mode = VCLOCK_HVCLOCK;
1843                         v = (tsc_pg_val - gtod->clock.cycle_last) &
1844                                 gtod->clock.mask;
1845                 } else {
1846                         /* TSC page invalid */
1847                         *mode = VCLOCK_NONE;
1848                 }
1849                 break;
1850         case VCLOCK_TSC:
1851                 *mode = VCLOCK_TSC;
1852                 *tsc_timestamp = read_tsc();
1853                 v = (*tsc_timestamp - gtod->clock.cycle_last) &
1854                         gtod->clock.mask;
1855                 break;
1856         default:
1857                 *mode = VCLOCK_NONE;
1858         }
1859
1860         if (*mode == VCLOCK_NONE)
1861                 *tsc_timestamp = v = 0;
1862
1863         return v * gtod->clock.mult;
1864 }
1865
1866 static int do_monotonic_boot(s64 *t, u64 *tsc_timestamp)
1867 {
1868         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1869         unsigned long seq;
1870         int mode;
1871         u64 ns;
1872
1873         do {
1874                 seq = read_seqcount_begin(&gtod->seq);
1875                 ns = gtod->nsec_base;
1876                 ns += vgettsc(tsc_timestamp, &mode);
1877                 ns >>= gtod->clock.shift;
1878                 ns += gtod->boot_ns;
1879         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1880         *t = ns;
1881
1882         return mode;
1883 }
1884
1885 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
1886 {
1887         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1888         unsigned long seq;
1889         int mode;
1890         u64 ns;
1891
1892         do {
1893                 seq = read_seqcount_begin(&gtod->seq);
1894                 ts->tv_sec = gtod->wall_time_sec;
1895                 ns = gtod->nsec_base;
1896                 ns += vgettsc(tsc_timestamp, &mode);
1897                 ns >>= gtod->clock.shift;
1898         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1899
1900         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
1901         ts->tv_nsec = ns;
1902
1903         return mode;
1904 }
1905
1906 /* returns true if host is using TSC based clocksource */
1907 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
1908 {
1909         /* checked again under seqlock below */
1910         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
1911                 return false;
1912
1913         return gtod_is_based_on_tsc(do_monotonic_boot(kernel_ns,
1914                                                       tsc_timestamp));
1915 }
1916
1917 /* returns true if host is using TSC based clocksource */
1918 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
1919                                            u64 *tsc_timestamp)
1920 {
1921         /* checked again under seqlock below */
1922         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
1923                 return false;
1924
1925         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
1926 }
1927 #endif
1928
1929 /*
1930  *
1931  * Assuming a stable TSC across physical CPUS, and a stable TSC
1932  * across virtual CPUs, the following condition is possible.
1933  * Each numbered line represents an event visible to both
1934  * CPUs at the next numbered event.
1935  *
1936  * "timespecX" represents host monotonic time. "tscX" represents
1937  * RDTSC value.
1938  *
1939  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1940  *
1941  * 1.  read timespec0,tsc0
1942  * 2.                                   | timespec1 = timespec0 + N
1943  *                                      | tsc1 = tsc0 + M
1944  * 3. transition to guest               | transition to guest
1945  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1946  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1947  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1948  *
1949  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1950  *
1951  *      - ret0 < ret1
1952  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1953  *              ...
1954  *      - 0 < N - M => M < N
1955  *
1956  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1957  * always the case (the difference between two distinct xtime instances
1958  * might be smaller then the difference between corresponding TSC reads,
1959  * when updating guest vcpus pvclock areas).
1960  *
1961  * To avoid that problem, do not allow visibility of distinct
1962  * system_timestamp/tsc_timestamp values simultaneously: use a master
1963  * copy of host monotonic time values. Update that master copy
1964  * in lockstep.
1965  *
1966  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1967  *
1968  */
1969
1970 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1971 {
1972 #ifdef CONFIG_X86_64
1973         struct kvm_arch *ka = &kvm->arch;
1974         int vclock_mode;
1975         bool host_tsc_clocksource, vcpus_matched;
1976
1977         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1978                         atomic_read(&kvm->online_vcpus));
1979
1980         /*
1981          * If the host uses TSC clock, then passthrough TSC as stable
1982          * to the guest.
1983          */
1984         host_tsc_clocksource = kvm_get_time_and_clockread(
1985                                         &ka->master_kernel_ns,
1986                                         &ka->master_cycle_now);
1987
1988         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1989                                 && !ka->backwards_tsc_observed
1990                                 && !ka->boot_vcpu_runs_old_kvmclock;
1991
1992         if (ka->use_master_clock)
1993                 atomic_set(&kvm_guest_has_master_clock, 1);
1994
1995         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1996         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1997                                         vcpus_matched);
1998 #endif
1999 }
2000
2001 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2002 {
2003         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2004 }
2005
2006 static void kvm_gen_update_masterclock(struct kvm *kvm)
2007 {
2008 #ifdef CONFIG_X86_64
2009         int i;
2010         struct kvm_vcpu *vcpu;
2011         struct kvm_arch *ka = &kvm->arch;
2012
2013         spin_lock(&ka->pvclock_gtod_sync_lock);
2014         kvm_make_mclock_inprogress_request(kvm);
2015         /* no guest entries from this point */
2016         pvclock_update_vm_gtod_copy(kvm);
2017
2018         kvm_for_each_vcpu(i, vcpu, kvm)
2019                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2020
2021         /* guest entries allowed */
2022         kvm_for_each_vcpu(i, vcpu, kvm)
2023                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2024
2025         spin_unlock(&ka->pvclock_gtod_sync_lock);
2026 #endif
2027 }
2028
2029 u64 get_kvmclock_ns(struct kvm *kvm)
2030 {
2031         struct kvm_arch *ka = &kvm->arch;
2032         struct pvclock_vcpu_time_info hv_clock;
2033         u64 ret;
2034
2035         spin_lock(&ka->pvclock_gtod_sync_lock);
2036         if (!ka->use_master_clock) {
2037                 spin_unlock(&ka->pvclock_gtod_sync_lock);
2038                 return ktime_get_boot_ns() + ka->kvmclock_offset;
2039         }
2040
2041         hv_clock.tsc_timestamp = ka->master_cycle_now;
2042         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2043         spin_unlock(&ka->pvclock_gtod_sync_lock);
2044
2045         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2046         get_cpu();
2047
2048         if (__this_cpu_read(cpu_tsc_khz)) {
2049                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2050                                    &hv_clock.tsc_shift,
2051                                    &hv_clock.tsc_to_system_mul);
2052                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2053         } else
2054                 ret = ktime_get_boot_ns() + ka->kvmclock_offset;
2055
2056         put_cpu();
2057
2058         return ret;
2059 }
2060
2061 static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
2062 {
2063         struct kvm_vcpu_arch *vcpu = &v->arch;
2064         struct pvclock_vcpu_time_info guest_hv_clock;
2065
2066         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
2067                 &guest_hv_clock, sizeof(guest_hv_clock))))
2068                 return;
2069
2070         /* This VCPU is paused, but it's legal for a guest to read another
2071          * VCPU's kvmclock, so we really have to follow the specification where
2072          * it says that version is odd if data is being modified, and even after
2073          * it is consistent.
2074          *
2075          * Version field updates must be kept separate.  This is because
2076          * kvm_write_guest_cached might use a "rep movs" instruction, and
2077          * writes within a string instruction are weakly ordered.  So there
2078          * are three writes overall.
2079          *
2080          * As a small optimization, only write the version field in the first
2081          * and third write.  The vcpu->pv_time cache is still valid, because the
2082          * version field is the first in the struct.
2083          */
2084         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2085
2086         if (guest_hv_clock.version & 1)
2087                 ++guest_hv_clock.version;  /* first time write, random junk */
2088
2089         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2090         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2091                                 &vcpu->hv_clock,
2092                                 sizeof(vcpu->hv_clock.version));
2093
2094         smp_wmb();
2095
2096         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2097         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2098
2099         if (vcpu->pvclock_set_guest_stopped_request) {
2100                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2101                 vcpu->pvclock_set_guest_stopped_request = false;
2102         }
2103
2104         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2105
2106         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2107                                 &vcpu->hv_clock,
2108                                 sizeof(vcpu->hv_clock));
2109
2110         smp_wmb();
2111
2112         vcpu->hv_clock.version++;
2113         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2114                                 &vcpu->hv_clock,
2115                                 sizeof(vcpu->hv_clock.version));
2116 }
2117
2118 static int kvm_guest_time_update(struct kvm_vcpu *v)
2119 {
2120         unsigned long flags, tgt_tsc_khz;
2121         struct kvm_vcpu_arch *vcpu = &v->arch;
2122         struct kvm_arch *ka = &v->kvm->arch;
2123         s64 kernel_ns;
2124         u64 tsc_timestamp, host_tsc;
2125         u8 pvclock_flags;
2126         bool use_master_clock;
2127
2128         kernel_ns = 0;
2129         host_tsc = 0;
2130
2131         /*
2132          * If the host uses TSC clock, then passthrough TSC as stable
2133          * to the guest.
2134          */
2135         spin_lock(&ka->pvclock_gtod_sync_lock);
2136         use_master_clock = ka->use_master_clock;
2137         if (use_master_clock) {
2138                 host_tsc = ka->master_cycle_now;
2139                 kernel_ns = ka->master_kernel_ns;
2140         }
2141         spin_unlock(&ka->pvclock_gtod_sync_lock);
2142
2143         /* Keep irq disabled to prevent changes to the clock */
2144         local_irq_save(flags);
2145         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2146         if (unlikely(tgt_tsc_khz == 0)) {
2147                 local_irq_restore(flags);
2148                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2149                 return 1;
2150         }
2151         if (!use_master_clock) {
2152                 host_tsc = rdtsc();
2153                 kernel_ns = ktime_get_boot_ns();
2154         }
2155
2156         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2157
2158         /*
2159          * We may have to catch up the TSC to match elapsed wall clock
2160          * time for two reasons, even if kvmclock is used.
2161          *   1) CPU could have been running below the maximum TSC rate
2162          *   2) Broken TSC compensation resets the base at each VCPU
2163          *      entry to avoid unknown leaps of TSC even when running
2164          *      again on the same CPU.  This may cause apparent elapsed
2165          *      time to disappear, and the guest to stand still or run
2166          *      very slowly.
2167          */
2168         if (vcpu->tsc_catchup) {
2169                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2170                 if (tsc > tsc_timestamp) {
2171                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2172                         tsc_timestamp = tsc;
2173                 }
2174         }
2175
2176         local_irq_restore(flags);
2177
2178         /* With all the info we got, fill in the values */
2179
2180         if (kvm_has_tsc_control)
2181                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
2182
2183         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2184                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2185                                    &vcpu->hv_clock.tsc_shift,
2186                                    &vcpu->hv_clock.tsc_to_system_mul);
2187                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2188         }
2189
2190         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2191         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2192         vcpu->last_guest_tsc = tsc_timestamp;
2193
2194         /* If the host uses TSC clocksource, then it is stable */
2195         pvclock_flags = 0;
2196         if (use_master_clock)
2197                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2198
2199         vcpu->hv_clock.flags = pvclock_flags;
2200
2201         if (vcpu->pv_time_enabled)
2202                 kvm_setup_pvclock_page(v);
2203         if (v == kvm_get_vcpu(v->kvm, 0))
2204                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2205         return 0;
2206 }
2207
2208 /*
2209  * kvmclock updates which are isolated to a given vcpu, such as
2210  * vcpu->cpu migration, should not allow system_timestamp from
2211  * the rest of the vcpus to remain static. Otherwise ntp frequency
2212  * correction applies to one vcpu's system_timestamp but not
2213  * the others.
2214  *
2215  * So in those cases, request a kvmclock update for all vcpus.
2216  * We need to rate-limit these requests though, as they can
2217  * considerably slow guests that have a large number of vcpus.
2218  * The time for a remote vcpu to update its kvmclock is bound
2219  * by the delay we use to rate-limit the updates.
2220  */
2221
2222 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2223
2224 static void kvmclock_update_fn(struct work_struct *work)
2225 {
2226         int i;
2227         struct delayed_work *dwork = to_delayed_work(work);
2228         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2229                                            kvmclock_update_work);
2230         struct kvm *kvm = container_of(ka, struct kvm, arch);
2231         struct kvm_vcpu *vcpu;
2232
2233         kvm_for_each_vcpu(i, vcpu, kvm) {
2234                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2235                 kvm_vcpu_kick(vcpu);
2236         }
2237 }
2238
2239 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2240 {
2241         struct kvm *kvm = v->kvm;
2242
2243         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2244         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2245                                         KVMCLOCK_UPDATE_DELAY);
2246 }
2247
2248 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2249
2250 static void kvmclock_sync_fn(struct work_struct *work)
2251 {
2252         struct delayed_work *dwork = to_delayed_work(work);
2253         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2254                                            kvmclock_sync_work);
2255         struct kvm *kvm = container_of(ka, struct kvm, arch);
2256
2257         if (!kvmclock_periodic_sync)
2258                 return;
2259
2260         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2261         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2262                                         KVMCLOCK_SYNC_PERIOD);
2263 }
2264
2265 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2266 {
2267         u64 mcg_cap = vcpu->arch.mcg_cap;
2268         unsigned bank_num = mcg_cap & 0xff;
2269         u32 msr = msr_info->index;
2270         u64 data = msr_info->data;
2271
2272         switch (msr) {
2273         case MSR_IA32_MCG_STATUS:
2274                 vcpu->arch.mcg_status = data;
2275                 break;
2276         case MSR_IA32_MCG_CTL:
2277                 if (!(mcg_cap & MCG_CTL_P) &&
2278                     (data || !msr_info->host_initiated))
2279                         return 1;
2280                 if (data != 0 && data != ~(u64)0)
2281                         return 1;
2282                 vcpu->arch.mcg_ctl = data;
2283                 break;
2284         default:
2285                 if (msr >= MSR_IA32_MC0_CTL &&
2286                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2287                         u32 offset = msr - MSR_IA32_MC0_CTL;
2288                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2289                          * some Linux kernels though clear bit 10 in bank 4 to
2290                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2291                          * this to avoid an uncatched #GP in the guest
2292                          */
2293                         if ((offset & 0x3) == 0 &&
2294                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2295                                 return -1;
2296                         if (!msr_info->host_initiated &&
2297                                 (offset & 0x3) == 1 && data != 0)
2298                                 return -1;
2299                         vcpu->arch.mce_banks[offset] = data;
2300                         break;
2301                 }
2302                 return 1;
2303         }
2304         return 0;
2305 }
2306
2307 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2308 {
2309         struct kvm *kvm = vcpu->kvm;
2310         int lm = is_long_mode(vcpu);
2311         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2312                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2313         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2314                 : kvm->arch.xen_hvm_config.blob_size_32;
2315         u32 page_num = data & ~PAGE_MASK;
2316         u64 page_addr = data & PAGE_MASK;
2317         u8 *page;
2318         int r;
2319
2320         r = -E2BIG;
2321         if (page_num >= blob_size)
2322                 goto out;
2323         r = -ENOMEM;
2324         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2325         if (IS_ERR(page)) {
2326                 r = PTR_ERR(page);
2327                 goto out;
2328         }
2329         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
2330                 goto out_free;
2331         r = 0;
2332 out_free:
2333         kfree(page);
2334 out:
2335         return r;
2336 }
2337
2338 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2339 {
2340         gpa_t gpa = data & ~0x3f;
2341
2342         /* Bits 3:5 are reserved, Should be zero */
2343         if (data & 0x38)
2344                 return 1;
2345
2346         vcpu->arch.apf.msr_val = data;
2347
2348         if (!(data & KVM_ASYNC_PF_ENABLED)) {
2349                 kvm_clear_async_pf_completion_queue(vcpu);
2350                 kvm_async_pf_hash_reset(vcpu);
2351                 return 0;
2352         }
2353
2354         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2355                                         sizeof(u32)))
2356                 return 1;
2357
2358         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2359         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
2360         kvm_async_pf_wakeup_all(vcpu);
2361         return 0;
2362 }
2363
2364 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2365 {
2366         vcpu->arch.pv_time_enabled = false;
2367 }
2368
2369 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu, bool invalidate_gpa)
2370 {
2371         ++vcpu->stat.tlb_flush;
2372         kvm_x86_ops->tlb_flush(vcpu, invalidate_gpa);
2373 }
2374
2375 static void record_steal_time(struct kvm_vcpu *vcpu)
2376 {
2377         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2378                 return;
2379
2380         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2381                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2382                 return;
2383
2384         /*
2385          * Doing a TLB flush here, on the guest's behalf, can avoid
2386          * expensive IPIs.
2387          */
2388         if (xchg(&vcpu->arch.st.steal.preempted, 0) & KVM_VCPU_FLUSH_TLB)
2389                 kvm_vcpu_flush_tlb(vcpu, false);
2390
2391         if (vcpu->arch.st.steal.version & 1)
2392                 vcpu->arch.st.steal.version += 1;  /* first time write, random junk */
2393
2394         vcpu->arch.st.steal.version += 1;
2395
2396         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2397                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2398
2399         smp_wmb();
2400
2401         vcpu->arch.st.steal.steal += current->sched_info.run_delay -
2402                 vcpu->arch.st.last_steal;
2403         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2404
2405         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2406                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2407
2408         smp_wmb();
2409
2410         vcpu->arch.st.steal.version += 1;
2411
2412         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2413                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2414 }
2415
2416 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2417 {
2418         bool pr = false;
2419         u32 msr = msr_info->index;
2420         u64 data = msr_info->data;
2421
2422         switch (msr) {
2423         case MSR_AMD64_NB_CFG:
2424         case MSR_IA32_UCODE_WRITE:
2425         case MSR_VM_HSAVE_PA:
2426         case MSR_AMD64_PATCH_LOADER:
2427         case MSR_AMD64_BU_CFG2:
2428         case MSR_AMD64_DC_CFG:
2429         case MSR_F15H_EX_CFG:
2430                 break;
2431
2432         case MSR_IA32_UCODE_REV:
2433                 if (msr_info->host_initiated)
2434                         vcpu->arch.microcode_version = data;
2435                 break;
2436         case MSR_EFER:
2437                 return set_efer(vcpu, data);
2438         case MSR_K7_HWCR:
2439                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2440                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2441                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2442                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
2443                 if (data != 0) {
2444                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2445                                     data);
2446                         return 1;
2447                 }
2448                 break;
2449         case MSR_FAM10H_MMIO_CONF_BASE:
2450                 if (data != 0) {
2451                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2452                                     "0x%llx\n", data);
2453                         return 1;
2454                 }
2455                 break;
2456         case MSR_IA32_DEBUGCTLMSR:
2457                 if (!data) {
2458                         /* We support the non-activated case already */
2459                         break;
2460                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2461                         /* Values other than LBR and BTF are vendor-specific,
2462                            thus reserved and should throw a #GP */
2463                         return 1;
2464                 }
2465                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2466                             __func__, data);
2467                 break;
2468         case 0x200 ... 0x2ff:
2469                 return kvm_mtrr_set_msr(vcpu, msr, data);
2470         case MSR_IA32_APICBASE:
2471                 return kvm_set_apic_base(vcpu, msr_info);
2472         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2473                 return kvm_x2apic_msr_write(vcpu, msr, data);
2474         case MSR_IA32_TSCDEADLINE:
2475                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2476                 break;
2477         case MSR_IA32_TSC_ADJUST:
2478                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
2479                         if (!msr_info->host_initiated) {
2480                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2481                                 adjust_tsc_offset_guest(vcpu, adj);
2482                         }
2483                         vcpu->arch.ia32_tsc_adjust_msr = data;
2484                 }
2485                 break;
2486         case MSR_IA32_MISC_ENABLE:
2487                 vcpu->arch.ia32_misc_enable_msr = data;
2488                 break;
2489         case MSR_IA32_SMBASE:
2490                 if (!msr_info->host_initiated)
2491                         return 1;
2492                 vcpu->arch.smbase = data;
2493                 break;
2494         case MSR_IA32_TSC:
2495                 kvm_write_tsc(vcpu, msr_info);
2496                 break;
2497         case MSR_SMI_COUNT:
2498                 if (!msr_info->host_initiated)
2499                         return 1;
2500                 vcpu->arch.smi_count = data;
2501                 break;
2502         case MSR_KVM_WALL_CLOCK_NEW:
2503         case MSR_KVM_WALL_CLOCK:
2504                 vcpu->kvm->arch.wall_clock = data;
2505                 kvm_write_wall_clock(vcpu->kvm, data);
2506                 break;
2507         case MSR_KVM_SYSTEM_TIME_NEW:
2508         case MSR_KVM_SYSTEM_TIME: {
2509                 struct kvm_arch *ka = &vcpu->kvm->arch;
2510
2511                 kvmclock_reset(vcpu);
2512
2513                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2514                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2515
2516                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2517                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2518
2519                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2520                 }
2521
2522                 vcpu->arch.time = data;
2523                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2524
2525                 /* we verify if the enable bit is set... */
2526                 if (!(data & 1))
2527                         break;
2528
2529                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2530                      &vcpu->arch.pv_time, data & ~1ULL,
2531                      sizeof(struct pvclock_vcpu_time_info)))
2532                         vcpu->arch.pv_time_enabled = false;
2533                 else
2534                         vcpu->arch.pv_time_enabled = true;
2535
2536                 break;
2537         }
2538         case MSR_KVM_ASYNC_PF_EN:
2539                 if (kvm_pv_enable_async_pf(vcpu, data))
2540                         return 1;
2541                 break;
2542         case MSR_KVM_STEAL_TIME:
2543
2544                 if (unlikely(!sched_info_on()))
2545                         return 1;
2546
2547                 if (data & KVM_STEAL_RESERVED_MASK)
2548                         return 1;
2549
2550                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2551                                                 data & KVM_STEAL_VALID_BITS,
2552                                                 sizeof(struct kvm_steal_time)))
2553                         return 1;
2554
2555                 vcpu->arch.st.msr_val = data;
2556
2557                 if (!(data & KVM_MSR_ENABLED))
2558                         break;
2559
2560                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2561
2562                 break;
2563         case MSR_KVM_PV_EOI_EN:
2564                 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
2565                         return 1;
2566                 break;
2567
2568         case MSR_IA32_MCG_CTL:
2569         case MSR_IA32_MCG_STATUS:
2570         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2571                 return set_msr_mce(vcpu, msr_info);
2572
2573         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2574         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2575                 pr = true; /* fall through */
2576         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2577         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2578                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2579                         return kvm_pmu_set_msr(vcpu, msr_info);
2580
2581                 if (pr || data != 0)
2582                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2583                                     "0x%x data 0x%llx\n", msr, data);
2584                 break;
2585         case MSR_K7_CLK_CTL:
2586                 /*
2587                  * Ignore all writes to this no longer documented MSR.
2588                  * Writes are only relevant for old K7 processors,
2589                  * all pre-dating SVM, but a recommended workaround from
2590                  * AMD for these chips. It is possible to specify the
2591                  * affected processor models on the command line, hence
2592                  * the need to ignore the workaround.
2593                  */
2594                 break;
2595         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2596         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2597         case HV_X64_MSR_CRASH_CTL:
2598         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2599         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
2600         case HV_X64_MSR_TSC_EMULATION_CONTROL:
2601         case HV_X64_MSR_TSC_EMULATION_STATUS:
2602                 return kvm_hv_set_msr_common(vcpu, msr, data,
2603                                              msr_info->host_initiated);
2604         case MSR_IA32_BBL_CR_CTL3:
2605                 /* Drop writes to this legacy MSR -- see rdmsr
2606                  * counterpart for further detail.
2607                  */
2608                 if (report_ignored_msrs)
2609                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
2610                                 msr, data);
2611                 break;
2612         case MSR_AMD64_OSVW_ID_LENGTH:
2613                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2614                         return 1;
2615                 vcpu->arch.osvw.length = data;
2616                 break;
2617         case MSR_AMD64_OSVW_STATUS:
2618                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2619                         return 1;
2620                 vcpu->arch.osvw.status = data;
2621                 break;
2622         case MSR_PLATFORM_INFO:
2623                 if (!msr_info->host_initiated ||
2624                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
2625                      cpuid_fault_enabled(vcpu)))
2626                         return 1;
2627                 vcpu->arch.msr_platform_info = data;
2628                 break;
2629         case MSR_MISC_FEATURES_ENABLES:
2630                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
2631                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
2632                      !supports_cpuid_fault(vcpu)))
2633                         return 1;
2634                 vcpu->arch.msr_misc_features_enables = data;
2635                 break;
2636         default:
2637                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2638                         return xen_hvm_config(vcpu, data);
2639                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2640                         return kvm_pmu_set_msr(vcpu, msr_info);
2641                 if (!ignore_msrs) {
2642                         vcpu_debug_ratelimited(vcpu, "unhandled wrmsr: 0x%x data 0x%llx\n",
2643                                     msr, data);
2644                         return 1;
2645                 } else {
2646                         if (report_ignored_msrs)
2647                                 vcpu_unimpl(vcpu,
2648                                         "ignored wrmsr: 0x%x data 0x%llx\n",
2649                                         msr, data);
2650                         break;
2651                 }
2652         }
2653         return 0;
2654 }
2655 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2656
2657
2658 /*
2659  * Reads an msr value (of 'msr_index') into 'pdata'.
2660  * Returns 0 on success, non-0 otherwise.
2661  * Assumes vcpu_load() was already called.
2662  */
2663 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2664 {
2665         return kvm_x86_ops->get_msr(vcpu, msr);
2666 }
2667 EXPORT_SYMBOL_GPL(kvm_get_msr);
2668
2669 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
2670 {
2671         u64 data;
2672         u64 mcg_cap = vcpu->arch.mcg_cap;
2673         unsigned bank_num = mcg_cap & 0xff;
2674
2675         switch (msr) {
2676         case MSR_IA32_P5_MC_ADDR:
2677         case MSR_IA32_P5_MC_TYPE:
2678                 data = 0;
2679                 break;
2680         case MSR_IA32_MCG_CAP:
2681                 data = vcpu->arch.mcg_cap;
2682                 break;
2683         case MSR_IA32_MCG_CTL:
2684                 if (!(mcg_cap & MCG_CTL_P) && !host)
2685                         return 1;
2686                 data = vcpu->arch.mcg_ctl;
2687                 break;
2688         case MSR_IA32_MCG_STATUS:
2689                 data = vcpu->arch.mcg_status;
2690                 break;
2691         default:
2692                 if (msr >= MSR_IA32_MC0_CTL &&
2693                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2694                         u32 offset = msr - MSR_IA32_MC0_CTL;
2695                         data = vcpu->arch.mce_banks[offset];
2696                         break;
2697                 }
2698                 return 1;
2699         }
2700         *pdata = data;
2701         return 0;
2702 }
2703
2704 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2705 {
2706         switch (msr_info->index) {
2707         case MSR_IA32_PLATFORM_ID:
2708         case MSR_IA32_EBL_CR_POWERON:
2709         case MSR_IA32_DEBUGCTLMSR:
2710         case MSR_IA32_LASTBRANCHFROMIP:
2711         case MSR_IA32_LASTBRANCHTOIP:
2712         case MSR_IA32_LASTINTFROMIP:
2713         case MSR_IA32_LASTINTTOIP:
2714         case MSR_K8_SYSCFG:
2715         case MSR_K8_TSEG_ADDR:
2716         case MSR_K8_TSEG_MASK:
2717         case MSR_K7_HWCR:
2718         case MSR_VM_HSAVE_PA:
2719         case MSR_K8_INT_PENDING_MSG:
2720         case MSR_AMD64_NB_CFG:
2721         case MSR_FAM10H_MMIO_CONF_BASE:
2722         case MSR_AMD64_BU_CFG2:
2723         case MSR_IA32_PERF_CTL:
2724         case MSR_AMD64_DC_CFG:
2725         case MSR_F15H_EX_CFG:
2726                 msr_info->data = 0;
2727                 break;
2728         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
2729         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2730         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2731         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2732         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2733                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2734                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2735                 msr_info->data = 0;
2736                 break;
2737         case MSR_IA32_UCODE_REV:
2738                 msr_info->data = vcpu->arch.microcode_version;
2739                 break;
2740         case MSR_IA32_TSC:
2741                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc()) + vcpu->arch.tsc_offset;
2742                 break;
2743         case MSR_MTRRcap:
2744         case 0x200 ... 0x2ff:
2745                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2746         case 0xcd: /* fsb frequency */
2747                 msr_info->data = 3;
2748                 break;
2749                 /*
2750                  * MSR_EBC_FREQUENCY_ID
2751                  * Conservative value valid for even the basic CPU models.
2752                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2753                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2754                  * and 266MHz for model 3, or 4. Set Core Clock
2755                  * Frequency to System Bus Frequency Ratio to 1 (bits
2756                  * 31:24) even though these are only valid for CPU
2757                  * models > 2, however guests may end up dividing or
2758                  * multiplying by zero otherwise.
2759                  */
2760         case MSR_EBC_FREQUENCY_ID:
2761                 msr_info->data = 1 << 24;
2762                 break;
2763         case MSR_IA32_APICBASE:
2764                 msr_info->data = kvm_get_apic_base(vcpu);
2765                 break;
2766         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2767                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2768                 break;
2769         case MSR_IA32_TSCDEADLINE:
2770                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2771                 break;
2772         case MSR_IA32_TSC_ADJUST:
2773                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2774                 break;
2775         case MSR_IA32_MISC_ENABLE:
2776                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2777                 break;
2778         case MSR_IA32_SMBASE:
2779                 if (!msr_info->host_initiated)
2780                         return 1;
2781                 msr_info->data = vcpu->arch.smbase;
2782                 break;
2783         case MSR_SMI_COUNT:
2784                 msr_info->data = vcpu->arch.smi_count;
2785                 break;
2786         case MSR_IA32_PERF_STATUS:
2787                 /* TSC increment by tick */
2788                 msr_info->data = 1000ULL;
2789                 /* CPU multiplier */
2790                 msr_info->data |= (((uint64_t)4ULL) << 40);
2791                 break;
2792         case MSR_EFER:
2793                 msr_info->data = vcpu->arch.efer;
2794                 break;
2795         case MSR_KVM_WALL_CLOCK:
2796         case MSR_KVM_WALL_CLOCK_NEW:
2797                 msr_info->data = vcpu->kvm->arch.wall_clock;
2798                 break;
2799         case MSR_KVM_SYSTEM_TIME:
2800         case MSR_KVM_SYSTEM_TIME_NEW:
2801                 msr_info->data = vcpu->arch.time;
2802                 break;
2803         case MSR_KVM_ASYNC_PF_EN:
2804                 msr_info->data = vcpu->arch.apf.msr_val;
2805                 break;
2806         case MSR_KVM_STEAL_TIME:
2807                 msr_info->data = vcpu->arch.st.msr_val;
2808                 break;
2809         case MSR_KVM_PV_EOI_EN:
2810                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2811                 break;
2812         case MSR_IA32_P5_MC_ADDR:
2813         case MSR_IA32_P5_MC_TYPE:
2814         case MSR_IA32_MCG_CAP:
2815         case MSR_IA32_MCG_CTL:
2816         case MSR_IA32_MCG_STATUS:
2817         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2818                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
2819                                    msr_info->host_initiated);
2820         case MSR_K7_CLK_CTL:
2821                 /*
2822                  * Provide expected ramp-up count for K7. All other
2823                  * are set to zero, indicating minimum divisors for
2824                  * every field.
2825                  *
2826                  * This prevents guest kernels on AMD host with CPU
2827                  * type 6, model 8 and higher from exploding due to
2828                  * the rdmsr failing.
2829                  */
2830                 msr_info->data = 0x20000000;
2831                 break;
2832         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2833         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2834         case HV_X64_MSR_CRASH_CTL:
2835         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2836         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
2837         case HV_X64_MSR_TSC_EMULATION_CONTROL:
2838         case HV_X64_MSR_TSC_EMULATION_STATUS:
2839                 return kvm_hv_get_msr_common(vcpu,
2840                                              msr_info->index, &msr_info->data,
2841                                              msr_info->host_initiated);
2842                 break;
2843         case MSR_IA32_BBL_CR_CTL3:
2844                 /* This legacy MSR exists but isn't fully documented in current
2845                  * silicon.  It is however accessed by winxp in very narrow
2846                  * scenarios where it sets bit #19, itself documented as
2847                  * a "reserved" bit.  Best effort attempt to source coherent
2848                  * read data here should the balance of the register be
2849                  * interpreted by the guest:
2850                  *
2851                  * L2 cache control register 3: 64GB range, 256KB size,
2852                  * enabled, latency 0x1, configured
2853                  */
2854                 msr_info->data = 0xbe702111;
2855                 break;
2856         case MSR_AMD64_OSVW_ID_LENGTH:
2857                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2858                         return 1;
2859                 msr_info->data = vcpu->arch.osvw.length;
2860                 break;
2861         case MSR_AMD64_OSVW_STATUS:
2862                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2863                         return 1;
2864                 msr_info->data = vcpu->arch.osvw.status;
2865                 break;
2866         case MSR_PLATFORM_INFO:
2867                 if (!msr_info->host_initiated &&
2868                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
2869                         return 1;
2870                 msr_info->data = vcpu->arch.msr_platform_info;
2871                 break;
2872         case MSR_MISC_FEATURES_ENABLES:
2873                 msr_info->data = vcpu->arch.msr_misc_features_enables;
2874                 break;
2875         default:
2876                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2877                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2878                 if (!ignore_msrs) {
2879                         vcpu_debug_ratelimited(vcpu, "unhandled rdmsr: 0x%x\n",
2880                                                msr_info->index);
2881                         return 1;
2882                 } else {
2883                         if (report_ignored_msrs)
2884                                 vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n",
2885                                         msr_info->index);
2886                         msr_info->data = 0;
2887                 }
2888                 break;
2889         }
2890         return 0;
2891 }
2892 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2893
2894 /*
2895  * Read or write a bunch of msrs. All parameters are kernel addresses.
2896  *
2897  * @return number of msrs set successfully.
2898  */
2899 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2900                     struct kvm_msr_entry *entries,
2901                     int (*do_msr)(struct kvm_vcpu *vcpu,
2902                                   unsigned index, u64 *data))
2903 {
2904         int i;
2905
2906         for (i = 0; i < msrs->nmsrs; ++i)
2907                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2908                         break;
2909
2910         return i;
2911 }
2912
2913 /*
2914  * Read or write a bunch of msrs. Parameters are user addresses.
2915  *
2916  * @return number of msrs set successfully.
2917  */
2918 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2919                   int (*do_msr)(struct kvm_vcpu *vcpu,
2920                                 unsigned index, u64 *data),
2921                   int writeback)
2922 {
2923         struct kvm_msrs msrs;
2924         struct kvm_msr_entry *entries;
2925         int r, n;
2926         unsigned size;
2927
2928         r = -EFAULT;
2929         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
2930                 goto out;
2931
2932         r = -E2BIG;
2933         if (msrs.nmsrs >= MAX_IO_MSRS)
2934                 goto out;
2935
2936         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2937         entries = memdup_user(user_msrs->entries, size);
2938         if (IS_ERR(entries)) {
2939                 r = PTR_ERR(entries);
2940                 goto out;
2941         }
2942
2943         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2944         if (r < 0)
2945                 goto out_free;
2946
2947         r = -EFAULT;
2948         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2949                 goto out_free;
2950
2951         r = n;
2952
2953 out_free:
2954         kfree(entries);
2955 out:
2956         return r;
2957 }
2958
2959 static inline bool kvm_can_mwait_in_guest(void)
2960 {
2961         return boot_cpu_has(X86_FEATURE_MWAIT) &&
2962                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
2963                 boot_cpu_has(X86_FEATURE_ARAT);
2964 }
2965
2966 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2967 {
2968         int r = 0;
2969
2970         switch (ext) {
2971         case KVM_CAP_IRQCHIP:
2972         case KVM_CAP_HLT:
2973         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2974         case KVM_CAP_SET_TSS_ADDR:
2975         case KVM_CAP_EXT_CPUID:
2976         case KVM_CAP_EXT_EMUL_CPUID:
2977         case KVM_CAP_CLOCKSOURCE:
2978         case KVM_CAP_PIT:
2979         case KVM_CAP_NOP_IO_DELAY:
2980         case KVM_CAP_MP_STATE:
2981         case KVM_CAP_SYNC_MMU:
2982         case KVM_CAP_USER_NMI:
2983         case KVM_CAP_REINJECT_CONTROL:
2984         case KVM_CAP_IRQ_INJECT_STATUS:
2985         case KVM_CAP_IOEVENTFD:
2986         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2987         case KVM_CAP_PIT2:
2988         case KVM_CAP_PIT_STATE2:
2989         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2990         case KVM_CAP_XEN_HVM:
2991         case KVM_CAP_VCPU_EVENTS:
2992         case KVM_CAP_HYPERV:
2993         case KVM_CAP_HYPERV_VAPIC:
2994         case KVM_CAP_HYPERV_SPIN:
2995         case KVM_CAP_HYPERV_SYNIC:
2996         case KVM_CAP_HYPERV_SYNIC2:
2997         case KVM_CAP_HYPERV_VP_INDEX:
2998         case KVM_CAP_HYPERV_EVENTFD:
2999         case KVM_CAP_HYPERV_TLBFLUSH:
3000         case KVM_CAP_HYPERV_SEND_IPI:
3001         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
3002         case KVM_CAP_PCI_SEGMENT:
3003         case KVM_CAP_DEBUGREGS:
3004         case KVM_CAP_X86_ROBUST_SINGLESTEP:
3005         case KVM_CAP_XSAVE:
3006         case KVM_CAP_ASYNC_PF:
3007         case KVM_CAP_GET_TSC_KHZ:
3008         case KVM_CAP_KVMCLOCK_CTRL:
3009         case KVM_CAP_READONLY_MEM:
3010         case KVM_CAP_HYPERV_TIME:
3011         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
3012         case KVM_CAP_TSC_DEADLINE_TIMER:
3013         case KVM_CAP_ENABLE_CAP_VM:
3014         case KVM_CAP_DISABLE_QUIRKS:
3015         case KVM_CAP_SET_BOOT_CPU_ID:
3016         case KVM_CAP_SPLIT_IRQCHIP:
3017         case KVM_CAP_IMMEDIATE_EXIT:
3018         case KVM_CAP_GET_MSR_FEATURES:
3019         case KVM_CAP_MSR_PLATFORM_INFO:
3020         case KVM_CAP_EXCEPTION_PAYLOAD:
3021                 r = 1;
3022                 break;
3023         case KVM_CAP_SYNC_REGS:
3024                 r = KVM_SYNC_X86_VALID_FIELDS;
3025                 break;
3026         case KVM_CAP_ADJUST_CLOCK:
3027                 r = KVM_CLOCK_TSC_STABLE;
3028                 break;
3029         case KVM_CAP_X86_DISABLE_EXITS:
3030                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE;
3031                 if(kvm_can_mwait_in_guest())
3032                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
3033                 break;
3034         case KVM_CAP_X86_SMM:
3035                 /* SMBASE is usually relocated above 1M on modern chipsets,
3036                  * and SMM handlers might indeed rely on 4G segment limits,
3037                  * so do not report SMM to be available if real mode is
3038                  * emulated via vm86 mode.  Still, do not go to great lengths
3039                  * to avoid userspace's usage of the feature, because it is a
3040                  * fringe case that is not enabled except via specific settings
3041                  * of the module parameters.
3042                  */
3043                 r = kvm_x86_ops->has_emulated_msr(MSR_IA32_SMBASE);
3044                 break;
3045         case KVM_CAP_VAPIC:
3046                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
3047                 break;
3048         case KVM_CAP_NR_VCPUS:
3049                 r = KVM_SOFT_MAX_VCPUS;
3050                 break;
3051         case KVM_CAP_MAX_VCPUS:
3052                 r = KVM_MAX_VCPUS;
3053                 break;
3054         case KVM_CAP_NR_MEMSLOTS:
3055                 r = KVM_USER_MEM_SLOTS;
3056                 break;
3057         case KVM_CAP_PV_MMU:    /* obsolete */
3058                 r = 0;
3059                 break;
3060         case KVM_CAP_MCE:
3061                 r = KVM_MAX_MCE_BANKS;
3062                 break;
3063         case KVM_CAP_XCRS:
3064                 r = boot_cpu_has(X86_FEATURE_XSAVE);
3065                 break;
3066         case KVM_CAP_TSC_CONTROL:
3067                 r = kvm_has_tsc_control;
3068                 break;
3069         case KVM_CAP_X2APIC_API:
3070                 r = KVM_X2APIC_API_VALID_FLAGS;
3071                 break;
3072         case KVM_CAP_NESTED_STATE:
3073                 r = kvm_x86_ops->get_nested_state ?
3074                         kvm_x86_ops->get_nested_state(NULL, 0, 0) : 0;
3075                 break;
3076         default:
3077                 break;
3078         }
3079         return r;
3080
3081 }
3082
3083 long kvm_arch_dev_ioctl(struct file *filp,
3084                         unsigned int ioctl, unsigned long arg)
3085 {
3086         void __user *argp = (void __user *)arg;
3087         long r;
3088
3089         switch (ioctl) {
3090         case KVM_GET_MSR_INDEX_LIST: {
3091                 struct kvm_msr_list __user *user_msr_list = argp;
3092                 struct kvm_msr_list msr_list;
3093                 unsigned n;
3094
3095                 r = -EFAULT;
3096                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3097                         goto out;
3098                 n = msr_list.nmsrs;
3099                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
3100                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3101                         goto out;
3102                 r = -E2BIG;
3103                 if (n < msr_list.nmsrs)
3104                         goto out;
3105                 r = -EFAULT;
3106                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
3107                                  num_msrs_to_save * sizeof(u32)))
3108                         goto out;
3109                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
3110                                  &emulated_msrs,
3111                                  num_emulated_msrs * sizeof(u32)))
3112                         goto out;
3113                 r = 0;
3114                 break;
3115         }
3116         case KVM_GET_SUPPORTED_CPUID:
3117         case KVM_GET_EMULATED_CPUID: {
3118                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3119                 struct kvm_cpuid2 cpuid;
3120
3121                 r = -EFAULT;
3122                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3123                         goto out;
3124
3125                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
3126                                             ioctl);
3127                 if (r)
3128                         goto out;
3129
3130                 r = -EFAULT;
3131                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3132                         goto out;
3133                 r = 0;
3134                 break;
3135         }
3136         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
3137                 r = -EFAULT;
3138                 if (copy_to_user(argp, &kvm_mce_cap_supported,
3139                                  sizeof(kvm_mce_cap_supported)))
3140                         goto out;
3141                 r = 0;
3142                 break;
3143         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
3144                 struct kvm_msr_list __user *user_msr_list = argp;
3145                 struct kvm_msr_list msr_list;
3146                 unsigned int n;
3147
3148                 r = -EFAULT;
3149                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3150                         goto out;
3151                 n = msr_list.nmsrs;
3152                 msr_list.nmsrs = num_msr_based_features;
3153                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3154                         goto out;
3155                 r = -E2BIG;
3156                 if (n < msr_list.nmsrs)
3157                         goto out;
3158                 r = -EFAULT;
3159                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
3160                                  num_msr_based_features * sizeof(u32)))
3161                         goto out;
3162                 r = 0;
3163                 break;
3164         }
3165         case KVM_GET_MSRS:
3166                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
3167                 break;
3168         }
3169         default:
3170                 r = -EINVAL;
3171         }
3172 out:
3173         return r;
3174 }
3175
3176 static void wbinvd_ipi(void *garbage)
3177 {
3178         wbinvd();
3179 }
3180
3181 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
3182 {
3183         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
3184 }
3185
3186 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
3187 {
3188         /* Address WBINVD may be executed by guest */
3189         if (need_emulate_wbinvd(vcpu)) {
3190                 if (kvm_x86_ops->has_wbinvd_exit())
3191                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
3192                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
3193                         smp_call_function_single(vcpu->cpu,
3194                                         wbinvd_ipi, NULL, 1);
3195         }
3196
3197         kvm_x86_ops->vcpu_load(vcpu, cpu);
3198
3199         /* Apply any externally detected TSC adjustments (due to suspend) */
3200         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
3201                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
3202                 vcpu->arch.tsc_offset_adjustment = 0;
3203                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3204         }
3205
3206         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
3207                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
3208                                 rdtsc() - vcpu->arch.last_host_tsc;
3209                 if (tsc_delta < 0)
3210                         mark_tsc_unstable("KVM discovered backwards TSC");
3211
3212                 if (kvm_check_tsc_unstable()) {
3213                         u64 offset = kvm_compute_tsc_offset(vcpu,
3214                                                 vcpu->arch.last_guest_tsc);
3215                         kvm_vcpu_write_tsc_offset(vcpu, offset);
3216                         vcpu->arch.tsc_catchup = 1;
3217                 }
3218
3219                 if (kvm_lapic_hv_timer_in_use(vcpu))
3220                         kvm_lapic_restart_hv_timer(vcpu);
3221
3222                 /*
3223                  * On a host with synchronized TSC, there is no need to update
3224                  * kvmclock on vcpu->cpu migration
3225                  */
3226                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
3227                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
3228                 if (vcpu->cpu != cpu)
3229                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
3230                 vcpu->cpu = cpu;
3231         }
3232
3233         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3234 }
3235
3236 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
3237 {
3238         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3239                 return;
3240
3241         vcpu->arch.st.steal.preempted = KVM_VCPU_PREEMPTED;
3242
3243         kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.st.stime,
3244                         &vcpu->arch.st.steal.preempted,
3245                         offsetof(struct kvm_steal_time, preempted),
3246                         sizeof(vcpu->arch.st.steal.preempted));
3247 }
3248
3249 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
3250 {
3251         int idx;
3252
3253         if (vcpu->preempted)
3254                 vcpu->arch.preempted_in_kernel = !kvm_x86_ops->get_cpl(vcpu);
3255
3256         /*
3257          * Disable page faults because we're in atomic context here.
3258          * kvm_write_guest_offset_cached() would call might_fault()
3259          * that relies on pagefault_disable() to tell if there's a
3260          * bug. NOTE: the write to guest memory may not go through if
3261          * during postcopy live migration or if there's heavy guest
3262          * paging.
3263          */
3264         pagefault_disable();
3265         /*
3266          * kvm_memslots() will be called by
3267          * kvm_write_guest_offset_cached() so take the srcu lock.
3268          */
3269         idx = srcu_read_lock(&vcpu->kvm->srcu);
3270         kvm_steal_time_set_preempted(vcpu);
3271         srcu_read_unlock(&vcpu->kvm->srcu, idx);
3272         pagefault_enable();
3273         kvm_x86_ops->vcpu_put(vcpu);
3274         vcpu->arch.last_host_tsc = rdtsc();
3275         /*
3276          * If userspace has set any breakpoints or watchpoints, dr6 is restored
3277          * on every vmexit, but if not, we might have a stale dr6 from the
3278          * guest. do_debug expects dr6 to be cleared after it runs, do the same.
3279          */
3280         set_debugreg(0, 6);
3281 }
3282
3283 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
3284                                     struct kvm_lapic_state *s)
3285 {
3286         if (vcpu->arch.apicv_active)
3287                 kvm_x86_ops->sync_pir_to_irr(vcpu);
3288
3289         return kvm_apic_get_state(vcpu, s);
3290 }
3291
3292 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
3293                                     struct kvm_lapic_state *s)
3294 {
3295         int r;
3296
3297         r = kvm_apic_set_state(vcpu, s);
3298         if (r)
3299                 return r;
3300         update_cr8_intercept(vcpu);
3301
3302         return 0;
3303 }
3304
3305 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
3306 {
3307         return (!lapic_in_kernel(vcpu) ||
3308                 kvm_apic_accept_pic_intr(vcpu));
3309 }
3310
3311 /*
3312  * if userspace requested an interrupt window, check that the
3313  * interrupt window is open.
3314  *
3315  * No need to exit to userspace if we already have an interrupt queued.
3316  */
3317 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
3318 {
3319         return kvm_arch_interrupt_allowed(vcpu) &&
3320                 !kvm_cpu_has_interrupt(vcpu) &&
3321                 !kvm_event_needs_reinjection(vcpu) &&
3322                 kvm_cpu_accept_dm_intr(vcpu);
3323 }
3324
3325 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
3326                                     struct kvm_interrupt *irq)
3327 {
3328         if (irq->irq >= KVM_NR_INTERRUPTS)
3329                 return -EINVAL;
3330
3331         if (!irqchip_in_kernel(vcpu->kvm)) {
3332                 kvm_queue_interrupt(vcpu, irq->irq, false);
3333                 kvm_make_request(KVM_REQ_EVENT, vcpu);
3334                 return 0;
3335         }
3336
3337         /*
3338          * With in-kernel LAPIC, we only use this to inject EXTINT, so
3339          * fail for in-kernel 8259.
3340          */
3341         if (pic_in_kernel(vcpu->kvm))
3342                 return -ENXIO;
3343
3344         if (vcpu->arch.pending_external_vector != -1)
3345                 return -EEXIST;
3346
3347         vcpu->arch.pending_external_vector = irq->irq;
3348         kvm_make_request(KVM_REQ_EVENT, vcpu);
3349         return 0;
3350 }
3351
3352 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
3353 {
3354         kvm_inject_nmi(vcpu);
3355
3356         return 0;
3357 }
3358
3359 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
3360 {
3361         kvm_make_request(KVM_REQ_SMI, vcpu);
3362
3363         return 0;
3364 }
3365
3366 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
3367                                            struct kvm_tpr_access_ctl *tac)
3368 {
3369         if (tac->flags)
3370                 return -EINVAL;
3371         vcpu->arch.tpr_access_reporting = !!tac->enabled;
3372         return 0;
3373 }
3374
3375 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
3376                                         u64 mcg_cap)
3377 {
3378         int r;
3379         unsigned bank_num = mcg_cap & 0xff, bank;
3380
3381         r = -EINVAL;
3382         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
3383                 goto out;
3384         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
3385                 goto out;
3386         r = 0;
3387         vcpu->arch.mcg_cap = mcg_cap;
3388         /* Init IA32_MCG_CTL to all 1s */
3389         if (mcg_cap & MCG_CTL_P)
3390                 vcpu->arch.mcg_ctl = ~(u64)0;
3391         /* Init IA32_MCi_CTL to all 1s */
3392         for (bank = 0; bank < bank_num; bank++)
3393                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
3394
3395         if (kvm_x86_ops->setup_mce)
3396                 kvm_x86_ops->setup_mce(vcpu);
3397 out:
3398         return r;
3399 }
3400
3401 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
3402                                       struct kvm_x86_mce *mce)
3403 {
3404         u64 mcg_cap = vcpu->arch.mcg_cap;
3405         unsigned bank_num = mcg_cap & 0xff;
3406         u64 *banks = vcpu->arch.mce_banks;
3407
3408         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
3409                 return -EINVAL;
3410         /*
3411          * if IA32_MCG_CTL is not all 1s, the uncorrected error
3412          * reporting is disabled
3413          */
3414         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
3415             vcpu->arch.mcg_ctl != ~(u64)0)
3416                 return 0;
3417         banks += 4 * mce->bank;
3418         /*
3419          * if IA32_MCi_CTL is not all 1s, the uncorrected error
3420          * reporting is disabled for the bank
3421          */
3422         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
3423                 return 0;
3424         if (mce->status & MCI_STATUS_UC) {
3425                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
3426                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
3427                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3428                         return 0;
3429                 }
3430                 if (banks[1] & MCI_STATUS_VAL)
3431                         mce->status |= MCI_STATUS_OVER;
3432                 banks[2] = mce->addr;
3433                 banks[3] = mce->misc;
3434                 vcpu->arch.mcg_status = mce->mcg_status;
3435                 banks[1] = mce->status;
3436                 kvm_queue_exception(vcpu, MC_VECTOR);
3437         } else if (!(banks[1] & MCI_STATUS_VAL)
3438                    || !(banks[1] & MCI_STATUS_UC)) {
3439                 if (banks[1] & MCI_STATUS_VAL)
3440                         mce->status |= MCI_STATUS_OVER;
3441                 banks[2] = mce->addr;
3442                 banks[3] = mce->misc;
3443                 banks[1] = mce->status;
3444         } else
3445                 banks[1] |= MCI_STATUS_OVER;
3446         return 0;
3447 }
3448
3449 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
3450                                                struct kvm_vcpu_events *events)
3451 {
3452         process_nmi(vcpu);
3453
3454         /*
3455          * The API doesn't provide the instruction length for software
3456          * exceptions, so don't report them. As long as the guest RIP
3457          * isn't advanced, we should expect to encounter the exception
3458          * again.
3459          */
3460         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
3461                 events->exception.injected = 0;
3462                 events->exception.pending = 0;
3463         } else {
3464                 events->exception.injected = vcpu->arch.exception.injected;
3465                 events->exception.pending = vcpu->arch.exception.pending;
3466                 /*
3467                  * For ABI compatibility, deliberately conflate
3468                  * pending and injected exceptions when
3469                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
3470                  */
3471                 if (!vcpu->kvm->arch.exception_payload_enabled)
3472                         events->exception.injected |=
3473                                 vcpu->arch.exception.pending;
3474         }
3475         events->exception.nr = vcpu->arch.exception.nr;
3476         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
3477         events->exception.error_code = vcpu->arch.exception.error_code;
3478         events->exception_has_payload = vcpu->arch.exception.has_payload;
3479         events->exception_payload = vcpu->arch.exception.payload;
3480
3481         events->interrupt.injected =
3482                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
3483         events->interrupt.nr = vcpu->arch.interrupt.nr;
3484         events->interrupt.soft = 0;
3485         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
3486
3487         events->nmi.injected = vcpu->arch.nmi_injected;
3488         events->nmi.pending = vcpu->arch.nmi_pending != 0;
3489         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
3490         events->nmi.pad = 0;
3491
3492         events->sipi_vector = 0; /* never valid when reporting to user space */
3493
3494         events->smi.smm = is_smm(vcpu);
3495         events->smi.pending = vcpu->arch.smi_pending;
3496         events->smi.smm_inside_nmi =
3497                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
3498         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
3499
3500         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
3501                          | KVM_VCPUEVENT_VALID_SHADOW
3502                          | KVM_VCPUEVENT_VALID_SMM);
3503         if (vcpu->kvm->arch.exception_payload_enabled)
3504                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
3505
3506         memset(&events->reserved, 0, sizeof(events->reserved));
3507 }
3508
3509 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags);
3510
3511 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
3512                                               struct kvm_vcpu_events *events)
3513 {
3514         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3515                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3516                               | KVM_VCPUEVENT_VALID_SHADOW
3517                               | KVM_VCPUEVENT_VALID_SMM
3518                               | KVM_VCPUEVENT_VALID_PAYLOAD))
3519                 return -EINVAL;
3520
3521         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
3522                 if (!vcpu->kvm->arch.exception_payload_enabled)
3523                         return -EINVAL;
3524                 if (events->exception.pending)
3525                         events->exception.injected = 0;
3526                 else
3527                         events->exception_has_payload = 0;
3528         } else {
3529                 events->exception.pending = 0;
3530                 events->exception_has_payload = 0;
3531         }
3532
3533         if ((events->exception.injected || events->exception.pending) &&
3534             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
3535                 return -EINVAL;
3536
3537         /* INITs are latched while in SMM */
3538         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
3539             (events->smi.smm || events->smi.pending) &&
3540             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
3541                 return -EINVAL;
3542
3543         process_nmi(vcpu);
3544         vcpu->arch.exception.injected = events->exception.injected;
3545         vcpu->arch.exception.pending = events->exception.pending;
3546         vcpu->arch.exception.nr = events->exception.nr;
3547         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3548         vcpu->arch.exception.error_code = events->exception.error_code;
3549         vcpu->arch.exception.has_payload = events->exception_has_payload;
3550         vcpu->arch.exception.payload = events->exception_payload;
3551
3552         vcpu->arch.interrupt.injected = events->interrupt.injected;
3553         vcpu->arch.interrupt.nr = events->interrupt.nr;
3554         vcpu->arch.interrupt.soft = events->interrupt.soft;
3555         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3556                 kvm_x86_ops->set_interrupt_shadow(vcpu,
3557                                                   events->interrupt.shadow);
3558
3559         vcpu->arch.nmi_injected = events->nmi.injected;
3560         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3561                 vcpu->arch.nmi_pending = events->nmi.pending;
3562         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3563
3564         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3565             lapic_in_kernel(vcpu))
3566                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3567
3568         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
3569                 u32 hflags = vcpu->arch.hflags;
3570                 if (events->smi.smm)
3571                         hflags |= HF_SMM_MASK;
3572                 else
3573                         hflags &= ~HF_SMM_MASK;
3574                 kvm_set_hflags(vcpu, hflags);
3575
3576                 vcpu->arch.smi_pending = events->smi.pending;
3577
3578                 if (events->smi.smm) {
3579                         if (events->smi.smm_inside_nmi)
3580                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3581                         else
3582                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3583                         if (lapic_in_kernel(vcpu)) {
3584                                 if (events->smi.latched_init)
3585                                         set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3586                                 else
3587                                         clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3588                         }
3589                 }
3590         }
3591
3592         kvm_make_request(KVM_REQ_EVENT, vcpu);
3593
3594         return 0;
3595 }
3596
3597 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3598                                              struct kvm_debugregs *dbgregs)
3599 {
3600         unsigned long val;
3601
3602         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3603         kvm_get_dr(vcpu, 6, &val);
3604         dbgregs->dr6 = val;
3605         dbgregs->dr7 = vcpu->arch.dr7;
3606         dbgregs->flags = 0;
3607         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3608 }
3609
3610 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3611                                             struct kvm_debugregs *dbgregs)
3612 {
3613         if (dbgregs->flags)
3614                 return -EINVAL;
3615
3616         if (dbgregs->dr6 & ~0xffffffffull)
3617                 return -EINVAL;
3618         if (dbgregs->dr7 & ~0xffffffffull)
3619                 return -EINVAL;
3620
3621         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3622         kvm_update_dr0123(vcpu);
3623         vcpu->arch.dr6 = dbgregs->dr6;
3624         kvm_update_dr6(vcpu);
3625         vcpu->arch.dr7 = dbgregs->dr7;
3626         kvm_update_dr7(vcpu);
3627
3628         return 0;
3629 }
3630
3631 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3632
3633 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3634 {
3635         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3636         u64 xstate_bv = xsave->header.xfeatures;
3637         u64 valid;
3638
3639         /*
3640          * Copy legacy XSAVE area, to avoid complications with CPUID
3641          * leaves 0 and 1 in the loop below.
3642          */
3643         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3644
3645         /* Set XSTATE_BV */
3646         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
3647         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3648
3649         /*
3650          * Copy each region from the possibly compacted offset to the
3651          * non-compacted offset.
3652          */
3653         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3654         while (valid) {
3655                 u64 feature = valid & -valid;
3656                 int index = fls64(feature) - 1;
3657                 void *src = get_xsave_addr(xsave, feature);
3658
3659                 if (src) {
3660                         u32 size, offset, ecx, edx;
3661                         cpuid_count(XSTATE_CPUID, index,
3662                                     &size, &offset, &ecx, &edx);
3663                         if (feature == XFEATURE_MASK_PKRU)
3664                                 memcpy(dest + offset, &vcpu->arch.pkru,
3665                                        sizeof(vcpu->arch.pkru));
3666                         else
3667                                 memcpy(dest + offset, src, size);
3668
3669                 }
3670
3671                 valid -= feature;
3672         }
3673 }
3674
3675 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3676 {
3677         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3678         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3679         u64 valid;
3680
3681         /*
3682          * Copy legacy XSAVE area, to avoid complications with CPUID
3683          * leaves 0 and 1 in the loop below.
3684          */
3685         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3686
3687         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3688         xsave->header.xfeatures = xstate_bv;
3689         if (boot_cpu_has(X86_FEATURE_XSAVES))
3690                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3691
3692         /*
3693          * Copy each region from the non-compacted offset to the
3694          * possibly compacted offset.
3695          */
3696         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3697         while (valid) {
3698                 u64 feature = valid & -valid;
3699                 int index = fls64(feature) - 1;
3700                 void *dest = get_xsave_addr(xsave, feature);
3701
3702                 if (dest) {
3703                         u32 size, offset, ecx, edx;
3704                         cpuid_count(XSTATE_CPUID, index,
3705                                     &size, &offset, &ecx, &edx);
3706                         if (feature == XFEATURE_MASK_PKRU)
3707                                 memcpy(&vcpu->arch.pkru, src + offset,
3708                                        sizeof(vcpu->arch.pkru));
3709                         else
3710                                 memcpy(dest, src + offset, size);
3711                 }
3712
3713                 valid -= feature;
3714         }
3715 }
3716
3717 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3718                                          struct kvm_xsave *guest_xsave)
3719 {
3720         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3721                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3722                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3723         } else {
3724                 memcpy(guest_xsave->region,
3725                         &vcpu->arch.guest_fpu.state.fxsave,
3726                         sizeof(struct fxregs_state));
3727                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3728                         XFEATURE_MASK_FPSSE;
3729         }
3730 }
3731
3732 #define XSAVE_MXCSR_OFFSET 24
3733
3734 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3735                                         struct kvm_xsave *guest_xsave)
3736 {
3737         u64 xstate_bv =
3738                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3739         u32 mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
3740
3741         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3742                 /*
3743                  * Here we allow setting states that are not present in
3744                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3745                  * with old userspace.
3746                  */
3747                 if (xstate_bv & ~kvm_supported_xcr0() ||
3748                         mxcsr & ~mxcsr_feature_mask)
3749                         return -EINVAL;
3750                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3751         } else {
3752                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
3753                         mxcsr & ~mxcsr_feature_mask)
3754                         return -EINVAL;
3755                 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3756                         guest_xsave->region, sizeof(struct fxregs_state));
3757         }
3758         return 0;
3759 }
3760
3761 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3762                                         struct kvm_xcrs *guest_xcrs)
3763 {
3764         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
3765                 guest_xcrs->nr_xcrs = 0;
3766                 return;
3767         }
3768
3769         guest_xcrs->nr_xcrs = 1;
3770         guest_xcrs->flags = 0;
3771         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3772         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3773 }
3774
3775 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3776                                        struct kvm_xcrs *guest_xcrs)
3777 {
3778         int i, r = 0;
3779
3780         if (!boot_cpu_has(X86_FEATURE_XSAVE))
3781                 return -EINVAL;
3782
3783         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3784                 return -EINVAL;
3785
3786         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3787                 /* Only support XCR0 currently */
3788                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3789                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3790                                 guest_xcrs->xcrs[i].value);
3791                         break;
3792                 }
3793         if (r)
3794                 r = -EINVAL;
3795         return r;
3796 }
3797
3798 /*
3799  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3800  * stopped by the hypervisor.  This function will be called from the host only.
3801  * EINVAL is returned when the host attempts to set the flag for a guest that
3802  * does not support pv clocks.
3803  */
3804 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3805 {
3806         if (!vcpu->arch.pv_time_enabled)
3807                 return -EINVAL;
3808         vcpu->arch.pvclock_set_guest_stopped_request = true;
3809         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3810         return 0;
3811 }
3812
3813 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
3814                                      struct kvm_enable_cap *cap)
3815 {
3816         int r;
3817         uint16_t vmcs_version;
3818         void __user *user_ptr;
3819
3820         if (cap->flags)
3821                 return -EINVAL;
3822
3823         switch (cap->cap) {
3824         case KVM_CAP_HYPERV_SYNIC2:
3825                 if (cap->args[0])
3826                         return -EINVAL;
3827         case KVM_CAP_HYPERV_SYNIC:
3828                 if (!irqchip_in_kernel(vcpu->kvm))
3829                         return -EINVAL;
3830                 return kvm_hv_activate_synic(vcpu, cap->cap ==
3831                                              KVM_CAP_HYPERV_SYNIC2);
3832         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
3833                 r = kvm_x86_ops->nested_enable_evmcs(vcpu, &vmcs_version);
3834                 if (!r) {
3835                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
3836                         if (copy_to_user(user_ptr, &vmcs_version,
3837                                          sizeof(vmcs_version)))
3838                                 r = -EFAULT;
3839                 }
3840                 return r;
3841
3842         default:
3843                 return -EINVAL;
3844         }
3845 }
3846
3847 long kvm_arch_vcpu_ioctl(struct file *filp,
3848                          unsigned int ioctl, unsigned long arg)
3849 {
3850         struct kvm_vcpu *vcpu = filp->private_data;
3851         void __user *argp = (void __user *)arg;
3852         int r;
3853         union {
3854                 struct kvm_lapic_state *lapic;
3855                 struct kvm_xsave *xsave;
3856                 struct kvm_xcrs *xcrs;
3857                 void *buffer;
3858         } u;
3859
3860         vcpu_load(vcpu);
3861
3862         u.buffer = NULL;
3863         switch (ioctl) {
3864         case KVM_GET_LAPIC: {
3865                 r = -EINVAL;
3866                 if (!lapic_in_kernel(vcpu))
3867                         goto out;
3868                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3869
3870                 r = -ENOMEM;
3871                 if (!u.lapic)
3872                         goto out;
3873                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3874                 if (r)
3875                         goto out;
3876                 r = -EFAULT;
3877                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3878                         goto out;
3879                 r = 0;
3880                 break;
3881         }
3882         case KVM_SET_LAPIC: {
3883                 r = -EINVAL;
3884                 if (!lapic_in_kernel(vcpu))
3885                         goto out;
3886                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3887                 if (IS_ERR(u.lapic)) {
3888                         r = PTR_ERR(u.lapic);
3889                         goto out_nofree;
3890                 }
3891
3892                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3893                 break;
3894         }
3895         case KVM_INTERRUPT: {
3896                 struct kvm_interrupt irq;
3897
3898                 r = -EFAULT;
3899                 if (copy_from_user(&irq, argp, sizeof(irq)))
3900                         goto out;
3901                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3902                 break;
3903         }
3904         case KVM_NMI: {
3905                 r = kvm_vcpu_ioctl_nmi(vcpu);
3906                 break;
3907         }
3908         case KVM_SMI: {
3909                 r = kvm_vcpu_ioctl_smi(vcpu);
3910                 break;
3911         }
3912         case KVM_SET_CPUID: {
3913                 struct kvm_cpuid __user *cpuid_arg = argp;
3914                 struct kvm_cpuid cpuid;
3915
3916                 r = -EFAULT;
3917                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3918                         goto out;
3919                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3920                 break;
3921         }
3922         case KVM_SET_CPUID2: {
3923                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3924                 struct kvm_cpuid2 cpuid;
3925
3926                 r = -EFAULT;
3927                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3928                         goto out;
3929                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3930                                               cpuid_arg->entries);
3931                 break;
3932         }
3933         case KVM_GET_CPUID2: {
3934                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3935                 struct kvm_cpuid2 cpuid;
3936
3937                 r = -EFAULT;
3938                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3939                         goto out;
3940                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3941                                               cpuid_arg->entries);
3942                 if (r)
3943                         goto out;
3944                 r = -EFAULT;
3945                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3946                         goto out;
3947                 r = 0;
3948                 break;
3949         }
3950         case KVM_GET_MSRS: {
3951                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
3952                 r = msr_io(vcpu, argp, do_get_msr, 1);
3953                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3954                 break;
3955         }
3956         case KVM_SET_MSRS: {
3957                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
3958                 r = msr_io(vcpu, argp, do_set_msr, 0);
3959                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3960                 break;
3961         }
3962         case KVM_TPR_ACCESS_REPORTING: {
3963                 struct kvm_tpr_access_ctl tac;
3964
3965                 r = -EFAULT;
3966                 if (copy_from_user(&tac, argp, sizeof(tac)))
3967                         goto out;
3968                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3969                 if (r)
3970                         goto out;
3971                 r = -EFAULT;
3972                 if (copy_to_user(argp, &tac, sizeof(tac)))
3973                         goto out;
3974                 r = 0;
3975                 break;
3976         };
3977         case KVM_SET_VAPIC_ADDR: {
3978                 struct kvm_vapic_addr va;
3979                 int idx;
3980
3981                 r = -EINVAL;
3982                 if (!lapic_in_kernel(vcpu))
3983                         goto out;
3984                 r = -EFAULT;
3985                 if (copy_from_user(&va, argp, sizeof(va)))
3986                         goto out;
3987                 idx = srcu_read_lock(&vcpu->kvm->srcu);
3988                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3989                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3990                 break;
3991         }
3992         case KVM_X86_SETUP_MCE: {
3993                 u64 mcg_cap;
3994
3995                 r = -EFAULT;
3996                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
3997                         goto out;
3998                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3999                 break;
4000         }
4001         case KVM_X86_SET_MCE: {
4002                 struct kvm_x86_mce mce;
4003
4004                 r = -EFAULT;
4005                 if (copy_from_user(&mce, argp, sizeof(mce)))
4006                         goto out;
4007                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
4008                 break;
4009         }
4010         case KVM_GET_VCPU_EVENTS: {
4011                 struct kvm_vcpu_events events;
4012
4013                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
4014
4015                 r = -EFAULT;
4016                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
4017                         break;
4018                 r = 0;
4019                 break;
4020         }
4021         case KVM_SET_VCPU_EVENTS: {
4022                 struct kvm_vcpu_events events;
4023
4024                 r = -EFAULT;
4025                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
4026                         break;
4027
4028                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
4029                 break;
4030         }
4031         case KVM_GET_DEBUGREGS: {
4032                 struct kvm_debugregs dbgregs;
4033
4034                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
4035
4036                 r = -EFAULT;
4037                 if (copy_to_user(argp, &dbgregs,
4038                                  sizeof(struct kvm_debugregs)))
4039                         break;
4040                 r = 0;
4041                 break;
4042         }
4043         case KVM_SET_DEBUGREGS: {
4044                 struct kvm_debugregs dbgregs;
4045
4046                 r = -EFAULT;
4047                 if (copy_from_user(&dbgregs, argp,
4048                                    sizeof(struct kvm_debugregs)))
4049                         break;
4050
4051                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
4052                 break;
4053         }
4054         case KVM_GET_XSAVE: {
4055                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
4056                 r = -ENOMEM;
4057                 if (!u.xsave)
4058                         break;
4059
4060                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
4061
4062                 r = -EFAULT;
4063                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
4064                         break;
4065                 r = 0;
4066                 break;
4067         }
4068         case KVM_SET_XSAVE: {
4069                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
4070                 if (IS_ERR(u.xsave)) {
4071                         r = PTR_ERR(u.xsave);
4072                         goto out_nofree;
4073                 }
4074
4075                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
4076                 break;
4077         }
4078         case KVM_GET_XCRS: {
4079                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
4080                 r = -ENOMEM;
4081                 if (!u.xcrs)
4082                         break;
4083
4084                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
4085
4086                 r = -EFAULT;
4087                 if (copy_to_user(argp, u.xcrs,
4088                                  sizeof(struct kvm_xcrs)))
4089                         break;
4090                 r = 0;
4091                 break;
4092         }
4093         case KVM_SET_XCRS: {
4094                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
4095                 if (IS_ERR(u.xcrs)) {
4096                         r = PTR_ERR(u.xcrs);
4097                         goto out_nofree;
4098                 }
4099
4100                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
4101                 break;
4102         }
4103         case KVM_SET_TSC_KHZ: {
4104                 u32 user_tsc_khz;
4105
4106                 r = -EINVAL;
4107                 user_tsc_khz = (u32)arg;
4108
4109                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
4110                         goto out;
4111
4112                 if (user_tsc_khz == 0)
4113                         user_tsc_khz = tsc_khz;
4114
4115                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
4116                         r = 0;
4117
4118                 goto out;
4119         }
4120         case KVM_GET_TSC_KHZ: {
4121                 r = vcpu->arch.virtual_tsc_khz;
4122                 goto out;
4123         }
4124         case KVM_KVMCLOCK_CTRL: {
4125                 r = kvm_set_guest_paused(vcpu);
4126                 goto out;
4127         }
4128         case KVM_ENABLE_CAP: {
4129                 struct kvm_enable_cap cap;
4130
4131                 r = -EFAULT;
4132                 if (copy_from_user(&cap, argp, sizeof(cap)))
4133                         goto out;
4134                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
4135                 break;
4136         }
4137         case KVM_GET_NESTED_STATE: {
4138                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4139                 u32 user_data_size;
4140
4141                 r = -EINVAL;
4142                 if (!kvm_x86_ops->get_nested_state)
4143                         break;
4144
4145                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
4146                 r = -EFAULT;
4147                 if (get_user(user_data_size, &user_kvm_nested_state->size))
4148                         break;
4149
4150                 r = kvm_x86_ops->get_nested_state(vcpu, user_kvm_nested_state,
4151                                                   user_data_size);
4152                 if (r < 0)
4153                         break;
4154
4155                 if (r > user_data_size) {
4156                         if (put_user(r, &user_kvm_nested_state->size))
4157                                 r = -EFAULT;
4158                         else
4159                                 r = -E2BIG;
4160                         break;
4161                 }
4162
4163                 r = 0;
4164                 break;
4165         }
4166         case KVM_SET_NESTED_STATE: {
4167                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4168                 struct kvm_nested_state kvm_state;
4169
4170                 r = -EINVAL;
4171                 if (!kvm_x86_ops->set_nested_state)
4172                         break;
4173
4174                 r = -EFAULT;
4175                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
4176                         break;
4177
4178                 r = -EINVAL;
4179                 if (kvm_state.size < sizeof(kvm_state))
4180                         break;
4181
4182                 if (kvm_state.flags &
4183                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
4184                       | KVM_STATE_NESTED_EVMCS))
4185                         break;
4186
4187                 /* nested_run_pending implies guest_mode.  */
4188                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
4189                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
4190                         break;
4191
4192                 r = kvm_x86_ops->set_nested_state(vcpu, user_kvm_nested_state, &kvm_state);
4193                 break;
4194         }
4195         default:
4196                 r = -EINVAL;
4197         }
4198 out:
4199         kfree(u.buffer);
4200 out_nofree:
4201         vcpu_put(vcpu);
4202         return r;
4203 }
4204
4205 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
4206 {
4207         return VM_FAULT_SIGBUS;
4208 }
4209
4210 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
4211 {
4212         int ret;
4213
4214         if (addr > (unsigned int)(-3 * PAGE_SIZE))
4215                 return -EINVAL;
4216         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
4217         return ret;
4218 }
4219
4220 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
4221                                               u64 ident_addr)
4222 {
4223         return kvm_x86_ops->set_identity_map_addr(kvm, ident_addr);
4224 }
4225
4226 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
4227                                           u32 kvm_nr_mmu_pages)
4228 {
4229         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
4230                 return -EINVAL;
4231
4232         mutex_lock(&kvm->slots_lock);
4233
4234         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
4235         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
4236
4237         mutex_unlock(&kvm->slots_lock);
4238         return 0;
4239 }
4240
4241 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
4242 {
4243         return kvm->arch.n_max_mmu_pages;
4244 }
4245
4246 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
4247 {
4248         struct kvm_pic *pic = kvm->arch.vpic;
4249         int r;
4250
4251         r = 0;
4252         switch (chip->chip_id) {
4253         case KVM_IRQCHIP_PIC_MASTER:
4254                 memcpy(&chip->chip.pic, &pic->pics[0],
4255                         sizeof(struct kvm_pic_state));
4256                 break;
4257         case KVM_IRQCHIP_PIC_SLAVE:
4258                 memcpy(&chip->chip.pic, &pic->pics[1],
4259                         sizeof(struct kvm_pic_state));
4260                 break;
4261         case KVM_IRQCHIP_IOAPIC:
4262                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
4263                 break;
4264         default:
4265                 r = -EINVAL;
4266                 break;
4267         }
4268         return r;
4269 }
4270
4271 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
4272 {
4273         struct kvm_pic *pic = kvm->arch.vpic;
4274         int r;
4275
4276         r = 0;
4277         switch (chip->chip_id) {
4278         case KVM_IRQCHIP_PIC_MASTER:
4279                 spin_lock(&pic->lock);
4280                 memcpy(&pic->pics[0], &chip->chip.pic,
4281                         sizeof(struct kvm_pic_state));
4282                 spin_unlock(&pic->lock);
4283                 break;
4284         case KVM_IRQCHIP_PIC_SLAVE:
4285                 spin_lock(&pic->lock);
4286                 memcpy(&pic->pics[1], &chip->chip.pic,
4287                         sizeof(struct kvm_pic_state));
4288                 spin_unlock(&pic->lock);
4289                 break;
4290         case KVM_IRQCHIP_IOAPIC:
4291                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
4292                 break;
4293         default:
4294                 r = -EINVAL;
4295                 break;
4296         }
4297         kvm_pic_update_irq(pic);
4298         return r;
4299 }
4300
4301 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4302 {
4303         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
4304
4305         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
4306
4307         mutex_lock(&kps->lock);
4308         memcpy(ps, &kps->channels, sizeof(*ps));
4309         mutex_unlock(&kps->lock);
4310         return 0;
4311 }
4312
4313 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4314 {
4315         int i;
4316         struct kvm_pit *pit = kvm->arch.vpit;
4317
4318         mutex_lock(&pit->pit_state.lock);
4319         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
4320         for (i = 0; i < 3; i++)
4321                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
4322         mutex_unlock(&pit->pit_state.lock);
4323         return 0;
4324 }
4325
4326 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4327 {
4328         mutex_lock(&kvm->arch.vpit->pit_state.lock);
4329         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
4330                 sizeof(ps->channels));
4331         ps->flags = kvm->arch.vpit->pit_state.flags;
4332         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
4333         memset(&ps->reserved, 0, sizeof(ps->reserved));
4334         return 0;
4335 }
4336
4337 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4338 {
4339         int start = 0;
4340         int i;
4341         u32 prev_legacy, cur_legacy;
4342         struct kvm_pit *pit = kvm->arch.vpit;
4343
4344         mutex_lock(&pit->pit_state.lock);
4345         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
4346         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
4347         if (!prev_legacy && cur_legacy)
4348                 start = 1;
4349         memcpy(&pit->pit_state.channels, &ps->channels,
4350                sizeof(pit->pit_state.channels));
4351         pit->pit_state.flags = ps->flags;
4352         for (i = 0; i < 3; i++)
4353                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
4354                                    start && i == 0);
4355         mutex_unlock(&pit->pit_state.lock);
4356         return 0;
4357 }
4358
4359 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
4360                                  struct kvm_reinject_control *control)
4361 {
4362         struct kvm_pit *pit = kvm->arch.vpit;
4363
4364         if (!pit)
4365                 return -ENXIO;
4366
4367         /* pit->pit_state.lock was overloaded to prevent userspace from getting
4368          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
4369          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
4370          */
4371         mutex_lock(&pit->pit_state.lock);
4372         kvm_pit_set_reinject(pit, control->pit_reinject);
4373         mutex_unlock(&pit->pit_state.lock);
4374
4375         return 0;
4376 }
4377
4378 /**
4379  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
4380  * @kvm: kvm instance
4381  * @log: slot id and address to which we copy the log
4382  *
4383  * Steps 1-4 below provide general overview of dirty page logging. See
4384  * kvm_get_dirty_log_protect() function description for additional details.
4385  *
4386  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
4387  * always flush the TLB (step 4) even if previous step failed  and the dirty
4388  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
4389  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
4390  * writes will be marked dirty for next log read.
4391  *
4392  *   1. Take a snapshot of the bit and clear it if needed.
4393  *   2. Write protect the corresponding page.
4394  *   3. Copy the snapshot to the userspace.
4395  *   4. Flush TLB's if needed.
4396  */
4397 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
4398 {
4399         bool is_dirty = false;
4400         int r;
4401
4402         mutex_lock(&kvm->slots_lock);
4403
4404         /*
4405          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4406          */
4407         if (kvm_x86_ops->flush_log_dirty)
4408                 kvm_x86_ops->flush_log_dirty(kvm);
4409
4410         r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
4411
4412         /*
4413          * All the TLBs can be flushed out of mmu lock, see the comments in
4414          * kvm_mmu_slot_remove_write_access().
4415          */
4416         lockdep_assert_held(&kvm->slots_lock);
4417         if (is_dirty)
4418                 kvm_flush_remote_tlbs(kvm);
4419
4420         mutex_unlock(&kvm->slots_lock);
4421         return r;
4422 }
4423
4424 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
4425                         bool line_status)
4426 {
4427         if (!irqchip_in_kernel(kvm))
4428                 return -ENXIO;
4429
4430         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
4431                                         irq_event->irq, irq_event->level,
4432                                         line_status);
4433         return 0;
4434 }
4435
4436 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
4437                                    struct kvm_enable_cap *cap)
4438 {
4439         int r;
4440
4441         if (cap->flags)
4442                 return -EINVAL;
4443
4444         switch (cap->cap) {
4445         case KVM_CAP_DISABLE_QUIRKS:
4446                 kvm->arch.disabled_quirks = cap->args[0];
4447                 r = 0;
4448                 break;
4449         case KVM_CAP_SPLIT_IRQCHIP: {
4450                 mutex_lock(&kvm->lock);
4451                 r = -EINVAL;
4452                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
4453                         goto split_irqchip_unlock;
4454                 r = -EEXIST;
4455                 if (irqchip_in_kernel(kvm))
4456                         goto split_irqchip_unlock;
4457                 if (kvm->created_vcpus)
4458                         goto split_irqchip_unlock;
4459                 r = kvm_setup_empty_irq_routing(kvm);
4460                 if (r)
4461                         goto split_irqchip_unlock;
4462                 /* Pairs with irqchip_in_kernel. */
4463                 smp_wmb();
4464                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
4465                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
4466                 r = 0;
4467 split_irqchip_unlock:
4468                 mutex_unlock(&kvm->lock);
4469                 break;
4470         }
4471         case KVM_CAP_X2APIC_API:
4472                 r = -EINVAL;
4473                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
4474                         break;
4475
4476                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
4477                         kvm->arch.x2apic_format = true;
4478                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
4479                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
4480
4481                 r = 0;
4482                 break;
4483         case KVM_CAP_X86_DISABLE_EXITS:
4484                 r = -EINVAL;
4485                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
4486                         break;
4487
4488                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
4489                         kvm_can_mwait_in_guest())
4490                         kvm->arch.mwait_in_guest = true;
4491                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
4492                         kvm->arch.hlt_in_guest = true;
4493                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
4494                         kvm->arch.pause_in_guest = true;
4495                 r = 0;
4496                 break;
4497         case KVM_CAP_MSR_PLATFORM_INFO:
4498                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
4499                 r = 0;
4500                 break;
4501         case KVM_CAP_EXCEPTION_PAYLOAD:
4502                 kvm->arch.exception_payload_enabled = cap->args[0];
4503                 r = 0;
4504                 break;
4505         default:
4506                 r = -EINVAL;
4507                 break;
4508         }
4509         return r;
4510 }
4511
4512 long kvm_arch_vm_ioctl(struct file *filp,
4513                        unsigned int ioctl, unsigned long arg)
4514 {
4515         struct kvm *kvm = filp->private_data;
4516         void __user *argp = (void __user *)arg;
4517         int r = -ENOTTY;
4518         /*
4519          * This union makes it completely explicit to gcc-3.x
4520          * that these two variables' stack usage should be
4521          * combined, not added together.
4522          */
4523         union {
4524                 struct kvm_pit_state ps;
4525                 struct kvm_pit_state2 ps2;
4526                 struct kvm_pit_config pit_config;
4527         } u;
4528
4529         switch (ioctl) {
4530         case KVM_SET_TSS_ADDR:
4531                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
4532                 break;
4533         case KVM_SET_IDENTITY_MAP_ADDR: {
4534                 u64 ident_addr;
4535
4536                 mutex_lock(&kvm->lock);
4537                 r = -EINVAL;
4538                 if (kvm->created_vcpus)
4539                         goto set_identity_unlock;
4540                 r = -EFAULT;
4541                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
4542                         goto set_identity_unlock;
4543                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
4544 set_identity_unlock:
4545                 mutex_unlock(&kvm->lock);
4546                 break;
4547         }
4548         case KVM_SET_NR_MMU_PAGES:
4549                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
4550                 break;
4551         case KVM_GET_NR_MMU_PAGES:
4552                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
4553                 break;
4554         case KVM_CREATE_IRQCHIP: {
4555                 mutex_lock(&kvm->lock);
4556
4557                 r = -EEXIST;
4558                 if (irqchip_in_kernel(kvm))
4559                         goto create_irqchip_unlock;
4560
4561                 r = -EINVAL;
4562                 if (kvm->created_vcpus)
4563                         goto create_irqchip_unlock;
4564
4565                 r = kvm_pic_init(kvm);
4566                 if (r)
4567                         goto create_irqchip_unlock;
4568
4569                 r = kvm_ioapic_init(kvm);
4570                 if (r) {
4571                         kvm_pic_destroy(kvm);
4572                         goto create_irqchip_unlock;
4573                 }
4574
4575                 r = kvm_setup_default_irq_routing(kvm);
4576                 if (r) {
4577                         kvm_ioapic_destroy(kvm);
4578                         kvm_pic_destroy(kvm);
4579                         goto create_irqchip_unlock;
4580                 }
4581                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4582                 smp_wmb();
4583                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
4584         create_irqchip_unlock:
4585                 mutex_unlock(&kvm->lock);
4586                 break;
4587         }
4588         case KVM_CREATE_PIT:
4589                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
4590                 goto create_pit;
4591         case KVM_CREATE_PIT2:
4592                 r = -EFAULT;
4593                 if (copy_from_user(&u.pit_config, argp,
4594                                    sizeof(struct kvm_pit_config)))
4595                         goto out;
4596         create_pit:
4597                 mutex_lock(&kvm->lock);
4598                 r = -EEXIST;
4599                 if (kvm->arch.vpit)
4600                         goto create_pit_unlock;
4601                 r = -ENOMEM;
4602                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
4603                 if (kvm->arch.vpit)
4604                         r = 0;
4605         create_pit_unlock:
4606                 mutex_unlock(&kvm->lock);
4607                 break;
4608         case KVM_GET_IRQCHIP: {
4609                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4610                 struct kvm_irqchip *chip;
4611
4612                 chip = memdup_user(argp, sizeof(*chip));
4613                 if (IS_ERR(chip)) {
4614                         r = PTR_ERR(chip);
4615                         goto out;
4616                 }
4617
4618                 r = -ENXIO;
4619                 if (!irqchip_kernel(kvm))
4620                         goto get_irqchip_out;
4621                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
4622                 if (r)
4623                         goto get_irqchip_out;
4624                 r = -EFAULT;
4625                 if (copy_to_user(argp, chip, sizeof(*chip)))
4626                         goto get_irqchip_out;
4627                 r = 0;
4628         get_irqchip_out:
4629                 kfree(chip);
4630                 break;
4631         }
4632         case KVM_SET_IRQCHIP: {
4633                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4634                 struct kvm_irqchip *chip;
4635
4636                 chip = memdup_user(argp, sizeof(*chip));
4637                 if (IS_ERR(chip)) {
4638                         r = PTR_ERR(chip);
4639                         goto out;
4640                 }
4641
4642                 r = -ENXIO;
4643                 if (!irqchip_kernel(kvm))
4644                         goto set_irqchip_out;
4645                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
4646                 if (r)
4647                         goto set_irqchip_out;
4648                 r = 0;
4649         set_irqchip_out:
4650                 kfree(chip);
4651                 break;
4652         }
4653         case KVM_GET_PIT: {
4654                 r = -EFAULT;
4655                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
4656                         goto out;
4657                 r = -ENXIO;
4658                 if (!kvm->arch.vpit)
4659                         goto out;
4660                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
4661                 if (r)
4662                         goto out;
4663                 r = -EFAULT;
4664                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
4665                         goto out;
4666                 r = 0;
4667                 break;
4668         }
4669         case KVM_SET_PIT: {
4670                 r = -EFAULT;
4671                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
4672                         goto out;
4673                 r = -ENXIO;
4674                 if (!kvm->arch.vpit)
4675                         goto out;
4676                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
4677                 break;
4678         }
4679         case KVM_GET_PIT2: {
4680                 r = -ENXIO;
4681                 if (!kvm->arch.vpit)
4682                         goto out;
4683                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
4684                 if (r)
4685                         goto out;
4686                 r = -EFAULT;
4687                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
4688                         goto out;
4689                 r = 0;
4690                 break;
4691         }
4692         case KVM_SET_PIT2: {
4693                 r = -EFAULT;
4694                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
4695                         goto out;
4696                 r = -ENXIO;
4697                 if (!kvm->arch.vpit)
4698                         goto out;
4699                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
4700                 break;
4701         }
4702         case KVM_REINJECT_CONTROL: {
4703                 struct kvm_reinject_control control;
4704                 r =  -EFAULT;
4705                 if (copy_from_user(&control, argp, sizeof(control)))
4706                         goto out;
4707                 r = kvm_vm_ioctl_reinject(kvm, &control);
4708                 break;
4709         }
4710         case KVM_SET_BOOT_CPU_ID:
4711                 r = 0;
4712                 mutex_lock(&kvm->lock);
4713                 if (kvm->created_vcpus)
4714                         r = -EBUSY;
4715                 else
4716                         kvm->arch.bsp_vcpu_id = arg;
4717                 mutex_unlock(&kvm->lock);
4718                 break;
4719         case KVM_XEN_HVM_CONFIG: {
4720                 struct kvm_xen_hvm_config xhc;
4721                 r = -EFAULT;
4722                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
4723                         goto out;
4724                 r = -EINVAL;
4725                 if (xhc.flags)
4726                         goto out;
4727                 memcpy(&kvm->arch.xen_hvm_config, &xhc, sizeof(xhc));
4728                 r = 0;
4729                 break;
4730         }
4731         case KVM_SET_CLOCK: {
4732                 struct kvm_clock_data user_ns;
4733                 u64 now_ns;
4734
4735                 r = -EFAULT;
4736                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
4737                         goto out;
4738
4739                 r = -EINVAL;
4740                 if (user_ns.flags)
4741                         goto out;
4742
4743                 r = 0;
4744                 /*
4745                  * TODO: userspace has to take care of races with VCPU_RUN, so
4746                  * kvm_gen_update_masterclock() can be cut down to locked
4747                  * pvclock_update_vm_gtod_copy().
4748                  */
4749                 kvm_gen_update_masterclock(kvm);
4750                 now_ns = get_kvmclock_ns(kvm);
4751                 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
4752                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
4753                 break;
4754         }
4755         case KVM_GET_CLOCK: {
4756                 struct kvm_clock_data user_ns;
4757                 u64 now_ns;
4758
4759                 now_ns = get_kvmclock_ns(kvm);
4760                 user_ns.clock = now_ns;
4761                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
4762                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4763
4764                 r = -EFAULT;
4765                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
4766                         goto out;
4767                 r = 0;
4768                 break;
4769         }
4770         case KVM_ENABLE_CAP: {
4771                 struct kvm_enable_cap cap;
4772
4773                 r = -EFAULT;
4774                 if (copy_from_user(&cap, argp, sizeof(cap)))
4775                         goto out;
4776                 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
4777                 break;
4778         }
4779         case KVM_MEMORY_ENCRYPT_OP: {
4780                 r = -ENOTTY;
4781                 if (kvm_x86_ops->mem_enc_op)
4782                         r = kvm_x86_ops->mem_enc_op(kvm, argp);
4783                 break;
4784         }
4785         case KVM_MEMORY_ENCRYPT_REG_REGION: {
4786                 struct kvm_enc_region region;
4787
4788                 r = -EFAULT;
4789                 if (copy_from_user(&region, argp, sizeof(region)))
4790                         goto out;
4791
4792                 r = -ENOTTY;
4793                 if (kvm_x86_ops->mem_enc_reg_region)
4794                         r = kvm_x86_ops->mem_enc_reg_region(kvm, &region);
4795                 break;
4796         }
4797         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
4798                 struct kvm_enc_region region;
4799
4800                 r = -EFAULT;
4801                 if (copy_from_user(&region, argp, sizeof(region)))
4802                         goto out;
4803
4804                 r = -ENOTTY;
4805                 if (kvm_x86_ops->mem_enc_unreg_region)
4806                         r = kvm_x86_ops->mem_enc_unreg_region(kvm, &region);
4807                 break;
4808         }
4809         case KVM_HYPERV_EVENTFD: {
4810                 struct kvm_hyperv_eventfd hvevfd;
4811
4812                 r = -EFAULT;
4813                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
4814                         goto out;
4815                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
4816                 break;
4817         }
4818         default:
4819                 r = -ENOTTY;
4820         }
4821 out:
4822         return r;
4823 }
4824
4825 static void kvm_init_msr_list(void)
4826 {
4827         u32 dummy[2];
4828         unsigned i, j;
4829
4830         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4831                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4832                         continue;
4833
4834                 /*
4835                  * Even MSRs that are valid in the host may not be exposed
4836                  * to the guests in some cases.
4837                  */
4838                 switch (msrs_to_save[i]) {
4839                 case MSR_IA32_BNDCFGS:
4840                         if (!kvm_mpx_supported())
4841                                 continue;
4842                         break;
4843                 case MSR_TSC_AUX:
4844                         if (!kvm_x86_ops->rdtscp_supported())
4845                                 continue;
4846                         break;
4847                 default:
4848                         break;
4849                 }
4850
4851                 if (j < i)
4852                         msrs_to_save[j] = msrs_to_save[i];
4853                 j++;
4854         }
4855         num_msrs_to_save = j;
4856
4857         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
4858                 if (!kvm_x86_ops->has_emulated_msr(emulated_msrs[i]))
4859                         continue;
4860
4861                 if (j < i)
4862                         emulated_msrs[j] = emulated_msrs[i];
4863                 j++;
4864         }
4865         num_emulated_msrs = j;
4866
4867         for (i = j = 0; i < ARRAY_SIZE(msr_based_features); i++) {
4868                 struct kvm_msr_entry msr;
4869
4870                 msr.index = msr_based_features[i];
4871                 if (kvm_get_msr_feature(&msr))
4872                         continue;
4873
4874                 if (j < i)
4875                         msr_based_features[j] = msr_based_features[i];
4876                 j++;
4877         }
4878         num_msr_based_features = j;
4879 }
4880
4881 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4882                            const void *v)
4883 {
4884         int handled = 0;
4885         int n;
4886
4887         do {
4888                 n = min(len, 8);
4889                 if (!(lapic_in_kernel(vcpu) &&
4890                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4891                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4892                         break;
4893                 handled += n;
4894                 addr += n;
4895                 len -= n;
4896                 v += n;
4897         } while (len);
4898
4899         return handled;
4900 }
4901
4902 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4903 {
4904         int handled = 0;
4905         int n;
4906
4907         do {
4908                 n = min(len, 8);
4909                 if (!(lapic_in_kernel(vcpu) &&
4910                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
4911                                          addr, n, v))
4912                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4913                         break;
4914                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
4915                 handled += n;
4916                 addr += n;
4917                 len -= n;
4918                 v += n;
4919         } while (len);
4920
4921         return handled;
4922 }
4923
4924 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4925                         struct kvm_segment *var, int seg)
4926 {
4927         kvm_x86_ops->set_segment(vcpu, var, seg);
4928 }
4929
4930 void kvm_get_segment(struct kvm_vcpu *vcpu,
4931                      struct kvm_segment *var, int seg)
4932 {
4933         kvm_x86_ops->get_segment(vcpu, var, seg);
4934 }
4935
4936 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
4937                            struct x86_exception *exception)
4938 {
4939         gpa_t t_gpa;
4940
4941         BUG_ON(!mmu_is_nested(vcpu));
4942
4943         /* NPT walks are always user-walks */
4944         access |= PFERR_USER_MASK;
4945         t_gpa  = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
4946
4947         return t_gpa;
4948 }
4949
4950 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4951                               struct x86_exception *exception)
4952 {
4953         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4954         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4955 }
4956
4957  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4958                                 struct x86_exception *exception)
4959 {
4960         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4961         access |= PFERR_FETCH_MASK;
4962         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4963 }
4964
4965 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4966                                struct x86_exception *exception)
4967 {
4968         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4969         access |= PFERR_WRITE_MASK;
4970         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4971 }
4972
4973 /* uses this to access any guest's mapped memory without checking CPL */
4974 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4975                                 struct x86_exception *exception)
4976 {
4977         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4978 }
4979
4980 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4981                                       struct kvm_vcpu *vcpu, u32 access,
4982                                       struct x86_exception *exception)
4983 {
4984         void *data = val;
4985         int r = X86EMUL_CONTINUE;
4986
4987         while (bytes) {
4988                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4989                                                             exception);
4990                 unsigned offset = addr & (PAGE_SIZE-1);
4991                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4992                 int ret;
4993
4994                 if (gpa == UNMAPPED_GVA)
4995                         return X86EMUL_PROPAGATE_FAULT;
4996                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4997                                                offset, toread);
4998                 if (ret < 0) {
4999                         r = X86EMUL_IO_NEEDED;
5000                         goto out;
5001                 }
5002
5003                 bytes -= toread;
5004                 data += toread;
5005                 addr += toread;
5006         }
5007 out:
5008         return r;
5009 }
5010
5011 /* used for instruction fetching */
5012 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
5013                                 gva_t addr, void *val, unsigned int bytes,
5014                                 struct x86_exception *exception)
5015 {
5016         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5017         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5018         unsigned offset;
5019         int ret;
5020
5021         /* Inline kvm_read_guest_virt_helper for speed.  */
5022         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
5023                                                     exception);
5024         if (unlikely(gpa == UNMAPPED_GVA))
5025                 return X86EMUL_PROPAGATE_FAULT;
5026
5027         offset = addr & (PAGE_SIZE-1);
5028         if (WARN_ON(offset + bytes > PAGE_SIZE))
5029                 bytes = (unsigned)PAGE_SIZE - offset;
5030         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
5031                                        offset, bytes);
5032         if (unlikely(ret < 0))
5033                 return X86EMUL_IO_NEEDED;
5034
5035         return X86EMUL_CONTINUE;
5036 }
5037
5038 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
5039                                gva_t addr, void *val, unsigned int bytes,
5040                                struct x86_exception *exception)
5041 {
5042         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5043
5044         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
5045                                           exception);
5046 }
5047 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
5048
5049 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
5050                              gva_t addr, void *val, unsigned int bytes,
5051                              struct x86_exception *exception, bool system)
5052 {
5053         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5054         u32 access = 0;
5055
5056         if (!system && kvm_x86_ops->get_cpl(vcpu) == 3)
5057                 access |= PFERR_USER_MASK;
5058
5059         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
5060 }
5061
5062 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
5063                 unsigned long addr, void *val, unsigned int bytes)
5064 {
5065         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5066         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
5067
5068         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
5069 }
5070
5071 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
5072                                       struct kvm_vcpu *vcpu, u32 access,
5073                                       struct x86_exception *exception)
5074 {
5075         void *data = val;
5076         int r = X86EMUL_CONTINUE;
5077
5078         while (bytes) {
5079                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
5080                                                              access,
5081                                                              exception);
5082                 unsigned offset = addr & (PAGE_SIZE-1);
5083                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
5084                 int ret;
5085
5086                 if (gpa == UNMAPPED_GVA)
5087                         return X86EMUL_PROPAGATE_FAULT;
5088                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
5089                 if (ret < 0) {
5090                         r = X86EMUL_IO_NEEDED;
5091                         goto out;
5092                 }
5093
5094                 bytes -= towrite;
5095                 data += towrite;
5096                 addr += towrite;
5097         }
5098 out:
5099         return r;
5100 }
5101
5102 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
5103                               unsigned int bytes, struct x86_exception *exception,
5104                               bool system)
5105 {
5106         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5107         u32 access = PFERR_WRITE_MASK;
5108
5109         if (!system && kvm_x86_ops->get_cpl(vcpu) == 3)
5110                 access |= PFERR_USER_MASK;
5111
5112         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
5113                                            access, exception);
5114 }
5115
5116 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
5117                                 unsigned int bytes, struct x86_exception *exception)
5118 {
5119         /* kvm_write_guest_virt_system can pull in tons of pages. */
5120         vcpu->arch.l1tf_flush_l1d = true;
5121
5122         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
5123                                            PFERR_WRITE_MASK, exception);
5124 }
5125 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
5126
5127 int handle_ud(struct kvm_vcpu *vcpu)
5128 {
5129         int emul_type = EMULTYPE_TRAP_UD;
5130         enum emulation_result er;
5131         char sig[5]; /* ud2; .ascii "kvm" */
5132         struct x86_exception e;
5133
5134         if (force_emulation_prefix &&
5135             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
5136                                 sig, sizeof(sig), &e) == 0 &&
5137             memcmp(sig, "\xf\xbkvm", sizeof(sig)) == 0) {
5138                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
5139                 emul_type = 0;
5140         }
5141
5142         er = kvm_emulate_instruction(vcpu, emul_type);
5143         if (er == EMULATE_USER_EXIT)
5144                 return 0;
5145         if (er != EMULATE_DONE)
5146                 kvm_queue_exception(vcpu, UD_VECTOR);
5147         return 1;
5148 }
5149 EXPORT_SYMBOL_GPL(handle_ud);
5150
5151 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
5152                             gpa_t gpa, bool write)
5153 {
5154         /* For APIC access vmexit */
5155         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
5156                 return 1;
5157
5158         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
5159                 trace_vcpu_match_mmio(gva, gpa, write, true);
5160                 return 1;
5161         }
5162
5163         return 0;
5164 }
5165
5166 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
5167                                 gpa_t *gpa, struct x86_exception *exception,
5168                                 bool write)
5169 {
5170         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
5171                 | (write ? PFERR_WRITE_MASK : 0);
5172
5173         /*
5174          * currently PKRU is only applied to ept enabled guest so
5175          * there is no pkey in EPT page table for L1 guest or EPT
5176          * shadow page table for L2 guest.
5177          */
5178         if (vcpu_match_mmio_gva(vcpu, gva)
5179             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
5180                                  vcpu->arch.access, 0, access)) {
5181                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
5182                                         (gva & (PAGE_SIZE - 1));
5183                 trace_vcpu_match_mmio(gva, *gpa, write, false);
5184                 return 1;
5185         }
5186
5187         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5188
5189         if (*gpa == UNMAPPED_GVA)
5190                 return -1;
5191
5192         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
5193 }
5194
5195 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
5196                         const void *val, int bytes)
5197 {
5198         int ret;
5199
5200         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
5201         if (ret < 0)
5202                 return 0;
5203         kvm_page_track_write(vcpu, gpa, val, bytes);
5204         return 1;
5205 }
5206
5207 struct read_write_emulator_ops {
5208         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
5209                                   int bytes);
5210         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
5211                                   void *val, int bytes);
5212         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
5213                                int bytes, void *val);
5214         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
5215                                     void *val, int bytes);
5216         bool write;
5217 };
5218
5219 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
5220 {
5221         if (vcpu->mmio_read_completed) {
5222                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
5223                                vcpu->mmio_fragments[0].gpa, val);
5224                 vcpu->mmio_read_completed = 0;
5225                 return 1;
5226         }
5227
5228         return 0;
5229 }
5230
5231 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
5232                         void *val, int bytes)
5233 {
5234         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
5235 }
5236
5237 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
5238                          void *val, int bytes)
5239 {
5240         return emulator_write_phys(vcpu, gpa, val, bytes);
5241 }
5242
5243 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
5244 {
5245         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
5246         return vcpu_mmio_write(vcpu, gpa, bytes, val);
5247 }
5248
5249 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
5250                           void *val, int bytes)
5251 {
5252         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
5253         return X86EMUL_IO_NEEDED;
5254 }
5255
5256 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
5257                            void *val, int bytes)
5258 {
5259         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
5260
5261         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
5262         return X86EMUL_CONTINUE;
5263 }
5264
5265 static const struct read_write_emulator_ops read_emultor = {
5266         .read_write_prepare = read_prepare,
5267         .read_write_emulate = read_emulate,
5268         .read_write_mmio = vcpu_mmio_read,
5269         .read_write_exit_mmio = read_exit_mmio,
5270 };
5271
5272 static const struct read_write_emulator_ops write_emultor = {
5273         .read_write_emulate = write_emulate,
5274         .read_write_mmio = write_mmio,
5275         .read_write_exit_mmio = write_exit_mmio,
5276         .write = true,
5277 };
5278
5279 static int emulator_read_write_onepage(unsigned long addr, void *val,
5280                                        unsigned int bytes,
5281                                        struct x86_exception *exception,
5282                                        struct kvm_vcpu *vcpu,
5283                                        const struct read_write_emulator_ops *ops)
5284 {
5285         gpa_t gpa;
5286         int handled, ret;
5287         bool write = ops->write;
5288         struct kvm_mmio_fragment *frag;
5289         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5290
5291         /*
5292          * If the exit was due to a NPF we may already have a GPA.
5293          * If the GPA is present, use it to avoid the GVA to GPA table walk.
5294          * Note, this cannot be used on string operations since string
5295          * operation using rep will only have the initial GPA from the NPF
5296          * occurred.
5297          */
5298         if (vcpu->arch.gpa_available &&
5299             emulator_can_use_gpa(ctxt) &&
5300             (addr & ~PAGE_MASK) == (vcpu->arch.gpa_val & ~PAGE_MASK)) {
5301                 gpa = vcpu->arch.gpa_val;
5302                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
5303         } else {
5304                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
5305                 if (ret < 0)
5306                         return X86EMUL_PROPAGATE_FAULT;
5307         }
5308
5309         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
5310                 return X86EMUL_CONTINUE;
5311
5312         /*
5313          * Is this MMIO handled locally?
5314          */
5315         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
5316         if (handled == bytes)
5317                 return X86EMUL_CONTINUE;
5318
5319         gpa += handled;
5320         bytes -= handled;
5321         val += handled;
5322
5323         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
5324         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
5325         frag->gpa = gpa;
5326         frag->data = val;
5327         frag->len = bytes;
5328         return X86EMUL_CONTINUE;
5329 }
5330
5331 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
5332                         unsigned long addr,
5333                         void *val, unsigned int bytes,
5334                         struct x86_exception *exception,
5335                         const struct read_write_emulator_ops *ops)
5336 {
5337         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5338         gpa_t gpa;
5339         int rc;
5340
5341         if (ops->read_write_prepare &&
5342                   ops->read_write_prepare(vcpu, val, bytes))
5343                 return X86EMUL_CONTINUE;
5344
5345         vcpu->mmio_nr_fragments = 0;
5346
5347         /* Crossing a page boundary? */
5348         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
5349                 int now;
5350
5351                 now = -addr & ~PAGE_MASK;
5352                 rc = emulator_read_write_onepage(addr, val, now, exception,
5353                                                  vcpu, ops);
5354
5355                 if (rc != X86EMUL_CONTINUE)
5356                         return rc;
5357                 addr += now;
5358                 if (ctxt->mode != X86EMUL_MODE_PROT64)
5359                         addr = (u32)addr;
5360                 val += now;
5361                 bytes -= now;
5362         }
5363
5364         rc = emulator_read_write_onepage(addr, val, bytes, exception,
5365                                          vcpu, ops);
5366         if (rc != X86EMUL_CONTINUE)
5367                 return rc;
5368
5369         if (!vcpu->mmio_nr_fragments)
5370                 return rc;
5371
5372         gpa = vcpu->mmio_fragments[0].gpa;
5373
5374         vcpu->mmio_needed = 1;
5375         vcpu->mmio_cur_fragment = 0;
5376
5377         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
5378         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
5379         vcpu->run->exit_reason = KVM_EXIT_MMIO;
5380         vcpu->run->mmio.phys_addr = gpa;
5381
5382         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
5383 }
5384
5385 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
5386                                   unsigned long addr,
5387                                   void *val,
5388                                   unsigned int bytes,
5389                                   struct x86_exception *exception)
5390 {
5391         return emulator_read_write(ctxt, addr, val, bytes,
5392                                    exception, &read_emultor);
5393 }
5394
5395 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
5396                             unsigned long addr,
5397                             const void *val,
5398                             unsigned int bytes,
5399                             struct x86_exception *exception)
5400 {
5401         return emulator_read_write(ctxt, addr, (void *)val, bytes,
5402                                    exception, &write_emultor);
5403 }
5404
5405 #define CMPXCHG_TYPE(t, ptr, old, new) \
5406         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
5407
5408 #ifdef CONFIG_X86_64
5409 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
5410 #else
5411 #  define CMPXCHG64(ptr, old, new) \
5412         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
5413 #endif
5414
5415 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
5416                                      unsigned long addr,
5417                                      const void *old,
5418                                      const void *new,
5419                                      unsigned int bytes,
5420                                      struct x86_exception *exception)
5421 {
5422         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5423         gpa_t gpa;
5424         struct page *page;
5425         char *kaddr;
5426         bool exchanged;
5427
5428         /* guests cmpxchg8b have to be emulated atomically */
5429         if (bytes > 8 || (bytes & (bytes - 1)))
5430                 goto emul_write;
5431
5432         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
5433
5434         if (gpa == UNMAPPED_GVA ||
5435             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
5436                 goto emul_write;
5437
5438         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
5439                 goto emul_write;
5440
5441         page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
5442         if (is_error_page(page))
5443                 goto emul_write;
5444
5445         kaddr = kmap_atomic(page);
5446         kaddr += offset_in_page(gpa);
5447         switch (bytes) {
5448         case 1:
5449                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
5450                 break;
5451         case 2:
5452                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
5453                 break;
5454         case 4:
5455                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
5456                 break;
5457         case 8:
5458                 exchanged = CMPXCHG64(kaddr, old, new);
5459                 break;
5460         default:
5461                 BUG();
5462         }
5463         kunmap_atomic(kaddr);
5464         kvm_release_page_dirty(page);
5465
5466         if (!exchanged)
5467                 return X86EMUL_CMPXCHG_FAILED;
5468
5469         kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
5470         kvm_page_track_write(vcpu, gpa, new, bytes);
5471
5472         return X86EMUL_CONTINUE;
5473
5474 emul_write:
5475         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
5476
5477         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
5478 }
5479
5480 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
5481 {
5482         int r = 0, i;
5483
5484         for (i = 0; i < vcpu->arch.pio.count; i++) {
5485                 if (vcpu->arch.pio.in)
5486                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
5487                                             vcpu->arch.pio.size, pd);
5488                 else
5489                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
5490                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
5491                                              pd);
5492                 if (r)
5493                         break;
5494                 pd += vcpu->arch.pio.size;
5495         }
5496         return r;
5497 }
5498
5499 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
5500                                unsigned short port, void *val,
5501                                unsigned int count, bool in)
5502 {
5503         vcpu->arch.pio.port = port;
5504         vcpu->arch.pio.in = in;
5505         vcpu->arch.pio.count  = count;
5506         vcpu->arch.pio.size = size;
5507
5508         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
5509                 vcpu->arch.pio.count = 0;
5510                 return 1;
5511         }
5512
5513         vcpu->run->exit_reason = KVM_EXIT_IO;
5514         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
5515         vcpu->run->io.size = size;
5516         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
5517         vcpu->run->io.count = count;
5518         vcpu->run->io.port = port;
5519
5520         return 0;
5521 }
5522
5523 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
5524                                     int size, unsigned short port, void *val,
5525                                     unsigned int count)
5526 {
5527         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5528         int ret;
5529
5530         if (vcpu->arch.pio.count)
5531                 goto data_avail;
5532
5533         memset(vcpu->arch.pio_data, 0, size * count);
5534
5535         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
5536         if (ret) {
5537 data_avail:
5538                 memcpy(val, vcpu->arch.pio_data, size * count);
5539                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
5540                 vcpu->arch.pio.count = 0;
5541                 return 1;
5542         }
5543
5544         return 0;
5545 }
5546
5547 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
5548                                      int size, unsigned short port,
5549                                      const void *val, unsigned int count)
5550 {
5551         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5552
5553         memcpy(vcpu->arch.pio_data, val, size * count);
5554         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
5555         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
5556 }
5557
5558 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
5559 {
5560         return kvm_x86_ops->get_segment_base(vcpu, seg);
5561 }
5562
5563 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
5564 {
5565         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
5566 }
5567
5568 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
5569 {
5570         if (!need_emulate_wbinvd(vcpu))
5571                 return X86EMUL_CONTINUE;
5572
5573         if (kvm_x86_ops->has_wbinvd_exit()) {
5574                 int cpu = get_cpu();
5575
5576                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
5577                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
5578                                 wbinvd_ipi, NULL, 1);
5579                 put_cpu();
5580                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
5581         } else
5582                 wbinvd();
5583         return X86EMUL_CONTINUE;
5584 }
5585
5586 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
5587 {
5588         kvm_emulate_wbinvd_noskip(vcpu);
5589         return kvm_skip_emulated_instruction(vcpu);
5590 }
5591 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
5592
5593
5594
5595 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
5596 {
5597         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
5598 }
5599
5600 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
5601                            unsigned long *dest)
5602 {
5603         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
5604 }
5605
5606 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
5607                            unsigned long value)
5608 {
5609
5610         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
5611 }
5612
5613 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
5614 {
5615         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
5616 }
5617
5618 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
5619 {
5620         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5621         unsigned long value;
5622
5623         switch (cr) {
5624         case 0:
5625                 value = kvm_read_cr0(vcpu);
5626                 break;
5627         case 2:
5628                 value = vcpu->arch.cr2;
5629                 break;
5630         case 3:
5631                 value = kvm_read_cr3(vcpu);
5632                 break;
5633         case 4:
5634                 value = kvm_read_cr4(vcpu);
5635                 break;
5636         case 8:
5637                 value = kvm_get_cr8(vcpu);
5638                 break;
5639         default:
5640                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5641                 return 0;
5642         }
5643
5644         return value;
5645 }
5646
5647 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
5648 {
5649         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5650         int res = 0;
5651
5652         switch (cr) {
5653         case 0:
5654                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
5655                 break;
5656         case 2:
5657                 vcpu->arch.cr2 = val;
5658                 break;
5659         case 3:
5660                 res = kvm_set_cr3(vcpu, val);
5661                 break;
5662         case 4:
5663                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
5664                 break;
5665         case 8:
5666                 res = kvm_set_cr8(vcpu, val);
5667                 break;
5668         default:
5669                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5670                 res = -1;
5671         }
5672
5673         return res;
5674 }
5675
5676 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
5677 {
5678         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
5679 }
5680
5681 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5682 {
5683         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
5684 }
5685
5686 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5687 {
5688         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
5689 }
5690
5691 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5692 {
5693         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
5694 }
5695
5696 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5697 {
5698         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
5699 }
5700
5701 static unsigned long emulator_get_cached_segment_base(
5702         struct x86_emulate_ctxt *ctxt, int seg)
5703 {
5704         return get_segment_base(emul_to_vcpu(ctxt), seg);
5705 }
5706
5707 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
5708                                  struct desc_struct *desc, u32 *base3,
5709                                  int seg)
5710 {
5711         struct kvm_segment var;
5712
5713         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
5714         *selector = var.selector;
5715
5716         if (var.unusable) {
5717                 memset(desc, 0, sizeof(*desc));
5718                 if (base3)
5719                         *base3 = 0;
5720                 return false;
5721         }
5722
5723         if (var.g)
5724                 var.limit >>= 12;
5725         set_desc_limit(desc, var.limit);
5726         set_desc_base(desc, (unsigned long)var.base);
5727 #ifdef CONFIG_X86_64
5728         if (base3)
5729                 *base3 = var.base >> 32;
5730 #endif
5731         desc->type = var.type;
5732         desc->s = var.s;
5733         desc->dpl = var.dpl;
5734         desc->p = var.present;
5735         desc->avl = var.avl;
5736         desc->l = var.l;
5737         desc->d = var.db;
5738         desc->g = var.g;
5739
5740         return true;
5741 }
5742
5743 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
5744                                  struct desc_struct *desc, u32 base3,
5745                                  int seg)
5746 {
5747         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5748         struct kvm_segment var;
5749
5750         var.selector = selector;
5751         var.base = get_desc_base(desc);
5752 #ifdef CONFIG_X86_64
5753         var.base |= ((u64)base3) << 32;
5754 #endif
5755         var.limit = get_desc_limit(desc);
5756         if (desc->g)
5757                 var.limit = (var.limit << 12) | 0xfff;
5758         var.type = desc->type;
5759         var.dpl = desc->dpl;
5760         var.db = desc->d;
5761         var.s = desc->s;
5762         var.l = desc->l;
5763         var.g = desc->g;
5764         var.avl = desc->avl;
5765         var.present = desc->p;
5766         var.unusable = !var.present;
5767         var.padding = 0;
5768
5769         kvm_set_segment(vcpu, &var, seg);
5770         return;
5771 }
5772
5773 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
5774                             u32 msr_index, u64 *pdata)
5775 {
5776         struct msr_data msr;
5777         int r;
5778
5779         msr.index = msr_index;
5780         msr.host_initiated = false;
5781         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
5782         if (r)
5783                 return r;
5784
5785         *pdata = msr.data;
5786         return 0;
5787 }
5788
5789 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
5790                             u32 msr_index, u64 data)
5791 {
5792         struct msr_data msr;
5793
5794         msr.data = data;
5795         msr.index = msr_index;
5796         msr.host_initiated = false;
5797         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
5798 }
5799
5800 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
5801 {
5802         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5803
5804         return vcpu->arch.smbase;
5805 }
5806
5807 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
5808 {
5809         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5810
5811         vcpu->arch.smbase = smbase;
5812 }
5813
5814 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
5815                               u32 pmc)
5816 {
5817         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
5818 }
5819
5820 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
5821                              u32 pmc, u64 *pdata)
5822 {
5823         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
5824 }
5825
5826 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
5827 {
5828         emul_to_vcpu(ctxt)->arch.halt_request = 1;
5829 }
5830
5831 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
5832                               struct x86_instruction_info *info,
5833                               enum x86_intercept_stage stage)
5834 {
5835         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
5836 }
5837
5838 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
5839                         u32 *eax, u32 *ebx, u32 *ecx, u32 *edx, bool check_limit)
5840 {
5841         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, check_limit);
5842 }
5843
5844 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
5845 {
5846         return kvm_register_read(emul_to_vcpu(ctxt), reg);
5847 }
5848
5849 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
5850 {
5851         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
5852 }
5853
5854 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
5855 {
5856         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
5857 }
5858
5859 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
5860 {
5861         return emul_to_vcpu(ctxt)->arch.hflags;
5862 }
5863
5864 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
5865 {
5866         kvm_set_hflags(emul_to_vcpu(ctxt), emul_flags);
5867 }
5868
5869 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt, u64 smbase)
5870 {
5871         return kvm_x86_ops->pre_leave_smm(emul_to_vcpu(ctxt), smbase);
5872 }
5873
5874 static const struct x86_emulate_ops emulate_ops = {
5875         .read_gpr            = emulator_read_gpr,
5876         .write_gpr           = emulator_write_gpr,
5877         .read_std            = emulator_read_std,
5878         .write_std           = emulator_write_std,
5879         .read_phys           = kvm_read_guest_phys_system,
5880         .fetch               = kvm_fetch_guest_virt,
5881         .read_emulated       = emulator_read_emulated,
5882         .write_emulated      = emulator_write_emulated,
5883         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
5884         .invlpg              = emulator_invlpg,
5885         .pio_in_emulated     = emulator_pio_in_emulated,
5886         .pio_out_emulated    = emulator_pio_out_emulated,
5887         .get_segment         = emulator_get_segment,
5888         .set_segment         = emulator_set_segment,
5889         .get_cached_segment_base = emulator_get_cached_segment_base,
5890         .get_gdt             = emulator_get_gdt,
5891         .get_idt             = emulator_get_idt,
5892         .set_gdt             = emulator_set_gdt,
5893         .set_idt             = emulator_set_idt,
5894         .get_cr              = emulator_get_cr,
5895         .set_cr              = emulator_set_cr,
5896         .cpl                 = emulator_get_cpl,
5897         .get_dr              = emulator_get_dr,
5898         .set_dr              = emulator_set_dr,
5899         .get_smbase          = emulator_get_smbase,
5900         .set_smbase          = emulator_set_smbase,
5901         .set_msr             = emulator_set_msr,
5902         .get_msr             = emulator_get_msr,
5903         .check_pmc           = emulator_check_pmc,
5904         .read_pmc            = emulator_read_pmc,
5905         .halt                = emulator_halt,
5906         .wbinvd              = emulator_wbinvd,
5907         .fix_hypercall       = emulator_fix_hypercall,
5908         .intercept           = emulator_intercept,
5909         .get_cpuid           = emulator_get_cpuid,
5910         .set_nmi_mask        = emulator_set_nmi_mask,
5911         .get_hflags          = emulator_get_hflags,
5912         .set_hflags          = emulator_set_hflags,
5913         .pre_leave_smm       = emulator_pre_leave_smm,
5914 };
5915
5916 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
5917 {
5918         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
5919         /*
5920          * an sti; sti; sequence only disable interrupts for the first
5921          * instruction. So, if the last instruction, be it emulated or
5922          * not, left the system with the INT_STI flag enabled, it
5923          * means that the last instruction is an sti. We should not
5924          * leave the flag on in this case. The same goes for mov ss
5925          */
5926         if (int_shadow & mask)
5927                 mask = 0;
5928         if (unlikely(int_shadow || mask)) {
5929                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
5930                 if (!mask)
5931                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5932         }
5933 }
5934
5935 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
5936 {
5937         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5938         if (ctxt->exception.vector == PF_VECTOR)
5939                 return kvm_propagate_fault(vcpu, &ctxt->exception);
5940
5941         if (ctxt->exception.error_code_valid)
5942                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
5943                                       ctxt->exception.error_code);
5944         else
5945                 kvm_queue_exception(vcpu, ctxt->exception.vector);
5946         return false;
5947 }
5948
5949 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
5950 {
5951         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5952         int cs_db, cs_l;
5953
5954         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5955
5956         ctxt->eflags = kvm_get_rflags(vcpu);
5957         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
5958
5959         ctxt->eip = kvm_rip_read(vcpu);
5960         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
5961                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
5962                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
5963                      cs_db                              ? X86EMUL_MODE_PROT32 :
5964                                                           X86EMUL_MODE_PROT16;
5965         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
5966         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
5967         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
5968
5969         init_decode_cache(ctxt);
5970         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5971 }
5972
5973 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5974 {
5975         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5976         int ret;
5977
5978         init_emulate_ctxt(vcpu);
5979
5980         ctxt->op_bytes = 2;
5981         ctxt->ad_bytes = 2;
5982         ctxt->_eip = ctxt->eip + inc_eip;
5983         ret = emulate_int_real(ctxt, irq);
5984
5985         if (ret != X86EMUL_CONTINUE)
5986                 return EMULATE_FAIL;
5987
5988         ctxt->eip = ctxt->_eip;
5989         kvm_rip_write(vcpu, ctxt->eip);
5990         kvm_set_rflags(vcpu, ctxt->eflags);
5991
5992         return EMULATE_DONE;
5993 }
5994 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
5995
5996 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
5997 {
5998         int r = EMULATE_DONE;
5999
6000         ++vcpu->stat.insn_emulation_fail;
6001         trace_kvm_emulate_insn_failed(vcpu);
6002
6003         if (emulation_type & EMULTYPE_NO_UD_ON_FAIL)
6004                 return EMULATE_FAIL;
6005
6006         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
6007                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
6008                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
6009                 vcpu->run->internal.ndata = 0;
6010                 r = EMULATE_USER_EXIT;
6011         }
6012
6013         kvm_queue_exception(vcpu, UD_VECTOR);
6014
6015         return r;
6016 }
6017
6018 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
6019                                   bool write_fault_to_shadow_pgtable,
6020                                   int emulation_type)
6021 {
6022         gpa_t gpa = cr2;
6023         kvm_pfn_t pfn;
6024
6025         if (!(emulation_type & EMULTYPE_ALLOW_RETRY))
6026                 return false;
6027
6028         if (WARN_ON_ONCE(is_guest_mode(vcpu)))
6029                 return false;
6030
6031         if (!vcpu->arch.mmu->direct_map) {
6032                 /*
6033                  * Write permission should be allowed since only
6034                  * write access need to be emulated.
6035                  */
6036                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
6037
6038                 /*
6039                  * If the mapping is invalid in guest, let cpu retry
6040                  * it to generate fault.
6041                  */
6042                 if (gpa == UNMAPPED_GVA)
6043                         return true;
6044         }
6045
6046         /*
6047          * Do not retry the unhandleable instruction if it faults on the
6048          * readonly host memory, otherwise it will goto a infinite loop:
6049          * retry instruction -> write #PF -> emulation fail -> retry
6050          * instruction -> ...
6051          */
6052         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
6053
6054         /*
6055          * If the instruction failed on the error pfn, it can not be fixed,
6056          * report the error to userspace.
6057          */
6058         if (is_error_noslot_pfn(pfn))
6059                 return false;
6060
6061         kvm_release_pfn_clean(pfn);
6062
6063         /* The instructions are well-emulated on direct mmu. */
6064         if (vcpu->arch.mmu->direct_map) {
6065                 unsigned int indirect_shadow_pages;
6066
6067                 spin_lock(&vcpu->kvm->mmu_lock);
6068                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
6069                 spin_unlock(&vcpu->kvm->mmu_lock);
6070
6071                 if (indirect_shadow_pages)
6072                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6073
6074                 return true;
6075         }
6076
6077         /*
6078          * if emulation was due to access to shadowed page table
6079          * and it failed try to unshadow page and re-enter the
6080          * guest to let CPU execute the instruction.
6081          */
6082         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6083
6084         /*
6085          * If the access faults on its page table, it can not
6086          * be fixed by unprotecting shadow page and it should
6087          * be reported to userspace.
6088          */
6089         return !write_fault_to_shadow_pgtable;
6090 }
6091
6092 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
6093                               unsigned long cr2,  int emulation_type)
6094 {
6095         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6096         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
6097
6098         last_retry_eip = vcpu->arch.last_retry_eip;
6099         last_retry_addr = vcpu->arch.last_retry_addr;
6100
6101         /*
6102          * If the emulation is caused by #PF and it is non-page_table
6103          * writing instruction, it means the VM-EXIT is caused by shadow
6104          * page protected, we can zap the shadow page and retry this
6105          * instruction directly.
6106          *
6107          * Note: if the guest uses a non-page-table modifying instruction
6108          * on the PDE that points to the instruction, then we will unmap
6109          * the instruction and go to an infinite loop. So, we cache the
6110          * last retried eip and the last fault address, if we meet the eip
6111          * and the address again, we can break out of the potential infinite
6112          * loop.
6113          */
6114         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
6115
6116         if (!(emulation_type & EMULTYPE_ALLOW_RETRY))
6117                 return false;
6118
6119         if (WARN_ON_ONCE(is_guest_mode(vcpu)))
6120                 return false;
6121
6122         if (x86_page_table_writing_insn(ctxt))
6123                 return false;
6124
6125         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
6126                 return false;
6127
6128         vcpu->arch.last_retry_eip = ctxt->eip;
6129         vcpu->arch.last_retry_addr = cr2;
6130
6131         if (!vcpu->arch.mmu->direct_map)
6132                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
6133
6134         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6135
6136         return true;
6137 }
6138
6139 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
6140 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
6141
6142 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
6143 {
6144         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
6145                 /* This is a good place to trace that we are exiting SMM.  */
6146                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
6147
6148                 /* Process a latched INIT or SMI, if any.  */
6149                 kvm_make_request(KVM_REQ_EVENT, vcpu);
6150         }
6151
6152         kvm_mmu_reset_context(vcpu);
6153 }
6154
6155 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
6156 {
6157         unsigned changed = vcpu->arch.hflags ^ emul_flags;
6158
6159         vcpu->arch.hflags = emul_flags;
6160
6161         if (changed & HF_SMM_MASK)
6162                 kvm_smm_changed(vcpu);
6163 }
6164
6165 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
6166                                 unsigned long *db)
6167 {
6168         u32 dr6 = 0;
6169         int i;
6170         u32 enable, rwlen;
6171
6172         enable = dr7;
6173         rwlen = dr7 >> 16;
6174         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
6175                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
6176                         dr6 |= (1 << i);
6177         return dr6;
6178 }
6179
6180 static void kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu, int *r)
6181 {
6182         struct kvm_run *kvm_run = vcpu->run;
6183
6184         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
6185                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 | DR6_RTM;
6186                 kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
6187                 kvm_run->debug.arch.exception = DB_VECTOR;
6188                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
6189                 *r = EMULATE_USER_EXIT;
6190         } else {
6191                 kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
6192         }
6193 }
6194
6195 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
6196 {
6197         unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
6198         int r = EMULATE_DONE;
6199
6200         kvm_x86_ops->skip_emulated_instruction(vcpu);
6201
6202         /*
6203          * rflags is the old, "raw" value of the flags.  The new value has
6204          * not been saved yet.
6205          *
6206          * This is correct even for TF set by the guest, because "the
6207          * processor will not generate this exception after the instruction
6208          * that sets the TF flag".
6209          */
6210         if (unlikely(rflags & X86_EFLAGS_TF))
6211                 kvm_vcpu_do_singlestep(vcpu, &r);
6212         return r == EMULATE_DONE;
6213 }
6214 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
6215
6216 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
6217 {
6218         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
6219             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
6220                 struct kvm_run *kvm_run = vcpu->run;
6221                 unsigned long eip = kvm_get_linear_rip(vcpu);
6222                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
6223                                            vcpu->arch.guest_debug_dr7,
6224                                            vcpu->arch.eff_db);
6225
6226                 if (dr6 != 0) {
6227                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
6228                         kvm_run->debug.arch.pc = eip;
6229                         kvm_run->debug.arch.exception = DB_VECTOR;
6230                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
6231                         *r = EMULATE_USER_EXIT;
6232                         return true;
6233                 }
6234         }
6235
6236         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
6237             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
6238                 unsigned long eip = kvm_get_linear_rip(vcpu);
6239                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
6240                                            vcpu->arch.dr7,
6241                                            vcpu->arch.db);
6242
6243                 if (dr6 != 0) {
6244                         vcpu->arch.dr6 &= ~15;
6245                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
6246                         kvm_queue_exception(vcpu, DB_VECTOR);
6247                         *r = EMULATE_DONE;
6248                         return true;
6249                 }
6250         }
6251
6252         return false;
6253 }
6254
6255 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
6256 {
6257         switch (ctxt->opcode_len) {
6258         case 1:
6259                 switch (ctxt->b) {
6260                 case 0xe4:      /* IN */
6261                 case 0xe5:
6262                 case 0xec:
6263                 case 0xed:
6264                 case 0xe6:      /* OUT */
6265                 case 0xe7:
6266                 case 0xee:
6267                 case 0xef:
6268                 case 0x6c:      /* INS */
6269                 case 0x6d:
6270                 case 0x6e:      /* OUTS */
6271                 case 0x6f:
6272                         return true;
6273                 }
6274                 break;
6275         case 2:
6276                 switch (ctxt->b) {
6277                 case 0x33:      /* RDPMC */
6278                         return true;
6279                 }
6280                 break;
6281         }
6282
6283         return false;
6284 }
6285
6286 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
6287                             unsigned long cr2,
6288                             int emulation_type,
6289                             void *insn,
6290                             int insn_len)
6291 {
6292         int r;
6293         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6294         bool writeback = true;
6295         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
6296
6297         vcpu->arch.l1tf_flush_l1d = true;
6298
6299         /*
6300          * Clear write_fault_to_shadow_pgtable here to ensure it is
6301          * never reused.
6302          */
6303         vcpu->arch.write_fault_to_shadow_pgtable = false;
6304         kvm_clear_exception_queue(vcpu);
6305
6306         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
6307                 init_emulate_ctxt(vcpu);
6308
6309                 /*
6310                  * We will reenter on the same instruction since
6311                  * we do not set complete_userspace_io.  This does not
6312                  * handle watchpoints yet, those would be handled in
6313                  * the emulate_ops.
6314                  */
6315                 if (!(emulation_type & EMULTYPE_SKIP) &&
6316                     kvm_vcpu_check_breakpoint(vcpu, &r))
6317                         return r;
6318
6319                 ctxt->interruptibility = 0;
6320                 ctxt->have_exception = false;
6321                 ctxt->exception.vector = -1;
6322                 ctxt->perm_ok = false;
6323
6324                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
6325
6326                 r = x86_decode_insn(ctxt, insn, insn_len);
6327
6328                 trace_kvm_emulate_insn_start(vcpu);
6329                 ++vcpu->stat.insn_emulation;
6330                 if (r != EMULATION_OK)  {
6331                         if (emulation_type & EMULTYPE_TRAP_UD)
6332                                 return EMULATE_FAIL;
6333                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
6334                                                 emulation_type))
6335                                 return EMULATE_DONE;
6336                         if (ctxt->have_exception && inject_emulated_exception(vcpu))
6337                                 return EMULATE_DONE;
6338                         if (emulation_type & EMULTYPE_SKIP)
6339                                 return EMULATE_FAIL;
6340                         return handle_emulation_failure(vcpu, emulation_type);
6341                 }
6342         }
6343
6344         if ((emulation_type & EMULTYPE_VMWARE) &&
6345             !is_vmware_backdoor_opcode(ctxt))
6346                 return EMULATE_FAIL;
6347
6348         if (emulation_type & EMULTYPE_SKIP) {
6349                 kvm_rip_write(vcpu, ctxt->_eip);
6350                 if (ctxt->eflags & X86_EFLAGS_RF)
6351                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
6352                 return EMULATE_DONE;
6353         }
6354
6355         if (retry_instruction(ctxt, cr2, emulation_type))
6356                 return EMULATE_DONE;
6357
6358         /* this is needed for vmware backdoor interface to work since it
6359            changes registers values  during IO operation */
6360         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
6361                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
6362                 emulator_invalidate_register_cache(ctxt);
6363         }
6364
6365 restart:
6366         /* Save the faulting GPA (cr2) in the address field */
6367         ctxt->exception.address = cr2;
6368
6369         r = x86_emulate_insn(ctxt);
6370
6371         if (r == EMULATION_INTERCEPTED)
6372                 return EMULATE_DONE;
6373
6374         if (r == EMULATION_FAILED) {
6375                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
6376                                         emulation_type))
6377                         return EMULATE_DONE;
6378
6379                 return handle_emulation_failure(vcpu, emulation_type);
6380         }
6381
6382         if (ctxt->have_exception) {
6383                 r = EMULATE_DONE;
6384                 if (inject_emulated_exception(vcpu))
6385                         return r;
6386         } else if (vcpu->arch.pio.count) {
6387                 if (!vcpu->arch.pio.in) {
6388                         /* FIXME: return into emulator if single-stepping.  */
6389                         vcpu->arch.pio.count = 0;
6390                 } else {
6391                         writeback = false;
6392                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
6393                 }
6394                 r = EMULATE_USER_EXIT;
6395         } else if (vcpu->mmio_needed) {
6396                 if (!vcpu->mmio_is_write)
6397                         writeback = false;
6398                 r = EMULATE_USER_EXIT;
6399                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6400         } else if (r == EMULATION_RESTART)
6401                 goto restart;
6402         else
6403                 r = EMULATE_DONE;
6404
6405         if (writeback) {
6406                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
6407                 toggle_interruptibility(vcpu, ctxt->interruptibility);
6408                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6409                 kvm_rip_write(vcpu, ctxt->eip);
6410                 if (r == EMULATE_DONE &&
6411                     (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
6412                         kvm_vcpu_do_singlestep(vcpu, &r);
6413                 if (!ctxt->have_exception ||
6414                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
6415                         __kvm_set_rflags(vcpu, ctxt->eflags);
6416
6417                 /*
6418                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
6419                  * do nothing, and it will be requested again as soon as
6420                  * the shadow expires.  But we still need to check here,
6421                  * because POPF has no interrupt shadow.
6422                  */
6423                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
6424                         kvm_make_request(KVM_REQ_EVENT, vcpu);
6425         } else
6426                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
6427
6428         return r;
6429 }
6430
6431 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
6432 {
6433         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
6434 }
6435 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
6436
6437 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
6438                                         void *insn, int insn_len)
6439 {
6440         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
6441 }
6442 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
6443
6444 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
6445                             unsigned short port)
6446 {
6447         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
6448         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
6449                                             size, port, &val, 1);
6450         /* do not return to emulator after return from userspace */
6451         vcpu->arch.pio.count = 0;
6452         return ret;
6453 }
6454
6455 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
6456 {
6457         unsigned long val;
6458
6459         /* We should only ever be called with arch.pio.count equal to 1 */
6460         BUG_ON(vcpu->arch.pio.count != 1);
6461
6462         /* For size less than 4 we merge, else we zero extend */
6463         val = (vcpu->arch.pio.size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX)
6464                                         : 0;
6465
6466         /*
6467          * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
6468          * the copy and tracing
6469          */
6470         emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, vcpu->arch.pio.size,
6471                                  vcpu->arch.pio.port, &val, 1);
6472         kvm_register_write(vcpu, VCPU_REGS_RAX, val);
6473
6474         return 1;
6475 }
6476
6477 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
6478                            unsigned short port)
6479 {
6480         unsigned long val;
6481         int ret;
6482
6483         /* For size less than 4 we merge, else we zero extend */
6484         val = (size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX) : 0;
6485
6486         ret = emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, size, port,
6487                                        &val, 1);
6488         if (ret) {
6489                 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
6490                 return ret;
6491         }
6492
6493         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
6494
6495         return 0;
6496 }
6497
6498 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
6499 {
6500         int ret = kvm_skip_emulated_instruction(vcpu);
6501
6502         /*
6503          * TODO: we might be squashing a KVM_GUESTDBG_SINGLESTEP-triggered
6504          * KVM_EXIT_DEBUG here.
6505          */
6506         if (in)
6507                 return kvm_fast_pio_in(vcpu, size, port) && ret;
6508         else
6509                 return kvm_fast_pio_out(vcpu, size, port) && ret;
6510 }
6511 EXPORT_SYMBOL_GPL(kvm_fast_pio);
6512
6513 static int kvmclock_cpu_down_prep(unsigned int cpu)
6514 {
6515         __this_cpu_write(cpu_tsc_khz, 0);
6516         return 0;
6517 }
6518
6519 static void tsc_khz_changed(void *data)
6520 {
6521         struct cpufreq_freqs *freq = data;
6522         unsigned long khz = 0;
6523
6524         if (data)
6525                 khz = freq->new;
6526         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6527                 khz = cpufreq_quick_get(raw_smp_processor_id());
6528         if (!khz)
6529                 khz = tsc_khz;
6530         __this_cpu_write(cpu_tsc_khz, khz);
6531 }
6532
6533 #ifdef CONFIG_X86_64
6534 static void kvm_hyperv_tsc_notifier(void)
6535 {
6536         struct kvm *kvm;
6537         struct kvm_vcpu *vcpu;
6538         int cpu;
6539
6540         spin_lock(&kvm_lock);
6541         list_for_each_entry(kvm, &vm_list, vm_list)
6542                 kvm_make_mclock_inprogress_request(kvm);
6543
6544         hyperv_stop_tsc_emulation();
6545
6546         /* TSC frequency always matches when on Hyper-V */
6547         for_each_present_cpu(cpu)
6548                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
6549         kvm_max_guest_tsc_khz = tsc_khz;
6550
6551         list_for_each_entry(kvm, &vm_list, vm_list) {
6552                 struct kvm_arch *ka = &kvm->arch;
6553
6554                 spin_lock(&ka->pvclock_gtod_sync_lock);
6555
6556                 pvclock_update_vm_gtod_copy(kvm);
6557
6558                 kvm_for_each_vcpu(cpu, vcpu, kvm)
6559                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6560
6561                 kvm_for_each_vcpu(cpu, vcpu, kvm)
6562                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
6563
6564                 spin_unlock(&ka->pvclock_gtod_sync_lock);
6565         }
6566         spin_unlock(&kvm_lock);
6567 }
6568 #endif
6569
6570 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
6571                                      void *data)
6572 {
6573         struct cpufreq_freqs *freq = data;
6574         struct kvm *kvm;
6575         struct kvm_vcpu *vcpu;
6576         int i, send_ipi = 0;
6577
6578         /*
6579          * We allow guests to temporarily run on slowing clocks,
6580          * provided we notify them after, or to run on accelerating
6581          * clocks, provided we notify them before.  Thus time never
6582          * goes backwards.
6583          *
6584          * However, we have a problem.  We can't atomically update
6585          * the frequency of a given CPU from this function; it is
6586          * merely a notifier, which can be called from any CPU.
6587          * Changing the TSC frequency at arbitrary points in time
6588          * requires a recomputation of local variables related to
6589          * the TSC for each VCPU.  We must flag these local variables
6590          * to be updated and be sure the update takes place with the
6591          * new frequency before any guests proceed.
6592          *
6593          * Unfortunately, the combination of hotplug CPU and frequency
6594          * change creates an intractable locking scenario; the order
6595          * of when these callouts happen is undefined with respect to
6596          * CPU hotplug, and they can race with each other.  As such,
6597          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
6598          * undefined; you can actually have a CPU frequency change take
6599          * place in between the computation of X and the setting of the
6600          * variable.  To protect against this problem, all updates of
6601          * the per_cpu tsc_khz variable are done in an interrupt
6602          * protected IPI, and all callers wishing to update the value
6603          * must wait for a synchronous IPI to complete (which is trivial
6604          * if the caller is on the CPU already).  This establishes the
6605          * necessary total order on variable updates.
6606          *
6607          * Note that because a guest time update may take place
6608          * anytime after the setting of the VCPU's request bit, the
6609          * correct TSC value must be set before the request.  However,
6610          * to ensure the update actually makes it to any guest which
6611          * starts running in hardware virtualization between the set
6612          * and the acquisition of the spinlock, we must also ping the
6613          * CPU after setting the request bit.
6614          *
6615          */
6616
6617         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
6618                 return 0;
6619         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
6620                 return 0;
6621
6622         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
6623
6624         spin_lock(&kvm_lock);
6625         list_for_each_entry(kvm, &vm_list, vm_list) {
6626                 kvm_for_each_vcpu(i, vcpu, kvm) {
6627                         if (vcpu->cpu != freq->cpu)
6628                                 continue;
6629                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6630                         if (vcpu->cpu != smp_processor_id())
6631                                 send_ipi = 1;
6632                 }
6633         }
6634         spin_unlock(&kvm_lock);
6635
6636         if (freq->old < freq->new && send_ipi) {
6637                 /*
6638                  * We upscale the frequency.  Must make the guest
6639                  * doesn't see old kvmclock values while running with
6640                  * the new frequency, otherwise we risk the guest sees
6641                  * time go backwards.
6642                  *
6643                  * In case we update the frequency for another cpu
6644                  * (which might be in guest context) send an interrupt
6645                  * to kick the cpu out of guest context.  Next time
6646                  * guest context is entered kvmclock will be updated,
6647                  * so the guest will not see stale values.
6648                  */
6649                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
6650         }
6651         return 0;
6652 }
6653
6654 static struct notifier_block kvmclock_cpufreq_notifier_block = {
6655         .notifier_call  = kvmclock_cpufreq_notifier
6656 };
6657
6658 static int kvmclock_cpu_online(unsigned int cpu)
6659 {
6660         tsc_khz_changed(NULL);
6661         return 0;
6662 }
6663
6664 static void kvm_timer_init(void)
6665 {
6666         max_tsc_khz = tsc_khz;
6667
6668         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
6669 #ifdef CONFIG_CPU_FREQ
6670                 struct cpufreq_policy policy;
6671                 int cpu;
6672
6673                 memset(&policy, 0, sizeof(policy));
6674                 cpu = get_cpu();
6675                 cpufreq_get_policy(&policy, cpu);
6676                 if (policy.cpuinfo.max_freq)
6677                         max_tsc_khz = policy.cpuinfo.max_freq;
6678                 put_cpu();
6679 #endif
6680                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
6681                                           CPUFREQ_TRANSITION_NOTIFIER);
6682         }
6683         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
6684
6685         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
6686                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
6687 }
6688
6689 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
6690 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
6691
6692 int kvm_is_in_guest(void)
6693 {
6694         return __this_cpu_read(current_vcpu) != NULL;
6695 }
6696
6697 static int kvm_is_user_mode(void)
6698 {
6699         int user_mode = 3;
6700
6701         if (__this_cpu_read(current_vcpu))
6702                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
6703
6704         return user_mode != 0;
6705 }
6706
6707 static unsigned long kvm_get_guest_ip(void)
6708 {
6709         unsigned long ip = 0;
6710
6711         if (__this_cpu_read(current_vcpu))
6712                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
6713
6714         return ip;
6715 }
6716
6717 static struct perf_guest_info_callbacks kvm_guest_cbs = {
6718         .is_in_guest            = kvm_is_in_guest,
6719         .is_user_mode           = kvm_is_user_mode,
6720         .get_guest_ip           = kvm_get_guest_ip,
6721 };
6722
6723 static void kvm_set_mmio_spte_mask(void)
6724 {
6725         u64 mask;
6726         int maxphyaddr = boot_cpu_data.x86_phys_bits;
6727
6728         /*
6729          * Set the reserved bits and the present bit of an paging-structure
6730          * entry to generate page fault with PFER.RSV = 1.
6731          */
6732
6733         /*
6734          * Mask the uppermost physical address bit, which would be reserved as
6735          * long as the supported physical address width is less than 52.
6736          */
6737         mask = 1ull << 51;
6738
6739         /* Set the present bit. */
6740         mask |= 1ull;
6741
6742         /*
6743          * If reserved bit is not supported, clear the present bit to disable
6744          * mmio page fault.
6745          */
6746         if (IS_ENABLED(CONFIG_X86_64) && maxphyaddr == 52)
6747                 mask &= ~1ull;
6748
6749         kvm_mmu_set_mmio_spte_mask(mask, mask);
6750 }
6751
6752 #ifdef CONFIG_X86_64
6753 static void pvclock_gtod_update_fn(struct work_struct *work)
6754 {
6755         struct kvm *kvm;
6756
6757         struct kvm_vcpu *vcpu;
6758         int i;
6759
6760         spin_lock(&kvm_lock);
6761         list_for_each_entry(kvm, &vm_list, vm_list)
6762                 kvm_for_each_vcpu(i, vcpu, kvm)
6763                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
6764         atomic_set(&kvm_guest_has_master_clock, 0);
6765         spin_unlock(&kvm_lock);
6766 }
6767
6768 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
6769
6770 /*
6771  * Notification about pvclock gtod data update.
6772  */
6773 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
6774                                void *priv)
6775 {
6776         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
6777         struct timekeeper *tk = priv;
6778
6779         update_pvclock_gtod(tk);
6780
6781         /* disable master clock if host does not trust, or does not
6782          * use, TSC based clocksource.
6783          */
6784         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
6785             atomic_read(&kvm_guest_has_master_clock) != 0)
6786                 queue_work(system_long_wq, &pvclock_gtod_work);
6787
6788         return 0;
6789 }
6790
6791 static struct notifier_block pvclock_gtod_notifier = {
6792         .notifier_call = pvclock_gtod_notify,
6793 };
6794 #endif
6795
6796 int kvm_arch_init(void *opaque)
6797 {
6798         int r;
6799         struct kvm_x86_ops *ops = opaque;
6800
6801         if (kvm_x86_ops) {
6802                 printk(KERN_ERR "kvm: already loaded the other module\n");
6803                 r = -EEXIST;
6804                 goto out;
6805         }
6806
6807         if (!ops->cpu_has_kvm_support()) {
6808                 printk(KERN_ERR "kvm: no hardware support\n");
6809                 r = -EOPNOTSUPP;
6810                 goto out;
6811         }
6812         if (ops->disabled_by_bios()) {
6813                 printk(KERN_ERR "kvm: disabled by bios\n");
6814                 r = -EOPNOTSUPP;
6815                 goto out;
6816         }
6817
6818         r = -ENOMEM;
6819         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
6820         if (!shared_msrs) {
6821                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
6822                 goto out;
6823         }
6824
6825         r = kvm_mmu_module_init();
6826         if (r)
6827                 goto out_free_percpu;
6828
6829         kvm_set_mmio_spte_mask();
6830
6831         kvm_x86_ops = ops;
6832
6833         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
6834                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
6835                         PT_PRESENT_MASK, 0, sme_me_mask);
6836         kvm_timer_init();
6837
6838         perf_register_guest_info_callbacks(&kvm_guest_cbs);
6839
6840         if (boot_cpu_has(X86_FEATURE_XSAVE))
6841                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
6842
6843         kvm_lapic_init();
6844 #ifdef CONFIG_X86_64
6845         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
6846
6847         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
6848                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
6849 #endif
6850
6851         return 0;
6852
6853 out_free_percpu:
6854         free_percpu(shared_msrs);
6855 out:
6856         return r;
6857 }
6858
6859 void kvm_arch_exit(void)
6860 {
6861 #ifdef CONFIG_X86_64
6862         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
6863                 clear_hv_tscchange_cb();
6864 #endif
6865         kvm_lapic_exit();
6866         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
6867
6868         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6869                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
6870                                             CPUFREQ_TRANSITION_NOTIFIER);
6871         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
6872 #ifdef CONFIG_X86_64
6873         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
6874 #endif
6875         kvm_x86_ops = NULL;
6876         kvm_mmu_module_exit();
6877         free_percpu(shared_msrs);
6878 }
6879
6880 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
6881 {
6882         ++vcpu->stat.halt_exits;
6883         if (lapic_in_kernel(vcpu)) {
6884                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
6885                 return 1;
6886         } else {
6887                 vcpu->run->exit_reason = KVM_EXIT_HLT;
6888                 return 0;
6889         }
6890 }
6891 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
6892
6893 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
6894 {
6895         int ret = kvm_skip_emulated_instruction(vcpu);
6896         /*
6897          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
6898          * KVM_EXIT_DEBUG here.
6899          */
6900         return kvm_vcpu_halt(vcpu) && ret;
6901 }
6902 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
6903
6904 #ifdef CONFIG_X86_64
6905 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
6906                                 unsigned long clock_type)
6907 {
6908         struct kvm_clock_pairing clock_pairing;
6909         struct timespec64 ts;
6910         u64 cycle;
6911         int ret;
6912
6913         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
6914                 return -KVM_EOPNOTSUPP;
6915
6916         if (kvm_get_walltime_and_clockread(&ts, &cycle) == false)
6917                 return -KVM_EOPNOTSUPP;
6918
6919         clock_pairing.sec = ts.tv_sec;
6920         clock_pairing.nsec = ts.tv_nsec;
6921         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
6922         clock_pairing.flags = 0;
6923         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
6924
6925         ret = 0;
6926         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
6927                             sizeof(struct kvm_clock_pairing)))
6928                 ret = -KVM_EFAULT;
6929
6930         return ret;
6931 }
6932 #endif
6933
6934 /*
6935  * kvm_pv_kick_cpu_op:  Kick a vcpu.
6936  *
6937  * @apicid - apicid of vcpu to be kicked.
6938  */
6939 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
6940 {
6941         struct kvm_lapic_irq lapic_irq;
6942
6943         lapic_irq.shorthand = 0;
6944         lapic_irq.dest_mode = 0;
6945         lapic_irq.level = 0;
6946         lapic_irq.dest_id = apicid;
6947         lapic_irq.msi_redir_hint = false;
6948
6949         lapic_irq.delivery_mode = APIC_DM_REMRD;
6950         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
6951 }
6952
6953 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
6954 {
6955         vcpu->arch.apicv_active = false;
6956         kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
6957 }
6958
6959 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
6960 {
6961         unsigned long nr, a0, a1, a2, a3, ret;
6962         int op_64_bit;
6963
6964         if (kvm_hv_hypercall_enabled(vcpu->kvm))
6965                 return kvm_hv_hypercall(vcpu);
6966
6967         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
6968         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
6969         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
6970         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
6971         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
6972
6973         trace_kvm_hypercall(nr, a0, a1, a2, a3);
6974
6975         op_64_bit = is_64_bit_mode(vcpu);
6976         if (!op_64_bit) {
6977                 nr &= 0xFFFFFFFF;
6978                 a0 &= 0xFFFFFFFF;
6979                 a1 &= 0xFFFFFFFF;
6980                 a2 &= 0xFFFFFFFF;
6981                 a3 &= 0xFFFFFFFF;
6982         }
6983
6984         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
6985                 ret = -KVM_EPERM;
6986                 goto out;
6987         }
6988
6989         switch (nr) {
6990         case KVM_HC_VAPIC_POLL_IRQ:
6991                 ret = 0;
6992                 break;
6993         case KVM_HC_KICK_CPU:
6994                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
6995                 ret = 0;
6996                 break;
6997 #ifdef CONFIG_X86_64
6998         case KVM_HC_CLOCK_PAIRING:
6999                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
7000                 break;
7001         case KVM_HC_SEND_IPI:
7002                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
7003                 break;
7004 #endif
7005         default:
7006                 ret = -KVM_ENOSYS;
7007                 break;
7008         }
7009 out:
7010         if (!op_64_bit)
7011                 ret = (u32)ret;
7012         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
7013
7014         ++vcpu->stat.hypercalls;
7015         return kvm_skip_emulated_instruction(vcpu);
7016 }
7017 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
7018
7019 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
7020 {
7021         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7022         char instruction[3];
7023         unsigned long rip = kvm_rip_read(vcpu);
7024
7025         kvm_x86_ops->patch_hypercall(vcpu, instruction);
7026
7027         return emulator_write_emulated(ctxt, rip, instruction, 3,
7028                 &ctxt->exception);
7029 }
7030
7031 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
7032 {
7033         return vcpu->run->request_interrupt_window &&
7034                 likely(!pic_in_kernel(vcpu->kvm));
7035 }
7036
7037 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
7038 {
7039         struct kvm_run *kvm_run = vcpu->run;
7040
7041         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
7042         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
7043         kvm_run->cr8 = kvm_get_cr8(vcpu);
7044         kvm_run->apic_base = kvm_get_apic_base(vcpu);
7045         kvm_run->ready_for_interrupt_injection =
7046                 pic_in_kernel(vcpu->kvm) ||
7047                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
7048 }
7049
7050 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
7051 {
7052         int max_irr, tpr;
7053
7054         if (!kvm_x86_ops->update_cr8_intercept)
7055                 return;
7056
7057         if (!lapic_in_kernel(vcpu))
7058                 return;
7059
7060         if (vcpu->arch.apicv_active)
7061                 return;
7062
7063         if (!vcpu->arch.apic->vapic_addr)
7064                 max_irr = kvm_lapic_find_highest_irr(vcpu);
7065         else
7066                 max_irr = -1;
7067
7068         if (max_irr != -1)
7069                 max_irr >>= 4;
7070
7071         tpr = kvm_lapic_get_cr8(vcpu);
7072
7073         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
7074 }
7075
7076 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
7077 {
7078         int r;
7079
7080         /* try to reinject previous events if any */
7081
7082         if (vcpu->arch.exception.injected)
7083                 kvm_x86_ops->queue_exception(vcpu);
7084         /*
7085          * Do not inject an NMI or interrupt if there is a pending
7086          * exception.  Exceptions and interrupts are recognized at
7087          * instruction boundaries, i.e. the start of an instruction.
7088          * Trap-like exceptions, e.g. #DB, have higher priority than
7089          * NMIs and interrupts, i.e. traps are recognized before an
7090          * NMI/interrupt that's pending on the same instruction.
7091          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
7092          * priority, but are only generated (pended) during instruction
7093          * execution, i.e. a pending fault-like exception means the
7094          * fault occurred on the *previous* instruction and must be
7095          * serviced prior to recognizing any new events in order to
7096          * fully complete the previous instruction.
7097          */
7098         else if (!vcpu->arch.exception.pending) {
7099                 if (vcpu->arch.nmi_injected)
7100                         kvm_x86_ops->set_nmi(vcpu);
7101                 else if (vcpu->arch.interrupt.injected)
7102                         kvm_x86_ops->set_irq(vcpu);
7103         }
7104
7105         /*
7106          * Call check_nested_events() even if we reinjected a previous event
7107          * in order for caller to determine if it should require immediate-exit
7108          * from L2 to L1 due to pending L1 events which require exit
7109          * from L2 to L1.
7110          */
7111         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
7112                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
7113                 if (r != 0)
7114                         return r;
7115         }
7116
7117         /* try to inject new event if pending */
7118         if (vcpu->arch.exception.pending) {
7119                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
7120                                         vcpu->arch.exception.has_error_code,
7121                                         vcpu->arch.exception.error_code);
7122
7123                 WARN_ON_ONCE(vcpu->arch.exception.injected);
7124                 vcpu->arch.exception.pending = false;
7125                 vcpu->arch.exception.injected = true;
7126
7127                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
7128                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
7129                                              X86_EFLAGS_RF);
7130
7131                 if (vcpu->arch.exception.nr == DB_VECTOR) {
7132                         /*
7133                          * This code assumes that nSVM doesn't use
7134                          * check_nested_events(). If it does, the
7135                          * DR6/DR7 changes should happen before L1
7136                          * gets a #VMEXIT for an intercepted #DB in
7137                          * L2.  (Under VMX, on the other hand, the
7138                          * DR6/DR7 changes should not happen in the
7139                          * event of a VM-exit to L1 for an intercepted
7140                          * #DB in L2.)
7141                          */
7142                         kvm_deliver_exception_payload(vcpu);
7143                         if (vcpu->arch.dr7 & DR7_GD) {
7144                                 vcpu->arch.dr7 &= ~DR7_GD;
7145                                 kvm_update_dr7(vcpu);
7146                         }
7147                 }
7148
7149                 kvm_x86_ops->queue_exception(vcpu);
7150         }
7151
7152         /* Don't consider new event if we re-injected an event */
7153         if (kvm_event_needs_reinjection(vcpu))
7154                 return 0;
7155
7156         if (vcpu->arch.smi_pending && !is_smm(vcpu) &&
7157             kvm_x86_ops->smi_allowed(vcpu)) {
7158                 vcpu->arch.smi_pending = false;
7159                 ++vcpu->arch.smi_count;
7160                 enter_smm(vcpu);
7161         } else if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
7162                 --vcpu->arch.nmi_pending;
7163                 vcpu->arch.nmi_injected = true;
7164                 kvm_x86_ops->set_nmi(vcpu);
7165         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
7166                 /*
7167                  * Because interrupts can be injected asynchronously, we are
7168                  * calling check_nested_events again here to avoid a race condition.
7169                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
7170                  * proposal and current concerns.  Perhaps we should be setting
7171                  * KVM_REQ_EVENT only on certain events and not unconditionally?
7172                  */
7173                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
7174                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
7175                         if (r != 0)
7176                                 return r;
7177                 }
7178                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
7179                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
7180                                             false);
7181                         kvm_x86_ops->set_irq(vcpu);
7182                 }
7183         }
7184
7185         return 0;
7186 }
7187
7188 static void process_nmi(struct kvm_vcpu *vcpu)
7189 {
7190         unsigned limit = 2;
7191
7192         /*
7193          * x86 is limited to one NMI running, and one NMI pending after it.
7194          * If an NMI is already in progress, limit further NMIs to just one.
7195          * Otherwise, allow two (and we'll inject the first one immediately).
7196          */
7197         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
7198                 limit = 1;
7199
7200         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
7201         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
7202         kvm_make_request(KVM_REQ_EVENT, vcpu);
7203 }
7204
7205 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
7206 {
7207         u32 flags = 0;
7208         flags |= seg->g       << 23;
7209         flags |= seg->db      << 22;
7210         flags |= seg->l       << 21;
7211         flags |= seg->avl     << 20;
7212         flags |= seg->present << 15;
7213         flags |= seg->dpl     << 13;
7214         flags |= seg->s       << 12;
7215         flags |= seg->type    << 8;
7216         return flags;
7217 }
7218
7219 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
7220 {
7221         struct kvm_segment seg;
7222         int offset;
7223
7224         kvm_get_segment(vcpu, &seg, n);
7225         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
7226
7227         if (n < 3)
7228                 offset = 0x7f84 + n * 12;
7229         else
7230                 offset = 0x7f2c + (n - 3) * 12;
7231
7232         put_smstate(u32, buf, offset + 8, seg.base);
7233         put_smstate(u32, buf, offset + 4, seg.limit);
7234         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
7235 }
7236
7237 #ifdef CONFIG_X86_64
7238 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
7239 {
7240         struct kvm_segment seg;
7241         int offset;
7242         u16 flags;
7243
7244         kvm_get_segment(vcpu, &seg, n);
7245         offset = 0x7e00 + n * 16;
7246
7247         flags = enter_smm_get_segment_flags(&seg) >> 8;
7248         put_smstate(u16, buf, offset, seg.selector);
7249         put_smstate(u16, buf, offset + 2, flags);
7250         put_smstate(u32, buf, offset + 4, seg.limit);
7251         put_smstate(u64, buf, offset + 8, seg.base);
7252 }
7253 #endif
7254
7255 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
7256 {
7257         struct desc_ptr dt;
7258         struct kvm_segment seg;
7259         unsigned long val;
7260         int i;
7261
7262         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
7263         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
7264         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
7265         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
7266
7267         for (i = 0; i < 8; i++)
7268                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
7269
7270         kvm_get_dr(vcpu, 6, &val);
7271         put_smstate(u32, buf, 0x7fcc, (u32)val);
7272         kvm_get_dr(vcpu, 7, &val);
7273         put_smstate(u32, buf, 0x7fc8, (u32)val);
7274
7275         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
7276         put_smstate(u32, buf, 0x7fc4, seg.selector);
7277         put_smstate(u32, buf, 0x7f64, seg.base);
7278         put_smstate(u32, buf, 0x7f60, seg.limit);
7279         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
7280
7281         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
7282         put_smstate(u32, buf, 0x7fc0, seg.selector);
7283         put_smstate(u32, buf, 0x7f80, seg.base);
7284         put_smstate(u32, buf, 0x7f7c, seg.limit);
7285         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
7286
7287         kvm_x86_ops->get_gdt(vcpu, &dt);
7288         put_smstate(u32, buf, 0x7f74, dt.address);
7289         put_smstate(u32, buf, 0x7f70, dt.size);
7290
7291         kvm_x86_ops->get_idt(vcpu, &dt);
7292         put_smstate(u32, buf, 0x7f58, dt.address);
7293         put_smstate(u32, buf, 0x7f54, dt.size);
7294
7295         for (i = 0; i < 6; i++)
7296                 enter_smm_save_seg_32(vcpu, buf, i);
7297
7298         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
7299
7300         /* revision id */
7301         put_smstate(u32, buf, 0x7efc, 0x00020000);
7302         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
7303 }
7304
7305 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
7306 {
7307 #ifdef CONFIG_X86_64
7308         struct desc_ptr dt;
7309         struct kvm_segment seg;
7310         unsigned long val;
7311         int i;
7312
7313         for (i = 0; i < 16; i++)
7314                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
7315
7316         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
7317         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
7318
7319         kvm_get_dr(vcpu, 6, &val);
7320         put_smstate(u64, buf, 0x7f68, val);
7321         kvm_get_dr(vcpu, 7, &val);
7322         put_smstate(u64, buf, 0x7f60, val);
7323
7324         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
7325         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
7326         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
7327
7328         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
7329
7330         /* revision id */
7331         put_smstate(u32, buf, 0x7efc, 0x00020064);
7332
7333         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
7334
7335         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
7336         put_smstate(u16, buf, 0x7e90, seg.selector);
7337         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
7338         put_smstate(u32, buf, 0x7e94, seg.limit);
7339         put_smstate(u64, buf, 0x7e98, seg.base);
7340
7341         kvm_x86_ops->get_idt(vcpu, &dt);
7342         put_smstate(u32, buf, 0x7e84, dt.size);
7343         put_smstate(u64, buf, 0x7e88, dt.address);
7344
7345         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
7346         put_smstate(u16, buf, 0x7e70, seg.selector);
7347         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
7348         put_smstate(u32, buf, 0x7e74, seg.limit);
7349         put_smstate(u64, buf, 0x7e78, seg.base);
7350
7351         kvm_x86_ops->get_gdt(vcpu, &dt);
7352         put_smstate(u32, buf, 0x7e64, dt.size);
7353         put_smstate(u64, buf, 0x7e68, dt.address);
7354
7355         for (i = 0; i < 6; i++)
7356                 enter_smm_save_seg_64(vcpu, buf, i);
7357 #else
7358         WARN_ON_ONCE(1);
7359 #endif
7360 }
7361
7362 static void enter_smm(struct kvm_vcpu *vcpu)
7363 {
7364         struct kvm_segment cs, ds;
7365         struct desc_ptr dt;
7366         char buf[512];
7367         u32 cr0;
7368
7369         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
7370         memset(buf, 0, 512);
7371         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7372                 enter_smm_save_state_64(vcpu, buf);
7373         else
7374                 enter_smm_save_state_32(vcpu, buf);
7375
7376         /*
7377          * Give pre_enter_smm() a chance to make ISA-specific changes to the
7378          * vCPU state (e.g. leave guest mode) after we've saved the state into
7379          * the SMM state-save area.
7380          */
7381         kvm_x86_ops->pre_enter_smm(vcpu, buf);
7382
7383         vcpu->arch.hflags |= HF_SMM_MASK;
7384         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
7385
7386         if (kvm_x86_ops->get_nmi_mask(vcpu))
7387                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
7388         else
7389                 kvm_x86_ops->set_nmi_mask(vcpu, true);
7390
7391         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
7392         kvm_rip_write(vcpu, 0x8000);
7393
7394         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
7395         kvm_x86_ops->set_cr0(vcpu, cr0);
7396         vcpu->arch.cr0 = cr0;
7397
7398         kvm_x86_ops->set_cr4(vcpu, 0);
7399
7400         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
7401         dt.address = dt.size = 0;
7402         kvm_x86_ops->set_idt(vcpu, &dt);
7403
7404         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
7405
7406         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
7407         cs.base = vcpu->arch.smbase;
7408
7409         ds.selector = 0;
7410         ds.base = 0;
7411
7412         cs.limit    = ds.limit = 0xffffffff;
7413         cs.type     = ds.type = 0x3;
7414         cs.dpl      = ds.dpl = 0;
7415         cs.db       = ds.db = 0;
7416         cs.s        = ds.s = 1;
7417         cs.l        = ds.l = 0;
7418         cs.g        = ds.g = 1;
7419         cs.avl      = ds.avl = 0;
7420         cs.present  = ds.present = 1;
7421         cs.unusable = ds.unusable = 0;
7422         cs.padding  = ds.padding = 0;
7423
7424         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7425         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
7426         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
7427         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
7428         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
7429         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
7430
7431         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7432                 kvm_x86_ops->set_efer(vcpu, 0);
7433
7434         kvm_update_cpuid(vcpu);
7435         kvm_mmu_reset_context(vcpu);
7436 }
7437
7438 static void process_smi(struct kvm_vcpu *vcpu)
7439 {
7440         vcpu->arch.smi_pending = true;
7441         kvm_make_request(KVM_REQ_EVENT, vcpu);
7442 }
7443
7444 void kvm_make_scan_ioapic_request(struct kvm *kvm)
7445 {
7446         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
7447 }
7448
7449 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
7450 {
7451         if (!kvm_apic_present(vcpu))
7452                 return;
7453
7454         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
7455
7456         if (irqchip_split(vcpu->kvm))
7457                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
7458         else {
7459                 if (vcpu->arch.apicv_active)
7460                         kvm_x86_ops->sync_pir_to_irr(vcpu);
7461                 if (ioapic_in_kernel(vcpu->kvm))
7462                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
7463         }
7464
7465         if (is_guest_mode(vcpu))
7466                 vcpu->arch.load_eoi_exitmap_pending = true;
7467         else
7468                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
7469 }
7470
7471 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
7472 {
7473         u64 eoi_exit_bitmap[4];
7474
7475         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
7476                 return;
7477
7478         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
7479                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
7480         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
7481 }
7482
7483 int kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
7484                 unsigned long start, unsigned long end,
7485                 bool blockable)
7486 {
7487         unsigned long apic_address;
7488
7489         /*
7490          * The physical address of apic access page is stored in the VMCS.
7491          * Update it when it becomes invalid.
7492          */
7493         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7494         if (start <= apic_address && apic_address < end)
7495                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
7496
7497         return 0;
7498 }
7499
7500 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
7501 {
7502         struct page *page = NULL;
7503
7504         if (!lapic_in_kernel(vcpu))
7505                 return;
7506
7507         if (!kvm_x86_ops->set_apic_access_page_addr)
7508                 return;
7509
7510         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7511         if (is_error_page(page))
7512                 return;
7513         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
7514
7515         /*
7516          * Do not pin apic access page in memory, the MMU notifier
7517          * will call us again if it is migrated or swapped out.
7518          */
7519         put_page(page);
7520 }
7521 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
7522
7523 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
7524 {
7525         smp_send_reschedule(vcpu->cpu);
7526 }
7527 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
7528
7529 /*
7530  * Returns 1 to let vcpu_run() continue the guest execution loop without
7531  * exiting to the userspace.  Otherwise, the value will be returned to the
7532  * userspace.
7533  */
7534 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
7535 {
7536         int r;
7537         bool req_int_win =
7538                 dm_request_for_irq_injection(vcpu) &&
7539                 kvm_cpu_accept_dm_intr(vcpu);
7540
7541         bool req_immediate_exit = false;
7542
7543         if (kvm_request_pending(vcpu)) {
7544                 if (kvm_check_request(KVM_REQ_GET_VMCS12_PAGES, vcpu))
7545                         kvm_x86_ops->get_vmcs12_pages(vcpu);
7546                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
7547                         kvm_mmu_unload(vcpu);
7548                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
7549                         __kvm_migrate_timers(vcpu);
7550                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
7551                         kvm_gen_update_masterclock(vcpu->kvm);
7552                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
7553                         kvm_gen_kvmclock_update(vcpu);
7554                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
7555                         r = kvm_guest_time_update(vcpu);
7556                         if (unlikely(r))
7557                                 goto out;
7558                 }
7559                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
7560                         kvm_mmu_sync_roots(vcpu);
7561                 if (kvm_check_request(KVM_REQ_LOAD_CR3, vcpu))
7562                         kvm_mmu_load_cr3(vcpu);
7563                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
7564                         kvm_vcpu_flush_tlb(vcpu, true);
7565                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
7566                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
7567                         r = 0;
7568                         goto out;
7569                 }
7570                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
7571                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
7572                         vcpu->mmio_needed = 0;
7573                         r = 0;
7574                         goto out;
7575                 }
7576                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
7577                         /* Page is swapped out. Do synthetic halt */
7578                         vcpu->arch.apf.halted = true;
7579                         r = 1;
7580                         goto out;
7581                 }
7582                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
7583                         record_steal_time(vcpu);
7584                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
7585                         process_smi(vcpu);
7586                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
7587                         process_nmi(vcpu);
7588                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
7589                         kvm_pmu_handle_event(vcpu);
7590                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
7591                         kvm_pmu_deliver_pmi(vcpu);
7592                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
7593                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
7594                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
7595                                      vcpu->arch.ioapic_handled_vectors)) {
7596                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
7597                                 vcpu->run->eoi.vector =
7598                                                 vcpu->arch.pending_ioapic_eoi;
7599                                 r = 0;
7600                                 goto out;
7601                         }
7602                 }
7603                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
7604                         vcpu_scan_ioapic(vcpu);
7605                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
7606                         vcpu_load_eoi_exitmap(vcpu);
7607                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
7608                         kvm_vcpu_reload_apic_access_page(vcpu);
7609                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
7610                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
7611                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
7612                         r = 0;
7613                         goto out;
7614                 }
7615                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
7616                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
7617                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
7618                         r = 0;
7619                         goto out;
7620                 }
7621                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
7622                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
7623                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
7624                         r = 0;
7625                         goto out;
7626                 }
7627
7628                 /*
7629                  * KVM_REQ_HV_STIMER has to be processed after
7630                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
7631                  * depend on the guest clock being up-to-date
7632                  */
7633                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
7634                         kvm_hv_process_stimers(vcpu);
7635         }
7636
7637         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
7638                 ++vcpu->stat.req_event;
7639                 kvm_apic_accept_events(vcpu);
7640                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
7641                         r = 1;
7642                         goto out;
7643                 }
7644
7645                 if (inject_pending_event(vcpu, req_int_win) != 0)
7646                         req_immediate_exit = true;
7647                 else {
7648                         /* Enable SMI/NMI/IRQ window open exits if needed.
7649                          *
7650                          * SMIs have three cases:
7651                          * 1) They can be nested, and then there is nothing to
7652                          *    do here because RSM will cause a vmexit anyway.
7653                          * 2) There is an ISA-specific reason why SMI cannot be
7654                          *    injected, and the moment when this changes can be
7655                          *    intercepted.
7656                          * 3) Or the SMI can be pending because
7657                          *    inject_pending_event has completed the injection
7658                          *    of an IRQ or NMI from the previous vmexit, and
7659                          *    then we request an immediate exit to inject the
7660                          *    SMI.
7661                          */
7662                         if (vcpu->arch.smi_pending && !is_smm(vcpu))
7663                                 if (!kvm_x86_ops->enable_smi_window(vcpu))
7664                                         req_immediate_exit = true;
7665                         if (vcpu->arch.nmi_pending)
7666                                 kvm_x86_ops->enable_nmi_window(vcpu);
7667                         if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
7668                                 kvm_x86_ops->enable_irq_window(vcpu);
7669                         WARN_ON(vcpu->arch.exception.pending);
7670                 }
7671
7672                 if (kvm_lapic_enabled(vcpu)) {
7673                         update_cr8_intercept(vcpu);
7674                         kvm_lapic_sync_to_vapic(vcpu);
7675                 }
7676         }
7677
7678         r = kvm_mmu_reload(vcpu);
7679         if (unlikely(r)) {
7680                 goto cancel_injection;
7681         }
7682
7683         preempt_disable();
7684
7685         kvm_x86_ops->prepare_guest_switch(vcpu);
7686
7687         /*
7688          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
7689          * IPI are then delayed after guest entry, which ensures that they
7690          * result in virtual interrupt delivery.
7691          */
7692         local_irq_disable();
7693         vcpu->mode = IN_GUEST_MODE;
7694
7695         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
7696
7697         /*
7698          * 1) We should set ->mode before checking ->requests.  Please see
7699          * the comment in kvm_vcpu_exiting_guest_mode().
7700          *
7701          * 2) For APICv, we should set ->mode before checking PIR.ON.  This
7702          * pairs with the memory barrier implicit in pi_test_and_set_on
7703          * (see vmx_deliver_posted_interrupt).
7704          *
7705          * 3) This also orders the write to mode from any reads to the page
7706          * tables done while the VCPU is running.  Please see the comment
7707          * in kvm_flush_remote_tlbs.
7708          */
7709         smp_mb__after_srcu_read_unlock();
7710
7711         /*
7712          * This handles the case where a posted interrupt was
7713          * notified with kvm_vcpu_kick.
7714          */
7715         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
7716                 kvm_x86_ops->sync_pir_to_irr(vcpu);
7717
7718         if (vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu)
7719             || need_resched() || signal_pending(current)) {
7720                 vcpu->mode = OUTSIDE_GUEST_MODE;
7721                 smp_wmb();
7722                 local_irq_enable();
7723                 preempt_enable();
7724                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7725                 r = 1;
7726                 goto cancel_injection;
7727         }
7728
7729         kvm_load_guest_xcr0(vcpu);
7730
7731         if (req_immediate_exit) {
7732                 kvm_make_request(KVM_REQ_EVENT, vcpu);
7733                 kvm_x86_ops->request_immediate_exit(vcpu);
7734         }
7735
7736         trace_kvm_entry(vcpu->vcpu_id);
7737         if (lapic_timer_advance_ns)
7738                 wait_lapic_expire(vcpu);
7739         guest_enter_irqoff();
7740
7741         if (unlikely(vcpu->arch.switch_db_regs)) {
7742                 set_debugreg(0, 7);
7743                 set_debugreg(vcpu->arch.eff_db[0], 0);
7744                 set_debugreg(vcpu->arch.eff_db[1], 1);
7745                 set_debugreg(vcpu->arch.eff_db[2], 2);
7746                 set_debugreg(vcpu->arch.eff_db[3], 3);
7747                 set_debugreg(vcpu->arch.dr6, 6);
7748                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
7749         }
7750
7751         kvm_x86_ops->run(vcpu);
7752
7753         /*
7754          * Do this here before restoring debug registers on the host.  And
7755          * since we do this before handling the vmexit, a DR access vmexit
7756          * can (a) read the correct value of the debug registers, (b) set
7757          * KVM_DEBUGREG_WONT_EXIT again.
7758          */
7759         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
7760                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
7761                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
7762                 kvm_update_dr0123(vcpu);
7763                 kvm_update_dr6(vcpu);
7764                 kvm_update_dr7(vcpu);
7765                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
7766         }
7767
7768         /*
7769          * If the guest has used debug registers, at least dr7
7770          * will be disabled while returning to the host.
7771          * If we don't have active breakpoints in the host, we don't
7772          * care about the messed up debug address registers. But if
7773          * we have some of them active, restore the old state.
7774          */
7775         if (hw_breakpoint_active())
7776                 hw_breakpoint_restore();
7777
7778         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
7779
7780         vcpu->mode = OUTSIDE_GUEST_MODE;
7781         smp_wmb();
7782
7783         kvm_put_guest_xcr0(vcpu);
7784
7785         kvm_before_interrupt(vcpu);
7786         kvm_x86_ops->handle_external_intr(vcpu);
7787         kvm_after_interrupt(vcpu);
7788
7789         ++vcpu->stat.exits;
7790
7791         guest_exit_irqoff();
7792
7793         local_irq_enable();
7794         preempt_enable();
7795
7796         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7797
7798         /*
7799          * Profile KVM exit RIPs:
7800          */
7801         if (unlikely(prof_on == KVM_PROFILING)) {
7802                 unsigned long rip = kvm_rip_read(vcpu);
7803                 profile_hit(KVM_PROFILING, (void *)rip);
7804         }
7805
7806         if (unlikely(vcpu->arch.tsc_always_catchup))
7807                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7808
7809         if (vcpu->arch.apic_attention)
7810                 kvm_lapic_sync_from_vapic(vcpu);
7811
7812         vcpu->arch.gpa_available = false;
7813         r = kvm_x86_ops->handle_exit(vcpu);
7814         return r;
7815
7816 cancel_injection:
7817         kvm_x86_ops->cancel_injection(vcpu);
7818         if (unlikely(vcpu->arch.apic_attention))
7819                 kvm_lapic_sync_from_vapic(vcpu);
7820 out:
7821         return r;
7822 }
7823
7824 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
7825 {
7826         if (!kvm_arch_vcpu_runnable(vcpu) &&
7827             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
7828                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7829                 kvm_vcpu_block(vcpu);
7830                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7831
7832                 if (kvm_x86_ops->post_block)
7833                         kvm_x86_ops->post_block(vcpu);
7834
7835                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
7836                         return 1;
7837         }
7838
7839         kvm_apic_accept_events(vcpu);
7840         switch(vcpu->arch.mp_state) {
7841         case KVM_MP_STATE_HALTED:
7842                 vcpu->arch.pv.pv_unhalted = false;
7843                 vcpu->arch.mp_state =
7844                         KVM_MP_STATE_RUNNABLE;
7845         case KVM_MP_STATE_RUNNABLE:
7846                 vcpu->arch.apf.halted = false;
7847                 break;
7848         case KVM_MP_STATE_INIT_RECEIVED:
7849                 break;
7850         default:
7851                 return -EINTR;
7852                 break;
7853         }
7854         return 1;
7855 }
7856
7857 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
7858 {
7859         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
7860                 kvm_x86_ops->check_nested_events(vcpu, false);
7861
7862         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
7863                 !vcpu->arch.apf.halted);
7864 }
7865
7866 static int vcpu_run(struct kvm_vcpu *vcpu)
7867 {
7868         int r;
7869         struct kvm *kvm = vcpu->kvm;
7870
7871         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7872         vcpu->arch.l1tf_flush_l1d = true;
7873
7874         for (;;) {
7875                 if (kvm_vcpu_running(vcpu)) {
7876                         r = vcpu_enter_guest(vcpu);
7877                 } else {
7878                         r = vcpu_block(kvm, vcpu);
7879                 }
7880
7881                 if (r <= 0)
7882                         break;
7883
7884                 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
7885                 if (kvm_cpu_has_pending_timer(vcpu))
7886                         kvm_inject_pending_timer_irqs(vcpu);
7887
7888                 if (dm_request_for_irq_injection(vcpu) &&
7889                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
7890                         r = 0;
7891                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
7892                         ++vcpu->stat.request_irq_exits;
7893                         break;
7894                 }
7895
7896                 kvm_check_async_pf_completion(vcpu);
7897
7898                 if (signal_pending(current)) {
7899                         r = -EINTR;
7900                         vcpu->run->exit_reason = KVM_EXIT_INTR;
7901                         ++vcpu->stat.signal_exits;
7902                         break;
7903                 }
7904                 if (need_resched()) {
7905                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7906                         cond_resched();
7907                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7908                 }
7909         }
7910
7911         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7912
7913         return r;
7914 }
7915
7916 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
7917 {
7918         int r;
7919         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7920         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
7921         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
7922         if (r != EMULATE_DONE)
7923                 return 0;
7924         return 1;
7925 }
7926
7927 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
7928 {
7929         BUG_ON(!vcpu->arch.pio.count);
7930
7931         return complete_emulated_io(vcpu);
7932 }
7933
7934 /*
7935  * Implements the following, as a state machine:
7936  *
7937  * read:
7938  *   for each fragment
7939  *     for each mmio piece in the fragment
7940  *       write gpa, len
7941  *       exit
7942  *       copy data
7943  *   execute insn
7944  *
7945  * write:
7946  *   for each fragment
7947  *     for each mmio piece in the fragment
7948  *       write gpa, len
7949  *       copy data
7950  *       exit
7951  */
7952 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
7953 {
7954         struct kvm_run *run = vcpu->run;
7955         struct kvm_mmio_fragment *frag;
7956         unsigned len;
7957
7958         BUG_ON(!vcpu->mmio_needed);
7959
7960         /* Complete previous fragment */
7961         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
7962         len = min(8u, frag->len);
7963         if (!vcpu->mmio_is_write)
7964                 memcpy(frag->data, run->mmio.data, len);
7965
7966         if (frag->len <= 8) {
7967                 /* Switch to the next fragment. */
7968                 frag++;
7969                 vcpu->mmio_cur_fragment++;
7970         } else {
7971                 /* Go forward to the next mmio piece. */
7972                 frag->data += len;
7973                 frag->gpa += len;
7974                 frag->len -= len;
7975         }
7976
7977         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
7978                 vcpu->mmio_needed = 0;
7979
7980                 /* FIXME: return into emulator if single-stepping.  */
7981                 if (vcpu->mmio_is_write)
7982                         return 1;
7983                 vcpu->mmio_read_completed = 1;
7984                 return complete_emulated_io(vcpu);
7985         }
7986
7987         run->exit_reason = KVM_EXIT_MMIO;
7988         run->mmio.phys_addr = frag->gpa;
7989         if (vcpu->mmio_is_write)
7990                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
7991         run->mmio.len = min(8u, frag->len);
7992         run->mmio.is_write = vcpu->mmio_is_write;
7993         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7994         return 0;
7995 }
7996
7997 /* Swap (qemu) user FPU context for the guest FPU context. */
7998 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
7999 {
8000         preempt_disable();
8001         copy_fpregs_to_fpstate(&vcpu->arch.user_fpu);
8002         /* PKRU is separately restored in kvm_x86_ops->run.  */
8003         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state,
8004                                 ~XFEATURE_MASK_PKRU);
8005         preempt_enable();
8006         trace_kvm_fpu(1);
8007 }
8008
8009 /* When vcpu_run ends, restore user space FPU context. */
8010 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
8011 {
8012         preempt_disable();
8013         copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
8014         copy_kernel_to_fpregs(&vcpu->arch.user_fpu.state);
8015         preempt_enable();
8016         ++vcpu->stat.fpu_reload;
8017         trace_kvm_fpu(0);
8018 }
8019
8020 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
8021 {
8022         int r;
8023
8024         vcpu_load(vcpu);
8025         kvm_sigset_activate(vcpu);
8026         kvm_load_guest_fpu(vcpu);
8027
8028         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
8029                 if (kvm_run->immediate_exit) {
8030                         r = -EINTR;
8031                         goto out;
8032                 }
8033                 kvm_vcpu_block(vcpu);
8034                 kvm_apic_accept_events(vcpu);
8035                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
8036                 r = -EAGAIN;
8037                 if (signal_pending(current)) {
8038                         r = -EINTR;
8039                         vcpu->run->exit_reason = KVM_EXIT_INTR;
8040                         ++vcpu->stat.signal_exits;
8041                 }
8042                 goto out;
8043         }
8044
8045         if (vcpu->run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
8046                 r = -EINVAL;
8047                 goto out;
8048         }
8049
8050         if (vcpu->run->kvm_dirty_regs) {
8051                 r = sync_regs(vcpu);
8052                 if (r != 0)
8053                         goto out;
8054         }
8055
8056         /* re-sync apic's tpr */
8057         if (!lapic_in_kernel(vcpu)) {
8058                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
8059                         r = -EINVAL;
8060                         goto out;
8061                 }
8062         }
8063
8064         if (unlikely(vcpu->arch.complete_userspace_io)) {
8065                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
8066                 vcpu->arch.complete_userspace_io = NULL;
8067                 r = cui(vcpu);
8068                 if (r <= 0)
8069                         goto out;
8070         } else
8071                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
8072
8073         if (kvm_run->immediate_exit)
8074                 r = -EINTR;
8075         else
8076                 r = vcpu_run(vcpu);
8077
8078 out:
8079         kvm_put_guest_fpu(vcpu);
8080         if (vcpu->run->kvm_valid_regs)
8081                 store_regs(vcpu);
8082         post_kvm_run_save(vcpu);
8083         kvm_sigset_deactivate(vcpu);
8084
8085         vcpu_put(vcpu);
8086         return r;
8087 }
8088
8089 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8090 {
8091         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
8092                 /*
8093                  * We are here if userspace calls get_regs() in the middle of
8094                  * instruction emulation. Registers state needs to be copied
8095                  * back from emulation context to vcpu. Userspace shouldn't do
8096                  * that usually, but some bad designed PV devices (vmware
8097                  * backdoor interface) need this to work
8098                  */
8099                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
8100                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8101         }
8102         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
8103         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
8104         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
8105         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
8106         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
8107         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
8108         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
8109         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
8110 #ifdef CONFIG_X86_64
8111         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
8112         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
8113         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
8114         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
8115         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
8116         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
8117         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
8118         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
8119 #endif
8120
8121         regs->rip = kvm_rip_read(vcpu);
8122         regs->rflags = kvm_get_rflags(vcpu);
8123 }
8124
8125 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8126 {
8127         vcpu_load(vcpu);
8128         __get_regs(vcpu, regs);
8129         vcpu_put(vcpu);
8130         return 0;
8131 }
8132
8133 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8134 {
8135         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
8136         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8137
8138         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
8139         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
8140         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
8141         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
8142         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
8143         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
8144         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
8145         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
8146 #ifdef CONFIG_X86_64
8147         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
8148         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
8149         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
8150         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
8151         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
8152         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
8153         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
8154         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
8155 #endif
8156
8157         kvm_rip_write(vcpu, regs->rip);
8158         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
8159
8160         vcpu->arch.exception.pending = false;
8161
8162         kvm_make_request(KVM_REQ_EVENT, vcpu);
8163 }
8164
8165 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8166 {
8167         vcpu_load(vcpu);
8168         __set_regs(vcpu, regs);
8169         vcpu_put(vcpu);
8170         return 0;
8171 }
8172
8173 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
8174 {
8175         struct kvm_segment cs;
8176
8177         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
8178         *db = cs.db;
8179         *l = cs.l;
8180 }
8181 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
8182
8183 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8184 {
8185         struct desc_ptr dt;
8186
8187         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
8188         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
8189         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
8190         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
8191         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
8192         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
8193
8194         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
8195         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
8196
8197         kvm_x86_ops->get_idt(vcpu, &dt);
8198         sregs->idt.limit = dt.size;
8199         sregs->idt.base = dt.address;
8200         kvm_x86_ops->get_gdt(vcpu, &dt);
8201         sregs->gdt.limit = dt.size;
8202         sregs->gdt.base = dt.address;
8203
8204         sregs->cr0 = kvm_read_cr0(vcpu);
8205         sregs->cr2 = vcpu->arch.cr2;
8206         sregs->cr3 = kvm_read_cr3(vcpu);
8207         sregs->cr4 = kvm_read_cr4(vcpu);
8208         sregs->cr8 = kvm_get_cr8(vcpu);
8209         sregs->efer = vcpu->arch.efer;
8210         sregs->apic_base = kvm_get_apic_base(vcpu);
8211
8212         memset(sregs->interrupt_bitmap, 0, sizeof(sregs->interrupt_bitmap));
8213
8214         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
8215                 set_bit(vcpu->arch.interrupt.nr,
8216                         (unsigned long *)sregs->interrupt_bitmap);
8217 }
8218
8219 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
8220                                   struct kvm_sregs *sregs)
8221 {
8222         vcpu_load(vcpu);
8223         __get_sregs(vcpu, sregs);
8224         vcpu_put(vcpu);
8225         return 0;
8226 }
8227
8228 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
8229                                     struct kvm_mp_state *mp_state)
8230 {
8231         vcpu_load(vcpu);
8232
8233         kvm_apic_accept_events(vcpu);
8234         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
8235                                         vcpu->arch.pv.pv_unhalted)
8236                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
8237         else
8238                 mp_state->mp_state = vcpu->arch.mp_state;
8239
8240         vcpu_put(vcpu);
8241         return 0;
8242 }
8243
8244 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
8245                                     struct kvm_mp_state *mp_state)
8246 {
8247         int ret = -EINVAL;
8248
8249         vcpu_load(vcpu);
8250
8251         if (!lapic_in_kernel(vcpu) &&
8252             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
8253                 goto out;
8254
8255         /* INITs are latched while in SMM */
8256         if ((is_smm(vcpu) || vcpu->arch.smi_pending) &&
8257             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
8258              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
8259                 goto out;
8260
8261         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
8262                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
8263                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
8264         } else
8265                 vcpu->arch.mp_state = mp_state->mp_state;
8266         kvm_make_request(KVM_REQ_EVENT, vcpu);
8267
8268         ret = 0;
8269 out:
8270         vcpu_put(vcpu);
8271         return ret;
8272 }
8273
8274 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
8275                     int reason, bool has_error_code, u32 error_code)
8276 {
8277         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
8278         int ret;
8279
8280         init_emulate_ctxt(vcpu);
8281
8282         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
8283                                    has_error_code, error_code);
8284
8285         if (ret)
8286                 return EMULATE_FAIL;
8287
8288         kvm_rip_write(vcpu, ctxt->eip);
8289         kvm_set_rflags(vcpu, ctxt->eflags);
8290         kvm_make_request(KVM_REQ_EVENT, vcpu);
8291         return EMULATE_DONE;
8292 }
8293 EXPORT_SYMBOL_GPL(kvm_task_switch);
8294
8295 static int kvm_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8296 {
8297         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) &&
8298                         (sregs->cr4 & X86_CR4_OSXSAVE))
8299                 return  -EINVAL;
8300
8301         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
8302                 /*
8303                  * When EFER.LME and CR0.PG are set, the processor is in
8304                  * 64-bit mode (though maybe in a 32-bit code segment).
8305                  * CR4.PAE and EFER.LMA must be set.
8306                  */
8307                 if (!(sregs->cr4 & X86_CR4_PAE)
8308                     || !(sregs->efer & EFER_LMA))
8309                         return -EINVAL;
8310         } else {
8311                 /*
8312                  * Not in 64-bit mode: EFER.LMA is clear and the code
8313                  * segment cannot be 64-bit.
8314                  */
8315                 if (sregs->efer & EFER_LMA || sregs->cs.l)
8316                         return -EINVAL;
8317         }
8318
8319         return 0;
8320 }
8321
8322 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8323 {
8324         struct msr_data apic_base_msr;
8325         int mmu_reset_needed = 0;
8326         int cpuid_update_needed = 0;
8327         int pending_vec, max_bits, idx;
8328         struct desc_ptr dt;
8329         int ret = -EINVAL;
8330
8331         if (kvm_valid_sregs(vcpu, sregs))
8332                 goto out;
8333
8334         apic_base_msr.data = sregs->apic_base;
8335         apic_base_msr.host_initiated = true;
8336         if (kvm_set_apic_base(vcpu, &apic_base_msr))
8337                 goto out;
8338
8339         dt.size = sregs->idt.limit;
8340         dt.address = sregs->idt.base;
8341         kvm_x86_ops->set_idt(vcpu, &dt);
8342         dt.size = sregs->gdt.limit;
8343         dt.address = sregs->gdt.base;
8344         kvm_x86_ops->set_gdt(vcpu, &dt);
8345
8346         vcpu->arch.cr2 = sregs->cr2;
8347         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
8348         vcpu->arch.cr3 = sregs->cr3;
8349         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
8350
8351         kvm_set_cr8(vcpu, sregs->cr8);
8352
8353         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
8354         kvm_x86_ops->set_efer(vcpu, sregs->efer);
8355
8356         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
8357         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
8358         vcpu->arch.cr0 = sregs->cr0;
8359
8360         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
8361         cpuid_update_needed |= ((kvm_read_cr4(vcpu) ^ sregs->cr4) &
8362                                 (X86_CR4_OSXSAVE | X86_CR4_PKE));
8363         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
8364         if (cpuid_update_needed)
8365                 kvm_update_cpuid(vcpu);
8366
8367         idx = srcu_read_lock(&vcpu->kvm->srcu);
8368         if (!is_long_mode(vcpu) && is_pae(vcpu) && is_paging(vcpu)) {
8369                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
8370                 mmu_reset_needed = 1;
8371         }
8372         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8373
8374         if (mmu_reset_needed)
8375                 kvm_mmu_reset_context(vcpu);
8376
8377         max_bits = KVM_NR_INTERRUPTS;
8378         pending_vec = find_first_bit(
8379                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
8380         if (pending_vec < max_bits) {
8381                 kvm_queue_interrupt(vcpu, pending_vec, false);
8382                 pr_debug("Set back pending irq %d\n", pending_vec);
8383         }
8384
8385         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
8386         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
8387         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
8388         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
8389         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
8390         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
8391
8392         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
8393         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
8394
8395         update_cr8_intercept(vcpu);
8396
8397         /* Older userspace won't unhalt the vcpu on reset. */
8398         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
8399             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
8400             !is_protmode(vcpu))
8401                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8402
8403         kvm_make_request(KVM_REQ_EVENT, vcpu);
8404
8405         ret = 0;
8406 out:
8407         return ret;
8408 }
8409
8410 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
8411                                   struct kvm_sregs *sregs)
8412 {
8413         int ret;
8414
8415         vcpu_load(vcpu);
8416         ret = __set_sregs(vcpu, sregs);
8417         vcpu_put(vcpu);
8418         return ret;
8419 }
8420
8421 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
8422                                         struct kvm_guest_debug *dbg)
8423 {
8424         unsigned long rflags;
8425         int i, r;
8426
8427         vcpu_load(vcpu);
8428
8429         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
8430                 r = -EBUSY;
8431                 if (vcpu->arch.exception.pending)
8432                         goto out;
8433                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
8434                         kvm_queue_exception(vcpu, DB_VECTOR);
8435                 else
8436                         kvm_queue_exception(vcpu, BP_VECTOR);
8437         }
8438
8439         /*
8440          * Read rflags as long as potentially injected trace flags are still
8441          * filtered out.
8442          */
8443         rflags = kvm_get_rflags(vcpu);
8444
8445         vcpu->guest_debug = dbg->control;
8446         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
8447                 vcpu->guest_debug = 0;
8448
8449         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
8450                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
8451                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
8452                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
8453         } else {
8454                 for (i = 0; i < KVM_NR_DB_REGS; i++)
8455                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
8456         }
8457         kvm_update_dr7(vcpu);
8458
8459         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8460                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
8461                         get_segment_base(vcpu, VCPU_SREG_CS);
8462
8463         /*
8464          * Trigger an rflags update that will inject or remove the trace
8465          * flags.
8466          */
8467         kvm_set_rflags(vcpu, rflags);
8468
8469         kvm_x86_ops->update_bp_intercept(vcpu);
8470
8471         r = 0;
8472
8473 out:
8474         vcpu_put(vcpu);
8475         return r;
8476 }
8477
8478 /*
8479  * Translate a guest virtual address to a guest physical address.
8480  */
8481 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
8482                                     struct kvm_translation *tr)
8483 {
8484         unsigned long vaddr = tr->linear_address;
8485         gpa_t gpa;
8486         int idx;
8487
8488         vcpu_load(vcpu);
8489
8490         idx = srcu_read_lock(&vcpu->kvm->srcu);
8491         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
8492         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8493         tr->physical_address = gpa;
8494         tr->valid = gpa != UNMAPPED_GVA;
8495         tr->writeable = 1;
8496         tr->usermode = 0;
8497
8498         vcpu_put(vcpu);
8499         return 0;
8500 }
8501
8502 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
8503 {
8504         struct fxregs_state *fxsave;
8505
8506         vcpu_load(vcpu);
8507
8508         fxsave = &vcpu->arch.guest_fpu.state.fxsave;
8509         memcpy(fpu->fpr, fxsave->st_space, 128);
8510         fpu->fcw = fxsave->cwd;
8511         fpu->fsw = fxsave->swd;
8512         fpu->ftwx = fxsave->twd;
8513         fpu->last_opcode = fxsave->fop;
8514         fpu->last_ip = fxsave->rip;
8515         fpu->last_dp = fxsave->rdp;
8516         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
8517
8518         vcpu_put(vcpu);
8519         return 0;
8520 }
8521
8522 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
8523 {
8524         struct fxregs_state *fxsave;
8525
8526         vcpu_load(vcpu);
8527
8528         fxsave = &vcpu->arch.guest_fpu.state.fxsave;
8529
8530         memcpy(fxsave->st_space, fpu->fpr, 128);
8531         fxsave->cwd = fpu->fcw;
8532         fxsave->swd = fpu->fsw;
8533         fxsave->twd = fpu->ftwx;
8534         fxsave->fop = fpu->last_opcode;
8535         fxsave->rip = fpu->last_ip;
8536         fxsave->rdp = fpu->last_dp;
8537         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
8538
8539         vcpu_put(vcpu);
8540         return 0;
8541 }
8542
8543 static void store_regs(struct kvm_vcpu *vcpu)
8544 {
8545         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
8546
8547         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
8548                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
8549
8550         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
8551                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
8552
8553         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
8554                 kvm_vcpu_ioctl_x86_get_vcpu_events(
8555                                 vcpu, &vcpu->run->s.regs.events);
8556 }
8557
8558 static int sync_regs(struct kvm_vcpu *vcpu)
8559 {
8560         if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
8561                 return -EINVAL;
8562
8563         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
8564                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
8565                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
8566         }
8567         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
8568                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
8569                         return -EINVAL;
8570                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
8571         }
8572         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
8573                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
8574                                 vcpu, &vcpu->run->s.regs.events))
8575                         return -EINVAL;
8576                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
8577         }
8578
8579         return 0;
8580 }
8581
8582 static void fx_init(struct kvm_vcpu *vcpu)
8583 {
8584         fpstate_init(&vcpu->arch.guest_fpu.state);
8585         if (boot_cpu_has(X86_FEATURE_XSAVES))
8586                 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
8587                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
8588
8589         /*
8590          * Ensure guest xcr0 is valid for loading
8591          */
8592         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
8593
8594         vcpu->arch.cr0 |= X86_CR0_ET;
8595 }
8596
8597 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
8598 {
8599         void *wbinvd_dirty_mask = vcpu->arch.wbinvd_dirty_mask;
8600
8601         kvmclock_reset(vcpu);
8602
8603         kvm_x86_ops->vcpu_free(vcpu);
8604         free_cpumask_var(wbinvd_dirty_mask);
8605 }
8606
8607 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
8608                                                 unsigned int id)
8609 {
8610         struct kvm_vcpu *vcpu;
8611
8612         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
8613                 printk_once(KERN_WARNING
8614                 "kvm: SMP vm created on host with unstable TSC; "
8615                 "guest TSC will not be reliable\n");
8616
8617         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
8618
8619         return vcpu;
8620 }
8621
8622 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
8623 {
8624         kvm_vcpu_mtrr_init(vcpu);
8625         vcpu_load(vcpu);
8626         kvm_vcpu_reset(vcpu, false);
8627         kvm_init_mmu(vcpu, false);
8628         vcpu_put(vcpu);
8629         return 0;
8630 }
8631
8632 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
8633 {
8634         struct msr_data msr;
8635         struct kvm *kvm = vcpu->kvm;
8636
8637         kvm_hv_vcpu_postcreate(vcpu);
8638
8639         if (mutex_lock_killable(&vcpu->mutex))
8640                 return;
8641         vcpu_load(vcpu);
8642         msr.data = 0x0;
8643         msr.index = MSR_IA32_TSC;
8644         msr.host_initiated = true;
8645         kvm_write_tsc(vcpu, &msr);
8646         vcpu_put(vcpu);
8647         mutex_unlock(&vcpu->mutex);
8648
8649         if (!kvmclock_periodic_sync)
8650                 return;
8651
8652         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
8653                                         KVMCLOCK_SYNC_PERIOD);
8654 }
8655
8656 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
8657 {
8658         vcpu->arch.apf.msr_val = 0;
8659
8660         vcpu_load(vcpu);
8661         kvm_mmu_unload(vcpu);
8662         vcpu_put(vcpu);
8663
8664         kvm_x86_ops->vcpu_free(vcpu);
8665 }
8666
8667 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
8668 {
8669         kvm_lapic_reset(vcpu, init_event);
8670
8671         vcpu->arch.hflags = 0;
8672
8673         vcpu->arch.smi_pending = 0;
8674         vcpu->arch.smi_count = 0;
8675         atomic_set(&vcpu->arch.nmi_queued, 0);
8676         vcpu->arch.nmi_pending = 0;
8677         vcpu->arch.nmi_injected = false;
8678         kvm_clear_interrupt_queue(vcpu);
8679         kvm_clear_exception_queue(vcpu);
8680         vcpu->arch.exception.pending = false;
8681
8682         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
8683         kvm_update_dr0123(vcpu);
8684         vcpu->arch.dr6 = DR6_INIT;
8685         kvm_update_dr6(vcpu);
8686         vcpu->arch.dr7 = DR7_FIXED_1;
8687         kvm_update_dr7(vcpu);
8688
8689         vcpu->arch.cr2 = 0;
8690
8691         kvm_make_request(KVM_REQ_EVENT, vcpu);
8692         vcpu->arch.apf.msr_val = 0;
8693         vcpu->arch.st.msr_val = 0;
8694
8695         kvmclock_reset(vcpu);
8696
8697         kvm_clear_async_pf_completion_queue(vcpu);
8698         kvm_async_pf_hash_reset(vcpu);
8699         vcpu->arch.apf.halted = false;
8700
8701         if (kvm_mpx_supported()) {
8702                 void *mpx_state_buffer;
8703
8704                 /*
8705                  * To avoid have the INIT path from kvm_apic_has_events() that be
8706                  * called with loaded FPU and does not let userspace fix the state.
8707                  */
8708                 if (init_event)
8709                         kvm_put_guest_fpu(vcpu);
8710                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu.state.xsave,
8711                                         XFEATURE_MASK_BNDREGS);
8712                 if (mpx_state_buffer)
8713                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
8714                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu.state.xsave,
8715                                         XFEATURE_MASK_BNDCSR);
8716                 if (mpx_state_buffer)
8717                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
8718                 if (init_event)
8719                         kvm_load_guest_fpu(vcpu);
8720         }
8721
8722         if (!init_event) {
8723                 kvm_pmu_reset(vcpu);
8724                 vcpu->arch.smbase = 0x30000;
8725
8726                 vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
8727                 vcpu->arch.msr_misc_features_enables = 0;
8728
8729                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
8730         }
8731
8732         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
8733         vcpu->arch.regs_avail = ~0;
8734         vcpu->arch.regs_dirty = ~0;
8735
8736         vcpu->arch.ia32_xss = 0;
8737
8738         kvm_x86_ops->vcpu_reset(vcpu, init_event);
8739 }
8740
8741 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
8742 {
8743         struct kvm_segment cs;
8744
8745         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
8746         cs.selector = vector << 8;
8747         cs.base = vector << 12;
8748         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
8749         kvm_rip_write(vcpu, 0);
8750 }
8751
8752 int kvm_arch_hardware_enable(void)
8753 {
8754         struct kvm *kvm;
8755         struct kvm_vcpu *vcpu;
8756         int i;
8757         int ret;
8758         u64 local_tsc;
8759         u64 max_tsc = 0;
8760         bool stable, backwards_tsc = false;
8761
8762         kvm_shared_msr_cpu_online();
8763         ret = kvm_x86_ops->hardware_enable();
8764         if (ret != 0)
8765                 return ret;
8766
8767         local_tsc = rdtsc();
8768         stable = !kvm_check_tsc_unstable();
8769         list_for_each_entry(kvm, &vm_list, vm_list) {
8770                 kvm_for_each_vcpu(i, vcpu, kvm) {
8771                         if (!stable && vcpu->cpu == smp_processor_id())
8772                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8773                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
8774                                 backwards_tsc = true;
8775                                 if (vcpu->arch.last_host_tsc > max_tsc)
8776                                         max_tsc = vcpu->arch.last_host_tsc;
8777                         }
8778                 }
8779         }
8780
8781         /*
8782          * Sometimes, even reliable TSCs go backwards.  This happens on
8783          * platforms that reset TSC during suspend or hibernate actions, but
8784          * maintain synchronization.  We must compensate.  Fortunately, we can
8785          * detect that condition here, which happens early in CPU bringup,
8786          * before any KVM threads can be running.  Unfortunately, we can't
8787          * bring the TSCs fully up to date with real time, as we aren't yet far
8788          * enough into CPU bringup that we know how much real time has actually
8789          * elapsed; our helper function, ktime_get_boot_ns() will be using boot
8790          * variables that haven't been updated yet.
8791          *
8792          * So we simply find the maximum observed TSC above, then record the
8793          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
8794          * the adjustment will be applied.  Note that we accumulate
8795          * adjustments, in case multiple suspend cycles happen before some VCPU
8796          * gets a chance to run again.  In the event that no KVM threads get a
8797          * chance to run, we will miss the entire elapsed period, as we'll have
8798          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
8799          * loose cycle time.  This isn't too big a deal, since the loss will be
8800          * uniform across all VCPUs (not to mention the scenario is extremely
8801          * unlikely). It is possible that a second hibernate recovery happens
8802          * much faster than a first, causing the observed TSC here to be
8803          * smaller; this would require additional padding adjustment, which is
8804          * why we set last_host_tsc to the local tsc observed here.
8805          *
8806          * N.B. - this code below runs only on platforms with reliable TSC,
8807          * as that is the only way backwards_tsc is set above.  Also note
8808          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
8809          * have the same delta_cyc adjustment applied if backwards_tsc
8810          * is detected.  Note further, this adjustment is only done once,
8811          * as we reset last_host_tsc on all VCPUs to stop this from being
8812          * called multiple times (one for each physical CPU bringup).
8813          *
8814          * Platforms with unreliable TSCs don't have to deal with this, they
8815          * will be compensated by the logic in vcpu_load, which sets the TSC to
8816          * catchup mode.  This will catchup all VCPUs to real time, but cannot
8817          * guarantee that they stay in perfect synchronization.
8818          */
8819         if (backwards_tsc) {
8820                 u64 delta_cyc = max_tsc - local_tsc;
8821                 list_for_each_entry(kvm, &vm_list, vm_list) {
8822                         kvm->arch.backwards_tsc_observed = true;
8823                         kvm_for_each_vcpu(i, vcpu, kvm) {
8824                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
8825                                 vcpu->arch.last_host_tsc = local_tsc;
8826                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
8827                         }
8828
8829                         /*
8830                          * We have to disable TSC offset matching.. if you were
8831                          * booting a VM while issuing an S4 host suspend....
8832                          * you may have some problem.  Solving this issue is
8833                          * left as an exercise to the reader.
8834                          */
8835                         kvm->arch.last_tsc_nsec = 0;
8836                         kvm->arch.last_tsc_write = 0;
8837                 }
8838
8839         }
8840         return 0;
8841 }
8842
8843 void kvm_arch_hardware_disable(void)
8844 {
8845         kvm_x86_ops->hardware_disable();
8846         drop_user_return_notifiers();
8847 }
8848
8849 int kvm_arch_hardware_setup(void)
8850 {
8851         int r;
8852
8853         r = kvm_x86_ops->hardware_setup();
8854         if (r != 0)
8855                 return r;
8856
8857         if (kvm_has_tsc_control) {
8858                 /*
8859                  * Make sure the user can only configure tsc_khz values that
8860                  * fit into a signed integer.
8861                  * A min value is not calculated because it will always
8862                  * be 1 on all machines.
8863                  */
8864                 u64 max = min(0x7fffffffULL,
8865                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
8866                 kvm_max_guest_tsc_khz = max;
8867
8868                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
8869         }
8870
8871         kvm_init_msr_list();
8872         return 0;
8873 }
8874
8875 void kvm_arch_hardware_unsetup(void)
8876 {
8877         kvm_x86_ops->hardware_unsetup();
8878 }
8879
8880 void kvm_arch_check_processor_compat(void *rtn)
8881 {
8882         kvm_x86_ops->check_processor_compatibility(rtn);
8883 }
8884
8885 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
8886 {
8887         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
8888 }
8889 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
8890
8891 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
8892 {
8893         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
8894 }
8895
8896 struct static_key kvm_no_apic_vcpu __read_mostly;
8897 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
8898
8899 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
8900 {
8901         struct page *page;
8902         int r;
8903
8904         vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv(vcpu);
8905         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
8906         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
8907                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8908         else
8909                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
8910
8911         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
8912         if (!page) {
8913                 r = -ENOMEM;
8914                 goto fail;
8915         }
8916         vcpu->arch.pio_data = page_address(page);
8917
8918         kvm_set_tsc_khz(vcpu, max_tsc_khz);
8919
8920         r = kvm_mmu_create(vcpu);
8921         if (r < 0)
8922                 goto fail_free_pio_data;
8923
8924         if (irqchip_in_kernel(vcpu->kvm)) {
8925                 r = kvm_create_lapic(vcpu);
8926                 if (r < 0)
8927                         goto fail_mmu_destroy;
8928         } else
8929                 static_key_slow_inc(&kvm_no_apic_vcpu);
8930
8931         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
8932                                        GFP_KERNEL);
8933         if (!vcpu->arch.mce_banks) {
8934                 r = -ENOMEM;
8935                 goto fail_free_lapic;
8936         }
8937         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
8938
8939         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
8940                 r = -ENOMEM;
8941                 goto fail_free_mce_banks;
8942         }
8943
8944         fx_init(vcpu);
8945
8946         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
8947
8948         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
8949
8950         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
8951
8952         kvm_async_pf_hash_reset(vcpu);
8953         kvm_pmu_init(vcpu);
8954
8955         vcpu->arch.pending_external_vector = -1;
8956         vcpu->arch.preempted_in_kernel = false;
8957
8958         kvm_hv_vcpu_init(vcpu);
8959
8960         return 0;
8961
8962 fail_free_mce_banks:
8963         kfree(vcpu->arch.mce_banks);
8964 fail_free_lapic:
8965         kvm_free_lapic(vcpu);
8966 fail_mmu_destroy:
8967         kvm_mmu_destroy(vcpu);
8968 fail_free_pio_data:
8969         free_page((unsigned long)vcpu->arch.pio_data);
8970 fail:
8971         return r;
8972 }
8973
8974 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
8975 {
8976         int idx;
8977
8978         kvm_hv_vcpu_uninit(vcpu);
8979         kvm_pmu_destroy(vcpu);
8980         kfree(vcpu->arch.mce_banks);
8981         kvm_free_lapic(vcpu);
8982         idx = srcu_read_lock(&vcpu->kvm->srcu);
8983         kvm_mmu_destroy(vcpu);
8984         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8985         free_page((unsigned long)vcpu->arch.pio_data);
8986         if (!lapic_in_kernel(vcpu))
8987                 static_key_slow_dec(&kvm_no_apic_vcpu);
8988 }
8989
8990 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
8991 {
8992         vcpu->arch.l1tf_flush_l1d = true;
8993         kvm_x86_ops->sched_in(vcpu, cpu);
8994 }
8995
8996 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
8997 {
8998         if (type)
8999                 return -EINVAL;
9000
9001         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
9002         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
9003         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
9004         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
9005         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
9006
9007         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
9008         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
9009         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
9010         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
9011                 &kvm->arch.irq_sources_bitmap);
9012
9013         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
9014         mutex_init(&kvm->arch.apic_map_lock);
9015         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
9016
9017         kvm->arch.kvmclock_offset = -ktime_get_boot_ns();
9018         pvclock_update_vm_gtod_copy(kvm);
9019
9020         kvm->arch.guest_can_read_msr_platform_info = true;
9021
9022         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
9023         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
9024
9025         kvm_hv_init_vm(kvm);
9026         kvm_page_track_init(kvm);
9027         kvm_mmu_init_vm(kvm);
9028
9029         if (kvm_x86_ops->vm_init)
9030                 return kvm_x86_ops->vm_init(kvm);
9031
9032         return 0;
9033 }
9034
9035 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
9036 {
9037         vcpu_load(vcpu);
9038         kvm_mmu_unload(vcpu);
9039         vcpu_put(vcpu);
9040 }
9041
9042 static void kvm_free_vcpus(struct kvm *kvm)
9043 {
9044         unsigned int i;
9045         struct kvm_vcpu *vcpu;
9046
9047         /*
9048          * Unpin any mmu pages first.
9049          */
9050         kvm_for_each_vcpu(i, vcpu, kvm) {
9051                 kvm_clear_async_pf_completion_queue(vcpu);
9052                 kvm_unload_vcpu_mmu(vcpu);
9053         }
9054         kvm_for_each_vcpu(i, vcpu, kvm)
9055                 kvm_arch_vcpu_free(vcpu);
9056
9057         mutex_lock(&kvm->lock);
9058         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
9059                 kvm->vcpus[i] = NULL;
9060
9061         atomic_set(&kvm->online_vcpus, 0);
9062         mutex_unlock(&kvm->lock);
9063 }
9064
9065 void kvm_arch_sync_events(struct kvm *kvm)
9066 {
9067         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
9068         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
9069         kvm_free_pit(kvm);
9070 }
9071
9072 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
9073 {
9074         int i, r;
9075         unsigned long hva;
9076         struct kvm_memslots *slots = kvm_memslots(kvm);
9077         struct kvm_memory_slot *slot, old;
9078
9079         /* Called with kvm->slots_lock held.  */
9080         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
9081                 return -EINVAL;
9082
9083         slot = id_to_memslot(slots, id);
9084         if (size) {
9085                 if (slot->npages)
9086                         return -EEXIST;
9087
9088                 /*
9089                  * MAP_SHARED to prevent internal slot pages from being moved
9090                  * by fork()/COW.
9091                  */
9092                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
9093                               MAP_SHARED | MAP_ANONYMOUS, 0);
9094                 if (IS_ERR((void *)hva))
9095                         return PTR_ERR((void *)hva);
9096         } else {
9097                 if (!slot->npages)
9098                         return 0;
9099
9100                 hva = 0;
9101         }
9102
9103         old = *slot;
9104         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
9105                 struct kvm_userspace_memory_region m;
9106
9107                 m.slot = id | (i << 16);
9108                 m.flags = 0;
9109                 m.guest_phys_addr = gpa;
9110                 m.userspace_addr = hva;
9111                 m.memory_size = size;
9112                 r = __kvm_set_memory_region(kvm, &m);
9113                 if (r < 0)
9114                         return r;
9115         }
9116
9117         if (!size)
9118                 vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
9119
9120         return 0;
9121 }
9122 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
9123
9124 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
9125 {
9126         int r;
9127
9128         mutex_lock(&kvm->slots_lock);
9129         r = __x86_set_memory_region(kvm, id, gpa, size);
9130         mutex_unlock(&kvm->slots_lock);
9131
9132         return r;
9133 }
9134 EXPORT_SYMBOL_GPL(x86_set_memory_region);
9135
9136 void kvm_arch_destroy_vm(struct kvm *kvm)
9137 {
9138         if (current->mm == kvm->mm) {
9139                 /*
9140                  * Free memory regions allocated on behalf of userspace,
9141                  * unless the the memory map has changed due to process exit
9142                  * or fd copying.
9143                  */
9144                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
9145                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
9146                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
9147         }
9148         if (kvm_x86_ops->vm_destroy)
9149                 kvm_x86_ops->vm_destroy(kvm);
9150         kvm_pic_destroy(kvm);
9151         kvm_ioapic_destroy(kvm);
9152         kvm_free_vcpus(kvm);
9153         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
9154         kvm_mmu_uninit_vm(kvm);
9155         kvm_page_track_cleanup(kvm);
9156         kvm_hv_destroy_vm(kvm);
9157 }
9158
9159 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
9160                            struct kvm_memory_slot *dont)
9161 {
9162         int i;
9163
9164         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9165                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
9166                         kvfree(free->arch.rmap[i]);
9167                         free->arch.rmap[i] = NULL;
9168                 }
9169                 if (i == 0)
9170                         continue;
9171
9172                 if (!dont || free->arch.lpage_info[i - 1] !=
9173                              dont->arch.lpage_info[i - 1]) {
9174                         kvfree(free->arch.lpage_info[i - 1]);
9175                         free->arch.lpage_info[i - 1] = NULL;
9176                 }
9177         }
9178
9179         kvm_page_track_free_memslot(free, dont);
9180 }
9181
9182 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
9183                             unsigned long npages)
9184 {
9185         int i;
9186
9187         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9188                 struct kvm_lpage_info *linfo;
9189                 unsigned long ugfn;
9190                 int lpages;
9191                 int level = i + 1;
9192
9193                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
9194                                       slot->base_gfn, level) + 1;
9195
9196                 slot->arch.rmap[i] =
9197                         kvcalloc(lpages, sizeof(*slot->arch.rmap[i]),
9198                                  GFP_KERNEL);
9199                 if (!slot->arch.rmap[i])
9200                         goto out_free;
9201                 if (i == 0)
9202                         continue;
9203
9204                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL);
9205                 if (!linfo)
9206                         goto out_free;
9207
9208                 slot->arch.lpage_info[i - 1] = linfo;
9209
9210                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
9211                         linfo[0].disallow_lpage = 1;
9212                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
9213                         linfo[lpages - 1].disallow_lpage = 1;
9214                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
9215                 /*
9216                  * If the gfn and userspace address are not aligned wrt each
9217                  * other, or if explicitly asked to, disable large page
9218                  * support for this slot
9219                  */
9220                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
9221                     !kvm_largepages_enabled()) {
9222                         unsigned long j;
9223
9224                         for (j = 0; j < lpages; ++j)
9225                                 linfo[j].disallow_lpage = 1;
9226                 }
9227         }
9228
9229         if (kvm_page_track_create_memslot(slot, npages))
9230                 goto out_free;
9231
9232         return 0;
9233
9234 out_free:
9235         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9236                 kvfree(slot->arch.rmap[i]);
9237                 slot->arch.rmap[i] = NULL;
9238                 if (i == 0)
9239                         continue;
9240
9241                 kvfree(slot->arch.lpage_info[i - 1]);
9242                 slot->arch.lpage_info[i - 1] = NULL;
9243         }
9244         return -ENOMEM;
9245 }
9246
9247 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
9248 {
9249         /*
9250          * memslots->generation has been incremented.
9251          * mmio generation may have reached its maximum value.
9252          */
9253         kvm_mmu_invalidate_mmio_sptes(kvm, slots);
9254 }
9255
9256 int kvm_arch_prepare_memory_region(struct kvm *kvm,
9257                                 struct kvm_memory_slot *memslot,
9258                                 const struct kvm_userspace_memory_region *mem,
9259                                 enum kvm_mr_change change)
9260 {
9261         return 0;
9262 }
9263
9264 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
9265                                      struct kvm_memory_slot *new)
9266 {
9267         /* Still write protect RO slot */
9268         if (new->flags & KVM_MEM_READONLY) {
9269                 kvm_mmu_slot_remove_write_access(kvm, new);
9270                 return;
9271         }
9272
9273         /*
9274          * Call kvm_x86_ops dirty logging hooks when they are valid.
9275          *
9276          * kvm_x86_ops->slot_disable_log_dirty is called when:
9277          *
9278          *  - KVM_MR_CREATE with dirty logging is disabled
9279          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
9280          *
9281          * The reason is, in case of PML, we need to set D-bit for any slots
9282          * with dirty logging disabled in order to eliminate unnecessary GPA
9283          * logging in PML buffer (and potential PML buffer full VMEXT). This
9284          * guarantees leaving PML enabled during guest's lifetime won't have
9285          * any additonal overhead from PML when guest is running with dirty
9286          * logging disabled for memory slots.
9287          *
9288          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
9289          * to dirty logging mode.
9290          *
9291          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
9292          *
9293          * In case of write protect:
9294          *
9295          * Write protect all pages for dirty logging.
9296          *
9297          * All the sptes including the large sptes which point to this
9298          * slot are set to readonly. We can not create any new large
9299          * spte on this slot until the end of the logging.
9300          *
9301          * See the comments in fast_page_fault().
9302          */
9303         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
9304                 if (kvm_x86_ops->slot_enable_log_dirty)
9305                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
9306                 else
9307                         kvm_mmu_slot_remove_write_access(kvm, new);
9308         } else {
9309                 if (kvm_x86_ops->slot_disable_log_dirty)
9310                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
9311         }
9312 }
9313
9314 void kvm_arch_commit_memory_region(struct kvm *kvm,
9315                                 const struct kvm_userspace_memory_region *mem,
9316                                 const struct kvm_memory_slot *old,
9317                                 const struct kvm_memory_slot *new,
9318                                 enum kvm_mr_change change)
9319 {
9320         int nr_mmu_pages = 0;
9321
9322         if (!kvm->arch.n_requested_mmu_pages)
9323                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
9324
9325         if (nr_mmu_pages)
9326                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
9327
9328         /*
9329          * Dirty logging tracks sptes in 4k granularity, meaning that large
9330          * sptes have to be split.  If live migration is successful, the guest
9331          * in the source machine will be destroyed and large sptes will be
9332          * created in the destination. However, if the guest continues to run
9333          * in the source machine (for example if live migration fails), small
9334          * sptes will remain around and cause bad performance.
9335          *
9336          * Scan sptes if dirty logging has been stopped, dropping those
9337          * which can be collapsed into a single large-page spte.  Later
9338          * page faults will create the large-page sptes.
9339          */
9340         if ((change != KVM_MR_DELETE) &&
9341                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
9342                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
9343                 kvm_mmu_zap_collapsible_sptes(kvm, new);
9344
9345         /*
9346          * Set up write protection and/or dirty logging for the new slot.
9347          *
9348          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
9349          * been zapped so no dirty logging staff is needed for old slot. For
9350          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
9351          * new and it's also covered when dealing with the new slot.
9352          *
9353          * FIXME: const-ify all uses of struct kvm_memory_slot.
9354          */
9355         if (change != KVM_MR_DELETE)
9356                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
9357 }
9358
9359 void kvm_arch_flush_shadow_all(struct kvm *kvm)
9360 {
9361         kvm_mmu_invalidate_zap_all_pages(kvm);
9362 }
9363
9364 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
9365                                    struct kvm_memory_slot *slot)
9366 {
9367         kvm_page_track_flush_slot(kvm, slot);
9368 }
9369
9370 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
9371 {
9372         return (is_guest_mode(vcpu) &&
9373                         kvm_x86_ops->guest_apic_has_interrupt &&
9374                         kvm_x86_ops->guest_apic_has_interrupt(vcpu));
9375 }
9376
9377 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
9378 {
9379         if (!list_empty_careful(&vcpu->async_pf.done))
9380                 return true;
9381
9382         if (kvm_apic_has_events(vcpu))
9383                 return true;
9384
9385         if (vcpu->arch.pv.pv_unhalted)
9386                 return true;
9387
9388         if (vcpu->arch.exception.pending)
9389                 return true;
9390
9391         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
9392             (vcpu->arch.nmi_pending &&
9393              kvm_x86_ops->nmi_allowed(vcpu)))
9394                 return true;
9395
9396         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
9397             (vcpu->arch.smi_pending && !is_smm(vcpu)))
9398                 return true;
9399
9400         if (kvm_arch_interrupt_allowed(vcpu) &&
9401             (kvm_cpu_has_interrupt(vcpu) ||
9402             kvm_guest_apic_has_interrupt(vcpu)))
9403                 return true;
9404
9405         if (kvm_hv_has_stimer_pending(vcpu))
9406                 return true;
9407
9408         return false;
9409 }
9410
9411 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
9412 {
9413         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
9414 }
9415
9416 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
9417 {
9418         return vcpu->arch.preempted_in_kernel;
9419 }
9420
9421 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
9422 {
9423         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
9424 }
9425
9426 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
9427 {
9428         return kvm_x86_ops->interrupt_allowed(vcpu);
9429 }
9430
9431 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
9432 {
9433         if (is_64_bit_mode(vcpu))
9434                 return kvm_rip_read(vcpu);
9435         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
9436                      kvm_rip_read(vcpu));
9437 }
9438 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
9439
9440 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
9441 {
9442         return kvm_get_linear_rip(vcpu) == linear_rip;
9443 }
9444 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
9445
9446 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
9447 {
9448         unsigned long rflags;
9449
9450         rflags = kvm_x86_ops->get_rflags(vcpu);
9451         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
9452                 rflags &= ~X86_EFLAGS_TF;
9453         return rflags;
9454 }
9455 EXPORT_SYMBOL_GPL(kvm_get_rflags);
9456
9457 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
9458 {
9459         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
9460             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
9461                 rflags |= X86_EFLAGS_TF;
9462         kvm_x86_ops->set_rflags(vcpu, rflags);
9463 }
9464
9465 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
9466 {
9467         __kvm_set_rflags(vcpu, rflags);
9468         kvm_make_request(KVM_REQ_EVENT, vcpu);
9469 }
9470 EXPORT_SYMBOL_GPL(kvm_set_rflags);
9471
9472 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
9473 {
9474         int r;
9475
9476         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
9477               work->wakeup_all)
9478                 return;
9479
9480         r = kvm_mmu_reload(vcpu);
9481         if (unlikely(r))
9482                 return;
9483
9484         if (!vcpu->arch.mmu->direct_map &&
9485               work->arch.cr3 != vcpu->arch.mmu->get_cr3(vcpu))
9486                 return;
9487
9488         vcpu->arch.mmu->page_fault(vcpu, work->gva, 0, true);
9489 }
9490
9491 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
9492 {
9493         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
9494 }
9495
9496 static inline u32 kvm_async_pf_next_probe(u32 key)
9497 {
9498         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
9499 }
9500
9501 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9502 {
9503         u32 key = kvm_async_pf_hash_fn(gfn);
9504
9505         while (vcpu->arch.apf.gfns[key] != ~0)
9506                 key = kvm_async_pf_next_probe(key);
9507
9508         vcpu->arch.apf.gfns[key] = gfn;
9509 }
9510
9511 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
9512 {
9513         int i;
9514         u32 key = kvm_async_pf_hash_fn(gfn);
9515
9516         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
9517                      (vcpu->arch.apf.gfns[key] != gfn &&
9518                       vcpu->arch.apf.gfns[key] != ~0); i++)
9519                 key = kvm_async_pf_next_probe(key);
9520
9521         return key;
9522 }
9523
9524 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9525 {
9526         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
9527 }
9528
9529 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9530 {
9531         u32 i, j, k;
9532
9533         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
9534         while (true) {
9535                 vcpu->arch.apf.gfns[i] = ~0;
9536                 do {
9537                         j = kvm_async_pf_next_probe(j);
9538                         if (vcpu->arch.apf.gfns[j] == ~0)
9539                                 return;
9540                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
9541                         /*
9542                          * k lies cyclically in ]i,j]
9543                          * |    i.k.j |
9544                          * |....j i.k.| or  |.k..j i...|
9545                          */
9546                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
9547                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
9548                 i = j;
9549         }
9550 }
9551
9552 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
9553 {
9554
9555         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
9556                                       sizeof(val));
9557 }
9558
9559 static int apf_get_user(struct kvm_vcpu *vcpu, u32 *val)
9560 {
9561
9562         return kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, val,
9563                                       sizeof(u32));
9564 }
9565
9566 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
9567                                      struct kvm_async_pf *work)
9568 {
9569         struct x86_exception fault;
9570
9571         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
9572         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
9573
9574         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
9575             (vcpu->arch.apf.send_user_only &&
9576              kvm_x86_ops->get_cpl(vcpu) == 0))
9577                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
9578         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
9579                 fault.vector = PF_VECTOR;
9580                 fault.error_code_valid = true;
9581                 fault.error_code = 0;
9582                 fault.nested_page_fault = false;
9583                 fault.address = work->arch.token;
9584                 fault.async_page_fault = true;
9585                 kvm_inject_page_fault(vcpu, &fault);
9586         }
9587 }
9588
9589 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
9590                                  struct kvm_async_pf *work)
9591 {
9592         struct x86_exception fault;
9593         u32 val;
9594
9595         if (work->wakeup_all)
9596                 work->arch.token = ~0; /* broadcast wakeup */
9597         else
9598                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
9599         trace_kvm_async_pf_ready(work->arch.token, work->gva);
9600
9601         if (vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED &&
9602             !apf_get_user(vcpu, &val)) {
9603                 if (val == KVM_PV_REASON_PAGE_NOT_PRESENT &&
9604                     vcpu->arch.exception.pending &&
9605                     vcpu->arch.exception.nr == PF_VECTOR &&
9606                     !apf_put_user(vcpu, 0)) {
9607                         vcpu->arch.exception.injected = false;
9608                         vcpu->arch.exception.pending = false;
9609                         vcpu->arch.exception.nr = 0;
9610                         vcpu->arch.exception.has_error_code = false;
9611                         vcpu->arch.exception.error_code = 0;
9612                         vcpu->arch.exception.has_payload = false;
9613                         vcpu->arch.exception.payload = 0;
9614                 } else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
9615                         fault.vector = PF_VECTOR;
9616                         fault.error_code_valid = true;
9617                         fault.error_code = 0;
9618                         fault.nested_page_fault = false;
9619                         fault.address = work->arch.token;
9620                         fault.async_page_fault = true;
9621                         kvm_inject_page_fault(vcpu, &fault);
9622                 }
9623         }
9624         vcpu->arch.apf.halted = false;
9625         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9626 }
9627
9628 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
9629 {
9630         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
9631                 return true;
9632         else
9633                 return kvm_can_do_async_pf(vcpu);
9634 }
9635
9636 void kvm_arch_start_assignment(struct kvm *kvm)
9637 {
9638         atomic_inc(&kvm->arch.assigned_device_count);
9639 }
9640 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
9641
9642 void kvm_arch_end_assignment(struct kvm *kvm)
9643 {
9644         atomic_dec(&kvm->arch.assigned_device_count);
9645 }
9646 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
9647
9648 bool kvm_arch_has_assigned_device(struct kvm *kvm)
9649 {
9650         return atomic_read(&kvm->arch.assigned_device_count);
9651 }
9652 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
9653
9654 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
9655 {
9656         atomic_inc(&kvm->arch.noncoherent_dma_count);
9657 }
9658 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
9659
9660 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
9661 {
9662         atomic_dec(&kvm->arch.noncoherent_dma_count);
9663 }
9664 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
9665
9666 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
9667 {
9668         return atomic_read(&kvm->arch.noncoherent_dma_count);
9669 }
9670 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
9671
9672 bool kvm_arch_has_irq_bypass(void)
9673 {
9674         return kvm_x86_ops->update_pi_irte != NULL;
9675 }
9676
9677 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
9678                                       struct irq_bypass_producer *prod)
9679 {
9680         struct kvm_kernel_irqfd *irqfd =
9681                 container_of(cons, struct kvm_kernel_irqfd, consumer);
9682
9683         irqfd->producer = prod;
9684
9685         return kvm_x86_ops->update_pi_irte(irqfd->kvm,
9686                                            prod->irq, irqfd->gsi, 1);
9687 }
9688
9689 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
9690                                       struct irq_bypass_producer *prod)
9691 {
9692         int ret;
9693         struct kvm_kernel_irqfd *irqfd =
9694                 container_of(cons, struct kvm_kernel_irqfd, consumer);
9695
9696         WARN_ON(irqfd->producer != prod);
9697         irqfd->producer = NULL;
9698
9699         /*
9700          * When producer of consumer is unregistered, we change back to
9701          * remapped mode, so we can re-use the current implementation
9702          * when the irq is masked/disabled or the consumer side (KVM
9703          * int this case doesn't want to receive the interrupts.
9704         */
9705         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
9706         if (ret)
9707                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
9708                        " fails: %d\n", irqfd->consumer.token, ret);
9709 }
9710
9711 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
9712                                    uint32_t guest_irq, bool set)
9713 {
9714         if (!kvm_x86_ops->update_pi_irte)
9715                 return -EINVAL;
9716
9717         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
9718 }
9719
9720 bool kvm_vector_hashing_enabled(void)
9721 {
9722         return vector_hashing;
9723 }
9724 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
9725
9726 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
9727 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
9728 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
9729 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
9730 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
9731 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
9732 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
9733 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
9734 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
9735 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
9736 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
9737 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
9738 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
9739 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
9740 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
9741 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
9742 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
9743 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
9744 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);