1 // SPDX-License-Identifier: GPL-2.0-only
3 * Kernel-based Virtual Machine driver for Linux
5 * derived from drivers/kvm/kvm_main.c
7 * Copyright (C) 2006 Qumranet, Inc.
8 * Copyright (C) 2008 Qumranet, Inc.
9 * Copyright IBM Corporation, 2008
10 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
13 * Avi Kivity <avi@qumranet.com>
14 * Yaniv Kamay <yaniv@qumranet.com>
15 * Amit Shah <amit.shah@qumranet.com>
16 * Ben-Ami Yassour <benami@il.ibm.com>
19 #include <linux/kvm_host.h>
25 #include "kvm_cache_regs.h"
26 #include "kvm_emulate.h"
34 #include <linux/clocksource.h>
35 #include <linux/interrupt.h>
36 #include <linux/kvm.h>
38 #include <linux/vmalloc.h>
39 #include <linux/export.h>
40 #include <linux/moduleparam.h>
41 #include <linux/mman.h>
42 #include <linux/highmem.h>
43 #include <linux/iommu.h>
44 #include <linux/intel-iommu.h>
45 #include <linux/cpufreq.h>
46 #include <linux/user-return-notifier.h>
47 #include <linux/srcu.h>
48 #include <linux/slab.h>
49 #include <linux/perf_event.h>
50 #include <linux/uaccess.h>
51 #include <linux/hash.h>
52 #include <linux/pci.h>
53 #include <linux/timekeeper_internal.h>
54 #include <linux/pvclock_gtod.h>
55 #include <linux/kvm_irqfd.h>
56 #include <linux/irqbypass.h>
57 #include <linux/sched/stat.h>
58 #include <linux/sched/isolation.h>
59 #include <linux/mem_encrypt.h>
60 #include <linux/entry-kvm.h>
61 #include <linux/suspend.h>
63 #include <trace/events/kvm.h>
65 #include <asm/debugreg.h>
69 #include <linux/kernel_stat.h>
70 #include <asm/fpu/internal.h> /* Ugh! */
71 #include <asm/pvclock.h>
72 #include <asm/div64.h>
73 #include <asm/irq_remapping.h>
74 #include <asm/mshyperv.h>
75 #include <asm/hypervisor.h>
76 #include <asm/tlbflush.h>
77 #include <asm/intel_pt.h>
78 #include <asm/emulate_prefix.h>
80 #include <clocksource/hyperv_timer.h>
82 #define CREATE_TRACE_POINTS
85 #define MAX_IO_MSRS 256
86 #define KVM_MAX_MCE_BANKS 32
87 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
88 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
90 #define emul_to_vcpu(ctxt) \
91 ((struct kvm_vcpu *)(ctxt)->vcpu)
94 * - enable syscall per default because its emulated by KVM
95 * - enable LME and LMA per default on 64 bit KVM
99 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
101 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
104 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
106 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
107 KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
109 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
110 static void process_nmi(struct kvm_vcpu *vcpu);
111 static void process_smi(struct kvm_vcpu *vcpu);
112 static void enter_smm(struct kvm_vcpu *vcpu);
113 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
114 static void store_regs(struct kvm_vcpu *vcpu);
115 static int sync_regs(struct kvm_vcpu *vcpu);
117 struct kvm_x86_ops kvm_x86_ops __read_mostly;
118 EXPORT_SYMBOL_GPL(kvm_x86_ops);
120 #define KVM_X86_OP(func) \
121 DEFINE_STATIC_CALL_NULL(kvm_x86_##func, \
122 *(((struct kvm_x86_ops *)0)->func));
123 #define KVM_X86_OP_NULL KVM_X86_OP
124 #include <asm/kvm-x86-ops.h>
125 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits);
126 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg);
127 EXPORT_STATIC_CALL_GPL(kvm_x86_tlb_flush_current);
129 static bool __read_mostly ignore_msrs = 0;
130 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
132 bool __read_mostly report_ignored_msrs = true;
133 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
134 EXPORT_SYMBOL_GPL(report_ignored_msrs);
136 unsigned int min_timer_period_us = 200;
137 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
139 static bool __read_mostly kvmclock_periodic_sync = true;
140 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
142 bool __read_mostly kvm_has_tsc_control;
143 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
144 u32 __read_mostly kvm_max_guest_tsc_khz;
145 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
146 u8 __read_mostly kvm_tsc_scaling_ratio_frac_bits;
147 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
148 u64 __read_mostly kvm_max_tsc_scaling_ratio;
149 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
150 u64 __read_mostly kvm_default_tsc_scaling_ratio;
151 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
152 bool __read_mostly kvm_has_bus_lock_exit;
153 EXPORT_SYMBOL_GPL(kvm_has_bus_lock_exit);
155 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
156 static u32 __read_mostly tsc_tolerance_ppm = 250;
157 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
160 * lapic timer advance (tscdeadline mode only) in nanoseconds. '-1' enables
161 * adaptive tuning starting from default advancement of 1000ns. '0' disables
162 * advancement entirely. Any other value is used as-is and disables adaptive
163 * tuning, i.e. allows privileged userspace to set an exact advancement time.
165 static int __read_mostly lapic_timer_advance_ns = -1;
166 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
168 static bool __read_mostly vector_hashing = true;
169 module_param(vector_hashing, bool, S_IRUGO);
171 bool __read_mostly enable_vmware_backdoor = false;
172 module_param(enable_vmware_backdoor, bool, S_IRUGO);
173 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
175 static bool __read_mostly force_emulation_prefix = false;
176 module_param(force_emulation_prefix, bool, S_IRUGO);
178 int __read_mostly pi_inject_timer = -1;
179 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
182 * Restoring the host value for MSRs that are only consumed when running in
183 * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
184 * returns to userspace, i.e. the kernel can run with the guest's value.
186 #define KVM_MAX_NR_USER_RETURN_MSRS 16
188 struct kvm_user_return_msrs {
189 struct user_return_notifier urn;
191 struct kvm_user_return_msr_values {
194 } values[KVM_MAX_NR_USER_RETURN_MSRS];
197 u32 __read_mostly kvm_nr_uret_msrs;
198 EXPORT_SYMBOL_GPL(kvm_nr_uret_msrs);
199 static u32 __read_mostly kvm_uret_msrs_list[KVM_MAX_NR_USER_RETURN_MSRS];
200 static struct kvm_user_return_msrs __percpu *user_return_msrs;
202 #define KVM_SUPPORTED_XCR0 (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
203 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
204 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
205 | XFEATURE_MASK_PKRU)
207 u64 __read_mostly host_efer;
208 EXPORT_SYMBOL_GPL(host_efer);
210 bool __read_mostly allow_smaller_maxphyaddr = 0;
211 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr);
213 bool __read_mostly enable_apicv = true;
214 EXPORT_SYMBOL_GPL(enable_apicv);
216 u64 __read_mostly host_xss;
217 EXPORT_SYMBOL_GPL(host_xss);
218 u64 __read_mostly supported_xss;
219 EXPORT_SYMBOL_GPL(supported_xss);
221 struct kvm_stats_debugfs_item debugfs_entries[] = {
222 VCPU_STAT("pf_fixed", pf_fixed),
223 VCPU_STAT("pf_guest", pf_guest),
224 VCPU_STAT("tlb_flush", tlb_flush),
225 VCPU_STAT("invlpg", invlpg),
226 VCPU_STAT("exits", exits),
227 VCPU_STAT("io_exits", io_exits),
228 VCPU_STAT("mmio_exits", mmio_exits),
229 VCPU_STAT("signal_exits", signal_exits),
230 VCPU_STAT("irq_window", irq_window_exits),
231 VCPU_STAT("nmi_window", nmi_window_exits),
232 VCPU_STAT("halt_exits", halt_exits),
233 VCPU_STAT("halt_successful_poll", halt_successful_poll),
234 VCPU_STAT("halt_attempted_poll", halt_attempted_poll),
235 VCPU_STAT("halt_poll_invalid", halt_poll_invalid),
236 VCPU_STAT("halt_wakeup", halt_wakeup),
237 VCPU_STAT("hypercalls", hypercalls),
238 VCPU_STAT("request_irq", request_irq_exits),
239 VCPU_STAT("irq_exits", irq_exits),
240 VCPU_STAT("host_state_reload", host_state_reload),
241 VCPU_STAT("fpu_reload", fpu_reload),
242 VCPU_STAT("insn_emulation", insn_emulation),
243 VCPU_STAT("insn_emulation_fail", insn_emulation_fail),
244 VCPU_STAT("irq_injections", irq_injections),
245 VCPU_STAT("nmi_injections", nmi_injections),
246 VCPU_STAT("req_event", req_event),
247 VCPU_STAT("l1d_flush", l1d_flush),
248 VCPU_STAT("halt_poll_success_ns", halt_poll_success_ns),
249 VCPU_STAT("halt_poll_fail_ns", halt_poll_fail_ns),
250 VCPU_STAT("nested_run", nested_run),
251 VCPU_STAT("directed_yield_attempted", directed_yield_attempted),
252 VCPU_STAT("directed_yield_successful", directed_yield_successful),
253 VM_STAT("mmu_shadow_zapped", mmu_shadow_zapped),
254 VM_STAT("mmu_pte_write", mmu_pte_write),
255 VM_STAT("mmu_pde_zapped", mmu_pde_zapped),
256 VM_STAT("mmu_flooded", mmu_flooded),
257 VM_STAT("mmu_recycled", mmu_recycled),
258 VM_STAT("mmu_cache_miss", mmu_cache_miss),
259 VM_STAT("mmu_unsync", mmu_unsync),
260 VM_STAT("remote_tlb_flush", remote_tlb_flush),
261 VM_STAT("largepages", lpages, .mode = 0444),
262 VM_STAT("nx_largepages_splitted", nx_lpage_splits, .mode = 0444),
263 VM_STAT("max_mmu_page_hash_collisions", max_mmu_page_hash_collisions),
267 u64 __read_mostly host_xcr0;
268 u64 __read_mostly supported_xcr0;
269 EXPORT_SYMBOL_GPL(supported_xcr0);
271 static struct kmem_cache *x86_fpu_cache;
273 static struct kmem_cache *x86_emulator_cache;
276 * When called, it means the previous get/set msr reached an invalid msr.
277 * Return true if we want to ignore/silent this failed msr access.
279 static bool kvm_msr_ignored_check(u32 msr, u64 data, bool write)
281 const char *op = write ? "wrmsr" : "rdmsr";
284 if (report_ignored_msrs)
285 kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
290 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
296 static struct kmem_cache *kvm_alloc_emulator_cache(void)
298 unsigned int useroffset = offsetof(struct x86_emulate_ctxt, src);
299 unsigned int size = sizeof(struct x86_emulate_ctxt);
301 return kmem_cache_create_usercopy("x86_emulator", size,
302 __alignof__(struct x86_emulate_ctxt),
303 SLAB_ACCOUNT, useroffset,
304 size - useroffset, NULL);
307 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
309 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
312 for (i = 0; i < ASYNC_PF_PER_VCPU; i++)
313 vcpu->arch.apf.gfns[i] = ~0;
316 static void kvm_on_user_return(struct user_return_notifier *urn)
319 struct kvm_user_return_msrs *msrs
320 = container_of(urn, struct kvm_user_return_msrs, urn);
321 struct kvm_user_return_msr_values *values;
325 * Disabling irqs at this point since the following code could be
326 * interrupted and executed through kvm_arch_hardware_disable()
328 local_irq_save(flags);
329 if (msrs->registered) {
330 msrs->registered = false;
331 user_return_notifier_unregister(urn);
333 local_irq_restore(flags);
334 for (slot = 0; slot < kvm_nr_uret_msrs; ++slot) {
335 values = &msrs->values[slot];
336 if (values->host != values->curr) {
337 wrmsrl(kvm_uret_msrs_list[slot], values->host);
338 values->curr = values->host;
343 static int kvm_probe_user_return_msr(u32 msr)
349 ret = rdmsrl_safe(msr, &val);
352 ret = wrmsrl_safe(msr, val);
358 int kvm_add_user_return_msr(u32 msr)
360 BUG_ON(kvm_nr_uret_msrs >= KVM_MAX_NR_USER_RETURN_MSRS);
362 if (kvm_probe_user_return_msr(msr))
365 kvm_uret_msrs_list[kvm_nr_uret_msrs] = msr;
366 return kvm_nr_uret_msrs++;
368 EXPORT_SYMBOL_GPL(kvm_add_user_return_msr);
370 int kvm_find_user_return_msr(u32 msr)
374 for (i = 0; i < kvm_nr_uret_msrs; ++i) {
375 if (kvm_uret_msrs_list[i] == msr)
380 EXPORT_SYMBOL_GPL(kvm_find_user_return_msr);
382 static void kvm_user_return_msr_cpu_online(void)
384 unsigned int cpu = smp_processor_id();
385 struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
389 for (i = 0; i < kvm_nr_uret_msrs; ++i) {
390 rdmsrl_safe(kvm_uret_msrs_list[i], &value);
391 msrs->values[i].host = value;
392 msrs->values[i].curr = value;
396 int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)
398 unsigned int cpu = smp_processor_id();
399 struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
402 value = (value & mask) | (msrs->values[slot].host & ~mask);
403 if (value == msrs->values[slot].curr)
405 err = wrmsrl_safe(kvm_uret_msrs_list[slot], value);
409 msrs->values[slot].curr = value;
410 if (!msrs->registered) {
411 msrs->urn.on_user_return = kvm_on_user_return;
412 user_return_notifier_register(&msrs->urn);
413 msrs->registered = true;
417 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr);
419 static void drop_user_return_notifiers(void)
421 unsigned int cpu = smp_processor_id();
422 struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
424 if (msrs->registered)
425 kvm_on_user_return(&msrs->urn);
428 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
430 return vcpu->arch.apic_base;
432 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
434 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
436 return kvm_apic_mode(kvm_get_apic_base(vcpu));
438 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
440 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
442 enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
443 enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
444 u64 reserved_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu) | 0x2ff |
445 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
447 if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
449 if (!msr_info->host_initiated) {
450 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
452 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
456 kvm_lapic_set_base(vcpu, msr_info->data);
457 kvm_recalculate_apic_map(vcpu->kvm);
460 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
462 asmlinkage __visible noinstr void kvm_spurious_fault(void)
464 /* Fault while not rebooting. We want the trace. */
465 BUG_ON(!kvm_rebooting);
467 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
469 #define EXCPT_BENIGN 0
470 #define EXCPT_CONTRIBUTORY 1
473 static int exception_class(int vector)
483 return EXCPT_CONTRIBUTORY;
490 #define EXCPT_FAULT 0
492 #define EXCPT_ABORT 2
493 #define EXCPT_INTERRUPT 3
495 static int exception_type(int vector)
499 if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
500 return EXCPT_INTERRUPT;
504 /* #DB is trap, as instruction watchpoints are handled elsewhere */
505 if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
508 if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
511 /* Reserved exceptions will result in fault */
515 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
517 unsigned nr = vcpu->arch.exception.nr;
518 bool has_payload = vcpu->arch.exception.has_payload;
519 unsigned long payload = vcpu->arch.exception.payload;
527 * "Certain debug exceptions may clear bit 0-3. The
528 * remaining contents of the DR6 register are never
529 * cleared by the processor".
531 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
533 * In order to reflect the #DB exception payload in guest
534 * dr6, three components need to be considered: active low
535 * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
537 * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
538 * In the target guest dr6:
539 * FIXED_1 bits should always be set.
540 * Active low bits should be cleared if 1-setting in payload.
541 * Active high bits should be set if 1-setting in payload.
543 * Note, the payload is compatible with the pending debug
544 * exceptions/exit qualification under VMX, that active_low bits
545 * are active high in payload.
546 * So they need to be flipped for DR6.
548 vcpu->arch.dr6 |= DR6_ACTIVE_LOW;
549 vcpu->arch.dr6 |= payload;
550 vcpu->arch.dr6 ^= payload & DR6_ACTIVE_LOW;
553 * The #DB payload is defined as compatible with the 'pending
554 * debug exceptions' field under VMX, not DR6. While bit 12 is
555 * defined in the 'pending debug exceptions' field (enabled
556 * breakpoint), it is reserved and must be zero in DR6.
558 vcpu->arch.dr6 &= ~BIT(12);
561 vcpu->arch.cr2 = payload;
565 vcpu->arch.exception.has_payload = false;
566 vcpu->arch.exception.payload = 0;
568 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
570 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
571 unsigned nr, bool has_error, u32 error_code,
572 bool has_payload, unsigned long payload, bool reinject)
577 kvm_make_request(KVM_REQ_EVENT, vcpu);
579 if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
583 * On vmentry, vcpu->arch.exception.pending is only
584 * true if an event injection was blocked by
585 * nested_run_pending. In that case, however,
586 * vcpu_enter_guest requests an immediate exit,
587 * and the guest shouldn't proceed far enough to
590 WARN_ON_ONCE(vcpu->arch.exception.pending);
591 vcpu->arch.exception.injected = true;
592 if (WARN_ON_ONCE(has_payload)) {
594 * A reinjected event has already
595 * delivered its payload.
601 vcpu->arch.exception.pending = true;
602 vcpu->arch.exception.injected = false;
604 vcpu->arch.exception.has_error_code = has_error;
605 vcpu->arch.exception.nr = nr;
606 vcpu->arch.exception.error_code = error_code;
607 vcpu->arch.exception.has_payload = has_payload;
608 vcpu->arch.exception.payload = payload;
609 if (!is_guest_mode(vcpu))
610 kvm_deliver_exception_payload(vcpu);
614 /* to check exception */
615 prev_nr = vcpu->arch.exception.nr;
616 if (prev_nr == DF_VECTOR) {
617 /* triple fault -> shutdown */
618 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
621 class1 = exception_class(prev_nr);
622 class2 = exception_class(nr);
623 if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
624 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
626 * Generate double fault per SDM Table 5-5. Set
627 * exception.pending = true so that the double fault
628 * can trigger a nested vmexit.
630 vcpu->arch.exception.pending = true;
631 vcpu->arch.exception.injected = false;
632 vcpu->arch.exception.has_error_code = true;
633 vcpu->arch.exception.nr = DF_VECTOR;
634 vcpu->arch.exception.error_code = 0;
635 vcpu->arch.exception.has_payload = false;
636 vcpu->arch.exception.payload = 0;
638 /* replace previous exception with a new one in a hope
639 that instruction re-execution will regenerate lost
644 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
646 kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
648 EXPORT_SYMBOL_GPL(kvm_queue_exception);
650 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
652 kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
654 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
656 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
657 unsigned long payload)
659 kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
661 EXPORT_SYMBOL_GPL(kvm_queue_exception_p);
663 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
664 u32 error_code, unsigned long payload)
666 kvm_multiple_exception(vcpu, nr, true, error_code,
667 true, payload, false);
670 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
673 kvm_inject_gp(vcpu, 0);
675 return kvm_skip_emulated_instruction(vcpu);
679 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
681 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
683 ++vcpu->stat.pf_guest;
684 vcpu->arch.exception.nested_apf =
685 is_guest_mode(vcpu) && fault->async_page_fault;
686 if (vcpu->arch.exception.nested_apf) {
687 vcpu->arch.apf.nested_apf_token = fault->address;
688 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
690 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
694 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
696 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
697 struct x86_exception *fault)
699 struct kvm_mmu *fault_mmu;
700 WARN_ON_ONCE(fault->vector != PF_VECTOR);
702 fault_mmu = fault->nested_page_fault ? vcpu->arch.mmu :
706 * Invalidate the TLB entry for the faulting address, if it exists,
707 * else the access will fault indefinitely (and to emulate hardware).
709 if ((fault->error_code & PFERR_PRESENT_MASK) &&
710 !(fault->error_code & PFERR_RSVD_MASK))
711 kvm_mmu_invalidate_gva(vcpu, fault_mmu, fault->address,
712 fault_mmu->root_hpa);
714 fault_mmu->inject_page_fault(vcpu, fault);
715 return fault->nested_page_fault;
717 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault);
719 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
721 atomic_inc(&vcpu->arch.nmi_queued);
722 kvm_make_request(KVM_REQ_NMI, vcpu);
724 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
726 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
728 kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
730 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
732 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
734 kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
736 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
739 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
740 * a #GP and return false.
742 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
744 if (static_call(kvm_x86_get_cpl)(vcpu) <= required_cpl)
746 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
749 EXPORT_SYMBOL_GPL(kvm_require_cpl);
751 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
753 if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
756 kvm_queue_exception(vcpu, UD_VECTOR);
759 EXPORT_SYMBOL_GPL(kvm_require_dr);
762 * This function will be used to read from the physical memory of the currently
763 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
764 * can read from guest physical or from the guest's guest physical memory.
766 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
767 gfn_t ngfn, void *data, int offset, int len,
770 struct x86_exception exception;
774 ngpa = gfn_to_gpa(ngfn);
775 real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
776 if (real_gfn == UNMAPPED_GVA)
779 real_gfn = gpa_to_gfn(real_gfn);
781 return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
783 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
785 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
786 void *data, int offset, int len, u32 access)
788 return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
789 data, offset, len, access);
792 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
794 return vcpu->arch.reserved_gpa_bits | rsvd_bits(5, 8) | rsvd_bits(1, 2);
798 * Load the pae pdptrs. Return 1 if they are all valid, 0 otherwise.
800 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
802 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
803 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
806 u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
808 ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
809 offset * sizeof(u64), sizeof(pdpte),
810 PFERR_USER_MASK|PFERR_WRITE_MASK);
815 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
816 if ((pdpte[i] & PT_PRESENT_MASK) &&
817 (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
824 memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
825 kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
831 EXPORT_SYMBOL_GPL(load_pdptrs);
833 bool pdptrs_changed(struct kvm_vcpu *vcpu)
835 u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
840 if (!is_pae_paging(vcpu))
843 if (!kvm_register_is_available(vcpu, VCPU_EXREG_PDPTR))
846 gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
847 offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
848 r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
849 PFERR_USER_MASK | PFERR_WRITE_MASK);
853 return memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
855 EXPORT_SYMBOL_GPL(pdptrs_changed);
857 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0)
859 unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
861 if ((cr0 ^ old_cr0) & X86_CR0_PG) {
862 kvm_clear_async_pf_completion_queue(vcpu);
863 kvm_async_pf_hash_reset(vcpu);
866 if ((cr0 ^ old_cr0) & update_bits)
867 kvm_mmu_reset_context(vcpu);
869 if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
870 kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
871 !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
872 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
874 EXPORT_SYMBOL_GPL(kvm_post_set_cr0);
876 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
878 unsigned long old_cr0 = kvm_read_cr0(vcpu);
879 unsigned long pdptr_bits = X86_CR0_CD | X86_CR0_NW | X86_CR0_PG;
884 if (cr0 & 0xffffffff00000000UL)
888 cr0 &= ~CR0_RESERVED_BITS;
890 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
893 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
897 if ((vcpu->arch.efer & EFER_LME) && !is_paging(vcpu) &&
898 (cr0 & X86_CR0_PG)) {
903 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
908 if (!(vcpu->arch.efer & EFER_LME) && (cr0 & X86_CR0_PG) &&
909 is_pae(vcpu) && ((cr0 ^ old_cr0) & pdptr_bits) &&
910 !load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu)))
913 if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
916 static_call(kvm_x86_set_cr0)(vcpu, cr0);
918 kvm_post_set_cr0(vcpu, old_cr0, cr0);
922 EXPORT_SYMBOL_GPL(kvm_set_cr0);
924 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
926 (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
928 EXPORT_SYMBOL_GPL(kvm_lmsw);
930 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
932 if (vcpu->arch.guest_state_protected)
935 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
937 if (vcpu->arch.xcr0 != host_xcr0)
938 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
940 if (vcpu->arch.xsaves_enabled &&
941 vcpu->arch.ia32_xss != host_xss)
942 wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
945 if (static_cpu_has(X86_FEATURE_PKU) &&
946 (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
947 (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU)) &&
948 vcpu->arch.pkru != vcpu->arch.host_pkru)
949 __write_pkru(vcpu->arch.pkru);
951 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
953 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
955 if (vcpu->arch.guest_state_protected)
958 if (static_cpu_has(X86_FEATURE_PKU) &&
959 (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
960 (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU))) {
961 vcpu->arch.pkru = rdpkru();
962 if (vcpu->arch.pkru != vcpu->arch.host_pkru)
963 __write_pkru(vcpu->arch.host_pkru);
966 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
968 if (vcpu->arch.xcr0 != host_xcr0)
969 xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
971 if (vcpu->arch.xsaves_enabled &&
972 vcpu->arch.ia32_xss != host_xss)
973 wrmsrl(MSR_IA32_XSS, host_xss);
977 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
979 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
982 u64 old_xcr0 = vcpu->arch.xcr0;
985 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
986 if (index != XCR_XFEATURE_ENABLED_MASK)
988 if (!(xcr0 & XFEATURE_MASK_FP))
990 if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
994 * Do not allow the guest to set bits that we do not support
995 * saving. However, xcr0 bit 0 is always set, even if the
996 * emulated CPU does not support XSAVE (see fx_init).
998 valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
999 if (xcr0 & ~valid_bits)
1002 if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
1003 (!(xcr0 & XFEATURE_MASK_BNDCSR)))
1006 if (xcr0 & XFEATURE_MASK_AVX512) {
1007 if (!(xcr0 & XFEATURE_MASK_YMM))
1009 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
1012 vcpu->arch.xcr0 = xcr0;
1014 if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
1015 kvm_update_cpuid_runtime(vcpu);
1019 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu)
1021 if (static_call(kvm_x86_get_cpl)(vcpu) != 0 ||
1022 __kvm_set_xcr(vcpu, kvm_rcx_read(vcpu), kvm_read_edx_eax(vcpu))) {
1023 kvm_inject_gp(vcpu, 0);
1027 return kvm_skip_emulated_instruction(vcpu);
1029 EXPORT_SYMBOL_GPL(kvm_emulate_xsetbv);
1031 bool kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1033 if (cr4 & cr4_reserved_bits)
1036 if (cr4 & vcpu->arch.cr4_guest_rsvd_bits)
1039 return static_call(kvm_x86_is_valid_cr4)(vcpu, cr4);
1041 EXPORT_SYMBOL_GPL(kvm_is_valid_cr4);
1043 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4)
1045 unsigned long mmu_role_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
1046 X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
1048 if (((cr4 ^ old_cr4) & mmu_role_bits) ||
1049 (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
1050 kvm_mmu_reset_context(vcpu);
1052 EXPORT_SYMBOL_GPL(kvm_post_set_cr4);
1054 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1056 unsigned long old_cr4 = kvm_read_cr4(vcpu);
1057 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
1060 if (!kvm_is_valid_cr4(vcpu, cr4))
1063 if (is_long_mode(vcpu)) {
1064 if (!(cr4 & X86_CR4_PAE))
1066 if ((cr4 ^ old_cr4) & X86_CR4_LA57)
1068 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
1069 && ((cr4 ^ old_cr4) & pdptr_bits)
1070 && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
1071 kvm_read_cr3(vcpu)))
1074 if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
1075 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
1078 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1079 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
1083 static_call(kvm_x86_set_cr4)(vcpu, cr4);
1085 kvm_post_set_cr4(vcpu, old_cr4, cr4);
1089 EXPORT_SYMBOL_GPL(kvm_set_cr4);
1091 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1093 bool skip_tlb_flush = false;
1094 #ifdef CONFIG_X86_64
1095 bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
1098 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
1099 cr3 &= ~X86_CR3_PCID_NOFLUSH;
1103 if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
1104 if (!skip_tlb_flush) {
1105 kvm_mmu_sync_roots(vcpu);
1106 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1112 * Do not condition the GPA check on long mode, this helper is used to
1113 * stuff CR3, e.g. for RSM emulation, and there is no guarantee that
1114 * the current vCPU mode is accurate.
1116 if (kvm_vcpu_is_illegal_gpa(vcpu, cr3))
1119 if (is_pae_paging(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
1122 kvm_mmu_new_pgd(vcpu, cr3, skip_tlb_flush, skip_tlb_flush);
1123 vcpu->arch.cr3 = cr3;
1124 kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
1128 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1130 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1132 if (cr8 & CR8_RESERVED_BITS)
1134 if (lapic_in_kernel(vcpu))
1135 kvm_lapic_set_tpr(vcpu, cr8);
1137 vcpu->arch.cr8 = cr8;
1140 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1142 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1144 if (lapic_in_kernel(vcpu))
1145 return kvm_lapic_get_cr8(vcpu);
1147 return vcpu->arch.cr8;
1149 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1151 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1155 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1156 for (i = 0; i < KVM_NR_DB_REGS; i++)
1157 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1158 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
1162 void kvm_update_dr7(struct kvm_vcpu *vcpu)
1166 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1167 dr7 = vcpu->arch.guest_debug_dr7;
1169 dr7 = vcpu->arch.dr7;
1170 static_call(kvm_x86_set_dr7)(vcpu, dr7);
1171 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1172 if (dr7 & DR7_BP_EN_MASK)
1173 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1175 EXPORT_SYMBOL_GPL(kvm_update_dr7);
1177 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1179 u64 fixed = DR6_FIXED_1;
1181 if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1184 if (!guest_cpuid_has(vcpu, X86_FEATURE_BUS_LOCK_DETECT))
1185 fixed |= DR6_BUS_LOCK;
1189 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1191 size_t size = ARRAY_SIZE(vcpu->arch.db);
1195 vcpu->arch.db[array_index_nospec(dr, size)] = val;
1196 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1197 vcpu->arch.eff_db[dr] = val;
1201 if (!kvm_dr6_valid(val))
1203 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1207 if (!kvm_dr7_valid(val))
1209 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1210 kvm_update_dr7(vcpu);
1216 EXPORT_SYMBOL_GPL(kvm_set_dr);
1218 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1220 size_t size = ARRAY_SIZE(vcpu->arch.db);
1224 *val = vcpu->arch.db[array_index_nospec(dr, size)];
1228 *val = vcpu->arch.dr6;
1232 *val = vcpu->arch.dr7;
1236 EXPORT_SYMBOL_GPL(kvm_get_dr);
1238 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu)
1240 u32 ecx = kvm_rcx_read(vcpu);
1243 if (kvm_pmu_rdpmc(vcpu, ecx, &data)) {
1244 kvm_inject_gp(vcpu, 0);
1248 kvm_rax_write(vcpu, (u32)data);
1249 kvm_rdx_write(vcpu, data >> 32);
1250 return kvm_skip_emulated_instruction(vcpu);
1252 EXPORT_SYMBOL_GPL(kvm_emulate_rdpmc);
1255 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1256 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1258 * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1259 * extract the supported MSRs from the related const lists.
1260 * msrs_to_save is selected from the msrs_to_save_all to reflect the
1261 * capabilities of the host cpu. This capabilities test skips MSRs that are
1262 * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1263 * may depend on host virtualization features rather than host cpu features.
1266 static const u32 msrs_to_save_all[] = {
1267 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1269 #ifdef CONFIG_X86_64
1270 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1272 MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1273 MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1275 MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1276 MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1277 MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1278 MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1279 MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1280 MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1281 MSR_IA32_UMWAIT_CONTROL,
1283 MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1284 MSR_ARCH_PERFMON_FIXED_CTR0 + 2, MSR_ARCH_PERFMON_FIXED_CTR0 + 3,
1285 MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1286 MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1287 MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1288 MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1289 MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1290 MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1291 MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1292 MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1293 MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1294 MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1295 MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1296 MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1297 MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1298 MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1299 MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1300 MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1301 MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1302 MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1303 MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1304 MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1307 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
1308 static unsigned num_msrs_to_save;
1310 static const u32 emulated_msrs_all[] = {
1311 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1312 MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1313 HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1314 HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1315 HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1316 HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1317 HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1319 HV_X64_MSR_VP_INDEX,
1320 HV_X64_MSR_VP_RUNTIME,
1321 HV_X64_MSR_SCONTROL,
1322 HV_X64_MSR_STIMER0_CONFIG,
1323 HV_X64_MSR_VP_ASSIST_PAGE,
1324 HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1325 HV_X64_MSR_TSC_EMULATION_STATUS,
1326 HV_X64_MSR_SYNDBG_OPTIONS,
1327 HV_X64_MSR_SYNDBG_CONTROL, HV_X64_MSR_SYNDBG_STATUS,
1328 HV_X64_MSR_SYNDBG_SEND_BUFFER, HV_X64_MSR_SYNDBG_RECV_BUFFER,
1329 HV_X64_MSR_SYNDBG_PENDING_BUFFER,
1331 MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1332 MSR_KVM_PV_EOI_EN, MSR_KVM_ASYNC_PF_INT, MSR_KVM_ASYNC_PF_ACK,
1334 MSR_IA32_TSC_ADJUST,
1335 MSR_IA32_TSC_DEADLINE,
1336 MSR_IA32_ARCH_CAPABILITIES,
1337 MSR_IA32_PERF_CAPABILITIES,
1338 MSR_IA32_MISC_ENABLE,
1339 MSR_IA32_MCG_STATUS,
1341 MSR_IA32_MCG_EXT_CTL,
1345 MSR_MISC_FEATURES_ENABLES,
1346 MSR_AMD64_VIRT_SPEC_CTRL,
1351 * The following list leaves out MSRs whose values are determined
1352 * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1353 * We always support the "true" VMX control MSRs, even if the host
1354 * processor does not, so I am putting these registers here rather
1355 * than in msrs_to_save_all.
1358 MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1359 MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1360 MSR_IA32_VMX_TRUE_EXIT_CTLS,
1361 MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1363 MSR_IA32_VMX_CR0_FIXED0,
1364 MSR_IA32_VMX_CR4_FIXED0,
1365 MSR_IA32_VMX_VMCS_ENUM,
1366 MSR_IA32_VMX_PROCBASED_CTLS2,
1367 MSR_IA32_VMX_EPT_VPID_CAP,
1368 MSR_IA32_VMX_VMFUNC,
1371 MSR_KVM_POLL_CONTROL,
1374 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1375 static unsigned num_emulated_msrs;
1378 * List of msr numbers which are used to expose MSR-based features that
1379 * can be used by a hypervisor to validate requested CPU features.
1381 static const u32 msr_based_features_all[] = {
1383 MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1384 MSR_IA32_VMX_PINBASED_CTLS,
1385 MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1386 MSR_IA32_VMX_PROCBASED_CTLS,
1387 MSR_IA32_VMX_TRUE_EXIT_CTLS,
1388 MSR_IA32_VMX_EXIT_CTLS,
1389 MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1390 MSR_IA32_VMX_ENTRY_CTLS,
1392 MSR_IA32_VMX_CR0_FIXED0,
1393 MSR_IA32_VMX_CR0_FIXED1,
1394 MSR_IA32_VMX_CR4_FIXED0,
1395 MSR_IA32_VMX_CR4_FIXED1,
1396 MSR_IA32_VMX_VMCS_ENUM,
1397 MSR_IA32_VMX_PROCBASED_CTLS2,
1398 MSR_IA32_VMX_EPT_VPID_CAP,
1399 MSR_IA32_VMX_VMFUNC,
1403 MSR_IA32_ARCH_CAPABILITIES,
1404 MSR_IA32_PERF_CAPABILITIES,
1407 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
1408 static unsigned int num_msr_based_features;
1410 static u64 kvm_get_arch_capabilities(void)
1414 if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1415 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1418 * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1419 * the nested hypervisor runs with NX huge pages. If it is not,
1420 * L1 is anyway vulnerable to ITLB_MULTIHIT exploits from other
1421 * L1 guests, so it need not worry about its own (L2) guests.
1423 data |= ARCH_CAP_PSCHANGE_MC_NO;
1426 * If we're doing cache flushes (either "always" or "cond")
1427 * we will do one whenever the guest does a vmlaunch/vmresume.
1428 * If an outer hypervisor is doing the cache flush for us
1429 * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1430 * capability to the guest too, and if EPT is disabled we're not
1431 * vulnerable. Overall, only VMENTER_L1D_FLUSH_NEVER will
1432 * require a nested hypervisor to do a flush of its own.
1434 if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1435 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1437 if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1438 data |= ARCH_CAP_RDCL_NO;
1439 if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1440 data |= ARCH_CAP_SSB_NO;
1441 if (!boot_cpu_has_bug(X86_BUG_MDS))
1442 data |= ARCH_CAP_MDS_NO;
1444 if (!boot_cpu_has(X86_FEATURE_RTM)) {
1446 * If RTM=0 because the kernel has disabled TSX, the host might
1447 * have TAA_NO or TSX_CTRL. Clear TAA_NO (the guest sees RTM=0
1448 * and therefore knows that there cannot be TAA) but keep
1449 * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1450 * and we want to allow migrating those guests to tsx=off hosts.
1452 data &= ~ARCH_CAP_TAA_NO;
1453 } else if (!boot_cpu_has_bug(X86_BUG_TAA)) {
1454 data |= ARCH_CAP_TAA_NO;
1457 * Nothing to do here; we emulate TSX_CTRL if present on the
1458 * host so the guest can choose between disabling TSX or
1459 * using VERW to clear CPU buffers.
1466 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1468 switch (msr->index) {
1469 case MSR_IA32_ARCH_CAPABILITIES:
1470 msr->data = kvm_get_arch_capabilities();
1472 case MSR_IA32_UCODE_REV:
1473 rdmsrl_safe(msr->index, &msr->data);
1476 return static_call(kvm_x86_get_msr_feature)(msr);
1481 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1483 struct kvm_msr_entry msr;
1487 r = kvm_get_msr_feature(&msr);
1489 if (r == KVM_MSR_RET_INVALID) {
1490 /* Unconditionally clear the output for simplicity */
1492 if (kvm_msr_ignored_check(index, 0, false))
1504 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1506 if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1509 if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1512 if (efer & (EFER_LME | EFER_LMA) &&
1513 !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1516 if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1522 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1524 if (efer & efer_reserved_bits)
1527 return __kvm_valid_efer(vcpu, efer);
1529 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1531 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1533 u64 old_efer = vcpu->arch.efer;
1534 u64 efer = msr_info->data;
1537 if (efer & efer_reserved_bits)
1540 if (!msr_info->host_initiated) {
1541 if (!__kvm_valid_efer(vcpu, efer))
1544 if (is_paging(vcpu) &&
1545 (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1550 efer |= vcpu->arch.efer & EFER_LMA;
1552 r = static_call(kvm_x86_set_efer)(vcpu, efer);
1558 /* Update reserved bits */
1559 if ((efer ^ old_efer) & EFER_NX)
1560 kvm_mmu_reset_context(vcpu);
1565 void kvm_enable_efer_bits(u64 mask)
1567 efer_reserved_bits &= ~mask;
1569 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1571 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type)
1573 struct kvm_x86_msr_filter *msr_filter;
1574 struct msr_bitmap_range *ranges;
1575 struct kvm *kvm = vcpu->kvm;
1580 /* x2APIC MSRs do not support filtering. */
1581 if (index >= 0x800 && index <= 0x8ff)
1584 idx = srcu_read_lock(&kvm->srcu);
1586 msr_filter = srcu_dereference(kvm->arch.msr_filter, &kvm->srcu);
1592 allowed = msr_filter->default_allow;
1593 ranges = msr_filter->ranges;
1595 for (i = 0; i < msr_filter->count; i++) {
1596 u32 start = ranges[i].base;
1597 u32 end = start + ranges[i].nmsrs;
1598 u32 flags = ranges[i].flags;
1599 unsigned long *bitmap = ranges[i].bitmap;
1601 if ((index >= start) && (index < end) && (flags & type)) {
1602 allowed = !!test_bit(index - start, bitmap);
1608 srcu_read_unlock(&kvm->srcu, idx);
1612 EXPORT_SYMBOL_GPL(kvm_msr_allowed);
1615 * Write @data into the MSR specified by @index. Select MSR specific fault
1616 * checks are bypassed if @host_initiated is %true.
1617 * Returns 0 on success, non-0 otherwise.
1618 * Assumes vcpu_load() was already called.
1620 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1621 bool host_initiated)
1623 struct msr_data msr;
1625 if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_WRITE))
1626 return KVM_MSR_RET_FILTERED;
1631 case MSR_KERNEL_GS_BASE:
1634 if (is_noncanonical_address(data, vcpu))
1637 case MSR_IA32_SYSENTER_EIP:
1638 case MSR_IA32_SYSENTER_ESP:
1640 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1641 * non-canonical address is written on Intel but not on
1642 * AMD (which ignores the top 32-bits, because it does
1643 * not implement 64-bit SYSENTER).
1645 * 64-bit code should hence be able to write a non-canonical
1646 * value on AMD. Making the address canonical ensures that
1647 * vmentry does not fail on Intel after writing a non-canonical
1648 * value, and that something deterministic happens if the guest
1649 * invokes 64-bit SYSENTER.
1651 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1654 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1657 if (!host_initiated &&
1658 !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1659 !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1663 * Per Intel's SDM, bits 63:32 are reserved, but AMD's APM has
1664 * incomplete and conflicting architectural behavior. Current
1665 * AMD CPUs completely ignore bits 63:32, i.e. they aren't
1666 * reserved and always read as zeros. Enforce Intel's reserved
1667 * bits check if and only if the guest CPU is Intel, and clear
1668 * the bits in all other cases. This ensures cross-vendor
1669 * migration will provide consistent behavior for the guest.
1671 if (guest_cpuid_is_intel(vcpu) && (data >> 32) != 0)
1680 msr.host_initiated = host_initiated;
1682 return static_call(kvm_x86_set_msr)(vcpu, &msr);
1685 static int kvm_set_msr_ignored_check(struct kvm_vcpu *vcpu,
1686 u32 index, u64 data, bool host_initiated)
1688 int ret = __kvm_set_msr(vcpu, index, data, host_initiated);
1690 if (ret == KVM_MSR_RET_INVALID)
1691 if (kvm_msr_ignored_check(index, data, true))
1698 * Read the MSR specified by @index into @data. Select MSR specific fault
1699 * checks are bypassed if @host_initiated is %true.
1700 * Returns 0 on success, non-0 otherwise.
1701 * Assumes vcpu_load() was already called.
1703 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1704 bool host_initiated)
1706 struct msr_data msr;
1709 if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_READ))
1710 return KVM_MSR_RET_FILTERED;
1714 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1717 if (!host_initiated &&
1718 !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1719 !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1725 msr.host_initiated = host_initiated;
1727 ret = static_call(kvm_x86_get_msr)(vcpu, &msr);
1733 static int kvm_get_msr_ignored_check(struct kvm_vcpu *vcpu,
1734 u32 index, u64 *data, bool host_initiated)
1736 int ret = __kvm_get_msr(vcpu, index, data, host_initiated);
1738 if (ret == KVM_MSR_RET_INVALID) {
1739 /* Unconditionally clear *data for simplicity */
1741 if (kvm_msr_ignored_check(index, 0, false))
1748 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1750 return kvm_get_msr_ignored_check(vcpu, index, data, false);
1752 EXPORT_SYMBOL_GPL(kvm_get_msr);
1754 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1756 return kvm_set_msr_ignored_check(vcpu, index, data, false);
1758 EXPORT_SYMBOL_GPL(kvm_set_msr);
1760 static int complete_emulated_rdmsr(struct kvm_vcpu *vcpu)
1762 int err = vcpu->run->msr.error;
1764 kvm_rax_write(vcpu, (u32)vcpu->run->msr.data);
1765 kvm_rdx_write(vcpu, vcpu->run->msr.data >> 32);
1768 return static_call(kvm_x86_complete_emulated_msr)(vcpu, err);
1771 static int complete_emulated_wrmsr(struct kvm_vcpu *vcpu)
1773 return static_call(kvm_x86_complete_emulated_msr)(vcpu, vcpu->run->msr.error);
1776 static u64 kvm_msr_reason(int r)
1779 case KVM_MSR_RET_INVALID:
1780 return KVM_MSR_EXIT_REASON_UNKNOWN;
1781 case KVM_MSR_RET_FILTERED:
1782 return KVM_MSR_EXIT_REASON_FILTER;
1784 return KVM_MSR_EXIT_REASON_INVAL;
1788 static int kvm_msr_user_space(struct kvm_vcpu *vcpu, u32 index,
1789 u32 exit_reason, u64 data,
1790 int (*completion)(struct kvm_vcpu *vcpu),
1793 u64 msr_reason = kvm_msr_reason(r);
1795 /* Check if the user wanted to know about this MSR fault */
1796 if (!(vcpu->kvm->arch.user_space_msr_mask & msr_reason))
1799 vcpu->run->exit_reason = exit_reason;
1800 vcpu->run->msr.error = 0;
1801 memset(vcpu->run->msr.pad, 0, sizeof(vcpu->run->msr.pad));
1802 vcpu->run->msr.reason = msr_reason;
1803 vcpu->run->msr.index = index;
1804 vcpu->run->msr.data = data;
1805 vcpu->arch.complete_userspace_io = completion;
1810 static int kvm_get_msr_user_space(struct kvm_vcpu *vcpu, u32 index, int r)
1812 return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_RDMSR, 0,
1813 complete_emulated_rdmsr, r);
1816 static int kvm_set_msr_user_space(struct kvm_vcpu *vcpu, u32 index, u64 data, int r)
1818 return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_WRMSR, data,
1819 complete_emulated_wrmsr, r);
1822 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1824 u32 ecx = kvm_rcx_read(vcpu);
1828 r = kvm_get_msr(vcpu, ecx, &data);
1830 /* MSR read failed? See if we should ask user space */
1831 if (r && kvm_get_msr_user_space(vcpu, ecx, r)) {
1832 /* Bounce to user space */
1837 trace_kvm_msr_read(ecx, data);
1839 kvm_rax_write(vcpu, data & -1u);
1840 kvm_rdx_write(vcpu, (data >> 32) & -1u);
1842 trace_kvm_msr_read_ex(ecx);
1845 return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1847 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1849 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1851 u32 ecx = kvm_rcx_read(vcpu);
1852 u64 data = kvm_read_edx_eax(vcpu);
1855 r = kvm_set_msr(vcpu, ecx, data);
1857 /* MSR write failed? See if we should ask user space */
1858 if (r && kvm_set_msr_user_space(vcpu, ecx, data, r))
1859 /* Bounce to user space */
1862 /* Signal all other negative errors to userspace */
1867 trace_kvm_msr_write(ecx, data);
1869 trace_kvm_msr_write_ex(ecx, data);
1871 return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1873 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1875 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu)
1877 return kvm_skip_emulated_instruction(vcpu);
1879 EXPORT_SYMBOL_GPL(kvm_emulate_as_nop);
1881 int kvm_emulate_invd(struct kvm_vcpu *vcpu)
1883 /* Treat an INVD instruction as a NOP and just skip it. */
1884 return kvm_emulate_as_nop(vcpu);
1886 EXPORT_SYMBOL_GPL(kvm_emulate_invd);
1888 int kvm_emulate_mwait(struct kvm_vcpu *vcpu)
1890 pr_warn_once("kvm: MWAIT instruction emulated as NOP!\n");
1891 return kvm_emulate_as_nop(vcpu);
1893 EXPORT_SYMBOL_GPL(kvm_emulate_mwait);
1895 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu)
1897 kvm_queue_exception(vcpu, UD_VECTOR);
1900 EXPORT_SYMBOL_GPL(kvm_handle_invalid_op);
1902 int kvm_emulate_monitor(struct kvm_vcpu *vcpu)
1904 pr_warn_once("kvm: MONITOR instruction emulated as NOP!\n");
1905 return kvm_emulate_as_nop(vcpu);
1907 EXPORT_SYMBOL_GPL(kvm_emulate_monitor);
1909 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu)
1911 xfer_to_guest_mode_prepare();
1912 return vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu) ||
1913 xfer_to_guest_mode_work_pending();
1917 * The fast path for frequent and performance sensitive wrmsr emulation,
1918 * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
1919 * the latency of virtual IPI by avoiding the expensive bits of transitioning
1920 * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
1921 * other cases which must be called after interrupts are enabled on the host.
1923 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
1925 if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic))
1928 if (((data & APIC_SHORT_MASK) == APIC_DEST_NOSHORT) &&
1929 ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
1930 ((data & APIC_MODE_MASK) == APIC_DM_FIXED) &&
1931 ((u32)(data >> 32) != X2APIC_BROADCAST)) {
1934 kvm_apic_send_ipi(vcpu->arch.apic, (u32)data, (u32)(data >> 32));
1935 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR2, (u32)(data >> 32));
1936 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR, (u32)data);
1937 trace_kvm_apic_write(APIC_ICR, (u32)data);
1944 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
1946 if (!kvm_can_use_hv_timer(vcpu))
1949 kvm_set_lapic_tscdeadline_msr(vcpu, data);
1953 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
1955 u32 msr = kvm_rcx_read(vcpu);
1957 fastpath_t ret = EXIT_FASTPATH_NONE;
1960 case APIC_BASE_MSR + (APIC_ICR >> 4):
1961 data = kvm_read_edx_eax(vcpu);
1962 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu, data)) {
1963 kvm_skip_emulated_instruction(vcpu);
1964 ret = EXIT_FASTPATH_EXIT_HANDLED;
1967 case MSR_IA32_TSC_DEADLINE:
1968 data = kvm_read_edx_eax(vcpu);
1969 if (!handle_fastpath_set_tscdeadline(vcpu, data)) {
1970 kvm_skip_emulated_instruction(vcpu);
1971 ret = EXIT_FASTPATH_REENTER_GUEST;
1978 if (ret != EXIT_FASTPATH_NONE)
1979 trace_kvm_msr_write(msr, data);
1983 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
1986 * Adapt set_msr() to msr_io()'s calling convention
1988 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1990 return kvm_get_msr_ignored_check(vcpu, index, data, true);
1993 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1995 return kvm_set_msr_ignored_check(vcpu, index, *data, true);
1998 #ifdef CONFIG_X86_64
1999 struct pvclock_clock {
2009 struct pvclock_gtod_data {
2012 struct pvclock_clock clock; /* extract of a clocksource struct */
2013 struct pvclock_clock raw_clock; /* extract of a clocksource struct */
2019 static struct pvclock_gtod_data pvclock_gtod_data;
2021 static void update_pvclock_gtod(struct timekeeper *tk)
2023 struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
2025 write_seqcount_begin(&vdata->seq);
2027 /* copy pvclock gtod data */
2028 vdata->clock.vclock_mode = tk->tkr_mono.clock->vdso_clock_mode;
2029 vdata->clock.cycle_last = tk->tkr_mono.cycle_last;
2030 vdata->clock.mask = tk->tkr_mono.mask;
2031 vdata->clock.mult = tk->tkr_mono.mult;
2032 vdata->clock.shift = tk->tkr_mono.shift;
2033 vdata->clock.base_cycles = tk->tkr_mono.xtime_nsec;
2034 vdata->clock.offset = tk->tkr_mono.base;
2036 vdata->raw_clock.vclock_mode = tk->tkr_raw.clock->vdso_clock_mode;
2037 vdata->raw_clock.cycle_last = tk->tkr_raw.cycle_last;
2038 vdata->raw_clock.mask = tk->tkr_raw.mask;
2039 vdata->raw_clock.mult = tk->tkr_raw.mult;
2040 vdata->raw_clock.shift = tk->tkr_raw.shift;
2041 vdata->raw_clock.base_cycles = tk->tkr_raw.xtime_nsec;
2042 vdata->raw_clock.offset = tk->tkr_raw.base;
2044 vdata->wall_time_sec = tk->xtime_sec;
2046 vdata->offs_boot = tk->offs_boot;
2048 write_seqcount_end(&vdata->seq);
2051 static s64 get_kvmclock_base_ns(void)
2053 /* Count up from boot time, but with the frequency of the raw clock. */
2054 return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot));
2057 static s64 get_kvmclock_base_ns(void)
2059 /* Master clock not used, so we can just use CLOCK_BOOTTIME. */
2060 return ktime_get_boottime_ns();
2064 void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock, int sec_hi_ofs)
2068 struct pvclock_wall_clock wc;
2075 r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
2080 ++version; /* first time write, random junk */
2084 if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
2088 * The guest calculates current wall clock time by adding
2089 * system time (updated by kvm_guest_time_update below) to the
2090 * wall clock specified here. We do the reverse here.
2092 wall_nsec = ktime_get_real_ns() - get_kvmclock_ns(kvm);
2094 wc.nsec = do_div(wall_nsec, 1000000000);
2095 wc.sec = (u32)wall_nsec; /* overflow in 2106 guest time */
2096 wc.version = version;
2098 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
2101 wc_sec_hi = wall_nsec >> 32;
2102 kvm_write_guest(kvm, wall_clock + sec_hi_ofs,
2103 &wc_sec_hi, sizeof(wc_sec_hi));
2107 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
2110 static void kvm_write_system_time(struct kvm_vcpu *vcpu, gpa_t system_time,
2111 bool old_msr, bool host_initiated)
2113 struct kvm_arch *ka = &vcpu->kvm->arch;
2115 if (vcpu->vcpu_id == 0 && !host_initiated) {
2116 if (ka->boot_vcpu_runs_old_kvmclock != old_msr)
2117 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2119 ka->boot_vcpu_runs_old_kvmclock = old_msr;
2122 vcpu->arch.time = system_time;
2123 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2125 /* we verify if the enable bit is set... */
2126 vcpu->arch.pv_time_enabled = false;
2127 if (!(system_time & 1))
2130 if (!kvm_gfn_to_hva_cache_init(vcpu->kvm,
2131 &vcpu->arch.pv_time, system_time & ~1ULL,
2132 sizeof(struct pvclock_vcpu_time_info)))
2133 vcpu->arch.pv_time_enabled = true;
2138 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
2140 do_shl32_div32(dividend, divisor);
2144 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
2145 s8 *pshift, u32 *pmultiplier)
2153 scaled64 = scaled_hz;
2154 while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
2159 tps32 = (uint32_t)tps64;
2160 while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
2161 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
2169 *pmultiplier = div_frac(scaled64, tps32);
2172 #ifdef CONFIG_X86_64
2173 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
2176 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
2177 static unsigned long max_tsc_khz;
2179 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
2181 u64 v = (u64)khz * (1000000 + ppm);
2186 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier);
2188 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
2192 /* Guest TSC same frequency as host TSC? */
2194 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2198 /* TSC scaling supported? */
2199 if (!kvm_has_tsc_control) {
2200 if (user_tsc_khz > tsc_khz) {
2201 vcpu->arch.tsc_catchup = 1;
2202 vcpu->arch.tsc_always_catchup = 1;
2205 pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2210 /* TSC scaling required - calculate ratio */
2211 ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
2212 user_tsc_khz, tsc_khz);
2214 if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
2215 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2220 kvm_vcpu_write_tsc_multiplier(vcpu, ratio);
2224 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
2226 u32 thresh_lo, thresh_hi;
2227 int use_scaling = 0;
2229 /* tsc_khz can be zero if TSC calibration fails */
2230 if (user_tsc_khz == 0) {
2231 /* set tsc_scaling_ratio to a safe value */
2232 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2236 /* Compute a scale to convert nanoseconds in TSC cycles */
2237 kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
2238 &vcpu->arch.virtual_tsc_shift,
2239 &vcpu->arch.virtual_tsc_mult);
2240 vcpu->arch.virtual_tsc_khz = user_tsc_khz;
2243 * Compute the variation in TSC rate which is acceptable
2244 * within the range of tolerance and decide if the
2245 * rate being applied is within that bounds of the hardware
2246 * rate. If so, no scaling or compensation need be done.
2248 thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
2249 thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
2250 if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
2251 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
2254 return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
2257 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
2259 u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
2260 vcpu->arch.virtual_tsc_mult,
2261 vcpu->arch.virtual_tsc_shift);
2262 tsc += vcpu->arch.this_tsc_write;
2266 static inline int gtod_is_based_on_tsc(int mode)
2268 return mode == VDSO_CLOCKMODE_TSC || mode == VDSO_CLOCKMODE_HVCLOCK;
2271 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
2273 #ifdef CONFIG_X86_64
2275 struct kvm_arch *ka = &vcpu->kvm->arch;
2276 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2278 vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2279 atomic_read(&vcpu->kvm->online_vcpus));
2282 * Once the masterclock is enabled, always perform request in
2283 * order to update it.
2285 * In order to enable masterclock, the host clocksource must be TSC
2286 * and the vcpus need to have matched TSCs. When that happens,
2287 * perform request to enable masterclock.
2289 if (ka->use_master_clock ||
2290 (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
2291 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2293 trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
2294 atomic_read(&vcpu->kvm->online_vcpus),
2295 ka->use_master_clock, gtod->clock.vclock_mode);
2300 * Multiply tsc by a fixed point number represented by ratio.
2302 * The most significant 64-N bits (mult) of ratio represent the
2303 * integral part of the fixed point number; the remaining N bits
2304 * (frac) represent the fractional part, ie. ratio represents a fixed
2305 * point number (mult + frac * 2^(-N)).
2307 * N equals to kvm_tsc_scaling_ratio_frac_bits.
2309 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
2311 return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
2314 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc, u64 ratio)
2318 if (ratio != kvm_default_tsc_scaling_ratio)
2319 _tsc = __scale_tsc(ratio, tsc);
2323 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
2325 static u64 kvm_compute_l1_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
2329 tsc = kvm_scale_tsc(vcpu, rdtsc(), vcpu->arch.l1_tsc_scaling_ratio);
2331 return target_tsc - tsc;
2334 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
2336 return vcpu->arch.l1_tsc_offset +
2337 kvm_scale_tsc(vcpu, host_tsc, vcpu->arch.l1_tsc_scaling_ratio);
2339 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
2341 u64 kvm_calc_nested_tsc_offset(u64 l1_offset, u64 l2_offset, u64 l2_multiplier)
2345 if (l2_multiplier == kvm_default_tsc_scaling_ratio)
2346 nested_offset = l1_offset;
2348 nested_offset = mul_s64_u64_shr((s64) l1_offset, l2_multiplier,
2349 kvm_tsc_scaling_ratio_frac_bits);
2351 nested_offset += l2_offset;
2352 return nested_offset;
2354 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_offset);
2356 u64 kvm_calc_nested_tsc_multiplier(u64 l1_multiplier, u64 l2_multiplier)
2358 if (l2_multiplier != kvm_default_tsc_scaling_ratio)
2359 return mul_u64_u64_shr(l1_multiplier, l2_multiplier,
2360 kvm_tsc_scaling_ratio_frac_bits);
2362 return l1_multiplier;
2364 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_multiplier);
2366 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 l1_offset)
2368 trace_kvm_write_tsc_offset(vcpu->vcpu_id,
2369 vcpu->arch.l1_tsc_offset,
2372 vcpu->arch.l1_tsc_offset = l1_offset;
2375 * If we are here because L1 chose not to trap WRMSR to TSC then
2376 * according to the spec this should set L1's TSC (as opposed to
2377 * setting L1's offset for L2).
2379 if (is_guest_mode(vcpu))
2380 vcpu->arch.tsc_offset = kvm_calc_nested_tsc_offset(
2382 static_call(kvm_x86_get_l2_tsc_offset)(vcpu),
2383 static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2385 vcpu->arch.tsc_offset = l1_offset;
2387 static_call(kvm_x86_write_tsc_offset)(vcpu, vcpu->arch.tsc_offset);
2390 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier)
2392 vcpu->arch.l1_tsc_scaling_ratio = l1_multiplier;
2394 /* Userspace is changing the multiplier while L2 is active */
2395 if (is_guest_mode(vcpu))
2396 vcpu->arch.tsc_scaling_ratio = kvm_calc_nested_tsc_multiplier(
2398 static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2400 vcpu->arch.tsc_scaling_ratio = l1_multiplier;
2402 if (kvm_has_tsc_control)
2403 static_call(kvm_x86_write_tsc_multiplier)(
2404 vcpu, vcpu->arch.tsc_scaling_ratio);
2407 static inline bool kvm_check_tsc_unstable(void)
2409 #ifdef CONFIG_X86_64
2411 * TSC is marked unstable when we're running on Hyper-V,
2412 * 'TSC page' clocksource is good.
2414 if (pvclock_gtod_data.clock.vclock_mode == VDSO_CLOCKMODE_HVCLOCK)
2417 return check_tsc_unstable();
2420 static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 data)
2422 struct kvm *kvm = vcpu->kvm;
2423 u64 offset, ns, elapsed;
2424 unsigned long flags;
2426 bool already_matched;
2427 bool synchronizing = false;
2429 raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
2430 offset = kvm_compute_l1_tsc_offset(vcpu, data);
2431 ns = get_kvmclock_base_ns();
2432 elapsed = ns - kvm->arch.last_tsc_nsec;
2434 if (vcpu->arch.virtual_tsc_khz) {
2437 * detection of vcpu initialization -- need to sync
2438 * with other vCPUs. This particularly helps to keep
2439 * kvm_clock stable after CPU hotplug
2441 synchronizing = true;
2443 u64 tsc_exp = kvm->arch.last_tsc_write +
2444 nsec_to_cycles(vcpu, elapsed);
2445 u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
2447 * Special case: TSC write with a small delta (1 second)
2448 * of virtual cycle time against real time is
2449 * interpreted as an attempt to synchronize the CPU.
2451 synchronizing = data < tsc_exp + tsc_hz &&
2452 data + tsc_hz > tsc_exp;
2457 * For a reliable TSC, we can match TSC offsets, and for an unstable
2458 * TSC, we add elapsed time in this computation. We could let the
2459 * compensation code attempt to catch up if we fall behind, but
2460 * it's better to try to match offsets from the beginning.
2462 if (synchronizing &&
2463 vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
2464 if (!kvm_check_tsc_unstable()) {
2465 offset = kvm->arch.cur_tsc_offset;
2467 u64 delta = nsec_to_cycles(vcpu, elapsed);
2469 offset = kvm_compute_l1_tsc_offset(vcpu, data);
2472 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
2475 * We split periods of matched TSC writes into generations.
2476 * For each generation, we track the original measured
2477 * nanosecond time, offset, and write, so if TSCs are in
2478 * sync, we can match exact offset, and if not, we can match
2479 * exact software computation in compute_guest_tsc()
2481 * These values are tracked in kvm->arch.cur_xxx variables.
2483 kvm->arch.cur_tsc_generation++;
2484 kvm->arch.cur_tsc_nsec = ns;
2485 kvm->arch.cur_tsc_write = data;
2486 kvm->arch.cur_tsc_offset = offset;
2491 * We also track th most recent recorded KHZ, write and time to
2492 * allow the matching interval to be extended at each write.
2494 kvm->arch.last_tsc_nsec = ns;
2495 kvm->arch.last_tsc_write = data;
2496 kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2498 vcpu->arch.last_guest_tsc = data;
2500 /* Keep track of which generation this VCPU has synchronized to */
2501 vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2502 vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2503 vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2505 kvm_vcpu_write_tsc_offset(vcpu, offset);
2506 raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2508 spin_lock_irqsave(&kvm->arch.pvclock_gtod_sync_lock, flags);
2510 kvm->arch.nr_vcpus_matched_tsc = 0;
2511 } else if (!already_matched) {
2512 kvm->arch.nr_vcpus_matched_tsc++;
2515 kvm_track_tsc_matching(vcpu);
2516 spin_unlock_irqrestore(&kvm->arch.pvclock_gtod_sync_lock, flags);
2519 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2522 u64 tsc_offset = vcpu->arch.l1_tsc_offset;
2523 kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2526 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2528 if (vcpu->arch.l1_tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
2529 WARN_ON(adjustment < 0);
2530 adjustment = kvm_scale_tsc(vcpu, (u64) adjustment,
2531 vcpu->arch.l1_tsc_scaling_ratio);
2532 adjust_tsc_offset_guest(vcpu, adjustment);
2535 #ifdef CONFIG_X86_64
2537 static u64 read_tsc(void)
2539 u64 ret = (u64)rdtsc_ordered();
2540 u64 last = pvclock_gtod_data.clock.cycle_last;
2542 if (likely(ret >= last))
2546 * GCC likes to generate cmov here, but this branch is extremely
2547 * predictable (it's just a function of time and the likely is
2548 * very likely) and there's a data dependence, so force GCC
2549 * to generate a branch instead. I don't barrier() because
2550 * we don't actually need a barrier, and if this function
2551 * ever gets inlined it will generate worse code.
2557 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2563 switch (clock->vclock_mode) {
2564 case VDSO_CLOCKMODE_HVCLOCK:
2565 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2567 if (tsc_pg_val != U64_MAX) {
2568 /* TSC page valid */
2569 *mode = VDSO_CLOCKMODE_HVCLOCK;
2570 v = (tsc_pg_val - clock->cycle_last) &
2573 /* TSC page invalid */
2574 *mode = VDSO_CLOCKMODE_NONE;
2577 case VDSO_CLOCKMODE_TSC:
2578 *mode = VDSO_CLOCKMODE_TSC;
2579 *tsc_timestamp = read_tsc();
2580 v = (*tsc_timestamp - clock->cycle_last) &
2584 *mode = VDSO_CLOCKMODE_NONE;
2587 if (*mode == VDSO_CLOCKMODE_NONE)
2588 *tsc_timestamp = v = 0;
2590 return v * clock->mult;
2593 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2595 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2601 seq = read_seqcount_begin(>od->seq);
2602 ns = gtod->raw_clock.base_cycles;
2603 ns += vgettsc(>od->raw_clock, tsc_timestamp, &mode);
2604 ns >>= gtod->raw_clock.shift;
2605 ns += ktime_to_ns(ktime_add(gtod->raw_clock.offset, gtod->offs_boot));
2606 } while (unlikely(read_seqcount_retry(>od->seq, seq)));
2612 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2614 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2620 seq = read_seqcount_begin(>od->seq);
2621 ts->tv_sec = gtod->wall_time_sec;
2622 ns = gtod->clock.base_cycles;
2623 ns += vgettsc(>od->clock, tsc_timestamp, &mode);
2624 ns >>= gtod->clock.shift;
2625 } while (unlikely(read_seqcount_retry(>od->seq, seq)));
2627 ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2633 /* returns true if host is using TSC based clocksource */
2634 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2636 /* checked again under seqlock below */
2637 if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2640 return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2644 /* returns true if host is using TSC based clocksource */
2645 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2648 /* checked again under seqlock below */
2649 if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2652 return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2658 * Assuming a stable TSC across physical CPUS, and a stable TSC
2659 * across virtual CPUs, the following condition is possible.
2660 * Each numbered line represents an event visible to both
2661 * CPUs at the next numbered event.
2663 * "timespecX" represents host monotonic time. "tscX" represents
2666 * VCPU0 on CPU0 | VCPU1 on CPU1
2668 * 1. read timespec0,tsc0
2669 * 2. | timespec1 = timespec0 + N
2671 * 3. transition to guest | transition to guest
2672 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2673 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
2674 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2676 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2679 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2681 * - 0 < N - M => M < N
2683 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2684 * always the case (the difference between two distinct xtime instances
2685 * might be smaller then the difference between corresponding TSC reads,
2686 * when updating guest vcpus pvclock areas).
2688 * To avoid that problem, do not allow visibility of distinct
2689 * system_timestamp/tsc_timestamp values simultaneously: use a master
2690 * copy of host monotonic time values. Update that master copy
2693 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2697 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2699 #ifdef CONFIG_X86_64
2700 struct kvm_arch *ka = &kvm->arch;
2702 bool host_tsc_clocksource, vcpus_matched;
2704 vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2705 atomic_read(&kvm->online_vcpus));
2708 * If the host uses TSC clock, then passthrough TSC as stable
2711 host_tsc_clocksource = kvm_get_time_and_clockread(
2712 &ka->master_kernel_ns,
2713 &ka->master_cycle_now);
2715 ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2716 && !ka->backwards_tsc_observed
2717 && !ka->boot_vcpu_runs_old_kvmclock;
2719 if (ka->use_master_clock)
2720 atomic_set(&kvm_guest_has_master_clock, 1);
2722 vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2723 trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2728 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2730 kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2733 static void kvm_gen_update_masterclock(struct kvm *kvm)
2735 #ifdef CONFIG_X86_64
2737 struct kvm_vcpu *vcpu;
2738 struct kvm_arch *ka = &kvm->arch;
2739 unsigned long flags;
2741 kvm_hv_invalidate_tsc_page(kvm);
2743 kvm_make_mclock_inprogress_request(kvm);
2745 /* no guest entries from this point */
2746 spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2747 pvclock_update_vm_gtod_copy(kvm);
2748 spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2750 kvm_for_each_vcpu(i, vcpu, kvm)
2751 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2753 /* guest entries allowed */
2754 kvm_for_each_vcpu(i, vcpu, kvm)
2755 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2759 u64 get_kvmclock_ns(struct kvm *kvm)
2761 struct kvm_arch *ka = &kvm->arch;
2762 struct pvclock_vcpu_time_info hv_clock;
2763 unsigned long flags;
2766 spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2767 if (!ka->use_master_clock) {
2768 spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2769 return get_kvmclock_base_ns() + ka->kvmclock_offset;
2772 hv_clock.tsc_timestamp = ka->master_cycle_now;
2773 hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2774 spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2776 /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2779 if (__this_cpu_read(cpu_tsc_khz)) {
2780 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2781 &hv_clock.tsc_shift,
2782 &hv_clock.tsc_to_system_mul);
2783 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2785 ret = get_kvmclock_base_ns() + ka->kvmclock_offset;
2792 static void kvm_setup_pvclock_page(struct kvm_vcpu *v,
2793 struct gfn_to_hva_cache *cache,
2794 unsigned int offset)
2796 struct kvm_vcpu_arch *vcpu = &v->arch;
2797 struct pvclock_vcpu_time_info guest_hv_clock;
2799 if (unlikely(kvm_read_guest_offset_cached(v->kvm, cache,
2800 &guest_hv_clock, offset, sizeof(guest_hv_clock))))
2803 /* This VCPU is paused, but it's legal for a guest to read another
2804 * VCPU's kvmclock, so we really have to follow the specification where
2805 * it says that version is odd if data is being modified, and even after
2808 * Version field updates must be kept separate. This is because
2809 * kvm_write_guest_cached might use a "rep movs" instruction, and
2810 * writes within a string instruction are weakly ordered. So there
2811 * are three writes overall.
2813 * As a small optimization, only write the version field in the first
2814 * and third write. The vcpu->pv_time cache is still valid, because the
2815 * version field is the first in the struct.
2817 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2819 if (guest_hv_clock.version & 1)
2820 ++guest_hv_clock.version; /* first time write, random junk */
2822 vcpu->hv_clock.version = guest_hv_clock.version + 1;
2823 kvm_write_guest_offset_cached(v->kvm, cache,
2824 &vcpu->hv_clock, offset,
2825 sizeof(vcpu->hv_clock.version));
2829 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2830 vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2832 if (vcpu->pvclock_set_guest_stopped_request) {
2833 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2834 vcpu->pvclock_set_guest_stopped_request = false;
2837 trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2839 kvm_write_guest_offset_cached(v->kvm, cache,
2840 &vcpu->hv_clock, offset,
2841 sizeof(vcpu->hv_clock));
2845 vcpu->hv_clock.version++;
2846 kvm_write_guest_offset_cached(v->kvm, cache,
2847 &vcpu->hv_clock, offset,
2848 sizeof(vcpu->hv_clock.version));
2851 static int kvm_guest_time_update(struct kvm_vcpu *v)
2853 unsigned long flags, tgt_tsc_khz;
2854 struct kvm_vcpu_arch *vcpu = &v->arch;
2855 struct kvm_arch *ka = &v->kvm->arch;
2857 u64 tsc_timestamp, host_tsc;
2859 bool use_master_clock;
2865 * If the host uses TSC clock, then passthrough TSC as stable
2868 spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2869 use_master_clock = ka->use_master_clock;
2870 if (use_master_clock) {
2871 host_tsc = ka->master_cycle_now;
2872 kernel_ns = ka->master_kernel_ns;
2874 spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2876 /* Keep irq disabled to prevent changes to the clock */
2877 local_irq_save(flags);
2878 tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2879 if (unlikely(tgt_tsc_khz == 0)) {
2880 local_irq_restore(flags);
2881 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2884 if (!use_master_clock) {
2886 kernel_ns = get_kvmclock_base_ns();
2889 tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2892 * We may have to catch up the TSC to match elapsed wall clock
2893 * time for two reasons, even if kvmclock is used.
2894 * 1) CPU could have been running below the maximum TSC rate
2895 * 2) Broken TSC compensation resets the base at each VCPU
2896 * entry to avoid unknown leaps of TSC even when running
2897 * again on the same CPU. This may cause apparent elapsed
2898 * time to disappear, and the guest to stand still or run
2901 if (vcpu->tsc_catchup) {
2902 u64 tsc = compute_guest_tsc(v, kernel_ns);
2903 if (tsc > tsc_timestamp) {
2904 adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2905 tsc_timestamp = tsc;
2909 local_irq_restore(flags);
2911 /* With all the info we got, fill in the values */
2913 if (kvm_has_tsc_control)
2914 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz,
2915 v->arch.l1_tsc_scaling_ratio);
2917 if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2918 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2919 &vcpu->hv_clock.tsc_shift,
2920 &vcpu->hv_clock.tsc_to_system_mul);
2921 vcpu->hw_tsc_khz = tgt_tsc_khz;
2924 vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2925 vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2926 vcpu->last_guest_tsc = tsc_timestamp;
2928 /* If the host uses TSC clocksource, then it is stable */
2930 if (use_master_clock)
2931 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2933 vcpu->hv_clock.flags = pvclock_flags;
2935 if (vcpu->pv_time_enabled)
2936 kvm_setup_pvclock_page(v, &vcpu->pv_time, 0);
2937 if (vcpu->xen.vcpu_info_set)
2938 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_info_cache,
2939 offsetof(struct compat_vcpu_info, time));
2940 if (vcpu->xen.vcpu_time_info_set)
2941 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_time_info_cache, 0);
2942 if (v == kvm_get_vcpu(v->kvm, 0))
2943 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2948 * kvmclock updates which are isolated to a given vcpu, such as
2949 * vcpu->cpu migration, should not allow system_timestamp from
2950 * the rest of the vcpus to remain static. Otherwise ntp frequency
2951 * correction applies to one vcpu's system_timestamp but not
2954 * So in those cases, request a kvmclock update for all vcpus.
2955 * We need to rate-limit these requests though, as they can
2956 * considerably slow guests that have a large number of vcpus.
2957 * The time for a remote vcpu to update its kvmclock is bound
2958 * by the delay we use to rate-limit the updates.
2961 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2963 static void kvmclock_update_fn(struct work_struct *work)
2966 struct delayed_work *dwork = to_delayed_work(work);
2967 struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2968 kvmclock_update_work);
2969 struct kvm *kvm = container_of(ka, struct kvm, arch);
2970 struct kvm_vcpu *vcpu;
2972 kvm_for_each_vcpu(i, vcpu, kvm) {
2973 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2974 kvm_vcpu_kick(vcpu);
2978 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2980 struct kvm *kvm = v->kvm;
2982 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2983 schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2984 KVMCLOCK_UPDATE_DELAY);
2987 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2989 static void kvmclock_sync_fn(struct work_struct *work)
2991 struct delayed_work *dwork = to_delayed_work(work);
2992 struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2993 kvmclock_sync_work);
2994 struct kvm *kvm = container_of(ka, struct kvm, arch);
2996 if (!kvmclock_periodic_sync)
2999 schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
3000 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
3001 KVMCLOCK_SYNC_PERIOD);
3005 * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
3007 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
3009 /* McStatusWrEn enabled? */
3010 if (guest_cpuid_is_amd_or_hygon(vcpu))
3011 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
3016 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3018 u64 mcg_cap = vcpu->arch.mcg_cap;
3019 unsigned bank_num = mcg_cap & 0xff;
3020 u32 msr = msr_info->index;
3021 u64 data = msr_info->data;
3024 case MSR_IA32_MCG_STATUS:
3025 vcpu->arch.mcg_status = data;
3027 case MSR_IA32_MCG_CTL:
3028 if (!(mcg_cap & MCG_CTL_P) &&
3029 (data || !msr_info->host_initiated))
3031 if (data != 0 && data != ~(u64)0)
3033 vcpu->arch.mcg_ctl = data;
3036 if (msr >= MSR_IA32_MC0_CTL &&
3037 msr < MSR_IA32_MCx_CTL(bank_num)) {
3038 u32 offset = array_index_nospec(
3039 msr - MSR_IA32_MC0_CTL,
3040 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3042 /* only 0 or all 1s can be written to IA32_MCi_CTL
3043 * some Linux kernels though clear bit 10 in bank 4 to
3044 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
3045 * this to avoid an uncatched #GP in the guest
3047 if ((offset & 0x3) == 0 &&
3048 data != 0 && (data | (1 << 10)) != ~(u64)0)
3052 if (!msr_info->host_initiated &&
3053 (offset & 0x3) == 1 && data != 0) {
3054 if (!can_set_mci_status(vcpu))
3058 vcpu->arch.mce_banks[offset] = data;
3066 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu)
3068 u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT;
3070 return (vcpu->arch.apf.msr_en_val & mask) == mask;
3073 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
3075 gpa_t gpa = data & ~0x3f;
3077 /* Bits 4:5 are reserved, Should be zero */
3081 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_VMEXIT) &&
3082 (data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT))
3085 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT) &&
3086 (data & KVM_ASYNC_PF_DELIVERY_AS_INT))
3089 if (!lapic_in_kernel(vcpu))
3090 return data ? 1 : 0;
3092 vcpu->arch.apf.msr_en_val = data;
3094 if (!kvm_pv_async_pf_enabled(vcpu)) {
3095 kvm_clear_async_pf_completion_queue(vcpu);
3096 kvm_async_pf_hash_reset(vcpu);
3100 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
3104 vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
3105 vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
3107 kvm_async_pf_wakeup_all(vcpu);
3112 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu *vcpu, u64 data)
3114 /* Bits 8-63 are reserved */
3118 if (!lapic_in_kernel(vcpu))
3121 vcpu->arch.apf.msr_int_val = data;
3123 vcpu->arch.apf.vec = data & KVM_ASYNC_PF_VEC_MASK;
3128 static void kvmclock_reset(struct kvm_vcpu *vcpu)
3130 vcpu->arch.pv_time_enabled = false;
3131 vcpu->arch.time = 0;
3134 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu *vcpu)
3136 ++vcpu->stat.tlb_flush;
3137 static_call(kvm_x86_tlb_flush_all)(vcpu);
3140 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu)
3142 ++vcpu->stat.tlb_flush;
3146 * A TLB flush on behalf of the guest is equivalent to
3147 * INVPCID(all), toggling CR4.PGE, etc., which requires
3148 * a forced sync of the shadow page tables. Unload the
3149 * entire MMU here and the subsequent load will sync the
3150 * shadow page tables, and also flush the TLB.
3152 kvm_mmu_unload(vcpu);
3156 static_call(kvm_x86_tlb_flush_guest)(vcpu);
3159 static void record_steal_time(struct kvm_vcpu *vcpu)
3161 struct kvm_host_map map;
3162 struct kvm_steal_time *st;
3164 if (kvm_xen_msr_enabled(vcpu->kvm)) {
3165 kvm_xen_runstate_set_running(vcpu);
3169 if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3172 /* -EAGAIN is returned in atomic context so we can just return. */
3173 if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT,
3174 &map, &vcpu->arch.st.cache, false))
3178 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
3181 * Doing a TLB flush here, on the guest's behalf, can avoid
3184 if (guest_pv_has(vcpu, KVM_FEATURE_PV_TLB_FLUSH)) {
3185 u8 st_preempted = xchg(&st->preempted, 0);
3187 trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
3188 st_preempted & KVM_VCPU_FLUSH_TLB);
3189 if (st_preempted & KVM_VCPU_FLUSH_TLB)
3190 kvm_vcpu_flush_tlb_guest(vcpu);
3195 vcpu->arch.st.preempted = 0;
3197 if (st->version & 1)
3198 st->version += 1; /* first time write, random junk */
3204 st->steal += current->sched_info.run_delay -
3205 vcpu->arch.st.last_steal;
3206 vcpu->arch.st.last_steal = current->sched_info.run_delay;
3212 kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, false);
3215 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3218 u32 msr = msr_info->index;
3219 u64 data = msr_info->data;
3221 if (msr && msr == vcpu->kvm->arch.xen_hvm_config.msr)
3222 return kvm_xen_write_hypercall_page(vcpu, data);
3225 case MSR_AMD64_NB_CFG:
3226 case MSR_IA32_UCODE_WRITE:
3227 case MSR_VM_HSAVE_PA:
3228 case MSR_AMD64_PATCH_LOADER:
3229 case MSR_AMD64_BU_CFG2:
3230 case MSR_AMD64_DC_CFG:
3231 case MSR_F15H_EX_CFG:
3234 case MSR_IA32_UCODE_REV:
3235 if (msr_info->host_initiated)
3236 vcpu->arch.microcode_version = data;
3238 case MSR_IA32_ARCH_CAPABILITIES:
3239 if (!msr_info->host_initiated)
3241 vcpu->arch.arch_capabilities = data;
3243 case MSR_IA32_PERF_CAPABILITIES: {
3244 struct kvm_msr_entry msr_ent = {.index = msr, .data = 0};
3246 if (!msr_info->host_initiated)
3248 if (guest_cpuid_has(vcpu, X86_FEATURE_PDCM) && kvm_get_msr_feature(&msr_ent))
3250 if (data & ~msr_ent.data)
3253 vcpu->arch.perf_capabilities = data;
3258 return set_efer(vcpu, msr_info);
3260 data &= ~(u64)0x40; /* ignore flush filter disable */
3261 data &= ~(u64)0x100; /* ignore ignne emulation enable */
3262 data &= ~(u64)0x8; /* ignore TLB cache disable */
3264 /* Handle McStatusWrEn */
3265 if (data == BIT_ULL(18)) {
3266 vcpu->arch.msr_hwcr = data;
3267 } else if (data != 0) {
3268 vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
3273 case MSR_FAM10H_MMIO_CONF_BASE:
3275 vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
3280 case 0x200 ... 0x2ff:
3281 return kvm_mtrr_set_msr(vcpu, msr, data);
3282 case MSR_IA32_APICBASE:
3283 return kvm_set_apic_base(vcpu, msr_info);
3284 case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3285 return kvm_x2apic_msr_write(vcpu, msr, data);
3286 case MSR_IA32_TSC_DEADLINE:
3287 kvm_set_lapic_tscdeadline_msr(vcpu, data);
3289 case MSR_IA32_TSC_ADJUST:
3290 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
3291 if (!msr_info->host_initiated) {
3292 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
3293 adjust_tsc_offset_guest(vcpu, adj);
3295 vcpu->arch.ia32_tsc_adjust_msr = data;
3298 case MSR_IA32_MISC_ENABLE:
3299 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
3300 ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
3301 if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
3303 vcpu->arch.ia32_misc_enable_msr = data;
3304 kvm_update_cpuid_runtime(vcpu);
3306 vcpu->arch.ia32_misc_enable_msr = data;
3309 case MSR_IA32_SMBASE:
3310 if (!msr_info->host_initiated)
3312 vcpu->arch.smbase = data;
3314 case MSR_IA32_POWER_CTL:
3315 vcpu->arch.msr_ia32_power_ctl = data;
3318 if (msr_info->host_initiated) {
3319 kvm_synchronize_tsc(vcpu, data);
3321 u64 adj = kvm_compute_l1_tsc_offset(vcpu, data) - vcpu->arch.l1_tsc_offset;
3322 adjust_tsc_offset_guest(vcpu, adj);
3323 vcpu->arch.ia32_tsc_adjust_msr += adj;
3327 if (!msr_info->host_initiated &&
3328 !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3331 * KVM supports exposing PT to the guest, but does not support
3332 * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3333 * XSAVES/XRSTORS to save/restore PT MSRs.
3335 if (data & ~supported_xss)
3337 vcpu->arch.ia32_xss = data;
3340 if (!msr_info->host_initiated)
3342 vcpu->arch.smi_count = data;
3344 case MSR_KVM_WALL_CLOCK_NEW:
3345 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3348 vcpu->kvm->arch.wall_clock = data;
3349 kvm_write_wall_clock(vcpu->kvm, data, 0);
3351 case MSR_KVM_WALL_CLOCK:
3352 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3355 vcpu->kvm->arch.wall_clock = data;
3356 kvm_write_wall_clock(vcpu->kvm, data, 0);
3358 case MSR_KVM_SYSTEM_TIME_NEW:
3359 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3362 kvm_write_system_time(vcpu, data, false, msr_info->host_initiated);
3364 case MSR_KVM_SYSTEM_TIME:
3365 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3368 kvm_write_system_time(vcpu, data, true, msr_info->host_initiated);
3370 case MSR_KVM_ASYNC_PF_EN:
3371 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3374 if (kvm_pv_enable_async_pf(vcpu, data))
3377 case MSR_KVM_ASYNC_PF_INT:
3378 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3381 if (kvm_pv_enable_async_pf_int(vcpu, data))
3384 case MSR_KVM_ASYNC_PF_ACK:
3385 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3388 vcpu->arch.apf.pageready_pending = false;
3389 kvm_check_async_pf_completion(vcpu);
3392 case MSR_KVM_STEAL_TIME:
3393 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3396 if (unlikely(!sched_info_on()))
3399 if (data & KVM_STEAL_RESERVED_MASK)
3402 vcpu->arch.st.msr_val = data;
3404 if (!(data & KVM_MSR_ENABLED))
3407 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3410 case MSR_KVM_PV_EOI_EN:
3411 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3414 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
3418 case MSR_KVM_POLL_CONTROL:
3419 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3422 /* only enable bit supported */
3423 if (data & (-1ULL << 1))
3426 vcpu->arch.msr_kvm_poll_control = data;
3429 case MSR_IA32_MCG_CTL:
3430 case MSR_IA32_MCG_STATUS:
3431 case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3432 return set_msr_mce(vcpu, msr_info);
3434 case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3435 case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3438 case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3439 case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3440 if (kvm_pmu_is_valid_msr(vcpu, msr))
3441 return kvm_pmu_set_msr(vcpu, msr_info);
3443 if (pr || data != 0)
3444 vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
3445 "0x%x data 0x%llx\n", msr, data);
3447 case MSR_K7_CLK_CTL:
3449 * Ignore all writes to this no longer documented MSR.
3450 * Writes are only relevant for old K7 processors,
3451 * all pre-dating SVM, but a recommended workaround from
3452 * AMD for these chips. It is possible to specify the
3453 * affected processor models on the command line, hence
3454 * the need to ignore the workaround.
3457 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3458 case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3459 case HV_X64_MSR_SYNDBG_OPTIONS:
3460 case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3461 case HV_X64_MSR_CRASH_CTL:
3462 case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3463 case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3464 case HV_X64_MSR_TSC_EMULATION_CONTROL:
3465 case HV_X64_MSR_TSC_EMULATION_STATUS:
3466 return kvm_hv_set_msr_common(vcpu, msr, data,
3467 msr_info->host_initiated);
3468 case MSR_IA32_BBL_CR_CTL3:
3469 /* Drop writes to this legacy MSR -- see rdmsr
3470 * counterpart for further detail.
3472 if (report_ignored_msrs)
3473 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
3476 case MSR_AMD64_OSVW_ID_LENGTH:
3477 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3479 vcpu->arch.osvw.length = data;
3481 case MSR_AMD64_OSVW_STATUS:
3482 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3484 vcpu->arch.osvw.status = data;
3486 case MSR_PLATFORM_INFO:
3487 if (!msr_info->host_initiated ||
3488 (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
3489 cpuid_fault_enabled(vcpu)))
3491 vcpu->arch.msr_platform_info = data;
3493 case MSR_MISC_FEATURES_ENABLES:
3494 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
3495 (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
3496 !supports_cpuid_fault(vcpu)))
3498 vcpu->arch.msr_misc_features_enables = data;
3501 if (kvm_pmu_is_valid_msr(vcpu, msr))
3502 return kvm_pmu_set_msr(vcpu, msr_info);
3503 return KVM_MSR_RET_INVALID;
3507 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
3509 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
3512 u64 mcg_cap = vcpu->arch.mcg_cap;
3513 unsigned bank_num = mcg_cap & 0xff;
3516 case MSR_IA32_P5_MC_ADDR:
3517 case MSR_IA32_P5_MC_TYPE:
3520 case MSR_IA32_MCG_CAP:
3521 data = vcpu->arch.mcg_cap;
3523 case MSR_IA32_MCG_CTL:
3524 if (!(mcg_cap & MCG_CTL_P) && !host)
3526 data = vcpu->arch.mcg_ctl;
3528 case MSR_IA32_MCG_STATUS:
3529 data = vcpu->arch.mcg_status;
3532 if (msr >= MSR_IA32_MC0_CTL &&
3533 msr < MSR_IA32_MCx_CTL(bank_num)) {
3534 u32 offset = array_index_nospec(
3535 msr - MSR_IA32_MC0_CTL,
3536 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3538 data = vcpu->arch.mce_banks[offset];
3547 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3549 switch (msr_info->index) {
3550 case MSR_IA32_PLATFORM_ID:
3551 case MSR_IA32_EBL_CR_POWERON:
3552 case MSR_IA32_LASTBRANCHFROMIP:
3553 case MSR_IA32_LASTBRANCHTOIP:
3554 case MSR_IA32_LASTINTFROMIP:
3555 case MSR_IA32_LASTINTTOIP:
3557 case MSR_K8_TSEG_ADDR:
3558 case MSR_K8_TSEG_MASK:
3559 case MSR_VM_HSAVE_PA:
3560 case MSR_K8_INT_PENDING_MSG:
3561 case MSR_AMD64_NB_CFG:
3562 case MSR_FAM10H_MMIO_CONF_BASE:
3563 case MSR_AMD64_BU_CFG2:
3564 case MSR_IA32_PERF_CTL:
3565 case MSR_AMD64_DC_CFG:
3566 case MSR_F15H_EX_CFG:
3568 * Intel Sandy Bridge CPUs must support the RAPL (running average power
3569 * limit) MSRs. Just return 0, as we do not want to expose the host
3570 * data here. Do not conditionalize this on CPUID, as KVM does not do
3571 * so for existing CPU-specific MSRs.
3573 case MSR_RAPL_POWER_UNIT:
3574 case MSR_PP0_ENERGY_STATUS: /* Power plane 0 (core) */
3575 case MSR_PP1_ENERGY_STATUS: /* Power plane 1 (graphics uncore) */
3576 case MSR_PKG_ENERGY_STATUS: /* Total package */
3577 case MSR_DRAM_ENERGY_STATUS: /* DRAM controller */
3580 case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3581 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3582 return kvm_pmu_get_msr(vcpu, msr_info);
3583 if (!msr_info->host_initiated)
3587 case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3588 case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3589 case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3590 case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3591 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3592 return kvm_pmu_get_msr(vcpu, msr_info);
3595 case MSR_IA32_UCODE_REV:
3596 msr_info->data = vcpu->arch.microcode_version;
3598 case MSR_IA32_ARCH_CAPABILITIES:
3599 if (!msr_info->host_initiated &&
3600 !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
3602 msr_info->data = vcpu->arch.arch_capabilities;
3604 case MSR_IA32_PERF_CAPABILITIES:
3605 if (!msr_info->host_initiated &&
3606 !guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
3608 msr_info->data = vcpu->arch.perf_capabilities;
3610 case MSR_IA32_POWER_CTL:
3611 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
3613 case MSR_IA32_TSC: {
3615 * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3616 * even when not intercepted. AMD manual doesn't explicitly
3617 * state this but appears to behave the same.
3619 * On userspace reads and writes, however, we unconditionally
3620 * return L1's TSC value to ensure backwards-compatible
3621 * behavior for migration.
3625 if (msr_info->host_initiated) {
3626 offset = vcpu->arch.l1_tsc_offset;
3627 ratio = vcpu->arch.l1_tsc_scaling_ratio;
3629 offset = vcpu->arch.tsc_offset;
3630 ratio = vcpu->arch.tsc_scaling_ratio;
3633 msr_info->data = kvm_scale_tsc(vcpu, rdtsc(), ratio) + offset;
3637 case 0x200 ... 0x2ff:
3638 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
3639 case 0xcd: /* fsb frequency */
3643 * MSR_EBC_FREQUENCY_ID
3644 * Conservative value valid for even the basic CPU models.
3645 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3646 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3647 * and 266MHz for model 3, or 4. Set Core Clock
3648 * Frequency to System Bus Frequency Ratio to 1 (bits
3649 * 31:24) even though these are only valid for CPU
3650 * models > 2, however guests may end up dividing or
3651 * multiplying by zero otherwise.
3653 case MSR_EBC_FREQUENCY_ID:
3654 msr_info->data = 1 << 24;
3656 case MSR_IA32_APICBASE:
3657 msr_info->data = kvm_get_apic_base(vcpu);
3659 case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3660 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
3661 case MSR_IA32_TSC_DEADLINE:
3662 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
3664 case MSR_IA32_TSC_ADJUST:
3665 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
3667 case MSR_IA32_MISC_ENABLE:
3668 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
3670 case MSR_IA32_SMBASE:
3671 if (!msr_info->host_initiated)
3673 msr_info->data = vcpu->arch.smbase;
3676 msr_info->data = vcpu->arch.smi_count;
3678 case MSR_IA32_PERF_STATUS:
3679 /* TSC increment by tick */
3680 msr_info->data = 1000ULL;
3681 /* CPU multiplier */
3682 msr_info->data |= (((uint64_t)4ULL) << 40);
3685 msr_info->data = vcpu->arch.efer;
3687 case MSR_KVM_WALL_CLOCK:
3688 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3691 msr_info->data = vcpu->kvm->arch.wall_clock;
3693 case MSR_KVM_WALL_CLOCK_NEW:
3694 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3697 msr_info->data = vcpu->kvm->arch.wall_clock;
3699 case MSR_KVM_SYSTEM_TIME:
3700 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3703 msr_info->data = vcpu->arch.time;
3705 case MSR_KVM_SYSTEM_TIME_NEW:
3706 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3709 msr_info->data = vcpu->arch.time;
3711 case MSR_KVM_ASYNC_PF_EN:
3712 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3715 msr_info->data = vcpu->arch.apf.msr_en_val;
3717 case MSR_KVM_ASYNC_PF_INT:
3718 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3721 msr_info->data = vcpu->arch.apf.msr_int_val;
3723 case MSR_KVM_ASYNC_PF_ACK:
3724 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3729 case MSR_KVM_STEAL_TIME:
3730 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3733 msr_info->data = vcpu->arch.st.msr_val;
3735 case MSR_KVM_PV_EOI_EN:
3736 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3739 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3741 case MSR_KVM_POLL_CONTROL:
3742 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3745 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3747 case MSR_IA32_P5_MC_ADDR:
3748 case MSR_IA32_P5_MC_TYPE:
3749 case MSR_IA32_MCG_CAP:
3750 case MSR_IA32_MCG_CTL:
3751 case MSR_IA32_MCG_STATUS:
3752 case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3753 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3754 msr_info->host_initiated);
3756 if (!msr_info->host_initiated &&
3757 !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3759 msr_info->data = vcpu->arch.ia32_xss;
3761 case MSR_K7_CLK_CTL:
3763 * Provide expected ramp-up count for K7. All other
3764 * are set to zero, indicating minimum divisors for
3767 * This prevents guest kernels on AMD host with CPU
3768 * type 6, model 8 and higher from exploding due to
3769 * the rdmsr failing.
3771 msr_info->data = 0x20000000;
3773 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3774 case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3775 case HV_X64_MSR_SYNDBG_OPTIONS:
3776 case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3777 case HV_X64_MSR_CRASH_CTL:
3778 case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3779 case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3780 case HV_X64_MSR_TSC_EMULATION_CONTROL:
3781 case HV_X64_MSR_TSC_EMULATION_STATUS:
3782 return kvm_hv_get_msr_common(vcpu,
3783 msr_info->index, &msr_info->data,
3784 msr_info->host_initiated);
3785 case MSR_IA32_BBL_CR_CTL3:
3786 /* This legacy MSR exists but isn't fully documented in current
3787 * silicon. It is however accessed by winxp in very narrow
3788 * scenarios where it sets bit #19, itself documented as
3789 * a "reserved" bit. Best effort attempt to source coherent
3790 * read data here should the balance of the register be
3791 * interpreted by the guest:
3793 * L2 cache control register 3: 64GB range, 256KB size,
3794 * enabled, latency 0x1, configured
3796 msr_info->data = 0xbe702111;
3798 case MSR_AMD64_OSVW_ID_LENGTH:
3799 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3801 msr_info->data = vcpu->arch.osvw.length;
3803 case MSR_AMD64_OSVW_STATUS:
3804 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3806 msr_info->data = vcpu->arch.osvw.status;
3808 case MSR_PLATFORM_INFO:
3809 if (!msr_info->host_initiated &&
3810 !vcpu->kvm->arch.guest_can_read_msr_platform_info)
3812 msr_info->data = vcpu->arch.msr_platform_info;
3814 case MSR_MISC_FEATURES_ENABLES:
3815 msr_info->data = vcpu->arch.msr_misc_features_enables;
3818 msr_info->data = vcpu->arch.msr_hwcr;
3821 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3822 return kvm_pmu_get_msr(vcpu, msr_info);
3823 return KVM_MSR_RET_INVALID;
3827 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
3830 * Read or write a bunch of msrs. All parameters are kernel addresses.
3832 * @return number of msrs set successfully.
3834 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
3835 struct kvm_msr_entry *entries,
3836 int (*do_msr)(struct kvm_vcpu *vcpu,
3837 unsigned index, u64 *data))
3841 for (i = 0; i < msrs->nmsrs; ++i)
3842 if (do_msr(vcpu, entries[i].index, &entries[i].data))
3849 * Read or write a bunch of msrs. Parameters are user addresses.
3851 * @return number of msrs set successfully.
3853 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
3854 int (*do_msr)(struct kvm_vcpu *vcpu,
3855 unsigned index, u64 *data),
3858 struct kvm_msrs msrs;
3859 struct kvm_msr_entry *entries;
3864 if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
3868 if (msrs.nmsrs >= MAX_IO_MSRS)
3871 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
3872 entries = memdup_user(user_msrs->entries, size);
3873 if (IS_ERR(entries)) {
3874 r = PTR_ERR(entries);
3878 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
3883 if (writeback && copy_to_user(user_msrs->entries, entries, size))
3894 static inline bool kvm_can_mwait_in_guest(void)
3896 return boot_cpu_has(X86_FEATURE_MWAIT) &&
3897 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
3898 boot_cpu_has(X86_FEATURE_ARAT);
3901 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu *vcpu,
3902 struct kvm_cpuid2 __user *cpuid_arg)
3904 struct kvm_cpuid2 cpuid;
3908 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3911 r = kvm_get_hv_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3916 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3922 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
3927 case KVM_CAP_IRQCHIP:
3929 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
3930 case KVM_CAP_SET_TSS_ADDR:
3931 case KVM_CAP_EXT_CPUID:
3932 case KVM_CAP_EXT_EMUL_CPUID:
3933 case KVM_CAP_CLOCKSOURCE:
3935 case KVM_CAP_NOP_IO_DELAY:
3936 case KVM_CAP_MP_STATE:
3937 case KVM_CAP_SYNC_MMU:
3938 case KVM_CAP_USER_NMI:
3939 case KVM_CAP_REINJECT_CONTROL:
3940 case KVM_CAP_IRQ_INJECT_STATUS:
3941 case KVM_CAP_IOEVENTFD:
3942 case KVM_CAP_IOEVENTFD_NO_LENGTH:
3944 case KVM_CAP_PIT_STATE2:
3945 case KVM_CAP_SET_IDENTITY_MAP_ADDR:
3946 case KVM_CAP_VCPU_EVENTS:
3947 case KVM_CAP_HYPERV:
3948 case KVM_CAP_HYPERV_VAPIC:
3949 case KVM_CAP_HYPERV_SPIN:
3950 case KVM_CAP_HYPERV_SYNIC:
3951 case KVM_CAP_HYPERV_SYNIC2:
3952 case KVM_CAP_HYPERV_VP_INDEX:
3953 case KVM_CAP_HYPERV_EVENTFD:
3954 case KVM_CAP_HYPERV_TLBFLUSH:
3955 case KVM_CAP_HYPERV_SEND_IPI:
3956 case KVM_CAP_HYPERV_CPUID:
3957 case KVM_CAP_SYS_HYPERV_CPUID:
3958 case KVM_CAP_PCI_SEGMENT:
3959 case KVM_CAP_DEBUGREGS:
3960 case KVM_CAP_X86_ROBUST_SINGLESTEP:
3962 case KVM_CAP_ASYNC_PF:
3963 case KVM_CAP_ASYNC_PF_INT:
3964 case KVM_CAP_GET_TSC_KHZ:
3965 case KVM_CAP_KVMCLOCK_CTRL:
3966 case KVM_CAP_READONLY_MEM:
3967 case KVM_CAP_HYPERV_TIME:
3968 case KVM_CAP_IOAPIC_POLARITY_IGNORED:
3969 case KVM_CAP_TSC_DEADLINE_TIMER:
3970 case KVM_CAP_DISABLE_QUIRKS:
3971 case KVM_CAP_SET_BOOT_CPU_ID:
3972 case KVM_CAP_SPLIT_IRQCHIP:
3973 case KVM_CAP_IMMEDIATE_EXIT:
3974 case KVM_CAP_PMU_EVENT_FILTER:
3975 case KVM_CAP_GET_MSR_FEATURES:
3976 case KVM_CAP_MSR_PLATFORM_INFO:
3977 case KVM_CAP_EXCEPTION_PAYLOAD:
3978 case KVM_CAP_SET_GUEST_DEBUG:
3979 case KVM_CAP_LAST_CPU:
3980 case KVM_CAP_X86_USER_SPACE_MSR:
3981 case KVM_CAP_X86_MSR_FILTER:
3982 case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
3983 #ifdef CONFIG_X86_SGX_KVM
3984 case KVM_CAP_SGX_ATTRIBUTE:
3986 case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
3989 case KVM_CAP_SET_GUEST_DEBUG2:
3990 return KVM_GUESTDBG_VALID_MASK;
3991 #ifdef CONFIG_KVM_XEN
3992 case KVM_CAP_XEN_HVM:
3993 r = KVM_XEN_HVM_CONFIG_HYPERCALL_MSR |
3994 KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL |
3995 KVM_XEN_HVM_CONFIG_SHARED_INFO;
3996 if (sched_info_on())
3997 r |= KVM_XEN_HVM_CONFIG_RUNSTATE;
4000 case KVM_CAP_SYNC_REGS:
4001 r = KVM_SYNC_X86_VALID_FIELDS;
4003 case KVM_CAP_ADJUST_CLOCK:
4004 r = KVM_CLOCK_TSC_STABLE;
4006 case KVM_CAP_X86_DISABLE_EXITS:
4007 r |= KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
4008 KVM_X86_DISABLE_EXITS_CSTATE;
4009 if(kvm_can_mwait_in_guest())
4010 r |= KVM_X86_DISABLE_EXITS_MWAIT;
4012 case KVM_CAP_X86_SMM:
4013 /* SMBASE is usually relocated above 1M on modern chipsets,
4014 * and SMM handlers might indeed rely on 4G segment limits,
4015 * so do not report SMM to be available if real mode is
4016 * emulated via vm86 mode. Still, do not go to great lengths
4017 * to avoid userspace's usage of the feature, because it is a
4018 * fringe case that is not enabled except via specific settings
4019 * of the module parameters.
4021 r = static_call(kvm_x86_has_emulated_msr)(kvm, MSR_IA32_SMBASE);
4024 r = !static_call(kvm_x86_cpu_has_accelerated_tpr)();
4026 case KVM_CAP_NR_VCPUS:
4027 r = KVM_SOFT_MAX_VCPUS;
4029 case KVM_CAP_MAX_VCPUS:
4032 case KVM_CAP_MAX_VCPU_ID:
4033 r = KVM_MAX_VCPU_ID;
4035 case KVM_CAP_PV_MMU: /* obsolete */
4039 r = KVM_MAX_MCE_BANKS;
4042 r = boot_cpu_has(X86_FEATURE_XSAVE);
4044 case KVM_CAP_TSC_CONTROL:
4045 r = kvm_has_tsc_control;
4047 case KVM_CAP_X2APIC_API:
4048 r = KVM_X2APIC_API_VALID_FLAGS;
4050 case KVM_CAP_NESTED_STATE:
4051 r = kvm_x86_ops.nested_ops->get_state ?
4052 kvm_x86_ops.nested_ops->get_state(NULL, NULL, 0) : 0;
4054 case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4055 r = kvm_x86_ops.enable_direct_tlbflush != NULL;
4057 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4058 r = kvm_x86_ops.nested_ops->enable_evmcs != NULL;
4060 case KVM_CAP_SMALLER_MAXPHYADDR:
4061 r = (int) allow_smaller_maxphyaddr;
4063 case KVM_CAP_STEAL_TIME:
4064 r = sched_info_on();
4066 case KVM_CAP_X86_BUS_LOCK_EXIT:
4067 if (kvm_has_bus_lock_exit)
4068 r = KVM_BUS_LOCK_DETECTION_OFF |
4069 KVM_BUS_LOCK_DETECTION_EXIT;
4080 long kvm_arch_dev_ioctl(struct file *filp,
4081 unsigned int ioctl, unsigned long arg)
4083 void __user *argp = (void __user *)arg;
4087 case KVM_GET_MSR_INDEX_LIST: {
4088 struct kvm_msr_list __user *user_msr_list = argp;
4089 struct kvm_msr_list msr_list;
4093 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4096 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
4097 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4100 if (n < msr_list.nmsrs)
4103 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
4104 num_msrs_to_save * sizeof(u32)))
4106 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
4108 num_emulated_msrs * sizeof(u32)))
4113 case KVM_GET_SUPPORTED_CPUID:
4114 case KVM_GET_EMULATED_CPUID: {
4115 struct kvm_cpuid2 __user *cpuid_arg = argp;
4116 struct kvm_cpuid2 cpuid;
4119 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4122 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
4128 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4133 case KVM_X86_GET_MCE_CAP_SUPPORTED:
4135 if (copy_to_user(argp, &kvm_mce_cap_supported,
4136 sizeof(kvm_mce_cap_supported)))
4140 case KVM_GET_MSR_FEATURE_INDEX_LIST: {
4141 struct kvm_msr_list __user *user_msr_list = argp;
4142 struct kvm_msr_list msr_list;
4146 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4149 msr_list.nmsrs = num_msr_based_features;
4150 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4153 if (n < msr_list.nmsrs)
4156 if (copy_to_user(user_msr_list->indices, &msr_based_features,
4157 num_msr_based_features * sizeof(u32)))
4163 r = msr_io(NULL, argp, do_get_msr_feature, 1);
4165 case KVM_GET_SUPPORTED_HV_CPUID:
4166 r = kvm_ioctl_get_supported_hv_cpuid(NULL, argp);
4176 static void wbinvd_ipi(void *garbage)
4181 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
4183 return kvm_arch_has_noncoherent_dma(vcpu->kvm);
4186 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
4188 /* Address WBINVD may be executed by guest */
4189 if (need_emulate_wbinvd(vcpu)) {
4190 if (static_call(kvm_x86_has_wbinvd_exit)())
4191 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4192 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
4193 smp_call_function_single(vcpu->cpu,
4194 wbinvd_ipi, NULL, 1);
4197 static_call(kvm_x86_vcpu_load)(vcpu, cpu);
4199 /* Save host pkru register if supported */
4200 vcpu->arch.host_pkru = read_pkru();
4202 /* Apply any externally detected TSC adjustments (due to suspend) */
4203 if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
4204 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
4205 vcpu->arch.tsc_offset_adjustment = 0;
4206 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4209 if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
4210 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
4211 rdtsc() - vcpu->arch.last_host_tsc;
4213 mark_tsc_unstable("KVM discovered backwards TSC");
4215 if (kvm_check_tsc_unstable()) {
4216 u64 offset = kvm_compute_l1_tsc_offset(vcpu,
4217 vcpu->arch.last_guest_tsc);
4218 kvm_vcpu_write_tsc_offset(vcpu, offset);
4219 vcpu->arch.tsc_catchup = 1;
4222 if (kvm_lapic_hv_timer_in_use(vcpu))
4223 kvm_lapic_restart_hv_timer(vcpu);
4226 * On a host with synchronized TSC, there is no need to update
4227 * kvmclock on vcpu->cpu migration
4229 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
4230 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
4231 if (vcpu->cpu != cpu)
4232 kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
4236 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
4239 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
4241 struct kvm_host_map map;
4242 struct kvm_steal_time *st;
4244 if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
4247 if (vcpu->arch.st.preempted)
4250 if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT, &map,
4251 &vcpu->arch.st.cache, true))
4255 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
4257 st->preempted = vcpu->arch.st.preempted = KVM_VCPU_PREEMPTED;
4259 kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, true);
4262 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
4266 if (vcpu->preempted && !vcpu->arch.guest_state_protected)
4267 vcpu->arch.preempted_in_kernel = !static_call(kvm_x86_get_cpl)(vcpu);
4270 * Take the srcu lock as memslots will be accessed to check the gfn
4271 * cache generation against the memslots generation.
4273 idx = srcu_read_lock(&vcpu->kvm->srcu);
4274 if (kvm_xen_msr_enabled(vcpu->kvm))
4275 kvm_xen_runstate_set_preempted(vcpu);
4277 kvm_steal_time_set_preempted(vcpu);
4278 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4280 static_call(kvm_x86_vcpu_put)(vcpu);
4281 vcpu->arch.last_host_tsc = rdtsc();
4283 * If userspace has set any breakpoints or watchpoints, dr6 is restored
4284 * on every vmexit, but if not, we might have a stale dr6 from the
4285 * guest. do_debug expects dr6 to be cleared after it runs, do the same.
4290 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
4291 struct kvm_lapic_state *s)
4293 if (vcpu->arch.apicv_active)
4294 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
4296 return kvm_apic_get_state(vcpu, s);
4299 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
4300 struct kvm_lapic_state *s)
4304 r = kvm_apic_set_state(vcpu, s);
4307 update_cr8_intercept(vcpu);
4312 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
4315 * We can accept userspace's request for interrupt injection
4316 * as long as we have a place to store the interrupt number.
4317 * The actual injection will happen when the CPU is able to
4318 * deliver the interrupt.
4320 if (kvm_cpu_has_extint(vcpu))
4323 /* Acknowledging ExtINT does not happen if LINT0 is masked. */
4324 return (!lapic_in_kernel(vcpu) ||
4325 kvm_apic_accept_pic_intr(vcpu));
4328 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
4330 return kvm_arch_interrupt_allowed(vcpu) &&
4331 kvm_cpu_accept_dm_intr(vcpu);
4334 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
4335 struct kvm_interrupt *irq)
4337 if (irq->irq >= KVM_NR_INTERRUPTS)
4340 if (!irqchip_in_kernel(vcpu->kvm)) {
4341 kvm_queue_interrupt(vcpu, irq->irq, false);
4342 kvm_make_request(KVM_REQ_EVENT, vcpu);
4347 * With in-kernel LAPIC, we only use this to inject EXTINT, so
4348 * fail for in-kernel 8259.
4350 if (pic_in_kernel(vcpu->kvm))
4353 if (vcpu->arch.pending_external_vector != -1)
4356 vcpu->arch.pending_external_vector = irq->irq;
4357 kvm_make_request(KVM_REQ_EVENT, vcpu);
4361 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
4363 kvm_inject_nmi(vcpu);
4368 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
4370 kvm_make_request(KVM_REQ_SMI, vcpu);
4375 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
4376 struct kvm_tpr_access_ctl *tac)
4380 vcpu->arch.tpr_access_reporting = !!tac->enabled;
4384 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
4388 unsigned bank_num = mcg_cap & 0xff, bank;
4391 if (!bank_num || bank_num > KVM_MAX_MCE_BANKS)
4393 if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
4396 vcpu->arch.mcg_cap = mcg_cap;
4397 /* Init IA32_MCG_CTL to all 1s */
4398 if (mcg_cap & MCG_CTL_P)
4399 vcpu->arch.mcg_ctl = ~(u64)0;
4400 /* Init IA32_MCi_CTL to all 1s */
4401 for (bank = 0; bank < bank_num; bank++)
4402 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
4404 static_call(kvm_x86_setup_mce)(vcpu);
4409 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
4410 struct kvm_x86_mce *mce)
4412 u64 mcg_cap = vcpu->arch.mcg_cap;
4413 unsigned bank_num = mcg_cap & 0xff;
4414 u64 *banks = vcpu->arch.mce_banks;
4416 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
4419 * if IA32_MCG_CTL is not all 1s, the uncorrected error
4420 * reporting is disabled
4422 if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
4423 vcpu->arch.mcg_ctl != ~(u64)0)
4425 banks += 4 * mce->bank;
4427 * if IA32_MCi_CTL is not all 1s, the uncorrected error
4428 * reporting is disabled for the bank
4430 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
4432 if (mce->status & MCI_STATUS_UC) {
4433 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
4434 !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
4435 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
4438 if (banks[1] & MCI_STATUS_VAL)
4439 mce->status |= MCI_STATUS_OVER;
4440 banks[2] = mce->addr;
4441 banks[3] = mce->misc;
4442 vcpu->arch.mcg_status = mce->mcg_status;
4443 banks[1] = mce->status;
4444 kvm_queue_exception(vcpu, MC_VECTOR);
4445 } else if (!(banks[1] & MCI_STATUS_VAL)
4446 || !(banks[1] & MCI_STATUS_UC)) {
4447 if (banks[1] & MCI_STATUS_VAL)
4448 mce->status |= MCI_STATUS_OVER;
4449 banks[2] = mce->addr;
4450 banks[3] = mce->misc;
4451 banks[1] = mce->status;
4453 banks[1] |= MCI_STATUS_OVER;
4457 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
4458 struct kvm_vcpu_events *events)
4462 if (kvm_check_request(KVM_REQ_SMI, vcpu))
4466 * In guest mode, payload delivery should be deferred,
4467 * so that the L1 hypervisor can intercept #PF before
4468 * CR2 is modified (or intercept #DB before DR6 is
4469 * modified under nVMX). Unless the per-VM capability,
4470 * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4471 * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4472 * opportunistically defer the exception payload, deliver it if the
4473 * capability hasn't been requested before processing a
4474 * KVM_GET_VCPU_EVENTS.
4476 if (!vcpu->kvm->arch.exception_payload_enabled &&
4477 vcpu->arch.exception.pending && vcpu->arch.exception.has_payload)
4478 kvm_deliver_exception_payload(vcpu);
4481 * The API doesn't provide the instruction length for software
4482 * exceptions, so don't report them. As long as the guest RIP
4483 * isn't advanced, we should expect to encounter the exception
4486 if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
4487 events->exception.injected = 0;
4488 events->exception.pending = 0;
4490 events->exception.injected = vcpu->arch.exception.injected;
4491 events->exception.pending = vcpu->arch.exception.pending;
4493 * For ABI compatibility, deliberately conflate
4494 * pending and injected exceptions when
4495 * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4497 if (!vcpu->kvm->arch.exception_payload_enabled)
4498 events->exception.injected |=
4499 vcpu->arch.exception.pending;
4501 events->exception.nr = vcpu->arch.exception.nr;
4502 events->exception.has_error_code = vcpu->arch.exception.has_error_code;
4503 events->exception.error_code = vcpu->arch.exception.error_code;
4504 events->exception_has_payload = vcpu->arch.exception.has_payload;
4505 events->exception_payload = vcpu->arch.exception.payload;
4507 events->interrupt.injected =
4508 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
4509 events->interrupt.nr = vcpu->arch.interrupt.nr;
4510 events->interrupt.soft = 0;
4511 events->interrupt.shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
4513 events->nmi.injected = vcpu->arch.nmi_injected;
4514 events->nmi.pending = vcpu->arch.nmi_pending != 0;
4515 events->nmi.masked = static_call(kvm_x86_get_nmi_mask)(vcpu);
4516 events->nmi.pad = 0;
4518 events->sipi_vector = 0; /* never valid when reporting to user space */
4520 events->smi.smm = is_smm(vcpu);
4521 events->smi.pending = vcpu->arch.smi_pending;
4522 events->smi.smm_inside_nmi =
4523 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
4524 events->smi.latched_init = kvm_lapic_latched_init(vcpu);
4526 events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
4527 | KVM_VCPUEVENT_VALID_SHADOW
4528 | KVM_VCPUEVENT_VALID_SMM);
4529 if (vcpu->kvm->arch.exception_payload_enabled)
4530 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
4532 memset(&events->reserved, 0, sizeof(events->reserved));
4535 static void kvm_smm_changed(struct kvm_vcpu *vcpu);
4537 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
4538 struct kvm_vcpu_events *events)
4540 if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4541 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4542 | KVM_VCPUEVENT_VALID_SHADOW
4543 | KVM_VCPUEVENT_VALID_SMM
4544 | KVM_VCPUEVENT_VALID_PAYLOAD))
4547 if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
4548 if (!vcpu->kvm->arch.exception_payload_enabled)
4550 if (events->exception.pending)
4551 events->exception.injected = 0;
4553 events->exception_has_payload = 0;
4555 events->exception.pending = 0;
4556 events->exception_has_payload = 0;
4559 if ((events->exception.injected || events->exception.pending) &&
4560 (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
4563 /* INITs are latched while in SMM */
4564 if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
4565 (events->smi.smm || events->smi.pending) &&
4566 vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
4570 vcpu->arch.exception.injected = events->exception.injected;
4571 vcpu->arch.exception.pending = events->exception.pending;
4572 vcpu->arch.exception.nr = events->exception.nr;
4573 vcpu->arch.exception.has_error_code = events->exception.has_error_code;
4574 vcpu->arch.exception.error_code = events->exception.error_code;
4575 vcpu->arch.exception.has_payload = events->exception_has_payload;
4576 vcpu->arch.exception.payload = events->exception_payload;
4578 vcpu->arch.interrupt.injected = events->interrupt.injected;
4579 vcpu->arch.interrupt.nr = events->interrupt.nr;
4580 vcpu->arch.interrupt.soft = events->interrupt.soft;
4581 if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
4582 static_call(kvm_x86_set_interrupt_shadow)(vcpu,
4583 events->interrupt.shadow);
4585 vcpu->arch.nmi_injected = events->nmi.injected;
4586 if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
4587 vcpu->arch.nmi_pending = events->nmi.pending;
4588 static_call(kvm_x86_set_nmi_mask)(vcpu, events->nmi.masked);
4590 if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
4591 lapic_in_kernel(vcpu))
4592 vcpu->arch.apic->sipi_vector = events->sipi_vector;
4594 if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
4595 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
4596 if (events->smi.smm)
4597 vcpu->arch.hflags |= HF_SMM_MASK;
4599 vcpu->arch.hflags &= ~HF_SMM_MASK;
4600 kvm_smm_changed(vcpu);
4603 vcpu->arch.smi_pending = events->smi.pending;
4605 if (events->smi.smm) {
4606 if (events->smi.smm_inside_nmi)
4607 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
4609 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
4612 if (lapic_in_kernel(vcpu)) {
4613 if (events->smi.latched_init)
4614 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4616 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4620 kvm_make_request(KVM_REQ_EVENT, vcpu);
4625 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
4626 struct kvm_debugregs *dbgregs)
4630 memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
4631 kvm_get_dr(vcpu, 6, &val);
4633 dbgregs->dr7 = vcpu->arch.dr7;
4635 memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
4638 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
4639 struct kvm_debugregs *dbgregs)
4644 if (!kvm_dr6_valid(dbgregs->dr6))
4646 if (!kvm_dr7_valid(dbgregs->dr7))
4649 memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
4650 kvm_update_dr0123(vcpu);
4651 vcpu->arch.dr6 = dbgregs->dr6;
4652 vcpu->arch.dr7 = dbgregs->dr7;
4653 kvm_update_dr7(vcpu);
4658 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
4660 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
4662 struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4663 u64 xstate_bv = xsave->header.xfeatures;
4667 * Copy legacy XSAVE area, to avoid complications with CPUID
4668 * leaves 0 and 1 in the loop below.
4670 memcpy(dest, xsave, XSAVE_HDR_OFFSET);
4673 xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
4674 *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
4677 * Copy each region from the possibly compacted offset to the
4678 * non-compacted offset.
4680 valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4682 u64 xfeature_mask = valid & -valid;
4683 int xfeature_nr = fls64(xfeature_mask) - 1;
4684 void *src = get_xsave_addr(xsave, xfeature_nr);
4687 u32 size, offset, ecx, edx;
4688 cpuid_count(XSTATE_CPUID, xfeature_nr,
4689 &size, &offset, &ecx, &edx);
4690 if (xfeature_nr == XFEATURE_PKRU)
4691 memcpy(dest + offset, &vcpu->arch.pkru,
4692 sizeof(vcpu->arch.pkru));
4694 memcpy(dest + offset, src, size);
4698 valid -= xfeature_mask;
4702 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
4704 struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4705 u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
4709 * Copy legacy XSAVE area, to avoid complications with CPUID
4710 * leaves 0 and 1 in the loop below.
4712 memcpy(xsave, src, XSAVE_HDR_OFFSET);
4714 /* Set XSTATE_BV and possibly XCOMP_BV. */
4715 xsave->header.xfeatures = xstate_bv;
4716 if (boot_cpu_has(X86_FEATURE_XSAVES))
4717 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
4720 * Copy each region from the non-compacted offset to the
4721 * possibly compacted offset.
4723 valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4725 u64 xfeature_mask = valid & -valid;
4726 int xfeature_nr = fls64(xfeature_mask) - 1;
4727 void *dest = get_xsave_addr(xsave, xfeature_nr);
4730 u32 size, offset, ecx, edx;
4731 cpuid_count(XSTATE_CPUID, xfeature_nr,
4732 &size, &offset, &ecx, &edx);
4733 if (xfeature_nr == XFEATURE_PKRU)
4734 memcpy(&vcpu->arch.pkru, src + offset,
4735 sizeof(vcpu->arch.pkru));
4737 memcpy(dest, src + offset, size);
4740 valid -= xfeature_mask;
4744 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
4745 struct kvm_xsave *guest_xsave)
4747 if (!vcpu->arch.guest_fpu)
4750 if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4751 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
4752 fill_xsave((u8 *) guest_xsave->region, vcpu);
4754 memcpy(guest_xsave->region,
4755 &vcpu->arch.guest_fpu->state.fxsave,
4756 sizeof(struct fxregs_state));
4757 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
4758 XFEATURE_MASK_FPSSE;
4762 #define XSAVE_MXCSR_OFFSET 24
4764 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
4765 struct kvm_xsave *guest_xsave)
4770 if (!vcpu->arch.guest_fpu)
4773 xstate_bv = *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
4774 mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
4776 if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4778 * Here we allow setting states that are not present in
4779 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
4780 * with old userspace.
4782 if (xstate_bv & ~supported_xcr0 || mxcsr & ~mxcsr_feature_mask)
4784 load_xsave(vcpu, (u8 *)guest_xsave->region);
4786 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
4787 mxcsr & ~mxcsr_feature_mask)
4789 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
4790 guest_xsave->region, sizeof(struct fxregs_state));
4795 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
4796 struct kvm_xcrs *guest_xcrs)
4798 if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
4799 guest_xcrs->nr_xcrs = 0;
4803 guest_xcrs->nr_xcrs = 1;
4804 guest_xcrs->flags = 0;
4805 guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
4806 guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
4809 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
4810 struct kvm_xcrs *guest_xcrs)
4814 if (!boot_cpu_has(X86_FEATURE_XSAVE))
4817 if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
4820 for (i = 0; i < guest_xcrs->nr_xcrs; i++)
4821 /* Only support XCR0 currently */
4822 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
4823 r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
4824 guest_xcrs->xcrs[i].value);
4833 * kvm_set_guest_paused() indicates to the guest kernel that it has been
4834 * stopped by the hypervisor. This function will be called from the host only.
4835 * EINVAL is returned when the host attempts to set the flag for a guest that
4836 * does not support pv clocks.
4838 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
4840 if (!vcpu->arch.pv_time_enabled)
4842 vcpu->arch.pvclock_set_guest_stopped_request = true;
4843 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4847 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
4848 struct kvm_enable_cap *cap)
4851 uint16_t vmcs_version;
4852 void __user *user_ptr;
4858 case KVM_CAP_HYPERV_SYNIC2:
4863 case KVM_CAP_HYPERV_SYNIC:
4864 if (!irqchip_in_kernel(vcpu->kvm))
4866 return kvm_hv_activate_synic(vcpu, cap->cap ==
4867 KVM_CAP_HYPERV_SYNIC2);
4868 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4869 if (!kvm_x86_ops.nested_ops->enable_evmcs)
4871 r = kvm_x86_ops.nested_ops->enable_evmcs(vcpu, &vmcs_version);
4873 user_ptr = (void __user *)(uintptr_t)cap->args[0];
4874 if (copy_to_user(user_ptr, &vmcs_version,
4875 sizeof(vmcs_version)))
4879 case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4880 if (!kvm_x86_ops.enable_direct_tlbflush)
4883 return static_call(kvm_x86_enable_direct_tlbflush)(vcpu);
4885 case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4886 vcpu->arch.pv_cpuid.enforce = cap->args[0];
4887 if (vcpu->arch.pv_cpuid.enforce)
4888 kvm_update_pv_runtime(vcpu);
4896 long kvm_arch_vcpu_ioctl(struct file *filp,
4897 unsigned int ioctl, unsigned long arg)
4899 struct kvm_vcpu *vcpu = filp->private_data;
4900 void __user *argp = (void __user *)arg;
4903 struct kvm_lapic_state *lapic;
4904 struct kvm_xsave *xsave;
4905 struct kvm_xcrs *xcrs;
4913 case KVM_GET_LAPIC: {
4915 if (!lapic_in_kernel(vcpu))
4917 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
4918 GFP_KERNEL_ACCOUNT);
4923 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
4927 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
4932 case KVM_SET_LAPIC: {
4934 if (!lapic_in_kernel(vcpu))
4936 u.lapic = memdup_user(argp, sizeof(*u.lapic));
4937 if (IS_ERR(u.lapic)) {
4938 r = PTR_ERR(u.lapic);
4942 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
4945 case KVM_INTERRUPT: {
4946 struct kvm_interrupt irq;
4949 if (copy_from_user(&irq, argp, sizeof(irq)))
4951 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
4955 r = kvm_vcpu_ioctl_nmi(vcpu);
4959 r = kvm_vcpu_ioctl_smi(vcpu);
4962 case KVM_SET_CPUID: {
4963 struct kvm_cpuid __user *cpuid_arg = argp;
4964 struct kvm_cpuid cpuid;
4967 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4969 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4972 case KVM_SET_CPUID2: {
4973 struct kvm_cpuid2 __user *cpuid_arg = argp;
4974 struct kvm_cpuid2 cpuid;
4977 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4979 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
4980 cpuid_arg->entries);
4983 case KVM_GET_CPUID2: {
4984 struct kvm_cpuid2 __user *cpuid_arg = argp;
4985 struct kvm_cpuid2 cpuid;
4988 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4990 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
4991 cpuid_arg->entries);
4995 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
5000 case KVM_GET_MSRS: {
5001 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5002 r = msr_io(vcpu, argp, do_get_msr, 1);
5003 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5006 case KVM_SET_MSRS: {
5007 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5008 r = msr_io(vcpu, argp, do_set_msr, 0);
5009 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5012 case KVM_TPR_ACCESS_REPORTING: {
5013 struct kvm_tpr_access_ctl tac;
5016 if (copy_from_user(&tac, argp, sizeof(tac)))
5018 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
5022 if (copy_to_user(argp, &tac, sizeof(tac)))
5027 case KVM_SET_VAPIC_ADDR: {
5028 struct kvm_vapic_addr va;
5032 if (!lapic_in_kernel(vcpu))
5035 if (copy_from_user(&va, argp, sizeof(va)))
5037 idx = srcu_read_lock(&vcpu->kvm->srcu);
5038 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
5039 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5042 case KVM_X86_SETUP_MCE: {
5046 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
5048 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
5051 case KVM_X86_SET_MCE: {
5052 struct kvm_x86_mce mce;
5055 if (copy_from_user(&mce, argp, sizeof(mce)))
5057 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
5060 case KVM_GET_VCPU_EVENTS: {
5061 struct kvm_vcpu_events events;
5063 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
5066 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
5071 case KVM_SET_VCPU_EVENTS: {
5072 struct kvm_vcpu_events events;
5075 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
5078 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
5081 case KVM_GET_DEBUGREGS: {
5082 struct kvm_debugregs dbgregs;
5084 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
5087 if (copy_to_user(argp, &dbgregs,
5088 sizeof(struct kvm_debugregs)))
5093 case KVM_SET_DEBUGREGS: {
5094 struct kvm_debugregs dbgregs;
5097 if (copy_from_user(&dbgregs, argp,
5098 sizeof(struct kvm_debugregs)))
5101 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
5104 case KVM_GET_XSAVE: {
5105 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
5110 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
5113 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
5118 case KVM_SET_XSAVE: {
5119 u.xsave = memdup_user(argp, sizeof(*u.xsave));
5120 if (IS_ERR(u.xsave)) {
5121 r = PTR_ERR(u.xsave);
5125 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
5128 case KVM_GET_XCRS: {
5129 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
5134 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
5137 if (copy_to_user(argp, u.xcrs,
5138 sizeof(struct kvm_xcrs)))
5143 case KVM_SET_XCRS: {
5144 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
5145 if (IS_ERR(u.xcrs)) {
5146 r = PTR_ERR(u.xcrs);
5150 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
5153 case KVM_SET_TSC_KHZ: {
5157 user_tsc_khz = (u32)arg;
5159 if (kvm_has_tsc_control &&
5160 user_tsc_khz >= kvm_max_guest_tsc_khz)
5163 if (user_tsc_khz == 0)
5164 user_tsc_khz = tsc_khz;
5166 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
5171 case KVM_GET_TSC_KHZ: {
5172 r = vcpu->arch.virtual_tsc_khz;
5175 case KVM_KVMCLOCK_CTRL: {
5176 r = kvm_set_guest_paused(vcpu);
5179 case KVM_ENABLE_CAP: {
5180 struct kvm_enable_cap cap;
5183 if (copy_from_user(&cap, argp, sizeof(cap)))
5185 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
5188 case KVM_GET_NESTED_STATE: {
5189 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5193 if (!kvm_x86_ops.nested_ops->get_state)
5196 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
5198 if (get_user(user_data_size, &user_kvm_nested_state->size))
5201 r = kvm_x86_ops.nested_ops->get_state(vcpu, user_kvm_nested_state,
5206 if (r > user_data_size) {
5207 if (put_user(r, &user_kvm_nested_state->size))
5217 case KVM_SET_NESTED_STATE: {
5218 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5219 struct kvm_nested_state kvm_state;
5223 if (!kvm_x86_ops.nested_ops->set_state)
5227 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
5231 if (kvm_state.size < sizeof(kvm_state))
5234 if (kvm_state.flags &
5235 ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
5236 | KVM_STATE_NESTED_EVMCS | KVM_STATE_NESTED_MTF_PENDING
5237 | KVM_STATE_NESTED_GIF_SET))
5240 /* nested_run_pending implies guest_mode. */
5241 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
5242 && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
5245 idx = srcu_read_lock(&vcpu->kvm->srcu);
5246 r = kvm_x86_ops.nested_ops->set_state(vcpu, user_kvm_nested_state, &kvm_state);
5247 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5250 case KVM_GET_SUPPORTED_HV_CPUID:
5251 r = kvm_ioctl_get_supported_hv_cpuid(vcpu, argp);
5253 #ifdef CONFIG_KVM_XEN
5254 case KVM_XEN_VCPU_GET_ATTR: {
5255 struct kvm_xen_vcpu_attr xva;
5258 if (copy_from_user(&xva, argp, sizeof(xva)))
5260 r = kvm_xen_vcpu_get_attr(vcpu, &xva);
5261 if (!r && copy_to_user(argp, &xva, sizeof(xva)))
5265 case KVM_XEN_VCPU_SET_ATTR: {
5266 struct kvm_xen_vcpu_attr xva;
5269 if (copy_from_user(&xva, argp, sizeof(xva)))
5271 r = kvm_xen_vcpu_set_attr(vcpu, &xva);
5285 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
5287 return VM_FAULT_SIGBUS;
5290 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
5294 if (addr > (unsigned int)(-3 * PAGE_SIZE))
5296 ret = static_call(kvm_x86_set_tss_addr)(kvm, addr);
5300 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
5303 return static_call(kvm_x86_set_identity_map_addr)(kvm, ident_addr);
5306 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
5307 unsigned long kvm_nr_mmu_pages)
5309 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
5312 mutex_lock(&kvm->slots_lock);
5314 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
5315 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
5317 mutex_unlock(&kvm->slots_lock);
5321 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
5323 return kvm->arch.n_max_mmu_pages;
5326 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5328 struct kvm_pic *pic = kvm->arch.vpic;
5332 switch (chip->chip_id) {
5333 case KVM_IRQCHIP_PIC_MASTER:
5334 memcpy(&chip->chip.pic, &pic->pics[0],
5335 sizeof(struct kvm_pic_state));
5337 case KVM_IRQCHIP_PIC_SLAVE:
5338 memcpy(&chip->chip.pic, &pic->pics[1],
5339 sizeof(struct kvm_pic_state));
5341 case KVM_IRQCHIP_IOAPIC:
5342 kvm_get_ioapic(kvm, &chip->chip.ioapic);
5351 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5353 struct kvm_pic *pic = kvm->arch.vpic;
5357 switch (chip->chip_id) {
5358 case KVM_IRQCHIP_PIC_MASTER:
5359 spin_lock(&pic->lock);
5360 memcpy(&pic->pics[0], &chip->chip.pic,
5361 sizeof(struct kvm_pic_state));
5362 spin_unlock(&pic->lock);
5364 case KVM_IRQCHIP_PIC_SLAVE:
5365 spin_lock(&pic->lock);
5366 memcpy(&pic->pics[1], &chip->chip.pic,
5367 sizeof(struct kvm_pic_state));
5368 spin_unlock(&pic->lock);
5370 case KVM_IRQCHIP_IOAPIC:
5371 kvm_set_ioapic(kvm, &chip->chip.ioapic);
5377 kvm_pic_update_irq(pic);
5381 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5383 struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
5385 BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
5387 mutex_lock(&kps->lock);
5388 memcpy(ps, &kps->channels, sizeof(*ps));
5389 mutex_unlock(&kps->lock);
5393 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5396 struct kvm_pit *pit = kvm->arch.vpit;
5398 mutex_lock(&pit->pit_state.lock);
5399 memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
5400 for (i = 0; i < 3; i++)
5401 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
5402 mutex_unlock(&pit->pit_state.lock);
5406 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5408 mutex_lock(&kvm->arch.vpit->pit_state.lock);
5409 memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
5410 sizeof(ps->channels));
5411 ps->flags = kvm->arch.vpit->pit_state.flags;
5412 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
5413 memset(&ps->reserved, 0, sizeof(ps->reserved));
5417 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5421 u32 prev_legacy, cur_legacy;
5422 struct kvm_pit *pit = kvm->arch.vpit;
5424 mutex_lock(&pit->pit_state.lock);
5425 prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
5426 cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
5427 if (!prev_legacy && cur_legacy)
5429 memcpy(&pit->pit_state.channels, &ps->channels,
5430 sizeof(pit->pit_state.channels));
5431 pit->pit_state.flags = ps->flags;
5432 for (i = 0; i < 3; i++)
5433 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
5435 mutex_unlock(&pit->pit_state.lock);
5439 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
5440 struct kvm_reinject_control *control)
5442 struct kvm_pit *pit = kvm->arch.vpit;
5444 /* pit->pit_state.lock was overloaded to prevent userspace from getting
5445 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5446 * ioctls in parallel. Use a separate lock if that ioctl isn't rare.
5448 mutex_lock(&pit->pit_state.lock);
5449 kvm_pit_set_reinject(pit, control->pit_reinject);
5450 mutex_unlock(&pit->pit_state.lock);
5455 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
5459 * Flush all CPUs' dirty log buffers to the dirty_bitmap. Called
5460 * before reporting dirty_bitmap to userspace. KVM flushes the buffers
5461 * on all VM-Exits, thus we only need to kick running vCPUs to force a
5464 struct kvm_vcpu *vcpu;
5467 kvm_for_each_vcpu(i, vcpu, kvm)
5468 kvm_vcpu_kick(vcpu);
5471 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
5474 if (!irqchip_in_kernel(kvm))
5477 irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
5478 irq_event->irq, irq_event->level,
5483 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
5484 struct kvm_enable_cap *cap)
5492 case KVM_CAP_DISABLE_QUIRKS:
5493 kvm->arch.disabled_quirks = cap->args[0];
5496 case KVM_CAP_SPLIT_IRQCHIP: {
5497 mutex_lock(&kvm->lock);
5499 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
5500 goto split_irqchip_unlock;
5502 if (irqchip_in_kernel(kvm))
5503 goto split_irqchip_unlock;
5504 if (kvm->created_vcpus)
5505 goto split_irqchip_unlock;
5506 r = kvm_setup_empty_irq_routing(kvm);
5508 goto split_irqchip_unlock;
5509 /* Pairs with irqchip_in_kernel. */
5511 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
5512 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
5514 split_irqchip_unlock:
5515 mutex_unlock(&kvm->lock);
5518 case KVM_CAP_X2APIC_API:
5520 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
5523 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
5524 kvm->arch.x2apic_format = true;
5525 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
5526 kvm->arch.x2apic_broadcast_quirk_disabled = true;
5530 case KVM_CAP_X86_DISABLE_EXITS:
5532 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
5535 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
5536 kvm_can_mwait_in_guest())
5537 kvm->arch.mwait_in_guest = true;
5538 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
5539 kvm->arch.hlt_in_guest = true;
5540 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
5541 kvm->arch.pause_in_guest = true;
5542 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
5543 kvm->arch.cstate_in_guest = true;
5546 case KVM_CAP_MSR_PLATFORM_INFO:
5547 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
5550 case KVM_CAP_EXCEPTION_PAYLOAD:
5551 kvm->arch.exception_payload_enabled = cap->args[0];
5554 case KVM_CAP_X86_USER_SPACE_MSR:
5555 kvm->arch.user_space_msr_mask = cap->args[0];
5558 case KVM_CAP_X86_BUS_LOCK_EXIT:
5560 if (cap->args[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE)
5563 if ((cap->args[0] & KVM_BUS_LOCK_DETECTION_OFF) &&
5564 (cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT))
5567 if (kvm_has_bus_lock_exit &&
5568 cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT)
5569 kvm->arch.bus_lock_detection_enabled = true;
5572 #ifdef CONFIG_X86_SGX_KVM
5573 case KVM_CAP_SGX_ATTRIBUTE: {
5574 unsigned long allowed_attributes = 0;
5576 r = sgx_set_attribute(&allowed_attributes, cap->args[0]);
5580 /* KVM only supports the PROVISIONKEY privileged attribute. */
5581 if ((allowed_attributes & SGX_ATTR_PROVISIONKEY) &&
5582 !(allowed_attributes & ~SGX_ATTR_PROVISIONKEY))
5583 kvm->arch.sgx_provisioning_allowed = true;
5589 case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
5591 if (kvm_x86_ops.vm_copy_enc_context_from)
5592 r = kvm_x86_ops.vm_copy_enc_context_from(kvm, cap->args[0]);
5601 static struct kvm_x86_msr_filter *kvm_alloc_msr_filter(bool default_allow)
5603 struct kvm_x86_msr_filter *msr_filter;
5605 msr_filter = kzalloc(sizeof(*msr_filter), GFP_KERNEL_ACCOUNT);
5609 msr_filter->default_allow = default_allow;
5613 static void kvm_free_msr_filter(struct kvm_x86_msr_filter *msr_filter)
5620 for (i = 0; i < msr_filter->count; i++)
5621 kfree(msr_filter->ranges[i].bitmap);
5626 static int kvm_add_msr_filter(struct kvm_x86_msr_filter *msr_filter,
5627 struct kvm_msr_filter_range *user_range)
5629 unsigned long *bitmap = NULL;
5632 if (!user_range->nmsrs)
5635 if (user_range->flags & ~(KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE))
5638 if (!user_range->flags)
5641 bitmap_size = BITS_TO_LONGS(user_range->nmsrs) * sizeof(long);
5642 if (!bitmap_size || bitmap_size > KVM_MSR_FILTER_MAX_BITMAP_SIZE)
5645 bitmap = memdup_user((__user u8*)user_range->bitmap, bitmap_size);
5647 return PTR_ERR(bitmap);
5649 msr_filter->ranges[msr_filter->count] = (struct msr_bitmap_range) {
5650 .flags = user_range->flags,
5651 .base = user_range->base,
5652 .nmsrs = user_range->nmsrs,
5656 msr_filter->count++;
5660 static int kvm_vm_ioctl_set_msr_filter(struct kvm *kvm, void __user *argp)
5662 struct kvm_msr_filter __user *user_msr_filter = argp;
5663 struct kvm_x86_msr_filter *new_filter, *old_filter;
5664 struct kvm_msr_filter filter;
5670 if (copy_from_user(&filter, user_msr_filter, sizeof(filter)))
5673 for (i = 0; i < ARRAY_SIZE(filter.ranges); i++)
5674 empty &= !filter.ranges[i].nmsrs;
5676 default_allow = !(filter.flags & KVM_MSR_FILTER_DEFAULT_DENY);
5677 if (empty && !default_allow)
5680 new_filter = kvm_alloc_msr_filter(default_allow);
5684 for (i = 0; i < ARRAY_SIZE(filter.ranges); i++) {
5685 r = kvm_add_msr_filter(new_filter, &filter.ranges[i]);
5687 kvm_free_msr_filter(new_filter);
5692 mutex_lock(&kvm->lock);
5694 /* The per-VM filter is protected by kvm->lock... */
5695 old_filter = srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1);
5697 rcu_assign_pointer(kvm->arch.msr_filter, new_filter);
5698 synchronize_srcu(&kvm->srcu);
5700 kvm_free_msr_filter(old_filter);
5702 kvm_make_all_cpus_request(kvm, KVM_REQ_MSR_FILTER_CHANGED);
5703 mutex_unlock(&kvm->lock);
5708 #ifdef CONFIG_HAVE_KVM_PM_NOTIFIER
5709 static int kvm_arch_suspend_notifier(struct kvm *kvm)
5711 struct kvm_vcpu *vcpu;
5714 mutex_lock(&kvm->lock);
5715 kvm_for_each_vcpu(i, vcpu, kvm) {
5716 if (!vcpu->arch.pv_time_enabled)
5719 ret = kvm_set_guest_paused(vcpu);
5721 kvm_err("Failed to pause guest VCPU%d: %d\n",
5722 vcpu->vcpu_id, ret);
5726 mutex_unlock(&kvm->lock);
5728 return ret ? NOTIFY_BAD : NOTIFY_DONE;
5731 int kvm_arch_pm_notifier(struct kvm *kvm, unsigned long state)
5734 case PM_HIBERNATION_PREPARE:
5735 case PM_SUSPEND_PREPARE:
5736 return kvm_arch_suspend_notifier(kvm);
5741 #endif /* CONFIG_HAVE_KVM_PM_NOTIFIER */
5743 long kvm_arch_vm_ioctl(struct file *filp,
5744 unsigned int ioctl, unsigned long arg)
5746 struct kvm *kvm = filp->private_data;
5747 void __user *argp = (void __user *)arg;
5750 * This union makes it completely explicit to gcc-3.x
5751 * that these two variables' stack usage should be
5752 * combined, not added together.
5755 struct kvm_pit_state ps;
5756 struct kvm_pit_state2 ps2;
5757 struct kvm_pit_config pit_config;
5761 case KVM_SET_TSS_ADDR:
5762 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
5764 case KVM_SET_IDENTITY_MAP_ADDR: {
5767 mutex_lock(&kvm->lock);
5769 if (kvm->created_vcpus)
5770 goto set_identity_unlock;
5772 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
5773 goto set_identity_unlock;
5774 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
5775 set_identity_unlock:
5776 mutex_unlock(&kvm->lock);
5779 case KVM_SET_NR_MMU_PAGES:
5780 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
5782 case KVM_GET_NR_MMU_PAGES:
5783 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
5785 case KVM_CREATE_IRQCHIP: {
5786 mutex_lock(&kvm->lock);
5789 if (irqchip_in_kernel(kvm))
5790 goto create_irqchip_unlock;
5793 if (kvm->created_vcpus)
5794 goto create_irqchip_unlock;
5796 r = kvm_pic_init(kvm);
5798 goto create_irqchip_unlock;
5800 r = kvm_ioapic_init(kvm);
5802 kvm_pic_destroy(kvm);
5803 goto create_irqchip_unlock;
5806 r = kvm_setup_default_irq_routing(kvm);
5808 kvm_ioapic_destroy(kvm);
5809 kvm_pic_destroy(kvm);
5810 goto create_irqchip_unlock;
5812 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
5814 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
5815 create_irqchip_unlock:
5816 mutex_unlock(&kvm->lock);
5819 case KVM_CREATE_PIT:
5820 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
5822 case KVM_CREATE_PIT2:
5824 if (copy_from_user(&u.pit_config, argp,
5825 sizeof(struct kvm_pit_config)))
5828 mutex_lock(&kvm->lock);
5831 goto create_pit_unlock;
5833 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
5837 mutex_unlock(&kvm->lock);
5839 case KVM_GET_IRQCHIP: {
5840 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5841 struct kvm_irqchip *chip;
5843 chip = memdup_user(argp, sizeof(*chip));
5850 if (!irqchip_kernel(kvm))
5851 goto get_irqchip_out;
5852 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
5854 goto get_irqchip_out;
5856 if (copy_to_user(argp, chip, sizeof(*chip)))
5857 goto get_irqchip_out;
5863 case KVM_SET_IRQCHIP: {
5864 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5865 struct kvm_irqchip *chip;
5867 chip = memdup_user(argp, sizeof(*chip));
5874 if (!irqchip_kernel(kvm))
5875 goto set_irqchip_out;
5876 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
5883 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
5886 if (!kvm->arch.vpit)
5888 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
5892 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
5899 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
5901 mutex_lock(&kvm->lock);
5903 if (!kvm->arch.vpit)
5905 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
5907 mutex_unlock(&kvm->lock);
5910 case KVM_GET_PIT2: {
5912 if (!kvm->arch.vpit)
5914 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
5918 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
5923 case KVM_SET_PIT2: {
5925 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
5927 mutex_lock(&kvm->lock);
5929 if (!kvm->arch.vpit)
5931 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
5933 mutex_unlock(&kvm->lock);
5936 case KVM_REINJECT_CONTROL: {
5937 struct kvm_reinject_control control;
5939 if (copy_from_user(&control, argp, sizeof(control)))
5942 if (!kvm->arch.vpit)
5944 r = kvm_vm_ioctl_reinject(kvm, &control);
5947 case KVM_SET_BOOT_CPU_ID:
5949 mutex_lock(&kvm->lock);
5950 if (kvm->created_vcpus)
5953 kvm->arch.bsp_vcpu_id = arg;
5954 mutex_unlock(&kvm->lock);
5956 #ifdef CONFIG_KVM_XEN
5957 case KVM_XEN_HVM_CONFIG: {
5958 struct kvm_xen_hvm_config xhc;
5960 if (copy_from_user(&xhc, argp, sizeof(xhc)))
5962 r = kvm_xen_hvm_config(kvm, &xhc);
5965 case KVM_XEN_HVM_GET_ATTR: {
5966 struct kvm_xen_hvm_attr xha;
5969 if (copy_from_user(&xha, argp, sizeof(xha)))
5971 r = kvm_xen_hvm_get_attr(kvm, &xha);
5972 if (!r && copy_to_user(argp, &xha, sizeof(xha)))
5976 case KVM_XEN_HVM_SET_ATTR: {
5977 struct kvm_xen_hvm_attr xha;
5980 if (copy_from_user(&xha, argp, sizeof(xha)))
5982 r = kvm_xen_hvm_set_attr(kvm, &xha);
5986 case KVM_SET_CLOCK: {
5987 struct kvm_arch *ka = &kvm->arch;
5988 struct kvm_clock_data user_ns;
5992 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
6001 * TODO: userspace has to take care of races with VCPU_RUN, so
6002 * kvm_gen_update_masterclock() can be cut down to locked
6003 * pvclock_update_vm_gtod_copy().
6005 kvm_gen_update_masterclock(kvm);
6008 * This pairs with kvm_guest_time_update(): when masterclock is
6009 * in use, we use master_kernel_ns + kvmclock_offset to set
6010 * unsigned 'system_time' so if we use get_kvmclock_ns() (which
6011 * is slightly ahead) here we risk going negative on unsigned
6012 * 'system_time' when 'user_ns.clock' is very small.
6014 spin_lock_irq(&ka->pvclock_gtod_sync_lock);
6015 if (kvm->arch.use_master_clock)
6016 now_ns = ka->master_kernel_ns;
6018 now_ns = get_kvmclock_base_ns();
6019 ka->kvmclock_offset = user_ns.clock - now_ns;
6020 spin_unlock_irq(&ka->pvclock_gtod_sync_lock);
6022 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
6025 case KVM_GET_CLOCK: {
6026 struct kvm_clock_data user_ns;
6029 now_ns = get_kvmclock_ns(kvm);
6030 user_ns.clock = now_ns;
6031 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
6032 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
6035 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
6040 case KVM_MEMORY_ENCRYPT_OP: {
6042 if (kvm_x86_ops.mem_enc_op)
6043 r = static_call(kvm_x86_mem_enc_op)(kvm, argp);
6046 case KVM_MEMORY_ENCRYPT_REG_REGION: {
6047 struct kvm_enc_region region;
6050 if (copy_from_user(®ion, argp, sizeof(region)))
6054 if (kvm_x86_ops.mem_enc_reg_region)
6055 r = static_call(kvm_x86_mem_enc_reg_region)(kvm, ®ion);
6058 case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
6059 struct kvm_enc_region region;
6062 if (copy_from_user(®ion, argp, sizeof(region)))
6066 if (kvm_x86_ops.mem_enc_unreg_region)
6067 r = static_call(kvm_x86_mem_enc_unreg_region)(kvm, ®ion);
6070 case KVM_HYPERV_EVENTFD: {
6071 struct kvm_hyperv_eventfd hvevfd;
6074 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
6076 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
6079 case KVM_SET_PMU_EVENT_FILTER:
6080 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
6082 case KVM_X86_SET_MSR_FILTER:
6083 r = kvm_vm_ioctl_set_msr_filter(kvm, argp);
6092 static void kvm_init_msr_list(void)
6094 struct x86_pmu_capability x86_pmu;
6098 BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
6099 "Please update the fixed PMCs in msrs_to_saved_all[]");
6101 perf_get_x86_pmu_capability(&x86_pmu);
6103 num_msrs_to_save = 0;
6104 num_emulated_msrs = 0;
6105 num_msr_based_features = 0;
6107 for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
6108 if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
6112 * Even MSRs that are valid in the host may not be exposed
6113 * to the guests in some cases.
6115 switch (msrs_to_save_all[i]) {
6116 case MSR_IA32_BNDCFGS:
6117 if (!kvm_mpx_supported())
6121 if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP) &&
6122 !kvm_cpu_cap_has(X86_FEATURE_RDPID))
6125 case MSR_IA32_UMWAIT_CONTROL:
6126 if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG))
6129 case MSR_IA32_RTIT_CTL:
6130 case MSR_IA32_RTIT_STATUS:
6131 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT))
6134 case MSR_IA32_RTIT_CR3_MATCH:
6135 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6136 !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
6139 case MSR_IA32_RTIT_OUTPUT_BASE:
6140 case MSR_IA32_RTIT_OUTPUT_MASK:
6141 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6142 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
6143 !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
6146 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
6147 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6148 msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
6149 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
6152 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
6153 if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
6154 min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6157 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
6158 if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
6159 min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6166 msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
6169 for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
6170 if (!static_call(kvm_x86_has_emulated_msr)(NULL, emulated_msrs_all[i]))
6173 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
6176 for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
6177 struct kvm_msr_entry msr;
6179 msr.index = msr_based_features_all[i];
6180 if (kvm_get_msr_feature(&msr))
6183 msr_based_features[num_msr_based_features++] = msr_based_features_all[i];
6187 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
6195 if (!(lapic_in_kernel(vcpu) &&
6196 !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
6197 && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
6208 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
6215 if (!(lapic_in_kernel(vcpu) &&
6216 !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
6218 && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
6220 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
6230 static void kvm_set_segment(struct kvm_vcpu *vcpu,
6231 struct kvm_segment *var, int seg)
6233 static_call(kvm_x86_set_segment)(vcpu, var, seg);
6236 void kvm_get_segment(struct kvm_vcpu *vcpu,
6237 struct kvm_segment *var, int seg)
6239 static_call(kvm_x86_get_segment)(vcpu, var, seg);
6242 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
6243 struct x86_exception *exception)
6247 BUG_ON(!mmu_is_nested(vcpu));
6249 /* NPT walks are always user-walks */
6250 access |= PFERR_USER_MASK;
6251 t_gpa = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
6256 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
6257 struct x86_exception *exception)
6259 u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6260 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6262 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_read);
6264 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
6265 struct x86_exception *exception)
6267 u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6268 access |= PFERR_FETCH_MASK;
6269 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6272 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
6273 struct x86_exception *exception)
6275 u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6276 access |= PFERR_WRITE_MASK;
6277 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6279 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_write);
6281 /* uses this to access any guest's mapped memory without checking CPL */
6282 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
6283 struct x86_exception *exception)
6285 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
6288 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6289 struct kvm_vcpu *vcpu, u32 access,
6290 struct x86_exception *exception)
6293 int r = X86EMUL_CONTINUE;
6296 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
6298 unsigned offset = addr & (PAGE_SIZE-1);
6299 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
6302 if (gpa == UNMAPPED_GVA)
6303 return X86EMUL_PROPAGATE_FAULT;
6304 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
6307 r = X86EMUL_IO_NEEDED;
6319 /* used for instruction fetching */
6320 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
6321 gva_t addr, void *val, unsigned int bytes,
6322 struct x86_exception *exception)
6324 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6325 u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6329 /* Inline kvm_read_guest_virt_helper for speed. */
6330 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
6332 if (unlikely(gpa == UNMAPPED_GVA))
6333 return X86EMUL_PROPAGATE_FAULT;
6335 offset = addr & (PAGE_SIZE-1);
6336 if (WARN_ON(offset + bytes > PAGE_SIZE))
6337 bytes = (unsigned)PAGE_SIZE - offset;
6338 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
6340 if (unlikely(ret < 0))
6341 return X86EMUL_IO_NEEDED;
6343 return X86EMUL_CONTINUE;
6346 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
6347 gva_t addr, void *val, unsigned int bytes,
6348 struct x86_exception *exception)
6350 u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6353 * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
6354 * is returned, but our callers are not ready for that and they blindly
6355 * call kvm_inject_page_fault. Ensure that they at least do not leak
6356 * uninitialized kernel stack memory into cr2 and error code.
6358 memset(exception, 0, sizeof(*exception));
6359 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
6362 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
6364 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
6365 gva_t addr, void *val, unsigned int bytes,
6366 struct x86_exception *exception, bool system)
6368 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6371 if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6372 access |= PFERR_USER_MASK;
6374 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
6377 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
6378 unsigned long addr, void *val, unsigned int bytes)
6380 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6381 int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
6383 return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
6386 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6387 struct kvm_vcpu *vcpu, u32 access,
6388 struct x86_exception *exception)
6391 int r = X86EMUL_CONTINUE;
6394 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
6397 unsigned offset = addr & (PAGE_SIZE-1);
6398 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
6401 if (gpa == UNMAPPED_GVA)
6402 return X86EMUL_PROPAGATE_FAULT;
6403 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
6405 r = X86EMUL_IO_NEEDED;
6417 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
6418 unsigned int bytes, struct x86_exception *exception,
6421 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6422 u32 access = PFERR_WRITE_MASK;
6424 if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6425 access |= PFERR_USER_MASK;
6427 return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6431 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
6432 unsigned int bytes, struct x86_exception *exception)
6434 /* kvm_write_guest_virt_system can pull in tons of pages. */
6435 vcpu->arch.l1tf_flush_l1d = true;
6437 return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6438 PFERR_WRITE_MASK, exception);
6440 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
6442 int handle_ud(struct kvm_vcpu *vcpu)
6444 static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
6445 int emul_type = EMULTYPE_TRAP_UD;
6446 char sig[5]; /* ud2; .ascii "kvm" */
6447 struct x86_exception e;
6449 if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, NULL, 0)))
6452 if (force_emulation_prefix &&
6453 kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
6454 sig, sizeof(sig), &e) == 0 &&
6455 memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
6456 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
6457 emul_type = EMULTYPE_TRAP_UD_FORCED;
6460 return kvm_emulate_instruction(vcpu, emul_type);
6462 EXPORT_SYMBOL_GPL(handle_ud);
6464 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6465 gpa_t gpa, bool write)
6467 /* For APIC access vmexit */
6468 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6471 if (vcpu_match_mmio_gpa(vcpu, gpa)) {
6472 trace_vcpu_match_mmio(gva, gpa, write, true);
6479 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6480 gpa_t *gpa, struct x86_exception *exception,
6483 u32 access = ((static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0)
6484 | (write ? PFERR_WRITE_MASK : 0);
6487 * currently PKRU is only applied to ept enabled guest so
6488 * there is no pkey in EPT page table for L1 guest or EPT
6489 * shadow page table for L2 guest.
6491 if (vcpu_match_mmio_gva(vcpu, gva)
6492 && !permission_fault(vcpu, vcpu->arch.walk_mmu,
6493 vcpu->arch.mmio_access, 0, access)) {
6494 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
6495 (gva & (PAGE_SIZE - 1));
6496 trace_vcpu_match_mmio(gva, *gpa, write, false);
6500 *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6502 if (*gpa == UNMAPPED_GVA)
6505 return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
6508 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
6509 const void *val, int bytes)
6513 ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
6516 kvm_page_track_write(vcpu, gpa, val, bytes);
6520 struct read_write_emulator_ops {
6521 int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
6523 int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
6524 void *val, int bytes);
6525 int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6526 int bytes, void *val);
6527 int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6528 void *val, int bytes);
6532 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
6534 if (vcpu->mmio_read_completed) {
6535 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
6536 vcpu->mmio_fragments[0].gpa, val);
6537 vcpu->mmio_read_completed = 0;
6544 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6545 void *val, int bytes)
6547 return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
6550 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6551 void *val, int bytes)
6553 return emulator_write_phys(vcpu, gpa, val, bytes);
6556 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
6558 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
6559 return vcpu_mmio_write(vcpu, gpa, bytes, val);
6562 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6563 void *val, int bytes)
6565 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
6566 return X86EMUL_IO_NEEDED;
6569 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6570 void *val, int bytes)
6572 struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
6574 memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
6575 return X86EMUL_CONTINUE;
6578 static const struct read_write_emulator_ops read_emultor = {
6579 .read_write_prepare = read_prepare,
6580 .read_write_emulate = read_emulate,
6581 .read_write_mmio = vcpu_mmio_read,
6582 .read_write_exit_mmio = read_exit_mmio,
6585 static const struct read_write_emulator_ops write_emultor = {
6586 .read_write_emulate = write_emulate,
6587 .read_write_mmio = write_mmio,
6588 .read_write_exit_mmio = write_exit_mmio,
6592 static int emulator_read_write_onepage(unsigned long addr, void *val,
6594 struct x86_exception *exception,
6595 struct kvm_vcpu *vcpu,
6596 const struct read_write_emulator_ops *ops)
6600 bool write = ops->write;
6601 struct kvm_mmio_fragment *frag;
6602 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6605 * If the exit was due to a NPF we may already have a GPA.
6606 * If the GPA is present, use it to avoid the GVA to GPA table walk.
6607 * Note, this cannot be used on string operations since string
6608 * operation using rep will only have the initial GPA from the NPF
6611 if (ctxt->gpa_available && emulator_can_use_gpa(ctxt) &&
6612 (addr & ~PAGE_MASK) == (ctxt->gpa_val & ~PAGE_MASK)) {
6613 gpa = ctxt->gpa_val;
6614 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
6616 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
6618 return X86EMUL_PROPAGATE_FAULT;
6621 if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
6622 return X86EMUL_CONTINUE;
6625 * Is this MMIO handled locally?
6627 handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
6628 if (handled == bytes)
6629 return X86EMUL_CONTINUE;
6635 WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
6636 frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
6640 return X86EMUL_CONTINUE;
6643 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
6645 void *val, unsigned int bytes,
6646 struct x86_exception *exception,
6647 const struct read_write_emulator_ops *ops)
6649 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6653 if (ops->read_write_prepare &&
6654 ops->read_write_prepare(vcpu, val, bytes))
6655 return X86EMUL_CONTINUE;
6657 vcpu->mmio_nr_fragments = 0;
6659 /* Crossing a page boundary? */
6660 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
6663 now = -addr & ~PAGE_MASK;
6664 rc = emulator_read_write_onepage(addr, val, now, exception,
6667 if (rc != X86EMUL_CONTINUE)
6670 if (ctxt->mode != X86EMUL_MODE_PROT64)
6676 rc = emulator_read_write_onepage(addr, val, bytes, exception,
6678 if (rc != X86EMUL_CONTINUE)
6681 if (!vcpu->mmio_nr_fragments)
6684 gpa = vcpu->mmio_fragments[0].gpa;
6686 vcpu->mmio_needed = 1;
6687 vcpu->mmio_cur_fragment = 0;
6689 vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
6690 vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
6691 vcpu->run->exit_reason = KVM_EXIT_MMIO;
6692 vcpu->run->mmio.phys_addr = gpa;
6694 return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
6697 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
6701 struct x86_exception *exception)
6703 return emulator_read_write(ctxt, addr, val, bytes,
6704 exception, &read_emultor);
6707 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
6711 struct x86_exception *exception)
6713 return emulator_read_write(ctxt, addr, (void *)val, bytes,
6714 exception, &write_emultor);
6717 #define CMPXCHG_TYPE(t, ptr, old, new) \
6718 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
6720 #ifdef CONFIG_X86_64
6721 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
6723 # define CMPXCHG64(ptr, old, new) \
6724 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
6727 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
6732 struct x86_exception *exception)
6734 struct kvm_host_map map;
6735 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6741 /* guests cmpxchg8b have to be emulated atomically */
6742 if (bytes > 8 || (bytes & (bytes - 1)))
6745 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
6747 if (gpa == UNMAPPED_GVA ||
6748 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6752 * Emulate the atomic as a straight write to avoid #AC if SLD is
6753 * enabled in the host and the access splits a cache line.
6755 if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))
6756 page_line_mask = ~(cache_line_size() - 1);
6758 page_line_mask = PAGE_MASK;
6760 if (((gpa + bytes - 1) & page_line_mask) != (gpa & page_line_mask))
6763 if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
6766 kaddr = map.hva + offset_in_page(gpa);
6770 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
6773 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
6776 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
6779 exchanged = CMPXCHG64(kaddr, old, new);
6785 kvm_vcpu_unmap(vcpu, &map, true);
6788 return X86EMUL_CMPXCHG_FAILED;
6790 kvm_page_track_write(vcpu, gpa, new, bytes);
6792 return X86EMUL_CONTINUE;
6795 printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
6797 return emulator_write_emulated(ctxt, addr, new, bytes, exception);
6800 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
6804 for (i = 0; i < vcpu->arch.pio.count; i++) {
6805 if (vcpu->arch.pio.in)
6806 r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
6807 vcpu->arch.pio.size, pd);
6809 r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
6810 vcpu->arch.pio.port, vcpu->arch.pio.size,
6814 pd += vcpu->arch.pio.size;
6819 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
6820 unsigned short port, void *val,
6821 unsigned int count, bool in)
6823 vcpu->arch.pio.port = port;
6824 vcpu->arch.pio.in = in;
6825 vcpu->arch.pio.count = count;
6826 vcpu->arch.pio.size = size;
6828 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
6829 vcpu->arch.pio.count = 0;
6833 vcpu->run->exit_reason = KVM_EXIT_IO;
6834 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
6835 vcpu->run->io.size = size;
6836 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
6837 vcpu->run->io.count = count;
6838 vcpu->run->io.port = port;
6843 static int emulator_pio_in(struct kvm_vcpu *vcpu, int size,
6844 unsigned short port, void *val, unsigned int count)
6848 if (vcpu->arch.pio.count)
6851 memset(vcpu->arch.pio_data, 0, size * count);
6853 ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
6856 memcpy(val, vcpu->arch.pio_data, size * count);
6857 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
6858 vcpu->arch.pio.count = 0;
6865 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
6866 int size, unsigned short port, void *val,
6869 return emulator_pio_in(emul_to_vcpu(ctxt), size, port, val, count);
6873 static int emulator_pio_out(struct kvm_vcpu *vcpu, int size,
6874 unsigned short port, const void *val,
6877 memcpy(vcpu->arch.pio_data, val, size * count);
6878 trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
6879 return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
6882 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
6883 int size, unsigned short port,
6884 const void *val, unsigned int count)
6886 return emulator_pio_out(emul_to_vcpu(ctxt), size, port, val, count);
6889 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
6891 return static_call(kvm_x86_get_segment_base)(vcpu, seg);
6894 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
6896 kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
6899 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
6901 if (!need_emulate_wbinvd(vcpu))
6902 return X86EMUL_CONTINUE;
6904 if (static_call(kvm_x86_has_wbinvd_exit)()) {
6905 int cpu = get_cpu();
6907 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
6908 on_each_cpu_mask(vcpu->arch.wbinvd_dirty_mask,
6909 wbinvd_ipi, NULL, 1);
6911 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
6914 return X86EMUL_CONTINUE;
6917 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
6919 kvm_emulate_wbinvd_noskip(vcpu);
6920 return kvm_skip_emulated_instruction(vcpu);
6922 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
6926 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
6928 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
6931 static void emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
6932 unsigned long *dest)
6934 kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
6937 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
6938 unsigned long value)
6941 return kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
6944 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
6946 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
6949 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
6951 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6952 unsigned long value;
6956 value = kvm_read_cr0(vcpu);
6959 value = vcpu->arch.cr2;
6962 value = kvm_read_cr3(vcpu);
6965 value = kvm_read_cr4(vcpu);
6968 value = kvm_get_cr8(vcpu);
6971 kvm_err("%s: unexpected cr %u\n", __func__, cr);
6978 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
6980 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6985 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
6988 vcpu->arch.cr2 = val;
6991 res = kvm_set_cr3(vcpu, val);
6994 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
6997 res = kvm_set_cr8(vcpu, val);
7000 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7007 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
7009 return static_call(kvm_x86_get_cpl)(emul_to_vcpu(ctxt));
7012 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7014 static_call(kvm_x86_get_gdt)(emul_to_vcpu(ctxt), dt);
7017 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7019 static_call(kvm_x86_get_idt)(emul_to_vcpu(ctxt), dt);
7022 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7024 static_call(kvm_x86_set_gdt)(emul_to_vcpu(ctxt), dt);
7027 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7029 static_call(kvm_x86_set_idt)(emul_to_vcpu(ctxt), dt);
7032 static unsigned long emulator_get_cached_segment_base(
7033 struct x86_emulate_ctxt *ctxt, int seg)
7035 return get_segment_base(emul_to_vcpu(ctxt), seg);
7038 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
7039 struct desc_struct *desc, u32 *base3,
7042 struct kvm_segment var;
7044 kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
7045 *selector = var.selector;
7048 memset(desc, 0, sizeof(*desc));
7056 set_desc_limit(desc, var.limit);
7057 set_desc_base(desc, (unsigned long)var.base);
7058 #ifdef CONFIG_X86_64
7060 *base3 = var.base >> 32;
7062 desc->type = var.type;
7064 desc->dpl = var.dpl;
7065 desc->p = var.present;
7066 desc->avl = var.avl;
7074 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
7075 struct desc_struct *desc, u32 base3,
7078 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7079 struct kvm_segment var;
7081 var.selector = selector;
7082 var.base = get_desc_base(desc);
7083 #ifdef CONFIG_X86_64
7084 var.base |= ((u64)base3) << 32;
7086 var.limit = get_desc_limit(desc);
7088 var.limit = (var.limit << 12) | 0xfff;
7089 var.type = desc->type;
7090 var.dpl = desc->dpl;
7095 var.avl = desc->avl;
7096 var.present = desc->p;
7097 var.unusable = !var.present;
7100 kvm_set_segment(vcpu, &var, seg);
7104 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
7105 u32 msr_index, u64 *pdata)
7107 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7110 r = kvm_get_msr(vcpu, msr_index, pdata);
7112 if (r && kvm_get_msr_user_space(vcpu, msr_index, r)) {
7113 /* Bounce to user space */
7114 return X86EMUL_IO_NEEDED;
7120 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
7121 u32 msr_index, u64 data)
7123 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7126 r = kvm_set_msr(vcpu, msr_index, data);
7128 if (r && kvm_set_msr_user_space(vcpu, msr_index, data, r)) {
7129 /* Bounce to user space */
7130 return X86EMUL_IO_NEEDED;
7136 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
7138 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7140 return vcpu->arch.smbase;
7143 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
7145 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7147 vcpu->arch.smbase = smbase;
7150 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
7153 return kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc);
7156 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
7157 u32 pmc, u64 *pdata)
7159 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
7162 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
7164 emul_to_vcpu(ctxt)->arch.halt_request = 1;
7167 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
7168 struct x86_instruction_info *info,
7169 enum x86_intercept_stage stage)
7171 return static_call(kvm_x86_check_intercept)(emul_to_vcpu(ctxt), info, stage,
7175 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
7176 u32 *eax, u32 *ebx, u32 *ecx, u32 *edx,
7179 return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, exact_only);
7182 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
7184 return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
7187 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
7189 return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
7192 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
7194 return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
7197 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
7199 return kvm_register_read_raw(emul_to_vcpu(ctxt), reg);
7202 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
7204 kvm_register_write_raw(emul_to_vcpu(ctxt), reg, val);
7207 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
7209 static_call(kvm_x86_set_nmi_mask)(emul_to_vcpu(ctxt), masked);
7212 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
7214 return emul_to_vcpu(ctxt)->arch.hflags;
7217 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
7219 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7221 vcpu->arch.hflags = emul_flags;
7222 kvm_mmu_reset_context(vcpu);
7225 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt,
7226 const char *smstate)
7228 return static_call(kvm_x86_pre_leave_smm)(emul_to_vcpu(ctxt), smstate);
7231 static void emulator_post_leave_smm(struct x86_emulate_ctxt *ctxt)
7233 kvm_smm_changed(emul_to_vcpu(ctxt));
7236 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
7238 return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
7241 static const struct x86_emulate_ops emulate_ops = {
7242 .read_gpr = emulator_read_gpr,
7243 .write_gpr = emulator_write_gpr,
7244 .read_std = emulator_read_std,
7245 .write_std = emulator_write_std,
7246 .read_phys = kvm_read_guest_phys_system,
7247 .fetch = kvm_fetch_guest_virt,
7248 .read_emulated = emulator_read_emulated,
7249 .write_emulated = emulator_write_emulated,
7250 .cmpxchg_emulated = emulator_cmpxchg_emulated,
7251 .invlpg = emulator_invlpg,
7252 .pio_in_emulated = emulator_pio_in_emulated,
7253 .pio_out_emulated = emulator_pio_out_emulated,
7254 .get_segment = emulator_get_segment,
7255 .set_segment = emulator_set_segment,
7256 .get_cached_segment_base = emulator_get_cached_segment_base,
7257 .get_gdt = emulator_get_gdt,
7258 .get_idt = emulator_get_idt,
7259 .set_gdt = emulator_set_gdt,
7260 .set_idt = emulator_set_idt,
7261 .get_cr = emulator_get_cr,
7262 .set_cr = emulator_set_cr,
7263 .cpl = emulator_get_cpl,
7264 .get_dr = emulator_get_dr,
7265 .set_dr = emulator_set_dr,
7266 .get_smbase = emulator_get_smbase,
7267 .set_smbase = emulator_set_smbase,
7268 .set_msr = emulator_set_msr,
7269 .get_msr = emulator_get_msr,
7270 .check_pmc = emulator_check_pmc,
7271 .read_pmc = emulator_read_pmc,
7272 .halt = emulator_halt,
7273 .wbinvd = emulator_wbinvd,
7274 .fix_hypercall = emulator_fix_hypercall,
7275 .intercept = emulator_intercept,
7276 .get_cpuid = emulator_get_cpuid,
7277 .guest_has_long_mode = emulator_guest_has_long_mode,
7278 .guest_has_movbe = emulator_guest_has_movbe,
7279 .guest_has_fxsr = emulator_guest_has_fxsr,
7280 .set_nmi_mask = emulator_set_nmi_mask,
7281 .get_hflags = emulator_get_hflags,
7282 .set_hflags = emulator_set_hflags,
7283 .pre_leave_smm = emulator_pre_leave_smm,
7284 .post_leave_smm = emulator_post_leave_smm,
7285 .set_xcr = emulator_set_xcr,
7288 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
7290 u32 int_shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
7292 * an sti; sti; sequence only disable interrupts for the first
7293 * instruction. So, if the last instruction, be it emulated or
7294 * not, left the system with the INT_STI flag enabled, it
7295 * means that the last instruction is an sti. We should not
7296 * leave the flag on in this case. The same goes for mov ss
7298 if (int_shadow & mask)
7300 if (unlikely(int_shadow || mask)) {
7301 static_call(kvm_x86_set_interrupt_shadow)(vcpu, mask);
7303 kvm_make_request(KVM_REQ_EVENT, vcpu);
7307 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
7309 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7310 if (ctxt->exception.vector == PF_VECTOR)
7311 return kvm_inject_emulated_page_fault(vcpu, &ctxt->exception);
7313 if (ctxt->exception.error_code_valid)
7314 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
7315 ctxt->exception.error_code);
7317 kvm_queue_exception(vcpu, ctxt->exception.vector);
7321 static struct x86_emulate_ctxt *alloc_emulate_ctxt(struct kvm_vcpu *vcpu)
7323 struct x86_emulate_ctxt *ctxt;
7325 ctxt = kmem_cache_zalloc(x86_emulator_cache, GFP_KERNEL_ACCOUNT);
7327 pr_err("kvm: failed to allocate vcpu's emulator\n");
7332 ctxt->ops = &emulate_ops;
7333 vcpu->arch.emulate_ctxt = ctxt;
7338 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
7340 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7343 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
7345 ctxt->gpa_available = false;
7346 ctxt->eflags = kvm_get_rflags(vcpu);
7347 ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
7349 ctxt->eip = kvm_rip_read(vcpu);
7350 ctxt->mode = (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
7351 (ctxt->eflags & X86_EFLAGS_VM) ? X86EMUL_MODE_VM86 :
7352 (cs_l && is_long_mode(vcpu)) ? X86EMUL_MODE_PROT64 :
7353 cs_db ? X86EMUL_MODE_PROT32 :
7354 X86EMUL_MODE_PROT16;
7355 BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
7356 BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
7357 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
7359 ctxt->interruptibility = 0;
7360 ctxt->have_exception = false;
7361 ctxt->exception.vector = -1;
7362 ctxt->perm_ok = false;
7364 init_decode_cache(ctxt);
7365 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7368 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
7370 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7373 init_emulate_ctxt(vcpu);
7377 ctxt->_eip = ctxt->eip + inc_eip;
7378 ret = emulate_int_real(ctxt, irq);
7380 if (ret != X86EMUL_CONTINUE) {
7381 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
7383 ctxt->eip = ctxt->_eip;
7384 kvm_rip_write(vcpu, ctxt->eip);
7385 kvm_set_rflags(vcpu, ctxt->eflags);
7388 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
7390 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
7392 ++vcpu->stat.insn_emulation_fail;
7393 trace_kvm_emulate_insn_failed(vcpu);
7395 if (emulation_type & EMULTYPE_VMWARE_GP) {
7396 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7400 if (emulation_type & EMULTYPE_SKIP) {
7401 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7402 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
7403 vcpu->run->internal.ndata = 0;
7407 kvm_queue_exception(vcpu, UD_VECTOR);
7409 if (!is_guest_mode(vcpu) && static_call(kvm_x86_get_cpl)(vcpu) == 0) {
7410 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7411 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
7412 vcpu->run->internal.ndata = 0;
7419 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7420 bool write_fault_to_shadow_pgtable,
7423 gpa_t gpa = cr2_or_gpa;
7426 if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7429 if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7430 WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7433 if (!vcpu->arch.mmu->direct_map) {
7435 * Write permission should be allowed since only
7436 * write access need to be emulated.
7438 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7441 * If the mapping is invalid in guest, let cpu retry
7442 * it to generate fault.
7444 if (gpa == UNMAPPED_GVA)
7449 * Do not retry the unhandleable instruction if it faults on the
7450 * readonly host memory, otherwise it will goto a infinite loop:
7451 * retry instruction -> write #PF -> emulation fail -> retry
7452 * instruction -> ...
7454 pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
7457 * If the instruction failed on the error pfn, it can not be fixed,
7458 * report the error to userspace.
7460 if (is_error_noslot_pfn(pfn))
7463 kvm_release_pfn_clean(pfn);
7465 /* The instructions are well-emulated on direct mmu. */
7466 if (vcpu->arch.mmu->direct_map) {
7467 unsigned int indirect_shadow_pages;
7469 write_lock(&vcpu->kvm->mmu_lock);
7470 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
7471 write_unlock(&vcpu->kvm->mmu_lock);
7473 if (indirect_shadow_pages)
7474 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7480 * if emulation was due to access to shadowed page table
7481 * and it failed try to unshadow page and re-enter the
7482 * guest to let CPU execute the instruction.
7484 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7487 * If the access faults on its page table, it can not
7488 * be fixed by unprotecting shadow page and it should
7489 * be reported to userspace.
7491 return !write_fault_to_shadow_pgtable;
7494 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
7495 gpa_t cr2_or_gpa, int emulation_type)
7497 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7498 unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
7500 last_retry_eip = vcpu->arch.last_retry_eip;
7501 last_retry_addr = vcpu->arch.last_retry_addr;
7504 * If the emulation is caused by #PF and it is non-page_table
7505 * writing instruction, it means the VM-EXIT is caused by shadow
7506 * page protected, we can zap the shadow page and retry this
7507 * instruction directly.
7509 * Note: if the guest uses a non-page-table modifying instruction
7510 * on the PDE that points to the instruction, then we will unmap
7511 * the instruction and go to an infinite loop. So, we cache the
7512 * last retried eip and the last fault address, if we meet the eip
7513 * and the address again, we can break out of the potential infinite
7516 vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
7518 if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7521 if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7522 WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7525 if (x86_page_table_writing_insn(ctxt))
7528 if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
7531 vcpu->arch.last_retry_eip = ctxt->eip;
7532 vcpu->arch.last_retry_addr = cr2_or_gpa;
7534 if (!vcpu->arch.mmu->direct_map)
7535 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7537 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7542 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
7543 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
7545 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
7547 if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
7548 /* This is a good place to trace that we are exiting SMM. */
7549 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
7551 /* Process a latched INIT or SMI, if any. */
7552 kvm_make_request(KVM_REQ_EVENT, vcpu);
7555 kvm_mmu_reset_context(vcpu);
7558 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
7567 for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
7568 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
7573 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
7575 struct kvm_run *kvm_run = vcpu->run;
7577 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
7578 kvm_run->debug.arch.dr6 = DR6_BS | DR6_ACTIVE_LOW;
7579 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu);
7580 kvm_run->debug.arch.exception = DB_VECTOR;
7581 kvm_run->exit_reason = KVM_EXIT_DEBUG;
7584 kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
7588 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
7590 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7593 r = static_call(kvm_x86_skip_emulated_instruction)(vcpu);
7598 * rflags is the old, "raw" value of the flags. The new value has
7599 * not been saved yet.
7601 * This is correct even for TF set by the guest, because "the
7602 * processor will not generate this exception after the instruction
7603 * that sets the TF flag".
7605 if (unlikely(rflags & X86_EFLAGS_TF))
7606 r = kvm_vcpu_do_singlestep(vcpu);
7609 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
7611 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
7613 if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
7614 (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
7615 struct kvm_run *kvm_run = vcpu->run;
7616 unsigned long eip = kvm_get_linear_rip(vcpu);
7617 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7618 vcpu->arch.guest_debug_dr7,
7622 kvm_run->debug.arch.dr6 = dr6 | DR6_ACTIVE_LOW;
7623 kvm_run->debug.arch.pc = eip;
7624 kvm_run->debug.arch.exception = DB_VECTOR;
7625 kvm_run->exit_reason = KVM_EXIT_DEBUG;
7631 if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
7632 !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
7633 unsigned long eip = kvm_get_linear_rip(vcpu);
7634 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7639 kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
7648 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
7650 switch (ctxt->opcode_len) {
7657 case 0xe6: /* OUT */
7661 case 0x6c: /* INS */
7663 case 0x6e: /* OUTS */
7670 case 0x33: /* RDPMC */
7680 * Decode to be emulated instruction. Return EMULATION_OK if success.
7682 int x86_decode_emulated_instruction(struct kvm_vcpu *vcpu, int emulation_type,
7683 void *insn, int insn_len)
7685 int r = EMULATION_OK;
7686 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7688 init_emulate_ctxt(vcpu);
7691 * We will reenter on the same instruction since we do not set
7692 * complete_userspace_io. This does not handle watchpoints yet,
7693 * those would be handled in the emulate_ops.
7695 if (!(emulation_type & EMULTYPE_SKIP) &&
7696 kvm_vcpu_check_breakpoint(vcpu, &r))
7699 r = x86_decode_insn(ctxt, insn, insn_len, emulation_type);
7701 trace_kvm_emulate_insn_start(vcpu);
7702 ++vcpu->stat.insn_emulation;
7706 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction);
7708 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7709 int emulation_type, void *insn, int insn_len)
7712 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7713 bool writeback = true;
7714 bool write_fault_to_spt;
7716 if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, insn, insn_len)))
7719 vcpu->arch.l1tf_flush_l1d = true;
7722 * Clear write_fault_to_shadow_pgtable here to ensure it is
7725 write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
7726 vcpu->arch.write_fault_to_shadow_pgtable = false;
7728 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
7729 kvm_clear_exception_queue(vcpu);
7731 r = x86_decode_emulated_instruction(vcpu, emulation_type,
7733 if (r != EMULATION_OK) {
7734 if ((emulation_type & EMULTYPE_TRAP_UD) ||
7735 (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
7736 kvm_queue_exception(vcpu, UD_VECTOR);
7739 if (reexecute_instruction(vcpu, cr2_or_gpa,
7743 if (ctxt->have_exception) {
7745 * #UD should result in just EMULATION_FAILED, and trap-like
7746 * exception should not be encountered during decode.
7748 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
7749 exception_type(ctxt->exception.vector) == EXCPT_TRAP);
7750 inject_emulated_exception(vcpu);
7753 return handle_emulation_failure(vcpu, emulation_type);
7757 if ((emulation_type & EMULTYPE_VMWARE_GP) &&
7758 !is_vmware_backdoor_opcode(ctxt)) {
7759 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7764 * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
7765 * for kvm_skip_emulated_instruction(). The caller is responsible for
7766 * updating interruptibility state and injecting single-step #DBs.
7768 if (emulation_type & EMULTYPE_SKIP) {
7769 kvm_rip_write(vcpu, ctxt->_eip);
7770 if (ctxt->eflags & X86_EFLAGS_RF)
7771 kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
7775 if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
7778 /* this is needed for vmware backdoor interface to work since it
7779 changes registers values during IO operation */
7780 if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
7781 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7782 emulator_invalidate_register_cache(ctxt);
7786 if (emulation_type & EMULTYPE_PF) {
7787 /* Save the faulting GPA (cr2) in the address field */
7788 ctxt->exception.address = cr2_or_gpa;
7790 /* With shadow page tables, cr2 contains a GVA or nGPA. */
7791 if (vcpu->arch.mmu->direct_map) {
7792 ctxt->gpa_available = true;
7793 ctxt->gpa_val = cr2_or_gpa;
7796 /* Sanitize the address out of an abundance of paranoia. */
7797 ctxt->exception.address = 0;
7800 r = x86_emulate_insn(ctxt);
7802 if (r == EMULATION_INTERCEPTED)
7805 if (r == EMULATION_FAILED) {
7806 if (reexecute_instruction(vcpu, cr2_or_gpa, write_fault_to_spt,
7810 return handle_emulation_failure(vcpu, emulation_type);
7813 if (ctxt->have_exception) {
7815 if (inject_emulated_exception(vcpu))
7817 } else if (vcpu->arch.pio.count) {
7818 if (!vcpu->arch.pio.in) {
7819 /* FIXME: return into emulator if single-stepping. */
7820 vcpu->arch.pio.count = 0;
7823 vcpu->arch.complete_userspace_io = complete_emulated_pio;
7826 } else if (vcpu->mmio_needed) {
7827 ++vcpu->stat.mmio_exits;
7829 if (!vcpu->mmio_is_write)
7832 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7833 } else if (r == EMULATION_RESTART)
7839 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7840 toggle_interruptibility(vcpu, ctxt->interruptibility);
7841 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7842 if (!ctxt->have_exception ||
7843 exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
7844 kvm_rip_write(vcpu, ctxt->eip);
7845 if (r && (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
7846 r = kvm_vcpu_do_singlestep(vcpu);
7847 if (kvm_x86_ops.update_emulated_instruction)
7848 static_call(kvm_x86_update_emulated_instruction)(vcpu);
7849 __kvm_set_rflags(vcpu, ctxt->eflags);
7853 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
7854 * do nothing, and it will be requested again as soon as
7855 * the shadow expires. But we still need to check here,
7856 * because POPF has no interrupt shadow.
7858 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
7859 kvm_make_request(KVM_REQ_EVENT, vcpu);
7861 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
7866 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
7868 return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
7870 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
7872 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
7873 void *insn, int insn_len)
7875 return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
7877 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
7879 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
7881 vcpu->arch.pio.count = 0;
7885 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
7887 vcpu->arch.pio.count = 0;
7889 if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
7892 return kvm_skip_emulated_instruction(vcpu);
7895 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
7896 unsigned short port)
7898 unsigned long val = kvm_rax_read(vcpu);
7899 int ret = emulator_pio_out(vcpu, size, port, &val, 1);
7905 * Workaround userspace that relies on old KVM behavior of %rip being
7906 * incremented prior to exiting to userspace to handle "OUT 0x7e".
7909 kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
7910 vcpu->arch.complete_userspace_io =
7911 complete_fast_pio_out_port_0x7e;
7912 kvm_skip_emulated_instruction(vcpu);
7914 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
7915 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
7920 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
7924 /* We should only ever be called with arch.pio.count equal to 1 */
7925 BUG_ON(vcpu->arch.pio.count != 1);
7927 if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
7928 vcpu->arch.pio.count = 0;
7932 /* For size less than 4 we merge, else we zero extend */
7933 val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
7936 * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
7937 * the copy and tracing
7939 emulator_pio_in(vcpu, vcpu->arch.pio.size, vcpu->arch.pio.port, &val, 1);
7940 kvm_rax_write(vcpu, val);
7942 return kvm_skip_emulated_instruction(vcpu);
7945 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
7946 unsigned short port)
7951 /* For size less than 4 we merge, else we zero extend */
7952 val = (size < 4) ? kvm_rax_read(vcpu) : 0;
7954 ret = emulator_pio_in(vcpu, size, port, &val, 1);
7956 kvm_rax_write(vcpu, val);
7960 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
7961 vcpu->arch.complete_userspace_io = complete_fast_pio_in;
7966 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
7971 ret = kvm_fast_pio_in(vcpu, size, port);
7973 ret = kvm_fast_pio_out(vcpu, size, port);
7974 return ret && kvm_skip_emulated_instruction(vcpu);
7976 EXPORT_SYMBOL_GPL(kvm_fast_pio);
7978 static int kvmclock_cpu_down_prep(unsigned int cpu)
7980 __this_cpu_write(cpu_tsc_khz, 0);
7984 static void tsc_khz_changed(void *data)
7986 struct cpufreq_freqs *freq = data;
7987 unsigned long khz = 0;
7991 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
7992 khz = cpufreq_quick_get(raw_smp_processor_id());
7995 __this_cpu_write(cpu_tsc_khz, khz);
7998 #ifdef CONFIG_X86_64
7999 static void kvm_hyperv_tsc_notifier(void)
8002 struct kvm_vcpu *vcpu;
8004 unsigned long flags;
8006 mutex_lock(&kvm_lock);
8007 list_for_each_entry(kvm, &vm_list, vm_list)
8008 kvm_make_mclock_inprogress_request(kvm);
8010 hyperv_stop_tsc_emulation();
8012 /* TSC frequency always matches when on Hyper-V */
8013 for_each_present_cpu(cpu)
8014 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
8015 kvm_max_guest_tsc_khz = tsc_khz;
8017 list_for_each_entry(kvm, &vm_list, vm_list) {
8018 struct kvm_arch *ka = &kvm->arch;
8020 spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
8021 pvclock_update_vm_gtod_copy(kvm);
8022 spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
8024 kvm_for_each_vcpu(cpu, vcpu, kvm)
8025 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8027 kvm_for_each_vcpu(cpu, vcpu, kvm)
8028 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
8030 mutex_unlock(&kvm_lock);
8034 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
8037 struct kvm_vcpu *vcpu;
8038 int i, send_ipi = 0;
8041 * We allow guests to temporarily run on slowing clocks,
8042 * provided we notify them after, or to run on accelerating
8043 * clocks, provided we notify them before. Thus time never
8046 * However, we have a problem. We can't atomically update
8047 * the frequency of a given CPU from this function; it is
8048 * merely a notifier, which can be called from any CPU.
8049 * Changing the TSC frequency at arbitrary points in time
8050 * requires a recomputation of local variables related to
8051 * the TSC for each VCPU. We must flag these local variables
8052 * to be updated and be sure the update takes place with the
8053 * new frequency before any guests proceed.
8055 * Unfortunately, the combination of hotplug CPU and frequency
8056 * change creates an intractable locking scenario; the order
8057 * of when these callouts happen is undefined with respect to
8058 * CPU hotplug, and they can race with each other. As such,
8059 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
8060 * undefined; you can actually have a CPU frequency change take
8061 * place in between the computation of X and the setting of the
8062 * variable. To protect against this problem, all updates of
8063 * the per_cpu tsc_khz variable are done in an interrupt
8064 * protected IPI, and all callers wishing to update the value
8065 * must wait for a synchronous IPI to complete (which is trivial
8066 * if the caller is on the CPU already). This establishes the
8067 * necessary total order on variable updates.
8069 * Note that because a guest time update may take place
8070 * anytime after the setting of the VCPU's request bit, the
8071 * correct TSC value must be set before the request. However,
8072 * to ensure the update actually makes it to any guest which
8073 * starts running in hardware virtualization between the set
8074 * and the acquisition of the spinlock, we must also ping the
8075 * CPU after setting the request bit.
8079 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8081 mutex_lock(&kvm_lock);
8082 list_for_each_entry(kvm, &vm_list, vm_list) {
8083 kvm_for_each_vcpu(i, vcpu, kvm) {
8084 if (vcpu->cpu != cpu)
8086 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8087 if (vcpu->cpu != raw_smp_processor_id())
8091 mutex_unlock(&kvm_lock);
8093 if (freq->old < freq->new && send_ipi) {
8095 * We upscale the frequency. Must make the guest
8096 * doesn't see old kvmclock values while running with
8097 * the new frequency, otherwise we risk the guest sees
8098 * time go backwards.
8100 * In case we update the frequency for another cpu
8101 * (which might be in guest context) send an interrupt
8102 * to kick the cpu out of guest context. Next time
8103 * guest context is entered kvmclock will be updated,
8104 * so the guest will not see stale values.
8106 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8110 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
8113 struct cpufreq_freqs *freq = data;
8116 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
8118 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
8121 for_each_cpu(cpu, freq->policy->cpus)
8122 __kvmclock_cpufreq_notifier(freq, cpu);
8127 static struct notifier_block kvmclock_cpufreq_notifier_block = {
8128 .notifier_call = kvmclock_cpufreq_notifier
8131 static int kvmclock_cpu_online(unsigned int cpu)
8133 tsc_khz_changed(NULL);
8137 static void kvm_timer_init(void)
8139 max_tsc_khz = tsc_khz;
8141 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
8142 #ifdef CONFIG_CPU_FREQ
8143 struct cpufreq_policy *policy;
8147 policy = cpufreq_cpu_get(cpu);
8149 if (policy->cpuinfo.max_freq)
8150 max_tsc_khz = policy->cpuinfo.max_freq;
8151 cpufreq_cpu_put(policy);
8155 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
8156 CPUFREQ_TRANSITION_NOTIFIER);
8159 cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
8160 kvmclock_cpu_online, kvmclock_cpu_down_prep);
8163 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
8164 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
8166 int kvm_is_in_guest(void)
8168 return __this_cpu_read(current_vcpu) != NULL;
8171 static int kvm_is_user_mode(void)
8175 if (__this_cpu_read(current_vcpu))
8176 user_mode = static_call(kvm_x86_get_cpl)(__this_cpu_read(current_vcpu));
8178 return user_mode != 0;
8181 static unsigned long kvm_get_guest_ip(void)
8183 unsigned long ip = 0;
8185 if (__this_cpu_read(current_vcpu))
8186 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
8191 static void kvm_handle_intel_pt_intr(void)
8193 struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
8195 kvm_make_request(KVM_REQ_PMI, vcpu);
8196 __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
8197 (unsigned long *)&vcpu->arch.pmu.global_status);
8200 static struct perf_guest_info_callbacks kvm_guest_cbs = {
8201 .is_in_guest = kvm_is_in_guest,
8202 .is_user_mode = kvm_is_user_mode,
8203 .get_guest_ip = kvm_get_guest_ip,
8204 .handle_intel_pt_intr = kvm_handle_intel_pt_intr,
8207 #ifdef CONFIG_X86_64
8208 static void pvclock_gtod_update_fn(struct work_struct *work)
8212 struct kvm_vcpu *vcpu;
8215 mutex_lock(&kvm_lock);
8216 list_for_each_entry(kvm, &vm_list, vm_list)
8217 kvm_for_each_vcpu(i, vcpu, kvm)
8218 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
8219 atomic_set(&kvm_guest_has_master_clock, 0);
8220 mutex_unlock(&kvm_lock);
8223 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
8226 * Indirection to move queue_work() out of the tk_core.seq write held
8227 * region to prevent possible deadlocks against time accessors which
8228 * are invoked with work related locks held.
8230 static void pvclock_irq_work_fn(struct irq_work *w)
8232 queue_work(system_long_wq, &pvclock_gtod_work);
8235 static DEFINE_IRQ_WORK(pvclock_irq_work, pvclock_irq_work_fn);
8238 * Notification about pvclock gtod data update.
8240 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
8243 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
8244 struct timekeeper *tk = priv;
8246 update_pvclock_gtod(tk);
8249 * Disable master clock if host does not trust, or does not use,
8250 * TSC based clocksource. Delegate queue_work() to irq_work as
8251 * this is invoked with tk_core.seq write held.
8253 if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
8254 atomic_read(&kvm_guest_has_master_clock) != 0)
8255 irq_work_queue(&pvclock_irq_work);
8259 static struct notifier_block pvclock_gtod_notifier = {
8260 .notifier_call = pvclock_gtod_notify,
8264 int kvm_arch_init(void *opaque)
8266 struct kvm_x86_init_ops *ops = opaque;
8269 if (kvm_x86_ops.hardware_enable) {
8270 printk(KERN_ERR "kvm: already loaded the other module\n");
8275 if (!ops->cpu_has_kvm_support()) {
8276 pr_err_ratelimited("kvm: no hardware support\n");
8280 if (ops->disabled_by_bios()) {
8281 pr_err_ratelimited("kvm: disabled by bios\n");
8287 * KVM explicitly assumes that the guest has an FPU and
8288 * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
8289 * vCPU's FPU state as a fxregs_state struct.
8291 if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
8292 printk(KERN_ERR "kvm: inadequate fpu\n");
8298 x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
8299 __alignof__(struct fpu), SLAB_ACCOUNT,
8301 if (!x86_fpu_cache) {
8302 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
8306 x86_emulator_cache = kvm_alloc_emulator_cache();
8307 if (!x86_emulator_cache) {
8308 pr_err("kvm: failed to allocate cache for x86 emulator\n");
8309 goto out_free_x86_fpu_cache;
8312 user_return_msrs = alloc_percpu(struct kvm_user_return_msrs);
8313 if (!user_return_msrs) {
8314 printk(KERN_ERR "kvm: failed to allocate percpu kvm_user_return_msrs\n");
8315 goto out_free_x86_emulator_cache;
8317 kvm_nr_uret_msrs = 0;
8319 r = kvm_mmu_module_init();
8321 goto out_free_percpu;
8325 perf_register_guest_info_callbacks(&kvm_guest_cbs);
8327 if (boot_cpu_has(X86_FEATURE_XSAVE)) {
8328 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
8329 supported_xcr0 = host_xcr0 & KVM_SUPPORTED_XCR0;
8332 if (pi_inject_timer == -1)
8333 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
8334 #ifdef CONFIG_X86_64
8335 pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
8337 if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8338 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
8344 free_percpu(user_return_msrs);
8345 out_free_x86_emulator_cache:
8346 kmem_cache_destroy(x86_emulator_cache);
8347 out_free_x86_fpu_cache:
8348 kmem_cache_destroy(x86_fpu_cache);
8353 void kvm_arch_exit(void)
8355 #ifdef CONFIG_X86_64
8356 if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8357 clear_hv_tscchange_cb();
8360 perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
8362 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8363 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
8364 CPUFREQ_TRANSITION_NOTIFIER);
8365 cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
8366 #ifdef CONFIG_X86_64
8367 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
8368 irq_work_sync(&pvclock_irq_work);
8369 cancel_work_sync(&pvclock_gtod_work);
8371 kvm_x86_ops.hardware_enable = NULL;
8372 kvm_mmu_module_exit();
8373 free_percpu(user_return_msrs);
8374 kmem_cache_destroy(x86_emulator_cache);
8375 kmem_cache_destroy(x86_fpu_cache);
8376 #ifdef CONFIG_KVM_XEN
8377 static_key_deferred_flush(&kvm_xen_enabled);
8378 WARN_ON(static_branch_unlikely(&kvm_xen_enabled.key));
8382 static int __kvm_vcpu_halt(struct kvm_vcpu *vcpu, int state, int reason)
8384 ++vcpu->stat.halt_exits;
8385 if (lapic_in_kernel(vcpu)) {
8386 vcpu->arch.mp_state = state;
8389 vcpu->run->exit_reason = reason;
8394 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
8396 return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_HALTED, KVM_EXIT_HLT);
8398 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
8400 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
8402 int ret = kvm_skip_emulated_instruction(vcpu);
8404 * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
8405 * KVM_EXIT_DEBUG here.
8407 return kvm_vcpu_halt(vcpu) && ret;
8409 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
8411 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu)
8413 int ret = kvm_skip_emulated_instruction(vcpu);
8415 return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_AP_RESET_HOLD, KVM_EXIT_AP_RESET_HOLD) && ret;
8417 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold);
8419 #ifdef CONFIG_X86_64
8420 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
8421 unsigned long clock_type)
8423 struct kvm_clock_pairing clock_pairing;
8424 struct timespec64 ts;
8428 if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
8429 return -KVM_EOPNOTSUPP;
8431 if (!kvm_get_walltime_and_clockread(&ts, &cycle))
8432 return -KVM_EOPNOTSUPP;
8434 clock_pairing.sec = ts.tv_sec;
8435 clock_pairing.nsec = ts.tv_nsec;
8436 clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
8437 clock_pairing.flags = 0;
8438 memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
8441 if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
8442 sizeof(struct kvm_clock_pairing)))
8450 * kvm_pv_kick_cpu_op: Kick a vcpu.
8452 * @apicid - apicid of vcpu to be kicked.
8454 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
8456 struct kvm_lapic_irq lapic_irq;
8458 lapic_irq.shorthand = APIC_DEST_NOSHORT;
8459 lapic_irq.dest_mode = APIC_DEST_PHYSICAL;
8460 lapic_irq.level = 0;
8461 lapic_irq.dest_id = apicid;
8462 lapic_irq.msi_redir_hint = false;
8464 lapic_irq.delivery_mode = APIC_DM_REMRD;
8465 kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
8468 bool kvm_apicv_activated(struct kvm *kvm)
8470 return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
8472 EXPORT_SYMBOL_GPL(kvm_apicv_activated);
8474 static void kvm_apicv_init(struct kvm *kvm)
8477 clear_bit(APICV_INHIBIT_REASON_DISABLE,
8478 &kvm->arch.apicv_inhibit_reasons);
8480 set_bit(APICV_INHIBIT_REASON_DISABLE,
8481 &kvm->arch.apicv_inhibit_reasons);
8484 static void kvm_sched_yield(struct kvm_vcpu *vcpu, unsigned long dest_id)
8486 struct kvm_vcpu *target = NULL;
8487 struct kvm_apic_map *map;
8489 vcpu->stat.directed_yield_attempted++;
8491 if (single_task_running())
8495 map = rcu_dereference(vcpu->kvm->arch.apic_map);
8497 if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
8498 target = map->phys_map[dest_id]->vcpu;
8502 if (!target || !READ_ONCE(target->ready))
8505 /* Ignore requests to yield to self */
8509 if (kvm_vcpu_yield_to(target) <= 0)
8512 vcpu->stat.directed_yield_successful++;
8518 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
8520 unsigned long nr, a0, a1, a2, a3, ret;
8523 if (kvm_xen_hypercall_enabled(vcpu->kvm))
8524 return kvm_xen_hypercall(vcpu);
8526 if (kvm_hv_hypercall_enabled(vcpu))
8527 return kvm_hv_hypercall(vcpu);
8529 nr = kvm_rax_read(vcpu);
8530 a0 = kvm_rbx_read(vcpu);
8531 a1 = kvm_rcx_read(vcpu);
8532 a2 = kvm_rdx_read(vcpu);
8533 a3 = kvm_rsi_read(vcpu);
8535 trace_kvm_hypercall(nr, a0, a1, a2, a3);
8537 op_64_bit = is_64_bit_mode(vcpu);
8546 if (static_call(kvm_x86_get_cpl)(vcpu) != 0) {
8554 case KVM_HC_VAPIC_POLL_IRQ:
8557 case KVM_HC_KICK_CPU:
8558 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_UNHALT))
8561 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
8562 kvm_sched_yield(vcpu, a1);
8565 #ifdef CONFIG_X86_64
8566 case KVM_HC_CLOCK_PAIRING:
8567 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
8570 case KVM_HC_SEND_IPI:
8571 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SEND_IPI))
8574 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
8576 case KVM_HC_SCHED_YIELD:
8577 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SCHED_YIELD))
8580 kvm_sched_yield(vcpu, a0);
8590 kvm_rax_write(vcpu, ret);
8592 ++vcpu->stat.hypercalls;
8593 return kvm_skip_emulated_instruction(vcpu);
8595 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
8597 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
8599 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8600 char instruction[3];
8601 unsigned long rip = kvm_rip_read(vcpu);
8603 static_call(kvm_x86_patch_hypercall)(vcpu, instruction);
8605 return emulator_write_emulated(ctxt, rip, instruction, 3,
8609 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
8611 return vcpu->run->request_interrupt_window &&
8612 likely(!pic_in_kernel(vcpu->kvm));
8615 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
8617 struct kvm_run *kvm_run = vcpu->run;
8620 * if_flag is obsolete and useless, so do not bother
8621 * setting it for SEV-ES guests. Userspace can just
8622 * use kvm_run->ready_for_interrupt_injection.
8624 kvm_run->if_flag = !vcpu->arch.guest_state_protected
8625 && (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
8627 kvm_run->cr8 = kvm_get_cr8(vcpu);
8628 kvm_run->apic_base = kvm_get_apic_base(vcpu);
8629 kvm_run->ready_for_interrupt_injection =
8630 pic_in_kernel(vcpu->kvm) ||
8631 kvm_vcpu_ready_for_interrupt_injection(vcpu);
8634 kvm_run->flags |= KVM_RUN_X86_SMM;
8637 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
8641 if (!kvm_x86_ops.update_cr8_intercept)
8644 if (!lapic_in_kernel(vcpu))
8647 if (vcpu->arch.apicv_active)
8650 if (!vcpu->arch.apic->vapic_addr)
8651 max_irr = kvm_lapic_find_highest_irr(vcpu);
8658 tpr = kvm_lapic_get_cr8(vcpu);
8660 static_call(kvm_x86_update_cr8_intercept)(vcpu, tpr, max_irr);
8664 int kvm_check_nested_events(struct kvm_vcpu *vcpu)
8666 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
8667 kvm_x86_ops.nested_ops->triple_fault(vcpu);
8671 return kvm_x86_ops.nested_ops->check_events(vcpu);
8674 static void kvm_inject_exception(struct kvm_vcpu *vcpu)
8676 if (vcpu->arch.exception.error_code && !is_protmode(vcpu))
8677 vcpu->arch.exception.error_code = false;
8678 static_call(kvm_x86_queue_exception)(vcpu);
8681 static int inject_pending_event(struct kvm_vcpu *vcpu, bool *req_immediate_exit)
8684 bool can_inject = true;
8686 /* try to reinject previous events if any */
8688 if (vcpu->arch.exception.injected) {
8689 kvm_inject_exception(vcpu);
8693 * Do not inject an NMI or interrupt if there is a pending
8694 * exception. Exceptions and interrupts are recognized at
8695 * instruction boundaries, i.e. the start of an instruction.
8696 * Trap-like exceptions, e.g. #DB, have higher priority than
8697 * NMIs and interrupts, i.e. traps are recognized before an
8698 * NMI/interrupt that's pending on the same instruction.
8699 * Fault-like exceptions, e.g. #GP and #PF, are the lowest
8700 * priority, but are only generated (pended) during instruction
8701 * execution, i.e. a pending fault-like exception means the
8702 * fault occurred on the *previous* instruction and must be
8703 * serviced prior to recognizing any new events in order to
8704 * fully complete the previous instruction.
8706 else if (!vcpu->arch.exception.pending) {
8707 if (vcpu->arch.nmi_injected) {
8708 static_call(kvm_x86_set_nmi)(vcpu);
8710 } else if (vcpu->arch.interrupt.injected) {
8711 static_call(kvm_x86_set_irq)(vcpu);
8716 WARN_ON_ONCE(vcpu->arch.exception.injected &&
8717 vcpu->arch.exception.pending);
8720 * Call check_nested_events() even if we reinjected a previous event
8721 * in order for caller to determine if it should require immediate-exit
8722 * from L2 to L1 due to pending L1 events which require exit
8725 if (is_guest_mode(vcpu)) {
8726 r = kvm_check_nested_events(vcpu);
8731 /* try to inject new event if pending */
8732 if (vcpu->arch.exception.pending) {
8733 trace_kvm_inj_exception(vcpu->arch.exception.nr,
8734 vcpu->arch.exception.has_error_code,
8735 vcpu->arch.exception.error_code);
8737 vcpu->arch.exception.pending = false;
8738 vcpu->arch.exception.injected = true;
8740 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
8741 __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
8744 if (vcpu->arch.exception.nr == DB_VECTOR) {
8745 kvm_deliver_exception_payload(vcpu);
8746 if (vcpu->arch.dr7 & DR7_GD) {
8747 vcpu->arch.dr7 &= ~DR7_GD;
8748 kvm_update_dr7(vcpu);
8752 kvm_inject_exception(vcpu);
8757 * Finally, inject interrupt events. If an event cannot be injected
8758 * due to architectural conditions (e.g. IF=0) a window-open exit
8759 * will re-request KVM_REQ_EVENT. Sometimes however an event is pending
8760 * and can architecturally be injected, but we cannot do it right now:
8761 * an interrupt could have arrived just now and we have to inject it
8762 * as a vmexit, or there could already an event in the queue, which is
8763 * indicated by can_inject. In that case we request an immediate exit
8764 * in order to make progress and get back here for another iteration.
8765 * The kvm_x86_ops hooks communicate this by returning -EBUSY.
8767 if (vcpu->arch.smi_pending) {
8768 r = can_inject ? static_call(kvm_x86_smi_allowed)(vcpu, true) : -EBUSY;
8772 vcpu->arch.smi_pending = false;
8773 ++vcpu->arch.smi_count;
8777 static_call(kvm_x86_enable_smi_window)(vcpu);
8780 if (vcpu->arch.nmi_pending) {
8781 r = can_inject ? static_call(kvm_x86_nmi_allowed)(vcpu, true) : -EBUSY;
8785 --vcpu->arch.nmi_pending;
8786 vcpu->arch.nmi_injected = true;
8787 static_call(kvm_x86_set_nmi)(vcpu);
8789 WARN_ON(static_call(kvm_x86_nmi_allowed)(vcpu, true) < 0);
8791 if (vcpu->arch.nmi_pending)
8792 static_call(kvm_x86_enable_nmi_window)(vcpu);
8795 if (kvm_cpu_has_injectable_intr(vcpu)) {
8796 r = can_inject ? static_call(kvm_x86_interrupt_allowed)(vcpu, true) : -EBUSY;
8800 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu), false);
8801 static_call(kvm_x86_set_irq)(vcpu);
8802 WARN_ON(static_call(kvm_x86_interrupt_allowed)(vcpu, true) < 0);
8804 if (kvm_cpu_has_injectable_intr(vcpu))
8805 static_call(kvm_x86_enable_irq_window)(vcpu);
8808 if (is_guest_mode(vcpu) &&
8809 kvm_x86_ops.nested_ops->hv_timer_pending &&
8810 kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
8811 *req_immediate_exit = true;
8813 WARN_ON(vcpu->arch.exception.pending);
8818 *req_immediate_exit = true;
8824 static void process_nmi(struct kvm_vcpu *vcpu)
8829 * x86 is limited to one NMI running, and one NMI pending after it.
8830 * If an NMI is already in progress, limit further NMIs to just one.
8831 * Otherwise, allow two (and we'll inject the first one immediately).
8833 if (static_call(kvm_x86_get_nmi_mask)(vcpu) || vcpu->arch.nmi_injected)
8836 vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
8837 vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
8838 kvm_make_request(KVM_REQ_EVENT, vcpu);
8841 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
8844 flags |= seg->g << 23;
8845 flags |= seg->db << 22;
8846 flags |= seg->l << 21;
8847 flags |= seg->avl << 20;
8848 flags |= seg->present << 15;
8849 flags |= seg->dpl << 13;
8850 flags |= seg->s << 12;
8851 flags |= seg->type << 8;
8855 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
8857 struct kvm_segment seg;
8860 kvm_get_segment(vcpu, &seg, n);
8861 put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
8864 offset = 0x7f84 + n * 12;
8866 offset = 0x7f2c + (n - 3) * 12;
8868 put_smstate(u32, buf, offset + 8, seg.base);
8869 put_smstate(u32, buf, offset + 4, seg.limit);
8870 put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
8873 #ifdef CONFIG_X86_64
8874 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
8876 struct kvm_segment seg;
8880 kvm_get_segment(vcpu, &seg, n);
8881 offset = 0x7e00 + n * 16;
8883 flags = enter_smm_get_segment_flags(&seg) >> 8;
8884 put_smstate(u16, buf, offset, seg.selector);
8885 put_smstate(u16, buf, offset + 2, flags);
8886 put_smstate(u32, buf, offset + 4, seg.limit);
8887 put_smstate(u64, buf, offset + 8, seg.base);
8891 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
8894 struct kvm_segment seg;
8898 put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
8899 put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
8900 put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
8901 put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
8903 for (i = 0; i < 8; i++)
8904 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read_raw(vcpu, i));
8906 kvm_get_dr(vcpu, 6, &val);
8907 put_smstate(u32, buf, 0x7fcc, (u32)val);
8908 kvm_get_dr(vcpu, 7, &val);
8909 put_smstate(u32, buf, 0x7fc8, (u32)val);
8911 kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
8912 put_smstate(u32, buf, 0x7fc4, seg.selector);
8913 put_smstate(u32, buf, 0x7f64, seg.base);
8914 put_smstate(u32, buf, 0x7f60, seg.limit);
8915 put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
8917 kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
8918 put_smstate(u32, buf, 0x7fc0, seg.selector);
8919 put_smstate(u32, buf, 0x7f80, seg.base);
8920 put_smstate(u32, buf, 0x7f7c, seg.limit);
8921 put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
8923 static_call(kvm_x86_get_gdt)(vcpu, &dt);
8924 put_smstate(u32, buf, 0x7f74, dt.address);
8925 put_smstate(u32, buf, 0x7f70, dt.size);
8927 static_call(kvm_x86_get_idt)(vcpu, &dt);
8928 put_smstate(u32, buf, 0x7f58, dt.address);
8929 put_smstate(u32, buf, 0x7f54, dt.size);
8931 for (i = 0; i < 6; i++)
8932 enter_smm_save_seg_32(vcpu, buf, i);
8934 put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
8937 put_smstate(u32, buf, 0x7efc, 0x00020000);
8938 put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
8941 #ifdef CONFIG_X86_64
8942 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
8945 struct kvm_segment seg;
8949 for (i = 0; i < 16; i++)
8950 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read_raw(vcpu, i));
8952 put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
8953 put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
8955 kvm_get_dr(vcpu, 6, &val);
8956 put_smstate(u64, buf, 0x7f68, val);
8957 kvm_get_dr(vcpu, 7, &val);
8958 put_smstate(u64, buf, 0x7f60, val);
8960 put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
8961 put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
8962 put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
8964 put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
8967 put_smstate(u32, buf, 0x7efc, 0x00020064);
8969 put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
8971 kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
8972 put_smstate(u16, buf, 0x7e90, seg.selector);
8973 put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
8974 put_smstate(u32, buf, 0x7e94, seg.limit);
8975 put_smstate(u64, buf, 0x7e98, seg.base);
8977 static_call(kvm_x86_get_idt)(vcpu, &dt);
8978 put_smstate(u32, buf, 0x7e84, dt.size);
8979 put_smstate(u64, buf, 0x7e88, dt.address);
8981 kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
8982 put_smstate(u16, buf, 0x7e70, seg.selector);
8983 put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
8984 put_smstate(u32, buf, 0x7e74, seg.limit);
8985 put_smstate(u64, buf, 0x7e78, seg.base);
8987 static_call(kvm_x86_get_gdt)(vcpu, &dt);
8988 put_smstate(u32, buf, 0x7e64, dt.size);
8989 put_smstate(u64, buf, 0x7e68, dt.address);
8991 for (i = 0; i < 6; i++)
8992 enter_smm_save_seg_64(vcpu, buf, i);
8996 static void enter_smm(struct kvm_vcpu *vcpu)
8998 struct kvm_segment cs, ds;
9003 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
9004 memset(buf, 0, 512);
9005 #ifdef CONFIG_X86_64
9006 if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9007 enter_smm_save_state_64(vcpu, buf);
9010 enter_smm_save_state_32(vcpu, buf);
9013 * Give pre_enter_smm() a chance to make ISA-specific changes to the
9014 * vCPU state (e.g. leave guest mode) after we've saved the state into
9015 * the SMM state-save area.
9017 static_call(kvm_x86_pre_enter_smm)(vcpu, buf);
9019 vcpu->arch.hflags |= HF_SMM_MASK;
9020 kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
9022 if (static_call(kvm_x86_get_nmi_mask)(vcpu))
9023 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
9025 static_call(kvm_x86_set_nmi_mask)(vcpu, true);
9027 kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
9028 kvm_rip_write(vcpu, 0x8000);
9030 cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
9031 static_call(kvm_x86_set_cr0)(vcpu, cr0);
9032 vcpu->arch.cr0 = cr0;
9034 static_call(kvm_x86_set_cr4)(vcpu, 0);
9036 /* Undocumented: IDT limit is set to zero on entry to SMM. */
9037 dt.address = dt.size = 0;
9038 static_call(kvm_x86_set_idt)(vcpu, &dt);
9040 kvm_set_dr(vcpu, 7, DR7_FIXED_1);
9042 cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
9043 cs.base = vcpu->arch.smbase;
9048 cs.limit = ds.limit = 0xffffffff;
9049 cs.type = ds.type = 0x3;
9050 cs.dpl = ds.dpl = 0;
9055 cs.avl = ds.avl = 0;
9056 cs.present = ds.present = 1;
9057 cs.unusable = ds.unusable = 0;
9058 cs.padding = ds.padding = 0;
9060 kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
9061 kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
9062 kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
9063 kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
9064 kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
9065 kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
9067 #ifdef CONFIG_X86_64
9068 if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9069 static_call(kvm_x86_set_efer)(vcpu, 0);
9072 kvm_update_cpuid_runtime(vcpu);
9073 kvm_mmu_reset_context(vcpu);
9076 static void process_smi(struct kvm_vcpu *vcpu)
9078 vcpu->arch.smi_pending = true;
9079 kvm_make_request(KVM_REQ_EVENT, vcpu);
9082 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
9083 unsigned long *vcpu_bitmap)
9087 zalloc_cpumask_var(&cpus, GFP_ATOMIC);
9089 kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC,
9090 NULL, vcpu_bitmap, cpus);
9092 free_cpumask_var(cpus);
9095 void kvm_make_scan_ioapic_request(struct kvm *kvm)
9097 kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
9100 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
9102 if (!lapic_in_kernel(vcpu))
9105 vcpu->arch.apicv_active = kvm_apicv_activated(vcpu->kvm);
9106 kvm_apic_update_apicv(vcpu);
9107 static_call(kvm_x86_refresh_apicv_exec_ctrl)(vcpu);
9109 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv);
9112 * NOTE: Do not hold any lock prior to calling this.
9114 * In particular, kvm_request_apicv_update() expects kvm->srcu not to be
9115 * locked, because it calls __x86_set_memory_region() which does
9116 * synchronize_srcu(&kvm->srcu).
9118 void kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
9120 struct kvm_vcpu *except;
9121 unsigned long old, new, expected;
9123 if (!kvm_x86_ops.check_apicv_inhibit_reasons ||
9124 !static_call(kvm_x86_check_apicv_inhibit_reasons)(bit))
9127 old = READ_ONCE(kvm->arch.apicv_inhibit_reasons);
9129 expected = new = old;
9131 __clear_bit(bit, &new);
9133 __set_bit(bit, &new);
9136 old = cmpxchg(&kvm->arch.apicv_inhibit_reasons, expected, new);
9137 } while (old != expected);
9142 trace_kvm_apicv_update_request(activate, bit);
9143 if (kvm_x86_ops.pre_update_apicv_exec_ctrl)
9144 static_call(kvm_x86_pre_update_apicv_exec_ctrl)(kvm, activate);
9147 * Sending request to update APICV for all other vcpus,
9148 * while update the calling vcpu immediately instead of
9149 * waiting for another #VMEXIT to handle the request.
9151 except = kvm_get_running_vcpu();
9152 kvm_make_all_cpus_request_except(kvm, KVM_REQ_APICV_UPDATE,
9155 kvm_vcpu_update_apicv(except);
9157 EXPORT_SYMBOL_GPL(kvm_request_apicv_update);
9159 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
9161 if (!kvm_apic_present(vcpu))
9164 bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
9166 if (irqchip_split(vcpu->kvm))
9167 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
9169 if (vcpu->arch.apicv_active)
9170 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9171 if (ioapic_in_kernel(vcpu->kvm))
9172 kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
9175 if (is_guest_mode(vcpu))
9176 vcpu->arch.load_eoi_exitmap_pending = true;
9178 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
9181 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
9183 u64 eoi_exit_bitmap[4];
9185 if (!kvm_apic_hw_enabled(vcpu->arch.apic))
9188 if (to_hv_vcpu(vcpu))
9189 bitmap_or((ulong *)eoi_exit_bitmap,
9190 vcpu->arch.ioapic_handled_vectors,
9191 to_hv_synic(vcpu)->vec_bitmap, 256);
9193 static_call(kvm_x86_load_eoi_exitmap)(vcpu, eoi_exit_bitmap);
9196 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
9197 unsigned long start, unsigned long end)
9199 unsigned long apic_address;
9202 * The physical address of apic access page is stored in the VMCS.
9203 * Update it when it becomes invalid.
9205 apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
9206 if (start <= apic_address && apic_address < end)
9207 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
9210 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
9212 if (!lapic_in_kernel(vcpu))
9215 if (!kvm_x86_ops.set_apic_access_page_addr)
9218 static_call(kvm_x86_set_apic_access_page_addr)(vcpu);
9221 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
9223 smp_send_reschedule(vcpu->cpu);
9225 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
9228 * Returns 1 to let vcpu_run() continue the guest execution loop without
9229 * exiting to the userspace. Otherwise, the value will be returned to the
9232 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
9236 dm_request_for_irq_injection(vcpu) &&
9237 kvm_cpu_accept_dm_intr(vcpu);
9238 fastpath_t exit_fastpath;
9240 bool req_immediate_exit = false;
9242 /* Forbid vmenter if vcpu dirty ring is soft-full */
9243 if (unlikely(vcpu->kvm->dirty_ring_size &&
9244 kvm_dirty_ring_soft_full(&vcpu->dirty_ring))) {
9245 vcpu->run->exit_reason = KVM_EXIT_DIRTY_RING_FULL;
9246 trace_kvm_dirty_ring_exit(vcpu);
9251 if (kvm_request_pending(vcpu)) {
9252 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu)) {
9253 if (unlikely(!kvm_x86_ops.nested_ops->get_nested_state_pages(vcpu))) {
9258 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
9259 kvm_mmu_unload(vcpu);
9260 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
9261 __kvm_migrate_timers(vcpu);
9262 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
9263 kvm_gen_update_masterclock(vcpu->kvm);
9264 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
9265 kvm_gen_kvmclock_update(vcpu);
9266 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
9267 r = kvm_guest_time_update(vcpu);
9271 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
9272 kvm_mmu_sync_roots(vcpu);
9273 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD, vcpu))
9274 kvm_mmu_load_pgd(vcpu);
9275 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) {
9276 kvm_vcpu_flush_tlb_all(vcpu);
9278 /* Flushing all ASIDs flushes the current ASID... */
9279 kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
9281 if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu))
9282 kvm_vcpu_flush_tlb_current(vcpu);
9283 if (kvm_check_request(KVM_REQ_HV_TLB_FLUSH, vcpu))
9284 kvm_vcpu_flush_tlb_guest(vcpu);
9286 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
9287 vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
9291 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
9292 if (is_guest_mode(vcpu)) {
9293 kvm_x86_ops.nested_ops->triple_fault(vcpu);
9295 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
9296 vcpu->mmio_needed = 0;
9301 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
9302 /* Page is swapped out. Do synthetic halt */
9303 vcpu->arch.apf.halted = true;
9307 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
9308 record_steal_time(vcpu);
9309 if (kvm_check_request(KVM_REQ_SMI, vcpu))
9311 if (kvm_check_request(KVM_REQ_NMI, vcpu))
9313 if (kvm_check_request(KVM_REQ_PMU, vcpu))
9314 kvm_pmu_handle_event(vcpu);
9315 if (kvm_check_request(KVM_REQ_PMI, vcpu))
9316 kvm_pmu_deliver_pmi(vcpu);
9317 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
9318 BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
9319 if (test_bit(vcpu->arch.pending_ioapic_eoi,
9320 vcpu->arch.ioapic_handled_vectors)) {
9321 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
9322 vcpu->run->eoi.vector =
9323 vcpu->arch.pending_ioapic_eoi;
9328 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
9329 vcpu_scan_ioapic(vcpu);
9330 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
9331 vcpu_load_eoi_exitmap(vcpu);
9332 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
9333 kvm_vcpu_reload_apic_access_page(vcpu);
9334 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
9335 vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9336 vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
9340 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
9341 vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9342 vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
9346 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
9347 struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
9349 vcpu->run->exit_reason = KVM_EXIT_HYPERV;
9350 vcpu->run->hyperv = hv_vcpu->exit;
9356 * KVM_REQ_HV_STIMER has to be processed after
9357 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
9358 * depend on the guest clock being up-to-date
9360 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
9361 kvm_hv_process_stimers(vcpu);
9362 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
9363 kvm_vcpu_update_apicv(vcpu);
9364 if (kvm_check_request(KVM_REQ_APF_READY, vcpu))
9365 kvm_check_async_pf_completion(vcpu);
9366 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED, vcpu))
9367 static_call(kvm_x86_msr_filter_changed)(vcpu);
9369 if (kvm_check_request(KVM_REQ_UPDATE_CPU_DIRTY_LOGGING, vcpu))
9370 static_call(kvm_x86_update_cpu_dirty_logging)(vcpu);
9373 if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win ||
9374 kvm_xen_has_interrupt(vcpu)) {
9375 ++vcpu->stat.req_event;
9376 r = kvm_apic_accept_events(vcpu);
9381 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
9386 r = inject_pending_event(vcpu, &req_immediate_exit);
9392 static_call(kvm_x86_enable_irq_window)(vcpu);
9394 if (kvm_lapic_enabled(vcpu)) {
9395 update_cr8_intercept(vcpu);
9396 kvm_lapic_sync_to_vapic(vcpu);
9400 r = kvm_mmu_reload(vcpu);
9402 goto cancel_injection;
9407 static_call(kvm_x86_prepare_guest_switch)(vcpu);
9410 * Disable IRQs before setting IN_GUEST_MODE. Posted interrupt
9411 * IPI are then delayed after guest entry, which ensures that they
9412 * result in virtual interrupt delivery.
9414 local_irq_disable();
9415 vcpu->mode = IN_GUEST_MODE;
9417 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9420 * 1) We should set ->mode before checking ->requests. Please see
9421 * the comment in kvm_vcpu_exiting_guest_mode().
9423 * 2) For APICv, we should set ->mode before checking PID.ON. This
9424 * pairs with the memory barrier implicit in pi_test_and_set_on
9425 * (see vmx_deliver_posted_interrupt).
9427 * 3) This also orders the write to mode from any reads to the page
9428 * tables done while the VCPU is running. Please see the comment
9429 * in kvm_flush_remote_tlbs.
9431 smp_mb__after_srcu_read_unlock();
9434 * This handles the case where a posted interrupt was
9435 * notified with kvm_vcpu_kick.
9437 if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
9438 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9440 if (kvm_vcpu_exit_request(vcpu)) {
9441 vcpu->mode = OUTSIDE_GUEST_MODE;
9445 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9447 goto cancel_injection;
9450 if (req_immediate_exit) {
9451 kvm_make_request(KVM_REQ_EVENT, vcpu);
9452 static_call(kvm_x86_request_immediate_exit)(vcpu);
9455 fpregs_assert_state_consistent();
9456 if (test_thread_flag(TIF_NEED_FPU_LOAD))
9457 switch_fpu_return();
9459 if (unlikely(vcpu->arch.switch_db_regs)) {
9461 set_debugreg(vcpu->arch.eff_db[0], 0);
9462 set_debugreg(vcpu->arch.eff_db[1], 1);
9463 set_debugreg(vcpu->arch.eff_db[2], 2);
9464 set_debugreg(vcpu->arch.eff_db[3], 3);
9465 set_debugreg(vcpu->arch.dr6, 6);
9466 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
9470 exit_fastpath = static_call(kvm_x86_run)(vcpu);
9471 if (likely(exit_fastpath != EXIT_FASTPATH_REENTER_GUEST))
9474 if (unlikely(kvm_vcpu_exit_request(vcpu))) {
9475 exit_fastpath = EXIT_FASTPATH_EXIT_HANDLED;
9479 if (vcpu->arch.apicv_active)
9480 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9484 * Do this here before restoring debug registers on the host. And
9485 * since we do this before handling the vmexit, a DR access vmexit
9486 * can (a) read the correct value of the debug registers, (b) set
9487 * KVM_DEBUGREG_WONT_EXIT again.
9489 if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
9490 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
9491 static_call(kvm_x86_sync_dirty_debug_regs)(vcpu);
9492 kvm_update_dr0123(vcpu);
9493 kvm_update_dr7(vcpu);
9494 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
9498 * If the guest has used debug registers, at least dr7
9499 * will be disabled while returning to the host.
9500 * If we don't have active breakpoints in the host, we don't
9501 * care about the messed up debug address registers. But if
9502 * we have some of them active, restore the old state.
9504 if (hw_breakpoint_active())
9505 hw_breakpoint_restore();
9507 vcpu->arch.last_vmentry_cpu = vcpu->cpu;
9508 vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
9510 vcpu->mode = OUTSIDE_GUEST_MODE;
9513 static_call(kvm_x86_handle_exit_irqoff)(vcpu);
9516 * Consume any pending interrupts, including the possible source of
9517 * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
9518 * An instruction is required after local_irq_enable() to fully unblock
9519 * interrupts on processors that implement an interrupt shadow, the
9520 * stat.exits increment will do nicely.
9522 kvm_before_interrupt(vcpu);
9525 local_irq_disable();
9526 kvm_after_interrupt(vcpu);
9529 * Wait until after servicing IRQs to account guest time so that any
9530 * ticks that occurred while running the guest are properly accounted
9531 * to the guest. Waiting until IRQs are enabled degrades the accuracy
9532 * of accounting via context tracking, but the loss of accuracy is
9533 * acceptable for all known use cases.
9535 vtime_account_guest_exit();
9537 if (lapic_in_kernel(vcpu)) {
9538 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
9539 if (delta != S64_MIN) {
9540 trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
9541 vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
9548 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9551 * Profile KVM exit RIPs:
9553 if (unlikely(prof_on == KVM_PROFILING)) {
9554 unsigned long rip = kvm_rip_read(vcpu);
9555 profile_hit(KVM_PROFILING, (void *)rip);
9558 if (unlikely(vcpu->arch.tsc_always_catchup))
9559 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
9561 if (vcpu->arch.apic_attention)
9562 kvm_lapic_sync_from_vapic(vcpu);
9564 r = static_call(kvm_x86_handle_exit)(vcpu, exit_fastpath);
9568 if (req_immediate_exit)
9569 kvm_make_request(KVM_REQ_EVENT, vcpu);
9570 static_call(kvm_x86_cancel_injection)(vcpu);
9571 if (unlikely(vcpu->arch.apic_attention))
9572 kvm_lapic_sync_from_vapic(vcpu);
9577 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
9579 if (!kvm_arch_vcpu_runnable(vcpu) &&
9580 (!kvm_x86_ops.pre_block || static_call(kvm_x86_pre_block)(vcpu) == 0)) {
9581 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9582 kvm_vcpu_block(vcpu);
9583 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9585 if (kvm_x86_ops.post_block)
9586 static_call(kvm_x86_post_block)(vcpu);
9588 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
9592 if (kvm_apic_accept_events(vcpu) < 0)
9594 switch(vcpu->arch.mp_state) {
9595 case KVM_MP_STATE_HALTED:
9596 case KVM_MP_STATE_AP_RESET_HOLD:
9597 vcpu->arch.pv.pv_unhalted = false;
9598 vcpu->arch.mp_state =
9599 KVM_MP_STATE_RUNNABLE;
9601 case KVM_MP_STATE_RUNNABLE:
9602 vcpu->arch.apf.halted = false;
9604 case KVM_MP_STATE_INIT_RECEIVED:
9612 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
9614 if (is_guest_mode(vcpu))
9615 kvm_check_nested_events(vcpu);
9617 return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
9618 !vcpu->arch.apf.halted);
9621 static int vcpu_run(struct kvm_vcpu *vcpu)
9624 struct kvm *kvm = vcpu->kvm;
9626 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9627 vcpu->arch.l1tf_flush_l1d = true;
9630 if (kvm_vcpu_running(vcpu)) {
9631 r = vcpu_enter_guest(vcpu);
9633 r = vcpu_block(kvm, vcpu);
9639 kvm_clear_request(KVM_REQ_UNBLOCK, vcpu);
9640 if (kvm_cpu_has_pending_timer(vcpu))
9641 kvm_inject_pending_timer_irqs(vcpu);
9643 if (dm_request_for_irq_injection(vcpu) &&
9644 kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
9646 vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
9647 ++vcpu->stat.request_irq_exits;
9651 if (__xfer_to_guest_mode_work_pending()) {
9652 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9653 r = xfer_to_guest_mode_handle_work(vcpu);
9656 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9660 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9665 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
9669 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9670 r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
9671 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9675 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
9677 BUG_ON(!vcpu->arch.pio.count);
9679 return complete_emulated_io(vcpu);
9683 * Implements the following, as a state machine:
9687 * for each mmio piece in the fragment
9695 * for each mmio piece in the fragment
9700 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
9702 struct kvm_run *run = vcpu->run;
9703 struct kvm_mmio_fragment *frag;
9706 BUG_ON(!vcpu->mmio_needed);
9708 /* Complete previous fragment */
9709 frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
9710 len = min(8u, frag->len);
9711 if (!vcpu->mmio_is_write)
9712 memcpy(frag->data, run->mmio.data, len);
9714 if (frag->len <= 8) {
9715 /* Switch to the next fragment. */
9717 vcpu->mmio_cur_fragment++;
9719 /* Go forward to the next mmio piece. */
9725 if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
9726 vcpu->mmio_needed = 0;
9728 /* FIXME: return into emulator if single-stepping. */
9729 if (vcpu->mmio_is_write)
9731 vcpu->mmio_read_completed = 1;
9732 return complete_emulated_io(vcpu);
9735 run->exit_reason = KVM_EXIT_MMIO;
9736 run->mmio.phys_addr = frag->gpa;
9737 if (vcpu->mmio_is_write)
9738 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
9739 run->mmio.len = min(8u, frag->len);
9740 run->mmio.is_write = vcpu->mmio_is_write;
9741 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
9745 static void kvm_save_current_fpu(struct fpu *fpu)
9748 * If the target FPU state is not resident in the CPU registers, just
9749 * memcpy() from current, else save CPU state directly to the target.
9751 if (test_thread_flag(TIF_NEED_FPU_LOAD))
9752 memcpy(&fpu->state, ¤t->thread.fpu.state,
9753 fpu_kernel_xstate_size);
9755 copy_fpregs_to_fpstate(fpu);
9758 /* Swap (qemu) user FPU context for the guest FPU context. */
9759 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
9763 kvm_save_current_fpu(vcpu->arch.user_fpu);
9766 * Guests with protected state can't have it set by the hypervisor,
9767 * so skip trying to set it.
9769 if (vcpu->arch.guest_fpu)
9770 /* PKRU is separately restored in kvm_x86_ops.run. */
9771 __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu->state,
9772 ~XFEATURE_MASK_PKRU);
9774 fpregs_mark_activate();
9780 /* When vcpu_run ends, restore user space FPU context. */
9781 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
9786 * Guests with protected state can't have it read by the hypervisor,
9787 * so skip trying to save it.
9789 if (vcpu->arch.guest_fpu)
9790 kvm_save_current_fpu(vcpu->arch.guest_fpu);
9792 copy_kernel_to_fpregs(&vcpu->arch.user_fpu->state);
9794 fpregs_mark_activate();
9797 ++vcpu->stat.fpu_reload;
9801 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
9803 struct kvm_run *kvm_run = vcpu->run;
9807 kvm_sigset_activate(vcpu);
9809 kvm_load_guest_fpu(vcpu);
9811 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
9812 if (kvm_run->immediate_exit) {
9816 kvm_vcpu_block(vcpu);
9817 if (kvm_apic_accept_events(vcpu) < 0) {
9821 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
9823 if (signal_pending(current)) {
9825 kvm_run->exit_reason = KVM_EXIT_INTR;
9826 ++vcpu->stat.signal_exits;
9831 if (kvm_run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
9836 if (kvm_run->kvm_dirty_regs) {
9837 r = sync_regs(vcpu);
9842 /* re-sync apic's tpr */
9843 if (!lapic_in_kernel(vcpu)) {
9844 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
9850 if (unlikely(vcpu->arch.complete_userspace_io)) {
9851 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
9852 vcpu->arch.complete_userspace_io = NULL;
9857 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
9859 if (kvm_run->immediate_exit)
9865 kvm_put_guest_fpu(vcpu);
9866 if (kvm_run->kvm_valid_regs)
9868 post_kvm_run_save(vcpu);
9869 kvm_sigset_deactivate(vcpu);
9875 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9877 if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
9879 * We are here if userspace calls get_regs() in the middle of
9880 * instruction emulation. Registers state needs to be copied
9881 * back from emulation context to vcpu. Userspace shouldn't do
9882 * that usually, but some bad designed PV devices (vmware
9883 * backdoor interface) need this to work
9885 emulator_writeback_register_cache(vcpu->arch.emulate_ctxt);
9886 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
9888 regs->rax = kvm_rax_read(vcpu);
9889 regs->rbx = kvm_rbx_read(vcpu);
9890 regs->rcx = kvm_rcx_read(vcpu);
9891 regs->rdx = kvm_rdx_read(vcpu);
9892 regs->rsi = kvm_rsi_read(vcpu);
9893 regs->rdi = kvm_rdi_read(vcpu);
9894 regs->rsp = kvm_rsp_read(vcpu);
9895 regs->rbp = kvm_rbp_read(vcpu);
9896 #ifdef CONFIG_X86_64
9897 regs->r8 = kvm_r8_read(vcpu);
9898 regs->r9 = kvm_r9_read(vcpu);
9899 regs->r10 = kvm_r10_read(vcpu);
9900 regs->r11 = kvm_r11_read(vcpu);
9901 regs->r12 = kvm_r12_read(vcpu);
9902 regs->r13 = kvm_r13_read(vcpu);
9903 regs->r14 = kvm_r14_read(vcpu);
9904 regs->r15 = kvm_r15_read(vcpu);
9907 regs->rip = kvm_rip_read(vcpu);
9908 regs->rflags = kvm_get_rflags(vcpu);
9911 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9914 __get_regs(vcpu, regs);
9919 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9921 vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
9922 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
9924 kvm_rax_write(vcpu, regs->rax);
9925 kvm_rbx_write(vcpu, regs->rbx);
9926 kvm_rcx_write(vcpu, regs->rcx);
9927 kvm_rdx_write(vcpu, regs->rdx);
9928 kvm_rsi_write(vcpu, regs->rsi);
9929 kvm_rdi_write(vcpu, regs->rdi);
9930 kvm_rsp_write(vcpu, regs->rsp);
9931 kvm_rbp_write(vcpu, regs->rbp);
9932 #ifdef CONFIG_X86_64
9933 kvm_r8_write(vcpu, regs->r8);
9934 kvm_r9_write(vcpu, regs->r9);
9935 kvm_r10_write(vcpu, regs->r10);
9936 kvm_r11_write(vcpu, regs->r11);
9937 kvm_r12_write(vcpu, regs->r12);
9938 kvm_r13_write(vcpu, regs->r13);
9939 kvm_r14_write(vcpu, regs->r14);
9940 kvm_r15_write(vcpu, regs->r15);
9943 kvm_rip_write(vcpu, regs->rip);
9944 kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
9946 vcpu->arch.exception.pending = false;
9948 kvm_make_request(KVM_REQ_EVENT, vcpu);
9951 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9954 __set_regs(vcpu, regs);
9959 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
9961 struct kvm_segment cs;
9963 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
9967 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
9969 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9973 if (vcpu->arch.guest_state_protected)
9974 goto skip_protected_regs;
9976 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
9977 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
9978 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
9979 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
9980 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
9981 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
9983 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
9984 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
9986 static_call(kvm_x86_get_idt)(vcpu, &dt);
9987 sregs->idt.limit = dt.size;
9988 sregs->idt.base = dt.address;
9989 static_call(kvm_x86_get_gdt)(vcpu, &dt);
9990 sregs->gdt.limit = dt.size;
9991 sregs->gdt.base = dt.address;
9993 sregs->cr2 = vcpu->arch.cr2;
9994 sregs->cr3 = kvm_read_cr3(vcpu);
9996 skip_protected_regs:
9997 sregs->cr0 = kvm_read_cr0(vcpu);
9998 sregs->cr4 = kvm_read_cr4(vcpu);
9999 sregs->cr8 = kvm_get_cr8(vcpu);
10000 sregs->efer = vcpu->arch.efer;
10001 sregs->apic_base = kvm_get_apic_base(vcpu);
10003 memset(sregs->interrupt_bitmap, 0, sizeof(sregs->interrupt_bitmap));
10005 if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
10006 set_bit(vcpu->arch.interrupt.nr,
10007 (unsigned long *)sregs->interrupt_bitmap);
10010 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
10011 struct kvm_sregs *sregs)
10014 __get_sregs(vcpu, sregs);
10019 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
10020 struct kvm_mp_state *mp_state)
10025 if (kvm_mpx_supported())
10026 kvm_load_guest_fpu(vcpu);
10028 r = kvm_apic_accept_events(vcpu);
10033 if ((vcpu->arch.mp_state == KVM_MP_STATE_HALTED ||
10034 vcpu->arch.mp_state == KVM_MP_STATE_AP_RESET_HOLD) &&
10035 vcpu->arch.pv.pv_unhalted)
10036 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
10038 mp_state->mp_state = vcpu->arch.mp_state;
10041 if (kvm_mpx_supported())
10042 kvm_put_guest_fpu(vcpu);
10047 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
10048 struct kvm_mp_state *mp_state)
10054 if (!lapic_in_kernel(vcpu) &&
10055 mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
10059 * KVM_MP_STATE_INIT_RECEIVED means the processor is in
10060 * INIT state; latched init should be reported using
10061 * KVM_SET_VCPU_EVENTS, so reject it here.
10063 if ((kvm_vcpu_latch_init(vcpu) || vcpu->arch.smi_pending) &&
10064 (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
10065 mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
10068 if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
10069 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
10070 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
10072 vcpu->arch.mp_state = mp_state->mp_state;
10073 kvm_make_request(KVM_REQ_EVENT, vcpu);
10081 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
10082 int reason, bool has_error_code, u32 error_code)
10084 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
10087 init_emulate_ctxt(vcpu);
10089 ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
10090 has_error_code, error_code);
10092 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
10093 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
10094 vcpu->run->internal.ndata = 0;
10098 kvm_rip_write(vcpu, ctxt->eip);
10099 kvm_set_rflags(vcpu, ctxt->eflags);
10102 EXPORT_SYMBOL_GPL(kvm_task_switch);
10104 static bool kvm_is_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10106 if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
10108 * When EFER.LME and CR0.PG are set, the processor is in
10109 * 64-bit mode (though maybe in a 32-bit code segment).
10110 * CR4.PAE and EFER.LMA must be set.
10112 if (!(sregs->cr4 & X86_CR4_PAE) || !(sregs->efer & EFER_LMA))
10114 if (kvm_vcpu_is_illegal_gpa(vcpu, sregs->cr3))
10118 * Not in 64-bit mode: EFER.LMA is clear and the code
10119 * segment cannot be 64-bit.
10121 if (sregs->efer & EFER_LMA || sregs->cs.l)
10125 return kvm_is_valid_cr4(vcpu, sregs->cr4);
10128 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10130 struct msr_data apic_base_msr;
10131 int mmu_reset_needed = 0;
10132 int pending_vec, max_bits, idx;
10133 struct desc_ptr dt;
10136 if (!kvm_is_valid_sregs(vcpu, sregs))
10139 apic_base_msr.data = sregs->apic_base;
10140 apic_base_msr.host_initiated = true;
10141 if (kvm_set_apic_base(vcpu, &apic_base_msr))
10144 if (vcpu->arch.guest_state_protected)
10145 goto skip_protected_regs;
10147 dt.size = sregs->idt.limit;
10148 dt.address = sregs->idt.base;
10149 static_call(kvm_x86_set_idt)(vcpu, &dt);
10150 dt.size = sregs->gdt.limit;
10151 dt.address = sregs->gdt.base;
10152 static_call(kvm_x86_set_gdt)(vcpu, &dt);
10154 vcpu->arch.cr2 = sregs->cr2;
10155 mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
10156 vcpu->arch.cr3 = sregs->cr3;
10157 kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
10159 kvm_set_cr8(vcpu, sregs->cr8);
10161 mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
10162 static_call(kvm_x86_set_efer)(vcpu, sregs->efer);
10164 mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
10165 static_call(kvm_x86_set_cr0)(vcpu, sregs->cr0);
10166 vcpu->arch.cr0 = sregs->cr0;
10168 mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
10169 static_call(kvm_x86_set_cr4)(vcpu, sregs->cr4);
10171 idx = srcu_read_lock(&vcpu->kvm->srcu);
10172 if (is_pae_paging(vcpu)) {
10173 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
10174 mmu_reset_needed = 1;
10176 srcu_read_unlock(&vcpu->kvm->srcu, idx);
10178 if (mmu_reset_needed)
10179 kvm_mmu_reset_context(vcpu);
10181 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10182 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10183 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10184 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10185 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10186 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10188 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10189 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10191 update_cr8_intercept(vcpu);
10193 /* Older userspace won't unhalt the vcpu on reset. */
10194 if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
10195 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
10196 !is_protmode(vcpu))
10197 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10199 skip_protected_regs:
10200 max_bits = KVM_NR_INTERRUPTS;
10201 pending_vec = find_first_bit(
10202 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
10203 if (pending_vec < max_bits) {
10204 kvm_queue_interrupt(vcpu, pending_vec, false);
10205 pr_debug("Set back pending irq %d\n", pending_vec);
10208 kvm_make_request(KVM_REQ_EVENT, vcpu);
10215 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
10216 struct kvm_sregs *sregs)
10221 ret = __set_sregs(vcpu, sregs);
10226 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
10227 struct kvm_guest_debug *dbg)
10229 unsigned long rflags;
10232 if (vcpu->arch.guest_state_protected)
10237 if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
10239 if (vcpu->arch.exception.pending)
10241 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
10242 kvm_queue_exception(vcpu, DB_VECTOR);
10244 kvm_queue_exception(vcpu, BP_VECTOR);
10248 * Read rflags as long as potentially injected trace flags are still
10251 rflags = kvm_get_rflags(vcpu);
10253 vcpu->guest_debug = dbg->control;
10254 if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
10255 vcpu->guest_debug = 0;
10257 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
10258 for (i = 0; i < KVM_NR_DB_REGS; ++i)
10259 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
10260 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
10262 for (i = 0; i < KVM_NR_DB_REGS; i++)
10263 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
10265 kvm_update_dr7(vcpu);
10267 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
10268 vcpu->arch.singlestep_rip = kvm_get_linear_rip(vcpu);
10271 * Trigger an rflags update that will inject or remove the trace
10274 kvm_set_rflags(vcpu, rflags);
10276 static_call(kvm_x86_update_exception_bitmap)(vcpu);
10286 * Translate a guest virtual address to a guest physical address.
10288 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
10289 struct kvm_translation *tr)
10291 unsigned long vaddr = tr->linear_address;
10297 idx = srcu_read_lock(&vcpu->kvm->srcu);
10298 gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
10299 srcu_read_unlock(&vcpu->kvm->srcu, idx);
10300 tr->physical_address = gpa;
10301 tr->valid = gpa != UNMAPPED_GVA;
10309 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10311 struct fxregs_state *fxsave;
10313 if (!vcpu->arch.guest_fpu)
10318 fxsave = &vcpu->arch.guest_fpu->state.fxsave;
10319 memcpy(fpu->fpr, fxsave->st_space, 128);
10320 fpu->fcw = fxsave->cwd;
10321 fpu->fsw = fxsave->swd;
10322 fpu->ftwx = fxsave->twd;
10323 fpu->last_opcode = fxsave->fop;
10324 fpu->last_ip = fxsave->rip;
10325 fpu->last_dp = fxsave->rdp;
10326 memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
10332 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10334 struct fxregs_state *fxsave;
10336 if (!vcpu->arch.guest_fpu)
10341 fxsave = &vcpu->arch.guest_fpu->state.fxsave;
10343 memcpy(fxsave->st_space, fpu->fpr, 128);
10344 fxsave->cwd = fpu->fcw;
10345 fxsave->swd = fpu->fsw;
10346 fxsave->twd = fpu->ftwx;
10347 fxsave->fop = fpu->last_opcode;
10348 fxsave->rip = fpu->last_ip;
10349 fxsave->rdp = fpu->last_dp;
10350 memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
10356 static void store_regs(struct kvm_vcpu *vcpu)
10358 BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
10360 if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
10361 __get_regs(vcpu, &vcpu->run->s.regs.regs);
10363 if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
10364 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
10366 if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
10367 kvm_vcpu_ioctl_x86_get_vcpu_events(
10368 vcpu, &vcpu->run->s.regs.events);
10371 static int sync_regs(struct kvm_vcpu *vcpu)
10373 if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
10376 if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
10377 __set_regs(vcpu, &vcpu->run->s.regs.regs);
10378 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
10380 if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
10381 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
10383 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
10385 if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
10386 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
10387 vcpu, &vcpu->run->s.regs.events))
10389 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
10395 static void fx_init(struct kvm_vcpu *vcpu)
10397 if (!vcpu->arch.guest_fpu)
10400 fpstate_init(&vcpu->arch.guest_fpu->state);
10401 if (boot_cpu_has(X86_FEATURE_XSAVES))
10402 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
10403 host_xcr0 | XSTATE_COMPACTION_ENABLED;
10406 * Ensure guest xcr0 is valid for loading
10408 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10410 vcpu->arch.cr0 |= X86_CR0_ET;
10413 void kvm_free_guest_fpu(struct kvm_vcpu *vcpu)
10415 if (vcpu->arch.guest_fpu) {
10416 kmem_cache_free(x86_fpu_cache, vcpu->arch.guest_fpu);
10417 vcpu->arch.guest_fpu = NULL;
10420 EXPORT_SYMBOL_GPL(kvm_free_guest_fpu);
10422 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
10424 if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
10425 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
10426 "guest TSC will not be reliable\n");
10431 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
10436 if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
10437 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10439 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
10441 r = kvm_mmu_create(vcpu);
10445 if (irqchip_in_kernel(vcpu->kvm)) {
10446 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
10448 goto fail_mmu_destroy;
10449 if (kvm_apicv_activated(vcpu->kvm))
10450 vcpu->arch.apicv_active = true;
10452 static_branch_inc(&kvm_has_noapic_vcpu);
10456 page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO);
10458 goto fail_free_lapic;
10459 vcpu->arch.pio_data = page_address(page);
10461 vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
10462 GFP_KERNEL_ACCOUNT);
10463 if (!vcpu->arch.mce_banks)
10464 goto fail_free_pio_data;
10465 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
10467 if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
10468 GFP_KERNEL_ACCOUNT))
10469 goto fail_free_mce_banks;
10471 if (!alloc_emulate_ctxt(vcpu))
10472 goto free_wbinvd_dirty_mask;
10474 vcpu->arch.user_fpu = kmem_cache_zalloc(x86_fpu_cache,
10475 GFP_KERNEL_ACCOUNT);
10476 if (!vcpu->arch.user_fpu) {
10477 pr_err("kvm: failed to allocate userspace's fpu\n");
10478 goto free_emulate_ctxt;
10481 vcpu->arch.guest_fpu = kmem_cache_zalloc(x86_fpu_cache,
10482 GFP_KERNEL_ACCOUNT);
10483 if (!vcpu->arch.guest_fpu) {
10484 pr_err("kvm: failed to allocate vcpu's fpu\n");
10485 goto free_user_fpu;
10489 vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
10490 vcpu->arch.reserved_gpa_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu);
10492 vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
10494 kvm_async_pf_hash_reset(vcpu);
10495 kvm_pmu_init(vcpu);
10497 vcpu->arch.pending_external_vector = -1;
10498 vcpu->arch.preempted_in_kernel = false;
10500 r = static_call(kvm_x86_vcpu_create)(vcpu);
10502 goto free_guest_fpu;
10504 vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
10505 vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
10506 kvm_vcpu_mtrr_init(vcpu);
10508 kvm_set_tsc_khz(vcpu, max_tsc_khz);
10509 kvm_vcpu_reset(vcpu, false);
10510 kvm_init_mmu(vcpu, false);
10515 kvm_free_guest_fpu(vcpu);
10517 kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
10519 kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10520 free_wbinvd_dirty_mask:
10521 free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10522 fail_free_mce_banks:
10523 kfree(vcpu->arch.mce_banks);
10524 fail_free_pio_data:
10525 free_page((unsigned long)vcpu->arch.pio_data);
10527 kvm_free_lapic(vcpu);
10529 kvm_mmu_destroy(vcpu);
10533 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
10535 struct kvm *kvm = vcpu->kvm;
10537 if (mutex_lock_killable(&vcpu->mutex))
10540 kvm_synchronize_tsc(vcpu, 0);
10543 /* poll control enabled by default */
10544 vcpu->arch.msr_kvm_poll_control = 1;
10546 mutex_unlock(&vcpu->mutex);
10548 if (kvmclock_periodic_sync && vcpu->vcpu_idx == 0)
10549 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
10550 KVMCLOCK_SYNC_PERIOD);
10553 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
10555 struct gfn_to_pfn_cache *cache = &vcpu->arch.st.cache;
10558 kvm_release_pfn(cache->pfn, cache->dirty, cache);
10560 kvmclock_reset(vcpu);
10562 static_call(kvm_x86_vcpu_free)(vcpu);
10564 kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10565 free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10566 kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
10567 kvm_free_guest_fpu(vcpu);
10569 kvm_hv_vcpu_uninit(vcpu);
10570 kvm_pmu_destroy(vcpu);
10571 kfree(vcpu->arch.mce_banks);
10572 kvm_free_lapic(vcpu);
10573 idx = srcu_read_lock(&vcpu->kvm->srcu);
10574 kvm_mmu_destroy(vcpu);
10575 srcu_read_unlock(&vcpu->kvm->srcu, idx);
10576 free_page((unsigned long)vcpu->arch.pio_data);
10577 kvfree(vcpu->arch.cpuid_entries);
10578 if (!lapic_in_kernel(vcpu))
10579 static_branch_dec(&kvm_has_noapic_vcpu);
10582 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
10584 kvm_lapic_reset(vcpu, init_event);
10586 vcpu->arch.hflags = 0;
10588 vcpu->arch.smi_pending = 0;
10589 vcpu->arch.smi_count = 0;
10590 atomic_set(&vcpu->arch.nmi_queued, 0);
10591 vcpu->arch.nmi_pending = 0;
10592 vcpu->arch.nmi_injected = false;
10593 kvm_clear_interrupt_queue(vcpu);
10594 kvm_clear_exception_queue(vcpu);
10596 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
10597 kvm_update_dr0123(vcpu);
10598 vcpu->arch.dr6 = DR6_ACTIVE_LOW;
10599 vcpu->arch.dr7 = DR7_FIXED_1;
10600 kvm_update_dr7(vcpu);
10602 vcpu->arch.cr2 = 0;
10604 kvm_make_request(KVM_REQ_EVENT, vcpu);
10605 vcpu->arch.apf.msr_en_val = 0;
10606 vcpu->arch.apf.msr_int_val = 0;
10607 vcpu->arch.st.msr_val = 0;
10609 kvmclock_reset(vcpu);
10611 kvm_clear_async_pf_completion_queue(vcpu);
10612 kvm_async_pf_hash_reset(vcpu);
10613 vcpu->arch.apf.halted = false;
10615 if (vcpu->arch.guest_fpu && kvm_mpx_supported()) {
10616 void *mpx_state_buffer;
10619 * To avoid have the INIT path from kvm_apic_has_events() that be
10620 * called with loaded FPU and does not let userspace fix the state.
10623 kvm_put_guest_fpu(vcpu);
10624 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10626 if (mpx_state_buffer)
10627 memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
10628 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10630 if (mpx_state_buffer)
10631 memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
10633 kvm_load_guest_fpu(vcpu);
10637 kvm_pmu_reset(vcpu);
10638 vcpu->arch.smbase = 0x30000;
10640 vcpu->arch.msr_misc_features_enables = 0;
10642 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10645 memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
10646 vcpu->arch.regs_avail = ~0;
10647 vcpu->arch.regs_dirty = ~0;
10649 vcpu->arch.ia32_xss = 0;
10651 static_call(kvm_x86_vcpu_reset)(vcpu, init_event);
10654 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
10656 struct kvm_segment cs;
10658 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
10659 cs.selector = vector << 8;
10660 cs.base = vector << 12;
10661 kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
10662 kvm_rip_write(vcpu, 0);
10664 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector);
10666 int kvm_arch_hardware_enable(void)
10669 struct kvm_vcpu *vcpu;
10674 bool stable, backwards_tsc = false;
10676 kvm_user_return_msr_cpu_online();
10677 ret = static_call(kvm_x86_hardware_enable)();
10681 local_tsc = rdtsc();
10682 stable = !kvm_check_tsc_unstable();
10683 list_for_each_entry(kvm, &vm_list, vm_list) {
10684 kvm_for_each_vcpu(i, vcpu, kvm) {
10685 if (!stable && vcpu->cpu == smp_processor_id())
10686 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
10687 if (stable && vcpu->arch.last_host_tsc > local_tsc) {
10688 backwards_tsc = true;
10689 if (vcpu->arch.last_host_tsc > max_tsc)
10690 max_tsc = vcpu->arch.last_host_tsc;
10696 * Sometimes, even reliable TSCs go backwards. This happens on
10697 * platforms that reset TSC during suspend or hibernate actions, but
10698 * maintain synchronization. We must compensate. Fortunately, we can
10699 * detect that condition here, which happens early in CPU bringup,
10700 * before any KVM threads can be running. Unfortunately, we can't
10701 * bring the TSCs fully up to date with real time, as we aren't yet far
10702 * enough into CPU bringup that we know how much real time has actually
10703 * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
10704 * variables that haven't been updated yet.
10706 * So we simply find the maximum observed TSC above, then record the
10707 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
10708 * the adjustment will be applied. Note that we accumulate
10709 * adjustments, in case multiple suspend cycles happen before some VCPU
10710 * gets a chance to run again. In the event that no KVM threads get a
10711 * chance to run, we will miss the entire elapsed period, as we'll have
10712 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
10713 * loose cycle time. This isn't too big a deal, since the loss will be
10714 * uniform across all VCPUs (not to mention the scenario is extremely
10715 * unlikely). It is possible that a second hibernate recovery happens
10716 * much faster than a first, causing the observed TSC here to be
10717 * smaller; this would require additional padding adjustment, which is
10718 * why we set last_host_tsc to the local tsc observed here.
10720 * N.B. - this code below runs only on platforms with reliable TSC,
10721 * as that is the only way backwards_tsc is set above. Also note
10722 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
10723 * have the same delta_cyc adjustment applied if backwards_tsc
10724 * is detected. Note further, this adjustment is only done once,
10725 * as we reset last_host_tsc on all VCPUs to stop this from being
10726 * called multiple times (one for each physical CPU bringup).
10728 * Platforms with unreliable TSCs don't have to deal with this, they
10729 * will be compensated by the logic in vcpu_load, which sets the TSC to
10730 * catchup mode. This will catchup all VCPUs to real time, but cannot
10731 * guarantee that they stay in perfect synchronization.
10733 if (backwards_tsc) {
10734 u64 delta_cyc = max_tsc - local_tsc;
10735 list_for_each_entry(kvm, &vm_list, vm_list) {
10736 kvm->arch.backwards_tsc_observed = true;
10737 kvm_for_each_vcpu(i, vcpu, kvm) {
10738 vcpu->arch.tsc_offset_adjustment += delta_cyc;
10739 vcpu->arch.last_host_tsc = local_tsc;
10740 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
10744 * We have to disable TSC offset matching.. if you were
10745 * booting a VM while issuing an S4 host suspend....
10746 * you may have some problem. Solving this issue is
10747 * left as an exercise to the reader.
10749 kvm->arch.last_tsc_nsec = 0;
10750 kvm->arch.last_tsc_write = 0;
10757 void kvm_arch_hardware_disable(void)
10759 static_call(kvm_x86_hardware_disable)();
10760 drop_user_return_notifiers();
10763 int kvm_arch_hardware_setup(void *opaque)
10765 struct kvm_x86_init_ops *ops = opaque;
10768 rdmsrl_safe(MSR_EFER, &host_efer);
10770 if (boot_cpu_has(X86_FEATURE_XSAVES))
10771 rdmsrl(MSR_IA32_XSS, host_xss);
10773 r = ops->hardware_setup();
10777 memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops));
10778 kvm_ops_static_call_update();
10780 if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
10783 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
10784 cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
10785 #undef __kvm_cpu_cap_has
10787 if (kvm_has_tsc_control) {
10789 * Make sure the user can only configure tsc_khz values that
10790 * fit into a signed integer.
10791 * A min value is not calculated because it will always
10792 * be 1 on all machines.
10794 u64 max = min(0x7fffffffULL,
10795 __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
10796 kvm_max_guest_tsc_khz = max;
10798 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
10801 kvm_init_msr_list();
10805 void kvm_arch_hardware_unsetup(void)
10807 static_call(kvm_x86_hardware_unsetup)();
10810 int kvm_arch_check_processor_compat(void *opaque)
10812 struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
10813 struct kvm_x86_init_ops *ops = opaque;
10815 WARN_ON(!irqs_disabled());
10817 if (__cr4_reserved_bits(cpu_has, c) !=
10818 __cr4_reserved_bits(cpu_has, &boot_cpu_data))
10821 return ops->check_processor_compatibility();
10824 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
10826 return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
10828 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
10830 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
10832 return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
10835 __read_mostly DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu);
10836 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu);
10838 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
10840 struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
10842 vcpu->arch.l1tf_flush_l1d = true;
10843 if (pmu->version && unlikely(pmu->event_count)) {
10844 pmu->need_cleanup = true;
10845 kvm_make_request(KVM_REQ_PMU, vcpu);
10847 static_call(kvm_x86_sched_in)(vcpu, cpu);
10850 void kvm_arch_free_vm(struct kvm *kvm)
10852 kfree(to_kvm_hv(kvm)->hv_pa_pg);
10857 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
10862 INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
10863 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
10864 INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
10865 INIT_LIST_HEAD(&kvm->arch.lpage_disallowed_mmu_pages);
10866 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
10867 atomic_set(&kvm->arch.noncoherent_dma_count, 0);
10869 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
10870 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
10871 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
10872 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
10873 &kvm->arch.irq_sources_bitmap);
10875 raw_spin_lock_init(&kvm->arch.tsc_write_lock);
10876 mutex_init(&kvm->arch.apic_map_lock);
10877 spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
10879 kvm->arch.kvmclock_offset = -get_kvmclock_base_ns();
10880 pvclock_update_vm_gtod_copy(kvm);
10882 kvm->arch.guest_can_read_msr_platform_info = true;
10884 INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
10885 INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
10887 kvm_apicv_init(kvm);
10888 kvm_hv_init_vm(kvm);
10889 kvm_page_track_init(kvm);
10890 kvm_mmu_init_vm(kvm);
10892 return static_call(kvm_x86_vm_init)(kvm);
10895 int kvm_arch_post_init_vm(struct kvm *kvm)
10897 return kvm_mmu_post_init_vm(kvm);
10900 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
10903 kvm_mmu_unload(vcpu);
10907 static void kvm_free_vcpus(struct kvm *kvm)
10910 struct kvm_vcpu *vcpu;
10913 * Unpin any mmu pages first.
10915 kvm_for_each_vcpu(i, vcpu, kvm) {
10916 kvm_clear_async_pf_completion_queue(vcpu);
10917 kvm_unload_vcpu_mmu(vcpu);
10919 kvm_for_each_vcpu(i, vcpu, kvm)
10920 kvm_vcpu_destroy(vcpu);
10922 mutex_lock(&kvm->lock);
10923 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
10924 kvm->vcpus[i] = NULL;
10926 atomic_set(&kvm->online_vcpus, 0);
10927 mutex_unlock(&kvm->lock);
10930 void kvm_arch_sync_events(struct kvm *kvm)
10932 cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
10933 cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
10937 #define ERR_PTR_USR(e) ((void __user *)ERR_PTR(e))
10940 * __x86_set_memory_region: Setup KVM internal memory slot
10942 * @kvm: the kvm pointer to the VM.
10943 * @id: the slot ID to setup.
10944 * @gpa: the GPA to install the slot (unused when @size == 0).
10945 * @size: the size of the slot. Set to zero to uninstall a slot.
10947 * This function helps to setup a KVM internal memory slot. Specify
10948 * @size > 0 to install a new slot, while @size == 0 to uninstall a
10949 * slot. The return code can be one of the following:
10951 * HVA: on success (uninstall will return a bogus HVA)
10954 * The caller should always use IS_ERR() to check the return value
10955 * before use. Note, the KVM internal memory slots are guaranteed to
10956 * remain valid and unchanged until the VM is destroyed, i.e., the
10957 * GPA->HVA translation will not change. However, the HVA is a user
10958 * address, i.e. its accessibility is not guaranteed, and must be
10959 * accessed via __copy_{to,from}_user().
10961 void __user * __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
10965 unsigned long hva, old_npages;
10966 struct kvm_memslots *slots = kvm_memslots(kvm);
10967 struct kvm_memory_slot *slot;
10969 /* Called with kvm->slots_lock held. */
10970 if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
10971 return ERR_PTR_USR(-EINVAL);
10973 slot = id_to_memslot(slots, id);
10975 if (slot && slot->npages)
10976 return ERR_PTR_USR(-EEXIST);
10979 * MAP_SHARED to prevent internal slot pages from being moved
10982 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
10983 MAP_SHARED | MAP_ANONYMOUS, 0);
10984 if (IS_ERR((void *)hva))
10985 return (void __user *)hva;
10987 if (!slot || !slot->npages)
10990 old_npages = slot->npages;
10991 hva = slot->userspace_addr;
10994 for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
10995 struct kvm_userspace_memory_region m;
10997 m.slot = id | (i << 16);
10999 m.guest_phys_addr = gpa;
11000 m.userspace_addr = hva;
11001 m.memory_size = size;
11002 r = __kvm_set_memory_region(kvm, &m);
11004 return ERR_PTR_USR(r);
11008 vm_munmap(hva, old_npages * PAGE_SIZE);
11010 return (void __user *)hva;
11012 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
11014 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
11016 kvm_mmu_pre_destroy_vm(kvm);
11019 void kvm_arch_destroy_vm(struct kvm *kvm)
11021 if (current->mm == kvm->mm) {
11023 * Free memory regions allocated on behalf of userspace,
11024 * unless the the memory map has changed due to process exit
11027 mutex_lock(&kvm->slots_lock);
11028 __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
11030 __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
11032 __x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
11033 mutex_unlock(&kvm->slots_lock);
11035 static_call_cond(kvm_x86_vm_destroy)(kvm);
11036 kvm_free_msr_filter(srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1));
11037 kvm_pic_destroy(kvm);
11038 kvm_ioapic_destroy(kvm);
11039 kvm_free_vcpus(kvm);
11040 kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
11041 kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
11042 kvm_mmu_uninit_vm(kvm);
11043 kvm_page_track_cleanup(kvm);
11044 kvm_xen_destroy_vm(kvm);
11045 kvm_hv_destroy_vm(kvm);
11048 static void memslot_rmap_free(struct kvm_memory_slot *slot)
11052 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11053 kvfree(slot->arch.rmap[i]);
11054 slot->arch.rmap[i] = NULL;
11058 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
11062 memslot_rmap_free(slot);
11064 for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11065 kvfree(slot->arch.lpage_info[i - 1]);
11066 slot->arch.lpage_info[i - 1] = NULL;
11069 kvm_page_track_free_memslot(slot);
11072 static int memslot_rmap_alloc(struct kvm_memory_slot *slot,
11073 unsigned long npages)
11075 const int sz = sizeof(*slot->arch.rmap[0]);
11078 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11080 int lpages = gfn_to_index(slot->base_gfn + npages - 1,
11081 slot->base_gfn, level) + 1;
11083 WARN_ON(slot->arch.rmap[i]);
11085 slot->arch.rmap[i] = kvcalloc(lpages, sz, GFP_KERNEL_ACCOUNT);
11086 if (!slot->arch.rmap[i]) {
11087 memslot_rmap_free(slot);
11095 int alloc_all_memslots_rmaps(struct kvm *kvm)
11097 struct kvm_memslots *slots;
11098 struct kvm_memory_slot *slot;
11102 * Check if memslots alreday have rmaps early before acquiring
11103 * the slots_arch_lock below.
11105 if (kvm_memslots_have_rmaps(kvm))
11108 mutex_lock(&kvm->slots_arch_lock);
11111 * Read memslots_have_rmaps again, under the slots arch lock,
11112 * before allocating the rmaps
11114 if (kvm_memslots_have_rmaps(kvm)) {
11115 mutex_unlock(&kvm->slots_arch_lock);
11119 for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
11120 slots = __kvm_memslots(kvm, i);
11121 kvm_for_each_memslot(slot, slots) {
11122 r = memslot_rmap_alloc(slot, slot->npages);
11124 mutex_unlock(&kvm->slots_arch_lock);
11131 * Ensure that memslots_have_rmaps becomes true strictly after
11132 * all the rmap pointers are set.
11134 smp_store_release(&kvm->arch.memslots_have_rmaps, true);
11135 mutex_unlock(&kvm->slots_arch_lock);
11139 static int kvm_alloc_memslot_metadata(struct kvm *kvm,
11140 struct kvm_memory_slot *slot,
11141 unsigned long npages)
11146 * Clear out the previous array pointers for the KVM_MR_MOVE case. The
11147 * old arrays will be freed by __kvm_set_memory_region() if installing
11148 * the new memslot is successful.
11150 memset(&slot->arch, 0, sizeof(slot->arch));
11152 if (kvm_memslots_have_rmaps(kvm)) {
11153 r = memslot_rmap_alloc(slot, npages);
11158 for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11159 struct kvm_lpage_info *linfo;
11160 unsigned long ugfn;
11164 lpages = gfn_to_index(slot->base_gfn + npages - 1,
11165 slot->base_gfn, level) + 1;
11167 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
11171 slot->arch.lpage_info[i - 1] = linfo;
11173 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
11174 linfo[0].disallow_lpage = 1;
11175 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
11176 linfo[lpages - 1].disallow_lpage = 1;
11177 ugfn = slot->userspace_addr >> PAGE_SHIFT;
11179 * If the gfn and userspace address are not aligned wrt each
11180 * other, disable large page support for this slot.
11182 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1)) {
11185 for (j = 0; j < lpages; ++j)
11186 linfo[j].disallow_lpage = 1;
11190 if (kvm_page_track_create_memslot(slot, npages))
11196 memslot_rmap_free(slot);
11198 for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11199 kvfree(slot->arch.lpage_info[i - 1]);
11200 slot->arch.lpage_info[i - 1] = NULL;
11205 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
11207 struct kvm_vcpu *vcpu;
11211 * memslots->generation has been incremented.
11212 * mmio generation may have reached its maximum value.
11214 kvm_mmu_invalidate_mmio_sptes(kvm, gen);
11216 /* Force re-initialization of steal_time cache */
11217 kvm_for_each_vcpu(i, vcpu, kvm)
11218 kvm_vcpu_kick(vcpu);
11221 int kvm_arch_prepare_memory_region(struct kvm *kvm,
11222 struct kvm_memory_slot *memslot,
11223 const struct kvm_userspace_memory_region *mem,
11224 enum kvm_mr_change change)
11226 if (change == KVM_MR_CREATE || change == KVM_MR_MOVE)
11227 return kvm_alloc_memslot_metadata(kvm, memslot,
11228 mem->memory_size >> PAGE_SHIFT);
11233 static void kvm_mmu_update_cpu_dirty_logging(struct kvm *kvm, bool enable)
11235 struct kvm_arch *ka = &kvm->arch;
11237 if (!kvm_x86_ops.cpu_dirty_log_size)
11240 if ((enable && ++ka->cpu_dirty_logging_count == 1) ||
11241 (!enable && --ka->cpu_dirty_logging_count == 0))
11242 kvm_make_all_cpus_request(kvm, KVM_REQ_UPDATE_CPU_DIRTY_LOGGING);
11244 WARN_ON_ONCE(ka->cpu_dirty_logging_count < 0);
11247 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
11248 struct kvm_memory_slot *old,
11249 struct kvm_memory_slot *new,
11250 enum kvm_mr_change change)
11252 bool log_dirty_pages = new->flags & KVM_MEM_LOG_DIRTY_PAGES;
11255 * Update CPU dirty logging if dirty logging is being toggled. This
11256 * applies to all operations.
11258 if ((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)
11259 kvm_mmu_update_cpu_dirty_logging(kvm, log_dirty_pages);
11262 * Nothing more to do for RO slots (which can't be dirtied and can't be
11263 * made writable) or CREATE/MOVE/DELETE of a slot.
11265 * For a memslot with dirty logging disabled:
11266 * CREATE: No dirty mappings will already exist.
11267 * MOVE/DELETE: The old mappings will already have been cleaned up by
11268 * kvm_arch_flush_shadow_memslot()
11270 * For a memslot with dirty logging enabled:
11271 * CREATE: No shadow pages exist, thus nothing to write-protect
11272 * and no dirty bits to clear.
11273 * MOVE/DELETE: The old mappings will already have been cleaned up by
11274 * kvm_arch_flush_shadow_memslot().
11276 if ((change != KVM_MR_FLAGS_ONLY) || (new->flags & KVM_MEM_READONLY))
11280 * READONLY and non-flags changes were filtered out above, and the only
11281 * other flag is LOG_DIRTY_PAGES, i.e. something is wrong if dirty
11282 * logging isn't being toggled on or off.
11284 if (WARN_ON_ONCE(!((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)))
11287 if (!log_dirty_pages) {
11289 * Dirty logging tracks sptes in 4k granularity, meaning that
11290 * large sptes have to be split. If live migration succeeds,
11291 * the guest in the source machine will be destroyed and large
11292 * sptes will be created in the destination. However, if the
11293 * guest continues to run in the source machine (for example if
11294 * live migration fails), small sptes will remain around and
11295 * cause bad performance.
11297 * Scan sptes if dirty logging has been stopped, dropping those
11298 * which can be collapsed into a single large-page spte. Later
11299 * page faults will create the large-page sptes.
11301 kvm_mmu_zap_collapsible_sptes(kvm, new);
11304 * Initially-all-set does not require write protecting any page,
11305 * because they're all assumed to be dirty.
11307 if (kvm_dirty_log_manual_protect_and_init_set(kvm))
11310 if (kvm_x86_ops.cpu_dirty_log_size) {
11311 kvm_mmu_slot_leaf_clear_dirty(kvm, new);
11312 kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_2M);
11314 kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_4K);
11319 void kvm_arch_commit_memory_region(struct kvm *kvm,
11320 const struct kvm_userspace_memory_region *mem,
11321 struct kvm_memory_slot *old,
11322 const struct kvm_memory_slot *new,
11323 enum kvm_mr_change change)
11325 if (!kvm->arch.n_requested_mmu_pages)
11326 kvm_mmu_change_mmu_pages(kvm,
11327 kvm_mmu_calculate_default_mmu_pages(kvm));
11330 * FIXME: const-ify all uses of struct kvm_memory_slot.
11332 kvm_mmu_slot_apply_flags(kvm, old, (struct kvm_memory_slot *) new, change);
11334 /* Free the arrays associated with the old memslot. */
11335 if (change == KVM_MR_MOVE)
11336 kvm_arch_free_memslot(kvm, old);
11339 void kvm_arch_flush_shadow_all(struct kvm *kvm)
11341 kvm_mmu_zap_all(kvm);
11344 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
11345 struct kvm_memory_slot *slot)
11347 kvm_page_track_flush_slot(kvm, slot);
11350 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
11352 return (is_guest_mode(vcpu) &&
11353 kvm_x86_ops.guest_apic_has_interrupt &&
11354 static_call(kvm_x86_guest_apic_has_interrupt)(vcpu));
11357 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
11359 if (!list_empty_careful(&vcpu->async_pf.done))
11362 if (kvm_apic_has_events(vcpu))
11365 if (vcpu->arch.pv.pv_unhalted)
11368 if (vcpu->arch.exception.pending)
11371 if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
11372 (vcpu->arch.nmi_pending &&
11373 static_call(kvm_x86_nmi_allowed)(vcpu, false)))
11376 if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
11377 (vcpu->arch.smi_pending &&
11378 static_call(kvm_x86_smi_allowed)(vcpu, false)))
11381 if (kvm_arch_interrupt_allowed(vcpu) &&
11382 (kvm_cpu_has_interrupt(vcpu) ||
11383 kvm_guest_apic_has_interrupt(vcpu)))
11386 if (kvm_hv_has_stimer_pending(vcpu))
11389 if (is_guest_mode(vcpu) &&
11390 kvm_x86_ops.nested_ops->hv_timer_pending &&
11391 kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
11397 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
11399 return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
11402 bool kvm_arch_dy_has_pending_interrupt(struct kvm_vcpu *vcpu)
11404 if (vcpu->arch.apicv_active && static_call(kvm_x86_dy_apicv_has_pending_interrupt)(vcpu))
11410 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
11412 if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
11415 if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
11416 kvm_test_request(KVM_REQ_SMI, vcpu) ||
11417 kvm_test_request(KVM_REQ_EVENT, vcpu))
11420 return kvm_arch_dy_has_pending_interrupt(vcpu);
11423 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
11425 if (vcpu->arch.guest_state_protected)
11428 return vcpu->arch.preempted_in_kernel;
11431 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
11433 return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
11436 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
11438 return static_call(kvm_x86_interrupt_allowed)(vcpu, false);
11441 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
11443 /* Can't read the RIP when guest state is protected, just return 0 */
11444 if (vcpu->arch.guest_state_protected)
11447 if (is_64_bit_mode(vcpu))
11448 return kvm_rip_read(vcpu);
11449 return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
11450 kvm_rip_read(vcpu));
11452 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
11454 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
11456 return kvm_get_linear_rip(vcpu) == linear_rip;
11458 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
11460 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
11462 unsigned long rflags;
11464 rflags = static_call(kvm_x86_get_rflags)(vcpu);
11465 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
11466 rflags &= ~X86_EFLAGS_TF;
11469 EXPORT_SYMBOL_GPL(kvm_get_rflags);
11471 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
11473 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
11474 kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
11475 rflags |= X86_EFLAGS_TF;
11476 static_call(kvm_x86_set_rflags)(vcpu, rflags);
11479 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
11481 __kvm_set_rflags(vcpu, rflags);
11482 kvm_make_request(KVM_REQ_EVENT, vcpu);
11484 EXPORT_SYMBOL_GPL(kvm_set_rflags);
11486 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
11490 if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
11494 r = kvm_mmu_reload(vcpu);
11498 if (!vcpu->arch.mmu->direct_map &&
11499 work->arch.cr3 != vcpu->arch.mmu->get_guest_pgd(vcpu))
11502 kvm_mmu_do_page_fault(vcpu, work->cr2_or_gpa, 0, true);
11505 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
11507 BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU));
11509 return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
11512 static inline u32 kvm_async_pf_next_probe(u32 key)
11514 return (key + 1) & (ASYNC_PF_PER_VCPU - 1);
11517 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11519 u32 key = kvm_async_pf_hash_fn(gfn);
11521 while (vcpu->arch.apf.gfns[key] != ~0)
11522 key = kvm_async_pf_next_probe(key);
11524 vcpu->arch.apf.gfns[key] = gfn;
11527 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
11530 u32 key = kvm_async_pf_hash_fn(gfn);
11532 for (i = 0; i < ASYNC_PF_PER_VCPU &&
11533 (vcpu->arch.apf.gfns[key] != gfn &&
11534 vcpu->arch.apf.gfns[key] != ~0); i++)
11535 key = kvm_async_pf_next_probe(key);
11540 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11542 return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
11545 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11549 i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
11551 if (WARN_ON_ONCE(vcpu->arch.apf.gfns[i] != gfn))
11555 vcpu->arch.apf.gfns[i] = ~0;
11557 j = kvm_async_pf_next_probe(j);
11558 if (vcpu->arch.apf.gfns[j] == ~0)
11560 k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
11562 * k lies cyclically in ]i,j]
11564 * |....j i.k.| or |.k..j i...|
11566 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
11567 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
11572 static inline int apf_put_user_notpresent(struct kvm_vcpu *vcpu)
11574 u32 reason = KVM_PV_REASON_PAGE_NOT_PRESENT;
11576 return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &reason,
11580 static inline int apf_put_user_ready(struct kvm_vcpu *vcpu, u32 token)
11582 unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
11584 return kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
11585 &token, offset, sizeof(token));
11588 static inline bool apf_pageready_slot_free(struct kvm_vcpu *vcpu)
11590 unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
11593 if (kvm_read_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
11594 &val, offset, sizeof(val)))
11600 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
11602 if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
11605 if (!kvm_pv_async_pf_enabled(vcpu) ||
11606 (vcpu->arch.apf.send_user_only && static_call(kvm_x86_get_cpl)(vcpu) == 0))
11612 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
11614 if (unlikely(!lapic_in_kernel(vcpu) ||
11615 kvm_event_needs_reinjection(vcpu) ||
11616 vcpu->arch.exception.pending))
11619 if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
11623 * If interrupts are off we cannot even use an artificial
11626 return kvm_arch_interrupt_allowed(vcpu);
11629 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
11630 struct kvm_async_pf *work)
11632 struct x86_exception fault;
11634 trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
11635 kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
11637 if (kvm_can_deliver_async_pf(vcpu) &&
11638 !apf_put_user_notpresent(vcpu)) {
11639 fault.vector = PF_VECTOR;
11640 fault.error_code_valid = true;
11641 fault.error_code = 0;
11642 fault.nested_page_fault = false;
11643 fault.address = work->arch.token;
11644 fault.async_page_fault = true;
11645 kvm_inject_page_fault(vcpu, &fault);
11649 * It is not possible to deliver a paravirtualized asynchronous
11650 * page fault, but putting the guest in an artificial halt state
11651 * can be beneficial nevertheless: if an interrupt arrives, we
11652 * can deliver it timely and perhaps the guest will schedule
11653 * another process. When the instruction that triggered a page
11654 * fault is retried, hopefully the page will be ready in the host.
11656 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
11661 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
11662 struct kvm_async_pf *work)
11664 struct kvm_lapic_irq irq = {
11665 .delivery_mode = APIC_DM_FIXED,
11666 .vector = vcpu->arch.apf.vec
11669 if (work->wakeup_all)
11670 work->arch.token = ~0; /* broadcast wakeup */
11672 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
11673 trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
11675 if ((work->wakeup_all || work->notpresent_injected) &&
11676 kvm_pv_async_pf_enabled(vcpu) &&
11677 !apf_put_user_ready(vcpu, work->arch.token)) {
11678 vcpu->arch.apf.pageready_pending = true;
11679 kvm_apic_set_irq(vcpu, &irq, NULL);
11682 vcpu->arch.apf.halted = false;
11683 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
11686 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu)
11688 kvm_make_request(KVM_REQ_APF_READY, vcpu);
11689 if (!vcpu->arch.apf.pageready_pending)
11690 kvm_vcpu_kick(vcpu);
11693 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu)
11695 if (!kvm_pv_async_pf_enabled(vcpu))
11698 return kvm_lapic_enabled(vcpu) && apf_pageready_slot_free(vcpu);
11701 void kvm_arch_start_assignment(struct kvm *kvm)
11703 if (atomic_inc_return(&kvm->arch.assigned_device_count) == 1)
11704 static_call_cond(kvm_x86_start_assignment)(kvm);
11706 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
11708 void kvm_arch_end_assignment(struct kvm *kvm)
11710 atomic_dec(&kvm->arch.assigned_device_count);
11712 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
11714 bool kvm_arch_has_assigned_device(struct kvm *kvm)
11716 return atomic_read(&kvm->arch.assigned_device_count);
11718 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
11720 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
11722 atomic_inc(&kvm->arch.noncoherent_dma_count);
11724 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
11726 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
11728 atomic_dec(&kvm->arch.noncoherent_dma_count);
11730 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
11732 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
11734 return atomic_read(&kvm->arch.noncoherent_dma_count);
11736 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
11738 bool kvm_arch_has_irq_bypass(void)
11743 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
11744 struct irq_bypass_producer *prod)
11746 struct kvm_kernel_irqfd *irqfd =
11747 container_of(cons, struct kvm_kernel_irqfd, consumer);
11750 irqfd->producer = prod;
11751 kvm_arch_start_assignment(irqfd->kvm);
11752 ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm,
11753 prod->irq, irqfd->gsi, 1);
11756 kvm_arch_end_assignment(irqfd->kvm);
11761 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
11762 struct irq_bypass_producer *prod)
11765 struct kvm_kernel_irqfd *irqfd =
11766 container_of(cons, struct kvm_kernel_irqfd, consumer);
11768 WARN_ON(irqfd->producer != prod);
11769 irqfd->producer = NULL;
11772 * When producer of consumer is unregistered, we change back to
11773 * remapped mode, so we can re-use the current implementation
11774 * when the irq is masked/disabled or the consumer side (KVM
11775 * int this case doesn't want to receive the interrupts.
11777 ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm, prod->irq, irqfd->gsi, 0);
11779 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
11780 " fails: %d\n", irqfd->consumer.token, ret);
11782 kvm_arch_end_assignment(irqfd->kvm);
11785 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
11786 uint32_t guest_irq, bool set)
11788 return static_call(kvm_x86_update_pi_irte)(kvm, host_irq, guest_irq, set);
11791 bool kvm_vector_hashing_enabled(void)
11793 return vector_hashing;
11796 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
11798 return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
11800 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
11803 int kvm_spec_ctrl_test_value(u64 value)
11806 * test that setting IA32_SPEC_CTRL to given value
11807 * is allowed by the host processor
11811 unsigned long flags;
11814 local_irq_save(flags);
11816 if (rdmsrl_safe(MSR_IA32_SPEC_CTRL, &saved_value))
11818 else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value))
11821 wrmsrl(MSR_IA32_SPEC_CTRL, saved_value);
11823 local_irq_restore(flags);
11827 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value);
11829 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code)
11831 struct x86_exception fault;
11832 u32 access = error_code &
11833 (PFERR_WRITE_MASK | PFERR_FETCH_MASK | PFERR_USER_MASK);
11835 if (!(error_code & PFERR_PRESENT_MASK) ||
11836 vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, &fault) != UNMAPPED_GVA) {
11838 * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
11839 * tables probably do not match the TLB. Just proceed
11840 * with the error code that the processor gave.
11842 fault.vector = PF_VECTOR;
11843 fault.error_code_valid = true;
11844 fault.error_code = error_code;
11845 fault.nested_page_fault = false;
11846 fault.address = gva;
11848 vcpu->arch.walk_mmu->inject_page_fault(vcpu, &fault);
11850 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error);
11853 * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
11854 * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
11855 * indicates whether exit to userspace is needed.
11857 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
11858 struct x86_exception *e)
11860 if (r == X86EMUL_PROPAGATE_FAULT) {
11861 kvm_inject_emulated_page_fault(vcpu, e);
11866 * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
11867 * while handling a VMX instruction KVM could've handled the request
11868 * correctly by exiting to userspace and performing I/O but there
11869 * doesn't seem to be a real use-case behind such requests, just return
11870 * KVM_EXIT_INTERNAL_ERROR for now.
11872 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
11873 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
11874 vcpu->run->internal.ndata = 0;
11878 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure);
11880 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva)
11883 struct x86_exception e;
11885 unsigned long roots_to_free = 0;
11892 r = kvm_read_guest_virt(vcpu, gva, &operand, sizeof(operand), &e);
11893 if (r != X86EMUL_CONTINUE)
11894 return kvm_handle_memory_failure(vcpu, r, &e);
11896 if (operand.pcid >> 12 != 0) {
11897 kvm_inject_gp(vcpu, 0);
11901 pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
11904 case INVPCID_TYPE_INDIV_ADDR:
11905 if ((!pcid_enabled && (operand.pcid != 0)) ||
11906 is_noncanonical_address(operand.gla, vcpu)) {
11907 kvm_inject_gp(vcpu, 0);
11910 kvm_mmu_invpcid_gva(vcpu, operand.gla, operand.pcid);
11911 return kvm_skip_emulated_instruction(vcpu);
11913 case INVPCID_TYPE_SINGLE_CTXT:
11914 if (!pcid_enabled && (operand.pcid != 0)) {
11915 kvm_inject_gp(vcpu, 0);
11919 if (kvm_get_active_pcid(vcpu) == operand.pcid) {
11920 kvm_mmu_sync_roots(vcpu);
11921 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
11924 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
11925 if (kvm_get_pcid(vcpu, vcpu->arch.mmu->prev_roots[i].pgd)
11927 roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
11929 kvm_mmu_free_roots(vcpu, vcpu->arch.mmu, roots_to_free);
11931 * If neither the current cr3 nor any of the prev_roots use the
11932 * given PCID, then nothing needs to be done here because a
11933 * resync will happen anyway before switching to any other CR3.
11936 return kvm_skip_emulated_instruction(vcpu);
11938 case INVPCID_TYPE_ALL_NON_GLOBAL:
11940 * Currently, KVM doesn't mark global entries in the shadow
11941 * page tables, so a non-global flush just degenerates to a
11942 * global flush. If needed, we could optimize this later by
11943 * keeping track of global entries in shadow page tables.
11947 case INVPCID_TYPE_ALL_INCL_GLOBAL:
11948 kvm_make_request(KVM_REQ_MMU_RELOAD, vcpu);
11949 return kvm_skip_emulated_instruction(vcpu);
11952 BUG(); /* We have already checked above that type <= 3 */
11955 EXPORT_SYMBOL_GPL(kvm_handle_invpcid);
11957 static int complete_sev_es_emulated_mmio(struct kvm_vcpu *vcpu)
11959 struct kvm_run *run = vcpu->run;
11960 struct kvm_mmio_fragment *frag;
11963 BUG_ON(!vcpu->mmio_needed);
11965 /* Complete previous fragment */
11966 frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
11967 len = min(8u, frag->len);
11968 if (!vcpu->mmio_is_write)
11969 memcpy(frag->data, run->mmio.data, len);
11971 if (frag->len <= 8) {
11972 /* Switch to the next fragment. */
11974 vcpu->mmio_cur_fragment++;
11976 /* Go forward to the next mmio piece. */
11982 if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
11983 vcpu->mmio_needed = 0;
11985 // VMG change, at this point, we're always done
11986 // RIP has already been advanced
11990 // More MMIO is needed
11991 run->mmio.phys_addr = frag->gpa;
11992 run->mmio.len = min(8u, frag->len);
11993 run->mmio.is_write = vcpu->mmio_is_write;
11994 if (run->mmio.is_write)
11995 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
11996 run->exit_reason = KVM_EXIT_MMIO;
11998 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12003 int kvm_sev_es_mmio_write(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12007 struct kvm_mmio_fragment *frag;
12012 handled = write_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12013 if (handled == bytes)
12020 /*TODO: Check if need to increment number of frags */
12021 frag = vcpu->mmio_fragments;
12022 vcpu->mmio_nr_fragments = 1;
12027 vcpu->mmio_needed = 1;
12028 vcpu->mmio_cur_fragment = 0;
12030 vcpu->run->mmio.phys_addr = gpa;
12031 vcpu->run->mmio.len = min(8u, frag->len);
12032 vcpu->run->mmio.is_write = 1;
12033 memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
12034 vcpu->run->exit_reason = KVM_EXIT_MMIO;
12036 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12040 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write);
12042 int kvm_sev_es_mmio_read(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12046 struct kvm_mmio_fragment *frag;
12051 handled = read_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12052 if (handled == bytes)
12059 /*TODO: Check if need to increment number of frags */
12060 frag = vcpu->mmio_fragments;
12061 vcpu->mmio_nr_fragments = 1;
12066 vcpu->mmio_needed = 1;
12067 vcpu->mmio_cur_fragment = 0;
12069 vcpu->run->mmio.phys_addr = gpa;
12070 vcpu->run->mmio.len = min(8u, frag->len);
12071 vcpu->run->mmio.is_write = 0;
12072 vcpu->run->exit_reason = KVM_EXIT_MMIO;
12074 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12078 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read);
12080 static int complete_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
12082 memcpy(vcpu->arch.guest_ins_data, vcpu->arch.pio_data,
12083 vcpu->arch.pio.count * vcpu->arch.pio.size);
12084 vcpu->arch.pio.count = 0;
12089 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
12090 unsigned int port, void *data, unsigned int count)
12094 ret = emulator_pio_out_emulated(vcpu->arch.emulate_ctxt, size, port,
12099 vcpu->arch.pio.count = 0;
12104 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
12105 unsigned int port, void *data, unsigned int count)
12109 ret = emulator_pio_in_emulated(vcpu->arch.emulate_ctxt, size, port,
12112 vcpu->arch.pio.count = 0;
12114 vcpu->arch.guest_ins_data = data;
12115 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_ins;
12121 int kvm_sev_es_string_io(struct kvm_vcpu *vcpu, unsigned int size,
12122 unsigned int port, void *data, unsigned int count,
12125 return in ? kvm_sev_es_ins(vcpu, size, port, data, count)
12126 : kvm_sev_es_outs(vcpu, size, port, data, count);
12128 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io);
12130 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry);
12131 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
12132 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
12133 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
12134 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
12135 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
12136 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
12137 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
12138 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
12139 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
12140 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
12141 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
12142 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
12143 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
12144 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
12145 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
12146 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
12147 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
12148 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
12149 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
12150 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
12151 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log);
12152 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request);
12153 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter);
12154 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit);
12155 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter);
12156 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit);