1 // SPDX-License-Identifier: GPL-2.0-only
3 * Kernel-based Virtual Machine driver for Linux
5 * derived from drivers/kvm/kvm_main.c
7 * Copyright (C) 2006 Qumranet, Inc.
8 * Copyright (C) 2008 Qumranet, Inc.
9 * Copyright IBM Corporation, 2008
10 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
13 * Avi Kivity <avi@qumranet.com>
14 * Yaniv Kamay <yaniv@qumranet.com>
15 * Amit Shah <amit.shah@qumranet.com>
16 * Ben-Ami Yassour <benami@il.ibm.com>
19 #include <linux/kvm_host.h>
25 #include "kvm_cache_regs.h"
26 #include "kvm_emulate.h"
34 #include <linux/clocksource.h>
35 #include <linux/interrupt.h>
36 #include <linux/kvm.h>
38 #include <linux/vmalloc.h>
39 #include <linux/export.h>
40 #include <linux/moduleparam.h>
41 #include <linux/mman.h>
42 #include <linux/highmem.h>
43 #include <linux/iommu.h>
44 #include <linux/intel-iommu.h>
45 #include <linux/cpufreq.h>
46 #include <linux/user-return-notifier.h>
47 #include <linux/srcu.h>
48 #include <linux/slab.h>
49 #include <linux/perf_event.h>
50 #include <linux/uaccess.h>
51 #include <linux/hash.h>
52 #include <linux/pci.h>
53 #include <linux/timekeeper_internal.h>
54 #include <linux/pvclock_gtod.h>
55 #include <linux/kvm_irqfd.h>
56 #include <linux/irqbypass.h>
57 #include <linux/sched/stat.h>
58 #include <linux/sched/isolation.h>
59 #include <linux/mem_encrypt.h>
60 #include <linux/entry-kvm.h>
61 #include <linux/suspend.h>
63 #include <trace/events/kvm.h>
65 #include <asm/debugreg.h>
70 #include <linux/kernel_stat.h>
71 #include <asm/fpu/api.h>
72 #include <asm/fpu/xcr.h>
73 #include <asm/fpu/xstate.h>
74 #include <asm/pvclock.h>
75 #include <asm/div64.h>
76 #include <asm/irq_remapping.h>
77 #include <asm/mshyperv.h>
78 #include <asm/hypervisor.h>
79 #include <asm/tlbflush.h>
80 #include <asm/intel_pt.h>
81 #include <asm/emulate_prefix.h>
83 #include <clocksource/hyperv_timer.h>
85 #define CREATE_TRACE_POINTS
88 #define MAX_IO_MSRS 256
89 #define KVM_MAX_MCE_BANKS 32
90 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
91 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
93 #define ERR_PTR_USR(e) ((void __user *)ERR_PTR(e))
95 #define emul_to_vcpu(ctxt) \
96 ((struct kvm_vcpu *)(ctxt)->vcpu)
99 * - enable syscall per default because its emulated by KVM
100 * - enable LME and LMA per default on 64 bit KVM
104 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
106 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
109 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
111 #define KVM_EXIT_HYPERCALL_VALID_MASK (1 << KVM_HC_MAP_GPA_RANGE)
113 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
114 KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
116 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
117 static void process_nmi(struct kvm_vcpu *vcpu);
118 static void process_smi(struct kvm_vcpu *vcpu);
119 static void enter_smm(struct kvm_vcpu *vcpu);
120 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
121 static void store_regs(struct kvm_vcpu *vcpu);
122 static int sync_regs(struct kvm_vcpu *vcpu);
123 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu);
125 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
126 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
128 struct kvm_x86_ops kvm_x86_ops __read_mostly;
129 EXPORT_SYMBOL_GPL(kvm_x86_ops);
131 #define KVM_X86_OP(func) \
132 DEFINE_STATIC_CALL_NULL(kvm_x86_##func, \
133 *(((struct kvm_x86_ops *)0)->func));
134 #define KVM_X86_OP_NULL KVM_X86_OP
135 #include <asm/kvm-x86-ops.h>
136 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits);
137 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg);
138 EXPORT_STATIC_CALL_GPL(kvm_x86_tlb_flush_current);
140 static bool __read_mostly ignore_msrs = 0;
141 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
143 bool __read_mostly report_ignored_msrs = true;
144 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
145 EXPORT_SYMBOL_GPL(report_ignored_msrs);
147 unsigned int min_timer_period_us = 200;
148 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
150 static bool __read_mostly kvmclock_periodic_sync = true;
151 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
153 bool __read_mostly kvm_has_tsc_control;
154 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
155 u32 __read_mostly kvm_max_guest_tsc_khz;
156 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
157 u8 __read_mostly kvm_tsc_scaling_ratio_frac_bits;
158 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
159 u64 __read_mostly kvm_max_tsc_scaling_ratio;
160 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
161 u64 __read_mostly kvm_default_tsc_scaling_ratio;
162 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
163 bool __read_mostly kvm_has_bus_lock_exit;
164 EXPORT_SYMBOL_GPL(kvm_has_bus_lock_exit);
166 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
167 static u32 __read_mostly tsc_tolerance_ppm = 250;
168 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
171 * lapic timer advance (tscdeadline mode only) in nanoseconds. '-1' enables
172 * adaptive tuning starting from default advancement of 1000ns. '0' disables
173 * advancement entirely. Any other value is used as-is and disables adaptive
174 * tuning, i.e. allows privileged userspace to set an exact advancement time.
176 static int __read_mostly lapic_timer_advance_ns = -1;
177 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
179 static bool __read_mostly vector_hashing = true;
180 module_param(vector_hashing, bool, S_IRUGO);
182 bool __read_mostly enable_vmware_backdoor = false;
183 module_param(enable_vmware_backdoor, bool, S_IRUGO);
184 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
186 static bool __read_mostly force_emulation_prefix = false;
187 module_param(force_emulation_prefix, bool, S_IRUGO);
189 int __read_mostly pi_inject_timer = -1;
190 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
192 /* Enable/disable PMU virtualization */
193 bool __read_mostly enable_pmu = true;
194 EXPORT_SYMBOL_GPL(enable_pmu);
195 module_param(enable_pmu, bool, 0444);
198 * Restoring the host value for MSRs that are only consumed when running in
199 * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
200 * returns to userspace, i.e. the kernel can run with the guest's value.
202 #define KVM_MAX_NR_USER_RETURN_MSRS 16
204 struct kvm_user_return_msrs {
205 struct user_return_notifier urn;
207 struct kvm_user_return_msr_values {
210 } values[KVM_MAX_NR_USER_RETURN_MSRS];
213 u32 __read_mostly kvm_nr_uret_msrs;
214 EXPORT_SYMBOL_GPL(kvm_nr_uret_msrs);
215 static u32 __read_mostly kvm_uret_msrs_list[KVM_MAX_NR_USER_RETURN_MSRS];
216 static struct kvm_user_return_msrs __percpu *user_return_msrs;
218 #define KVM_SUPPORTED_XCR0 (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
219 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
220 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
221 | XFEATURE_MASK_PKRU | XFEATURE_MASK_XTILE)
223 u64 __read_mostly host_efer;
224 EXPORT_SYMBOL_GPL(host_efer);
226 bool __read_mostly allow_smaller_maxphyaddr = 0;
227 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr);
229 bool __read_mostly enable_apicv = true;
230 EXPORT_SYMBOL_GPL(enable_apicv);
232 u64 __read_mostly host_xss;
233 EXPORT_SYMBOL_GPL(host_xss);
234 u64 __read_mostly supported_xss;
235 EXPORT_SYMBOL_GPL(supported_xss);
237 const struct _kvm_stats_desc kvm_vm_stats_desc[] = {
238 KVM_GENERIC_VM_STATS(),
239 STATS_DESC_COUNTER(VM, mmu_shadow_zapped),
240 STATS_DESC_COUNTER(VM, mmu_pte_write),
241 STATS_DESC_COUNTER(VM, mmu_pde_zapped),
242 STATS_DESC_COUNTER(VM, mmu_flooded),
243 STATS_DESC_COUNTER(VM, mmu_recycled),
244 STATS_DESC_COUNTER(VM, mmu_cache_miss),
245 STATS_DESC_ICOUNTER(VM, mmu_unsync),
246 STATS_DESC_ICOUNTER(VM, pages_4k),
247 STATS_DESC_ICOUNTER(VM, pages_2m),
248 STATS_DESC_ICOUNTER(VM, pages_1g),
249 STATS_DESC_ICOUNTER(VM, nx_lpage_splits),
250 STATS_DESC_PCOUNTER(VM, max_mmu_rmap_size),
251 STATS_DESC_PCOUNTER(VM, max_mmu_page_hash_collisions)
254 const struct kvm_stats_header kvm_vm_stats_header = {
255 .name_size = KVM_STATS_NAME_SIZE,
256 .num_desc = ARRAY_SIZE(kvm_vm_stats_desc),
257 .id_offset = sizeof(struct kvm_stats_header),
258 .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
259 .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
260 sizeof(kvm_vm_stats_desc),
263 const struct _kvm_stats_desc kvm_vcpu_stats_desc[] = {
264 KVM_GENERIC_VCPU_STATS(),
265 STATS_DESC_COUNTER(VCPU, pf_fixed),
266 STATS_DESC_COUNTER(VCPU, pf_guest),
267 STATS_DESC_COUNTER(VCPU, tlb_flush),
268 STATS_DESC_COUNTER(VCPU, invlpg),
269 STATS_DESC_COUNTER(VCPU, exits),
270 STATS_DESC_COUNTER(VCPU, io_exits),
271 STATS_DESC_COUNTER(VCPU, mmio_exits),
272 STATS_DESC_COUNTER(VCPU, signal_exits),
273 STATS_DESC_COUNTER(VCPU, irq_window_exits),
274 STATS_DESC_COUNTER(VCPU, nmi_window_exits),
275 STATS_DESC_COUNTER(VCPU, l1d_flush),
276 STATS_DESC_COUNTER(VCPU, halt_exits),
277 STATS_DESC_COUNTER(VCPU, request_irq_exits),
278 STATS_DESC_COUNTER(VCPU, irq_exits),
279 STATS_DESC_COUNTER(VCPU, host_state_reload),
280 STATS_DESC_COUNTER(VCPU, fpu_reload),
281 STATS_DESC_COUNTER(VCPU, insn_emulation),
282 STATS_DESC_COUNTER(VCPU, insn_emulation_fail),
283 STATS_DESC_COUNTER(VCPU, hypercalls),
284 STATS_DESC_COUNTER(VCPU, irq_injections),
285 STATS_DESC_COUNTER(VCPU, nmi_injections),
286 STATS_DESC_COUNTER(VCPU, req_event),
287 STATS_DESC_COUNTER(VCPU, nested_run),
288 STATS_DESC_COUNTER(VCPU, directed_yield_attempted),
289 STATS_DESC_COUNTER(VCPU, directed_yield_successful),
290 STATS_DESC_ICOUNTER(VCPU, guest_mode)
293 const struct kvm_stats_header kvm_vcpu_stats_header = {
294 .name_size = KVM_STATS_NAME_SIZE,
295 .num_desc = ARRAY_SIZE(kvm_vcpu_stats_desc),
296 .id_offset = sizeof(struct kvm_stats_header),
297 .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
298 .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
299 sizeof(kvm_vcpu_stats_desc),
302 u64 __read_mostly host_xcr0;
303 u64 __read_mostly supported_xcr0;
304 EXPORT_SYMBOL_GPL(supported_xcr0);
306 static struct kmem_cache *x86_emulator_cache;
309 * When called, it means the previous get/set msr reached an invalid msr.
310 * Return true if we want to ignore/silent this failed msr access.
312 static bool kvm_msr_ignored_check(u32 msr, u64 data, bool write)
314 const char *op = write ? "wrmsr" : "rdmsr";
317 if (report_ignored_msrs)
318 kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
323 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
329 static struct kmem_cache *kvm_alloc_emulator_cache(void)
331 unsigned int useroffset = offsetof(struct x86_emulate_ctxt, src);
332 unsigned int size = sizeof(struct x86_emulate_ctxt);
334 return kmem_cache_create_usercopy("x86_emulator", size,
335 __alignof__(struct x86_emulate_ctxt),
336 SLAB_ACCOUNT, useroffset,
337 size - useroffset, NULL);
340 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
342 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
345 for (i = 0; i < ASYNC_PF_PER_VCPU; i++)
346 vcpu->arch.apf.gfns[i] = ~0;
349 static void kvm_on_user_return(struct user_return_notifier *urn)
352 struct kvm_user_return_msrs *msrs
353 = container_of(urn, struct kvm_user_return_msrs, urn);
354 struct kvm_user_return_msr_values *values;
358 * Disabling irqs at this point since the following code could be
359 * interrupted and executed through kvm_arch_hardware_disable()
361 local_irq_save(flags);
362 if (msrs->registered) {
363 msrs->registered = false;
364 user_return_notifier_unregister(urn);
366 local_irq_restore(flags);
367 for (slot = 0; slot < kvm_nr_uret_msrs; ++slot) {
368 values = &msrs->values[slot];
369 if (values->host != values->curr) {
370 wrmsrl(kvm_uret_msrs_list[slot], values->host);
371 values->curr = values->host;
376 static int kvm_probe_user_return_msr(u32 msr)
382 ret = rdmsrl_safe(msr, &val);
385 ret = wrmsrl_safe(msr, val);
391 int kvm_add_user_return_msr(u32 msr)
393 BUG_ON(kvm_nr_uret_msrs >= KVM_MAX_NR_USER_RETURN_MSRS);
395 if (kvm_probe_user_return_msr(msr))
398 kvm_uret_msrs_list[kvm_nr_uret_msrs] = msr;
399 return kvm_nr_uret_msrs++;
401 EXPORT_SYMBOL_GPL(kvm_add_user_return_msr);
403 int kvm_find_user_return_msr(u32 msr)
407 for (i = 0; i < kvm_nr_uret_msrs; ++i) {
408 if (kvm_uret_msrs_list[i] == msr)
413 EXPORT_SYMBOL_GPL(kvm_find_user_return_msr);
415 static void kvm_user_return_msr_cpu_online(void)
417 unsigned int cpu = smp_processor_id();
418 struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
422 for (i = 0; i < kvm_nr_uret_msrs; ++i) {
423 rdmsrl_safe(kvm_uret_msrs_list[i], &value);
424 msrs->values[i].host = value;
425 msrs->values[i].curr = value;
429 int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)
431 unsigned int cpu = smp_processor_id();
432 struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
435 value = (value & mask) | (msrs->values[slot].host & ~mask);
436 if (value == msrs->values[slot].curr)
438 err = wrmsrl_safe(kvm_uret_msrs_list[slot], value);
442 msrs->values[slot].curr = value;
443 if (!msrs->registered) {
444 msrs->urn.on_user_return = kvm_on_user_return;
445 user_return_notifier_register(&msrs->urn);
446 msrs->registered = true;
450 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr);
452 static void drop_user_return_notifiers(void)
454 unsigned int cpu = smp_processor_id();
455 struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
457 if (msrs->registered)
458 kvm_on_user_return(&msrs->urn);
461 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
463 return vcpu->arch.apic_base;
465 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
467 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
469 return kvm_apic_mode(kvm_get_apic_base(vcpu));
471 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
473 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
475 enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
476 enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
477 u64 reserved_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu) | 0x2ff |
478 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
480 if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
482 if (!msr_info->host_initiated) {
483 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
485 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
489 kvm_lapic_set_base(vcpu, msr_info->data);
490 kvm_recalculate_apic_map(vcpu->kvm);
493 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
496 * Handle a fault on a hardware virtualization (VMX or SVM) instruction.
498 * Hardware virtualization extension instructions may fault if a reboot turns
499 * off virtualization while processes are running. Usually after catching the
500 * fault we just panic; during reboot instead the instruction is ignored.
502 noinstr void kvm_spurious_fault(void)
504 /* Fault while not rebooting. We want the trace. */
505 BUG_ON(!kvm_rebooting);
507 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
509 #define EXCPT_BENIGN 0
510 #define EXCPT_CONTRIBUTORY 1
513 static int exception_class(int vector)
523 return EXCPT_CONTRIBUTORY;
530 #define EXCPT_FAULT 0
532 #define EXCPT_ABORT 2
533 #define EXCPT_INTERRUPT 3
535 static int exception_type(int vector)
539 if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
540 return EXCPT_INTERRUPT;
544 /* #DB is trap, as instruction watchpoints are handled elsewhere */
545 if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
548 if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
551 /* Reserved exceptions will result in fault */
555 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
557 unsigned nr = vcpu->arch.exception.nr;
558 bool has_payload = vcpu->arch.exception.has_payload;
559 unsigned long payload = vcpu->arch.exception.payload;
567 * "Certain debug exceptions may clear bit 0-3. The
568 * remaining contents of the DR6 register are never
569 * cleared by the processor".
571 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
573 * In order to reflect the #DB exception payload in guest
574 * dr6, three components need to be considered: active low
575 * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
577 * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
578 * In the target guest dr6:
579 * FIXED_1 bits should always be set.
580 * Active low bits should be cleared if 1-setting in payload.
581 * Active high bits should be set if 1-setting in payload.
583 * Note, the payload is compatible with the pending debug
584 * exceptions/exit qualification under VMX, that active_low bits
585 * are active high in payload.
586 * So they need to be flipped for DR6.
588 vcpu->arch.dr6 |= DR6_ACTIVE_LOW;
589 vcpu->arch.dr6 |= payload;
590 vcpu->arch.dr6 ^= payload & DR6_ACTIVE_LOW;
593 * The #DB payload is defined as compatible with the 'pending
594 * debug exceptions' field under VMX, not DR6. While bit 12 is
595 * defined in the 'pending debug exceptions' field (enabled
596 * breakpoint), it is reserved and must be zero in DR6.
598 vcpu->arch.dr6 &= ~BIT(12);
601 vcpu->arch.cr2 = payload;
605 vcpu->arch.exception.has_payload = false;
606 vcpu->arch.exception.payload = 0;
608 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
610 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
611 unsigned nr, bool has_error, u32 error_code,
612 bool has_payload, unsigned long payload, bool reinject)
617 kvm_make_request(KVM_REQ_EVENT, vcpu);
619 if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
623 * On vmentry, vcpu->arch.exception.pending is only
624 * true if an event injection was blocked by
625 * nested_run_pending. In that case, however,
626 * vcpu_enter_guest requests an immediate exit,
627 * and the guest shouldn't proceed far enough to
630 WARN_ON_ONCE(vcpu->arch.exception.pending);
631 vcpu->arch.exception.injected = true;
632 if (WARN_ON_ONCE(has_payload)) {
634 * A reinjected event has already
635 * delivered its payload.
641 vcpu->arch.exception.pending = true;
642 vcpu->arch.exception.injected = false;
644 vcpu->arch.exception.has_error_code = has_error;
645 vcpu->arch.exception.nr = nr;
646 vcpu->arch.exception.error_code = error_code;
647 vcpu->arch.exception.has_payload = has_payload;
648 vcpu->arch.exception.payload = payload;
649 if (!is_guest_mode(vcpu))
650 kvm_deliver_exception_payload(vcpu);
654 /* to check exception */
655 prev_nr = vcpu->arch.exception.nr;
656 if (prev_nr == DF_VECTOR) {
657 /* triple fault -> shutdown */
658 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
661 class1 = exception_class(prev_nr);
662 class2 = exception_class(nr);
663 if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
664 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
666 * Generate double fault per SDM Table 5-5. Set
667 * exception.pending = true so that the double fault
668 * can trigger a nested vmexit.
670 vcpu->arch.exception.pending = true;
671 vcpu->arch.exception.injected = false;
672 vcpu->arch.exception.has_error_code = true;
673 vcpu->arch.exception.nr = DF_VECTOR;
674 vcpu->arch.exception.error_code = 0;
675 vcpu->arch.exception.has_payload = false;
676 vcpu->arch.exception.payload = 0;
678 /* replace previous exception with a new one in a hope
679 that instruction re-execution will regenerate lost
684 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
686 kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
688 EXPORT_SYMBOL_GPL(kvm_queue_exception);
690 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
692 kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
694 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
696 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
697 unsigned long payload)
699 kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
701 EXPORT_SYMBOL_GPL(kvm_queue_exception_p);
703 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
704 u32 error_code, unsigned long payload)
706 kvm_multiple_exception(vcpu, nr, true, error_code,
707 true, payload, false);
710 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
713 kvm_inject_gp(vcpu, 0);
715 return kvm_skip_emulated_instruction(vcpu);
719 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
721 static int complete_emulated_insn_gp(struct kvm_vcpu *vcpu, int err)
724 kvm_inject_gp(vcpu, 0);
728 return kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE | EMULTYPE_SKIP |
729 EMULTYPE_COMPLETE_USER_EXIT);
732 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
734 ++vcpu->stat.pf_guest;
735 vcpu->arch.exception.nested_apf =
736 is_guest_mode(vcpu) && fault->async_page_fault;
737 if (vcpu->arch.exception.nested_apf) {
738 vcpu->arch.apf.nested_apf_token = fault->address;
739 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
741 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
745 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
747 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
748 struct x86_exception *fault)
750 struct kvm_mmu *fault_mmu;
751 WARN_ON_ONCE(fault->vector != PF_VECTOR);
753 fault_mmu = fault->nested_page_fault ? vcpu->arch.mmu :
757 * Invalidate the TLB entry for the faulting address, if it exists,
758 * else the access will fault indefinitely (and to emulate hardware).
760 if ((fault->error_code & PFERR_PRESENT_MASK) &&
761 !(fault->error_code & PFERR_RSVD_MASK))
762 kvm_mmu_invalidate_gva(vcpu, fault_mmu, fault->address,
763 fault_mmu->root_hpa);
765 fault_mmu->inject_page_fault(vcpu, fault);
766 return fault->nested_page_fault;
768 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault);
770 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
772 atomic_inc(&vcpu->arch.nmi_queued);
773 kvm_make_request(KVM_REQ_NMI, vcpu);
775 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
777 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
779 kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
781 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
783 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
785 kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
787 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
790 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
791 * a #GP and return false.
793 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
795 if (static_call(kvm_x86_get_cpl)(vcpu) <= required_cpl)
797 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
800 EXPORT_SYMBOL_GPL(kvm_require_cpl);
802 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
804 if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
807 kvm_queue_exception(vcpu, UD_VECTOR);
810 EXPORT_SYMBOL_GPL(kvm_require_dr);
812 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
814 return vcpu->arch.reserved_gpa_bits | rsvd_bits(5, 8) | rsvd_bits(1, 2);
818 * Load the pae pdptrs. Return 1 if they are all valid, 0 otherwise.
820 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
822 struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
823 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
827 u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
830 * If the MMU is nested, CR3 holds an L2 GPA and needs to be translated
833 real_gpa = kvm_translate_gpa(vcpu, mmu, gfn_to_gpa(pdpt_gfn),
834 PFERR_USER_MASK | PFERR_WRITE_MASK, NULL);
835 if (real_gpa == UNMAPPED_GVA)
838 /* Note the offset, PDPTRs are 32 byte aligned when using PAE paging. */
839 ret = kvm_vcpu_read_guest_page(vcpu, gpa_to_gfn(real_gpa), pdpte,
840 cr3 & GENMASK(11, 5), sizeof(pdpte));
844 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
845 if ((pdpte[i] & PT_PRESENT_MASK) &&
846 (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
852 * Marking VCPU_EXREG_PDPTR dirty doesn't work for !tdp_enabled.
853 * Shadow page roots need to be reconstructed instead.
855 if (!tdp_enabled && memcmp(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs)))
856 kvm_mmu_free_roots(vcpu, mmu, KVM_MMU_ROOT_CURRENT);
858 memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
859 kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
860 kvm_make_request(KVM_REQ_LOAD_MMU_PGD, vcpu);
861 vcpu->arch.pdptrs_from_userspace = false;
865 EXPORT_SYMBOL_GPL(load_pdptrs);
867 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0)
869 if ((cr0 ^ old_cr0) & X86_CR0_PG) {
870 kvm_clear_async_pf_completion_queue(vcpu);
871 kvm_async_pf_hash_reset(vcpu);
874 if ((cr0 ^ old_cr0) & KVM_MMU_CR0_ROLE_BITS)
875 kvm_mmu_reset_context(vcpu);
877 if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
878 kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
879 !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
880 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
882 EXPORT_SYMBOL_GPL(kvm_post_set_cr0);
884 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
886 unsigned long old_cr0 = kvm_read_cr0(vcpu);
891 if (cr0 & 0xffffffff00000000UL)
895 cr0 &= ~CR0_RESERVED_BITS;
897 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
900 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
904 if ((vcpu->arch.efer & EFER_LME) && !is_paging(vcpu) &&
905 (cr0 & X86_CR0_PG)) {
910 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
915 if (!(vcpu->arch.efer & EFER_LME) && (cr0 & X86_CR0_PG) &&
916 is_pae(vcpu) && ((cr0 ^ old_cr0) & X86_CR0_PDPTR_BITS) &&
917 !load_pdptrs(vcpu, kvm_read_cr3(vcpu)))
920 if (!(cr0 & X86_CR0_PG) &&
921 (is_64_bit_mode(vcpu) || kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE)))
924 static_call(kvm_x86_set_cr0)(vcpu, cr0);
926 kvm_post_set_cr0(vcpu, old_cr0, cr0);
930 EXPORT_SYMBOL_GPL(kvm_set_cr0);
932 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
934 (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
936 EXPORT_SYMBOL_GPL(kvm_lmsw);
938 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
940 if (vcpu->arch.guest_state_protected)
943 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
945 if (vcpu->arch.xcr0 != host_xcr0)
946 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
948 if (vcpu->arch.xsaves_enabled &&
949 vcpu->arch.ia32_xss != host_xss)
950 wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
953 if (static_cpu_has(X86_FEATURE_PKU) &&
954 (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
955 (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU)) &&
956 vcpu->arch.pkru != vcpu->arch.host_pkru)
957 write_pkru(vcpu->arch.pkru);
959 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
961 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
963 if (vcpu->arch.guest_state_protected)
966 if (static_cpu_has(X86_FEATURE_PKU) &&
967 (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
968 (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU))) {
969 vcpu->arch.pkru = rdpkru();
970 if (vcpu->arch.pkru != vcpu->arch.host_pkru)
971 write_pkru(vcpu->arch.host_pkru);
974 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
976 if (vcpu->arch.xcr0 != host_xcr0)
977 xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
979 if (vcpu->arch.xsaves_enabled &&
980 vcpu->arch.ia32_xss != host_xss)
981 wrmsrl(MSR_IA32_XSS, host_xss);
985 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
987 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
990 u64 old_xcr0 = vcpu->arch.xcr0;
993 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
994 if (index != XCR_XFEATURE_ENABLED_MASK)
996 if (!(xcr0 & XFEATURE_MASK_FP))
998 if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
1002 * Do not allow the guest to set bits that we do not support
1003 * saving. However, xcr0 bit 0 is always set, even if the
1004 * emulated CPU does not support XSAVE (see kvm_vcpu_reset()).
1006 valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
1007 if (xcr0 & ~valid_bits)
1010 if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
1011 (!(xcr0 & XFEATURE_MASK_BNDCSR)))
1014 if (xcr0 & XFEATURE_MASK_AVX512) {
1015 if (!(xcr0 & XFEATURE_MASK_YMM))
1017 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
1021 if ((xcr0 & XFEATURE_MASK_XTILE) &&
1022 ((xcr0 & XFEATURE_MASK_XTILE) != XFEATURE_MASK_XTILE))
1025 vcpu->arch.xcr0 = xcr0;
1027 if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
1028 kvm_update_cpuid_runtime(vcpu);
1032 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu)
1034 if (static_call(kvm_x86_get_cpl)(vcpu) != 0 ||
1035 __kvm_set_xcr(vcpu, kvm_rcx_read(vcpu), kvm_read_edx_eax(vcpu))) {
1036 kvm_inject_gp(vcpu, 0);
1040 return kvm_skip_emulated_instruction(vcpu);
1042 EXPORT_SYMBOL_GPL(kvm_emulate_xsetbv);
1044 bool kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1046 if (cr4 & cr4_reserved_bits)
1049 if (cr4 & vcpu->arch.cr4_guest_rsvd_bits)
1052 return static_call(kvm_x86_is_valid_cr4)(vcpu, cr4);
1054 EXPORT_SYMBOL_GPL(kvm_is_valid_cr4);
1056 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4)
1059 * If any role bit is changed, the MMU needs to be reset.
1061 * If CR4.PCIDE is changed 1 -> 0, the guest TLB must be flushed.
1062 * If CR4.PCIDE is changed 0 -> 1, there is no need to flush the TLB
1063 * according to the SDM; however, stale prev_roots could be reused
1064 * incorrectly in the future after a MOV to CR3 with NOFLUSH=1, so we
1065 * free them all. KVM_REQ_MMU_RELOAD is fit for the both cases; it
1066 * is slow, but changing CR4.PCIDE is a rare case.
1068 * If CR4.PGE is changed, the guest TLB must be flushed.
1070 * Note: resetting MMU is a superset of KVM_REQ_MMU_RELOAD and
1071 * KVM_REQ_MMU_RELOAD is a superset of KVM_REQ_TLB_FLUSH_GUEST, hence
1072 * the usage of "else if".
1074 if ((cr4 ^ old_cr4) & KVM_MMU_CR4_ROLE_BITS)
1075 kvm_mmu_reset_context(vcpu);
1076 else if ((cr4 ^ old_cr4) & X86_CR4_PCIDE)
1077 kvm_make_request(KVM_REQ_MMU_RELOAD, vcpu);
1078 else if ((cr4 ^ old_cr4) & X86_CR4_PGE)
1079 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
1081 EXPORT_SYMBOL_GPL(kvm_post_set_cr4);
1083 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1085 unsigned long old_cr4 = kvm_read_cr4(vcpu);
1087 if (!kvm_is_valid_cr4(vcpu, cr4))
1090 if (is_long_mode(vcpu)) {
1091 if (!(cr4 & X86_CR4_PAE))
1093 if ((cr4 ^ old_cr4) & X86_CR4_LA57)
1095 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
1096 && ((cr4 ^ old_cr4) & X86_CR4_PDPTR_BITS)
1097 && !load_pdptrs(vcpu, kvm_read_cr3(vcpu)))
1100 if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
1101 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
1104 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1105 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
1109 static_call(kvm_x86_set_cr4)(vcpu, cr4);
1111 kvm_post_set_cr4(vcpu, old_cr4, cr4);
1115 EXPORT_SYMBOL_GPL(kvm_set_cr4);
1117 static void kvm_invalidate_pcid(struct kvm_vcpu *vcpu, unsigned long pcid)
1119 struct kvm_mmu *mmu = vcpu->arch.mmu;
1120 unsigned long roots_to_free = 0;
1124 * MOV CR3 and INVPCID are usually not intercepted when using TDP, but
1125 * this is reachable when running EPT=1 and unrestricted_guest=0, and
1126 * also via the emulator. KVM's TDP page tables are not in the scope of
1127 * the invalidation, but the guest's TLB entries need to be flushed as
1128 * the CPU may have cached entries in its TLB for the target PCID.
1130 if (unlikely(tdp_enabled)) {
1131 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
1136 * If neither the current CR3 nor any of the prev_roots use the given
1137 * PCID, then nothing needs to be done here because a resync will
1138 * happen anyway before switching to any other CR3.
1140 if (kvm_get_active_pcid(vcpu) == pcid) {
1141 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
1142 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1146 * If PCID is disabled, there is no need to free prev_roots even if the
1147 * PCIDs for them are also 0, because MOV to CR3 always flushes the TLB
1150 if (!kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
1153 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
1154 if (kvm_get_pcid(vcpu, mmu->prev_roots[i].pgd) == pcid)
1155 roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
1157 kvm_mmu_free_roots(vcpu, mmu, roots_to_free);
1160 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1162 bool skip_tlb_flush = false;
1163 unsigned long pcid = 0;
1164 #ifdef CONFIG_X86_64
1165 bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
1168 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
1169 cr3 &= ~X86_CR3_PCID_NOFLUSH;
1170 pcid = cr3 & X86_CR3_PCID_MASK;
1174 /* PDPTRs are always reloaded for PAE paging. */
1175 if (cr3 == kvm_read_cr3(vcpu) && !is_pae_paging(vcpu))
1176 goto handle_tlb_flush;
1179 * Do not condition the GPA check on long mode, this helper is used to
1180 * stuff CR3, e.g. for RSM emulation, and there is no guarantee that
1181 * the current vCPU mode is accurate.
1183 if (kvm_vcpu_is_illegal_gpa(vcpu, cr3))
1186 if (is_pae_paging(vcpu) && !load_pdptrs(vcpu, cr3))
1189 if (cr3 != kvm_read_cr3(vcpu))
1190 kvm_mmu_new_pgd(vcpu, cr3);
1192 vcpu->arch.cr3 = cr3;
1193 kvm_register_mark_dirty(vcpu, VCPU_EXREG_CR3);
1194 /* Do not call post_set_cr3, we do not get here for confidential guests. */
1198 * A load of CR3 that flushes the TLB flushes only the current PCID,
1199 * even if PCID is disabled, in which case PCID=0 is flushed. It's a
1200 * moot point in the end because _disabling_ PCID will flush all PCIDs,
1201 * and it's impossible to use a non-zero PCID when PCID is disabled,
1202 * i.e. only PCID=0 can be relevant.
1204 if (!skip_tlb_flush)
1205 kvm_invalidate_pcid(vcpu, pcid);
1209 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1211 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1213 if (cr8 & CR8_RESERVED_BITS)
1215 if (lapic_in_kernel(vcpu))
1216 kvm_lapic_set_tpr(vcpu, cr8);
1218 vcpu->arch.cr8 = cr8;
1221 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1223 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1225 if (lapic_in_kernel(vcpu))
1226 return kvm_lapic_get_cr8(vcpu);
1228 return vcpu->arch.cr8;
1230 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1232 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1236 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1237 for (i = 0; i < KVM_NR_DB_REGS; i++)
1238 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1242 void kvm_update_dr7(struct kvm_vcpu *vcpu)
1246 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1247 dr7 = vcpu->arch.guest_debug_dr7;
1249 dr7 = vcpu->arch.dr7;
1250 static_call(kvm_x86_set_dr7)(vcpu, dr7);
1251 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1252 if (dr7 & DR7_BP_EN_MASK)
1253 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1255 EXPORT_SYMBOL_GPL(kvm_update_dr7);
1257 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1259 u64 fixed = DR6_FIXED_1;
1261 if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1264 if (!guest_cpuid_has(vcpu, X86_FEATURE_BUS_LOCK_DETECT))
1265 fixed |= DR6_BUS_LOCK;
1269 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1271 size_t size = ARRAY_SIZE(vcpu->arch.db);
1275 vcpu->arch.db[array_index_nospec(dr, size)] = val;
1276 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1277 vcpu->arch.eff_db[dr] = val;
1281 if (!kvm_dr6_valid(val))
1283 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1287 if (!kvm_dr7_valid(val))
1289 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1290 kvm_update_dr7(vcpu);
1296 EXPORT_SYMBOL_GPL(kvm_set_dr);
1298 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1300 size_t size = ARRAY_SIZE(vcpu->arch.db);
1304 *val = vcpu->arch.db[array_index_nospec(dr, size)];
1308 *val = vcpu->arch.dr6;
1312 *val = vcpu->arch.dr7;
1316 EXPORT_SYMBOL_GPL(kvm_get_dr);
1318 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu)
1320 u32 ecx = kvm_rcx_read(vcpu);
1323 if (kvm_pmu_rdpmc(vcpu, ecx, &data)) {
1324 kvm_inject_gp(vcpu, 0);
1328 kvm_rax_write(vcpu, (u32)data);
1329 kvm_rdx_write(vcpu, data >> 32);
1330 return kvm_skip_emulated_instruction(vcpu);
1332 EXPORT_SYMBOL_GPL(kvm_emulate_rdpmc);
1335 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1336 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1338 * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1339 * extract the supported MSRs from the related const lists.
1340 * msrs_to_save is selected from the msrs_to_save_all to reflect the
1341 * capabilities of the host cpu. This capabilities test skips MSRs that are
1342 * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1343 * may depend on host virtualization features rather than host cpu features.
1346 static const u32 msrs_to_save_all[] = {
1347 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1349 #ifdef CONFIG_X86_64
1350 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1352 MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1353 MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1355 MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1356 MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1357 MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1358 MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1359 MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1360 MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1361 MSR_IA32_UMWAIT_CONTROL,
1363 MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1364 MSR_ARCH_PERFMON_FIXED_CTR0 + 2,
1365 MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1366 MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1367 MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1368 MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1369 MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1370 MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1371 MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1372 MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1373 MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1374 MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1375 MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1376 MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1377 MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1378 MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1379 MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1380 MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1381 MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1382 MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1383 MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1384 MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1386 MSR_K7_EVNTSEL0, MSR_K7_EVNTSEL1, MSR_K7_EVNTSEL2, MSR_K7_EVNTSEL3,
1387 MSR_K7_PERFCTR0, MSR_K7_PERFCTR1, MSR_K7_PERFCTR2, MSR_K7_PERFCTR3,
1388 MSR_F15H_PERF_CTL0, MSR_F15H_PERF_CTL1, MSR_F15H_PERF_CTL2,
1389 MSR_F15H_PERF_CTL3, MSR_F15H_PERF_CTL4, MSR_F15H_PERF_CTL5,
1390 MSR_F15H_PERF_CTR0, MSR_F15H_PERF_CTR1, MSR_F15H_PERF_CTR2,
1391 MSR_F15H_PERF_CTR3, MSR_F15H_PERF_CTR4, MSR_F15H_PERF_CTR5,
1392 MSR_IA32_XFD, MSR_IA32_XFD_ERR,
1395 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
1396 static unsigned num_msrs_to_save;
1398 static const u32 emulated_msrs_all[] = {
1399 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1400 MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1401 HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1402 HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1403 HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1404 HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1405 HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1407 HV_X64_MSR_VP_INDEX,
1408 HV_X64_MSR_VP_RUNTIME,
1409 HV_X64_MSR_SCONTROL,
1410 HV_X64_MSR_STIMER0_CONFIG,
1411 HV_X64_MSR_VP_ASSIST_PAGE,
1412 HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1413 HV_X64_MSR_TSC_EMULATION_STATUS,
1414 HV_X64_MSR_SYNDBG_OPTIONS,
1415 HV_X64_MSR_SYNDBG_CONTROL, HV_X64_MSR_SYNDBG_STATUS,
1416 HV_X64_MSR_SYNDBG_SEND_BUFFER, HV_X64_MSR_SYNDBG_RECV_BUFFER,
1417 HV_X64_MSR_SYNDBG_PENDING_BUFFER,
1419 MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1420 MSR_KVM_PV_EOI_EN, MSR_KVM_ASYNC_PF_INT, MSR_KVM_ASYNC_PF_ACK,
1422 MSR_IA32_TSC_ADJUST,
1423 MSR_IA32_TSC_DEADLINE,
1424 MSR_IA32_ARCH_CAPABILITIES,
1425 MSR_IA32_PERF_CAPABILITIES,
1426 MSR_IA32_MISC_ENABLE,
1427 MSR_IA32_MCG_STATUS,
1429 MSR_IA32_MCG_EXT_CTL,
1433 MSR_MISC_FEATURES_ENABLES,
1434 MSR_AMD64_VIRT_SPEC_CTRL,
1435 MSR_AMD64_TSC_RATIO,
1440 * The following list leaves out MSRs whose values are determined
1441 * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1442 * We always support the "true" VMX control MSRs, even if the host
1443 * processor does not, so I am putting these registers here rather
1444 * than in msrs_to_save_all.
1447 MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1448 MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1449 MSR_IA32_VMX_TRUE_EXIT_CTLS,
1450 MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1452 MSR_IA32_VMX_CR0_FIXED0,
1453 MSR_IA32_VMX_CR4_FIXED0,
1454 MSR_IA32_VMX_VMCS_ENUM,
1455 MSR_IA32_VMX_PROCBASED_CTLS2,
1456 MSR_IA32_VMX_EPT_VPID_CAP,
1457 MSR_IA32_VMX_VMFUNC,
1460 MSR_KVM_POLL_CONTROL,
1463 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1464 static unsigned num_emulated_msrs;
1467 * List of msr numbers which are used to expose MSR-based features that
1468 * can be used by a hypervisor to validate requested CPU features.
1470 static const u32 msr_based_features_all[] = {
1472 MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1473 MSR_IA32_VMX_PINBASED_CTLS,
1474 MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1475 MSR_IA32_VMX_PROCBASED_CTLS,
1476 MSR_IA32_VMX_TRUE_EXIT_CTLS,
1477 MSR_IA32_VMX_EXIT_CTLS,
1478 MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1479 MSR_IA32_VMX_ENTRY_CTLS,
1481 MSR_IA32_VMX_CR0_FIXED0,
1482 MSR_IA32_VMX_CR0_FIXED1,
1483 MSR_IA32_VMX_CR4_FIXED0,
1484 MSR_IA32_VMX_CR4_FIXED1,
1485 MSR_IA32_VMX_VMCS_ENUM,
1486 MSR_IA32_VMX_PROCBASED_CTLS2,
1487 MSR_IA32_VMX_EPT_VPID_CAP,
1488 MSR_IA32_VMX_VMFUNC,
1492 MSR_IA32_ARCH_CAPABILITIES,
1493 MSR_IA32_PERF_CAPABILITIES,
1496 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
1497 static unsigned int num_msr_based_features;
1499 static u64 kvm_get_arch_capabilities(void)
1503 if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1504 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1507 * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1508 * the nested hypervisor runs with NX huge pages. If it is not,
1509 * L1 is anyway vulnerable to ITLB_MULTIHIT exploits from other
1510 * L1 guests, so it need not worry about its own (L2) guests.
1512 data |= ARCH_CAP_PSCHANGE_MC_NO;
1515 * If we're doing cache flushes (either "always" or "cond")
1516 * we will do one whenever the guest does a vmlaunch/vmresume.
1517 * If an outer hypervisor is doing the cache flush for us
1518 * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1519 * capability to the guest too, and if EPT is disabled we're not
1520 * vulnerable. Overall, only VMENTER_L1D_FLUSH_NEVER will
1521 * require a nested hypervisor to do a flush of its own.
1523 if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1524 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1526 if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1527 data |= ARCH_CAP_RDCL_NO;
1528 if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1529 data |= ARCH_CAP_SSB_NO;
1530 if (!boot_cpu_has_bug(X86_BUG_MDS))
1531 data |= ARCH_CAP_MDS_NO;
1533 if (!boot_cpu_has(X86_FEATURE_RTM)) {
1535 * If RTM=0 because the kernel has disabled TSX, the host might
1536 * have TAA_NO or TSX_CTRL. Clear TAA_NO (the guest sees RTM=0
1537 * and therefore knows that there cannot be TAA) but keep
1538 * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1539 * and we want to allow migrating those guests to tsx=off hosts.
1541 data &= ~ARCH_CAP_TAA_NO;
1542 } else if (!boot_cpu_has_bug(X86_BUG_TAA)) {
1543 data |= ARCH_CAP_TAA_NO;
1546 * Nothing to do here; we emulate TSX_CTRL if present on the
1547 * host so the guest can choose between disabling TSX or
1548 * using VERW to clear CPU buffers.
1555 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1557 switch (msr->index) {
1558 case MSR_IA32_ARCH_CAPABILITIES:
1559 msr->data = kvm_get_arch_capabilities();
1561 case MSR_IA32_UCODE_REV:
1562 rdmsrl_safe(msr->index, &msr->data);
1565 return static_call(kvm_x86_get_msr_feature)(msr);
1570 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1572 struct kvm_msr_entry msr;
1576 r = kvm_get_msr_feature(&msr);
1578 if (r == KVM_MSR_RET_INVALID) {
1579 /* Unconditionally clear the output for simplicity */
1581 if (kvm_msr_ignored_check(index, 0, false))
1593 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1595 if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1598 if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1601 if (efer & (EFER_LME | EFER_LMA) &&
1602 !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1605 if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1611 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1613 if (efer & efer_reserved_bits)
1616 return __kvm_valid_efer(vcpu, efer);
1618 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1620 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1622 u64 old_efer = vcpu->arch.efer;
1623 u64 efer = msr_info->data;
1626 if (efer & efer_reserved_bits)
1629 if (!msr_info->host_initiated) {
1630 if (!__kvm_valid_efer(vcpu, efer))
1633 if (is_paging(vcpu) &&
1634 (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1639 efer |= vcpu->arch.efer & EFER_LMA;
1641 r = static_call(kvm_x86_set_efer)(vcpu, efer);
1647 /* Update reserved bits */
1648 if ((efer ^ old_efer) & EFER_NX)
1649 kvm_mmu_reset_context(vcpu);
1654 void kvm_enable_efer_bits(u64 mask)
1656 efer_reserved_bits &= ~mask;
1658 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1660 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type)
1662 struct kvm_x86_msr_filter *msr_filter;
1663 struct msr_bitmap_range *ranges;
1664 struct kvm *kvm = vcpu->kvm;
1669 /* x2APIC MSRs do not support filtering. */
1670 if (index >= 0x800 && index <= 0x8ff)
1673 idx = srcu_read_lock(&kvm->srcu);
1675 msr_filter = srcu_dereference(kvm->arch.msr_filter, &kvm->srcu);
1681 allowed = msr_filter->default_allow;
1682 ranges = msr_filter->ranges;
1684 for (i = 0; i < msr_filter->count; i++) {
1685 u32 start = ranges[i].base;
1686 u32 end = start + ranges[i].nmsrs;
1687 u32 flags = ranges[i].flags;
1688 unsigned long *bitmap = ranges[i].bitmap;
1690 if ((index >= start) && (index < end) && (flags & type)) {
1691 allowed = !!test_bit(index - start, bitmap);
1697 srcu_read_unlock(&kvm->srcu, idx);
1701 EXPORT_SYMBOL_GPL(kvm_msr_allowed);
1704 * Write @data into the MSR specified by @index. Select MSR specific fault
1705 * checks are bypassed if @host_initiated is %true.
1706 * Returns 0 on success, non-0 otherwise.
1707 * Assumes vcpu_load() was already called.
1709 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1710 bool host_initiated)
1712 struct msr_data msr;
1714 if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_WRITE))
1715 return KVM_MSR_RET_FILTERED;
1720 case MSR_KERNEL_GS_BASE:
1723 if (is_noncanonical_address(data, vcpu))
1726 case MSR_IA32_SYSENTER_EIP:
1727 case MSR_IA32_SYSENTER_ESP:
1729 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1730 * non-canonical address is written on Intel but not on
1731 * AMD (which ignores the top 32-bits, because it does
1732 * not implement 64-bit SYSENTER).
1734 * 64-bit code should hence be able to write a non-canonical
1735 * value on AMD. Making the address canonical ensures that
1736 * vmentry does not fail on Intel after writing a non-canonical
1737 * value, and that something deterministic happens if the guest
1738 * invokes 64-bit SYSENTER.
1740 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1743 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1746 if (!host_initiated &&
1747 !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1748 !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1752 * Per Intel's SDM, bits 63:32 are reserved, but AMD's APM has
1753 * incomplete and conflicting architectural behavior. Current
1754 * AMD CPUs completely ignore bits 63:32, i.e. they aren't
1755 * reserved and always read as zeros. Enforce Intel's reserved
1756 * bits check if and only if the guest CPU is Intel, and clear
1757 * the bits in all other cases. This ensures cross-vendor
1758 * migration will provide consistent behavior for the guest.
1760 if (guest_cpuid_is_intel(vcpu) && (data >> 32) != 0)
1769 msr.host_initiated = host_initiated;
1771 return static_call(kvm_x86_set_msr)(vcpu, &msr);
1774 static int kvm_set_msr_ignored_check(struct kvm_vcpu *vcpu,
1775 u32 index, u64 data, bool host_initiated)
1777 int ret = __kvm_set_msr(vcpu, index, data, host_initiated);
1779 if (ret == KVM_MSR_RET_INVALID)
1780 if (kvm_msr_ignored_check(index, data, true))
1787 * Read the MSR specified by @index into @data. Select MSR specific fault
1788 * checks are bypassed if @host_initiated is %true.
1789 * Returns 0 on success, non-0 otherwise.
1790 * Assumes vcpu_load() was already called.
1792 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1793 bool host_initiated)
1795 struct msr_data msr;
1798 if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_READ))
1799 return KVM_MSR_RET_FILTERED;
1803 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1806 if (!host_initiated &&
1807 !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1808 !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1814 msr.host_initiated = host_initiated;
1816 ret = static_call(kvm_x86_get_msr)(vcpu, &msr);
1822 static int kvm_get_msr_ignored_check(struct kvm_vcpu *vcpu,
1823 u32 index, u64 *data, bool host_initiated)
1825 int ret = __kvm_get_msr(vcpu, index, data, host_initiated);
1827 if (ret == KVM_MSR_RET_INVALID) {
1828 /* Unconditionally clear *data for simplicity */
1830 if (kvm_msr_ignored_check(index, 0, false))
1837 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1839 return kvm_get_msr_ignored_check(vcpu, index, data, false);
1841 EXPORT_SYMBOL_GPL(kvm_get_msr);
1843 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1845 return kvm_set_msr_ignored_check(vcpu, index, data, false);
1847 EXPORT_SYMBOL_GPL(kvm_set_msr);
1849 static void complete_userspace_rdmsr(struct kvm_vcpu *vcpu)
1851 if (!vcpu->run->msr.error) {
1852 kvm_rax_write(vcpu, (u32)vcpu->run->msr.data);
1853 kvm_rdx_write(vcpu, vcpu->run->msr.data >> 32);
1857 static int complete_emulated_msr_access(struct kvm_vcpu *vcpu)
1859 return complete_emulated_insn_gp(vcpu, vcpu->run->msr.error);
1862 static int complete_emulated_rdmsr(struct kvm_vcpu *vcpu)
1864 complete_userspace_rdmsr(vcpu);
1865 return complete_emulated_msr_access(vcpu);
1868 static int complete_fast_msr_access(struct kvm_vcpu *vcpu)
1870 return static_call(kvm_x86_complete_emulated_msr)(vcpu, vcpu->run->msr.error);
1873 static int complete_fast_rdmsr(struct kvm_vcpu *vcpu)
1875 complete_userspace_rdmsr(vcpu);
1876 return complete_fast_msr_access(vcpu);
1879 static u64 kvm_msr_reason(int r)
1882 case KVM_MSR_RET_INVALID:
1883 return KVM_MSR_EXIT_REASON_UNKNOWN;
1884 case KVM_MSR_RET_FILTERED:
1885 return KVM_MSR_EXIT_REASON_FILTER;
1887 return KVM_MSR_EXIT_REASON_INVAL;
1891 static int kvm_msr_user_space(struct kvm_vcpu *vcpu, u32 index,
1892 u32 exit_reason, u64 data,
1893 int (*completion)(struct kvm_vcpu *vcpu),
1896 u64 msr_reason = kvm_msr_reason(r);
1898 /* Check if the user wanted to know about this MSR fault */
1899 if (!(vcpu->kvm->arch.user_space_msr_mask & msr_reason))
1902 vcpu->run->exit_reason = exit_reason;
1903 vcpu->run->msr.error = 0;
1904 memset(vcpu->run->msr.pad, 0, sizeof(vcpu->run->msr.pad));
1905 vcpu->run->msr.reason = msr_reason;
1906 vcpu->run->msr.index = index;
1907 vcpu->run->msr.data = data;
1908 vcpu->arch.complete_userspace_io = completion;
1913 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1915 u32 ecx = kvm_rcx_read(vcpu);
1919 r = kvm_get_msr(vcpu, ecx, &data);
1922 trace_kvm_msr_read(ecx, data);
1924 kvm_rax_write(vcpu, data & -1u);
1925 kvm_rdx_write(vcpu, (data >> 32) & -1u);
1927 /* MSR read failed? See if we should ask user space */
1928 if (kvm_msr_user_space(vcpu, ecx, KVM_EXIT_X86_RDMSR, 0,
1929 complete_fast_rdmsr, r))
1931 trace_kvm_msr_read_ex(ecx);
1934 return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1936 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1938 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1940 u32 ecx = kvm_rcx_read(vcpu);
1941 u64 data = kvm_read_edx_eax(vcpu);
1944 r = kvm_set_msr(vcpu, ecx, data);
1947 trace_kvm_msr_write(ecx, data);
1949 /* MSR write failed? See if we should ask user space */
1950 if (kvm_msr_user_space(vcpu, ecx, KVM_EXIT_X86_WRMSR, data,
1951 complete_fast_msr_access, r))
1953 /* Signal all other negative errors to userspace */
1956 trace_kvm_msr_write_ex(ecx, data);
1959 return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1961 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1963 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu)
1965 return kvm_skip_emulated_instruction(vcpu);
1967 EXPORT_SYMBOL_GPL(kvm_emulate_as_nop);
1969 int kvm_emulate_invd(struct kvm_vcpu *vcpu)
1971 /* Treat an INVD instruction as a NOP and just skip it. */
1972 return kvm_emulate_as_nop(vcpu);
1974 EXPORT_SYMBOL_GPL(kvm_emulate_invd);
1976 int kvm_emulate_mwait(struct kvm_vcpu *vcpu)
1978 pr_warn_once("kvm: MWAIT instruction emulated as NOP!\n");
1979 return kvm_emulate_as_nop(vcpu);
1981 EXPORT_SYMBOL_GPL(kvm_emulate_mwait);
1983 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu)
1985 kvm_queue_exception(vcpu, UD_VECTOR);
1988 EXPORT_SYMBOL_GPL(kvm_handle_invalid_op);
1990 int kvm_emulate_monitor(struct kvm_vcpu *vcpu)
1992 pr_warn_once("kvm: MONITOR instruction emulated as NOP!\n");
1993 return kvm_emulate_as_nop(vcpu);
1995 EXPORT_SYMBOL_GPL(kvm_emulate_monitor);
1997 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu)
1999 xfer_to_guest_mode_prepare();
2000 return vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu) ||
2001 xfer_to_guest_mode_work_pending();
2005 * The fast path for frequent and performance sensitive wrmsr emulation,
2006 * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
2007 * the latency of virtual IPI by avoiding the expensive bits of transitioning
2008 * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
2009 * other cases which must be called after interrupts are enabled on the host.
2011 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
2013 if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic))
2016 if (((data & APIC_SHORT_MASK) == APIC_DEST_NOSHORT) &&
2017 ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
2018 ((data & APIC_MODE_MASK) == APIC_DM_FIXED) &&
2019 ((u32)(data >> 32) != X2APIC_BROADCAST)) {
2022 kvm_apic_send_ipi(vcpu->arch.apic, (u32)data, (u32)(data >> 32));
2023 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR2, (u32)(data >> 32));
2024 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR, (u32)data);
2025 trace_kvm_apic_write(APIC_ICR, (u32)data);
2032 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
2034 if (!kvm_can_use_hv_timer(vcpu))
2037 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2041 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
2043 u32 msr = kvm_rcx_read(vcpu);
2045 fastpath_t ret = EXIT_FASTPATH_NONE;
2048 case APIC_BASE_MSR + (APIC_ICR >> 4):
2049 data = kvm_read_edx_eax(vcpu);
2050 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu, data)) {
2051 kvm_skip_emulated_instruction(vcpu);
2052 ret = EXIT_FASTPATH_EXIT_HANDLED;
2055 case MSR_IA32_TSC_DEADLINE:
2056 data = kvm_read_edx_eax(vcpu);
2057 if (!handle_fastpath_set_tscdeadline(vcpu, data)) {
2058 kvm_skip_emulated_instruction(vcpu);
2059 ret = EXIT_FASTPATH_REENTER_GUEST;
2066 if (ret != EXIT_FASTPATH_NONE)
2067 trace_kvm_msr_write(msr, data);
2071 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
2074 * Adapt set_msr() to msr_io()'s calling convention
2076 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2078 return kvm_get_msr_ignored_check(vcpu, index, data, true);
2081 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2083 return kvm_set_msr_ignored_check(vcpu, index, *data, true);
2086 #ifdef CONFIG_X86_64
2087 struct pvclock_clock {
2097 struct pvclock_gtod_data {
2100 struct pvclock_clock clock; /* extract of a clocksource struct */
2101 struct pvclock_clock raw_clock; /* extract of a clocksource struct */
2107 static struct pvclock_gtod_data pvclock_gtod_data;
2109 static void update_pvclock_gtod(struct timekeeper *tk)
2111 struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
2113 write_seqcount_begin(&vdata->seq);
2115 /* copy pvclock gtod data */
2116 vdata->clock.vclock_mode = tk->tkr_mono.clock->vdso_clock_mode;
2117 vdata->clock.cycle_last = tk->tkr_mono.cycle_last;
2118 vdata->clock.mask = tk->tkr_mono.mask;
2119 vdata->clock.mult = tk->tkr_mono.mult;
2120 vdata->clock.shift = tk->tkr_mono.shift;
2121 vdata->clock.base_cycles = tk->tkr_mono.xtime_nsec;
2122 vdata->clock.offset = tk->tkr_mono.base;
2124 vdata->raw_clock.vclock_mode = tk->tkr_raw.clock->vdso_clock_mode;
2125 vdata->raw_clock.cycle_last = tk->tkr_raw.cycle_last;
2126 vdata->raw_clock.mask = tk->tkr_raw.mask;
2127 vdata->raw_clock.mult = tk->tkr_raw.mult;
2128 vdata->raw_clock.shift = tk->tkr_raw.shift;
2129 vdata->raw_clock.base_cycles = tk->tkr_raw.xtime_nsec;
2130 vdata->raw_clock.offset = tk->tkr_raw.base;
2132 vdata->wall_time_sec = tk->xtime_sec;
2134 vdata->offs_boot = tk->offs_boot;
2136 write_seqcount_end(&vdata->seq);
2139 static s64 get_kvmclock_base_ns(void)
2141 /* Count up from boot time, but with the frequency of the raw clock. */
2142 return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot));
2145 static s64 get_kvmclock_base_ns(void)
2147 /* Master clock not used, so we can just use CLOCK_BOOTTIME. */
2148 return ktime_get_boottime_ns();
2152 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock, int sec_hi_ofs)
2156 struct pvclock_wall_clock wc;
2163 r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
2168 ++version; /* first time write, random junk */
2172 if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
2176 * The guest calculates current wall clock time by adding
2177 * system time (updated by kvm_guest_time_update below) to the
2178 * wall clock specified here. We do the reverse here.
2180 wall_nsec = ktime_get_real_ns() - get_kvmclock_ns(kvm);
2182 wc.nsec = do_div(wall_nsec, 1000000000);
2183 wc.sec = (u32)wall_nsec; /* overflow in 2106 guest time */
2184 wc.version = version;
2186 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
2189 wc_sec_hi = wall_nsec >> 32;
2190 kvm_write_guest(kvm, wall_clock + sec_hi_ofs,
2191 &wc_sec_hi, sizeof(wc_sec_hi));
2195 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
2198 static void kvm_write_system_time(struct kvm_vcpu *vcpu, gpa_t system_time,
2199 bool old_msr, bool host_initiated)
2201 struct kvm_arch *ka = &vcpu->kvm->arch;
2203 if (vcpu->vcpu_id == 0 && !host_initiated) {
2204 if (ka->boot_vcpu_runs_old_kvmclock != old_msr)
2205 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2207 ka->boot_vcpu_runs_old_kvmclock = old_msr;
2210 vcpu->arch.time = system_time;
2211 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2213 /* we verify if the enable bit is set... */
2214 vcpu->arch.pv_time_enabled = false;
2215 if (!(system_time & 1))
2218 if (!kvm_gfn_to_hva_cache_init(vcpu->kvm,
2219 &vcpu->arch.pv_time, system_time & ~1ULL,
2220 sizeof(struct pvclock_vcpu_time_info)))
2221 vcpu->arch.pv_time_enabled = true;
2226 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
2228 do_shl32_div32(dividend, divisor);
2232 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
2233 s8 *pshift, u32 *pmultiplier)
2241 scaled64 = scaled_hz;
2242 while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
2247 tps32 = (uint32_t)tps64;
2248 while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
2249 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
2257 *pmultiplier = div_frac(scaled64, tps32);
2260 #ifdef CONFIG_X86_64
2261 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
2264 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
2265 static unsigned long max_tsc_khz;
2267 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
2269 u64 v = (u64)khz * (1000000 + ppm);
2274 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier);
2276 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
2280 /* Guest TSC same frequency as host TSC? */
2282 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2286 /* TSC scaling supported? */
2287 if (!kvm_has_tsc_control) {
2288 if (user_tsc_khz > tsc_khz) {
2289 vcpu->arch.tsc_catchup = 1;
2290 vcpu->arch.tsc_always_catchup = 1;
2293 pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2298 /* TSC scaling required - calculate ratio */
2299 ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
2300 user_tsc_khz, tsc_khz);
2302 if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
2303 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2308 kvm_vcpu_write_tsc_multiplier(vcpu, ratio);
2312 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
2314 u32 thresh_lo, thresh_hi;
2315 int use_scaling = 0;
2317 /* tsc_khz can be zero if TSC calibration fails */
2318 if (user_tsc_khz == 0) {
2319 /* set tsc_scaling_ratio to a safe value */
2320 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2324 /* Compute a scale to convert nanoseconds in TSC cycles */
2325 kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
2326 &vcpu->arch.virtual_tsc_shift,
2327 &vcpu->arch.virtual_tsc_mult);
2328 vcpu->arch.virtual_tsc_khz = user_tsc_khz;
2331 * Compute the variation in TSC rate which is acceptable
2332 * within the range of tolerance and decide if the
2333 * rate being applied is within that bounds of the hardware
2334 * rate. If so, no scaling or compensation need be done.
2336 thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
2337 thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
2338 if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
2339 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
2342 return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
2345 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
2347 u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
2348 vcpu->arch.virtual_tsc_mult,
2349 vcpu->arch.virtual_tsc_shift);
2350 tsc += vcpu->arch.this_tsc_write;
2354 static inline int gtod_is_based_on_tsc(int mode)
2356 return mode == VDSO_CLOCKMODE_TSC || mode == VDSO_CLOCKMODE_HVCLOCK;
2359 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
2361 #ifdef CONFIG_X86_64
2363 struct kvm_arch *ka = &vcpu->kvm->arch;
2364 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2366 vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2367 atomic_read(&vcpu->kvm->online_vcpus));
2370 * Once the masterclock is enabled, always perform request in
2371 * order to update it.
2373 * In order to enable masterclock, the host clocksource must be TSC
2374 * and the vcpus need to have matched TSCs. When that happens,
2375 * perform request to enable masterclock.
2377 if (ka->use_master_clock ||
2378 (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
2379 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2381 trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
2382 atomic_read(&vcpu->kvm->online_vcpus),
2383 ka->use_master_clock, gtod->clock.vclock_mode);
2388 * Multiply tsc by a fixed point number represented by ratio.
2390 * The most significant 64-N bits (mult) of ratio represent the
2391 * integral part of the fixed point number; the remaining N bits
2392 * (frac) represent the fractional part, ie. ratio represents a fixed
2393 * point number (mult + frac * 2^(-N)).
2395 * N equals to kvm_tsc_scaling_ratio_frac_bits.
2397 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
2399 return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
2402 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc, u64 ratio)
2406 if (ratio != kvm_default_tsc_scaling_ratio)
2407 _tsc = __scale_tsc(ratio, tsc);
2411 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
2413 static u64 kvm_compute_l1_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
2417 tsc = kvm_scale_tsc(vcpu, rdtsc(), vcpu->arch.l1_tsc_scaling_ratio);
2419 return target_tsc - tsc;
2422 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
2424 return vcpu->arch.l1_tsc_offset +
2425 kvm_scale_tsc(vcpu, host_tsc, vcpu->arch.l1_tsc_scaling_ratio);
2427 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
2429 u64 kvm_calc_nested_tsc_offset(u64 l1_offset, u64 l2_offset, u64 l2_multiplier)
2433 if (l2_multiplier == kvm_default_tsc_scaling_ratio)
2434 nested_offset = l1_offset;
2436 nested_offset = mul_s64_u64_shr((s64) l1_offset, l2_multiplier,
2437 kvm_tsc_scaling_ratio_frac_bits);
2439 nested_offset += l2_offset;
2440 return nested_offset;
2442 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_offset);
2444 u64 kvm_calc_nested_tsc_multiplier(u64 l1_multiplier, u64 l2_multiplier)
2446 if (l2_multiplier != kvm_default_tsc_scaling_ratio)
2447 return mul_u64_u64_shr(l1_multiplier, l2_multiplier,
2448 kvm_tsc_scaling_ratio_frac_bits);
2450 return l1_multiplier;
2452 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_multiplier);
2454 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 l1_offset)
2456 trace_kvm_write_tsc_offset(vcpu->vcpu_id,
2457 vcpu->arch.l1_tsc_offset,
2460 vcpu->arch.l1_tsc_offset = l1_offset;
2463 * If we are here because L1 chose not to trap WRMSR to TSC then
2464 * according to the spec this should set L1's TSC (as opposed to
2465 * setting L1's offset for L2).
2467 if (is_guest_mode(vcpu))
2468 vcpu->arch.tsc_offset = kvm_calc_nested_tsc_offset(
2470 static_call(kvm_x86_get_l2_tsc_offset)(vcpu),
2471 static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2473 vcpu->arch.tsc_offset = l1_offset;
2475 static_call(kvm_x86_write_tsc_offset)(vcpu, vcpu->arch.tsc_offset);
2478 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier)
2480 vcpu->arch.l1_tsc_scaling_ratio = l1_multiplier;
2482 /* Userspace is changing the multiplier while L2 is active */
2483 if (is_guest_mode(vcpu))
2484 vcpu->arch.tsc_scaling_ratio = kvm_calc_nested_tsc_multiplier(
2486 static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2488 vcpu->arch.tsc_scaling_ratio = l1_multiplier;
2490 if (kvm_has_tsc_control)
2491 static_call(kvm_x86_write_tsc_multiplier)(
2492 vcpu, vcpu->arch.tsc_scaling_ratio);
2495 static inline bool kvm_check_tsc_unstable(void)
2497 #ifdef CONFIG_X86_64
2499 * TSC is marked unstable when we're running on Hyper-V,
2500 * 'TSC page' clocksource is good.
2502 if (pvclock_gtod_data.clock.vclock_mode == VDSO_CLOCKMODE_HVCLOCK)
2505 return check_tsc_unstable();
2509 * Infers attempts to synchronize the guest's tsc from host writes. Sets the
2510 * offset for the vcpu and tracks the TSC matching generation that the vcpu
2513 static void __kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 offset, u64 tsc,
2514 u64 ns, bool matched)
2516 struct kvm *kvm = vcpu->kvm;
2518 lockdep_assert_held(&kvm->arch.tsc_write_lock);
2521 * We also track th most recent recorded KHZ, write and time to
2522 * allow the matching interval to be extended at each write.
2524 kvm->arch.last_tsc_nsec = ns;
2525 kvm->arch.last_tsc_write = tsc;
2526 kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2527 kvm->arch.last_tsc_offset = offset;
2529 vcpu->arch.last_guest_tsc = tsc;
2531 kvm_vcpu_write_tsc_offset(vcpu, offset);
2535 * We split periods of matched TSC writes into generations.
2536 * For each generation, we track the original measured
2537 * nanosecond time, offset, and write, so if TSCs are in
2538 * sync, we can match exact offset, and if not, we can match
2539 * exact software computation in compute_guest_tsc()
2541 * These values are tracked in kvm->arch.cur_xxx variables.
2543 kvm->arch.cur_tsc_generation++;
2544 kvm->arch.cur_tsc_nsec = ns;
2545 kvm->arch.cur_tsc_write = tsc;
2546 kvm->arch.cur_tsc_offset = offset;
2547 kvm->arch.nr_vcpus_matched_tsc = 0;
2548 } else if (vcpu->arch.this_tsc_generation != kvm->arch.cur_tsc_generation) {
2549 kvm->arch.nr_vcpus_matched_tsc++;
2552 /* Keep track of which generation this VCPU has synchronized to */
2553 vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2554 vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2555 vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2557 kvm_track_tsc_matching(vcpu);
2560 static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 data)
2562 struct kvm *kvm = vcpu->kvm;
2563 u64 offset, ns, elapsed;
2564 unsigned long flags;
2565 bool matched = false;
2566 bool synchronizing = false;
2568 raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
2569 offset = kvm_compute_l1_tsc_offset(vcpu, data);
2570 ns = get_kvmclock_base_ns();
2571 elapsed = ns - kvm->arch.last_tsc_nsec;
2573 if (vcpu->arch.virtual_tsc_khz) {
2576 * detection of vcpu initialization -- need to sync
2577 * with other vCPUs. This particularly helps to keep
2578 * kvm_clock stable after CPU hotplug
2580 synchronizing = true;
2582 u64 tsc_exp = kvm->arch.last_tsc_write +
2583 nsec_to_cycles(vcpu, elapsed);
2584 u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
2586 * Special case: TSC write with a small delta (1 second)
2587 * of virtual cycle time against real time is
2588 * interpreted as an attempt to synchronize the CPU.
2590 synchronizing = data < tsc_exp + tsc_hz &&
2591 data + tsc_hz > tsc_exp;
2596 * For a reliable TSC, we can match TSC offsets, and for an unstable
2597 * TSC, we add elapsed time in this computation. We could let the
2598 * compensation code attempt to catch up if we fall behind, but
2599 * it's better to try to match offsets from the beginning.
2601 if (synchronizing &&
2602 vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
2603 if (!kvm_check_tsc_unstable()) {
2604 offset = kvm->arch.cur_tsc_offset;
2606 u64 delta = nsec_to_cycles(vcpu, elapsed);
2608 offset = kvm_compute_l1_tsc_offset(vcpu, data);
2613 __kvm_synchronize_tsc(vcpu, offset, data, ns, matched);
2614 raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2617 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2620 u64 tsc_offset = vcpu->arch.l1_tsc_offset;
2621 kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2624 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2626 if (vcpu->arch.l1_tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
2627 WARN_ON(adjustment < 0);
2628 adjustment = kvm_scale_tsc(vcpu, (u64) adjustment,
2629 vcpu->arch.l1_tsc_scaling_ratio);
2630 adjust_tsc_offset_guest(vcpu, adjustment);
2633 #ifdef CONFIG_X86_64
2635 static u64 read_tsc(void)
2637 u64 ret = (u64)rdtsc_ordered();
2638 u64 last = pvclock_gtod_data.clock.cycle_last;
2640 if (likely(ret >= last))
2644 * GCC likes to generate cmov here, but this branch is extremely
2645 * predictable (it's just a function of time and the likely is
2646 * very likely) and there's a data dependence, so force GCC
2647 * to generate a branch instead. I don't barrier() because
2648 * we don't actually need a barrier, and if this function
2649 * ever gets inlined it will generate worse code.
2655 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2661 switch (clock->vclock_mode) {
2662 case VDSO_CLOCKMODE_HVCLOCK:
2663 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2665 if (tsc_pg_val != U64_MAX) {
2666 /* TSC page valid */
2667 *mode = VDSO_CLOCKMODE_HVCLOCK;
2668 v = (tsc_pg_val - clock->cycle_last) &
2671 /* TSC page invalid */
2672 *mode = VDSO_CLOCKMODE_NONE;
2675 case VDSO_CLOCKMODE_TSC:
2676 *mode = VDSO_CLOCKMODE_TSC;
2677 *tsc_timestamp = read_tsc();
2678 v = (*tsc_timestamp - clock->cycle_last) &
2682 *mode = VDSO_CLOCKMODE_NONE;
2685 if (*mode == VDSO_CLOCKMODE_NONE)
2686 *tsc_timestamp = v = 0;
2688 return v * clock->mult;
2691 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2693 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2699 seq = read_seqcount_begin(>od->seq);
2700 ns = gtod->raw_clock.base_cycles;
2701 ns += vgettsc(>od->raw_clock, tsc_timestamp, &mode);
2702 ns >>= gtod->raw_clock.shift;
2703 ns += ktime_to_ns(ktime_add(gtod->raw_clock.offset, gtod->offs_boot));
2704 } while (unlikely(read_seqcount_retry(>od->seq, seq)));
2710 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2712 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2718 seq = read_seqcount_begin(>od->seq);
2719 ts->tv_sec = gtod->wall_time_sec;
2720 ns = gtod->clock.base_cycles;
2721 ns += vgettsc(>od->clock, tsc_timestamp, &mode);
2722 ns >>= gtod->clock.shift;
2723 } while (unlikely(read_seqcount_retry(>od->seq, seq)));
2725 ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2731 /* returns true if host is using TSC based clocksource */
2732 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2734 /* checked again under seqlock below */
2735 if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2738 return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2742 /* returns true if host is using TSC based clocksource */
2743 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2746 /* checked again under seqlock below */
2747 if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2750 return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2756 * Assuming a stable TSC across physical CPUS, and a stable TSC
2757 * across virtual CPUs, the following condition is possible.
2758 * Each numbered line represents an event visible to both
2759 * CPUs at the next numbered event.
2761 * "timespecX" represents host monotonic time. "tscX" represents
2764 * VCPU0 on CPU0 | VCPU1 on CPU1
2766 * 1. read timespec0,tsc0
2767 * 2. | timespec1 = timespec0 + N
2769 * 3. transition to guest | transition to guest
2770 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2771 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
2772 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2774 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2777 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2779 * - 0 < N - M => M < N
2781 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2782 * always the case (the difference between two distinct xtime instances
2783 * might be smaller then the difference between corresponding TSC reads,
2784 * when updating guest vcpus pvclock areas).
2786 * To avoid that problem, do not allow visibility of distinct
2787 * system_timestamp/tsc_timestamp values simultaneously: use a master
2788 * copy of host monotonic time values. Update that master copy
2791 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2795 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2797 #ifdef CONFIG_X86_64
2798 struct kvm_arch *ka = &kvm->arch;
2800 bool host_tsc_clocksource, vcpus_matched;
2802 lockdep_assert_held(&kvm->arch.tsc_write_lock);
2803 vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2804 atomic_read(&kvm->online_vcpus));
2807 * If the host uses TSC clock, then passthrough TSC as stable
2810 host_tsc_clocksource = kvm_get_time_and_clockread(
2811 &ka->master_kernel_ns,
2812 &ka->master_cycle_now);
2814 ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2815 && !ka->backwards_tsc_observed
2816 && !ka->boot_vcpu_runs_old_kvmclock;
2818 if (ka->use_master_clock)
2819 atomic_set(&kvm_guest_has_master_clock, 1);
2821 vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2822 trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2827 static void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2829 kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2832 static void __kvm_start_pvclock_update(struct kvm *kvm)
2834 raw_spin_lock_irq(&kvm->arch.tsc_write_lock);
2835 write_seqcount_begin(&kvm->arch.pvclock_sc);
2838 static void kvm_start_pvclock_update(struct kvm *kvm)
2840 kvm_make_mclock_inprogress_request(kvm);
2842 /* no guest entries from this point */
2843 __kvm_start_pvclock_update(kvm);
2846 static void kvm_end_pvclock_update(struct kvm *kvm)
2848 struct kvm_arch *ka = &kvm->arch;
2849 struct kvm_vcpu *vcpu;
2852 write_seqcount_end(&ka->pvclock_sc);
2853 raw_spin_unlock_irq(&ka->tsc_write_lock);
2854 kvm_for_each_vcpu(i, vcpu, kvm)
2855 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2857 /* guest entries allowed */
2858 kvm_for_each_vcpu(i, vcpu, kvm)
2859 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2862 static void kvm_update_masterclock(struct kvm *kvm)
2864 kvm_hv_invalidate_tsc_page(kvm);
2865 kvm_start_pvclock_update(kvm);
2866 pvclock_update_vm_gtod_copy(kvm);
2867 kvm_end_pvclock_update(kvm);
2870 /* Called within read_seqcount_begin/retry for kvm->pvclock_sc. */
2871 static void __get_kvmclock(struct kvm *kvm, struct kvm_clock_data *data)
2873 struct kvm_arch *ka = &kvm->arch;
2874 struct pvclock_vcpu_time_info hv_clock;
2876 /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2880 if (ka->use_master_clock && __this_cpu_read(cpu_tsc_khz)) {
2881 #ifdef CONFIG_X86_64
2882 struct timespec64 ts;
2884 if (kvm_get_walltime_and_clockread(&ts, &data->host_tsc)) {
2885 data->realtime = ts.tv_nsec + NSEC_PER_SEC * ts.tv_sec;
2886 data->flags |= KVM_CLOCK_REALTIME | KVM_CLOCK_HOST_TSC;
2889 data->host_tsc = rdtsc();
2891 data->flags |= KVM_CLOCK_TSC_STABLE;
2892 hv_clock.tsc_timestamp = ka->master_cycle_now;
2893 hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2894 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2895 &hv_clock.tsc_shift,
2896 &hv_clock.tsc_to_system_mul);
2897 data->clock = __pvclock_read_cycles(&hv_clock, data->host_tsc);
2899 data->clock = get_kvmclock_base_ns() + ka->kvmclock_offset;
2905 static void get_kvmclock(struct kvm *kvm, struct kvm_clock_data *data)
2907 struct kvm_arch *ka = &kvm->arch;
2911 seq = read_seqcount_begin(&ka->pvclock_sc);
2912 __get_kvmclock(kvm, data);
2913 } while (read_seqcount_retry(&ka->pvclock_sc, seq));
2916 u64 get_kvmclock_ns(struct kvm *kvm)
2918 struct kvm_clock_data data;
2920 get_kvmclock(kvm, &data);
2924 static void kvm_setup_pvclock_page(struct kvm_vcpu *v,
2925 struct gfn_to_hva_cache *cache,
2926 unsigned int offset)
2928 struct kvm_vcpu_arch *vcpu = &v->arch;
2929 struct pvclock_vcpu_time_info guest_hv_clock;
2931 if (unlikely(kvm_read_guest_offset_cached(v->kvm, cache,
2932 &guest_hv_clock, offset, sizeof(guest_hv_clock))))
2935 /* This VCPU is paused, but it's legal for a guest to read another
2936 * VCPU's kvmclock, so we really have to follow the specification where
2937 * it says that version is odd if data is being modified, and even after
2940 * Version field updates must be kept separate. This is because
2941 * kvm_write_guest_cached might use a "rep movs" instruction, and
2942 * writes within a string instruction are weakly ordered. So there
2943 * are three writes overall.
2945 * As a small optimization, only write the version field in the first
2946 * and third write. The vcpu->pv_time cache is still valid, because the
2947 * version field is the first in the struct.
2949 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2951 if (guest_hv_clock.version & 1)
2952 ++guest_hv_clock.version; /* first time write, random junk */
2954 vcpu->hv_clock.version = guest_hv_clock.version + 1;
2955 kvm_write_guest_offset_cached(v->kvm, cache,
2956 &vcpu->hv_clock, offset,
2957 sizeof(vcpu->hv_clock.version));
2961 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2962 vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2964 if (vcpu->pvclock_set_guest_stopped_request) {
2965 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2966 vcpu->pvclock_set_guest_stopped_request = false;
2969 trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2971 kvm_write_guest_offset_cached(v->kvm, cache,
2972 &vcpu->hv_clock, offset,
2973 sizeof(vcpu->hv_clock));
2977 vcpu->hv_clock.version++;
2978 kvm_write_guest_offset_cached(v->kvm, cache,
2979 &vcpu->hv_clock, offset,
2980 sizeof(vcpu->hv_clock.version));
2983 static int kvm_guest_time_update(struct kvm_vcpu *v)
2985 unsigned long flags, tgt_tsc_khz;
2987 struct kvm_vcpu_arch *vcpu = &v->arch;
2988 struct kvm_arch *ka = &v->kvm->arch;
2990 u64 tsc_timestamp, host_tsc;
2992 bool use_master_clock;
2998 * If the host uses TSC clock, then passthrough TSC as stable
3002 seq = read_seqcount_begin(&ka->pvclock_sc);
3003 use_master_clock = ka->use_master_clock;
3004 if (use_master_clock) {
3005 host_tsc = ka->master_cycle_now;
3006 kernel_ns = ka->master_kernel_ns;
3008 } while (read_seqcount_retry(&ka->pvclock_sc, seq));
3010 /* Keep irq disabled to prevent changes to the clock */
3011 local_irq_save(flags);
3012 tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
3013 if (unlikely(tgt_tsc_khz == 0)) {
3014 local_irq_restore(flags);
3015 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
3018 if (!use_master_clock) {
3020 kernel_ns = get_kvmclock_base_ns();
3023 tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
3026 * We may have to catch up the TSC to match elapsed wall clock
3027 * time for two reasons, even if kvmclock is used.
3028 * 1) CPU could have been running below the maximum TSC rate
3029 * 2) Broken TSC compensation resets the base at each VCPU
3030 * entry to avoid unknown leaps of TSC even when running
3031 * again on the same CPU. This may cause apparent elapsed
3032 * time to disappear, and the guest to stand still or run
3035 if (vcpu->tsc_catchup) {
3036 u64 tsc = compute_guest_tsc(v, kernel_ns);
3037 if (tsc > tsc_timestamp) {
3038 adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
3039 tsc_timestamp = tsc;
3043 local_irq_restore(flags);
3045 /* With all the info we got, fill in the values */
3047 if (kvm_has_tsc_control)
3048 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz,
3049 v->arch.l1_tsc_scaling_ratio);
3051 if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
3052 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
3053 &vcpu->hv_clock.tsc_shift,
3054 &vcpu->hv_clock.tsc_to_system_mul);
3055 vcpu->hw_tsc_khz = tgt_tsc_khz;
3058 vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
3059 vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
3060 vcpu->last_guest_tsc = tsc_timestamp;
3062 /* If the host uses TSC clocksource, then it is stable */
3064 if (use_master_clock)
3065 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
3067 vcpu->hv_clock.flags = pvclock_flags;
3069 if (vcpu->pv_time_enabled)
3070 kvm_setup_pvclock_page(v, &vcpu->pv_time, 0);
3071 if (vcpu->xen.vcpu_info_set)
3072 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_info_cache,
3073 offsetof(struct compat_vcpu_info, time));
3074 if (vcpu->xen.vcpu_time_info_set)
3075 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_time_info_cache, 0);
3077 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
3082 * kvmclock updates which are isolated to a given vcpu, such as
3083 * vcpu->cpu migration, should not allow system_timestamp from
3084 * the rest of the vcpus to remain static. Otherwise ntp frequency
3085 * correction applies to one vcpu's system_timestamp but not
3088 * So in those cases, request a kvmclock update for all vcpus.
3089 * We need to rate-limit these requests though, as they can
3090 * considerably slow guests that have a large number of vcpus.
3091 * The time for a remote vcpu to update its kvmclock is bound
3092 * by the delay we use to rate-limit the updates.
3095 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
3097 static void kvmclock_update_fn(struct work_struct *work)
3100 struct delayed_work *dwork = to_delayed_work(work);
3101 struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
3102 kvmclock_update_work);
3103 struct kvm *kvm = container_of(ka, struct kvm, arch);
3104 struct kvm_vcpu *vcpu;
3106 kvm_for_each_vcpu(i, vcpu, kvm) {
3107 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3108 kvm_vcpu_kick(vcpu);
3112 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
3114 struct kvm *kvm = v->kvm;
3116 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
3117 schedule_delayed_work(&kvm->arch.kvmclock_update_work,
3118 KVMCLOCK_UPDATE_DELAY);
3121 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
3123 static void kvmclock_sync_fn(struct work_struct *work)
3125 struct delayed_work *dwork = to_delayed_work(work);
3126 struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
3127 kvmclock_sync_work);
3128 struct kvm *kvm = container_of(ka, struct kvm, arch);
3130 if (!kvmclock_periodic_sync)
3133 schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
3134 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
3135 KVMCLOCK_SYNC_PERIOD);
3139 * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
3141 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
3143 /* McStatusWrEn enabled? */
3144 if (guest_cpuid_is_amd_or_hygon(vcpu))
3145 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
3150 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3152 u64 mcg_cap = vcpu->arch.mcg_cap;
3153 unsigned bank_num = mcg_cap & 0xff;
3154 u32 msr = msr_info->index;
3155 u64 data = msr_info->data;
3158 case MSR_IA32_MCG_STATUS:
3159 vcpu->arch.mcg_status = data;
3161 case MSR_IA32_MCG_CTL:
3162 if (!(mcg_cap & MCG_CTL_P) &&
3163 (data || !msr_info->host_initiated))
3165 if (data != 0 && data != ~(u64)0)
3167 vcpu->arch.mcg_ctl = data;
3170 if (msr >= MSR_IA32_MC0_CTL &&
3171 msr < MSR_IA32_MCx_CTL(bank_num)) {
3172 u32 offset = array_index_nospec(
3173 msr - MSR_IA32_MC0_CTL,
3174 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3176 /* only 0 or all 1s can be written to IA32_MCi_CTL
3177 * some Linux kernels though clear bit 10 in bank 4 to
3178 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
3179 * this to avoid an uncatched #GP in the guest
3181 if ((offset & 0x3) == 0 &&
3182 data != 0 && (data | (1 << 10)) != ~(u64)0)
3186 if (!msr_info->host_initiated &&
3187 (offset & 0x3) == 1 && data != 0) {
3188 if (!can_set_mci_status(vcpu))
3192 vcpu->arch.mce_banks[offset] = data;
3200 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu)
3202 u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT;
3204 return (vcpu->arch.apf.msr_en_val & mask) == mask;
3207 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
3209 gpa_t gpa = data & ~0x3f;
3211 /* Bits 4:5 are reserved, Should be zero */
3215 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_VMEXIT) &&
3216 (data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT))
3219 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT) &&
3220 (data & KVM_ASYNC_PF_DELIVERY_AS_INT))
3223 if (!lapic_in_kernel(vcpu))
3224 return data ? 1 : 0;
3226 vcpu->arch.apf.msr_en_val = data;
3228 if (!kvm_pv_async_pf_enabled(vcpu)) {
3229 kvm_clear_async_pf_completion_queue(vcpu);
3230 kvm_async_pf_hash_reset(vcpu);
3234 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
3238 vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
3239 vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
3241 kvm_async_pf_wakeup_all(vcpu);
3246 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu *vcpu, u64 data)
3248 /* Bits 8-63 are reserved */
3252 if (!lapic_in_kernel(vcpu))
3255 vcpu->arch.apf.msr_int_val = data;
3257 vcpu->arch.apf.vec = data & KVM_ASYNC_PF_VEC_MASK;
3262 static void kvmclock_reset(struct kvm_vcpu *vcpu)
3264 vcpu->arch.pv_time_enabled = false;
3265 vcpu->arch.time = 0;
3268 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu *vcpu)
3270 ++vcpu->stat.tlb_flush;
3271 static_call(kvm_x86_tlb_flush_all)(vcpu);
3274 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu)
3276 ++vcpu->stat.tlb_flush;
3280 * A TLB flush on behalf of the guest is equivalent to
3281 * INVPCID(all), toggling CR4.PGE, etc., which requires
3282 * a forced sync of the shadow page tables. Ensure all the
3283 * roots are synced and the guest TLB in hardware is clean.
3285 kvm_mmu_sync_roots(vcpu);
3286 kvm_mmu_sync_prev_roots(vcpu);
3289 static_call(kvm_x86_tlb_flush_guest)(vcpu);
3293 static inline void kvm_vcpu_flush_tlb_current(struct kvm_vcpu *vcpu)
3295 ++vcpu->stat.tlb_flush;
3296 static_call(kvm_x86_tlb_flush_current)(vcpu);
3300 * Service "local" TLB flush requests, which are specific to the current MMU
3301 * context. In addition to the generic event handling in vcpu_enter_guest(),
3302 * TLB flushes that are targeted at an MMU context also need to be serviced
3303 * prior before nested VM-Enter/VM-Exit.
3305 void kvm_service_local_tlb_flush_requests(struct kvm_vcpu *vcpu)
3307 if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu))
3308 kvm_vcpu_flush_tlb_current(vcpu);
3310 if (kvm_check_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu))
3311 kvm_vcpu_flush_tlb_guest(vcpu);
3313 EXPORT_SYMBOL_GPL(kvm_service_local_tlb_flush_requests);
3315 static void record_steal_time(struct kvm_vcpu *vcpu)
3317 struct gfn_to_hva_cache *ghc = &vcpu->arch.st.cache;
3318 struct kvm_steal_time __user *st;
3319 struct kvm_memslots *slots;
3323 if (kvm_xen_msr_enabled(vcpu->kvm)) {
3324 kvm_xen_runstate_set_running(vcpu);
3328 if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3331 if (WARN_ON_ONCE(current->mm != vcpu->kvm->mm))
3334 slots = kvm_memslots(vcpu->kvm);
3336 if (unlikely(slots->generation != ghc->generation ||
3337 kvm_is_error_hva(ghc->hva) || !ghc->memslot)) {
3338 gfn_t gfn = vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS;
3340 /* We rely on the fact that it fits in a single page. */
3341 BUILD_BUG_ON((sizeof(*st) - 1) & KVM_STEAL_VALID_BITS);
3343 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, ghc, gfn, sizeof(*st)) ||
3344 kvm_is_error_hva(ghc->hva) || !ghc->memslot)
3348 st = (struct kvm_steal_time __user *)ghc->hva;
3350 * Doing a TLB flush here, on the guest's behalf, can avoid
3353 if (guest_pv_has(vcpu, KVM_FEATURE_PV_TLB_FLUSH)) {
3354 u8 st_preempted = 0;
3357 if (!user_access_begin(st, sizeof(*st)))
3360 asm volatile("1: xchgb %0, %2\n"
3363 _ASM_EXTABLE_UA(1b, 2b)
3364 : "+q" (st_preempted),
3366 "+m" (st->preempted));
3372 vcpu->arch.st.preempted = 0;
3374 trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
3375 st_preempted & KVM_VCPU_FLUSH_TLB);
3376 if (st_preempted & KVM_VCPU_FLUSH_TLB)
3377 kvm_vcpu_flush_tlb_guest(vcpu);
3379 if (!user_access_begin(st, sizeof(*st)))
3382 if (!user_access_begin(st, sizeof(*st)))
3385 unsafe_put_user(0, &st->preempted, out);
3386 vcpu->arch.st.preempted = 0;
3389 unsafe_get_user(version, &st->version, out);
3391 version += 1; /* first time write, random junk */
3394 unsafe_put_user(version, &st->version, out);
3398 unsafe_get_user(steal, &st->steal, out);
3399 steal += current->sched_info.run_delay -
3400 vcpu->arch.st.last_steal;
3401 vcpu->arch.st.last_steal = current->sched_info.run_delay;
3402 unsafe_put_user(steal, &st->steal, out);
3405 unsafe_put_user(version, &st->version, out);
3410 mark_page_dirty_in_slot(vcpu->kvm, ghc->memslot, gpa_to_gfn(ghc->gpa));
3413 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3416 u32 msr = msr_info->index;
3417 u64 data = msr_info->data;
3419 if (msr && msr == vcpu->kvm->arch.xen_hvm_config.msr)
3420 return kvm_xen_write_hypercall_page(vcpu, data);
3423 case MSR_AMD64_NB_CFG:
3424 case MSR_IA32_UCODE_WRITE:
3425 case MSR_VM_HSAVE_PA:
3426 case MSR_AMD64_PATCH_LOADER:
3427 case MSR_AMD64_BU_CFG2:
3428 case MSR_AMD64_DC_CFG:
3429 case MSR_F15H_EX_CFG:
3432 case MSR_IA32_UCODE_REV:
3433 if (msr_info->host_initiated)
3434 vcpu->arch.microcode_version = data;
3436 case MSR_IA32_ARCH_CAPABILITIES:
3437 if (!msr_info->host_initiated)
3439 vcpu->arch.arch_capabilities = data;
3441 case MSR_IA32_PERF_CAPABILITIES: {
3442 struct kvm_msr_entry msr_ent = {.index = msr, .data = 0};
3444 if (!msr_info->host_initiated)
3446 if (kvm_get_msr_feature(&msr_ent))
3448 if (data & ~msr_ent.data)
3451 vcpu->arch.perf_capabilities = data;
3456 return set_efer(vcpu, msr_info);
3458 data &= ~(u64)0x40; /* ignore flush filter disable */
3459 data &= ~(u64)0x100; /* ignore ignne emulation enable */
3460 data &= ~(u64)0x8; /* ignore TLB cache disable */
3462 /* Handle McStatusWrEn */
3463 if (data == BIT_ULL(18)) {
3464 vcpu->arch.msr_hwcr = data;
3465 } else if (data != 0) {
3466 vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
3471 case MSR_FAM10H_MMIO_CONF_BASE:
3473 vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
3478 case 0x200 ... 0x2ff:
3479 return kvm_mtrr_set_msr(vcpu, msr, data);
3480 case MSR_IA32_APICBASE:
3481 return kvm_set_apic_base(vcpu, msr_info);
3482 case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3483 return kvm_x2apic_msr_write(vcpu, msr, data);
3484 case MSR_IA32_TSC_DEADLINE:
3485 kvm_set_lapic_tscdeadline_msr(vcpu, data);
3487 case MSR_IA32_TSC_ADJUST:
3488 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
3489 if (!msr_info->host_initiated) {
3490 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
3491 adjust_tsc_offset_guest(vcpu, adj);
3492 /* Before back to guest, tsc_timestamp must be adjusted
3493 * as well, otherwise guest's percpu pvclock time could jump.
3495 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3497 vcpu->arch.ia32_tsc_adjust_msr = data;
3500 case MSR_IA32_MISC_ENABLE:
3501 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
3502 ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
3503 if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
3505 vcpu->arch.ia32_misc_enable_msr = data;
3506 kvm_update_cpuid_runtime(vcpu);
3508 vcpu->arch.ia32_misc_enable_msr = data;
3511 case MSR_IA32_SMBASE:
3512 if (!msr_info->host_initiated)
3514 vcpu->arch.smbase = data;
3516 case MSR_IA32_POWER_CTL:
3517 vcpu->arch.msr_ia32_power_ctl = data;
3520 if (msr_info->host_initiated) {
3521 kvm_synchronize_tsc(vcpu, data);
3523 u64 adj = kvm_compute_l1_tsc_offset(vcpu, data) - vcpu->arch.l1_tsc_offset;
3524 adjust_tsc_offset_guest(vcpu, adj);
3525 vcpu->arch.ia32_tsc_adjust_msr += adj;
3529 if (!msr_info->host_initiated &&
3530 !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3533 * KVM supports exposing PT to the guest, but does not support
3534 * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3535 * XSAVES/XRSTORS to save/restore PT MSRs.
3537 if (data & ~supported_xss)
3539 vcpu->arch.ia32_xss = data;
3540 kvm_update_cpuid_runtime(vcpu);
3543 if (!msr_info->host_initiated)
3545 vcpu->arch.smi_count = data;
3547 case MSR_KVM_WALL_CLOCK_NEW:
3548 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3551 vcpu->kvm->arch.wall_clock = data;
3552 kvm_write_wall_clock(vcpu->kvm, data, 0);
3554 case MSR_KVM_WALL_CLOCK:
3555 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3558 vcpu->kvm->arch.wall_clock = data;
3559 kvm_write_wall_clock(vcpu->kvm, data, 0);
3561 case MSR_KVM_SYSTEM_TIME_NEW:
3562 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3565 kvm_write_system_time(vcpu, data, false, msr_info->host_initiated);
3567 case MSR_KVM_SYSTEM_TIME:
3568 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3571 kvm_write_system_time(vcpu, data, true, msr_info->host_initiated);
3573 case MSR_KVM_ASYNC_PF_EN:
3574 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3577 if (kvm_pv_enable_async_pf(vcpu, data))
3580 case MSR_KVM_ASYNC_PF_INT:
3581 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3584 if (kvm_pv_enable_async_pf_int(vcpu, data))
3587 case MSR_KVM_ASYNC_PF_ACK:
3588 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3591 vcpu->arch.apf.pageready_pending = false;
3592 kvm_check_async_pf_completion(vcpu);
3595 case MSR_KVM_STEAL_TIME:
3596 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3599 if (unlikely(!sched_info_on()))
3602 if (data & KVM_STEAL_RESERVED_MASK)
3605 vcpu->arch.st.msr_val = data;
3607 if (!(data & KVM_MSR_ENABLED))
3610 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3613 case MSR_KVM_PV_EOI_EN:
3614 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3617 if (kvm_lapic_set_pv_eoi(vcpu, data, sizeof(u8)))
3621 case MSR_KVM_POLL_CONTROL:
3622 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3625 /* only enable bit supported */
3626 if (data & (-1ULL << 1))
3629 vcpu->arch.msr_kvm_poll_control = data;
3632 case MSR_IA32_MCG_CTL:
3633 case MSR_IA32_MCG_STATUS:
3634 case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3635 return set_msr_mce(vcpu, msr_info);
3637 case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3638 case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3641 case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3642 case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3643 if (kvm_pmu_is_valid_msr(vcpu, msr))
3644 return kvm_pmu_set_msr(vcpu, msr_info);
3646 if (pr || data != 0)
3647 vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
3648 "0x%x data 0x%llx\n", msr, data);
3650 case MSR_K7_CLK_CTL:
3652 * Ignore all writes to this no longer documented MSR.
3653 * Writes are only relevant for old K7 processors,
3654 * all pre-dating SVM, but a recommended workaround from
3655 * AMD for these chips. It is possible to specify the
3656 * affected processor models on the command line, hence
3657 * the need to ignore the workaround.
3660 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3661 case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3662 case HV_X64_MSR_SYNDBG_OPTIONS:
3663 case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3664 case HV_X64_MSR_CRASH_CTL:
3665 case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3666 case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3667 case HV_X64_MSR_TSC_EMULATION_CONTROL:
3668 case HV_X64_MSR_TSC_EMULATION_STATUS:
3669 return kvm_hv_set_msr_common(vcpu, msr, data,
3670 msr_info->host_initiated);
3671 case MSR_IA32_BBL_CR_CTL3:
3672 /* Drop writes to this legacy MSR -- see rdmsr
3673 * counterpart for further detail.
3675 if (report_ignored_msrs)
3676 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
3679 case MSR_AMD64_OSVW_ID_LENGTH:
3680 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3682 vcpu->arch.osvw.length = data;
3684 case MSR_AMD64_OSVW_STATUS:
3685 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3687 vcpu->arch.osvw.status = data;
3689 case MSR_PLATFORM_INFO:
3690 if (!msr_info->host_initiated ||
3691 (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
3692 cpuid_fault_enabled(vcpu)))
3694 vcpu->arch.msr_platform_info = data;
3696 case MSR_MISC_FEATURES_ENABLES:
3697 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
3698 (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
3699 !supports_cpuid_fault(vcpu)))
3701 vcpu->arch.msr_misc_features_enables = data;
3703 #ifdef CONFIG_X86_64
3705 if (!msr_info->host_initiated &&
3706 !guest_cpuid_has(vcpu, X86_FEATURE_XFD))
3709 if (data & ~(XFEATURE_MASK_USER_DYNAMIC &
3710 vcpu->arch.guest_supported_xcr0))
3713 fpu_update_guest_xfd(&vcpu->arch.guest_fpu, data);
3715 case MSR_IA32_XFD_ERR:
3716 if (!msr_info->host_initiated &&
3717 !guest_cpuid_has(vcpu, X86_FEATURE_XFD))
3720 if (data & ~(XFEATURE_MASK_USER_DYNAMIC &
3721 vcpu->arch.guest_supported_xcr0))
3724 vcpu->arch.guest_fpu.xfd_err = data;
3728 if (kvm_pmu_is_valid_msr(vcpu, msr))
3729 return kvm_pmu_set_msr(vcpu, msr_info);
3730 return KVM_MSR_RET_INVALID;
3734 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
3736 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
3739 u64 mcg_cap = vcpu->arch.mcg_cap;
3740 unsigned bank_num = mcg_cap & 0xff;
3743 case MSR_IA32_P5_MC_ADDR:
3744 case MSR_IA32_P5_MC_TYPE:
3747 case MSR_IA32_MCG_CAP:
3748 data = vcpu->arch.mcg_cap;
3750 case MSR_IA32_MCG_CTL:
3751 if (!(mcg_cap & MCG_CTL_P) && !host)
3753 data = vcpu->arch.mcg_ctl;
3755 case MSR_IA32_MCG_STATUS:
3756 data = vcpu->arch.mcg_status;
3759 if (msr >= MSR_IA32_MC0_CTL &&
3760 msr < MSR_IA32_MCx_CTL(bank_num)) {
3761 u32 offset = array_index_nospec(
3762 msr - MSR_IA32_MC0_CTL,
3763 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3765 data = vcpu->arch.mce_banks[offset];
3774 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3776 switch (msr_info->index) {
3777 case MSR_IA32_PLATFORM_ID:
3778 case MSR_IA32_EBL_CR_POWERON:
3779 case MSR_IA32_LASTBRANCHFROMIP:
3780 case MSR_IA32_LASTBRANCHTOIP:
3781 case MSR_IA32_LASTINTFROMIP:
3782 case MSR_IA32_LASTINTTOIP:
3783 case MSR_AMD64_SYSCFG:
3784 case MSR_K8_TSEG_ADDR:
3785 case MSR_K8_TSEG_MASK:
3786 case MSR_VM_HSAVE_PA:
3787 case MSR_K8_INT_PENDING_MSG:
3788 case MSR_AMD64_NB_CFG:
3789 case MSR_FAM10H_MMIO_CONF_BASE:
3790 case MSR_AMD64_BU_CFG2:
3791 case MSR_IA32_PERF_CTL:
3792 case MSR_AMD64_DC_CFG:
3793 case MSR_F15H_EX_CFG:
3795 * Intel Sandy Bridge CPUs must support the RAPL (running average power
3796 * limit) MSRs. Just return 0, as we do not want to expose the host
3797 * data here. Do not conditionalize this on CPUID, as KVM does not do
3798 * so for existing CPU-specific MSRs.
3800 case MSR_RAPL_POWER_UNIT:
3801 case MSR_PP0_ENERGY_STATUS: /* Power plane 0 (core) */
3802 case MSR_PP1_ENERGY_STATUS: /* Power plane 1 (graphics uncore) */
3803 case MSR_PKG_ENERGY_STATUS: /* Total package */
3804 case MSR_DRAM_ENERGY_STATUS: /* DRAM controller */
3807 case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3808 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3809 return kvm_pmu_get_msr(vcpu, msr_info);
3810 if (!msr_info->host_initiated)
3814 case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3815 case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3816 case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3817 case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3818 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3819 return kvm_pmu_get_msr(vcpu, msr_info);
3822 case MSR_IA32_UCODE_REV:
3823 msr_info->data = vcpu->arch.microcode_version;
3825 case MSR_IA32_ARCH_CAPABILITIES:
3826 if (!msr_info->host_initiated &&
3827 !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
3829 msr_info->data = vcpu->arch.arch_capabilities;
3831 case MSR_IA32_PERF_CAPABILITIES:
3832 if (!msr_info->host_initiated &&
3833 !guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
3835 msr_info->data = vcpu->arch.perf_capabilities;
3837 case MSR_IA32_POWER_CTL:
3838 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
3840 case MSR_IA32_TSC: {
3842 * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3843 * even when not intercepted. AMD manual doesn't explicitly
3844 * state this but appears to behave the same.
3846 * On userspace reads and writes, however, we unconditionally
3847 * return L1's TSC value to ensure backwards-compatible
3848 * behavior for migration.
3852 if (msr_info->host_initiated) {
3853 offset = vcpu->arch.l1_tsc_offset;
3854 ratio = vcpu->arch.l1_tsc_scaling_ratio;
3856 offset = vcpu->arch.tsc_offset;
3857 ratio = vcpu->arch.tsc_scaling_ratio;
3860 msr_info->data = kvm_scale_tsc(vcpu, rdtsc(), ratio) + offset;
3864 case 0x200 ... 0x2ff:
3865 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
3866 case 0xcd: /* fsb frequency */
3870 * MSR_EBC_FREQUENCY_ID
3871 * Conservative value valid for even the basic CPU models.
3872 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3873 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3874 * and 266MHz for model 3, or 4. Set Core Clock
3875 * Frequency to System Bus Frequency Ratio to 1 (bits
3876 * 31:24) even though these are only valid for CPU
3877 * models > 2, however guests may end up dividing or
3878 * multiplying by zero otherwise.
3880 case MSR_EBC_FREQUENCY_ID:
3881 msr_info->data = 1 << 24;
3883 case MSR_IA32_APICBASE:
3884 msr_info->data = kvm_get_apic_base(vcpu);
3886 case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3887 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
3888 case MSR_IA32_TSC_DEADLINE:
3889 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
3891 case MSR_IA32_TSC_ADJUST:
3892 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
3894 case MSR_IA32_MISC_ENABLE:
3895 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
3897 case MSR_IA32_SMBASE:
3898 if (!msr_info->host_initiated)
3900 msr_info->data = vcpu->arch.smbase;
3903 msr_info->data = vcpu->arch.smi_count;
3905 case MSR_IA32_PERF_STATUS:
3906 /* TSC increment by tick */
3907 msr_info->data = 1000ULL;
3908 /* CPU multiplier */
3909 msr_info->data |= (((uint64_t)4ULL) << 40);
3912 msr_info->data = vcpu->arch.efer;
3914 case MSR_KVM_WALL_CLOCK:
3915 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3918 msr_info->data = vcpu->kvm->arch.wall_clock;
3920 case MSR_KVM_WALL_CLOCK_NEW:
3921 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3924 msr_info->data = vcpu->kvm->arch.wall_clock;
3926 case MSR_KVM_SYSTEM_TIME:
3927 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3930 msr_info->data = vcpu->arch.time;
3932 case MSR_KVM_SYSTEM_TIME_NEW:
3933 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3936 msr_info->data = vcpu->arch.time;
3938 case MSR_KVM_ASYNC_PF_EN:
3939 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3942 msr_info->data = vcpu->arch.apf.msr_en_val;
3944 case MSR_KVM_ASYNC_PF_INT:
3945 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3948 msr_info->data = vcpu->arch.apf.msr_int_val;
3950 case MSR_KVM_ASYNC_PF_ACK:
3951 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3956 case MSR_KVM_STEAL_TIME:
3957 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3960 msr_info->data = vcpu->arch.st.msr_val;
3962 case MSR_KVM_PV_EOI_EN:
3963 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3966 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3968 case MSR_KVM_POLL_CONTROL:
3969 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3972 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3974 case MSR_IA32_P5_MC_ADDR:
3975 case MSR_IA32_P5_MC_TYPE:
3976 case MSR_IA32_MCG_CAP:
3977 case MSR_IA32_MCG_CTL:
3978 case MSR_IA32_MCG_STATUS:
3979 case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3980 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3981 msr_info->host_initiated);
3983 if (!msr_info->host_initiated &&
3984 !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3986 msr_info->data = vcpu->arch.ia32_xss;
3988 case MSR_K7_CLK_CTL:
3990 * Provide expected ramp-up count for K7. All other
3991 * are set to zero, indicating minimum divisors for
3994 * This prevents guest kernels on AMD host with CPU
3995 * type 6, model 8 and higher from exploding due to
3996 * the rdmsr failing.
3998 msr_info->data = 0x20000000;
4000 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
4001 case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
4002 case HV_X64_MSR_SYNDBG_OPTIONS:
4003 case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
4004 case HV_X64_MSR_CRASH_CTL:
4005 case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
4006 case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
4007 case HV_X64_MSR_TSC_EMULATION_CONTROL:
4008 case HV_X64_MSR_TSC_EMULATION_STATUS:
4009 return kvm_hv_get_msr_common(vcpu,
4010 msr_info->index, &msr_info->data,
4011 msr_info->host_initiated);
4012 case MSR_IA32_BBL_CR_CTL3:
4013 /* This legacy MSR exists but isn't fully documented in current
4014 * silicon. It is however accessed by winxp in very narrow
4015 * scenarios where it sets bit #19, itself documented as
4016 * a "reserved" bit. Best effort attempt to source coherent
4017 * read data here should the balance of the register be
4018 * interpreted by the guest:
4020 * L2 cache control register 3: 64GB range, 256KB size,
4021 * enabled, latency 0x1, configured
4023 msr_info->data = 0xbe702111;
4025 case MSR_AMD64_OSVW_ID_LENGTH:
4026 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
4028 msr_info->data = vcpu->arch.osvw.length;
4030 case MSR_AMD64_OSVW_STATUS:
4031 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
4033 msr_info->data = vcpu->arch.osvw.status;
4035 case MSR_PLATFORM_INFO:
4036 if (!msr_info->host_initiated &&
4037 !vcpu->kvm->arch.guest_can_read_msr_platform_info)
4039 msr_info->data = vcpu->arch.msr_platform_info;
4041 case MSR_MISC_FEATURES_ENABLES:
4042 msr_info->data = vcpu->arch.msr_misc_features_enables;
4045 msr_info->data = vcpu->arch.msr_hwcr;
4047 #ifdef CONFIG_X86_64
4049 if (!msr_info->host_initiated &&
4050 !guest_cpuid_has(vcpu, X86_FEATURE_XFD))
4053 msr_info->data = vcpu->arch.guest_fpu.fpstate->xfd;
4055 case MSR_IA32_XFD_ERR:
4056 if (!msr_info->host_initiated &&
4057 !guest_cpuid_has(vcpu, X86_FEATURE_XFD))
4060 msr_info->data = vcpu->arch.guest_fpu.xfd_err;
4064 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
4065 return kvm_pmu_get_msr(vcpu, msr_info);
4066 return KVM_MSR_RET_INVALID;
4070 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
4073 * Read or write a bunch of msrs. All parameters are kernel addresses.
4075 * @return number of msrs set successfully.
4077 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
4078 struct kvm_msr_entry *entries,
4079 int (*do_msr)(struct kvm_vcpu *vcpu,
4080 unsigned index, u64 *data))
4084 for (i = 0; i < msrs->nmsrs; ++i)
4085 if (do_msr(vcpu, entries[i].index, &entries[i].data))
4092 * Read or write a bunch of msrs. Parameters are user addresses.
4094 * @return number of msrs set successfully.
4096 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
4097 int (*do_msr)(struct kvm_vcpu *vcpu,
4098 unsigned index, u64 *data),
4101 struct kvm_msrs msrs;
4102 struct kvm_msr_entry *entries;
4107 if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
4111 if (msrs.nmsrs >= MAX_IO_MSRS)
4114 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
4115 entries = memdup_user(user_msrs->entries, size);
4116 if (IS_ERR(entries)) {
4117 r = PTR_ERR(entries);
4121 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
4126 if (writeback && copy_to_user(user_msrs->entries, entries, size))
4137 static inline bool kvm_can_mwait_in_guest(void)
4139 return boot_cpu_has(X86_FEATURE_MWAIT) &&
4140 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
4141 boot_cpu_has(X86_FEATURE_ARAT);
4144 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu *vcpu,
4145 struct kvm_cpuid2 __user *cpuid_arg)
4147 struct kvm_cpuid2 cpuid;
4151 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4154 r = kvm_get_hv_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4159 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4165 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
4170 case KVM_CAP_IRQCHIP:
4172 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
4173 case KVM_CAP_SET_TSS_ADDR:
4174 case KVM_CAP_EXT_CPUID:
4175 case KVM_CAP_EXT_EMUL_CPUID:
4176 case KVM_CAP_CLOCKSOURCE:
4178 case KVM_CAP_NOP_IO_DELAY:
4179 case KVM_CAP_MP_STATE:
4180 case KVM_CAP_SYNC_MMU:
4181 case KVM_CAP_USER_NMI:
4182 case KVM_CAP_REINJECT_CONTROL:
4183 case KVM_CAP_IRQ_INJECT_STATUS:
4184 case KVM_CAP_IOEVENTFD:
4185 case KVM_CAP_IOEVENTFD_NO_LENGTH:
4187 case KVM_CAP_PIT_STATE2:
4188 case KVM_CAP_SET_IDENTITY_MAP_ADDR:
4189 case KVM_CAP_VCPU_EVENTS:
4190 case KVM_CAP_HYPERV:
4191 case KVM_CAP_HYPERV_VAPIC:
4192 case KVM_CAP_HYPERV_SPIN:
4193 case KVM_CAP_HYPERV_SYNIC:
4194 case KVM_CAP_HYPERV_SYNIC2:
4195 case KVM_CAP_HYPERV_VP_INDEX:
4196 case KVM_CAP_HYPERV_EVENTFD:
4197 case KVM_CAP_HYPERV_TLBFLUSH:
4198 case KVM_CAP_HYPERV_SEND_IPI:
4199 case KVM_CAP_HYPERV_CPUID:
4200 case KVM_CAP_HYPERV_ENFORCE_CPUID:
4201 case KVM_CAP_SYS_HYPERV_CPUID:
4202 case KVM_CAP_PCI_SEGMENT:
4203 case KVM_CAP_DEBUGREGS:
4204 case KVM_CAP_X86_ROBUST_SINGLESTEP:
4206 case KVM_CAP_ASYNC_PF:
4207 case KVM_CAP_ASYNC_PF_INT:
4208 case KVM_CAP_GET_TSC_KHZ:
4209 case KVM_CAP_KVMCLOCK_CTRL:
4210 case KVM_CAP_READONLY_MEM:
4211 case KVM_CAP_HYPERV_TIME:
4212 case KVM_CAP_IOAPIC_POLARITY_IGNORED:
4213 case KVM_CAP_TSC_DEADLINE_TIMER:
4214 case KVM_CAP_DISABLE_QUIRKS:
4215 case KVM_CAP_SET_BOOT_CPU_ID:
4216 case KVM_CAP_SPLIT_IRQCHIP:
4217 case KVM_CAP_IMMEDIATE_EXIT:
4218 case KVM_CAP_PMU_EVENT_FILTER:
4219 case KVM_CAP_GET_MSR_FEATURES:
4220 case KVM_CAP_MSR_PLATFORM_INFO:
4221 case KVM_CAP_EXCEPTION_PAYLOAD:
4222 case KVM_CAP_SET_GUEST_DEBUG:
4223 case KVM_CAP_LAST_CPU:
4224 case KVM_CAP_X86_USER_SPACE_MSR:
4225 case KVM_CAP_X86_MSR_FILTER:
4226 case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4227 #ifdef CONFIG_X86_SGX_KVM
4228 case KVM_CAP_SGX_ATTRIBUTE:
4230 case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
4231 case KVM_CAP_VM_MOVE_ENC_CONTEXT_FROM:
4232 case KVM_CAP_SREGS2:
4233 case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
4234 case KVM_CAP_VCPU_ATTRIBUTES:
4235 case KVM_CAP_SYS_ATTRIBUTES:
4238 case KVM_CAP_EXIT_HYPERCALL:
4239 r = KVM_EXIT_HYPERCALL_VALID_MASK;
4241 case KVM_CAP_SET_GUEST_DEBUG2:
4242 return KVM_GUESTDBG_VALID_MASK;
4243 #ifdef CONFIG_KVM_XEN
4244 case KVM_CAP_XEN_HVM:
4245 r = KVM_XEN_HVM_CONFIG_HYPERCALL_MSR |
4246 KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL |
4247 KVM_XEN_HVM_CONFIG_SHARED_INFO |
4248 KVM_XEN_HVM_CONFIG_EVTCHN_2LEVEL;
4249 if (sched_info_on())
4250 r |= KVM_XEN_HVM_CONFIG_RUNSTATE;
4253 case KVM_CAP_SYNC_REGS:
4254 r = KVM_SYNC_X86_VALID_FIELDS;
4256 case KVM_CAP_ADJUST_CLOCK:
4257 r = KVM_CLOCK_VALID_FLAGS;
4259 case KVM_CAP_X86_DISABLE_EXITS:
4260 r |= KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
4261 KVM_X86_DISABLE_EXITS_CSTATE;
4262 if(kvm_can_mwait_in_guest())
4263 r |= KVM_X86_DISABLE_EXITS_MWAIT;
4265 case KVM_CAP_X86_SMM:
4266 /* SMBASE is usually relocated above 1M on modern chipsets,
4267 * and SMM handlers might indeed rely on 4G segment limits,
4268 * so do not report SMM to be available if real mode is
4269 * emulated via vm86 mode. Still, do not go to great lengths
4270 * to avoid userspace's usage of the feature, because it is a
4271 * fringe case that is not enabled except via specific settings
4272 * of the module parameters.
4274 r = static_call(kvm_x86_has_emulated_msr)(kvm, MSR_IA32_SMBASE);
4277 r = !static_call(kvm_x86_cpu_has_accelerated_tpr)();
4279 case KVM_CAP_NR_VCPUS:
4280 r = min_t(unsigned int, num_online_cpus(), KVM_MAX_VCPUS);
4282 case KVM_CAP_MAX_VCPUS:
4285 case KVM_CAP_MAX_VCPU_ID:
4286 r = KVM_MAX_VCPU_IDS;
4288 case KVM_CAP_PV_MMU: /* obsolete */
4292 r = KVM_MAX_MCE_BANKS;
4295 r = boot_cpu_has(X86_FEATURE_XSAVE);
4297 case KVM_CAP_TSC_CONTROL:
4298 r = kvm_has_tsc_control;
4300 case KVM_CAP_X2APIC_API:
4301 r = KVM_X2APIC_API_VALID_FLAGS;
4303 case KVM_CAP_NESTED_STATE:
4304 r = kvm_x86_ops.nested_ops->get_state ?
4305 kvm_x86_ops.nested_ops->get_state(NULL, NULL, 0) : 0;
4307 case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4308 r = kvm_x86_ops.enable_direct_tlbflush != NULL;
4310 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4311 r = kvm_x86_ops.nested_ops->enable_evmcs != NULL;
4313 case KVM_CAP_SMALLER_MAXPHYADDR:
4314 r = (int) allow_smaller_maxphyaddr;
4316 case KVM_CAP_STEAL_TIME:
4317 r = sched_info_on();
4319 case KVM_CAP_X86_BUS_LOCK_EXIT:
4320 if (kvm_has_bus_lock_exit)
4321 r = KVM_BUS_LOCK_DETECTION_OFF |
4322 KVM_BUS_LOCK_DETECTION_EXIT;
4326 case KVM_CAP_XSAVE2: {
4327 u64 guest_perm = xstate_get_guest_group_perm();
4329 r = xstate_required_size(supported_xcr0 & guest_perm, false);
4330 if (r < sizeof(struct kvm_xsave))
4331 r = sizeof(struct kvm_xsave);
4340 static inline void __user *kvm_get_attr_addr(struct kvm_device_attr *attr)
4342 void __user *uaddr = (void __user*)(unsigned long)attr->addr;
4344 if ((u64)(unsigned long)uaddr != attr->addr)
4345 return ERR_PTR_USR(-EFAULT);
4349 static int kvm_x86_dev_get_attr(struct kvm_device_attr *attr)
4351 u64 __user *uaddr = kvm_get_attr_addr(attr);
4357 return PTR_ERR(uaddr);
4359 switch (attr->attr) {
4360 case KVM_X86_XCOMP_GUEST_SUPP:
4361 if (put_user(supported_xcr0, uaddr))
4370 static int kvm_x86_dev_has_attr(struct kvm_device_attr *attr)
4375 switch (attr->attr) {
4376 case KVM_X86_XCOMP_GUEST_SUPP:
4383 long kvm_arch_dev_ioctl(struct file *filp,
4384 unsigned int ioctl, unsigned long arg)
4386 void __user *argp = (void __user *)arg;
4390 case KVM_GET_MSR_INDEX_LIST: {
4391 struct kvm_msr_list __user *user_msr_list = argp;
4392 struct kvm_msr_list msr_list;
4396 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4399 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
4400 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4403 if (n < msr_list.nmsrs)
4406 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
4407 num_msrs_to_save * sizeof(u32)))
4409 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
4411 num_emulated_msrs * sizeof(u32)))
4416 case KVM_GET_SUPPORTED_CPUID:
4417 case KVM_GET_EMULATED_CPUID: {
4418 struct kvm_cpuid2 __user *cpuid_arg = argp;
4419 struct kvm_cpuid2 cpuid;
4422 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4425 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
4431 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4436 case KVM_X86_GET_MCE_CAP_SUPPORTED:
4438 if (copy_to_user(argp, &kvm_mce_cap_supported,
4439 sizeof(kvm_mce_cap_supported)))
4443 case KVM_GET_MSR_FEATURE_INDEX_LIST: {
4444 struct kvm_msr_list __user *user_msr_list = argp;
4445 struct kvm_msr_list msr_list;
4449 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4452 msr_list.nmsrs = num_msr_based_features;
4453 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4456 if (n < msr_list.nmsrs)
4459 if (copy_to_user(user_msr_list->indices, &msr_based_features,
4460 num_msr_based_features * sizeof(u32)))
4466 r = msr_io(NULL, argp, do_get_msr_feature, 1);
4468 case KVM_GET_SUPPORTED_HV_CPUID:
4469 r = kvm_ioctl_get_supported_hv_cpuid(NULL, argp);
4471 case KVM_GET_DEVICE_ATTR: {
4472 struct kvm_device_attr attr;
4474 if (copy_from_user(&attr, (void __user *)arg, sizeof(attr)))
4476 r = kvm_x86_dev_get_attr(&attr);
4479 case KVM_HAS_DEVICE_ATTR: {
4480 struct kvm_device_attr attr;
4482 if (copy_from_user(&attr, (void __user *)arg, sizeof(attr)))
4484 r = kvm_x86_dev_has_attr(&attr);
4495 static void wbinvd_ipi(void *garbage)
4500 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
4502 return kvm_arch_has_noncoherent_dma(vcpu->kvm);
4505 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
4507 /* Address WBINVD may be executed by guest */
4508 if (need_emulate_wbinvd(vcpu)) {
4509 if (static_call(kvm_x86_has_wbinvd_exit)())
4510 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4511 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
4512 smp_call_function_single(vcpu->cpu,
4513 wbinvd_ipi, NULL, 1);
4516 static_call(kvm_x86_vcpu_load)(vcpu, cpu);
4518 /* Save host pkru register if supported */
4519 vcpu->arch.host_pkru = read_pkru();
4521 /* Apply any externally detected TSC adjustments (due to suspend) */
4522 if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
4523 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
4524 vcpu->arch.tsc_offset_adjustment = 0;
4525 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4528 if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
4529 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
4530 rdtsc() - vcpu->arch.last_host_tsc;
4532 mark_tsc_unstable("KVM discovered backwards TSC");
4534 if (kvm_check_tsc_unstable()) {
4535 u64 offset = kvm_compute_l1_tsc_offset(vcpu,
4536 vcpu->arch.last_guest_tsc);
4537 kvm_vcpu_write_tsc_offset(vcpu, offset);
4538 vcpu->arch.tsc_catchup = 1;
4541 if (kvm_lapic_hv_timer_in_use(vcpu))
4542 kvm_lapic_restart_hv_timer(vcpu);
4545 * On a host with synchronized TSC, there is no need to update
4546 * kvmclock on vcpu->cpu migration
4548 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
4549 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
4550 if (vcpu->cpu != cpu)
4551 kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
4555 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
4558 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
4560 struct gfn_to_hva_cache *ghc = &vcpu->arch.st.cache;
4561 struct kvm_steal_time __user *st;
4562 struct kvm_memslots *slots;
4563 static const u8 preempted = KVM_VCPU_PREEMPTED;
4565 if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
4568 if (vcpu->arch.st.preempted)
4571 /* This happens on process exit */
4572 if (unlikely(current->mm != vcpu->kvm->mm))
4575 slots = kvm_memslots(vcpu->kvm);
4577 if (unlikely(slots->generation != ghc->generation ||
4578 kvm_is_error_hva(ghc->hva) || !ghc->memslot))
4581 st = (struct kvm_steal_time __user *)ghc->hva;
4582 BUILD_BUG_ON(sizeof(st->preempted) != sizeof(preempted));
4584 if (!copy_to_user_nofault(&st->preempted, &preempted, sizeof(preempted)))
4585 vcpu->arch.st.preempted = KVM_VCPU_PREEMPTED;
4587 mark_page_dirty_in_slot(vcpu->kvm, ghc->memslot, gpa_to_gfn(ghc->gpa));
4590 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
4594 if (vcpu->preempted && !vcpu->arch.guest_state_protected)
4595 vcpu->arch.preempted_in_kernel = !static_call(kvm_x86_get_cpl)(vcpu);
4598 * Take the srcu lock as memslots will be accessed to check the gfn
4599 * cache generation against the memslots generation.
4601 idx = srcu_read_lock(&vcpu->kvm->srcu);
4602 if (kvm_xen_msr_enabled(vcpu->kvm))
4603 kvm_xen_runstate_set_preempted(vcpu);
4605 kvm_steal_time_set_preempted(vcpu);
4606 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4608 static_call(kvm_x86_vcpu_put)(vcpu);
4609 vcpu->arch.last_host_tsc = rdtsc();
4612 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
4613 struct kvm_lapic_state *s)
4615 static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
4617 return kvm_apic_get_state(vcpu, s);
4620 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
4621 struct kvm_lapic_state *s)
4625 r = kvm_apic_set_state(vcpu, s);
4628 update_cr8_intercept(vcpu);
4633 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
4636 * We can accept userspace's request for interrupt injection
4637 * as long as we have a place to store the interrupt number.
4638 * The actual injection will happen when the CPU is able to
4639 * deliver the interrupt.
4641 if (kvm_cpu_has_extint(vcpu))
4644 /* Acknowledging ExtINT does not happen if LINT0 is masked. */
4645 return (!lapic_in_kernel(vcpu) ||
4646 kvm_apic_accept_pic_intr(vcpu));
4649 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
4652 * Do not cause an interrupt window exit if an exception
4653 * is pending or an event needs reinjection; userspace
4654 * might want to inject the interrupt manually using KVM_SET_REGS
4655 * or KVM_SET_SREGS. For that to work, we must be at an
4656 * instruction boundary and with no events half-injected.
4658 return (kvm_arch_interrupt_allowed(vcpu) &&
4659 kvm_cpu_accept_dm_intr(vcpu) &&
4660 !kvm_event_needs_reinjection(vcpu) &&
4661 !vcpu->arch.exception.pending);
4664 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
4665 struct kvm_interrupt *irq)
4667 if (irq->irq >= KVM_NR_INTERRUPTS)
4670 if (!irqchip_in_kernel(vcpu->kvm)) {
4671 kvm_queue_interrupt(vcpu, irq->irq, false);
4672 kvm_make_request(KVM_REQ_EVENT, vcpu);
4677 * With in-kernel LAPIC, we only use this to inject EXTINT, so
4678 * fail for in-kernel 8259.
4680 if (pic_in_kernel(vcpu->kvm))
4683 if (vcpu->arch.pending_external_vector != -1)
4686 vcpu->arch.pending_external_vector = irq->irq;
4687 kvm_make_request(KVM_REQ_EVENT, vcpu);
4691 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
4693 kvm_inject_nmi(vcpu);
4698 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
4700 kvm_make_request(KVM_REQ_SMI, vcpu);
4705 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
4706 struct kvm_tpr_access_ctl *tac)
4710 vcpu->arch.tpr_access_reporting = !!tac->enabled;
4714 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
4718 unsigned bank_num = mcg_cap & 0xff, bank;
4721 if (!bank_num || bank_num > KVM_MAX_MCE_BANKS)
4723 if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
4726 vcpu->arch.mcg_cap = mcg_cap;
4727 /* Init IA32_MCG_CTL to all 1s */
4728 if (mcg_cap & MCG_CTL_P)
4729 vcpu->arch.mcg_ctl = ~(u64)0;
4730 /* Init IA32_MCi_CTL to all 1s */
4731 for (bank = 0; bank < bank_num; bank++)
4732 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
4734 static_call(kvm_x86_setup_mce)(vcpu);
4739 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
4740 struct kvm_x86_mce *mce)
4742 u64 mcg_cap = vcpu->arch.mcg_cap;
4743 unsigned bank_num = mcg_cap & 0xff;
4744 u64 *banks = vcpu->arch.mce_banks;
4746 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
4749 * if IA32_MCG_CTL is not all 1s, the uncorrected error
4750 * reporting is disabled
4752 if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
4753 vcpu->arch.mcg_ctl != ~(u64)0)
4755 banks += 4 * mce->bank;
4757 * if IA32_MCi_CTL is not all 1s, the uncorrected error
4758 * reporting is disabled for the bank
4760 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
4762 if (mce->status & MCI_STATUS_UC) {
4763 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
4764 !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
4765 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
4768 if (banks[1] & MCI_STATUS_VAL)
4769 mce->status |= MCI_STATUS_OVER;
4770 banks[2] = mce->addr;
4771 banks[3] = mce->misc;
4772 vcpu->arch.mcg_status = mce->mcg_status;
4773 banks[1] = mce->status;
4774 kvm_queue_exception(vcpu, MC_VECTOR);
4775 } else if (!(banks[1] & MCI_STATUS_VAL)
4776 || !(banks[1] & MCI_STATUS_UC)) {
4777 if (banks[1] & MCI_STATUS_VAL)
4778 mce->status |= MCI_STATUS_OVER;
4779 banks[2] = mce->addr;
4780 banks[3] = mce->misc;
4781 banks[1] = mce->status;
4783 banks[1] |= MCI_STATUS_OVER;
4787 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
4788 struct kvm_vcpu_events *events)
4792 if (kvm_check_request(KVM_REQ_SMI, vcpu))
4796 * In guest mode, payload delivery should be deferred,
4797 * so that the L1 hypervisor can intercept #PF before
4798 * CR2 is modified (or intercept #DB before DR6 is
4799 * modified under nVMX). Unless the per-VM capability,
4800 * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4801 * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4802 * opportunistically defer the exception payload, deliver it if the
4803 * capability hasn't been requested before processing a
4804 * KVM_GET_VCPU_EVENTS.
4806 if (!vcpu->kvm->arch.exception_payload_enabled &&
4807 vcpu->arch.exception.pending && vcpu->arch.exception.has_payload)
4808 kvm_deliver_exception_payload(vcpu);
4811 * The API doesn't provide the instruction length for software
4812 * exceptions, so don't report them. As long as the guest RIP
4813 * isn't advanced, we should expect to encounter the exception
4816 if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
4817 events->exception.injected = 0;
4818 events->exception.pending = 0;
4820 events->exception.injected = vcpu->arch.exception.injected;
4821 events->exception.pending = vcpu->arch.exception.pending;
4823 * For ABI compatibility, deliberately conflate
4824 * pending and injected exceptions when
4825 * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4827 if (!vcpu->kvm->arch.exception_payload_enabled)
4828 events->exception.injected |=
4829 vcpu->arch.exception.pending;
4831 events->exception.nr = vcpu->arch.exception.nr;
4832 events->exception.has_error_code = vcpu->arch.exception.has_error_code;
4833 events->exception.error_code = vcpu->arch.exception.error_code;
4834 events->exception_has_payload = vcpu->arch.exception.has_payload;
4835 events->exception_payload = vcpu->arch.exception.payload;
4837 events->interrupt.injected =
4838 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
4839 events->interrupt.nr = vcpu->arch.interrupt.nr;
4840 events->interrupt.soft = 0;
4841 events->interrupt.shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
4843 events->nmi.injected = vcpu->arch.nmi_injected;
4844 events->nmi.pending = vcpu->arch.nmi_pending != 0;
4845 events->nmi.masked = static_call(kvm_x86_get_nmi_mask)(vcpu);
4846 events->nmi.pad = 0;
4848 events->sipi_vector = 0; /* never valid when reporting to user space */
4850 events->smi.smm = is_smm(vcpu);
4851 events->smi.pending = vcpu->arch.smi_pending;
4852 events->smi.smm_inside_nmi =
4853 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
4854 events->smi.latched_init = kvm_lapic_latched_init(vcpu);
4856 events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
4857 | KVM_VCPUEVENT_VALID_SHADOW
4858 | KVM_VCPUEVENT_VALID_SMM);
4859 if (vcpu->kvm->arch.exception_payload_enabled)
4860 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
4862 memset(&events->reserved, 0, sizeof(events->reserved));
4865 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm);
4867 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
4868 struct kvm_vcpu_events *events)
4870 if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4871 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4872 | KVM_VCPUEVENT_VALID_SHADOW
4873 | KVM_VCPUEVENT_VALID_SMM
4874 | KVM_VCPUEVENT_VALID_PAYLOAD))
4877 if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
4878 if (!vcpu->kvm->arch.exception_payload_enabled)
4880 if (events->exception.pending)
4881 events->exception.injected = 0;
4883 events->exception_has_payload = 0;
4885 events->exception.pending = 0;
4886 events->exception_has_payload = 0;
4889 if ((events->exception.injected || events->exception.pending) &&
4890 (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
4893 /* INITs are latched while in SMM */
4894 if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
4895 (events->smi.smm || events->smi.pending) &&
4896 vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
4900 vcpu->arch.exception.injected = events->exception.injected;
4901 vcpu->arch.exception.pending = events->exception.pending;
4902 vcpu->arch.exception.nr = events->exception.nr;
4903 vcpu->arch.exception.has_error_code = events->exception.has_error_code;
4904 vcpu->arch.exception.error_code = events->exception.error_code;
4905 vcpu->arch.exception.has_payload = events->exception_has_payload;
4906 vcpu->arch.exception.payload = events->exception_payload;
4908 vcpu->arch.interrupt.injected = events->interrupt.injected;
4909 vcpu->arch.interrupt.nr = events->interrupt.nr;
4910 vcpu->arch.interrupt.soft = events->interrupt.soft;
4911 if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
4912 static_call(kvm_x86_set_interrupt_shadow)(vcpu,
4913 events->interrupt.shadow);
4915 vcpu->arch.nmi_injected = events->nmi.injected;
4916 if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
4917 vcpu->arch.nmi_pending = events->nmi.pending;
4918 static_call(kvm_x86_set_nmi_mask)(vcpu, events->nmi.masked);
4920 if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
4921 lapic_in_kernel(vcpu))
4922 vcpu->arch.apic->sipi_vector = events->sipi_vector;
4924 if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
4925 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
4926 kvm_x86_ops.nested_ops->leave_nested(vcpu);
4927 kvm_smm_changed(vcpu, events->smi.smm);
4930 vcpu->arch.smi_pending = events->smi.pending;
4932 if (events->smi.smm) {
4933 if (events->smi.smm_inside_nmi)
4934 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
4936 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
4939 if (lapic_in_kernel(vcpu)) {
4940 if (events->smi.latched_init)
4941 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4943 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4947 kvm_make_request(KVM_REQ_EVENT, vcpu);
4952 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
4953 struct kvm_debugregs *dbgregs)
4957 memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
4958 kvm_get_dr(vcpu, 6, &val);
4960 dbgregs->dr7 = vcpu->arch.dr7;
4962 memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
4965 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
4966 struct kvm_debugregs *dbgregs)
4971 if (!kvm_dr6_valid(dbgregs->dr6))
4973 if (!kvm_dr7_valid(dbgregs->dr7))
4976 memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
4977 kvm_update_dr0123(vcpu);
4978 vcpu->arch.dr6 = dbgregs->dr6;
4979 vcpu->arch.dr7 = dbgregs->dr7;
4980 kvm_update_dr7(vcpu);
4985 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
4986 struct kvm_xsave *guest_xsave)
4988 if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
4991 fpu_copy_guest_fpstate_to_uabi(&vcpu->arch.guest_fpu,
4992 guest_xsave->region,
4993 sizeof(guest_xsave->region),
4997 static void kvm_vcpu_ioctl_x86_get_xsave2(struct kvm_vcpu *vcpu,
4998 u8 *state, unsigned int size)
5000 if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
5003 fpu_copy_guest_fpstate_to_uabi(&vcpu->arch.guest_fpu,
5004 state, size, vcpu->arch.pkru);
5007 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
5008 struct kvm_xsave *guest_xsave)
5010 if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
5013 return fpu_copy_uabi_to_guest_fpstate(&vcpu->arch.guest_fpu,
5014 guest_xsave->region,
5015 supported_xcr0, &vcpu->arch.pkru);
5018 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
5019 struct kvm_xcrs *guest_xcrs)
5021 if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
5022 guest_xcrs->nr_xcrs = 0;
5026 guest_xcrs->nr_xcrs = 1;
5027 guest_xcrs->flags = 0;
5028 guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
5029 guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
5032 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
5033 struct kvm_xcrs *guest_xcrs)
5037 if (!boot_cpu_has(X86_FEATURE_XSAVE))
5040 if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
5043 for (i = 0; i < guest_xcrs->nr_xcrs; i++)
5044 /* Only support XCR0 currently */
5045 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
5046 r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
5047 guest_xcrs->xcrs[i].value);
5056 * kvm_set_guest_paused() indicates to the guest kernel that it has been
5057 * stopped by the hypervisor. This function will be called from the host only.
5058 * EINVAL is returned when the host attempts to set the flag for a guest that
5059 * does not support pv clocks.
5061 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
5063 if (!vcpu->arch.pv_time_enabled)
5065 vcpu->arch.pvclock_set_guest_stopped_request = true;
5066 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5070 static int kvm_arch_tsc_has_attr(struct kvm_vcpu *vcpu,
5071 struct kvm_device_attr *attr)
5075 switch (attr->attr) {
5076 case KVM_VCPU_TSC_OFFSET:
5086 static int kvm_arch_tsc_get_attr(struct kvm_vcpu *vcpu,
5087 struct kvm_device_attr *attr)
5089 u64 __user *uaddr = kvm_get_attr_addr(attr);
5093 return PTR_ERR(uaddr);
5095 switch (attr->attr) {
5096 case KVM_VCPU_TSC_OFFSET:
5098 if (put_user(vcpu->arch.l1_tsc_offset, uaddr))
5109 static int kvm_arch_tsc_set_attr(struct kvm_vcpu *vcpu,
5110 struct kvm_device_attr *attr)
5112 u64 __user *uaddr = kvm_get_attr_addr(attr);
5113 struct kvm *kvm = vcpu->kvm;
5117 return PTR_ERR(uaddr);
5119 switch (attr->attr) {
5120 case KVM_VCPU_TSC_OFFSET: {
5121 u64 offset, tsc, ns;
5122 unsigned long flags;
5126 if (get_user(offset, uaddr))
5129 raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
5131 matched = (vcpu->arch.virtual_tsc_khz &&
5132 kvm->arch.last_tsc_khz == vcpu->arch.virtual_tsc_khz &&
5133 kvm->arch.last_tsc_offset == offset);
5135 tsc = kvm_scale_tsc(vcpu, rdtsc(), vcpu->arch.l1_tsc_scaling_ratio) + offset;
5136 ns = get_kvmclock_base_ns();
5138 __kvm_synchronize_tsc(vcpu, offset, tsc, ns, matched);
5139 raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
5151 static int kvm_vcpu_ioctl_device_attr(struct kvm_vcpu *vcpu,
5155 struct kvm_device_attr attr;
5158 if (copy_from_user(&attr, argp, sizeof(attr)))
5161 if (attr.group != KVM_VCPU_TSC_CTRL)
5165 case KVM_HAS_DEVICE_ATTR:
5166 r = kvm_arch_tsc_has_attr(vcpu, &attr);
5168 case KVM_GET_DEVICE_ATTR:
5169 r = kvm_arch_tsc_get_attr(vcpu, &attr);
5171 case KVM_SET_DEVICE_ATTR:
5172 r = kvm_arch_tsc_set_attr(vcpu, &attr);
5179 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
5180 struct kvm_enable_cap *cap)
5183 uint16_t vmcs_version;
5184 void __user *user_ptr;
5190 case KVM_CAP_HYPERV_SYNIC2:
5195 case KVM_CAP_HYPERV_SYNIC:
5196 if (!irqchip_in_kernel(vcpu->kvm))
5198 return kvm_hv_activate_synic(vcpu, cap->cap ==
5199 KVM_CAP_HYPERV_SYNIC2);
5200 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
5201 if (!kvm_x86_ops.nested_ops->enable_evmcs)
5203 r = kvm_x86_ops.nested_ops->enable_evmcs(vcpu, &vmcs_version);
5205 user_ptr = (void __user *)(uintptr_t)cap->args[0];
5206 if (copy_to_user(user_ptr, &vmcs_version,
5207 sizeof(vmcs_version)))
5211 case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
5212 if (!kvm_x86_ops.enable_direct_tlbflush)
5215 return static_call(kvm_x86_enable_direct_tlbflush)(vcpu);
5217 case KVM_CAP_HYPERV_ENFORCE_CPUID:
5218 return kvm_hv_set_enforce_cpuid(vcpu, cap->args[0]);
5220 case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
5221 vcpu->arch.pv_cpuid.enforce = cap->args[0];
5222 if (vcpu->arch.pv_cpuid.enforce)
5223 kvm_update_pv_runtime(vcpu);
5231 long kvm_arch_vcpu_ioctl(struct file *filp,
5232 unsigned int ioctl, unsigned long arg)
5234 struct kvm_vcpu *vcpu = filp->private_data;
5235 void __user *argp = (void __user *)arg;
5238 struct kvm_sregs2 *sregs2;
5239 struct kvm_lapic_state *lapic;
5240 struct kvm_xsave *xsave;
5241 struct kvm_xcrs *xcrs;
5249 case KVM_GET_LAPIC: {
5251 if (!lapic_in_kernel(vcpu))
5253 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
5254 GFP_KERNEL_ACCOUNT);
5259 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
5263 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
5268 case KVM_SET_LAPIC: {
5270 if (!lapic_in_kernel(vcpu))
5272 u.lapic = memdup_user(argp, sizeof(*u.lapic));
5273 if (IS_ERR(u.lapic)) {
5274 r = PTR_ERR(u.lapic);
5278 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
5281 case KVM_INTERRUPT: {
5282 struct kvm_interrupt irq;
5285 if (copy_from_user(&irq, argp, sizeof(irq)))
5287 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
5291 r = kvm_vcpu_ioctl_nmi(vcpu);
5295 r = kvm_vcpu_ioctl_smi(vcpu);
5298 case KVM_SET_CPUID: {
5299 struct kvm_cpuid __user *cpuid_arg = argp;
5300 struct kvm_cpuid cpuid;
5303 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5305 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
5308 case KVM_SET_CPUID2: {
5309 struct kvm_cpuid2 __user *cpuid_arg = argp;
5310 struct kvm_cpuid2 cpuid;
5313 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5315 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
5316 cpuid_arg->entries);
5319 case KVM_GET_CPUID2: {
5320 struct kvm_cpuid2 __user *cpuid_arg = argp;
5321 struct kvm_cpuid2 cpuid;
5324 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5326 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
5327 cpuid_arg->entries);
5331 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
5336 case KVM_GET_MSRS: {
5337 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5338 r = msr_io(vcpu, argp, do_get_msr, 1);
5339 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5342 case KVM_SET_MSRS: {
5343 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5344 r = msr_io(vcpu, argp, do_set_msr, 0);
5345 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5348 case KVM_TPR_ACCESS_REPORTING: {
5349 struct kvm_tpr_access_ctl tac;
5352 if (copy_from_user(&tac, argp, sizeof(tac)))
5354 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
5358 if (copy_to_user(argp, &tac, sizeof(tac)))
5363 case KVM_SET_VAPIC_ADDR: {
5364 struct kvm_vapic_addr va;
5368 if (!lapic_in_kernel(vcpu))
5371 if (copy_from_user(&va, argp, sizeof(va)))
5373 idx = srcu_read_lock(&vcpu->kvm->srcu);
5374 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
5375 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5378 case KVM_X86_SETUP_MCE: {
5382 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
5384 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
5387 case KVM_X86_SET_MCE: {
5388 struct kvm_x86_mce mce;
5391 if (copy_from_user(&mce, argp, sizeof(mce)))
5393 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
5396 case KVM_GET_VCPU_EVENTS: {
5397 struct kvm_vcpu_events events;
5399 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
5402 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
5407 case KVM_SET_VCPU_EVENTS: {
5408 struct kvm_vcpu_events events;
5411 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
5414 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
5417 case KVM_GET_DEBUGREGS: {
5418 struct kvm_debugregs dbgregs;
5420 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
5423 if (copy_to_user(argp, &dbgregs,
5424 sizeof(struct kvm_debugregs)))
5429 case KVM_SET_DEBUGREGS: {
5430 struct kvm_debugregs dbgregs;
5433 if (copy_from_user(&dbgregs, argp,
5434 sizeof(struct kvm_debugregs)))
5437 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
5440 case KVM_GET_XSAVE: {
5442 if (vcpu->arch.guest_fpu.uabi_size > sizeof(struct kvm_xsave))
5445 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
5450 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
5453 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
5458 case KVM_SET_XSAVE: {
5459 int size = vcpu->arch.guest_fpu.uabi_size;
5461 u.xsave = memdup_user(argp, size);
5462 if (IS_ERR(u.xsave)) {
5463 r = PTR_ERR(u.xsave);
5467 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
5471 case KVM_GET_XSAVE2: {
5472 int size = vcpu->arch.guest_fpu.uabi_size;
5474 u.xsave = kzalloc(size, GFP_KERNEL_ACCOUNT);
5479 kvm_vcpu_ioctl_x86_get_xsave2(vcpu, u.buffer, size);
5482 if (copy_to_user(argp, u.xsave, size))
5489 case KVM_GET_XCRS: {
5490 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
5495 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
5498 if (copy_to_user(argp, u.xcrs,
5499 sizeof(struct kvm_xcrs)))
5504 case KVM_SET_XCRS: {
5505 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
5506 if (IS_ERR(u.xcrs)) {
5507 r = PTR_ERR(u.xcrs);
5511 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
5514 case KVM_SET_TSC_KHZ: {
5518 user_tsc_khz = (u32)arg;
5520 if (kvm_has_tsc_control &&
5521 user_tsc_khz >= kvm_max_guest_tsc_khz)
5524 if (user_tsc_khz == 0)
5525 user_tsc_khz = tsc_khz;
5527 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
5532 case KVM_GET_TSC_KHZ: {
5533 r = vcpu->arch.virtual_tsc_khz;
5536 case KVM_KVMCLOCK_CTRL: {
5537 r = kvm_set_guest_paused(vcpu);
5540 case KVM_ENABLE_CAP: {
5541 struct kvm_enable_cap cap;
5544 if (copy_from_user(&cap, argp, sizeof(cap)))
5546 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
5549 case KVM_GET_NESTED_STATE: {
5550 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5554 if (!kvm_x86_ops.nested_ops->get_state)
5557 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
5559 if (get_user(user_data_size, &user_kvm_nested_state->size))
5562 r = kvm_x86_ops.nested_ops->get_state(vcpu, user_kvm_nested_state,
5567 if (r > user_data_size) {
5568 if (put_user(r, &user_kvm_nested_state->size))
5578 case KVM_SET_NESTED_STATE: {
5579 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5580 struct kvm_nested_state kvm_state;
5584 if (!kvm_x86_ops.nested_ops->set_state)
5588 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
5592 if (kvm_state.size < sizeof(kvm_state))
5595 if (kvm_state.flags &
5596 ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
5597 | KVM_STATE_NESTED_EVMCS | KVM_STATE_NESTED_MTF_PENDING
5598 | KVM_STATE_NESTED_GIF_SET))
5601 /* nested_run_pending implies guest_mode. */
5602 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
5603 && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
5606 idx = srcu_read_lock(&vcpu->kvm->srcu);
5607 r = kvm_x86_ops.nested_ops->set_state(vcpu, user_kvm_nested_state, &kvm_state);
5608 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5611 case KVM_GET_SUPPORTED_HV_CPUID:
5612 r = kvm_ioctl_get_supported_hv_cpuid(vcpu, argp);
5614 #ifdef CONFIG_KVM_XEN
5615 case KVM_XEN_VCPU_GET_ATTR: {
5616 struct kvm_xen_vcpu_attr xva;
5619 if (copy_from_user(&xva, argp, sizeof(xva)))
5621 r = kvm_xen_vcpu_get_attr(vcpu, &xva);
5622 if (!r && copy_to_user(argp, &xva, sizeof(xva)))
5626 case KVM_XEN_VCPU_SET_ATTR: {
5627 struct kvm_xen_vcpu_attr xva;
5630 if (copy_from_user(&xva, argp, sizeof(xva)))
5632 r = kvm_xen_vcpu_set_attr(vcpu, &xva);
5636 case KVM_GET_SREGS2: {
5637 u.sregs2 = kzalloc(sizeof(struct kvm_sregs2), GFP_KERNEL);
5641 __get_sregs2(vcpu, u.sregs2);
5643 if (copy_to_user(argp, u.sregs2, sizeof(struct kvm_sregs2)))
5648 case KVM_SET_SREGS2: {
5649 u.sregs2 = memdup_user(argp, sizeof(struct kvm_sregs2));
5650 if (IS_ERR(u.sregs2)) {
5651 r = PTR_ERR(u.sregs2);
5655 r = __set_sregs2(vcpu, u.sregs2);
5658 case KVM_HAS_DEVICE_ATTR:
5659 case KVM_GET_DEVICE_ATTR:
5660 case KVM_SET_DEVICE_ATTR:
5661 r = kvm_vcpu_ioctl_device_attr(vcpu, ioctl, argp);
5673 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
5675 return VM_FAULT_SIGBUS;
5678 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
5682 if (addr > (unsigned int)(-3 * PAGE_SIZE))
5684 ret = static_call(kvm_x86_set_tss_addr)(kvm, addr);
5688 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
5691 return static_call(kvm_x86_set_identity_map_addr)(kvm, ident_addr);
5694 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
5695 unsigned long kvm_nr_mmu_pages)
5697 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
5700 mutex_lock(&kvm->slots_lock);
5702 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
5703 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
5705 mutex_unlock(&kvm->slots_lock);
5709 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
5711 return kvm->arch.n_max_mmu_pages;
5714 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5716 struct kvm_pic *pic = kvm->arch.vpic;
5720 switch (chip->chip_id) {
5721 case KVM_IRQCHIP_PIC_MASTER:
5722 memcpy(&chip->chip.pic, &pic->pics[0],
5723 sizeof(struct kvm_pic_state));
5725 case KVM_IRQCHIP_PIC_SLAVE:
5726 memcpy(&chip->chip.pic, &pic->pics[1],
5727 sizeof(struct kvm_pic_state));
5729 case KVM_IRQCHIP_IOAPIC:
5730 kvm_get_ioapic(kvm, &chip->chip.ioapic);
5739 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5741 struct kvm_pic *pic = kvm->arch.vpic;
5745 switch (chip->chip_id) {
5746 case KVM_IRQCHIP_PIC_MASTER:
5747 spin_lock(&pic->lock);
5748 memcpy(&pic->pics[0], &chip->chip.pic,
5749 sizeof(struct kvm_pic_state));
5750 spin_unlock(&pic->lock);
5752 case KVM_IRQCHIP_PIC_SLAVE:
5753 spin_lock(&pic->lock);
5754 memcpy(&pic->pics[1], &chip->chip.pic,
5755 sizeof(struct kvm_pic_state));
5756 spin_unlock(&pic->lock);
5758 case KVM_IRQCHIP_IOAPIC:
5759 kvm_set_ioapic(kvm, &chip->chip.ioapic);
5765 kvm_pic_update_irq(pic);
5769 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5771 struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
5773 BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
5775 mutex_lock(&kps->lock);
5776 memcpy(ps, &kps->channels, sizeof(*ps));
5777 mutex_unlock(&kps->lock);
5781 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5784 struct kvm_pit *pit = kvm->arch.vpit;
5786 mutex_lock(&pit->pit_state.lock);
5787 memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
5788 for (i = 0; i < 3; i++)
5789 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
5790 mutex_unlock(&pit->pit_state.lock);
5794 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5796 mutex_lock(&kvm->arch.vpit->pit_state.lock);
5797 memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
5798 sizeof(ps->channels));
5799 ps->flags = kvm->arch.vpit->pit_state.flags;
5800 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
5801 memset(&ps->reserved, 0, sizeof(ps->reserved));
5805 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5809 u32 prev_legacy, cur_legacy;
5810 struct kvm_pit *pit = kvm->arch.vpit;
5812 mutex_lock(&pit->pit_state.lock);
5813 prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
5814 cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
5815 if (!prev_legacy && cur_legacy)
5817 memcpy(&pit->pit_state.channels, &ps->channels,
5818 sizeof(pit->pit_state.channels));
5819 pit->pit_state.flags = ps->flags;
5820 for (i = 0; i < 3; i++)
5821 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
5823 mutex_unlock(&pit->pit_state.lock);
5827 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
5828 struct kvm_reinject_control *control)
5830 struct kvm_pit *pit = kvm->arch.vpit;
5832 /* pit->pit_state.lock was overloaded to prevent userspace from getting
5833 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5834 * ioctls in parallel. Use a separate lock if that ioctl isn't rare.
5836 mutex_lock(&pit->pit_state.lock);
5837 kvm_pit_set_reinject(pit, control->pit_reinject);
5838 mutex_unlock(&pit->pit_state.lock);
5843 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
5847 * Flush all CPUs' dirty log buffers to the dirty_bitmap. Called
5848 * before reporting dirty_bitmap to userspace. KVM flushes the buffers
5849 * on all VM-Exits, thus we only need to kick running vCPUs to force a
5852 struct kvm_vcpu *vcpu;
5855 kvm_for_each_vcpu(i, vcpu, kvm)
5856 kvm_vcpu_kick(vcpu);
5859 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
5862 if (!irqchip_in_kernel(kvm))
5865 irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
5866 irq_event->irq, irq_event->level,
5871 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
5872 struct kvm_enable_cap *cap)
5880 case KVM_CAP_DISABLE_QUIRKS:
5881 kvm->arch.disabled_quirks = cap->args[0];
5884 case KVM_CAP_SPLIT_IRQCHIP: {
5885 mutex_lock(&kvm->lock);
5887 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
5888 goto split_irqchip_unlock;
5890 if (irqchip_in_kernel(kvm))
5891 goto split_irqchip_unlock;
5892 if (kvm->created_vcpus)
5893 goto split_irqchip_unlock;
5894 r = kvm_setup_empty_irq_routing(kvm);
5896 goto split_irqchip_unlock;
5897 /* Pairs with irqchip_in_kernel. */
5899 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
5900 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
5901 kvm_request_apicv_update(kvm, true, APICV_INHIBIT_REASON_ABSENT);
5903 split_irqchip_unlock:
5904 mutex_unlock(&kvm->lock);
5907 case KVM_CAP_X2APIC_API:
5909 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
5912 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
5913 kvm->arch.x2apic_format = true;
5914 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
5915 kvm->arch.x2apic_broadcast_quirk_disabled = true;
5919 case KVM_CAP_X86_DISABLE_EXITS:
5921 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
5924 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
5925 kvm_can_mwait_in_guest())
5926 kvm->arch.mwait_in_guest = true;
5927 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
5928 kvm->arch.hlt_in_guest = true;
5929 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
5930 kvm->arch.pause_in_guest = true;
5931 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
5932 kvm->arch.cstate_in_guest = true;
5935 case KVM_CAP_MSR_PLATFORM_INFO:
5936 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
5939 case KVM_CAP_EXCEPTION_PAYLOAD:
5940 kvm->arch.exception_payload_enabled = cap->args[0];
5943 case KVM_CAP_X86_USER_SPACE_MSR:
5944 kvm->arch.user_space_msr_mask = cap->args[0];
5947 case KVM_CAP_X86_BUS_LOCK_EXIT:
5949 if (cap->args[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE)
5952 if ((cap->args[0] & KVM_BUS_LOCK_DETECTION_OFF) &&
5953 (cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT))
5956 if (kvm_has_bus_lock_exit &&
5957 cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT)
5958 kvm->arch.bus_lock_detection_enabled = true;
5961 #ifdef CONFIG_X86_SGX_KVM
5962 case KVM_CAP_SGX_ATTRIBUTE: {
5963 unsigned long allowed_attributes = 0;
5965 r = sgx_set_attribute(&allowed_attributes, cap->args[0]);
5969 /* KVM only supports the PROVISIONKEY privileged attribute. */
5970 if ((allowed_attributes & SGX_ATTR_PROVISIONKEY) &&
5971 !(allowed_attributes & ~SGX_ATTR_PROVISIONKEY))
5972 kvm->arch.sgx_provisioning_allowed = true;
5978 case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
5980 if (kvm_x86_ops.vm_copy_enc_context_from)
5981 r = kvm_x86_ops.vm_copy_enc_context_from(kvm, cap->args[0]);
5983 case KVM_CAP_VM_MOVE_ENC_CONTEXT_FROM:
5985 if (kvm_x86_ops.vm_move_enc_context_from)
5986 r = kvm_x86_ops.vm_move_enc_context_from(
5989 case KVM_CAP_EXIT_HYPERCALL:
5990 if (cap->args[0] & ~KVM_EXIT_HYPERCALL_VALID_MASK) {
5994 kvm->arch.hypercall_exit_enabled = cap->args[0];
5997 case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
5999 if (cap->args[0] & ~1)
6001 kvm->arch.exit_on_emulation_error = cap->args[0];
6011 static struct kvm_x86_msr_filter *kvm_alloc_msr_filter(bool default_allow)
6013 struct kvm_x86_msr_filter *msr_filter;
6015 msr_filter = kzalloc(sizeof(*msr_filter), GFP_KERNEL_ACCOUNT);
6019 msr_filter->default_allow = default_allow;
6023 static void kvm_free_msr_filter(struct kvm_x86_msr_filter *msr_filter)
6030 for (i = 0; i < msr_filter->count; i++)
6031 kfree(msr_filter->ranges[i].bitmap);
6036 static int kvm_add_msr_filter(struct kvm_x86_msr_filter *msr_filter,
6037 struct kvm_msr_filter_range *user_range)
6039 unsigned long *bitmap = NULL;
6042 if (!user_range->nmsrs)
6045 if (user_range->flags & ~(KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE))
6048 if (!user_range->flags)
6051 bitmap_size = BITS_TO_LONGS(user_range->nmsrs) * sizeof(long);
6052 if (!bitmap_size || bitmap_size > KVM_MSR_FILTER_MAX_BITMAP_SIZE)
6055 bitmap = memdup_user((__user u8*)user_range->bitmap, bitmap_size);
6057 return PTR_ERR(bitmap);
6059 msr_filter->ranges[msr_filter->count] = (struct msr_bitmap_range) {
6060 .flags = user_range->flags,
6061 .base = user_range->base,
6062 .nmsrs = user_range->nmsrs,
6066 msr_filter->count++;
6070 static int kvm_vm_ioctl_set_msr_filter(struct kvm *kvm, void __user *argp)
6072 struct kvm_msr_filter __user *user_msr_filter = argp;
6073 struct kvm_x86_msr_filter *new_filter, *old_filter;
6074 struct kvm_msr_filter filter;
6080 if (copy_from_user(&filter, user_msr_filter, sizeof(filter)))
6083 for (i = 0; i < ARRAY_SIZE(filter.ranges); i++)
6084 empty &= !filter.ranges[i].nmsrs;
6086 default_allow = !(filter.flags & KVM_MSR_FILTER_DEFAULT_DENY);
6087 if (empty && !default_allow)
6090 new_filter = kvm_alloc_msr_filter(default_allow);
6094 for (i = 0; i < ARRAY_SIZE(filter.ranges); i++) {
6095 r = kvm_add_msr_filter(new_filter, &filter.ranges[i]);
6097 kvm_free_msr_filter(new_filter);
6102 mutex_lock(&kvm->lock);
6104 /* The per-VM filter is protected by kvm->lock... */
6105 old_filter = srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1);
6107 rcu_assign_pointer(kvm->arch.msr_filter, new_filter);
6108 synchronize_srcu(&kvm->srcu);
6110 kvm_free_msr_filter(old_filter);
6112 kvm_make_all_cpus_request(kvm, KVM_REQ_MSR_FILTER_CHANGED);
6113 mutex_unlock(&kvm->lock);
6118 #ifdef CONFIG_HAVE_KVM_PM_NOTIFIER
6119 static int kvm_arch_suspend_notifier(struct kvm *kvm)
6121 struct kvm_vcpu *vcpu;
6125 mutex_lock(&kvm->lock);
6126 kvm_for_each_vcpu(i, vcpu, kvm) {
6127 if (!vcpu->arch.pv_time_enabled)
6130 ret = kvm_set_guest_paused(vcpu);
6132 kvm_err("Failed to pause guest VCPU%d: %d\n",
6133 vcpu->vcpu_id, ret);
6137 mutex_unlock(&kvm->lock);
6139 return ret ? NOTIFY_BAD : NOTIFY_DONE;
6142 int kvm_arch_pm_notifier(struct kvm *kvm, unsigned long state)
6145 case PM_HIBERNATION_PREPARE:
6146 case PM_SUSPEND_PREPARE:
6147 return kvm_arch_suspend_notifier(kvm);
6152 #endif /* CONFIG_HAVE_KVM_PM_NOTIFIER */
6154 static int kvm_vm_ioctl_get_clock(struct kvm *kvm, void __user *argp)
6156 struct kvm_clock_data data = { 0 };
6158 get_kvmclock(kvm, &data);
6159 if (copy_to_user(argp, &data, sizeof(data)))
6165 static int kvm_vm_ioctl_set_clock(struct kvm *kvm, void __user *argp)
6167 struct kvm_arch *ka = &kvm->arch;
6168 struct kvm_clock_data data;
6171 if (copy_from_user(&data, argp, sizeof(data)))
6175 * Only KVM_CLOCK_REALTIME is used, but allow passing the
6176 * result of KVM_GET_CLOCK back to KVM_SET_CLOCK.
6178 if (data.flags & ~KVM_CLOCK_VALID_FLAGS)
6181 kvm_hv_invalidate_tsc_page(kvm);
6182 kvm_start_pvclock_update(kvm);
6183 pvclock_update_vm_gtod_copy(kvm);
6186 * This pairs with kvm_guest_time_update(): when masterclock is
6187 * in use, we use master_kernel_ns + kvmclock_offset to set
6188 * unsigned 'system_time' so if we use get_kvmclock_ns() (which
6189 * is slightly ahead) here we risk going negative on unsigned
6190 * 'system_time' when 'data.clock' is very small.
6192 if (data.flags & KVM_CLOCK_REALTIME) {
6193 u64 now_real_ns = ktime_get_real_ns();
6196 * Avoid stepping the kvmclock backwards.
6198 if (now_real_ns > data.realtime)
6199 data.clock += now_real_ns - data.realtime;
6202 if (ka->use_master_clock)
6203 now_raw_ns = ka->master_kernel_ns;
6205 now_raw_ns = get_kvmclock_base_ns();
6206 ka->kvmclock_offset = data.clock - now_raw_ns;
6207 kvm_end_pvclock_update(kvm);
6211 long kvm_arch_vm_ioctl(struct file *filp,
6212 unsigned int ioctl, unsigned long arg)
6214 struct kvm *kvm = filp->private_data;
6215 void __user *argp = (void __user *)arg;
6218 * This union makes it completely explicit to gcc-3.x
6219 * that these two variables' stack usage should be
6220 * combined, not added together.
6223 struct kvm_pit_state ps;
6224 struct kvm_pit_state2 ps2;
6225 struct kvm_pit_config pit_config;
6229 case KVM_SET_TSS_ADDR:
6230 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
6232 case KVM_SET_IDENTITY_MAP_ADDR: {
6235 mutex_lock(&kvm->lock);
6237 if (kvm->created_vcpus)
6238 goto set_identity_unlock;
6240 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
6241 goto set_identity_unlock;
6242 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
6243 set_identity_unlock:
6244 mutex_unlock(&kvm->lock);
6247 case KVM_SET_NR_MMU_PAGES:
6248 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
6250 case KVM_GET_NR_MMU_PAGES:
6251 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
6253 case KVM_CREATE_IRQCHIP: {
6254 mutex_lock(&kvm->lock);
6257 if (irqchip_in_kernel(kvm))
6258 goto create_irqchip_unlock;
6261 if (kvm->created_vcpus)
6262 goto create_irqchip_unlock;
6264 r = kvm_pic_init(kvm);
6266 goto create_irqchip_unlock;
6268 r = kvm_ioapic_init(kvm);
6270 kvm_pic_destroy(kvm);
6271 goto create_irqchip_unlock;
6274 r = kvm_setup_default_irq_routing(kvm);
6276 kvm_ioapic_destroy(kvm);
6277 kvm_pic_destroy(kvm);
6278 goto create_irqchip_unlock;
6280 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
6282 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
6283 kvm_request_apicv_update(kvm, true, APICV_INHIBIT_REASON_ABSENT);
6284 create_irqchip_unlock:
6285 mutex_unlock(&kvm->lock);
6288 case KVM_CREATE_PIT:
6289 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
6291 case KVM_CREATE_PIT2:
6293 if (copy_from_user(&u.pit_config, argp,
6294 sizeof(struct kvm_pit_config)))
6297 mutex_lock(&kvm->lock);
6300 goto create_pit_unlock;
6302 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
6306 mutex_unlock(&kvm->lock);
6308 case KVM_GET_IRQCHIP: {
6309 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
6310 struct kvm_irqchip *chip;
6312 chip = memdup_user(argp, sizeof(*chip));
6319 if (!irqchip_kernel(kvm))
6320 goto get_irqchip_out;
6321 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
6323 goto get_irqchip_out;
6325 if (copy_to_user(argp, chip, sizeof(*chip)))
6326 goto get_irqchip_out;
6332 case KVM_SET_IRQCHIP: {
6333 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
6334 struct kvm_irqchip *chip;
6336 chip = memdup_user(argp, sizeof(*chip));
6343 if (!irqchip_kernel(kvm))
6344 goto set_irqchip_out;
6345 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
6352 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
6355 if (!kvm->arch.vpit)
6357 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
6361 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
6368 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
6370 mutex_lock(&kvm->lock);
6372 if (!kvm->arch.vpit)
6374 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
6376 mutex_unlock(&kvm->lock);
6379 case KVM_GET_PIT2: {
6381 if (!kvm->arch.vpit)
6383 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
6387 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
6392 case KVM_SET_PIT2: {
6394 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
6396 mutex_lock(&kvm->lock);
6398 if (!kvm->arch.vpit)
6400 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
6402 mutex_unlock(&kvm->lock);
6405 case KVM_REINJECT_CONTROL: {
6406 struct kvm_reinject_control control;
6408 if (copy_from_user(&control, argp, sizeof(control)))
6411 if (!kvm->arch.vpit)
6413 r = kvm_vm_ioctl_reinject(kvm, &control);
6416 case KVM_SET_BOOT_CPU_ID:
6418 mutex_lock(&kvm->lock);
6419 if (kvm->created_vcpus)
6422 kvm->arch.bsp_vcpu_id = arg;
6423 mutex_unlock(&kvm->lock);
6425 #ifdef CONFIG_KVM_XEN
6426 case KVM_XEN_HVM_CONFIG: {
6427 struct kvm_xen_hvm_config xhc;
6429 if (copy_from_user(&xhc, argp, sizeof(xhc)))
6431 r = kvm_xen_hvm_config(kvm, &xhc);
6434 case KVM_XEN_HVM_GET_ATTR: {
6435 struct kvm_xen_hvm_attr xha;
6438 if (copy_from_user(&xha, argp, sizeof(xha)))
6440 r = kvm_xen_hvm_get_attr(kvm, &xha);
6441 if (!r && copy_to_user(argp, &xha, sizeof(xha)))
6445 case KVM_XEN_HVM_SET_ATTR: {
6446 struct kvm_xen_hvm_attr xha;
6449 if (copy_from_user(&xha, argp, sizeof(xha)))
6451 r = kvm_xen_hvm_set_attr(kvm, &xha);
6456 r = kvm_vm_ioctl_set_clock(kvm, argp);
6459 r = kvm_vm_ioctl_get_clock(kvm, argp);
6461 case KVM_MEMORY_ENCRYPT_OP: {
6463 if (kvm_x86_ops.mem_enc_op)
6464 r = static_call(kvm_x86_mem_enc_op)(kvm, argp);
6467 case KVM_MEMORY_ENCRYPT_REG_REGION: {
6468 struct kvm_enc_region region;
6471 if (copy_from_user(®ion, argp, sizeof(region)))
6475 if (kvm_x86_ops.mem_enc_reg_region)
6476 r = static_call(kvm_x86_mem_enc_reg_region)(kvm, ®ion);
6479 case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
6480 struct kvm_enc_region region;
6483 if (copy_from_user(®ion, argp, sizeof(region)))
6487 if (kvm_x86_ops.mem_enc_unreg_region)
6488 r = static_call(kvm_x86_mem_enc_unreg_region)(kvm, ®ion);
6491 case KVM_HYPERV_EVENTFD: {
6492 struct kvm_hyperv_eventfd hvevfd;
6495 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
6497 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
6500 case KVM_SET_PMU_EVENT_FILTER:
6501 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
6503 case KVM_X86_SET_MSR_FILTER:
6504 r = kvm_vm_ioctl_set_msr_filter(kvm, argp);
6513 static void kvm_init_msr_list(void)
6515 struct x86_pmu_capability x86_pmu;
6519 BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
6520 "Please update the fixed PMCs in msrs_to_saved_all[]");
6522 perf_get_x86_pmu_capability(&x86_pmu);
6524 num_msrs_to_save = 0;
6525 num_emulated_msrs = 0;
6526 num_msr_based_features = 0;
6528 for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
6529 if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
6533 * Even MSRs that are valid in the host may not be exposed
6534 * to the guests in some cases.
6536 switch (msrs_to_save_all[i]) {
6537 case MSR_IA32_BNDCFGS:
6538 if (!kvm_mpx_supported())
6542 if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP) &&
6543 !kvm_cpu_cap_has(X86_FEATURE_RDPID))
6546 case MSR_IA32_UMWAIT_CONTROL:
6547 if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG))
6550 case MSR_IA32_RTIT_CTL:
6551 case MSR_IA32_RTIT_STATUS:
6552 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT))
6555 case MSR_IA32_RTIT_CR3_MATCH:
6556 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6557 !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
6560 case MSR_IA32_RTIT_OUTPUT_BASE:
6561 case MSR_IA32_RTIT_OUTPUT_MASK:
6562 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6563 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
6564 !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
6567 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
6568 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6569 msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
6570 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
6573 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
6574 if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
6575 min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6578 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
6579 if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
6580 min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6584 case MSR_IA32_XFD_ERR:
6585 if (!kvm_cpu_cap_has(X86_FEATURE_XFD))
6592 msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
6595 for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
6596 if (!static_call(kvm_x86_has_emulated_msr)(NULL, emulated_msrs_all[i]))
6599 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
6602 for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
6603 struct kvm_msr_entry msr;
6605 msr.index = msr_based_features_all[i];
6606 if (kvm_get_msr_feature(&msr))
6609 msr_based_features[num_msr_based_features++] = msr_based_features_all[i];
6613 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
6621 if (!(lapic_in_kernel(vcpu) &&
6622 !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
6623 && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
6634 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
6641 if (!(lapic_in_kernel(vcpu) &&
6642 !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
6644 && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
6646 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
6656 static void kvm_set_segment(struct kvm_vcpu *vcpu,
6657 struct kvm_segment *var, int seg)
6659 static_call(kvm_x86_set_segment)(vcpu, var, seg);
6662 void kvm_get_segment(struct kvm_vcpu *vcpu,
6663 struct kvm_segment *var, int seg)
6665 static_call(kvm_x86_get_segment)(vcpu, var, seg);
6668 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
6669 struct x86_exception *exception)
6671 struct kvm_mmu *mmu = vcpu->arch.mmu;
6674 BUG_ON(!mmu_is_nested(vcpu));
6676 /* NPT walks are always user-walks */
6677 access |= PFERR_USER_MASK;
6678 t_gpa = mmu->gva_to_gpa(vcpu, mmu, gpa, access, exception);
6683 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
6684 struct x86_exception *exception)
6686 struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6688 u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6689 return mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
6691 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_read);
6693 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
6694 struct x86_exception *exception)
6696 struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6698 u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6699 access |= PFERR_FETCH_MASK;
6700 return mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
6703 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
6704 struct x86_exception *exception)
6706 struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6708 u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6709 access |= PFERR_WRITE_MASK;
6710 return mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
6712 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_write);
6714 /* uses this to access any guest's mapped memory without checking CPL */
6715 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
6716 struct x86_exception *exception)
6718 struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6720 return mmu->gva_to_gpa(vcpu, mmu, gva, 0, exception);
6723 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6724 struct kvm_vcpu *vcpu, u32 access,
6725 struct x86_exception *exception)
6727 struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6729 int r = X86EMUL_CONTINUE;
6732 gpa_t gpa = mmu->gva_to_gpa(vcpu, mmu, addr, access, exception);
6733 unsigned offset = addr & (PAGE_SIZE-1);
6734 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
6737 if (gpa == UNMAPPED_GVA)
6738 return X86EMUL_PROPAGATE_FAULT;
6739 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
6742 r = X86EMUL_IO_NEEDED;
6754 /* used for instruction fetching */
6755 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
6756 gva_t addr, void *val, unsigned int bytes,
6757 struct x86_exception *exception)
6759 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6760 struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6761 u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6765 /* Inline kvm_read_guest_virt_helper for speed. */
6766 gpa_t gpa = mmu->gva_to_gpa(vcpu, mmu, addr, access|PFERR_FETCH_MASK,
6768 if (unlikely(gpa == UNMAPPED_GVA))
6769 return X86EMUL_PROPAGATE_FAULT;
6771 offset = addr & (PAGE_SIZE-1);
6772 if (WARN_ON(offset + bytes > PAGE_SIZE))
6773 bytes = (unsigned)PAGE_SIZE - offset;
6774 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
6776 if (unlikely(ret < 0))
6777 return X86EMUL_IO_NEEDED;
6779 return X86EMUL_CONTINUE;
6782 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
6783 gva_t addr, void *val, unsigned int bytes,
6784 struct x86_exception *exception)
6786 u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6789 * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
6790 * is returned, but our callers are not ready for that and they blindly
6791 * call kvm_inject_page_fault. Ensure that they at least do not leak
6792 * uninitialized kernel stack memory into cr2 and error code.
6794 memset(exception, 0, sizeof(*exception));
6795 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
6798 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
6800 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
6801 gva_t addr, void *val, unsigned int bytes,
6802 struct x86_exception *exception, bool system)
6804 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6807 if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6808 access |= PFERR_USER_MASK;
6810 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
6813 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
6814 unsigned long addr, void *val, unsigned int bytes)
6816 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6817 int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
6819 return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
6822 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6823 struct kvm_vcpu *vcpu, u32 access,
6824 struct x86_exception *exception)
6826 struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6828 int r = X86EMUL_CONTINUE;
6831 gpa_t gpa = mmu->gva_to_gpa(vcpu, mmu, addr, access, exception);
6832 unsigned offset = addr & (PAGE_SIZE-1);
6833 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
6836 if (gpa == UNMAPPED_GVA)
6837 return X86EMUL_PROPAGATE_FAULT;
6838 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
6840 r = X86EMUL_IO_NEEDED;
6852 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
6853 unsigned int bytes, struct x86_exception *exception,
6856 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6857 u32 access = PFERR_WRITE_MASK;
6859 if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6860 access |= PFERR_USER_MASK;
6862 return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6866 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
6867 unsigned int bytes, struct x86_exception *exception)
6869 /* kvm_write_guest_virt_system can pull in tons of pages. */
6870 vcpu->arch.l1tf_flush_l1d = true;
6872 return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6873 PFERR_WRITE_MASK, exception);
6875 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
6877 static int kvm_can_emulate_insn(struct kvm_vcpu *vcpu, int emul_type,
6878 void *insn, int insn_len)
6880 return static_call(kvm_x86_can_emulate_instruction)(vcpu, emul_type,
6884 int handle_ud(struct kvm_vcpu *vcpu)
6886 static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
6887 int emul_type = EMULTYPE_TRAP_UD;
6888 char sig[5]; /* ud2; .ascii "kvm" */
6889 struct x86_exception e;
6891 if (unlikely(!kvm_can_emulate_insn(vcpu, emul_type, NULL, 0)))
6894 if (force_emulation_prefix &&
6895 kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
6896 sig, sizeof(sig), &e) == 0 &&
6897 memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
6898 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
6899 emul_type = EMULTYPE_TRAP_UD_FORCED;
6902 return kvm_emulate_instruction(vcpu, emul_type);
6904 EXPORT_SYMBOL_GPL(handle_ud);
6906 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6907 gpa_t gpa, bool write)
6909 /* For APIC access vmexit */
6910 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6913 if (vcpu_match_mmio_gpa(vcpu, gpa)) {
6914 trace_vcpu_match_mmio(gva, gpa, write, true);
6921 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6922 gpa_t *gpa, struct x86_exception *exception,
6925 struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6926 u32 access = ((static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0)
6927 | (write ? PFERR_WRITE_MASK : 0);
6930 * currently PKRU is only applied to ept enabled guest so
6931 * there is no pkey in EPT page table for L1 guest or EPT
6932 * shadow page table for L2 guest.
6934 if (vcpu_match_mmio_gva(vcpu, gva) && (!is_paging(vcpu) ||
6935 !permission_fault(vcpu, vcpu->arch.walk_mmu,
6936 vcpu->arch.mmio_access, 0, access))) {
6937 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
6938 (gva & (PAGE_SIZE - 1));
6939 trace_vcpu_match_mmio(gva, *gpa, write, false);
6943 *gpa = mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
6945 if (*gpa == UNMAPPED_GVA)
6948 return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
6951 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
6952 const void *val, int bytes)
6956 ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
6959 kvm_page_track_write(vcpu, gpa, val, bytes);
6963 struct read_write_emulator_ops {
6964 int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
6966 int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
6967 void *val, int bytes);
6968 int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6969 int bytes, void *val);
6970 int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6971 void *val, int bytes);
6975 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
6977 if (vcpu->mmio_read_completed) {
6978 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
6979 vcpu->mmio_fragments[0].gpa, val);
6980 vcpu->mmio_read_completed = 0;
6987 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6988 void *val, int bytes)
6990 return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
6993 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6994 void *val, int bytes)
6996 return emulator_write_phys(vcpu, gpa, val, bytes);
6999 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
7001 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
7002 return vcpu_mmio_write(vcpu, gpa, bytes, val);
7005 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
7006 void *val, int bytes)
7008 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
7009 return X86EMUL_IO_NEEDED;
7012 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
7013 void *val, int bytes)
7015 struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
7017 memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
7018 return X86EMUL_CONTINUE;
7021 static const struct read_write_emulator_ops read_emultor = {
7022 .read_write_prepare = read_prepare,
7023 .read_write_emulate = read_emulate,
7024 .read_write_mmio = vcpu_mmio_read,
7025 .read_write_exit_mmio = read_exit_mmio,
7028 static const struct read_write_emulator_ops write_emultor = {
7029 .read_write_emulate = write_emulate,
7030 .read_write_mmio = write_mmio,
7031 .read_write_exit_mmio = write_exit_mmio,
7035 static int emulator_read_write_onepage(unsigned long addr, void *val,
7037 struct x86_exception *exception,
7038 struct kvm_vcpu *vcpu,
7039 const struct read_write_emulator_ops *ops)
7043 bool write = ops->write;
7044 struct kvm_mmio_fragment *frag;
7045 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7048 * If the exit was due to a NPF we may already have a GPA.
7049 * If the GPA is present, use it to avoid the GVA to GPA table walk.
7050 * Note, this cannot be used on string operations since string
7051 * operation using rep will only have the initial GPA from the NPF
7054 if (ctxt->gpa_available && emulator_can_use_gpa(ctxt) &&
7055 (addr & ~PAGE_MASK) == (ctxt->gpa_val & ~PAGE_MASK)) {
7056 gpa = ctxt->gpa_val;
7057 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
7059 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
7061 return X86EMUL_PROPAGATE_FAULT;
7064 if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
7065 return X86EMUL_CONTINUE;
7068 * Is this MMIO handled locally?
7070 handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
7071 if (handled == bytes)
7072 return X86EMUL_CONTINUE;
7078 WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
7079 frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
7083 return X86EMUL_CONTINUE;
7086 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
7088 void *val, unsigned int bytes,
7089 struct x86_exception *exception,
7090 const struct read_write_emulator_ops *ops)
7092 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7096 if (ops->read_write_prepare &&
7097 ops->read_write_prepare(vcpu, val, bytes))
7098 return X86EMUL_CONTINUE;
7100 vcpu->mmio_nr_fragments = 0;
7102 /* Crossing a page boundary? */
7103 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
7106 now = -addr & ~PAGE_MASK;
7107 rc = emulator_read_write_onepage(addr, val, now, exception,
7110 if (rc != X86EMUL_CONTINUE)
7113 if (ctxt->mode != X86EMUL_MODE_PROT64)
7119 rc = emulator_read_write_onepage(addr, val, bytes, exception,
7121 if (rc != X86EMUL_CONTINUE)
7124 if (!vcpu->mmio_nr_fragments)
7127 gpa = vcpu->mmio_fragments[0].gpa;
7129 vcpu->mmio_needed = 1;
7130 vcpu->mmio_cur_fragment = 0;
7132 vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
7133 vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
7134 vcpu->run->exit_reason = KVM_EXIT_MMIO;
7135 vcpu->run->mmio.phys_addr = gpa;
7137 return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
7140 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
7144 struct x86_exception *exception)
7146 return emulator_read_write(ctxt, addr, val, bytes,
7147 exception, &read_emultor);
7150 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
7154 struct x86_exception *exception)
7156 return emulator_read_write(ctxt, addr, (void *)val, bytes,
7157 exception, &write_emultor);
7160 #define CMPXCHG_TYPE(t, ptr, old, new) \
7161 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
7163 #ifdef CONFIG_X86_64
7164 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
7166 # define CMPXCHG64(ptr, old, new) \
7167 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
7170 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
7175 struct x86_exception *exception)
7177 struct kvm_host_map map;
7178 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7184 /* guests cmpxchg8b have to be emulated atomically */
7185 if (bytes > 8 || (bytes & (bytes - 1)))
7188 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
7190 if (gpa == UNMAPPED_GVA ||
7191 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
7195 * Emulate the atomic as a straight write to avoid #AC if SLD is
7196 * enabled in the host and the access splits a cache line.
7198 if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))
7199 page_line_mask = ~(cache_line_size() - 1);
7201 page_line_mask = PAGE_MASK;
7203 if (((gpa + bytes - 1) & page_line_mask) != (gpa & page_line_mask))
7206 if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
7209 kaddr = map.hva + offset_in_page(gpa);
7213 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
7216 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
7219 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
7222 exchanged = CMPXCHG64(kaddr, old, new);
7228 kvm_vcpu_unmap(vcpu, &map, true);
7231 return X86EMUL_CMPXCHG_FAILED;
7233 kvm_page_track_write(vcpu, gpa, new, bytes);
7235 return X86EMUL_CONTINUE;
7238 printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
7240 return emulator_write_emulated(ctxt, addr, new, bytes, exception);
7243 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
7247 for (i = 0; i < vcpu->arch.pio.count; i++) {
7248 if (vcpu->arch.pio.in)
7249 r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
7250 vcpu->arch.pio.size, pd);
7252 r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
7253 vcpu->arch.pio.port, vcpu->arch.pio.size,
7257 pd += vcpu->arch.pio.size;
7262 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
7263 unsigned short port,
7264 unsigned int count, bool in)
7266 vcpu->arch.pio.port = port;
7267 vcpu->arch.pio.in = in;
7268 vcpu->arch.pio.count = count;
7269 vcpu->arch.pio.size = size;
7271 if (!kernel_pio(vcpu, vcpu->arch.pio_data))
7274 vcpu->run->exit_reason = KVM_EXIT_IO;
7275 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
7276 vcpu->run->io.size = size;
7277 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
7278 vcpu->run->io.count = count;
7279 vcpu->run->io.port = port;
7284 static int __emulator_pio_in(struct kvm_vcpu *vcpu, int size,
7285 unsigned short port, unsigned int count)
7287 WARN_ON(vcpu->arch.pio.count);
7288 memset(vcpu->arch.pio_data, 0, size * count);
7289 return emulator_pio_in_out(vcpu, size, port, count, true);
7292 static void complete_emulator_pio_in(struct kvm_vcpu *vcpu, void *val)
7294 int size = vcpu->arch.pio.size;
7295 unsigned count = vcpu->arch.pio.count;
7296 memcpy(val, vcpu->arch.pio_data, size * count);
7297 trace_kvm_pio(KVM_PIO_IN, vcpu->arch.pio.port, size, count, vcpu->arch.pio_data);
7298 vcpu->arch.pio.count = 0;
7301 static int emulator_pio_in(struct kvm_vcpu *vcpu, int size,
7302 unsigned short port, void *val, unsigned int count)
7304 if (vcpu->arch.pio.count) {
7306 * Complete a previous iteration that required userspace I/O.
7307 * Note, @count isn't guaranteed to match pio.count as userspace
7308 * can modify ECX before rerunning the vCPU. Ignore any such
7309 * shenanigans as KVM doesn't support modifying the rep count,
7310 * and the emulator ensures @count doesn't overflow the buffer.
7313 int r = __emulator_pio_in(vcpu, size, port, count);
7317 /* Results already available, fall through. */
7320 complete_emulator_pio_in(vcpu, val);
7324 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
7325 int size, unsigned short port, void *val,
7328 return emulator_pio_in(emul_to_vcpu(ctxt), size, port, val, count);
7332 static int emulator_pio_out(struct kvm_vcpu *vcpu, int size,
7333 unsigned short port, const void *val,
7338 memcpy(vcpu->arch.pio_data, val, size * count);
7339 trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
7340 ret = emulator_pio_in_out(vcpu, size, port, count, false);
7342 vcpu->arch.pio.count = 0;
7347 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
7348 int size, unsigned short port,
7349 const void *val, unsigned int count)
7351 return emulator_pio_out(emul_to_vcpu(ctxt), size, port, val, count);
7354 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
7356 return static_call(kvm_x86_get_segment_base)(vcpu, seg);
7359 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
7361 kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
7364 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
7366 if (!need_emulate_wbinvd(vcpu))
7367 return X86EMUL_CONTINUE;
7369 if (static_call(kvm_x86_has_wbinvd_exit)()) {
7370 int cpu = get_cpu();
7372 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
7373 on_each_cpu_mask(vcpu->arch.wbinvd_dirty_mask,
7374 wbinvd_ipi, NULL, 1);
7376 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
7379 return X86EMUL_CONTINUE;
7382 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
7384 kvm_emulate_wbinvd_noskip(vcpu);
7385 return kvm_skip_emulated_instruction(vcpu);
7387 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
7391 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
7393 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
7396 static void emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
7397 unsigned long *dest)
7399 kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
7402 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
7403 unsigned long value)
7406 return kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
7409 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
7411 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
7414 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
7416 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7417 unsigned long value;
7421 value = kvm_read_cr0(vcpu);
7424 value = vcpu->arch.cr2;
7427 value = kvm_read_cr3(vcpu);
7430 value = kvm_read_cr4(vcpu);
7433 value = kvm_get_cr8(vcpu);
7436 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7443 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
7445 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7450 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
7453 vcpu->arch.cr2 = val;
7456 res = kvm_set_cr3(vcpu, val);
7459 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
7462 res = kvm_set_cr8(vcpu, val);
7465 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7472 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
7474 return static_call(kvm_x86_get_cpl)(emul_to_vcpu(ctxt));
7477 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7479 static_call(kvm_x86_get_gdt)(emul_to_vcpu(ctxt), dt);
7482 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7484 static_call(kvm_x86_get_idt)(emul_to_vcpu(ctxt), dt);
7487 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7489 static_call(kvm_x86_set_gdt)(emul_to_vcpu(ctxt), dt);
7492 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7494 static_call(kvm_x86_set_idt)(emul_to_vcpu(ctxt), dt);
7497 static unsigned long emulator_get_cached_segment_base(
7498 struct x86_emulate_ctxt *ctxt, int seg)
7500 return get_segment_base(emul_to_vcpu(ctxt), seg);
7503 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
7504 struct desc_struct *desc, u32 *base3,
7507 struct kvm_segment var;
7509 kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
7510 *selector = var.selector;
7513 memset(desc, 0, sizeof(*desc));
7521 set_desc_limit(desc, var.limit);
7522 set_desc_base(desc, (unsigned long)var.base);
7523 #ifdef CONFIG_X86_64
7525 *base3 = var.base >> 32;
7527 desc->type = var.type;
7529 desc->dpl = var.dpl;
7530 desc->p = var.present;
7531 desc->avl = var.avl;
7539 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
7540 struct desc_struct *desc, u32 base3,
7543 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7544 struct kvm_segment var;
7546 var.selector = selector;
7547 var.base = get_desc_base(desc);
7548 #ifdef CONFIG_X86_64
7549 var.base |= ((u64)base3) << 32;
7551 var.limit = get_desc_limit(desc);
7553 var.limit = (var.limit << 12) | 0xfff;
7554 var.type = desc->type;
7555 var.dpl = desc->dpl;
7560 var.avl = desc->avl;
7561 var.present = desc->p;
7562 var.unusable = !var.present;
7565 kvm_set_segment(vcpu, &var, seg);
7569 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
7570 u32 msr_index, u64 *pdata)
7572 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7575 r = kvm_get_msr(vcpu, msr_index, pdata);
7577 if (r && kvm_msr_user_space(vcpu, msr_index, KVM_EXIT_X86_RDMSR, 0,
7578 complete_emulated_rdmsr, r)) {
7579 /* Bounce to user space */
7580 return X86EMUL_IO_NEEDED;
7586 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
7587 u32 msr_index, u64 data)
7589 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7592 r = kvm_set_msr(vcpu, msr_index, data);
7594 if (r && kvm_msr_user_space(vcpu, msr_index, KVM_EXIT_X86_WRMSR, data,
7595 complete_emulated_msr_access, r)) {
7596 /* Bounce to user space */
7597 return X86EMUL_IO_NEEDED;
7603 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
7605 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7607 return vcpu->arch.smbase;
7610 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
7612 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7614 vcpu->arch.smbase = smbase;
7617 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
7620 if (kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc))
7625 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
7626 u32 pmc, u64 *pdata)
7628 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
7631 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
7633 emul_to_vcpu(ctxt)->arch.halt_request = 1;
7636 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
7637 struct x86_instruction_info *info,
7638 enum x86_intercept_stage stage)
7640 return static_call(kvm_x86_check_intercept)(emul_to_vcpu(ctxt), info, stage,
7644 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
7645 u32 *eax, u32 *ebx, u32 *ecx, u32 *edx,
7648 return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, exact_only);
7651 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
7653 return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
7656 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
7658 return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
7661 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
7663 return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
7666 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
7668 return kvm_register_read_raw(emul_to_vcpu(ctxt), reg);
7671 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
7673 kvm_register_write_raw(emul_to_vcpu(ctxt), reg, val);
7676 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
7678 static_call(kvm_x86_set_nmi_mask)(emul_to_vcpu(ctxt), masked);
7681 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
7683 return emul_to_vcpu(ctxt)->arch.hflags;
7686 static void emulator_exiting_smm(struct x86_emulate_ctxt *ctxt)
7688 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7690 kvm_smm_changed(vcpu, false);
7693 static int emulator_leave_smm(struct x86_emulate_ctxt *ctxt,
7694 const char *smstate)
7696 return static_call(kvm_x86_leave_smm)(emul_to_vcpu(ctxt), smstate);
7699 static void emulator_triple_fault(struct x86_emulate_ctxt *ctxt)
7701 kvm_make_request(KVM_REQ_TRIPLE_FAULT, emul_to_vcpu(ctxt));
7704 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
7706 return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
7709 static const struct x86_emulate_ops emulate_ops = {
7710 .read_gpr = emulator_read_gpr,
7711 .write_gpr = emulator_write_gpr,
7712 .read_std = emulator_read_std,
7713 .write_std = emulator_write_std,
7714 .read_phys = kvm_read_guest_phys_system,
7715 .fetch = kvm_fetch_guest_virt,
7716 .read_emulated = emulator_read_emulated,
7717 .write_emulated = emulator_write_emulated,
7718 .cmpxchg_emulated = emulator_cmpxchg_emulated,
7719 .invlpg = emulator_invlpg,
7720 .pio_in_emulated = emulator_pio_in_emulated,
7721 .pio_out_emulated = emulator_pio_out_emulated,
7722 .get_segment = emulator_get_segment,
7723 .set_segment = emulator_set_segment,
7724 .get_cached_segment_base = emulator_get_cached_segment_base,
7725 .get_gdt = emulator_get_gdt,
7726 .get_idt = emulator_get_idt,
7727 .set_gdt = emulator_set_gdt,
7728 .set_idt = emulator_set_idt,
7729 .get_cr = emulator_get_cr,
7730 .set_cr = emulator_set_cr,
7731 .cpl = emulator_get_cpl,
7732 .get_dr = emulator_get_dr,
7733 .set_dr = emulator_set_dr,
7734 .get_smbase = emulator_get_smbase,
7735 .set_smbase = emulator_set_smbase,
7736 .set_msr = emulator_set_msr,
7737 .get_msr = emulator_get_msr,
7738 .check_pmc = emulator_check_pmc,
7739 .read_pmc = emulator_read_pmc,
7740 .halt = emulator_halt,
7741 .wbinvd = emulator_wbinvd,
7742 .fix_hypercall = emulator_fix_hypercall,
7743 .intercept = emulator_intercept,
7744 .get_cpuid = emulator_get_cpuid,
7745 .guest_has_long_mode = emulator_guest_has_long_mode,
7746 .guest_has_movbe = emulator_guest_has_movbe,
7747 .guest_has_fxsr = emulator_guest_has_fxsr,
7748 .set_nmi_mask = emulator_set_nmi_mask,
7749 .get_hflags = emulator_get_hflags,
7750 .exiting_smm = emulator_exiting_smm,
7751 .leave_smm = emulator_leave_smm,
7752 .triple_fault = emulator_triple_fault,
7753 .set_xcr = emulator_set_xcr,
7756 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
7758 u32 int_shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
7760 * an sti; sti; sequence only disable interrupts for the first
7761 * instruction. So, if the last instruction, be it emulated or
7762 * not, left the system with the INT_STI flag enabled, it
7763 * means that the last instruction is an sti. We should not
7764 * leave the flag on in this case. The same goes for mov ss
7766 if (int_shadow & mask)
7768 if (unlikely(int_shadow || mask)) {
7769 static_call(kvm_x86_set_interrupt_shadow)(vcpu, mask);
7771 kvm_make_request(KVM_REQ_EVENT, vcpu);
7775 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
7777 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7778 if (ctxt->exception.vector == PF_VECTOR)
7779 return kvm_inject_emulated_page_fault(vcpu, &ctxt->exception);
7781 if (ctxt->exception.error_code_valid)
7782 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
7783 ctxt->exception.error_code);
7785 kvm_queue_exception(vcpu, ctxt->exception.vector);
7789 static struct x86_emulate_ctxt *alloc_emulate_ctxt(struct kvm_vcpu *vcpu)
7791 struct x86_emulate_ctxt *ctxt;
7793 ctxt = kmem_cache_zalloc(x86_emulator_cache, GFP_KERNEL_ACCOUNT);
7795 pr_err("kvm: failed to allocate vcpu's emulator\n");
7800 ctxt->ops = &emulate_ops;
7801 vcpu->arch.emulate_ctxt = ctxt;
7806 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
7808 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7811 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
7813 ctxt->gpa_available = false;
7814 ctxt->eflags = kvm_get_rflags(vcpu);
7815 ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
7817 ctxt->eip = kvm_rip_read(vcpu);
7818 ctxt->mode = (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
7819 (ctxt->eflags & X86_EFLAGS_VM) ? X86EMUL_MODE_VM86 :
7820 (cs_l && is_long_mode(vcpu)) ? X86EMUL_MODE_PROT64 :
7821 cs_db ? X86EMUL_MODE_PROT32 :
7822 X86EMUL_MODE_PROT16;
7823 BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
7824 BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
7825 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
7827 ctxt->interruptibility = 0;
7828 ctxt->have_exception = false;
7829 ctxt->exception.vector = -1;
7830 ctxt->perm_ok = false;
7832 init_decode_cache(ctxt);
7833 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7836 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
7838 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7841 init_emulate_ctxt(vcpu);
7845 ctxt->_eip = ctxt->eip + inc_eip;
7846 ret = emulate_int_real(ctxt, irq);
7848 if (ret != X86EMUL_CONTINUE) {
7849 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
7851 ctxt->eip = ctxt->_eip;
7852 kvm_rip_write(vcpu, ctxt->eip);
7853 kvm_set_rflags(vcpu, ctxt->eflags);
7856 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
7858 static void prepare_emulation_failure_exit(struct kvm_vcpu *vcpu, u64 *data,
7859 u8 ndata, u8 *insn_bytes, u8 insn_size)
7861 struct kvm_run *run = vcpu->run;
7866 * Zero the whole array used to retrieve the exit info, as casting to
7867 * u32 for select entries will leave some chunks uninitialized.
7869 memset(&info, 0, sizeof(info));
7871 static_call(kvm_x86_get_exit_info)(vcpu, (u32 *)&info[0], &info[1],
7872 &info[2], (u32 *)&info[3],
7875 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7876 run->emulation_failure.suberror = KVM_INTERNAL_ERROR_EMULATION;
7879 * There's currently space for 13 entries, but 5 are used for the exit
7880 * reason and info. Restrict to 4 to reduce the maintenance burden
7881 * when expanding kvm_run.emulation_failure in the future.
7883 if (WARN_ON_ONCE(ndata > 4))
7886 /* Always include the flags as a 'data' entry. */
7888 run->emulation_failure.flags = 0;
7891 BUILD_BUG_ON((sizeof(run->emulation_failure.insn_size) +
7892 sizeof(run->emulation_failure.insn_bytes) != 16));
7894 run->emulation_failure.flags |=
7895 KVM_INTERNAL_ERROR_EMULATION_FLAG_INSTRUCTION_BYTES;
7896 run->emulation_failure.insn_size = insn_size;
7897 memset(run->emulation_failure.insn_bytes, 0x90,
7898 sizeof(run->emulation_failure.insn_bytes));
7899 memcpy(run->emulation_failure.insn_bytes, insn_bytes, insn_size);
7902 memcpy(&run->internal.data[info_start], info, sizeof(info));
7903 memcpy(&run->internal.data[info_start + ARRAY_SIZE(info)], data,
7904 ndata * sizeof(data[0]));
7906 run->emulation_failure.ndata = info_start + ARRAY_SIZE(info) + ndata;
7909 static void prepare_emulation_ctxt_failure_exit(struct kvm_vcpu *vcpu)
7911 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7913 prepare_emulation_failure_exit(vcpu, NULL, 0, ctxt->fetch.data,
7914 ctxt->fetch.end - ctxt->fetch.data);
7917 void __kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu, u64 *data,
7920 prepare_emulation_failure_exit(vcpu, data, ndata, NULL, 0);
7922 EXPORT_SYMBOL_GPL(__kvm_prepare_emulation_failure_exit);
7924 void kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu)
7926 __kvm_prepare_emulation_failure_exit(vcpu, NULL, 0);
7928 EXPORT_SYMBOL_GPL(kvm_prepare_emulation_failure_exit);
7930 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
7932 struct kvm *kvm = vcpu->kvm;
7934 ++vcpu->stat.insn_emulation_fail;
7935 trace_kvm_emulate_insn_failed(vcpu);
7937 if (emulation_type & EMULTYPE_VMWARE_GP) {
7938 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7942 if (kvm->arch.exit_on_emulation_error ||
7943 (emulation_type & EMULTYPE_SKIP)) {
7944 prepare_emulation_ctxt_failure_exit(vcpu);
7948 kvm_queue_exception(vcpu, UD_VECTOR);
7950 if (!is_guest_mode(vcpu) && static_call(kvm_x86_get_cpl)(vcpu) == 0) {
7951 prepare_emulation_ctxt_failure_exit(vcpu);
7958 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7959 bool write_fault_to_shadow_pgtable,
7962 gpa_t gpa = cr2_or_gpa;
7965 if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7968 if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7969 WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7972 if (!vcpu->arch.mmu->direct_map) {
7974 * Write permission should be allowed since only
7975 * write access need to be emulated.
7977 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7980 * If the mapping is invalid in guest, let cpu retry
7981 * it to generate fault.
7983 if (gpa == UNMAPPED_GVA)
7988 * Do not retry the unhandleable instruction if it faults on the
7989 * readonly host memory, otherwise it will goto a infinite loop:
7990 * retry instruction -> write #PF -> emulation fail -> retry
7991 * instruction -> ...
7993 pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
7996 * If the instruction failed on the error pfn, it can not be fixed,
7997 * report the error to userspace.
7999 if (is_error_noslot_pfn(pfn))
8002 kvm_release_pfn_clean(pfn);
8004 /* The instructions are well-emulated on direct mmu. */
8005 if (vcpu->arch.mmu->direct_map) {
8006 unsigned int indirect_shadow_pages;
8008 write_lock(&vcpu->kvm->mmu_lock);
8009 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
8010 write_unlock(&vcpu->kvm->mmu_lock);
8012 if (indirect_shadow_pages)
8013 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
8019 * if emulation was due to access to shadowed page table
8020 * and it failed try to unshadow page and re-enter the
8021 * guest to let CPU execute the instruction.
8023 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
8026 * If the access faults on its page table, it can not
8027 * be fixed by unprotecting shadow page and it should
8028 * be reported to userspace.
8030 return !write_fault_to_shadow_pgtable;
8033 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
8034 gpa_t cr2_or_gpa, int emulation_type)
8036 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8037 unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
8039 last_retry_eip = vcpu->arch.last_retry_eip;
8040 last_retry_addr = vcpu->arch.last_retry_addr;
8043 * If the emulation is caused by #PF and it is non-page_table
8044 * writing instruction, it means the VM-EXIT is caused by shadow
8045 * page protected, we can zap the shadow page and retry this
8046 * instruction directly.
8048 * Note: if the guest uses a non-page-table modifying instruction
8049 * on the PDE that points to the instruction, then we will unmap
8050 * the instruction and go to an infinite loop. So, we cache the
8051 * last retried eip and the last fault address, if we meet the eip
8052 * and the address again, we can break out of the potential infinite
8055 vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
8057 if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
8060 if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
8061 WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
8064 if (x86_page_table_writing_insn(ctxt))
8067 if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
8070 vcpu->arch.last_retry_eip = ctxt->eip;
8071 vcpu->arch.last_retry_addr = cr2_or_gpa;
8073 if (!vcpu->arch.mmu->direct_map)
8074 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
8076 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
8081 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
8082 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
8084 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm)
8086 trace_kvm_smm_transition(vcpu->vcpu_id, vcpu->arch.smbase, entering_smm);
8089 vcpu->arch.hflags |= HF_SMM_MASK;
8091 vcpu->arch.hflags &= ~(HF_SMM_MASK | HF_SMM_INSIDE_NMI_MASK);
8093 /* Process a latched INIT or SMI, if any. */
8094 kvm_make_request(KVM_REQ_EVENT, vcpu);
8097 * Even if KVM_SET_SREGS2 loaded PDPTRs out of band,
8098 * on SMM exit we still need to reload them from
8101 vcpu->arch.pdptrs_from_userspace = false;
8104 kvm_mmu_reset_context(vcpu);
8107 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
8116 for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
8117 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
8122 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
8124 struct kvm_run *kvm_run = vcpu->run;
8126 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
8127 kvm_run->debug.arch.dr6 = DR6_BS | DR6_ACTIVE_LOW;
8128 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu);
8129 kvm_run->debug.arch.exception = DB_VECTOR;
8130 kvm_run->exit_reason = KVM_EXIT_DEBUG;
8133 kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
8137 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
8139 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
8142 r = static_call(kvm_x86_skip_emulated_instruction)(vcpu);
8146 kvm_pmu_trigger_event(vcpu, PERF_COUNT_HW_INSTRUCTIONS);
8149 * rflags is the old, "raw" value of the flags. The new value has
8150 * not been saved yet.
8152 * This is correct even for TF set by the guest, because "the
8153 * processor will not generate this exception after the instruction
8154 * that sets the TF flag".
8156 if (unlikely(rflags & X86_EFLAGS_TF))
8157 r = kvm_vcpu_do_singlestep(vcpu);
8160 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
8162 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
8164 if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
8165 (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
8166 struct kvm_run *kvm_run = vcpu->run;
8167 unsigned long eip = kvm_get_linear_rip(vcpu);
8168 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
8169 vcpu->arch.guest_debug_dr7,
8173 kvm_run->debug.arch.dr6 = dr6 | DR6_ACTIVE_LOW;
8174 kvm_run->debug.arch.pc = eip;
8175 kvm_run->debug.arch.exception = DB_VECTOR;
8176 kvm_run->exit_reason = KVM_EXIT_DEBUG;
8182 if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
8183 !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
8184 unsigned long eip = kvm_get_linear_rip(vcpu);
8185 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
8190 kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
8199 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
8201 switch (ctxt->opcode_len) {
8208 case 0xe6: /* OUT */
8212 case 0x6c: /* INS */
8214 case 0x6e: /* OUTS */
8221 case 0x33: /* RDPMC */
8231 * Decode to be emulated instruction. Return EMULATION_OK if success.
8233 int x86_decode_emulated_instruction(struct kvm_vcpu *vcpu, int emulation_type,
8234 void *insn, int insn_len)
8236 int r = EMULATION_OK;
8237 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8239 init_emulate_ctxt(vcpu);
8242 * We will reenter on the same instruction since we do not set
8243 * complete_userspace_io. This does not handle watchpoints yet,
8244 * those would be handled in the emulate_ops.
8246 if (!(emulation_type & EMULTYPE_SKIP) &&
8247 kvm_vcpu_check_breakpoint(vcpu, &r))
8250 r = x86_decode_insn(ctxt, insn, insn_len, emulation_type);
8252 trace_kvm_emulate_insn_start(vcpu);
8253 ++vcpu->stat.insn_emulation;
8257 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction);
8259 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
8260 int emulation_type, void *insn, int insn_len)
8263 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8264 bool writeback = true;
8265 bool write_fault_to_spt;
8267 if (unlikely(!kvm_can_emulate_insn(vcpu, emulation_type, insn, insn_len)))
8270 vcpu->arch.l1tf_flush_l1d = true;
8273 * Clear write_fault_to_shadow_pgtable here to ensure it is
8276 write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
8277 vcpu->arch.write_fault_to_shadow_pgtable = false;
8279 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
8280 kvm_clear_exception_queue(vcpu);
8282 r = x86_decode_emulated_instruction(vcpu, emulation_type,
8284 if (r != EMULATION_OK) {
8285 if ((emulation_type & EMULTYPE_TRAP_UD) ||
8286 (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
8287 kvm_queue_exception(vcpu, UD_VECTOR);
8290 if (reexecute_instruction(vcpu, cr2_or_gpa,
8294 if (ctxt->have_exception) {
8296 * #UD should result in just EMULATION_FAILED, and trap-like
8297 * exception should not be encountered during decode.
8299 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
8300 exception_type(ctxt->exception.vector) == EXCPT_TRAP);
8301 inject_emulated_exception(vcpu);
8304 return handle_emulation_failure(vcpu, emulation_type);
8308 if ((emulation_type & EMULTYPE_VMWARE_GP) &&
8309 !is_vmware_backdoor_opcode(ctxt)) {
8310 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
8315 * EMULTYPE_SKIP without EMULTYPE_COMPLETE_USER_EXIT is intended for
8316 * use *only* by vendor callbacks for kvm_skip_emulated_instruction().
8317 * The caller is responsible for updating interruptibility state and
8318 * injecting single-step #DBs.
8320 if (emulation_type & EMULTYPE_SKIP) {
8321 if (ctxt->mode != X86EMUL_MODE_PROT64)
8322 ctxt->eip = (u32)ctxt->_eip;
8324 ctxt->eip = ctxt->_eip;
8326 if (emulation_type & EMULTYPE_COMPLETE_USER_EXIT) {
8331 kvm_rip_write(vcpu, ctxt->eip);
8332 if (ctxt->eflags & X86_EFLAGS_RF)
8333 kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
8337 if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
8340 /* this is needed for vmware backdoor interface to work since it
8341 changes registers values during IO operation */
8342 if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
8343 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
8344 emulator_invalidate_register_cache(ctxt);
8348 if (emulation_type & EMULTYPE_PF) {
8349 /* Save the faulting GPA (cr2) in the address field */
8350 ctxt->exception.address = cr2_or_gpa;
8352 /* With shadow page tables, cr2 contains a GVA or nGPA. */
8353 if (vcpu->arch.mmu->direct_map) {
8354 ctxt->gpa_available = true;
8355 ctxt->gpa_val = cr2_or_gpa;
8358 /* Sanitize the address out of an abundance of paranoia. */
8359 ctxt->exception.address = 0;
8362 r = x86_emulate_insn(ctxt);
8364 if (r == EMULATION_INTERCEPTED)
8367 if (r == EMULATION_FAILED) {
8368 if (reexecute_instruction(vcpu, cr2_or_gpa, write_fault_to_spt,
8372 return handle_emulation_failure(vcpu, emulation_type);
8375 if (ctxt->have_exception) {
8377 if (inject_emulated_exception(vcpu))
8379 } else if (vcpu->arch.pio.count) {
8380 if (!vcpu->arch.pio.in) {
8381 /* FIXME: return into emulator if single-stepping. */
8382 vcpu->arch.pio.count = 0;
8385 vcpu->arch.complete_userspace_io = complete_emulated_pio;
8388 } else if (vcpu->mmio_needed) {
8389 ++vcpu->stat.mmio_exits;
8391 if (!vcpu->mmio_is_write)
8394 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
8395 } else if (vcpu->arch.complete_userspace_io) {
8398 } else if (r == EMULATION_RESTART)
8405 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
8406 toggle_interruptibility(vcpu, ctxt->interruptibility);
8407 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8408 if (!ctxt->have_exception ||
8409 exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
8410 kvm_pmu_trigger_event(vcpu, PERF_COUNT_HW_INSTRUCTIONS);
8411 if (ctxt->is_branch)
8412 kvm_pmu_trigger_event(vcpu, PERF_COUNT_HW_BRANCH_INSTRUCTIONS);
8413 kvm_rip_write(vcpu, ctxt->eip);
8414 if (r && (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
8415 r = kvm_vcpu_do_singlestep(vcpu);
8416 if (kvm_x86_ops.update_emulated_instruction)
8417 static_call(kvm_x86_update_emulated_instruction)(vcpu);
8418 __kvm_set_rflags(vcpu, ctxt->eflags);
8422 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
8423 * do nothing, and it will be requested again as soon as
8424 * the shadow expires. But we still need to check here,
8425 * because POPF has no interrupt shadow.
8427 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
8428 kvm_make_request(KVM_REQ_EVENT, vcpu);
8430 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
8435 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
8437 return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
8439 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
8441 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
8442 void *insn, int insn_len)
8444 return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
8446 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
8448 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
8450 vcpu->arch.pio.count = 0;
8454 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
8456 vcpu->arch.pio.count = 0;
8458 if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
8461 return kvm_skip_emulated_instruction(vcpu);
8464 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
8465 unsigned short port)
8467 unsigned long val = kvm_rax_read(vcpu);
8468 int ret = emulator_pio_out(vcpu, size, port, &val, 1);
8474 * Workaround userspace that relies on old KVM behavior of %rip being
8475 * incremented prior to exiting to userspace to handle "OUT 0x7e".
8478 kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
8479 vcpu->arch.complete_userspace_io =
8480 complete_fast_pio_out_port_0x7e;
8481 kvm_skip_emulated_instruction(vcpu);
8483 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
8484 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
8489 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
8493 /* We should only ever be called with arch.pio.count equal to 1 */
8494 BUG_ON(vcpu->arch.pio.count != 1);
8496 if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
8497 vcpu->arch.pio.count = 0;
8501 /* For size less than 4 we merge, else we zero extend */
8502 val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
8505 * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
8506 * the copy and tracing
8508 emulator_pio_in(vcpu, vcpu->arch.pio.size, vcpu->arch.pio.port, &val, 1);
8509 kvm_rax_write(vcpu, val);
8511 return kvm_skip_emulated_instruction(vcpu);
8514 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
8515 unsigned short port)
8520 /* For size less than 4 we merge, else we zero extend */
8521 val = (size < 4) ? kvm_rax_read(vcpu) : 0;
8523 ret = emulator_pio_in(vcpu, size, port, &val, 1);
8525 kvm_rax_write(vcpu, val);
8529 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
8530 vcpu->arch.complete_userspace_io = complete_fast_pio_in;
8535 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
8540 ret = kvm_fast_pio_in(vcpu, size, port);
8542 ret = kvm_fast_pio_out(vcpu, size, port);
8543 return ret && kvm_skip_emulated_instruction(vcpu);
8545 EXPORT_SYMBOL_GPL(kvm_fast_pio);
8547 static int kvmclock_cpu_down_prep(unsigned int cpu)
8549 __this_cpu_write(cpu_tsc_khz, 0);
8553 static void tsc_khz_changed(void *data)
8555 struct cpufreq_freqs *freq = data;
8556 unsigned long khz = 0;
8560 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8561 khz = cpufreq_quick_get(raw_smp_processor_id());
8564 __this_cpu_write(cpu_tsc_khz, khz);
8567 #ifdef CONFIG_X86_64
8568 static void kvm_hyperv_tsc_notifier(void)
8573 mutex_lock(&kvm_lock);
8574 list_for_each_entry(kvm, &vm_list, vm_list)
8575 kvm_make_mclock_inprogress_request(kvm);
8577 /* no guest entries from this point */
8578 hyperv_stop_tsc_emulation();
8580 /* TSC frequency always matches when on Hyper-V */
8581 for_each_present_cpu(cpu)
8582 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
8583 kvm_max_guest_tsc_khz = tsc_khz;
8585 list_for_each_entry(kvm, &vm_list, vm_list) {
8586 __kvm_start_pvclock_update(kvm);
8587 pvclock_update_vm_gtod_copy(kvm);
8588 kvm_end_pvclock_update(kvm);
8591 mutex_unlock(&kvm_lock);
8595 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
8598 struct kvm_vcpu *vcpu;
8603 * We allow guests to temporarily run on slowing clocks,
8604 * provided we notify them after, or to run on accelerating
8605 * clocks, provided we notify them before. Thus time never
8608 * However, we have a problem. We can't atomically update
8609 * the frequency of a given CPU from this function; it is
8610 * merely a notifier, which can be called from any CPU.
8611 * Changing the TSC frequency at arbitrary points in time
8612 * requires a recomputation of local variables related to
8613 * the TSC for each VCPU. We must flag these local variables
8614 * to be updated and be sure the update takes place with the
8615 * new frequency before any guests proceed.
8617 * Unfortunately, the combination of hotplug CPU and frequency
8618 * change creates an intractable locking scenario; the order
8619 * of when these callouts happen is undefined with respect to
8620 * CPU hotplug, and they can race with each other. As such,
8621 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
8622 * undefined; you can actually have a CPU frequency change take
8623 * place in between the computation of X and the setting of the
8624 * variable. To protect against this problem, all updates of
8625 * the per_cpu tsc_khz variable are done in an interrupt
8626 * protected IPI, and all callers wishing to update the value
8627 * must wait for a synchronous IPI to complete (which is trivial
8628 * if the caller is on the CPU already). This establishes the
8629 * necessary total order on variable updates.
8631 * Note that because a guest time update may take place
8632 * anytime after the setting of the VCPU's request bit, the
8633 * correct TSC value must be set before the request. However,
8634 * to ensure the update actually makes it to any guest which
8635 * starts running in hardware virtualization between the set
8636 * and the acquisition of the spinlock, we must also ping the
8637 * CPU after setting the request bit.
8641 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8643 mutex_lock(&kvm_lock);
8644 list_for_each_entry(kvm, &vm_list, vm_list) {
8645 kvm_for_each_vcpu(i, vcpu, kvm) {
8646 if (vcpu->cpu != cpu)
8648 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8649 if (vcpu->cpu != raw_smp_processor_id())
8653 mutex_unlock(&kvm_lock);
8655 if (freq->old < freq->new && send_ipi) {
8657 * We upscale the frequency. Must make the guest
8658 * doesn't see old kvmclock values while running with
8659 * the new frequency, otherwise we risk the guest sees
8660 * time go backwards.
8662 * In case we update the frequency for another cpu
8663 * (which might be in guest context) send an interrupt
8664 * to kick the cpu out of guest context. Next time
8665 * guest context is entered kvmclock will be updated,
8666 * so the guest will not see stale values.
8668 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8672 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
8675 struct cpufreq_freqs *freq = data;
8678 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
8680 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
8683 for_each_cpu(cpu, freq->policy->cpus)
8684 __kvmclock_cpufreq_notifier(freq, cpu);
8689 static struct notifier_block kvmclock_cpufreq_notifier_block = {
8690 .notifier_call = kvmclock_cpufreq_notifier
8693 static int kvmclock_cpu_online(unsigned int cpu)
8695 tsc_khz_changed(NULL);
8699 static void kvm_timer_init(void)
8701 max_tsc_khz = tsc_khz;
8703 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
8704 #ifdef CONFIG_CPU_FREQ
8705 struct cpufreq_policy *policy;
8709 policy = cpufreq_cpu_get(cpu);
8711 if (policy->cpuinfo.max_freq)
8712 max_tsc_khz = policy->cpuinfo.max_freq;
8713 cpufreq_cpu_put(policy);
8717 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
8718 CPUFREQ_TRANSITION_NOTIFIER);
8721 cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
8722 kvmclock_cpu_online, kvmclock_cpu_down_prep);
8725 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
8726 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
8728 int kvm_is_in_guest(void)
8730 return __this_cpu_read(current_vcpu) != NULL;
8733 static int kvm_is_user_mode(void)
8737 if (__this_cpu_read(current_vcpu))
8738 user_mode = static_call(kvm_x86_get_cpl)(__this_cpu_read(current_vcpu));
8740 return user_mode != 0;
8743 static unsigned long kvm_get_guest_ip(void)
8745 unsigned long ip = 0;
8747 if (__this_cpu_read(current_vcpu))
8748 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
8753 static void kvm_handle_intel_pt_intr(void)
8755 struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
8757 kvm_make_request(KVM_REQ_PMI, vcpu);
8758 __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
8759 (unsigned long *)&vcpu->arch.pmu.global_status);
8762 static struct perf_guest_info_callbacks kvm_guest_cbs = {
8763 .is_in_guest = kvm_is_in_guest,
8764 .is_user_mode = kvm_is_user_mode,
8765 .get_guest_ip = kvm_get_guest_ip,
8766 .handle_intel_pt_intr = kvm_handle_intel_pt_intr,
8769 #ifdef CONFIG_X86_64
8770 static void pvclock_gtod_update_fn(struct work_struct *work)
8773 struct kvm_vcpu *vcpu;
8776 mutex_lock(&kvm_lock);
8777 list_for_each_entry(kvm, &vm_list, vm_list)
8778 kvm_for_each_vcpu(i, vcpu, kvm)
8779 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
8780 atomic_set(&kvm_guest_has_master_clock, 0);
8781 mutex_unlock(&kvm_lock);
8784 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
8787 * Indirection to move queue_work() out of the tk_core.seq write held
8788 * region to prevent possible deadlocks against time accessors which
8789 * are invoked with work related locks held.
8791 static void pvclock_irq_work_fn(struct irq_work *w)
8793 queue_work(system_long_wq, &pvclock_gtod_work);
8796 static DEFINE_IRQ_WORK(pvclock_irq_work, pvclock_irq_work_fn);
8799 * Notification about pvclock gtod data update.
8801 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
8804 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
8805 struct timekeeper *tk = priv;
8807 update_pvclock_gtod(tk);
8810 * Disable master clock if host does not trust, or does not use,
8811 * TSC based clocksource. Delegate queue_work() to irq_work as
8812 * this is invoked with tk_core.seq write held.
8814 if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
8815 atomic_read(&kvm_guest_has_master_clock) != 0)
8816 irq_work_queue(&pvclock_irq_work);
8820 static struct notifier_block pvclock_gtod_notifier = {
8821 .notifier_call = pvclock_gtod_notify,
8825 int kvm_arch_init(void *opaque)
8827 struct kvm_x86_init_ops *ops = opaque;
8830 if (kvm_x86_ops.hardware_enable) {
8831 pr_err("kvm: already loaded vendor module '%s'\n", kvm_x86_ops.name);
8836 if (!ops->cpu_has_kvm_support()) {
8837 pr_err_ratelimited("kvm: no hardware support for '%s'\n",
8838 ops->runtime_ops->name);
8842 if (ops->disabled_by_bios()) {
8843 pr_err_ratelimited("kvm: support for '%s' disabled by bios\n",
8844 ops->runtime_ops->name);
8850 * KVM explicitly assumes that the guest has an FPU and
8851 * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
8852 * vCPU's FPU state as a fxregs_state struct.
8854 if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
8855 printk(KERN_ERR "kvm: inadequate fpu\n");
8862 x86_emulator_cache = kvm_alloc_emulator_cache();
8863 if (!x86_emulator_cache) {
8864 pr_err("kvm: failed to allocate cache for x86 emulator\n");
8868 user_return_msrs = alloc_percpu(struct kvm_user_return_msrs);
8869 if (!user_return_msrs) {
8870 printk(KERN_ERR "kvm: failed to allocate percpu kvm_user_return_msrs\n");
8871 goto out_free_x86_emulator_cache;
8873 kvm_nr_uret_msrs = 0;
8875 r = kvm_mmu_module_init();
8877 goto out_free_percpu;
8881 perf_register_guest_info_callbacks(&kvm_guest_cbs);
8883 if (boot_cpu_has(X86_FEATURE_XSAVE)) {
8884 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
8885 supported_xcr0 = host_xcr0 & KVM_SUPPORTED_XCR0;
8888 if (pi_inject_timer == -1)
8889 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
8890 #ifdef CONFIG_X86_64
8891 pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
8893 if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8894 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
8900 free_percpu(user_return_msrs);
8901 out_free_x86_emulator_cache:
8902 kmem_cache_destroy(x86_emulator_cache);
8907 void kvm_arch_exit(void)
8909 #ifdef CONFIG_X86_64
8910 if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8911 clear_hv_tscchange_cb();
8914 perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
8916 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8917 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
8918 CPUFREQ_TRANSITION_NOTIFIER);
8919 cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
8920 #ifdef CONFIG_X86_64
8921 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
8922 irq_work_sync(&pvclock_irq_work);
8923 cancel_work_sync(&pvclock_gtod_work);
8925 kvm_x86_ops.hardware_enable = NULL;
8926 kvm_mmu_module_exit();
8927 free_percpu(user_return_msrs);
8928 kmem_cache_destroy(x86_emulator_cache);
8929 #ifdef CONFIG_KVM_XEN
8930 static_key_deferred_flush(&kvm_xen_enabled);
8931 WARN_ON(static_branch_unlikely(&kvm_xen_enabled.key));
8935 static int __kvm_emulate_halt(struct kvm_vcpu *vcpu, int state, int reason)
8938 * The vCPU has halted, e.g. executed HLT. Update the run state if the
8939 * local APIC is in-kernel, the run loop will detect the non-runnable
8940 * state and halt the vCPU. Exit to userspace if the local APIC is
8941 * managed by userspace, in which case userspace is responsible for
8942 * handling wake events.
8944 ++vcpu->stat.halt_exits;
8945 if (lapic_in_kernel(vcpu)) {
8946 vcpu->arch.mp_state = state;
8949 vcpu->run->exit_reason = reason;
8954 int kvm_emulate_halt_noskip(struct kvm_vcpu *vcpu)
8956 return __kvm_emulate_halt(vcpu, KVM_MP_STATE_HALTED, KVM_EXIT_HLT);
8958 EXPORT_SYMBOL_GPL(kvm_emulate_halt_noskip);
8960 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
8962 int ret = kvm_skip_emulated_instruction(vcpu);
8964 * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
8965 * KVM_EXIT_DEBUG here.
8967 return kvm_emulate_halt_noskip(vcpu) && ret;
8969 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
8971 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu)
8973 int ret = kvm_skip_emulated_instruction(vcpu);
8975 return __kvm_emulate_halt(vcpu, KVM_MP_STATE_AP_RESET_HOLD,
8976 KVM_EXIT_AP_RESET_HOLD) && ret;
8978 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold);
8980 #ifdef CONFIG_X86_64
8981 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
8982 unsigned long clock_type)
8984 struct kvm_clock_pairing clock_pairing;
8985 struct timespec64 ts;
8989 if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
8990 return -KVM_EOPNOTSUPP;
8992 if (!kvm_get_walltime_and_clockread(&ts, &cycle))
8993 return -KVM_EOPNOTSUPP;
8995 clock_pairing.sec = ts.tv_sec;
8996 clock_pairing.nsec = ts.tv_nsec;
8997 clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
8998 clock_pairing.flags = 0;
8999 memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
9002 if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
9003 sizeof(struct kvm_clock_pairing)))
9011 * kvm_pv_kick_cpu_op: Kick a vcpu.
9013 * @apicid - apicid of vcpu to be kicked.
9015 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
9017 struct kvm_lapic_irq lapic_irq;
9019 lapic_irq.shorthand = APIC_DEST_NOSHORT;
9020 lapic_irq.dest_mode = APIC_DEST_PHYSICAL;
9021 lapic_irq.level = 0;
9022 lapic_irq.dest_id = apicid;
9023 lapic_irq.msi_redir_hint = false;
9025 lapic_irq.delivery_mode = APIC_DM_REMRD;
9026 kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
9029 bool kvm_apicv_activated(struct kvm *kvm)
9031 return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
9033 EXPORT_SYMBOL_GPL(kvm_apicv_activated);
9035 static void kvm_apicv_init(struct kvm *kvm)
9037 init_rwsem(&kvm->arch.apicv_update_lock);
9039 set_bit(APICV_INHIBIT_REASON_ABSENT,
9040 &kvm->arch.apicv_inhibit_reasons);
9042 set_bit(APICV_INHIBIT_REASON_DISABLE,
9043 &kvm->arch.apicv_inhibit_reasons);
9046 static void kvm_sched_yield(struct kvm_vcpu *vcpu, unsigned long dest_id)
9048 struct kvm_vcpu *target = NULL;
9049 struct kvm_apic_map *map;
9051 vcpu->stat.directed_yield_attempted++;
9053 if (single_task_running())
9057 map = rcu_dereference(vcpu->kvm->arch.apic_map);
9059 if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
9060 target = map->phys_map[dest_id]->vcpu;
9064 if (!target || !READ_ONCE(target->ready))
9067 /* Ignore requests to yield to self */
9071 if (kvm_vcpu_yield_to(target) <= 0)
9074 vcpu->stat.directed_yield_successful++;
9080 static int complete_hypercall_exit(struct kvm_vcpu *vcpu)
9082 u64 ret = vcpu->run->hypercall.ret;
9084 if (!is_64_bit_mode(vcpu))
9086 kvm_rax_write(vcpu, ret);
9087 ++vcpu->stat.hypercalls;
9088 return kvm_skip_emulated_instruction(vcpu);
9091 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
9093 unsigned long nr, a0, a1, a2, a3, ret;
9096 if (kvm_xen_hypercall_enabled(vcpu->kvm))
9097 return kvm_xen_hypercall(vcpu);
9099 if (kvm_hv_hypercall_enabled(vcpu))
9100 return kvm_hv_hypercall(vcpu);
9102 nr = kvm_rax_read(vcpu);
9103 a0 = kvm_rbx_read(vcpu);
9104 a1 = kvm_rcx_read(vcpu);
9105 a2 = kvm_rdx_read(vcpu);
9106 a3 = kvm_rsi_read(vcpu);
9108 trace_kvm_hypercall(nr, a0, a1, a2, a3);
9110 op_64_bit = is_64_bit_hypercall(vcpu);
9119 if (static_call(kvm_x86_get_cpl)(vcpu) != 0) {
9127 case KVM_HC_VAPIC_POLL_IRQ:
9130 case KVM_HC_KICK_CPU:
9131 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_UNHALT))
9134 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
9135 kvm_sched_yield(vcpu, a1);
9138 #ifdef CONFIG_X86_64
9139 case KVM_HC_CLOCK_PAIRING:
9140 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
9143 case KVM_HC_SEND_IPI:
9144 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SEND_IPI))
9147 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
9149 case KVM_HC_SCHED_YIELD:
9150 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SCHED_YIELD))
9153 kvm_sched_yield(vcpu, a0);
9156 case KVM_HC_MAP_GPA_RANGE: {
9157 u64 gpa = a0, npages = a1, attrs = a2;
9160 if (!(vcpu->kvm->arch.hypercall_exit_enabled & (1 << KVM_HC_MAP_GPA_RANGE)))
9163 if (!PAGE_ALIGNED(gpa) || !npages ||
9164 gpa_to_gfn(gpa) + npages <= gpa_to_gfn(gpa)) {
9169 vcpu->run->exit_reason = KVM_EXIT_HYPERCALL;
9170 vcpu->run->hypercall.nr = KVM_HC_MAP_GPA_RANGE;
9171 vcpu->run->hypercall.args[0] = gpa;
9172 vcpu->run->hypercall.args[1] = npages;
9173 vcpu->run->hypercall.args[2] = attrs;
9174 vcpu->run->hypercall.longmode = op_64_bit;
9175 vcpu->arch.complete_userspace_io = complete_hypercall_exit;
9185 kvm_rax_write(vcpu, ret);
9187 ++vcpu->stat.hypercalls;
9188 return kvm_skip_emulated_instruction(vcpu);
9190 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
9192 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
9194 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
9195 char instruction[3];
9196 unsigned long rip = kvm_rip_read(vcpu);
9198 static_call(kvm_x86_patch_hypercall)(vcpu, instruction);
9200 return emulator_write_emulated(ctxt, rip, instruction, 3,
9204 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
9206 return vcpu->run->request_interrupt_window &&
9207 likely(!pic_in_kernel(vcpu->kvm));
9210 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
9212 struct kvm_run *kvm_run = vcpu->run;
9214 kvm_run->if_flag = static_call(kvm_x86_get_if_flag)(vcpu);
9215 kvm_run->cr8 = kvm_get_cr8(vcpu);
9216 kvm_run->apic_base = kvm_get_apic_base(vcpu);
9219 * The call to kvm_ready_for_interrupt_injection() may end up in
9220 * kvm_xen_has_interrupt() which may require the srcu lock to be
9221 * held, to protect against changes in the vcpu_info address.
9223 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9224 kvm_run->ready_for_interrupt_injection =
9225 pic_in_kernel(vcpu->kvm) ||
9226 kvm_vcpu_ready_for_interrupt_injection(vcpu);
9227 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9230 kvm_run->flags |= KVM_RUN_X86_SMM;
9233 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
9237 if (!kvm_x86_ops.update_cr8_intercept)
9240 if (!lapic_in_kernel(vcpu))
9243 if (vcpu->arch.apicv_active)
9246 if (!vcpu->arch.apic->vapic_addr)
9247 max_irr = kvm_lapic_find_highest_irr(vcpu);
9254 tpr = kvm_lapic_get_cr8(vcpu);
9256 static_call(kvm_x86_update_cr8_intercept)(vcpu, tpr, max_irr);
9260 int kvm_check_nested_events(struct kvm_vcpu *vcpu)
9262 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
9263 kvm_x86_ops.nested_ops->triple_fault(vcpu);
9267 return kvm_x86_ops.nested_ops->check_events(vcpu);
9270 static void kvm_inject_exception(struct kvm_vcpu *vcpu)
9272 if (vcpu->arch.exception.error_code && !is_protmode(vcpu))
9273 vcpu->arch.exception.error_code = false;
9274 static_call(kvm_x86_queue_exception)(vcpu);
9277 static int inject_pending_event(struct kvm_vcpu *vcpu, bool *req_immediate_exit)
9280 bool can_inject = true;
9282 /* try to reinject previous events if any */
9284 if (vcpu->arch.exception.injected) {
9285 kvm_inject_exception(vcpu);
9289 * Do not inject an NMI or interrupt if there is a pending
9290 * exception. Exceptions and interrupts are recognized at
9291 * instruction boundaries, i.e. the start of an instruction.
9292 * Trap-like exceptions, e.g. #DB, have higher priority than
9293 * NMIs and interrupts, i.e. traps are recognized before an
9294 * NMI/interrupt that's pending on the same instruction.
9295 * Fault-like exceptions, e.g. #GP and #PF, are the lowest
9296 * priority, but are only generated (pended) during instruction
9297 * execution, i.e. a pending fault-like exception means the
9298 * fault occurred on the *previous* instruction and must be
9299 * serviced prior to recognizing any new events in order to
9300 * fully complete the previous instruction.
9302 else if (!vcpu->arch.exception.pending) {
9303 if (vcpu->arch.nmi_injected) {
9304 static_call(kvm_x86_set_nmi)(vcpu);
9306 } else if (vcpu->arch.interrupt.injected) {
9307 static_call(kvm_x86_set_irq)(vcpu);
9312 WARN_ON_ONCE(vcpu->arch.exception.injected &&
9313 vcpu->arch.exception.pending);
9316 * Call check_nested_events() even if we reinjected a previous event
9317 * in order for caller to determine if it should require immediate-exit
9318 * from L2 to L1 due to pending L1 events which require exit
9321 if (is_guest_mode(vcpu)) {
9322 r = kvm_check_nested_events(vcpu);
9327 /* try to inject new event if pending */
9328 if (vcpu->arch.exception.pending) {
9329 trace_kvm_inj_exception(vcpu->arch.exception.nr,
9330 vcpu->arch.exception.has_error_code,
9331 vcpu->arch.exception.error_code);
9333 vcpu->arch.exception.pending = false;
9334 vcpu->arch.exception.injected = true;
9336 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
9337 __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
9340 if (vcpu->arch.exception.nr == DB_VECTOR) {
9341 kvm_deliver_exception_payload(vcpu);
9342 if (vcpu->arch.dr7 & DR7_GD) {
9343 vcpu->arch.dr7 &= ~DR7_GD;
9344 kvm_update_dr7(vcpu);
9348 kvm_inject_exception(vcpu);
9352 /* Don't inject interrupts if the user asked to avoid doing so */
9353 if (vcpu->guest_debug & KVM_GUESTDBG_BLOCKIRQ)
9357 * Finally, inject interrupt events. If an event cannot be injected
9358 * due to architectural conditions (e.g. IF=0) a window-open exit
9359 * will re-request KVM_REQ_EVENT. Sometimes however an event is pending
9360 * and can architecturally be injected, but we cannot do it right now:
9361 * an interrupt could have arrived just now and we have to inject it
9362 * as a vmexit, or there could already an event in the queue, which is
9363 * indicated by can_inject. In that case we request an immediate exit
9364 * in order to make progress and get back here for another iteration.
9365 * The kvm_x86_ops hooks communicate this by returning -EBUSY.
9367 if (vcpu->arch.smi_pending) {
9368 r = can_inject ? static_call(kvm_x86_smi_allowed)(vcpu, true) : -EBUSY;
9372 vcpu->arch.smi_pending = false;
9373 ++vcpu->arch.smi_count;
9377 static_call(kvm_x86_enable_smi_window)(vcpu);
9380 if (vcpu->arch.nmi_pending) {
9381 r = can_inject ? static_call(kvm_x86_nmi_allowed)(vcpu, true) : -EBUSY;
9385 --vcpu->arch.nmi_pending;
9386 vcpu->arch.nmi_injected = true;
9387 static_call(kvm_x86_set_nmi)(vcpu);
9389 WARN_ON(static_call(kvm_x86_nmi_allowed)(vcpu, true) < 0);
9391 if (vcpu->arch.nmi_pending)
9392 static_call(kvm_x86_enable_nmi_window)(vcpu);
9395 if (kvm_cpu_has_injectable_intr(vcpu)) {
9396 r = can_inject ? static_call(kvm_x86_interrupt_allowed)(vcpu, true) : -EBUSY;
9400 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu), false);
9401 static_call(kvm_x86_set_irq)(vcpu);
9402 WARN_ON(static_call(kvm_x86_interrupt_allowed)(vcpu, true) < 0);
9404 if (kvm_cpu_has_injectable_intr(vcpu))
9405 static_call(kvm_x86_enable_irq_window)(vcpu);
9408 if (is_guest_mode(vcpu) &&
9409 kvm_x86_ops.nested_ops->hv_timer_pending &&
9410 kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
9411 *req_immediate_exit = true;
9413 WARN_ON(vcpu->arch.exception.pending);
9418 *req_immediate_exit = true;
9424 static void process_nmi(struct kvm_vcpu *vcpu)
9429 * x86 is limited to one NMI running, and one NMI pending after it.
9430 * If an NMI is already in progress, limit further NMIs to just one.
9431 * Otherwise, allow two (and we'll inject the first one immediately).
9433 if (static_call(kvm_x86_get_nmi_mask)(vcpu) || vcpu->arch.nmi_injected)
9436 vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
9437 vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
9438 kvm_make_request(KVM_REQ_EVENT, vcpu);
9441 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
9444 flags |= seg->g << 23;
9445 flags |= seg->db << 22;
9446 flags |= seg->l << 21;
9447 flags |= seg->avl << 20;
9448 flags |= seg->present << 15;
9449 flags |= seg->dpl << 13;
9450 flags |= seg->s << 12;
9451 flags |= seg->type << 8;
9455 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
9457 struct kvm_segment seg;
9460 kvm_get_segment(vcpu, &seg, n);
9461 put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
9464 offset = 0x7f84 + n * 12;
9466 offset = 0x7f2c + (n - 3) * 12;
9468 put_smstate(u32, buf, offset + 8, seg.base);
9469 put_smstate(u32, buf, offset + 4, seg.limit);
9470 put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
9473 #ifdef CONFIG_X86_64
9474 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
9476 struct kvm_segment seg;
9480 kvm_get_segment(vcpu, &seg, n);
9481 offset = 0x7e00 + n * 16;
9483 flags = enter_smm_get_segment_flags(&seg) >> 8;
9484 put_smstate(u16, buf, offset, seg.selector);
9485 put_smstate(u16, buf, offset + 2, flags);
9486 put_smstate(u32, buf, offset + 4, seg.limit);
9487 put_smstate(u64, buf, offset + 8, seg.base);
9491 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
9494 struct kvm_segment seg;
9498 put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
9499 put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
9500 put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
9501 put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
9503 for (i = 0; i < 8; i++)
9504 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read_raw(vcpu, i));
9506 kvm_get_dr(vcpu, 6, &val);
9507 put_smstate(u32, buf, 0x7fcc, (u32)val);
9508 kvm_get_dr(vcpu, 7, &val);
9509 put_smstate(u32, buf, 0x7fc8, (u32)val);
9511 kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
9512 put_smstate(u32, buf, 0x7fc4, seg.selector);
9513 put_smstate(u32, buf, 0x7f64, seg.base);
9514 put_smstate(u32, buf, 0x7f60, seg.limit);
9515 put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
9517 kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
9518 put_smstate(u32, buf, 0x7fc0, seg.selector);
9519 put_smstate(u32, buf, 0x7f80, seg.base);
9520 put_smstate(u32, buf, 0x7f7c, seg.limit);
9521 put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
9523 static_call(kvm_x86_get_gdt)(vcpu, &dt);
9524 put_smstate(u32, buf, 0x7f74, dt.address);
9525 put_smstate(u32, buf, 0x7f70, dt.size);
9527 static_call(kvm_x86_get_idt)(vcpu, &dt);
9528 put_smstate(u32, buf, 0x7f58, dt.address);
9529 put_smstate(u32, buf, 0x7f54, dt.size);
9531 for (i = 0; i < 6; i++)
9532 enter_smm_save_seg_32(vcpu, buf, i);
9534 put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
9537 put_smstate(u32, buf, 0x7efc, 0x00020000);
9538 put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
9541 #ifdef CONFIG_X86_64
9542 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
9545 struct kvm_segment seg;
9549 for (i = 0; i < 16; i++)
9550 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read_raw(vcpu, i));
9552 put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
9553 put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
9555 kvm_get_dr(vcpu, 6, &val);
9556 put_smstate(u64, buf, 0x7f68, val);
9557 kvm_get_dr(vcpu, 7, &val);
9558 put_smstate(u64, buf, 0x7f60, val);
9560 put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
9561 put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
9562 put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
9564 put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
9567 put_smstate(u32, buf, 0x7efc, 0x00020064);
9569 put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
9571 kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
9572 put_smstate(u16, buf, 0x7e90, seg.selector);
9573 put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
9574 put_smstate(u32, buf, 0x7e94, seg.limit);
9575 put_smstate(u64, buf, 0x7e98, seg.base);
9577 static_call(kvm_x86_get_idt)(vcpu, &dt);
9578 put_smstate(u32, buf, 0x7e84, dt.size);
9579 put_smstate(u64, buf, 0x7e88, dt.address);
9581 kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
9582 put_smstate(u16, buf, 0x7e70, seg.selector);
9583 put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
9584 put_smstate(u32, buf, 0x7e74, seg.limit);
9585 put_smstate(u64, buf, 0x7e78, seg.base);
9587 static_call(kvm_x86_get_gdt)(vcpu, &dt);
9588 put_smstate(u32, buf, 0x7e64, dt.size);
9589 put_smstate(u64, buf, 0x7e68, dt.address);
9591 for (i = 0; i < 6; i++)
9592 enter_smm_save_seg_64(vcpu, buf, i);
9596 static void enter_smm(struct kvm_vcpu *vcpu)
9598 struct kvm_segment cs, ds;
9603 memset(buf, 0, 512);
9604 #ifdef CONFIG_X86_64
9605 if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9606 enter_smm_save_state_64(vcpu, buf);
9609 enter_smm_save_state_32(vcpu, buf);
9612 * Give enter_smm() a chance to make ISA-specific changes to the vCPU
9613 * state (e.g. leave guest mode) after we've saved the state into the
9614 * SMM state-save area.
9616 static_call(kvm_x86_enter_smm)(vcpu, buf);
9618 kvm_smm_changed(vcpu, true);
9619 kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
9621 if (static_call(kvm_x86_get_nmi_mask)(vcpu))
9622 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
9624 static_call(kvm_x86_set_nmi_mask)(vcpu, true);
9626 kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
9627 kvm_rip_write(vcpu, 0x8000);
9629 cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
9630 static_call(kvm_x86_set_cr0)(vcpu, cr0);
9631 vcpu->arch.cr0 = cr0;
9633 static_call(kvm_x86_set_cr4)(vcpu, 0);
9635 /* Undocumented: IDT limit is set to zero on entry to SMM. */
9636 dt.address = dt.size = 0;
9637 static_call(kvm_x86_set_idt)(vcpu, &dt);
9639 kvm_set_dr(vcpu, 7, DR7_FIXED_1);
9641 cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
9642 cs.base = vcpu->arch.smbase;
9647 cs.limit = ds.limit = 0xffffffff;
9648 cs.type = ds.type = 0x3;
9649 cs.dpl = ds.dpl = 0;
9654 cs.avl = ds.avl = 0;
9655 cs.present = ds.present = 1;
9656 cs.unusable = ds.unusable = 0;
9657 cs.padding = ds.padding = 0;
9659 kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
9660 kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
9661 kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
9662 kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
9663 kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
9664 kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
9666 #ifdef CONFIG_X86_64
9667 if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9668 static_call(kvm_x86_set_efer)(vcpu, 0);
9671 kvm_update_cpuid_runtime(vcpu);
9672 kvm_mmu_reset_context(vcpu);
9675 static void process_smi(struct kvm_vcpu *vcpu)
9677 vcpu->arch.smi_pending = true;
9678 kvm_make_request(KVM_REQ_EVENT, vcpu);
9681 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
9682 unsigned long *vcpu_bitmap)
9684 kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC, vcpu_bitmap);
9687 void kvm_make_scan_ioapic_request(struct kvm *kvm)
9689 kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
9692 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
9696 if (!lapic_in_kernel(vcpu))
9699 down_read(&vcpu->kvm->arch.apicv_update_lock);
9701 activate = kvm_apicv_activated(vcpu->kvm);
9702 if (vcpu->arch.apicv_active == activate)
9705 vcpu->arch.apicv_active = activate;
9706 kvm_apic_update_apicv(vcpu);
9707 static_call(kvm_x86_refresh_apicv_exec_ctrl)(vcpu);
9710 * When APICv gets disabled, we may still have injected interrupts
9711 * pending. At the same time, KVM_REQ_EVENT may not be set as APICv was
9712 * still active when the interrupt got accepted. Make sure
9713 * inject_pending_event() is called to check for that.
9715 if (!vcpu->arch.apicv_active)
9716 kvm_make_request(KVM_REQ_EVENT, vcpu);
9719 up_read(&vcpu->kvm->arch.apicv_update_lock);
9721 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv);
9723 void __kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
9725 unsigned long old, new;
9727 lockdep_assert_held_write(&kvm->arch.apicv_update_lock);
9729 if (!kvm_x86_ops.check_apicv_inhibit_reasons ||
9730 !static_call(kvm_x86_check_apicv_inhibit_reasons)(bit))
9733 old = new = kvm->arch.apicv_inhibit_reasons;
9736 __clear_bit(bit, &new);
9738 __set_bit(bit, &new);
9740 if (!!old != !!new) {
9741 trace_kvm_apicv_update_request(activate, bit);
9743 * Kick all vCPUs before setting apicv_inhibit_reasons to avoid
9744 * false positives in the sanity check WARN in svm_vcpu_run().
9745 * This task will wait for all vCPUs to ack the kick IRQ before
9746 * updating apicv_inhibit_reasons, and all other vCPUs will
9747 * block on acquiring apicv_update_lock so that vCPUs can't
9748 * redo svm_vcpu_run() without seeing the new inhibit state.
9750 * Note, holding apicv_update_lock and taking it in the read
9751 * side (handling the request) also prevents other vCPUs from
9752 * servicing the request with a stale apicv_inhibit_reasons.
9754 kvm_make_all_cpus_request(kvm, KVM_REQ_APICV_UPDATE);
9755 kvm->arch.apicv_inhibit_reasons = new;
9757 unsigned long gfn = gpa_to_gfn(APIC_DEFAULT_PHYS_BASE);
9758 kvm_zap_gfn_range(kvm, gfn, gfn+1);
9761 kvm->arch.apicv_inhibit_reasons = new;
9763 EXPORT_SYMBOL_GPL(__kvm_request_apicv_update);
9765 void kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
9767 down_write(&kvm->arch.apicv_update_lock);
9768 __kvm_request_apicv_update(kvm, activate, bit);
9769 up_write(&kvm->arch.apicv_update_lock);
9771 EXPORT_SYMBOL_GPL(kvm_request_apicv_update);
9773 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
9775 if (!kvm_apic_present(vcpu))
9778 bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
9780 if (irqchip_split(vcpu->kvm))
9781 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
9783 static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
9784 if (ioapic_in_kernel(vcpu->kvm))
9785 kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
9788 if (is_guest_mode(vcpu))
9789 vcpu->arch.load_eoi_exitmap_pending = true;
9791 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
9794 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
9796 u64 eoi_exit_bitmap[4];
9798 if (!kvm_apic_hw_enabled(vcpu->arch.apic))
9801 if (to_hv_vcpu(vcpu)) {
9802 bitmap_or((ulong *)eoi_exit_bitmap,
9803 vcpu->arch.ioapic_handled_vectors,
9804 to_hv_synic(vcpu)->vec_bitmap, 256);
9805 static_call(kvm_x86_load_eoi_exitmap)(vcpu, eoi_exit_bitmap);
9809 static_call(kvm_x86_load_eoi_exitmap)(
9810 vcpu, (u64 *)vcpu->arch.ioapic_handled_vectors);
9813 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
9814 unsigned long start, unsigned long end)
9816 unsigned long apic_address;
9819 * The physical address of apic access page is stored in the VMCS.
9820 * Update it when it becomes invalid.
9822 apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
9823 if (start <= apic_address && apic_address < end)
9824 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
9827 static void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
9829 if (!lapic_in_kernel(vcpu))
9832 if (!kvm_x86_ops.set_apic_access_page_addr)
9835 static_call(kvm_x86_set_apic_access_page_addr)(vcpu);
9838 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
9840 smp_send_reschedule(vcpu->cpu);
9842 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
9845 * Returns 1 to let vcpu_run() continue the guest execution loop without
9846 * exiting to the userspace. Otherwise, the value will be returned to the
9849 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
9853 dm_request_for_irq_injection(vcpu) &&
9854 kvm_cpu_accept_dm_intr(vcpu);
9855 fastpath_t exit_fastpath;
9857 bool req_immediate_exit = false;
9859 /* Forbid vmenter if vcpu dirty ring is soft-full */
9860 if (unlikely(vcpu->kvm->dirty_ring_size &&
9861 kvm_dirty_ring_soft_full(&vcpu->dirty_ring))) {
9862 vcpu->run->exit_reason = KVM_EXIT_DIRTY_RING_FULL;
9863 trace_kvm_dirty_ring_exit(vcpu);
9868 if (kvm_request_pending(vcpu)) {
9869 if (kvm_check_request(KVM_REQ_VM_DEAD, vcpu)) {
9873 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu)) {
9874 if (unlikely(!kvm_x86_ops.nested_ops->get_nested_state_pages(vcpu))) {
9879 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
9880 kvm_mmu_unload(vcpu);
9881 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
9882 __kvm_migrate_timers(vcpu);
9883 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
9884 kvm_update_masterclock(vcpu->kvm);
9885 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
9886 kvm_gen_kvmclock_update(vcpu);
9887 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
9888 r = kvm_guest_time_update(vcpu);
9892 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
9893 kvm_mmu_sync_roots(vcpu);
9894 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD, vcpu))
9895 kvm_mmu_load_pgd(vcpu);
9896 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) {
9897 kvm_vcpu_flush_tlb_all(vcpu);
9899 /* Flushing all ASIDs flushes the current ASID... */
9900 kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
9902 kvm_service_local_tlb_flush_requests(vcpu);
9904 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
9905 vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
9909 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
9910 if (is_guest_mode(vcpu)) {
9911 kvm_x86_ops.nested_ops->triple_fault(vcpu);
9913 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
9914 vcpu->mmio_needed = 0;
9919 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
9920 /* Page is swapped out. Do synthetic halt */
9921 vcpu->arch.apf.halted = true;
9925 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
9926 record_steal_time(vcpu);
9927 if (kvm_check_request(KVM_REQ_SMI, vcpu))
9929 if (kvm_check_request(KVM_REQ_NMI, vcpu))
9931 if (kvm_check_request(KVM_REQ_PMU, vcpu))
9932 kvm_pmu_handle_event(vcpu);
9933 if (kvm_check_request(KVM_REQ_PMI, vcpu))
9934 kvm_pmu_deliver_pmi(vcpu);
9935 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
9936 BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
9937 if (test_bit(vcpu->arch.pending_ioapic_eoi,
9938 vcpu->arch.ioapic_handled_vectors)) {
9939 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
9940 vcpu->run->eoi.vector =
9941 vcpu->arch.pending_ioapic_eoi;
9946 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
9947 vcpu_scan_ioapic(vcpu);
9948 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
9949 vcpu_load_eoi_exitmap(vcpu);
9950 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
9951 kvm_vcpu_reload_apic_access_page(vcpu);
9952 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
9953 vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9954 vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
9958 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
9959 vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9960 vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
9964 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
9965 struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
9967 vcpu->run->exit_reason = KVM_EXIT_HYPERV;
9968 vcpu->run->hyperv = hv_vcpu->exit;
9974 * KVM_REQ_HV_STIMER has to be processed after
9975 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
9976 * depend on the guest clock being up-to-date
9978 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
9979 kvm_hv_process_stimers(vcpu);
9980 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
9981 kvm_vcpu_update_apicv(vcpu);
9982 if (kvm_check_request(KVM_REQ_APF_READY, vcpu))
9983 kvm_check_async_pf_completion(vcpu);
9984 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED, vcpu))
9985 static_call(kvm_x86_msr_filter_changed)(vcpu);
9987 if (kvm_check_request(KVM_REQ_UPDATE_CPU_DIRTY_LOGGING, vcpu))
9988 static_call(kvm_x86_update_cpu_dirty_logging)(vcpu);
9991 if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win ||
9992 kvm_xen_has_interrupt(vcpu)) {
9993 ++vcpu->stat.req_event;
9994 r = kvm_apic_accept_events(vcpu);
9999 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
10004 r = inject_pending_event(vcpu, &req_immediate_exit);
10010 static_call(kvm_x86_enable_irq_window)(vcpu);
10012 if (kvm_lapic_enabled(vcpu)) {
10013 update_cr8_intercept(vcpu);
10014 kvm_lapic_sync_to_vapic(vcpu);
10018 r = kvm_mmu_reload(vcpu);
10020 goto cancel_injection;
10025 static_call(kvm_x86_prepare_guest_switch)(vcpu);
10028 * Disable IRQs before setting IN_GUEST_MODE. Posted interrupt
10029 * IPI are then delayed after guest entry, which ensures that they
10030 * result in virtual interrupt delivery.
10032 local_irq_disable();
10033 vcpu->mode = IN_GUEST_MODE;
10035 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
10038 * 1) We should set ->mode before checking ->requests. Please see
10039 * the comment in kvm_vcpu_exiting_guest_mode().
10041 * 2) For APICv, we should set ->mode before checking PID.ON. This
10042 * pairs with the memory barrier implicit in pi_test_and_set_on
10043 * (see vmx_deliver_posted_interrupt).
10045 * 3) This also orders the write to mode from any reads to the page
10046 * tables done while the VCPU is running. Please see the comment
10047 * in kvm_flush_remote_tlbs.
10049 smp_mb__after_srcu_read_unlock();
10052 * Process pending posted interrupts to handle the case where the
10053 * notification IRQ arrived in the host, or was never sent (because the
10054 * target vCPU wasn't running). Do this regardless of the vCPU's APICv
10055 * status, KVM doesn't update assigned devices when APICv is inhibited,
10056 * i.e. they can post interrupts even if APICv is temporarily disabled.
10058 if (kvm_lapic_enabled(vcpu))
10059 static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
10061 if (kvm_vcpu_exit_request(vcpu)) {
10062 vcpu->mode = OUTSIDE_GUEST_MODE;
10064 local_irq_enable();
10066 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
10068 goto cancel_injection;
10071 if (req_immediate_exit) {
10072 kvm_make_request(KVM_REQ_EVENT, vcpu);
10073 static_call(kvm_x86_request_immediate_exit)(vcpu);
10076 fpregs_assert_state_consistent();
10077 if (test_thread_flag(TIF_NEED_FPU_LOAD))
10078 switch_fpu_return();
10080 if (vcpu->arch.guest_fpu.xfd_err)
10081 wrmsrl(MSR_IA32_XFD_ERR, vcpu->arch.guest_fpu.xfd_err);
10083 if (unlikely(vcpu->arch.switch_db_regs)) {
10084 set_debugreg(0, 7);
10085 set_debugreg(vcpu->arch.eff_db[0], 0);
10086 set_debugreg(vcpu->arch.eff_db[1], 1);
10087 set_debugreg(vcpu->arch.eff_db[2], 2);
10088 set_debugreg(vcpu->arch.eff_db[3], 3);
10089 } else if (unlikely(hw_breakpoint_active())) {
10090 set_debugreg(0, 7);
10093 guest_timing_enter_irqoff();
10097 * Assert that vCPU vs. VM APICv state is consistent. An APICv
10098 * update must kick and wait for all vCPUs before toggling the
10099 * per-VM state, and responsing vCPUs must wait for the update
10100 * to complete before servicing KVM_REQ_APICV_UPDATE.
10102 WARN_ON_ONCE(kvm_apicv_activated(vcpu->kvm) != kvm_vcpu_apicv_active(vcpu));
10104 exit_fastpath = static_call(kvm_x86_run)(vcpu);
10105 if (likely(exit_fastpath != EXIT_FASTPATH_REENTER_GUEST))
10108 if (kvm_lapic_enabled(vcpu))
10109 static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
10111 if (unlikely(kvm_vcpu_exit_request(vcpu))) {
10112 exit_fastpath = EXIT_FASTPATH_EXIT_HANDLED;
10118 * Do this here before restoring debug registers on the host. And
10119 * since we do this before handling the vmexit, a DR access vmexit
10120 * can (a) read the correct value of the debug registers, (b) set
10121 * KVM_DEBUGREG_WONT_EXIT again.
10123 if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
10124 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
10125 static_call(kvm_x86_sync_dirty_debug_regs)(vcpu);
10126 kvm_update_dr0123(vcpu);
10127 kvm_update_dr7(vcpu);
10131 * If the guest has used debug registers, at least dr7
10132 * will be disabled while returning to the host.
10133 * If we don't have active breakpoints in the host, we don't
10134 * care about the messed up debug address registers. But if
10135 * we have some of them active, restore the old state.
10137 if (hw_breakpoint_active())
10138 hw_breakpoint_restore();
10140 vcpu->arch.last_vmentry_cpu = vcpu->cpu;
10141 vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
10143 vcpu->mode = OUTSIDE_GUEST_MODE;
10147 * Sync xfd before calling handle_exit_irqoff() which may
10148 * rely on the fact that guest_fpu::xfd is up-to-date (e.g.
10149 * in #NM irqoff handler).
10151 if (vcpu->arch.xfd_no_write_intercept)
10152 fpu_sync_guest_vmexit_xfd_state();
10154 static_call(kvm_x86_handle_exit_irqoff)(vcpu);
10156 if (vcpu->arch.guest_fpu.xfd_err)
10157 wrmsrl(MSR_IA32_XFD_ERR, 0);
10160 * Consume any pending interrupts, including the possible source of
10161 * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
10162 * An instruction is required after local_irq_enable() to fully unblock
10163 * interrupts on processors that implement an interrupt shadow, the
10164 * stat.exits increment will do nicely.
10166 kvm_before_interrupt(vcpu);
10167 local_irq_enable();
10168 ++vcpu->stat.exits;
10169 local_irq_disable();
10170 kvm_after_interrupt(vcpu);
10173 * Wait until after servicing IRQs to account guest time so that any
10174 * ticks that occurred while running the guest are properly accounted
10175 * to the guest. Waiting until IRQs are enabled degrades the accuracy
10176 * of accounting via context tracking, but the loss of accuracy is
10177 * acceptable for all known use cases.
10179 guest_timing_exit_irqoff();
10181 if (lapic_in_kernel(vcpu)) {
10182 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
10183 if (delta != S64_MIN) {
10184 trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
10185 vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
10189 local_irq_enable();
10192 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
10195 * Profile KVM exit RIPs:
10197 if (unlikely(prof_on == KVM_PROFILING)) {
10198 unsigned long rip = kvm_rip_read(vcpu);
10199 profile_hit(KVM_PROFILING, (void *)rip);
10202 if (unlikely(vcpu->arch.tsc_always_catchup))
10203 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
10205 if (vcpu->arch.apic_attention)
10206 kvm_lapic_sync_from_vapic(vcpu);
10208 r = static_call(kvm_x86_handle_exit)(vcpu, exit_fastpath);
10212 if (req_immediate_exit)
10213 kvm_make_request(KVM_REQ_EVENT, vcpu);
10214 static_call(kvm_x86_cancel_injection)(vcpu);
10215 if (unlikely(vcpu->arch.apic_attention))
10216 kvm_lapic_sync_from_vapic(vcpu);
10221 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
10225 if (!kvm_arch_vcpu_runnable(vcpu)) {
10227 * Switch to the software timer before halt-polling/blocking as
10228 * the guest's timer may be a break event for the vCPU, and the
10229 * hypervisor timer runs only when the CPU is in guest mode.
10230 * Switch before halt-polling so that KVM recognizes an expired
10231 * timer before blocking.
10233 hv_timer = kvm_lapic_hv_timer_in_use(vcpu);
10235 kvm_lapic_switch_to_sw_timer(vcpu);
10237 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
10238 if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED)
10239 kvm_vcpu_halt(vcpu);
10241 kvm_vcpu_block(vcpu);
10242 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
10245 kvm_lapic_switch_to_hv_timer(vcpu);
10247 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
10251 if (kvm_apic_accept_events(vcpu) < 0)
10253 switch(vcpu->arch.mp_state) {
10254 case KVM_MP_STATE_HALTED:
10255 case KVM_MP_STATE_AP_RESET_HOLD:
10256 vcpu->arch.pv.pv_unhalted = false;
10257 vcpu->arch.mp_state =
10258 KVM_MP_STATE_RUNNABLE;
10260 case KVM_MP_STATE_RUNNABLE:
10261 vcpu->arch.apf.halted = false;
10263 case KVM_MP_STATE_INIT_RECEIVED:
10271 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
10273 if (is_guest_mode(vcpu))
10274 kvm_check_nested_events(vcpu);
10276 return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
10277 !vcpu->arch.apf.halted);
10280 static int vcpu_run(struct kvm_vcpu *vcpu)
10283 struct kvm *kvm = vcpu->kvm;
10285 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
10286 vcpu->arch.l1tf_flush_l1d = true;
10289 if (kvm_vcpu_running(vcpu)) {
10290 r = vcpu_enter_guest(vcpu);
10292 r = vcpu_block(kvm, vcpu);
10298 kvm_clear_request(KVM_REQ_UNBLOCK, vcpu);
10299 if (kvm_cpu_has_pending_timer(vcpu))
10300 kvm_inject_pending_timer_irqs(vcpu);
10302 if (dm_request_for_irq_injection(vcpu) &&
10303 kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
10305 vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
10306 ++vcpu->stat.request_irq_exits;
10310 if (__xfer_to_guest_mode_work_pending()) {
10311 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
10312 r = xfer_to_guest_mode_handle_work(vcpu);
10315 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
10319 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
10324 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
10328 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
10329 r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
10330 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
10334 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
10336 BUG_ON(!vcpu->arch.pio.count);
10338 return complete_emulated_io(vcpu);
10342 * Implements the following, as a state machine:
10345 * for each fragment
10346 * for each mmio piece in the fragment
10353 * for each fragment
10354 * for each mmio piece in the fragment
10359 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
10361 struct kvm_run *run = vcpu->run;
10362 struct kvm_mmio_fragment *frag;
10365 BUG_ON(!vcpu->mmio_needed);
10367 /* Complete previous fragment */
10368 frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
10369 len = min(8u, frag->len);
10370 if (!vcpu->mmio_is_write)
10371 memcpy(frag->data, run->mmio.data, len);
10373 if (frag->len <= 8) {
10374 /* Switch to the next fragment. */
10376 vcpu->mmio_cur_fragment++;
10378 /* Go forward to the next mmio piece. */
10384 if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
10385 vcpu->mmio_needed = 0;
10387 /* FIXME: return into emulator if single-stepping. */
10388 if (vcpu->mmio_is_write)
10390 vcpu->mmio_read_completed = 1;
10391 return complete_emulated_io(vcpu);
10394 run->exit_reason = KVM_EXIT_MMIO;
10395 run->mmio.phys_addr = frag->gpa;
10396 if (vcpu->mmio_is_write)
10397 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
10398 run->mmio.len = min(8u, frag->len);
10399 run->mmio.is_write = vcpu->mmio_is_write;
10400 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
10404 /* Swap (qemu) user FPU context for the guest FPU context. */
10405 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
10408 * Exclude PKRU from restore as restored separately in
10409 * kvm_x86_ops.run().
10411 fpu_swap_kvm_fpstate(&vcpu->arch.guest_fpu, true);
10415 /* When vcpu_run ends, restore user space FPU context. */
10416 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
10418 fpu_swap_kvm_fpstate(&vcpu->arch.guest_fpu, false);
10419 ++vcpu->stat.fpu_reload;
10423 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
10425 struct kvm_run *kvm_run = vcpu->run;
10429 kvm_sigset_activate(vcpu);
10430 kvm_run->flags = 0;
10431 kvm_load_guest_fpu(vcpu);
10433 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
10434 if (kvm_run->immediate_exit) {
10439 * It should be impossible for the hypervisor timer to be in
10440 * use before KVM has ever run the vCPU.
10442 WARN_ON_ONCE(kvm_lapic_hv_timer_in_use(vcpu));
10443 kvm_vcpu_block(vcpu);
10444 if (kvm_apic_accept_events(vcpu) < 0) {
10448 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
10450 if (signal_pending(current)) {
10452 kvm_run->exit_reason = KVM_EXIT_INTR;
10453 ++vcpu->stat.signal_exits;
10458 if ((kvm_run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) ||
10459 (kvm_run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)) {
10464 if (kvm_run->kvm_dirty_regs) {
10465 r = sync_regs(vcpu);
10470 /* re-sync apic's tpr */
10471 if (!lapic_in_kernel(vcpu)) {
10472 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
10478 if (unlikely(vcpu->arch.complete_userspace_io)) {
10479 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
10480 vcpu->arch.complete_userspace_io = NULL;
10485 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
10487 if (kvm_run->immediate_exit) {
10492 r = static_call(kvm_x86_vcpu_pre_run)(vcpu);
10496 r = vcpu_run(vcpu);
10499 kvm_put_guest_fpu(vcpu);
10500 if (kvm_run->kvm_valid_regs)
10502 post_kvm_run_save(vcpu);
10503 kvm_sigset_deactivate(vcpu);
10509 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10511 if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
10513 * We are here if userspace calls get_regs() in the middle of
10514 * instruction emulation. Registers state needs to be copied
10515 * back from emulation context to vcpu. Userspace shouldn't do
10516 * that usually, but some bad designed PV devices (vmware
10517 * backdoor interface) need this to work
10519 emulator_writeback_register_cache(vcpu->arch.emulate_ctxt);
10520 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
10522 regs->rax = kvm_rax_read(vcpu);
10523 regs->rbx = kvm_rbx_read(vcpu);
10524 regs->rcx = kvm_rcx_read(vcpu);
10525 regs->rdx = kvm_rdx_read(vcpu);
10526 regs->rsi = kvm_rsi_read(vcpu);
10527 regs->rdi = kvm_rdi_read(vcpu);
10528 regs->rsp = kvm_rsp_read(vcpu);
10529 regs->rbp = kvm_rbp_read(vcpu);
10530 #ifdef CONFIG_X86_64
10531 regs->r8 = kvm_r8_read(vcpu);
10532 regs->r9 = kvm_r9_read(vcpu);
10533 regs->r10 = kvm_r10_read(vcpu);
10534 regs->r11 = kvm_r11_read(vcpu);
10535 regs->r12 = kvm_r12_read(vcpu);
10536 regs->r13 = kvm_r13_read(vcpu);
10537 regs->r14 = kvm_r14_read(vcpu);
10538 regs->r15 = kvm_r15_read(vcpu);
10541 regs->rip = kvm_rip_read(vcpu);
10542 regs->rflags = kvm_get_rflags(vcpu);
10545 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10548 __get_regs(vcpu, regs);
10553 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10555 vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
10556 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
10558 kvm_rax_write(vcpu, regs->rax);
10559 kvm_rbx_write(vcpu, regs->rbx);
10560 kvm_rcx_write(vcpu, regs->rcx);
10561 kvm_rdx_write(vcpu, regs->rdx);
10562 kvm_rsi_write(vcpu, regs->rsi);
10563 kvm_rdi_write(vcpu, regs->rdi);
10564 kvm_rsp_write(vcpu, regs->rsp);
10565 kvm_rbp_write(vcpu, regs->rbp);
10566 #ifdef CONFIG_X86_64
10567 kvm_r8_write(vcpu, regs->r8);
10568 kvm_r9_write(vcpu, regs->r9);
10569 kvm_r10_write(vcpu, regs->r10);
10570 kvm_r11_write(vcpu, regs->r11);
10571 kvm_r12_write(vcpu, regs->r12);
10572 kvm_r13_write(vcpu, regs->r13);
10573 kvm_r14_write(vcpu, regs->r14);
10574 kvm_r15_write(vcpu, regs->r15);
10577 kvm_rip_write(vcpu, regs->rip);
10578 kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
10580 vcpu->arch.exception.pending = false;
10582 kvm_make_request(KVM_REQ_EVENT, vcpu);
10585 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10588 __set_regs(vcpu, regs);
10593 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
10595 struct kvm_segment cs;
10597 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
10601 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
10603 static void __get_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10605 struct desc_ptr dt;
10607 if (vcpu->arch.guest_state_protected)
10608 goto skip_protected_regs;
10610 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10611 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10612 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10613 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10614 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10615 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10617 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10618 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10620 static_call(kvm_x86_get_idt)(vcpu, &dt);
10621 sregs->idt.limit = dt.size;
10622 sregs->idt.base = dt.address;
10623 static_call(kvm_x86_get_gdt)(vcpu, &dt);
10624 sregs->gdt.limit = dt.size;
10625 sregs->gdt.base = dt.address;
10627 sregs->cr2 = vcpu->arch.cr2;
10628 sregs->cr3 = kvm_read_cr3(vcpu);
10630 skip_protected_regs:
10631 sregs->cr0 = kvm_read_cr0(vcpu);
10632 sregs->cr4 = kvm_read_cr4(vcpu);
10633 sregs->cr8 = kvm_get_cr8(vcpu);
10634 sregs->efer = vcpu->arch.efer;
10635 sregs->apic_base = kvm_get_apic_base(vcpu);
10638 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10640 __get_sregs_common(vcpu, sregs);
10642 if (vcpu->arch.guest_state_protected)
10645 if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
10646 set_bit(vcpu->arch.interrupt.nr,
10647 (unsigned long *)sregs->interrupt_bitmap);
10650 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
10654 __get_sregs_common(vcpu, (struct kvm_sregs *)sregs2);
10656 if (vcpu->arch.guest_state_protected)
10659 if (is_pae_paging(vcpu)) {
10660 for (i = 0 ; i < 4 ; i++)
10661 sregs2->pdptrs[i] = kvm_pdptr_read(vcpu, i);
10662 sregs2->flags |= KVM_SREGS2_FLAGS_PDPTRS_VALID;
10666 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
10667 struct kvm_sregs *sregs)
10670 __get_sregs(vcpu, sregs);
10675 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
10676 struct kvm_mp_state *mp_state)
10681 if (kvm_mpx_supported())
10682 kvm_load_guest_fpu(vcpu);
10684 r = kvm_apic_accept_events(vcpu);
10689 if ((vcpu->arch.mp_state == KVM_MP_STATE_HALTED ||
10690 vcpu->arch.mp_state == KVM_MP_STATE_AP_RESET_HOLD) &&
10691 vcpu->arch.pv.pv_unhalted)
10692 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
10694 mp_state->mp_state = vcpu->arch.mp_state;
10697 if (kvm_mpx_supported())
10698 kvm_put_guest_fpu(vcpu);
10703 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
10704 struct kvm_mp_state *mp_state)
10710 if (!lapic_in_kernel(vcpu) &&
10711 mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
10715 * KVM_MP_STATE_INIT_RECEIVED means the processor is in
10716 * INIT state; latched init should be reported using
10717 * KVM_SET_VCPU_EVENTS, so reject it here.
10719 if ((kvm_vcpu_latch_init(vcpu) || vcpu->arch.smi_pending) &&
10720 (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
10721 mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
10724 if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
10725 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
10726 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
10728 vcpu->arch.mp_state = mp_state->mp_state;
10729 kvm_make_request(KVM_REQ_EVENT, vcpu);
10737 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
10738 int reason, bool has_error_code, u32 error_code)
10740 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
10743 init_emulate_ctxt(vcpu);
10745 ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
10746 has_error_code, error_code);
10748 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
10749 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
10750 vcpu->run->internal.ndata = 0;
10754 kvm_rip_write(vcpu, ctxt->eip);
10755 kvm_set_rflags(vcpu, ctxt->eflags);
10758 EXPORT_SYMBOL_GPL(kvm_task_switch);
10760 static bool kvm_is_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10762 if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
10764 * When EFER.LME and CR0.PG are set, the processor is in
10765 * 64-bit mode (though maybe in a 32-bit code segment).
10766 * CR4.PAE and EFER.LMA must be set.
10768 if (!(sregs->cr4 & X86_CR4_PAE) || !(sregs->efer & EFER_LMA))
10770 if (kvm_vcpu_is_illegal_gpa(vcpu, sregs->cr3))
10774 * Not in 64-bit mode: EFER.LMA is clear and the code
10775 * segment cannot be 64-bit.
10777 if (sregs->efer & EFER_LMA || sregs->cs.l)
10781 return kvm_is_valid_cr4(vcpu, sregs->cr4);
10784 static int __set_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs,
10785 int *mmu_reset_needed, bool update_pdptrs)
10787 struct msr_data apic_base_msr;
10789 struct desc_ptr dt;
10791 if (!kvm_is_valid_sregs(vcpu, sregs))
10794 apic_base_msr.data = sregs->apic_base;
10795 apic_base_msr.host_initiated = true;
10796 if (kvm_set_apic_base(vcpu, &apic_base_msr))
10799 if (vcpu->arch.guest_state_protected)
10802 dt.size = sregs->idt.limit;
10803 dt.address = sregs->idt.base;
10804 static_call(kvm_x86_set_idt)(vcpu, &dt);
10805 dt.size = sregs->gdt.limit;
10806 dt.address = sregs->gdt.base;
10807 static_call(kvm_x86_set_gdt)(vcpu, &dt);
10809 vcpu->arch.cr2 = sregs->cr2;
10810 *mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
10811 vcpu->arch.cr3 = sregs->cr3;
10812 kvm_register_mark_dirty(vcpu, VCPU_EXREG_CR3);
10813 static_call_cond(kvm_x86_post_set_cr3)(vcpu, sregs->cr3);
10815 kvm_set_cr8(vcpu, sregs->cr8);
10817 *mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
10818 static_call(kvm_x86_set_efer)(vcpu, sregs->efer);
10820 *mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
10821 static_call(kvm_x86_set_cr0)(vcpu, sregs->cr0);
10822 vcpu->arch.cr0 = sregs->cr0;
10824 *mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
10825 static_call(kvm_x86_set_cr4)(vcpu, sregs->cr4);
10827 if (update_pdptrs) {
10828 idx = srcu_read_lock(&vcpu->kvm->srcu);
10829 if (is_pae_paging(vcpu)) {
10830 load_pdptrs(vcpu, kvm_read_cr3(vcpu));
10831 *mmu_reset_needed = 1;
10833 srcu_read_unlock(&vcpu->kvm->srcu, idx);
10836 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10837 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10838 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10839 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10840 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10841 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10843 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10844 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10846 update_cr8_intercept(vcpu);
10848 /* Older userspace won't unhalt the vcpu on reset. */
10849 if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
10850 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
10851 !is_protmode(vcpu))
10852 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10857 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10859 int pending_vec, max_bits;
10860 int mmu_reset_needed = 0;
10861 int ret = __set_sregs_common(vcpu, sregs, &mmu_reset_needed, true);
10866 if (mmu_reset_needed)
10867 kvm_mmu_reset_context(vcpu);
10869 max_bits = KVM_NR_INTERRUPTS;
10870 pending_vec = find_first_bit(
10871 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
10873 if (pending_vec < max_bits) {
10874 kvm_queue_interrupt(vcpu, pending_vec, false);
10875 pr_debug("Set back pending irq %d\n", pending_vec);
10876 kvm_make_request(KVM_REQ_EVENT, vcpu);
10881 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
10883 int mmu_reset_needed = 0;
10884 bool valid_pdptrs = sregs2->flags & KVM_SREGS2_FLAGS_PDPTRS_VALID;
10885 bool pae = (sregs2->cr0 & X86_CR0_PG) && (sregs2->cr4 & X86_CR4_PAE) &&
10886 !(sregs2->efer & EFER_LMA);
10889 if (sregs2->flags & ~KVM_SREGS2_FLAGS_PDPTRS_VALID)
10892 if (valid_pdptrs && (!pae || vcpu->arch.guest_state_protected))
10895 ret = __set_sregs_common(vcpu, (struct kvm_sregs *)sregs2,
10896 &mmu_reset_needed, !valid_pdptrs);
10900 if (valid_pdptrs) {
10901 for (i = 0; i < 4 ; i++)
10902 kvm_pdptr_write(vcpu, i, sregs2->pdptrs[i]);
10904 kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
10905 mmu_reset_needed = 1;
10906 vcpu->arch.pdptrs_from_userspace = true;
10908 if (mmu_reset_needed)
10909 kvm_mmu_reset_context(vcpu);
10913 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
10914 struct kvm_sregs *sregs)
10919 ret = __set_sregs(vcpu, sregs);
10924 static void kvm_arch_vcpu_guestdbg_update_apicv_inhibit(struct kvm *kvm)
10926 bool inhibit = false;
10927 struct kvm_vcpu *vcpu;
10930 down_write(&kvm->arch.apicv_update_lock);
10932 kvm_for_each_vcpu(i, vcpu, kvm) {
10933 if (vcpu->guest_debug & KVM_GUESTDBG_BLOCKIRQ) {
10938 __kvm_request_apicv_update(kvm, !inhibit, APICV_INHIBIT_REASON_BLOCKIRQ);
10939 up_write(&kvm->arch.apicv_update_lock);
10942 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
10943 struct kvm_guest_debug *dbg)
10945 unsigned long rflags;
10948 if (vcpu->arch.guest_state_protected)
10953 if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
10955 if (vcpu->arch.exception.pending)
10957 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
10958 kvm_queue_exception(vcpu, DB_VECTOR);
10960 kvm_queue_exception(vcpu, BP_VECTOR);
10964 * Read rflags as long as potentially injected trace flags are still
10967 rflags = kvm_get_rflags(vcpu);
10969 vcpu->guest_debug = dbg->control;
10970 if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
10971 vcpu->guest_debug = 0;
10973 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
10974 for (i = 0; i < KVM_NR_DB_REGS; ++i)
10975 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
10976 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
10978 for (i = 0; i < KVM_NR_DB_REGS; i++)
10979 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
10981 kvm_update_dr7(vcpu);
10983 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
10984 vcpu->arch.singlestep_rip = kvm_get_linear_rip(vcpu);
10987 * Trigger an rflags update that will inject or remove the trace
10990 kvm_set_rflags(vcpu, rflags);
10992 static_call(kvm_x86_update_exception_bitmap)(vcpu);
10994 kvm_arch_vcpu_guestdbg_update_apicv_inhibit(vcpu->kvm);
11004 * Translate a guest virtual address to a guest physical address.
11006 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
11007 struct kvm_translation *tr)
11009 unsigned long vaddr = tr->linear_address;
11015 idx = srcu_read_lock(&vcpu->kvm->srcu);
11016 gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
11017 srcu_read_unlock(&vcpu->kvm->srcu, idx);
11018 tr->physical_address = gpa;
11019 tr->valid = gpa != UNMAPPED_GVA;
11027 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
11029 struct fxregs_state *fxsave;
11031 if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
11036 fxsave = &vcpu->arch.guest_fpu.fpstate->regs.fxsave;
11037 memcpy(fpu->fpr, fxsave->st_space, 128);
11038 fpu->fcw = fxsave->cwd;
11039 fpu->fsw = fxsave->swd;
11040 fpu->ftwx = fxsave->twd;
11041 fpu->last_opcode = fxsave->fop;
11042 fpu->last_ip = fxsave->rip;
11043 fpu->last_dp = fxsave->rdp;
11044 memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
11050 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
11052 struct fxregs_state *fxsave;
11054 if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
11059 fxsave = &vcpu->arch.guest_fpu.fpstate->regs.fxsave;
11061 memcpy(fxsave->st_space, fpu->fpr, 128);
11062 fxsave->cwd = fpu->fcw;
11063 fxsave->swd = fpu->fsw;
11064 fxsave->twd = fpu->ftwx;
11065 fxsave->fop = fpu->last_opcode;
11066 fxsave->rip = fpu->last_ip;
11067 fxsave->rdp = fpu->last_dp;
11068 memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
11074 static void store_regs(struct kvm_vcpu *vcpu)
11076 BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
11078 if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
11079 __get_regs(vcpu, &vcpu->run->s.regs.regs);
11081 if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
11082 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
11084 if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
11085 kvm_vcpu_ioctl_x86_get_vcpu_events(
11086 vcpu, &vcpu->run->s.regs.events);
11089 static int sync_regs(struct kvm_vcpu *vcpu)
11091 if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
11092 __set_regs(vcpu, &vcpu->run->s.regs.regs);
11093 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
11095 if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
11096 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
11098 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
11100 if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
11101 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
11102 vcpu, &vcpu->run->s.regs.events))
11104 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
11110 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
11112 if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
11113 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
11114 "guest TSC will not be reliable\n");
11119 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
11124 vcpu->arch.last_vmentry_cpu = -1;
11125 vcpu->arch.regs_avail = ~0;
11126 vcpu->arch.regs_dirty = ~0;
11128 if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
11129 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
11131 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
11133 r = kvm_mmu_create(vcpu);
11137 if (irqchip_in_kernel(vcpu->kvm)) {
11138 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
11140 goto fail_mmu_destroy;
11141 if (kvm_apicv_activated(vcpu->kvm))
11142 vcpu->arch.apicv_active = true;
11144 static_branch_inc(&kvm_has_noapic_vcpu);
11148 page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO);
11150 goto fail_free_lapic;
11151 vcpu->arch.pio_data = page_address(page);
11153 vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
11154 GFP_KERNEL_ACCOUNT);
11155 if (!vcpu->arch.mce_banks)
11156 goto fail_free_pio_data;
11157 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
11159 if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
11160 GFP_KERNEL_ACCOUNT))
11161 goto fail_free_mce_banks;
11163 if (!alloc_emulate_ctxt(vcpu))
11164 goto free_wbinvd_dirty_mask;
11166 if (!fpu_alloc_guest_fpstate(&vcpu->arch.guest_fpu)) {
11167 pr_err("kvm: failed to allocate vcpu's fpu\n");
11168 goto free_emulate_ctxt;
11171 vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
11172 vcpu->arch.reserved_gpa_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu);
11174 vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
11176 kvm_async_pf_hash_reset(vcpu);
11177 kvm_pmu_init(vcpu);
11179 vcpu->arch.pending_external_vector = -1;
11180 vcpu->arch.preempted_in_kernel = false;
11182 #if IS_ENABLED(CONFIG_HYPERV)
11183 vcpu->arch.hv_root_tdp = INVALID_PAGE;
11186 r = static_call(kvm_x86_vcpu_create)(vcpu);
11188 goto free_guest_fpu;
11190 vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
11191 vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
11192 kvm_vcpu_mtrr_init(vcpu);
11194 kvm_set_tsc_khz(vcpu, max_tsc_khz);
11195 kvm_vcpu_reset(vcpu, false);
11196 kvm_init_mmu(vcpu);
11201 fpu_free_guest_fpstate(&vcpu->arch.guest_fpu);
11203 kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
11204 free_wbinvd_dirty_mask:
11205 free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
11206 fail_free_mce_banks:
11207 kfree(vcpu->arch.mce_banks);
11208 fail_free_pio_data:
11209 free_page((unsigned long)vcpu->arch.pio_data);
11211 kvm_free_lapic(vcpu);
11213 kvm_mmu_destroy(vcpu);
11217 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
11219 struct kvm *kvm = vcpu->kvm;
11221 if (mutex_lock_killable(&vcpu->mutex))
11224 kvm_synchronize_tsc(vcpu, 0);
11227 /* poll control enabled by default */
11228 vcpu->arch.msr_kvm_poll_control = 1;
11230 mutex_unlock(&vcpu->mutex);
11232 if (kvmclock_periodic_sync && vcpu->vcpu_idx == 0)
11233 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
11234 KVMCLOCK_SYNC_PERIOD);
11237 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
11241 kvmclock_reset(vcpu);
11243 static_call(kvm_x86_vcpu_free)(vcpu);
11245 kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
11246 free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
11247 fpu_free_guest_fpstate(&vcpu->arch.guest_fpu);
11249 kvm_hv_vcpu_uninit(vcpu);
11250 kvm_pmu_destroy(vcpu);
11251 kfree(vcpu->arch.mce_banks);
11252 kvm_free_lapic(vcpu);
11253 idx = srcu_read_lock(&vcpu->kvm->srcu);
11254 kvm_mmu_destroy(vcpu);
11255 srcu_read_unlock(&vcpu->kvm->srcu, idx);
11256 free_page((unsigned long)vcpu->arch.pio_data);
11257 kvfree(vcpu->arch.cpuid_entries);
11258 if (!lapic_in_kernel(vcpu))
11259 static_branch_dec(&kvm_has_noapic_vcpu);
11262 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
11264 struct kvm_cpuid_entry2 *cpuid_0x1;
11265 unsigned long old_cr0 = kvm_read_cr0(vcpu);
11266 unsigned long new_cr0;
11269 * Several of the "set" flows, e.g. ->set_cr0(), read other registers
11270 * to handle side effects. RESET emulation hits those flows and relies
11271 * on emulated/virtualized registers, including those that are loaded
11272 * into hardware, to be zeroed at vCPU creation. Use CRs as a sentinel
11273 * to detect improper or missing initialization.
11275 WARN_ON_ONCE(!init_event &&
11276 (old_cr0 || kvm_read_cr3(vcpu) || kvm_read_cr4(vcpu)));
11278 kvm_lapic_reset(vcpu, init_event);
11280 vcpu->arch.hflags = 0;
11282 vcpu->arch.smi_pending = 0;
11283 vcpu->arch.smi_count = 0;
11284 atomic_set(&vcpu->arch.nmi_queued, 0);
11285 vcpu->arch.nmi_pending = 0;
11286 vcpu->arch.nmi_injected = false;
11287 kvm_clear_interrupt_queue(vcpu);
11288 kvm_clear_exception_queue(vcpu);
11290 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
11291 kvm_update_dr0123(vcpu);
11292 vcpu->arch.dr6 = DR6_ACTIVE_LOW;
11293 vcpu->arch.dr7 = DR7_FIXED_1;
11294 kvm_update_dr7(vcpu);
11296 vcpu->arch.cr2 = 0;
11298 kvm_make_request(KVM_REQ_EVENT, vcpu);
11299 vcpu->arch.apf.msr_en_val = 0;
11300 vcpu->arch.apf.msr_int_val = 0;
11301 vcpu->arch.st.msr_val = 0;
11303 kvmclock_reset(vcpu);
11305 kvm_clear_async_pf_completion_queue(vcpu);
11306 kvm_async_pf_hash_reset(vcpu);
11307 vcpu->arch.apf.halted = false;
11309 if (vcpu->arch.guest_fpu.fpstate && kvm_mpx_supported()) {
11310 struct fpstate *fpstate = vcpu->arch.guest_fpu.fpstate;
11313 * To avoid have the INIT path from kvm_apic_has_events() that be
11314 * called with loaded FPU and does not let userspace fix the state.
11317 kvm_put_guest_fpu(vcpu);
11319 fpstate_clear_xstate_component(fpstate, XFEATURE_BNDREGS);
11320 fpstate_clear_xstate_component(fpstate, XFEATURE_BNDCSR);
11323 kvm_load_guest_fpu(vcpu);
11327 kvm_pmu_reset(vcpu);
11328 vcpu->arch.smbase = 0x30000;
11330 vcpu->arch.msr_misc_features_enables = 0;
11332 __kvm_set_xcr(vcpu, 0, XFEATURE_MASK_FP);
11333 __kvm_set_msr(vcpu, MSR_IA32_XSS, 0, true);
11336 /* All GPRs except RDX (handled below) are zeroed on RESET/INIT. */
11337 memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
11338 kvm_register_mark_dirty(vcpu, VCPU_REGS_RSP);
11341 * Fall back to KVM's default Family/Model/Stepping of 0x600 (P6/Athlon)
11342 * if no CPUID match is found. Note, it's impossible to get a match at
11343 * RESET since KVM emulates RESET before exposing the vCPU to userspace,
11344 * i.e. it's impossible for kvm_find_cpuid_entry() to find a valid entry
11345 * on RESET. But, go through the motions in case that's ever remedied.
11347 cpuid_0x1 = kvm_find_cpuid_entry(vcpu, 1, 0);
11348 kvm_rdx_write(vcpu, cpuid_0x1 ? cpuid_0x1->eax : 0x600);
11350 static_call(kvm_x86_vcpu_reset)(vcpu, init_event);
11352 kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
11353 kvm_rip_write(vcpu, 0xfff0);
11355 vcpu->arch.cr3 = 0;
11356 kvm_register_mark_dirty(vcpu, VCPU_EXREG_CR3);
11359 * CR0.CD/NW are set on RESET, preserved on INIT. Note, some versions
11360 * of Intel's SDM list CD/NW as being set on INIT, but they contradict
11361 * (or qualify) that with a footnote stating that CD/NW are preserved.
11363 new_cr0 = X86_CR0_ET;
11365 new_cr0 |= (old_cr0 & (X86_CR0_NW | X86_CR0_CD));
11367 new_cr0 |= X86_CR0_NW | X86_CR0_CD;
11369 static_call(kvm_x86_set_cr0)(vcpu, new_cr0);
11370 static_call(kvm_x86_set_cr4)(vcpu, 0);
11371 static_call(kvm_x86_set_efer)(vcpu, 0);
11372 static_call(kvm_x86_update_exception_bitmap)(vcpu);
11375 * Reset the MMU context if paging was enabled prior to INIT (which is
11376 * implied if CR0.PG=1 as CR0 will be '0' prior to RESET). Unlike the
11377 * standard CR0/CR4/EFER modification paths, only CR0.PG needs to be
11378 * checked because it is unconditionally cleared on INIT and all other
11379 * paging related bits are ignored if paging is disabled, i.e. CR0.WP,
11380 * CR4, and EFER changes are all irrelevant if CR0.PG was '0'.
11382 if (old_cr0 & X86_CR0_PG)
11383 kvm_mmu_reset_context(vcpu);
11386 * Intel's SDM states that all TLB entries are flushed on INIT. AMD's
11387 * APM states the TLBs are untouched by INIT, but it also states that
11388 * the TLBs are flushed on "External initialization of the processor."
11389 * Flush the guest TLB regardless of vendor, there is no meaningful
11390 * benefit in relying on the guest to flush the TLB immediately after
11391 * INIT. A spurious TLB flush is benign and likely negligible from a
11392 * performance perspective.
11395 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
11397 EXPORT_SYMBOL_GPL(kvm_vcpu_reset);
11399 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
11401 struct kvm_segment cs;
11403 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
11404 cs.selector = vector << 8;
11405 cs.base = vector << 12;
11406 kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
11407 kvm_rip_write(vcpu, 0);
11409 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector);
11411 int kvm_arch_hardware_enable(void)
11414 struct kvm_vcpu *vcpu;
11419 bool stable, backwards_tsc = false;
11421 kvm_user_return_msr_cpu_online();
11422 ret = static_call(kvm_x86_hardware_enable)();
11426 local_tsc = rdtsc();
11427 stable = !kvm_check_tsc_unstable();
11428 list_for_each_entry(kvm, &vm_list, vm_list) {
11429 kvm_for_each_vcpu(i, vcpu, kvm) {
11430 if (!stable && vcpu->cpu == smp_processor_id())
11431 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
11432 if (stable && vcpu->arch.last_host_tsc > local_tsc) {
11433 backwards_tsc = true;
11434 if (vcpu->arch.last_host_tsc > max_tsc)
11435 max_tsc = vcpu->arch.last_host_tsc;
11441 * Sometimes, even reliable TSCs go backwards. This happens on
11442 * platforms that reset TSC during suspend or hibernate actions, but
11443 * maintain synchronization. We must compensate. Fortunately, we can
11444 * detect that condition here, which happens early in CPU bringup,
11445 * before any KVM threads can be running. Unfortunately, we can't
11446 * bring the TSCs fully up to date with real time, as we aren't yet far
11447 * enough into CPU bringup that we know how much real time has actually
11448 * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
11449 * variables that haven't been updated yet.
11451 * So we simply find the maximum observed TSC above, then record the
11452 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
11453 * the adjustment will be applied. Note that we accumulate
11454 * adjustments, in case multiple suspend cycles happen before some VCPU
11455 * gets a chance to run again. In the event that no KVM threads get a
11456 * chance to run, we will miss the entire elapsed period, as we'll have
11457 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
11458 * loose cycle time. This isn't too big a deal, since the loss will be
11459 * uniform across all VCPUs (not to mention the scenario is extremely
11460 * unlikely). It is possible that a second hibernate recovery happens
11461 * much faster than a first, causing the observed TSC here to be
11462 * smaller; this would require additional padding adjustment, which is
11463 * why we set last_host_tsc to the local tsc observed here.
11465 * N.B. - this code below runs only on platforms with reliable TSC,
11466 * as that is the only way backwards_tsc is set above. Also note
11467 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
11468 * have the same delta_cyc adjustment applied if backwards_tsc
11469 * is detected. Note further, this adjustment is only done once,
11470 * as we reset last_host_tsc on all VCPUs to stop this from being
11471 * called multiple times (one for each physical CPU bringup).
11473 * Platforms with unreliable TSCs don't have to deal with this, they
11474 * will be compensated by the logic in vcpu_load, which sets the TSC to
11475 * catchup mode. This will catchup all VCPUs to real time, but cannot
11476 * guarantee that they stay in perfect synchronization.
11478 if (backwards_tsc) {
11479 u64 delta_cyc = max_tsc - local_tsc;
11480 list_for_each_entry(kvm, &vm_list, vm_list) {
11481 kvm->arch.backwards_tsc_observed = true;
11482 kvm_for_each_vcpu(i, vcpu, kvm) {
11483 vcpu->arch.tsc_offset_adjustment += delta_cyc;
11484 vcpu->arch.last_host_tsc = local_tsc;
11485 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
11489 * We have to disable TSC offset matching.. if you were
11490 * booting a VM while issuing an S4 host suspend....
11491 * you may have some problem. Solving this issue is
11492 * left as an exercise to the reader.
11494 kvm->arch.last_tsc_nsec = 0;
11495 kvm->arch.last_tsc_write = 0;
11502 void kvm_arch_hardware_disable(void)
11504 static_call(kvm_x86_hardware_disable)();
11505 drop_user_return_notifiers();
11508 int kvm_arch_hardware_setup(void *opaque)
11510 struct kvm_x86_init_ops *ops = opaque;
11513 rdmsrl_safe(MSR_EFER, &host_efer);
11515 if (boot_cpu_has(X86_FEATURE_XSAVES))
11516 rdmsrl(MSR_IA32_XSS, host_xss);
11518 r = ops->hardware_setup();
11522 memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops));
11523 kvm_ops_static_call_update();
11525 if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
11528 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
11529 cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
11530 #undef __kvm_cpu_cap_has
11532 if (kvm_has_tsc_control) {
11534 * Make sure the user can only configure tsc_khz values that
11535 * fit into a signed integer.
11536 * A min value is not calculated because it will always
11537 * be 1 on all machines.
11539 u64 max = min(0x7fffffffULL,
11540 __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
11541 kvm_max_guest_tsc_khz = max;
11543 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
11546 kvm_init_msr_list();
11550 void kvm_arch_hardware_unsetup(void)
11552 static_call(kvm_x86_hardware_unsetup)();
11555 int kvm_arch_check_processor_compat(void *opaque)
11557 struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
11558 struct kvm_x86_init_ops *ops = opaque;
11560 WARN_ON(!irqs_disabled());
11562 if (__cr4_reserved_bits(cpu_has, c) !=
11563 __cr4_reserved_bits(cpu_has, &boot_cpu_data))
11566 return ops->check_processor_compatibility();
11569 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
11571 return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
11573 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
11575 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
11577 return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
11580 __read_mostly DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu);
11581 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu);
11583 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
11585 struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
11587 vcpu->arch.l1tf_flush_l1d = true;
11588 if (pmu->version && unlikely(pmu->event_count)) {
11589 pmu->need_cleanup = true;
11590 kvm_make_request(KVM_REQ_PMU, vcpu);
11592 static_call(kvm_x86_sched_in)(vcpu, cpu);
11595 void kvm_arch_free_vm(struct kvm *kvm)
11597 kfree(to_kvm_hv(kvm)->hv_pa_pg);
11598 __kvm_arch_free_vm(kvm);
11602 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
11605 unsigned long flags;
11610 ret = kvm_page_track_init(kvm);
11614 INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
11615 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
11616 INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
11617 INIT_LIST_HEAD(&kvm->arch.lpage_disallowed_mmu_pages);
11618 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
11619 atomic_set(&kvm->arch.noncoherent_dma_count, 0);
11621 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
11622 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
11623 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
11624 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
11625 &kvm->arch.irq_sources_bitmap);
11627 raw_spin_lock_init(&kvm->arch.tsc_write_lock);
11628 mutex_init(&kvm->arch.apic_map_lock);
11629 seqcount_raw_spinlock_init(&kvm->arch.pvclock_sc, &kvm->arch.tsc_write_lock);
11630 kvm->arch.kvmclock_offset = -get_kvmclock_base_ns();
11632 raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
11633 pvclock_update_vm_gtod_copy(kvm);
11634 raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
11636 kvm->arch.guest_can_read_msr_platform_info = true;
11638 #if IS_ENABLED(CONFIG_HYPERV)
11639 spin_lock_init(&kvm->arch.hv_root_tdp_lock);
11640 kvm->arch.hv_root_tdp = INVALID_PAGE;
11643 INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
11644 INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
11646 kvm_apicv_init(kvm);
11647 kvm_hv_init_vm(kvm);
11648 kvm_mmu_init_vm(kvm);
11649 kvm_xen_init_vm(kvm);
11651 return static_call(kvm_x86_vm_init)(kvm);
11654 int kvm_arch_post_init_vm(struct kvm *kvm)
11656 return kvm_mmu_post_init_vm(kvm);
11659 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
11662 kvm_mmu_unload(vcpu);
11666 static void kvm_free_vcpus(struct kvm *kvm)
11669 struct kvm_vcpu *vcpu;
11672 * Unpin any mmu pages first.
11674 kvm_for_each_vcpu(i, vcpu, kvm) {
11675 kvm_clear_async_pf_completion_queue(vcpu);
11676 kvm_unload_vcpu_mmu(vcpu);
11679 kvm_destroy_vcpus(kvm);
11682 void kvm_arch_sync_events(struct kvm *kvm)
11684 cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
11685 cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
11690 * __x86_set_memory_region: Setup KVM internal memory slot
11692 * @kvm: the kvm pointer to the VM.
11693 * @id: the slot ID to setup.
11694 * @gpa: the GPA to install the slot (unused when @size == 0).
11695 * @size: the size of the slot. Set to zero to uninstall a slot.
11697 * This function helps to setup a KVM internal memory slot. Specify
11698 * @size > 0 to install a new slot, while @size == 0 to uninstall a
11699 * slot. The return code can be one of the following:
11701 * HVA: on success (uninstall will return a bogus HVA)
11704 * The caller should always use IS_ERR() to check the return value
11705 * before use. Note, the KVM internal memory slots are guaranteed to
11706 * remain valid and unchanged until the VM is destroyed, i.e., the
11707 * GPA->HVA translation will not change. However, the HVA is a user
11708 * address, i.e. its accessibility is not guaranteed, and must be
11709 * accessed via __copy_{to,from}_user().
11711 void __user * __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
11715 unsigned long hva, old_npages;
11716 struct kvm_memslots *slots = kvm_memslots(kvm);
11717 struct kvm_memory_slot *slot;
11719 /* Called with kvm->slots_lock held. */
11720 if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
11721 return ERR_PTR_USR(-EINVAL);
11723 slot = id_to_memslot(slots, id);
11725 if (slot && slot->npages)
11726 return ERR_PTR_USR(-EEXIST);
11729 * MAP_SHARED to prevent internal slot pages from being moved
11732 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
11733 MAP_SHARED | MAP_ANONYMOUS, 0);
11734 if (IS_ERR((void *)hva))
11735 return (void __user *)hva;
11737 if (!slot || !slot->npages)
11740 old_npages = slot->npages;
11741 hva = slot->userspace_addr;
11744 for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
11745 struct kvm_userspace_memory_region m;
11747 m.slot = id | (i << 16);
11749 m.guest_phys_addr = gpa;
11750 m.userspace_addr = hva;
11751 m.memory_size = size;
11752 r = __kvm_set_memory_region(kvm, &m);
11754 return ERR_PTR_USR(r);
11758 vm_munmap(hva, old_npages * PAGE_SIZE);
11760 return (void __user *)hva;
11762 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
11764 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
11766 kvm_mmu_pre_destroy_vm(kvm);
11769 void kvm_arch_destroy_vm(struct kvm *kvm)
11771 if (current->mm == kvm->mm) {
11773 * Free memory regions allocated on behalf of userspace,
11774 * unless the the memory map has changed due to process exit
11777 mutex_lock(&kvm->slots_lock);
11778 __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
11780 __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
11782 __x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
11783 mutex_unlock(&kvm->slots_lock);
11785 static_call_cond(kvm_x86_vm_destroy)(kvm);
11786 kvm_free_msr_filter(srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1));
11787 kvm_pic_destroy(kvm);
11788 kvm_ioapic_destroy(kvm);
11789 kvm_free_vcpus(kvm);
11790 kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
11791 kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
11792 kvm_mmu_uninit_vm(kvm);
11793 kvm_page_track_cleanup(kvm);
11794 kvm_xen_destroy_vm(kvm);
11795 kvm_hv_destroy_vm(kvm);
11798 static void memslot_rmap_free(struct kvm_memory_slot *slot)
11802 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11803 kvfree(slot->arch.rmap[i]);
11804 slot->arch.rmap[i] = NULL;
11808 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
11812 memslot_rmap_free(slot);
11814 for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11815 kvfree(slot->arch.lpage_info[i - 1]);
11816 slot->arch.lpage_info[i - 1] = NULL;
11819 kvm_page_track_free_memslot(slot);
11822 int memslot_rmap_alloc(struct kvm_memory_slot *slot, unsigned long npages)
11824 const int sz = sizeof(*slot->arch.rmap[0]);
11827 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11829 int lpages = __kvm_mmu_slot_lpages(slot, npages, level);
11831 if (slot->arch.rmap[i])
11834 slot->arch.rmap[i] = kvcalloc(lpages, sz, GFP_KERNEL_ACCOUNT);
11835 if (!slot->arch.rmap[i]) {
11836 memslot_rmap_free(slot);
11844 static int kvm_alloc_memslot_metadata(struct kvm *kvm,
11845 struct kvm_memory_slot *slot)
11847 unsigned long npages = slot->npages;
11851 * Clear out the previous array pointers for the KVM_MR_MOVE case. The
11852 * old arrays will be freed by __kvm_set_memory_region() if installing
11853 * the new memslot is successful.
11855 memset(&slot->arch, 0, sizeof(slot->arch));
11857 if (kvm_memslots_have_rmaps(kvm)) {
11858 r = memslot_rmap_alloc(slot, npages);
11863 for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11864 struct kvm_lpage_info *linfo;
11865 unsigned long ugfn;
11869 lpages = __kvm_mmu_slot_lpages(slot, npages, level);
11871 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
11875 slot->arch.lpage_info[i - 1] = linfo;
11877 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
11878 linfo[0].disallow_lpage = 1;
11879 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
11880 linfo[lpages - 1].disallow_lpage = 1;
11881 ugfn = slot->userspace_addr >> PAGE_SHIFT;
11883 * If the gfn and userspace address are not aligned wrt each
11884 * other, disable large page support for this slot.
11886 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1)) {
11889 for (j = 0; j < lpages; ++j)
11890 linfo[j].disallow_lpage = 1;
11894 if (kvm_page_track_create_memslot(kvm, slot, npages))
11900 memslot_rmap_free(slot);
11902 for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11903 kvfree(slot->arch.lpage_info[i - 1]);
11904 slot->arch.lpage_info[i - 1] = NULL;
11909 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
11911 struct kvm_vcpu *vcpu;
11915 * memslots->generation has been incremented.
11916 * mmio generation may have reached its maximum value.
11918 kvm_mmu_invalidate_mmio_sptes(kvm, gen);
11920 /* Force re-initialization of steal_time cache */
11921 kvm_for_each_vcpu(i, vcpu, kvm)
11922 kvm_vcpu_kick(vcpu);
11925 int kvm_arch_prepare_memory_region(struct kvm *kvm,
11926 const struct kvm_memory_slot *old,
11927 struct kvm_memory_slot *new,
11928 enum kvm_mr_change change)
11930 if (change == KVM_MR_CREATE || change == KVM_MR_MOVE)
11931 return kvm_alloc_memslot_metadata(kvm, new);
11933 if (change == KVM_MR_FLAGS_ONLY)
11934 memcpy(&new->arch, &old->arch, sizeof(old->arch));
11935 else if (WARN_ON_ONCE(change != KVM_MR_DELETE))
11942 static void kvm_mmu_update_cpu_dirty_logging(struct kvm *kvm, bool enable)
11944 struct kvm_arch *ka = &kvm->arch;
11946 if (!kvm_x86_ops.cpu_dirty_log_size)
11949 if ((enable && ++ka->cpu_dirty_logging_count == 1) ||
11950 (!enable && --ka->cpu_dirty_logging_count == 0))
11951 kvm_make_all_cpus_request(kvm, KVM_REQ_UPDATE_CPU_DIRTY_LOGGING);
11953 WARN_ON_ONCE(ka->cpu_dirty_logging_count < 0);
11956 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
11957 struct kvm_memory_slot *old,
11958 const struct kvm_memory_slot *new,
11959 enum kvm_mr_change change)
11961 u32 old_flags = old ? old->flags : 0;
11962 u32 new_flags = new ? new->flags : 0;
11963 bool log_dirty_pages = new_flags & KVM_MEM_LOG_DIRTY_PAGES;
11966 * Update CPU dirty logging if dirty logging is being toggled. This
11967 * applies to all operations.
11969 if ((old_flags ^ new_flags) & KVM_MEM_LOG_DIRTY_PAGES)
11970 kvm_mmu_update_cpu_dirty_logging(kvm, log_dirty_pages);
11973 * Nothing more to do for RO slots (which can't be dirtied and can't be
11974 * made writable) or CREATE/MOVE/DELETE of a slot.
11976 * For a memslot with dirty logging disabled:
11977 * CREATE: No dirty mappings will already exist.
11978 * MOVE/DELETE: The old mappings will already have been cleaned up by
11979 * kvm_arch_flush_shadow_memslot()
11981 * For a memslot with dirty logging enabled:
11982 * CREATE: No shadow pages exist, thus nothing to write-protect
11983 * and no dirty bits to clear.
11984 * MOVE/DELETE: The old mappings will already have been cleaned up by
11985 * kvm_arch_flush_shadow_memslot().
11987 if ((change != KVM_MR_FLAGS_ONLY) || (new_flags & KVM_MEM_READONLY))
11991 * READONLY and non-flags changes were filtered out above, and the only
11992 * other flag is LOG_DIRTY_PAGES, i.e. something is wrong if dirty
11993 * logging isn't being toggled on or off.
11995 if (WARN_ON_ONCE(!((old_flags ^ new_flags) & KVM_MEM_LOG_DIRTY_PAGES)))
11998 if (!log_dirty_pages) {
12000 * Dirty logging tracks sptes in 4k granularity, meaning that
12001 * large sptes have to be split. If live migration succeeds,
12002 * the guest in the source machine will be destroyed and large
12003 * sptes will be created in the destination. However, if the
12004 * guest continues to run in the source machine (for example if
12005 * live migration fails), small sptes will remain around and
12006 * cause bad performance.
12008 * Scan sptes if dirty logging has been stopped, dropping those
12009 * which can be collapsed into a single large-page spte. Later
12010 * page faults will create the large-page sptes.
12012 kvm_mmu_zap_collapsible_sptes(kvm, new);
12015 * Initially-all-set does not require write protecting any page,
12016 * because they're all assumed to be dirty.
12018 if (kvm_dirty_log_manual_protect_and_init_set(kvm))
12021 if (kvm_x86_ops.cpu_dirty_log_size) {
12022 kvm_mmu_slot_leaf_clear_dirty(kvm, new);
12023 kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_2M);
12025 kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_4K);
12030 void kvm_arch_commit_memory_region(struct kvm *kvm,
12031 struct kvm_memory_slot *old,
12032 const struct kvm_memory_slot *new,
12033 enum kvm_mr_change change)
12035 if (!kvm->arch.n_requested_mmu_pages &&
12036 (change == KVM_MR_CREATE || change == KVM_MR_DELETE)) {
12037 unsigned long nr_mmu_pages;
12039 nr_mmu_pages = kvm->nr_memslot_pages / KVM_MEMSLOT_PAGES_TO_MMU_PAGES_RATIO;
12040 nr_mmu_pages = max(nr_mmu_pages, KVM_MIN_ALLOC_MMU_PAGES);
12041 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
12044 kvm_mmu_slot_apply_flags(kvm, old, new, change);
12046 /* Free the arrays associated with the old memslot. */
12047 if (change == KVM_MR_MOVE)
12048 kvm_arch_free_memslot(kvm, old);
12051 void kvm_arch_flush_shadow_all(struct kvm *kvm)
12053 kvm_mmu_zap_all(kvm);
12056 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
12057 struct kvm_memory_slot *slot)
12059 kvm_page_track_flush_slot(kvm, slot);
12062 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
12064 return (is_guest_mode(vcpu) &&
12065 kvm_x86_ops.guest_apic_has_interrupt &&
12066 static_call(kvm_x86_guest_apic_has_interrupt)(vcpu));
12069 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
12071 if (!list_empty_careful(&vcpu->async_pf.done))
12074 if (kvm_apic_has_events(vcpu))
12077 if (vcpu->arch.pv.pv_unhalted)
12080 if (vcpu->arch.exception.pending)
12083 if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
12084 (vcpu->arch.nmi_pending &&
12085 static_call(kvm_x86_nmi_allowed)(vcpu, false)))
12088 if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
12089 (vcpu->arch.smi_pending &&
12090 static_call(kvm_x86_smi_allowed)(vcpu, false)))
12093 if (kvm_arch_interrupt_allowed(vcpu) &&
12094 (kvm_cpu_has_interrupt(vcpu) ||
12095 kvm_guest_apic_has_interrupt(vcpu)))
12098 if (kvm_hv_has_stimer_pending(vcpu))
12101 if (is_guest_mode(vcpu) &&
12102 kvm_x86_ops.nested_ops->hv_timer_pending &&
12103 kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
12109 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
12111 return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
12114 bool kvm_arch_dy_has_pending_interrupt(struct kvm_vcpu *vcpu)
12116 if (vcpu->arch.apicv_active && static_call(kvm_x86_dy_apicv_has_pending_interrupt)(vcpu))
12122 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
12124 if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
12127 if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
12128 kvm_test_request(KVM_REQ_SMI, vcpu) ||
12129 kvm_test_request(KVM_REQ_EVENT, vcpu))
12132 return kvm_arch_dy_has_pending_interrupt(vcpu);
12135 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
12137 if (vcpu->arch.guest_state_protected)
12140 return vcpu->arch.preempted_in_kernel;
12143 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
12145 return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
12148 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
12150 return static_call(kvm_x86_interrupt_allowed)(vcpu, false);
12153 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
12155 /* Can't read the RIP when guest state is protected, just return 0 */
12156 if (vcpu->arch.guest_state_protected)
12159 if (is_64_bit_mode(vcpu))
12160 return kvm_rip_read(vcpu);
12161 return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
12162 kvm_rip_read(vcpu));
12164 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
12166 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
12168 return kvm_get_linear_rip(vcpu) == linear_rip;
12170 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
12172 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
12174 unsigned long rflags;
12176 rflags = static_call(kvm_x86_get_rflags)(vcpu);
12177 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
12178 rflags &= ~X86_EFLAGS_TF;
12181 EXPORT_SYMBOL_GPL(kvm_get_rflags);
12183 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
12185 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
12186 kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
12187 rflags |= X86_EFLAGS_TF;
12188 static_call(kvm_x86_set_rflags)(vcpu, rflags);
12191 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
12193 __kvm_set_rflags(vcpu, rflags);
12194 kvm_make_request(KVM_REQ_EVENT, vcpu);
12196 EXPORT_SYMBOL_GPL(kvm_set_rflags);
12198 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
12202 if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
12206 r = kvm_mmu_reload(vcpu);
12210 if (!vcpu->arch.mmu->direct_map &&
12211 work->arch.cr3 != vcpu->arch.mmu->get_guest_pgd(vcpu))
12214 kvm_mmu_do_page_fault(vcpu, work->cr2_or_gpa, 0, true);
12217 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
12219 BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU));
12221 return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
12224 static inline u32 kvm_async_pf_next_probe(u32 key)
12226 return (key + 1) & (ASYNC_PF_PER_VCPU - 1);
12229 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12231 u32 key = kvm_async_pf_hash_fn(gfn);
12233 while (vcpu->arch.apf.gfns[key] != ~0)
12234 key = kvm_async_pf_next_probe(key);
12236 vcpu->arch.apf.gfns[key] = gfn;
12239 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
12242 u32 key = kvm_async_pf_hash_fn(gfn);
12244 for (i = 0; i < ASYNC_PF_PER_VCPU &&
12245 (vcpu->arch.apf.gfns[key] != gfn &&
12246 vcpu->arch.apf.gfns[key] != ~0); i++)
12247 key = kvm_async_pf_next_probe(key);
12252 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12254 return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
12257 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12261 i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
12263 if (WARN_ON_ONCE(vcpu->arch.apf.gfns[i] != gfn))
12267 vcpu->arch.apf.gfns[i] = ~0;
12269 j = kvm_async_pf_next_probe(j);
12270 if (vcpu->arch.apf.gfns[j] == ~0)
12272 k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
12274 * k lies cyclically in ]i,j]
12276 * |....j i.k.| or |.k..j i...|
12278 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
12279 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
12284 static inline int apf_put_user_notpresent(struct kvm_vcpu *vcpu)
12286 u32 reason = KVM_PV_REASON_PAGE_NOT_PRESENT;
12288 return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &reason,
12292 static inline int apf_put_user_ready(struct kvm_vcpu *vcpu, u32 token)
12294 unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
12296 return kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
12297 &token, offset, sizeof(token));
12300 static inline bool apf_pageready_slot_free(struct kvm_vcpu *vcpu)
12302 unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
12305 if (kvm_read_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
12306 &val, offset, sizeof(val)))
12312 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
12314 if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
12317 if (!kvm_pv_async_pf_enabled(vcpu) ||
12318 (vcpu->arch.apf.send_user_only && static_call(kvm_x86_get_cpl)(vcpu) == 0))
12324 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
12326 if (unlikely(!lapic_in_kernel(vcpu) ||
12327 kvm_event_needs_reinjection(vcpu) ||
12328 vcpu->arch.exception.pending))
12331 if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
12335 * If interrupts are off we cannot even use an artificial
12338 return kvm_arch_interrupt_allowed(vcpu);
12341 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
12342 struct kvm_async_pf *work)
12344 struct x86_exception fault;
12346 trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
12347 kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
12349 if (kvm_can_deliver_async_pf(vcpu) &&
12350 !apf_put_user_notpresent(vcpu)) {
12351 fault.vector = PF_VECTOR;
12352 fault.error_code_valid = true;
12353 fault.error_code = 0;
12354 fault.nested_page_fault = false;
12355 fault.address = work->arch.token;
12356 fault.async_page_fault = true;
12357 kvm_inject_page_fault(vcpu, &fault);
12361 * It is not possible to deliver a paravirtualized asynchronous
12362 * page fault, but putting the guest in an artificial halt state
12363 * can be beneficial nevertheless: if an interrupt arrives, we
12364 * can deliver it timely and perhaps the guest will schedule
12365 * another process. When the instruction that triggered a page
12366 * fault is retried, hopefully the page will be ready in the host.
12368 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
12373 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
12374 struct kvm_async_pf *work)
12376 struct kvm_lapic_irq irq = {
12377 .delivery_mode = APIC_DM_FIXED,
12378 .vector = vcpu->arch.apf.vec
12381 if (work->wakeup_all)
12382 work->arch.token = ~0; /* broadcast wakeup */
12384 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
12385 trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
12387 if ((work->wakeup_all || work->notpresent_injected) &&
12388 kvm_pv_async_pf_enabled(vcpu) &&
12389 !apf_put_user_ready(vcpu, work->arch.token)) {
12390 vcpu->arch.apf.pageready_pending = true;
12391 kvm_apic_set_irq(vcpu, &irq, NULL);
12394 vcpu->arch.apf.halted = false;
12395 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
12398 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu)
12400 kvm_make_request(KVM_REQ_APF_READY, vcpu);
12401 if (!vcpu->arch.apf.pageready_pending)
12402 kvm_vcpu_kick(vcpu);
12405 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu)
12407 if (!kvm_pv_async_pf_enabled(vcpu))
12410 return kvm_lapic_enabled(vcpu) && apf_pageready_slot_free(vcpu);
12413 void kvm_arch_start_assignment(struct kvm *kvm)
12415 if (atomic_inc_return(&kvm->arch.assigned_device_count) == 1)
12416 static_call_cond(kvm_x86_start_assignment)(kvm);
12418 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
12420 void kvm_arch_end_assignment(struct kvm *kvm)
12422 atomic_dec(&kvm->arch.assigned_device_count);
12424 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
12426 bool kvm_arch_has_assigned_device(struct kvm *kvm)
12428 return atomic_read(&kvm->arch.assigned_device_count);
12430 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
12432 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
12434 atomic_inc(&kvm->arch.noncoherent_dma_count);
12436 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
12438 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
12440 atomic_dec(&kvm->arch.noncoherent_dma_count);
12442 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
12444 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
12446 return atomic_read(&kvm->arch.noncoherent_dma_count);
12448 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
12450 bool kvm_arch_has_irq_bypass(void)
12455 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
12456 struct irq_bypass_producer *prod)
12458 struct kvm_kernel_irqfd *irqfd =
12459 container_of(cons, struct kvm_kernel_irqfd, consumer);
12462 irqfd->producer = prod;
12463 kvm_arch_start_assignment(irqfd->kvm);
12464 ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm,
12465 prod->irq, irqfd->gsi, 1);
12468 kvm_arch_end_assignment(irqfd->kvm);
12473 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
12474 struct irq_bypass_producer *prod)
12477 struct kvm_kernel_irqfd *irqfd =
12478 container_of(cons, struct kvm_kernel_irqfd, consumer);
12480 WARN_ON(irqfd->producer != prod);
12481 irqfd->producer = NULL;
12484 * When producer of consumer is unregistered, we change back to
12485 * remapped mode, so we can re-use the current implementation
12486 * when the irq is masked/disabled or the consumer side (KVM
12487 * int this case doesn't want to receive the interrupts.
12489 ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm, prod->irq, irqfd->gsi, 0);
12491 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
12492 " fails: %d\n", irqfd->consumer.token, ret);
12494 kvm_arch_end_assignment(irqfd->kvm);
12497 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
12498 uint32_t guest_irq, bool set)
12500 return static_call(kvm_x86_update_pi_irte)(kvm, host_irq, guest_irq, set);
12503 bool kvm_arch_irqfd_route_changed(struct kvm_kernel_irq_routing_entry *old,
12504 struct kvm_kernel_irq_routing_entry *new)
12506 if (new->type != KVM_IRQ_ROUTING_MSI)
12509 return !!memcmp(&old->msi, &new->msi, sizeof(new->msi));
12512 bool kvm_vector_hashing_enabled(void)
12514 return vector_hashing;
12517 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
12519 return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
12521 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
12524 int kvm_spec_ctrl_test_value(u64 value)
12527 * test that setting IA32_SPEC_CTRL to given value
12528 * is allowed by the host processor
12532 unsigned long flags;
12535 local_irq_save(flags);
12537 if (rdmsrl_safe(MSR_IA32_SPEC_CTRL, &saved_value))
12539 else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value))
12542 wrmsrl(MSR_IA32_SPEC_CTRL, saved_value);
12544 local_irq_restore(flags);
12548 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value);
12550 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code)
12552 struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
12553 struct x86_exception fault;
12554 u32 access = error_code &
12555 (PFERR_WRITE_MASK | PFERR_FETCH_MASK | PFERR_USER_MASK);
12557 if (!(error_code & PFERR_PRESENT_MASK) ||
12558 mmu->gva_to_gpa(vcpu, mmu, gva, access, &fault) != UNMAPPED_GVA) {
12560 * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
12561 * tables probably do not match the TLB. Just proceed
12562 * with the error code that the processor gave.
12564 fault.vector = PF_VECTOR;
12565 fault.error_code_valid = true;
12566 fault.error_code = error_code;
12567 fault.nested_page_fault = false;
12568 fault.address = gva;
12570 vcpu->arch.walk_mmu->inject_page_fault(vcpu, &fault);
12572 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error);
12575 * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
12576 * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
12577 * indicates whether exit to userspace is needed.
12579 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
12580 struct x86_exception *e)
12582 if (r == X86EMUL_PROPAGATE_FAULT) {
12583 kvm_inject_emulated_page_fault(vcpu, e);
12588 * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
12589 * while handling a VMX instruction KVM could've handled the request
12590 * correctly by exiting to userspace and performing I/O but there
12591 * doesn't seem to be a real use-case behind such requests, just return
12592 * KVM_EXIT_INTERNAL_ERROR for now.
12594 kvm_prepare_emulation_failure_exit(vcpu);
12598 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure);
12600 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva)
12603 struct x86_exception e;
12610 r = kvm_read_guest_virt(vcpu, gva, &operand, sizeof(operand), &e);
12611 if (r != X86EMUL_CONTINUE)
12612 return kvm_handle_memory_failure(vcpu, r, &e);
12614 if (operand.pcid >> 12 != 0) {
12615 kvm_inject_gp(vcpu, 0);
12619 pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
12622 case INVPCID_TYPE_INDIV_ADDR:
12623 if ((!pcid_enabled && (operand.pcid != 0)) ||
12624 is_noncanonical_address(operand.gla, vcpu)) {
12625 kvm_inject_gp(vcpu, 0);
12628 kvm_mmu_invpcid_gva(vcpu, operand.gla, operand.pcid);
12629 return kvm_skip_emulated_instruction(vcpu);
12631 case INVPCID_TYPE_SINGLE_CTXT:
12632 if (!pcid_enabled && (operand.pcid != 0)) {
12633 kvm_inject_gp(vcpu, 0);
12637 kvm_invalidate_pcid(vcpu, operand.pcid);
12638 return kvm_skip_emulated_instruction(vcpu);
12640 case INVPCID_TYPE_ALL_NON_GLOBAL:
12642 * Currently, KVM doesn't mark global entries in the shadow
12643 * page tables, so a non-global flush just degenerates to a
12644 * global flush. If needed, we could optimize this later by
12645 * keeping track of global entries in shadow page tables.
12649 case INVPCID_TYPE_ALL_INCL_GLOBAL:
12650 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
12651 return kvm_skip_emulated_instruction(vcpu);
12654 kvm_inject_gp(vcpu, 0);
12658 EXPORT_SYMBOL_GPL(kvm_handle_invpcid);
12660 static int complete_sev_es_emulated_mmio(struct kvm_vcpu *vcpu)
12662 struct kvm_run *run = vcpu->run;
12663 struct kvm_mmio_fragment *frag;
12666 BUG_ON(!vcpu->mmio_needed);
12668 /* Complete previous fragment */
12669 frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
12670 len = min(8u, frag->len);
12671 if (!vcpu->mmio_is_write)
12672 memcpy(frag->data, run->mmio.data, len);
12674 if (frag->len <= 8) {
12675 /* Switch to the next fragment. */
12677 vcpu->mmio_cur_fragment++;
12679 /* Go forward to the next mmio piece. */
12685 if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
12686 vcpu->mmio_needed = 0;
12688 // VMG change, at this point, we're always done
12689 // RIP has already been advanced
12693 // More MMIO is needed
12694 run->mmio.phys_addr = frag->gpa;
12695 run->mmio.len = min(8u, frag->len);
12696 run->mmio.is_write = vcpu->mmio_is_write;
12697 if (run->mmio.is_write)
12698 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
12699 run->exit_reason = KVM_EXIT_MMIO;
12701 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12706 int kvm_sev_es_mmio_write(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12710 struct kvm_mmio_fragment *frag;
12715 handled = write_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12716 if (handled == bytes)
12723 /*TODO: Check if need to increment number of frags */
12724 frag = vcpu->mmio_fragments;
12725 vcpu->mmio_nr_fragments = 1;
12730 vcpu->mmio_needed = 1;
12731 vcpu->mmio_cur_fragment = 0;
12733 vcpu->run->mmio.phys_addr = gpa;
12734 vcpu->run->mmio.len = min(8u, frag->len);
12735 vcpu->run->mmio.is_write = 1;
12736 memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
12737 vcpu->run->exit_reason = KVM_EXIT_MMIO;
12739 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12743 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write);
12745 int kvm_sev_es_mmio_read(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12749 struct kvm_mmio_fragment *frag;
12754 handled = read_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12755 if (handled == bytes)
12762 /*TODO: Check if need to increment number of frags */
12763 frag = vcpu->mmio_fragments;
12764 vcpu->mmio_nr_fragments = 1;
12769 vcpu->mmio_needed = 1;
12770 vcpu->mmio_cur_fragment = 0;
12772 vcpu->run->mmio.phys_addr = gpa;
12773 vcpu->run->mmio.len = min(8u, frag->len);
12774 vcpu->run->mmio.is_write = 0;
12775 vcpu->run->exit_reason = KVM_EXIT_MMIO;
12777 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12781 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read);
12783 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
12784 unsigned int port);
12786 static int complete_sev_es_emulated_outs(struct kvm_vcpu *vcpu)
12788 int size = vcpu->arch.pio.size;
12789 int port = vcpu->arch.pio.port;
12791 vcpu->arch.pio.count = 0;
12792 if (vcpu->arch.sev_pio_count)
12793 return kvm_sev_es_outs(vcpu, size, port);
12797 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
12801 unsigned int count =
12802 min_t(unsigned int, PAGE_SIZE / size, vcpu->arch.sev_pio_count);
12803 int ret = emulator_pio_out(vcpu, size, port, vcpu->arch.sev_pio_data, count);
12805 /* memcpy done already by emulator_pio_out. */
12806 vcpu->arch.sev_pio_count -= count;
12807 vcpu->arch.sev_pio_data += count * vcpu->arch.pio.size;
12811 /* Emulation done by the kernel. */
12812 if (!vcpu->arch.sev_pio_count)
12816 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_outs;
12820 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
12821 unsigned int port);
12823 static void advance_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
12825 unsigned count = vcpu->arch.pio.count;
12826 complete_emulator_pio_in(vcpu, vcpu->arch.sev_pio_data);
12827 vcpu->arch.sev_pio_count -= count;
12828 vcpu->arch.sev_pio_data += count * vcpu->arch.pio.size;
12831 static int complete_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
12833 int size = vcpu->arch.pio.size;
12834 int port = vcpu->arch.pio.port;
12836 advance_sev_es_emulated_ins(vcpu);
12837 if (vcpu->arch.sev_pio_count)
12838 return kvm_sev_es_ins(vcpu, size, port);
12842 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
12846 unsigned int count =
12847 min_t(unsigned int, PAGE_SIZE / size, vcpu->arch.sev_pio_count);
12848 if (!__emulator_pio_in(vcpu, size, port, count))
12851 /* Emulation done by the kernel. */
12852 advance_sev_es_emulated_ins(vcpu);
12853 if (!vcpu->arch.sev_pio_count)
12857 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_ins;
12861 int kvm_sev_es_string_io(struct kvm_vcpu *vcpu, unsigned int size,
12862 unsigned int port, void *data, unsigned int count,
12865 vcpu->arch.sev_pio_data = data;
12866 vcpu->arch.sev_pio_count = count;
12867 return in ? kvm_sev_es_ins(vcpu, size, port)
12868 : kvm_sev_es_outs(vcpu, size, port);
12870 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io);
12872 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry);
12873 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
12874 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
12875 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
12876 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
12877 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
12878 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
12879 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
12880 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
12881 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
12882 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
12883 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
12884 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
12885 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
12886 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
12887 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
12888 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
12889 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
12890 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
12891 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
12892 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
12893 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log);
12894 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request);
12895 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_accept_irq);
12896 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter);
12897 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit);
12898 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter);
12899 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit);