arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *   Yaniv Kamay  <yaniv@qumranet.com>
  15  *   Amit Shah    <amit.shah@qumranet.com>
  16  *   Ben-Ami Yassour <benami@il.ibm.com>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "ioapic.h"
  22 #include "mmu.h"
  23 #include "i8254.h"
  24 #include "tss.h"
  25 #include "kvm_cache_regs.h"
  26 #include "kvm_emulate.h"
  27 #include "x86.h"
  28 #include "cpuid.h"
  29 #include "pmu.h"
  30 #include "hyperv.h"
  31 #include "lapic.h"
  32 #include "xen.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/export.h>
  40 #include <linux/moduleparam.h>
  41 #include <linux/mman.h>
  42 #include <linux/highmem.h>
  43 #include <linux/iommu.h>
  44 #include <linux/intel-iommu.h>
  45 #include <linux/cpufreq.h>
  46 #include <linux/user-return-notifier.h>
  47 #include <linux/srcu.h>
  48 #include <linux/slab.h>
  49 #include <linux/perf_event.h>
  50 #include <linux/uaccess.h>
  51 #include <linux/hash.h>
  52 #include <linux/pci.h>
  53 #include <linux/timekeeper_internal.h>
  54 #include <linux/pvclock_gtod.h>
  55 #include <linux/kvm_irqfd.h>
  56 #include <linux/irqbypass.h>
  57 #include <linux/sched/stat.h>
  58 #include <linux/sched/isolation.h>
  59 #include <linux/mem_encrypt.h>
  60 #include <linux/entry-kvm.h>
  61 #include <linux/suspend.h>
  62
  63 #include <trace/events/kvm.h>
  64
  65 #include <asm/debugreg.h>
  66 #include <asm/msr.h>
  67 #include <asm/desc.h>
  68 #include <asm/mce.h>
  69 #include <asm/pkru.h>
  70 #include <linux/kernel_stat.h>
  71 #include <asm/fpu/api.h>
  72 #include <asm/fpu/xcr.h>
  73 #include <asm/fpu/xstate.h>
  74 #include <asm/pvclock.h>
  75 #include <asm/div64.h>
  76 #include <asm/irq_remapping.h>
  77 #include <asm/mshyperv.h>
  78 #include <asm/hypervisor.h>
  79 #include <asm/tlbflush.h>
  80 #include <asm/intel_pt.h>
  81 #include <asm/emulate_prefix.h>
  82 #include <asm/sgx.h>
  83 #include <clocksource/hyperv_timer.h>
  84
  85 #define CREATE_TRACE_POINTS
  86 #include "trace.h"
  87
  88 #define MAX_IO_MSRS 256
  89 #define KVM_MAX_MCE_BANKS 32
  90 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  91 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  92
  93 #define emul_to_vcpu(ctxt) \
  94         ((struct kvm_vcpu *)(ctxt)->vcpu)
  95
  96 /* EFER defaults:
  97  * - enable syscall per default because its emulated by KVM
  98  * - enable LME and LMA per default on 64 bit KVM
  99  */
 100 #ifdef CONFIG_X86_64
 101 static
 102 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
 103 #else
 104 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
 105 #endif
 106
 107 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
 108
 109 #define KVM_EXIT_HYPERCALL_VALID_MASK (1 << KVM_HC_MAP_GPA_RANGE)
 110
 111 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
 112                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 113
 114 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 115 static void process_nmi(struct kvm_vcpu *vcpu);
 116 static void process_smi(struct kvm_vcpu *vcpu);
 117 static void enter_smm(struct kvm_vcpu *vcpu);
 118 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 119 static void store_regs(struct kvm_vcpu *vcpu);
 120 static int sync_regs(struct kvm_vcpu *vcpu);
 121 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu);
 122
 123 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
 124 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
 125
 126 struct kvm_x86_ops kvm_x86_ops __read_mostly;
 127 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 128
 129 #define KVM_X86_OP(func)                                             \
 130         DEFINE_STATIC_CALL_NULL(kvm_x86_##func,                      \
 131                                 *(((struct kvm_x86_ops *)0)->func));
 132 #define KVM_X86_OP_NULL KVM_X86_OP
 133 #include <asm/kvm-x86-ops.h>
 134 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits);
 135 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg);
 136 EXPORT_STATIC_CALL_GPL(kvm_x86_tlb_flush_current);
 137
 138 static bool __read_mostly ignore_msrs = 0;
 139 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 140
 141 bool __read_mostly report_ignored_msrs = true;
 142 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 143 EXPORT_SYMBOL_GPL(report_ignored_msrs);
 144
 145 unsigned int min_timer_period_us = 200;
 146 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 147
 148 static bool __read_mostly kvmclock_periodic_sync = true;
 149 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 150
 151 bool __read_mostly kvm_has_tsc_control;
 152 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 153 u32  __read_mostly kvm_max_guest_tsc_khz;
 154 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 155 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 156 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 157 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 158 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 159 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 160 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 161 bool __read_mostly kvm_has_bus_lock_exit;
 162 EXPORT_SYMBOL_GPL(kvm_has_bus_lock_exit);
 163
 164 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 165 static u32 __read_mostly tsc_tolerance_ppm = 250;
 166 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 167
 168 /*
 169  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 170  * adaptive tuning starting from default advancement of 1000ns.  '0' disables
 171  * advancement entirely.  Any other value is used as-is and disables adaptive
 172  * tuning, i.e. allows privileged userspace to set an exact advancement time.
 173  */
 174 static int __read_mostly lapic_timer_advance_ns = -1;
 175 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 176
 177 static bool __read_mostly vector_hashing = true;
 178 module_param(vector_hashing, bool, S_IRUGO);
 179
 180 bool __read_mostly enable_vmware_backdoor = false;
 181 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 182 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 183
 184 static bool __read_mostly force_emulation_prefix = false;
 185 module_param(force_emulation_prefix, bool, S_IRUGO);
 186
 187 int __read_mostly pi_inject_timer = -1;
 188 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
 189
 190 /* Enable/disable PMU virtualization */
 191 bool __read_mostly enable_pmu = true;
 192 EXPORT_SYMBOL_GPL(enable_pmu);
 193 module_param(enable_pmu, bool, 0444);
 194
 195 /*
 196  * Restoring the host value for MSRs that are only consumed when running in
 197  * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
 198  * returns to userspace, i.e. the kernel can run with the guest's value.
 199  */
 200 #define KVM_MAX_NR_USER_RETURN_MSRS 16
 201
 202 struct kvm_user_return_msrs {
 203         struct user_return_notifier urn;
 204         bool registered;
 205         struct kvm_user_return_msr_values {
 206                 u64 host;
 207                 u64 curr;
 208         } values[KVM_MAX_NR_USER_RETURN_MSRS];
 209 };
 210
 211 u32 __read_mostly kvm_nr_uret_msrs;
 212 EXPORT_SYMBOL_GPL(kvm_nr_uret_msrs);
 213 static u32 __read_mostly kvm_uret_msrs_list[KVM_MAX_NR_USER_RETURN_MSRS];
 214 static struct kvm_user_return_msrs __percpu *user_return_msrs;
 215
 216 #define KVM_SUPPORTED_XCR0     (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
 217                                 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
 218                                 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
 219                                 | XFEATURE_MASK_PKRU | XFEATURE_MASK_XTILE)
 220
 221 u64 __read_mostly host_efer;
 222 EXPORT_SYMBOL_GPL(host_efer);
 223
 224 bool __read_mostly allow_smaller_maxphyaddr = 0;
 225 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr);
 226
 227 bool __read_mostly enable_apicv = true;
 228 EXPORT_SYMBOL_GPL(enable_apicv);
 229
 230 u64 __read_mostly host_xss;
 231 EXPORT_SYMBOL_GPL(host_xss);
 232 u64 __read_mostly supported_xss;
 233 EXPORT_SYMBOL_GPL(supported_xss);
 234
 235 const struct _kvm_stats_desc kvm_vm_stats_desc[] = {
 236         KVM_GENERIC_VM_STATS(),
 237         STATS_DESC_COUNTER(VM, mmu_shadow_zapped),
 238         STATS_DESC_COUNTER(VM, mmu_pte_write),
 239         STATS_DESC_COUNTER(VM, mmu_pde_zapped),
 240         STATS_DESC_COUNTER(VM, mmu_flooded),
 241         STATS_DESC_COUNTER(VM, mmu_recycled),
 242         STATS_DESC_COUNTER(VM, mmu_cache_miss),
 243         STATS_DESC_ICOUNTER(VM, mmu_unsync),
 244         STATS_DESC_ICOUNTER(VM, pages_4k),
 245         STATS_DESC_ICOUNTER(VM, pages_2m),
 246         STATS_DESC_ICOUNTER(VM, pages_1g),
 247         STATS_DESC_ICOUNTER(VM, nx_lpage_splits),
 248         STATS_DESC_PCOUNTER(VM, max_mmu_rmap_size),
 249         STATS_DESC_PCOUNTER(VM, max_mmu_page_hash_collisions)
 250 };
 251
 252 const struct kvm_stats_header kvm_vm_stats_header = {
 253         .name_size = KVM_STATS_NAME_SIZE,
 254         .num_desc = ARRAY_SIZE(kvm_vm_stats_desc),
 255         .id_offset = sizeof(struct kvm_stats_header),
 256         .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
 257         .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
 258                        sizeof(kvm_vm_stats_desc),
 259 };
 260
 261 const struct _kvm_stats_desc kvm_vcpu_stats_desc[] = {
 262         KVM_GENERIC_VCPU_STATS(),
 263         STATS_DESC_COUNTER(VCPU, pf_fixed),
 264         STATS_DESC_COUNTER(VCPU, pf_guest),
 265         STATS_DESC_COUNTER(VCPU, tlb_flush),
 266         STATS_DESC_COUNTER(VCPU, invlpg),
 267         STATS_DESC_COUNTER(VCPU, exits),
 268         STATS_DESC_COUNTER(VCPU, io_exits),
 269         STATS_DESC_COUNTER(VCPU, mmio_exits),
 270         STATS_DESC_COUNTER(VCPU, signal_exits),
 271         STATS_DESC_COUNTER(VCPU, irq_window_exits),
 272         STATS_DESC_COUNTER(VCPU, nmi_window_exits),
 273         STATS_DESC_COUNTER(VCPU, l1d_flush),
 274         STATS_DESC_COUNTER(VCPU, halt_exits),
 275         STATS_DESC_COUNTER(VCPU, request_irq_exits),
 276         STATS_DESC_COUNTER(VCPU, irq_exits),
 277         STATS_DESC_COUNTER(VCPU, host_state_reload),
 278         STATS_DESC_COUNTER(VCPU, fpu_reload),
 279         STATS_DESC_COUNTER(VCPU, insn_emulation),
 280         STATS_DESC_COUNTER(VCPU, insn_emulation_fail),
 281         STATS_DESC_COUNTER(VCPU, hypercalls),
 282         STATS_DESC_COUNTER(VCPU, irq_injections),
 283         STATS_DESC_COUNTER(VCPU, nmi_injections),
 284         STATS_DESC_COUNTER(VCPU, req_event),
 285         STATS_DESC_COUNTER(VCPU, nested_run),
 286         STATS_DESC_COUNTER(VCPU, directed_yield_attempted),
 287         STATS_DESC_COUNTER(VCPU, directed_yield_successful),
 288         STATS_DESC_ICOUNTER(VCPU, guest_mode)
 289 };
 290
 291 const struct kvm_stats_header kvm_vcpu_stats_header = {
 292         .name_size = KVM_STATS_NAME_SIZE,
 293         .num_desc = ARRAY_SIZE(kvm_vcpu_stats_desc),
 294         .id_offset = sizeof(struct kvm_stats_header),
 295         .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
 296         .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
 297                        sizeof(kvm_vcpu_stats_desc),
 298 };
 299
 300 u64 __read_mostly host_xcr0;
 301 u64 __read_mostly supported_xcr0;
 302 EXPORT_SYMBOL_GPL(supported_xcr0);
 303
 304 static struct kmem_cache *x86_emulator_cache;
 305
 306 /*
 307  * When called, it means the previous get/set msr reached an invalid msr.
 308  * Return true if we want to ignore/silent this failed msr access.
 309  */
 310 static bool kvm_msr_ignored_check(u32 msr, u64 data, bool write)
 311 {
 312         const char *op = write ? "wrmsr" : "rdmsr";
 313
 314         if (ignore_msrs) {
 315                 if (report_ignored_msrs)
 316                         kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
 317                                       op, msr, data);
 318                 /* Mask the error */
 319                 return true;
 320         } else {
 321                 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
 322                                       op, msr, data);
 323                 return false;
 324         }
 325 }
 326
 327 static struct kmem_cache *kvm_alloc_emulator_cache(void)
 328 {
 329         unsigned int useroffset = offsetof(struct x86_emulate_ctxt, src);
 330         unsigned int size = sizeof(struct x86_emulate_ctxt);
 331
 332         return kmem_cache_create_usercopy("x86_emulator", size,
 333                                           __alignof__(struct x86_emulate_ctxt),
 334                                           SLAB_ACCOUNT, useroffset,
 335                                           size - useroffset, NULL);
 336 }
 337
 338 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 339
 340 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 341 {
 342         int i;
 343         for (i = 0; i < ASYNC_PF_PER_VCPU; i++)
 344                 vcpu->arch.apf.gfns[i] = ~0;
 345 }
 346
 347 static void kvm_on_user_return(struct user_return_notifier *urn)
 348 {
 349         unsigned slot;
 350         struct kvm_user_return_msrs *msrs
 351                 = container_of(urn, struct kvm_user_return_msrs, urn);
 352         struct kvm_user_return_msr_values *values;
 353         unsigned long flags;
 354
 355         /*
 356          * Disabling irqs at this point since the following code could be
 357          * interrupted and executed through kvm_arch_hardware_disable()
 358          */
 359         local_irq_save(flags);
 360         if (msrs->registered) {
 361                 msrs->registered = false;
 362                 user_return_notifier_unregister(urn);
 363         }
 364         local_irq_restore(flags);
 365         for (slot = 0; slot < kvm_nr_uret_msrs; ++slot) {
 366                 values = &msrs->values[slot];
 367                 if (values->host != values->curr) {
 368                         wrmsrl(kvm_uret_msrs_list[slot], values->host);
 369                         values->curr = values->host;
 370                 }
 371         }
 372 }
 373
 374 static int kvm_probe_user_return_msr(u32 msr)
 375 {
 376         u64 val;
 377         int ret;
 378
 379         preempt_disable();
 380         ret = rdmsrl_safe(msr, &val);
 381         if (ret)
 382                 goto out;
 383         ret = wrmsrl_safe(msr, val);
 384 out:
 385         preempt_enable();
 386         return ret;
 387 }
 388
 389 int kvm_add_user_return_msr(u32 msr)
 390 {
 391         BUG_ON(kvm_nr_uret_msrs >= KVM_MAX_NR_USER_RETURN_MSRS);
 392
 393         if (kvm_probe_user_return_msr(msr))
 394                 return -1;
 395
 396         kvm_uret_msrs_list[kvm_nr_uret_msrs] = msr;
 397         return kvm_nr_uret_msrs++;
 398 }
 399 EXPORT_SYMBOL_GPL(kvm_add_user_return_msr);
 400
 401 int kvm_find_user_return_msr(u32 msr)
 402 {
 403         int i;
 404
 405         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 406                 if (kvm_uret_msrs_list[i] == msr)
 407                         return i;
 408         }
 409         return -1;
 410 }
 411 EXPORT_SYMBOL_GPL(kvm_find_user_return_msr);
 412
 413 static void kvm_user_return_msr_cpu_online(void)
 414 {
 415         unsigned int cpu = smp_processor_id();
 416         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 417         u64 value;
 418         int i;
 419
 420         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 421                 rdmsrl_safe(kvm_uret_msrs_list[i], &value);
 422                 msrs->values[i].host = value;
 423                 msrs->values[i].curr = value;
 424         }
 425 }
 426
 427 int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)
 428 {
 429         unsigned int cpu = smp_processor_id();
 430         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 431         int err;
 432
 433         value = (value & mask) | (msrs->values[slot].host & ~mask);
 434         if (value == msrs->values[slot].curr)
 435                 return 0;
 436         err = wrmsrl_safe(kvm_uret_msrs_list[slot], value);
 437         if (err)
 438                 return 1;
 439
 440         msrs->values[slot].curr = value;
 441         if (!msrs->registered) {
 442                 msrs->urn.on_user_return = kvm_on_user_return;
 443                 user_return_notifier_register(&msrs->urn);
 444                 msrs->registered = true;
 445         }
 446         return 0;
 447 }
 448 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr);
 449
 450 static void drop_user_return_notifiers(void)
 451 {
 452         unsigned int cpu = smp_processor_id();
 453         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 454
 455         if (msrs->registered)
 456                 kvm_on_user_return(&msrs->urn);
 457 }
 458
 459 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 460 {
 461         return vcpu->arch.apic_base;
 462 }
 463 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 464
 465 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 466 {
 467         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 468 }
 469 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 470
 471 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 472 {
 473         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 474         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 475         u64 reserved_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu) | 0x2ff |
 476                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 477
 478         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 479                 return 1;
 480         if (!msr_info->host_initiated) {
 481                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 482                         return 1;
 483                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 484                         return 1;
 485         }
 486
 487         kvm_lapic_set_base(vcpu, msr_info->data);
 488         kvm_recalculate_apic_map(vcpu->kvm);
 489         return 0;
 490 }
 491 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 492
 493 /*
 494  * Handle a fault on a hardware virtualization (VMX or SVM) instruction.
 495  *
 496  * Hardware virtualization extension instructions may fault if a reboot turns
 497  * off virtualization while processes are running.  Usually after catching the
 498  * fault we just panic; during reboot instead the instruction is ignored.
 499  */
 500 noinstr void kvm_spurious_fault(void)
 501 {
 502         /* Fault while not rebooting.  We want the trace. */
 503         BUG_ON(!kvm_rebooting);
 504 }
 505 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 506
 507 #define EXCPT_BENIGN            0
 508 #define EXCPT_CONTRIBUTORY      1
 509 #define EXCPT_PF                2
 510
 511 static int exception_class(int vector)
 512 {
 513         switch (vector) {
 514         case PF_VECTOR:
 515                 return EXCPT_PF;
 516         case DE_VECTOR:
 517         case TS_VECTOR:
 518         case NP_VECTOR:
 519         case SS_VECTOR:
 520         case GP_VECTOR:
 521                 return EXCPT_CONTRIBUTORY;
 522         default:
 523                 break;
 524         }
 525         return EXCPT_BENIGN;
 526 }
 527
 528 #define EXCPT_FAULT             0
 529 #define EXCPT_TRAP              1
 530 #define EXCPT_ABORT             2
 531 #define EXCPT_INTERRUPT         3
 532
 533 static int exception_type(int vector)
 534 {
 535         unsigned int mask;
 536
 537         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 538                 return EXCPT_INTERRUPT;
 539
 540         mask = 1 << vector;
 541
 542         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 543         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 544                 return EXCPT_TRAP;
 545
 546         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 547                 return EXCPT_ABORT;
 548
 549         /* Reserved exceptions will result in fault */
 550         return EXCPT_FAULT;
 551 }
 552
 553 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 554 {
 555         unsigned nr = vcpu->arch.exception.nr;
 556         bool has_payload = vcpu->arch.exception.has_payload;
 557         unsigned long payload = vcpu->arch.exception.payload;
 558
 559         if (!has_payload)
 560                 return;
 561
 562         switch (nr) {
 563         case DB_VECTOR:
 564                 /*
 565                  * "Certain debug exceptions may clear bit 0-3.  The
 566                  * remaining contents of the DR6 register are never
 567                  * cleared by the processor".
 568                  */
 569                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 570                 /*
 571                  * In order to reflect the #DB exception payload in guest
 572                  * dr6, three components need to be considered: active low
 573                  * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
 574                  * DR6_BS and DR6_BT)
 575                  * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
 576                  * In the target guest dr6:
 577                  * FIXED_1 bits should always be set.
 578                  * Active low bits should be cleared if 1-setting in payload.
 579                  * Active high bits should be set if 1-setting in payload.
 580                  *
 581                  * Note, the payload is compatible with the pending debug
 582                  * exceptions/exit qualification under VMX, that active_low bits
 583                  * are active high in payload.
 584                  * So they need to be flipped for DR6.
 585                  */
 586                 vcpu->arch.dr6 |= DR6_ACTIVE_LOW;
 587                 vcpu->arch.dr6 |= payload;
 588                 vcpu->arch.dr6 ^= payload & DR6_ACTIVE_LOW;
 589
 590                 /*
 591                  * The #DB payload is defined as compatible with the 'pending
 592                  * debug exceptions' field under VMX, not DR6. While bit 12 is
 593                  * defined in the 'pending debug exceptions' field (enabled
 594                  * breakpoint), it is reserved and must be zero in DR6.
 595                  */
 596                 vcpu->arch.dr6 &= ~BIT(12);
 597                 break;
 598         case PF_VECTOR:
 599                 vcpu->arch.cr2 = payload;
 600                 break;
 601         }
 602
 603         vcpu->arch.exception.has_payload = false;
 604         vcpu->arch.exception.payload = 0;
 605 }
 606 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 607
 608 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 609                 unsigned nr, bool has_error, u32 error_code,
 610                 bool has_payload, unsigned long payload, bool reinject)
 611 {
 612         u32 prev_nr;
 613         int class1, class2;
 614
 615         kvm_make_request(KVM_REQ_EVENT, vcpu);
 616
 617         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 618         queue:
 619                 if (reinject) {
 620                         /*
 621                          * On vmentry, vcpu->arch.exception.pending is only
 622                          * true if an event injection was blocked by
 623                          * nested_run_pending.  In that case, however,
 624                          * vcpu_enter_guest requests an immediate exit,
 625                          * and the guest shouldn't proceed far enough to
 626                          * need reinjection.
 627                          */
 628                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 629                         vcpu->arch.exception.injected = true;
 630                         if (WARN_ON_ONCE(has_payload)) {
 631                                 /*
 632                                  * A reinjected event has already
 633                                  * delivered its payload.
 634                                  */
 635                                 has_payload = false;
 636                                 payload = 0;
 637                         }
 638                 } else {
 639                         vcpu->arch.exception.pending = true;
 640                         vcpu->arch.exception.injected = false;
 641                 }
 642                 vcpu->arch.exception.has_error_code = has_error;
 643                 vcpu->arch.exception.nr = nr;
 644                 vcpu->arch.exception.error_code = error_code;
 645                 vcpu->arch.exception.has_payload = has_payload;
 646                 vcpu->arch.exception.payload = payload;
 647                 if (!is_guest_mode(vcpu))
 648                         kvm_deliver_exception_payload(vcpu);
 649                 return;
 650         }
 651
 652         /* to check exception */
 653         prev_nr = vcpu->arch.exception.nr;
 654         if (prev_nr == DF_VECTOR) {
 655                 /* triple fault -> shutdown */
 656                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 657                 return;
 658         }
 659         class1 = exception_class(prev_nr);
 660         class2 = exception_class(nr);
 661         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 662                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 663                 /*
 664                  * Generate double fault per SDM Table 5-5.  Set
 665                  * exception.pending = true so that the double fault
 666                  * can trigger a nested vmexit.
 667                  */
 668                 vcpu->arch.exception.pending = true;
 669                 vcpu->arch.exception.injected = false;
 670                 vcpu->arch.exception.has_error_code = true;
 671                 vcpu->arch.exception.nr = DF_VECTOR;
 672                 vcpu->arch.exception.error_code = 0;
 673                 vcpu->arch.exception.has_payload = false;
 674                 vcpu->arch.exception.payload = 0;
 675         } else
 676                 /* replace previous exception with a new one in a hope
 677                    that instruction re-execution will regenerate lost
 678                    exception */
 679                 goto queue;
 680 }
 681
 682 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 683 {
 684         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 685 }
 686 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 687
 688 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 689 {
 690         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 691 }
 692 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 693
 694 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 695                            unsigned long payload)
 696 {
 697         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 698 }
 699 EXPORT_SYMBOL_GPL(kvm_queue_exception_p);
 700
 701 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 702                                     u32 error_code, unsigned long payload)
 703 {
 704         kvm_multiple_exception(vcpu, nr, true, error_code,
 705                                true, payload, false);
 706 }
 707
 708 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 709 {
 710         if (err)
 711                 kvm_inject_gp(vcpu, 0);
 712         else
 713                 return kvm_skip_emulated_instruction(vcpu);
 714
 715         return 1;
 716 }
 717 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 718
 719 static int complete_emulated_insn_gp(struct kvm_vcpu *vcpu, int err)
 720 {
 721         if (err) {
 722                 kvm_inject_gp(vcpu, 0);
 723                 return 1;
 724         }
 725
 726         return kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE | EMULTYPE_SKIP |
 727                                        EMULTYPE_COMPLETE_USER_EXIT);
 728 }
 729
 730 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 731 {
 732         ++vcpu->stat.pf_guest;
 733         vcpu->arch.exception.nested_apf =
 734                 is_guest_mode(vcpu) && fault->async_page_fault;
 735         if (vcpu->arch.exception.nested_apf) {
 736                 vcpu->arch.apf.nested_apf_token = fault->address;
 737                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 738         } else {
 739                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 740                                         fault->address);
 741         }
 742 }
 743 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 744
 745 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
 746                                     struct x86_exception *fault)
 747 {
 748         struct kvm_mmu *fault_mmu;
 749         WARN_ON_ONCE(fault->vector != PF_VECTOR);
 750
 751         fault_mmu = fault->nested_page_fault ? vcpu->arch.mmu :
 752                                                vcpu->arch.walk_mmu;
 753
 754         /*
 755          * Invalidate the TLB entry for the faulting address, if it exists,
 756          * else the access will fault indefinitely (and to emulate hardware).
 757          */
 758         if ((fault->error_code & PFERR_PRESENT_MASK) &&
 759             !(fault->error_code & PFERR_RSVD_MASK))
 760                 kvm_mmu_invalidate_gva(vcpu, fault_mmu, fault->address,
 761                                        fault_mmu->root_hpa);
 762
 763         fault_mmu->inject_page_fault(vcpu, fault);
 764         return fault->nested_page_fault;
 765 }
 766 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault);
 767
 768 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 769 {
 770         atomic_inc(&vcpu->arch.nmi_queued);
 771         kvm_make_request(KVM_REQ_NMI, vcpu);
 772 }
 773 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 774
 775 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 776 {
 777         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 778 }
 779 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 780
 781 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 782 {
 783         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 784 }
 785 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 786
 787 /*
 788  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 789  * a #GP and return false.
 790  */
 791 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 792 {
 793         if (static_call(kvm_x86_get_cpl)(vcpu) <= required_cpl)
 794                 return true;
 795         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 796         return false;
 797 }
 798 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 799
 800 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 801 {
 802         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 803                 return true;
 804
 805         kvm_queue_exception(vcpu, UD_VECTOR);
 806         return false;
 807 }
 808 EXPORT_SYMBOL_GPL(kvm_require_dr);
 809
 810 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
 811 {
 812         return vcpu->arch.reserved_gpa_bits | rsvd_bits(5, 8) | rsvd_bits(1, 2);
 813 }
 814
 815 /*
 816  * Load the pae pdptrs.  Return 1 if they are all valid, 0 otherwise.
 817  */
 818 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
 819 {
 820         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
 821         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 822         gpa_t real_gpa;
 823         int i;
 824         int ret;
 825         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 826
 827         /*
 828          * If the MMU is nested, CR3 holds an L2 GPA and needs to be translated
 829          * to an L1 GPA.
 830          */
 831         real_gpa = kvm_translate_gpa(vcpu, mmu, gfn_to_gpa(pdpt_gfn),
 832                                      PFERR_USER_MASK | PFERR_WRITE_MASK, NULL);
 833         if (real_gpa == UNMAPPED_GVA)
 834                 return 0;
 835
 836         /* Note the offset, PDPTRs are 32 byte aligned when using PAE paging. */
 837         ret = kvm_vcpu_read_guest_page(vcpu, gpa_to_gfn(real_gpa), pdpte,
 838                                        cr3 & GENMASK(11, 5), sizeof(pdpte));
 839         if (ret < 0)
 840                 return 0;
 841
 842         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 843                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 844                     (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
 845                         return 0;
 846                 }
 847         }
 848
 849         /*
 850          * Marking VCPU_EXREG_PDPTR dirty doesn't work for !tdp_enabled.
 851          * Shadow page roots need to be reconstructed instead.
 852          */
 853         if (!tdp_enabled && memcmp(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs)))
 854                 kvm_mmu_free_roots(vcpu, mmu, KVM_MMU_ROOT_CURRENT);
 855
 856         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 857         kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
 858         kvm_make_request(KVM_REQ_LOAD_MMU_PGD, vcpu);
 859         vcpu->arch.pdptrs_from_userspace = false;
 860
 861         return 1;
 862 }
 863 EXPORT_SYMBOL_GPL(load_pdptrs);
 864
 865 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0)
 866 {
 867         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 868                 kvm_clear_async_pf_completion_queue(vcpu);
 869                 kvm_async_pf_hash_reset(vcpu);
 870         }
 871
 872         if ((cr0 ^ old_cr0) & KVM_MMU_CR0_ROLE_BITS)
 873                 kvm_mmu_reset_context(vcpu);
 874
 875         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 876             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 877             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 878                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 879 }
 880 EXPORT_SYMBOL_GPL(kvm_post_set_cr0);
 881
 882 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 883 {
 884         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 885
 886         cr0 |= X86_CR0_ET;
 887
 888 #ifdef CONFIG_X86_64
 889         if (cr0 & 0xffffffff00000000UL)
 890                 return 1;
 891 #endif
 892
 893         cr0 &= ~CR0_RESERVED_BITS;
 894
 895         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 896                 return 1;
 897
 898         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 899                 return 1;
 900
 901 #ifdef CONFIG_X86_64
 902         if ((vcpu->arch.efer & EFER_LME) && !is_paging(vcpu) &&
 903             (cr0 & X86_CR0_PG)) {
 904                 int cs_db, cs_l;
 905
 906                 if (!is_pae(vcpu))
 907                         return 1;
 908                 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
 909                 if (cs_l)
 910                         return 1;
 911         }
 912 #endif
 913         if (!(vcpu->arch.efer & EFER_LME) && (cr0 & X86_CR0_PG) &&
 914             is_pae(vcpu) && ((cr0 ^ old_cr0) & X86_CR0_PDPTR_BITS) &&
 915             !load_pdptrs(vcpu, kvm_read_cr3(vcpu)))
 916                 return 1;
 917
 918         if (!(cr0 & X86_CR0_PG) &&
 919             (is_64_bit_mode(vcpu) || kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE)))
 920                 return 1;
 921
 922         static_call(kvm_x86_set_cr0)(vcpu, cr0);
 923
 924         kvm_post_set_cr0(vcpu, old_cr0, cr0);
 925
 926         return 0;
 927 }
 928 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 929
 930 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 931 {
 932         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 933 }
 934 EXPORT_SYMBOL_GPL(kvm_lmsw);
 935
 936 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
 937 {
 938         if (vcpu->arch.guest_state_protected)
 939                 return;
 940
 941         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 942
 943                 if (vcpu->arch.xcr0 != host_xcr0)
 944                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 945
 946                 if (vcpu->arch.xsaves_enabled &&
 947                     vcpu->arch.ia32_xss != host_xss)
 948                         wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
 949         }
 950
 951         if (static_cpu_has(X86_FEATURE_PKU) &&
 952             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 953              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU)) &&
 954             vcpu->arch.pkru != vcpu->arch.host_pkru)
 955                 write_pkru(vcpu->arch.pkru);
 956 }
 957 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
 958
 959 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
 960 {
 961         if (vcpu->arch.guest_state_protected)
 962                 return;
 963
 964         if (static_cpu_has(X86_FEATURE_PKU) &&
 965             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 966              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU))) {
 967                 vcpu->arch.pkru = rdpkru();
 968                 if (vcpu->arch.pkru != vcpu->arch.host_pkru)
 969                         write_pkru(vcpu->arch.host_pkru);
 970         }
 971
 972         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 973
 974                 if (vcpu->arch.xcr0 != host_xcr0)
 975                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 976
 977                 if (vcpu->arch.xsaves_enabled &&
 978                     vcpu->arch.ia32_xss != host_xss)
 979                         wrmsrl(MSR_IA32_XSS, host_xss);
 980         }
 981
 982 }
 983 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
 984
 985 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 986 {
 987         u64 xcr0 = xcr;
 988         u64 old_xcr0 = vcpu->arch.xcr0;
 989         u64 valid_bits;
 990
 991         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 992         if (index != XCR_XFEATURE_ENABLED_MASK)
 993                 return 1;
 994         if (!(xcr0 & XFEATURE_MASK_FP))
 995                 return 1;
 996         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 997                 return 1;
 998
 999         /*
1000          * Do not allow the guest to set bits that we do not support
1001          * saving.  However, xcr0 bit 0 is always set, even if the
1002          * emulated CPU does not support XSAVE (see kvm_vcpu_reset()).
1003          */
1004         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
1005         if (xcr0 & ~valid_bits)
1006                 return 1;
1007
1008         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
1009             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
1010                 return 1;
1011
1012         if (xcr0 & XFEATURE_MASK_AVX512) {
1013                 if (!(xcr0 & XFEATURE_MASK_YMM))
1014                         return 1;
1015                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
1016                         return 1;
1017         }
1018
1019         if ((xcr0 & XFEATURE_MASK_XTILE) &&
1020             ((xcr0 & XFEATURE_MASK_XTILE) != XFEATURE_MASK_XTILE))
1021                 return 1;
1022
1023         vcpu->arch.xcr0 = xcr0;
1024
1025         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
1026                 kvm_update_cpuid_runtime(vcpu);
1027         return 0;
1028 }
1029
1030 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu)
1031 {
1032         if (static_call(kvm_x86_get_cpl)(vcpu) != 0 ||
1033             __kvm_set_xcr(vcpu, kvm_rcx_read(vcpu), kvm_read_edx_eax(vcpu))) {
1034                 kvm_inject_gp(vcpu, 0);
1035                 return 1;
1036         }
1037
1038         return kvm_skip_emulated_instruction(vcpu);
1039 }
1040 EXPORT_SYMBOL_GPL(kvm_emulate_xsetbv);
1041
1042 bool kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1043 {
1044         if (cr4 & cr4_reserved_bits)
1045                 return false;
1046
1047         if (cr4 & vcpu->arch.cr4_guest_rsvd_bits)
1048                 return false;
1049
1050         return static_call(kvm_x86_is_valid_cr4)(vcpu, cr4);
1051 }
1052 EXPORT_SYMBOL_GPL(kvm_is_valid_cr4);
1053
1054 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4)
1055 {
1056         /*
1057          * If any role bit is changed, the MMU needs to be reset.
1058          *
1059          * If CR4.PCIDE is changed 1 -> 0, the guest TLB must be flushed.
1060          * If CR4.PCIDE is changed 0 -> 1, there is no need to flush the TLB
1061          * according to the SDM; however, stale prev_roots could be reused
1062          * incorrectly in the future after a MOV to CR3 with NOFLUSH=1, so we
1063          * free them all.  KVM_REQ_MMU_RELOAD is fit for the both cases; it
1064          * is slow, but changing CR4.PCIDE is a rare case.
1065          *
1066          * If CR4.PGE is changed, the guest TLB must be flushed.
1067          *
1068          * Note: resetting MMU is a superset of KVM_REQ_MMU_RELOAD and
1069          * KVM_REQ_MMU_RELOAD is a superset of KVM_REQ_TLB_FLUSH_GUEST, hence
1070          * the usage of "else if".
1071          */
1072         if ((cr4 ^ old_cr4) & KVM_MMU_CR4_ROLE_BITS)
1073                 kvm_mmu_reset_context(vcpu);
1074         else if ((cr4 ^ old_cr4) & X86_CR4_PCIDE)
1075                 kvm_make_request(KVM_REQ_MMU_RELOAD, vcpu);
1076         else if ((cr4 ^ old_cr4) & X86_CR4_PGE)
1077                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
1078 }
1079 EXPORT_SYMBOL_GPL(kvm_post_set_cr4);
1080
1081 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1082 {
1083         unsigned long old_cr4 = kvm_read_cr4(vcpu);
1084
1085         if (!kvm_is_valid_cr4(vcpu, cr4))
1086                 return 1;
1087
1088         if (is_long_mode(vcpu)) {
1089                 if (!(cr4 & X86_CR4_PAE))
1090                         return 1;
1091                 if ((cr4 ^ old_cr4) & X86_CR4_LA57)
1092                         return 1;
1093         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
1094                    && ((cr4 ^ old_cr4) & X86_CR4_PDPTR_BITS)
1095                    && !load_pdptrs(vcpu, kvm_read_cr3(vcpu)))
1096                 return 1;
1097
1098         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
1099                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
1100                         return 1;
1101
1102                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1103                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
1104                         return 1;
1105         }
1106
1107         static_call(kvm_x86_set_cr4)(vcpu, cr4);
1108
1109         kvm_post_set_cr4(vcpu, old_cr4, cr4);
1110
1111         return 0;
1112 }
1113 EXPORT_SYMBOL_GPL(kvm_set_cr4);
1114
1115 static void kvm_invalidate_pcid(struct kvm_vcpu *vcpu, unsigned long pcid)
1116 {
1117         struct kvm_mmu *mmu = vcpu->arch.mmu;
1118         unsigned long roots_to_free = 0;
1119         int i;
1120
1121         /*
1122          * MOV CR3 and INVPCID are usually not intercepted when using TDP, but
1123          * this is reachable when running EPT=1 and unrestricted_guest=0,  and
1124          * also via the emulator.  KVM's TDP page tables are not in the scope of
1125          * the invalidation, but the guest's TLB entries need to be flushed as
1126          * the CPU may have cached entries in its TLB for the target PCID.
1127          */
1128         if (unlikely(tdp_enabled)) {
1129                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
1130                 return;
1131         }
1132
1133         /*
1134          * If neither the current CR3 nor any of the prev_roots use the given
1135          * PCID, then nothing needs to be done here because a resync will
1136          * happen anyway before switching to any other CR3.
1137          */
1138         if (kvm_get_active_pcid(vcpu) == pcid) {
1139                 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
1140                 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1141         }
1142
1143         /*
1144          * If PCID is disabled, there is no need to free prev_roots even if the
1145          * PCIDs for them are also 0, because MOV to CR3 always flushes the TLB
1146          * with PCIDE=0.
1147          */
1148         if (!kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
1149                 return;
1150
1151         for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
1152                 if (kvm_get_pcid(vcpu, mmu->prev_roots[i].pgd) == pcid)
1153                         roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
1154
1155         kvm_mmu_free_roots(vcpu, mmu, roots_to_free);
1156 }
1157
1158 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1159 {
1160         bool skip_tlb_flush = false;
1161         unsigned long pcid = 0;
1162 #ifdef CONFIG_X86_64
1163         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
1164
1165         if (pcid_enabled) {
1166                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
1167                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
1168                 pcid = cr3 & X86_CR3_PCID_MASK;
1169         }
1170 #endif
1171
1172         /* PDPTRs are always reloaded for PAE paging. */
1173         if (cr3 == kvm_read_cr3(vcpu) && !is_pae_paging(vcpu))
1174                 goto handle_tlb_flush;
1175
1176         /*
1177          * Do not condition the GPA check on long mode, this helper is used to
1178          * stuff CR3, e.g. for RSM emulation, and there is no guarantee that
1179          * the current vCPU mode is accurate.
1180          */
1181         if (kvm_vcpu_is_illegal_gpa(vcpu, cr3))
1182                 return 1;
1183
1184         if (is_pae_paging(vcpu) && !load_pdptrs(vcpu, cr3))
1185                 return 1;
1186
1187         if (cr3 != kvm_read_cr3(vcpu))
1188                 kvm_mmu_new_pgd(vcpu, cr3);
1189
1190         vcpu->arch.cr3 = cr3;
1191         kvm_register_mark_dirty(vcpu, VCPU_EXREG_CR3);
1192         /* Do not call post_set_cr3, we do not get here for confidential guests.  */
1193
1194 handle_tlb_flush:
1195         /*
1196          * A load of CR3 that flushes the TLB flushes only the current PCID,
1197          * even if PCID is disabled, in which case PCID=0 is flushed.  It's a
1198          * moot point in the end because _disabling_ PCID will flush all PCIDs,
1199          * and it's impossible to use a non-zero PCID when PCID is disabled,
1200          * i.e. only PCID=0 can be relevant.
1201          */
1202         if (!skip_tlb_flush)
1203                 kvm_invalidate_pcid(vcpu, pcid);
1204
1205         return 0;
1206 }
1207 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1208
1209 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1210 {
1211         if (cr8 & CR8_RESERVED_BITS)
1212                 return 1;
1213         if (lapic_in_kernel(vcpu))
1214                 kvm_lapic_set_tpr(vcpu, cr8);
1215         else
1216                 vcpu->arch.cr8 = cr8;
1217         return 0;
1218 }
1219 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1220
1221 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1222 {
1223         if (lapic_in_kernel(vcpu))
1224                 return kvm_lapic_get_cr8(vcpu);
1225         else
1226                 return vcpu->arch.cr8;
1227 }
1228 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1229
1230 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1231 {
1232         int i;
1233
1234         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1235                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1236                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1237         }
1238 }
1239
1240 void kvm_update_dr7(struct kvm_vcpu *vcpu)
1241 {
1242         unsigned long dr7;
1243
1244         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1245                 dr7 = vcpu->arch.guest_debug_dr7;
1246         else
1247                 dr7 = vcpu->arch.dr7;
1248         static_call(kvm_x86_set_dr7)(vcpu, dr7);
1249         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1250         if (dr7 & DR7_BP_EN_MASK)
1251                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1252 }
1253 EXPORT_SYMBOL_GPL(kvm_update_dr7);
1254
1255 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1256 {
1257         u64 fixed = DR6_FIXED_1;
1258
1259         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1260                 fixed |= DR6_RTM;
1261
1262         if (!guest_cpuid_has(vcpu, X86_FEATURE_BUS_LOCK_DETECT))
1263                 fixed |= DR6_BUS_LOCK;
1264         return fixed;
1265 }
1266
1267 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1268 {
1269         size_t size = ARRAY_SIZE(vcpu->arch.db);
1270
1271         switch (dr) {
1272         case 0 ... 3:
1273                 vcpu->arch.db[array_index_nospec(dr, size)] = val;
1274                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1275                         vcpu->arch.eff_db[dr] = val;
1276                 break;
1277         case 4:
1278         case 6:
1279                 if (!kvm_dr6_valid(val))
1280                         return 1; /* #GP */
1281                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1282                 break;
1283         case 5:
1284         default: /* 7 */
1285                 if (!kvm_dr7_valid(val))
1286                         return 1; /* #GP */
1287                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1288                 kvm_update_dr7(vcpu);
1289                 break;
1290         }
1291
1292         return 0;
1293 }
1294 EXPORT_SYMBOL_GPL(kvm_set_dr);
1295
1296 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1297 {
1298         size_t size = ARRAY_SIZE(vcpu->arch.db);
1299
1300         switch (dr) {
1301         case 0 ... 3:
1302                 *val = vcpu->arch.db[array_index_nospec(dr, size)];
1303                 break;
1304         case 4:
1305         case 6:
1306                 *val = vcpu->arch.dr6;
1307                 break;
1308         case 5:
1309         default: /* 7 */
1310                 *val = vcpu->arch.dr7;
1311                 break;
1312         }
1313 }
1314 EXPORT_SYMBOL_GPL(kvm_get_dr);
1315
1316 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu)
1317 {
1318         u32 ecx = kvm_rcx_read(vcpu);
1319         u64 data;
1320
1321         if (kvm_pmu_rdpmc(vcpu, ecx, &data)) {
1322                 kvm_inject_gp(vcpu, 0);
1323                 return 1;
1324         }
1325
1326         kvm_rax_write(vcpu, (u32)data);
1327         kvm_rdx_write(vcpu, data >> 32);
1328         return kvm_skip_emulated_instruction(vcpu);
1329 }
1330 EXPORT_SYMBOL_GPL(kvm_emulate_rdpmc);
1331
1332 /*
1333  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1334  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1335  *
1336  * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1337  * extract the supported MSRs from the related const lists.
1338  * msrs_to_save is selected from the msrs_to_save_all to reflect the
1339  * capabilities of the host cpu. This capabilities test skips MSRs that are
1340  * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1341  * may depend on host virtualization features rather than host cpu features.
1342  */
1343
1344 static const u32 msrs_to_save_all[] = {
1345         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1346         MSR_STAR,
1347 #ifdef CONFIG_X86_64
1348         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1349 #endif
1350         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1351         MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1352         MSR_IA32_SPEC_CTRL,
1353         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1354         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1355         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1356         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1357         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1358         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1359         MSR_IA32_UMWAIT_CONTROL,
1360
1361         MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1362         MSR_ARCH_PERFMON_FIXED_CTR0 + 2,
1363         MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1364         MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1365         MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1366         MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1367         MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1368         MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1369         MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1370         MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1371         MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1372         MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1373         MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1374         MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1375         MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1376         MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1377         MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1378         MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1379         MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1380         MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1381         MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1382         MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1383
1384         MSR_K7_EVNTSEL0, MSR_K7_EVNTSEL1, MSR_K7_EVNTSEL2, MSR_K7_EVNTSEL3,
1385         MSR_K7_PERFCTR0, MSR_K7_PERFCTR1, MSR_K7_PERFCTR2, MSR_K7_PERFCTR3,
1386         MSR_F15H_PERF_CTL0, MSR_F15H_PERF_CTL1, MSR_F15H_PERF_CTL2,
1387         MSR_F15H_PERF_CTL3, MSR_F15H_PERF_CTL4, MSR_F15H_PERF_CTL5,
1388         MSR_F15H_PERF_CTR0, MSR_F15H_PERF_CTR1, MSR_F15H_PERF_CTR2,
1389         MSR_F15H_PERF_CTR3, MSR_F15H_PERF_CTR4, MSR_F15H_PERF_CTR5,
1390         MSR_IA32_XFD, MSR_IA32_XFD_ERR,
1391 };
1392
1393 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
1394 static unsigned num_msrs_to_save;
1395
1396 static const u32 emulated_msrs_all[] = {
1397         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1398         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1399         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1400         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1401         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1402         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1403         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1404         HV_X64_MSR_RESET,
1405         HV_X64_MSR_VP_INDEX,
1406         HV_X64_MSR_VP_RUNTIME,
1407         HV_X64_MSR_SCONTROL,
1408         HV_X64_MSR_STIMER0_CONFIG,
1409         HV_X64_MSR_VP_ASSIST_PAGE,
1410         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1411         HV_X64_MSR_TSC_EMULATION_STATUS,
1412         HV_X64_MSR_SYNDBG_OPTIONS,
1413         HV_X64_MSR_SYNDBG_CONTROL, HV_X64_MSR_SYNDBG_STATUS,
1414         HV_X64_MSR_SYNDBG_SEND_BUFFER, HV_X64_MSR_SYNDBG_RECV_BUFFER,
1415         HV_X64_MSR_SYNDBG_PENDING_BUFFER,
1416
1417         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1418         MSR_KVM_PV_EOI_EN, MSR_KVM_ASYNC_PF_INT, MSR_KVM_ASYNC_PF_ACK,
1419
1420         MSR_IA32_TSC_ADJUST,
1421         MSR_IA32_TSC_DEADLINE,
1422         MSR_IA32_ARCH_CAPABILITIES,
1423         MSR_IA32_PERF_CAPABILITIES,
1424         MSR_IA32_MISC_ENABLE,
1425         MSR_IA32_MCG_STATUS,
1426         MSR_IA32_MCG_CTL,
1427         MSR_IA32_MCG_EXT_CTL,
1428         MSR_IA32_SMBASE,
1429         MSR_SMI_COUNT,
1430         MSR_PLATFORM_INFO,
1431         MSR_MISC_FEATURES_ENABLES,
1432         MSR_AMD64_VIRT_SPEC_CTRL,
1433         MSR_AMD64_TSC_RATIO,
1434         MSR_IA32_POWER_CTL,
1435         MSR_IA32_UCODE_REV,
1436
1437         /*
1438          * The following list leaves out MSRs whose values are determined
1439          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1440          * We always support the "true" VMX control MSRs, even if the host
1441          * processor does not, so I am putting these registers here rather
1442          * than in msrs_to_save_all.
1443          */
1444         MSR_IA32_VMX_BASIC,
1445         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1446         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1447         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1448         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1449         MSR_IA32_VMX_MISC,
1450         MSR_IA32_VMX_CR0_FIXED0,
1451         MSR_IA32_VMX_CR4_FIXED0,
1452         MSR_IA32_VMX_VMCS_ENUM,
1453         MSR_IA32_VMX_PROCBASED_CTLS2,
1454         MSR_IA32_VMX_EPT_VPID_CAP,
1455         MSR_IA32_VMX_VMFUNC,
1456
1457         MSR_K7_HWCR,
1458         MSR_KVM_POLL_CONTROL,
1459 };
1460
1461 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1462 static unsigned num_emulated_msrs;
1463
1464 /*
1465  * List of msr numbers which are used to expose MSR-based features that
1466  * can be used by a hypervisor to validate requested CPU features.
1467  */
1468 static const u32 msr_based_features_all[] = {
1469         MSR_IA32_VMX_BASIC,
1470         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1471         MSR_IA32_VMX_PINBASED_CTLS,
1472         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1473         MSR_IA32_VMX_PROCBASED_CTLS,
1474         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1475         MSR_IA32_VMX_EXIT_CTLS,
1476         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1477         MSR_IA32_VMX_ENTRY_CTLS,
1478         MSR_IA32_VMX_MISC,
1479         MSR_IA32_VMX_CR0_FIXED0,
1480         MSR_IA32_VMX_CR0_FIXED1,
1481         MSR_IA32_VMX_CR4_FIXED0,
1482         MSR_IA32_VMX_CR4_FIXED1,
1483         MSR_IA32_VMX_VMCS_ENUM,
1484         MSR_IA32_VMX_PROCBASED_CTLS2,
1485         MSR_IA32_VMX_EPT_VPID_CAP,
1486         MSR_IA32_VMX_VMFUNC,
1487
1488         MSR_F10H_DECFG,
1489         MSR_IA32_UCODE_REV,
1490         MSR_IA32_ARCH_CAPABILITIES,
1491         MSR_IA32_PERF_CAPABILITIES,
1492 };
1493
1494 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
1495 static unsigned int num_msr_based_features;
1496
1497 static u64 kvm_get_arch_capabilities(void)
1498 {
1499         u64 data = 0;
1500
1501         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1502                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1503
1504         /*
1505          * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1506          * the nested hypervisor runs with NX huge pages.  If it is not,
1507          * L1 is anyway vulnerable to ITLB_MULTIHIT exploits from other
1508          * L1 guests, so it need not worry about its own (L2) guests.
1509          */
1510         data |= ARCH_CAP_PSCHANGE_MC_NO;
1511
1512         /*
1513          * If we're doing cache flushes (either "always" or "cond")
1514          * we will do one whenever the guest does a vmlaunch/vmresume.
1515          * If an outer hypervisor is doing the cache flush for us
1516          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1517          * capability to the guest too, and if EPT is disabled we're not
1518          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1519          * require a nested hypervisor to do a flush of its own.
1520          */
1521         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1522                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1523
1524         if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1525                 data |= ARCH_CAP_RDCL_NO;
1526         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1527                 data |= ARCH_CAP_SSB_NO;
1528         if (!boot_cpu_has_bug(X86_BUG_MDS))
1529                 data |= ARCH_CAP_MDS_NO;
1530
1531         if (!boot_cpu_has(X86_FEATURE_RTM)) {
1532                 /*
1533                  * If RTM=0 because the kernel has disabled TSX, the host might
1534                  * have TAA_NO or TSX_CTRL.  Clear TAA_NO (the guest sees RTM=0
1535                  * and therefore knows that there cannot be TAA) but keep
1536                  * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1537                  * and we want to allow migrating those guests to tsx=off hosts.
1538                  */
1539                 data &= ~ARCH_CAP_TAA_NO;
1540         } else if (!boot_cpu_has_bug(X86_BUG_TAA)) {
1541                 data |= ARCH_CAP_TAA_NO;
1542         } else {
1543                 /*
1544                  * Nothing to do here; we emulate TSX_CTRL if present on the
1545                  * host so the guest can choose between disabling TSX or
1546                  * using VERW to clear CPU buffers.
1547                  */
1548         }
1549
1550         return data;
1551 }
1552
1553 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1554 {
1555         switch (msr->index) {
1556         case MSR_IA32_ARCH_CAPABILITIES:
1557                 msr->data = kvm_get_arch_capabilities();
1558                 break;
1559         case MSR_IA32_UCODE_REV:
1560                 rdmsrl_safe(msr->index, &msr->data);
1561                 break;
1562         default:
1563                 return static_call(kvm_x86_get_msr_feature)(msr);
1564         }
1565         return 0;
1566 }
1567
1568 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1569 {
1570         struct kvm_msr_entry msr;
1571         int r;
1572
1573         msr.index = index;
1574         r = kvm_get_msr_feature(&msr);
1575
1576         if (r == KVM_MSR_RET_INVALID) {
1577                 /* Unconditionally clear the output for simplicity */
1578                 *data = 0;
1579                 if (kvm_msr_ignored_check(index, 0, false))
1580                         r = 0;
1581         }
1582
1583         if (r)
1584                 return r;
1585
1586         *data = msr.data;
1587
1588         return 0;
1589 }
1590
1591 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1592 {
1593         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1594                 return false;
1595
1596         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1597                 return false;
1598
1599         if (efer & (EFER_LME | EFER_LMA) &&
1600             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1601                 return false;
1602
1603         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1604                 return false;
1605
1606         return true;
1607
1608 }
1609 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1610 {
1611         if (efer & efer_reserved_bits)
1612                 return false;
1613
1614         return __kvm_valid_efer(vcpu, efer);
1615 }
1616 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1617
1618 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1619 {
1620         u64 old_efer = vcpu->arch.efer;
1621         u64 efer = msr_info->data;
1622         int r;
1623
1624         if (efer & efer_reserved_bits)
1625                 return 1;
1626
1627         if (!msr_info->host_initiated) {
1628                 if (!__kvm_valid_efer(vcpu, efer))
1629                         return 1;
1630
1631                 if (is_paging(vcpu) &&
1632                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1633                         return 1;
1634         }
1635
1636         efer &= ~EFER_LMA;
1637         efer |= vcpu->arch.efer & EFER_LMA;
1638
1639         r = static_call(kvm_x86_set_efer)(vcpu, efer);
1640         if (r) {
1641                 WARN_ON(r > 0);
1642                 return r;
1643         }
1644
1645         /* Update reserved bits */
1646         if ((efer ^ old_efer) & EFER_NX)
1647                 kvm_mmu_reset_context(vcpu);
1648
1649         return 0;
1650 }
1651
1652 void kvm_enable_efer_bits(u64 mask)
1653 {
1654        efer_reserved_bits &= ~mask;
1655 }
1656 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1657
1658 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type)
1659 {
1660         struct kvm_x86_msr_filter *msr_filter;
1661         struct msr_bitmap_range *ranges;
1662         struct kvm *kvm = vcpu->kvm;
1663         bool allowed;
1664         int idx;
1665         u32 i;
1666
1667         /* x2APIC MSRs do not support filtering. */
1668         if (index >= 0x800 && index <= 0x8ff)
1669                 return true;
1670
1671         idx = srcu_read_lock(&kvm->srcu);
1672
1673         msr_filter = srcu_dereference(kvm->arch.msr_filter, &kvm->srcu);
1674         if (!msr_filter) {
1675                 allowed = true;
1676                 goto out;
1677         }
1678
1679         allowed = msr_filter->default_allow;
1680         ranges = msr_filter->ranges;
1681
1682         for (i = 0; i < msr_filter->count; i++) {
1683                 u32 start = ranges[i].base;
1684                 u32 end = start + ranges[i].nmsrs;
1685                 u32 flags = ranges[i].flags;
1686                 unsigned long *bitmap = ranges[i].bitmap;
1687
1688                 if ((index >= start) && (index < end) && (flags & type)) {
1689                         allowed = !!test_bit(index - start, bitmap);
1690                         break;
1691                 }
1692         }
1693
1694 out:
1695         srcu_read_unlock(&kvm->srcu, idx);
1696
1697         return allowed;
1698 }
1699 EXPORT_SYMBOL_GPL(kvm_msr_allowed);
1700
1701 /*
1702  * Write @data into the MSR specified by @index.  Select MSR specific fault
1703  * checks are bypassed if @host_initiated is %true.
1704  * Returns 0 on success, non-0 otherwise.
1705  * Assumes vcpu_load() was already called.
1706  */
1707 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1708                          bool host_initiated)
1709 {
1710         struct msr_data msr;
1711
1712         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_WRITE))
1713                 return KVM_MSR_RET_FILTERED;
1714
1715         switch (index) {
1716         case MSR_FS_BASE:
1717         case MSR_GS_BASE:
1718         case MSR_KERNEL_GS_BASE:
1719         case MSR_CSTAR:
1720         case MSR_LSTAR:
1721                 if (is_noncanonical_address(data, vcpu))
1722                         return 1;
1723                 break;
1724         case MSR_IA32_SYSENTER_EIP:
1725         case MSR_IA32_SYSENTER_ESP:
1726                 /*
1727                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1728                  * non-canonical address is written on Intel but not on
1729                  * AMD (which ignores the top 32-bits, because it does
1730                  * not implement 64-bit SYSENTER).
1731                  *
1732                  * 64-bit code should hence be able to write a non-canonical
1733                  * value on AMD.  Making the address canonical ensures that
1734                  * vmentry does not fail on Intel after writing a non-canonical
1735                  * value, and that something deterministic happens if the guest
1736                  * invokes 64-bit SYSENTER.
1737                  */
1738                 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1739                 break;
1740         case MSR_TSC_AUX:
1741                 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1742                         return 1;
1743
1744                 if (!host_initiated &&
1745                     !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1746                     !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1747                         return 1;
1748
1749                 /*
1750                  * Per Intel's SDM, bits 63:32 are reserved, but AMD's APM has
1751                  * incomplete and conflicting architectural behavior.  Current
1752                  * AMD CPUs completely ignore bits 63:32, i.e. they aren't
1753                  * reserved and always read as zeros.  Enforce Intel's reserved
1754                  * bits check if and only if the guest CPU is Intel, and clear
1755                  * the bits in all other cases.  This ensures cross-vendor
1756                  * migration will provide consistent behavior for the guest.
1757                  */
1758                 if (guest_cpuid_is_intel(vcpu) && (data >> 32) != 0)
1759                         return 1;
1760
1761                 data = (u32)data;
1762                 break;
1763         }
1764
1765         msr.data = data;
1766         msr.index = index;
1767         msr.host_initiated = host_initiated;
1768
1769         return static_call(kvm_x86_set_msr)(vcpu, &msr);
1770 }
1771
1772 static int kvm_set_msr_ignored_check(struct kvm_vcpu *vcpu,
1773                                      u32 index, u64 data, bool host_initiated)
1774 {
1775         int ret = __kvm_set_msr(vcpu, index, data, host_initiated);
1776
1777         if (ret == KVM_MSR_RET_INVALID)
1778                 if (kvm_msr_ignored_check(index, data, true))
1779                         ret = 0;
1780
1781         return ret;
1782 }
1783
1784 /*
1785  * Read the MSR specified by @index into @data.  Select MSR specific fault
1786  * checks are bypassed if @host_initiated is %true.
1787  * Returns 0 on success, non-0 otherwise.
1788  * Assumes vcpu_load() was already called.
1789  */
1790 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1791                   bool host_initiated)
1792 {
1793         struct msr_data msr;
1794         int ret;
1795
1796         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_READ))
1797                 return KVM_MSR_RET_FILTERED;
1798
1799         switch (index) {
1800         case MSR_TSC_AUX:
1801                 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1802                         return 1;
1803
1804                 if (!host_initiated &&
1805                     !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1806                     !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1807                         return 1;
1808                 break;
1809         }
1810
1811         msr.index = index;
1812         msr.host_initiated = host_initiated;
1813
1814         ret = static_call(kvm_x86_get_msr)(vcpu, &msr);
1815         if (!ret)
1816                 *data = msr.data;
1817         return ret;
1818 }
1819
1820 static int kvm_get_msr_ignored_check(struct kvm_vcpu *vcpu,
1821                                      u32 index, u64 *data, bool host_initiated)
1822 {
1823         int ret = __kvm_get_msr(vcpu, index, data, host_initiated);
1824
1825         if (ret == KVM_MSR_RET_INVALID) {
1826                 /* Unconditionally clear *data for simplicity */
1827                 *data = 0;
1828                 if (kvm_msr_ignored_check(index, 0, false))
1829                         ret = 0;
1830         }
1831
1832         return ret;
1833 }
1834
1835 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1836 {
1837         return kvm_get_msr_ignored_check(vcpu, index, data, false);
1838 }
1839 EXPORT_SYMBOL_GPL(kvm_get_msr);
1840
1841 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1842 {
1843         return kvm_set_msr_ignored_check(vcpu, index, data, false);
1844 }
1845 EXPORT_SYMBOL_GPL(kvm_set_msr);
1846
1847 static void complete_userspace_rdmsr(struct kvm_vcpu *vcpu)
1848 {
1849         if (!vcpu->run->msr.error) {
1850                 kvm_rax_write(vcpu, (u32)vcpu->run->msr.data);
1851                 kvm_rdx_write(vcpu, vcpu->run->msr.data >> 32);
1852         }
1853 }
1854
1855 static int complete_emulated_msr_access(struct kvm_vcpu *vcpu)
1856 {
1857         return complete_emulated_insn_gp(vcpu, vcpu->run->msr.error);
1858 }
1859
1860 static int complete_emulated_rdmsr(struct kvm_vcpu *vcpu)
1861 {
1862         complete_userspace_rdmsr(vcpu);
1863         return complete_emulated_msr_access(vcpu);
1864 }
1865
1866 static int complete_fast_msr_access(struct kvm_vcpu *vcpu)
1867 {
1868         return static_call(kvm_x86_complete_emulated_msr)(vcpu, vcpu->run->msr.error);
1869 }
1870
1871 static int complete_fast_rdmsr(struct kvm_vcpu *vcpu)
1872 {
1873         complete_userspace_rdmsr(vcpu);
1874         return complete_fast_msr_access(vcpu);
1875 }
1876
1877 static u64 kvm_msr_reason(int r)
1878 {
1879         switch (r) {
1880         case KVM_MSR_RET_INVALID:
1881                 return KVM_MSR_EXIT_REASON_UNKNOWN;
1882         case KVM_MSR_RET_FILTERED:
1883                 return KVM_MSR_EXIT_REASON_FILTER;
1884         default:
1885                 return KVM_MSR_EXIT_REASON_INVAL;
1886         }
1887 }
1888
1889 static int kvm_msr_user_space(struct kvm_vcpu *vcpu, u32 index,
1890                               u32 exit_reason, u64 data,
1891                               int (*completion)(struct kvm_vcpu *vcpu),
1892                               int r)
1893 {
1894         u64 msr_reason = kvm_msr_reason(r);
1895
1896         /* Check if the user wanted to know about this MSR fault */
1897         if (!(vcpu->kvm->arch.user_space_msr_mask & msr_reason))
1898                 return 0;
1899
1900         vcpu->run->exit_reason = exit_reason;
1901         vcpu->run->msr.error = 0;
1902         memset(vcpu->run->msr.pad, 0, sizeof(vcpu->run->msr.pad));
1903         vcpu->run->msr.reason = msr_reason;
1904         vcpu->run->msr.index = index;
1905         vcpu->run->msr.data = data;
1906         vcpu->arch.complete_userspace_io = completion;
1907
1908         return 1;
1909 }
1910
1911 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1912 {
1913         u32 ecx = kvm_rcx_read(vcpu);
1914         u64 data;
1915         int r;
1916
1917         r = kvm_get_msr(vcpu, ecx, &data);
1918
1919         if (!r) {
1920                 trace_kvm_msr_read(ecx, data);
1921
1922                 kvm_rax_write(vcpu, data & -1u);
1923                 kvm_rdx_write(vcpu, (data >> 32) & -1u);
1924         } else {
1925                 /* MSR read failed? See if we should ask user space */
1926                 if (kvm_msr_user_space(vcpu, ecx, KVM_EXIT_X86_RDMSR, 0,
1927                                        complete_fast_rdmsr, r))
1928                         return 0;
1929                 trace_kvm_msr_read_ex(ecx);
1930         }
1931
1932         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1933 }
1934 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1935
1936 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1937 {
1938         u32 ecx = kvm_rcx_read(vcpu);
1939         u64 data = kvm_read_edx_eax(vcpu);
1940         int r;
1941
1942         r = kvm_set_msr(vcpu, ecx, data);
1943
1944         if (!r) {
1945                 trace_kvm_msr_write(ecx, data);
1946         } else {
1947                 /* MSR write failed? See if we should ask user space */
1948                 if (kvm_msr_user_space(vcpu, ecx, KVM_EXIT_X86_WRMSR, data,
1949                                        complete_fast_msr_access, r))
1950                         return 0;
1951                 /* Signal all other negative errors to userspace */
1952                 if (r < 0)
1953                         return r;
1954                 trace_kvm_msr_write_ex(ecx, data);
1955         }
1956
1957         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1958 }
1959 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1960
1961 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu)
1962 {
1963         return kvm_skip_emulated_instruction(vcpu);
1964 }
1965 EXPORT_SYMBOL_GPL(kvm_emulate_as_nop);
1966
1967 int kvm_emulate_invd(struct kvm_vcpu *vcpu)
1968 {
1969         /* Treat an INVD instruction as a NOP and just skip it. */
1970         return kvm_emulate_as_nop(vcpu);
1971 }
1972 EXPORT_SYMBOL_GPL(kvm_emulate_invd);
1973
1974 int kvm_emulate_mwait(struct kvm_vcpu *vcpu)
1975 {
1976         pr_warn_once("kvm: MWAIT instruction emulated as NOP!\n");
1977         return kvm_emulate_as_nop(vcpu);
1978 }
1979 EXPORT_SYMBOL_GPL(kvm_emulate_mwait);
1980
1981 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu)
1982 {
1983         kvm_queue_exception(vcpu, UD_VECTOR);
1984         return 1;
1985 }
1986 EXPORT_SYMBOL_GPL(kvm_handle_invalid_op);
1987
1988 int kvm_emulate_monitor(struct kvm_vcpu *vcpu)
1989 {
1990         pr_warn_once("kvm: MONITOR instruction emulated as NOP!\n");
1991         return kvm_emulate_as_nop(vcpu);
1992 }
1993 EXPORT_SYMBOL_GPL(kvm_emulate_monitor);
1994
1995 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu)
1996 {
1997         xfer_to_guest_mode_prepare();
1998         return vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu) ||
1999                 xfer_to_guest_mode_work_pending();
2000 }
2001
2002 /*
2003  * The fast path for frequent and performance sensitive wrmsr emulation,
2004  * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
2005  * the latency of virtual IPI by avoiding the expensive bits of transitioning
2006  * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
2007  * other cases which must be called after interrupts are enabled on the host.
2008  */
2009 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
2010 {
2011         if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic))
2012                 return 1;
2013
2014         if (((data & APIC_SHORT_MASK) == APIC_DEST_NOSHORT) &&
2015                 ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
2016                 ((data & APIC_MODE_MASK) == APIC_DM_FIXED) &&
2017                 ((u32)(data >> 32) != X2APIC_BROADCAST)) {
2018
2019                 data &= ~(1 << 12);
2020                 kvm_apic_send_ipi(vcpu->arch.apic, (u32)data, (u32)(data >> 32));
2021                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR2, (u32)(data >> 32));
2022                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR, (u32)data);
2023                 trace_kvm_apic_write(APIC_ICR, (u32)data);
2024                 return 0;
2025         }
2026
2027         return 1;
2028 }
2029
2030 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
2031 {
2032         if (!kvm_can_use_hv_timer(vcpu))
2033                 return 1;
2034
2035         kvm_set_lapic_tscdeadline_msr(vcpu, data);
2036         return 0;
2037 }
2038
2039 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
2040 {
2041         u32 msr = kvm_rcx_read(vcpu);
2042         u64 data;
2043         fastpath_t ret = EXIT_FASTPATH_NONE;
2044
2045         switch (msr) {
2046         case APIC_BASE_MSR + (APIC_ICR >> 4):
2047                 data = kvm_read_edx_eax(vcpu);
2048                 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu, data)) {
2049                         kvm_skip_emulated_instruction(vcpu);
2050                         ret = EXIT_FASTPATH_EXIT_HANDLED;
2051                 }
2052                 break;
2053         case MSR_IA32_TSC_DEADLINE:
2054                 data = kvm_read_edx_eax(vcpu);
2055                 if (!handle_fastpath_set_tscdeadline(vcpu, data)) {
2056                         kvm_skip_emulated_instruction(vcpu);
2057                         ret = EXIT_FASTPATH_REENTER_GUEST;
2058                 }
2059                 break;
2060         default:
2061                 break;
2062         }
2063
2064         if (ret != EXIT_FASTPATH_NONE)
2065                 trace_kvm_msr_write(msr, data);
2066
2067         return ret;
2068 }
2069 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
2070
2071 /*
2072  * Adapt set_msr() to msr_io()'s calling convention
2073  */
2074 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2075 {
2076         return kvm_get_msr_ignored_check(vcpu, index, data, true);
2077 }
2078
2079 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2080 {
2081         return kvm_set_msr_ignored_check(vcpu, index, *data, true);
2082 }
2083
2084 #ifdef CONFIG_X86_64
2085 struct pvclock_clock {
2086         int vclock_mode;
2087         u64 cycle_last;
2088         u64 mask;
2089         u32 mult;
2090         u32 shift;
2091         u64 base_cycles;
2092         u64 offset;
2093 };
2094
2095 struct pvclock_gtod_data {
2096         seqcount_t      seq;
2097
2098         struct pvclock_clock clock; /* extract of a clocksource struct */
2099         struct pvclock_clock raw_clock; /* extract of a clocksource struct */
2100
2101         ktime_t         offs_boot;
2102         u64             wall_time_sec;
2103 };
2104
2105 static struct pvclock_gtod_data pvclock_gtod_data;
2106
2107 static void update_pvclock_gtod(struct timekeeper *tk)
2108 {
2109         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
2110
2111         write_seqcount_begin(&vdata->seq);
2112
2113         /* copy pvclock gtod data */
2114         vdata->clock.vclock_mode        = tk->tkr_mono.clock->vdso_clock_mode;
2115         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
2116         vdata->clock.mask               = tk->tkr_mono.mask;
2117         vdata->clock.mult               = tk->tkr_mono.mult;
2118         vdata->clock.shift              = tk->tkr_mono.shift;
2119         vdata->clock.base_cycles        = tk->tkr_mono.xtime_nsec;
2120         vdata->clock.offset             = tk->tkr_mono.base;
2121
2122         vdata->raw_clock.vclock_mode    = tk->tkr_raw.clock->vdso_clock_mode;
2123         vdata->raw_clock.cycle_last     = tk->tkr_raw.cycle_last;
2124         vdata->raw_clock.mask           = tk->tkr_raw.mask;
2125         vdata->raw_clock.mult           = tk->tkr_raw.mult;
2126         vdata->raw_clock.shift          = tk->tkr_raw.shift;
2127         vdata->raw_clock.base_cycles    = tk->tkr_raw.xtime_nsec;
2128         vdata->raw_clock.offset         = tk->tkr_raw.base;
2129
2130         vdata->wall_time_sec            = tk->xtime_sec;
2131
2132         vdata->offs_boot                = tk->offs_boot;
2133
2134         write_seqcount_end(&vdata->seq);
2135 }
2136
2137 static s64 get_kvmclock_base_ns(void)
2138 {
2139         /* Count up from boot time, but with the frequency of the raw clock.  */
2140         return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot));
2141 }
2142 #else
2143 static s64 get_kvmclock_base_ns(void)
2144 {
2145         /* Master clock not used, so we can just use CLOCK_BOOTTIME.  */
2146         return ktime_get_boottime_ns();
2147 }
2148 #endif
2149
2150 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock, int sec_hi_ofs)
2151 {
2152         int version;
2153         int r;
2154         struct pvclock_wall_clock wc;
2155         u32 wc_sec_hi;
2156         u64 wall_nsec;
2157
2158         if (!wall_clock)
2159                 return;
2160
2161         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
2162         if (r)
2163                 return;
2164
2165         if (version & 1)
2166                 ++version;  /* first time write, random junk */
2167
2168         ++version;
2169
2170         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
2171                 return;
2172
2173         /*
2174          * The guest calculates current wall clock time by adding
2175          * system time (updated by kvm_guest_time_update below) to the
2176          * wall clock specified here.  We do the reverse here.
2177          */
2178         wall_nsec = ktime_get_real_ns() - get_kvmclock_ns(kvm);
2179
2180         wc.nsec = do_div(wall_nsec, 1000000000);
2181         wc.sec = (u32)wall_nsec; /* overflow in 2106 guest time */
2182         wc.version = version;
2183
2184         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
2185
2186         if (sec_hi_ofs) {
2187                 wc_sec_hi = wall_nsec >> 32;
2188                 kvm_write_guest(kvm, wall_clock + sec_hi_ofs,
2189                                 &wc_sec_hi, sizeof(wc_sec_hi));
2190         }
2191
2192         version++;
2193         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
2194 }
2195
2196 static void kvm_write_system_time(struct kvm_vcpu *vcpu, gpa_t system_time,
2197                                   bool old_msr, bool host_initiated)
2198 {
2199         struct kvm_arch *ka = &vcpu->kvm->arch;
2200
2201         if (vcpu->vcpu_id == 0 && !host_initiated) {
2202                 if (ka->boot_vcpu_runs_old_kvmclock != old_msr)
2203                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2204
2205                 ka->boot_vcpu_runs_old_kvmclock = old_msr;
2206         }
2207
2208         vcpu->arch.time = system_time;
2209         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2210
2211         /* we verify if the enable bit is set... */
2212         vcpu->arch.pv_time_enabled = false;
2213         if (!(system_time & 1))
2214                 return;
2215
2216         if (!kvm_gfn_to_hva_cache_init(vcpu->kvm,
2217                                        &vcpu->arch.pv_time, system_time & ~1ULL,
2218                                        sizeof(struct pvclock_vcpu_time_info)))
2219                 vcpu->arch.pv_time_enabled = true;
2220
2221         return;
2222 }
2223
2224 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
2225 {
2226         do_shl32_div32(dividend, divisor);
2227         return dividend;
2228 }
2229
2230 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
2231                                s8 *pshift, u32 *pmultiplier)
2232 {
2233         uint64_t scaled64;
2234         int32_t  shift = 0;
2235         uint64_t tps64;
2236         uint32_t tps32;
2237
2238         tps64 = base_hz;
2239         scaled64 = scaled_hz;
2240         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
2241                 tps64 >>= 1;
2242                 shift--;
2243         }
2244
2245         tps32 = (uint32_t)tps64;
2246         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
2247                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
2248                         scaled64 >>= 1;
2249                 else
2250                         tps32 <<= 1;
2251                 shift++;
2252         }
2253
2254         *pshift = shift;
2255         *pmultiplier = div_frac(scaled64, tps32);
2256 }
2257
2258 #ifdef CONFIG_X86_64
2259 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
2260 #endif
2261
2262 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
2263 static unsigned long max_tsc_khz;
2264
2265 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
2266 {
2267         u64 v = (u64)khz * (1000000 + ppm);
2268         do_div(v, 1000000);
2269         return v;
2270 }
2271
2272 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier);
2273
2274 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
2275 {
2276         u64 ratio;
2277
2278         /* Guest TSC same frequency as host TSC? */
2279         if (!scale) {
2280                 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2281                 return 0;
2282         }
2283
2284         /* TSC scaling supported? */
2285         if (!kvm_has_tsc_control) {
2286                 if (user_tsc_khz > tsc_khz) {
2287                         vcpu->arch.tsc_catchup = 1;
2288                         vcpu->arch.tsc_always_catchup = 1;
2289                         return 0;
2290                 } else {
2291                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2292                         return -1;
2293                 }
2294         }
2295
2296         /* TSC scaling required  - calculate ratio */
2297         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
2298                                 user_tsc_khz, tsc_khz);
2299
2300         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
2301                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2302                                     user_tsc_khz);
2303                 return -1;
2304         }
2305
2306         kvm_vcpu_write_tsc_multiplier(vcpu, ratio);
2307         return 0;
2308 }
2309
2310 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
2311 {
2312         u32 thresh_lo, thresh_hi;
2313         int use_scaling = 0;
2314
2315         /* tsc_khz can be zero if TSC calibration fails */
2316         if (user_tsc_khz == 0) {
2317                 /* set tsc_scaling_ratio to a safe value */
2318                 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2319                 return -1;
2320         }
2321
2322         /* Compute a scale to convert nanoseconds in TSC cycles */
2323         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
2324                            &vcpu->arch.virtual_tsc_shift,
2325                            &vcpu->arch.virtual_tsc_mult);
2326         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
2327
2328         /*
2329          * Compute the variation in TSC rate which is acceptable
2330          * within the range of tolerance and decide if the
2331          * rate being applied is within that bounds of the hardware
2332          * rate.  If so, no scaling or compensation need be done.
2333          */
2334         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
2335         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
2336         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
2337                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
2338                 use_scaling = 1;
2339         }
2340         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
2341 }
2342
2343 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
2344 {
2345         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
2346                                       vcpu->arch.virtual_tsc_mult,
2347                                       vcpu->arch.virtual_tsc_shift);
2348         tsc += vcpu->arch.this_tsc_write;
2349         return tsc;
2350 }
2351
2352 static inline int gtod_is_based_on_tsc(int mode)
2353 {
2354         return mode == VDSO_CLOCKMODE_TSC || mode == VDSO_CLOCKMODE_HVCLOCK;
2355 }
2356
2357 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
2358 {
2359 #ifdef CONFIG_X86_64
2360         bool vcpus_matched;
2361         struct kvm_arch *ka = &vcpu->kvm->arch;
2362         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2363
2364         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2365                          atomic_read(&vcpu->kvm->online_vcpus));
2366
2367         /*
2368          * Once the masterclock is enabled, always perform request in
2369          * order to update it.
2370          *
2371          * In order to enable masterclock, the host clocksource must be TSC
2372          * and the vcpus need to have matched TSCs.  When that happens,
2373          * perform request to enable masterclock.
2374          */
2375         if (ka->use_master_clock ||
2376             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
2377                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2378
2379         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
2380                             atomic_read(&vcpu->kvm->online_vcpus),
2381                             ka->use_master_clock, gtod->clock.vclock_mode);
2382 #endif
2383 }
2384
2385 /*
2386  * Multiply tsc by a fixed point number represented by ratio.
2387  *
2388  * The most significant 64-N bits (mult) of ratio represent the
2389  * integral part of the fixed point number; the remaining N bits
2390  * (frac) represent the fractional part, ie. ratio represents a fixed
2391  * point number (mult + frac * 2^(-N)).
2392  *
2393  * N equals to kvm_tsc_scaling_ratio_frac_bits.
2394  */
2395 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
2396 {
2397         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
2398 }
2399
2400 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc, u64 ratio)
2401 {
2402         u64 _tsc = tsc;
2403
2404         if (ratio != kvm_default_tsc_scaling_ratio)
2405                 _tsc = __scale_tsc(ratio, tsc);
2406
2407         return _tsc;
2408 }
2409 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
2410
2411 static u64 kvm_compute_l1_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
2412 {
2413         u64 tsc;
2414
2415         tsc = kvm_scale_tsc(vcpu, rdtsc(), vcpu->arch.l1_tsc_scaling_ratio);
2416
2417         return target_tsc - tsc;
2418 }
2419
2420 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
2421 {
2422         return vcpu->arch.l1_tsc_offset +
2423                 kvm_scale_tsc(vcpu, host_tsc, vcpu->arch.l1_tsc_scaling_ratio);
2424 }
2425 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
2426
2427 u64 kvm_calc_nested_tsc_offset(u64 l1_offset, u64 l2_offset, u64 l2_multiplier)
2428 {
2429         u64 nested_offset;
2430
2431         if (l2_multiplier == kvm_default_tsc_scaling_ratio)
2432                 nested_offset = l1_offset;
2433         else
2434                 nested_offset = mul_s64_u64_shr((s64) l1_offset, l2_multiplier,
2435                                                 kvm_tsc_scaling_ratio_frac_bits);
2436
2437         nested_offset += l2_offset;
2438         return nested_offset;
2439 }
2440 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_offset);
2441
2442 u64 kvm_calc_nested_tsc_multiplier(u64 l1_multiplier, u64 l2_multiplier)
2443 {
2444         if (l2_multiplier != kvm_default_tsc_scaling_ratio)
2445                 return mul_u64_u64_shr(l1_multiplier, l2_multiplier,
2446                                        kvm_tsc_scaling_ratio_frac_bits);
2447
2448         return l1_multiplier;
2449 }
2450 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_multiplier);
2451
2452 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 l1_offset)
2453 {
2454         trace_kvm_write_tsc_offset(vcpu->vcpu_id,
2455                                    vcpu->arch.l1_tsc_offset,
2456                                    l1_offset);
2457
2458         vcpu->arch.l1_tsc_offset = l1_offset;
2459
2460         /*
2461          * If we are here because L1 chose not to trap WRMSR to TSC then
2462          * according to the spec this should set L1's TSC (as opposed to
2463          * setting L1's offset for L2).
2464          */
2465         if (is_guest_mode(vcpu))
2466                 vcpu->arch.tsc_offset = kvm_calc_nested_tsc_offset(
2467                         l1_offset,
2468                         static_call(kvm_x86_get_l2_tsc_offset)(vcpu),
2469                         static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2470         else
2471                 vcpu->arch.tsc_offset = l1_offset;
2472
2473         static_call(kvm_x86_write_tsc_offset)(vcpu, vcpu->arch.tsc_offset);
2474 }
2475
2476 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier)
2477 {
2478         vcpu->arch.l1_tsc_scaling_ratio = l1_multiplier;
2479
2480         /* Userspace is changing the multiplier while L2 is active */
2481         if (is_guest_mode(vcpu))
2482                 vcpu->arch.tsc_scaling_ratio = kvm_calc_nested_tsc_multiplier(
2483                         l1_multiplier,
2484                         static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2485         else
2486                 vcpu->arch.tsc_scaling_ratio = l1_multiplier;
2487
2488         if (kvm_has_tsc_control)
2489                 static_call(kvm_x86_write_tsc_multiplier)(
2490                         vcpu, vcpu->arch.tsc_scaling_ratio);
2491 }
2492
2493 static inline bool kvm_check_tsc_unstable(void)
2494 {
2495 #ifdef CONFIG_X86_64
2496         /*
2497          * TSC is marked unstable when we're running on Hyper-V,
2498          * 'TSC page' clocksource is good.
2499          */
2500         if (pvclock_gtod_data.clock.vclock_mode == VDSO_CLOCKMODE_HVCLOCK)
2501                 return false;
2502 #endif
2503         return check_tsc_unstable();
2504 }
2505
2506 /*
2507  * Infers attempts to synchronize the guest's tsc from host writes. Sets the
2508  * offset for the vcpu and tracks the TSC matching generation that the vcpu
2509  * participates in.
2510  */
2511 static void __kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 offset, u64 tsc,
2512                                   u64 ns, bool matched)
2513 {
2514         struct kvm *kvm = vcpu->kvm;
2515
2516         lockdep_assert_held(&kvm->arch.tsc_write_lock);
2517
2518         /*
2519          * We also track th most recent recorded KHZ, write and time to
2520          * allow the matching interval to be extended at each write.
2521          */
2522         kvm->arch.last_tsc_nsec = ns;
2523         kvm->arch.last_tsc_write = tsc;
2524         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2525         kvm->arch.last_tsc_offset = offset;
2526
2527         vcpu->arch.last_guest_tsc = tsc;
2528
2529         kvm_vcpu_write_tsc_offset(vcpu, offset);
2530
2531         if (!matched) {
2532                 /*
2533                  * We split periods of matched TSC writes into generations.
2534                  * For each generation, we track the original measured
2535                  * nanosecond time, offset, and write, so if TSCs are in
2536                  * sync, we can match exact offset, and if not, we can match
2537                  * exact software computation in compute_guest_tsc()
2538                  *
2539                  * These values are tracked in kvm->arch.cur_xxx variables.
2540                  */
2541                 kvm->arch.cur_tsc_generation++;
2542                 kvm->arch.cur_tsc_nsec = ns;
2543                 kvm->arch.cur_tsc_write = tsc;
2544                 kvm->arch.cur_tsc_offset = offset;
2545                 kvm->arch.nr_vcpus_matched_tsc = 0;
2546         } else if (vcpu->arch.this_tsc_generation != kvm->arch.cur_tsc_generation) {
2547                 kvm->arch.nr_vcpus_matched_tsc++;
2548         }
2549
2550         /* Keep track of which generation this VCPU has synchronized to */
2551         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2552         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2553         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2554
2555         kvm_track_tsc_matching(vcpu);
2556 }
2557
2558 static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 data)
2559 {
2560         struct kvm *kvm = vcpu->kvm;
2561         u64 offset, ns, elapsed;
2562         unsigned long flags;
2563         bool matched = false;
2564         bool synchronizing = false;
2565
2566         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
2567         offset = kvm_compute_l1_tsc_offset(vcpu, data);
2568         ns = get_kvmclock_base_ns();
2569         elapsed = ns - kvm->arch.last_tsc_nsec;
2570
2571         if (vcpu->arch.virtual_tsc_khz) {
2572                 if (data == 0) {
2573                         /*
2574                          * detection of vcpu initialization -- need to sync
2575                          * with other vCPUs. This particularly helps to keep
2576                          * kvm_clock stable after CPU hotplug
2577                          */
2578                         synchronizing = true;
2579                 } else {
2580                         u64 tsc_exp = kvm->arch.last_tsc_write +
2581                                                 nsec_to_cycles(vcpu, elapsed);
2582                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
2583                         /*
2584                          * Special case: TSC write with a small delta (1 second)
2585                          * of virtual cycle time against real time is
2586                          * interpreted as an attempt to synchronize the CPU.
2587                          */
2588                         synchronizing = data < tsc_exp + tsc_hz &&
2589                                         data + tsc_hz > tsc_exp;
2590                 }
2591         }
2592
2593         /*
2594          * For a reliable TSC, we can match TSC offsets, and for an unstable
2595          * TSC, we add elapsed time in this computation.  We could let the
2596          * compensation code attempt to catch up if we fall behind, but
2597          * it's better to try to match offsets from the beginning.
2598          */
2599         if (synchronizing &&
2600             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
2601                 if (!kvm_check_tsc_unstable()) {
2602                         offset = kvm->arch.cur_tsc_offset;
2603                 } else {
2604                         u64 delta = nsec_to_cycles(vcpu, elapsed);
2605                         data += delta;
2606                         offset = kvm_compute_l1_tsc_offset(vcpu, data);
2607                 }
2608                 matched = true;
2609         }
2610
2611         __kvm_synchronize_tsc(vcpu, offset, data, ns, matched);
2612         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2613 }
2614
2615 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2616                                            s64 adjustment)
2617 {
2618         u64 tsc_offset = vcpu->arch.l1_tsc_offset;
2619         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2620 }
2621
2622 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2623 {
2624         if (vcpu->arch.l1_tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
2625                 WARN_ON(adjustment < 0);
2626         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment,
2627                                    vcpu->arch.l1_tsc_scaling_ratio);
2628         adjust_tsc_offset_guest(vcpu, adjustment);
2629 }
2630
2631 #ifdef CONFIG_X86_64
2632
2633 static u64 read_tsc(void)
2634 {
2635         u64 ret = (u64)rdtsc_ordered();
2636         u64 last = pvclock_gtod_data.clock.cycle_last;
2637
2638         if (likely(ret >= last))
2639                 return ret;
2640
2641         /*
2642          * GCC likes to generate cmov here, but this branch is extremely
2643          * predictable (it's just a function of time and the likely is
2644          * very likely) and there's a data dependence, so force GCC
2645          * to generate a branch instead.  I don't barrier() because
2646          * we don't actually need a barrier, and if this function
2647          * ever gets inlined it will generate worse code.
2648          */
2649         asm volatile ("");
2650         return last;
2651 }
2652
2653 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2654                           int *mode)
2655 {
2656         long v;
2657         u64 tsc_pg_val;
2658
2659         switch (clock->vclock_mode) {
2660         case VDSO_CLOCKMODE_HVCLOCK:
2661                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2662                                                   tsc_timestamp);
2663                 if (tsc_pg_val != U64_MAX) {
2664                         /* TSC page valid */
2665                         *mode = VDSO_CLOCKMODE_HVCLOCK;
2666                         v = (tsc_pg_val - clock->cycle_last) &
2667                                 clock->mask;
2668                 } else {
2669                         /* TSC page invalid */
2670                         *mode = VDSO_CLOCKMODE_NONE;
2671                 }
2672                 break;
2673         case VDSO_CLOCKMODE_TSC:
2674                 *mode = VDSO_CLOCKMODE_TSC;
2675                 *tsc_timestamp = read_tsc();
2676                 v = (*tsc_timestamp - clock->cycle_last) &
2677                         clock->mask;
2678                 break;
2679         default:
2680                 *mode = VDSO_CLOCKMODE_NONE;
2681         }
2682
2683         if (*mode == VDSO_CLOCKMODE_NONE)
2684                 *tsc_timestamp = v = 0;
2685
2686         return v * clock->mult;
2687 }
2688
2689 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2690 {
2691         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2692         unsigned long seq;
2693         int mode;
2694         u64 ns;
2695
2696         do {
2697                 seq = read_seqcount_begin(&gtod->seq);
2698                 ns = gtod->raw_clock.base_cycles;
2699                 ns += vgettsc(&gtod->raw_clock, tsc_timestamp, &mode);
2700                 ns >>= gtod->raw_clock.shift;
2701                 ns += ktime_to_ns(ktime_add(gtod->raw_clock.offset, gtod->offs_boot));
2702         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2703         *t = ns;
2704
2705         return mode;
2706 }
2707
2708 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2709 {
2710         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2711         unsigned long seq;
2712         int mode;
2713         u64 ns;
2714
2715         do {
2716                 seq = read_seqcount_begin(&gtod->seq);
2717                 ts->tv_sec = gtod->wall_time_sec;
2718                 ns = gtod->clock.base_cycles;
2719                 ns += vgettsc(&gtod->clock, tsc_timestamp, &mode);
2720                 ns >>= gtod->clock.shift;
2721         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2722
2723         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2724         ts->tv_nsec = ns;
2725
2726         return mode;
2727 }
2728
2729 /* returns true if host is using TSC based clocksource */
2730 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2731 {
2732         /* checked again under seqlock below */
2733         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2734                 return false;
2735
2736         return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2737                                                       tsc_timestamp));
2738 }
2739
2740 /* returns true if host is using TSC based clocksource */
2741 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2742                                            u64 *tsc_timestamp)
2743 {
2744         /* checked again under seqlock below */
2745         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2746                 return false;
2747
2748         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2749 }
2750 #endif
2751
2752 /*
2753  *
2754  * Assuming a stable TSC across physical CPUS, and a stable TSC
2755  * across virtual CPUs, the following condition is possible.
2756  * Each numbered line represents an event visible to both
2757  * CPUs at the next numbered event.
2758  *
2759  * "timespecX" represents host monotonic time. "tscX" represents
2760  * RDTSC value.
2761  *
2762  *              VCPU0 on CPU0           |       VCPU1 on CPU1
2763  *
2764  * 1.  read timespec0,tsc0
2765  * 2.                                   | timespec1 = timespec0 + N
2766  *                                      | tsc1 = tsc0 + M
2767  * 3. transition to guest               | transition to guest
2768  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2769  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2770  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2771  *
2772  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2773  *
2774  *      - ret0 < ret1
2775  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2776  *              ...
2777  *      - 0 < N - M => M < N
2778  *
2779  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2780  * always the case (the difference between two distinct xtime instances
2781  * might be smaller then the difference between corresponding TSC reads,
2782  * when updating guest vcpus pvclock areas).
2783  *
2784  * To avoid that problem, do not allow visibility of distinct
2785  * system_timestamp/tsc_timestamp values simultaneously: use a master
2786  * copy of host monotonic time values. Update that master copy
2787  * in lockstep.
2788  *
2789  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2790  *
2791  */
2792
2793 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2794 {
2795 #ifdef CONFIG_X86_64
2796         struct kvm_arch *ka = &kvm->arch;
2797         int vclock_mode;
2798         bool host_tsc_clocksource, vcpus_matched;
2799
2800         lockdep_assert_held(&kvm->arch.tsc_write_lock);
2801         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2802                         atomic_read(&kvm->online_vcpus));
2803
2804         /*
2805          * If the host uses TSC clock, then passthrough TSC as stable
2806          * to the guest.
2807          */
2808         host_tsc_clocksource = kvm_get_time_and_clockread(
2809                                         &ka->master_kernel_ns,
2810                                         &ka->master_cycle_now);
2811
2812         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2813                                 && !ka->backwards_tsc_observed
2814                                 && !ka->boot_vcpu_runs_old_kvmclock;
2815
2816         if (ka->use_master_clock)
2817                 atomic_set(&kvm_guest_has_master_clock, 1);
2818
2819         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2820         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2821                                         vcpus_matched);
2822 #endif
2823 }
2824
2825 static void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2826 {
2827         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2828 }
2829
2830 static void __kvm_start_pvclock_update(struct kvm *kvm)
2831 {
2832         raw_spin_lock_irq(&kvm->arch.tsc_write_lock);
2833         write_seqcount_begin(&kvm->arch.pvclock_sc);
2834 }
2835
2836 static void kvm_start_pvclock_update(struct kvm *kvm)
2837 {
2838         kvm_make_mclock_inprogress_request(kvm);
2839
2840         /* no guest entries from this point */
2841         __kvm_start_pvclock_update(kvm);
2842 }
2843
2844 static void kvm_end_pvclock_update(struct kvm *kvm)
2845 {
2846         struct kvm_arch *ka = &kvm->arch;
2847         struct kvm_vcpu *vcpu;
2848         unsigned long i;
2849
2850         write_seqcount_end(&ka->pvclock_sc);
2851         raw_spin_unlock_irq(&ka->tsc_write_lock);
2852         kvm_for_each_vcpu(i, vcpu, kvm)
2853                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2854
2855         /* guest entries allowed */
2856         kvm_for_each_vcpu(i, vcpu, kvm)
2857                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2858 }
2859
2860 static void kvm_update_masterclock(struct kvm *kvm)
2861 {
2862         kvm_hv_invalidate_tsc_page(kvm);
2863         kvm_start_pvclock_update(kvm);
2864         pvclock_update_vm_gtod_copy(kvm);
2865         kvm_end_pvclock_update(kvm);
2866 }
2867
2868 /* Called within read_seqcount_begin/retry for kvm->pvclock_sc.  */
2869 static void __get_kvmclock(struct kvm *kvm, struct kvm_clock_data *data)
2870 {
2871         struct kvm_arch *ka = &kvm->arch;
2872         struct pvclock_vcpu_time_info hv_clock;
2873
2874         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2875         get_cpu();
2876
2877         data->flags = 0;
2878         if (ka->use_master_clock && __this_cpu_read(cpu_tsc_khz)) {
2879 #ifdef CONFIG_X86_64
2880                 struct timespec64 ts;
2881
2882                 if (kvm_get_walltime_and_clockread(&ts, &data->host_tsc)) {
2883                         data->realtime = ts.tv_nsec + NSEC_PER_SEC * ts.tv_sec;
2884                         data->flags |= KVM_CLOCK_REALTIME | KVM_CLOCK_HOST_TSC;
2885                 } else
2886 #endif
2887                 data->host_tsc = rdtsc();
2888
2889                 data->flags |= KVM_CLOCK_TSC_STABLE;
2890                 hv_clock.tsc_timestamp = ka->master_cycle_now;
2891                 hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2892                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2893                                    &hv_clock.tsc_shift,
2894                                    &hv_clock.tsc_to_system_mul);
2895                 data->clock = __pvclock_read_cycles(&hv_clock, data->host_tsc);
2896         } else {
2897                 data->clock = get_kvmclock_base_ns() + ka->kvmclock_offset;
2898         }
2899
2900         put_cpu();
2901 }
2902
2903 static void get_kvmclock(struct kvm *kvm, struct kvm_clock_data *data)
2904 {
2905         struct kvm_arch *ka = &kvm->arch;
2906         unsigned seq;
2907
2908         do {
2909                 seq = read_seqcount_begin(&ka->pvclock_sc);
2910                 __get_kvmclock(kvm, data);
2911         } while (read_seqcount_retry(&ka->pvclock_sc, seq));
2912 }
2913
2914 u64 get_kvmclock_ns(struct kvm *kvm)
2915 {
2916         struct kvm_clock_data data;
2917
2918         get_kvmclock(kvm, &data);
2919         return data.clock;
2920 }
2921
2922 static void kvm_setup_pvclock_page(struct kvm_vcpu *v,
2923                                    struct gfn_to_hva_cache *cache,
2924                                    unsigned int offset)
2925 {
2926         struct kvm_vcpu_arch *vcpu = &v->arch;
2927         struct pvclock_vcpu_time_info guest_hv_clock;
2928
2929         if (unlikely(kvm_read_guest_offset_cached(v->kvm, cache,
2930                 &guest_hv_clock, offset, sizeof(guest_hv_clock))))
2931                 return;
2932
2933         /* This VCPU is paused, but it's legal for a guest to read another
2934          * VCPU's kvmclock, so we really have to follow the specification where
2935          * it says that version is odd if data is being modified, and even after
2936          * it is consistent.
2937          *
2938          * Version field updates must be kept separate.  This is because
2939          * kvm_write_guest_cached might use a "rep movs" instruction, and
2940          * writes within a string instruction are weakly ordered.  So there
2941          * are three writes overall.
2942          *
2943          * As a small optimization, only write the version field in the first
2944          * and third write.  The vcpu->pv_time cache is still valid, because the
2945          * version field is the first in the struct.
2946          */
2947         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2948
2949         if (guest_hv_clock.version & 1)
2950                 ++guest_hv_clock.version;  /* first time write, random junk */
2951
2952         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2953         kvm_write_guest_offset_cached(v->kvm, cache,
2954                                       &vcpu->hv_clock, offset,
2955                                       sizeof(vcpu->hv_clock.version));
2956
2957         smp_wmb();
2958
2959         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2960         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2961
2962         if (vcpu->pvclock_set_guest_stopped_request) {
2963                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2964                 vcpu->pvclock_set_guest_stopped_request = false;
2965         }
2966
2967         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2968
2969         kvm_write_guest_offset_cached(v->kvm, cache,
2970                                       &vcpu->hv_clock, offset,
2971                                       sizeof(vcpu->hv_clock));
2972
2973         smp_wmb();
2974
2975         vcpu->hv_clock.version++;
2976         kvm_write_guest_offset_cached(v->kvm, cache,
2977                                      &vcpu->hv_clock, offset,
2978                                      sizeof(vcpu->hv_clock.version));
2979 }
2980
2981 static int kvm_guest_time_update(struct kvm_vcpu *v)
2982 {
2983         unsigned long flags, tgt_tsc_khz;
2984         unsigned seq;
2985         struct kvm_vcpu_arch *vcpu = &v->arch;
2986         struct kvm_arch *ka = &v->kvm->arch;
2987         s64 kernel_ns;
2988         u64 tsc_timestamp, host_tsc;
2989         u8 pvclock_flags;
2990         bool use_master_clock;
2991
2992         kernel_ns = 0;
2993         host_tsc = 0;
2994
2995         /*
2996          * If the host uses TSC clock, then passthrough TSC as stable
2997          * to the guest.
2998          */
2999         do {
3000                 seq = read_seqcount_begin(&ka->pvclock_sc);
3001                 use_master_clock = ka->use_master_clock;
3002                 if (use_master_clock) {
3003                         host_tsc = ka->master_cycle_now;
3004                         kernel_ns = ka->master_kernel_ns;
3005                 }
3006         } while (read_seqcount_retry(&ka->pvclock_sc, seq));
3007
3008         /* Keep irq disabled to prevent changes to the clock */
3009         local_irq_save(flags);
3010         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
3011         if (unlikely(tgt_tsc_khz == 0)) {
3012                 local_irq_restore(flags);
3013                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
3014                 return 1;
3015         }
3016         if (!use_master_clock) {
3017                 host_tsc = rdtsc();
3018                 kernel_ns = get_kvmclock_base_ns();
3019         }
3020
3021         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
3022
3023         /*
3024          * We may have to catch up the TSC to match elapsed wall clock
3025          * time for two reasons, even if kvmclock is used.
3026          *   1) CPU could have been running below the maximum TSC rate
3027          *   2) Broken TSC compensation resets the base at each VCPU
3028          *      entry to avoid unknown leaps of TSC even when running
3029          *      again on the same CPU.  This may cause apparent elapsed
3030          *      time to disappear, and the guest to stand still or run
3031          *      very slowly.
3032          */
3033         if (vcpu->tsc_catchup) {
3034                 u64 tsc = compute_guest_tsc(v, kernel_ns);
3035                 if (tsc > tsc_timestamp) {
3036                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
3037                         tsc_timestamp = tsc;
3038                 }
3039         }
3040
3041         local_irq_restore(flags);
3042
3043         /* With all the info we got, fill in the values */
3044
3045         if (kvm_has_tsc_control)
3046                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz,
3047                                             v->arch.l1_tsc_scaling_ratio);
3048
3049         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
3050                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
3051                                    &vcpu->hv_clock.tsc_shift,
3052                                    &vcpu->hv_clock.tsc_to_system_mul);
3053                 vcpu->hw_tsc_khz = tgt_tsc_khz;
3054         }
3055
3056         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
3057         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
3058         vcpu->last_guest_tsc = tsc_timestamp;
3059
3060         /* If the host uses TSC clocksource, then it is stable */
3061         pvclock_flags = 0;
3062         if (use_master_clock)
3063                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
3064
3065         vcpu->hv_clock.flags = pvclock_flags;
3066
3067         if (vcpu->pv_time_enabled)
3068                 kvm_setup_pvclock_page(v, &vcpu->pv_time, 0);
3069         if (vcpu->xen.vcpu_info_set)
3070                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_info_cache,
3071                                        offsetof(struct compat_vcpu_info, time));
3072         if (vcpu->xen.vcpu_time_info_set)
3073                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_time_info_cache, 0);
3074         if (!v->vcpu_idx)
3075                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
3076         return 0;
3077 }
3078
3079 /*
3080  * kvmclock updates which are isolated to a given vcpu, such as
3081  * vcpu->cpu migration, should not allow system_timestamp from
3082  * the rest of the vcpus to remain static. Otherwise ntp frequency
3083  * correction applies to one vcpu's system_timestamp but not
3084  * the others.
3085  *
3086  * So in those cases, request a kvmclock update for all vcpus.
3087  * We need to rate-limit these requests though, as they can
3088  * considerably slow guests that have a large number of vcpus.
3089  * The time for a remote vcpu to update its kvmclock is bound
3090  * by the delay we use to rate-limit the updates.
3091  */
3092
3093 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
3094
3095 static void kvmclock_update_fn(struct work_struct *work)
3096 {
3097         unsigned long i;
3098         struct delayed_work *dwork = to_delayed_work(work);
3099         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
3100                                            kvmclock_update_work);
3101         struct kvm *kvm = container_of(ka, struct kvm, arch);
3102         struct kvm_vcpu *vcpu;
3103
3104         kvm_for_each_vcpu(i, vcpu, kvm) {
3105                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3106                 kvm_vcpu_kick(vcpu);
3107         }
3108 }
3109
3110 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
3111 {
3112         struct kvm *kvm = v->kvm;
3113
3114         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
3115         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
3116                                         KVMCLOCK_UPDATE_DELAY);
3117 }
3118
3119 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
3120
3121 static void kvmclock_sync_fn(struct work_struct *work)
3122 {
3123         struct delayed_work *dwork = to_delayed_work(work);
3124         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
3125                                            kvmclock_sync_work);
3126         struct kvm *kvm = container_of(ka, struct kvm, arch);
3127
3128         if (!kvmclock_periodic_sync)
3129                 return;
3130
3131         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
3132         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
3133                                         KVMCLOCK_SYNC_PERIOD);
3134 }
3135
3136 /*
3137  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
3138  */
3139 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
3140 {
3141         /* McStatusWrEn enabled? */
3142         if (guest_cpuid_is_amd_or_hygon(vcpu))
3143                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
3144
3145         return false;
3146 }
3147
3148 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3149 {
3150         u64 mcg_cap = vcpu->arch.mcg_cap;
3151         unsigned bank_num = mcg_cap & 0xff;
3152         u32 msr = msr_info->index;
3153         u64 data = msr_info->data;
3154
3155         switch (msr) {
3156         case MSR_IA32_MCG_STATUS:
3157                 vcpu->arch.mcg_status = data;
3158                 break;
3159         case MSR_IA32_MCG_CTL:
3160                 if (!(mcg_cap & MCG_CTL_P) &&
3161                     (data || !msr_info->host_initiated))
3162                         return 1;
3163                 if (data != 0 && data != ~(u64)0)
3164                         return 1;
3165                 vcpu->arch.mcg_ctl = data;
3166                 break;
3167         default:
3168                 if (msr >= MSR_IA32_MC0_CTL &&
3169                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3170                         u32 offset = array_index_nospec(
3171                                 msr - MSR_IA32_MC0_CTL,
3172                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3173
3174                         /* only 0 or all 1s can be written to IA32_MCi_CTL
3175                          * some Linux kernels though clear bit 10 in bank 4 to
3176                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
3177                          * this to avoid an uncatched #GP in the guest
3178                          */
3179                         if ((offset & 0x3) == 0 &&
3180                             data != 0 && (data | (1 << 10)) != ~(u64)0)
3181                                 return -1;
3182
3183                         /* MCi_STATUS */
3184                         if (!msr_info->host_initiated &&
3185                             (offset & 0x3) == 1 && data != 0) {
3186                                 if (!can_set_mci_status(vcpu))
3187                                         return -1;
3188                         }
3189
3190                         vcpu->arch.mce_banks[offset] = data;
3191                         break;
3192                 }
3193                 return 1;
3194         }
3195         return 0;
3196 }
3197
3198 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu)
3199 {
3200         u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT;
3201
3202         return (vcpu->arch.apf.msr_en_val & mask) == mask;
3203 }
3204
3205 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
3206 {
3207         gpa_t gpa = data & ~0x3f;
3208
3209         /* Bits 4:5 are reserved, Should be zero */
3210         if (data & 0x30)
3211                 return 1;
3212
3213         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_VMEXIT) &&
3214             (data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT))
3215                 return 1;
3216
3217         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT) &&
3218             (data & KVM_ASYNC_PF_DELIVERY_AS_INT))
3219                 return 1;
3220
3221         if (!lapic_in_kernel(vcpu))
3222                 return data ? 1 : 0;
3223
3224         vcpu->arch.apf.msr_en_val = data;
3225
3226         if (!kvm_pv_async_pf_enabled(vcpu)) {
3227                 kvm_clear_async_pf_completion_queue(vcpu);
3228                 kvm_async_pf_hash_reset(vcpu);
3229                 return 0;
3230         }
3231
3232         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
3233                                         sizeof(u64)))
3234                 return 1;
3235
3236         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
3237         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
3238
3239         kvm_async_pf_wakeup_all(vcpu);
3240
3241         return 0;
3242 }
3243
3244 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu *vcpu, u64 data)
3245 {
3246         /* Bits 8-63 are reserved */
3247         if (data >> 8)
3248                 return 1;
3249
3250         if (!lapic_in_kernel(vcpu))
3251                 return 1;
3252
3253         vcpu->arch.apf.msr_int_val = data;
3254
3255         vcpu->arch.apf.vec = data & KVM_ASYNC_PF_VEC_MASK;
3256
3257         return 0;
3258 }
3259
3260 static void kvmclock_reset(struct kvm_vcpu *vcpu)
3261 {
3262         vcpu->arch.pv_time_enabled = false;
3263         vcpu->arch.time = 0;
3264 }
3265
3266 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu *vcpu)
3267 {
3268         ++vcpu->stat.tlb_flush;
3269         static_call(kvm_x86_tlb_flush_all)(vcpu);
3270 }
3271
3272 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu)
3273 {
3274         ++vcpu->stat.tlb_flush;
3275
3276         if (!tdp_enabled) {
3277                 /*
3278                  * A TLB flush on behalf of the guest is equivalent to
3279                  * INVPCID(all), toggling CR4.PGE, etc., which requires
3280                  * a forced sync of the shadow page tables.  Ensure all the
3281                  * roots are synced and the guest TLB in hardware is clean.
3282                  */
3283                 kvm_mmu_sync_roots(vcpu);
3284                 kvm_mmu_sync_prev_roots(vcpu);
3285         }
3286
3287         static_call(kvm_x86_tlb_flush_guest)(vcpu);
3288 }
3289
3290
3291 static inline void kvm_vcpu_flush_tlb_current(struct kvm_vcpu *vcpu)
3292 {
3293         ++vcpu->stat.tlb_flush;
3294         static_call(kvm_x86_tlb_flush_current)(vcpu);
3295 }
3296
3297 /*
3298  * Service "local" TLB flush requests, which are specific to the current MMU
3299  * context.  In addition to the generic event handling in vcpu_enter_guest(),
3300  * TLB flushes that are targeted at an MMU context also need to be serviced
3301  * prior before nested VM-Enter/VM-Exit.
3302  */
3303 void kvm_service_local_tlb_flush_requests(struct kvm_vcpu *vcpu)
3304 {
3305         if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu))
3306                 kvm_vcpu_flush_tlb_current(vcpu);
3307
3308         if (kvm_check_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu))
3309                 kvm_vcpu_flush_tlb_guest(vcpu);
3310 }
3311 EXPORT_SYMBOL_GPL(kvm_service_local_tlb_flush_requests);
3312
3313 static void record_steal_time(struct kvm_vcpu *vcpu)
3314 {
3315         struct gfn_to_hva_cache *ghc = &vcpu->arch.st.cache;
3316         struct kvm_steal_time __user *st;
3317         struct kvm_memslots *slots;
3318         u64 steal;
3319         u32 version;
3320
3321         if (kvm_xen_msr_enabled(vcpu->kvm)) {
3322                 kvm_xen_runstate_set_running(vcpu);
3323                 return;
3324         }
3325
3326         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3327                 return;
3328
3329         if (WARN_ON_ONCE(current->mm != vcpu->kvm->mm))
3330                 return;
3331
3332         slots = kvm_memslots(vcpu->kvm);
3333
3334         if (unlikely(slots->generation != ghc->generation ||
3335                      kvm_is_error_hva(ghc->hva) || !ghc->memslot)) {
3336                 gfn_t gfn = vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS;
3337
3338                 /* We rely on the fact that it fits in a single page. */
3339                 BUILD_BUG_ON((sizeof(*st) - 1) & KVM_STEAL_VALID_BITS);
3340
3341                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, ghc, gfn, sizeof(*st)) ||
3342                     kvm_is_error_hva(ghc->hva) || !ghc->memslot)
3343                         return;
3344         }
3345
3346         st = (struct kvm_steal_time __user *)ghc->hva;
3347         /*
3348          * Doing a TLB flush here, on the guest's behalf, can avoid
3349          * expensive IPIs.
3350          */
3351         if (guest_pv_has(vcpu, KVM_FEATURE_PV_TLB_FLUSH)) {
3352                 u8 st_preempted = 0;
3353                 int err = -EFAULT;
3354
3355                 if (!user_access_begin(st, sizeof(*st)))
3356                         return;
3357
3358                 asm volatile("1: xchgb %0, %2\n"
3359                              "xor %1, %1\n"
3360                              "2:\n"
3361                              _ASM_EXTABLE_UA(1b, 2b)
3362                              : "+q" (st_preempted),
3363                                "+&r" (err),
3364                                "+m" (st->preempted));
3365                 if (err)
3366                         goto out;
3367
3368                 user_access_end();
3369
3370                 vcpu->arch.st.preempted = 0;
3371
3372                 trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
3373                                        st_preempted & KVM_VCPU_FLUSH_TLB);
3374                 if (st_preempted & KVM_VCPU_FLUSH_TLB)
3375                         kvm_vcpu_flush_tlb_guest(vcpu);
3376
3377                 if (!user_access_begin(st, sizeof(*st)))
3378                         goto dirty;
3379         } else {
3380                 if (!user_access_begin(st, sizeof(*st)))
3381                         return;
3382
3383                 unsafe_put_user(0, &st->preempted, out);
3384                 vcpu->arch.st.preempted = 0;
3385         }
3386
3387         unsafe_get_user(version, &st->version, out);
3388         if (version & 1)
3389                 version += 1;  /* first time write, random junk */
3390
3391         version += 1;
3392         unsafe_put_user(version, &st->version, out);
3393
3394         smp_wmb();
3395
3396         unsafe_get_user(steal, &st->steal, out);
3397         steal += current->sched_info.run_delay -
3398                 vcpu->arch.st.last_steal;
3399         vcpu->arch.st.last_steal = current->sched_info.run_delay;
3400         unsafe_put_user(steal, &st->steal, out);
3401
3402         version += 1;
3403         unsafe_put_user(version, &st->version, out);
3404
3405  out:
3406         user_access_end();
3407  dirty:
3408         mark_page_dirty_in_slot(vcpu->kvm, ghc->memslot, gpa_to_gfn(ghc->gpa));
3409 }
3410
3411 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3412 {
3413         bool pr = false;
3414         u32 msr = msr_info->index;
3415         u64 data = msr_info->data;
3416
3417         if (msr && msr == vcpu->kvm->arch.xen_hvm_config.msr)
3418                 return kvm_xen_write_hypercall_page(vcpu, data);
3419
3420         switch (msr) {
3421         case MSR_AMD64_NB_CFG:
3422         case MSR_IA32_UCODE_WRITE:
3423         case MSR_VM_HSAVE_PA:
3424         case MSR_AMD64_PATCH_LOADER:
3425         case MSR_AMD64_BU_CFG2:
3426         case MSR_AMD64_DC_CFG:
3427         case MSR_F15H_EX_CFG:
3428                 break;
3429
3430         case MSR_IA32_UCODE_REV:
3431                 if (msr_info->host_initiated)
3432                         vcpu->arch.microcode_version = data;
3433                 break;
3434         case MSR_IA32_ARCH_CAPABILITIES:
3435                 if (!msr_info->host_initiated)
3436                         return 1;
3437                 vcpu->arch.arch_capabilities = data;
3438                 break;
3439         case MSR_IA32_PERF_CAPABILITIES: {
3440                 struct kvm_msr_entry msr_ent = {.index = msr, .data = 0};
3441
3442                 if (!msr_info->host_initiated)
3443                         return 1;
3444                 if (kvm_get_msr_feature(&msr_ent))
3445                         return 1;
3446                 if (data & ~msr_ent.data)
3447                         return 1;
3448
3449                 vcpu->arch.perf_capabilities = data;
3450
3451                 return 0;
3452                 }
3453         case MSR_EFER:
3454                 return set_efer(vcpu, msr_info);
3455         case MSR_K7_HWCR:
3456                 data &= ~(u64)0x40;     /* ignore flush filter disable */
3457                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
3458                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
3459
3460                 /* Handle McStatusWrEn */
3461                 if (data == BIT_ULL(18)) {
3462                         vcpu->arch.msr_hwcr = data;
3463                 } else if (data != 0) {
3464                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
3465                                     data);
3466                         return 1;
3467                 }
3468                 break;
3469         case MSR_FAM10H_MMIO_CONF_BASE:
3470                 if (data != 0) {
3471                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
3472                                     "0x%llx\n", data);
3473                         return 1;
3474                 }
3475                 break;
3476         case 0x200 ... 0x2ff:
3477                 return kvm_mtrr_set_msr(vcpu, msr, data);
3478         case MSR_IA32_APICBASE:
3479                 return kvm_set_apic_base(vcpu, msr_info);
3480         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3481                 return kvm_x2apic_msr_write(vcpu, msr, data);
3482         case MSR_IA32_TSC_DEADLINE:
3483                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
3484                 break;
3485         case MSR_IA32_TSC_ADJUST:
3486                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
3487                         if (!msr_info->host_initiated) {
3488                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
3489                                 adjust_tsc_offset_guest(vcpu, adj);
3490                                 /* Before back to guest, tsc_timestamp must be adjusted
3491                                  * as well, otherwise guest's percpu pvclock time could jump.
3492                                  */
3493                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3494                         }
3495                         vcpu->arch.ia32_tsc_adjust_msr = data;
3496                 }
3497                 break;
3498         case MSR_IA32_MISC_ENABLE:
3499                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
3500                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
3501                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
3502                                 return 1;
3503                         vcpu->arch.ia32_misc_enable_msr = data;
3504                         kvm_update_cpuid_runtime(vcpu);
3505                 } else {
3506                         vcpu->arch.ia32_misc_enable_msr = data;
3507                 }
3508                 break;
3509         case MSR_IA32_SMBASE:
3510                 if (!msr_info->host_initiated)
3511                         return 1;
3512                 vcpu->arch.smbase = data;
3513                 break;
3514         case MSR_IA32_POWER_CTL:
3515                 vcpu->arch.msr_ia32_power_ctl = data;
3516                 break;
3517         case MSR_IA32_TSC:
3518                 if (msr_info->host_initiated) {
3519                         kvm_synchronize_tsc(vcpu, data);
3520                 } else {
3521                         u64 adj = kvm_compute_l1_tsc_offset(vcpu, data) - vcpu->arch.l1_tsc_offset;
3522                         adjust_tsc_offset_guest(vcpu, adj);
3523                         vcpu->arch.ia32_tsc_adjust_msr += adj;
3524                 }
3525                 break;
3526         case MSR_IA32_XSS:
3527                 if (!msr_info->host_initiated &&
3528                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3529                         return 1;
3530                 /*
3531                  * KVM supports exposing PT to the guest, but does not support
3532                  * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3533                  * XSAVES/XRSTORS to save/restore PT MSRs.
3534                  */
3535                 if (data & ~supported_xss)
3536                         return 1;
3537                 vcpu->arch.ia32_xss = data;
3538                 break;
3539         case MSR_SMI_COUNT:
3540                 if (!msr_info->host_initiated)
3541                         return 1;
3542                 vcpu->arch.smi_count = data;
3543                 break;
3544         case MSR_KVM_WALL_CLOCK_NEW:
3545                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3546                         return 1;
3547
3548                 vcpu->kvm->arch.wall_clock = data;
3549                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3550                 break;
3551         case MSR_KVM_WALL_CLOCK:
3552                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3553                         return 1;
3554
3555                 vcpu->kvm->arch.wall_clock = data;
3556                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3557                 break;
3558         case MSR_KVM_SYSTEM_TIME_NEW:
3559                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3560                         return 1;
3561
3562                 kvm_write_system_time(vcpu, data, false, msr_info->host_initiated);
3563                 break;
3564         case MSR_KVM_SYSTEM_TIME:
3565                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3566                         return 1;
3567
3568                 kvm_write_system_time(vcpu, data, true,  msr_info->host_initiated);
3569                 break;
3570         case MSR_KVM_ASYNC_PF_EN:
3571                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3572                         return 1;
3573
3574                 if (kvm_pv_enable_async_pf(vcpu, data))
3575                         return 1;
3576                 break;
3577         case MSR_KVM_ASYNC_PF_INT:
3578                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3579                         return 1;
3580
3581                 if (kvm_pv_enable_async_pf_int(vcpu, data))
3582                         return 1;
3583                 break;
3584         case MSR_KVM_ASYNC_PF_ACK:
3585                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3586                         return 1;
3587                 if (data & 0x1) {
3588                         vcpu->arch.apf.pageready_pending = false;
3589                         kvm_check_async_pf_completion(vcpu);
3590                 }
3591                 break;
3592         case MSR_KVM_STEAL_TIME:
3593                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3594                         return 1;
3595
3596                 if (unlikely(!sched_info_on()))
3597                         return 1;
3598
3599                 if (data & KVM_STEAL_RESERVED_MASK)
3600                         return 1;
3601
3602                 vcpu->arch.st.msr_val = data;
3603
3604                 if (!(data & KVM_MSR_ENABLED))
3605                         break;
3606
3607                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3608
3609                 break;
3610         case MSR_KVM_PV_EOI_EN:
3611                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3612                         return 1;
3613
3614                 if (kvm_lapic_set_pv_eoi(vcpu, data, sizeof(u8)))
3615                         return 1;
3616                 break;
3617
3618         case MSR_KVM_POLL_CONTROL:
3619                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3620                         return 1;
3621
3622                 /* only enable bit supported */
3623                 if (data & (-1ULL << 1))
3624                         return 1;
3625
3626                 vcpu->arch.msr_kvm_poll_control = data;
3627                 break;
3628
3629         case MSR_IA32_MCG_CTL:
3630         case MSR_IA32_MCG_STATUS:
3631         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3632                 return set_msr_mce(vcpu, msr_info);
3633
3634         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3635         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3636                 pr = true;
3637                 fallthrough;
3638         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3639         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3640                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3641                         return kvm_pmu_set_msr(vcpu, msr_info);
3642
3643                 if (pr || data != 0)
3644                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
3645                                     "0x%x data 0x%llx\n", msr, data);
3646                 break;
3647         case MSR_K7_CLK_CTL:
3648                 /*
3649                  * Ignore all writes to this no longer documented MSR.
3650                  * Writes are only relevant for old K7 processors,
3651                  * all pre-dating SVM, but a recommended workaround from
3652                  * AMD for these chips. It is possible to specify the
3653                  * affected processor models on the command line, hence
3654                  * the need to ignore the workaround.
3655                  */
3656                 break;
3657         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3658         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3659         case HV_X64_MSR_SYNDBG_OPTIONS:
3660         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3661         case HV_X64_MSR_CRASH_CTL:
3662         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3663         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3664         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3665         case HV_X64_MSR_TSC_EMULATION_STATUS:
3666                 return kvm_hv_set_msr_common(vcpu, msr, data,
3667                                              msr_info->host_initiated);
3668         case MSR_IA32_BBL_CR_CTL3:
3669                 /* Drop writes to this legacy MSR -- see rdmsr
3670                  * counterpart for further detail.
3671                  */
3672                 if (report_ignored_msrs)
3673                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
3674                                 msr, data);
3675                 break;
3676         case MSR_AMD64_OSVW_ID_LENGTH:
3677                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3678                         return 1;
3679                 vcpu->arch.osvw.length = data;
3680                 break;
3681         case MSR_AMD64_OSVW_STATUS:
3682                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3683                         return 1;
3684                 vcpu->arch.osvw.status = data;
3685                 break;
3686         case MSR_PLATFORM_INFO:
3687                 if (!msr_info->host_initiated ||
3688                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
3689                      cpuid_fault_enabled(vcpu)))
3690                         return 1;
3691                 vcpu->arch.msr_platform_info = data;
3692                 break;
3693         case MSR_MISC_FEATURES_ENABLES:
3694                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
3695                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
3696                      !supports_cpuid_fault(vcpu)))
3697                         return 1;
3698                 vcpu->arch.msr_misc_features_enables = data;
3699                 break;
3700 #ifdef CONFIG_X86_64
3701         case MSR_IA32_XFD:
3702                 if (!msr_info->host_initiated &&
3703                     !guest_cpuid_has(vcpu, X86_FEATURE_XFD))
3704                         return 1;
3705
3706                 if (data & ~(XFEATURE_MASK_USER_DYNAMIC &
3707                              vcpu->arch.guest_supported_xcr0))
3708                         return 1;
3709
3710                 fpu_update_guest_xfd(&vcpu->arch.guest_fpu, data);
3711                 break;
3712         case MSR_IA32_XFD_ERR:
3713                 if (!msr_info->host_initiated &&
3714                     !guest_cpuid_has(vcpu, X86_FEATURE_XFD))
3715                         return 1;
3716
3717                 if (data & ~(XFEATURE_MASK_USER_DYNAMIC &
3718                              vcpu->arch.guest_supported_xcr0))
3719                         return 1;
3720
3721                 vcpu->arch.guest_fpu.xfd_err = data;
3722                 break;
3723 #endif
3724         default:
3725                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3726                         return kvm_pmu_set_msr(vcpu, msr_info);
3727                 return KVM_MSR_RET_INVALID;
3728         }
3729         return 0;
3730 }
3731 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
3732
3733 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
3734 {
3735         u64 data;
3736         u64 mcg_cap = vcpu->arch.mcg_cap;
3737         unsigned bank_num = mcg_cap & 0xff;
3738
3739         switch (msr) {
3740         case MSR_IA32_P5_MC_ADDR:
3741         case MSR_IA32_P5_MC_TYPE:
3742                 data = 0;
3743                 break;
3744         case MSR_IA32_MCG_CAP:
3745                 data = vcpu->arch.mcg_cap;
3746                 break;
3747         case MSR_IA32_MCG_CTL:
3748                 if (!(mcg_cap & MCG_CTL_P) && !host)
3749                         return 1;
3750                 data = vcpu->arch.mcg_ctl;
3751                 break;
3752         case MSR_IA32_MCG_STATUS:
3753                 data = vcpu->arch.mcg_status;
3754                 break;
3755         default:
3756                 if (msr >= MSR_IA32_MC0_CTL &&
3757                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3758                         u32 offset = array_index_nospec(
3759                                 msr - MSR_IA32_MC0_CTL,
3760                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3761
3762                         data = vcpu->arch.mce_banks[offset];
3763                         break;
3764                 }
3765                 return 1;
3766         }
3767         *pdata = data;
3768         return 0;
3769 }
3770
3771 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3772 {
3773         switch (msr_info->index) {
3774         case MSR_IA32_PLATFORM_ID:
3775         case MSR_IA32_EBL_CR_POWERON:
3776         case MSR_IA32_LASTBRANCHFROMIP:
3777         case MSR_IA32_LASTBRANCHTOIP:
3778         case MSR_IA32_LASTINTFROMIP:
3779         case MSR_IA32_LASTINTTOIP:
3780         case MSR_AMD64_SYSCFG:
3781         case MSR_K8_TSEG_ADDR:
3782         case MSR_K8_TSEG_MASK:
3783         case MSR_VM_HSAVE_PA:
3784         case MSR_K8_INT_PENDING_MSG:
3785         case MSR_AMD64_NB_CFG:
3786         case MSR_FAM10H_MMIO_CONF_BASE:
3787         case MSR_AMD64_BU_CFG2:
3788         case MSR_IA32_PERF_CTL:
3789         case MSR_AMD64_DC_CFG:
3790         case MSR_F15H_EX_CFG:
3791         /*
3792          * Intel Sandy Bridge CPUs must support the RAPL (running average power
3793          * limit) MSRs. Just return 0, as we do not want to expose the host
3794          * data here. Do not conditionalize this on CPUID, as KVM does not do
3795          * so for existing CPU-specific MSRs.
3796          */
3797         case MSR_RAPL_POWER_UNIT:
3798         case MSR_PP0_ENERGY_STATUS:     /* Power plane 0 (core) */
3799         case MSR_PP1_ENERGY_STATUS:     /* Power plane 1 (graphics uncore) */
3800         case MSR_PKG_ENERGY_STATUS:     /* Total package */
3801         case MSR_DRAM_ENERGY_STATUS:    /* DRAM controller */
3802                 msr_info->data = 0;
3803                 break;
3804         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3805                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3806                         return kvm_pmu_get_msr(vcpu, msr_info);
3807                 if (!msr_info->host_initiated)
3808                         return 1;
3809                 msr_info->data = 0;
3810                 break;
3811         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3812         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3813         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3814         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3815                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3816                         return kvm_pmu_get_msr(vcpu, msr_info);
3817                 msr_info->data = 0;
3818                 break;
3819         case MSR_IA32_UCODE_REV:
3820                 msr_info->data = vcpu->arch.microcode_version;
3821                 break;
3822         case MSR_IA32_ARCH_CAPABILITIES:
3823                 if (!msr_info->host_initiated &&
3824                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
3825                         return 1;
3826                 msr_info->data = vcpu->arch.arch_capabilities;
3827                 break;
3828         case MSR_IA32_PERF_CAPABILITIES:
3829                 if (!msr_info->host_initiated &&
3830                     !guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
3831                         return 1;
3832                 msr_info->data = vcpu->arch.perf_capabilities;
3833                 break;
3834         case MSR_IA32_POWER_CTL:
3835                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
3836                 break;
3837         case MSR_IA32_TSC: {
3838                 /*
3839                  * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3840                  * even when not intercepted. AMD manual doesn't explicitly
3841                  * state this but appears to behave the same.
3842                  *
3843                  * On userspace reads and writes, however, we unconditionally
3844                  * return L1's TSC value to ensure backwards-compatible
3845                  * behavior for migration.
3846                  */
3847                 u64 offset, ratio;
3848
3849                 if (msr_info->host_initiated) {
3850                         offset = vcpu->arch.l1_tsc_offset;
3851                         ratio = vcpu->arch.l1_tsc_scaling_ratio;
3852                 } else {
3853                         offset = vcpu->arch.tsc_offset;
3854                         ratio = vcpu->arch.tsc_scaling_ratio;
3855                 }
3856
3857                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc(), ratio) + offset;
3858                 break;
3859         }
3860         case MSR_MTRRcap:
3861         case 0x200 ... 0x2ff:
3862                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
3863         case 0xcd: /* fsb frequency */
3864                 msr_info->data = 3;
3865                 break;
3866                 /*
3867                  * MSR_EBC_FREQUENCY_ID
3868                  * Conservative value valid for even the basic CPU models.
3869                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3870                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3871                  * and 266MHz for model 3, or 4. Set Core Clock
3872                  * Frequency to System Bus Frequency Ratio to 1 (bits
3873                  * 31:24) even though these are only valid for CPU
3874                  * models > 2, however guests may end up dividing or
3875                  * multiplying by zero otherwise.
3876                  */
3877         case MSR_EBC_FREQUENCY_ID:
3878                 msr_info->data = 1 << 24;
3879                 break;
3880         case MSR_IA32_APICBASE:
3881                 msr_info->data = kvm_get_apic_base(vcpu);
3882                 break;
3883         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3884                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
3885         case MSR_IA32_TSC_DEADLINE:
3886                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
3887                 break;
3888         case MSR_IA32_TSC_ADJUST:
3889                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
3890                 break;
3891         case MSR_IA32_MISC_ENABLE:
3892                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
3893                 break;
3894         case MSR_IA32_SMBASE:
3895                 if (!msr_info->host_initiated)
3896                         return 1;
3897                 msr_info->data = vcpu->arch.smbase;
3898                 break;
3899         case MSR_SMI_COUNT:
3900                 msr_info->data = vcpu->arch.smi_count;
3901                 break;
3902         case MSR_IA32_PERF_STATUS:
3903                 /* TSC increment by tick */
3904                 msr_info->data = 1000ULL;
3905                 /* CPU multiplier */
3906                 msr_info->data |= (((uint64_t)4ULL) << 40);
3907                 break;
3908         case MSR_EFER:
3909                 msr_info->data = vcpu->arch.efer;
3910                 break;
3911         case MSR_KVM_WALL_CLOCK:
3912                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3913                         return 1;
3914
3915                 msr_info->data = vcpu->kvm->arch.wall_clock;
3916                 break;
3917         case MSR_KVM_WALL_CLOCK_NEW:
3918                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3919                         return 1;
3920
3921                 msr_info->data = vcpu->kvm->arch.wall_clock;
3922                 break;
3923         case MSR_KVM_SYSTEM_TIME:
3924                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3925                         return 1;
3926
3927                 msr_info->data = vcpu->arch.time;
3928                 break;
3929         case MSR_KVM_SYSTEM_TIME_NEW:
3930                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3931                         return 1;
3932
3933                 msr_info->data = vcpu->arch.time;
3934                 break;
3935         case MSR_KVM_ASYNC_PF_EN:
3936                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3937                         return 1;
3938
3939                 msr_info->data = vcpu->arch.apf.msr_en_val;
3940                 break;
3941         case MSR_KVM_ASYNC_PF_INT:
3942                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3943                         return 1;
3944
3945                 msr_info->data = vcpu->arch.apf.msr_int_val;
3946                 break;
3947         case MSR_KVM_ASYNC_PF_ACK:
3948                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3949                         return 1;
3950
3951                 msr_info->data = 0;
3952                 break;
3953         case MSR_KVM_STEAL_TIME:
3954                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3955                         return 1;
3956
3957                 msr_info->data = vcpu->arch.st.msr_val;
3958                 break;
3959         case MSR_KVM_PV_EOI_EN:
3960                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3961                         return 1;
3962
3963                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3964                 break;
3965         case MSR_KVM_POLL_CONTROL:
3966                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3967                         return 1;
3968
3969                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3970                 break;
3971         case MSR_IA32_P5_MC_ADDR:
3972         case MSR_IA32_P5_MC_TYPE:
3973         case MSR_IA32_MCG_CAP:
3974         case MSR_IA32_MCG_CTL:
3975         case MSR_IA32_MCG_STATUS:
3976         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3977                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3978                                    msr_info->host_initiated);
3979         case MSR_IA32_XSS:
3980                 if (!msr_info->host_initiated &&
3981                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3982                         return 1;
3983                 msr_info->data = vcpu->arch.ia32_xss;
3984                 break;
3985         case MSR_K7_CLK_CTL:
3986                 /*
3987                  * Provide expected ramp-up count for K7. All other
3988                  * are set to zero, indicating minimum divisors for
3989                  * every field.
3990                  *
3991                  * This prevents guest kernels on AMD host with CPU
3992                  * type 6, model 8 and higher from exploding due to
3993                  * the rdmsr failing.
3994                  */
3995                 msr_info->data = 0x20000000;
3996                 break;
3997         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3998         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3999         case HV_X64_MSR_SYNDBG_OPTIONS:
4000         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
4001         case HV_X64_MSR_CRASH_CTL:
4002         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
4003         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
4004         case HV_X64_MSR_TSC_EMULATION_CONTROL:
4005         case HV_X64_MSR_TSC_EMULATION_STATUS:
4006                 return kvm_hv_get_msr_common(vcpu,
4007                                              msr_info->index, &msr_info->data,
4008                                              msr_info->host_initiated);
4009         case MSR_IA32_BBL_CR_CTL3:
4010                 /* This legacy MSR exists but isn't fully documented in current
4011                  * silicon.  It is however accessed by winxp in very narrow
4012                  * scenarios where it sets bit #19, itself documented as
4013                  * a "reserved" bit.  Best effort attempt to source coherent
4014                  * read data here should the balance of the register be
4015                  * interpreted by the guest:
4016                  *
4017                  * L2 cache control register 3: 64GB range, 256KB size,
4018                  * enabled, latency 0x1, configured
4019                  */
4020                 msr_info->data = 0xbe702111;
4021                 break;
4022         case MSR_AMD64_OSVW_ID_LENGTH:
4023                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
4024                         return 1;
4025                 msr_info->data = vcpu->arch.osvw.length;
4026                 break;
4027         case MSR_AMD64_OSVW_STATUS:
4028                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
4029                         return 1;
4030                 msr_info->data = vcpu->arch.osvw.status;
4031                 break;
4032         case MSR_PLATFORM_INFO:
4033                 if (!msr_info->host_initiated &&
4034                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
4035                         return 1;
4036                 msr_info->data = vcpu->arch.msr_platform_info;
4037                 break;
4038         case MSR_MISC_FEATURES_ENABLES:
4039                 msr_info->data = vcpu->arch.msr_misc_features_enables;
4040                 break;
4041         case MSR_K7_HWCR:
4042                 msr_info->data = vcpu->arch.msr_hwcr;
4043                 break;
4044 #ifdef CONFIG_X86_64
4045         case MSR_IA32_XFD:
4046                 if (!msr_info->host_initiated &&
4047                     !guest_cpuid_has(vcpu, X86_FEATURE_XFD))
4048                         return 1;
4049
4050                 msr_info->data = vcpu->arch.guest_fpu.fpstate->xfd;
4051                 break;
4052         case MSR_IA32_XFD_ERR:
4053                 if (!msr_info->host_initiated &&
4054                     !guest_cpuid_has(vcpu, X86_FEATURE_XFD))
4055                         return 1;
4056
4057                 msr_info->data = vcpu->arch.guest_fpu.xfd_err;
4058                 break;
4059 #endif
4060         default:
4061                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
4062                         return kvm_pmu_get_msr(vcpu, msr_info);
4063                 return KVM_MSR_RET_INVALID;
4064         }
4065         return 0;
4066 }
4067 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
4068
4069 /*
4070  * Read or write a bunch of msrs. All parameters are kernel addresses.
4071  *
4072  * @return number of msrs set successfully.
4073  */
4074 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
4075                     struct kvm_msr_entry *entries,
4076                     int (*do_msr)(struct kvm_vcpu *vcpu,
4077                                   unsigned index, u64 *data))
4078 {
4079         int i;
4080
4081         for (i = 0; i < msrs->nmsrs; ++i)
4082                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
4083                         break;
4084
4085         return i;
4086 }
4087
4088 /*
4089  * Read or write a bunch of msrs. Parameters are user addresses.
4090  *
4091  * @return number of msrs set successfully.
4092  */
4093 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
4094                   int (*do_msr)(struct kvm_vcpu *vcpu,
4095                                 unsigned index, u64 *data),
4096                   int writeback)
4097 {
4098         struct kvm_msrs msrs;
4099         struct kvm_msr_entry *entries;
4100         int r, n;
4101         unsigned size;
4102
4103         r = -EFAULT;
4104         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
4105                 goto out;
4106
4107         r = -E2BIG;
4108         if (msrs.nmsrs >= MAX_IO_MSRS)
4109                 goto out;
4110
4111         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
4112         entries = memdup_user(user_msrs->entries, size);
4113         if (IS_ERR(entries)) {
4114                 r = PTR_ERR(entries);
4115                 goto out;
4116         }
4117
4118         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
4119         if (r < 0)
4120                 goto out_free;
4121
4122         r = -EFAULT;
4123         if (writeback && copy_to_user(user_msrs->entries, entries, size))
4124                 goto out_free;
4125
4126         r = n;
4127
4128 out_free:
4129         kfree(entries);
4130 out:
4131         return r;
4132 }
4133
4134 static inline bool kvm_can_mwait_in_guest(void)
4135 {
4136         return boot_cpu_has(X86_FEATURE_MWAIT) &&
4137                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
4138                 boot_cpu_has(X86_FEATURE_ARAT);
4139 }
4140
4141 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu *vcpu,
4142                                             struct kvm_cpuid2 __user *cpuid_arg)
4143 {
4144         struct kvm_cpuid2 cpuid;
4145         int r;
4146
4147         r = -EFAULT;
4148         if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4149                 return r;
4150
4151         r = kvm_get_hv_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4152         if (r)
4153                 return r;
4154
4155         r = -EFAULT;
4156         if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4157                 return r;
4158
4159         return 0;
4160 }
4161
4162 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
4163 {
4164         int r = 0;
4165
4166         switch (ext) {
4167         case KVM_CAP_IRQCHIP:
4168         case KVM_CAP_HLT:
4169         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
4170         case KVM_CAP_SET_TSS_ADDR:
4171         case KVM_CAP_EXT_CPUID:
4172         case KVM_CAP_EXT_EMUL_CPUID:
4173         case KVM_CAP_CLOCKSOURCE:
4174         case KVM_CAP_PIT:
4175         case KVM_CAP_NOP_IO_DELAY:
4176         case KVM_CAP_MP_STATE:
4177         case KVM_CAP_SYNC_MMU:
4178         case KVM_CAP_USER_NMI:
4179         case KVM_CAP_REINJECT_CONTROL:
4180         case KVM_CAP_IRQ_INJECT_STATUS:
4181         case KVM_CAP_IOEVENTFD:
4182         case KVM_CAP_IOEVENTFD_NO_LENGTH:
4183         case KVM_CAP_PIT2:
4184         case KVM_CAP_PIT_STATE2:
4185         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
4186         case KVM_CAP_VCPU_EVENTS:
4187         case KVM_CAP_HYPERV:
4188         case KVM_CAP_HYPERV_VAPIC:
4189         case KVM_CAP_HYPERV_SPIN:
4190         case KVM_CAP_HYPERV_SYNIC:
4191         case KVM_CAP_HYPERV_SYNIC2:
4192         case KVM_CAP_HYPERV_VP_INDEX:
4193         case KVM_CAP_HYPERV_EVENTFD:
4194         case KVM_CAP_HYPERV_TLBFLUSH:
4195         case KVM_CAP_HYPERV_SEND_IPI:
4196         case KVM_CAP_HYPERV_CPUID:
4197         case KVM_CAP_HYPERV_ENFORCE_CPUID:
4198         case KVM_CAP_SYS_HYPERV_CPUID:
4199         case KVM_CAP_PCI_SEGMENT:
4200         case KVM_CAP_DEBUGREGS:
4201         case KVM_CAP_X86_ROBUST_SINGLESTEP:
4202         case KVM_CAP_XSAVE:
4203         case KVM_CAP_ASYNC_PF:
4204         case KVM_CAP_ASYNC_PF_INT:
4205         case KVM_CAP_GET_TSC_KHZ:
4206         case KVM_CAP_KVMCLOCK_CTRL:
4207         case KVM_CAP_READONLY_MEM:
4208         case KVM_CAP_HYPERV_TIME:
4209         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
4210         case KVM_CAP_TSC_DEADLINE_TIMER:
4211         case KVM_CAP_DISABLE_QUIRKS:
4212         case KVM_CAP_SET_BOOT_CPU_ID:
4213         case KVM_CAP_SPLIT_IRQCHIP:
4214         case KVM_CAP_IMMEDIATE_EXIT:
4215         case KVM_CAP_PMU_EVENT_FILTER:
4216         case KVM_CAP_GET_MSR_FEATURES:
4217         case KVM_CAP_MSR_PLATFORM_INFO:
4218         case KVM_CAP_EXCEPTION_PAYLOAD:
4219         case KVM_CAP_SET_GUEST_DEBUG:
4220         case KVM_CAP_LAST_CPU:
4221         case KVM_CAP_X86_USER_SPACE_MSR:
4222         case KVM_CAP_X86_MSR_FILTER:
4223         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4224 #ifdef CONFIG_X86_SGX_KVM
4225         case KVM_CAP_SGX_ATTRIBUTE:
4226 #endif
4227         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
4228         case KVM_CAP_VM_MOVE_ENC_CONTEXT_FROM:
4229         case KVM_CAP_SREGS2:
4230         case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
4231         case KVM_CAP_VCPU_ATTRIBUTES:
4232                 r = 1;
4233                 break;
4234         case KVM_CAP_EXIT_HYPERCALL:
4235                 r = KVM_EXIT_HYPERCALL_VALID_MASK;
4236                 break;
4237         case KVM_CAP_SET_GUEST_DEBUG2:
4238                 return KVM_GUESTDBG_VALID_MASK;
4239 #ifdef CONFIG_KVM_XEN
4240         case KVM_CAP_XEN_HVM:
4241                 r = KVM_XEN_HVM_CONFIG_HYPERCALL_MSR |
4242                     KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL |
4243                     KVM_XEN_HVM_CONFIG_SHARED_INFO |
4244                     KVM_XEN_HVM_CONFIG_EVTCHN_2LEVEL;
4245                 if (sched_info_on())
4246                         r |= KVM_XEN_HVM_CONFIG_RUNSTATE;
4247                 break;
4248 #endif
4249         case KVM_CAP_SYNC_REGS:
4250                 r = KVM_SYNC_X86_VALID_FIELDS;
4251                 break;
4252         case KVM_CAP_ADJUST_CLOCK:
4253                 r = KVM_CLOCK_VALID_FLAGS;
4254                 break;
4255         case KVM_CAP_X86_DISABLE_EXITS:
4256                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
4257                       KVM_X86_DISABLE_EXITS_CSTATE;
4258                 if(kvm_can_mwait_in_guest())
4259                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
4260                 break;
4261         case KVM_CAP_X86_SMM:
4262                 /* SMBASE is usually relocated above 1M on modern chipsets,
4263                  * and SMM handlers might indeed rely on 4G segment limits,
4264                  * so do not report SMM to be available if real mode is
4265                  * emulated via vm86 mode.  Still, do not go to great lengths
4266                  * to avoid userspace's usage of the feature, because it is a
4267                  * fringe case that is not enabled except via specific settings
4268                  * of the module parameters.
4269                  */
4270                 r = static_call(kvm_x86_has_emulated_msr)(kvm, MSR_IA32_SMBASE);
4271                 break;
4272         case KVM_CAP_VAPIC:
4273                 r = !static_call(kvm_x86_cpu_has_accelerated_tpr)();
4274                 break;
4275         case KVM_CAP_NR_VCPUS:
4276                 r = min_t(unsigned int, num_online_cpus(), KVM_MAX_VCPUS);
4277                 break;
4278         case KVM_CAP_MAX_VCPUS:
4279                 r = KVM_MAX_VCPUS;
4280                 break;
4281         case KVM_CAP_MAX_VCPU_ID:
4282                 r = KVM_MAX_VCPU_IDS;
4283                 break;
4284         case KVM_CAP_PV_MMU:    /* obsolete */
4285                 r = 0;
4286                 break;
4287         case KVM_CAP_MCE:
4288                 r = KVM_MAX_MCE_BANKS;
4289                 break;
4290         case KVM_CAP_XCRS:
4291                 r = boot_cpu_has(X86_FEATURE_XSAVE);
4292                 break;
4293         case KVM_CAP_TSC_CONTROL:
4294                 r = kvm_has_tsc_control;
4295                 break;
4296         case KVM_CAP_X2APIC_API:
4297                 r = KVM_X2APIC_API_VALID_FLAGS;
4298                 break;
4299         case KVM_CAP_NESTED_STATE:
4300                 r = kvm_x86_ops.nested_ops->get_state ?
4301                         kvm_x86_ops.nested_ops->get_state(NULL, NULL, 0) : 0;
4302                 break;
4303         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4304                 r = kvm_x86_ops.enable_direct_tlbflush != NULL;
4305                 break;
4306         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4307                 r = kvm_x86_ops.nested_ops->enable_evmcs != NULL;
4308                 break;
4309         case KVM_CAP_SMALLER_MAXPHYADDR:
4310                 r = (int) allow_smaller_maxphyaddr;
4311                 break;
4312         case KVM_CAP_STEAL_TIME:
4313                 r = sched_info_on();
4314                 break;
4315         case KVM_CAP_X86_BUS_LOCK_EXIT:
4316                 if (kvm_has_bus_lock_exit)
4317                         r = KVM_BUS_LOCK_DETECTION_OFF |
4318                             KVM_BUS_LOCK_DETECTION_EXIT;
4319                 else
4320                         r = 0;
4321                 break;
4322         case KVM_CAP_XSAVE2: {
4323                 u64 guest_perm = xstate_get_guest_group_perm();
4324
4325                 r = xstate_required_size(supported_xcr0 & guest_perm, false);
4326                 if (r < sizeof(struct kvm_xsave))
4327                         r = sizeof(struct kvm_xsave);
4328                 break;
4329         }
4330         default:
4331                 break;
4332         }
4333         return r;
4334
4335 }
4336
4337 long kvm_arch_dev_ioctl(struct file *filp,
4338                         unsigned int ioctl, unsigned long arg)
4339 {
4340         void __user *argp = (void __user *)arg;
4341         long r;
4342
4343         switch (ioctl) {
4344         case KVM_GET_MSR_INDEX_LIST: {
4345                 struct kvm_msr_list __user *user_msr_list = argp;
4346                 struct kvm_msr_list msr_list;
4347                 unsigned n;
4348
4349                 r = -EFAULT;
4350                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4351                         goto out;
4352                 n = msr_list.nmsrs;
4353                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
4354                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4355                         goto out;
4356                 r = -E2BIG;
4357                 if (n < msr_list.nmsrs)
4358                         goto out;
4359                 r = -EFAULT;
4360                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
4361                                  num_msrs_to_save * sizeof(u32)))
4362                         goto out;
4363                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
4364                                  &emulated_msrs,
4365                                  num_emulated_msrs * sizeof(u32)))
4366                         goto out;
4367                 r = 0;
4368                 break;
4369         }
4370         case KVM_GET_SUPPORTED_CPUID:
4371         case KVM_GET_EMULATED_CPUID: {
4372                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4373                 struct kvm_cpuid2 cpuid;
4374
4375                 r = -EFAULT;
4376                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4377                         goto out;
4378
4379                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
4380                                             ioctl);
4381                 if (r)
4382                         goto out;
4383
4384                 r = -EFAULT;
4385                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4386                         goto out;
4387                 r = 0;
4388                 break;
4389         }
4390         case KVM_X86_GET_MCE_CAP_SUPPORTED:
4391                 r = -EFAULT;
4392                 if (copy_to_user(argp, &kvm_mce_cap_supported,
4393                                  sizeof(kvm_mce_cap_supported)))
4394                         goto out;
4395                 r = 0;
4396                 break;
4397         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
4398                 struct kvm_msr_list __user *user_msr_list = argp;
4399                 struct kvm_msr_list msr_list;
4400                 unsigned int n;
4401
4402                 r = -EFAULT;
4403                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4404                         goto out;
4405                 n = msr_list.nmsrs;
4406                 msr_list.nmsrs = num_msr_based_features;
4407                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4408                         goto out;
4409                 r = -E2BIG;
4410                 if (n < msr_list.nmsrs)
4411                         goto out;
4412                 r = -EFAULT;
4413                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
4414                                  num_msr_based_features * sizeof(u32)))
4415                         goto out;
4416                 r = 0;
4417                 break;
4418         }
4419         case KVM_GET_MSRS:
4420                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
4421                 break;
4422         case KVM_GET_SUPPORTED_HV_CPUID:
4423                 r = kvm_ioctl_get_supported_hv_cpuid(NULL, argp);
4424                 break;
4425         default:
4426                 r = -EINVAL;
4427                 break;
4428         }
4429 out:
4430         return r;
4431 }
4432
4433 static void wbinvd_ipi(void *garbage)
4434 {
4435         wbinvd();
4436 }
4437
4438 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
4439 {
4440         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
4441 }
4442
4443 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
4444 {
4445         /* Address WBINVD may be executed by guest */
4446         if (need_emulate_wbinvd(vcpu)) {
4447                 if (static_call(kvm_x86_has_wbinvd_exit)())
4448                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4449                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
4450                         smp_call_function_single(vcpu->cpu,
4451                                         wbinvd_ipi, NULL, 1);
4452         }
4453
4454         static_call(kvm_x86_vcpu_load)(vcpu, cpu);
4455
4456         /* Save host pkru register if supported */
4457         vcpu->arch.host_pkru = read_pkru();
4458
4459         /* Apply any externally detected TSC adjustments (due to suspend) */
4460         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
4461                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
4462                 vcpu->arch.tsc_offset_adjustment = 0;
4463                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4464         }
4465
4466         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
4467                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
4468                                 rdtsc() - vcpu->arch.last_host_tsc;
4469                 if (tsc_delta < 0)
4470                         mark_tsc_unstable("KVM discovered backwards TSC");
4471
4472                 if (kvm_check_tsc_unstable()) {
4473                         u64 offset = kvm_compute_l1_tsc_offset(vcpu,
4474                                                 vcpu->arch.last_guest_tsc);
4475                         kvm_vcpu_write_tsc_offset(vcpu, offset);
4476                         vcpu->arch.tsc_catchup = 1;
4477                 }
4478
4479                 if (kvm_lapic_hv_timer_in_use(vcpu))
4480                         kvm_lapic_restart_hv_timer(vcpu);
4481
4482                 /*
4483                  * On a host with synchronized TSC, there is no need to update
4484                  * kvmclock on vcpu->cpu migration
4485                  */
4486                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
4487                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
4488                 if (vcpu->cpu != cpu)
4489                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
4490                 vcpu->cpu = cpu;
4491         }
4492
4493         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
4494 }
4495
4496 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
4497 {
4498         struct gfn_to_hva_cache *ghc = &vcpu->arch.st.cache;
4499         struct kvm_steal_time __user *st;
4500         struct kvm_memslots *slots;
4501         static const u8 preempted = KVM_VCPU_PREEMPTED;
4502
4503         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
4504                 return;
4505
4506         if (vcpu->arch.st.preempted)
4507                 return;
4508
4509         /* This happens on process exit */
4510         if (unlikely(current->mm != vcpu->kvm->mm))
4511                 return;
4512
4513         slots = kvm_memslots(vcpu->kvm);
4514
4515         if (unlikely(slots->generation != ghc->generation ||
4516                      kvm_is_error_hva(ghc->hva) || !ghc->memslot))
4517                 return;
4518
4519         st = (struct kvm_steal_time __user *)ghc->hva;
4520         BUILD_BUG_ON(sizeof(st->preempted) != sizeof(preempted));
4521
4522         if (!copy_to_user_nofault(&st->preempted, &preempted, sizeof(preempted)))
4523                 vcpu->arch.st.preempted = KVM_VCPU_PREEMPTED;
4524
4525         mark_page_dirty_in_slot(vcpu->kvm, ghc->memslot, gpa_to_gfn(ghc->gpa));
4526 }
4527
4528 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
4529 {
4530         int idx;
4531
4532         if (vcpu->preempted && !vcpu->arch.guest_state_protected)
4533                 vcpu->arch.preempted_in_kernel = !static_call(kvm_x86_get_cpl)(vcpu);
4534
4535         /*
4536          * Take the srcu lock as memslots will be accessed to check the gfn
4537          * cache generation against the memslots generation.
4538          */
4539         idx = srcu_read_lock(&vcpu->kvm->srcu);
4540         if (kvm_xen_msr_enabled(vcpu->kvm))
4541                 kvm_xen_runstate_set_preempted(vcpu);
4542         else
4543                 kvm_steal_time_set_preempted(vcpu);
4544         srcu_read_unlock(&vcpu->kvm->srcu, idx);
4545
4546         static_call(kvm_x86_vcpu_put)(vcpu);
4547         vcpu->arch.last_host_tsc = rdtsc();
4548 }
4549
4550 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
4551                                     struct kvm_lapic_state *s)
4552 {
4553         static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
4554
4555         return kvm_apic_get_state(vcpu, s);
4556 }
4557
4558 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
4559                                     struct kvm_lapic_state *s)
4560 {
4561         int r;
4562
4563         r = kvm_apic_set_state(vcpu, s);
4564         if (r)
4565                 return r;
4566         update_cr8_intercept(vcpu);
4567
4568         return 0;
4569 }
4570
4571 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
4572 {
4573         /*
4574          * We can accept userspace's request for interrupt injection
4575          * as long as we have a place to store the interrupt number.
4576          * The actual injection will happen when the CPU is able to
4577          * deliver the interrupt.
4578          */
4579         if (kvm_cpu_has_extint(vcpu))
4580                 return false;
4581
4582         /* Acknowledging ExtINT does not happen if LINT0 is masked.  */
4583         return (!lapic_in_kernel(vcpu) ||
4584                 kvm_apic_accept_pic_intr(vcpu));
4585 }
4586
4587 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
4588 {
4589         /*
4590          * Do not cause an interrupt window exit if an exception
4591          * is pending or an event needs reinjection; userspace
4592          * might want to inject the interrupt manually using KVM_SET_REGS
4593          * or KVM_SET_SREGS.  For that to work, we must be at an
4594          * instruction boundary and with no events half-injected.
4595          */
4596         return (kvm_arch_interrupt_allowed(vcpu) &&
4597                 kvm_cpu_accept_dm_intr(vcpu) &&
4598                 !kvm_event_needs_reinjection(vcpu) &&
4599                 !vcpu->arch.exception.pending);
4600 }
4601
4602 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
4603                                     struct kvm_interrupt *irq)
4604 {
4605         if (irq->irq >= KVM_NR_INTERRUPTS)
4606                 return -EINVAL;
4607
4608         if (!irqchip_in_kernel(vcpu->kvm)) {
4609                 kvm_queue_interrupt(vcpu, irq->irq, false);
4610                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4611                 return 0;
4612         }
4613
4614         /*
4615          * With in-kernel LAPIC, we only use this to inject EXTINT, so
4616          * fail for in-kernel 8259.
4617          */
4618         if (pic_in_kernel(vcpu->kvm))
4619                 return -ENXIO;
4620
4621         if (vcpu->arch.pending_external_vector != -1)
4622                 return -EEXIST;
4623
4624         vcpu->arch.pending_external_vector = irq->irq;
4625         kvm_make_request(KVM_REQ_EVENT, vcpu);
4626         return 0;
4627 }
4628
4629 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
4630 {
4631         kvm_inject_nmi(vcpu);
4632
4633         return 0;
4634 }
4635
4636 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
4637 {
4638         kvm_make_request(KVM_REQ_SMI, vcpu);
4639
4640         return 0;
4641 }
4642
4643 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
4644                                            struct kvm_tpr_access_ctl *tac)
4645 {
4646         if (tac->flags)
4647                 return -EINVAL;
4648         vcpu->arch.tpr_access_reporting = !!tac->enabled;
4649         return 0;
4650 }
4651
4652 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
4653                                         u64 mcg_cap)
4654 {
4655         int r;
4656         unsigned bank_num = mcg_cap & 0xff, bank;
4657
4658         r = -EINVAL;
4659         if (!bank_num || bank_num > KVM_MAX_MCE_BANKS)
4660                 goto out;
4661         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
4662                 goto out;
4663         r = 0;
4664         vcpu->arch.mcg_cap = mcg_cap;
4665         /* Init IA32_MCG_CTL to all 1s */
4666         if (mcg_cap & MCG_CTL_P)
4667                 vcpu->arch.mcg_ctl = ~(u64)0;
4668         /* Init IA32_MCi_CTL to all 1s */
4669         for (bank = 0; bank < bank_num; bank++)
4670                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
4671
4672         static_call(kvm_x86_setup_mce)(vcpu);
4673 out:
4674         return r;
4675 }
4676
4677 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
4678                                       struct kvm_x86_mce *mce)
4679 {
4680         u64 mcg_cap = vcpu->arch.mcg_cap;
4681         unsigned bank_num = mcg_cap & 0xff;
4682         u64 *banks = vcpu->arch.mce_banks;
4683
4684         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
4685                 return -EINVAL;
4686         /*
4687          * if IA32_MCG_CTL is not all 1s, the uncorrected error
4688          * reporting is disabled
4689          */
4690         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
4691             vcpu->arch.mcg_ctl != ~(u64)0)
4692                 return 0;
4693         banks += 4 * mce->bank;
4694         /*
4695          * if IA32_MCi_CTL is not all 1s, the uncorrected error
4696          * reporting is disabled for the bank
4697          */
4698         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
4699                 return 0;
4700         if (mce->status & MCI_STATUS_UC) {
4701                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
4702                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
4703                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
4704                         return 0;
4705                 }
4706                 if (banks[1] & MCI_STATUS_VAL)
4707                         mce->status |= MCI_STATUS_OVER;
4708                 banks[2] = mce->addr;
4709                 banks[3] = mce->misc;
4710                 vcpu->arch.mcg_status = mce->mcg_status;
4711                 banks[1] = mce->status;
4712                 kvm_queue_exception(vcpu, MC_VECTOR);
4713         } else if (!(banks[1] & MCI_STATUS_VAL)
4714                    || !(banks[1] & MCI_STATUS_UC)) {
4715                 if (banks[1] & MCI_STATUS_VAL)
4716                         mce->status |= MCI_STATUS_OVER;
4717                 banks[2] = mce->addr;
4718                 banks[3] = mce->misc;
4719                 banks[1] = mce->status;
4720         } else
4721                 banks[1] |= MCI_STATUS_OVER;
4722         return 0;
4723 }
4724
4725 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
4726                                                struct kvm_vcpu_events *events)
4727 {
4728         process_nmi(vcpu);
4729
4730         if (kvm_check_request(KVM_REQ_SMI, vcpu))
4731                 process_smi(vcpu);
4732
4733         /*
4734          * In guest mode, payload delivery should be deferred,
4735          * so that the L1 hypervisor can intercept #PF before
4736          * CR2 is modified (or intercept #DB before DR6 is
4737          * modified under nVMX). Unless the per-VM capability,
4738          * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4739          * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4740          * opportunistically defer the exception payload, deliver it if the
4741          * capability hasn't been requested before processing a
4742          * KVM_GET_VCPU_EVENTS.
4743          */
4744         if (!vcpu->kvm->arch.exception_payload_enabled &&
4745             vcpu->arch.exception.pending && vcpu->arch.exception.has_payload)
4746                 kvm_deliver_exception_payload(vcpu);
4747
4748         /*
4749          * The API doesn't provide the instruction length for software
4750          * exceptions, so don't report them. As long as the guest RIP
4751          * isn't advanced, we should expect to encounter the exception
4752          * again.
4753          */
4754         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
4755                 events->exception.injected = 0;
4756                 events->exception.pending = 0;
4757         } else {
4758                 events->exception.injected = vcpu->arch.exception.injected;
4759                 events->exception.pending = vcpu->arch.exception.pending;
4760                 /*
4761                  * For ABI compatibility, deliberately conflate
4762                  * pending and injected exceptions when
4763                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4764                  */
4765                 if (!vcpu->kvm->arch.exception_payload_enabled)
4766                         events->exception.injected |=
4767                                 vcpu->arch.exception.pending;
4768         }
4769         events->exception.nr = vcpu->arch.exception.nr;
4770         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
4771         events->exception.error_code = vcpu->arch.exception.error_code;
4772         events->exception_has_payload = vcpu->arch.exception.has_payload;
4773         events->exception_payload = vcpu->arch.exception.payload;
4774
4775         events->interrupt.injected =
4776                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
4777         events->interrupt.nr = vcpu->arch.interrupt.nr;
4778         events->interrupt.soft = 0;
4779         events->interrupt.shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
4780
4781         events->nmi.injected = vcpu->arch.nmi_injected;
4782         events->nmi.pending = vcpu->arch.nmi_pending != 0;
4783         events->nmi.masked = static_call(kvm_x86_get_nmi_mask)(vcpu);
4784         events->nmi.pad = 0;
4785
4786         events->sipi_vector = 0; /* never valid when reporting to user space */
4787
4788         events->smi.smm = is_smm(vcpu);
4789         events->smi.pending = vcpu->arch.smi_pending;
4790         events->smi.smm_inside_nmi =
4791                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
4792         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
4793
4794         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
4795                          | KVM_VCPUEVENT_VALID_SHADOW
4796                          | KVM_VCPUEVENT_VALID_SMM);
4797         if (vcpu->kvm->arch.exception_payload_enabled)
4798                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
4799
4800         memset(&events->reserved, 0, sizeof(events->reserved));
4801 }
4802
4803 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm);
4804
4805 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
4806                                               struct kvm_vcpu_events *events)
4807 {
4808         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4809                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4810                               | KVM_VCPUEVENT_VALID_SHADOW
4811                               | KVM_VCPUEVENT_VALID_SMM
4812                               | KVM_VCPUEVENT_VALID_PAYLOAD))
4813                 return -EINVAL;
4814
4815         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
4816                 if (!vcpu->kvm->arch.exception_payload_enabled)
4817                         return -EINVAL;
4818                 if (events->exception.pending)
4819                         events->exception.injected = 0;
4820                 else
4821                         events->exception_has_payload = 0;
4822         } else {
4823                 events->exception.pending = 0;
4824                 events->exception_has_payload = 0;
4825         }
4826
4827         if ((events->exception.injected || events->exception.pending) &&
4828             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
4829                 return -EINVAL;
4830
4831         /* INITs are latched while in SMM */
4832         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
4833             (events->smi.smm || events->smi.pending) &&
4834             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
4835                 return -EINVAL;
4836
4837         process_nmi(vcpu);
4838         vcpu->arch.exception.injected = events->exception.injected;
4839         vcpu->arch.exception.pending = events->exception.pending;
4840         vcpu->arch.exception.nr = events->exception.nr;
4841         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
4842         vcpu->arch.exception.error_code = events->exception.error_code;
4843         vcpu->arch.exception.has_payload = events->exception_has_payload;
4844         vcpu->arch.exception.payload = events->exception_payload;
4845
4846         vcpu->arch.interrupt.injected = events->interrupt.injected;
4847         vcpu->arch.interrupt.nr = events->interrupt.nr;
4848         vcpu->arch.interrupt.soft = events->interrupt.soft;
4849         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
4850                 static_call(kvm_x86_set_interrupt_shadow)(vcpu,
4851                                                 events->interrupt.shadow);
4852
4853         vcpu->arch.nmi_injected = events->nmi.injected;
4854         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
4855                 vcpu->arch.nmi_pending = events->nmi.pending;
4856         static_call(kvm_x86_set_nmi_mask)(vcpu, events->nmi.masked);
4857
4858         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
4859             lapic_in_kernel(vcpu))
4860                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
4861
4862         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
4863                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm)
4864                         kvm_smm_changed(vcpu, events->smi.smm);
4865
4866                 vcpu->arch.smi_pending = events->smi.pending;
4867
4868                 if (events->smi.smm) {
4869                         if (events->smi.smm_inside_nmi)
4870                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
4871                         else
4872                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
4873                 }
4874
4875                 if (lapic_in_kernel(vcpu)) {
4876                         if (events->smi.latched_init)
4877                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4878                         else
4879                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4880                 }
4881         }
4882
4883         kvm_make_request(KVM_REQ_EVENT, vcpu);
4884
4885         return 0;
4886 }
4887
4888 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
4889                                              struct kvm_debugregs *dbgregs)
4890 {
4891         unsigned long val;
4892
4893         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
4894         kvm_get_dr(vcpu, 6, &val);
4895         dbgregs->dr6 = val;
4896         dbgregs->dr7 = vcpu->arch.dr7;
4897         dbgregs->flags = 0;
4898         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
4899 }
4900
4901 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
4902                                             struct kvm_debugregs *dbgregs)
4903 {
4904         if (dbgregs->flags)
4905                 return -EINVAL;
4906
4907         if (!kvm_dr6_valid(dbgregs->dr6))
4908                 return -EINVAL;
4909         if (!kvm_dr7_valid(dbgregs->dr7))
4910                 return -EINVAL;
4911
4912         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
4913         kvm_update_dr0123(vcpu);
4914         vcpu->arch.dr6 = dbgregs->dr6;
4915         vcpu->arch.dr7 = dbgregs->dr7;
4916         kvm_update_dr7(vcpu);
4917
4918         return 0;
4919 }
4920
4921 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
4922                                          struct kvm_xsave *guest_xsave)
4923 {
4924         if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
4925                 return;
4926
4927         fpu_copy_guest_fpstate_to_uabi(&vcpu->arch.guest_fpu,
4928                                        guest_xsave->region,
4929                                        sizeof(guest_xsave->region),
4930                                        vcpu->arch.pkru);
4931 }
4932
4933 static void kvm_vcpu_ioctl_x86_get_xsave2(struct kvm_vcpu *vcpu,
4934                                           u8 *state, unsigned int size)
4935 {
4936         if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
4937                 return;
4938
4939         fpu_copy_guest_fpstate_to_uabi(&vcpu->arch.guest_fpu,
4940                                        state, size, vcpu->arch.pkru);
4941 }
4942
4943 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
4944                                         struct kvm_xsave *guest_xsave)
4945 {
4946         if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
4947                 return 0;
4948
4949         return fpu_copy_uabi_to_guest_fpstate(&vcpu->arch.guest_fpu,
4950                                               guest_xsave->region,
4951                                               supported_xcr0, &vcpu->arch.pkru);
4952 }
4953
4954 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
4955                                         struct kvm_xcrs *guest_xcrs)
4956 {
4957         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
4958                 guest_xcrs->nr_xcrs = 0;
4959                 return;
4960         }
4961
4962         guest_xcrs->nr_xcrs = 1;
4963         guest_xcrs->flags = 0;
4964         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
4965         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
4966 }
4967
4968 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
4969                                        struct kvm_xcrs *guest_xcrs)
4970 {
4971         int i, r = 0;
4972
4973         if (!boot_cpu_has(X86_FEATURE_XSAVE))
4974                 return -EINVAL;
4975
4976         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
4977                 return -EINVAL;
4978
4979         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
4980                 /* Only support XCR0 currently */
4981                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
4982                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
4983                                 guest_xcrs->xcrs[i].value);
4984                         break;
4985                 }
4986         if (r)
4987                 r = -EINVAL;
4988         return r;
4989 }
4990
4991 /*
4992  * kvm_set_guest_paused() indicates to the guest kernel that it has been
4993  * stopped by the hypervisor.  This function will be called from the host only.
4994  * EINVAL is returned when the host attempts to set the flag for a guest that
4995  * does not support pv clocks.
4996  */
4997 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
4998 {
4999         if (!vcpu->arch.pv_time_enabled)
5000                 return -EINVAL;
5001         vcpu->arch.pvclock_set_guest_stopped_request = true;
5002         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5003         return 0;
5004 }
5005
5006 static int kvm_arch_tsc_has_attr(struct kvm_vcpu *vcpu,
5007                                  struct kvm_device_attr *attr)
5008 {
5009         int r;
5010
5011         switch (attr->attr) {
5012         case KVM_VCPU_TSC_OFFSET:
5013                 r = 0;
5014                 break;
5015         default:
5016                 r = -ENXIO;
5017         }
5018
5019         return r;
5020 }
5021
5022 static int kvm_arch_tsc_get_attr(struct kvm_vcpu *vcpu,
5023                                  struct kvm_device_attr *attr)
5024 {
5025         u64 __user *uaddr = (u64 __user *)(unsigned long)attr->addr;
5026         int r;
5027
5028         if ((u64)(unsigned long)uaddr != attr->addr)
5029                 return -EFAULT;
5030
5031         switch (attr->attr) {
5032         case KVM_VCPU_TSC_OFFSET:
5033                 r = -EFAULT;
5034                 if (put_user(vcpu->arch.l1_tsc_offset, uaddr))
5035                         break;
5036                 r = 0;
5037                 break;
5038         default:
5039                 r = -ENXIO;
5040         }
5041
5042         return r;
5043 }
5044
5045 static int kvm_arch_tsc_set_attr(struct kvm_vcpu *vcpu,
5046                                  struct kvm_device_attr *attr)
5047 {
5048         u64 __user *uaddr = (u64 __user *)(unsigned long)attr->addr;
5049         struct kvm *kvm = vcpu->kvm;
5050         int r;
5051
5052         if ((u64)(unsigned long)uaddr != attr->addr)
5053                 return -EFAULT;
5054
5055         switch (attr->attr) {
5056         case KVM_VCPU_TSC_OFFSET: {
5057                 u64 offset, tsc, ns;
5058                 unsigned long flags;
5059                 bool matched;
5060
5061                 r = -EFAULT;
5062                 if (get_user(offset, uaddr))
5063                         break;
5064
5065                 raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
5066
5067                 matched = (vcpu->arch.virtual_tsc_khz &&
5068                            kvm->arch.last_tsc_khz == vcpu->arch.virtual_tsc_khz &&
5069                            kvm->arch.last_tsc_offset == offset);
5070
5071                 tsc = kvm_scale_tsc(vcpu, rdtsc(), vcpu->arch.l1_tsc_scaling_ratio) + offset;
5072                 ns = get_kvmclock_base_ns();
5073
5074                 __kvm_synchronize_tsc(vcpu, offset, tsc, ns, matched);
5075                 raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
5076
5077                 r = 0;
5078                 break;
5079         }
5080         default:
5081                 r = -ENXIO;
5082         }
5083
5084         return r;
5085 }
5086
5087 static int kvm_vcpu_ioctl_device_attr(struct kvm_vcpu *vcpu,
5088                                       unsigned int ioctl,
5089                                       void __user *argp)
5090 {
5091         struct kvm_device_attr attr;
5092         int r;
5093
5094         if (copy_from_user(&attr, argp, sizeof(attr)))
5095                 return -EFAULT;
5096
5097         if (attr.group != KVM_VCPU_TSC_CTRL)
5098                 return -ENXIO;
5099
5100         switch (ioctl) {
5101         case KVM_HAS_DEVICE_ATTR:
5102                 r = kvm_arch_tsc_has_attr(vcpu, &attr);
5103                 break;
5104         case KVM_GET_DEVICE_ATTR:
5105                 r = kvm_arch_tsc_get_attr(vcpu, &attr);
5106                 break;
5107         case KVM_SET_DEVICE_ATTR:
5108                 r = kvm_arch_tsc_set_attr(vcpu, &attr);
5109                 break;
5110         }
5111
5112         return r;
5113 }
5114
5115 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
5116                                      struct kvm_enable_cap *cap)
5117 {
5118         int r;
5119         uint16_t vmcs_version;
5120         void __user *user_ptr;
5121
5122         if (cap->flags)
5123                 return -EINVAL;
5124
5125         switch (cap->cap) {
5126         case KVM_CAP_HYPERV_SYNIC2:
5127                 if (cap->args[0])
5128                         return -EINVAL;
5129                 fallthrough;
5130
5131         case KVM_CAP_HYPERV_SYNIC:
5132                 if (!irqchip_in_kernel(vcpu->kvm))
5133                         return -EINVAL;
5134                 return kvm_hv_activate_synic(vcpu, cap->cap ==
5135                                              KVM_CAP_HYPERV_SYNIC2);
5136         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
5137                 if (!kvm_x86_ops.nested_ops->enable_evmcs)
5138                         return -ENOTTY;
5139                 r = kvm_x86_ops.nested_ops->enable_evmcs(vcpu, &vmcs_version);
5140                 if (!r) {
5141                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
5142                         if (copy_to_user(user_ptr, &vmcs_version,
5143                                          sizeof(vmcs_version)))
5144                                 r = -EFAULT;
5145                 }
5146                 return r;
5147         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
5148                 if (!kvm_x86_ops.enable_direct_tlbflush)
5149                         return -ENOTTY;
5150
5151                 return static_call(kvm_x86_enable_direct_tlbflush)(vcpu);
5152
5153         case KVM_CAP_HYPERV_ENFORCE_CPUID:
5154                 return kvm_hv_set_enforce_cpuid(vcpu, cap->args[0]);
5155
5156         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
5157                 vcpu->arch.pv_cpuid.enforce = cap->args[0];
5158                 if (vcpu->arch.pv_cpuid.enforce)
5159                         kvm_update_pv_runtime(vcpu);
5160
5161                 return 0;
5162         default:
5163                 return -EINVAL;
5164         }
5165 }
5166
5167 long kvm_arch_vcpu_ioctl(struct file *filp,
5168                          unsigned int ioctl, unsigned long arg)
5169 {
5170         struct kvm_vcpu *vcpu = filp->private_data;
5171         void __user *argp = (void __user *)arg;
5172         int r;
5173         union {
5174                 struct kvm_sregs2 *sregs2;
5175                 struct kvm_lapic_state *lapic;
5176                 struct kvm_xsave *xsave;
5177                 struct kvm_xcrs *xcrs;
5178                 void *buffer;
5179         } u;
5180
5181         vcpu_load(vcpu);
5182
5183         u.buffer = NULL;
5184         switch (ioctl) {
5185         case KVM_GET_LAPIC: {
5186                 r = -EINVAL;
5187                 if (!lapic_in_kernel(vcpu))
5188                         goto out;
5189                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
5190                                 GFP_KERNEL_ACCOUNT);
5191
5192                 r = -ENOMEM;
5193                 if (!u.lapic)
5194                         goto out;
5195                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
5196                 if (r)
5197                         goto out;
5198                 r = -EFAULT;
5199                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
5200                         goto out;
5201                 r = 0;
5202                 break;
5203         }
5204         case KVM_SET_LAPIC: {
5205                 r = -EINVAL;
5206                 if (!lapic_in_kernel(vcpu))
5207                         goto out;
5208                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
5209                 if (IS_ERR(u.lapic)) {
5210                         r = PTR_ERR(u.lapic);
5211                         goto out_nofree;
5212                 }
5213
5214                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
5215                 break;
5216         }
5217         case KVM_INTERRUPT: {
5218                 struct kvm_interrupt irq;
5219
5220                 r = -EFAULT;
5221                 if (copy_from_user(&irq, argp, sizeof(irq)))
5222                         goto out;
5223                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
5224                 break;
5225         }
5226         case KVM_NMI: {
5227                 r = kvm_vcpu_ioctl_nmi(vcpu);
5228                 break;
5229         }
5230         case KVM_SMI: {
5231                 r = kvm_vcpu_ioctl_smi(vcpu);
5232                 break;
5233         }
5234         case KVM_SET_CPUID: {
5235                 struct kvm_cpuid __user *cpuid_arg = argp;
5236                 struct kvm_cpuid cpuid;
5237
5238                 r = -EFAULT;
5239                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5240                         goto out;
5241                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
5242                 break;
5243         }
5244         case KVM_SET_CPUID2: {
5245                 struct kvm_cpuid2 __user *cpuid_arg = argp;
5246                 struct kvm_cpuid2 cpuid;
5247
5248                 r = -EFAULT;
5249                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5250                         goto out;
5251                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
5252                                               cpuid_arg->entries);
5253                 break;
5254         }
5255         case KVM_GET_CPUID2: {
5256                 struct kvm_cpuid2 __user *cpuid_arg = argp;
5257                 struct kvm_cpuid2 cpuid;
5258
5259                 r = -EFAULT;
5260                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5261                         goto out;
5262                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
5263                                               cpuid_arg->entries);
5264                 if (r)
5265                         goto out;
5266                 r = -EFAULT;
5267                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
5268                         goto out;
5269                 r = 0;
5270                 break;
5271         }
5272         case KVM_GET_MSRS: {
5273                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5274                 r = msr_io(vcpu, argp, do_get_msr, 1);
5275                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5276                 break;
5277         }
5278         case KVM_SET_MSRS: {
5279                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5280                 r = msr_io(vcpu, argp, do_set_msr, 0);
5281                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5282                 break;
5283         }
5284         case KVM_TPR_ACCESS_REPORTING: {
5285                 struct kvm_tpr_access_ctl tac;
5286
5287                 r = -EFAULT;
5288                 if (copy_from_user(&tac, argp, sizeof(tac)))
5289                         goto out;
5290                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
5291                 if (r)
5292                         goto out;
5293                 r = -EFAULT;
5294                 if (copy_to_user(argp, &tac, sizeof(tac)))
5295                         goto out;
5296                 r = 0;
5297                 break;
5298         };
5299         case KVM_SET_VAPIC_ADDR: {
5300                 struct kvm_vapic_addr va;
5301                 int idx;
5302
5303                 r = -EINVAL;
5304                 if (!lapic_in_kernel(vcpu))
5305                         goto out;
5306                 r = -EFAULT;
5307                 if (copy_from_user(&va, argp, sizeof(va)))
5308                         goto out;
5309                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5310                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
5311                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5312                 break;
5313         }
5314         case KVM_X86_SETUP_MCE: {
5315                 u64 mcg_cap;
5316
5317                 r = -EFAULT;
5318                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
5319                         goto out;
5320                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
5321                 break;
5322         }
5323         case KVM_X86_SET_MCE: {
5324                 struct kvm_x86_mce mce;
5325
5326                 r = -EFAULT;
5327                 if (copy_from_user(&mce, argp, sizeof(mce)))
5328                         goto out;
5329                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
5330                 break;
5331         }
5332         case KVM_GET_VCPU_EVENTS: {
5333                 struct kvm_vcpu_events events;
5334
5335                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
5336
5337                 r = -EFAULT;
5338                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
5339                         break;
5340                 r = 0;
5341                 break;
5342         }
5343         case KVM_SET_VCPU_EVENTS: {
5344                 struct kvm_vcpu_events events;
5345
5346                 r = -EFAULT;
5347                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
5348                         break;
5349
5350                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
5351                 break;
5352         }
5353         case KVM_GET_DEBUGREGS: {
5354                 struct kvm_debugregs dbgregs;
5355
5356                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
5357
5358                 r = -EFAULT;
5359                 if (copy_to_user(argp, &dbgregs,
5360                                  sizeof(struct kvm_debugregs)))
5361                         break;
5362                 r = 0;
5363                 break;
5364         }
5365         case KVM_SET_DEBUGREGS: {
5366                 struct kvm_debugregs dbgregs;
5367
5368                 r = -EFAULT;
5369                 if (copy_from_user(&dbgregs, argp,
5370                                    sizeof(struct kvm_debugregs)))
5371                         break;
5372
5373                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
5374                 break;
5375         }
5376         case KVM_GET_XSAVE: {
5377                 r = -EINVAL;
5378                 if (vcpu->arch.guest_fpu.uabi_size > sizeof(struct kvm_xsave))
5379                         break;
5380
5381                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
5382                 r = -ENOMEM;
5383                 if (!u.xsave)
5384                         break;
5385
5386                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
5387
5388                 r = -EFAULT;
5389                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
5390                         break;
5391                 r = 0;
5392                 break;
5393         }
5394         case KVM_SET_XSAVE: {
5395                 int size = vcpu->arch.guest_fpu.uabi_size;
5396
5397                 u.xsave = memdup_user(argp, size);
5398                 if (IS_ERR(u.xsave)) {
5399                         r = PTR_ERR(u.xsave);
5400                         goto out_nofree;
5401                 }
5402
5403                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
5404                 break;
5405         }
5406
5407         case KVM_GET_XSAVE2: {
5408                 int size = vcpu->arch.guest_fpu.uabi_size;
5409
5410                 u.xsave = kzalloc(size, GFP_KERNEL_ACCOUNT);
5411                 r = -ENOMEM;
5412                 if (!u.xsave)
5413                         break;
5414
5415                 kvm_vcpu_ioctl_x86_get_xsave2(vcpu, u.buffer, size);
5416
5417                 r = -EFAULT;
5418                 if (copy_to_user(argp, u.xsave, size))
5419                         break;
5420
5421                 r = 0;
5422                 break;
5423         }
5424
5425         case KVM_GET_XCRS: {
5426                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
5427                 r = -ENOMEM;
5428                 if (!u.xcrs)
5429                         break;
5430
5431                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
5432
5433                 r = -EFAULT;
5434                 if (copy_to_user(argp, u.xcrs,
5435                                  sizeof(struct kvm_xcrs)))
5436                         break;
5437                 r = 0;
5438                 break;
5439         }
5440         case KVM_SET_XCRS: {
5441                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
5442                 if (IS_ERR(u.xcrs)) {
5443                         r = PTR_ERR(u.xcrs);
5444                         goto out_nofree;
5445                 }
5446
5447                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
5448                 break;
5449         }
5450         case KVM_SET_TSC_KHZ: {
5451                 u32 user_tsc_khz;
5452
5453                 r = -EINVAL;
5454                 user_tsc_khz = (u32)arg;
5455
5456                 if (kvm_has_tsc_control &&
5457                     user_tsc_khz >= kvm_max_guest_tsc_khz)
5458                         goto out;
5459
5460                 if (user_tsc_khz == 0)
5461                         user_tsc_khz = tsc_khz;
5462
5463                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
5464                         r = 0;
5465
5466                 goto out;
5467         }
5468         case KVM_GET_TSC_KHZ: {
5469                 r = vcpu->arch.virtual_tsc_khz;
5470                 goto out;
5471         }
5472         case KVM_KVMCLOCK_CTRL: {
5473                 r = kvm_set_guest_paused(vcpu);
5474                 goto out;
5475         }
5476         case KVM_ENABLE_CAP: {
5477                 struct kvm_enable_cap cap;
5478
5479                 r = -EFAULT;
5480                 if (copy_from_user(&cap, argp, sizeof(cap)))
5481                         goto out;
5482                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
5483                 break;
5484         }
5485         case KVM_GET_NESTED_STATE: {
5486                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5487                 u32 user_data_size;
5488
5489                 r = -EINVAL;
5490                 if (!kvm_x86_ops.nested_ops->get_state)
5491                         break;
5492
5493                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
5494                 r = -EFAULT;
5495                 if (get_user(user_data_size, &user_kvm_nested_state->size))
5496                         break;
5497
5498                 r = kvm_x86_ops.nested_ops->get_state(vcpu, user_kvm_nested_state,
5499                                                      user_data_size);
5500                 if (r < 0)
5501                         break;
5502
5503                 if (r > user_data_size) {
5504                         if (put_user(r, &user_kvm_nested_state->size))
5505                                 r = -EFAULT;
5506                         else
5507                                 r = -E2BIG;
5508                         break;
5509                 }
5510
5511                 r = 0;
5512                 break;
5513         }
5514         case KVM_SET_NESTED_STATE: {
5515                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5516                 struct kvm_nested_state kvm_state;
5517                 int idx;
5518
5519                 r = -EINVAL;
5520                 if (!kvm_x86_ops.nested_ops->set_state)
5521                         break;
5522
5523                 r = -EFAULT;
5524                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
5525                         break;
5526
5527                 r = -EINVAL;
5528                 if (kvm_state.size < sizeof(kvm_state))
5529                         break;
5530
5531                 if (kvm_state.flags &
5532                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
5533                       | KVM_STATE_NESTED_EVMCS | KVM_STATE_NESTED_MTF_PENDING
5534                       | KVM_STATE_NESTED_GIF_SET))
5535                         break;
5536
5537                 /* nested_run_pending implies guest_mode.  */
5538                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
5539                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
5540                         break;
5541
5542                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5543                 r = kvm_x86_ops.nested_ops->set_state(vcpu, user_kvm_nested_state, &kvm_state);
5544                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5545                 break;
5546         }
5547         case KVM_GET_SUPPORTED_HV_CPUID:
5548                 r = kvm_ioctl_get_supported_hv_cpuid(vcpu, argp);
5549                 break;
5550 #ifdef CONFIG_KVM_XEN
5551         case KVM_XEN_VCPU_GET_ATTR: {
5552                 struct kvm_xen_vcpu_attr xva;
5553
5554                 r = -EFAULT;
5555                 if (copy_from_user(&xva, argp, sizeof(xva)))
5556                         goto out;
5557                 r = kvm_xen_vcpu_get_attr(vcpu, &xva);
5558                 if (!r && copy_to_user(argp, &xva, sizeof(xva)))
5559                         r = -EFAULT;
5560                 break;
5561         }
5562         case KVM_XEN_VCPU_SET_ATTR: {
5563                 struct kvm_xen_vcpu_attr xva;
5564
5565                 r = -EFAULT;
5566                 if (copy_from_user(&xva, argp, sizeof(xva)))
5567                         goto out;
5568                 r = kvm_xen_vcpu_set_attr(vcpu, &xva);
5569                 break;
5570         }
5571 #endif
5572         case KVM_GET_SREGS2: {
5573                 u.sregs2 = kzalloc(sizeof(struct kvm_sregs2), GFP_KERNEL);
5574                 r = -ENOMEM;
5575                 if (!u.sregs2)
5576                         goto out;
5577                 __get_sregs2(vcpu, u.sregs2);
5578                 r = -EFAULT;
5579                 if (copy_to_user(argp, u.sregs2, sizeof(struct kvm_sregs2)))
5580                         goto out;
5581                 r = 0;
5582                 break;
5583         }
5584         case KVM_SET_SREGS2: {
5585                 u.sregs2 = memdup_user(argp, sizeof(struct kvm_sregs2));
5586                 if (IS_ERR(u.sregs2)) {
5587                         r = PTR_ERR(u.sregs2);
5588                         u.sregs2 = NULL;
5589                         goto out;
5590                 }
5591                 r = __set_sregs2(vcpu, u.sregs2);
5592                 break;
5593         }
5594         case KVM_HAS_DEVICE_ATTR:
5595         case KVM_GET_DEVICE_ATTR:
5596         case KVM_SET_DEVICE_ATTR:
5597                 r = kvm_vcpu_ioctl_device_attr(vcpu, ioctl, argp);
5598                 break;
5599         default:
5600                 r = -EINVAL;
5601         }
5602 out:
5603         kfree(u.buffer);
5604 out_nofree:
5605         vcpu_put(vcpu);
5606         return r;
5607 }
5608
5609 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
5610 {
5611         return VM_FAULT_SIGBUS;
5612 }
5613
5614 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
5615 {
5616         int ret;
5617
5618         if (addr > (unsigned int)(-3 * PAGE_SIZE))
5619                 return -EINVAL;
5620         ret = static_call(kvm_x86_set_tss_addr)(kvm, addr);
5621         return ret;
5622 }
5623
5624 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
5625                                               u64 ident_addr)
5626 {
5627         return static_call(kvm_x86_set_identity_map_addr)(kvm, ident_addr);
5628 }
5629
5630 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
5631                                          unsigned long kvm_nr_mmu_pages)
5632 {
5633         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
5634                 return -EINVAL;
5635
5636         mutex_lock(&kvm->slots_lock);
5637
5638         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
5639         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
5640
5641         mutex_unlock(&kvm->slots_lock);
5642         return 0;
5643 }
5644
5645 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
5646 {
5647         return kvm->arch.n_max_mmu_pages;
5648 }
5649
5650 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5651 {
5652         struct kvm_pic *pic = kvm->arch.vpic;
5653         int r;
5654
5655         r = 0;
5656         switch (chip->chip_id) {
5657         case KVM_IRQCHIP_PIC_MASTER:
5658                 memcpy(&chip->chip.pic, &pic->pics[0],
5659                         sizeof(struct kvm_pic_state));
5660                 break;
5661         case KVM_IRQCHIP_PIC_SLAVE:
5662                 memcpy(&chip->chip.pic, &pic->pics[1],
5663                         sizeof(struct kvm_pic_state));
5664                 break;
5665         case KVM_IRQCHIP_IOAPIC:
5666                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
5667                 break;
5668         default:
5669                 r = -EINVAL;
5670                 break;
5671         }
5672         return r;
5673 }
5674
5675 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5676 {
5677         struct kvm_pic *pic = kvm->arch.vpic;
5678         int r;
5679
5680         r = 0;
5681         switch (chip->chip_id) {
5682         case KVM_IRQCHIP_PIC_MASTER:
5683                 spin_lock(&pic->lock);
5684                 memcpy(&pic->pics[0], &chip->chip.pic,
5685                         sizeof(struct kvm_pic_state));
5686                 spin_unlock(&pic->lock);
5687                 break;
5688         case KVM_IRQCHIP_PIC_SLAVE:
5689                 spin_lock(&pic->lock);
5690                 memcpy(&pic->pics[1], &chip->chip.pic,
5691                         sizeof(struct kvm_pic_state));
5692                 spin_unlock(&pic->lock);
5693                 break;
5694         case KVM_IRQCHIP_IOAPIC:
5695                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
5696                 break;
5697         default:
5698                 r = -EINVAL;
5699                 break;
5700         }
5701         kvm_pic_update_irq(pic);
5702         return r;
5703 }
5704
5705 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5706 {
5707         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
5708
5709         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
5710
5711         mutex_lock(&kps->lock);
5712         memcpy(ps, &kps->channels, sizeof(*ps));
5713         mutex_unlock(&kps->lock);
5714         return 0;
5715 }
5716
5717 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5718 {
5719         int i;
5720         struct kvm_pit *pit = kvm->arch.vpit;
5721
5722         mutex_lock(&pit->pit_state.lock);
5723         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
5724         for (i = 0; i < 3; i++)
5725                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
5726         mutex_unlock(&pit->pit_state.lock);
5727         return 0;
5728 }
5729
5730 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5731 {
5732         mutex_lock(&kvm->arch.vpit->pit_state.lock);
5733         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
5734                 sizeof(ps->channels));
5735         ps->flags = kvm->arch.vpit->pit_state.flags;
5736         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
5737         memset(&ps->reserved, 0, sizeof(ps->reserved));
5738         return 0;
5739 }
5740
5741 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5742 {
5743         int start = 0;
5744         int i;
5745         u32 prev_legacy, cur_legacy;
5746         struct kvm_pit *pit = kvm->arch.vpit;
5747
5748         mutex_lock(&pit->pit_state.lock);
5749         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
5750         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
5751         if (!prev_legacy && cur_legacy)
5752                 start = 1;
5753         memcpy(&pit->pit_state.channels, &ps->channels,
5754                sizeof(pit->pit_state.channels));
5755         pit->pit_state.flags = ps->flags;
5756         for (i = 0; i < 3; i++)
5757                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
5758                                    start && i == 0);
5759         mutex_unlock(&pit->pit_state.lock);
5760         return 0;
5761 }
5762
5763 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
5764                                  struct kvm_reinject_control *control)
5765 {
5766         struct kvm_pit *pit = kvm->arch.vpit;
5767
5768         /* pit->pit_state.lock was overloaded to prevent userspace from getting
5769          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5770          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
5771          */
5772         mutex_lock(&pit->pit_state.lock);
5773         kvm_pit_set_reinject(pit, control->pit_reinject);
5774         mutex_unlock(&pit->pit_state.lock);
5775
5776         return 0;
5777 }
5778
5779 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
5780 {
5781
5782         /*
5783          * Flush all CPUs' dirty log buffers to the  dirty_bitmap.  Called
5784          * before reporting dirty_bitmap to userspace.  KVM flushes the buffers
5785          * on all VM-Exits, thus we only need to kick running vCPUs to force a
5786          * VM-Exit.
5787          */
5788         struct kvm_vcpu *vcpu;
5789         unsigned long i;
5790
5791         kvm_for_each_vcpu(i, vcpu, kvm)
5792                 kvm_vcpu_kick(vcpu);
5793 }
5794
5795 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
5796                         bool line_status)
5797 {
5798         if (!irqchip_in_kernel(kvm))
5799                 return -ENXIO;
5800
5801         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
5802                                         irq_event->irq, irq_event->level,
5803                                         line_status);
5804         return 0;
5805 }
5806
5807 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
5808                             struct kvm_enable_cap *cap)
5809 {
5810         int r;
5811
5812         if (cap->flags)
5813                 return -EINVAL;
5814
5815         switch (cap->cap) {
5816         case KVM_CAP_DISABLE_QUIRKS:
5817                 kvm->arch.disabled_quirks = cap->args[0];
5818                 r = 0;
5819                 break;
5820         case KVM_CAP_SPLIT_IRQCHIP: {
5821                 mutex_lock(&kvm->lock);
5822                 r = -EINVAL;
5823                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
5824                         goto split_irqchip_unlock;
5825                 r = -EEXIST;
5826                 if (irqchip_in_kernel(kvm))
5827                         goto split_irqchip_unlock;
5828                 if (kvm->created_vcpus)
5829                         goto split_irqchip_unlock;
5830                 r = kvm_setup_empty_irq_routing(kvm);
5831                 if (r)
5832                         goto split_irqchip_unlock;
5833                 /* Pairs with irqchip_in_kernel. */
5834                 smp_wmb();
5835                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
5836                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
5837                 kvm_request_apicv_update(kvm, true, APICV_INHIBIT_REASON_ABSENT);
5838                 r = 0;
5839 split_irqchip_unlock:
5840                 mutex_unlock(&kvm->lock);
5841                 break;
5842         }
5843         case KVM_CAP_X2APIC_API:
5844                 r = -EINVAL;
5845                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
5846                         break;
5847
5848                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
5849                         kvm->arch.x2apic_format = true;
5850                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
5851                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
5852
5853                 r = 0;
5854                 break;
5855         case KVM_CAP_X86_DISABLE_EXITS:
5856                 r = -EINVAL;
5857                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
5858                         break;
5859
5860                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
5861                         kvm_can_mwait_in_guest())
5862                         kvm->arch.mwait_in_guest = true;
5863                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
5864                         kvm->arch.hlt_in_guest = true;
5865                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
5866                         kvm->arch.pause_in_guest = true;
5867                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
5868                         kvm->arch.cstate_in_guest = true;
5869                 r = 0;
5870                 break;
5871         case KVM_CAP_MSR_PLATFORM_INFO:
5872                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
5873                 r = 0;
5874                 break;
5875         case KVM_CAP_EXCEPTION_PAYLOAD:
5876                 kvm->arch.exception_payload_enabled = cap->args[0];
5877                 r = 0;
5878                 break;
5879         case KVM_CAP_X86_USER_SPACE_MSR:
5880                 kvm->arch.user_space_msr_mask = cap->args[0];
5881                 r = 0;
5882                 break;
5883         case KVM_CAP_X86_BUS_LOCK_EXIT:
5884                 r = -EINVAL;
5885                 if (cap->args[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE)
5886                         break;
5887
5888                 if ((cap->args[0] & KVM_BUS_LOCK_DETECTION_OFF) &&
5889                     (cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT))
5890                         break;
5891
5892                 if (kvm_has_bus_lock_exit &&
5893                     cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT)
5894                         kvm->arch.bus_lock_detection_enabled = true;
5895                 r = 0;
5896                 break;
5897 #ifdef CONFIG_X86_SGX_KVM
5898         case KVM_CAP_SGX_ATTRIBUTE: {
5899                 unsigned long allowed_attributes = 0;
5900
5901                 r = sgx_set_attribute(&allowed_attributes, cap->args[0]);
5902                 if (r)
5903                         break;
5904
5905                 /* KVM only supports the PROVISIONKEY privileged attribute. */
5906                 if ((allowed_attributes & SGX_ATTR_PROVISIONKEY) &&
5907                     !(allowed_attributes & ~SGX_ATTR_PROVISIONKEY))
5908                         kvm->arch.sgx_provisioning_allowed = true;
5909                 else
5910                         r = -EINVAL;
5911                 break;
5912         }
5913 #endif
5914         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
5915                 r = -EINVAL;
5916                 if (kvm_x86_ops.vm_copy_enc_context_from)
5917                         r = kvm_x86_ops.vm_copy_enc_context_from(kvm, cap->args[0]);
5918                 return r;
5919         case KVM_CAP_VM_MOVE_ENC_CONTEXT_FROM:
5920                 r = -EINVAL;
5921                 if (kvm_x86_ops.vm_move_enc_context_from)
5922                         r = kvm_x86_ops.vm_move_enc_context_from(
5923                                 kvm, cap->args[0]);
5924                 return r;
5925         case KVM_CAP_EXIT_HYPERCALL:
5926                 if (cap->args[0] & ~KVM_EXIT_HYPERCALL_VALID_MASK) {
5927                         r = -EINVAL;
5928                         break;
5929                 }
5930                 kvm->arch.hypercall_exit_enabled = cap->args[0];
5931                 r = 0;
5932                 break;
5933         case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
5934                 r = -EINVAL;
5935                 if (cap->args[0] & ~1)
5936                         break;
5937                 kvm->arch.exit_on_emulation_error = cap->args[0];
5938                 r = 0;
5939                 break;
5940         default:
5941                 r = -EINVAL;
5942                 break;
5943         }
5944         return r;
5945 }
5946
5947 static struct kvm_x86_msr_filter *kvm_alloc_msr_filter(bool default_allow)
5948 {
5949         struct kvm_x86_msr_filter *msr_filter;
5950
5951         msr_filter = kzalloc(sizeof(*msr_filter), GFP_KERNEL_ACCOUNT);
5952         if (!msr_filter)
5953                 return NULL;
5954
5955         msr_filter->default_allow = default_allow;
5956         return msr_filter;
5957 }
5958
5959 static void kvm_free_msr_filter(struct kvm_x86_msr_filter *msr_filter)
5960 {
5961         u32 i;
5962
5963         if (!msr_filter)
5964                 return;
5965
5966         for (i = 0; i < msr_filter->count; i++)
5967                 kfree(msr_filter->ranges[i].bitmap);
5968
5969         kfree(msr_filter);
5970 }
5971
5972 static int kvm_add_msr_filter(struct kvm_x86_msr_filter *msr_filter,
5973                               struct kvm_msr_filter_range *user_range)
5974 {
5975         unsigned long *bitmap = NULL;
5976         size_t bitmap_size;
5977
5978         if (!user_range->nmsrs)
5979                 return 0;
5980
5981         if (user_range->flags & ~(KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE))
5982                 return -EINVAL;
5983
5984         if (!user_range->flags)
5985                 return -EINVAL;
5986
5987         bitmap_size = BITS_TO_LONGS(user_range->nmsrs) * sizeof(long);
5988         if (!bitmap_size || bitmap_size > KVM_MSR_FILTER_MAX_BITMAP_SIZE)
5989                 return -EINVAL;
5990
5991         bitmap = memdup_user((__user u8*)user_range->bitmap, bitmap_size);
5992         if (IS_ERR(bitmap))
5993                 return PTR_ERR(bitmap);
5994
5995         msr_filter->ranges[msr_filter->count] = (struct msr_bitmap_range) {
5996                 .flags = user_range->flags,
5997                 .base = user_range->base,
5998                 .nmsrs = user_range->nmsrs,
5999                 .bitmap = bitmap,
6000         };
6001
6002         msr_filter->count++;
6003         return 0;
6004 }
6005
6006 static int kvm_vm_ioctl_set_msr_filter(struct kvm *kvm, void __user *argp)
6007 {
6008         struct kvm_msr_filter __user *user_msr_filter = argp;
6009         struct kvm_x86_msr_filter *new_filter, *old_filter;
6010         struct kvm_msr_filter filter;
6011         bool default_allow;
6012         bool empty = true;
6013         int r = 0;
6014         u32 i;
6015
6016         if (copy_from_user(&filter, user_msr_filter, sizeof(filter)))
6017                 return -EFAULT;
6018
6019         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++)
6020                 empty &= !filter.ranges[i].nmsrs;
6021
6022         default_allow = !(filter.flags & KVM_MSR_FILTER_DEFAULT_DENY);
6023         if (empty && !default_allow)
6024                 return -EINVAL;
6025
6026         new_filter = kvm_alloc_msr_filter(default_allow);
6027         if (!new_filter)
6028                 return -ENOMEM;
6029
6030         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++) {
6031                 r = kvm_add_msr_filter(new_filter, &filter.ranges[i]);
6032                 if (r) {
6033                         kvm_free_msr_filter(new_filter);
6034                         return r;
6035                 }
6036         }
6037
6038         mutex_lock(&kvm->lock);
6039
6040         /* The per-VM filter is protected by kvm->lock... */
6041         old_filter = srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1);
6042
6043         rcu_assign_pointer(kvm->arch.msr_filter, new_filter);
6044         synchronize_srcu(&kvm->srcu);
6045
6046         kvm_free_msr_filter(old_filter);
6047
6048         kvm_make_all_cpus_request(kvm, KVM_REQ_MSR_FILTER_CHANGED);
6049         mutex_unlock(&kvm->lock);
6050
6051         return 0;
6052 }
6053
6054 #ifdef CONFIG_HAVE_KVM_PM_NOTIFIER
6055 static int kvm_arch_suspend_notifier(struct kvm *kvm)
6056 {
6057         struct kvm_vcpu *vcpu;
6058         unsigned long i;
6059         int ret = 0;
6060
6061         mutex_lock(&kvm->lock);
6062         kvm_for_each_vcpu(i, vcpu, kvm) {
6063                 if (!vcpu->arch.pv_time_enabled)
6064                         continue;
6065
6066                 ret = kvm_set_guest_paused(vcpu);
6067                 if (ret) {
6068                         kvm_err("Failed to pause guest VCPU%d: %d\n",
6069                                 vcpu->vcpu_id, ret);
6070                         break;
6071                 }
6072         }
6073         mutex_unlock(&kvm->lock);
6074
6075         return ret ? NOTIFY_BAD : NOTIFY_DONE;
6076 }
6077
6078 int kvm_arch_pm_notifier(struct kvm *kvm, unsigned long state)
6079 {
6080         switch (state) {
6081         case PM_HIBERNATION_PREPARE:
6082         case PM_SUSPEND_PREPARE:
6083                 return kvm_arch_suspend_notifier(kvm);
6084         }
6085
6086         return NOTIFY_DONE;
6087 }
6088 #endif /* CONFIG_HAVE_KVM_PM_NOTIFIER */
6089
6090 static int kvm_vm_ioctl_get_clock(struct kvm *kvm, void __user *argp)
6091 {
6092         struct kvm_clock_data data = { 0 };
6093
6094         get_kvmclock(kvm, &data);
6095         if (copy_to_user(argp, &data, sizeof(data)))
6096                 return -EFAULT;
6097
6098         return 0;
6099 }
6100
6101 static int kvm_vm_ioctl_set_clock(struct kvm *kvm, void __user *argp)
6102 {
6103         struct kvm_arch *ka = &kvm->arch;
6104         struct kvm_clock_data data;
6105         u64 now_raw_ns;
6106
6107         if (copy_from_user(&data, argp, sizeof(data)))
6108                 return -EFAULT;
6109
6110         /*
6111          * Only KVM_CLOCK_REALTIME is used, but allow passing the
6112          * result of KVM_GET_CLOCK back to KVM_SET_CLOCK.
6113          */
6114         if (data.flags & ~KVM_CLOCK_VALID_FLAGS)
6115                 return -EINVAL;
6116
6117         kvm_hv_invalidate_tsc_page(kvm);
6118         kvm_start_pvclock_update(kvm);
6119         pvclock_update_vm_gtod_copy(kvm);
6120
6121         /*
6122          * This pairs with kvm_guest_time_update(): when masterclock is
6123          * in use, we use master_kernel_ns + kvmclock_offset to set
6124          * unsigned 'system_time' so if we use get_kvmclock_ns() (which
6125          * is slightly ahead) here we risk going negative on unsigned
6126          * 'system_time' when 'data.clock' is very small.
6127          */
6128         if (data.flags & KVM_CLOCK_REALTIME) {
6129                 u64 now_real_ns = ktime_get_real_ns();
6130
6131                 /*
6132                  * Avoid stepping the kvmclock backwards.
6133                  */
6134                 if (now_real_ns > data.realtime)
6135                         data.clock += now_real_ns - data.realtime;
6136         }
6137
6138         if (ka->use_master_clock)
6139                 now_raw_ns = ka->master_kernel_ns;
6140         else
6141                 now_raw_ns = get_kvmclock_base_ns();
6142         ka->kvmclock_offset = data.clock - now_raw_ns;
6143         kvm_end_pvclock_update(kvm);
6144         return 0;
6145 }
6146
6147 long kvm_arch_vm_ioctl(struct file *filp,
6148                        unsigned int ioctl, unsigned long arg)
6149 {
6150         struct kvm *kvm = filp->private_data;
6151         void __user *argp = (void __user *)arg;
6152         int r = -ENOTTY;
6153         /*
6154          * This union makes it completely explicit to gcc-3.x
6155          * that these two variables' stack usage should be
6156          * combined, not added together.
6157          */
6158         union {
6159                 struct kvm_pit_state ps;
6160                 struct kvm_pit_state2 ps2;
6161                 struct kvm_pit_config pit_config;
6162         } u;
6163
6164         switch (ioctl) {
6165         case KVM_SET_TSS_ADDR:
6166                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
6167                 break;
6168         case KVM_SET_IDENTITY_MAP_ADDR: {
6169                 u64 ident_addr;
6170
6171                 mutex_lock(&kvm->lock);
6172                 r = -EINVAL;
6173                 if (kvm->created_vcpus)
6174                         goto set_identity_unlock;
6175                 r = -EFAULT;
6176                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
6177                         goto set_identity_unlock;
6178                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
6179 set_identity_unlock:
6180                 mutex_unlock(&kvm->lock);
6181                 break;
6182         }
6183         case KVM_SET_NR_MMU_PAGES:
6184                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
6185                 break;
6186         case KVM_GET_NR_MMU_PAGES:
6187                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
6188                 break;
6189         case KVM_CREATE_IRQCHIP: {
6190                 mutex_lock(&kvm->lock);
6191
6192                 r = -EEXIST;
6193                 if (irqchip_in_kernel(kvm))
6194                         goto create_irqchip_unlock;
6195
6196                 r = -EINVAL;
6197                 if (kvm->created_vcpus)
6198                         goto create_irqchip_unlock;
6199
6200                 r = kvm_pic_init(kvm);
6201                 if (r)
6202                         goto create_irqchip_unlock;
6203
6204                 r = kvm_ioapic_init(kvm);
6205                 if (r) {
6206                         kvm_pic_destroy(kvm);
6207                         goto create_irqchip_unlock;
6208                 }
6209
6210                 r = kvm_setup_default_irq_routing(kvm);
6211                 if (r) {
6212                         kvm_ioapic_destroy(kvm);
6213                         kvm_pic_destroy(kvm);
6214                         goto create_irqchip_unlock;
6215                 }
6216                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
6217                 smp_wmb();
6218                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
6219                 kvm_request_apicv_update(kvm, true, APICV_INHIBIT_REASON_ABSENT);
6220         create_irqchip_unlock:
6221                 mutex_unlock(&kvm->lock);
6222                 break;
6223         }
6224         case KVM_CREATE_PIT:
6225                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
6226                 goto create_pit;
6227         case KVM_CREATE_PIT2:
6228                 r = -EFAULT;
6229                 if (copy_from_user(&u.pit_config, argp,
6230                                    sizeof(struct kvm_pit_config)))
6231                         goto out;
6232         create_pit:
6233                 mutex_lock(&kvm->lock);
6234                 r = -EEXIST;
6235                 if (kvm->arch.vpit)
6236                         goto create_pit_unlock;
6237                 r = -ENOMEM;
6238                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
6239                 if (kvm->arch.vpit)
6240                         r = 0;
6241         create_pit_unlock:
6242                 mutex_unlock(&kvm->lock);
6243                 break;
6244         case KVM_GET_IRQCHIP: {
6245                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
6246                 struct kvm_irqchip *chip;
6247
6248                 chip = memdup_user(argp, sizeof(*chip));
6249                 if (IS_ERR(chip)) {
6250                         r = PTR_ERR(chip);
6251                         goto out;
6252                 }
6253
6254                 r = -ENXIO;
6255                 if (!irqchip_kernel(kvm))
6256                         goto get_irqchip_out;
6257                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
6258                 if (r)
6259                         goto get_irqchip_out;
6260                 r = -EFAULT;
6261                 if (copy_to_user(argp, chip, sizeof(*chip)))
6262                         goto get_irqchip_out;
6263                 r = 0;
6264         get_irqchip_out:
6265                 kfree(chip);
6266                 break;
6267         }
6268         case KVM_SET_IRQCHIP: {
6269                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
6270                 struct kvm_irqchip *chip;
6271
6272                 chip = memdup_user(argp, sizeof(*chip));
6273                 if (IS_ERR(chip)) {
6274                         r = PTR_ERR(chip);
6275                         goto out;
6276                 }
6277
6278                 r = -ENXIO;
6279                 if (!irqchip_kernel(kvm))
6280                         goto set_irqchip_out;
6281                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
6282         set_irqchip_out:
6283                 kfree(chip);
6284                 break;
6285         }
6286         case KVM_GET_PIT: {
6287                 r = -EFAULT;
6288                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
6289                         goto out;
6290                 r = -ENXIO;
6291                 if (!kvm->arch.vpit)
6292                         goto out;
6293                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
6294                 if (r)
6295                         goto out;
6296                 r = -EFAULT;
6297                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
6298                         goto out;
6299                 r = 0;
6300                 break;
6301         }
6302         case KVM_SET_PIT: {
6303                 r = -EFAULT;
6304                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
6305                         goto out;
6306                 mutex_lock(&kvm->lock);
6307                 r = -ENXIO;
6308                 if (!kvm->arch.vpit)
6309                         goto set_pit_out;
6310                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
6311 set_pit_out:
6312                 mutex_unlock(&kvm->lock);
6313                 break;
6314         }
6315         case KVM_GET_PIT2: {
6316                 r = -ENXIO;
6317                 if (!kvm->arch.vpit)
6318                         goto out;
6319                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
6320                 if (r)
6321                         goto out;
6322                 r = -EFAULT;
6323                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
6324                         goto out;
6325                 r = 0;
6326                 break;
6327         }
6328         case KVM_SET_PIT2: {
6329                 r = -EFAULT;
6330                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
6331                         goto out;
6332                 mutex_lock(&kvm->lock);
6333                 r = -ENXIO;
6334                 if (!kvm->arch.vpit)
6335                         goto set_pit2_out;
6336                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
6337 set_pit2_out:
6338                 mutex_unlock(&kvm->lock);
6339                 break;
6340         }
6341         case KVM_REINJECT_CONTROL: {
6342                 struct kvm_reinject_control control;
6343                 r =  -EFAULT;
6344                 if (copy_from_user(&control, argp, sizeof(control)))
6345                         goto out;
6346                 r = -ENXIO;
6347                 if (!kvm->arch.vpit)
6348                         goto out;
6349                 r = kvm_vm_ioctl_reinject(kvm, &control);
6350                 break;
6351         }
6352         case KVM_SET_BOOT_CPU_ID:
6353                 r = 0;
6354                 mutex_lock(&kvm->lock);
6355                 if (kvm->created_vcpus)
6356                         r = -EBUSY;
6357                 else
6358                         kvm->arch.bsp_vcpu_id = arg;
6359                 mutex_unlock(&kvm->lock);
6360                 break;
6361 #ifdef CONFIG_KVM_XEN
6362         case KVM_XEN_HVM_CONFIG: {
6363                 struct kvm_xen_hvm_config xhc;
6364                 r = -EFAULT;
6365                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
6366                         goto out;
6367                 r = kvm_xen_hvm_config(kvm, &xhc);
6368                 break;
6369         }
6370         case KVM_XEN_HVM_GET_ATTR: {
6371                 struct kvm_xen_hvm_attr xha;
6372
6373                 r = -EFAULT;
6374                 if (copy_from_user(&xha, argp, sizeof(xha)))
6375                         goto out;
6376                 r = kvm_xen_hvm_get_attr(kvm, &xha);
6377                 if (!r && copy_to_user(argp, &xha, sizeof(xha)))
6378                         r = -EFAULT;
6379                 break;
6380         }
6381         case KVM_XEN_HVM_SET_ATTR: {
6382                 struct kvm_xen_hvm_attr xha;
6383
6384                 r = -EFAULT;
6385                 if (copy_from_user(&xha, argp, sizeof(xha)))
6386                         goto out;
6387                 r = kvm_xen_hvm_set_attr(kvm, &xha);
6388                 break;
6389         }
6390 #endif
6391         case KVM_SET_CLOCK:
6392                 r = kvm_vm_ioctl_set_clock(kvm, argp);
6393                 break;
6394         case KVM_GET_CLOCK:
6395                 r = kvm_vm_ioctl_get_clock(kvm, argp);
6396                 break;
6397         case KVM_MEMORY_ENCRYPT_OP: {
6398                 r = -ENOTTY;
6399                 if (kvm_x86_ops.mem_enc_op)
6400                         r = static_call(kvm_x86_mem_enc_op)(kvm, argp);
6401                 break;
6402         }
6403         case KVM_MEMORY_ENCRYPT_REG_REGION: {
6404                 struct kvm_enc_region region;
6405
6406                 r = -EFAULT;
6407                 if (copy_from_user(&region, argp, sizeof(region)))
6408                         goto out;
6409
6410                 r = -ENOTTY;
6411                 if (kvm_x86_ops.mem_enc_reg_region)
6412                         r = static_call(kvm_x86_mem_enc_reg_region)(kvm, &region);
6413                 break;
6414         }
6415         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
6416                 struct kvm_enc_region region;
6417
6418                 r = -EFAULT;
6419                 if (copy_from_user(&region, argp, sizeof(region)))
6420                         goto out;
6421
6422                 r = -ENOTTY;
6423                 if (kvm_x86_ops.mem_enc_unreg_region)
6424                         r = static_call(kvm_x86_mem_enc_unreg_region)(kvm, &region);
6425                 break;
6426         }
6427         case KVM_HYPERV_EVENTFD: {
6428                 struct kvm_hyperv_eventfd hvevfd;
6429
6430                 r = -EFAULT;
6431                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
6432                         goto out;
6433                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
6434                 break;
6435         }
6436         case KVM_SET_PMU_EVENT_FILTER:
6437                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
6438                 break;
6439         case KVM_X86_SET_MSR_FILTER:
6440                 r = kvm_vm_ioctl_set_msr_filter(kvm, argp);
6441                 break;
6442         default:
6443                 r = -ENOTTY;
6444         }
6445 out:
6446         return r;
6447 }
6448
6449 static void kvm_init_msr_list(void)
6450 {
6451         struct x86_pmu_capability x86_pmu;
6452         u32 dummy[2];
6453         unsigned i;
6454
6455         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
6456                          "Please update the fixed PMCs in msrs_to_saved_all[]");
6457
6458         perf_get_x86_pmu_capability(&x86_pmu);
6459
6460         num_msrs_to_save = 0;
6461         num_emulated_msrs = 0;
6462         num_msr_based_features = 0;
6463
6464         for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
6465                 if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
6466                         continue;
6467
6468                 /*
6469                  * Even MSRs that are valid in the host may not be exposed
6470                  * to the guests in some cases.
6471                  */
6472                 switch (msrs_to_save_all[i]) {
6473                 case MSR_IA32_BNDCFGS:
6474                         if (!kvm_mpx_supported())
6475                                 continue;
6476                         break;
6477                 case MSR_TSC_AUX:
6478                         if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP) &&
6479                             !kvm_cpu_cap_has(X86_FEATURE_RDPID))
6480                                 continue;
6481                         break;
6482                 case MSR_IA32_UMWAIT_CONTROL:
6483                         if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG))
6484                                 continue;
6485                         break;
6486                 case MSR_IA32_RTIT_CTL:
6487                 case MSR_IA32_RTIT_STATUS:
6488                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT))
6489                                 continue;
6490                         break;
6491                 case MSR_IA32_RTIT_CR3_MATCH:
6492                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6493                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
6494                                 continue;
6495                         break;
6496                 case MSR_IA32_RTIT_OUTPUT_BASE:
6497                 case MSR_IA32_RTIT_OUTPUT_MASK:
6498                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6499                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
6500                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
6501                                 continue;
6502                         break;
6503                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
6504                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6505                                 msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
6506                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
6507                                 continue;
6508                         break;
6509                 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
6510                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
6511                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6512                                 continue;
6513                         break;
6514                 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
6515                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
6516                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6517                                 continue;
6518                         break;
6519                 case MSR_IA32_XFD:
6520                 case MSR_IA32_XFD_ERR:
6521                         if (!kvm_cpu_cap_has(X86_FEATURE_XFD))
6522                                 continue;
6523                         break;
6524                 default:
6525                         break;
6526                 }
6527
6528                 msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
6529         }
6530
6531         for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
6532                 if (!static_call(kvm_x86_has_emulated_msr)(NULL, emulated_msrs_all[i]))
6533                         continue;
6534
6535                 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
6536         }
6537
6538         for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
6539                 struct kvm_msr_entry msr;
6540
6541                 msr.index = msr_based_features_all[i];
6542                 if (kvm_get_msr_feature(&msr))
6543                         continue;
6544
6545                 msr_based_features[num_msr_based_features++] = msr_based_features_all[i];
6546         }
6547 }
6548
6549 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
6550                            const void *v)
6551 {
6552         int handled = 0;
6553         int n;
6554
6555         do {
6556                 n = min(len, 8);
6557                 if (!(lapic_in_kernel(vcpu) &&
6558                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
6559                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
6560                         break;
6561                 handled += n;
6562                 addr += n;
6563                 len -= n;
6564                 v += n;
6565         } while (len);
6566
6567         return handled;
6568 }
6569
6570 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
6571 {
6572         int handled = 0;
6573         int n;
6574
6575         do {
6576                 n = min(len, 8);
6577                 if (!(lapic_in_kernel(vcpu) &&
6578                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
6579                                          addr, n, v))
6580                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
6581                         break;
6582                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
6583                 handled += n;
6584                 addr += n;
6585                 len -= n;
6586                 v += n;
6587         } while (len);
6588
6589         return handled;
6590 }
6591
6592 static void kvm_set_segment(struct kvm_vcpu *vcpu,
6593                         struct kvm_segment *var, int seg)
6594 {
6595         static_call(kvm_x86_set_segment)(vcpu, var, seg);
6596 }
6597
6598 void kvm_get_segment(struct kvm_vcpu *vcpu,
6599                      struct kvm_segment *var, int seg)
6600 {
6601         static_call(kvm_x86_get_segment)(vcpu, var, seg);
6602 }
6603
6604 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
6605                            struct x86_exception *exception)
6606 {
6607         struct kvm_mmu *mmu = vcpu->arch.mmu;
6608         gpa_t t_gpa;
6609
6610         BUG_ON(!mmu_is_nested(vcpu));
6611
6612         /* NPT walks are always user-walks */
6613         access |= PFERR_USER_MASK;
6614         t_gpa  = mmu->gva_to_gpa(vcpu, mmu, gpa, access, exception);
6615
6616         return t_gpa;
6617 }
6618
6619 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
6620                               struct x86_exception *exception)
6621 {
6622         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6623
6624         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6625         return mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
6626 }
6627 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_read);
6628
6629  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
6630                                 struct x86_exception *exception)
6631 {
6632         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6633
6634         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6635         access |= PFERR_FETCH_MASK;
6636         return mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
6637 }
6638
6639 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
6640                                struct x86_exception *exception)
6641 {
6642         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6643
6644         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6645         access |= PFERR_WRITE_MASK;
6646         return mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
6647 }
6648 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_write);
6649
6650 /* uses this to access any guest's mapped memory without checking CPL */
6651 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
6652                                 struct x86_exception *exception)
6653 {
6654         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6655
6656         return mmu->gva_to_gpa(vcpu, mmu, gva, 0, exception);
6657 }
6658
6659 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6660                                       struct kvm_vcpu *vcpu, u32 access,
6661                                       struct x86_exception *exception)
6662 {
6663         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6664         void *data = val;
6665         int r = X86EMUL_CONTINUE;
6666
6667         while (bytes) {
6668                 gpa_t gpa = mmu->gva_to_gpa(vcpu, mmu, addr, access, exception);
6669                 unsigned offset = addr & (PAGE_SIZE-1);
6670                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
6671                 int ret;
6672
6673                 if (gpa == UNMAPPED_GVA)
6674                         return X86EMUL_PROPAGATE_FAULT;
6675                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
6676                                                offset, toread);
6677                 if (ret < 0) {
6678                         r = X86EMUL_IO_NEEDED;
6679                         goto out;
6680                 }
6681
6682                 bytes -= toread;
6683                 data += toread;
6684                 addr += toread;
6685         }
6686 out:
6687         return r;
6688 }
6689
6690 /* used for instruction fetching */
6691 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
6692                                 gva_t addr, void *val, unsigned int bytes,
6693                                 struct x86_exception *exception)
6694 {
6695         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6696         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6697         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6698         unsigned offset;
6699         int ret;
6700
6701         /* Inline kvm_read_guest_virt_helper for speed.  */
6702         gpa_t gpa = mmu->gva_to_gpa(vcpu, mmu, addr, access|PFERR_FETCH_MASK,
6703                                     exception);
6704         if (unlikely(gpa == UNMAPPED_GVA))
6705                 return X86EMUL_PROPAGATE_FAULT;
6706
6707         offset = addr & (PAGE_SIZE-1);
6708         if (WARN_ON(offset + bytes > PAGE_SIZE))
6709                 bytes = (unsigned)PAGE_SIZE - offset;
6710         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
6711                                        offset, bytes);
6712         if (unlikely(ret < 0))
6713                 return X86EMUL_IO_NEEDED;
6714
6715         return X86EMUL_CONTINUE;
6716 }
6717
6718 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
6719                                gva_t addr, void *val, unsigned int bytes,
6720                                struct x86_exception *exception)
6721 {
6722         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6723
6724         /*
6725          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
6726          * is returned, but our callers are not ready for that and they blindly
6727          * call kvm_inject_page_fault.  Ensure that they at least do not leak
6728          * uninitialized kernel stack memory into cr2 and error code.
6729          */
6730         memset(exception, 0, sizeof(*exception));
6731         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
6732                                           exception);
6733 }
6734 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
6735
6736 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
6737                              gva_t addr, void *val, unsigned int bytes,
6738                              struct x86_exception *exception, bool system)
6739 {
6740         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6741         u32 access = 0;
6742
6743         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6744                 access |= PFERR_USER_MASK;
6745
6746         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
6747 }
6748
6749 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
6750                 unsigned long addr, void *val, unsigned int bytes)
6751 {
6752         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6753         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
6754
6755         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
6756 }
6757
6758 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6759                                       struct kvm_vcpu *vcpu, u32 access,
6760                                       struct x86_exception *exception)
6761 {
6762         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6763         void *data = val;
6764         int r = X86EMUL_CONTINUE;
6765
6766         while (bytes) {
6767                 gpa_t gpa = mmu->gva_to_gpa(vcpu, mmu, addr, access, exception);
6768                 unsigned offset = addr & (PAGE_SIZE-1);
6769                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
6770                 int ret;
6771
6772                 if (gpa == UNMAPPED_GVA)
6773                         return X86EMUL_PROPAGATE_FAULT;
6774                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
6775                 if (ret < 0) {
6776                         r = X86EMUL_IO_NEEDED;
6777                         goto out;
6778                 }
6779
6780                 bytes -= towrite;
6781                 data += towrite;
6782                 addr += towrite;
6783         }
6784 out:
6785         return r;
6786 }
6787
6788 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
6789                               unsigned int bytes, struct x86_exception *exception,
6790                               bool system)
6791 {
6792         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6793         u32 access = PFERR_WRITE_MASK;
6794
6795         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6796                 access |= PFERR_USER_MASK;
6797
6798         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6799                                            access, exception);
6800 }
6801
6802 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
6803                                 unsigned int bytes, struct x86_exception *exception)
6804 {
6805         /* kvm_write_guest_virt_system can pull in tons of pages. */
6806         vcpu->arch.l1tf_flush_l1d = true;
6807
6808         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6809                                            PFERR_WRITE_MASK, exception);
6810 }
6811 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
6812
6813 int handle_ud(struct kvm_vcpu *vcpu)
6814 {
6815         static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
6816         int emul_type = EMULTYPE_TRAP_UD;
6817         char sig[5]; /* ud2; .ascii "kvm" */
6818         struct x86_exception e;
6819
6820         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, NULL, 0)))
6821                 return 1;
6822
6823         if (force_emulation_prefix &&
6824             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
6825                                 sig, sizeof(sig), &e) == 0 &&
6826             memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
6827                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
6828                 emul_type = EMULTYPE_TRAP_UD_FORCED;
6829         }
6830
6831         return kvm_emulate_instruction(vcpu, emul_type);
6832 }
6833 EXPORT_SYMBOL_GPL(handle_ud);
6834
6835 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6836                             gpa_t gpa, bool write)
6837 {
6838         /* For APIC access vmexit */
6839         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6840                 return 1;
6841
6842         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
6843                 trace_vcpu_match_mmio(gva, gpa, write, true);
6844                 return 1;
6845         }
6846
6847         return 0;
6848 }
6849
6850 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6851                                 gpa_t *gpa, struct x86_exception *exception,
6852                                 bool write)
6853 {
6854         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6855         u32 access = ((static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0)
6856                 | (write ? PFERR_WRITE_MASK : 0);
6857
6858         /*
6859          * currently PKRU is only applied to ept enabled guest so
6860          * there is no pkey in EPT page table for L1 guest or EPT
6861          * shadow page table for L2 guest.
6862          */
6863         if (vcpu_match_mmio_gva(vcpu, gva) && (!is_paging(vcpu) ||
6864             !permission_fault(vcpu, vcpu->arch.walk_mmu,
6865                               vcpu->arch.mmio_access, 0, access))) {
6866                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
6867                                         (gva & (PAGE_SIZE - 1));
6868                 trace_vcpu_match_mmio(gva, *gpa, write, false);
6869                 return 1;
6870         }
6871
6872         *gpa = mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
6873
6874         if (*gpa == UNMAPPED_GVA)
6875                 return -1;
6876
6877         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
6878 }
6879
6880 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
6881                         const void *val, int bytes)
6882 {
6883         int ret;
6884
6885         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
6886         if (ret < 0)
6887                 return 0;
6888         kvm_page_track_write(vcpu, gpa, val, bytes);
6889         return 1;
6890 }
6891
6892 struct read_write_emulator_ops {
6893         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
6894                                   int bytes);
6895         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
6896                                   void *val, int bytes);
6897         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6898                                int bytes, void *val);
6899         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6900                                     void *val, int bytes);
6901         bool write;
6902 };
6903
6904 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
6905 {
6906         if (vcpu->mmio_read_completed) {
6907                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
6908                                vcpu->mmio_fragments[0].gpa, val);
6909                 vcpu->mmio_read_completed = 0;
6910                 return 1;
6911         }
6912
6913         return 0;
6914 }
6915
6916 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6917                         void *val, int bytes)
6918 {
6919         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
6920 }
6921
6922 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6923                          void *val, int bytes)
6924 {
6925         return emulator_write_phys(vcpu, gpa, val, bytes);
6926 }
6927
6928 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
6929 {
6930         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
6931         return vcpu_mmio_write(vcpu, gpa, bytes, val);
6932 }
6933
6934 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6935                           void *val, int bytes)
6936 {
6937         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
6938         return X86EMUL_IO_NEEDED;
6939 }
6940
6941 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6942                            void *val, int bytes)
6943 {
6944         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
6945
6946         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
6947         return X86EMUL_CONTINUE;
6948 }
6949
6950 static const struct read_write_emulator_ops read_emultor = {
6951         .read_write_prepare = read_prepare,
6952         .read_write_emulate = read_emulate,
6953         .read_write_mmio = vcpu_mmio_read,
6954         .read_write_exit_mmio = read_exit_mmio,
6955 };
6956
6957 static const struct read_write_emulator_ops write_emultor = {
6958         .read_write_emulate = write_emulate,
6959         .read_write_mmio = write_mmio,
6960         .read_write_exit_mmio = write_exit_mmio,
6961         .write = true,
6962 };
6963
6964 static int emulator_read_write_onepage(unsigned long addr, void *val,
6965                                        unsigned int bytes,
6966                                        struct x86_exception *exception,
6967                                        struct kvm_vcpu *vcpu,
6968                                        const struct read_write_emulator_ops *ops)
6969 {
6970         gpa_t gpa;
6971         int handled, ret;
6972         bool write = ops->write;
6973         struct kvm_mmio_fragment *frag;
6974         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6975
6976         /*
6977          * If the exit was due to a NPF we may already have a GPA.
6978          * If the GPA is present, use it to avoid the GVA to GPA table walk.
6979          * Note, this cannot be used on string operations since string
6980          * operation using rep will only have the initial GPA from the NPF
6981          * occurred.
6982          */
6983         if (ctxt->gpa_available && emulator_can_use_gpa(ctxt) &&
6984             (addr & ~PAGE_MASK) == (ctxt->gpa_val & ~PAGE_MASK)) {
6985                 gpa = ctxt->gpa_val;
6986                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
6987         } else {
6988                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
6989                 if (ret < 0)
6990                         return X86EMUL_PROPAGATE_FAULT;
6991         }
6992
6993         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
6994                 return X86EMUL_CONTINUE;
6995
6996         /*
6997          * Is this MMIO handled locally?
6998          */
6999         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
7000         if (handled == bytes)
7001                 return X86EMUL_CONTINUE;
7002
7003         gpa += handled;
7004         bytes -= handled;
7005         val += handled;
7006
7007         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
7008         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
7009         frag->gpa = gpa;
7010         frag->data = val;
7011         frag->len = bytes;
7012         return X86EMUL_CONTINUE;
7013 }
7014
7015 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
7016                         unsigned long addr,
7017                         void *val, unsigned int bytes,
7018                         struct x86_exception *exception,
7019                         const struct read_write_emulator_ops *ops)
7020 {
7021         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7022         gpa_t gpa;
7023         int rc;
7024
7025         if (ops->read_write_prepare &&
7026                   ops->read_write_prepare(vcpu, val, bytes))
7027                 return X86EMUL_CONTINUE;
7028
7029         vcpu->mmio_nr_fragments = 0;
7030
7031         /* Crossing a page boundary? */
7032         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
7033                 int now;
7034
7035                 now = -addr & ~PAGE_MASK;
7036                 rc = emulator_read_write_onepage(addr, val, now, exception,
7037                                                  vcpu, ops);
7038
7039                 if (rc != X86EMUL_CONTINUE)
7040                         return rc;
7041                 addr += now;
7042                 if (ctxt->mode != X86EMUL_MODE_PROT64)
7043                         addr = (u32)addr;
7044                 val += now;
7045                 bytes -= now;
7046         }
7047
7048         rc = emulator_read_write_onepage(addr, val, bytes, exception,
7049                                          vcpu, ops);
7050         if (rc != X86EMUL_CONTINUE)
7051                 return rc;
7052
7053         if (!vcpu->mmio_nr_fragments)
7054                 return rc;
7055
7056         gpa = vcpu->mmio_fragments[0].gpa;
7057
7058         vcpu->mmio_needed = 1;
7059         vcpu->mmio_cur_fragment = 0;
7060
7061         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
7062         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
7063         vcpu->run->exit_reason = KVM_EXIT_MMIO;
7064         vcpu->run->mmio.phys_addr = gpa;
7065
7066         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
7067 }
7068
7069 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
7070                                   unsigned long addr,
7071                                   void *val,
7072                                   unsigned int bytes,
7073                                   struct x86_exception *exception)
7074 {
7075         return emulator_read_write(ctxt, addr, val, bytes,
7076                                    exception, &read_emultor);
7077 }
7078
7079 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
7080                             unsigned long addr,
7081                             const void *val,
7082                             unsigned int bytes,
7083                             struct x86_exception *exception)
7084 {
7085         return emulator_read_write(ctxt, addr, (void *)val, bytes,
7086                                    exception, &write_emultor);
7087 }
7088
7089 #define CMPXCHG_TYPE(t, ptr, old, new) \
7090         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
7091
7092 #ifdef CONFIG_X86_64
7093 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
7094 #else
7095 #  define CMPXCHG64(ptr, old, new) \
7096         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
7097 #endif
7098
7099 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
7100                                      unsigned long addr,
7101                                      const void *old,
7102                                      const void *new,
7103                                      unsigned int bytes,
7104                                      struct x86_exception *exception)
7105 {
7106         struct kvm_host_map map;
7107         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7108         u64 page_line_mask;
7109         gpa_t gpa;
7110         char *kaddr;
7111         bool exchanged;
7112
7113         /* guests cmpxchg8b have to be emulated atomically */
7114         if (bytes > 8 || (bytes & (bytes - 1)))
7115                 goto emul_write;
7116
7117         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
7118
7119         if (gpa == UNMAPPED_GVA ||
7120             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
7121                 goto emul_write;
7122
7123         /*
7124          * Emulate the atomic as a straight write to avoid #AC if SLD is
7125          * enabled in the host and the access splits a cache line.
7126          */
7127         if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))
7128                 page_line_mask = ~(cache_line_size() - 1);
7129         else
7130                 page_line_mask = PAGE_MASK;
7131
7132         if (((gpa + bytes - 1) & page_line_mask) != (gpa & page_line_mask))
7133                 goto emul_write;
7134
7135         if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
7136                 goto emul_write;
7137
7138         kaddr = map.hva + offset_in_page(gpa);
7139
7140         switch (bytes) {
7141         case 1:
7142                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
7143                 break;
7144         case 2:
7145                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
7146                 break;
7147         case 4:
7148                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
7149                 break;
7150         case 8:
7151                 exchanged = CMPXCHG64(kaddr, old, new);
7152                 break;
7153         default:
7154                 BUG();
7155         }
7156
7157         kvm_vcpu_unmap(vcpu, &map, true);
7158
7159         if (!exchanged)
7160                 return X86EMUL_CMPXCHG_FAILED;
7161
7162         kvm_page_track_write(vcpu, gpa, new, bytes);
7163
7164         return X86EMUL_CONTINUE;
7165
7166 emul_write:
7167         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
7168
7169         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
7170 }
7171
7172 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
7173 {
7174         int r = 0, i;
7175
7176         for (i = 0; i < vcpu->arch.pio.count; i++) {
7177                 if (vcpu->arch.pio.in)
7178                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
7179                                             vcpu->arch.pio.size, pd);
7180                 else
7181                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
7182                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
7183                                              pd);
7184                 if (r)
7185                         break;
7186                 pd += vcpu->arch.pio.size;
7187         }
7188         return r;
7189 }
7190
7191 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
7192                                unsigned short port,
7193                                unsigned int count, bool in)
7194 {
7195         vcpu->arch.pio.port = port;
7196         vcpu->arch.pio.in = in;
7197         vcpu->arch.pio.count  = count;
7198         vcpu->arch.pio.size = size;
7199
7200         if (!kernel_pio(vcpu, vcpu->arch.pio_data))
7201                 return 1;
7202
7203         vcpu->run->exit_reason = KVM_EXIT_IO;
7204         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
7205         vcpu->run->io.size = size;
7206         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
7207         vcpu->run->io.count = count;
7208         vcpu->run->io.port = port;
7209
7210         return 0;
7211 }
7212
7213 static int __emulator_pio_in(struct kvm_vcpu *vcpu, int size,
7214                              unsigned short port, unsigned int count)
7215 {
7216         WARN_ON(vcpu->arch.pio.count);
7217         memset(vcpu->arch.pio_data, 0, size * count);
7218         return emulator_pio_in_out(vcpu, size, port, count, true);
7219 }
7220
7221 static void complete_emulator_pio_in(struct kvm_vcpu *vcpu, void *val)
7222 {
7223         int size = vcpu->arch.pio.size;
7224         unsigned count = vcpu->arch.pio.count;
7225         memcpy(val, vcpu->arch.pio_data, size * count);
7226         trace_kvm_pio(KVM_PIO_IN, vcpu->arch.pio.port, size, count, vcpu->arch.pio_data);
7227         vcpu->arch.pio.count = 0;
7228 }
7229
7230 static int emulator_pio_in(struct kvm_vcpu *vcpu, int size,
7231                            unsigned short port, void *val, unsigned int count)
7232 {
7233         if (vcpu->arch.pio.count) {
7234                 /*
7235                  * Complete a previous iteration that required userspace I/O.
7236                  * Note, @count isn't guaranteed to match pio.count as userspace
7237                  * can modify ECX before rerunning the vCPU.  Ignore any such
7238                  * shenanigans as KVM doesn't support modifying the rep count,
7239                  * and the emulator ensures @count doesn't overflow the buffer.
7240                  */
7241         } else {
7242                 int r = __emulator_pio_in(vcpu, size, port, count);
7243                 if (!r)
7244                         return r;
7245
7246                 /* Results already available, fall through.  */
7247         }
7248
7249         complete_emulator_pio_in(vcpu, val);
7250         return 1;
7251 }
7252
7253 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
7254                                     int size, unsigned short port, void *val,
7255                                     unsigned int count)
7256 {
7257         return emulator_pio_in(emul_to_vcpu(ctxt), size, port, val, count);
7258
7259 }
7260
7261 static int emulator_pio_out(struct kvm_vcpu *vcpu, int size,
7262                             unsigned short port, const void *val,
7263                             unsigned int count)
7264 {
7265         int ret;
7266
7267         memcpy(vcpu->arch.pio_data, val, size * count);
7268         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
7269         ret = emulator_pio_in_out(vcpu, size, port, count, false);
7270         if (ret)
7271                 vcpu->arch.pio.count = 0;
7272
7273         return ret;
7274 }
7275
7276 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
7277                                      int size, unsigned short port,
7278                                      const void *val, unsigned int count)
7279 {
7280         return emulator_pio_out(emul_to_vcpu(ctxt), size, port, val, count);
7281 }
7282
7283 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
7284 {
7285         return static_call(kvm_x86_get_segment_base)(vcpu, seg);
7286 }
7287
7288 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
7289 {
7290         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
7291 }
7292
7293 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
7294 {
7295         if (!need_emulate_wbinvd(vcpu))
7296                 return X86EMUL_CONTINUE;
7297
7298         if (static_call(kvm_x86_has_wbinvd_exit)()) {
7299                 int cpu = get_cpu();
7300
7301                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
7302                 on_each_cpu_mask(vcpu->arch.wbinvd_dirty_mask,
7303                                 wbinvd_ipi, NULL, 1);
7304                 put_cpu();
7305                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
7306         } else
7307                 wbinvd();
7308         return X86EMUL_CONTINUE;
7309 }
7310
7311 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
7312 {
7313         kvm_emulate_wbinvd_noskip(vcpu);
7314         return kvm_skip_emulated_instruction(vcpu);
7315 }
7316 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
7317
7318
7319
7320 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
7321 {
7322         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
7323 }
7324
7325 static void emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
7326                             unsigned long *dest)
7327 {
7328         kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
7329 }
7330
7331 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
7332                            unsigned long value)
7333 {
7334
7335         return kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
7336 }
7337
7338 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
7339 {
7340         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
7341 }
7342
7343 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
7344 {
7345         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7346         unsigned long value;
7347
7348         switch (cr) {
7349         case 0:
7350                 value = kvm_read_cr0(vcpu);
7351                 break;
7352         case 2:
7353                 value = vcpu->arch.cr2;
7354                 break;
7355         case 3:
7356                 value = kvm_read_cr3(vcpu);
7357                 break;
7358         case 4:
7359                 value = kvm_read_cr4(vcpu);
7360                 break;
7361         case 8:
7362                 value = kvm_get_cr8(vcpu);
7363                 break;
7364         default:
7365                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7366                 return 0;
7367         }
7368
7369         return value;
7370 }
7371
7372 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
7373 {
7374         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7375         int res = 0;
7376
7377         switch (cr) {
7378         case 0:
7379                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
7380                 break;
7381         case 2:
7382                 vcpu->arch.cr2 = val;
7383                 break;
7384         case 3:
7385                 res = kvm_set_cr3(vcpu, val);
7386                 break;
7387         case 4:
7388                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
7389                 break;
7390         case 8:
7391                 res = kvm_set_cr8(vcpu, val);
7392                 break;
7393         default:
7394                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7395                 res = -1;
7396         }
7397
7398         return res;
7399 }
7400
7401 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
7402 {
7403         return static_call(kvm_x86_get_cpl)(emul_to_vcpu(ctxt));
7404 }
7405
7406 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7407 {
7408         static_call(kvm_x86_get_gdt)(emul_to_vcpu(ctxt), dt);
7409 }
7410
7411 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7412 {
7413         static_call(kvm_x86_get_idt)(emul_to_vcpu(ctxt), dt);
7414 }
7415
7416 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7417 {
7418         static_call(kvm_x86_set_gdt)(emul_to_vcpu(ctxt), dt);
7419 }
7420
7421 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7422 {
7423         static_call(kvm_x86_set_idt)(emul_to_vcpu(ctxt), dt);
7424 }
7425
7426 static unsigned long emulator_get_cached_segment_base(
7427         struct x86_emulate_ctxt *ctxt, int seg)
7428 {
7429         return get_segment_base(emul_to_vcpu(ctxt), seg);
7430 }
7431
7432 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
7433                                  struct desc_struct *desc, u32 *base3,
7434                                  int seg)
7435 {
7436         struct kvm_segment var;
7437
7438         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
7439         *selector = var.selector;
7440
7441         if (var.unusable) {
7442                 memset(desc, 0, sizeof(*desc));
7443                 if (base3)
7444                         *base3 = 0;
7445                 return false;
7446         }
7447
7448         if (var.g)
7449                 var.limit >>= 12;
7450         set_desc_limit(desc, var.limit);
7451         set_desc_base(desc, (unsigned long)var.base);
7452 #ifdef CONFIG_X86_64
7453         if (base3)
7454                 *base3 = var.base >> 32;
7455 #endif
7456         desc->type = var.type;
7457         desc->s = var.s;
7458         desc->dpl = var.dpl;
7459         desc->p = var.present;
7460         desc->avl = var.avl;
7461         desc->l = var.l;
7462         desc->d = var.db;
7463         desc->g = var.g;
7464
7465         return true;
7466 }
7467
7468 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
7469                                  struct desc_struct *desc, u32 base3,
7470                                  int seg)
7471 {
7472         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7473         struct kvm_segment var;
7474
7475         var.selector = selector;
7476         var.base = get_desc_base(desc);
7477 #ifdef CONFIG_X86_64
7478         var.base |= ((u64)base3) << 32;
7479 #endif
7480         var.limit = get_desc_limit(desc);
7481         if (desc->g)
7482                 var.limit = (var.limit << 12) | 0xfff;
7483         var.type = desc->type;
7484         var.dpl = desc->dpl;
7485         var.db = desc->d;
7486         var.s = desc->s;
7487         var.l = desc->l;
7488         var.g = desc->g;
7489         var.avl = desc->avl;
7490         var.present = desc->p;
7491         var.unusable = !var.present;
7492         var.padding = 0;
7493
7494         kvm_set_segment(vcpu, &var, seg);
7495         return;
7496 }
7497
7498 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
7499                             u32 msr_index, u64 *pdata)
7500 {
7501         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7502         int r;
7503
7504         r = kvm_get_msr(vcpu, msr_index, pdata);
7505
7506         if (r && kvm_msr_user_space(vcpu, msr_index, KVM_EXIT_X86_RDMSR, 0,
7507                                     complete_emulated_rdmsr, r)) {
7508                 /* Bounce to user space */
7509                 return X86EMUL_IO_NEEDED;
7510         }
7511
7512         return r;
7513 }
7514
7515 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
7516                             u32 msr_index, u64 data)
7517 {
7518         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7519         int r;
7520
7521         r = kvm_set_msr(vcpu, msr_index, data);
7522
7523         if (r && kvm_msr_user_space(vcpu, msr_index, KVM_EXIT_X86_WRMSR, data,
7524                                     complete_emulated_msr_access, r)) {
7525                 /* Bounce to user space */
7526                 return X86EMUL_IO_NEEDED;
7527         }
7528
7529         return r;
7530 }
7531
7532 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
7533 {
7534         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7535
7536         return vcpu->arch.smbase;
7537 }
7538
7539 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
7540 {
7541         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7542
7543         vcpu->arch.smbase = smbase;
7544 }
7545
7546 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
7547                               u32 pmc)
7548 {
7549         if (kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc))
7550                 return 0;
7551         return -EINVAL;
7552 }
7553
7554 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
7555                              u32 pmc, u64 *pdata)
7556 {
7557         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
7558 }
7559
7560 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
7561 {
7562         emul_to_vcpu(ctxt)->arch.halt_request = 1;
7563 }
7564
7565 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
7566                               struct x86_instruction_info *info,
7567                               enum x86_intercept_stage stage)
7568 {
7569         return static_call(kvm_x86_check_intercept)(emul_to_vcpu(ctxt), info, stage,
7570                                             &ctxt->exception);
7571 }
7572
7573 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
7574                               u32 *eax, u32 *ebx, u32 *ecx, u32 *edx,
7575                               bool exact_only)
7576 {
7577         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, exact_only);
7578 }
7579
7580 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
7581 {
7582         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
7583 }
7584
7585 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
7586 {
7587         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
7588 }
7589
7590 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
7591 {
7592         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
7593 }
7594
7595 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
7596 {
7597         return kvm_register_read_raw(emul_to_vcpu(ctxt), reg);
7598 }
7599
7600 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
7601 {
7602         kvm_register_write_raw(emul_to_vcpu(ctxt), reg, val);
7603 }
7604
7605 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
7606 {
7607         static_call(kvm_x86_set_nmi_mask)(emul_to_vcpu(ctxt), masked);
7608 }
7609
7610 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
7611 {
7612         return emul_to_vcpu(ctxt)->arch.hflags;
7613 }
7614
7615 static void emulator_exiting_smm(struct x86_emulate_ctxt *ctxt)
7616 {
7617         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7618
7619         kvm_smm_changed(vcpu, false);
7620 }
7621
7622 static int emulator_leave_smm(struct x86_emulate_ctxt *ctxt,
7623                                   const char *smstate)
7624 {
7625         return static_call(kvm_x86_leave_smm)(emul_to_vcpu(ctxt), smstate);
7626 }
7627
7628 static void emulator_triple_fault(struct x86_emulate_ctxt *ctxt)
7629 {
7630         kvm_make_request(KVM_REQ_TRIPLE_FAULT, emul_to_vcpu(ctxt));
7631 }
7632
7633 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
7634 {
7635         return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
7636 }
7637
7638 static const struct x86_emulate_ops emulate_ops = {
7639         .read_gpr            = emulator_read_gpr,
7640         .write_gpr           = emulator_write_gpr,
7641         .read_std            = emulator_read_std,
7642         .write_std           = emulator_write_std,
7643         .read_phys           = kvm_read_guest_phys_system,
7644         .fetch               = kvm_fetch_guest_virt,
7645         .read_emulated       = emulator_read_emulated,
7646         .write_emulated      = emulator_write_emulated,
7647         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
7648         .invlpg              = emulator_invlpg,
7649         .pio_in_emulated     = emulator_pio_in_emulated,
7650         .pio_out_emulated    = emulator_pio_out_emulated,
7651         .get_segment         = emulator_get_segment,
7652         .set_segment         = emulator_set_segment,
7653         .get_cached_segment_base = emulator_get_cached_segment_base,
7654         .get_gdt             = emulator_get_gdt,
7655         .get_idt             = emulator_get_idt,
7656         .set_gdt             = emulator_set_gdt,
7657         .set_idt             = emulator_set_idt,
7658         .get_cr              = emulator_get_cr,
7659         .set_cr              = emulator_set_cr,
7660         .cpl                 = emulator_get_cpl,
7661         .get_dr              = emulator_get_dr,
7662         .set_dr              = emulator_set_dr,
7663         .get_smbase          = emulator_get_smbase,
7664         .set_smbase          = emulator_set_smbase,
7665         .set_msr             = emulator_set_msr,
7666         .get_msr             = emulator_get_msr,
7667         .check_pmc           = emulator_check_pmc,
7668         .read_pmc            = emulator_read_pmc,
7669         .halt                = emulator_halt,
7670         .wbinvd              = emulator_wbinvd,
7671         .fix_hypercall       = emulator_fix_hypercall,
7672         .intercept           = emulator_intercept,
7673         .get_cpuid           = emulator_get_cpuid,
7674         .guest_has_long_mode = emulator_guest_has_long_mode,
7675         .guest_has_movbe     = emulator_guest_has_movbe,
7676         .guest_has_fxsr      = emulator_guest_has_fxsr,
7677         .set_nmi_mask        = emulator_set_nmi_mask,
7678         .get_hflags          = emulator_get_hflags,
7679         .exiting_smm         = emulator_exiting_smm,
7680         .leave_smm           = emulator_leave_smm,
7681         .triple_fault        = emulator_triple_fault,
7682         .set_xcr             = emulator_set_xcr,
7683 };
7684
7685 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
7686 {
7687         u32 int_shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
7688         /*
7689          * an sti; sti; sequence only disable interrupts for the first
7690          * instruction. So, if the last instruction, be it emulated or
7691          * not, left the system with the INT_STI flag enabled, it
7692          * means that the last instruction is an sti. We should not
7693          * leave the flag on in this case. The same goes for mov ss
7694          */
7695         if (int_shadow & mask)
7696                 mask = 0;
7697         if (unlikely(int_shadow || mask)) {
7698                 static_call(kvm_x86_set_interrupt_shadow)(vcpu, mask);
7699                 if (!mask)
7700                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7701         }
7702 }
7703
7704 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
7705 {
7706         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7707         if (ctxt->exception.vector == PF_VECTOR)
7708                 return kvm_inject_emulated_page_fault(vcpu, &ctxt->exception);
7709
7710         if (ctxt->exception.error_code_valid)
7711                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
7712                                       ctxt->exception.error_code);
7713         else
7714                 kvm_queue_exception(vcpu, ctxt->exception.vector);
7715         return false;
7716 }
7717
7718 static struct x86_emulate_ctxt *alloc_emulate_ctxt(struct kvm_vcpu *vcpu)
7719 {
7720         struct x86_emulate_ctxt *ctxt;
7721
7722         ctxt = kmem_cache_zalloc(x86_emulator_cache, GFP_KERNEL_ACCOUNT);
7723         if (!ctxt) {
7724                 pr_err("kvm: failed to allocate vcpu's emulator\n");
7725                 return NULL;
7726         }
7727
7728         ctxt->vcpu = vcpu;
7729         ctxt->ops = &emulate_ops;
7730         vcpu->arch.emulate_ctxt = ctxt;
7731
7732         return ctxt;
7733 }
7734
7735 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
7736 {
7737         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7738         int cs_db, cs_l;
7739
7740         static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
7741
7742         ctxt->gpa_available = false;
7743         ctxt->eflags = kvm_get_rflags(vcpu);
7744         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
7745
7746         ctxt->eip = kvm_rip_read(vcpu);
7747         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
7748                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
7749                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
7750                      cs_db                              ? X86EMUL_MODE_PROT32 :
7751                                                           X86EMUL_MODE_PROT16;
7752         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
7753         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
7754         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
7755
7756         ctxt->interruptibility = 0;
7757         ctxt->have_exception = false;
7758         ctxt->exception.vector = -1;
7759         ctxt->perm_ok = false;
7760
7761         init_decode_cache(ctxt);
7762         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7763 }
7764
7765 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
7766 {
7767         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7768         int ret;
7769
7770         init_emulate_ctxt(vcpu);
7771
7772         ctxt->op_bytes = 2;
7773         ctxt->ad_bytes = 2;
7774         ctxt->_eip = ctxt->eip + inc_eip;
7775         ret = emulate_int_real(ctxt, irq);
7776
7777         if (ret != X86EMUL_CONTINUE) {
7778                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
7779         } else {
7780                 ctxt->eip = ctxt->_eip;
7781                 kvm_rip_write(vcpu, ctxt->eip);
7782                 kvm_set_rflags(vcpu, ctxt->eflags);
7783         }
7784 }
7785 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
7786
7787 static void prepare_emulation_failure_exit(struct kvm_vcpu *vcpu, u64 *data,
7788                                            u8 ndata, u8 *insn_bytes, u8 insn_size)
7789 {
7790         struct kvm_run *run = vcpu->run;
7791         u64 info[5];
7792         u8 info_start;
7793
7794         /*
7795          * Zero the whole array used to retrieve the exit info, as casting to
7796          * u32 for select entries will leave some chunks uninitialized.
7797          */
7798         memset(&info, 0, sizeof(info));
7799
7800         static_call(kvm_x86_get_exit_info)(vcpu, (u32 *)&info[0], &info[1],
7801                                            &info[2], (u32 *)&info[3],
7802                                            (u32 *)&info[4]);
7803
7804         run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7805         run->emulation_failure.suberror = KVM_INTERNAL_ERROR_EMULATION;
7806
7807         /*
7808          * There's currently space for 13 entries, but 5 are used for the exit
7809          * reason and info.  Restrict to 4 to reduce the maintenance burden
7810          * when expanding kvm_run.emulation_failure in the future.
7811          */
7812         if (WARN_ON_ONCE(ndata > 4))
7813                 ndata = 4;
7814
7815         /* Always include the flags as a 'data' entry. */
7816         info_start = 1;
7817         run->emulation_failure.flags = 0;
7818
7819         if (insn_size) {
7820                 BUILD_BUG_ON((sizeof(run->emulation_failure.insn_size) +
7821                               sizeof(run->emulation_failure.insn_bytes) != 16));
7822                 info_start += 2;
7823                 run->emulation_failure.flags |=
7824                         KVM_INTERNAL_ERROR_EMULATION_FLAG_INSTRUCTION_BYTES;
7825                 run->emulation_failure.insn_size = insn_size;
7826                 memset(run->emulation_failure.insn_bytes, 0x90,
7827                        sizeof(run->emulation_failure.insn_bytes));
7828                 memcpy(run->emulation_failure.insn_bytes, insn_bytes, insn_size);
7829         }
7830
7831         memcpy(&run->internal.data[info_start], info, sizeof(info));
7832         memcpy(&run->internal.data[info_start + ARRAY_SIZE(info)], data,
7833                ndata * sizeof(data[0]));
7834
7835         run->emulation_failure.ndata = info_start + ARRAY_SIZE(info) + ndata;
7836 }
7837
7838 static void prepare_emulation_ctxt_failure_exit(struct kvm_vcpu *vcpu)
7839 {
7840         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7841
7842         prepare_emulation_failure_exit(vcpu, NULL, 0, ctxt->fetch.data,
7843                                        ctxt->fetch.end - ctxt->fetch.data);
7844 }
7845
7846 void __kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu, u64 *data,
7847                                           u8 ndata)
7848 {
7849         prepare_emulation_failure_exit(vcpu, data, ndata, NULL, 0);
7850 }
7851 EXPORT_SYMBOL_GPL(__kvm_prepare_emulation_failure_exit);
7852
7853 void kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu)
7854 {
7855         __kvm_prepare_emulation_failure_exit(vcpu, NULL, 0);
7856 }
7857 EXPORT_SYMBOL_GPL(kvm_prepare_emulation_failure_exit);
7858
7859 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
7860 {
7861         struct kvm *kvm = vcpu->kvm;
7862
7863         ++vcpu->stat.insn_emulation_fail;
7864         trace_kvm_emulate_insn_failed(vcpu);
7865
7866         if (emulation_type & EMULTYPE_VMWARE_GP) {
7867                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7868                 return 1;
7869         }
7870
7871         if (kvm->arch.exit_on_emulation_error ||
7872             (emulation_type & EMULTYPE_SKIP)) {
7873                 prepare_emulation_ctxt_failure_exit(vcpu);
7874                 return 0;
7875         }
7876
7877         kvm_queue_exception(vcpu, UD_VECTOR);
7878
7879         if (!is_guest_mode(vcpu) && static_call(kvm_x86_get_cpl)(vcpu) == 0) {
7880                 prepare_emulation_ctxt_failure_exit(vcpu);
7881                 return 0;
7882         }
7883
7884         return 1;
7885 }
7886
7887 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7888                                   bool write_fault_to_shadow_pgtable,
7889                                   int emulation_type)
7890 {
7891         gpa_t gpa = cr2_or_gpa;
7892         kvm_pfn_t pfn;
7893
7894         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7895                 return false;
7896
7897         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7898             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7899                 return false;
7900
7901         if (!vcpu->arch.mmu->direct_map) {
7902                 /*
7903                  * Write permission should be allowed since only
7904                  * write access need to be emulated.
7905                  */
7906                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7907
7908                 /*
7909                  * If the mapping is invalid in guest, let cpu retry
7910                  * it to generate fault.
7911                  */
7912                 if (gpa == UNMAPPED_GVA)
7913                         return true;
7914         }
7915
7916         /*
7917          * Do not retry the unhandleable instruction if it faults on the
7918          * readonly host memory, otherwise it will goto a infinite loop:
7919          * retry instruction -> write #PF -> emulation fail -> retry
7920          * instruction -> ...
7921          */
7922         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
7923
7924         /*
7925          * If the instruction failed on the error pfn, it can not be fixed,
7926          * report the error to userspace.
7927          */
7928         if (is_error_noslot_pfn(pfn))
7929                 return false;
7930
7931         kvm_release_pfn_clean(pfn);
7932
7933         /* The instructions are well-emulated on direct mmu. */
7934         if (vcpu->arch.mmu->direct_map) {
7935                 unsigned int indirect_shadow_pages;
7936
7937                 write_lock(&vcpu->kvm->mmu_lock);
7938                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
7939                 write_unlock(&vcpu->kvm->mmu_lock);
7940
7941                 if (indirect_shadow_pages)
7942                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7943
7944                 return true;
7945         }
7946
7947         /*
7948          * if emulation was due to access to shadowed page table
7949          * and it failed try to unshadow page and re-enter the
7950          * guest to let CPU execute the instruction.
7951          */
7952         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7953
7954         /*
7955          * If the access faults on its page table, it can not
7956          * be fixed by unprotecting shadow page and it should
7957          * be reported to userspace.
7958          */
7959         return !write_fault_to_shadow_pgtable;
7960 }
7961
7962 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
7963                               gpa_t cr2_or_gpa,  int emulation_type)
7964 {
7965         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7966         unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
7967
7968         last_retry_eip = vcpu->arch.last_retry_eip;
7969         last_retry_addr = vcpu->arch.last_retry_addr;
7970
7971         /*
7972          * If the emulation is caused by #PF and it is non-page_table
7973          * writing instruction, it means the VM-EXIT is caused by shadow
7974          * page protected, we can zap the shadow page and retry this
7975          * instruction directly.
7976          *
7977          * Note: if the guest uses a non-page-table modifying instruction
7978          * on the PDE that points to the instruction, then we will unmap
7979          * the instruction and go to an infinite loop. So, we cache the
7980          * last retried eip and the last fault address, if we meet the eip
7981          * and the address again, we can break out of the potential infinite
7982          * loop.
7983          */
7984         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
7985
7986         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7987                 return false;
7988
7989         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7990             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7991                 return false;
7992
7993         if (x86_page_table_writing_insn(ctxt))
7994                 return false;
7995
7996         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
7997                 return false;
7998
7999         vcpu->arch.last_retry_eip = ctxt->eip;
8000         vcpu->arch.last_retry_addr = cr2_or_gpa;
8001
8002         if (!vcpu->arch.mmu->direct_map)
8003                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
8004
8005         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
8006
8007         return true;
8008 }
8009
8010 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
8011 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
8012
8013 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm)
8014 {
8015         trace_kvm_smm_transition(vcpu->vcpu_id, vcpu->arch.smbase, entering_smm);
8016
8017         if (entering_smm) {
8018                 vcpu->arch.hflags |= HF_SMM_MASK;
8019         } else {
8020                 vcpu->arch.hflags &= ~(HF_SMM_MASK | HF_SMM_INSIDE_NMI_MASK);
8021
8022                 /* Process a latched INIT or SMI, if any.  */
8023                 kvm_make_request(KVM_REQ_EVENT, vcpu);
8024
8025                 /*
8026                  * Even if KVM_SET_SREGS2 loaded PDPTRs out of band,
8027                  * on SMM exit we still need to reload them from
8028                  * guest memory
8029                  */
8030                 vcpu->arch.pdptrs_from_userspace = false;
8031         }
8032
8033         kvm_mmu_reset_context(vcpu);
8034 }
8035
8036 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
8037                                 unsigned long *db)
8038 {
8039         u32 dr6 = 0;
8040         int i;
8041         u32 enable, rwlen;
8042
8043         enable = dr7;
8044         rwlen = dr7 >> 16;
8045         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
8046                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
8047                         dr6 |= (1 << i);
8048         return dr6;
8049 }
8050
8051 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
8052 {
8053         struct kvm_run *kvm_run = vcpu->run;
8054
8055         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
8056                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_ACTIVE_LOW;
8057                 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu);
8058                 kvm_run->debug.arch.exception = DB_VECTOR;
8059                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
8060                 return 0;
8061         }
8062         kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
8063         return 1;
8064 }
8065
8066 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
8067 {
8068         unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
8069         int r;
8070
8071         r = static_call(kvm_x86_skip_emulated_instruction)(vcpu);
8072         if (unlikely(!r))
8073                 return 0;
8074
8075         kvm_pmu_trigger_event(vcpu, PERF_COUNT_HW_INSTRUCTIONS);
8076
8077         /*
8078          * rflags is the old, "raw" value of the flags.  The new value has
8079          * not been saved yet.
8080          *
8081          * This is correct even for TF set by the guest, because "the
8082          * processor will not generate this exception after the instruction
8083          * that sets the TF flag".
8084          */
8085         if (unlikely(rflags & X86_EFLAGS_TF))
8086                 r = kvm_vcpu_do_singlestep(vcpu);
8087         return r;
8088 }
8089 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
8090
8091 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
8092 {
8093         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
8094             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
8095                 struct kvm_run *kvm_run = vcpu->run;
8096                 unsigned long eip = kvm_get_linear_rip(vcpu);
8097                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
8098                                            vcpu->arch.guest_debug_dr7,
8099                                            vcpu->arch.eff_db);
8100
8101                 if (dr6 != 0) {
8102                         kvm_run->debug.arch.dr6 = dr6 | DR6_ACTIVE_LOW;
8103                         kvm_run->debug.arch.pc = eip;
8104                         kvm_run->debug.arch.exception = DB_VECTOR;
8105                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
8106                         *r = 0;
8107                         return true;
8108                 }
8109         }
8110
8111         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
8112             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
8113                 unsigned long eip = kvm_get_linear_rip(vcpu);
8114                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
8115                                            vcpu->arch.dr7,
8116                                            vcpu->arch.db);
8117
8118                 if (dr6 != 0) {
8119                         kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
8120                         *r = 1;
8121                         return true;
8122                 }
8123         }
8124
8125         return false;
8126 }
8127
8128 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
8129 {
8130         switch (ctxt->opcode_len) {
8131         case 1:
8132                 switch (ctxt->b) {
8133                 case 0xe4:      /* IN */
8134                 case 0xe5:
8135                 case 0xec:
8136                 case 0xed:
8137                 case 0xe6:      /* OUT */
8138                 case 0xe7:
8139                 case 0xee:
8140                 case 0xef:
8141                 case 0x6c:      /* INS */
8142                 case 0x6d:
8143                 case 0x6e:      /* OUTS */
8144                 case 0x6f:
8145                         return true;
8146                 }
8147                 break;
8148         case 2:
8149                 switch (ctxt->b) {
8150                 case 0x33:      /* RDPMC */
8151                         return true;
8152                 }
8153                 break;
8154         }
8155
8156         return false;
8157 }
8158
8159 /*
8160  * Decode to be emulated instruction. Return EMULATION_OK if success.
8161  */
8162 int x86_decode_emulated_instruction(struct kvm_vcpu *vcpu, int emulation_type,
8163                                     void *insn, int insn_len)
8164 {
8165         int r = EMULATION_OK;
8166         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8167
8168         init_emulate_ctxt(vcpu);
8169
8170         /*
8171          * We will reenter on the same instruction since we do not set
8172          * complete_userspace_io. This does not handle watchpoints yet,
8173          * those would be handled in the emulate_ops.
8174          */
8175         if (!(emulation_type & EMULTYPE_SKIP) &&
8176             kvm_vcpu_check_breakpoint(vcpu, &r))
8177                 return r;
8178
8179         r = x86_decode_insn(ctxt, insn, insn_len, emulation_type);
8180
8181         trace_kvm_emulate_insn_start(vcpu);
8182         ++vcpu->stat.insn_emulation;
8183
8184         return r;
8185 }
8186 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction);
8187
8188 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
8189                             int emulation_type, void *insn, int insn_len)
8190 {
8191         int r;
8192         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8193         bool writeback = true;
8194         bool write_fault_to_spt;
8195
8196         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, insn, insn_len)))
8197                 return 1;
8198
8199         vcpu->arch.l1tf_flush_l1d = true;
8200
8201         /*
8202          * Clear write_fault_to_shadow_pgtable here to ensure it is
8203          * never reused.
8204          */
8205         write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
8206         vcpu->arch.write_fault_to_shadow_pgtable = false;
8207
8208         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
8209                 kvm_clear_exception_queue(vcpu);
8210
8211                 r = x86_decode_emulated_instruction(vcpu, emulation_type,
8212                                                     insn, insn_len);
8213                 if (r != EMULATION_OK)  {
8214                         if ((emulation_type & EMULTYPE_TRAP_UD) ||
8215                             (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
8216                                 kvm_queue_exception(vcpu, UD_VECTOR);
8217                                 return 1;
8218                         }
8219                         if (reexecute_instruction(vcpu, cr2_or_gpa,
8220                                                   write_fault_to_spt,
8221                                                   emulation_type))
8222                                 return 1;
8223                         if (ctxt->have_exception) {
8224                                 /*
8225                                  * #UD should result in just EMULATION_FAILED, and trap-like
8226                                  * exception should not be encountered during decode.
8227                                  */
8228                                 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
8229                                              exception_type(ctxt->exception.vector) == EXCPT_TRAP);
8230                                 inject_emulated_exception(vcpu);
8231                                 return 1;
8232                         }
8233                         return handle_emulation_failure(vcpu, emulation_type);
8234                 }
8235         }
8236
8237         if ((emulation_type & EMULTYPE_VMWARE_GP) &&
8238             !is_vmware_backdoor_opcode(ctxt)) {
8239                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
8240                 return 1;
8241         }
8242
8243         /*
8244          * EMULTYPE_SKIP without EMULTYPE_COMPLETE_USER_EXIT is intended for
8245          * use *only* by vendor callbacks for kvm_skip_emulated_instruction().
8246          * The caller is responsible for updating interruptibility state and
8247          * injecting single-step #DBs.
8248          */
8249         if (emulation_type & EMULTYPE_SKIP) {
8250                 if (ctxt->mode != X86EMUL_MODE_PROT64)
8251                         ctxt->eip = (u32)ctxt->_eip;
8252                 else
8253                         ctxt->eip = ctxt->_eip;
8254
8255                 if (emulation_type & EMULTYPE_COMPLETE_USER_EXIT) {
8256                         r = 1;
8257                         goto writeback;
8258                 }
8259
8260                 kvm_rip_write(vcpu, ctxt->eip);
8261                 if (ctxt->eflags & X86_EFLAGS_RF)
8262                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
8263                 return 1;
8264         }
8265
8266         if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
8267                 return 1;
8268
8269         /* this is needed for vmware backdoor interface to work since it
8270            changes registers values  during IO operation */
8271         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
8272                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
8273                 emulator_invalidate_register_cache(ctxt);
8274         }
8275
8276 restart:
8277         if (emulation_type & EMULTYPE_PF) {
8278                 /* Save the faulting GPA (cr2) in the address field */
8279                 ctxt->exception.address = cr2_or_gpa;
8280
8281                 /* With shadow page tables, cr2 contains a GVA or nGPA. */
8282                 if (vcpu->arch.mmu->direct_map) {
8283                         ctxt->gpa_available = true;
8284                         ctxt->gpa_val = cr2_or_gpa;
8285                 }
8286         } else {
8287                 /* Sanitize the address out of an abundance of paranoia. */
8288                 ctxt->exception.address = 0;
8289         }
8290
8291         r = x86_emulate_insn(ctxt);
8292
8293         if (r == EMULATION_INTERCEPTED)
8294                 return 1;
8295
8296         if (r == EMULATION_FAILED) {
8297                 if (reexecute_instruction(vcpu, cr2_or_gpa, write_fault_to_spt,
8298                                         emulation_type))
8299                         return 1;
8300
8301                 return handle_emulation_failure(vcpu, emulation_type);
8302         }
8303
8304         if (ctxt->have_exception) {
8305                 r = 1;
8306                 if (inject_emulated_exception(vcpu))
8307                         return r;
8308         } else if (vcpu->arch.pio.count) {
8309                 if (!vcpu->arch.pio.in) {
8310                         /* FIXME: return into emulator if single-stepping.  */
8311                         vcpu->arch.pio.count = 0;
8312                 } else {
8313                         writeback = false;
8314                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
8315                 }
8316                 r = 0;
8317         } else if (vcpu->mmio_needed) {
8318                 ++vcpu->stat.mmio_exits;
8319
8320                 if (!vcpu->mmio_is_write)
8321                         writeback = false;
8322                 r = 0;
8323                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
8324         } else if (vcpu->arch.complete_userspace_io) {
8325                 writeback = false;
8326                 r = 0;
8327         } else if (r == EMULATION_RESTART)
8328                 goto restart;
8329         else
8330                 r = 1;
8331
8332 writeback:
8333         if (writeback) {
8334                 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
8335                 toggle_interruptibility(vcpu, ctxt->interruptibility);
8336                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8337                 if (!ctxt->have_exception ||
8338                     exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
8339                         kvm_pmu_trigger_event(vcpu, PERF_COUNT_HW_INSTRUCTIONS);
8340                         if (ctxt->is_branch)
8341                                 kvm_pmu_trigger_event(vcpu, PERF_COUNT_HW_BRANCH_INSTRUCTIONS);
8342                         kvm_rip_write(vcpu, ctxt->eip);
8343                         if (r && (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
8344                                 r = kvm_vcpu_do_singlestep(vcpu);
8345                         if (kvm_x86_ops.update_emulated_instruction)
8346                                 static_call(kvm_x86_update_emulated_instruction)(vcpu);
8347                         __kvm_set_rflags(vcpu, ctxt->eflags);
8348                 }
8349
8350                 /*
8351                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
8352                  * do nothing, and it will be requested again as soon as
8353                  * the shadow expires.  But we still need to check here,
8354                  * because POPF has no interrupt shadow.
8355                  */
8356                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
8357                         kvm_make_request(KVM_REQ_EVENT, vcpu);
8358         } else
8359                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
8360
8361         return r;
8362 }
8363
8364 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
8365 {
8366         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
8367 }
8368 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
8369
8370 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
8371                                         void *insn, int insn_len)
8372 {
8373         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
8374 }
8375 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
8376
8377 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
8378 {
8379         vcpu->arch.pio.count = 0;
8380         return 1;
8381 }
8382
8383 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
8384 {
8385         vcpu->arch.pio.count = 0;
8386
8387         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
8388                 return 1;
8389
8390         return kvm_skip_emulated_instruction(vcpu);
8391 }
8392
8393 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
8394                             unsigned short port)
8395 {
8396         unsigned long val = kvm_rax_read(vcpu);
8397         int ret = emulator_pio_out(vcpu, size, port, &val, 1);
8398
8399         if (ret)
8400                 return ret;
8401
8402         /*
8403          * Workaround userspace that relies on old KVM behavior of %rip being
8404          * incremented prior to exiting to userspace to handle "OUT 0x7e".
8405          */
8406         if (port == 0x7e &&
8407             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
8408                 vcpu->arch.complete_userspace_io =
8409                         complete_fast_pio_out_port_0x7e;
8410                 kvm_skip_emulated_instruction(vcpu);
8411         } else {
8412                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
8413                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
8414         }
8415         return 0;
8416 }
8417
8418 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
8419 {
8420         unsigned long val;
8421
8422         /* We should only ever be called with arch.pio.count equal to 1 */
8423         BUG_ON(vcpu->arch.pio.count != 1);
8424
8425         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
8426                 vcpu->arch.pio.count = 0;
8427                 return 1;
8428         }
8429
8430         /* For size less than 4 we merge, else we zero extend */
8431         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
8432
8433         /*
8434          * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
8435          * the copy and tracing
8436          */
8437         emulator_pio_in(vcpu, vcpu->arch.pio.size, vcpu->arch.pio.port, &val, 1);
8438         kvm_rax_write(vcpu, val);
8439
8440         return kvm_skip_emulated_instruction(vcpu);
8441 }
8442
8443 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
8444                            unsigned short port)
8445 {
8446         unsigned long val;
8447         int ret;
8448
8449         /* For size less than 4 we merge, else we zero extend */
8450         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
8451
8452         ret = emulator_pio_in(vcpu, size, port, &val, 1);
8453         if (ret) {
8454                 kvm_rax_write(vcpu, val);
8455                 return ret;
8456         }
8457
8458         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
8459         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
8460
8461         return 0;
8462 }
8463
8464 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
8465 {
8466         int ret;
8467
8468         if (in)
8469                 ret = kvm_fast_pio_in(vcpu, size, port);
8470         else
8471                 ret = kvm_fast_pio_out(vcpu, size, port);
8472         return ret && kvm_skip_emulated_instruction(vcpu);
8473 }
8474 EXPORT_SYMBOL_GPL(kvm_fast_pio);
8475
8476 static int kvmclock_cpu_down_prep(unsigned int cpu)
8477 {
8478         __this_cpu_write(cpu_tsc_khz, 0);
8479         return 0;
8480 }
8481
8482 static void tsc_khz_changed(void *data)
8483 {
8484         struct cpufreq_freqs *freq = data;
8485         unsigned long khz = 0;
8486
8487         if (data)
8488                 khz = freq->new;
8489         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8490                 khz = cpufreq_quick_get(raw_smp_processor_id());
8491         if (!khz)
8492                 khz = tsc_khz;
8493         __this_cpu_write(cpu_tsc_khz, khz);
8494 }
8495
8496 #ifdef CONFIG_X86_64
8497 static void kvm_hyperv_tsc_notifier(void)
8498 {
8499         struct kvm *kvm;
8500         int cpu;
8501
8502         mutex_lock(&kvm_lock);
8503         list_for_each_entry(kvm, &vm_list, vm_list)
8504                 kvm_make_mclock_inprogress_request(kvm);
8505
8506         /* no guest entries from this point */
8507         hyperv_stop_tsc_emulation();
8508
8509         /* TSC frequency always matches when on Hyper-V */
8510         for_each_present_cpu(cpu)
8511                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
8512         kvm_max_guest_tsc_khz = tsc_khz;
8513
8514         list_for_each_entry(kvm, &vm_list, vm_list) {
8515                 __kvm_start_pvclock_update(kvm);
8516                 pvclock_update_vm_gtod_copy(kvm);
8517                 kvm_end_pvclock_update(kvm);
8518         }
8519
8520         mutex_unlock(&kvm_lock);
8521 }
8522 #endif
8523
8524 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
8525 {
8526         struct kvm *kvm;
8527         struct kvm_vcpu *vcpu;
8528         int send_ipi = 0;
8529         unsigned long i;
8530
8531         /*
8532          * We allow guests to temporarily run on slowing clocks,
8533          * provided we notify them after, or to run on accelerating
8534          * clocks, provided we notify them before.  Thus time never
8535          * goes backwards.
8536          *
8537          * However, we have a problem.  We can't atomically update
8538          * the frequency of a given CPU from this function; it is
8539          * merely a notifier, which can be called from any CPU.
8540          * Changing the TSC frequency at arbitrary points in time
8541          * requires a recomputation of local variables related to
8542          * the TSC for each VCPU.  We must flag these local variables
8543          * to be updated and be sure the update takes place with the
8544          * new frequency before any guests proceed.
8545          *
8546          * Unfortunately, the combination of hotplug CPU and frequency
8547          * change creates an intractable locking scenario; the order
8548          * of when these callouts happen is undefined with respect to
8549          * CPU hotplug, and they can race with each other.  As such,
8550          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
8551          * undefined; you can actually have a CPU frequency change take
8552          * place in between the computation of X and the setting of the
8553          * variable.  To protect against this problem, all updates of
8554          * the per_cpu tsc_khz variable are done in an interrupt
8555          * protected IPI, and all callers wishing to update the value
8556          * must wait for a synchronous IPI to complete (which is trivial
8557          * if the caller is on the CPU already).  This establishes the
8558          * necessary total order on variable updates.
8559          *
8560          * Note that because a guest time update may take place
8561          * anytime after the setting of the VCPU's request bit, the
8562          * correct TSC value must be set before the request.  However,
8563          * to ensure the update actually makes it to any guest which
8564          * starts running in hardware virtualization between the set
8565          * and the acquisition of the spinlock, we must also ping the
8566          * CPU after setting the request bit.
8567          *
8568          */
8569
8570         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8571
8572         mutex_lock(&kvm_lock);
8573         list_for_each_entry(kvm, &vm_list, vm_list) {
8574                 kvm_for_each_vcpu(i, vcpu, kvm) {
8575                         if (vcpu->cpu != cpu)
8576                                 continue;
8577                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8578                         if (vcpu->cpu != raw_smp_processor_id())
8579                                 send_ipi = 1;
8580                 }
8581         }
8582         mutex_unlock(&kvm_lock);
8583
8584         if (freq->old < freq->new && send_ipi) {
8585                 /*
8586                  * We upscale the frequency.  Must make the guest
8587                  * doesn't see old kvmclock values while running with
8588                  * the new frequency, otherwise we risk the guest sees
8589                  * time go backwards.
8590                  *
8591                  * In case we update the frequency for another cpu
8592                  * (which might be in guest context) send an interrupt
8593                  * to kick the cpu out of guest context.  Next time
8594                  * guest context is entered kvmclock will be updated,
8595                  * so the guest will not see stale values.
8596                  */
8597                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8598         }
8599 }
8600
8601 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
8602                                      void *data)
8603 {
8604         struct cpufreq_freqs *freq = data;
8605         int cpu;
8606
8607         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
8608                 return 0;
8609         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
8610                 return 0;
8611
8612         for_each_cpu(cpu, freq->policy->cpus)
8613                 __kvmclock_cpufreq_notifier(freq, cpu);
8614
8615         return 0;
8616 }
8617
8618 static struct notifier_block kvmclock_cpufreq_notifier_block = {
8619         .notifier_call  = kvmclock_cpufreq_notifier
8620 };
8621
8622 static int kvmclock_cpu_online(unsigned int cpu)
8623 {
8624         tsc_khz_changed(NULL);
8625         return 0;
8626 }
8627
8628 static void kvm_timer_init(void)
8629 {
8630         max_tsc_khz = tsc_khz;
8631
8632         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
8633 #ifdef CONFIG_CPU_FREQ
8634                 struct cpufreq_policy *policy;
8635                 int cpu;
8636
8637                 cpu = get_cpu();
8638                 policy = cpufreq_cpu_get(cpu);
8639                 if (policy) {
8640                         if (policy->cpuinfo.max_freq)
8641                                 max_tsc_khz = policy->cpuinfo.max_freq;
8642                         cpufreq_cpu_put(policy);
8643                 }
8644                 put_cpu();
8645 #endif
8646                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
8647                                           CPUFREQ_TRANSITION_NOTIFIER);
8648         }
8649
8650         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
8651                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
8652 }
8653
8654 #ifdef CONFIG_X86_64
8655 static void pvclock_gtod_update_fn(struct work_struct *work)
8656 {
8657         struct kvm *kvm;
8658         struct kvm_vcpu *vcpu;
8659         unsigned long i;
8660
8661         mutex_lock(&kvm_lock);
8662         list_for_each_entry(kvm, &vm_list, vm_list)
8663                 kvm_for_each_vcpu(i, vcpu, kvm)
8664                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
8665         atomic_set(&kvm_guest_has_master_clock, 0);
8666         mutex_unlock(&kvm_lock);
8667 }
8668
8669 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
8670
8671 /*
8672  * Indirection to move queue_work() out of the tk_core.seq write held
8673  * region to prevent possible deadlocks against time accessors which
8674  * are invoked with work related locks held.
8675  */
8676 static void pvclock_irq_work_fn(struct irq_work *w)
8677 {
8678         queue_work(system_long_wq, &pvclock_gtod_work);
8679 }
8680
8681 static DEFINE_IRQ_WORK(pvclock_irq_work, pvclock_irq_work_fn);
8682
8683 /*
8684  * Notification about pvclock gtod data update.
8685  */
8686 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
8687                                void *priv)
8688 {
8689         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
8690         struct timekeeper *tk = priv;
8691
8692         update_pvclock_gtod(tk);
8693
8694         /*
8695          * Disable master clock if host does not trust, or does not use,
8696          * TSC based clocksource. Delegate queue_work() to irq_work as
8697          * this is invoked with tk_core.seq write held.
8698          */
8699         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
8700             atomic_read(&kvm_guest_has_master_clock) != 0)
8701                 irq_work_queue(&pvclock_irq_work);
8702         return 0;
8703 }
8704
8705 static struct notifier_block pvclock_gtod_notifier = {
8706         .notifier_call = pvclock_gtod_notify,
8707 };
8708 #endif
8709
8710 int kvm_arch_init(void *opaque)
8711 {
8712         struct kvm_x86_init_ops *ops = opaque;
8713         int r;
8714
8715         if (kvm_x86_ops.hardware_enable) {
8716                 pr_err("kvm: already loaded vendor module '%s'\n", kvm_x86_ops.name);
8717                 r = -EEXIST;
8718                 goto out;
8719         }
8720
8721         if (!ops->cpu_has_kvm_support()) {
8722                 pr_err_ratelimited("kvm: no hardware support for '%s'\n",
8723                                    ops->runtime_ops->name);
8724                 r = -EOPNOTSUPP;
8725                 goto out;
8726         }
8727         if (ops->disabled_by_bios()) {
8728                 pr_err_ratelimited("kvm: support for '%s' disabled by bios\n",
8729                                    ops->runtime_ops->name);
8730                 r = -EOPNOTSUPP;
8731                 goto out;
8732         }
8733
8734         /*
8735          * KVM explicitly assumes that the guest has an FPU and
8736          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
8737          * vCPU's FPU state as a fxregs_state struct.
8738          */
8739         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
8740                 printk(KERN_ERR "kvm: inadequate fpu\n");
8741                 r = -EOPNOTSUPP;
8742                 goto out;
8743         }
8744
8745         r = -ENOMEM;
8746
8747         x86_emulator_cache = kvm_alloc_emulator_cache();
8748         if (!x86_emulator_cache) {
8749                 pr_err("kvm: failed to allocate cache for x86 emulator\n");
8750                 goto out;
8751         }
8752
8753         user_return_msrs = alloc_percpu(struct kvm_user_return_msrs);
8754         if (!user_return_msrs) {
8755                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_user_return_msrs\n");
8756                 goto out_free_x86_emulator_cache;
8757         }
8758         kvm_nr_uret_msrs = 0;
8759
8760         r = kvm_mmu_module_init();
8761         if (r)
8762                 goto out_free_percpu;
8763
8764         kvm_timer_init();
8765
8766         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
8767                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
8768                 supported_xcr0 = host_xcr0 & KVM_SUPPORTED_XCR0;
8769         }
8770
8771         if (pi_inject_timer == -1)
8772                 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
8773 #ifdef CONFIG_X86_64
8774         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
8775
8776         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8777                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
8778 #endif
8779
8780         return 0;
8781
8782 out_free_percpu:
8783         free_percpu(user_return_msrs);
8784 out_free_x86_emulator_cache:
8785         kmem_cache_destroy(x86_emulator_cache);
8786 out:
8787         return r;
8788 }
8789
8790 void kvm_arch_exit(void)
8791 {
8792 #ifdef CONFIG_X86_64
8793         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8794                 clear_hv_tscchange_cb();
8795 #endif
8796         kvm_lapic_exit();
8797
8798         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8799                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
8800                                             CPUFREQ_TRANSITION_NOTIFIER);
8801         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
8802 #ifdef CONFIG_X86_64
8803         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
8804         irq_work_sync(&pvclock_irq_work);
8805         cancel_work_sync(&pvclock_gtod_work);
8806 #endif
8807         kvm_x86_ops.hardware_enable = NULL;
8808         kvm_mmu_module_exit();
8809         free_percpu(user_return_msrs);
8810         kmem_cache_destroy(x86_emulator_cache);
8811 #ifdef CONFIG_KVM_XEN
8812         static_key_deferred_flush(&kvm_xen_enabled);
8813         WARN_ON(static_branch_unlikely(&kvm_xen_enabled.key));
8814 #endif
8815 }
8816
8817 static int __kvm_emulate_halt(struct kvm_vcpu *vcpu, int state, int reason)
8818 {
8819         /*
8820          * The vCPU has halted, e.g. executed HLT.  Update the run state if the
8821          * local APIC is in-kernel, the run loop will detect the non-runnable
8822          * state and halt the vCPU.  Exit to userspace if the local APIC is
8823          * managed by userspace, in which case userspace is responsible for
8824          * handling wake events.
8825          */
8826         ++vcpu->stat.halt_exits;
8827         if (lapic_in_kernel(vcpu)) {
8828                 vcpu->arch.mp_state = state;
8829                 return 1;
8830         } else {
8831                 vcpu->run->exit_reason = reason;
8832                 return 0;
8833         }
8834 }
8835
8836 int kvm_emulate_halt_noskip(struct kvm_vcpu *vcpu)
8837 {
8838         return __kvm_emulate_halt(vcpu, KVM_MP_STATE_HALTED, KVM_EXIT_HLT);
8839 }
8840 EXPORT_SYMBOL_GPL(kvm_emulate_halt_noskip);
8841
8842 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
8843 {
8844         int ret = kvm_skip_emulated_instruction(vcpu);
8845         /*
8846          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
8847          * KVM_EXIT_DEBUG here.
8848          */
8849         return kvm_emulate_halt_noskip(vcpu) && ret;
8850 }
8851 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
8852
8853 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu)
8854 {
8855         int ret = kvm_skip_emulated_instruction(vcpu);
8856
8857         return __kvm_emulate_halt(vcpu, KVM_MP_STATE_AP_RESET_HOLD,
8858                                         KVM_EXIT_AP_RESET_HOLD) && ret;
8859 }
8860 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold);
8861
8862 #ifdef CONFIG_X86_64
8863 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
8864                                 unsigned long clock_type)
8865 {
8866         struct kvm_clock_pairing clock_pairing;
8867         struct timespec64 ts;
8868         u64 cycle;
8869         int ret;
8870
8871         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
8872                 return -KVM_EOPNOTSUPP;
8873
8874         if (!kvm_get_walltime_and_clockread(&ts, &cycle))
8875                 return -KVM_EOPNOTSUPP;
8876
8877         clock_pairing.sec = ts.tv_sec;
8878         clock_pairing.nsec = ts.tv_nsec;
8879         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
8880         clock_pairing.flags = 0;
8881         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
8882
8883         ret = 0;
8884         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
8885                             sizeof(struct kvm_clock_pairing)))
8886                 ret = -KVM_EFAULT;
8887
8888         return ret;
8889 }
8890 #endif
8891
8892 /*
8893  * kvm_pv_kick_cpu_op:  Kick a vcpu.
8894  *
8895  * @apicid - apicid of vcpu to be kicked.
8896  */
8897 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
8898 {
8899         struct kvm_lapic_irq lapic_irq;
8900
8901         lapic_irq.shorthand = APIC_DEST_NOSHORT;
8902         lapic_irq.dest_mode = APIC_DEST_PHYSICAL;
8903         lapic_irq.level = 0;
8904         lapic_irq.dest_id = apicid;
8905         lapic_irq.msi_redir_hint = false;
8906
8907         lapic_irq.delivery_mode = APIC_DM_REMRD;
8908         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
8909 }
8910
8911 bool kvm_apicv_activated(struct kvm *kvm)
8912 {
8913         return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
8914 }
8915 EXPORT_SYMBOL_GPL(kvm_apicv_activated);
8916
8917 static void kvm_apicv_init(struct kvm *kvm)
8918 {
8919         init_rwsem(&kvm->arch.apicv_update_lock);
8920
8921         set_bit(APICV_INHIBIT_REASON_ABSENT,
8922                 &kvm->arch.apicv_inhibit_reasons);
8923         if (!enable_apicv)
8924                 set_bit(APICV_INHIBIT_REASON_DISABLE,
8925                         &kvm->arch.apicv_inhibit_reasons);
8926 }
8927
8928 static void kvm_sched_yield(struct kvm_vcpu *vcpu, unsigned long dest_id)
8929 {
8930         struct kvm_vcpu *target = NULL;
8931         struct kvm_apic_map *map;
8932
8933         vcpu->stat.directed_yield_attempted++;
8934
8935         if (single_task_running())
8936                 goto no_yield;
8937
8938         rcu_read_lock();
8939         map = rcu_dereference(vcpu->kvm->arch.apic_map);
8940
8941         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
8942                 target = map->phys_map[dest_id]->vcpu;
8943
8944         rcu_read_unlock();
8945
8946         if (!target || !READ_ONCE(target->ready))
8947                 goto no_yield;
8948
8949         /* Ignore requests to yield to self */
8950         if (vcpu == target)
8951                 goto no_yield;
8952
8953         if (kvm_vcpu_yield_to(target) <= 0)
8954                 goto no_yield;
8955
8956         vcpu->stat.directed_yield_successful++;
8957
8958 no_yield:
8959         return;
8960 }
8961
8962 static int complete_hypercall_exit(struct kvm_vcpu *vcpu)
8963 {
8964         u64 ret = vcpu->run->hypercall.ret;
8965
8966         if (!is_64_bit_mode(vcpu))
8967                 ret = (u32)ret;
8968         kvm_rax_write(vcpu, ret);
8969         ++vcpu->stat.hypercalls;
8970         return kvm_skip_emulated_instruction(vcpu);
8971 }
8972
8973 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
8974 {
8975         unsigned long nr, a0, a1, a2, a3, ret;
8976         int op_64_bit;
8977
8978         if (kvm_xen_hypercall_enabled(vcpu->kvm))
8979                 return kvm_xen_hypercall(vcpu);
8980
8981         if (kvm_hv_hypercall_enabled(vcpu))
8982                 return kvm_hv_hypercall(vcpu);
8983
8984         nr = kvm_rax_read(vcpu);
8985         a0 = kvm_rbx_read(vcpu);
8986         a1 = kvm_rcx_read(vcpu);
8987         a2 = kvm_rdx_read(vcpu);
8988         a3 = kvm_rsi_read(vcpu);
8989
8990         trace_kvm_hypercall(nr, a0, a1, a2, a3);
8991
8992         op_64_bit = is_64_bit_hypercall(vcpu);
8993         if (!op_64_bit) {
8994                 nr &= 0xFFFFFFFF;
8995                 a0 &= 0xFFFFFFFF;
8996                 a1 &= 0xFFFFFFFF;
8997                 a2 &= 0xFFFFFFFF;
8998                 a3 &= 0xFFFFFFFF;
8999         }
9000
9001         if (static_call(kvm_x86_get_cpl)(vcpu) != 0) {
9002                 ret = -KVM_EPERM;
9003                 goto out;
9004         }
9005
9006         ret = -KVM_ENOSYS;
9007
9008         switch (nr) {
9009         case KVM_HC_VAPIC_POLL_IRQ:
9010                 ret = 0;
9011                 break;
9012         case KVM_HC_KICK_CPU:
9013                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_UNHALT))
9014                         break;
9015
9016                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
9017                 kvm_sched_yield(vcpu, a1);
9018                 ret = 0;
9019                 break;
9020 #ifdef CONFIG_X86_64
9021         case KVM_HC_CLOCK_PAIRING:
9022                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
9023                 break;
9024 #endif
9025         case KVM_HC_SEND_IPI:
9026                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SEND_IPI))
9027                         break;
9028
9029                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
9030                 break;
9031         case KVM_HC_SCHED_YIELD:
9032                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SCHED_YIELD))
9033                         break;
9034
9035                 kvm_sched_yield(vcpu, a0);
9036                 ret = 0;
9037                 break;
9038         case KVM_HC_MAP_GPA_RANGE: {
9039                 u64 gpa = a0, npages = a1, attrs = a2;
9040
9041                 ret = -KVM_ENOSYS;
9042                 if (!(vcpu->kvm->arch.hypercall_exit_enabled & (1 << KVM_HC_MAP_GPA_RANGE)))
9043                         break;
9044
9045                 if (!PAGE_ALIGNED(gpa) || !npages ||
9046                     gpa_to_gfn(gpa) + npages <= gpa_to_gfn(gpa)) {
9047                         ret = -KVM_EINVAL;
9048                         break;
9049                 }
9050
9051                 vcpu->run->exit_reason        = KVM_EXIT_HYPERCALL;
9052                 vcpu->run->hypercall.nr       = KVM_HC_MAP_GPA_RANGE;
9053                 vcpu->run->hypercall.args[0]  = gpa;
9054                 vcpu->run->hypercall.args[1]  = npages;
9055                 vcpu->run->hypercall.args[2]  = attrs;
9056                 vcpu->run->hypercall.longmode = op_64_bit;
9057                 vcpu->arch.complete_userspace_io = complete_hypercall_exit;
9058                 return 0;
9059         }
9060         default:
9061                 ret = -KVM_ENOSYS;
9062                 break;
9063         }
9064 out:
9065         if (!op_64_bit)
9066                 ret = (u32)ret;
9067         kvm_rax_write(vcpu, ret);
9068
9069         ++vcpu->stat.hypercalls;
9070         return kvm_skip_emulated_instruction(vcpu);
9071 }
9072 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
9073
9074 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
9075 {
9076         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
9077         char instruction[3];
9078         unsigned long rip = kvm_rip_read(vcpu);
9079
9080         static_call(kvm_x86_patch_hypercall)(vcpu, instruction);
9081
9082         return emulator_write_emulated(ctxt, rip, instruction, 3,
9083                 &ctxt->exception);
9084 }
9085
9086 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
9087 {
9088         return vcpu->run->request_interrupt_window &&
9089                 likely(!pic_in_kernel(vcpu->kvm));
9090 }
9091
9092 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
9093 {
9094         struct kvm_run *kvm_run = vcpu->run;
9095
9096         kvm_run->if_flag = static_call(kvm_x86_get_if_flag)(vcpu);
9097         kvm_run->cr8 = kvm_get_cr8(vcpu);
9098         kvm_run->apic_base = kvm_get_apic_base(vcpu);
9099
9100         /*
9101          * The call to kvm_ready_for_interrupt_injection() may end up in
9102          * kvm_xen_has_interrupt() which may require the srcu lock to be
9103          * held, to protect against changes in the vcpu_info address.
9104          */
9105         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9106         kvm_run->ready_for_interrupt_injection =
9107                 pic_in_kernel(vcpu->kvm) ||
9108                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
9109         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9110
9111         if (is_smm(vcpu))
9112                 kvm_run->flags |= KVM_RUN_X86_SMM;
9113 }
9114
9115 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
9116 {
9117         int max_irr, tpr;
9118
9119         if (!kvm_x86_ops.update_cr8_intercept)
9120                 return;
9121
9122         if (!lapic_in_kernel(vcpu))
9123                 return;
9124
9125         if (vcpu->arch.apicv_active)
9126                 return;
9127
9128         if (!vcpu->arch.apic->vapic_addr)
9129                 max_irr = kvm_lapic_find_highest_irr(vcpu);
9130         else
9131                 max_irr = -1;
9132
9133         if (max_irr != -1)
9134                 max_irr >>= 4;
9135
9136         tpr = kvm_lapic_get_cr8(vcpu);
9137
9138         static_call(kvm_x86_update_cr8_intercept)(vcpu, tpr, max_irr);
9139 }
9140
9141
9142 int kvm_check_nested_events(struct kvm_vcpu *vcpu)
9143 {
9144         if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
9145                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
9146                 return 1;
9147         }
9148
9149         return kvm_x86_ops.nested_ops->check_events(vcpu);
9150 }
9151
9152 static void kvm_inject_exception(struct kvm_vcpu *vcpu)
9153 {
9154         if (vcpu->arch.exception.error_code && !is_protmode(vcpu))
9155                 vcpu->arch.exception.error_code = false;
9156         static_call(kvm_x86_queue_exception)(vcpu);
9157 }
9158
9159 static int inject_pending_event(struct kvm_vcpu *vcpu, bool *req_immediate_exit)
9160 {
9161         int r;
9162         bool can_inject = true;
9163
9164         /* try to reinject previous events if any */
9165
9166         if (vcpu->arch.exception.injected) {
9167                 kvm_inject_exception(vcpu);
9168                 can_inject = false;
9169         }
9170         /*
9171          * Do not inject an NMI or interrupt if there is a pending
9172          * exception.  Exceptions and interrupts are recognized at
9173          * instruction boundaries, i.e. the start of an instruction.
9174          * Trap-like exceptions, e.g. #DB, have higher priority than
9175          * NMIs and interrupts, i.e. traps are recognized before an
9176          * NMI/interrupt that's pending on the same instruction.
9177          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
9178          * priority, but are only generated (pended) during instruction
9179          * execution, i.e. a pending fault-like exception means the
9180          * fault occurred on the *previous* instruction and must be
9181          * serviced prior to recognizing any new events in order to
9182          * fully complete the previous instruction.
9183          */
9184         else if (!vcpu->arch.exception.pending) {
9185                 if (vcpu->arch.nmi_injected) {
9186                         static_call(kvm_x86_set_nmi)(vcpu);
9187                         can_inject = false;
9188                 } else if (vcpu->arch.interrupt.injected) {
9189                         static_call(kvm_x86_set_irq)(vcpu);
9190                         can_inject = false;
9191                 }
9192         }
9193
9194         WARN_ON_ONCE(vcpu->arch.exception.injected &&
9195                      vcpu->arch.exception.pending);
9196
9197         /*
9198          * Call check_nested_events() even if we reinjected a previous event
9199          * in order for caller to determine if it should require immediate-exit
9200          * from L2 to L1 due to pending L1 events which require exit
9201          * from L2 to L1.
9202          */
9203         if (is_guest_mode(vcpu)) {
9204                 r = kvm_check_nested_events(vcpu);
9205                 if (r < 0)
9206                         goto out;
9207         }
9208
9209         /* try to inject new event if pending */
9210         if (vcpu->arch.exception.pending) {
9211                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
9212                                         vcpu->arch.exception.has_error_code,
9213                                         vcpu->arch.exception.error_code);
9214
9215                 vcpu->arch.exception.pending = false;
9216                 vcpu->arch.exception.injected = true;
9217
9218                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
9219                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
9220                                              X86_EFLAGS_RF);
9221
9222                 if (vcpu->arch.exception.nr == DB_VECTOR) {
9223                         kvm_deliver_exception_payload(vcpu);
9224                         if (vcpu->arch.dr7 & DR7_GD) {
9225                                 vcpu->arch.dr7 &= ~DR7_GD;
9226                                 kvm_update_dr7(vcpu);
9227                         }
9228                 }
9229
9230                 kvm_inject_exception(vcpu);
9231                 can_inject = false;
9232         }
9233
9234         /* Don't inject interrupts if the user asked to avoid doing so */
9235         if (vcpu->guest_debug & KVM_GUESTDBG_BLOCKIRQ)
9236                 return 0;
9237
9238         /*
9239          * Finally, inject interrupt events.  If an event cannot be injected
9240          * due to architectural conditions (e.g. IF=0) a window-open exit
9241          * will re-request KVM_REQ_EVENT.  Sometimes however an event is pending
9242          * and can architecturally be injected, but we cannot do it right now:
9243          * an interrupt could have arrived just now and we have to inject it
9244          * as a vmexit, or there could already an event in the queue, which is
9245          * indicated by can_inject.  In that case we request an immediate exit
9246          * in order to make progress and get back here for another iteration.
9247          * The kvm_x86_ops hooks communicate this by returning -EBUSY.
9248          */
9249         if (vcpu->arch.smi_pending) {
9250                 r = can_inject ? static_call(kvm_x86_smi_allowed)(vcpu, true) : -EBUSY;
9251                 if (r < 0)
9252                         goto out;
9253                 if (r) {
9254                         vcpu->arch.smi_pending = false;
9255                         ++vcpu->arch.smi_count;
9256                         enter_smm(vcpu);
9257                         can_inject = false;
9258                 } else
9259                         static_call(kvm_x86_enable_smi_window)(vcpu);
9260         }
9261
9262         if (vcpu->arch.nmi_pending) {
9263                 r = can_inject ? static_call(kvm_x86_nmi_allowed)(vcpu, true) : -EBUSY;
9264                 if (r < 0)
9265                         goto out;
9266                 if (r) {
9267                         --vcpu->arch.nmi_pending;
9268                         vcpu->arch.nmi_injected = true;
9269                         static_call(kvm_x86_set_nmi)(vcpu);
9270                         can_inject = false;
9271                         WARN_ON(static_call(kvm_x86_nmi_allowed)(vcpu, true) < 0);
9272                 }
9273                 if (vcpu->arch.nmi_pending)
9274                         static_call(kvm_x86_enable_nmi_window)(vcpu);
9275         }
9276
9277         if (kvm_cpu_has_injectable_intr(vcpu)) {
9278                 r = can_inject ? static_call(kvm_x86_interrupt_allowed)(vcpu, true) : -EBUSY;
9279                 if (r < 0)
9280                         goto out;
9281                 if (r) {
9282                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu), false);
9283                         static_call(kvm_x86_set_irq)(vcpu);
9284                         WARN_ON(static_call(kvm_x86_interrupt_allowed)(vcpu, true) < 0);
9285                 }
9286                 if (kvm_cpu_has_injectable_intr(vcpu))
9287                         static_call(kvm_x86_enable_irq_window)(vcpu);
9288         }
9289
9290         if (is_guest_mode(vcpu) &&
9291             kvm_x86_ops.nested_ops->hv_timer_pending &&
9292             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
9293                 *req_immediate_exit = true;
9294
9295         WARN_ON(vcpu->arch.exception.pending);
9296         return 0;
9297
9298 out:
9299         if (r == -EBUSY) {
9300                 *req_immediate_exit = true;
9301                 r = 0;
9302         }
9303         return r;
9304 }
9305
9306 static void process_nmi(struct kvm_vcpu *vcpu)
9307 {
9308         unsigned limit = 2;
9309
9310         /*
9311          * x86 is limited to one NMI running, and one NMI pending after it.
9312          * If an NMI is already in progress, limit further NMIs to just one.
9313          * Otherwise, allow two (and we'll inject the first one immediately).
9314          */
9315         if (static_call(kvm_x86_get_nmi_mask)(vcpu) || vcpu->arch.nmi_injected)
9316                 limit = 1;
9317
9318         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
9319         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
9320         kvm_make_request(KVM_REQ_EVENT, vcpu);
9321 }
9322
9323 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
9324 {
9325         u32 flags = 0;
9326         flags |= seg->g       << 23;
9327         flags |= seg->db      << 22;
9328         flags |= seg->l       << 21;
9329         flags |= seg->avl     << 20;
9330         flags |= seg->present << 15;
9331         flags |= seg->dpl     << 13;
9332         flags |= seg->s       << 12;
9333         flags |= seg->type    << 8;
9334         return flags;
9335 }
9336
9337 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
9338 {
9339         struct kvm_segment seg;
9340         int offset;
9341
9342         kvm_get_segment(vcpu, &seg, n);
9343         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
9344
9345         if (n < 3)
9346                 offset = 0x7f84 + n * 12;
9347         else
9348                 offset = 0x7f2c + (n - 3) * 12;
9349
9350         put_smstate(u32, buf, offset + 8, seg.base);
9351         put_smstate(u32, buf, offset + 4, seg.limit);
9352         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
9353 }
9354
9355 #ifdef CONFIG_X86_64
9356 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
9357 {
9358         struct kvm_segment seg;
9359         int offset;
9360         u16 flags;
9361
9362         kvm_get_segment(vcpu, &seg, n);
9363         offset = 0x7e00 + n * 16;
9364
9365         flags = enter_smm_get_segment_flags(&seg) >> 8;
9366         put_smstate(u16, buf, offset, seg.selector);
9367         put_smstate(u16, buf, offset + 2, flags);
9368         put_smstate(u32, buf, offset + 4, seg.limit);
9369         put_smstate(u64, buf, offset + 8, seg.base);
9370 }
9371 #endif
9372
9373 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
9374 {
9375         struct desc_ptr dt;
9376         struct kvm_segment seg;
9377         unsigned long val;
9378         int i;
9379
9380         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
9381         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
9382         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
9383         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
9384
9385         for (i = 0; i < 8; i++)
9386                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read_raw(vcpu, i));
9387
9388         kvm_get_dr(vcpu, 6, &val);
9389         put_smstate(u32, buf, 0x7fcc, (u32)val);
9390         kvm_get_dr(vcpu, 7, &val);
9391         put_smstate(u32, buf, 0x7fc8, (u32)val);
9392
9393         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
9394         put_smstate(u32, buf, 0x7fc4, seg.selector);
9395         put_smstate(u32, buf, 0x7f64, seg.base);
9396         put_smstate(u32, buf, 0x7f60, seg.limit);
9397         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
9398
9399         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
9400         put_smstate(u32, buf, 0x7fc0, seg.selector);
9401         put_smstate(u32, buf, 0x7f80, seg.base);
9402         put_smstate(u32, buf, 0x7f7c, seg.limit);
9403         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
9404
9405         static_call(kvm_x86_get_gdt)(vcpu, &dt);
9406         put_smstate(u32, buf, 0x7f74, dt.address);
9407         put_smstate(u32, buf, 0x7f70, dt.size);
9408
9409         static_call(kvm_x86_get_idt)(vcpu, &dt);
9410         put_smstate(u32, buf, 0x7f58, dt.address);
9411         put_smstate(u32, buf, 0x7f54, dt.size);
9412
9413         for (i = 0; i < 6; i++)
9414                 enter_smm_save_seg_32(vcpu, buf, i);
9415
9416         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
9417
9418         /* revision id */
9419         put_smstate(u32, buf, 0x7efc, 0x00020000);
9420         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
9421 }
9422
9423 #ifdef CONFIG_X86_64
9424 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
9425 {
9426         struct desc_ptr dt;
9427         struct kvm_segment seg;
9428         unsigned long val;
9429         int i;
9430
9431         for (i = 0; i < 16; i++)
9432                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read_raw(vcpu, i));
9433
9434         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
9435         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
9436
9437         kvm_get_dr(vcpu, 6, &val);
9438         put_smstate(u64, buf, 0x7f68, val);
9439         kvm_get_dr(vcpu, 7, &val);
9440         put_smstate(u64, buf, 0x7f60, val);
9441
9442         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
9443         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
9444         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
9445
9446         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
9447
9448         /* revision id */
9449         put_smstate(u32, buf, 0x7efc, 0x00020064);
9450
9451         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
9452
9453         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
9454         put_smstate(u16, buf, 0x7e90, seg.selector);
9455         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
9456         put_smstate(u32, buf, 0x7e94, seg.limit);
9457         put_smstate(u64, buf, 0x7e98, seg.base);
9458
9459         static_call(kvm_x86_get_idt)(vcpu, &dt);
9460         put_smstate(u32, buf, 0x7e84, dt.size);
9461         put_smstate(u64, buf, 0x7e88, dt.address);
9462
9463         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
9464         put_smstate(u16, buf, 0x7e70, seg.selector);
9465         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
9466         put_smstate(u32, buf, 0x7e74, seg.limit);
9467         put_smstate(u64, buf, 0x7e78, seg.base);
9468
9469         static_call(kvm_x86_get_gdt)(vcpu, &dt);
9470         put_smstate(u32, buf, 0x7e64, dt.size);
9471         put_smstate(u64, buf, 0x7e68, dt.address);
9472
9473         for (i = 0; i < 6; i++)
9474                 enter_smm_save_seg_64(vcpu, buf, i);
9475 }
9476 #endif
9477
9478 static void enter_smm(struct kvm_vcpu *vcpu)
9479 {
9480         struct kvm_segment cs, ds;
9481         struct desc_ptr dt;
9482         unsigned long cr0;
9483         char buf[512];
9484
9485         memset(buf, 0, 512);
9486 #ifdef CONFIG_X86_64
9487         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9488                 enter_smm_save_state_64(vcpu, buf);
9489         else
9490 #endif
9491                 enter_smm_save_state_32(vcpu, buf);
9492
9493         /*
9494          * Give enter_smm() a chance to make ISA-specific changes to the vCPU
9495          * state (e.g. leave guest mode) after we've saved the state into the
9496          * SMM state-save area.
9497          */
9498         static_call(kvm_x86_enter_smm)(vcpu, buf);
9499
9500         kvm_smm_changed(vcpu, true);
9501         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
9502
9503         if (static_call(kvm_x86_get_nmi_mask)(vcpu))
9504                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
9505         else
9506                 static_call(kvm_x86_set_nmi_mask)(vcpu, true);
9507
9508         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
9509         kvm_rip_write(vcpu, 0x8000);
9510
9511         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
9512         static_call(kvm_x86_set_cr0)(vcpu, cr0);
9513         vcpu->arch.cr0 = cr0;
9514
9515         static_call(kvm_x86_set_cr4)(vcpu, 0);
9516
9517         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
9518         dt.address = dt.size = 0;
9519         static_call(kvm_x86_set_idt)(vcpu, &dt);
9520
9521         kvm_set_dr(vcpu, 7, DR7_FIXED_1);
9522
9523         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
9524         cs.base = vcpu->arch.smbase;
9525
9526         ds.selector = 0;
9527         ds.base = 0;
9528
9529         cs.limit    = ds.limit = 0xffffffff;
9530         cs.type     = ds.type = 0x3;
9531         cs.dpl      = ds.dpl = 0;
9532         cs.db       = ds.db = 0;
9533         cs.s        = ds.s = 1;
9534         cs.l        = ds.l = 0;
9535         cs.g        = ds.g = 1;
9536         cs.avl      = ds.avl = 0;
9537         cs.present  = ds.present = 1;
9538         cs.unusable = ds.unusable = 0;
9539         cs.padding  = ds.padding = 0;
9540
9541         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
9542         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
9543         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
9544         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
9545         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
9546         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
9547
9548 #ifdef CONFIG_X86_64
9549         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9550                 static_call(kvm_x86_set_efer)(vcpu, 0);
9551 #endif
9552
9553         kvm_update_cpuid_runtime(vcpu);
9554         kvm_mmu_reset_context(vcpu);
9555 }
9556
9557 static void process_smi(struct kvm_vcpu *vcpu)
9558 {
9559         vcpu->arch.smi_pending = true;
9560         kvm_make_request(KVM_REQ_EVENT, vcpu);
9561 }
9562
9563 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
9564                                        unsigned long *vcpu_bitmap)
9565 {
9566         kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC, vcpu_bitmap);
9567 }
9568
9569 void kvm_make_scan_ioapic_request(struct kvm *kvm)
9570 {
9571         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
9572 }
9573
9574 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
9575 {
9576         bool activate;
9577
9578         if (!lapic_in_kernel(vcpu))
9579                 return;
9580
9581         down_read(&vcpu->kvm->arch.apicv_update_lock);
9582
9583         activate = kvm_apicv_activated(vcpu->kvm);
9584         if (vcpu->arch.apicv_active == activate)
9585                 goto out;
9586
9587         vcpu->arch.apicv_active = activate;
9588         kvm_apic_update_apicv(vcpu);
9589         static_call(kvm_x86_refresh_apicv_exec_ctrl)(vcpu);
9590
9591         /*
9592          * When APICv gets disabled, we may still have injected interrupts
9593          * pending. At the same time, KVM_REQ_EVENT may not be set as APICv was
9594          * still active when the interrupt got accepted. Make sure
9595          * inject_pending_event() is called to check for that.
9596          */
9597         if (!vcpu->arch.apicv_active)
9598                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9599
9600 out:
9601         up_read(&vcpu->kvm->arch.apicv_update_lock);
9602 }
9603 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv);
9604
9605 void __kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
9606 {
9607         unsigned long old, new;
9608
9609         lockdep_assert_held_write(&kvm->arch.apicv_update_lock);
9610
9611         if (!kvm_x86_ops.check_apicv_inhibit_reasons ||
9612             !static_call(kvm_x86_check_apicv_inhibit_reasons)(bit))
9613                 return;
9614
9615         old = new = kvm->arch.apicv_inhibit_reasons;
9616
9617         if (activate)
9618                 __clear_bit(bit, &new);
9619         else
9620                 __set_bit(bit, &new);
9621
9622         if (!!old != !!new) {
9623                 trace_kvm_apicv_update_request(activate, bit);
9624                 /*
9625                  * Kick all vCPUs before setting apicv_inhibit_reasons to avoid
9626                  * false positives in the sanity check WARN in svm_vcpu_run().
9627                  * This task will wait for all vCPUs to ack the kick IRQ before
9628                  * updating apicv_inhibit_reasons, and all other vCPUs will
9629                  * block on acquiring apicv_update_lock so that vCPUs can't
9630                  * redo svm_vcpu_run() without seeing the new inhibit state.
9631                  *
9632                  * Note, holding apicv_update_lock and taking it in the read
9633                  * side (handling the request) also prevents other vCPUs from
9634                  * servicing the request with a stale apicv_inhibit_reasons.
9635                  */
9636                 kvm_make_all_cpus_request(kvm, KVM_REQ_APICV_UPDATE);
9637                 kvm->arch.apicv_inhibit_reasons = new;
9638                 if (new) {
9639                         unsigned long gfn = gpa_to_gfn(APIC_DEFAULT_PHYS_BASE);
9640                         kvm_zap_gfn_range(kvm, gfn, gfn+1);
9641                 }
9642         } else
9643                 kvm->arch.apicv_inhibit_reasons = new;
9644 }
9645 EXPORT_SYMBOL_GPL(__kvm_request_apicv_update);
9646
9647 void kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
9648 {
9649         down_write(&kvm->arch.apicv_update_lock);
9650         __kvm_request_apicv_update(kvm, activate, bit);
9651         up_write(&kvm->arch.apicv_update_lock);
9652 }
9653 EXPORT_SYMBOL_GPL(kvm_request_apicv_update);
9654
9655 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
9656 {
9657         if (!kvm_apic_present(vcpu))
9658                 return;
9659
9660         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
9661
9662         if (irqchip_split(vcpu->kvm))
9663                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
9664         else {
9665                 static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
9666                 if (ioapic_in_kernel(vcpu->kvm))
9667                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
9668         }
9669
9670         if (is_guest_mode(vcpu))
9671                 vcpu->arch.load_eoi_exitmap_pending = true;
9672         else
9673                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
9674 }
9675
9676 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
9677 {
9678         u64 eoi_exit_bitmap[4];
9679
9680         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
9681                 return;
9682
9683         if (to_hv_vcpu(vcpu)) {
9684                 bitmap_or((ulong *)eoi_exit_bitmap,
9685                           vcpu->arch.ioapic_handled_vectors,
9686                           to_hv_synic(vcpu)->vec_bitmap, 256);
9687                 static_call(kvm_x86_load_eoi_exitmap)(vcpu, eoi_exit_bitmap);
9688                 return;
9689         }
9690
9691         static_call(kvm_x86_load_eoi_exitmap)(
9692                 vcpu, (u64 *)vcpu->arch.ioapic_handled_vectors);
9693 }
9694
9695 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
9696                                             unsigned long start, unsigned long end)
9697 {
9698         unsigned long apic_address;
9699
9700         /*
9701          * The physical address of apic access page is stored in the VMCS.
9702          * Update it when it becomes invalid.
9703          */
9704         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
9705         if (start <= apic_address && apic_address < end)
9706                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
9707 }
9708
9709 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
9710 {
9711         if (!lapic_in_kernel(vcpu))
9712                 return;
9713
9714         if (!kvm_x86_ops.set_apic_access_page_addr)
9715                 return;
9716
9717         static_call(kvm_x86_set_apic_access_page_addr)(vcpu);
9718 }
9719
9720 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
9721 {
9722         smp_send_reschedule(vcpu->cpu);
9723 }
9724 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
9725
9726 /*
9727  * Returns 1 to let vcpu_run() continue the guest execution loop without
9728  * exiting to the userspace.  Otherwise, the value will be returned to the
9729  * userspace.
9730  */
9731 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
9732 {
9733         int r;
9734         bool req_int_win =
9735                 dm_request_for_irq_injection(vcpu) &&
9736                 kvm_cpu_accept_dm_intr(vcpu);
9737         fastpath_t exit_fastpath;
9738
9739         bool req_immediate_exit = false;
9740
9741         /* Forbid vmenter if vcpu dirty ring is soft-full */
9742         if (unlikely(vcpu->kvm->dirty_ring_size &&
9743                      kvm_dirty_ring_soft_full(&vcpu->dirty_ring))) {
9744                 vcpu->run->exit_reason = KVM_EXIT_DIRTY_RING_FULL;
9745                 trace_kvm_dirty_ring_exit(vcpu);
9746                 r = 0;
9747                 goto out;
9748         }
9749
9750         if (kvm_request_pending(vcpu)) {
9751                 if (kvm_check_request(KVM_REQ_VM_DEAD, vcpu)) {
9752                         r = -EIO;
9753                         goto out;
9754                 }
9755                 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu)) {
9756                         if (unlikely(!kvm_x86_ops.nested_ops->get_nested_state_pages(vcpu))) {
9757                                 r = 0;
9758                                 goto out;
9759                         }
9760                 }
9761                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
9762                         kvm_mmu_unload(vcpu);
9763                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
9764                         __kvm_migrate_timers(vcpu);
9765                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
9766                         kvm_update_masterclock(vcpu->kvm);
9767                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
9768                         kvm_gen_kvmclock_update(vcpu);
9769                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
9770                         r = kvm_guest_time_update(vcpu);
9771                         if (unlikely(r))
9772                                 goto out;
9773                 }
9774                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
9775                         kvm_mmu_sync_roots(vcpu);
9776                 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD, vcpu))
9777                         kvm_mmu_load_pgd(vcpu);
9778                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) {
9779                         kvm_vcpu_flush_tlb_all(vcpu);
9780
9781                         /* Flushing all ASIDs flushes the current ASID... */
9782                         kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
9783                 }
9784                 kvm_service_local_tlb_flush_requests(vcpu);
9785
9786                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
9787                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
9788                         r = 0;
9789                         goto out;
9790                 }
9791                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
9792                         if (is_guest_mode(vcpu)) {
9793                                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
9794                         } else {
9795                                 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
9796                                 vcpu->mmio_needed = 0;
9797                                 r = 0;
9798                                 goto out;
9799                         }
9800                 }
9801                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
9802                         /* Page is swapped out. Do synthetic halt */
9803                         vcpu->arch.apf.halted = true;
9804                         r = 1;
9805                         goto out;
9806                 }
9807                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
9808                         record_steal_time(vcpu);
9809                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
9810                         process_smi(vcpu);
9811                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
9812                         process_nmi(vcpu);
9813                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
9814                         kvm_pmu_handle_event(vcpu);
9815                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
9816                         kvm_pmu_deliver_pmi(vcpu);
9817                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
9818                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
9819                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
9820                                      vcpu->arch.ioapic_handled_vectors)) {
9821                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
9822                                 vcpu->run->eoi.vector =
9823                                                 vcpu->arch.pending_ioapic_eoi;
9824                                 r = 0;
9825                                 goto out;
9826                         }
9827                 }
9828                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
9829                         vcpu_scan_ioapic(vcpu);
9830                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
9831                         vcpu_load_eoi_exitmap(vcpu);
9832                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
9833                         kvm_vcpu_reload_apic_access_page(vcpu);
9834                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
9835                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9836                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
9837                         r = 0;
9838                         goto out;
9839                 }
9840                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
9841                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9842                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
9843                         r = 0;
9844                         goto out;
9845                 }
9846                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
9847                         struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
9848
9849                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
9850                         vcpu->run->hyperv = hv_vcpu->exit;
9851                         r = 0;
9852                         goto out;
9853                 }
9854
9855                 /*
9856                  * KVM_REQ_HV_STIMER has to be processed after
9857                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
9858                  * depend on the guest clock being up-to-date
9859                  */
9860                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
9861                         kvm_hv_process_stimers(vcpu);
9862                 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
9863                         kvm_vcpu_update_apicv(vcpu);
9864                 if (kvm_check_request(KVM_REQ_APF_READY, vcpu))
9865                         kvm_check_async_pf_completion(vcpu);
9866                 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED, vcpu))
9867                         static_call(kvm_x86_msr_filter_changed)(vcpu);
9868
9869                 if (kvm_check_request(KVM_REQ_UPDATE_CPU_DIRTY_LOGGING, vcpu))
9870                         static_call(kvm_x86_update_cpu_dirty_logging)(vcpu);
9871         }
9872
9873         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win ||
9874             kvm_xen_has_interrupt(vcpu)) {
9875                 ++vcpu->stat.req_event;
9876                 r = kvm_apic_accept_events(vcpu);
9877                 if (r < 0) {
9878                         r = 0;
9879                         goto out;
9880                 }
9881                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
9882                         r = 1;
9883                         goto out;
9884                 }
9885
9886                 r = inject_pending_event(vcpu, &req_immediate_exit);
9887                 if (r < 0) {
9888                         r = 0;
9889                         goto out;
9890                 }
9891                 if (req_int_win)
9892                         static_call(kvm_x86_enable_irq_window)(vcpu);
9893
9894                 if (kvm_lapic_enabled(vcpu)) {
9895                         update_cr8_intercept(vcpu);
9896                         kvm_lapic_sync_to_vapic(vcpu);
9897                 }
9898         }
9899
9900         r = kvm_mmu_reload(vcpu);
9901         if (unlikely(r)) {
9902                 goto cancel_injection;
9903         }
9904
9905         preempt_disable();
9906
9907         static_call(kvm_x86_prepare_guest_switch)(vcpu);
9908
9909         /*
9910          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
9911          * IPI are then delayed after guest entry, which ensures that they
9912          * result in virtual interrupt delivery.
9913          */
9914         local_irq_disable();
9915         vcpu->mode = IN_GUEST_MODE;
9916
9917         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9918
9919         /*
9920          * 1) We should set ->mode before checking ->requests.  Please see
9921          * the comment in kvm_vcpu_exiting_guest_mode().
9922          *
9923          * 2) For APICv, we should set ->mode before checking PID.ON. This
9924          * pairs with the memory barrier implicit in pi_test_and_set_on
9925          * (see vmx_deliver_posted_interrupt).
9926          *
9927          * 3) This also orders the write to mode from any reads to the page
9928          * tables done while the VCPU is running.  Please see the comment
9929          * in kvm_flush_remote_tlbs.
9930          */
9931         smp_mb__after_srcu_read_unlock();
9932
9933         /*
9934          * Process pending posted interrupts to handle the case where the
9935          * notification IRQ arrived in the host, or was never sent (because the
9936          * target vCPU wasn't running).  Do this regardless of the vCPU's APICv
9937          * status, KVM doesn't update assigned devices when APICv is inhibited,
9938          * i.e. they can post interrupts even if APICv is temporarily disabled.
9939          */
9940         if (kvm_lapic_enabled(vcpu))
9941                 static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
9942
9943         if (kvm_vcpu_exit_request(vcpu)) {
9944                 vcpu->mode = OUTSIDE_GUEST_MODE;
9945                 smp_wmb();
9946                 local_irq_enable();
9947                 preempt_enable();
9948                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9949                 r = 1;
9950                 goto cancel_injection;
9951         }
9952
9953         if (req_immediate_exit) {
9954                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9955                 static_call(kvm_x86_request_immediate_exit)(vcpu);
9956         }
9957
9958         fpregs_assert_state_consistent();
9959         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9960                 switch_fpu_return();
9961
9962         if (vcpu->arch.guest_fpu.xfd_err)
9963                 wrmsrl(MSR_IA32_XFD_ERR, vcpu->arch.guest_fpu.xfd_err);
9964
9965         if (unlikely(vcpu->arch.switch_db_regs)) {
9966                 set_debugreg(0, 7);
9967                 set_debugreg(vcpu->arch.eff_db[0], 0);
9968                 set_debugreg(vcpu->arch.eff_db[1], 1);
9969                 set_debugreg(vcpu->arch.eff_db[2], 2);
9970                 set_debugreg(vcpu->arch.eff_db[3], 3);
9971         } else if (unlikely(hw_breakpoint_active())) {
9972                 set_debugreg(0, 7);
9973         }
9974
9975         for (;;) {
9976                 /*
9977                  * Assert that vCPU vs. VM APICv state is consistent.  An APICv
9978                  * update must kick and wait for all vCPUs before toggling the
9979                  * per-VM state, and responsing vCPUs must wait for the update
9980                  * to complete before servicing KVM_REQ_APICV_UPDATE.
9981                  */
9982                 WARN_ON_ONCE(kvm_apicv_activated(vcpu->kvm) != kvm_vcpu_apicv_active(vcpu));
9983
9984                 exit_fastpath = static_call(kvm_x86_run)(vcpu);
9985                 if (likely(exit_fastpath != EXIT_FASTPATH_REENTER_GUEST))
9986                         break;
9987
9988                 if (kvm_lapic_enabled(vcpu))
9989                         static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
9990
9991                 if (unlikely(kvm_vcpu_exit_request(vcpu))) {
9992                         exit_fastpath = EXIT_FASTPATH_EXIT_HANDLED;
9993                         break;
9994                 }
9995         }
9996
9997         /*
9998          * Do this here before restoring debug registers on the host.  And
9999          * since we do this before handling the vmexit, a DR access vmexit
10000          * can (a) read the correct value of the debug registers, (b) set
10001          * KVM_DEBUGREG_WONT_EXIT again.
10002          */
10003         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
10004                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
10005                 static_call(kvm_x86_sync_dirty_debug_regs)(vcpu);
10006                 kvm_update_dr0123(vcpu);
10007                 kvm_update_dr7(vcpu);
10008         }
10009
10010         /*
10011          * If the guest has used debug registers, at least dr7
10012          * will be disabled while returning to the host.
10013          * If we don't have active breakpoints in the host, we don't
10014          * care about the messed up debug address registers. But if
10015          * we have some of them active, restore the old state.
10016          */
10017         if (hw_breakpoint_active())
10018                 hw_breakpoint_restore();
10019
10020         vcpu->arch.last_vmentry_cpu = vcpu->cpu;
10021         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
10022
10023         vcpu->mode = OUTSIDE_GUEST_MODE;
10024         smp_wmb();
10025
10026         /*
10027          * Sync xfd before calling handle_exit_irqoff() which may
10028          * rely on the fact that guest_fpu::xfd is up-to-date (e.g.
10029          * in #NM irqoff handler).
10030          */
10031         if (vcpu->arch.xfd_no_write_intercept)
10032                 fpu_sync_guest_vmexit_xfd_state();
10033
10034         static_call(kvm_x86_handle_exit_irqoff)(vcpu);
10035
10036         if (vcpu->arch.guest_fpu.xfd_err)
10037                 wrmsrl(MSR_IA32_XFD_ERR, 0);
10038
10039         /*
10040          * Consume any pending interrupts, including the possible source of
10041          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
10042          * An instruction is required after local_irq_enable() to fully unblock
10043          * interrupts on processors that implement an interrupt shadow, the
10044          * stat.exits increment will do nicely.
10045          */
10046         kvm_before_interrupt(vcpu, KVM_HANDLING_IRQ);
10047         local_irq_enable();
10048         ++vcpu->stat.exits;
10049         local_irq_disable();
10050         kvm_after_interrupt(vcpu);
10051
10052         /*
10053          * Wait until after servicing IRQs to account guest time so that any
10054          * ticks that occurred while running the guest are properly accounted
10055          * to the guest.  Waiting until IRQs are enabled degrades the accuracy
10056          * of accounting via context tracking, but the loss of accuracy is
10057          * acceptable for all known use cases.
10058          */
10059         vtime_account_guest_exit();
10060
10061         if (lapic_in_kernel(vcpu)) {
10062                 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
10063                 if (delta != S64_MIN) {
10064                         trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
10065                         vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
10066                 }
10067         }
10068
10069         local_irq_enable();
10070         preempt_enable();
10071
10072         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
10073
10074         /*
10075          * Profile KVM exit RIPs:
10076          */
10077         if (unlikely(prof_on == KVM_PROFILING)) {
10078                 unsigned long rip = kvm_rip_read(vcpu);
10079                 profile_hit(KVM_PROFILING, (void *)rip);
10080         }
10081
10082         if (unlikely(vcpu->arch.tsc_always_catchup))
10083                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
10084
10085         if (vcpu->arch.apic_attention)
10086                 kvm_lapic_sync_from_vapic(vcpu);
10087
10088         r = static_call(kvm_x86_handle_exit)(vcpu, exit_fastpath);
10089         return r;
10090
10091 cancel_injection:
10092         if (req_immediate_exit)
10093                 kvm_make_request(KVM_REQ_EVENT, vcpu);
10094         static_call(kvm_x86_cancel_injection)(vcpu);
10095         if (unlikely(vcpu->arch.apic_attention))
10096                 kvm_lapic_sync_from_vapic(vcpu);
10097 out:
10098         return r;
10099 }
10100
10101 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
10102 {
10103         bool hv_timer;
10104
10105         if (!kvm_arch_vcpu_runnable(vcpu)) {
10106                 /*
10107                  * Switch to the software timer before halt-polling/blocking as
10108                  * the guest's timer may be a break event for the vCPU, and the
10109                  * hypervisor timer runs only when the CPU is in guest mode.
10110                  * Switch before halt-polling so that KVM recognizes an expired
10111                  * timer before blocking.
10112                  */
10113                 hv_timer = kvm_lapic_hv_timer_in_use(vcpu);
10114                 if (hv_timer)
10115                         kvm_lapic_switch_to_sw_timer(vcpu);
10116
10117                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
10118                 if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED)
10119                         kvm_vcpu_halt(vcpu);
10120                 else
10121                         kvm_vcpu_block(vcpu);
10122                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
10123
10124                 if (hv_timer)
10125                         kvm_lapic_switch_to_hv_timer(vcpu);
10126
10127                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
10128                         return 1;
10129         }
10130
10131         if (kvm_apic_accept_events(vcpu) < 0)
10132                 return 0;
10133         switch(vcpu->arch.mp_state) {
10134         case KVM_MP_STATE_HALTED:
10135         case KVM_MP_STATE_AP_RESET_HOLD:
10136                 vcpu->arch.pv.pv_unhalted = false;
10137                 vcpu->arch.mp_state =
10138                         KVM_MP_STATE_RUNNABLE;
10139                 fallthrough;
10140         case KVM_MP_STATE_RUNNABLE:
10141                 vcpu->arch.apf.halted = false;
10142                 break;
10143         case KVM_MP_STATE_INIT_RECEIVED:
10144                 break;
10145         default:
10146                 return -EINTR;
10147         }
10148         return 1;
10149 }
10150
10151 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
10152 {
10153         if (is_guest_mode(vcpu))
10154                 kvm_check_nested_events(vcpu);
10155
10156         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
10157                 !vcpu->arch.apf.halted);
10158 }
10159
10160 static int vcpu_run(struct kvm_vcpu *vcpu)
10161 {
10162         int r;
10163         struct kvm *kvm = vcpu->kvm;
10164
10165         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
10166         vcpu->arch.l1tf_flush_l1d = true;
10167
10168         for (;;) {
10169                 if (kvm_vcpu_running(vcpu)) {
10170                         r = vcpu_enter_guest(vcpu);
10171                 } else {
10172                         r = vcpu_block(kvm, vcpu);
10173                 }
10174
10175                 if (r <= 0)
10176                         break;
10177
10178                 kvm_clear_request(KVM_REQ_UNBLOCK, vcpu);
10179                 if (kvm_cpu_has_pending_timer(vcpu))
10180                         kvm_inject_pending_timer_irqs(vcpu);
10181
10182                 if (dm_request_for_irq_injection(vcpu) &&
10183                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
10184                         r = 0;
10185                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
10186                         ++vcpu->stat.request_irq_exits;
10187                         break;
10188                 }
10189
10190                 if (__xfer_to_guest_mode_work_pending()) {
10191                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
10192                         r = xfer_to_guest_mode_handle_work(vcpu);
10193                         if (r)
10194                                 return r;
10195                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
10196                 }
10197         }
10198
10199         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
10200
10201         return r;
10202 }
10203
10204 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
10205 {
10206         int r;
10207
10208         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
10209         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
10210         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
10211         return r;
10212 }
10213
10214 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
10215 {
10216         BUG_ON(!vcpu->arch.pio.count);
10217
10218         return complete_emulated_io(vcpu);
10219 }
10220
10221 /*
10222  * Implements the following, as a state machine:
10223  *
10224  * read:
10225  *   for each fragment
10226  *     for each mmio piece in the fragment
10227  *       write gpa, len
10228  *       exit
10229  *       copy data
10230  *   execute insn
10231  *
10232  * write:
10233  *   for each fragment
10234  *     for each mmio piece in the fragment
10235  *       write gpa, len
10236  *       copy data
10237  *       exit
10238  */
10239 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
10240 {
10241         struct kvm_run *run = vcpu->run;
10242         struct kvm_mmio_fragment *frag;
10243         unsigned len;
10244
10245         BUG_ON(!vcpu->mmio_needed);
10246
10247         /* Complete previous fragment */
10248         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
10249         len = min(8u, frag->len);
10250         if (!vcpu->mmio_is_write)
10251                 memcpy(frag->data, run->mmio.data, len);
10252
10253         if (frag->len <= 8) {
10254                 /* Switch to the next fragment. */
10255                 frag++;
10256                 vcpu->mmio_cur_fragment++;
10257         } else {
10258                 /* Go forward to the next mmio piece. */
10259                 frag->data += len;
10260                 frag->gpa += len;
10261                 frag->len -= len;
10262         }
10263
10264         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
10265                 vcpu->mmio_needed = 0;
10266
10267                 /* FIXME: return into emulator if single-stepping.  */
10268                 if (vcpu->mmio_is_write)
10269                         return 1;
10270                 vcpu->mmio_read_completed = 1;
10271                 return complete_emulated_io(vcpu);
10272         }
10273
10274         run->exit_reason = KVM_EXIT_MMIO;
10275         run->mmio.phys_addr = frag->gpa;
10276         if (vcpu->mmio_is_write)
10277                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
10278         run->mmio.len = min(8u, frag->len);
10279         run->mmio.is_write = vcpu->mmio_is_write;
10280         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
10281         return 0;
10282 }
10283
10284 /* Swap (qemu) user FPU context for the guest FPU context. */
10285 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
10286 {
10287         /*
10288          * Exclude PKRU from restore as restored separately in
10289          * kvm_x86_ops.run().
10290          */
10291         fpu_swap_kvm_fpstate(&vcpu->arch.guest_fpu, true);
10292         trace_kvm_fpu(1);
10293 }
10294
10295 /* When vcpu_run ends, restore user space FPU context. */
10296 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
10297 {
10298         fpu_swap_kvm_fpstate(&vcpu->arch.guest_fpu, false);
10299         ++vcpu->stat.fpu_reload;
10300         trace_kvm_fpu(0);
10301 }
10302
10303 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
10304 {
10305         struct kvm_run *kvm_run = vcpu->run;
10306         int r;
10307
10308         vcpu_load(vcpu);
10309         kvm_sigset_activate(vcpu);
10310         kvm_run->flags = 0;
10311         kvm_load_guest_fpu(vcpu);
10312
10313         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
10314                 if (kvm_run->immediate_exit) {
10315                         r = -EINTR;
10316                         goto out;
10317                 }
10318                 /*
10319                  * It should be impossible for the hypervisor timer to be in
10320                  * use before KVM has ever run the vCPU.
10321                  */
10322                 WARN_ON_ONCE(kvm_lapic_hv_timer_in_use(vcpu));
10323                 kvm_vcpu_block(vcpu);
10324                 if (kvm_apic_accept_events(vcpu) < 0) {
10325                         r = 0;
10326                         goto out;
10327                 }
10328                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
10329                 r = -EAGAIN;
10330                 if (signal_pending(current)) {
10331                         r = -EINTR;
10332                         kvm_run->exit_reason = KVM_EXIT_INTR;
10333                         ++vcpu->stat.signal_exits;
10334                 }
10335                 goto out;
10336         }
10337
10338         if ((kvm_run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) ||
10339             (kvm_run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)) {
10340                 r = -EINVAL;
10341                 goto out;
10342         }
10343
10344         if (kvm_run->kvm_dirty_regs) {
10345                 r = sync_regs(vcpu);
10346                 if (r != 0)
10347                         goto out;
10348         }
10349
10350         /* re-sync apic's tpr */
10351         if (!lapic_in_kernel(vcpu)) {
10352                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
10353                         r = -EINVAL;
10354                         goto out;
10355                 }
10356         }
10357
10358         if (unlikely(vcpu->arch.complete_userspace_io)) {
10359                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
10360                 vcpu->arch.complete_userspace_io = NULL;
10361                 r = cui(vcpu);
10362                 if (r <= 0)
10363                         goto out;
10364         } else
10365                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
10366
10367         if (kvm_run->immediate_exit) {
10368                 r = -EINTR;
10369                 goto out;
10370         }
10371
10372         r = static_call(kvm_x86_vcpu_pre_run)(vcpu);
10373         if (r <= 0)
10374                 goto out;
10375
10376         r = vcpu_run(vcpu);
10377
10378 out:
10379         kvm_put_guest_fpu(vcpu);
10380         if (kvm_run->kvm_valid_regs)
10381                 store_regs(vcpu);
10382         post_kvm_run_save(vcpu);
10383         kvm_sigset_deactivate(vcpu);
10384
10385         vcpu_put(vcpu);
10386         return r;
10387 }
10388
10389 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10390 {
10391         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
10392                 /*
10393                  * We are here if userspace calls get_regs() in the middle of
10394                  * instruction emulation. Registers state needs to be copied
10395                  * back from emulation context to vcpu. Userspace shouldn't do
10396                  * that usually, but some bad designed PV devices (vmware
10397                  * backdoor interface) need this to work
10398                  */
10399                 emulator_writeback_register_cache(vcpu->arch.emulate_ctxt);
10400                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
10401         }
10402         regs->rax = kvm_rax_read(vcpu);
10403         regs->rbx = kvm_rbx_read(vcpu);
10404         regs->rcx = kvm_rcx_read(vcpu);
10405         regs->rdx = kvm_rdx_read(vcpu);
10406         regs->rsi = kvm_rsi_read(vcpu);
10407         regs->rdi = kvm_rdi_read(vcpu);
10408         regs->rsp = kvm_rsp_read(vcpu);
10409         regs->rbp = kvm_rbp_read(vcpu);
10410 #ifdef CONFIG_X86_64
10411         regs->r8 = kvm_r8_read(vcpu);
10412         regs->r9 = kvm_r9_read(vcpu);
10413         regs->r10 = kvm_r10_read(vcpu);
10414         regs->r11 = kvm_r11_read(vcpu);
10415         regs->r12 = kvm_r12_read(vcpu);
10416         regs->r13 = kvm_r13_read(vcpu);
10417         regs->r14 = kvm_r14_read(vcpu);
10418         regs->r15 = kvm_r15_read(vcpu);
10419 #endif
10420
10421         regs->rip = kvm_rip_read(vcpu);
10422         regs->rflags = kvm_get_rflags(vcpu);
10423 }
10424
10425 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10426 {
10427         vcpu_load(vcpu);
10428         __get_regs(vcpu, regs);
10429         vcpu_put(vcpu);
10430         return 0;
10431 }
10432
10433 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10434 {
10435         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
10436         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
10437
10438         kvm_rax_write(vcpu, regs->rax);
10439         kvm_rbx_write(vcpu, regs->rbx);
10440         kvm_rcx_write(vcpu, regs->rcx);
10441         kvm_rdx_write(vcpu, regs->rdx);
10442         kvm_rsi_write(vcpu, regs->rsi);
10443         kvm_rdi_write(vcpu, regs->rdi);
10444         kvm_rsp_write(vcpu, regs->rsp);
10445         kvm_rbp_write(vcpu, regs->rbp);
10446 #ifdef CONFIG_X86_64
10447         kvm_r8_write(vcpu, regs->r8);
10448         kvm_r9_write(vcpu, regs->r9);
10449         kvm_r10_write(vcpu, regs->r10);
10450         kvm_r11_write(vcpu, regs->r11);
10451         kvm_r12_write(vcpu, regs->r12);
10452         kvm_r13_write(vcpu, regs->r13);
10453         kvm_r14_write(vcpu, regs->r14);
10454         kvm_r15_write(vcpu, regs->r15);
10455 #endif
10456
10457         kvm_rip_write(vcpu, regs->rip);
10458         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
10459
10460         vcpu->arch.exception.pending = false;
10461
10462         kvm_make_request(KVM_REQ_EVENT, vcpu);
10463 }
10464
10465 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10466 {
10467         vcpu_load(vcpu);
10468         __set_regs(vcpu, regs);
10469         vcpu_put(vcpu);
10470         return 0;
10471 }
10472
10473 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
10474 {
10475         struct kvm_segment cs;
10476
10477         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
10478         *db = cs.db;
10479         *l = cs.l;
10480 }
10481 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
10482
10483 static void __get_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10484 {
10485         struct desc_ptr dt;
10486
10487         if (vcpu->arch.guest_state_protected)
10488                 goto skip_protected_regs;
10489
10490         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10491         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10492         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10493         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10494         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10495         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10496
10497         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10498         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10499
10500         static_call(kvm_x86_get_idt)(vcpu, &dt);
10501         sregs->idt.limit = dt.size;
10502         sregs->idt.base = dt.address;
10503         static_call(kvm_x86_get_gdt)(vcpu, &dt);
10504         sregs->gdt.limit = dt.size;
10505         sregs->gdt.base = dt.address;
10506
10507         sregs->cr2 = vcpu->arch.cr2;
10508         sregs->cr3 = kvm_read_cr3(vcpu);
10509
10510 skip_protected_regs:
10511         sregs->cr0 = kvm_read_cr0(vcpu);
10512         sregs->cr4 = kvm_read_cr4(vcpu);
10513         sregs->cr8 = kvm_get_cr8(vcpu);
10514         sregs->efer = vcpu->arch.efer;
10515         sregs->apic_base = kvm_get_apic_base(vcpu);
10516 }
10517
10518 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10519 {
10520         __get_sregs_common(vcpu, sregs);
10521
10522         if (vcpu->arch.guest_state_protected)
10523                 return;
10524
10525         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
10526                 set_bit(vcpu->arch.interrupt.nr,
10527                         (unsigned long *)sregs->interrupt_bitmap);
10528 }
10529
10530 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
10531 {
10532         int i;
10533
10534         __get_sregs_common(vcpu, (struct kvm_sregs *)sregs2);
10535
10536         if (vcpu->arch.guest_state_protected)
10537                 return;
10538
10539         if (is_pae_paging(vcpu)) {
10540                 for (i = 0 ; i < 4 ; i++)
10541                         sregs2->pdptrs[i] = kvm_pdptr_read(vcpu, i);
10542                 sregs2->flags |= KVM_SREGS2_FLAGS_PDPTRS_VALID;
10543         }
10544 }
10545
10546 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
10547                                   struct kvm_sregs *sregs)
10548 {
10549         vcpu_load(vcpu);
10550         __get_sregs(vcpu, sregs);
10551         vcpu_put(vcpu);
10552         return 0;
10553 }
10554
10555 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
10556                                     struct kvm_mp_state *mp_state)
10557 {
10558         int r;
10559
10560         vcpu_load(vcpu);
10561         if (kvm_mpx_supported())
10562                 kvm_load_guest_fpu(vcpu);
10563
10564         r = kvm_apic_accept_events(vcpu);
10565         if (r < 0)
10566                 goto out;
10567         r = 0;
10568
10569         if ((vcpu->arch.mp_state == KVM_MP_STATE_HALTED ||
10570              vcpu->arch.mp_state == KVM_MP_STATE_AP_RESET_HOLD) &&
10571             vcpu->arch.pv.pv_unhalted)
10572                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
10573         else
10574                 mp_state->mp_state = vcpu->arch.mp_state;
10575
10576 out:
10577         if (kvm_mpx_supported())
10578                 kvm_put_guest_fpu(vcpu);
10579         vcpu_put(vcpu);
10580         return r;
10581 }
10582
10583 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
10584                                     struct kvm_mp_state *mp_state)
10585 {
10586         int ret = -EINVAL;
10587
10588         vcpu_load(vcpu);
10589
10590         if (!lapic_in_kernel(vcpu) &&
10591             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
10592                 goto out;
10593
10594         /*
10595          * KVM_MP_STATE_INIT_RECEIVED means the processor is in
10596          * INIT state; latched init should be reported using
10597          * KVM_SET_VCPU_EVENTS, so reject it here.
10598          */
10599         if ((kvm_vcpu_latch_init(vcpu) || vcpu->arch.smi_pending) &&
10600             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
10601              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
10602                 goto out;
10603
10604         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
10605                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
10606                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
10607         } else
10608                 vcpu->arch.mp_state = mp_state->mp_state;
10609         kvm_make_request(KVM_REQ_EVENT, vcpu);
10610
10611         ret = 0;
10612 out:
10613         vcpu_put(vcpu);
10614         return ret;
10615 }
10616
10617 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
10618                     int reason, bool has_error_code, u32 error_code)
10619 {
10620         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
10621         int ret;
10622
10623         init_emulate_ctxt(vcpu);
10624
10625         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
10626                                    has_error_code, error_code);
10627         if (ret) {
10628                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
10629                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
10630                 vcpu->run->internal.ndata = 0;
10631                 return 0;
10632         }
10633
10634         kvm_rip_write(vcpu, ctxt->eip);
10635         kvm_set_rflags(vcpu, ctxt->eflags);
10636         return 1;
10637 }
10638 EXPORT_SYMBOL_GPL(kvm_task_switch);
10639
10640 static bool kvm_is_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10641 {
10642         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
10643                 /*
10644                  * When EFER.LME and CR0.PG are set, the processor is in
10645                  * 64-bit mode (though maybe in a 32-bit code segment).
10646                  * CR4.PAE and EFER.LMA must be set.
10647                  */
10648                 if (!(sregs->cr4 & X86_CR4_PAE) || !(sregs->efer & EFER_LMA))
10649                         return false;
10650                 if (kvm_vcpu_is_illegal_gpa(vcpu, sregs->cr3))
10651                         return false;
10652         } else {
10653                 /*
10654                  * Not in 64-bit mode: EFER.LMA is clear and the code
10655                  * segment cannot be 64-bit.
10656                  */
10657                 if (sregs->efer & EFER_LMA || sregs->cs.l)
10658                         return false;
10659         }
10660
10661         return kvm_is_valid_cr4(vcpu, sregs->cr4);
10662 }
10663
10664 static int __set_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs,
10665                 int *mmu_reset_needed, bool update_pdptrs)
10666 {
10667         struct msr_data apic_base_msr;
10668         int idx;
10669         struct desc_ptr dt;
10670
10671         if (!kvm_is_valid_sregs(vcpu, sregs))
10672                 return -EINVAL;
10673
10674         apic_base_msr.data = sregs->apic_base;
10675         apic_base_msr.host_initiated = true;
10676         if (kvm_set_apic_base(vcpu, &apic_base_msr))
10677                 return -EINVAL;
10678
10679         if (vcpu->arch.guest_state_protected)
10680                 return 0;
10681
10682         dt.size = sregs->idt.limit;
10683         dt.address = sregs->idt.base;
10684         static_call(kvm_x86_set_idt)(vcpu, &dt);
10685         dt.size = sregs->gdt.limit;
10686         dt.address = sregs->gdt.base;
10687         static_call(kvm_x86_set_gdt)(vcpu, &dt);
10688
10689         vcpu->arch.cr2 = sregs->cr2;
10690         *mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
10691         vcpu->arch.cr3 = sregs->cr3;
10692         kvm_register_mark_dirty(vcpu, VCPU_EXREG_CR3);
10693         static_call_cond(kvm_x86_post_set_cr3)(vcpu, sregs->cr3);
10694
10695         kvm_set_cr8(vcpu, sregs->cr8);
10696
10697         *mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
10698         static_call(kvm_x86_set_efer)(vcpu, sregs->efer);
10699
10700         *mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
10701         static_call(kvm_x86_set_cr0)(vcpu, sregs->cr0);
10702         vcpu->arch.cr0 = sregs->cr0;
10703
10704         *mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
10705         static_call(kvm_x86_set_cr4)(vcpu, sregs->cr4);
10706
10707         if (update_pdptrs) {
10708                 idx = srcu_read_lock(&vcpu->kvm->srcu);
10709                 if (is_pae_paging(vcpu)) {
10710                         load_pdptrs(vcpu, kvm_read_cr3(vcpu));
10711                         *mmu_reset_needed = 1;
10712                 }
10713                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
10714         }
10715
10716         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10717         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10718         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10719         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10720         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10721         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10722
10723         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10724         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10725
10726         update_cr8_intercept(vcpu);
10727
10728         /* Older userspace won't unhalt the vcpu on reset. */
10729         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
10730             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
10731             !is_protmode(vcpu))
10732                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10733
10734         return 0;
10735 }
10736
10737 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10738 {
10739         int pending_vec, max_bits;
10740         int mmu_reset_needed = 0;
10741         int ret = __set_sregs_common(vcpu, sregs, &mmu_reset_needed, true);
10742
10743         if (ret)
10744                 return ret;
10745
10746         if (mmu_reset_needed)
10747                 kvm_mmu_reset_context(vcpu);
10748
10749         max_bits = KVM_NR_INTERRUPTS;
10750         pending_vec = find_first_bit(
10751                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
10752
10753         if (pending_vec < max_bits) {
10754                 kvm_queue_interrupt(vcpu, pending_vec, false);
10755                 pr_debug("Set back pending irq %d\n", pending_vec);
10756                 kvm_make_request(KVM_REQ_EVENT, vcpu);
10757         }
10758         return 0;
10759 }
10760
10761 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
10762 {
10763         int mmu_reset_needed = 0;
10764         bool valid_pdptrs = sregs2->flags & KVM_SREGS2_FLAGS_PDPTRS_VALID;
10765         bool pae = (sregs2->cr0 & X86_CR0_PG) && (sregs2->cr4 & X86_CR4_PAE) &&
10766                 !(sregs2->efer & EFER_LMA);
10767         int i, ret;
10768
10769         if (sregs2->flags & ~KVM_SREGS2_FLAGS_PDPTRS_VALID)
10770                 return -EINVAL;
10771
10772         if (valid_pdptrs && (!pae || vcpu->arch.guest_state_protected))
10773                 return -EINVAL;
10774
10775         ret = __set_sregs_common(vcpu, (struct kvm_sregs *)sregs2,
10776                                  &mmu_reset_needed, !valid_pdptrs);
10777         if (ret)
10778                 return ret;
10779
10780         if (valid_pdptrs) {
10781                 for (i = 0; i < 4 ; i++)
10782                         kvm_pdptr_write(vcpu, i, sregs2->pdptrs[i]);
10783
10784                 kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
10785                 mmu_reset_needed = 1;
10786                 vcpu->arch.pdptrs_from_userspace = true;
10787         }
10788         if (mmu_reset_needed)
10789                 kvm_mmu_reset_context(vcpu);
10790         return 0;
10791 }
10792
10793 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
10794                                   struct kvm_sregs *sregs)
10795 {
10796         int ret;
10797
10798         vcpu_load(vcpu);
10799         ret = __set_sregs(vcpu, sregs);
10800         vcpu_put(vcpu);
10801         return ret;
10802 }
10803
10804 static void kvm_arch_vcpu_guestdbg_update_apicv_inhibit(struct kvm *kvm)
10805 {
10806         bool inhibit = false;
10807         struct kvm_vcpu *vcpu;
10808         unsigned long i;
10809
10810         down_write(&kvm->arch.apicv_update_lock);
10811
10812         kvm_for_each_vcpu(i, vcpu, kvm) {
10813                 if (vcpu->guest_debug & KVM_GUESTDBG_BLOCKIRQ) {
10814                         inhibit = true;
10815                         break;
10816                 }
10817         }
10818         __kvm_request_apicv_update(kvm, !inhibit, APICV_INHIBIT_REASON_BLOCKIRQ);
10819         up_write(&kvm->arch.apicv_update_lock);
10820 }
10821
10822 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
10823                                         struct kvm_guest_debug *dbg)
10824 {
10825         unsigned long rflags;
10826         int i, r;
10827
10828         if (vcpu->arch.guest_state_protected)
10829                 return -EINVAL;
10830
10831         vcpu_load(vcpu);
10832
10833         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
10834                 r = -EBUSY;
10835                 if (vcpu->arch.exception.pending)
10836                         goto out;
10837                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
10838                         kvm_queue_exception(vcpu, DB_VECTOR);
10839                 else
10840                         kvm_queue_exception(vcpu, BP_VECTOR);
10841         }
10842
10843         /*
10844          * Read rflags as long as potentially injected trace flags are still
10845          * filtered out.
10846          */
10847         rflags = kvm_get_rflags(vcpu);
10848
10849         vcpu->guest_debug = dbg->control;
10850         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
10851                 vcpu->guest_debug = 0;
10852
10853         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
10854                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
10855                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
10856                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
10857         } else {
10858                 for (i = 0; i < KVM_NR_DB_REGS; i++)
10859                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
10860         }
10861         kvm_update_dr7(vcpu);
10862
10863         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
10864                 vcpu->arch.singlestep_rip = kvm_get_linear_rip(vcpu);
10865
10866         /*
10867          * Trigger an rflags update that will inject or remove the trace
10868          * flags.
10869          */
10870         kvm_set_rflags(vcpu, rflags);
10871
10872         static_call(kvm_x86_update_exception_bitmap)(vcpu);
10873
10874         kvm_arch_vcpu_guestdbg_update_apicv_inhibit(vcpu->kvm);
10875
10876         r = 0;
10877
10878 out:
10879         vcpu_put(vcpu);
10880         return r;
10881 }
10882
10883 /*
10884  * Translate a guest virtual address to a guest physical address.
10885  */
10886 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
10887                                     struct kvm_translation *tr)
10888 {
10889         unsigned long vaddr = tr->linear_address;
10890         gpa_t gpa;
10891         int idx;
10892
10893         vcpu_load(vcpu);
10894
10895         idx = srcu_read_lock(&vcpu->kvm->srcu);
10896         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
10897         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10898         tr->physical_address = gpa;
10899         tr->valid = gpa != UNMAPPED_GVA;
10900         tr->writeable = 1;
10901         tr->usermode = 0;
10902
10903         vcpu_put(vcpu);
10904         return 0;
10905 }
10906
10907 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10908 {
10909         struct fxregs_state *fxsave;
10910
10911         if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
10912                 return 0;
10913
10914         vcpu_load(vcpu);
10915
10916         fxsave = &vcpu->arch.guest_fpu.fpstate->regs.fxsave;
10917         memcpy(fpu->fpr, fxsave->st_space, 128);
10918         fpu->fcw = fxsave->cwd;
10919         fpu->fsw = fxsave->swd;
10920         fpu->ftwx = fxsave->twd;
10921         fpu->last_opcode = fxsave->fop;
10922         fpu->last_ip = fxsave->rip;
10923         fpu->last_dp = fxsave->rdp;
10924         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
10925
10926         vcpu_put(vcpu);
10927         return 0;
10928 }
10929
10930 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10931 {
10932         struct fxregs_state *fxsave;
10933
10934         if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
10935                 return 0;
10936
10937         vcpu_load(vcpu);
10938
10939         fxsave = &vcpu->arch.guest_fpu.fpstate->regs.fxsave;
10940
10941         memcpy(fxsave->st_space, fpu->fpr, 128);
10942         fxsave->cwd = fpu->fcw;
10943         fxsave->swd = fpu->fsw;
10944         fxsave->twd = fpu->ftwx;
10945         fxsave->fop = fpu->last_opcode;
10946         fxsave->rip = fpu->last_ip;
10947         fxsave->rdp = fpu->last_dp;
10948         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
10949
10950         vcpu_put(vcpu);
10951         return 0;
10952 }
10953
10954 static void store_regs(struct kvm_vcpu *vcpu)
10955 {
10956         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
10957
10958         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
10959                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
10960
10961         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
10962                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
10963
10964         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
10965                 kvm_vcpu_ioctl_x86_get_vcpu_events(
10966                                 vcpu, &vcpu->run->s.regs.events);
10967 }
10968
10969 static int sync_regs(struct kvm_vcpu *vcpu)
10970 {
10971         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
10972                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
10973                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
10974         }
10975         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
10976                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
10977                         return -EINVAL;
10978                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
10979         }
10980         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
10981                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
10982                                 vcpu, &vcpu->run->s.regs.events))
10983                         return -EINVAL;
10984                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
10985         }
10986
10987         return 0;
10988 }
10989
10990 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
10991 {
10992         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
10993                 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
10994                              "guest TSC will not be reliable\n");
10995
10996         return 0;
10997 }
10998
10999 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
11000 {
11001         struct page *page;
11002         int r;
11003
11004         vcpu->arch.last_vmentry_cpu = -1;
11005         vcpu->arch.regs_avail = ~0;
11006         vcpu->arch.regs_dirty = ~0;
11007
11008         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
11009                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
11010         else
11011                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
11012
11013         r = kvm_mmu_create(vcpu);
11014         if (r < 0)
11015                 return r;
11016
11017         if (irqchip_in_kernel(vcpu->kvm)) {
11018                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
11019                 if (r < 0)
11020                         goto fail_mmu_destroy;
11021                 if (kvm_apicv_activated(vcpu->kvm))
11022                         vcpu->arch.apicv_active = true;
11023         } else
11024                 static_branch_inc(&kvm_has_noapic_vcpu);
11025
11026         r = -ENOMEM;
11027
11028         page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO);
11029         if (!page)
11030                 goto fail_free_lapic;
11031         vcpu->arch.pio_data = page_address(page);
11032
11033         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
11034                                        GFP_KERNEL_ACCOUNT);
11035         if (!vcpu->arch.mce_banks)
11036                 goto fail_free_pio_data;
11037         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
11038
11039         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
11040                                 GFP_KERNEL_ACCOUNT))
11041                 goto fail_free_mce_banks;
11042
11043         if (!alloc_emulate_ctxt(vcpu))
11044                 goto free_wbinvd_dirty_mask;
11045
11046         if (!fpu_alloc_guest_fpstate(&vcpu->arch.guest_fpu)) {
11047                 pr_err("kvm: failed to allocate vcpu's fpu\n");
11048                 goto free_emulate_ctxt;
11049         }
11050
11051         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
11052         vcpu->arch.reserved_gpa_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu);
11053
11054         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
11055
11056         kvm_async_pf_hash_reset(vcpu);
11057         kvm_pmu_init(vcpu);
11058
11059         vcpu->arch.pending_external_vector = -1;
11060         vcpu->arch.preempted_in_kernel = false;
11061
11062 #if IS_ENABLED(CONFIG_HYPERV)
11063         vcpu->arch.hv_root_tdp = INVALID_PAGE;
11064 #endif
11065
11066         r = static_call(kvm_x86_vcpu_create)(vcpu);
11067         if (r)
11068                 goto free_guest_fpu;
11069
11070         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
11071         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
11072         kvm_vcpu_mtrr_init(vcpu);
11073         vcpu_load(vcpu);
11074         kvm_set_tsc_khz(vcpu, max_tsc_khz);
11075         kvm_vcpu_reset(vcpu, false);
11076         kvm_init_mmu(vcpu);
11077         vcpu_put(vcpu);
11078         return 0;
11079
11080 free_guest_fpu:
11081         fpu_free_guest_fpstate(&vcpu->arch.guest_fpu);
11082 free_emulate_ctxt:
11083         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
11084 free_wbinvd_dirty_mask:
11085         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
11086 fail_free_mce_banks:
11087         kfree(vcpu->arch.mce_banks);
11088 fail_free_pio_data:
11089         free_page((unsigned long)vcpu->arch.pio_data);
11090 fail_free_lapic:
11091         kvm_free_lapic(vcpu);
11092 fail_mmu_destroy:
11093         kvm_mmu_destroy(vcpu);
11094         return r;
11095 }
11096
11097 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
11098 {
11099         struct kvm *kvm = vcpu->kvm;
11100
11101         if (mutex_lock_killable(&vcpu->mutex))
11102                 return;
11103         vcpu_load(vcpu);
11104         kvm_synchronize_tsc(vcpu, 0);
11105         vcpu_put(vcpu);
11106
11107         /* poll control enabled by default */
11108         vcpu->arch.msr_kvm_poll_control = 1;
11109
11110         mutex_unlock(&vcpu->mutex);
11111
11112         if (kvmclock_periodic_sync && vcpu->vcpu_idx == 0)
11113                 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
11114                                                 KVMCLOCK_SYNC_PERIOD);
11115 }
11116
11117 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
11118 {
11119         int idx;
11120
11121         kvmclock_reset(vcpu);
11122
11123         static_call(kvm_x86_vcpu_free)(vcpu);
11124
11125         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
11126         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
11127         fpu_free_guest_fpstate(&vcpu->arch.guest_fpu);
11128
11129         kvm_hv_vcpu_uninit(vcpu);
11130         kvm_pmu_destroy(vcpu);
11131         kfree(vcpu->arch.mce_banks);
11132         kvm_free_lapic(vcpu);
11133         idx = srcu_read_lock(&vcpu->kvm->srcu);
11134         kvm_mmu_destroy(vcpu);
11135         srcu_read_unlock(&vcpu->kvm->srcu, idx);
11136         free_page((unsigned long)vcpu->arch.pio_data);
11137         kvfree(vcpu->arch.cpuid_entries);
11138         if (!lapic_in_kernel(vcpu))
11139                 static_branch_dec(&kvm_has_noapic_vcpu);
11140 }
11141
11142 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
11143 {
11144         struct kvm_cpuid_entry2 *cpuid_0x1;
11145         unsigned long old_cr0 = kvm_read_cr0(vcpu);
11146         unsigned long new_cr0;
11147
11148         /*
11149          * Several of the "set" flows, e.g. ->set_cr0(), read other registers
11150          * to handle side effects.  RESET emulation hits those flows and relies
11151          * on emulated/virtualized registers, including those that are loaded
11152          * into hardware, to be zeroed at vCPU creation.  Use CRs as a sentinel
11153          * to detect improper or missing initialization.
11154          */
11155         WARN_ON_ONCE(!init_event &&
11156                      (old_cr0 || kvm_read_cr3(vcpu) || kvm_read_cr4(vcpu)));
11157
11158         kvm_lapic_reset(vcpu, init_event);
11159
11160         vcpu->arch.hflags = 0;
11161
11162         vcpu->arch.smi_pending = 0;
11163         vcpu->arch.smi_count = 0;
11164         atomic_set(&vcpu->arch.nmi_queued, 0);
11165         vcpu->arch.nmi_pending = 0;
11166         vcpu->arch.nmi_injected = false;
11167         kvm_clear_interrupt_queue(vcpu);
11168         kvm_clear_exception_queue(vcpu);
11169
11170         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
11171         kvm_update_dr0123(vcpu);
11172         vcpu->arch.dr6 = DR6_ACTIVE_LOW;
11173         vcpu->arch.dr7 = DR7_FIXED_1;
11174         kvm_update_dr7(vcpu);
11175
11176         vcpu->arch.cr2 = 0;
11177
11178         kvm_make_request(KVM_REQ_EVENT, vcpu);
11179         vcpu->arch.apf.msr_en_val = 0;
11180         vcpu->arch.apf.msr_int_val = 0;
11181         vcpu->arch.st.msr_val = 0;
11182
11183         kvmclock_reset(vcpu);
11184
11185         kvm_clear_async_pf_completion_queue(vcpu);
11186         kvm_async_pf_hash_reset(vcpu);
11187         vcpu->arch.apf.halted = false;
11188
11189         if (vcpu->arch.guest_fpu.fpstate && kvm_mpx_supported()) {
11190                 struct fpstate *fpstate = vcpu->arch.guest_fpu.fpstate;
11191
11192                 /*
11193                  * To avoid have the INIT path from kvm_apic_has_events() that be
11194                  * called with loaded FPU and does not let userspace fix the state.
11195                  */
11196                 if (init_event)
11197                         kvm_put_guest_fpu(vcpu);
11198
11199                 fpstate_clear_xstate_component(fpstate, XFEATURE_BNDREGS);
11200                 fpstate_clear_xstate_component(fpstate, XFEATURE_BNDCSR);
11201
11202                 if (init_event)
11203                         kvm_load_guest_fpu(vcpu);
11204         }
11205
11206         if (!init_event) {
11207                 kvm_pmu_reset(vcpu);
11208                 vcpu->arch.smbase = 0x30000;
11209
11210                 vcpu->arch.msr_misc_features_enables = 0;
11211
11212                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
11213         }
11214
11215         /* All GPRs except RDX (handled below) are zeroed on RESET/INIT. */
11216         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
11217         kvm_register_mark_dirty(vcpu, VCPU_REGS_RSP);
11218
11219         /*
11220          * Fall back to KVM's default Family/Model/Stepping of 0x600 (P6/Athlon)
11221          * if no CPUID match is found.  Note, it's impossible to get a match at
11222          * RESET since KVM emulates RESET before exposing the vCPU to userspace,
11223          * i.e. it's impossible for kvm_find_cpuid_entry() to find a valid entry
11224          * on RESET.  But, go through the motions in case that's ever remedied.
11225          */
11226         cpuid_0x1 = kvm_find_cpuid_entry(vcpu, 1, 0);
11227         kvm_rdx_write(vcpu, cpuid_0x1 ? cpuid_0x1->eax : 0x600);
11228
11229         vcpu->arch.ia32_xss = 0;
11230
11231         static_call(kvm_x86_vcpu_reset)(vcpu, init_event);
11232
11233         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
11234         kvm_rip_write(vcpu, 0xfff0);
11235
11236         vcpu->arch.cr3 = 0;
11237         kvm_register_mark_dirty(vcpu, VCPU_EXREG_CR3);
11238
11239         /*
11240          * CR0.CD/NW are set on RESET, preserved on INIT.  Note, some versions
11241          * of Intel's SDM list CD/NW as being set on INIT, but they contradict
11242          * (or qualify) that with a footnote stating that CD/NW are preserved.
11243          */
11244         new_cr0 = X86_CR0_ET;
11245         if (init_event)
11246                 new_cr0 |= (old_cr0 & (X86_CR0_NW | X86_CR0_CD));
11247         else
11248                 new_cr0 |= X86_CR0_NW | X86_CR0_CD;
11249
11250         static_call(kvm_x86_set_cr0)(vcpu, new_cr0);
11251         static_call(kvm_x86_set_cr4)(vcpu, 0);
11252         static_call(kvm_x86_set_efer)(vcpu, 0);
11253         static_call(kvm_x86_update_exception_bitmap)(vcpu);
11254
11255         /*
11256          * Reset the MMU context if paging was enabled prior to INIT (which is
11257          * implied if CR0.PG=1 as CR0 will be '0' prior to RESET).  Unlike the
11258          * standard CR0/CR4/EFER modification paths, only CR0.PG needs to be
11259          * checked because it is unconditionally cleared on INIT and all other
11260          * paging related bits are ignored if paging is disabled, i.e. CR0.WP,
11261          * CR4, and EFER changes are all irrelevant if CR0.PG was '0'.
11262          */
11263         if (old_cr0 & X86_CR0_PG)
11264                 kvm_mmu_reset_context(vcpu);
11265
11266         /*
11267          * Intel's SDM states that all TLB entries are flushed on INIT.  AMD's
11268          * APM states the TLBs are untouched by INIT, but it also states that
11269          * the TLBs are flushed on "External initialization of the processor."
11270          * Flush the guest TLB regardless of vendor, there is no meaningful
11271          * benefit in relying on the guest to flush the TLB immediately after
11272          * INIT.  A spurious TLB flush is benign and likely negligible from a
11273          * performance perspective.
11274          */
11275         if (init_event)
11276                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
11277 }
11278 EXPORT_SYMBOL_GPL(kvm_vcpu_reset);
11279
11280 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
11281 {
11282         struct kvm_segment cs;
11283
11284         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
11285         cs.selector = vector << 8;
11286         cs.base = vector << 12;
11287         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
11288         kvm_rip_write(vcpu, 0);
11289 }
11290 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector);
11291
11292 int kvm_arch_hardware_enable(void)
11293 {
11294         struct kvm *kvm;
11295         struct kvm_vcpu *vcpu;
11296         unsigned long i;
11297         int ret;
11298         u64 local_tsc;
11299         u64 max_tsc = 0;
11300         bool stable, backwards_tsc = false;
11301
11302         kvm_user_return_msr_cpu_online();
11303         ret = static_call(kvm_x86_hardware_enable)();
11304         if (ret != 0)
11305                 return ret;
11306
11307         local_tsc = rdtsc();
11308         stable = !kvm_check_tsc_unstable();
11309         list_for_each_entry(kvm, &vm_list, vm_list) {
11310                 kvm_for_each_vcpu(i, vcpu, kvm) {
11311                         if (!stable && vcpu->cpu == smp_processor_id())
11312                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
11313                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
11314                                 backwards_tsc = true;
11315                                 if (vcpu->arch.last_host_tsc > max_tsc)
11316                                         max_tsc = vcpu->arch.last_host_tsc;
11317                         }
11318                 }
11319         }
11320
11321         /*
11322          * Sometimes, even reliable TSCs go backwards.  This happens on
11323          * platforms that reset TSC during suspend or hibernate actions, but
11324          * maintain synchronization.  We must compensate.  Fortunately, we can
11325          * detect that condition here, which happens early in CPU bringup,
11326          * before any KVM threads can be running.  Unfortunately, we can't
11327          * bring the TSCs fully up to date with real time, as we aren't yet far
11328          * enough into CPU bringup that we know how much real time has actually
11329          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
11330          * variables that haven't been updated yet.
11331          *
11332          * So we simply find the maximum observed TSC above, then record the
11333          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
11334          * the adjustment will be applied.  Note that we accumulate
11335          * adjustments, in case multiple suspend cycles happen before some VCPU
11336          * gets a chance to run again.  In the event that no KVM threads get a
11337          * chance to run, we will miss the entire elapsed period, as we'll have
11338          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
11339          * loose cycle time.  This isn't too big a deal, since the loss will be
11340          * uniform across all VCPUs (not to mention the scenario is extremely
11341          * unlikely). It is possible that a second hibernate recovery happens
11342          * much faster than a first, causing the observed TSC here to be
11343          * smaller; this would require additional padding adjustment, which is
11344          * why we set last_host_tsc to the local tsc observed here.
11345          *
11346          * N.B. - this code below runs only on platforms with reliable TSC,
11347          * as that is the only way backwards_tsc is set above.  Also note
11348          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
11349          * have the same delta_cyc adjustment applied if backwards_tsc
11350          * is detected.  Note further, this adjustment is only done once,
11351          * as we reset last_host_tsc on all VCPUs to stop this from being
11352          * called multiple times (one for each physical CPU bringup).
11353          *
11354          * Platforms with unreliable TSCs don't have to deal with this, they
11355          * will be compensated by the logic in vcpu_load, which sets the TSC to
11356          * catchup mode.  This will catchup all VCPUs to real time, but cannot
11357          * guarantee that they stay in perfect synchronization.
11358          */
11359         if (backwards_tsc) {
11360                 u64 delta_cyc = max_tsc - local_tsc;
11361                 list_for_each_entry(kvm, &vm_list, vm_list) {
11362                         kvm->arch.backwards_tsc_observed = true;
11363                         kvm_for_each_vcpu(i, vcpu, kvm) {
11364                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
11365                                 vcpu->arch.last_host_tsc = local_tsc;
11366                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
11367                         }
11368
11369                         /*
11370                          * We have to disable TSC offset matching.. if you were
11371                          * booting a VM while issuing an S4 host suspend....
11372                          * you may have some problem.  Solving this issue is
11373                          * left as an exercise to the reader.
11374                          */
11375                         kvm->arch.last_tsc_nsec = 0;
11376                         kvm->arch.last_tsc_write = 0;
11377                 }
11378
11379         }
11380         return 0;
11381 }
11382
11383 void kvm_arch_hardware_disable(void)
11384 {
11385         static_call(kvm_x86_hardware_disable)();
11386         drop_user_return_notifiers();
11387 }
11388
11389 int kvm_arch_hardware_setup(void *opaque)
11390 {
11391         struct kvm_x86_init_ops *ops = opaque;
11392         int r;
11393
11394         rdmsrl_safe(MSR_EFER, &host_efer);
11395
11396         if (boot_cpu_has(X86_FEATURE_XSAVES))
11397                 rdmsrl(MSR_IA32_XSS, host_xss);
11398
11399         r = ops->hardware_setup();
11400         if (r != 0)
11401                 return r;
11402
11403         memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops));
11404         kvm_ops_static_call_update();
11405
11406         kvm_register_perf_callbacks(ops->handle_intel_pt_intr);
11407
11408         if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
11409                 supported_xss = 0;
11410
11411 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
11412         cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
11413 #undef __kvm_cpu_cap_has
11414
11415         if (kvm_has_tsc_control) {
11416                 /*
11417                  * Make sure the user can only configure tsc_khz values that
11418                  * fit into a signed integer.
11419                  * A min value is not calculated because it will always
11420                  * be 1 on all machines.
11421                  */
11422                 u64 max = min(0x7fffffffULL,
11423                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
11424                 kvm_max_guest_tsc_khz = max;
11425
11426                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
11427         }
11428
11429         kvm_init_msr_list();
11430         return 0;
11431 }
11432
11433 void kvm_arch_hardware_unsetup(void)
11434 {
11435         kvm_unregister_perf_callbacks();
11436
11437         static_call(kvm_x86_hardware_unsetup)();
11438 }
11439
11440 int kvm_arch_check_processor_compat(void *opaque)
11441 {
11442         struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
11443         struct kvm_x86_init_ops *ops = opaque;
11444
11445         WARN_ON(!irqs_disabled());
11446
11447         if (__cr4_reserved_bits(cpu_has, c) !=
11448             __cr4_reserved_bits(cpu_has, &boot_cpu_data))
11449                 return -EIO;
11450
11451         return ops->check_processor_compatibility();
11452 }
11453
11454 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
11455 {
11456         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
11457 }
11458 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
11459
11460 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
11461 {
11462         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
11463 }
11464
11465 __read_mostly DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu);
11466 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu);
11467
11468 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
11469 {
11470         struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
11471
11472         vcpu->arch.l1tf_flush_l1d = true;
11473         if (pmu->version && unlikely(pmu->event_count)) {
11474                 pmu->need_cleanup = true;
11475                 kvm_make_request(KVM_REQ_PMU, vcpu);
11476         }
11477         static_call(kvm_x86_sched_in)(vcpu, cpu);
11478 }
11479
11480 void kvm_arch_free_vm(struct kvm *kvm)
11481 {
11482         kfree(to_kvm_hv(kvm)->hv_pa_pg);
11483         __kvm_arch_free_vm(kvm);
11484 }
11485
11486
11487 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
11488 {
11489         int ret;
11490         unsigned long flags;
11491
11492         if (type)
11493                 return -EINVAL;
11494
11495         ret = kvm_page_track_init(kvm);
11496         if (ret)
11497                 return ret;
11498
11499         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
11500         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
11501         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
11502         INIT_LIST_HEAD(&kvm->arch.lpage_disallowed_mmu_pages);
11503         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
11504         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
11505
11506         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
11507         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
11508         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
11509         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
11510                 &kvm->arch.irq_sources_bitmap);
11511
11512         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
11513         mutex_init(&kvm->arch.apic_map_lock);
11514         seqcount_raw_spinlock_init(&kvm->arch.pvclock_sc, &kvm->arch.tsc_write_lock);
11515         kvm->arch.kvmclock_offset = -get_kvmclock_base_ns();
11516
11517         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
11518         pvclock_update_vm_gtod_copy(kvm);
11519         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
11520
11521         kvm->arch.guest_can_read_msr_platform_info = true;
11522
11523 #if IS_ENABLED(CONFIG_HYPERV)
11524         spin_lock_init(&kvm->arch.hv_root_tdp_lock);
11525         kvm->arch.hv_root_tdp = INVALID_PAGE;
11526 #endif
11527
11528         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
11529         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
11530
11531         kvm_apicv_init(kvm);
11532         kvm_hv_init_vm(kvm);
11533         kvm_mmu_init_vm(kvm);
11534         kvm_xen_init_vm(kvm);
11535
11536         return static_call(kvm_x86_vm_init)(kvm);
11537 }
11538
11539 int kvm_arch_post_init_vm(struct kvm *kvm)
11540 {
11541         return kvm_mmu_post_init_vm(kvm);
11542 }
11543
11544 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
11545 {
11546         vcpu_load(vcpu);
11547         kvm_mmu_unload(vcpu);
11548         vcpu_put(vcpu);
11549 }
11550
11551 static void kvm_free_vcpus(struct kvm *kvm)
11552 {
11553         unsigned long i;
11554         struct kvm_vcpu *vcpu;
11555
11556         /*
11557          * Unpin any mmu pages first.
11558          */
11559         kvm_for_each_vcpu(i, vcpu, kvm) {
11560                 kvm_clear_async_pf_completion_queue(vcpu);
11561                 kvm_unload_vcpu_mmu(vcpu);
11562         }
11563
11564         kvm_destroy_vcpus(kvm);
11565 }
11566
11567 void kvm_arch_sync_events(struct kvm *kvm)
11568 {
11569         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
11570         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
11571         kvm_free_pit(kvm);
11572 }
11573
11574 #define  ERR_PTR_USR(e)  ((void __user *)ERR_PTR(e))
11575
11576 /**
11577  * __x86_set_memory_region: Setup KVM internal memory slot
11578  *
11579  * @kvm: the kvm pointer to the VM.
11580  * @id: the slot ID to setup.
11581  * @gpa: the GPA to install the slot (unused when @size == 0).
11582  * @size: the size of the slot. Set to zero to uninstall a slot.
11583  *
11584  * This function helps to setup a KVM internal memory slot.  Specify
11585  * @size > 0 to install a new slot, while @size == 0 to uninstall a
11586  * slot.  The return code can be one of the following:
11587  *
11588  *   HVA:           on success (uninstall will return a bogus HVA)
11589  *   -errno:        on error
11590  *
11591  * The caller should always use IS_ERR() to check the return value
11592  * before use.  Note, the KVM internal memory slots are guaranteed to
11593  * remain valid and unchanged until the VM is destroyed, i.e., the
11594  * GPA->HVA translation will not change.  However, the HVA is a user
11595  * address, i.e. its accessibility is not guaranteed, and must be
11596  * accessed via __copy_{to,from}_user().
11597  */
11598 void __user * __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
11599                                       u32 size)
11600 {
11601         int i, r;
11602         unsigned long hva, old_npages;
11603         struct kvm_memslots *slots = kvm_memslots(kvm);
11604         struct kvm_memory_slot *slot;
11605
11606         /* Called with kvm->slots_lock held.  */
11607         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
11608                 return ERR_PTR_USR(-EINVAL);
11609
11610         slot = id_to_memslot(slots, id);
11611         if (size) {
11612                 if (slot && slot->npages)
11613                         return ERR_PTR_USR(-EEXIST);
11614
11615                 /*
11616                  * MAP_SHARED to prevent internal slot pages from being moved
11617                  * by fork()/COW.
11618                  */
11619                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
11620                               MAP_SHARED | MAP_ANONYMOUS, 0);
11621                 if (IS_ERR((void *)hva))
11622                         return (void __user *)hva;
11623         } else {
11624                 if (!slot || !slot->npages)
11625                         return NULL;
11626
11627                 old_npages = slot->npages;
11628                 hva = slot->userspace_addr;
11629         }
11630
11631         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
11632                 struct kvm_userspace_memory_region m;
11633
11634                 m.slot = id | (i << 16);
11635                 m.flags = 0;
11636                 m.guest_phys_addr = gpa;
11637                 m.userspace_addr = hva;
11638                 m.memory_size = size;
11639                 r = __kvm_set_memory_region(kvm, &m);
11640                 if (r < 0)
11641                         return ERR_PTR_USR(r);
11642         }
11643
11644         if (!size)
11645                 vm_munmap(hva, old_npages * PAGE_SIZE);
11646
11647         return (void __user *)hva;
11648 }
11649 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
11650
11651 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
11652 {
11653         kvm_mmu_pre_destroy_vm(kvm);
11654 }
11655
11656 void kvm_arch_destroy_vm(struct kvm *kvm)
11657 {
11658         if (current->mm == kvm->mm) {
11659                 /*
11660                  * Free memory regions allocated on behalf of userspace,
11661                  * unless the the memory map has changed due to process exit
11662                  * or fd copying.
11663                  */
11664                 mutex_lock(&kvm->slots_lock);
11665                 __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
11666                                         0, 0);
11667                 __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
11668                                         0, 0);
11669                 __x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
11670                 mutex_unlock(&kvm->slots_lock);
11671         }
11672         static_call_cond(kvm_x86_vm_destroy)(kvm);
11673         kvm_free_msr_filter(srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1));
11674         kvm_pic_destroy(kvm);
11675         kvm_ioapic_destroy(kvm);
11676         kvm_free_vcpus(kvm);
11677         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
11678         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
11679         kvm_mmu_uninit_vm(kvm);
11680         kvm_page_track_cleanup(kvm);
11681         kvm_xen_destroy_vm(kvm);
11682         kvm_hv_destroy_vm(kvm);
11683 }
11684
11685 static void memslot_rmap_free(struct kvm_memory_slot *slot)
11686 {
11687         int i;
11688
11689         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11690                 kvfree(slot->arch.rmap[i]);
11691                 slot->arch.rmap[i] = NULL;
11692         }
11693 }
11694
11695 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
11696 {
11697         int i;
11698
11699         memslot_rmap_free(slot);
11700
11701         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11702                 kvfree(slot->arch.lpage_info[i - 1]);
11703                 slot->arch.lpage_info[i - 1] = NULL;
11704         }
11705
11706         kvm_page_track_free_memslot(slot);
11707 }
11708
11709 int memslot_rmap_alloc(struct kvm_memory_slot *slot, unsigned long npages)
11710 {
11711         const int sz = sizeof(*slot->arch.rmap[0]);
11712         int i;
11713
11714         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11715                 int level = i + 1;
11716                 int lpages = __kvm_mmu_slot_lpages(slot, npages, level);
11717
11718                 if (slot->arch.rmap[i])
11719                         continue;
11720
11721                 slot->arch.rmap[i] = kvcalloc(lpages, sz, GFP_KERNEL_ACCOUNT);
11722                 if (!slot->arch.rmap[i]) {
11723                         memslot_rmap_free(slot);
11724                         return -ENOMEM;
11725                 }
11726         }
11727
11728         return 0;
11729 }
11730
11731 static int kvm_alloc_memslot_metadata(struct kvm *kvm,
11732                                       struct kvm_memory_slot *slot)
11733 {
11734         unsigned long npages = slot->npages;
11735         int i, r;
11736
11737         /*
11738          * Clear out the previous array pointers for the KVM_MR_MOVE case.  The
11739          * old arrays will be freed by __kvm_set_memory_region() if installing
11740          * the new memslot is successful.
11741          */
11742         memset(&slot->arch, 0, sizeof(slot->arch));
11743
11744         if (kvm_memslots_have_rmaps(kvm)) {
11745                 r = memslot_rmap_alloc(slot, npages);
11746                 if (r)
11747                         return r;
11748         }
11749
11750         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11751                 struct kvm_lpage_info *linfo;
11752                 unsigned long ugfn;
11753                 int lpages;
11754                 int level = i + 1;
11755
11756                 lpages = __kvm_mmu_slot_lpages(slot, npages, level);
11757
11758                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
11759                 if (!linfo)
11760                         goto out_free;
11761
11762                 slot->arch.lpage_info[i - 1] = linfo;
11763
11764                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
11765                         linfo[0].disallow_lpage = 1;
11766                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
11767                         linfo[lpages - 1].disallow_lpage = 1;
11768                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
11769                 /*
11770                  * If the gfn and userspace address are not aligned wrt each
11771                  * other, disable large page support for this slot.
11772                  */
11773                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1)) {
11774                         unsigned long j;
11775
11776                         for (j = 0; j < lpages; ++j)
11777                                 linfo[j].disallow_lpage = 1;
11778                 }
11779         }
11780
11781         if (kvm_page_track_create_memslot(kvm, slot, npages))
11782                 goto out_free;
11783
11784         return 0;
11785
11786 out_free:
11787         memslot_rmap_free(slot);
11788
11789         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11790                 kvfree(slot->arch.lpage_info[i - 1]);
11791                 slot->arch.lpage_info[i - 1] = NULL;
11792         }
11793         return -ENOMEM;
11794 }
11795
11796 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
11797 {
11798         struct kvm_vcpu *vcpu;
11799         unsigned long i;
11800
11801         /*
11802          * memslots->generation has been incremented.
11803          * mmio generation may have reached its maximum value.
11804          */
11805         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
11806
11807         /* Force re-initialization of steal_time cache */
11808         kvm_for_each_vcpu(i, vcpu, kvm)
11809                 kvm_vcpu_kick(vcpu);
11810 }
11811
11812 int kvm_arch_prepare_memory_region(struct kvm *kvm,
11813                                    const struct kvm_memory_slot *old,
11814                                    struct kvm_memory_slot *new,
11815                                    enum kvm_mr_change change)
11816 {
11817         if (change == KVM_MR_CREATE || change == KVM_MR_MOVE)
11818                 return kvm_alloc_memslot_metadata(kvm, new);
11819
11820         if (change == KVM_MR_FLAGS_ONLY)
11821                 memcpy(&new->arch, &old->arch, sizeof(old->arch));
11822         else if (WARN_ON_ONCE(change != KVM_MR_DELETE))
11823                 return -EIO;
11824
11825         return 0;
11826 }
11827
11828
11829 static void kvm_mmu_update_cpu_dirty_logging(struct kvm *kvm, bool enable)
11830 {
11831         struct kvm_arch *ka = &kvm->arch;
11832
11833         if (!kvm_x86_ops.cpu_dirty_log_size)
11834                 return;
11835
11836         if ((enable && ++ka->cpu_dirty_logging_count == 1) ||
11837             (!enable && --ka->cpu_dirty_logging_count == 0))
11838                 kvm_make_all_cpus_request(kvm, KVM_REQ_UPDATE_CPU_DIRTY_LOGGING);
11839
11840         WARN_ON_ONCE(ka->cpu_dirty_logging_count < 0);
11841 }
11842
11843 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
11844                                      struct kvm_memory_slot *old,
11845                                      const struct kvm_memory_slot *new,
11846                                      enum kvm_mr_change change)
11847 {
11848         u32 old_flags = old ? old->flags : 0;
11849         u32 new_flags = new ? new->flags : 0;
11850         bool log_dirty_pages = new_flags & KVM_MEM_LOG_DIRTY_PAGES;
11851
11852         /*
11853          * Update CPU dirty logging if dirty logging is being toggled.  This
11854          * applies to all operations.
11855          */
11856         if ((old_flags ^ new_flags) & KVM_MEM_LOG_DIRTY_PAGES)
11857                 kvm_mmu_update_cpu_dirty_logging(kvm, log_dirty_pages);
11858
11859         /*
11860          * Nothing more to do for RO slots (which can't be dirtied and can't be
11861          * made writable) or CREATE/MOVE/DELETE of a slot.
11862          *
11863          * For a memslot with dirty logging disabled:
11864          * CREATE:      No dirty mappings will already exist.
11865          * MOVE/DELETE: The old mappings will already have been cleaned up by
11866          *              kvm_arch_flush_shadow_memslot()
11867          *
11868          * For a memslot with dirty logging enabled:
11869          * CREATE:      No shadow pages exist, thus nothing to write-protect
11870          *              and no dirty bits to clear.
11871          * MOVE/DELETE: The old mappings will already have been cleaned up by
11872          *              kvm_arch_flush_shadow_memslot().
11873          */
11874         if ((change != KVM_MR_FLAGS_ONLY) || (new_flags & KVM_MEM_READONLY))
11875                 return;
11876
11877         /*
11878          * READONLY and non-flags changes were filtered out above, and the only
11879          * other flag is LOG_DIRTY_PAGES, i.e. something is wrong if dirty
11880          * logging isn't being toggled on or off.
11881          */
11882         if (WARN_ON_ONCE(!((old_flags ^ new_flags) & KVM_MEM_LOG_DIRTY_PAGES)))
11883                 return;
11884
11885         if (!log_dirty_pages) {
11886                 /*
11887                  * Dirty logging tracks sptes in 4k granularity, meaning that
11888                  * large sptes have to be split.  If live migration succeeds,
11889                  * the guest in the source machine will be destroyed and large
11890                  * sptes will be created in the destination.  However, if the
11891                  * guest continues to run in the source machine (for example if
11892                  * live migration fails), small sptes will remain around and
11893                  * cause bad performance.
11894                  *
11895                  * Scan sptes if dirty logging has been stopped, dropping those
11896                  * which can be collapsed into a single large-page spte.  Later
11897                  * page faults will create the large-page sptes.
11898                  */
11899                 kvm_mmu_zap_collapsible_sptes(kvm, new);
11900         } else {
11901                 /*
11902                  * Initially-all-set does not require write protecting any page,
11903                  * because they're all assumed to be dirty.
11904                  */
11905                 if (kvm_dirty_log_manual_protect_and_init_set(kvm))
11906                         return;
11907
11908                 if (kvm_x86_ops.cpu_dirty_log_size) {
11909                         kvm_mmu_slot_leaf_clear_dirty(kvm, new);
11910                         kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_2M);
11911                 } else {
11912                         kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_4K);
11913                 }
11914         }
11915 }
11916
11917 void kvm_arch_commit_memory_region(struct kvm *kvm,
11918                                 struct kvm_memory_slot *old,
11919                                 const struct kvm_memory_slot *new,
11920                                 enum kvm_mr_change change)
11921 {
11922         if (!kvm->arch.n_requested_mmu_pages &&
11923             (change == KVM_MR_CREATE || change == KVM_MR_DELETE)) {
11924                 unsigned long nr_mmu_pages;
11925
11926                 nr_mmu_pages = kvm->nr_memslot_pages / KVM_MEMSLOT_PAGES_TO_MMU_PAGES_RATIO;
11927                 nr_mmu_pages = max(nr_mmu_pages, KVM_MIN_ALLOC_MMU_PAGES);
11928                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
11929         }
11930
11931         kvm_mmu_slot_apply_flags(kvm, old, new, change);
11932
11933         /* Free the arrays associated with the old memslot. */
11934         if (change == KVM_MR_MOVE)
11935                 kvm_arch_free_memslot(kvm, old);
11936 }
11937
11938 void kvm_arch_flush_shadow_all(struct kvm *kvm)
11939 {
11940         kvm_mmu_zap_all(kvm);
11941 }
11942
11943 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
11944                                    struct kvm_memory_slot *slot)
11945 {
11946         kvm_page_track_flush_slot(kvm, slot);
11947 }
11948
11949 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
11950 {
11951         return (is_guest_mode(vcpu) &&
11952                         kvm_x86_ops.guest_apic_has_interrupt &&
11953                         static_call(kvm_x86_guest_apic_has_interrupt)(vcpu));
11954 }
11955
11956 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
11957 {
11958         if (!list_empty_careful(&vcpu->async_pf.done))
11959                 return true;
11960
11961         if (kvm_apic_has_events(vcpu))
11962                 return true;
11963
11964         if (vcpu->arch.pv.pv_unhalted)
11965                 return true;
11966
11967         if (vcpu->arch.exception.pending)
11968                 return true;
11969
11970         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
11971             (vcpu->arch.nmi_pending &&
11972              static_call(kvm_x86_nmi_allowed)(vcpu, false)))
11973                 return true;
11974
11975         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
11976             (vcpu->arch.smi_pending &&
11977              static_call(kvm_x86_smi_allowed)(vcpu, false)))
11978                 return true;
11979
11980         if (kvm_arch_interrupt_allowed(vcpu) &&
11981             (kvm_cpu_has_interrupt(vcpu) ||
11982             kvm_guest_apic_has_interrupt(vcpu)))
11983                 return true;
11984
11985         if (kvm_hv_has_stimer_pending(vcpu))
11986                 return true;
11987
11988         if (is_guest_mode(vcpu) &&
11989             kvm_x86_ops.nested_ops->hv_timer_pending &&
11990             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
11991                 return true;
11992
11993         return false;
11994 }
11995
11996 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
11997 {
11998         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
11999 }
12000
12001 bool kvm_arch_dy_has_pending_interrupt(struct kvm_vcpu *vcpu)
12002 {
12003         if (vcpu->arch.apicv_active && static_call(kvm_x86_dy_apicv_has_pending_interrupt)(vcpu))
12004                 return true;
12005
12006         return false;
12007 }
12008
12009 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
12010 {
12011         if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
12012                 return true;
12013
12014         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
12015                 kvm_test_request(KVM_REQ_SMI, vcpu) ||
12016                  kvm_test_request(KVM_REQ_EVENT, vcpu))
12017                 return true;
12018
12019         return kvm_arch_dy_has_pending_interrupt(vcpu);
12020 }
12021
12022 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
12023 {
12024         if (vcpu->arch.guest_state_protected)
12025                 return true;
12026
12027         return vcpu->arch.preempted_in_kernel;
12028 }
12029
12030 unsigned long kvm_arch_vcpu_get_ip(struct kvm_vcpu *vcpu)
12031 {
12032         return kvm_rip_read(vcpu);
12033 }
12034
12035 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
12036 {
12037         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
12038 }
12039
12040 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
12041 {
12042         return static_call(kvm_x86_interrupt_allowed)(vcpu, false);
12043 }
12044
12045 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
12046 {
12047         /* Can't read the RIP when guest state is protected, just return 0 */
12048         if (vcpu->arch.guest_state_protected)
12049                 return 0;
12050
12051         if (is_64_bit_mode(vcpu))
12052                 return kvm_rip_read(vcpu);
12053         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
12054                      kvm_rip_read(vcpu));
12055 }
12056 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
12057
12058 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
12059 {
12060         return kvm_get_linear_rip(vcpu) == linear_rip;
12061 }
12062 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
12063
12064 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
12065 {
12066         unsigned long rflags;
12067
12068         rflags = static_call(kvm_x86_get_rflags)(vcpu);
12069         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
12070                 rflags &= ~X86_EFLAGS_TF;
12071         return rflags;
12072 }
12073 EXPORT_SYMBOL_GPL(kvm_get_rflags);
12074
12075 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
12076 {
12077         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
12078             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
12079                 rflags |= X86_EFLAGS_TF;
12080         static_call(kvm_x86_set_rflags)(vcpu, rflags);
12081 }
12082
12083 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
12084 {
12085         __kvm_set_rflags(vcpu, rflags);
12086         kvm_make_request(KVM_REQ_EVENT, vcpu);
12087 }
12088 EXPORT_SYMBOL_GPL(kvm_set_rflags);
12089
12090 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
12091 {
12092         int r;
12093
12094         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
12095               work->wakeup_all)
12096                 return;
12097
12098         r = kvm_mmu_reload(vcpu);
12099         if (unlikely(r))
12100                 return;
12101
12102         if (!vcpu->arch.mmu->direct_map &&
12103               work->arch.cr3 != vcpu->arch.mmu->get_guest_pgd(vcpu))
12104                 return;
12105
12106         kvm_mmu_do_page_fault(vcpu, work->cr2_or_gpa, 0, true);
12107 }
12108
12109 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
12110 {
12111         BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU));
12112
12113         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
12114 }
12115
12116 static inline u32 kvm_async_pf_next_probe(u32 key)
12117 {
12118         return (key + 1) & (ASYNC_PF_PER_VCPU - 1);
12119 }
12120
12121 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12122 {
12123         u32 key = kvm_async_pf_hash_fn(gfn);
12124
12125         while (vcpu->arch.apf.gfns[key] != ~0)
12126                 key = kvm_async_pf_next_probe(key);
12127
12128         vcpu->arch.apf.gfns[key] = gfn;
12129 }
12130
12131 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
12132 {
12133         int i;
12134         u32 key = kvm_async_pf_hash_fn(gfn);
12135
12136         for (i = 0; i < ASYNC_PF_PER_VCPU &&
12137                      (vcpu->arch.apf.gfns[key] != gfn &&
12138                       vcpu->arch.apf.gfns[key] != ~0); i++)
12139                 key = kvm_async_pf_next_probe(key);
12140
12141         return key;
12142 }
12143
12144 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12145 {
12146         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
12147 }
12148
12149 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12150 {
12151         u32 i, j, k;
12152
12153         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
12154
12155         if (WARN_ON_ONCE(vcpu->arch.apf.gfns[i] != gfn))
12156                 return;
12157
12158         while (true) {
12159                 vcpu->arch.apf.gfns[i] = ~0;
12160                 do {
12161                         j = kvm_async_pf_next_probe(j);
12162                         if (vcpu->arch.apf.gfns[j] == ~0)
12163                                 return;
12164                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
12165                         /*
12166                          * k lies cyclically in ]i,j]
12167                          * |    i.k.j |
12168                          * |....j i.k.| or  |.k..j i...|
12169                          */
12170                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
12171                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
12172                 i = j;
12173         }
12174 }
12175
12176 static inline int apf_put_user_notpresent(struct kvm_vcpu *vcpu)
12177 {
12178         u32 reason = KVM_PV_REASON_PAGE_NOT_PRESENT;
12179
12180         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &reason,
12181                                       sizeof(reason));
12182 }
12183
12184 static inline int apf_put_user_ready(struct kvm_vcpu *vcpu, u32 token)
12185 {
12186         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
12187
12188         return kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
12189                                              &token, offset, sizeof(token));
12190 }
12191
12192 static inline bool apf_pageready_slot_free(struct kvm_vcpu *vcpu)
12193 {
12194         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
12195         u32 val;
12196
12197         if (kvm_read_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
12198                                          &val, offset, sizeof(val)))
12199                 return false;
12200
12201         return !val;
12202 }
12203
12204 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
12205 {
12206         if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
12207                 return false;
12208
12209         if (!kvm_pv_async_pf_enabled(vcpu) ||
12210             (vcpu->arch.apf.send_user_only && static_call(kvm_x86_get_cpl)(vcpu) == 0))
12211                 return false;
12212
12213         return true;
12214 }
12215
12216 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
12217 {
12218         if (unlikely(!lapic_in_kernel(vcpu) ||
12219                      kvm_event_needs_reinjection(vcpu) ||
12220                      vcpu->arch.exception.pending))
12221                 return false;
12222
12223         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
12224                 return false;
12225
12226         /*
12227          * If interrupts are off we cannot even use an artificial
12228          * halt state.
12229          */
12230         return kvm_arch_interrupt_allowed(vcpu);
12231 }
12232
12233 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
12234                                      struct kvm_async_pf *work)
12235 {
12236         struct x86_exception fault;
12237
12238         trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
12239         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
12240
12241         if (kvm_can_deliver_async_pf(vcpu) &&
12242             !apf_put_user_notpresent(vcpu)) {
12243                 fault.vector = PF_VECTOR;
12244                 fault.error_code_valid = true;
12245                 fault.error_code = 0;
12246                 fault.nested_page_fault = false;
12247                 fault.address = work->arch.token;
12248                 fault.async_page_fault = true;
12249                 kvm_inject_page_fault(vcpu, &fault);
12250                 return true;
12251         } else {
12252                 /*
12253                  * It is not possible to deliver a paravirtualized asynchronous
12254                  * page fault, but putting the guest in an artificial halt state
12255                  * can be beneficial nevertheless: if an interrupt arrives, we
12256                  * can deliver it timely and perhaps the guest will schedule
12257                  * another process.  When the instruction that triggered a page
12258                  * fault is retried, hopefully the page will be ready in the host.
12259                  */
12260                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
12261                 return false;
12262         }
12263 }
12264
12265 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
12266                                  struct kvm_async_pf *work)
12267 {
12268         struct kvm_lapic_irq irq = {
12269                 .delivery_mode = APIC_DM_FIXED,
12270                 .vector = vcpu->arch.apf.vec
12271         };
12272
12273         if (work->wakeup_all)
12274                 work->arch.token = ~0; /* broadcast wakeup */
12275         else
12276                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
12277         trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
12278
12279         if ((work->wakeup_all || work->notpresent_injected) &&
12280             kvm_pv_async_pf_enabled(vcpu) &&
12281             !apf_put_user_ready(vcpu, work->arch.token)) {
12282                 vcpu->arch.apf.pageready_pending = true;
12283                 kvm_apic_set_irq(vcpu, &irq, NULL);
12284         }
12285
12286         vcpu->arch.apf.halted = false;
12287         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
12288 }
12289
12290 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu)
12291 {
12292         kvm_make_request(KVM_REQ_APF_READY, vcpu);
12293         if (!vcpu->arch.apf.pageready_pending)
12294                 kvm_vcpu_kick(vcpu);
12295 }
12296
12297 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu)
12298 {
12299         if (!kvm_pv_async_pf_enabled(vcpu))
12300                 return true;
12301         else
12302                 return kvm_lapic_enabled(vcpu) && apf_pageready_slot_free(vcpu);
12303 }
12304
12305 void kvm_arch_start_assignment(struct kvm *kvm)
12306 {
12307         if (atomic_inc_return(&kvm->arch.assigned_device_count) == 1)
12308                 static_call_cond(kvm_x86_start_assignment)(kvm);
12309 }
12310 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
12311
12312 void kvm_arch_end_assignment(struct kvm *kvm)
12313 {
12314         atomic_dec(&kvm->arch.assigned_device_count);
12315 }
12316 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
12317
12318 bool kvm_arch_has_assigned_device(struct kvm *kvm)
12319 {
12320         return atomic_read(&kvm->arch.assigned_device_count);
12321 }
12322 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
12323
12324 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
12325 {
12326         atomic_inc(&kvm->arch.noncoherent_dma_count);
12327 }
12328 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
12329
12330 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
12331 {
12332         atomic_dec(&kvm->arch.noncoherent_dma_count);
12333 }
12334 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
12335
12336 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
12337 {
12338         return atomic_read(&kvm->arch.noncoherent_dma_count);
12339 }
12340 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
12341
12342 bool kvm_arch_has_irq_bypass(void)
12343 {
12344         return true;
12345 }
12346
12347 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
12348                                       struct irq_bypass_producer *prod)
12349 {
12350         struct kvm_kernel_irqfd *irqfd =
12351                 container_of(cons, struct kvm_kernel_irqfd, consumer);
12352         int ret;
12353
12354         irqfd->producer = prod;
12355         kvm_arch_start_assignment(irqfd->kvm);
12356         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm,
12357                                          prod->irq, irqfd->gsi, 1);
12358
12359         if (ret)
12360                 kvm_arch_end_assignment(irqfd->kvm);
12361
12362         return ret;
12363 }
12364
12365 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
12366                                       struct irq_bypass_producer *prod)
12367 {
12368         int ret;
12369         struct kvm_kernel_irqfd *irqfd =
12370                 container_of(cons, struct kvm_kernel_irqfd, consumer);
12371
12372         WARN_ON(irqfd->producer != prod);
12373         irqfd->producer = NULL;
12374
12375         /*
12376          * When producer of consumer is unregistered, we change back to
12377          * remapped mode, so we can re-use the current implementation
12378          * when the irq is masked/disabled or the consumer side (KVM
12379          * int this case doesn't want to receive the interrupts.
12380         */
12381         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm, prod->irq, irqfd->gsi, 0);
12382         if (ret)
12383                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
12384                        " fails: %d\n", irqfd->consumer.token, ret);
12385
12386         kvm_arch_end_assignment(irqfd->kvm);
12387 }
12388
12389 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
12390                                    uint32_t guest_irq, bool set)
12391 {
12392         return static_call(kvm_x86_update_pi_irte)(kvm, host_irq, guest_irq, set);
12393 }
12394
12395 bool kvm_arch_irqfd_route_changed(struct kvm_kernel_irq_routing_entry *old,
12396                                   struct kvm_kernel_irq_routing_entry *new)
12397 {
12398         if (new->type != KVM_IRQ_ROUTING_MSI)
12399                 return true;
12400
12401         return !!memcmp(&old->msi, &new->msi, sizeof(new->msi));
12402 }
12403
12404 bool kvm_vector_hashing_enabled(void)
12405 {
12406         return vector_hashing;
12407 }
12408
12409 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
12410 {
12411         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
12412 }
12413 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
12414
12415
12416 int kvm_spec_ctrl_test_value(u64 value)
12417 {
12418         /*
12419          * test that setting IA32_SPEC_CTRL to given value
12420          * is allowed by the host processor
12421          */
12422
12423         u64 saved_value;
12424         unsigned long flags;
12425         int ret = 0;
12426
12427         local_irq_save(flags);
12428
12429         if (rdmsrl_safe(MSR_IA32_SPEC_CTRL, &saved_value))
12430                 ret = 1;
12431         else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value))
12432                 ret = 1;
12433         else
12434                 wrmsrl(MSR_IA32_SPEC_CTRL, saved_value);
12435
12436         local_irq_restore(flags);
12437
12438         return ret;
12439 }
12440 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value);
12441
12442 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code)
12443 {
12444         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
12445         struct x86_exception fault;
12446         u32 access = error_code &
12447                 (PFERR_WRITE_MASK | PFERR_FETCH_MASK | PFERR_USER_MASK);
12448
12449         if (!(error_code & PFERR_PRESENT_MASK) ||
12450             mmu->gva_to_gpa(vcpu, mmu, gva, access, &fault) != UNMAPPED_GVA) {
12451                 /*
12452                  * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
12453                  * tables probably do not match the TLB.  Just proceed
12454                  * with the error code that the processor gave.
12455                  */
12456                 fault.vector = PF_VECTOR;
12457                 fault.error_code_valid = true;
12458                 fault.error_code = error_code;
12459                 fault.nested_page_fault = false;
12460                 fault.address = gva;
12461         }
12462         vcpu->arch.walk_mmu->inject_page_fault(vcpu, &fault);
12463 }
12464 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error);
12465
12466 /*
12467  * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
12468  * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
12469  * indicates whether exit to userspace is needed.
12470  */
12471 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
12472                               struct x86_exception *e)
12473 {
12474         if (r == X86EMUL_PROPAGATE_FAULT) {
12475                 kvm_inject_emulated_page_fault(vcpu, e);
12476                 return 1;
12477         }
12478
12479         /*
12480          * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
12481          * while handling a VMX instruction KVM could've handled the request
12482          * correctly by exiting to userspace and performing I/O but there
12483          * doesn't seem to be a real use-case behind such requests, just return
12484          * KVM_EXIT_INTERNAL_ERROR for now.
12485          */
12486         kvm_prepare_emulation_failure_exit(vcpu);
12487
12488         return 0;
12489 }
12490 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure);
12491
12492 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva)
12493 {
12494         bool pcid_enabled;
12495         struct x86_exception e;
12496         struct {
12497                 u64 pcid;
12498                 u64 gla;
12499         } operand;
12500         int r;
12501
12502         r = kvm_read_guest_virt(vcpu, gva, &operand, sizeof(operand), &e);
12503         if (r != X86EMUL_CONTINUE)
12504                 return kvm_handle_memory_failure(vcpu, r, &e);
12505
12506         if (operand.pcid >> 12 != 0) {
12507                 kvm_inject_gp(vcpu, 0);
12508                 return 1;
12509         }
12510
12511         pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
12512
12513         switch (type) {
12514         case INVPCID_TYPE_INDIV_ADDR:
12515                 if ((!pcid_enabled && (operand.pcid != 0)) ||
12516                     is_noncanonical_address(operand.gla, vcpu)) {
12517                         kvm_inject_gp(vcpu, 0);
12518                         return 1;
12519                 }
12520                 kvm_mmu_invpcid_gva(vcpu, operand.gla, operand.pcid);
12521                 return kvm_skip_emulated_instruction(vcpu);
12522
12523         case INVPCID_TYPE_SINGLE_CTXT:
12524                 if (!pcid_enabled && (operand.pcid != 0)) {
12525                         kvm_inject_gp(vcpu, 0);
12526                         return 1;
12527                 }
12528
12529                 kvm_invalidate_pcid(vcpu, operand.pcid);
12530                 return kvm_skip_emulated_instruction(vcpu);
12531
12532         case INVPCID_TYPE_ALL_NON_GLOBAL:
12533                 /*
12534                  * Currently, KVM doesn't mark global entries in the shadow
12535                  * page tables, so a non-global flush just degenerates to a
12536                  * global flush. If needed, we could optimize this later by
12537                  * keeping track of global entries in shadow page tables.
12538                  */
12539
12540                 fallthrough;
12541         case INVPCID_TYPE_ALL_INCL_GLOBAL:
12542                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
12543                 return kvm_skip_emulated_instruction(vcpu);
12544
12545         default:
12546                 kvm_inject_gp(vcpu, 0);
12547                 return 1;
12548         }
12549 }
12550 EXPORT_SYMBOL_GPL(kvm_handle_invpcid);
12551
12552 static int complete_sev_es_emulated_mmio(struct kvm_vcpu *vcpu)
12553 {
12554         struct kvm_run *run = vcpu->run;
12555         struct kvm_mmio_fragment *frag;
12556         unsigned int len;
12557
12558         BUG_ON(!vcpu->mmio_needed);
12559
12560         /* Complete previous fragment */
12561         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
12562         len = min(8u, frag->len);
12563         if (!vcpu->mmio_is_write)
12564                 memcpy(frag->data, run->mmio.data, len);
12565
12566         if (frag->len <= 8) {
12567                 /* Switch to the next fragment. */
12568                 frag++;
12569                 vcpu->mmio_cur_fragment++;
12570         } else {
12571                 /* Go forward to the next mmio piece. */
12572                 frag->data += len;
12573                 frag->gpa += len;
12574                 frag->len -= len;
12575         }
12576
12577         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
12578                 vcpu->mmio_needed = 0;
12579
12580                 // VMG change, at this point, we're always done
12581                 // RIP has already been advanced
12582                 return 1;
12583         }
12584
12585         // More MMIO is needed
12586         run->mmio.phys_addr = frag->gpa;
12587         run->mmio.len = min(8u, frag->len);
12588         run->mmio.is_write = vcpu->mmio_is_write;
12589         if (run->mmio.is_write)
12590                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
12591         run->exit_reason = KVM_EXIT_MMIO;
12592
12593         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12594
12595         return 0;
12596 }
12597
12598 int kvm_sev_es_mmio_write(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12599                           void *data)
12600 {
12601         int handled;
12602         struct kvm_mmio_fragment *frag;
12603
12604         if (!data)
12605                 return -EINVAL;
12606
12607         handled = write_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12608         if (handled == bytes)
12609                 return 1;
12610
12611         bytes -= handled;
12612         gpa += handled;
12613         data += handled;
12614
12615         /*TODO: Check if need to increment number of frags */
12616         frag = vcpu->mmio_fragments;
12617         vcpu->mmio_nr_fragments = 1;
12618         frag->len = bytes;
12619         frag->gpa = gpa;
12620         frag->data = data;
12621
12622         vcpu->mmio_needed = 1;
12623         vcpu->mmio_cur_fragment = 0;
12624
12625         vcpu->run->mmio.phys_addr = gpa;
12626         vcpu->run->mmio.len = min(8u, frag->len);
12627         vcpu->run->mmio.is_write = 1;
12628         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
12629         vcpu->run->exit_reason = KVM_EXIT_MMIO;
12630
12631         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12632
12633         return 0;
12634 }
12635 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write);
12636
12637 int kvm_sev_es_mmio_read(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12638                          void *data)
12639 {
12640         int handled;
12641         struct kvm_mmio_fragment *frag;
12642
12643         if (!data)
12644                 return -EINVAL;
12645
12646         handled = read_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12647         if (handled == bytes)
12648                 return 1;
12649
12650         bytes -= handled;
12651         gpa += handled;
12652         data += handled;
12653
12654         /*TODO: Check if need to increment number of frags */
12655         frag = vcpu->mmio_fragments;
12656         vcpu->mmio_nr_fragments = 1;
12657         frag->len = bytes;
12658         frag->gpa = gpa;
12659         frag->data = data;
12660
12661         vcpu->mmio_needed = 1;
12662         vcpu->mmio_cur_fragment = 0;
12663
12664         vcpu->run->mmio.phys_addr = gpa;
12665         vcpu->run->mmio.len = min(8u, frag->len);
12666         vcpu->run->mmio.is_write = 0;
12667         vcpu->run->exit_reason = KVM_EXIT_MMIO;
12668
12669         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12670
12671         return 0;
12672 }
12673 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read);
12674
12675 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
12676                            unsigned int port);
12677
12678 static int complete_sev_es_emulated_outs(struct kvm_vcpu *vcpu)
12679 {
12680         int size = vcpu->arch.pio.size;
12681         int port = vcpu->arch.pio.port;
12682
12683         vcpu->arch.pio.count = 0;
12684         if (vcpu->arch.sev_pio_count)
12685                 return kvm_sev_es_outs(vcpu, size, port);
12686         return 1;
12687 }
12688
12689 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
12690                            unsigned int port)
12691 {
12692         for (;;) {
12693                 unsigned int count =
12694                         min_t(unsigned int, PAGE_SIZE / size, vcpu->arch.sev_pio_count);
12695                 int ret = emulator_pio_out(vcpu, size, port, vcpu->arch.sev_pio_data, count);
12696
12697                 /* memcpy done already by emulator_pio_out.  */
12698                 vcpu->arch.sev_pio_count -= count;
12699                 vcpu->arch.sev_pio_data += count * vcpu->arch.pio.size;
12700                 if (!ret)
12701                         break;
12702
12703                 /* Emulation done by the kernel.  */
12704                 if (!vcpu->arch.sev_pio_count)
12705                         return 1;
12706         }
12707
12708         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_outs;
12709         return 0;
12710 }
12711
12712 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
12713                           unsigned int port);
12714
12715 static void advance_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
12716 {
12717         unsigned count = vcpu->arch.pio.count;
12718         complete_emulator_pio_in(vcpu, vcpu->arch.sev_pio_data);
12719         vcpu->arch.sev_pio_count -= count;
12720         vcpu->arch.sev_pio_data += count * vcpu->arch.pio.size;
12721 }
12722
12723 static int complete_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
12724 {
12725         int size = vcpu->arch.pio.size;
12726         int port = vcpu->arch.pio.port;
12727
12728         advance_sev_es_emulated_ins(vcpu);
12729         if (vcpu->arch.sev_pio_count)
12730                 return kvm_sev_es_ins(vcpu, size, port);
12731         return 1;
12732 }
12733
12734 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
12735                           unsigned int port)
12736 {
12737         for (;;) {
12738                 unsigned int count =
12739                         min_t(unsigned int, PAGE_SIZE / size, vcpu->arch.sev_pio_count);
12740                 if (!__emulator_pio_in(vcpu, size, port, count))
12741                         break;
12742
12743                 /* Emulation done by the kernel.  */
12744                 advance_sev_es_emulated_ins(vcpu);
12745                 if (!vcpu->arch.sev_pio_count)
12746                         return 1;
12747         }
12748
12749         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_ins;
12750         return 0;
12751 }
12752
12753 int kvm_sev_es_string_io(struct kvm_vcpu *vcpu, unsigned int size,
12754                          unsigned int port, void *data,  unsigned int count,
12755                          int in)
12756 {
12757         vcpu->arch.sev_pio_data = data;
12758         vcpu->arch.sev_pio_count = count;
12759         return in ? kvm_sev_es_ins(vcpu, size, port)
12760                   : kvm_sev_es_outs(vcpu, size, port);
12761 }
12762 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io);
12763
12764 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry);
12765 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
12766 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
12767 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
12768 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
12769 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
12770 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
12771 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
12772 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
12773 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
12774 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
12775 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
12776 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
12777 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
12778 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
12779 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
12780 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
12781 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
12782 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
12783 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
12784 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
12785 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log);
12786 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request);
12787 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_accept_irq);
12788 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter);
12789 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit);
12790 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter);
12791 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit);