arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *   Yaniv Kamay  <yaniv@qumranet.com>
  15  *   Amit Shah    <amit.shah@qumranet.com>
  16  *   Ben-Ami Yassour <benami@il.ibm.com>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "ioapic.h"
  22 #include "mmu.h"
  23 #include "i8254.h"
  24 #include "tss.h"
  25 #include "kvm_cache_regs.h"
  26 #include "kvm_emulate.h"
  27 #include "x86.h"
  28 #include "cpuid.h"
  29 #include "pmu.h"
  30 #include "hyperv.h"
  31 #include "lapic.h"
  32
  33 #include <linux/clocksource.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/kvm.h>
  36 #include <linux/fs.h>
  37 #include <linux/vmalloc.h>
  38 #include <linux/export.h>
  39 #include <linux/moduleparam.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <linux/kvm_irqfd.h>
  55 #include <linux/irqbypass.h>
  56 #include <linux/sched/stat.h>
  57 #include <linux/sched/isolation.h>
  58 #include <linux/mem_encrypt.h>
  59 #include <linux/entry-kvm.h>
  60
  61 #include <trace/events/kvm.h>
  62
  63 #include <asm/debugreg.h>
  64 #include <asm/msr.h>
  65 #include <asm/desc.h>
  66 #include <asm/mce.h>
  67 #include <linux/kernel_stat.h>
  68 #include <asm/fpu/internal.h> /* Ugh! */
  69 #include <asm/pvclock.h>
  70 #include <asm/div64.h>
  71 #include <asm/irq_remapping.h>
  72 #include <asm/mshyperv.h>
  73 #include <asm/hypervisor.h>
  74 #include <asm/tlbflush.h>
  75 #include <asm/intel_pt.h>
  76 #include <asm/emulate_prefix.h>
  77 #include <clocksource/hyperv_timer.h>
  78
  79 #define CREATE_TRACE_POINTS
  80 #include "trace.h"
  81
  82 #define MAX_IO_MSRS 256
  83 #define KVM_MAX_MCE_BANKS 32
  84 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  85 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  86
  87 #define emul_to_vcpu(ctxt) \
  88         ((struct kvm_vcpu *)(ctxt)->vcpu)
  89
  90 /* EFER defaults:
  91  * - enable syscall per default because its emulated by KVM
  92  * - enable LME and LMA per default on 64 bit KVM
  93  */
  94 #ifdef CONFIG_X86_64
  95 static
  96 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  97 #else
  98 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  99 #endif
 100
 101 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
 102
 103 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
 104                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 105
 106 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 107 static void process_nmi(struct kvm_vcpu *vcpu);
 108 static void enter_smm(struct kvm_vcpu *vcpu);
 109 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 110 static void store_regs(struct kvm_vcpu *vcpu);
 111 static int sync_regs(struct kvm_vcpu *vcpu);
 112
 113 struct kvm_x86_ops kvm_x86_ops __read_mostly;
 114 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 115
 116 static bool __read_mostly ignore_msrs = 0;
 117 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 118
 119 static bool __read_mostly report_ignored_msrs = true;
 120 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 121
 122 unsigned int min_timer_period_us = 200;
 123 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 124
 125 static bool __read_mostly kvmclock_periodic_sync = true;
 126 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 127
 128 bool __read_mostly kvm_has_tsc_control;
 129 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 130 u32  __read_mostly kvm_max_guest_tsc_khz;
 131 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 132 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 133 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 134 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 135 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 136 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 137 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 138
 139 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 140 static u32 __read_mostly tsc_tolerance_ppm = 250;
 141 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 142
 143 /*
 144  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 145  * adaptive tuning starting from default advancment of 1000ns.  '0' disables
 146  * advancement entirely.  Any other value is used as-is and disables adaptive
 147  * tuning, i.e. allows priveleged userspace to set an exact advancement time.
 148  */
 149 static int __read_mostly lapic_timer_advance_ns = -1;
 150 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 151
 152 static bool __read_mostly vector_hashing = true;
 153 module_param(vector_hashing, bool, S_IRUGO);
 154
 155 bool __read_mostly enable_vmware_backdoor = false;
 156 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 157 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 158
 159 static bool __read_mostly force_emulation_prefix = false;
 160 module_param(force_emulation_prefix, bool, S_IRUGO);
 161
 162 int __read_mostly pi_inject_timer = -1;
 163 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
 164
 165 /*
 166  * Restoring the host value for MSRs that are only consumed when running in
 167  * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
 168  * returns to userspace, i.e. the kernel can run with the guest's value.
 169  */
 170 #define KVM_MAX_NR_USER_RETURN_MSRS 16
 171
 172 struct kvm_user_return_msrs_global {
 173         int nr;
 174         u32 msrs[KVM_MAX_NR_USER_RETURN_MSRS];
 175 };
 176
 177 struct kvm_user_return_msrs {
 178         struct user_return_notifier urn;
 179         bool registered;
 180         struct kvm_user_return_msr_values {
 181                 u64 host;
 182                 u64 curr;
 183         } values[KVM_MAX_NR_USER_RETURN_MSRS];
 184 };
 185
 186 static struct kvm_user_return_msrs_global __read_mostly user_return_msrs_global;
 187 static struct kvm_user_return_msrs __percpu *user_return_msrs;
 188
 189 #define KVM_SUPPORTED_XCR0     (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
 190                                 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
 191                                 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
 192                                 | XFEATURE_MASK_PKRU)
 193
 194 u64 __read_mostly host_efer;
 195 EXPORT_SYMBOL_GPL(host_efer);
 196
 197 bool __read_mostly allow_smaller_maxphyaddr = 0;
 198 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr);
 199
 200 u64 __read_mostly host_xss;
 201 EXPORT_SYMBOL_GPL(host_xss);
 202 u64 __read_mostly supported_xss;
 203 EXPORT_SYMBOL_GPL(supported_xss);
 204
 205 struct kvm_stats_debugfs_item debugfs_entries[] = {
 206         VCPU_STAT("pf_fixed", pf_fixed),
 207         VCPU_STAT("pf_guest", pf_guest),
 208         VCPU_STAT("tlb_flush", tlb_flush),
 209         VCPU_STAT("invlpg", invlpg),
 210         VCPU_STAT("exits", exits),
 211         VCPU_STAT("io_exits", io_exits),
 212         VCPU_STAT("mmio_exits", mmio_exits),
 213         VCPU_STAT("signal_exits", signal_exits),
 214         VCPU_STAT("irq_window", irq_window_exits),
 215         VCPU_STAT("nmi_window", nmi_window_exits),
 216         VCPU_STAT("halt_exits", halt_exits),
 217         VCPU_STAT("halt_successful_poll", halt_successful_poll),
 218         VCPU_STAT("halt_attempted_poll", halt_attempted_poll),
 219         VCPU_STAT("halt_poll_invalid", halt_poll_invalid),
 220         VCPU_STAT("halt_wakeup", halt_wakeup),
 221         VCPU_STAT("hypercalls", hypercalls),
 222         VCPU_STAT("request_irq", request_irq_exits),
 223         VCPU_STAT("irq_exits", irq_exits),
 224         VCPU_STAT("host_state_reload", host_state_reload),
 225         VCPU_STAT("fpu_reload", fpu_reload),
 226         VCPU_STAT("insn_emulation", insn_emulation),
 227         VCPU_STAT("insn_emulation_fail", insn_emulation_fail),
 228         VCPU_STAT("irq_injections", irq_injections),
 229         VCPU_STAT("nmi_injections", nmi_injections),
 230         VCPU_STAT("req_event", req_event),
 231         VCPU_STAT("l1d_flush", l1d_flush),
 232         VCPU_STAT("halt_poll_success_ns", halt_poll_success_ns),
 233         VCPU_STAT("halt_poll_fail_ns", halt_poll_fail_ns),
 234         VM_STAT("mmu_shadow_zapped", mmu_shadow_zapped),
 235         VM_STAT("mmu_pte_write", mmu_pte_write),
 236         VM_STAT("mmu_pte_updated", mmu_pte_updated),
 237         VM_STAT("mmu_pde_zapped", mmu_pde_zapped),
 238         VM_STAT("mmu_flooded", mmu_flooded),
 239         VM_STAT("mmu_recycled", mmu_recycled),
 240         VM_STAT("mmu_cache_miss", mmu_cache_miss),
 241         VM_STAT("mmu_unsync", mmu_unsync),
 242         VM_STAT("remote_tlb_flush", remote_tlb_flush),
 243         VM_STAT("largepages", lpages, .mode = 0444),
 244         VM_STAT("nx_largepages_splitted", nx_lpage_splits, .mode = 0444),
 245         VM_STAT("max_mmu_page_hash_collisions", max_mmu_page_hash_collisions),
 246         { NULL }
 247 };
 248
 249 u64 __read_mostly host_xcr0;
 250 u64 __read_mostly supported_xcr0;
 251 EXPORT_SYMBOL_GPL(supported_xcr0);
 252
 253 static struct kmem_cache *x86_fpu_cache;
 254
 255 static struct kmem_cache *x86_emulator_cache;
 256
 257 /*
 258  * When called, it means the previous get/set msr reached an invalid msr.
 259  * Return true if we want to ignore/silent this failed msr access.
 260  */
 261 static bool kvm_msr_ignored_check(struct kvm_vcpu *vcpu, u32 msr,
 262                                   u64 data, bool write)
 263 {
 264         const char *op = write ? "wrmsr" : "rdmsr";
 265
 266         if (ignore_msrs) {
 267                 if (report_ignored_msrs)
 268                         kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
 269                                       op, msr, data);
 270                 /* Mask the error */
 271                 return true;
 272         } else {
 273                 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
 274                                       op, msr, data);
 275                 return false;
 276         }
 277 }
 278
 279 static struct kmem_cache *kvm_alloc_emulator_cache(void)
 280 {
 281         unsigned int useroffset = offsetof(struct x86_emulate_ctxt, src);
 282         unsigned int size = sizeof(struct x86_emulate_ctxt);
 283
 284         return kmem_cache_create_usercopy("x86_emulator", size,
 285                                           __alignof__(struct x86_emulate_ctxt),
 286                                           SLAB_ACCOUNT, useroffset,
 287                                           size - useroffset, NULL);
 288 }
 289
 290 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 291
 292 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 293 {
 294         int i;
 295         for (i = 0; i < ASYNC_PF_PER_VCPU; i++)
 296                 vcpu->arch.apf.gfns[i] = ~0;
 297 }
 298
 299 static void kvm_on_user_return(struct user_return_notifier *urn)
 300 {
 301         unsigned slot;
 302         struct kvm_user_return_msrs *msrs
 303                 = container_of(urn, struct kvm_user_return_msrs, urn);
 304         struct kvm_user_return_msr_values *values;
 305         unsigned long flags;
 306
 307         /*
 308          * Disabling irqs at this point since the following code could be
 309          * interrupted and executed through kvm_arch_hardware_disable()
 310          */
 311         local_irq_save(flags);
 312         if (msrs->registered) {
 313                 msrs->registered = false;
 314                 user_return_notifier_unregister(urn);
 315         }
 316         local_irq_restore(flags);
 317         for (slot = 0; slot < user_return_msrs_global.nr; ++slot) {
 318                 values = &msrs->values[slot];
 319                 if (values->host != values->curr) {
 320                         wrmsrl(user_return_msrs_global.msrs[slot], values->host);
 321                         values->curr = values->host;
 322                 }
 323         }
 324 }
 325
 326 void kvm_define_user_return_msr(unsigned slot, u32 msr)
 327 {
 328         BUG_ON(slot >= KVM_MAX_NR_USER_RETURN_MSRS);
 329         user_return_msrs_global.msrs[slot] = msr;
 330         if (slot >= user_return_msrs_global.nr)
 331                 user_return_msrs_global.nr = slot + 1;
 332 }
 333 EXPORT_SYMBOL_GPL(kvm_define_user_return_msr);
 334
 335 static void kvm_user_return_msr_cpu_online(void)
 336 {
 337         unsigned int cpu = smp_processor_id();
 338         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 339         u64 value;
 340         int i;
 341
 342         for (i = 0; i < user_return_msrs_global.nr; ++i) {
 343                 rdmsrl_safe(user_return_msrs_global.msrs[i], &value);
 344                 msrs->values[i].host = value;
 345                 msrs->values[i].curr = value;
 346         }
 347 }
 348
 349 int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)
 350 {
 351         unsigned int cpu = smp_processor_id();
 352         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 353         int err;
 354
 355         value = (value & mask) | (msrs->values[slot].host & ~mask);
 356         if (value == msrs->values[slot].curr)
 357                 return 0;
 358         err = wrmsrl_safe(user_return_msrs_global.msrs[slot], value);
 359         if (err)
 360                 return 1;
 361
 362         msrs->values[slot].curr = value;
 363         if (!msrs->registered) {
 364                 msrs->urn.on_user_return = kvm_on_user_return;
 365                 user_return_notifier_register(&msrs->urn);
 366                 msrs->registered = true;
 367         }
 368         return 0;
 369 }
 370 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr);
 371
 372 static void drop_user_return_notifiers(void)
 373 {
 374         unsigned int cpu = smp_processor_id();
 375         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 376
 377         if (msrs->registered)
 378                 kvm_on_user_return(&msrs->urn);
 379 }
 380
 381 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 382 {
 383         return vcpu->arch.apic_base;
 384 }
 385 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 386
 387 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 388 {
 389         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 390 }
 391 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 392
 393 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 394 {
 395         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 396         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 397         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) | 0x2ff |
 398                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 399
 400         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 401                 return 1;
 402         if (!msr_info->host_initiated) {
 403                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 404                         return 1;
 405                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 406                         return 1;
 407         }
 408
 409         kvm_lapic_set_base(vcpu, msr_info->data);
 410         kvm_recalculate_apic_map(vcpu->kvm);
 411         return 0;
 412 }
 413 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 414
 415 asmlinkage __visible noinstr void kvm_spurious_fault(void)
 416 {
 417         /* Fault while not rebooting.  We want the trace. */
 418         BUG_ON(!kvm_rebooting);
 419 }
 420 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 421
 422 #define EXCPT_BENIGN            0
 423 #define EXCPT_CONTRIBUTORY      1
 424 #define EXCPT_PF                2
 425
 426 static int exception_class(int vector)
 427 {
 428         switch (vector) {
 429         case PF_VECTOR:
 430                 return EXCPT_PF;
 431         case DE_VECTOR:
 432         case TS_VECTOR:
 433         case NP_VECTOR:
 434         case SS_VECTOR:
 435         case GP_VECTOR:
 436                 return EXCPT_CONTRIBUTORY;
 437         default:
 438                 break;
 439         }
 440         return EXCPT_BENIGN;
 441 }
 442
 443 #define EXCPT_FAULT             0
 444 #define EXCPT_TRAP              1
 445 #define EXCPT_ABORT             2
 446 #define EXCPT_INTERRUPT         3
 447
 448 static int exception_type(int vector)
 449 {
 450         unsigned int mask;
 451
 452         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 453                 return EXCPT_INTERRUPT;
 454
 455         mask = 1 << vector;
 456
 457         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 458         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 459                 return EXCPT_TRAP;
 460
 461         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 462                 return EXCPT_ABORT;
 463
 464         /* Reserved exceptions will result in fault */
 465         return EXCPT_FAULT;
 466 }
 467
 468 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 469 {
 470         unsigned nr = vcpu->arch.exception.nr;
 471         bool has_payload = vcpu->arch.exception.has_payload;
 472         unsigned long payload = vcpu->arch.exception.payload;
 473
 474         if (!has_payload)
 475                 return;
 476
 477         switch (nr) {
 478         case DB_VECTOR:
 479                 /*
 480                  * "Certain debug exceptions may clear bit 0-3.  The
 481                  * remaining contents of the DR6 register are never
 482                  * cleared by the processor".
 483                  */
 484                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 485                 /*
 486                  * DR6.RTM is set by all #DB exceptions that don't clear it.
 487                  */
 488                 vcpu->arch.dr6 |= DR6_RTM;
 489                 vcpu->arch.dr6 |= payload;
 490                 /*
 491                  * Bit 16 should be set in the payload whenever the #DB
 492                  * exception should clear DR6.RTM. This makes the payload
 493                  * compatible with the pending debug exceptions under VMX.
 494                  * Though not currently documented in the SDM, this also
 495                  * makes the payload compatible with the exit qualification
 496                  * for #DB exceptions under VMX.
 497                  */
 498                 vcpu->arch.dr6 ^= payload & DR6_RTM;
 499
 500                 /*
 501                  * The #DB payload is defined as compatible with the 'pending
 502                  * debug exceptions' field under VMX, not DR6. While bit 12 is
 503                  * defined in the 'pending debug exceptions' field (enabled
 504                  * breakpoint), it is reserved and must be zero in DR6.
 505                  */
 506                 vcpu->arch.dr6 &= ~BIT(12);
 507                 break;
 508         case PF_VECTOR:
 509                 vcpu->arch.cr2 = payload;
 510                 break;
 511         }
 512
 513         vcpu->arch.exception.has_payload = false;
 514         vcpu->arch.exception.payload = 0;
 515 }
 516 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 517
 518 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 519                 unsigned nr, bool has_error, u32 error_code,
 520                 bool has_payload, unsigned long payload, bool reinject)
 521 {
 522         u32 prev_nr;
 523         int class1, class2;
 524
 525         kvm_make_request(KVM_REQ_EVENT, vcpu);
 526
 527         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 528         queue:
 529                 if (has_error && !is_protmode(vcpu))
 530                         has_error = false;
 531                 if (reinject) {
 532                         /*
 533                          * On vmentry, vcpu->arch.exception.pending is only
 534                          * true if an event injection was blocked by
 535                          * nested_run_pending.  In that case, however,
 536                          * vcpu_enter_guest requests an immediate exit,
 537                          * and the guest shouldn't proceed far enough to
 538                          * need reinjection.
 539                          */
 540                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 541                         vcpu->arch.exception.injected = true;
 542                         if (WARN_ON_ONCE(has_payload)) {
 543                                 /*
 544                                  * A reinjected event has already
 545                                  * delivered its payload.
 546                                  */
 547                                 has_payload = false;
 548                                 payload = 0;
 549                         }
 550                 } else {
 551                         vcpu->arch.exception.pending = true;
 552                         vcpu->arch.exception.injected = false;
 553                 }
 554                 vcpu->arch.exception.has_error_code = has_error;
 555                 vcpu->arch.exception.nr = nr;
 556                 vcpu->arch.exception.error_code = error_code;
 557                 vcpu->arch.exception.has_payload = has_payload;
 558                 vcpu->arch.exception.payload = payload;
 559                 if (!is_guest_mode(vcpu))
 560                         kvm_deliver_exception_payload(vcpu);
 561                 return;
 562         }
 563
 564         /* to check exception */
 565         prev_nr = vcpu->arch.exception.nr;
 566         if (prev_nr == DF_VECTOR) {
 567                 /* triple fault -> shutdown */
 568                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 569                 return;
 570         }
 571         class1 = exception_class(prev_nr);
 572         class2 = exception_class(nr);
 573         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 574                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 575                 /*
 576                  * Generate double fault per SDM Table 5-5.  Set
 577                  * exception.pending = true so that the double fault
 578                  * can trigger a nested vmexit.
 579                  */
 580                 vcpu->arch.exception.pending = true;
 581                 vcpu->arch.exception.injected = false;
 582                 vcpu->arch.exception.has_error_code = true;
 583                 vcpu->arch.exception.nr = DF_VECTOR;
 584                 vcpu->arch.exception.error_code = 0;
 585                 vcpu->arch.exception.has_payload = false;
 586                 vcpu->arch.exception.payload = 0;
 587         } else
 588                 /* replace previous exception with a new one in a hope
 589                    that instruction re-execution will regenerate lost
 590                    exception */
 591                 goto queue;
 592 }
 593
 594 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 595 {
 596         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 597 }
 598 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 599
 600 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 601 {
 602         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 603 }
 604 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 605
 606 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 607                            unsigned long payload)
 608 {
 609         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 610 }
 611 EXPORT_SYMBOL_GPL(kvm_queue_exception_p);
 612
 613 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 614                                     u32 error_code, unsigned long payload)
 615 {
 616         kvm_multiple_exception(vcpu, nr, true, error_code,
 617                                true, payload, false);
 618 }
 619
 620 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 621 {
 622         if (err)
 623                 kvm_inject_gp(vcpu, 0);
 624         else
 625                 return kvm_skip_emulated_instruction(vcpu);
 626
 627         return 1;
 628 }
 629 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 630
 631 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 632 {
 633         ++vcpu->stat.pf_guest;
 634         vcpu->arch.exception.nested_apf =
 635                 is_guest_mode(vcpu) && fault->async_page_fault;
 636         if (vcpu->arch.exception.nested_apf) {
 637                 vcpu->arch.apf.nested_apf_token = fault->address;
 638                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 639         } else {
 640                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 641                                         fault->address);
 642         }
 643 }
 644 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 645
 646 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
 647                                     struct x86_exception *fault)
 648 {
 649         struct kvm_mmu *fault_mmu;
 650         WARN_ON_ONCE(fault->vector != PF_VECTOR);
 651
 652         fault_mmu = fault->nested_page_fault ? vcpu->arch.mmu :
 653                                                vcpu->arch.walk_mmu;
 654
 655         /*
 656          * Invalidate the TLB entry for the faulting address, if it exists,
 657          * else the access will fault indefinitely (and to emulate hardware).
 658          */
 659         if ((fault->error_code & PFERR_PRESENT_MASK) &&
 660             !(fault->error_code & PFERR_RSVD_MASK))
 661                 kvm_mmu_invalidate_gva(vcpu, fault_mmu, fault->address,
 662                                        fault_mmu->root_hpa);
 663
 664         fault_mmu->inject_page_fault(vcpu, fault);
 665         return fault->nested_page_fault;
 666 }
 667 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault);
 668
 669 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 670 {
 671         atomic_inc(&vcpu->arch.nmi_queued);
 672         kvm_make_request(KVM_REQ_NMI, vcpu);
 673 }
 674 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 675
 676 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 677 {
 678         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 679 }
 680 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 681
 682 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 683 {
 684         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 685 }
 686 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 687
 688 /*
 689  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 690  * a #GP and return false.
 691  */
 692 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 693 {
 694         if (kvm_x86_ops.get_cpl(vcpu) <= required_cpl)
 695                 return true;
 696         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 697         return false;
 698 }
 699 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 700
 701 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 702 {
 703         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 704                 return true;
 705
 706         kvm_queue_exception(vcpu, UD_VECTOR);
 707         return false;
 708 }
 709 EXPORT_SYMBOL_GPL(kvm_require_dr);
 710
 711 /*
 712  * This function will be used to read from the physical memory of the currently
 713  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 714  * can read from guest physical or from the guest's guest physical memory.
 715  */
 716 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 717                             gfn_t ngfn, void *data, int offset, int len,
 718                             u32 access)
 719 {
 720         struct x86_exception exception;
 721         gfn_t real_gfn;
 722         gpa_t ngpa;
 723
 724         ngpa     = gfn_to_gpa(ngfn);
 725         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 726         if (real_gfn == UNMAPPED_GVA)
 727                 return -EFAULT;
 728
 729         real_gfn = gpa_to_gfn(real_gfn);
 730
 731         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 732 }
 733 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 734
 735 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 736                                void *data, int offset, int len, u32 access)
 737 {
 738         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 739                                        data, offset, len, access);
 740 }
 741
 742 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
 743 {
 744         return rsvd_bits(cpuid_maxphyaddr(vcpu), 63) | rsvd_bits(5, 8) |
 745                rsvd_bits(1, 2);
 746 }
 747
 748 /*
 749  * Load the pae pdptrs.  Return 1 if they are all valid, 0 otherwise.
 750  */
 751 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 752 {
 753         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 754         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 755         int i;
 756         int ret;
 757         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 758
 759         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 760                                       offset * sizeof(u64), sizeof(pdpte),
 761                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 762         if (ret < 0) {
 763                 ret = 0;
 764                 goto out;
 765         }
 766         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 767                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 768                     (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
 769                         ret = 0;
 770                         goto out;
 771                 }
 772         }
 773         ret = 1;
 774
 775         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 776         kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
 777
 778 out:
 779
 780         return ret;
 781 }
 782 EXPORT_SYMBOL_GPL(load_pdptrs);
 783
 784 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 785 {
 786         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 787         int offset;
 788         gfn_t gfn;
 789         int r;
 790
 791         if (!is_pae_paging(vcpu))
 792                 return false;
 793
 794         if (!kvm_register_is_available(vcpu, VCPU_EXREG_PDPTR))
 795                 return true;
 796
 797         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 798         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 799         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 800                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 801         if (r < 0)
 802                 return true;
 803
 804         return memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 805 }
 806 EXPORT_SYMBOL_GPL(pdptrs_changed);
 807
 808 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0)
 809 {
 810         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 811
 812         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 813                 kvm_clear_async_pf_completion_queue(vcpu);
 814                 kvm_async_pf_hash_reset(vcpu);
 815         }
 816
 817         if ((cr0 ^ old_cr0) & update_bits)
 818                 kvm_mmu_reset_context(vcpu);
 819
 820         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 821             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 822             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 823                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 824 }
 825 EXPORT_SYMBOL_GPL(kvm_post_set_cr0);
 826
 827 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 828 {
 829         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 830         unsigned long pdptr_bits = X86_CR0_CD | X86_CR0_NW | X86_CR0_PG;
 831
 832         cr0 |= X86_CR0_ET;
 833
 834 #ifdef CONFIG_X86_64
 835         if (cr0 & 0xffffffff00000000UL)
 836                 return 1;
 837 #endif
 838
 839         cr0 &= ~CR0_RESERVED_BITS;
 840
 841         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 842                 return 1;
 843
 844         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 845                 return 1;
 846
 847 #ifdef CONFIG_X86_64
 848         if ((vcpu->arch.efer & EFER_LME) && !is_paging(vcpu) &&
 849             (cr0 & X86_CR0_PG)) {
 850                 int cs_db, cs_l;
 851
 852                 if (!is_pae(vcpu))
 853                         return 1;
 854                 kvm_x86_ops.get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 855                 if (cs_l)
 856                         return 1;
 857         }
 858 #endif
 859         if (!(vcpu->arch.efer & EFER_LME) && (cr0 & X86_CR0_PG) &&
 860             is_pae(vcpu) && ((cr0 ^ old_cr0) & pdptr_bits) &&
 861             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu)))
 862                 return 1;
 863
 864         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 865                 return 1;
 866
 867         kvm_x86_ops.set_cr0(vcpu, cr0);
 868
 869         kvm_post_set_cr0(vcpu, old_cr0, cr0);
 870
 871         return 0;
 872 }
 873 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 874
 875 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 876 {
 877         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 878 }
 879 EXPORT_SYMBOL_GPL(kvm_lmsw);
 880
 881 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
 882 {
 883         if (vcpu->arch.guest_state_protected)
 884                 return;
 885
 886         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 887
 888                 if (vcpu->arch.xcr0 != host_xcr0)
 889                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 890
 891                 if (vcpu->arch.xsaves_enabled &&
 892                     vcpu->arch.ia32_xss != host_xss)
 893                         wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
 894         }
 895
 896         if (static_cpu_has(X86_FEATURE_PKU) &&
 897             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 898              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU)) &&
 899             vcpu->arch.pkru != vcpu->arch.host_pkru)
 900                 __write_pkru(vcpu->arch.pkru);
 901 }
 902 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
 903
 904 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
 905 {
 906         if (vcpu->arch.guest_state_protected)
 907                 return;
 908
 909         if (static_cpu_has(X86_FEATURE_PKU) &&
 910             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 911              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU))) {
 912                 vcpu->arch.pkru = rdpkru();
 913                 if (vcpu->arch.pkru != vcpu->arch.host_pkru)
 914                         __write_pkru(vcpu->arch.host_pkru);
 915         }
 916
 917         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 918
 919                 if (vcpu->arch.xcr0 != host_xcr0)
 920                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 921
 922                 if (vcpu->arch.xsaves_enabled &&
 923                     vcpu->arch.ia32_xss != host_xss)
 924                         wrmsrl(MSR_IA32_XSS, host_xss);
 925         }
 926
 927 }
 928 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
 929
 930 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 931 {
 932         u64 xcr0 = xcr;
 933         u64 old_xcr0 = vcpu->arch.xcr0;
 934         u64 valid_bits;
 935
 936         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 937         if (index != XCR_XFEATURE_ENABLED_MASK)
 938                 return 1;
 939         if (!(xcr0 & XFEATURE_MASK_FP))
 940                 return 1;
 941         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 942                 return 1;
 943
 944         /*
 945          * Do not allow the guest to set bits that we do not support
 946          * saving.  However, xcr0 bit 0 is always set, even if the
 947          * emulated CPU does not support XSAVE (see fx_init).
 948          */
 949         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 950         if (xcr0 & ~valid_bits)
 951                 return 1;
 952
 953         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 954             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 955                 return 1;
 956
 957         if (xcr0 & XFEATURE_MASK_AVX512) {
 958                 if (!(xcr0 & XFEATURE_MASK_YMM))
 959                         return 1;
 960                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 961                         return 1;
 962         }
 963         vcpu->arch.xcr0 = xcr0;
 964
 965         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 966                 kvm_update_cpuid_runtime(vcpu);
 967         return 0;
 968 }
 969
 970 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 971 {
 972         if (kvm_x86_ops.get_cpl(vcpu) != 0 ||
 973             __kvm_set_xcr(vcpu, index, xcr)) {
 974                 kvm_inject_gp(vcpu, 0);
 975                 return 1;
 976         }
 977         return 0;
 978 }
 979 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 980
 981 bool kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 982 {
 983         if (cr4 & cr4_reserved_bits)
 984                 return false;
 985
 986         if (cr4 & vcpu->arch.cr4_guest_rsvd_bits)
 987                 return false;
 988
 989         return kvm_x86_ops.is_valid_cr4(vcpu, cr4);
 990 }
 991 EXPORT_SYMBOL_GPL(kvm_is_valid_cr4);
 992
 993 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4)
 994 {
 995         unsigned long mmu_role_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 996                                       X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
 997
 998         if (((cr4 ^ old_cr4) & mmu_role_bits) ||
 999             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
1000                 kvm_mmu_reset_context(vcpu);
1001 }
1002 EXPORT_SYMBOL_GPL(kvm_post_set_cr4);
1003
1004 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1005 {
1006         unsigned long old_cr4 = kvm_read_cr4(vcpu);
1007         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
1008                                    X86_CR4_SMEP;
1009
1010         if (!kvm_is_valid_cr4(vcpu, cr4))
1011                 return 1;
1012
1013         if (is_long_mode(vcpu)) {
1014                 if (!(cr4 & X86_CR4_PAE))
1015                         return 1;
1016                 if ((cr4 ^ old_cr4) & X86_CR4_LA57)
1017                         return 1;
1018         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
1019                    && ((cr4 ^ old_cr4) & pdptr_bits)
1020                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
1021                                    kvm_read_cr3(vcpu)))
1022                 return 1;
1023
1024         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
1025                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
1026                         return 1;
1027
1028                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1029                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
1030                         return 1;
1031         }
1032
1033         kvm_x86_ops.set_cr4(vcpu, cr4);
1034
1035         kvm_post_set_cr4(vcpu, old_cr4, cr4);
1036
1037         return 0;
1038 }
1039 EXPORT_SYMBOL_GPL(kvm_set_cr4);
1040
1041 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1042 {
1043         bool skip_tlb_flush = false;
1044 #ifdef CONFIG_X86_64
1045         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
1046
1047         if (pcid_enabled) {
1048                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
1049                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
1050         }
1051 #endif
1052
1053         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
1054                 if (!skip_tlb_flush) {
1055                         kvm_mmu_sync_roots(vcpu);
1056                         kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1057                 }
1058                 return 0;
1059         }
1060
1061         if (is_long_mode(vcpu) &&
1062             (cr3 & vcpu->arch.cr3_lm_rsvd_bits))
1063                 return 1;
1064         else if (is_pae_paging(vcpu) &&
1065                  !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
1066                 return 1;
1067
1068         kvm_mmu_new_pgd(vcpu, cr3, skip_tlb_flush, skip_tlb_flush);
1069         vcpu->arch.cr3 = cr3;
1070         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
1071
1072         return 0;
1073 }
1074 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1075
1076 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1077 {
1078         if (cr8 & CR8_RESERVED_BITS)
1079                 return 1;
1080         if (lapic_in_kernel(vcpu))
1081                 kvm_lapic_set_tpr(vcpu, cr8);
1082         else
1083                 vcpu->arch.cr8 = cr8;
1084         return 0;
1085 }
1086 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1087
1088 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1089 {
1090         if (lapic_in_kernel(vcpu))
1091                 return kvm_lapic_get_cr8(vcpu);
1092         else
1093                 return vcpu->arch.cr8;
1094 }
1095 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1096
1097 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1098 {
1099         int i;
1100
1101         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1102                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1103                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1104                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
1105         }
1106 }
1107
1108 void kvm_update_dr7(struct kvm_vcpu *vcpu)
1109 {
1110         unsigned long dr7;
1111
1112         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1113                 dr7 = vcpu->arch.guest_debug_dr7;
1114         else
1115                 dr7 = vcpu->arch.dr7;
1116         kvm_x86_ops.set_dr7(vcpu, dr7);
1117         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1118         if (dr7 & DR7_BP_EN_MASK)
1119                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1120 }
1121 EXPORT_SYMBOL_GPL(kvm_update_dr7);
1122
1123 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1124 {
1125         u64 fixed = DR6_FIXED_1;
1126
1127         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1128                 fixed |= DR6_RTM;
1129         return fixed;
1130 }
1131
1132 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1133 {
1134         size_t size = ARRAY_SIZE(vcpu->arch.db);
1135
1136         switch (dr) {
1137         case 0 ... 3:
1138                 vcpu->arch.db[array_index_nospec(dr, size)] = val;
1139                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1140                         vcpu->arch.eff_db[dr] = val;
1141                 break;
1142         case 4:
1143         case 6:
1144                 if (!kvm_dr6_valid(val))
1145                         return -1; /* #GP */
1146                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1147                 break;
1148         case 5:
1149         default: /* 7 */
1150                 if (!kvm_dr7_valid(val))
1151                         return -1; /* #GP */
1152                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1153                 kvm_update_dr7(vcpu);
1154                 break;
1155         }
1156
1157         return 0;
1158 }
1159
1160 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1161 {
1162         if (__kvm_set_dr(vcpu, dr, val)) {
1163                 kvm_inject_gp(vcpu, 0);
1164                 return 1;
1165         }
1166         return 0;
1167 }
1168 EXPORT_SYMBOL_GPL(kvm_set_dr);
1169
1170 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1171 {
1172         size_t size = ARRAY_SIZE(vcpu->arch.db);
1173
1174         switch (dr) {
1175         case 0 ... 3:
1176                 *val = vcpu->arch.db[array_index_nospec(dr, size)];
1177                 break;
1178         case 4:
1179         case 6:
1180                 *val = vcpu->arch.dr6;
1181                 break;
1182         case 5:
1183         default: /* 7 */
1184                 *val = vcpu->arch.dr7;
1185                 break;
1186         }
1187         return 0;
1188 }
1189 EXPORT_SYMBOL_GPL(kvm_get_dr);
1190
1191 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
1192 {
1193         u32 ecx = kvm_rcx_read(vcpu);
1194         u64 data;
1195         int err;
1196
1197         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
1198         if (err)
1199                 return err;
1200         kvm_rax_write(vcpu, (u32)data);
1201         kvm_rdx_write(vcpu, data >> 32);
1202         return err;
1203 }
1204 EXPORT_SYMBOL_GPL(kvm_rdpmc);
1205
1206 /*
1207  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1208  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1209  *
1210  * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1211  * extract the supported MSRs from the related const lists.
1212  * msrs_to_save is selected from the msrs_to_save_all to reflect the
1213  * capabilities of the host cpu. This capabilities test skips MSRs that are
1214  * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1215  * may depend on host virtualization features rather than host cpu features.
1216  */
1217
1218 static const u32 msrs_to_save_all[] = {
1219         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1220         MSR_STAR,
1221 #ifdef CONFIG_X86_64
1222         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1223 #endif
1224         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1225         MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1226         MSR_IA32_SPEC_CTRL,
1227         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1228         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1229         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1230         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1231         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1232         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1233         MSR_IA32_UMWAIT_CONTROL,
1234
1235         MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1236         MSR_ARCH_PERFMON_FIXED_CTR0 + 2, MSR_ARCH_PERFMON_FIXED_CTR0 + 3,
1237         MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1238         MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1239         MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1240         MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1241         MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1242         MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1243         MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1244         MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1245         MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1246         MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1247         MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1248         MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1249         MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1250         MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1251         MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1252         MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1253         MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1254         MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1255         MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1256         MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1257 };
1258
1259 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
1260 static unsigned num_msrs_to_save;
1261
1262 static const u32 emulated_msrs_all[] = {
1263         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1264         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1265         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1266         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1267         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1268         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1269         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1270         HV_X64_MSR_RESET,
1271         HV_X64_MSR_VP_INDEX,
1272         HV_X64_MSR_VP_RUNTIME,
1273         HV_X64_MSR_SCONTROL,
1274         HV_X64_MSR_STIMER0_CONFIG,
1275         HV_X64_MSR_VP_ASSIST_PAGE,
1276         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1277         HV_X64_MSR_TSC_EMULATION_STATUS,
1278         HV_X64_MSR_SYNDBG_OPTIONS,
1279         HV_X64_MSR_SYNDBG_CONTROL, HV_X64_MSR_SYNDBG_STATUS,
1280         HV_X64_MSR_SYNDBG_SEND_BUFFER, HV_X64_MSR_SYNDBG_RECV_BUFFER,
1281         HV_X64_MSR_SYNDBG_PENDING_BUFFER,
1282
1283         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1284         MSR_KVM_PV_EOI_EN, MSR_KVM_ASYNC_PF_INT, MSR_KVM_ASYNC_PF_ACK,
1285
1286         MSR_IA32_TSC_ADJUST,
1287         MSR_IA32_TSCDEADLINE,
1288         MSR_IA32_ARCH_CAPABILITIES,
1289         MSR_IA32_PERF_CAPABILITIES,
1290         MSR_IA32_MISC_ENABLE,
1291         MSR_IA32_MCG_STATUS,
1292         MSR_IA32_MCG_CTL,
1293         MSR_IA32_MCG_EXT_CTL,
1294         MSR_IA32_SMBASE,
1295         MSR_SMI_COUNT,
1296         MSR_PLATFORM_INFO,
1297         MSR_MISC_FEATURES_ENABLES,
1298         MSR_AMD64_VIRT_SPEC_CTRL,
1299         MSR_IA32_POWER_CTL,
1300         MSR_IA32_UCODE_REV,
1301
1302         /*
1303          * The following list leaves out MSRs whose values are determined
1304          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1305          * We always support the "true" VMX control MSRs, even if the host
1306          * processor does not, so I am putting these registers here rather
1307          * than in msrs_to_save_all.
1308          */
1309         MSR_IA32_VMX_BASIC,
1310         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1311         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1312         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1313         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1314         MSR_IA32_VMX_MISC,
1315         MSR_IA32_VMX_CR0_FIXED0,
1316         MSR_IA32_VMX_CR4_FIXED0,
1317         MSR_IA32_VMX_VMCS_ENUM,
1318         MSR_IA32_VMX_PROCBASED_CTLS2,
1319         MSR_IA32_VMX_EPT_VPID_CAP,
1320         MSR_IA32_VMX_VMFUNC,
1321
1322         MSR_K7_HWCR,
1323         MSR_KVM_POLL_CONTROL,
1324 };
1325
1326 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1327 static unsigned num_emulated_msrs;
1328
1329 /*
1330  * List of msr numbers which are used to expose MSR-based features that
1331  * can be used by a hypervisor to validate requested CPU features.
1332  */
1333 static const u32 msr_based_features_all[] = {
1334         MSR_IA32_VMX_BASIC,
1335         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1336         MSR_IA32_VMX_PINBASED_CTLS,
1337         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1338         MSR_IA32_VMX_PROCBASED_CTLS,
1339         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1340         MSR_IA32_VMX_EXIT_CTLS,
1341         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1342         MSR_IA32_VMX_ENTRY_CTLS,
1343         MSR_IA32_VMX_MISC,
1344         MSR_IA32_VMX_CR0_FIXED0,
1345         MSR_IA32_VMX_CR0_FIXED1,
1346         MSR_IA32_VMX_CR4_FIXED0,
1347         MSR_IA32_VMX_CR4_FIXED1,
1348         MSR_IA32_VMX_VMCS_ENUM,
1349         MSR_IA32_VMX_PROCBASED_CTLS2,
1350         MSR_IA32_VMX_EPT_VPID_CAP,
1351         MSR_IA32_VMX_VMFUNC,
1352
1353         MSR_F10H_DECFG,
1354         MSR_IA32_UCODE_REV,
1355         MSR_IA32_ARCH_CAPABILITIES,
1356         MSR_IA32_PERF_CAPABILITIES,
1357 };
1358
1359 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
1360 static unsigned int num_msr_based_features;
1361
1362 static u64 kvm_get_arch_capabilities(void)
1363 {
1364         u64 data = 0;
1365
1366         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1367                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1368
1369         /*
1370          * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1371          * the nested hypervisor runs with NX huge pages.  If it is not,
1372          * L1 is anyway vulnerable to ITLB_MULTIHIT explots from other
1373          * L1 guests, so it need not worry about its own (L2) guests.
1374          */
1375         data |= ARCH_CAP_PSCHANGE_MC_NO;
1376
1377         /*
1378          * If we're doing cache flushes (either "always" or "cond")
1379          * we will do one whenever the guest does a vmlaunch/vmresume.
1380          * If an outer hypervisor is doing the cache flush for us
1381          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1382          * capability to the guest too, and if EPT is disabled we're not
1383          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1384          * require a nested hypervisor to do a flush of its own.
1385          */
1386         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1387                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1388
1389         if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1390                 data |= ARCH_CAP_RDCL_NO;
1391         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1392                 data |= ARCH_CAP_SSB_NO;
1393         if (!boot_cpu_has_bug(X86_BUG_MDS))
1394                 data |= ARCH_CAP_MDS_NO;
1395
1396         /*
1397          * On TAA affected systems:
1398          *      - nothing to do if TSX is disabled on the host.
1399          *      - we emulate TSX_CTRL if present on the host.
1400          *        This lets the guest use VERW to clear CPU buffers.
1401          */
1402         if (!boot_cpu_has(X86_FEATURE_RTM))
1403                 data &= ~(ARCH_CAP_TAA_NO | ARCH_CAP_TSX_CTRL_MSR);
1404         else if (!boot_cpu_has_bug(X86_BUG_TAA))
1405                 data |= ARCH_CAP_TAA_NO;
1406
1407         return data;
1408 }
1409
1410 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1411 {
1412         switch (msr->index) {
1413         case MSR_IA32_ARCH_CAPABILITIES:
1414                 msr->data = kvm_get_arch_capabilities();
1415                 break;
1416         case MSR_IA32_UCODE_REV:
1417                 rdmsrl_safe(msr->index, &msr->data);
1418                 break;
1419         default:
1420                 return kvm_x86_ops.get_msr_feature(msr);
1421         }
1422         return 0;
1423 }
1424
1425 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1426 {
1427         struct kvm_msr_entry msr;
1428         int r;
1429
1430         msr.index = index;
1431         r = kvm_get_msr_feature(&msr);
1432
1433         if (r == KVM_MSR_RET_INVALID) {
1434                 /* Unconditionally clear the output for simplicity */
1435                 *data = 0;
1436                 if (kvm_msr_ignored_check(vcpu, index, 0, false))
1437                         r = 0;
1438         }
1439
1440         if (r)
1441                 return r;
1442
1443         *data = msr.data;
1444
1445         return 0;
1446 }
1447
1448 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1449 {
1450         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1451                 return false;
1452
1453         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1454                 return false;
1455
1456         if (efer & (EFER_LME | EFER_LMA) &&
1457             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1458                 return false;
1459
1460         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1461                 return false;
1462
1463         return true;
1464
1465 }
1466 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1467 {
1468         if (efer & efer_reserved_bits)
1469                 return false;
1470
1471         return __kvm_valid_efer(vcpu, efer);
1472 }
1473 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1474
1475 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1476 {
1477         u64 old_efer = vcpu->arch.efer;
1478         u64 efer = msr_info->data;
1479         int r;
1480
1481         if (efer & efer_reserved_bits)
1482                 return 1;
1483
1484         if (!msr_info->host_initiated) {
1485                 if (!__kvm_valid_efer(vcpu, efer))
1486                         return 1;
1487
1488                 if (is_paging(vcpu) &&
1489                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1490                         return 1;
1491         }
1492
1493         efer &= ~EFER_LMA;
1494         efer |= vcpu->arch.efer & EFER_LMA;
1495
1496         r = kvm_x86_ops.set_efer(vcpu, efer);
1497         if (r) {
1498                 WARN_ON(r > 0);
1499                 return r;
1500         }
1501
1502         /* Update reserved bits */
1503         if ((efer ^ old_efer) & EFER_NX)
1504                 kvm_mmu_reset_context(vcpu);
1505
1506         return 0;
1507 }
1508
1509 void kvm_enable_efer_bits(u64 mask)
1510 {
1511        efer_reserved_bits &= ~mask;
1512 }
1513 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1514
1515 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type)
1516 {
1517         struct kvm *kvm = vcpu->kvm;
1518         struct msr_bitmap_range *ranges = kvm->arch.msr_filter.ranges;
1519         u32 count = kvm->arch.msr_filter.count;
1520         u32 i;
1521         bool r = kvm->arch.msr_filter.default_allow;
1522         int idx;
1523
1524         /* MSR filtering not set up or x2APIC enabled, allow everything */
1525         if (!count || (index >= 0x800 && index <= 0x8ff))
1526                 return true;
1527
1528         /* Prevent collision with set_msr_filter */
1529         idx = srcu_read_lock(&kvm->srcu);
1530
1531         for (i = 0; i < count; i++) {
1532                 u32 start = ranges[i].base;
1533                 u32 end = start + ranges[i].nmsrs;
1534                 u32 flags = ranges[i].flags;
1535                 unsigned long *bitmap = ranges[i].bitmap;
1536
1537                 if ((index >= start) && (index < end) && (flags & type)) {
1538                         r = !!test_bit(index - start, bitmap);
1539                         break;
1540                 }
1541         }
1542
1543         srcu_read_unlock(&kvm->srcu, idx);
1544
1545         return r;
1546 }
1547 EXPORT_SYMBOL_GPL(kvm_msr_allowed);
1548
1549 /*
1550  * Write @data into the MSR specified by @index.  Select MSR specific fault
1551  * checks are bypassed if @host_initiated is %true.
1552  * Returns 0 on success, non-0 otherwise.
1553  * Assumes vcpu_load() was already called.
1554  */
1555 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1556                          bool host_initiated)
1557 {
1558         struct msr_data msr;
1559
1560         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_WRITE))
1561                 return KVM_MSR_RET_FILTERED;
1562
1563         switch (index) {
1564         case MSR_FS_BASE:
1565         case MSR_GS_BASE:
1566         case MSR_KERNEL_GS_BASE:
1567         case MSR_CSTAR:
1568         case MSR_LSTAR:
1569                 if (is_noncanonical_address(data, vcpu))
1570                         return 1;
1571                 break;
1572         case MSR_IA32_SYSENTER_EIP:
1573         case MSR_IA32_SYSENTER_ESP:
1574                 /*
1575                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1576                  * non-canonical address is written on Intel but not on
1577                  * AMD (which ignores the top 32-bits, because it does
1578                  * not implement 64-bit SYSENTER).
1579                  *
1580                  * 64-bit code should hence be able to write a non-canonical
1581                  * value on AMD.  Making the address canonical ensures that
1582                  * vmentry does not fail on Intel after writing a non-canonical
1583                  * value, and that something deterministic happens if the guest
1584                  * invokes 64-bit SYSENTER.
1585                  */
1586                 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1587         }
1588
1589         msr.data = data;
1590         msr.index = index;
1591         msr.host_initiated = host_initiated;
1592
1593         return kvm_x86_ops.set_msr(vcpu, &msr);
1594 }
1595
1596 static int kvm_set_msr_ignored_check(struct kvm_vcpu *vcpu,
1597                                      u32 index, u64 data, bool host_initiated)
1598 {
1599         int ret = __kvm_set_msr(vcpu, index, data, host_initiated);
1600
1601         if (ret == KVM_MSR_RET_INVALID)
1602                 if (kvm_msr_ignored_check(vcpu, index, data, true))
1603                         ret = 0;
1604
1605         return ret;
1606 }
1607
1608 /*
1609  * Read the MSR specified by @index into @data.  Select MSR specific fault
1610  * checks are bypassed if @host_initiated is %true.
1611  * Returns 0 on success, non-0 otherwise.
1612  * Assumes vcpu_load() was already called.
1613  */
1614 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1615                   bool host_initiated)
1616 {
1617         struct msr_data msr;
1618         int ret;
1619
1620         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_READ))
1621                 return KVM_MSR_RET_FILTERED;
1622
1623         msr.index = index;
1624         msr.host_initiated = host_initiated;
1625
1626         ret = kvm_x86_ops.get_msr(vcpu, &msr);
1627         if (!ret)
1628                 *data = msr.data;
1629         return ret;
1630 }
1631
1632 static int kvm_get_msr_ignored_check(struct kvm_vcpu *vcpu,
1633                                      u32 index, u64 *data, bool host_initiated)
1634 {
1635         int ret = __kvm_get_msr(vcpu, index, data, host_initiated);
1636
1637         if (ret == KVM_MSR_RET_INVALID) {
1638                 /* Unconditionally clear *data for simplicity */
1639                 *data = 0;
1640                 if (kvm_msr_ignored_check(vcpu, index, 0, false))
1641                         ret = 0;
1642         }
1643
1644         return ret;
1645 }
1646
1647 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1648 {
1649         return kvm_get_msr_ignored_check(vcpu, index, data, false);
1650 }
1651 EXPORT_SYMBOL_GPL(kvm_get_msr);
1652
1653 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1654 {
1655         return kvm_set_msr_ignored_check(vcpu, index, data, false);
1656 }
1657 EXPORT_SYMBOL_GPL(kvm_set_msr);
1658
1659 static int complete_emulated_rdmsr(struct kvm_vcpu *vcpu)
1660 {
1661         int err = vcpu->run->msr.error;
1662         if (!err) {
1663                 kvm_rax_write(vcpu, (u32)vcpu->run->msr.data);
1664                 kvm_rdx_write(vcpu, vcpu->run->msr.data >> 32);
1665         }
1666
1667         return kvm_x86_ops.complete_emulated_msr(vcpu, err);
1668 }
1669
1670 static int complete_emulated_wrmsr(struct kvm_vcpu *vcpu)
1671 {
1672         return kvm_x86_ops.complete_emulated_msr(vcpu, vcpu->run->msr.error);
1673 }
1674
1675 static u64 kvm_msr_reason(int r)
1676 {
1677         switch (r) {
1678         case KVM_MSR_RET_INVALID:
1679                 return KVM_MSR_EXIT_REASON_UNKNOWN;
1680         case KVM_MSR_RET_FILTERED:
1681                 return KVM_MSR_EXIT_REASON_FILTER;
1682         default:
1683                 return KVM_MSR_EXIT_REASON_INVAL;
1684         }
1685 }
1686
1687 static int kvm_msr_user_space(struct kvm_vcpu *vcpu, u32 index,
1688                               u32 exit_reason, u64 data,
1689                               int (*completion)(struct kvm_vcpu *vcpu),
1690                               int r)
1691 {
1692         u64 msr_reason = kvm_msr_reason(r);
1693
1694         /* Check if the user wanted to know about this MSR fault */
1695         if (!(vcpu->kvm->arch.user_space_msr_mask & msr_reason))
1696                 return 0;
1697
1698         vcpu->run->exit_reason = exit_reason;
1699         vcpu->run->msr.error = 0;
1700         memset(vcpu->run->msr.pad, 0, sizeof(vcpu->run->msr.pad));
1701         vcpu->run->msr.reason = msr_reason;
1702         vcpu->run->msr.index = index;
1703         vcpu->run->msr.data = data;
1704         vcpu->arch.complete_userspace_io = completion;
1705
1706         return 1;
1707 }
1708
1709 static int kvm_get_msr_user_space(struct kvm_vcpu *vcpu, u32 index, int r)
1710 {
1711         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_RDMSR, 0,
1712                                    complete_emulated_rdmsr, r);
1713 }
1714
1715 static int kvm_set_msr_user_space(struct kvm_vcpu *vcpu, u32 index, u64 data, int r)
1716 {
1717         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_WRMSR, data,
1718                                    complete_emulated_wrmsr, r);
1719 }
1720
1721 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1722 {
1723         u32 ecx = kvm_rcx_read(vcpu);
1724         u64 data;
1725         int r;
1726
1727         r = kvm_get_msr(vcpu, ecx, &data);
1728
1729         /* MSR read failed? See if we should ask user space */
1730         if (r && kvm_get_msr_user_space(vcpu, ecx, r)) {
1731                 /* Bounce to user space */
1732                 return 0;
1733         }
1734
1735         if (!r) {
1736                 trace_kvm_msr_read(ecx, data);
1737
1738                 kvm_rax_write(vcpu, data & -1u);
1739                 kvm_rdx_write(vcpu, (data >> 32) & -1u);
1740         } else {
1741                 trace_kvm_msr_read_ex(ecx);
1742         }
1743
1744         return kvm_x86_ops.complete_emulated_msr(vcpu, r);
1745 }
1746 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1747
1748 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1749 {
1750         u32 ecx = kvm_rcx_read(vcpu);
1751         u64 data = kvm_read_edx_eax(vcpu);
1752         int r;
1753
1754         r = kvm_set_msr(vcpu, ecx, data);
1755
1756         /* MSR write failed? See if we should ask user space */
1757         if (r && kvm_set_msr_user_space(vcpu, ecx, data, r))
1758                 /* Bounce to user space */
1759                 return 0;
1760
1761         /* Signal all other negative errors to userspace */
1762         if (r < 0)
1763                 return r;
1764
1765         if (!r)
1766                 trace_kvm_msr_write(ecx, data);
1767         else
1768                 trace_kvm_msr_write_ex(ecx, data);
1769
1770         return kvm_x86_ops.complete_emulated_msr(vcpu, r);
1771 }
1772 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1773
1774 bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu)
1775 {
1776         return vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu) ||
1777                 xfer_to_guest_mode_work_pending();
1778 }
1779 EXPORT_SYMBOL_GPL(kvm_vcpu_exit_request);
1780
1781 /*
1782  * The fast path for frequent and performance sensitive wrmsr emulation,
1783  * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
1784  * the latency of virtual IPI by avoiding the expensive bits of transitioning
1785  * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
1786  * other cases which must be called after interrupts are enabled on the host.
1787  */
1788 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
1789 {
1790         if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic))
1791                 return 1;
1792
1793         if (((data & APIC_SHORT_MASK) == APIC_DEST_NOSHORT) &&
1794                 ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
1795                 ((data & APIC_MODE_MASK) == APIC_DM_FIXED) &&
1796                 ((u32)(data >> 32) != X2APIC_BROADCAST)) {
1797
1798                 data &= ~(1 << 12);
1799                 kvm_apic_send_ipi(vcpu->arch.apic, (u32)data, (u32)(data >> 32));
1800                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR2, (u32)(data >> 32));
1801                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR, (u32)data);
1802                 trace_kvm_apic_write(APIC_ICR, (u32)data);
1803                 return 0;
1804         }
1805
1806         return 1;
1807 }
1808
1809 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
1810 {
1811         if (!kvm_can_use_hv_timer(vcpu))
1812                 return 1;
1813
1814         kvm_set_lapic_tscdeadline_msr(vcpu, data);
1815         return 0;
1816 }
1817
1818 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
1819 {
1820         u32 msr = kvm_rcx_read(vcpu);
1821         u64 data;
1822         fastpath_t ret = EXIT_FASTPATH_NONE;
1823
1824         switch (msr) {
1825         case APIC_BASE_MSR + (APIC_ICR >> 4):
1826                 data = kvm_read_edx_eax(vcpu);
1827                 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu, data)) {
1828                         kvm_skip_emulated_instruction(vcpu);
1829                         ret = EXIT_FASTPATH_EXIT_HANDLED;
1830                 }
1831                 break;
1832         case MSR_IA32_TSCDEADLINE:
1833                 data = kvm_read_edx_eax(vcpu);
1834                 if (!handle_fastpath_set_tscdeadline(vcpu, data)) {
1835                         kvm_skip_emulated_instruction(vcpu);
1836                         ret = EXIT_FASTPATH_REENTER_GUEST;
1837                 }
1838                 break;
1839         default:
1840                 break;
1841         }
1842
1843         if (ret != EXIT_FASTPATH_NONE)
1844                 trace_kvm_msr_write(msr, data);
1845
1846         return ret;
1847 }
1848 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
1849
1850 /*
1851  * Adapt set_msr() to msr_io()'s calling convention
1852  */
1853 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1854 {
1855         return kvm_get_msr_ignored_check(vcpu, index, data, true);
1856 }
1857
1858 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1859 {
1860         return kvm_set_msr_ignored_check(vcpu, index, *data, true);
1861 }
1862
1863 #ifdef CONFIG_X86_64
1864 struct pvclock_clock {
1865         int vclock_mode;
1866         u64 cycle_last;
1867         u64 mask;
1868         u32 mult;
1869         u32 shift;
1870         u64 base_cycles;
1871         u64 offset;
1872 };
1873
1874 struct pvclock_gtod_data {
1875         seqcount_t      seq;
1876
1877         struct pvclock_clock clock; /* extract of a clocksource struct */
1878         struct pvclock_clock raw_clock; /* extract of a clocksource struct */
1879
1880         ktime_t         offs_boot;
1881         u64             wall_time_sec;
1882 };
1883
1884 static struct pvclock_gtod_data pvclock_gtod_data;
1885
1886 static void update_pvclock_gtod(struct timekeeper *tk)
1887 {
1888         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1889
1890         write_seqcount_begin(&vdata->seq);
1891
1892         /* copy pvclock gtod data */
1893         vdata->clock.vclock_mode        = tk->tkr_mono.clock->vdso_clock_mode;
1894         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1895         vdata->clock.mask               = tk->tkr_mono.mask;
1896         vdata->clock.mult               = tk->tkr_mono.mult;
1897         vdata->clock.shift              = tk->tkr_mono.shift;
1898         vdata->clock.base_cycles        = tk->tkr_mono.xtime_nsec;
1899         vdata->clock.offset             = tk->tkr_mono.base;
1900
1901         vdata->raw_clock.vclock_mode    = tk->tkr_raw.clock->vdso_clock_mode;
1902         vdata->raw_clock.cycle_last     = tk->tkr_raw.cycle_last;
1903         vdata->raw_clock.mask           = tk->tkr_raw.mask;
1904         vdata->raw_clock.mult           = tk->tkr_raw.mult;
1905         vdata->raw_clock.shift          = tk->tkr_raw.shift;
1906         vdata->raw_clock.base_cycles    = tk->tkr_raw.xtime_nsec;
1907         vdata->raw_clock.offset         = tk->tkr_raw.base;
1908
1909         vdata->wall_time_sec            = tk->xtime_sec;
1910
1911         vdata->offs_boot                = tk->offs_boot;
1912
1913         write_seqcount_end(&vdata->seq);
1914 }
1915
1916 static s64 get_kvmclock_base_ns(void)
1917 {
1918         /* Count up from boot time, but with the frequency of the raw clock.  */
1919         return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot));
1920 }
1921 #else
1922 static s64 get_kvmclock_base_ns(void)
1923 {
1924         /* Master clock not used, so we can just use CLOCK_BOOTTIME.  */
1925         return ktime_get_boottime_ns();
1926 }
1927 #endif
1928
1929 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1930 {
1931         int version;
1932         int r;
1933         struct pvclock_wall_clock wc;
1934         u64 wall_nsec;
1935
1936         kvm->arch.wall_clock = wall_clock;
1937
1938         if (!wall_clock)
1939                 return;
1940
1941         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1942         if (r)
1943                 return;
1944
1945         if (version & 1)
1946                 ++version;  /* first time write, random junk */
1947
1948         ++version;
1949
1950         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1951                 return;
1952
1953         /*
1954          * The guest calculates current wall clock time by adding
1955          * system time (updated by kvm_guest_time_update below) to the
1956          * wall clock specified here.  We do the reverse here.
1957          */
1958         wall_nsec = ktime_get_real_ns() - get_kvmclock_ns(kvm);
1959
1960         wc.nsec = do_div(wall_nsec, 1000000000);
1961         wc.sec = (u32)wall_nsec; /* overflow in 2106 guest time */
1962         wc.version = version;
1963
1964         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1965
1966         version++;
1967         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1968 }
1969
1970 static void kvm_write_system_time(struct kvm_vcpu *vcpu, gpa_t system_time,
1971                                   bool old_msr, bool host_initiated)
1972 {
1973         struct kvm_arch *ka = &vcpu->kvm->arch;
1974
1975         if (vcpu->vcpu_id == 0 && !host_initiated) {
1976                 if (ka->boot_vcpu_runs_old_kvmclock != old_msr)
1977                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1978
1979                 ka->boot_vcpu_runs_old_kvmclock = old_msr;
1980         }
1981
1982         vcpu->arch.time = system_time;
1983         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
1984
1985         /* we verify if the enable bit is set... */
1986         vcpu->arch.pv_time_enabled = false;
1987         if (!(system_time & 1))
1988                 return;
1989
1990         if (!kvm_gfn_to_hva_cache_init(vcpu->kvm,
1991                                        &vcpu->arch.pv_time, system_time & ~1ULL,
1992                                        sizeof(struct pvclock_vcpu_time_info)))
1993                 vcpu->arch.pv_time_enabled = true;
1994
1995         return;
1996 }
1997
1998 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1999 {
2000         do_shl32_div32(dividend, divisor);
2001         return dividend;
2002 }
2003
2004 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
2005                                s8 *pshift, u32 *pmultiplier)
2006 {
2007         uint64_t scaled64;
2008         int32_t  shift = 0;
2009         uint64_t tps64;
2010         uint32_t tps32;
2011
2012         tps64 = base_hz;
2013         scaled64 = scaled_hz;
2014         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
2015                 tps64 >>= 1;
2016                 shift--;
2017         }
2018
2019         tps32 = (uint32_t)tps64;
2020         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
2021                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
2022                         scaled64 >>= 1;
2023                 else
2024                         tps32 <<= 1;
2025                 shift++;
2026         }
2027
2028         *pshift = shift;
2029         *pmultiplier = div_frac(scaled64, tps32);
2030 }
2031
2032 #ifdef CONFIG_X86_64
2033 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
2034 #endif
2035
2036 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
2037 static unsigned long max_tsc_khz;
2038
2039 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
2040 {
2041         u64 v = (u64)khz * (1000000 + ppm);
2042         do_div(v, 1000000);
2043         return v;
2044 }
2045
2046 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
2047 {
2048         u64 ratio;
2049
2050         /* Guest TSC same frequency as host TSC? */
2051         if (!scale) {
2052                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
2053                 return 0;
2054         }
2055
2056         /* TSC scaling supported? */
2057         if (!kvm_has_tsc_control) {
2058                 if (user_tsc_khz > tsc_khz) {
2059                         vcpu->arch.tsc_catchup = 1;
2060                         vcpu->arch.tsc_always_catchup = 1;
2061                         return 0;
2062                 } else {
2063                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2064                         return -1;
2065                 }
2066         }
2067
2068         /* TSC scaling required  - calculate ratio */
2069         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
2070                                 user_tsc_khz, tsc_khz);
2071
2072         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
2073                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2074                                     user_tsc_khz);
2075                 return -1;
2076         }
2077
2078         vcpu->arch.tsc_scaling_ratio = ratio;
2079         return 0;
2080 }
2081
2082 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
2083 {
2084         u32 thresh_lo, thresh_hi;
2085         int use_scaling = 0;
2086
2087         /* tsc_khz can be zero if TSC calibration fails */
2088         if (user_tsc_khz == 0) {
2089                 /* set tsc_scaling_ratio to a safe value */
2090                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
2091                 return -1;
2092         }
2093
2094         /* Compute a scale to convert nanoseconds in TSC cycles */
2095         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
2096                            &vcpu->arch.virtual_tsc_shift,
2097                            &vcpu->arch.virtual_tsc_mult);
2098         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
2099
2100         /*
2101          * Compute the variation in TSC rate which is acceptable
2102          * within the range of tolerance and decide if the
2103          * rate being applied is within that bounds of the hardware
2104          * rate.  If so, no scaling or compensation need be done.
2105          */
2106         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
2107         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
2108         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
2109                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
2110                 use_scaling = 1;
2111         }
2112         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
2113 }
2114
2115 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
2116 {
2117         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
2118                                       vcpu->arch.virtual_tsc_mult,
2119                                       vcpu->arch.virtual_tsc_shift);
2120         tsc += vcpu->arch.this_tsc_write;
2121         return tsc;
2122 }
2123
2124 static inline int gtod_is_based_on_tsc(int mode)
2125 {
2126         return mode == VDSO_CLOCKMODE_TSC || mode == VDSO_CLOCKMODE_HVCLOCK;
2127 }
2128
2129 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
2130 {
2131 #ifdef CONFIG_X86_64
2132         bool vcpus_matched;
2133         struct kvm_arch *ka = &vcpu->kvm->arch;
2134         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2135
2136         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2137                          atomic_read(&vcpu->kvm->online_vcpus));
2138
2139         /*
2140          * Once the masterclock is enabled, always perform request in
2141          * order to update it.
2142          *
2143          * In order to enable masterclock, the host clocksource must be TSC
2144          * and the vcpus need to have matched TSCs.  When that happens,
2145          * perform request to enable masterclock.
2146          */
2147         if (ka->use_master_clock ||
2148             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
2149                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2150
2151         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
2152                             atomic_read(&vcpu->kvm->online_vcpus),
2153                             ka->use_master_clock, gtod->clock.vclock_mode);
2154 #endif
2155 }
2156
2157 /*
2158  * Multiply tsc by a fixed point number represented by ratio.
2159  *
2160  * The most significant 64-N bits (mult) of ratio represent the
2161  * integral part of the fixed point number; the remaining N bits
2162  * (frac) represent the fractional part, ie. ratio represents a fixed
2163  * point number (mult + frac * 2^(-N)).
2164  *
2165  * N equals to kvm_tsc_scaling_ratio_frac_bits.
2166  */
2167 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
2168 {
2169         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
2170 }
2171
2172 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
2173 {
2174         u64 _tsc = tsc;
2175         u64 ratio = vcpu->arch.tsc_scaling_ratio;
2176
2177         if (ratio != kvm_default_tsc_scaling_ratio)
2178                 _tsc = __scale_tsc(ratio, tsc);
2179
2180         return _tsc;
2181 }
2182 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
2183
2184 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
2185 {
2186         u64 tsc;
2187
2188         tsc = kvm_scale_tsc(vcpu, rdtsc());
2189
2190         return target_tsc - tsc;
2191 }
2192
2193 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
2194 {
2195         return vcpu->arch.l1_tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
2196 }
2197 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
2198
2199 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
2200 {
2201         vcpu->arch.l1_tsc_offset = offset;
2202         vcpu->arch.tsc_offset = kvm_x86_ops.write_l1_tsc_offset(vcpu, offset);
2203 }
2204
2205 static inline bool kvm_check_tsc_unstable(void)
2206 {
2207 #ifdef CONFIG_X86_64
2208         /*
2209          * TSC is marked unstable when we're running on Hyper-V,
2210          * 'TSC page' clocksource is good.
2211          */
2212         if (pvclock_gtod_data.clock.vclock_mode == VDSO_CLOCKMODE_HVCLOCK)
2213                 return false;
2214 #endif
2215         return check_tsc_unstable();
2216 }
2217
2218 static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 data)
2219 {
2220         struct kvm *kvm = vcpu->kvm;
2221         u64 offset, ns, elapsed;
2222         unsigned long flags;
2223         bool matched;
2224         bool already_matched;
2225         bool synchronizing = false;
2226
2227         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
2228         offset = kvm_compute_tsc_offset(vcpu, data);
2229         ns = get_kvmclock_base_ns();
2230         elapsed = ns - kvm->arch.last_tsc_nsec;
2231
2232         if (vcpu->arch.virtual_tsc_khz) {
2233                 if (data == 0) {
2234                         /*
2235                          * detection of vcpu initialization -- need to sync
2236                          * with other vCPUs. This particularly helps to keep
2237                          * kvm_clock stable after CPU hotplug
2238                          */
2239                         synchronizing = true;
2240                 } else {
2241                         u64 tsc_exp = kvm->arch.last_tsc_write +
2242                                                 nsec_to_cycles(vcpu, elapsed);
2243                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
2244                         /*
2245                          * Special case: TSC write with a small delta (1 second)
2246                          * of virtual cycle time against real time is
2247                          * interpreted as an attempt to synchronize the CPU.
2248                          */
2249                         synchronizing = data < tsc_exp + tsc_hz &&
2250                                         data + tsc_hz > tsc_exp;
2251                 }
2252         }
2253
2254         /*
2255          * For a reliable TSC, we can match TSC offsets, and for an unstable
2256          * TSC, we add elapsed time in this computation.  We could let the
2257          * compensation code attempt to catch up if we fall behind, but
2258          * it's better to try to match offsets from the beginning.
2259          */
2260         if (synchronizing &&
2261             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
2262                 if (!kvm_check_tsc_unstable()) {
2263                         offset = kvm->arch.cur_tsc_offset;
2264                 } else {
2265                         u64 delta = nsec_to_cycles(vcpu, elapsed);
2266                         data += delta;
2267                         offset = kvm_compute_tsc_offset(vcpu, data);
2268                 }
2269                 matched = true;
2270                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
2271         } else {
2272                 /*
2273                  * We split periods of matched TSC writes into generations.
2274                  * For each generation, we track the original measured
2275                  * nanosecond time, offset, and write, so if TSCs are in
2276                  * sync, we can match exact offset, and if not, we can match
2277                  * exact software computation in compute_guest_tsc()
2278                  *
2279                  * These values are tracked in kvm->arch.cur_xxx variables.
2280                  */
2281                 kvm->arch.cur_tsc_generation++;
2282                 kvm->arch.cur_tsc_nsec = ns;
2283                 kvm->arch.cur_tsc_write = data;
2284                 kvm->arch.cur_tsc_offset = offset;
2285                 matched = false;
2286         }
2287
2288         /*
2289          * We also track th most recent recorded KHZ, write and time to
2290          * allow the matching interval to be extended at each write.
2291          */
2292         kvm->arch.last_tsc_nsec = ns;
2293         kvm->arch.last_tsc_write = data;
2294         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2295
2296         vcpu->arch.last_guest_tsc = data;
2297
2298         /* Keep track of which generation this VCPU has synchronized to */
2299         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2300         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2301         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2302
2303         kvm_vcpu_write_tsc_offset(vcpu, offset);
2304         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2305
2306         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
2307         if (!matched) {
2308                 kvm->arch.nr_vcpus_matched_tsc = 0;
2309         } else if (!already_matched) {
2310                 kvm->arch.nr_vcpus_matched_tsc++;
2311         }
2312
2313         kvm_track_tsc_matching(vcpu);
2314         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
2315 }
2316
2317 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2318                                            s64 adjustment)
2319 {
2320         u64 tsc_offset = vcpu->arch.l1_tsc_offset;
2321         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2322 }
2323
2324 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2325 {
2326         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
2327                 WARN_ON(adjustment < 0);
2328         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
2329         adjust_tsc_offset_guest(vcpu, adjustment);
2330 }
2331
2332 #ifdef CONFIG_X86_64
2333
2334 static u64 read_tsc(void)
2335 {
2336         u64 ret = (u64)rdtsc_ordered();
2337         u64 last = pvclock_gtod_data.clock.cycle_last;
2338
2339         if (likely(ret >= last))
2340                 return ret;
2341
2342         /*
2343          * GCC likes to generate cmov here, but this branch is extremely
2344          * predictable (it's just a function of time and the likely is
2345          * very likely) and there's a data dependence, so force GCC
2346          * to generate a branch instead.  I don't barrier() because
2347          * we don't actually need a barrier, and if this function
2348          * ever gets inlined it will generate worse code.
2349          */
2350         asm volatile ("");
2351         return last;
2352 }
2353
2354 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2355                           int *mode)
2356 {
2357         long v;
2358         u64 tsc_pg_val;
2359
2360         switch (clock->vclock_mode) {
2361         case VDSO_CLOCKMODE_HVCLOCK:
2362                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2363                                                   tsc_timestamp);
2364                 if (tsc_pg_val != U64_MAX) {
2365                         /* TSC page valid */
2366                         *mode = VDSO_CLOCKMODE_HVCLOCK;
2367                         v = (tsc_pg_val - clock->cycle_last) &
2368                                 clock->mask;
2369                 } else {
2370                         /* TSC page invalid */
2371                         *mode = VDSO_CLOCKMODE_NONE;
2372                 }
2373                 break;
2374         case VDSO_CLOCKMODE_TSC:
2375                 *mode = VDSO_CLOCKMODE_TSC;
2376                 *tsc_timestamp = read_tsc();
2377                 v = (*tsc_timestamp - clock->cycle_last) &
2378                         clock->mask;
2379                 break;
2380         default:
2381                 *mode = VDSO_CLOCKMODE_NONE;
2382         }
2383
2384         if (*mode == VDSO_CLOCKMODE_NONE)
2385                 *tsc_timestamp = v = 0;
2386
2387         return v * clock->mult;
2388 }
2389
2390 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2391 {
2392         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2393         unsigned long seq;
2394         int mode;
2395         u64 ns;
2396
2397         do {
2398                 seq = read_seqcount_begin(&gtod->seq);
2399                 ns = gtod->raw_clock.base_cycles;
2400                 ns += vgettsc(&gtod->raw_clock, tsc_timestamp, &mode);
2401                 ns >>= gtod->raw_clock.shift;
2402                 ns += ktime_to_ns(ktime_add(gtod->raw_clock.offset, gtod->offs_boot));
2403         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2404         *t = ns;
2405
2406         return mode;
2407 }
2408
2409 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2410 {
2411         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2412         unsigned long seq;
2413         int mode;
2414         u64 ns;
2415
2416         do {
2417                 seq = read_seqcount_begin(&gtod->seq);
2418                 ts->tv_sec = gtod->wall_time_sec;
2419                 ns = gtod->clock.base_cycles;
2420                 ns += vgettsc(&gtod->clock, tsc_timestamp, &mode);
2421                 ns >>= gtod->clock.shift;
2422         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2423
2424         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2425         ts->tv_nsec = ns;
2426
2427         return mode;
2428 }
2429
2430 /* returns true if host is using TSC based clocksource */
2431 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2432 {
2433         /* checked again under seqlock below */
2434         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2435                 return false;
2436
2437         return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2438                                                       tsc_timestamp));
2439 }
2440
2441 /* returns true if host is using TSC based clocksource */
2442 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2443                                            u64 *tsc_timestamp)
2444 {
2445         /* checked again under seqlock below */
2446         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2447                 return false;
2448
2449         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2450 }
2451 #endif
2452
2453 /*
2454  *
2455  * Assuming a stable TSC across physical CPUS, and a stable TSC
2456  * across virtual CPUs, the following condition is possible.
2457  * Each numbered line represents an event visible to both
2458  * CPUs at the next numbered event.
2459  *
2460  * "timespecX" represents host monotonic time. "tscX" represents
2461  * RDTSC value.
2462  *
2463  *              VCPU0 on CPU0           |       VCPU1 on CPU1
2464  *
2465  * 1.  read timespec0,tsc0
2466  * 2.                                   | timespec1 = timespec0 + N
2467  *                                      | tsc1 = tsc0 + M
2468  * 3. transition to guest               | transition to guest
2469  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2470  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2471  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2472  *
2473  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2474  *
2475  *      - ret0 < ret1
2476  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2477  *              ...
2478  *      - 0 < N - M => M < N
2479  *
2480  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2481  * always the case (the difference between two distinct xtime instances
2482  * might be smaller then the difference between corresponding TSC reads,
2483  * when updating guest vcpus pvclock areas).
2484  *
2485  * To avoid that problem, do not allow visibility of distinct
2486  * system_timestamp/tsc_timestamp values simultaneously: use a master
2487  * copy of host monotonic time values. Update that master copy
2488  * in lockstep.
2489  *
2490  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2491  *
2492  */
2493
2494 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2495 {
2496 #ifdef CONFIG_X86_64
2497         struct kvm_arch *ka = &kvm->arch;
2498         int vclock_mode;
2499         bool host_tsc_clocksource, vcpus_matched;
2500
2501         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2502                         atomic_read(&kvm->online_vcpus));
2503
2504         /*
2505          * If the host uses TSC clock, then passthrough TSC as stable
2506          * to the guest.
2507          */
2508         host_tsc_clocksource = kvm_get_time_and_clockread(
2509                                         &ka->master_kernel_ns,
2510                                         &ka->master_cycle_now);
2511
2512         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2513                                 && !ka->backwards_tsc_observed
2514                                 && !ka->boot_vcpu_runs_old_kvmclock;
2515
2516         if (ka->use_master_clock)
2517                 atomic_set(&kvm_guest_has_master_clock, 1);
2518
2519         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2520         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2521                                         vcpus_matched);
2522 #endif
2523 }
2524
2525 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2526 {
2527         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2528 }
2529
2530 static void kvm_gen_update_masterclock(struct kvm *kvm)
2531 {
2532 #ifdef CONFIG_X86_64
2533         int i;
2534         struct kvm_vcpu *vcpu;
2535         struct kvm_arch *ka = &kvm->arch;
2536
2537         spin_lock(&ka->pvclock_gtod_sync_lock);
2538         kvm_make_mclock_inprogress_request(kvm);
2539         /* no guest entries from this point */
2540         pvclock_update_vm_gtod_copy(kvm);
2541
2542         kvm_for_each_vcpu(i, vcpu, kvm)
2543                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2544
2545         /* guest entries allowed */
2546         kvm_for_each_vcpu(i, vcpu, kvm)
2547                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2548
2549         spin_unlock(&ka->pvclock_gtod_sync_lock);
2550 #endif
2551 }
2552
2553 u64 get_kvmclock_ns(struct kvm *kvm)
2554 {
2555         struct kvm_arch *ka = &kvm->arch;
2556         struct pvclock_vcpu_time_info hv_clock;
2557         u64 ret;
2558
2559         spin_lock(&ka->pvclock_gtod_sync_lock);
2560         if (!ka->use_master_clock) {
2561                 spin_unlock(&ka->pvclock_gtod_sync_lock);
2562                 return get_kvmclock_base_ns() + ka->kvmclock_offset;
2563         }
2564
2565         hv_clock.tsc_timestamp = ka->master_cycle_now;
2566         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2567         spin_unlock(&ka->pvclock_gtod_sync_lock);
2568
2569         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2570         get_cpu();
2571
2572         if (__this_cpu_read(cpu_tsc_khz)) {
2573                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2574                                    &hv_clock.tsc_shift,
2575                                    &hv_clock.tsc_to_system_mul);
2576                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2577         } else
2578                 ret = get_kvmclock_base_ns() + ka->kvmclock_offset;
2579
2580         put_cpu();
2581
2582         return ret;
2583 }
2584
2585 static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
2586 {
2587         struct kvm_vcpu_arch *vcpu = &v->arch;
2588         struct pvclock_vcpu_time_info guest_hv_clock;
2589
2590         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
2591                 &guest_hv_clock, sizeof(guest_hv_clock))))
2592                 return;
2593
2594         /* This VCPU is paused, but it's legal for a guest to read another
2595          * VCPU's kvmclock, so we really have to follow the specification where
2596          * it says that version is odd if data is being modified, and even after
2597          * it is consistent.
2598          *
2599          * Version field updates must be kept separate.  This is because
2600          * kvm_write_guest_cached might use a "rep movs" instruction, and
2601          * writes within a string instruction are weakly ordered.  So there
2602          * are three writes overall.
2603          *
2604          * As a small optimization, only write the version field in the first
2605          * and third write.  The vcpu->pv_time cache is still valid, because the
2606          * version field is the first in the struct.
2607          */
2608         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2609
2610         if (guest_hv_clock.version & 1)
2611                 ++guest_hv_clock.version;  /* first time write, random junk */
2612
2613         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2614         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2615                                 &vcpu->hv_clock,
2616                                 sizeof(vcpu->hv_clock.version));
2617
2618         smp_wmb();
2619
2620         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2621         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2622
2623         if (vcpu->pvclock_set_guest_stopped_request) {
2624                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2625                 vcpu->pvclock_set_guest_stopped_request = false;
2626         }
2627
2628         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2629
2630         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2631                                 &vcpu->hv_clock,
2632                                 sizeof(vcpu->hv_clock));
2633
2634         smp_wmb();
2635
2636         vcpu->hv_clock.version++;
2637         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2638                                 &vcpu->hv_clock,
2639                                 sizeof(vcpu->hv_clock.version));
2640 }
2641
2642 static int kvm_guest_time_update(struct kvm_vcpu *v)
2643 {
2644         unsigned long flags, tgt_tsc_khz;
2645         struct kvm_vcpu_arch *vcpu = &v->arch;
2646         struct kvm_arch *ka = &v->kvm->arch;
2647         s64 kernel_ns;
2648         u64 tsc_timestamp, host_tsc;
2649         u8 pvclock_flags;
2650         bool use_master_clock;
2651
2652         kernel_ns = 0;
2653         host_tsc = 0;
2654
2655         /*
2656          * If the host uses TSC clock, then passthrough TSC as stable
2657          * to the guest.
2658          */
2659         spin_lock(&ka->pvclock_gtod_sync_lock);
2660         use_master_clock = ka->use_master_clock;
2661         if (use_master_clock) {
2662                 host_tsc = ka->master_cycle_now;
2663                 kernel_ns = ka->master_kernel_ns;
2664         }
2665         spin_unlock(&ka->pvclock_gtod_sync_lock);
2666
2667         /* Keep irq disabled to prevent changes to the clock */
2668         local_irq_save(flags);
2669         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2670         if (unlikely(tgt_tsc_khz == 0)) {
2671                 local_irq_restore(flags);
2672                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2673                 return 1;
2674         }
2675         if (!use_master_clock) {
2676                 host_tsc = rdtsc();
2677                 kernel_ns = get_kvmclock_base_ns();
2678         }
2679
2680         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2681
2682         /*
2683          * We may have to catch up the TSC to match elapsed wall clock
2684          * time for two reasons, even if kvmclock is used.
2685          *   1) CPU could have been running below the maximum TSC rate
2686          *   2) Broken TSC compensation resets the base at each VCPU
2687          *      entry to avoid unknown leaps of TSC even when running
2688          *      again on the same CPU.  This may cause apparent elapsed
2689          *      time to disappear, and the guest to stand still or run
2690          *      very slowly.
2691          */
2692         if (vcpu->tsc_catchup) {
2693                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2694                 if (tsc > tsc_timestamp) {
2695                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2696                         tsc_timestamp = tsc;
2697                 }
2698         }
2699
2700         local_irq_restore(flags);
2701
2702         /* With all the info we got, fill in the values */
2703
2704         if (kvm_has_tsc_control)
2705                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
2706
2707         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2708                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2709                                    &vcpu->hv_clock.tsc_shift,
2710                                    &vcpu->hv_clock.tsc_to_system_mul);
2711                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2712         }
2713
2714         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2715         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2716         vcpu->last_guest_tsc = tsc_timestamp;
2717
2718         /* If the host uses TSC clocksource, then it is stable */
2719         pvclock_flags = 0;
2720         if (use_master_clock)
2721                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2722
2723         vcpu->hv_clock.flags = pvclock_flags;
2724
2725         if (vcpu->pv_time_enabled)
2726                 kvm_setup_pvclock_page(v);
2727         if (v == kvm_get_vcpu(v->kvm, 0))
2728                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2729         return 0;
2730 }
2731
2732 /*
2733  * kvmclock updates which are isolated to a given vcpu, such as
2734  * vcpu->cpu migration, should not allow system_timestamp from
2735  * the rest of the vcpus to remain static. Otherwise ntp frequency
2736  * correction applies to one vcpu's system_timestamp but not
2737  * the others.
2738  *
2739  * So in those cases, request a kvmclock update for all vcpus.
2740  * We need to rate-limit these requests though, as they can
2741  * considerably slow guests that have a large number of vcpus.
2742  * The time for a remote vcpu to update its kvmclock is bound
2743  * by the delay we use to rate-limit the updates.
2744  */
2745
2746 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2747
2748 static void kvmclock_update_fn(struct work_struct *work)
2749 {
2750         int i;
2751         struct delayed_work *dwork = to_delayed_work(work);
2752         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2753                                            kvmclock_update_work);
2754         struct kvm *kvm = container_of(ka, struct kvm, arch);
2755         struct kvm_vcpu *vcpu;
2756
2757         kvm_for_each_vcpu(i, vcpu, kvm) {
2758                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2759                 kvm_vcpu_kick(vcpu);
2760         }
2761 }
2762
2763 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2764 {
2765         struct kvm *kvm = v->kvm;
2766
2767         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2768         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2769                                         KVMCLOCK_UPDATE_DELAY);
2770 }
2771
2772 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2773
2774 static void kvmclock_sync_fn(struct work_struct *work)
2775 {
2776         struct delayed_work *dwork = to_delayed_work(work);
2777         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2778                                            kvmclock_sync_work);
2779         struct kvm *kvm = container_of(ka, struct kvm, arch);
2780
2781         if (!kvmclock_periodic_sync)
2782                 return;
2783
2784         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2785         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2786                                         KVMCLOCK_SYNC_PERIOD);
2787 }
2788
2789 /*
2790  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
2791  */
2792 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
2793 {
2794         /* McStatusWrEn enabled? */
2795         if (guest_cpuid_is_amd_or_hygon(vcpu))
2796                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
2797
2798         return false;
2799 }
2800
2801 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2802 {
2803         u64 mcg_cap = vcpu->arch.mcg_cap;
2804         unsigned bank_num = mcg_cap & 0xff;
2805         u32 msr = msr_info->index;
2806         u64 data = msr_info->data;
2807
2808         switch (msr) {
2809         case MSR_IA32_MCG_STATUS:
2810                 vcpu->arch.mcg_status = data;
2811                 break;
2812         case MSR_IA32_MCG_CTL:
2813                 if (!(mcg_cap & MCG_CTL_P) &&
2814                     (data || !msr_info->host_initiated))
2815                         return 1;
2816                 if (data != 0 && data != ~(u64)0)
2817                         return 1;
2818                 vcpu->arch.mcg_ctl = data;
2819                 break;
2820         default:
2821                 if (msr >= MSR_IA32_MC0_CTL &&
2822                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2823                         u32 offset = array_index_nospec(
2824                                 msr - MSR_IA32_MC0_CTL,
2825                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
2826
2827                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2828                          * some Linux kernels though clear bit 10 in bank 4 to
2829                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2830                          * this to avoid an uncatched #GP in the guest
2831                          */
2832                         if ((offset & 0x3) == 0 &&
2833                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2834                                 return -1;
2835
2836                         /* MCi_STATUS */
2837                         if (!msr_info->host_initiated &&
2838                             (offset & 0x3) == 1 && data != 0) {
2839                                 if (!can_set_mci_status(vcpu))
2840                                         return -1;
2841                         }
2842
2843                         vcpu->arch.mce_banks[offset] = data;
2844                         break;
2845                 }
2846                 return 1;
2847         }
2848         return 0;
2849 }
2850
2851 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2852 {
2853         struct kvm *kvm = vcpu->kvm;
2854         int lm = is_long_mode(vcpu);
2855         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2856                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2857         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2858                 : kvm->arch.xen_hvm_config.blob_size_32;
2859         u32 page_num = data & ~PAGE_MASK;
2860         u64 page_addr = data & PAGE_MASK;
2861         u8 *page;
2862
2863         if (page_num >= blob_size)
2864                 return 1;
2865
2866         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2867         if (IS_ERR(page))
2868                 return PTR_ERR(page);
2869
2870         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE)) {
2871                 kfree(page);
2872                 return 1;
2873         }
2874         return 0;
2875 }
2876
2877 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu)
2878 {
2879         u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT;
2880
2881         return (vcpu->arch.apf.msr_en_val & mask) == mask;
2882 }
2883
2884 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2885 {
2886         gpa_t gpa = data & ~0x3f;
2887
2888         /* Bits 4:5 are reserved, Should be zero */
2889         if (data & 0x30)
2890                 return 1;
2891
2892         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_VMEXIT) &&
2893             (data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT))
2894                 return 1;
2895
2896         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT) &&
2897             (data & KVM_ASYNC_PF_DELIVERY_AS_INT))
2898                 return 1;
2899
2900         if (!lapic_in_kernel(vcpu))
2901                 return data ? 1 : 0;
2902
2903         vcpu->arch.apf.msr_en_val = data;
2904
2905         if (!kvm_pv_async_pf_enabled(vcpu)) {
2906                 kvm_clear_async_pf_completion_queue(vcpu);
2907                 kvm_async_pf_hash_reset(vcpu);
2908                 return 0;
2909         }
2910
2911         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2912                                         sizeof(u64)))
2913                 return 1;
2914
2915         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2916         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
2917
2918         kvm_async_pf_wakeup_all(vcpu);
2919
2920         return 0;
2921 }
2922
2923 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu *vcpu, u64 data)
2924 {
2925         /* Bits 8-63 are reserved */
2926         if (data >> 8)
2927                 return 1;
2928
2929         if (!lapic_in_kernel(vcpu))
2930                 return 1;
2931
2932         vcpu->arch.apf.msr_int_val = data;
2933
2934         vcpu->arch.apf.vec = data & KVM_ASYNC_PF_VEC_MASK;
2935
2936         return 0;
2937 }
2938
2939 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2940 {
2941         vcpu->arch.pv_time_enabled = false;
2942         vcpu->arch.time = 0;
2943 }
2944
2945 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu *vcpu)
2946 {
2947         ++vcpu->stat.tlb_flush;
2948         kvm_x86_ops.tlb_flush_all(vcpu);
2949 }
2950
2951 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu)
2952 {
2953         ++vcpu->stat.tlb_flush;
2954         kvm_x86_ops.tlb_flush_guest(vcpu);
2955 }
2956
2957 static void record_steal_time(struct kvm_vcpu *vcpu)
2958 {
2959         struct kvm_host_map map;
2960         struct kvm_steal_time *st;
2961
2962         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2963                 return;
2964
2965         /* -EAGAIN is returned in atomic context so we can just return. */
2966         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT,
2967                         &map, &vcpu->arch.st.cache, false))
2968                 return;
2969
2970         st = map.hva +
2971                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
2972
2973         /*
2974          * Doing a TLB flush here, on the guest's behalf, can avoid
2975          * expensive IPIs.
2976          */
2977         if (guest_pv_has(vcpu, KVM_FEATURE_PV_TLB_FLUSH)) {
2978                 trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
2979                                        st->preempted & KVM_VCPU_FLUSH_TLB);
2980                 if (xchg(&st->preempted, 0) & KVM_VCPU_FLUSH_TLB)
2981                         kvm_vcpu_flush_tlb_guest(vcpu);
2982         }
2983
2984         vcpu->arch.st.preempted = 0;
2985
2986         if (st->version & 1)
2987                 st->version += 1;  /* first time write, random junk */
2988
2989         st->version += 1;
2990
2991         smp_wmb();
2992
2993         st->steal += current->sched_info.run_delay -
2994                 vcpu->arch.st.last_steal;
2995         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2996
2997         smp_wmb();
2998
2999         st->version += 1;
3000
3001         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, false);
3002 }
3003
3004 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3005 {
3006         bool pr = false;
3007         u32 msr = msr_info->index;
3008         u64 data = msr_info->data;
3009
3010         switch (msr) {
3011         case MSR_AMD64_NB_CFG:
3012         case MSR_IA32_UCODE_WRITE:
3013         case MSR_VM_HSAVE_PA:
3014         case MSR_AMD64_PATCH_LOADER:
3015         case MSR_AMD64_BU_CFG2:
3016         case MSR_AMD64_DC_CFG:
3017         case MSR_F15H_EX_CFG:
3018                 break;
3019
3020         case MSR_IA32_UCODE_REV:
3021                 if (msr_info->host_initiated)
3022                         vcpu->arch.microcode_version = data;
3023                 break;
3024         case MSR_IA32_ARCH_CAPABILITIES:
3025                 if (!msr_info->host_initiated)
3026                         return 1;
3027                 vcpu->arch.arch_capabilities = data;
3028                 break;
3029         case MSR_IA32_PERF_CAPABILITIES: {
3030                 struct kvm_msr_entry msr_ent = {.index = msr, .data = 0};
3031
3032                 if (!msr_info->host_initiated)
3033                         return 1;
3034                 if (guest_cpuid_has(vcpu, X86_FEATURE_PDCM) && kvm_get_msr_feature(&msr_ent))
3035                         return 1;
3036                 if (data & ~msr_ent.data)
3037                         return 1;
3038
3039                 vcpu->arch.perf_capabilities = data;
3040
3041                 return 0;
3042                 }
3043         case MSR_EFER:
3044                 return set_efer(vcpu, msr_info);
3045         case MSR_K7_HWCR:
3046                 data &= ~(u64)0x40;     /* ignore flush filter disable */
3047                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
3048                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
3049
3050                 /* Handle McStatusWrEn */
3051                 if (data == BIT_ULL(18)) {
3052                         vcpu->arch.msr_hwcr = data;
3053                 } else if (data != 0) {
3054                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
3055                                     data);
3056                         return 1;
3057                 }
3058                 break;
3059         case MSR_FAM10H_MMIO_CONF_BASE:
3060                 if (data != 0) {
3061                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
3062                                     "0x%llx\n", data);
3063                         return 1;
3064                 }
3065                 break;
3066         case MSR_IA32_DEBUGCTLMSR:
3067                 if (!data) {
3068                         /* We support the non-activated case already */
3069                         break;
3070                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
3071                         /* Values other than LBR and BTF are vendor-specific,
3072                            thus reserved and should throw a #GP */
3073                         return 1;
3074                 } else if (report_ignored_msrs)
3075                         vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
3076                                     __func__, data);
3077                 break;
3078         case 0x200 ... 0x2ff:
3079                 return kvm_mtrr_set_msr(vcpu, msr, data);
3080         case MSR_IA32_APICBASE:
3081                 return kvm_set_apic_base(vcpu, msr_info);
3082         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3083                 return kvm_x2apic_msr_write(vcpu, msr, data);
3084         case MSR_IA32_TSCDEADLINE:
3085                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
3086                 break;
3087         case MSR_IA32_TSC_ADJUST:
3088                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
3089                         if (!msr_info->host_initiated) {
3090                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
3091                                 adjust_tsc_offset_guest(vcpu, adj);
3092                         }
3093                         vcpu->arch.ia32_tsc_adjust_msr = data;
3094                 }
3095                 break;
3096         case MSR_IA32_MISC_ENABLE:
3097                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
3098                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
3099                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
3100                                 return 1;
3101                         vcpu->arch.ia32_misc_enable_msr = data;
3102                         kvm_update_cpuid_runtime(vcpu);
3103                 } else {
3104                         vcpu->arch.ia32_misc_enable_msr = data;
3105                 }
3106                 break;
3107         case MSR_IA32_SMBASE:
3108                 if (!msr_info->host_initiated)
3109                         return 1;
3110                 vcpu->arch.smbase = data;
3111                 break;
3112         case MSR_IA32_POWER_CTL:
3113                 vcpu->arch.msr_ia32_power_ctl = data;
3114                 break;
3115         case MSR_IA32_TSC:
3116                 if (msr_info->host_initiated) {
3117                         kvm_synchronize_tsc(vcpu, data);
3118                 } else {
3119                         u64 adj = kvm_compute_tsc_offset(vcpu, data) - vcpu->arch.l1_tsc_offset;
3120                         adjust_tsc_offset_guest(vcpu, adj);
3121                         vcpu->arch.ia32_tsc_adjust_msr += adj;
3122                 }
3123                 break;
3124         case MSR_IA32_XSS:
3125                 if (!msr_info->host_initiated &&
3126                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3127                         return 1;
3128                 /*
3129                  * KVM supports exposing PT to the guest, but does not support
3130                  * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3131                  * XSAVES/XRSTORS to save/restore PT MSRs.
3132                  */
3133                 if (data & ~supported_xss)
3134                         return 1;
3135                 vcpu->arch.ia32_xss = data;
3136                 break;
3137         case MSR_SMI_COUNT:
3138                 if (!msr_info->host_initiated)
3139                         return 1;
3140                 vcpu->arch.smi_count = data;
3141                 break;
3142         case MSR_KVM_WALL_CLOCK_NEW:
3143                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3144                         return 1;
3145
3146                 kvm_write_wall_clock(vcpu->kvm, data);
3147                 break;
3148         case MSR_KVM_WALL_CLOCK:
3149                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3150                         return 1;
3151
3152                 kvm_write_wall_clock(vcpu->kvm, data);
3153                 break;
3154         case MSR_KVM_SYSTEM_TIME_NEW:
3155                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3156                         return 1;
3157
3158                 kvm_write_system_time(vcpu, data, false, msr_info->host_initiated);
3159                 break;
3160         case MSR_KVM_SYSTEM_TIME:
3161                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3162                         return 1;
3163
3164                 kvm_write_system_time(vcpu, data, true,  msr_info->host_initiated);
3165                 break;
3166         case MSR_KVM_ASYNC_PF_EN:
3167                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3168                         return 1;
3169
3170                 if (kvm_pv_enable_async_pf(vcpu, data))
3171                         return 1;
3172                 break;
3173         case MSR_KVM_ASYNC_PF_INT:
3174                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3175                         return 1;
3176
3177                 if (kvm_pv_enable_async_pf_int(vcpu, data))
3178                         return 1;
3179                 break;
3180         case MSR_KVM_ASYNC_PF_ACK:
3181                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3182                         return 1;
3183                 if (data & 0x1) {
3184                         vcpu->arch.apf.pageready_pending = false;
3185                         kvm_check_async_pf_completion(vcpu);
3186                 }
3187                 break;
3188         case MSR_KVM_STEAL_TIME:
3189                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3190                         return 1;
3191
3192                 if (unlikely(!sched_info_on()))
3193                         return 1;
3194
3195                 if (data & KVM_STEAL_RESERVED_MASK)
3196                         return 1;
3197
3198                 vcpu->arch.st.msr_val = data;
3199
3200                 if (!(data & KVM_MSR_ENABLED))
3201                         break;
3202
3203                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3204
3205                 break;
3206         case MSR_KVM_PV_EOI_EN:
3207                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3208                         return 1;
3209
3210                 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
3211                         return 1;
3212                 break;
3213
3214         case MSR_KVM_POLL_CONTROL:
3215                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3216                         return 1;
3217
3218                 /* only enable bit supported */
3219                 if (data & (-1ULL << 1))
3220                         return 1;
3221
3222                 vcpu->arch.msr_kvm_poll_control = data;
3223                 break;
3224
3225         case MSR_IA32_MCG_CTL:
3226         case MSR_IA32_MCG_STATUS:
3227         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3228                 return set_msr_mce(vcpu, msr_info);
3229
3230         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3231         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3232                 pr = true;
3233                 fallthrough;
3234         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3235         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3236                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3237                         return kvm_pmu_set_msr(vcpu, msr_info);
3238
3239                 if (pr || data != 0)
3240                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
3241                                     "0x%x data 0x%llx\n", msr, data);
3242                 break;
3243         case MSR_K7_CLK_CTL:
3244                 /*
3245                  * Ignore all writes to this no longer documented MSR.
3246                  * Writes are only relevant for old K7 processors,
3247                  * all pre-dating SVM, but a recommended workaround from
3248                  * AMD for these chips. It is possible to specify the
3249                  * affected processor models on the command line, hence
3250                  * the need to ignore the workaround.
3251                  */
3252                 break;
3253         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3254         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3255         case HV_X64_MSR_SYNDBG_OPTIONS:
3256         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3257         case HV_X64_MSR_CRASH_CTL:
3258         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3259         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3260         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3261         case HV_X64_MSR_TSC_EMULATION_STATUS:
3262                 return kvm_hv_set_msr_common(vcpu, msr, data,
3263                                              msr_info->host_initiated);
3264         case MSR_IA32_BBL_CR_CTL3:
3265                 /* Drop writes to this legacy MSR -- see rdmsr
3266                  * counterpart for further detail.
3267                  */
3268                 if (report_ignored_msrs)
3269                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
3270                                 msr, data);
3271                 break;
3272         case MSR_AMD64_OSVW_ID_LENGTH:
3273                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3274                         return 1;
3275                 vcpu->arch.osvw.length = data;
3276                 break;
3277         case MSR_AMD64_OSVW_STATUS:
3278                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3279                         return 1;
3280                 vcpu->arch.osvw.status = data;
3281                 break;
3282         case MSR_PLATFORM_INFO:
3283                 if (!msr_info->host_initiated ||
3284                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
3285                      cpuid_fault_enabled(vcpu)))
3286                         return 1;
3287                 vcpu->arch.msr_platform_info = data;
3288                 break;
3289         case MSR_MISC_FEATURES_ENABLES:
3290                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
3291                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
3292                      !supports_cpuid_fault(vcpu)))
3293                         return 1;
3294                 vcpu->arch.msr_misc_features_enables = data;
3295                 break;
3296         default:
3297                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
3298                         return xen_hvm_config(vcpu, data);
3299                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3300                         return kvm_pmu_set_msr(vcpu, msr_info);
3301                 return KVM_MSR_RET_INVALID;
3302         }
3303         return 0;
3304 }
3305 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
3306
3307 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
3308 {
3309         u64 data;
3310         u64 mcg_cap = vcpu->arch.mcg_cap;
3311         unsigned bank_num = mcg_cap & 0xff;
3312
3313         switch (msr) {
3314         case MSR_IA32_P5_MC_ADDR:
3315         case MSR_IA32_P5_MC_TYPE:
3316                 data = 0;
3317                 break;
3318         case MSR_IA32_MCG_CAP:
3319                 data = vcpu->arch.mcg_cap;
3320                 break;
3321         case MSR_IA32_MCG_CTL:
3322                 if (!(mcg_cap & MCG_CTL_P) && !host)
3323                         return 1;
3324                 data = vcpu->arch.mcg_ctl;
3325                 break;
3326         case MSR_IA32_MCG_STATUS:
3327                 data = vcpu->arch.mcg_status;
3328                 break;
3329         default:
3330                 if (msr >= MSR_IA32_MC0_CTL &&
3331                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3332                         u32 offset = array_index_nospec(
3333                                 msr - MSR_IA32_MC0_CTL,
3334                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3335
3336                         data = vcpu->arch.mce_banks[offset];
3337                         break;
3338                 }
3339                 return 1;
3340         }
3341         *pdata = data;
3342         return 0;
3343 }
3344
3345 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3346 {
3347         switch (msr_info->index) {
3348         case MSR_IA32_PLATFORM_ID:
3349         case MSR_IA32_EBL_CR_POWERON:
3350         case MSR_IA32_DEBUGCTLMSR:
3351         case MSR_IA32_LASTBRANCHFROMIP:
3352         case MSR_IA32_LASTBRANCHTOIP:
3353         case MSR_IA32_LASTINTFROMIP:
3354         case MSR_IA32_LASTINTTOIP:
3355         case MSR_K8_SYSCFG:
3356         case MSR_K8_TSEG_ADDR:
3357         case MSR_K8_TSEG_MASK:
3358         case MSR_VM_HSAVE_PA:
3359         case MSR_K8_INT_PENDING_MSG:
3360         case MSR_AMD64_NB_CFG:
3361         case MSR_FAM10H_MMIO_CONF_BASE:
3362         case MSR_AMD64_BU_CFG2:
3363         case MSR_IA32_PERF_CTL:
3364         case MSR_AMD64_DC_CFG:
3365         case MSR_F15H_EX_CFG:
3366         /*
3367          * Intel Sandy Bridge CPUs must support the RAPL (running average power
3368          * limit) MSRs. Just return 0, as we do not want to expose the host
3369          * data here. Do not conditionalize this on CPUID, as KVM does not do
3370          * so for existing CPU-specific MSRs.
3371          */
3372         case MSR_RAPL_POWER_UNIT:
3373         case MSR_PP0_ENERGY_STATUS:     /* Power plane 0 (core) */
3374         case MSR_PP1_ENERGY_STATUS:     /* Power plane 1 (graphics uncore) */
3375         case MSR_PKG_ENERGY_STATUS:     /* Total package */
3376         case MSR_DRAM_ENERGY_STATUS:    /* DRAM controller */
3377                 msr_info->data = 0;
3378                 break;
3379         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3380         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3381         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3382         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3383         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3384                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3385                         return kvm_pmu_get_msr(vcpu, msr_info);
3386                 msr_info->data = 0;
3387                 break;
3388         case MSR_IA32_UCODE_REV:
3389                 msr_info->data = vcpu->arch.microcode_version;
3390                 break;
3391         case MSR_IA32_ARCH_CAPABILITIES:
3392                 if (!msr_info->host_initiated &&
3393                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
3394                         return 1;
3395                 msr_info->data = vcpu->arch.arch_capabilities;
3396                 break;
3397         case MSR_IA32_PERF_CAPABILITIES:
3398                 if (!msr_info->host_initiated &&
3399                     !guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
3400                         return 1;
3401                 msr_info->data = vcpu->arch.perf_capabilities;
3402                 break;
3403         case MSR_IA32_POWER_CTL:
3404                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
3405                 break;
3406         case MSR_IA32_TSC: {
3407                 /*
3408                  * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3409                  * even when not intercepted. AMD manual doesn't explicitly
3410                  * state this but appears to behave the same.
3411                  *
3412                  * On userspace reads and writes, however, we unconditionally
3413                  * return L1's TSC value to ensure backwards-compatible
3414                  * behavior for migration.
3415                  */
3416                 u64 tsc_offset = msr_info->host_initiated ? vcpu->arch.l1_tsc_offset :
3417                                                             vcpu->arch.tsc_offset;
3418
3419                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc()) + tsc_offset;
3420                 break;
3421         }
3422         case MSR_MTRRcap:
3423         case 0x200 ... 0x2ff:
3424                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
3425         case 0xcd: /* fsb frequency */
3426                 msr_info->data = 3;
3427                 break;
3428                 /*
3429                  * MSR_EBC_FREQUENCY_ID
3430                  * Conservative value valid for even the basic CPU models.
3431                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3432                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3433                  * and 266MHz for model 3, or 4. Set Core Clock
3434                  * Frequency to System Bus Frequency Ratio to 1 (bits
3435                  * 31:24) even though these are only valid for CPU
3436                  * models > 2, however guests may end up dividing or
3437                  * multiplying by zero otherwise.
3438                  */
3439         case MSR_EBC_FREQUENCY_ID:
3440                 msr_info->data = 1 << 24;
3441                 break;
3442         case MSR_IA32_APICBASE:
3443                 msr_info->data = kvm_get_apic_base(vcpu);
3444                 break;
3445         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3446                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
3447         case MSR_IA32_TSCDEADLINE:
3448                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
3449                 break;
3450         case MSR_IA32_TSC_ADJUST:
3451                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
3452                 break;
3453         case MSR_IA32_MISC_ENABLE:
3454                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
3455                 break;
3456         case MSR_IA32_SMBASE:
3457                 if (!msr_info->host_initiated)
3458                         return 1;
3459                 msr_info->data = vcpu->arch.smbase;
3460                 break;
3461         case MSR_SMI_COUNT:
3462                 msr_info->data = vcpu->arch.smi_count;
3463                 break;
3464         case MSR_IA32_PERF_STATUS:
3465                 /* TSC increment by tick */
3466                 msr_info->data = 1000ULL;
3467                 /* CPU multiplier */
3468                 msr_info->data |= (((uint64_t)4ULL) << 40);
3469                 break;
3470         case MSR_EFER:
3471                 msr_info->data = vcpu->arch.efer;
3472                 break;
3473         case MSR_KVM_WALL_CLOCK:
3474                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3475                         return 1;
3476
3477                 msr_info->data = vcpu->kvm->arch.wall_clock;
3478                 break;
3479         case MSR_KVM_WALL_CLOCK_NEW:
3480                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3481                         return 1;
3482
3483                 msr_info->data = vcpu->kvm->arch.wall_clock;
3484                 break;
3485         case MSR_KVM_SYSTEM_TIME:
3486                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3487                         return 1;
3488
3489                 msr_info->data = vcpu->arch.time;
3490                 break;
3491         case MSR_KVM_SYSTEM_TIME_NEW:
3492                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3493                         return 1;
3494
3495                 msr_info->data = vcpu->arch.time;
3496                 break;
3497         case MSR_KVM_ASYNC_PF_EN:
3498                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3499                         return 1;
3500
3501                 msr_info->data = vcpu->arch.apf.msr_en_val;
3502                 break;
3503         case MSR_KVM_ASYNC_PF_INT:
3504                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3505                         return 1;
3506
3507                 msr_info->data = vcpu->arch.apf.msr_int_val;
3508                 break;
3509         case MSR_KVM_ASYNC_PF_ACK:
3510                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3511                         return 1;
3512
3513                 msr_info->data = 0;
3514                 break;
3515         case MSR_KVM_STEAL_TIME:
3516                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3517                         return 1;
3518
3519                 msr_info->data = vcpu->arch.st.msr_val;
3520                 break;
3521         case MSR_KVM_PV_EOI_EN:
3522                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3523                         return 1;
3524
3525                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3526                 break;
3527         case MSR_KVM_POLL_CONTROL:
3528                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3529                         return 1;
3530
3531                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3532                 break;
3533         case MSR_IA32_P5_MC_ADDR:
3534         case MSR_IA32_P5_MC_TYPE:
3535         case MSR_IA32_MCG_CAP:
3536         case MSR_IA32_MCG_CTL:
3537         case MSR_IA32_MCG_STATUS:
3538         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3539                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3540                                    msr_info->host_initiated);
3541         case MSR_IA32_XSS:
3542                 if (!msr_info->host_initiated &&
3543                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3544                         return 1;
3545                 msr_info->data = vcpu->arch.ia32_xss;
3546                 break;
3547         case MSR_K7_CLK_CTL:
3548                 /*
3549                  * Provide expected ramp-up count for K7. All other
3550                  * are set to zero, indicating minimum divisors for
3551                  * every field.
3552                  *
3553                  * This prevents guest kernels on AMD host with CPU
3554                  * type 6, model 8 and higher from exploding due to
3555                  * the rdmsr failing.
3556                  */
3557                 msr_info->data = 0x20000000;
3558                 break;
3559         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3560         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3561         case HV_X64_MSR_SYNDBG_OPTIONS:
3562         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3563         case HV_X64_MSR_CRASH_CTL:
3564         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3565         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3566         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3567         case HV_X64_MSR_TSC_EMULATION_STATUS:
3568                 return kvm_hv_get_msr_common(vcpu,
3569                                              msr_info->index, &msr_info->data,
3570                                              msr_info->host_initiated);
3571         case MSR_IA32_BBL_CR_CTL3:
3572                 /* This legacy MSR exists but isn't fully documented in current
3573                  * silicon.  It is however accessed by winxp in very narrow
3574                  * scenarios where it sets bit #19, itself documented as
3575                  * a "reserved" bit.  Best effort attempt to source coherent
3576                  * read data here should the balance of the register be
3577                  * interpreted by the guest:
3578                  *
3579                  * L2 cache control register 3: 64GB range, 256KB size,
3580                  * enabled, latency 0x1, configured
3581                  */
3582                 msr_info->data = 0xbe702111;
3583                 break;
3584         case MSR_AMD64_OSVW_ID_LENGTH:
3585                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3586                         return 1;
3587                 msr_info->data = vcpu->arch.osvw.length;
3588                 break;
3589         case MSR_AMD64_OSVW_STATUS:
3590                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3591                         return 1;
3592                 msr_info->data = vcpu->arch.osvw.status;
3593                 break;
3594         case MSR_PLATFORM_INFO:
3595                 if (!msr_info->host_initiated &&
3596                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
3597                         return 1;
3598                 msr_info->data = vcpu->arch.msr_platform_info;
3599                 break;
3600         case MSR_MISC_FEATURES_ENABLES:
3601                 msr_info->data = vcpu->arch.msr_misc_features_enables;
3602                 break;
3603         case MSR_K7_HWCR:
3604                 msr_info->data = vcpu->arch.msr_hwcr;
3605                 break;
3606         default:
3607                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3608                         return kvm_pmu_get_msr(vcpu, msr_info);
3609                 return KVM_MSR_RET_INVALID;
3610         }
3611         return 0;
3612 }
3613 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
3614
3615 /*
3616  * Read or write a bunch of msrs. All parameters are kernel addresses.
3617  *
3618  * @return number of msrs set successfully.
3619  */
3620 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
3621                     struct kvm_msr_entry *entries,
3622                     int (*do_msr)(struct kvm_vcpu *vcpu,
3623                                   unsigned index, u64 *data))
3624 {
3625         int i;
3626
3627         for (i = 0; i < msrs->nmsrs; ++i)
3628                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
3629                         break;
3630
3631         return i;
3632 }
3633
3634 /*
3635  * Read or write a bunch of msrs. Parameters are user addresses.
3636  *
3637  * @return number of msrs set successfully.
3638  */
3639 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
3640                   int (*do_msr)(struct kvm_vcpu *vcpu,
3641                                 unsigned index, u64 *data),
3642                   int writeback)
3643 {
3644         struct kvm_msrs msrs;
3645         struct kvm_msr_entry *entries;
3646         int r, n;
3647         unsigned size;
3648
3649         r = -EFAULT;
3650         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
3651                 goto out;
3652
3653         r = -E2BIG;
3654         if (msrs.nmsrs >= MAX_IO_MSRS)
3655                 goto out;
3656
3657         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
3658         entries = memdup_user(user_msrs->entries, size);
3659         if (IS_ERR(entries)) {
3660                 r = PTR_ERR(entries);
3661                 goto out;
3662         }
3663
3664         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
3665         if (r < 0)
3666                 goto out_free;
3667
3668         r = -EFAULT;
3669         if (writeback && copy_to_user(user_msrs->entries, entries, size))
3670                 goto out_free;
3671
3672         r = n;
3673
3674 out_free:
3675         kfree(entries);
3676 out:
3677         return r;
3678 }
3679
3680 static inline bool kvm_can_mwait_in_guest(void)
3681 {
3682         return boot_cpu_has(X86_FEATURE_MWAIT) &&
3683                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
3684                 boot_cpu_has(X86_FEATURE_ARAT);
3685 }
3686
3687 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu *vcpu,
3688                                             struct kvm_cpuid2 __user *cpuid_arg)
3689 {
3690         struct kvm_cpuid2 cpuid;
3691         int r;
3692
3693         r = -EFAULT;
3694         if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3695                 return r;
3696
3697         r = kvm_get_hv_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3698         if (r)
3699                 return r;
3700
3701         r = -EFAULT;
3702         if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3703                 return r;
3704
3705         return 0;
3706 }
3707
3708 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
3709 {
3710         int r = 0;
3711
3712         switch (ext) {
3713         case KVM_CAP_IRQCHIP:
3714         case KVM_CAP_HLT:
3715         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
3716         case KVM_CAP_SET_TSS_ADDR:
3717         case KVM_CAP_EXT_CPUID:
3718         case KVM_CAP_EXT_EMUL_CPUID:
3719         case KVM_CAP_CLOCKSOURCE:
3720         case KVM_CAP_PIT:
3721         case KVM_CAP_NOP_IO_DELAY:
3722         case KVM_CAP_MP_STATE:
3723         case KVM_CAP_SYNC_MMU:
3724         case KVM_CAP_USER_NMI:
3725         case KVM_CAP_REINJECT_CONTROL:
3726         case KVM_CAP_IRQ_INJECT_STATUS:
3727         case KVM_CAP_IOEVENTFD:
3728         case KVM_CAP_IOEVENTFD_NO_LENGTH:
3729         case KVM_CAP_PIT2:
3730         case KVM_CAP_PIT_STATE2:
3731         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
3732         case KVM_CAP_XEN_HVM:
3733         case KVM_CAP_VCPU_EVENTS:
3734         case KVM_CAP_HYPERV:
3735         case KVM_CAP_HYPERV_VAPIC:
3736         case KVM_CAP_HYPERV_SPIN:
3737         case KVM_CAP_HYPERV_SYNIC:
3738         case KVM_CAP_HYPERV_SYNIC2:
3739         case KVM_CAP_HYPERV_VP_INDEX:
3740         case KVM_CAP_HYPERV_EVENTFD:
3741         case KVM_CAP_HYPERV_TLBFLUSH:
3742         case KVM_CAP_HYPERV_SEND_IPI:
3743         case KVM_CAP_HYPERV_CPUID:
3744         case KVM_CAP_SYS_HYPERV_CPUID:
3745         case KVM_CAP_PCI_SEGMENT:
3746         case KVM_CAP_DEBUGREGS:
3747         case KVM_CAP_X86_ROBUST_SINGLESTEP:
3748         case KVM_CAP_XSAVE:
3749         case KVM_CAP_ASYNC_PF:
3750         case KVM_CAP_ASYNC_PF_INT:
3751         case KVM_CAP_GET_TSC_KHZ:
3752         case KVM_CAP_KVMCLOCK_CTRL:
3753         case KVM_CAP_READONLY_MEM:
3754         case KVM_CAP_HYPERV_TIME:
3755         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
3756         case KVM_CAP_TSC_DEADLINE_TIMER:
3757         case KVM_CAP_DISABLE_QUIRKS:
3758         case KVM_CAP_SET_BOOT_CPU_ID:
3759         case KVM_CAP_SPLIT_IRQCHIP:
3760         case KVM_CAP_IMMEDIATE_EXIT:
3761         case KVM_CAP_PMU_EVENT_FILTER:
3762         case KVM_CAP_GET_MSR_FEATURES:
3763         case KVM_CAP_MSR_PLATFORM_INFO:
3764         case KVM_CAP_EXCEPTION_PAYLOAD:
3765         case KVM_CAP_SET_GUEST_DEBUG:
3766         case KVM_CAP_LAST_CPU:
3767         case KVM_CAP_X86_USER_SPACE_MSR:
3768         case KVM_CAP_X86_MSR_FILTER:
3769         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
3770                 r = 1;
3771                 break;
3772         case KVM_CAP_SYNC_REGS:
3773                 r = KVM_SYNC_X86_VALID_FIELDS;
3774                 break;
3775         case KVM_CAP_ADJUST_CLOCK:
3776                 r = KVM_CLOCK_TSC_STABLE;
3777                 break;
3778         case KVM_CAP_X86_DISABLE_EXITS:
3779                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
3780                       KVM_X86_DISABLE_EXITS_CSTATE;
3781                 if(kvm_can_mwait_in_guest())
3782                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
3783                 break;
3784         case KVM_CAP_X86_SMM:
3785                 /* SMBASE is usually relocated above 1M on modern chipsets,
3786                  * and SMM handlers might indeed rely on 4G segment limits,
3787                  * so do not report SMM to be available if real mode is
3788                  * emulated via vm86 mode.  Still, do not go to great lengths
3789                  * to avoid userspace's usage of the feature, because it is a
3790                  * fringe case that is not enabled except via specific settings
3791                  * of the module parameters.
3792                  */
3793                 r = kvm_x86_ops.has_emulated_msr(kvm, MSR_IA32_SMBASE);
3794                 break;
3795         case KVM_CAP_VAPIC:
3796                 r = !kvm_x86_ops.cpu_has_accelerated_tpr();
3797                 break;
3798         case KVM_CAP_NR_VCPUS:
3799                 r = KVM_SOFT_MAX_VCPUS;
3800                 break;
3801         case KVM_CAP_MAX_VCPUS:
3802                 r = KVM_MAX_VCPUS;
3803                 break;
3804         case KVM_CAP_MAX_VCPU_ID:
3805                 r = KVM_MAX_VCPU_ID;
3806                 break;
3807         case KVM_CAP_PV_MMU:    /* obsolete */
3808                 r = 0;
3809                 break;
3810         case KVM_CAP_MCE:
3811                 r = KVM_MAX_MCE_BANKS;
3812                 break;
3813         case KVM_CAP_XCRS:
3814                 r = boot_cpu_has(X86_FEATURE_XSAVE);
3815                 break;
3816         case KVM_CAP_TSC_CONTROL:
3817                 r = kvm_has_tsc_control;
3818                 break;
3819         case KVM_CAP_X2APIC_API:
3820                 r = KVM_X2APIC_API_VALID_FLAGS;
3821                 break;
3822         case KVM_CAP_NESTED_STATE:
3823                 r = kvm_x86_ops.nested_ops->get_state ?
3824                         kvm_x86_ops.nested_ops->get_state(NULL, NULL, 0) : 0;
3825                 break;
3826         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
3827                 r = kvm_x86_ops.enable_direct_tlbflush != NULL;
3828                 break;
3829         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
3830                 r = kvm_x86_ops.nested_ops->enable_evmcs != NULL;
3831                 break;
3832         case KVM_CAP_SMALLER_MAXPHYADDR:
3833                 r = (int) allow_smaller_maxphyaddr;
3834                 break;
3835         case KVM_CAP_STEAL_TIME:
3836                 r = sched_info_on();
3837                 break;
3838         default:
3839                 break;
3840         }
3841         return r;
3842
3843 }
3844
3845 long kvm_arch_dev_ioctl(struct file *filp,
3846                         unsigned int ioctl, unsigned long arg)
3847 {
3848         void __user *argp = (void __user *)arg;
3849         long r;
3850
3851         switch (ioctl) {
3852         case KVM_GET_MSR_INDEX_LIST: {
3853                 struct kvm_msr_list __user *user_msr_list = argp;
3854                 struct kvm_msr_list msr_list;
3855                 unsigned n;
3856
3857                 r = -EFAULT;
3858                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3859                         goto out;
3860                 n = msr_list.nmsrs;
3861                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
3862                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3863                         goto out;
3864                 r = -E2BIG;
3865                 if (n < msr_list.nmsrs)
3866                         goto out;
3867                 r = -EFAULT;
3868                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
3869                                  num_msrs_to_save * sizeof(u32)))
3870                         goto out;
3871                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
3872                                  &emulated_msrs,
3873                                  num_emulated_msrs * sizeof(u32)))
3874                         goto out;
3875                 r = 0;
3876                 break;
3877         }
3878         case KVM_GET_SUPPORTED_CPUID:
3879         case KVM_GET_EMULATED_CPUID: {
3880                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3881                 struct kvm_cpuid2 cpuid;
3882
3883                 r = -EFAULT;
3884                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3885                         goto out;
3886
3887                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
3888                                             ioctl);
3889                 if (r)
3890                         goto out;
3891
3892                 r = -EFAULT;
3893                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3894                         goto out;
3895                 r = 0;
3896                 break;
3897         }
3898         case KVM_X86_GET_MCE_CAP_SUPPORTED:
3899                 r = -EFAULT;
3900                 if (copy_to_user(argp, &kvm_mce_cap_supported,
3901                                  sizeof(kvm_mce_cap_supported)))
3902                         goto out;
3903                 r = 0;
3904                 break;
3905         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
3906                 struct kvm_msr_list __user *user_msr_list = argp;
3907                 struct kvm_msr_list msr_list;
3908                 unsigned int n;
3909
3910                 r = -EFAULT;
3911                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3912                         goto out;
3913                 n = msr_list.nmsrs;
3914                 msr_list.nmsrs = num_msr_based_features;
3915                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3916                         goto out;
3917                 r = -E2BIG;
3918                 if (n < msr_list.nmsrs)
3919                         goto out;
3920                 r = -EFAULT;
3921                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
3922                                  num_msr_based_features * sizeof(u32)))
3923                         goto out;
3924                 r = 0;
3925                 break;
3926         }
3927         case KVM_GET_MSRS:
3928                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
3929                 break;
3930         case KVM_GET_SUPPORTED_HV_CPUID:
3931                 r = kvm_ioctl_get_supported_hv_cpuid(NULL, argp);
3932                 break;
3933         default:
3934                 r = -EINVAL;
3935                 break;
3936         }
3937 out:
3938         return r;
3939 }
3940
3941 static void wbinvd_ipi(void *garbage)
3942 {
3943         wbinvd();
3944 }
3945
3946 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
3947 {
3948         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
3949 }
3950
3951 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
3952 {
3953         /* Address WBINVD may be executed by guest */
3954         if (need_emulate_wbinvd(vcpu)) {
3955                 if (kvm_x86_ops.has_wbinvd_exit())
3956                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
3957                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
3958                         smp_call_function_single(vcpu->cpu,
3959                                         wbinvd_ipi, NULL, 1);
3960         }
3961
3962         kvm_x86_ops.vcpu_load(vcpu, cpu);
3963
3964         /* Save host pkru register if supported */
3965         vcpu->arch.host_pkru = read_pkru();
3966
3967         /* Apply any externally detected TSC adjustments (due to suspend) */
3968         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
3969                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
3970                 vcpu->arch.tsc_offset_adjustment = 0;
3971                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3972         }
3973
3974         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
3975                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
3976                                 rdtsc() - vcpu->arch.last_host_tsc;
3977                 if (tsc_delta < 0)
3978                         mark_tsc_unstable("KVM discovered backwards TSC");
3979
3980                 if (kvm_check_tsc_unstable()) {
3981                         u64 offset = kvm_compute_tsc_offset(vcpu,
3982                                                 vcpu->arch.last_guest_tsc);
3983                         kvm_vcpu_write_tsc_offset(vcpu, offset);
3984                         vcpu->arch.tsc_catchup = 1;
3985                 }
3986
3987                 if (kvm_lapic_hv_timer_in_use(vcpu))
3988                         kvm_lapic_restart_hv_timer(vcpu);
3989
3990                 /*
3991                  * On a host with synchronized TSC, there is no need to update
3992                  * kvmclock on vcpu->cpu migration
3993                  */
3994                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
3995                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
3996                 if (vcpu->cpu != cpu)
3997                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
3998                 vcpu->cpu = cpu;
3999         }
4000
4001         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
4002 }
4003
4004 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
4005 {
4006         struct kvm_host_map map;
4007         struct kvm_steal_time *st;
4008
4009         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
4010                 return;
4011
4012         if (vcpu->arch.st.preempted)
4013                 return;
4014
4015         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT, &map,
4016                         &vcpu->arch.st.cache, true))
4017                 return;
4018
4019         st = map.hva +
4020                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
4021
4022         st->preempted = vcpu->arch.st.preempted = KVM_VCPU_PREEMPTED;
4023
4024         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, true);
4025 }
4026
4027 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
4028 {
4029         int idx;
4030
4031         if (vcpu->preempted && !vcpu->arch.guest_state_protected)
4032                 vcpu->arch.preempted_in_kernel = !kvm_x86_ops.get_cpl(vcpu);
4033
4034         /*
4035          * Disable page faults because we're in atomic context here.
4036          * kvm_write_guest_offset_cached() would call might_fault()
4037          * that relies on pagefault_disable() to tell if there's a
4038          * bug. NOTE: the write to guest memory may not go through if
4039          * during postcopy live migration or if there's heavy guest
4040          * paging.
4041          */
4042         pagefault_disable();
4043         /*
4044          * kvm_memslots() will be called by
4045          * kvm_write_guest_offset_cached() so take the srcu lock.
4046          */
4047         idx = srcu_read_lock(&vcpu->kvm->srcu);
4048         kvm_steal_time_set_preempted(vcpu);
4049         srcu_read_unlock(&vcpu->kvm->srcu, idx);
4050         pagefault_enable();
4051         kvm_x86_ops.vcpu_put(vcpu);
4052         vcpu->arch.last_host_tsc = rdtsc();
4053         /*
4054          * If userspace has set any breakpoints or watchpoints, dr6 is restored
4055          * on every vmexit, but if not, we might have a stale dr6 from the
4056          * guest. do_debug expects dr6 to be cleared after it runs, do the same.
4057          */
4058         set_debugreg(0, 6);
4059 }
4060
4061 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
4062                                     struct kvm_lapic_state *s)
4063 {
4064         if (vcpu->arch.apicv_active)
4065                 kvm_x86_ops.sync_pir_to_irr(vcpu);
4066
4067         return kvm_apic_get_state(vcpu, s);
4068 }
4069
4070 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
4071                                     struct kvm_lapic_state *s)
4072 {
4073         int r;
4074
4075         r = kvm_apic_set_state(vcpu, s);
4076         if (r)
4077                 return r;
4078         update_cr8_intercept(vcpu);
4079
4080         return 0;
4081 }
4082
4083 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
4084 {
4085         /*
4086          * We can accept userspace's request for interrupt injection
4087          * as long as we have a place to store the interrupt number.
4088          * The actual injection will happen when the CPU is able to
4089          * deliver the interrupt.
4090          */
4091         if (kvm_cpu_has_extint(vcpu))
4092                 return false;
4093
4094         /* Acknowledging ExtINT does not happen if LINT0 is masked.  */
4095         return (!lapic_in_kernel(vcpu) ||
4096                 kvm_apic_accept_pic_intr(vcpu));
4097 }
4098
4099 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
4100 {
4101         return kvm_arch_interrupt_allowed(vcpu) &&
4102                 kvm_cpu_accept_dm_intr(vcpu);
4103 }
4104
4105 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
4106                                     struct kvm_interrupt *irq)
4107 {
4108         if (irq->irq >= KVM_NR_INTERRUPTS)
4109                 return -EINVAL;
4110
4111         if (!irqchip_in_kernel(vcpu->kvm)) {
4112                 kvm_queue_interrupt(vcpu, irq->irq, false);
4113                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4114                 return 0;
4115         }
4116
4117         /*
4118          * With in-kernel LAPIC, we only use this to inject EXTINT, so
4119          * fail for in-kernel 8259.
4120          */
4121         if (pic_in_kernel(vcpu->kvm))
4122                 return -ENXIO;
4123
4124         if (vcpu->arch.pending_external_vector != -1)
4125                 return -EEXIST;
4126
4127         vcpu->arch.pending_external_vector = irq->irq;
4128         kvm_make_request(KVM_REQ_EVENT, vcpu);
4129         return 0;
4130 }
4131
4132 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
4133 {
4134         kvm_inject_nmi(vcpu);
4135
4136         return 0;
4137 }
4138
4139 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
4140 {
4141         kvm_make_request(KVM_REQ_SMI, vcpu);
4142
4143         return 0;
4144 }
4145
4146 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
4147                                            struct kvm_tpr_access_ctl *tac)
4148 {
4149         if (tac->flags)
4150                 return -EINVAL;
4151         vcpu->arch.tpr_access_reporting = !!tac->enabled;
4152         return 0;
4153 }
4154
4155 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
4156                                         u64 mcg_cap)
4157 {
4158         int r;
4159         unsigned bank_num = mcg_cap & 0xff, bank;
4160
4161         r = -EINVAL;
4162         if (!bank_num || bank_num > KVM_MAX_MCE_BANKS)
4163                 goto out;
4164         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
4165                 goto out;
4166         r = 0;
4167         vcpu->arch.mcg_cap = mcg_cap;
4168         /* Init IA32_MCG_CTL to all 1s */
4169         if (mcg_cap & MCG_CTL_P)
4170                 vcpu->arch.mcg_ctl = ~(u64)0;
4171         /* Init IA32_MCi_CTL to all 1s */
4172         for (bank = 0; bank < bank_num; bank++)
4173                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
4174
4175         kvm_x86_ops.setup_mce(vcpu);
4176 out:
4177         return r;
4178 }
4179
4180 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
4181                                       struct kvm_x86_mce *mce)
4182 {
4183         u64 mcg_cap = vcpu->arch.mcg_cap;
4184         unsigned bank_num = mcg_cap & 0xff;
4185         u64 *banks = vcpu->arch.mce_banks;
4186
4187         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
4188                 return -EINVAL;
4189         /*
4190          * if IA32_MCG_CTL is not all 1s, the uncorrected error
4191          * reporting is disabled
4192          */
4193         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
4194             vcpu->arch.mcg_ctl != ~(u64)0)
4195                 return 0;
4196         banks += 4 * mce->bank;
4197         /*
4198          * if IA32_MCi_CTL is not all 1s, the uncorrected error
4199          * reporting is disabled for the bank
4200          */
4201         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
4202                 return 0;
4203         if (mce->status & MCI_STATUS_UC) {
4204                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
4205                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
4206                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
4207                         return 0;
4208                 }
4209                 if (banks[1] & MCI_STATUS_VAL)
4210                         mce->status |= MCI_STATUS_OVER;
4211                 banks[2] = mce->addr;
4212                 banks[3] = mce->misc;
4213                 vcpu->arch.mcg_status = mce->mcg_status;
4214                 banks[1] = mce->status;
4215                 kvm_queue_exception(vcpu, MC_VECTOR);
4216         } else if (!(banks[1] & MCI_STATUS_VAL)
4217                    || !(banks[1] & MCI_STATUS_UC)) {
4218                 if (banks[1] & MCI_STATUS_VAL)
4219                         mce->status |= MCI_STATUS_OVER;
4220                 banks[2] = mce->addr;
4221                 banks[3] = mce->misc;
4222                 banks[1] = mce->status;
4223         } else
4224                 banks[1] |= MCI_STATUS_OVER;
4225         return 0;
4226 }
4227
4228 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
4229                                                struct kvm_vcpu_events *events)
4230 {
4231         process_nmi(vcpu);
4232
4233         /*
4234          * In guest mode, payload delivery should be deferred,
4235          * so that the L1 hypervisor can intercept #PF before
4236          * CR2 is modified (or intercept #DB before DR6 is
4237          * modified under nVMX). Unless the per-VM capability,
4238          * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4239          * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4240          * opportunistically defer the exception payload, deliver it if the
4241          * capability hasn't been requested before processing a
4242          * KVM_GET_VCPU_EVENTS.
4243          */
4244         if (!vcpu->kvm->arch.exception_payload_enabled &&
4245             vcpu->arch.exception.pending && vcpu->arch.exception.has_payload)
4246                 kvm_deliver_exception_payload(vcpu);
4247
4248         /*
4249          * The API doesn't provide the instruction length for software
4250          * exceptions, so don't report them. As long as the guest RIP
4251          * isn't advanced, we should expect to encounter the exception
4252          * again.
4253          */
4254         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
4255                 events->exception.injected = 0;
4256                 events->exception.pending = 0;
4257         } else {
4258                 events->exception.injected = vcpu->arch.exception.injected;
4259                 events->exception.pending = vcpu->arch.exception.pending;
4260                 /*
4261                  * For ABI compatibility, deliberately conflate
4262                  * pending and injected exceptions when
4263                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4264                  */
4265                 if (!vcpu->kvm->arch.exception_payload_enabled)
4266                         events->exception.injected |=
4267                                 vcpu->arch.exception.pending;
4268         }
4269         events->exception.nr = vcpu->arch.exception.nr;
4270         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
4271         events->exception.error_code = vcpu->arch.exception.error_code;
4272         events->exception_has_payload = vcpu->arch.exception.has_payload;
4273         events->exception_payload = vcpu->arch.exception.payload;
4274
4275         events->interrupt.injected =
4276                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
4277         events->interrupt.nr = vcpu->arch.interrupt.nr;
4278         events->interrupt.soft = 0;
4279         events->interrupt.shadow = kvm_x86_ops.get_interrupt_shadow(vcpu);
4280
4281         events->nmi.injected = vcpu->arch.nmi_injected;
4282         events->nmi.pending = vcpu->arch.nmi_pending != 0;
4283         events->nmi.masked = kvm_x86_ops.get_nmi_mask(vcpu);
4284         events->nmi.pad = 0;
4285
4286         events->sipi_vector = 0; /* never valid when reporting to user space */
4287
4288         events->smi.smm = is_smm(vcpu);
4289         events->smi.pending = vcpu->arch.smi_pending;
4290         events->smi.smm_inside_nmi =
4291                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
4292         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
4293
4294         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
4295                          | KVM_VCPUEVENT_VALID_SHADOW
4296                          | KVM_VCPUEVENT_VALID_SMM);
4297         if (vcpu->kvm->arch.exception_payload_enabled)
4298                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
4299
4300         memset(&events->reserved, 0, sizeof(events->reserved));
4301 }
4302
4303 static void kvm_smm_changed(struct kvm_vcpu *vcpu);
4304
4305 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
4306                                               struct kvm_vcpu_events *events)
4307 {
4308         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4309                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4310                               | KVM_VCPUEVENT_VALID_SHADOW
4311                               | KVM_VCPUEVENT_VALID_SMM
4312                               | KVM_VCPUEVENT_VALID_PAYLOAD))
4313                 return -EINVAL;
4314
4315         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
4316                 if (!vcpu->kvm->arch.exception_payload_enabled)
4317                         return -EINVAL;
4318                 if (events->exception.pending)
4319                         events->exception.injected = 0;
4320                 else
4321                         events->exception_has_payload = 0;
4322         } else {
4323                 events->exception.pending = 0;
4324                 events->exception_has_payload = 0;
4325         }
4326
4327         if ((events->exception.injected || events->exception.pending) &&
4328             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
4329                 return -EINVAL;
4330
4331         /* INITs are latched while in SMM */
4332         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
4333             (events->smi.smm || events->smi.pending) &&
4334             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
4335                 return -EINVAL;
4336
4337         process_nmi(vcpu);
4338         vcpu->arch.exception.injected = events->exception.injected;
4339         vcpu->arch.exception.pending = events->exception.pending;
4340         vcpu->arch.exception.nr = events->exception.nr;
4341         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
4342         vcpu->arch.exception.error_code = events->exception.error_code;
4343         vcpu->arch.exception.has_payload = events->exception_has_payload;
4344         vcpu->arch.exception.payload = events->exception_payload;
4345
4346         vcpu->arch.interrupt.injected = events->interrupt.injected;
4347         vcpu->arch.interrupt.nr = events->interrupt.nr;
4348         vcpu->arch.interrupt.soft = events->interrupt.soft;
4349         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
4350                 kvm_x86_ops.set_interrupt_shadow(vcpu,
4351                                                   events->interrupt.shadow);
4352
4353         vcpu->arch.nmi_injected = events->nmi.injected;
4354         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
4355                 vcpu->arch.nmi_pending = events->nmi.pending;
4356         kvm_x86_ops.set_nmi_mask(vcpu, events->nmi.masked);
4357
4358         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
4359             lapic_in_kernel(vcpu))
4360                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
4361
4362         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
4363                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
4364                         if (events->smi.smm)
4365                                 vcpu->arch.hflags |= HF_SMM_MASK;
4366                         else
4367                                 vcpu->arch.hflags &= ~HF_SMM_MASK;
4368                         kvm_smm_changed(vcpu);
4369                 }
4370
4371                 vcpu->arch.smi_pending = events->smi.pending;
4372
4373                 if (events->smi.smm) {
4374                         if (events->smi.smm_inside_nmi)
4375                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
4376                         else
4377                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
4378                 }
4379
4380                 if (lapic_in_kernel(vcpu)) {
4381                         if (events->smi.latched_init)
4382                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4383                         else
4384                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4385                 }
4386         }
4387
4388         kvm_make_request(KVM_REQ_EVENT, vcpu);
4389
4390         return 0;
4391 }
4392
4393 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
4394                                              struct kvm_debugregs *dbgregs)
4395 {
4396         unsigned long val;
4397
4398         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
4399         kvm_get_dr(vcpu, 6, &val);
4400         dbgregs->dr6 = val;
4401         dbgregs->dr7 = vcpu->arch.dr7;
4402         dbgregs->flags = 0;
4403         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
4404 }
4405
4406 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
4407                                             struct kvm_debugregs *dbgregs)
4408 {
4409         if (dbgregs->flags)
4410                 return -EINVAL;
4411
4412         if (dbgregs->dr6 & ~0xffffffffull)
4413                 return -EINVAL;
4414         if (dbgregs->dr7 & ~0xffffffffull)
4415                 return -EINVAL;
4416
4417         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
4418         kvm_update_dr0123(vcpu);
4419         vcpu->arch.dr6 = dbgregs->dr6;
4420         vcpu->arch.dr7 = dbgregs->dr7;
4421         kvm_update_dr7(vcpu);
4422
4423         return 0;
4424 }
4425
4426 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
4427
4428 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
4429 {
4430         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4431         u64 xstate_bv = xsave->header.xfeatures;
4432         u64 valid;
4433
4434         /*
4435          * Copy legacy XSAVE area, to avoid complications with CPUID
4436          * leaves 0 and 1 in the loop below.
4437          */
4438         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
4439
4440         /* Set XSTATE_BV */
4441         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
4442         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
4443
4444         /*
4445          * Copy each region from the possibly compacted offset to the
4446          * non-compacted offset.
4447          */
4448         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4449         while (valid) {
4450                 u64 xfeature_mask = valid & -valid;
4451                 int xfeature_nr = fls64(xfeature_mask) - 1;
4452                 void *src = get_xsave_addr(xsave, xfeature_nr);
4453
4454                 if (src) {
4455                         u32 size, offset, ecx, edx;
4456                         cpuid_count(XSTATE_CPUID, xfeature_nr,
4457                                     &size, &offset, &ecx, &edx);
4458                         if (xfeature_nr == XFEATURE_PKRU)
4459                                 memcpy(dest + offset, &vcpu->arch.pkru,
4460                                        sizeof(vcpu->arch.pkru));
4461                         else
4462                                 memcpy(dest + offset, src, size);
4463
4464                 }
4465
4466                 valid -= xfeature_mask;
4467         }
4468 }
4469
4470 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
4471 {
4472         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4473         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
4474         u64 valid;
4475
4476         /*
4477          * Copy legacy XSAVE area, to avoid complications with CPUID
4478          * leaves 0 and 1 in the loop below.
4479          */
4480         memcpy(xsave, src, XSAVE_HDR_OFFSET);
4481
4482         /* Set XSTATE_BV and possibly XCOMP_BV.  */
4483         xsave->header.xfeatures = xstate_bv;
4484         if (boot_cpu_has(X86_FEATURE_XSAVES))
4485                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
4486
4487         /*
4488          * Copy each region from the non-compacted offset to the
4489          * possibly compacted offset.
4490          */
4491         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4492         while (valid) {
4493                 u64 xfeature_mask = valid & -valid;
4494                 int xfeature_nr = fls64(xfeature_mask) - 1;
4495                 void *dest = get_xsave_addr(xsave, xfeature_nr);
4496
4497                 if (dest) {
4498                         u32 size, offset, ecx, edx;
4499                         cpuid_count(XSTATE_CPUID, xfeature_nr,
4500                                     &size, &offset, &ecx, &edx);
4501                         if (xfeature_nr == XFEATURE_PKRU)
4502                                 memcpy(&vcpu->arch.pkru, src + offset,
4503                                        sizeof(vcpu->arch.pkru));
4504                         else
4505                                 memcpy(dest, src + offset, size);
4506                 }
4507
4508                 valid -= xfeature_mask;
4509         }
4510 }
4511
4512 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
4513                                          struct kvm_xsave *guest_xsave)
4514 {
4515         if (!vcpu->arch.guest_fpu)
4516                 return;
4517
4518         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4519                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
4520                 fill_xsave((u8 *) guest_xsave->region, vcpu);
4521         } else {
4522                 memcpy(guest_xsave->region,
4523                         &vcpu->arch.guest_fpu->state.fxsave,
4524                         sizeof(struct fxregs_state));
4525                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
4526                         XFEATURE_MASK_FPSSE;
4527         }
4528 }
4529
4530 #define XSAVE_MXCSR_OFFSET 24
4531
4532 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
4533                                         struct kvm_xsave *guest_xsave)
4534 {
4535         u64 xstate_bv;
4536         u32 mxcsr;
4537
4538         if (!vcpu->arch.guest_fpu)
4539                 return 0;
4540
4541         xstate_bv = *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
4542         mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
4543
4544         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4545                 /*
4546                  * Here we allow setting states that are not present in
4547                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
4548                  * with old userspace.
4549                  */
4550                 if (xstate_bv & ~supported_xcr0 || mxcsr & ~mxcsr_feature_mask)
4551                         return -EINVAL;
4552                 load_xsave(vcpu, (u8 *)guest_xsave->region);
4553         } else {
4554                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
4555                         mxcsr & ~mxcsr_feature_mask)
4556                         return -EINVAL;
4557                 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
4558                         guest_xsave->region, sizeof(struct fxregs_state));
4559         }
4560         return 0;
4561 }
4562
4563 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
4564                                         struct kvm_xcrs *guest_xcrs)
4565 {
4566         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
4567                 guest_xcrs->nr_xcrs = 0;
4568                 return;
4569         }
4570
4571         guest_xcrs->nr_xcrs = 1;
4572         guest_xcrs->flags = 0;
4573         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
4574         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
4575 }
4576
4577 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
4578                                        struct kvm_xcrs *guest_xcrs)
4579 {
4580         int i, r = 0;
4581
4582         if (!boot_cpu_has(X86_FEATURE_XSAVE))
4583                 return -EINVAL;
4584
4585         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
4586                 return -EINVAL;
4587
4588         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
4589                 /* Only support XCR0 currently */
4590                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
4591                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
4592                                 guest_xcrs->xcrs[i].value);
4593                         break;
4594                 }
4595         if (r)
4596                 r = -EINVAL;
4597         return r;
4598 }
4599
4600 /*
4601  * kvm_set_guest_paused() indicates to the guest kernel that it has been
4602  * stopped by the hypervisor.  This function will be called from the host only.
4603  * EINVAL is returned when the host attempts to set the flag for a guest that
4604  * does not support pv clocks.
4605  */
4606 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
4607 {
4608         if (!vcpu->arch.pv_time_enabled)
4609                 return -EINVAL;
4610         vcpu->arch.pvclock_set_guest_stopped_request = true;
4611         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4612         return 0;
4613 }
4614
4615 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
4616                                      struct kvm_enable_cap *cap)
4617 {
4618         int r;
4619         uint16_t vmcs_version;
4620         void __user *user_ptr;
4621
4622         if (cap->flags)
4623                 return -EINVAL;
4624
4625         switch (cap->cap) {
4626         case KVM_CAP_HYPERV_SYNIC2:
4627                 if (cap->args[0])
4628                         return -EINVAL;
4629                 fallthrough;
4630
4631         case KVM_CAP_HYPERV_SYNIC:
4632                 if (!irqchip_in_kernel(vcpu->kvm))
4633                         return -EINVAL;
4634                 return kvm_hv_activate_synic(vcpu, cap->cap ==
4635                                              KVM_CAP_HYPERV_SYNIC2);
4636         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4637                 if (!kvm_x86_ops.nested_ops->enable_evmcs)
4638                         return -ENOTTY;
4639                 r = kvm_x86_ops.nested_ops->enable_evmcs(vcpu, &vmcs_version);
4640                 if (!r) {
4641                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
4642                         if (copy_to_user(user_ptr, &vmcs_version,
4643                                          sizeof(vmcs_version)))
4644                                 r = -EFAULT;
4645                 }
4646                 return r;
4647         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4648                 if (!kvm_x86_ops.enable_direct_tlbflush)
4649                         return -ENOTTY;
4650
4651                 return kvm_x86_ops.enable_direct_tlbflush(vcpu);
4652
4653         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4654                 vcpu->arch.pv_cpuid.enforce = cap->args[0];
4655                 if (vcpu->arch.pv_cpuid.enforce)
4656                         kvm_update_pv_runtime(vcpu);
4657
4658                 return 0;
4659
4660         default:
4661                 return -EINVAL;
4662         }
4663 }
4664
4665 long kvm_arch_vcpu_ioctl(struct file *filp,
4666                          unsigned int ioctl, unsigned long arg)
4667 {
4668         struct kvm_vcpu *vcpu = filp->private_data;
4669         void __user *argp = (void __user *)arg;
4670         int r;
4671         union {
4672                 struct kvm_lapic_state *lapic;
4673                 struct kvm_xsave *xsave;
4674                 struct kvm_xcrs *xcrs;
4675                 void *buffer;
4676         } u;
4677
4678         vcpu_load(vcpu);
4679
4680         u.buffer = NULL;
4681         switch (ioctl) {
4682         case KVM_GET_LAPIC: {
4683                 r = -EINVAL;
4684                 if (!lapic_in_kernel(vcpu))
4685                         goto out;
4686                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
4687                                 GFP_KERNEL_ACCOUNT);
4688
4689                 r = -ENOMEM;
4690                 if (!u.lapic)
4691                         goto out;
4692                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
4693                 if (r)
4694                         goto out;
4695                 r = -EFAULT;
4696                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
4697                         goto out;
4698                 r = 0;
4699                 break;
4700         }
4701         case KVM_SET_LAPIC: {
4702                 r = -EINVAL;
4703                 if (!lapic_in_kernel(vcpu))
4704                         goto out;
4705                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
4706                 if (IS_ERR(u.lapic)) {
4707                         r = PTR_ERR(u.lapic);
4708                         goto out_nofree;
4709                 }
4710
4711                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
4712                 break;
4713         }
4714         case KVM_INTERRUPT: {
4715                 struct kvm_interrupt irq;
4716
4717                 r = -EFAULT;
4718                 if (copy_from_user(&irq, argp, sizeof(irq)))
4719                         goto out;
4720                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
4721                 break;
4722         }
4723         case KVM_NMI: {
4724                 r = kvm_vcpu_ioctl_nmi(vcpu);
4725                 break;
4726         }
4727         case KVM_SMI: {
4728                 r = kvm_vcpu_ioctl_smi(vcpu);
4729                 break;
4730         }
4731         case KVM_SET_CPUID: {
4732                 struct kvm_cpuid __user *cpuid_arg = argp;
4733                 struct kvm_cpuid cpuid;
4734
4735                 r = -EFAULT;
4736                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4737                         goto out;
4738                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4739                 break;
4740         }
4741         case KVM_SET_CPUID2: {
4742                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4743                 struct kvm_cpuid2 cpuid;
4744
4745                 r = -EFAULT;
4746                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4747                         goto out;
4748                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
4749                                               cpuid_arg->entries);
4750                 break;
4751         }
4752         case KVM_GET_CPUID2: {
4753                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4754                 struct kvm_cpuid2 cpuid;
4755
4756                 r = -EFAULT;
4757                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4758                         goto out;
4759                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
4760                                               cpuid_arg->entries);
4761                 if (r)
4762                         goto out;
4763                 r = -EFAULT;
4764                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4765                         goto out;
4766                 r = 0;
4767                 break;
4768         }
4769         case KVM_GET_MSRS: {
4770                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4771                 r = msr_io(vcpu, argp, do_get_msr, 1);
4772                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4773                 break;
4774         }
4775         case KVM_SET_MSRS: {
4776                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4777                 r = msr_io(vcpu, argp, do_set_msr, 0);
4778                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4779                 break;
4780         }
4781         case KVM_TPR_ACCESS_REPORTING: {
4782                 struct kvm_tpr_access_ctl tac;
4783
4784                 r = -EFAULT;
4785                 if (copy_from_user(&tac, argp, sizeof(tac)))
4786                         goto out;
4787                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
4788                 if (r)
4789                         goto out;
4790                 r = -EFAULT;
4791                 if (copy_to_user(argp, &tac, sizeof(tac)))
4792                         goto out;
4793                 r = 0;
4794                 break;
4795         };
4796         case KVM_SET_VAPIC_ADDR: {
4797                 struct kvm_vapic_addr va;
4798                 int idx;
4799
4800                 r = -EINVAL;
4801                 if (!lapic_in_kernel(vcpu))
4802                         goto out;
4803                 r = -EFAULT;
4804                 if (copy_from_user(&va, argp, sizeof(va)))
4805                         goto out;
4806                 idx = srcu_read_lock(&vcpu->kvm->srcu);
4807                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
4808                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4809                 break;
4810         }
4811         case KVM_X86_SETUP_MCE: {
4812                 u64 mcg_cap;
4813
4814                 r = -EFAULT;
4815                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
4816                         goto out;
4817                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
4818                 break;
4819         }
4820         case KVM_X86_SET_MCE: {
4821                 struct kvm_x86_mce mce;
4822
4823                 r = -EFAULT;
4824                 if (copy_from_user(&mce, argp, sizeof(mce)))
4825                         goto out;
4826                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
4827                 break;
4828         }
4829         case KVM_GET_VCPU_EVENTS: {
4830                 struct kvm_vcpu_events events;
4831
4832                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
4833
4834                 r = -EFAULT;
4835                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
4836                         break;
4837                 r = 0;
4838                 break;
4839         }
4840         case KVM_SET_VCPU_EVENTS: {
4841                 struct kvm_vcpu_events events;
4842
4843                 r = -EFAULT;
4844                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
4845                         break;
4846
4847                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
4848                 break;
4849         }
4850         case KVM_GET_DEBUGREGS: {
4851                 struct kvm_debugregs dbgregs;
4852
4853                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
4854
4855                 r = -EFAULT;
4856                 if (copy_to_user(argp, &dbgregs,
4857                                  sizeof(struct kvm_debugregs)))
4858                         break;
4859                 r = 0;
4860                 break;
4861         }
4862         case KVM_SET_DEBUGREGS: {
4863                 struct kvm_debugregs dbgregs;
4864
4865                 r = -EFAULT;
4866                 if (copy_from_user(&dbgregs, argp,
4867                                    sizeof(struct kvm_debugregs)))
4868                         break;
4869
4870                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
4871                 break;
4872         }
4873         case KVM_GET_XSAVE: {
4874                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
4875                 r = -ENOMEM;
4876                 if (!u.xsave)
4877                         break;
4878
4879                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
4880
4881                 r = -EFAULT;
4882                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
4883                         break;
4884                 r = 0;
4885                 break;
4886         }
4887         case KVM_SET_XSAVE: {
4888                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
4889                 if (IS_ERR(u.xsave)) {
4890                         r = PTR_ERR(u.xsave);
4891                         goto out_nofree;
4892                 }
4893
4894                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
4895                 break;
4896         }
4897         case KVM_GET_XCRS: {
4898                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
4899                 r = -ENOMEM;
4900                 if (!u.xcrs)
4901                         break;
4902
4903                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
4904
4905                 r = -EFAULT;
4906                 if (copy_to_user(argp, u.xcrs,
4907                                  sizeof(struct kvm_xcrs)))
4908                         break;
4909                 r = 0;
4910                 break;
4911         }
4912         case KVM_SET_XCRS: {
4913                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
4914                 if (IS_ERR(u.xcrs)) {
4915                         r = PTR_ERR(u.xcrs);
4916                         goto out_nofree;
4917                 }
4918
4919                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
4920                 break;
4921         }
4922         case KVM_SET_TSC_KHZ: {
4923                 u32 user_tsc_khz;
4924
4925                 r = -EINVAL;
4926                 user_tsc_khz = (u32)arg;
4927
4928                 if (kvm_has_tsc_control &&
4929                     user_tsc_khz >= kvm_max_guest_tsc_khz)
4930                         goto out;
4931
4932                 if (user_tsc_khz == 0)
4933                         user_tsc_khz = tsc_khz;
4934
4935                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
4936                         r = 0;
4937
4938                 goto out;
4939         }
4940         case KVM_GET_TSC_KHZ: {
4941                 r = vcpu->arch.virtual_tsc_khz;
4942                 goto out;
4943         }
4944         case KVM_KVMCLOCK_CTRL: {
4945                 r = kvm_set_guest_paused(vcpu);
4946                 goto out;
4947         }
4948         case KVM_ENABLE_CAP: {
4949                 struct kvm_enable_cap cap;
4950
4951                 r = -EFAULT;
4952                 if (copy_from_user(&cap, argp, sizeof(cap)))
4953                         goto out;
4954                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
4955                 break;
4956         }
4957         case KVM_GET_NESTED_STATE: {
4958                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4959                 u32 user_data_size;
4960
4961                 r = -EINVAL;
4962                 if (!kvm_x86_ops.nested_ops->get_state)
4963                         break;
4964
4965                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
4966                 r = -EFAULT;
4967                 if (get_user(user_data_size, &user_kvm_nested_state->size))
4968                         break;
4969
4970                 r = kvm_x86_ops.nested_ops->get_state(vcpu, user_kvm_nested_state,
4971                                                      user_data_size);
4972                 if (r < 0)
4973                         break;
4974
4975                 if (r > user_data_size) {
4976                         if (put_user(r, &user_kvm_nested_state->size))
4977                                 r = -EFAULT;
4978                         else
4979                                 r = -E2BIG;
4980                         break;
4981                 }
4982
4983                 r = 0;
4984                 break;
4985         }
4986         case KVM_SET_NESTED_STATE: {
4987                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4988                 struct kvm_nested_state kvm_state;
4989                 int idx;
4990
4991                 r = -EINVAL;
4992                 if (!kvm_x86_ops.nested_ops->set_state)
4993                         break;
4994
4995                 r = -EFAULT;
4996                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
4997                         break;
4998
4999                 r = -EINVAL;
5000                 if (kvm_state.size < sizeof(kvm_state))
5001                         break;
5002
5003                 if (kvm_state.flags &
5004                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
5005                       | KVM_STATE_NESTED_EVMCS | KVM_STATE_NESTED_MTF_PENDING
5006                       | KVM_STATE_NESTED_GIF_SET))
5007                         break;
5008
5009                 /* nested_run_pending implies guest_mode.  */
5010                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
5011                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
5012                         break;
5013
5014                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5015                 r = kvm_x86_ops.nested_ops->set_state(vcpu, user_kvm_nested_state, &kvm_state);
5016                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5017                 break;
5018         }
5019         case KVM_GET_SUPPORTED_HV_CPUID:
5020                 r = kvm_ioctl_get_supported_hv_cpuid(vcpu, argp);
5021                 break;
5022         default:
5023                 r = -EINVAL;
5024         }
5025 out:
5026         kfree(u.buffer);
5027 out_nofree:
5028         vcpu_put(vcpu);
5029         return r;
5030 }
5031
5032 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
5033 {
5034         return VM_FAULT_SIGBUS;
5035 }
5036
5037 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
5038 {
5039         int ret;
5040
5041         if (addr > (unsigned int)(-3 * PAGE_SIZE))
5042                 return -EINVAL;
5043         ret = kvm_x86_ops.set_tss_addr(kvm, addr);
5044         return ret;
5045 }
5046
5047 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
5048                                               u64 ident_addr)
5049 {
5050         return kvm_x86_ops.set_identity_map_addr(kvm, ident_addr);
5051 }
5052
5053 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
5054                                          unsigned long kvm_nr_mmu_pages)
5055 {
5056         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
5057                 return -EINVAL;
5058
5059         mutex_lock(&kvm->slots_lock);
5060
5061         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
5062         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
5063
5064         mutex_unlock(&kvm->slots_lock);
5065         return 0;
5066 }
5067
5068 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
5069 {
5070         return kvm->arch.n_max_mmu_pages;
5071 }
5072
5073 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5074 {
5075         struct kvm_pic *pic = kvm->arch.vpic;
5076         int r;
5077
5078         r = 0;
5079         switch (chip->chip_id) {
5080         case KVM_IRQCHIP_PIC_MASTER:
5081                 memcpy(&chip->chip.pic, &pic->pics[0],
5082                         sizeof(struct kvm_pic_state));
5083                 break;
5084         case KVM_IRQCHIP_PIC_SLAVE:
5085                 memcpy(&chip->chip.pic, &pic->pics[1],
5086                         sizeof(struct kvm_pic_state));
5087                 break;
5088         case KVM_IRQCHIP_IOAPIC:
5089                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
5090                 break;
5091         default:
5092                 r = -EINVAL;
5093                 break;
5094         }
5095         return r;
5096 }
5097
5098 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5099 {
5100         struct kvm_pic *pic = kvm->arch.vpic;
5101         int r;
5102
5103         r = 0;
5104         switch (chip->chip_id) {
5105         case KVM_IRQCHIP_PIC_MASTER:
5106                 spin_lock(&pic->lock);
5107                 memcpy(&pic->pics[0], &chip->chip.pic,
5108                         sizeof(struct kvm_pic_state));
5109                 spin_unlock(&pic->lock);
5110                 break;
5111         case KVM_IRQCHIP_PIC_SLAVE:
5112                 spin_lock(&pic->lock);
5113                 memcpy(&pic->pics[1], &chip->chip.pic,
5114                         sizeof(struct kvm_pic_state));
5115                 spin_unlock(&pic->lock);
5116                 break;
5117         case KVM_IRQCHIP_IOAPIC:
5118                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
5119                 break;
5120         default:
5121                 r = -EINVAL;
5122                 break;
5123         }
5124         kvm_pic_update_irq(pic);
5125         return r;
5126 }
5127
5128 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5129 {
5130         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
5131
5132         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
5133
5134         mutex_lock(&kps->lock);
5135         memcpy(ps, &kps->channels, sizeof(*ps));
5136         mutex_unlock(&kps->lock);
5137         return 0;
5138 }
5139
5140 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5141 {
5142         int i;
5143         struct kvm_pit *pit = kvm->arch.vpit;
5144
5145         mutex_lock(&pit->pit_state.lock);
5146         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
5147         for (i = 0; i < 3; i++)
5148                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
5149         mutex_unlock(&pit->pit_state.lock);
5150         return 0;
5151 }
5152
5153 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5154 {
5155         mutex_lock(&kvm->arch.vpit->pit_state.lock);
5156         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
5157                 sizeof(ps->channels));
5158         ps->flags = kvm->arch.vpit->pit_state.flags;
5159         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
5160         memset(&ps->reserved, 0, sizeof(ps->reserved));
5161         return 0;
5162 }
5163
5164 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5165 {
5166         int start = 0;
5167         int i;
5168         u32 prev_legacy, cur_legacy;
5169         struct kvm_pit *pit = kvm->arch.vpit;
5170
5171         mutex_lock(&pit->pit_state.lock);
5172         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
5173         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
5174         if (!prev_legacy && cur_legacy)
5175                 start = 1;
5176         memcpy(&pit->pit_state.channels, &ps->channels,
5177                sizeof(pit->pit_state.channels));
5178         pit->pit_state.flags = ps->flags;
5179         for (i = 0; i < 3; i++)
5180                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
5181                                    start && i == 0);
5182         mutex_unlock(&pit->pit_state.lock);
5183         return 0;
5184 }
5185
5186 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
5187                                  struct kvm_reinject_control *control)
5188 {
5189         struct kvm_pit *pit = kvm->arch.vpit;
5190
5191         /* pit->pit_state.lock was overloaded to prevent userspace from getting
5192          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5193          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
5194          */
5195         mutex_lock(&pit->pit_state.lock);
5196         kvm_pit_set_reinject(pit, control->pit_reinject);
5197         mutex_unlock(&pit->pit_state.lock);
5198
5199         return 0;
5200 }
5201
5202 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
5203 {
5204         /*
5205          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
5206          */
5207         if (kvm_x86_ops.flush_log_dirty)
5208                 kvm_x86_ops.flush_log_dirty(kvm);
5209 }
5210
5211 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
5212                         bool line_status)
5213 {
5214         if (!irqchip_in_kernel(kvm))
5215                 return -ENXIO;
5216
5217         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
5218                                         irq_event->irq, irq_event->level,
5219                                         line_status);
5220         return 0;
5221 }
5222
5223 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
5224                             struct kvm_enable_cap *cap)
5225 {
5226         int r;
5227
5228         if (cap->flags)
5229                 return -EINVAL;
5230
5231         switch (cap->cap) {
5232         case KVM_CAP_DISABLE_QUIRKS:
5233                 kvm->arch.disabled_quirks = cap->args[0];
5234                 r = 0;
5235                 break;
5236         case KVM_CAP_SPLIT_IRQCHIP: {
5237                 mutex_lock(&kvm->lock);
5238                 r = -EINVAL;
5239                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
5240                         goto split_irqchip_unlock;
5241                 r = -EEXIST;
5242                 if (irqchip_in_kernel(kvm))
5243                         goto split_irqchip_unlock;
5244                 if (kvm->created_vcpus)
5245                         goto split_irqchip_unlock;
5246                 r = kvm_setup_empty_irq_routing(kvm);
5247                 if (r)
5248                         goto split_irqchip_unlock;
5249                 /* Pairs with irqchip_in_kernel. */
5250                 smp_wmb();
5251                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
5252                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
5253                 r = 0;
5254 split_irqchip_unlock:
5255                 mutex_unlock(&kvm->lock);
5256                 break;
5257         }
5258         case KVM_CAP_X2APIC_API:
5259                 r = -EINVAL;
5260                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
5261                         break;
5262
5263                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
5264                         kvm->arch.x2apic_format = true;
5265                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
5266                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
5267
5268                 r = 0;
5269                 break;
5270         case KVM_CAP_X86_DISABLE_EXITS:
5271                 r = -EINVAL;
5272                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
5273                         break;
5274
5275                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
5276                         kvm_can_mwait_in_guest())
5277                         kvm->arch.mwait_in_guest = true;
5278                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
5279                         kvm->arch.hlt_in_guest = true;
5280                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
5281                         kvm->arch.pause_in_guest = true;
5282                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
5283                         kvm->arch.cstate_in_guest = true;
5284                 r = 0;
5285                 break;
5286         case KVM_CAP_MSR_PLATFORM_INFO:
5287                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
5288                 r = 0;
5289                 break;
5290         case KVM_CAP_EXCEPTION_PAYLOAD:
5291                 kvm->arch.exception_payload_enabled = cap->args[0];
5292                 r = 0;
5293                 break;
5294         case KVM_CAP_X86_USER_SPACE_MSR:
5295                 kvm->arch.user_space_msr_mask = cap->args[0];
5296                 r = 0;
5297                 break;
5298         default:
5299                 r = -EINVAL;
5300                 break;
5301         }
5302         return r;
5303 }
5304
5305 static void kvm_clear_msr_filter(struct kvm *kvm)
5306 {
5307         u32 i;
5308         u32 count = kvm->arch.msr_filter.count;
5309         struct msr_bitmap_range ranges[16];
5310
5311         mutex_lock(&kvm->lock);
5312         kvm->arch.msr_filter.count = 0;
5313         memcpy(ranges, kvm->arch.msr_filter.ranges, count * sizeof(ranges[0]));
5314         mutex_unlock(&kvm->lock);
5315         synchronize_srcu(&kvm->srcu);
5316
5317         for (i = 0; i < count; i++)
5318                 kfree(ranges[i].bitmap);
5319 }
5320
5321 static int kvm_add_msr_filter(struct kvm *kvm, struct kvm_msr_filter_range *user_range)
5322 {
5323         struct msr_bitmap_range *ranges = kvm->arch.msr_filter.ranges;
5324         struct msr_bitmap_range range;
5325         unsigned long *bitmap = NULL;
5326         size_t bitmap_size;
5327         int r;
5328
5329         if (!user_range->nmsrs)
5330                 return 0;
5331
5332         bitmap_size = BITS_TO_LONGS(user_range->nmsrs) * sizeof(long);
5333         if (!bitmap_size || bitmap_size > KVM_MSR_FILTER_MAX_BITMAP_SIZE)
5334                 return -EINVAL;
5335
5336         bitmap = memdup_user((__user u8*)user_range->bitmap, bitmap_size);
5337         if (IS_ERR(bitmap))
5338                 return PTR_ERR(bitmap);
5339
5340         range = (struct msr_bitmap_range) {
5341                 .flags = user_range->flags,
5342                 .base = user_range->base,
5343                 .nmsrs = user_range->nmsrs,
5344                 .bitmap = bitmap,
5345         };
5346
5347         if (range.flags & ~(KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE)) {
5348                 r = -EINVAL;
5349                 goto err;
5350         }
5351
5352         if (!range.flags) {
5353                 r = -EINVAL;
5354                 goto err;
5355         }
5356
5357         /* Everything ok, add this range identifier to our global pool */
5358         ranges[kvm->arch.msr_filter.count] = range;
5359         /* Make sure we filled the array before we tell anyone to walk it */
5360         smp_wmb();
5361         kvm->arch.msr_filter.count++;
5362
5363         return 0;
5364 err:
5365         kfree(bitmap);
5366         return r;
5367 }
5368
5369 static int kvm_vm_ioctl_set_msr_filter(struct kvm *kvm, void __user *argp)
5370 {
5371         struct kvm_msr_filter __user *user_msr_filter = argp;
5372         struct kvm_msr_filter filter;
5373         bool default_allow;
5374         int r = 0;
5375         bool empty = true;
5376         u32 i;
5377
5378         if (copy_from_user(&filter, user_msr_filter, sizeof(filter)))
5379                 return -EFAULT;
5380
5381         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++)
5382                 empty &= !filter.ranges[i].nmsrs;
5383
5384         default_allow = !(filter.flags & KVM_MSR_FILTER_DEFAULT_DENY);
5385         if (empty && !default_allow)
5386                 return -EINVAL;
5387
5388         kvm_clear_msr_filter(kvm);
5389
5390         kvm->arch.msr_filter.default_allow = default_allow;
5391
5392         /*
5393          * Protect from concurrent calls to this function that could trigger
5394          * a TOCTOU violation on kvm->arch.msr_filter.count.
5395          */
5396         mutex_lock(&kvm->lock);
5397         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++) {
5398                 r = kvm_add_msr_filter(kvm, &filter.ranges[i]);
5399                 if (r)
5400                         break;
5401         }
5402
5403         kvm_make_all_cpus_request(kvm, KVM_REQ_MSR_FILTER_CHANGED);
5404         mutex_unlock(&kvm->lock);
5405
5406         return r;
5407 }
5408
5409 long kvm_arch_vm_ioctl(struct file *filp,
5410                        unsigned int ioctl, unsigned long arg)
5411 {
5412         struct kvm *kvm = filp->private_data;
5413         void __user *argp = (void __user *)arg;
5414         int r = -ENOTTY;
5415         /*
5416          * This union makes it completely explicit to gcc-3.x
5417          * that these two variables' stack usage should be
5418          * combined, not added together.
5419          */
5420         union {
5421                 struct kvm_pit_state ps;
5422                 struct kvm_pit_state2 ps2;
5423                 struct kvm_pit_config pit_config;
5424         } u;
5425
5426         switch (ioctl) {
5427         case KVM_SET_TSS_ADDR:
5428                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
5429                 break;
5430         case KVM_SET_IDENTITY_MAP_ADDR: {
5431                 u64 ident_addr;
5432
5433                 mutex_lock(&kvm->lock);
5434                 r = -EINVAL;
5435                 if (kvm->created_vcpus)
5436                         goto set_identity_unlock;
5437                 r = -EFAULT;
5438                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
5439                         goto set_identity_unlock;
5440                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
5441 set_identity_unlock:
5442                 mutex_unlock(&kvm->lock);
5443                 break;
5444         }
5445         case KVM_SET_NR_MMU_PAGES:
5446                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
5447                 break;
5448         case KVM_GET_NR_MMU_PAGES:
5449                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
5450                 break;
5451         case KVM_CREATE_IRQCHIP: {
5452                 mutex_lock(&kvm->lock);
5453
5454                 r = -EEXIST;
5455                 if (irqchip_in_kernel(kvm))
5456                         goto create_irqchip_unlock;
5457
5458                 r = -EINVAL;
5459                 if (kvm->created_vcpus)
5460                         goto create_irqchip_unlock;
5461
5462                 r = kvm_pic_init(kvm);
5463                 if (r)
5464                         goto create_irqchip_unlock;
5465
5466                 r = kvm_ioapic_init(kvm);
5467                 if (r) {
5468                         kvm_pic_destroy(kvm);
5469                         goto create_irqchip_unlock;
5470                 }
5471
5472                 r = kvm_setup_default_irq_routing(kvm);
5473                 if (r) {
5474                         kvm_ioapic_destroy(kvm);
5475                         kvm_pic_destroy(kvm);
5476                         goto create_irqchip_unlock;
5477                 }
5478                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
5479                 smp_wmb();
5480                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
5481         create_irqchip_unlock:
5482                 mutex_unlock(&kvm->lock);
5483                 break;
5484         }
5485         case KVM_CREATE_PIT:
5486                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
5487                 goto create_pit;
5488         case KVM_CREATE_PIT2:
5489                 r = -EFAULT;
5490                 if (copy_from_user(&u.pit_config, argp,
5491                                    sizeof(struct kvm_pit_config)))
5492                         goto out;
5493         create_pit:
5494                 mutex_lock(&kvm->lock);
5495                 r = -EEXIST;
5496                 if (kvm->arch.vpit)
5497                         goto create_pit_unlock;
5498                 r = -ENOMEM;
5499                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
5500                 if (kvm->arch.vpit)
5501                         r = 0;
5502         create_pit_unlock:
5503                 mutex_unlock(&kvm->lock);
5504                 break;
5505         case KVM_GET_IRQCHIP: {
5506                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5507                 struct kvm_irqchip *chip;
5508
5509                 chip = memdup_user(argp, sizeof(*chip));
5510                 if (IS_ERR(chip)) {
5511                         r = PTR_ERR(chip);
5512                         goto out;
5513                 }
5514
5515                 r = -ENXIO;
5516                 if (!irqchip_kernel(kvm))
5517                         goto get_irqchip_out;
5518                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
5519                 if (r)
5520                         goto get_irqchip_out;
5521                 r = -EFAULT;
5522                 if (copy_to_user(argp, chip, sizeof(*chip)))
5523                         goto get_irqchip_out;
5524                 r = 0;
5525         get_irqchip_out:
5526                 kfree(chip);
5527                 break;
5528         }
5529         case KVM_SET_IRQCHIP: {
5530                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5531                 struct kvm_irqchip *chip;
5532
5533                 chip = memdup_user(argp, sizeof(*chip));
5534                 if (IS_ERR(chip)) {
5535                         r = PTR_ERR(chip);
5536                         goto out;
5537                 }
5538
5539                 r = -ENXIO;
5540                 if (!irqchip_kernel(kvm))
5541                         goto set_irqchip_out;
5542                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
5543         set_irqchip_out:
5544                 kfree(chip);
5545                 break;
5546         }
5547         case KVM_GET_PIT: {
5548                 r = -EFAULT;
5549                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
5550                         goto out;
5551                 r = -ENXIO;
5552                 if (!kvm->arch.vpit)
5553                         goto out;
5554                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
5555                 if (r)
5556                         goto out;
5557                 r = -EFAULT;
5558                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
5559                         goto out;
5560                 r = 0;
5561                 break;
5562         }
5563         case KVM_SET_PIT: {
5564                 r = -EFAULT;
5565                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
5566                         goto out;
5567                 mutex_lock(&kvm->lock);
5568                 r = -ENXIO;
5569                 if (!kvm->arch.vpit)
5570                         goto set_pit_out;
5571                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
5572 set_pit_out:
5573                 mutex_unlock(&kvm->lock);
5574                 break;
5575         }
5576         case KVM_GET_PIT2: {
5577                 r = -ENXIO;
5578                 if (!kvm->arch.vpit)
5579                         goto out;
5580                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
5581                 if (r)
5582                         goto out;
5583                 r = -EFAULT;
5584                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
5585                         goto out;
5586                 r = 0;
5587                 break;
5588         }
5589         case KVM_SET_PIT2: {
5590                 r = -EFAULT;
5591                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
5592                         goto out;
5593                 mutex_lock(&kvm->lock);
5594                 r = -ENXIO;
5595                 if (!kvm->arch.vpit)
5596                         goto set_pit2_out;
5597                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
5598 set_pit2_out:
5599                 mutex_unlock(&kvm->lock);
5600                 break;
5601         }
5602         case KVM_REINJECT_CONTROL: {
5603                 struct kvm_reinject_control control;
5604                 r =  -EFAULT;
5605                 if (copy_from_user(&control, argp, sizeof(control)))
5606                         goto out;
5607                 r = -ENXIO;
5608                 if (!kvm->arch.vpit)
5609                         goto out;
5610                 r = kvm_vm_ioctl_reinject(kvm, &control);
5611                 break;
5612         }
5613         case KVM_SET_BOOT_CPU_ID:
5614                 r = 0;
5615                 mutex_lock(&kvm->lock);
5616                 if (kvm->created_vcpus)
5617                         r = -EBUSY;
5618                 else
5619                         kvm->arch.bsp_vcpu_id = arg;
5620                 mutex_unlock(&kvm->lock);
5621                 break;
5622         case KVM_XEN_HVM_CONFIG: {
5623                 struct kvm_xen_hvm_config xhc;
5624                 r = -EFAULT;
5625                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
5626                         goto out;
5627                 r = -EINVAL;
5628                 if (xhc.flags)
5629                         goto out;
5630                 memcpy(&kvm->arch.xen_hvm_config, &xhc, sizeof(xhc));
5631                 r = 0;
5632                 break;
5633         }
5634         case KVM_SET_CLOCK: {
5635                 struct kvm_clock_data user_ns;
5636                 u64 now_ns;
5637
5638                 r = -EFAULT;
5639                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
5640                         goto out;
5641
5642                 r = -EINVAL;
5643                 if (user_ns.flags)
5644                         goto out;
5645
5646                 r = 0;
5647                 /*
5648                  * TODO: userspace has to take care of races with VCPU_RUN, so
5649                  * kvm_gen_update_masterclock() can be cut down to locked
5650                  * pvclock_update_vm_gtod_copy().
5651                  */
5652                 kvm_gen_update_masterclock(kvm);
5653                 now_ns = get_kvmclock_ns(kvm);
5654                 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
5655                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
5656                 break;
5657         }
5658         case KVM_GET_CLOCK: {
5659                 struct kvm_clock_data user_ns;
5660                 u64 now_ns;
5661
5662                 now_ns = get_kvmclock_ns(kvm);
5663                 user_ns.clock = now_ns;
5664                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
5665                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
5666
5667                 r = -EFAULT;
5668                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
5669                         goto out;
5670                 r = 0;
5671                 break;
5672         }
5673         case KVM_MEMORY_ENCRYPT_OP: {
5674                 r = -ENOTTY;
5675                 if (kvm_x86_ops.mem_enc_op)
5676                         r = kvm_x86_ops.mem_enc_op(kvm, argp);
5677                 break;
5678         }
5679         case KVM_MEMORY_ENCRYPT_REG_REGION: {
5680                 struct kvm_enc_region region;
5681
5682                 r = -EFAULT;
5683                 if (copy_from_user(&region, argp, sizeof(region)))
5684                         goto out;
5685
5686                 r = -ENOTTY;
5687                 if (kvm_x86_ops.mem_enc_reg_region)
5688                         r = kvm_x86_ops.mem_enc_reg_region(kvm, &region);
5689                 break;
5690         }
5691         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
5692                 struct kvm_enc_region region;
5693
5694                 r = -EFAULT;
5695                 if (copy_from_user(&region, argp, sizeof(region)))
5696                         goto out;
5697
5698                 r = -ENOTTY;
5699                 if (kvm_x86_ops.mem_enc_unreg_region)
5700                         r = kvm_x86_ops.mem_enc_unreg_region(kvm, &region);
5701                 break;
5702         }
5703         case KVM_HYPERV_EVENTFD: {
5704                 struct kvm_hyperv_eventfd hvevfd;
5705
5706                 r = -EFAULT;
5707                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
5708                         goto out;
5709                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
5710                 break;
5711         }
5712         case KVM_SET_PMU_EVENT_FILTER:
5713                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
5714                 break;
5715         case KVM_X86_SET_MSR_FILTER:
5716                 r = kvm_vm_ioctl_set_msr_filter(kvm, argp);
5717                 break;
5718         default:
5719                 r = -ENOTTY;
5720         }
5721 out:
5722         return r;
5723 }
5724
5725 static void kvm_init_msr_list(void)
5726 {
5727         struct x86_pmu_capability x86_pmu;
5728         u32 dummy[2];
5729         unsigned i;
5730
5731         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
5732                          "Please update the fixed PMCs in msrs_to_saved_all[]");
5733
5734         perf_get_x86_pmu_capability(&x86_pmu);
5735
5736         num_msrs_to_save = 0;
5737         num_emulated_msrs = 0;
5738         num_msr_based_features = 0;
5739
5740         for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
5741                 if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
5742                         continue;
5743
5744                 /*
5745                  * Even MSRs that are valid in the host may not be exposed
5746                  * to the guests in some cases.
5747                  */
5748                 switch (msrs_to_save_all[i]) {
5749                 case MSR_IA32_BNDCFGS:
5750                         if (!kvm_mpx_supported())
5751                                 continue;
5752                         break;
5753                 case MSR_TSC_AUX:
5754                         if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP))
5755                                 continue;
5756                         break;
5757                 case MSR_IA32_UMWAIT_CONTROL:
5758                         if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG))
5759                                 continue;
5760                         break;
5761                 case MSR_IA32_RTIT_CTL:
5762                 case MSR_IA32_RTIT_STATUS:
5763                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT))
5764                                 continue;
5765                         break;
5766                 case MSR_IA32_RTIT_CR3_MATCH:
5767                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
5768                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
5769                                 continue;
5770                         break;
5771                 case MSR_IA32_RTIT_OUTPUT_BASE:
5772                 case MSR_IA32_RTIT_OUTPUT_MASK:
5773                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
5774                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
5775                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
5776                                 continue;
5777                         break;
5778                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
5779                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
5780                                 msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
5781                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
5782                                 continue;
5783                         break;
5784                 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
5785                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
5786                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
5787                                 continue;
5788                         break;
5789                 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
5790                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
5791                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
5792                                 continue;
5793                         break;
5794                 default:
5795                         break;
5796                 }
5797
5798                 msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
5799         }
5800
5801         for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
5802                 if (!kvm_x86_ops.has_emulated_msr(NULL, emulated_msrs_all[i]))
5803                         continue;
5804
5805                 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
5806         }
5807
5808         for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
5809                 struct kvm_msr_entry msr;
5810
5811                 msr.index = msr_based_features_all[i];
5812                 if (kvm_get_msr_feature(&msr))
5813                         continue;
5814
5815                 msr_based_features[num_msr_based_features++] = msr_based_features_all[i];
5816         }
5817 }
5818
5819 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
5820                            const void *v)
5821 {
5822         int handled = 0;
5823         int n;
5824
5825         do {
5826                 n = min(len, 8);
5827                 if (!(lapic_in_kernel(vcpu) &&
5828                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
5829                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
5830                         break;
5831                 handled += n;
5832                 addr += n;
5833                 len -= n;
5834                 v += n;
5835         } while (len);
5836
5837         return handled;
5838 }
5839
5840 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
5841 {
5842         int handled = 0;
5843         int n;
5844
5845         do {
5846                 n = min(len, 8);
5847                 if (!(lapic_in_kernel(vcpu) &&
5848                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
5849                                          addr, n, v))
5850                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
5851                         break;
5852                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
5853                 handled += n;
5854                 addr += n;
5855                 len -= n;
5856                 v += n;
5857         } while (len);
5858
5859         return handled;
5860 }
5861
5862 static void kvm_set_segment(struct kvm_vcpu *vcpu,
5863                         struct kvm_segment *var, int seg)
5864 {
5865         kvm_x86_ops.set_segment(vcpu, var, seg);
5866 }
5867
5868 void kvm_get_segment(struct kvm_vcpu *vcpu,
5869                      struct kvm_segment *var, int seg)
5870 {
5871         kvm_x86_ops.get_segment(vcpu, var, seg);
5872 }
5873
5874 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
5875                            struct x86_exception *exception)
5876 {
5877         gpa_t t_gpa;
5878
5879         BUG_ON(!mmu_is_nested(vcpu));
5880
5881         /* NPT walks are always user-walks */
5882         access |= PFERR_USER_MASK;
5883         t_gpa  = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
5884
5885         return t_gpa;
5886 }
5887
5888 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
5889                               struct x86_exception *exception)
5890 {
5891         u32 access = (kvm_x86_ops.get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5892         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5893 }
5894
5895  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
5896                                 struct x86_exception *exception)
5897 {
5898         u32 access = (kvm_x86_ops.get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5899         access |= PFERR_FETCH_MASK;
5900         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5901 }
5902
5903 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
5904                                struct x86_exception *exception)
5905 {
5906         u32 access = (kvm_x86_ops.get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5907         access |= PFERR_WRITE_MASK;
5908         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5909 }
5910
5911 /* uses this to access any guest's mapped memory without checking CPL */
5912 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
5913                                 struct x86_exception *exception)
5914 {
5915         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
5916 }
5917
5918 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
5919                                       struct kvm_vcpu *vcpu, u32 access,
5920                                       struct x86_exception *exception)
5921 {
5922         void *data = val;
5923         int r = X86EMUL_CONTINUE;
5924
5925         while (bytes) {
5926                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
5927                                                             exception);
5928                 unsigned offset = addr & (PAGE_SIZE-1);
5929                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
5930                 int ret;
5931
5932                 if (gpa == UNMAPPED_GVA)
5933                         return X86EMUL_PROPAGATE_FAULT;
5934                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
5935                                                offset, toread);
5936                 if (ret < 0) {
5937                         r = X86EMUL_IO_NEEDED;
5938                         goto out;
5939                 }
5940
5941                 bytes -= toread;
5942                 data += toread;
5943                 addr += toread;
5944         }
5945 out:
5946         return r;
5947 }
5948
5949 /* used for instruction fetching */
5950 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
5951                                 gva_t addr, void *val, unsigned int bytes,
5952                                 struct x86_exception *exception)
5953 {
5954         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5955         u32 access = (kvm_x86_ops.get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5956         unsigned offset;
5957         int ret;
5958
5959         /* Inline kvm_read_guest_virt_helper for speed.  */
5960         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
5961                                                     exception);
5962         if (unlikely(gpa == UNMAPPED_GVA))
5963                 return X86EMUL_PROPAGATE_FAULT;
5964
5965         offset = addr & (PAGE_SIZE-1);
5966         if (WARN_ON(offset + bytes > PAGE_SIZE))
5967                 bytes = (unsigned)PAGE_SIZE - offset;
5968         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
5969                                        offset, bytes);
5970         if (unlikely(ret < 0))
5971                 return X86EMUL_IO_NEEDED;
5972
5973         return X86EMUL_CONTINUE;
5974 }
5975
5976 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
5977                                gva_t addr, void *val, unsigned int bytes,
5978                                struct x86_exception *exception)
5979 {
5980         u32 access = (kvm_x86_ops.get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5981
5982         /*
5983          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
5984          * is returned, but our callers are not ready for that and they blindly
5985          * call kvm_inject_page_fault.  Ensure that they at least do not leak
5986          * uninitialized kernel stack memory into cr2 and error code.
5987          */
5988         memset(exception, 0, sizeof(*exception));
5989         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
5990                                           exception);
5991 }
5992 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
5993
5994 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
5995                              gva_t addr, void *val, unsigned int bytes,
5996                              struct x86_exception *exception, bool system)
5997 {
5998         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5999         u32 access = 0;
6000
6001         if (!system && kvm_x86_ops.get_cpl(vcpu) == 3)
6002                 access |= PFERR_USER_MASK;
6003
6004         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
6005 }
6006
6007 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
6008                 unsigned long addr, void *val, unsigned int bytes)
6009 {
6010         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6011         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
6012
6013         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
6014 }
6015
6016 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6017                                       struct kvm_vcpu *vcpu, u32 access,
6018                                       struct x86_exception *exception)
6019 {
6020         void *data = val;
6021         int r = X86EMUL_CONTINUE;
6022
6023         while (bytes) {
6024                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
6025                                                              access,
6026                                                              exception);
6027                 unsigned offset = addr & (PAGE_SIZE-1);
6028                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
6029                 int ret;
6030
6031                 if (gpa == UNMAPPED_GVA)
6032                         return X86EMUL_PROPAGATE_FAULT;
6033                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
6034                 if (ret < 0) {
6035                         r = X86EMUL_IO_NEEDED;
6036                         goto out;
6037                 }
6038
6039                 bytes -= towrite;
6040                 data += towrite;
6041                 addr += towrite;
6042         }
6043 out:
6044         return r;
6045 }
6046
6047 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
6048                               unsigned int bytes, struct x86_exception *exception,
6049                               bool system)
6050 {
6051         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6052         u32 access = PFERR_WRITE_MASK;
6053
6054         if (!system && kvm_x86_ops.get_cpl(vcpu) == 3)
6055                 access |= PFERR_USER_MASK;
6056
6057         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6058                                            access, exception);
6059 }
6060
6061 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
6062                                 unsigned int bytes, struct x86_exception *exception)
6063 {
6064         /* kvm_write_guest_virt_system can pull in tons of pages. */
6065         vcpu->arch.l1tf_flush_l1d = true;
6066
6067         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6068                                            PFERR_WRITE_MASK, exception);
6069 }
6070 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
6071
6072 int handle_ud(struct kvm_vcpu *vcpu)
6073 {
6074         static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
6075         int emul_type = EMULTYPE_TRAP_UD;
6076         char sig[5]; /* ud2; .ascii "kvm" */
6077         struct x86_exception e;
6078
6079         if (unlikely(!kvm_x86_ops.can_emulate_instruction(vcpu, NULL, 0)))
6080                 return 1;
6081
6082         if (force_emulation_prefix &&
6083             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
6084                                 sig, sizeof(sig), &e) == 0 &&
6085             memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
6086                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
6087                 emul_type = EMULTYPE_TRAP_UD_FORCED;
6088         }
6089
6090         return kvm_emulate_instruction(vcpu, emul_type);
6091 }
6092 EXPORT_SYMBOL_GPL(handle_ud);
6093
6094 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6095                             gpa_t gpa, bool write)
6096 {
6097         /* For APIC access vmexit */
6098         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6099                 return 1;
6100
6101         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
6102                 trace_vcpu_match_mmio(gva, gpa, write, true);
6103                 return 1;
6104         }
6105
6106         return 0;
6107 }
6108
6109 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6110                                 gpa_t *gpa, struct x86_exception *exception,
6111                                 bool write)
6112 {
6113         u32 access = ((kvm_x86_ops.get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
6114                 | (write ? PFERR_WRITE_MASK : 0);
6115
6116         /*
6117          * currently PKRU is only applied to ept enabled guest so
6118          * there is no pkey in EPT page table for L1 guest or EPT
6119          * shadow page table for L2 guest.
6120          */
6121         if (vcpu_match_mmio_gva(vcpu, gva)
6122             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
6123                                  vcpu->arch.mmio_access, 0, access)) {
6124                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
6125                                         (gva & (PAGE_SIZE - 1));
6126                 trace_vcpu_match_mmio(gva, *gpa, write, false);
6127                 return 1;
6128         }
6129
6130         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6131
6132         if (*gpa == UNMAPPED_GVA)
6133                 return -1;
6134
6135         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
6136 }
6137
6138 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
6139                         const void *val, int bytes)
6140 {
6141         int ret;
6142
6143         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
6144         if (ret < 0)
6145                 return 0;
6146         kvm_page_track_write(vcpu, gpa, val, bytes);
6147         return 1;
6148 }
6149
6150 struct read_write_emulator_ops {
6151         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
6152                                   int bytes);
6153         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
6154                                   void *val, int bytes);
6155         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6156                                int bytes, void *val);
6157         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6158                                     void *val, int bytes);
6159         bool write;
6160 };
6161
6162 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
6163 {
6164         if (vcpu->mmio_read_completed) {
6165                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
6166                                vcpu->mmio_fragments[0].gpa, val);
6167                 vcpu->mmio_read_completed = 0;
6168                 return 1;
6169         }
6170
6171         return 0;
6172 }
6173
6174 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6175                         void *val, int bytes)
6176 {
6177         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
6178 }
6179
6180 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6181                          void *val, int bytes)
6182 {
6183         return emulator_write_phys(vcpu, gpa, val, bytes);
6184 }
6185
6186 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
6187 {
6188         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
6189         return vcpu_mmio_write(vcpu, gpa, bytes, val);
6190 }
6191
6192 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6193                           void *val, int bytes)
6194 {
6195         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
6196         return X86EMUL_IO_NEEDED;
6197 }
6198
6199 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6200                            void *val, int bytes)
6201 {
6202         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
6203
6204         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
6205         return X86EMUL_CONTINUE;
6206 }
6207
6208 static const struct read_write_emulator_ops read_emultor = {
6209         .read_write_prepare = read_prepare,
6210         .read_write_emulate = read_emulate,
6211         .read_write_mmio = vcpu_mmio_read,
6212         .read_write_exit_mmio = read_exit_mmio,
6213 };
6214
6215 static const struct read_write_emulator_ops write_emultor = {
6216         .read_write_emulate = write_emulate,
6217         .read_write_mmio = write_mmio,
6218         .read_write_exit_mmio = write_exit_mmio,
6219         .write = true,
6220 };
6221
6222 static int emulator_read_write_onepage(unsigned long addr, void *val,
6223                                        unsigned int bytes,
6224                                        struct x86_exception *exception,
6225                                        struct kvm_vcpu *vcpu,
6226                                        const struct read_write_emulator_ops *ops)
6227 {
6228         gpa_t gpa;
6229         int handled, ret;
6230         bool write = ops->write;
6231         struct kvm_mmio_fragment *frag;
6232         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6233
6234         /*
6235          * If the exit was due to a NPF we may already have a GPA.
6236          * If the GPA is present, use it to avoid the GVA to GPA table walk.
6237          * Note, this cannot be used on string operations since string
6238          * operation using rep will only have the initial GPA from the NPF
6239          * occurred.
6240          */
6241         if (ctxt->gpa_available && emulator_can_use_gpa(ctxt) &&
6242             (addr & ~PAGE_MASK) == (ctxt->gpa_val & ~PAGE_MASK)) {
6243                 gpa = ctxt->gpa_val;
6244                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
6245         } else {
6246                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
6247                 if (ret < 0)
6248                         return X86EMUL_PROPAGATE_FAULT;
6249         }
6250
6251         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
6252                 return X86EMUL_CONTINUE;
6253
6254         /*
6255          * Is this MMIO handled locally?
6256          */
6257         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
6258         if (handled == bytes)
6259                 return X86EMUL_CONTINUE;
6260
6261         gpa += handled;
6262         bytes -= handled;
6263         val += handled;
6264
6265         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
6266         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
6267         frag->gpa = gpa;
6268         frag->data = val;
6269         frag->len = bytes;
6270         return X86EMUL_CONTINUE;
6271 }
6272
6273 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
6274                         unsigned long addr,
6275                         void *val, unsigned int bytes,
6276                         struct x86_exception *exception,
6277                         const struct read_write_emulator_ops *ops)
6278 {
6279         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6280         gpa_t gpa;
6281         int rc;
6282
6283         if (ops->read_write_prepare &&
6284                   ops->read_write_prepare(vcpu, val, bytes))
6285                 return X86EMUL_CONTINUE;
6286
6287         vcpu->mmio_nr_fragments = 0;
6288
6289         /* Crossing a page boundary? */
6290         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
6291                 int now;
6292
6293                 now = -addr & ~PAGE_MASK;
6294                 rc = emulator_read_write_onepage(addr, val, now, exception,
6295                                                  vcpu, ops);
6296
6297                 if (rc != X86EMUL_CONTINUE)
6298                         return rc;
6299                 addr += now;
6300                 if (ctxt->mode != X86EMUL_MODE_PROT64)
6301                         addr = (u32)addr;
6302                 val += now;
6303                 bytes -= now;
6304         }
6305
6306         rc = emulator_read_write_onepage(addr, val, bytes, exception,
6307                                          vcpu, ops);
6308         if (rc != X86EMUL_CONTINUE)
6309                 return rc;
6310
6311         if (!vcpu->mmio_nr_fragments)
6312                 return rc;
6313
6314         gpa = vcpu->mmio_fragments[0].gpa;
6315
6316         vcpu->mmio_needed = 1;
6317         vcpu->mmio_cur_fragment = 0;
6318
6319         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
6320         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
6321         vcpu->run->exit_reason = KVM_EXIT_MMIO;
6322         vcpu->run->mmio.phys_addr = gpa;
6323
6324         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
6325 }
6326
6327 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
6328                                   unsigned long addr,
6329                                   void *val,
6330                                   unsigned int bytes,
6331                                   struct x86_exception *exception)
6332 {
6333         return emulator_read_write(ctxt, addr, val, bytes,
6334                                    exception, &read_emultor);
6335 }
6336
6337 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
6338                             unsigned long addr,
6339                             const void *val,
6340                             unsigned int bytes,
6341                             struct x86_exception *exception)
6342 {
6343         return emulator_read_write(ctxt, addr, (void *)val, bytes,
6344                                    exception, &write_emultor);
6345 }
6346
6347 #define CMPXCHG_TYPE(t, ptr, old, new) \
6348         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
6349
6350 #ifdef CONFIG_X86_64
6351 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
6352 #else
6353 #  define CMPXCHG64(ptr, old, new) \
6354         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
6355 #endif
6356
6357 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
6358                                      unsigned long addr,
6359                                      const void *old,
6360                                      const void *new,
6361                                      unsigned int bytes,
6362                                      struct x86_exception *exception)
6363 {
6364         struct kvm_host_map map;
6365         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6366         u64 page_line_mask;
6367         gpa_t gpa;
6368         char *kaddr;
6369         bool exchanged;
6370
6371         /* guests cmpxchg8b have to be emulated atomically */
6372         if (bytes > 8 || (bytes & (bytes - 1)))
6373                 goto emul_write;
6374
6375         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
6376
6377         if (gpa == UNMAPPED_GVA ||
6378             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6379                 goto emul_write;
6380
6381         /*
6382          * Emulate the atomic as a straight write to avoid #AC if SLD is
6383          * enabled in the host and the access splits a cache line.
6384          */
6385         if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))
6386                 page_line_mask = ~(cache_line_size() - 1);
6387         else
6388                 page_line_mask = PAGE_MASK;
6389
6390         if (((gpa + bytes - 1) & page_line_mask) != (gpa & page_line_mask))
6391                 goto emul_write;
6392
6393         if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
6394                 goto emul_write;
6395
6396         kaddr = map.hva + offset_in_page(gpa);
6397
6398         switch (bytes) {
6399         case 1:
6400                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
6401                 break;
6402         case 2:
6403                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
6404                 break;
6405         case 4:
6406                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
6407                 break;
6408         case 8:
6409                 exchanged = CMPXCHG64(kaddr, old, new);
6410                 break;
6411         default:
6412                 BUG();
6413         }
6414
6415         kvm_vcpu_unmap(vcpu, &map, true);
6416
6417         if (!exchanged)
6418                 return X86EMUL_CMPXCHG_FAILED;
6419
6420         kvm_page_track_write(vcpu, gpa, new, bytes);
6421
6422         return X86EMUL_CONTINUE;
6423
6424 emul_write:
6425         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
6426
6427         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
6428 }
6429
6430 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
6431 {
6432         int r = 0, i;
6433
6434         for (i = 0; i < vcpu->arch.pio.count; i++) {
6435                 if (vcpu->arch.pio.in)
6436                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
6437                                             vcpu->arch.pio.size, pd);
6438                 else
6439                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
6440                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
6441                                              pd);
6442                 if (r)
6443                         break;
6444                 pd += vcpu->arch.pio.size;
6445         }
6446         return r;
6447 }
6448
6449 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
6450                                unsigned short port, void *val,
6451                                unsigned int count, bool in)
6452 {
6453         vcpu->arch.pio.port = port;
6454         vcpu->arch.pio.in = in;
6455         vcpu->arch.pio.count  = count;
6456         vcpu->arch.pio.size = size;
6457
6458         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
6459                 vcpu->arch.pio.count = 0;
6460                 return 1;
6461         }
6462
6463         vcpu->run->exit_reason = KVM_EXIT_IO;
6464         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
6465         vcpu->run->io.size = size;
6466         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
6467         vcpu->run->io.count = count;
6468         vcpu->run->io.port = port;
6469
6470         return 0;
6471 }
6472
6473 static int emulator_pio_in(struct kvm_vcpu *vcpu, int size,
6474                            unsigned short port, void *val, unsigned int count)
6475 {
6476         int ret;
6477
6478         if (vcpu->arch.pio.count)
6479                 goto data_avail;
6480
6481         memset(vcpu->arch.pio_data, 0, size * count);
6482
6483         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
6484         if (ret) {
6485 data_avail:
6486                 memcpy(val, vcpu->arch.pio_data, size * count);
6487                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
6488                 vcpu->arch.pio.count = 0;
6489                 return 1;
6490         }
6491
6492         return 0;
6493 }
6494
6495 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
6496                                     int size, unsigned short port, void *val,
6497                                     unsigned int count)
6498 {
6499         return emulator_pio_in(emul_to_vcpu(ctxt), size, port, val, count);
6500
6501 }
6502
6503 static int emulator_pio_out(struct kvm_vcpu *vcpu, int size,
6504                             unsigned short port, const void *val,
6505                             unsigned int count)
6506 {
6507         memcpy(vcpu->arch.pio_data, val, size * count);
6508         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
6509         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
6510 }
6511
6512 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
6513                                      int size, unsigned short port,
6514                                      const void *val, unsigned int count)
6515 {
6516         return emulator_pio_out(emul_to_vcpu(ctxt), size, port, val, count);
6517 }
6518
6519 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
6520 {
6521         return kvm_x86_ops.get_segment_base(vcpu, seg);
6522 }
6523
6524 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
6525 {
6526         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
6527 }
6528
6529 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
6530 {
6531         if (!need_emulate_wbinvd(vcpu))
6532                 return X86EMUL_CONTINUE;
6533
6534         if (kvm_x86_ops.has_wbinvd_exit()) {
6535                 int cpu = get_cpu();
6536
6537                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
6538                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
6539                                 wbinvd_ipi, NULL, 1);
6540                 put_cpu();
6541                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
6542         } else
6543                 wbinvd();
6544         return X86EMUL_CONTINUE;
6545 }
6546
6547 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
6548 {
6549         kvm_emulate_wbinvd_noskip(vcpu);
6550         return kvm_skip_emulated_instruction(vcpu);
6551 }
6552 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
6553
6554
6555
6556 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
6557 {
6558         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
6559 }
6560
6561 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
6562                            unsigned long *dest)
6563 {
6564         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
6565 }
6566
6567 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
6568                            unsigned long value)
6569 {
6570
6571         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
6572 }
6573
6574 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
6575 {
6576         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
6577 }
6578
6579 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
6580 {
6581         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6582         unsigned long value;
6583
6584         switch (cr) {
6585         case 0:
6586                 value = kvm_read_cr0(vcpu);
6587                 break;
6588         case 2:
6589                 value = vcpu->arch.cr2;
6590                 break;
6591         case 3:
6592                 value = kvm_read_cr3(vcpu);
6593                 break;
6594         case 4:
6595                 value = kvm_read_cr4(vcpu);
6596                 break;
6597         case 8:
6598                 value = kvm_get_cr8(vcpu);
6599                 break;
6600         default:
6601                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
6602                 return 0;
6603         }
6604
6605         return value;
6606 }
6607
6608 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
6609 {
6610         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6611         int res = 0;
6612
6613         switch (cr) {
6614         case 0:
6615                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
6616                 break;
6617         case 2:
6618                 vcpu->arch.cr2 = val;
6619                 break;
6620         case 3:
6621                 res = kvm_set_cr3(vcpu, val);
6622                 break;
6623         case 4:
6624                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
6625                 break;
6626         case 8:
6627                 res = kvm_set_cr8(vcpu, val);
6628                 break;
6629         default:
6630                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
6631                 res = -1;
6632         }
6633
6634         return res;
6635 }
6636
6637 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
6638 {
6639         return kvm_x86_ops.get_cpl(emul_to_vcpu(ctxt));
6640 }
6641
6642 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6643 {
6644         kvm_x86_ops.get_gdt(emul_to_vcpu(ctxt), dt);
6645 }
6646
6647 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6648 {
6649         kvm_x86_ops.get_idt(emul_to_vcpu(ctxt), dt);
6650 }
6651
6652 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6653 {
6654         kvm_x86_ops.set_gdt(emul_to_vcpu(ctxt), dt);
6655 }
6656
6657 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6658 {
6659         kvm_x86_ops.set_idt(emul_to_vcpu(ctxt), dt);
6660 }
6661
6662 static unsigned long emulator_get_cached_segment_base(
6663         struct x86_emulate_ctxt *ctxt, int seg)
6664 {
6665         return get_segment_base(emul_to_vcpu(ctxt), seg);
6666 }
6667
6668 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
6669                                  struct desc_struct *desc, u32 *base3,
6670                                  int seg)
6671 {
6672         struct kvm_segment var;
6673
6674         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
6675         *selector = var.selector;
6676
6677         if (var.unusable) {
6678                 memset(desc, 0, sizeof(*desc));
6679                 if (base3)
6680                         *base3 = 0;
6681                 return false;
6682         }
6683
6684         if (var.g)
6685                 var.limit >>= 12;
6686         set_desc_limit(desc, var.limit);
6687         set_desc_base(desc, (unsigned long)var.base);
6688 #ifdef CONFIG_X86_64
6689         if (base3)
6690                 *base3 = var.base >> 32;
6691 #endif
6692         desc->type = var.type;
6693         desc->s = var.s;
6694         desc->dpl = var.dpl;
6695         desc->p = var.present;
6696         desc->avl = var.avl;
6697         desc->l = var.l;
6698         desc->d = var.db;
6699         desc->g = var.g;
6700
6701         return true;
6702 }
6703
6704 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
6705                                  struct desc_struct *desc, u32 base3,
6706                                  int seg)
6707 {
6708         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6709         struct kvm_segment var;
6710
6711         var.selector = selector;
6712         var.base = get_desc_base(desc);
6713 #ifdef CONFIG_X86_64
6714         var.base |= ((u64)base3) << 32;
6715 #endif
6716         var.limit = get_desc_limit(desc);
6717         if (desc->g)
6718                 var.limit = (var.limit << 12) | 0xfff;
6719         var.type = desc->type;
6720         var.dpl = desc->dpl;
6721         var.db = desc->d;
6722         var.s = desc->s;
6723         var.l = desc->l;
6724         var.g = desc->g;
6725         var.avl = desc->avl;
6726         var.present = desc->p;
6727         var.unusable = !var.present;
6728         var.padding = 0;
6729
6730         kvm_set_segment(vcpu, &var, seg);
6731         return;
6732 }
6733
6734 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
6735                             u32 msr_index, u64 *pdata)
6736 {
6737         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6738         int r;
6739
6740         r = kvm_get_msr(vcpu, msr_index, pdata);
6741
6742         if (r && kvm_get_msr_user_space(vcpu, msr_index, r)) {
6743                 /* Bounce to user space */
6744                 return X86EMUL_IO_NEEDED;
6745         }
6746
6747         return r;
6748 }
6749
6750 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
6751                             u32 msr_index, u64 data)
6752 {
6753         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6754         int r;
6755
6756         r = kvm_set_msr(vcpu, msr_index, data);
6757
6758         if (r && kvm_set_msr_user_space(vcpu, msr_index, data, r)) {
6759                 /* Bounce to user space */
6760                 return X86EMUL_IO_NEEDED;
6761         }
6762
6763         return r;
6764 }
6765
6766 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
6767 {
6768         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6769
6770         return vcpu->arch.smbase;
6771 }
6772
6773 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
6774 {
6775         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6776
6777         vcpu->arch.smbase = smbase;
6778 }
6779
6780 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
6781                               u32 pmc)
6782 {
6783         return kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc);
6784 }
6785
6786 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
6787                              u32 pmc, u64 *pdata)
6788 {
6789         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
6790 }
6791
6792 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
6793 {
6794         emul_to_vcpu(ctxt)->arch.halt_request = 1;
6795 }
6796
6797 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
6798                               struct x86_instruction_info *info,
6799                               enum x86_intercept_stage stage)
6800 {
6801         return kvm_x86_ops.check_intercept(emul_to_vcpu(ctxt), info, stage,
6802                                             &ctxt->exception);
6803 }
6804
6805 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
6806                               u32 *eax, u32 *ebx, u32 *ecx, u32 *edx,
6807                               bool exact_only)
6808 {
6809         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, exact_only);
6810 }
6811
6812 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
6813 {
6814         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
6815 }
6816
6817 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
6818 {
6819         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
6820 }
6821
6822 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
6823 {
6824         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
6825 }
6826
6827 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
6828 {
6829         return kvm_register_read(emul_to_vcpu(ctxt), reg);
6830 }
6831
6832 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
6833 {
6834         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
6835 }
6836
6837 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
6838 {
6839         kvm_x86_ops.set_nmi_mask(emul_to_vcpu(ctxt), masked);
6840 }
6841
6842 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
6843 {
6844         return emul_to_vcpu(ctxt)->arch.hflags;
6845 }
6846
6847 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
6848 {
6849         emul_to_vcpu(ctxt)->arch.hflags = emul_flags;
6850 }
6851
6852 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt,
6853                                   const char *smstate)
6854 {
6855         return kvm_x86_ops.pre_leave_smm(emul_to_vcpu(ctxt), smstate);
6856 }
6857
6858 static void emulator_post_leave_smm(struct x86_emulate_ctxt *ctxt)
6859 {
6860         kvm_smm_changed(emul_to_vcpu(ctxt));
6861 }
6862
6863 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
6864 {
6865         return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
6866 }
6867
6868 static const struct x86_emulate_ops emulate_ops = {
6869         .read_gpr            = emulator_read_gpr,
6870         .write_gpr           = emulator_write_gpr,
6871         .read_std            = emulator_read_std,
6872         .write_std           = emulator_write_std,
6873         .read_phys           = kvm_read_guest_phys_system,
6874         .fetch               = kvm_fetch_guest_virt,
6875         .read_emulated       = emulator_read_emulated,
6876         .write_emulated      = emulator_write_emulated,
6877         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
6878         .invlpg              = emulator_invlpg,
6879         .pio_in_emulated     = emulator_pio_in_emulated,
6880         .pio_out_emulated    = emulator_pio_out_emulated,
6881         .get_segment         = emulator_get_segment,
6882         .set_segment         = emulator_set_segment,
6883         .get_cached_segment_base = emulator_get_cached_segment_base,
6884         .get_gdt             = emulator_get_gdt,
6885         .get_idt             = emulator_get_idt,
6886         .set_gdt             = emulator_set_gdt,
6887         .set_idt             = emulator_set_idt,
6888         .get_cr              = emulator_get_cr,
6889         .set_cr              = emulator_set_cr,
6890         .cpl                 = emulator_get_cpl,
6891         .get_dr              = emulator_get_dr,
6892         .set_dr              = emulator_set_dr,
6893         .get_smbase          = emulator_get_smbase,
6894         .set_smbase          = emulator_set_smbase,
6895         .set_msr             = emulator_set_msr,
6896         .get_msr             = emulator_get_msr,
6897         .check_pmc           = emulator_check_pmc,
6898         .read_pmc            = emulator_read_pmc,
6899         .halt                = emulator_halt,
6900         .wbinvd              = emulator_wbinvd,
6901         .fix_hypercall       = emulator_fix_hypercall,
6902         .intercept           = emulator_intercept,
6903         .get_cpuid           = emulator_get_cpuid,
6904         .guest_has_long_mode = emulator_guest_has_long_mode,
6905         .guest_has_movbe     = emulator_guest_has_movbe,
6906         .guest_has_fxsr      = emulator_guest_has_fxsr,
6907         .set_nmi_mask        = emulator_set_nmi_mask,
6908         .get_hflags          = emulator_get_hflags,
6909         .set_hflags          = emulator_set_hflags,
6910         .pre_leave_smm       = emulator_pre_leave_smm,
6911         .post_leave_smm      = emulator_post_leave_smm,
6912         .set_xcr             = emulator_set_xcr,
6913 };
6914
6915 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
6916 {
6917         u32 int_shadow = kvm_x86_ops.get_interrupt_shadow(vcpu);
6918         /*
6919          * an sti; sti; sequence only disable interrupts for the first
6920          * instruction. So, if the last instruction, be it emulated or
6921          * not, left the system with the INT_STI flag enabled, it
6922          * means that the last instruction is an sti. We should not
6923          * leave the flag on in this case. The same goes for mov ss
6924          */
6925         if (int_shadow & mask)
6926                 mask = 0;
6927         if (unlikely(int_shadow || mask)) {
6928                 kvm_x86_ops.set_interrupt_shadow(vcpu, mask);
6929                 if (!mask)
6930                         kvm_make_request(KVM_REQ_EVENT, vcpu);
6931         }
6932 }
6933
6934 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
6935 {
6936         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6937         if (ctxt->exception.vector == PF_VECTOR)
6938                 return kvm_inject_emulated_page_fault(vcpu, &ctxt->exception);
6939
6940         if (ctxt->exception.error_code_valid)
6941                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
6942                                       ctxt->exception.error_code);
6943         else
6944                 kvm_queue_exception(vcpu, ctxt->exception.vector);
6945         return false;
6946 }
6947
6948 static struct x86_emulate_ctxt *alloc_emulate_ctxt(struct kvm_vcpu *vcpu)
6949 {
6950         struct x86_emulate_ctxt *ctxt;
6951
6952         ctxt = kmem_cache_zalloc(x86_emulator_cache, GFP_KERNEL_ACCOUNT);
6953         if (!ctxt) {
6954                 pr_err("kvm: failed to allocate vcpu's emulator\n");
6955                 return NULL;
6956         }
6957
6958         ctxt->vcpu = vcpu;
6959         ctxt->ops = &emulate_ops;
6960         vcpu->arch.emulate_ctxt = ctxt;
6961
6962         return ctxt;
6963 }
6964
6965 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
6966 {
6967         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6968         int cs_db, cs_l;
6969
6970         kvm_x86_ops.get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
6971
6972         ctxt->gpa_available = false;
6973         ctxt->eflags = kvm_get_rflags(vcpu);
6974         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
6975
6976         ctxt->eip = kvm_rip_read(vcpu);
6977         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
6978                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
6979                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
6980                      cs_db                              ? X86EMUL_MODE_PROT32 :
6981                                                           X86EMUL_MODE_PROT16;
6982         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
6983         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
6984         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
6985
6986         init_decode_cache(ctxt);
6987         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
6988 }
6989
6990 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
6991 {
6992         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6993         int ret;
6994
6995         init_emulate_ctxt(vcpu);
6996
6997         ctxt->op_bytes = 2;
6998         ctxt->ad_bytes = 2;
6999         ctxt->_eip = ctxt->eip + inc_eip;
7000         ret = emulate_int_real(ctxt, irq);
7001
7002         if (ret != X86EMUL_CONTINUE) {
7003                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
7004         } else {
7005                 ctxt->eip = ctxt->_eip;
7006                 kvm_rip_write(vcpu, ctxt->eip);
7007                 kvm_set_rflags(vcpu, ctxt->eflags);
7008         }
7009 }
7010 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
7011
7012 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
7013 {
7014         ++vcpu->stat.insn_emulation_fail;
7015         trace_kvm_emulate_insn_failed(vcpu);
7016
7017         if (emulation_type & EMULTYPE_VMWARE_GP) {
7018                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7019                 return 1;
7020         }
7021
7022         if (emulation_type & EMULTYPE_SKIP) {
7023                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7024                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
7025                 vcpu->run->internal.ndata = 0;
7026                 return 0;
7027         }
7028
7029         kvm_queue_exception(vcpu, UD_VECTOR);
7030
7031         if (!is_guest_mode(vcpu) && kvm_x86_ops.get_cpl(vcpu) == 0) {
7032                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7033                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
7034                 vcpu->run->internal.ndata = 0;
7035                 return 0;
7036         }
7037
7038         return 1;
7039 }
7040
7041 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7042                                   bool write_fault_to_shadow_pgtable,
7043                                   int emulation_type)
7044 {
7045         gpa_t gpa = cr2_or_gpa;
7046         kvm_pfn_t pfn;
7047
7048         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7049                 return false;
7050
7051         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7052             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7053                 return false;
7054
7055         if (!vcpu->arch.mmu->direct_map) {
7056                 /*
7057                  * Write permission should be allowed since only
7058                  * write access need to be emulated.
7059                  */
7060                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7061
7062                 /*
7063                  * If the mapping is invalid in guest, let cpu retry
7064                  * it to generate fault.
7065                  */
7066                 if (gpa == UNMAPPED_GVA)
7067                         return true;
7068         }
7069
7070         /*
7071          * Do not retry the unhandleable instruction if it faults on the
7072          * readonly host memory, otherwise it will goto a infinite loop:
7073          * retry instruction -> write #PF -> emulation fail -> retry
7074          * instruction -> ...
7075          */
7076         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
7077
7078         /*
7079          * If the instruction failed on the error pfn, it can not be fixed,
7080          * report the error to userspace.
7081          */
7082         if (is_error_noslot_pfn(pfn))
7083                 return false;
7084
7085         kvm_release_pfn_clean(pfn);
7086
7087         /* The instructions are well-emulated on direct mmu. */
7088         if (vcpu->arch.mmu->direct_map) {
7089                 unsigned int indirect_shadow_pages;
7090
7091                 spin_lock(&vcpu->kvm->mmu_lock);
7092                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
7093                 spin_unlock(&vcpu->kvm->mmu_lock);
7094
7095                 if (indirect_shadow_pages)
7096                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7097
7098                 return true;
7099         }
7100
7101         /*
7102          * if emulation was due to access to shadowed page table
7103          * and it failed try to unshadow page and re-enter the
7104          * guest to let CPU execute the instruction.
7105          */
7106         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7107
7108         /*
7109          * If the access faults on its page table, it can not
7110          * be fixed by unprotecting shadow page and it should
7111          * be reported to userspace.
7112          */
7113         return !write_fault_to_shadow_pgtable;
7114 }
7115
7116 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
7117                               gpa_t cr2_or_gpa,  int emulation_type)
7118 {
7119         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7120         unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
7121
7122         last_retry_eip = vcpu->arch.last_retry_eip;
7123         last_retry_addr = vcpu->arch.last_retry_addr;
7124
7125         /*
7126          * If the emulation is caused by #PF and it is non-page_table
7127          * writing instruction, it means the VM-EXIT is caused by shadow
7128          * page protected, we can zap the shadow page and retry this
7129          * instruction directly.
7130          *
7131          * Note: if the guest uses a non-page-table modifying instruction
7132          * on the PDE that points to the instruction, then we will unmap
7133          * the instruction and go to an infinite loop. So, we cache the
7134          * last retried eip and the last fault address, if we meet the eip
7135          * and the address again, we can break out of the potential infinite
7136          * loop.
7137          */
7138         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
7139
7140         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7141                 return false;
7142
7143         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7144             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7145                 return false;
7146
7147         if (x86_page_table_writing_insn(ctxt))
7148                 return false;
7149
7150         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
7151                 return false;
7152
7153         vcpu->arch.last_retry_eip = ctxt->eip;
7154         vcpu->arch.last_retry_addr = cr2_or_gpa;
7155
7156         if (!vcpu->arch.mmu->direct_map)
7157                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7158
7159         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7160
7161         return true;
7162 }
7163
7164 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
7165 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
7166
7167 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
7168 {
7169         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
7170                 /* This is a good place to trace that we are exiting SMM.  */
7171                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
7172
7173                 /* Process a latched INIT or SMI, if any.  */
7174                 kvm_make_request(KVM_REQ_EVENT, vcpu);
7175         }
7176
7177         kvm_mmu_reset_context(vcpu);
7178 }
7179
7180 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
7181                                 unsigned long *db)
7182 {
7183         u32 dr6 = 0;
7184         int i;
7185         u32 enable, rwlen;
7186
7187         enable = dr7;
7188         rwlen = dr7 >> 16;
7189         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
7190                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
7191                         dr6 |= (1 << i);
7192         return dr6;
7193 }
7194
7195 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
7196 {
7197         struct kvm_run *kvm_run = vcpu->run;
7198
7199         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
7200                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 | DR6_RTM;
7201                 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu);
7202                 kvm_run->debug.arch.exception = DB_VECTOR;
7203                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
7204                 return 0;
7205         }
7206         kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
7207         return 1;
7208 }
7209
7210 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
7211 {
7212         unsigned long rflags = kvm_x86_ops.get_rflags(vcpu);
7213         int r;
7214
7215         r = kvm_x86_ops.skip_emulated_instruction(vcpu);
7216         if (unlikely(!r))
7217                 return 0;
7218
7219         /*
7220          * rflags is the old, "raw" value of the flags.  The new value has
7221          * not been saved yet.
7222          *
7223          * This is correct even for TF set by the guest, because "the
7224          * processor will not generate this exception after the instruction
7225          * that sets the TF flag".
7226          */
7227         if (unlikely(rflags & X86_EFLAGS_TF))
7228                 r = kvm_vcpu_do_singlestep(vcpu);
7229         return r;
7230 }
7231 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
7232
7233 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
7234 {
7235         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
7236             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
7237                 struct kvm_run *kvm_run = vcpu->run;
7238                 unsigned long eip = kvm_get_linear_rip(vcpu);
7239                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7240                                            vcpu->arch.guest_debug_dr7,
7241                                            vcpu->arch.eff_db);
7242
7243                 if (dr6 != 0) {
7244                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
7245                         kvm_run->debug.arch.pc = eip;
7246                         kvm_run->debug.arch.exception = DB_VECTOR;
7247                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
7248                         *r = 0;
7249                         return true;
7250                 }
7251         }
7252
7253         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
7254             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
7255                 unsigned long eip = kvm_get_linear_rip(vcpu);
7256                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7257                                            vcpu->arch.dr7,
7258                                            vcpu->arch.db);
7259
7260                 if (dr6 != 0) {
7261                         kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
7262                         *r = 1;
7263                         return true;
7264                 }
7265         }
7266
7267         return false;
7268 }
7269
7270 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
7271 {
7272         switch (ctxt->opcode_len) {
7273         case 1:
7274                 switch (ctxt->b) {
7275                 case 0xe4:      /* IN */
7276                 case 0xe5:
7277                 case 0xec:
7278                 case 0xed:
7279                 case 0xe6:      /* OUT */
7280                 case 0xe7:
7281                 case 0xee:
7282                 case 0xef:
7283                 case 0x6c:      /* INS */
7284                 case 0x6d:
7285                 case 0x6e:      /* OUTS */
7286                 case 0x6f:
7287                         return true;
7288                 }
7289                 break;
7290         case 2:
7291                 switch (ctxt->b) {
7292                 case 0x33:      /* RDPMC */
7293                         return true;
7294                 }
7295                 break;
7296         }
7297
7298         return false;
7299 }
7300
7301 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7302                             int emulation_type, void *insn, int insn_len)
7303 {
7304         int r;
7305         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7306         bool writeback = true;
7307         bool write_fault_to_spt;
7308
7309         if (unlikely(!kvm_x86_ops.can_emulate_instruction(vcpu, insn, insn_len)))
7310                 return 1;
7311
7312         vcpu->arch.l1tf_flush_l1d = true;
7313
7314         /*
7315          * Clear write_fault_to_shadow_pgtable here to ensure it is
7316          * never reused.
7317          */
7318         write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
7319         vcpu->arch.write_fault_to_shadow_pgtable = false;
7320         kvm_clear_exception_queue(vcpu);
7321
7322         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
7323                 init_emulate_ctxt(vcpu);
7324
7325                 /*
7326                  * We will reenter on the same instruction since
7327                  * we do not set complete_userspace_io.  This does not
7328                  * handle watchpoints yet, those would be handled in
7329                  * the emulate_ops.
7330                  */
7331                 if (!(emulation_type & EMULTYPE_SKIP) &&
7332                     kvm_vcpu_check_breakpoint(vcpu, &r))
7333                         return r;
7334
7335                 ctxt->interruptibility = 0;
7336                 ctxt->have_exception = false;
7337                 ctxt->exception.vector = -1;
7338                 ctxt->perm_ok = false;
7339
7340                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
7341
7342                 r = x86_decode_insn(ctxt, insn, insn_len);
7343
7344                 trace_kvm_emulate_insn_start(vcpu);
7345                 ++vcpu->stat.insn_emulation;
7346                 if (r != EMULATION_OK)  {
7347                         if ((emulation_type & EMULTYPE_TRAP_UD) ||
7348                             (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
7349                                 kvm_queue_exception(vcpu, UD_VECTOR);
7350                                 return 1;
7351                         }
7352                         if (reexecute_instruction(vcpu, cr2_or_gpa,
7353                                                   write_fault_to_spt,
7354                                                   emulation_type))
7355                                 return 1;
7356                         if (ctxt->have_exception) {
7357                                 /*
7358                                  * #UD should result in just EMULATION_FAILED, and trap-like
7359                                  * exception should not be encountered during decode.
7360                                  */
7361                                 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
7362                                              exception_type(ctxt->exception.vector) == EXCPT_TRAP);
7363                                 inject_emulated_exception(vcpu);
7364                                 return 1;
7365                         }
7366                         return handle_emulation_failure(vcpu, emulation_type);
7367                 }
7368         }
7369
7370         if ((emulation_type & EMULTYPE_VMWARE_GP) &&
7371             !is_vmware_backdoor_opcode(ctxt)) {
7372                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7373                 return 1;
7374         }
7375
7376         /*
7377          * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
7378          * for kvm_skip_emulated_instruction().  The caller is responsible for
7379          * updating interruptibility state and injecting single-step #DBs.
7380          */
7381         if (emulation_type & EMULTYPE_SKIP) {
7382                 kvm_rip_write(vcpu, ctxt->_eip);
7383                 if (ctxt->eflags & X86_EFLAGS_RF)
7384                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
7385                 return 1;
7386         }
7387
7388         if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
7389                 return 1;
7390
7391         /* this is needed for vmware backdoor interface to work since it
7392            changes registers values  during IO operation */
7393         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
7394                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7395                 emulator_invalidate_register_cache(ctxt);
7396         }
7397
7398 restart:
7399         if (emulation_type & EMULTYPE_PF) {
7400                 /* Save the faulting GPA (cr2) in the address field */
7401                 ctxt->exception.address = cr2_or_gpa;
7402
7403                 /* With shadow page tables, cr2 contains a GVA or nGPA. */
7404                 if (vcpu->arch.mmu->direct_map) {
7405                         ctxt->gpa_available = true;
7406                         ctxt->gpa_val = cr2_or_gpa;
7407                 }
7408         } else {
7409                 /* Sanitize the address out of an abundance of paranoia. */
7410                 ctxt->exception.address = 0;
7411         }
7412
7413         r = x86_emulate_insn(ctxt);
7414
7415         if (r == EMULATION_INTERCEPTED)
7416                 return 1;
7417
7418         if (r == EMULATION_FAILED) {
7419                 if (reexecute_instruction(vcpu, cr2_or_gpa, write_fault_to_spt,
7420                                         emulation_type))
7421                         return 1;
7422
7423                 return handle_emulation_failure(vcpu, emulation_type);
7424         }
7425
7426         if (ctxt->have_exception) {
7427                 r = 1;
7428                 if (inject_emulated_exception(vcpu))
7429                         return r;
7430         } else if (vcpu->arch.pio.count) {
7431                 if (!vcpu->arch.pio.in) {
7432                         /* FIXME: return into emulator if single-stepping.  */
7433                         vcpu->arch.pio.count = 0;
7434                 } else {
7435                         writeback = false;
7436                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
7437                 }
7438                 r = 0;
7439         } else if (vcpu->mmio_needed) {
7440                 ++vcpu->stat.mmio_exits;
7441
7442                 if (!vcpu->mmio_is_write)
7443                         writeback = false;
7444                 r = 0;
7445                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7446         } else if (r == EMULATION_RESTART)
7447                 goto restart;
7448         else
7449                 r = 1;
7450
7451         if (writeback) {
7452                 unsigned long rflags = kvm_x86_ops.get_rflags(vcpu);
7453                 toggle_interruptibility(vcpu, ctxt->interruptibility);
7454                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7455                 if (!ctxt->have_exception ||
7456                     exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
7457                         kvm_rip_write(vcpu, ctxt->eip);
7458                         if (r && (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
7459                                 r = kvm_vcpu_do_singlestep(vcpu);
7460                         if (kvm_x86_ops.update_emulated_instruction)
7461                                 kvm_x86_ops.update_emulated_instruction(vcpu);
7462                         __kvm_set_rflags(vcpu, ctxt->eflags);
7463                 }
7464
7465                 /*
7466                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
7467                  * do nothing, and it will be requested again as soon as
7468                  * the shadow expires.  But we still need to check here,
7469                  * because POPF has no interrupt shadow.
7470                  */
7471                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
7472                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7473         } else
7474                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
7475
7476         return r;
7477 }
7478
7479 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
7480 {
7481         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
7482 }
7483 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
7484
7485 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
7486                                         void *insn, int insn_len)
7487 {
7488         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
7489 }
7490 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
7491
7492 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
7493 {
7494         vcpu->arch.pio.count = 0;
7495         return 1;
7496 }
7497
7498 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
7499 {
7500         vcpu->arch.pio.count = 0;
7501
7502         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
7503                 return 1;
7504
7505         return kvm_skip_emulated_instruction(vcpu);
7506 }
7507
7508 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
7509                             unsigned short port)
7510 {
7511         unsigned long val = kvm_rax_read(vcpu);
7512         int ret = emulator_pio_out(vcpu, size, port, &val, 1);
7513
7514         if (ret)
7515                 return ret;
7516
7517         /*
7518          * Workaround userspace that relies on old KVM behavior of %rip being
7519          * incremented prior to exiting to userspace to handle "OUT 0x7e".
7520          */
7521         if (port == 0x7e &&
7522             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
7523                 vcpu->arch.complete_userspace_io =
7524                         complete_fast_pio_out_port_0x7e;
7525                 kvm_skip_emulated_instruction(vcpu);
7526         } else {
7527                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
7528                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
7529         }
7530         return 0;
7531 }
7532
7533 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
7534 {
7535         unsigned long val;
7536
7537         /* We should only ever be called with arch.pio.count equal to 1 */
7538         BUG_ON(vcpu->arch.pio.count != 1);
7539
7540         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
7541                 vcpu->arch.pio.count = 0;
7542                 return 1;
7543         }
7544
7545         /* For size less than 4 we merge, else we zero extend */
7546         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
7547
7548         /*
7549          * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
7550          * the copy and tracing
7551          */
7552         emulator_pio_in(vcpu, vcpu->arch.pio.size, vcpu->arch.pio.port, &val, 1);
7553         kvm_rax_write(vcpu, val);
7554
7555         return kvm_skip_emulated_instruction(vcpu);
7556 }
7557
7558 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
7559                            unsigned short port)
7560 {
7561         unsigned long val;
7562         int ret;
7563
7564         /* For size less than 4 we merge, else we zero extend */
7565         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
7566
7567         ret = emulator_pio_in(vcpu, size, port, &val, 1);
7568         if (ret) {
7569                 kvm_rax_write(vcpu, val);
7570                 return ret;
7571         }
7572
7573         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
7574         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
7575
7576         return 0;
7577 }
7578
7579 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
7580 {
7581         int ret;
7582
7583         if (in)
7584                 ret = kvm_fast_pio_in(vcpu, size, port);
7585         else
7586                 ret = kvm_fast_pio_out(vcpu, size, port);
7587         return ret && kvm_skip_emulated_instruction(vcpu);
7588 }
7589 EXPORT_SYMBOL_GPL(kvm_fast_pio);
7590
7591 static int kvmclock_cpu_down_prep(unsigned int cpu)
7592 {
7593         __this_cpu_write(cpu_tsc_khz, 0);
7594         return 0;
7595 }
7596
7597 static void tsc_khz_changed(void *data)
7598 {
7599         struct cpufreq_freqs *freq = data;
7600         unsigned long khz = 0;
7601
7602         if (data)
7603                 khz = freq->new;
7604         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
7605                 khz = cpufreq_quick_get(raw_smp_processor_id());
7606         if (!khz)
7607                 khz = tsc_khz;
7608         __this_cpu_write(cpu_tsc_khz, khz);
7609 }
7610
7611 #ifdef CONFIG_X86_64
7612 static void kvm_hyperv_tsc_notifier(void)
7613 {
7614         struct kvm *kvm;
7615         struct kvm_vcpu *vcpu;
7616         int cpu;
7617
7618         mutex_lock(&kvm_lock);
7619         list_for_each_entry(kvm, &vm_list, vm_list)
7620                 kvm_make_mclock_inprogress_request(kvm);
7621
7622         hyperv_stop_tsc_emulation();
7623
7624         /* TSC frequency always matches when on Hyper-V */
7625         for_each_present_cpu(cpu)
7626                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
7627         kvm_max_guest_tsc_khz = tsc_khz;
7628
7629         list_for_each_entry(kvm, &vm_list, vm_list) {
7630                 struct kvm_arch *ka = &kvm->arch;
7631
7632                 spin_lock(&ka->pvclock_gtod_sync_lock);
7633
7634                 pvclock_update_vm_gtod_copy(kvm);
7635
7636                 kvm_for_each_vcpu(cpu, vcpu, kvm)
7637                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7638
7639                 kvm_for_each_vcpu(cpu, vcpu, kvm)
7640                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
7641
7642                 spin_unlock(&ka->pvclock_gtod_sync_lock);
7643         }
7644         mutex_unlock(&kvm_lock);
7645 }
7646 #endif
7647
7648 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
7649 {
7650         struct kvm *kvm;
7651         struct kvm_vcpu *vcpu;
7652         int i, send_ipi = 0;
7653
7654         /*
7655          * We allow guests to temporarily run on slowing clocks,
7656          * provided we notify them after, or to run on accelerating
7657          * clocks, provided we notify them before.  Thus time never
7658          * goes backwards.
7659          *
7660          * However, we have a problem.  We can't atomically update
7661          * the frequency of a given CPU from this function; it is
7662          * merely a notifier, which can be called from any CPU.
7663          * Changing the TSC frequency at arbitrary points in time
7664          * requires a recomputation of local variables related to
7665          * the TSC for each VCPU.  We must flag these local variables
7666          * to be updated and be sure the update takes place with the
7667          * new frequency before any guests proceed.
7668          *
7669          * Unfortunately, the combination of hotplug CPU and frequency
7670          * change creates an intractable locking scenario; the order
7671          * of when these callouts happen is undefined with respect to
7672          * CPU hotplug, and they can race with each other.  As such,
7673          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
7674          * undefined; you can actually have a CPU frequency change take
7675          * place in between the computation of X and the setting of the
7676          * variable.  To protect against this problem, all updates of
7677          * the per_cpu tsc_khz variable are done in an interrupt
7678          * protected IPI, and all callers wishing to update the value
7679          * must wait for a synchronous IPI to complete (which is trivial
7680          * if the caller is on the CPU already).  This establishes the
7681          * necessary total order on variable updates.
7682          *
7683          * Note that because a guest time update may take place
7684          * anytime after the setting of the VCPU's request bit, the
7685          * correct TSC value must be set before the request.  However,
7686          * to ensure the update actually makes it to any guest which
7687          * starts running in hardware virtualization between the set
7688          * and the acquisition of the spinlock, we must also ping the
7689          * CPU after setting the request bit.
7690          *
7691          */
7692
7693         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
7694
7695         mutex_lock(&kvm_lock);
7696         list_for_each_entry(kvm, &vm_list, vm_list) {
7697                 kvm_for_each_vcpu(i, vcpu, kvm) {
7698                         if (vcpu->cpu != cpu)
7699                                 continue;
7700                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7701                         if (vcpu->cpu != raw_smp_processor_id())
7702                                 send_ipi = 1;
7703                 }
7704         }
7705         mutex_unlock(&kvm_lock);
7706
7707         if (freq->old < freq->new && send_ipi) {
7708                 /*
7709                  * We upscale the frequency.  Must make the guest
7710                  * doesn't see old kvmclock values while running with
7711                  * the new frequency, otherwise we risk the guest sees
7712                  * time go backwards.
7713                  *
7714                  * In case we update the frequency for another cpu
7715                  * (which might be in guest context) send an interrupt
7716                  * to kick the cpu out of guest context.  Next time
7717                  * guest context is entered kvmclock will be updated,
7718                  * so the guest will not see stale values.
7719                  */
7720                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
7721         }
7722 }
7723
7724 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
7725                                      void *data)
7726 {
7727         struct cpufreq_freqs *freq = data;
7728         int cpu;
7729
7730         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
7731                 return 0;
7732         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
7733                 return 0;
7734
7735         for_each_cpu(cpu, freq->policy->cpus)
7736                 __kvmclock_cpufreq_notifier(freq, cpu);
7737
7738         return 0;
7739 }
7740
7741 static struct notifier_block kvmclock_cpufreq_notifier_block = {
7742         .notifier_call  = kvmclock_cpufreq_notifier
7743 };
7744
7745 static int kvmclock_cpu_online(unsigned int cpu)
7746 {
7747         tsc_khz_changed(NULL);
7748         return 0;
7749 }
7750
7751 static void kvm_timer_init(void)
7752 {
7753         max_tsc_khz = tsc_khz;
7754
7755         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
7756 #ifdef CONFIG_CPU_FREQ
7757                 struct cpufreq_policy *policy;
7758                 int cpu;
7759
7760                 cpu = get_cpu();
7761                 policy = cpufreq_cpu_get(cpu);
7762                 if (policy) {
7763                         if (policy->cpuinfo.max_freq)
7764                                 max_tsc_khz = policy->cpuinfo.max_freq;
7765                         cpufreq_cpu_put(policy);
7766                 }
7767                 put_cpu();
7768 #endif
7769                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
7770                                           CPUFREQ_TRANSITION_NOTIFIER);
7771         }
7772
7773         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
7774                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
7775 }
7776
7777 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
7778 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
7779
7780 int kvm_is_in_guest(void)
7781 {
7782         return __this_cpu_read(current_vcpu) != NULL;
7783 }
7784
7785 static int kvm_is_user_mode(void)
7786 {
7787         int user_mode = 3;
7788
7789         if (__this_cpu_read(current_vcpu))
7790                 user_mode = kvm_x86_ops.get_cpl(__this_cpu_read(current_vcpu));
7791
7792         return user_mode != 0;
7793 }
7794
7795 static unsigned long kvm_get_guest_ip(void)
7796 {
7797         unsigned long ip = 0;
7798
7799         if (__this_cpu_read(current_vcpu))
7800                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
7801
7802         return ip;
7803 }
7804
7805 static void kvm_handle_intel_pt_intr(void)
7806 {
7807         struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
7808
7809         kvm_make_request(KVM_REQ_PMI, vcpu);
7810         __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
7811                         (unsigned long *)&vcpu->arch.pmu.global_status);
7812 }
7813
7814 static struct perf_guest_info_callbacks kvm_guest_cbs = {
7815         .is_in_guest            = kvm_is_in_guest,
7816         .is_user_mode           = kvm_is_user_mode,
7817         .get_guest_ip           = kvm_get_guest_ip,
7818         .handle_intel_pt_intr   = kvm_handle_intel_pt_intr,
7819 };
7820
7821 #ifdef CONFIG_X86_64
7822 static void pvclock_gtod_update_fn(struct work_struct *work)
7823 {
7824         struct kvm *kvm;
7825
7826         struct kvm_vcpu *vcpu;
7827         int i;
7828
7829         mutex_lock(&kvm_lock);
7830         list_for_each_entry(kvm, &vm_list, vm_list)
7831                 kvm_for_each_vcpu(i, vcpu, kvm)
7832                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7833         atomic_set(&kvm_guest_has_master_clock, 0);
7834         mutex_unlock(&kvm_lock);
7835 }
7836
7837 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
7838
7839 /*
7840  * Notification about pvclock gtod data update.
7841  */
7842 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
7843                                void *priv)
7844 {
7845         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
7846         struct timekeeper *tk = priv;
7847
7848         update_pvclock_gtod(tk);
7849
7850         /* disable master clock if host does not trust, or does not
7851          * use, TSC based clocksource.
7852          */
7853         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
7854             atomic_read(&kvm_guest_has_master_clock) != 0)
7855                 queue_work(system_long_wq, &pvclock_gtod_work);
7856
7857         return 0;
7858 }
7859
7860 static struct notifier_block pvclock_gtod_notifier = {
7861         .notifier_call = pvclock_gtod_notify,
7862 };
7863 #endif
7864
7865 int kvm_arch_init(void *opaque)
7866 {
7867         struct kvm_x86_init_ops *ops = opaque;
7868         int r;
7869
7870         if (kvm_x86_ops.hardware_enable) {
7871                 printk(KERN_ERR "kvm: already loaded the other module\n");
7872                 r = -EEXIST;
7873                 goto out;
7874         }
7875
7876         if (!ops->cpu_has_kvm_support()) {
7877                 pr_err_ratelimited("kvm: no hardware support\n");
7878                 r = -EOPNOTSUPP;
7879                 goto out;
7880         }
7881         if (ops->disabled_by_bios()) {
7882                 pr_err_ratelimited("kvm: disabled by bios\n");
7883                 r = -EOPNOTSUPP;
7884                 goto out;
7885         }
7886
7887         /*
7888          * KVM explicitly assumes that the guest has an FPU and
7889          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
7890          * vCPU's FPU state as a fxregs_state struct.
7891          */
7892         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
7893                 printk(KERN_ERR "kvm: inadequate fpu\n");
7894                 r = -EOPNOTSUPP;
7895                 goto out;
7896         }
7897
7898         r = -ENOMEM;
7899         x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
7900                                           __alignof__(struct fpu), SLAB_ACCOUNT,
7901                                           NULL);
7902         if (!x86_fpu_cache) {
7903                 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
7904                 goto out;
7905         }
7906
7907         x86_emulator_cache = kvm_alloc_emulator_cache();
7908         if (!x86_emulator_cache) {
7909                 pr_err("kvm: failed to allocate cache for x86 emulator\n");
7910                 goto out_free_x86_fpu_cache;
7911         }
7912
7913         user_return_msrs = alloc_percpu(struct kvm_user_return_msrs);
7914         if (!user_return_msrs) {
7915                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_user_return_msrs\n");
7916                 goto out_free_x86_emulator_cache;
7917         }
7918
7919         r = kvm_mmu_module_init();
7920         if (r)
7921                 goto out_free_percpu;
7922
7923         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
7924                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
7925                         PT_PRESENT_MASK, 0, sme_me_mask);
7926         kvm_timer_init();
7927
7928         perf_register_guest_info_callbacks(&kvm_guest_cbs);
7929
7930         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
7931                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
7932                 supported_xcr0 = host_xcr0 & KVM_SUPPORTED_XCR0;
7933         }
7934
7935         kvm_lapic_init();
7936         if (pi_inject_timer == -1)
7937                 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
7938 #ifdef CONFIG_X86_64
7939         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
7940
7941         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
7942                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
7943 #endif
7944
7945         return 0;
7946
7947 out_free_percpu:
7948         free_percpu(user_return_msrs);
7949 out_free_x86_emulator_cache:
7950         kmem_cache_destroy(x86_emulator_cache);
7951 out_free_x86_fpu_cache:
7952         kmem_cache_destroy(x86_fpu_cache);
7953 out:
7954         return r;
7955 }
7956
7957 void kvm_arch_exit(void)
7958 {
7959 #ifdef CONFIG_X86_64
7960         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
7961                 clear_hv_tscchange_cb();
7962 #endif
7963         kvm_lapic_exit();
7964         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
7965
7966         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
7967                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
7968                                             CPUFREQ_TRANSITION_NOTIFIER);
7969         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
7970 #ifdef CONFIG_X86_64
7971         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
7972 #endif
7973         kvm_x86_ops.hardware_enable = NULL;
7974         kvm_mmu_module_exit();
7975         free_percpu(user_return_msrs);
7976         kmem_cache_destroy(x86_fpu_cache);
7977 }
7978
7979 static int __kvm_vcpu_halt(struct kvm_vcpu *vcpu, int state, int reason)
7980 {
7981         ++vcpu->stat.halt_exits;
7982         if (lapic_in_kernel(vcpu)) {
7983                 vcpu->arch.mp_state = state;
7984                 return 1;
7985         } else {
7986                 vcpu->run->exit_reason = reason;
7987                 return 0;
7988         }
7989 }
7990
7991 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
7992 {
7993         return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_HALTED, KVM_EXIT_HLT);
7994 }
7995 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
7996
7997 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
7998 {
7999         int ret = kvm_skip_emulated_instruction(vcpu);
8000         /*
8001          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
8002          * KVM_EXIT_DEBUG here.
8003          */
8004         return kvm_vcpu_halt(vcpu) && ret;
8005 }
8006 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
8007
8008 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu)
8009 {
8010         int ret = kvm_skip_emulated_instruction(vcpu);
8011
8012         return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_AP_RESET_HOLD, KVM_EXIT_AP_RESET_HOLD) && ret;
8013 }
8014 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold);
8015
8016 #ifdef CONFIG_X86_64
8017 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
8018                                 unsigned long clock_type)
8019 {
8020         struct kvm_clock_pairing clock_pairing;
8021         struct timespec64 ts;
8022         u64 cycle;
8023         int ret;
8024
8025         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
8026                 return -KVM_EOPNOTSUPP;
8027
8028         if (kvm_get_walltime_and_clockread(&ts, &cycle) == false)
8029                 return -KVM_EOPNOTSUPP;
8030
8031         clock_pairing.sec = ts.tv_sec;
8032         clock_pairing.nsec = ts.tv_nsec;
8033         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
8034         clock_pairing.flags = 0;
8035         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
8036
8037         ret = 0;
8038         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
8039                             sizeof(struct kvm_clock_pairing)))
8040                 ret = -KVM_EFAULT;
8041
8042         return ret;
8043 }
8044 #endif
8045
8046 /*
8047  * kvm_pv_kick_cpu_op:  Kick a vcpu.
8048  *
8049  * @apicid - apicid of vcpu to be kicked.
8050  */
8051 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
8052 {
8053         struct kvm_lapic_irq lapic_irq;
8054
8055         lapic_irq.shorthand = APIC_DEST_NOSHORT;
8056         lapic_irq.dest_mode = APIC_DEST_PHYSICAL;
8057         lapic_irq.level = 0;
8058         lapic_irq.dest_id = apicid;
8059         lapic_irq.msi_redir_hint = false;
8060
8061         lapic_irq.delivery_mode = APIC_DM_REMRD;
8062         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
8063 }
8064
8065 bool kvm_apicv_activated(struct kvm *kvm)
8066 {
8067         return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
8068 }
8069 EXPORT_SYMBOL_GPL(kvm_apicv_activated);
8070
8071 void kvm_apicv_init(struct kvm *kvm, bool enable)
8072 {
8073         if (enable)
8074                 clear_bit(APICV_INHIBIT_REASON_DISABLE,
8075                           &kvm->arch.apicv_inhibit_reasons);
8076         else
8077                 set_bit(APICV_INHIBIT_REASON_DISABLE,
8078                         &kvm->arch.apicv_inhibit_reasons);
8079 }
8080 EXPORT_SYMBOL_GPL(kvm_apicv_init);
8081
8082 static void kvm_sched_yield(struct kvm *kvm, unsigned long dest_id)
8083 {
8084         struct kvm_vcpu *target = NULL;
8085         struct kvm_apic_map *map;
8086
8087         rcu_read_lock();
8088         map = rcu_dereference(kvm->arch.apic_map);
8089
8090         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
8091                 target = map->phys_map[dest_id]->vcpu;
8092
8093         rcu_read_unlock();
8094
8095         if (target && READ_ONCE(target->ready))
8096                 kvm_vcpu_yield_to(target);
8097 }
8098
8099 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
8100 {
8101         unsigned long nr, a0, a1, a2, a3, ret;
8102         int op_64_bit;
8103
8104         if (kvm_hv_hypercall_enabled(vcpu->kvm))
8105                 return kvm_hv_hypercall(vcpu);
8106
8107         nr = kvm_rax_read(vcpu);
8108         a0 = kvm_rbx_read(vcpu);
8109         a1 = kvm_rcx_read(vcpu);
8110         a2 = kvm_rdx_read(vcpu);
8111         a3 = kvm_rsi_read(vcpu);
8112
8113         trace_kvm_hypercall(nr, a0, a1, a2, a3);
8114
8115         op_64_bit = is_64_bit_mode(vcpu);
8116         if (!op_64_bit) {
8117                 nr &= 0xFFFFFFFF;
8118                 a0 &= 0xFFFFFFFF;
8119                 a1 &= 0xFFFFFFFF;
8120                 a2 &= 0xFFFFFFFF;
8121                 a3 &= 0xFFFFFFFF;
8122         }
8123
8124         if (kvm_x86_ops.get_cpl(vcpu) != 0) {
8125                 ret = -KVM_EPERM;
8126                 goto out;
8127         }
8128
8129         ret = -KVM_ENOSYS;
8130
8131         switch (nr) {
8132         case KVM_HC_VAPIC_POLL_IRQ:
8133                 ret = 0;
8134                 break;
8135         case KVM_HC_KICK_CPU:
8136                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_UNHALT))
8137                         break;
8138
8139                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
8140                 kvm_sched_yield(vcpu->kvm, a1);
8141                 ret = 0;
8142                 break;
8143 #ifdef CONFIG_X86_64
8144         case KVM_HC_CLOCK_PAIRING:
8145                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
8146                 break;
8147 #endif
8148         case KVM_HC_SEND_IPI:
8149                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SEND_IPI))
8150                         break;
8151
8152                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
8153                 break;
8154         case KVM_HC_SCHED_YIELD:
8155                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SCHED_YIELD))
8156                         break;
8157
8158                 kvm_sched_yield(vcpu->kvm, a0);
8159                 ret = 0;
8160                 break;
8161         default:
8162                 ret = -KVM_ENOSYS;
8163                 break;
8164         }
8165 out:
8166         if (!op_64_bit)
8167                 ret = (u32)ret;
8168         kvm_rax_write(vcpu, ret);
8169
8170         ++vcpu->stat.hypercalls;
8171         return kvm_skip_emulated_instruction(vcpu);
8172 }
8173 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
8174
8175 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
8176 {
8177         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8178         char instruction[3];
8179         unsigned long rip = kvm_rip_read(vcpu);
8180
8181         kvm_x86_ops.patch_hypercall(vcpu, instruction);
8182
8183         return emulator_write_emulated(ctxt, rip, instruction, 3,
8184                 &ctxt->exception);
8185 }
8186
8187 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
8188 {
8189         return vcpu->run->request_interrupt_window &&
8190                 likely(!pic_in_kernel(vcpu->kvm));
8191 }
8192
8193 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
8194 {
8195         struct kvm_run *kvm_run = vcpu->run;
8196
8197         /*
8198          * if_flag is obsolete and useless, so do not bother
8199          * setting it for SEV-ES guests.  Userspace can just
8200          * use kvm_run->ready_for_interrupt_injection.
8201          */
8202         kvm_run->if_flag = !vcpu->arch.guest_state_protected
8203                 && (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
8204
8205         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
8206         kvm_run->cr8 = kvm_get_cr8(vcpu);
8207         kvm_run->apic_base = kvm_get_apic_base(vcpu);
8208         kvm_run->ready_for_interrupt_injection =
8209                 pic_in_kernel(vcpu->kvm) ||
8210                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
8211 }
8212
8213 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
8214 {
8215         int max_irr, tpr;
8216
8217         if (!kvm_x86_ops.update_cr8_intercept)
8218                 return;
8219
8220         if (!lapic_in_kernel(vcpu))
8221                 return;
8222
8223         if (vcpu->arch.apicv_active)
8224                 return;
8225
8226         if (!vcpu->arch.apic->vapic_addr)
8227                 max_irr = kvm_lapic_find_highest_irr(vcpu);
8228         else
8229                 max_irr = -1;
8230
8231         if (max_irr != -1)
8232                 max_irr >>= 4;
8233
8234         tpr = kvm_lapic_get_cr8(vcpu);
8235
8236         kvm_x86_ops.update_cr8_intercept(vcpu, tpr, max_irr);
8237 }
8238
8239 static void inject_pending_event(struct kvm_vcpu *vcpu, bool *req_immediate_exit)
8240 {
8241         int r;
8242         bool can_inject = true;
8243
8244         /* try to reinject previous events if any */
8245
8246         if (vcpu->arch.exception.injected) {
8247                 kvm_x86_ops.queue_exception(vcpu);
8248                 can_inject = false;
8249         }
8250         /*
8251          * Do not inject an NMI or interrupt if there is a pending
8252          * exception.  Exceptions and interrupts are recognized at
8253          * instruction boundaries, i.e. the start of an instruction.
8254          * Trap-like exceptions, e.g. #DB, have higher priority than
8255          * NMIs and interrupts, i.e. traps are recognized before an
8256          * NMI/interrupt that's pending on the same instruction.
8257          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
8258          * priority, but are only generated (pended) during instruction
8259          * execution, i.e. a pending fault-like exception means the
8260          * fault occurred on the *previous* instruction and must be
8261          * serviced prior to recognizing any new events in order to
8262          * fully complete the previous instruction.
8263          */
8264         else if (!vcpu->arch.exception.pending) {
8265                 if (vcpu->arch.nmi_injected) {
8266                         kvm_x86_ops.set_nmi(vcpu);
8267                         can_inject = false;
8268                 } else if (vcpu->arch.interrupt.injected) {
8269                         kvm_x86_ops.set_irq(vcpu);
8270                         can_inject = false;
8271                 }
8272         }
8273
8274         WARN_ON_ONCE(vcpu->arch.exception.injected &&
8275                      vcpu->arch.exception.pending);
8276
8277         /*
8278          * Call check_nested_events() even if we reinjected a previous event
8279          * in order for caller to determine if it should require immediate-exit
8280          * from L2 to L1 due to pending L1 events which require exit
8281          * from L2 to L1.
8282          */
8283         if (is_guest_mode(vcpu)) {
8284                 r = kvm_x86_ops.nested_ops->check_events(vcpu);
8285                 if (r < 0)
8286                         goto busy;
8287         }
8288
8289         /* try to inject new event if pending */
8290         if (vcpu->arch.exception.pending) {
8291                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
8292                                         vcpu->arch.exception.has_error_code,
8293                                         vcpu->arch.exception.error_code);
8294
8295                 vcpu->arch.exception.pending = false;
8296                 vcpu->arch.exception.injected = true;
8297
8298                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
8299                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
8300                                              X86_EFLAGS_RF);
8301
8302                 if (vcpu->arch.exception.nr == DB_VECTOR) {
8303                         kvm_deliver_exception_payload(vcpu);
8304                         if (vcpu->arch.dr7 & DR7_GD) {
8305                                 vcpu->arch.dr7 &= ~DR7_GD;
8306                                 kvm_update_dr7(vcpu);
8307                         }
8308                 }
8309
8310                 kvm_x86_ops.queue_exception(vcpu);
8311                 can_inject = false;
8312         }
8313
8314         /*
8315          * Finally, inject interrupt events.  If an event cannot be injected
8316          * due to architectural conditions (e.g. IF=0) a window-open exit
8317          * will re-request KVM_REQ_EVENT.  Sometimes however an event is pending
8318          * and can architecturally be injected, but we cannot do it right now:
8319          * an interrupt could have arrived just now and we have to inject it
8320          * as a vmexit, or there could already an event in the queue, which is
8321          * indicated by can_inject.  In that case we request an immediate exit
8322          * in order to make progress and get back here for another iteration.
8323          * The kvm_x86_ops hooks communicate this by returning -EBUSY.
8324          */
8325         if (vcpu->arch.smi_pending) {
8326                 r = can_inject ? kvm_x86_ops.smi_allowed(vcpu, true) : -EBUSY;
8327                 if (r < 0)
8328                         goto busy;
8329                 if (r) {
8330                         vcpu->arch.smi_pending = false;
8331                         ++vcpu->arch.smi_count;
8332                         enter_smm(vcpu);
8333                         can_inject = false;
8334                 } else
8335                         kvm_x86_ops.enable_smi_window(vcpu);
8336         }
8337
8338         if (vcpu->arch.nmi_pending) {
8339                 r = can_inject ? kvm_x86_ops.nmi_allowed(vcpu, true) : -EBUSY;
8340                 if (r < 0)
8341                         goto busy;
8342                 if (r) {
8343                         --vcpu->arch.nmi_pending;
8344                         vcpu->arch.nmi_injected = true;
8345                         kvm_x86_ops.set_nmi(vcpu);
8346                         can_inject = false;
8347                         WARN_ON(kvm_x86_ops.nmi_allowed(vcpu, true) < 0);
8348                 }
8349                 if (vcpu->arch.nmi_pending)
8350                         kvm_x86_ops.enable_nmi_window(vcpu);
8351         }
8352
8353         if (kvm_cpu_has_injectable_intr(vcpu)) {
8354                 r = can_inject ? kvm_x86_ops.interrupt_allowed(vcpu, true) : -EBUSY;
8355                 if (r < 0)
8356                         goto busy;
8357                 if (r) {
8358                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu), false);
8359                         kvm_x86_ops.set_irq(vcpu);
8360                         WARN_ON(kvm_x86_ops.interrupt_allowed(vcpu, true) < 0);
8361                 }
8362                 if (kvm_cpu_has_injectable_intr(vcpu))
8363                         kvm_x86_ops.enable_irq_window(vcpu);
8364         }
8365
8366         if (is_guest_mode(vcpu) &&
8367             kvm_x86_ops.nested_ops->hv_timer_pending &&
8368             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
8369                 *req_immediate_exit = true;
8370
8371         WARN_ON(vcpu->arch.exception.pending);
8372         return;
8373
8374 busy:
8375         *req_immediate_exit = true;
8376         return;
8377 }
8378
8379 static void process_nmi(struct kvm_vcpu *vcpu)
8380 {
8381         unsigned limit = 2;
8382
8383         /*
8384          * x86 is limited to one NMI running, and one NMI pending after it.
8385          * If an NMI is already in progress, limit further NMIs to just one.
8386          * Otherwise, allow two (and we'll inject the first one immediately).
8387          */
8388         if (kvm_x86_ops.get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
8389                 limit = 1;
8390
8391         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
8392         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
8393         kvm_make_request(KVM_REQ_EVENT, vcpu);
8394 }
8395
8396 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
8397 {
8398         u32 flags = 0;
8399         flags |= seg->g       << 23;
8400         flags |= seg->db      << 22;
8401         flags |= seg->l       << 21;
8402         flags |= seg->avl     << 20;
8403         flags |= seg->present << 15;
8404         flags |= seg->dpl     << 13;
8405         flags |= seg->s       << 12;
8406         flags |= seg->type    << 8;
8407         return flags;
8408 }
8409
8410 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
8411 {
8412         struct kvm_segment seg;
8413         int offset;
8414
8415         kvm_get_segment(vcpu, &seg, n);
8416         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
8417
8418         if (n < 3)
8419                 offset = 0x7f84 + n * 12;
8420         else
8421                 offset = 0x7f2c + (n - 3) * 12;
8422
8423         put_smstate(u32, buf, offset + 8, seg.base);
8424         put_smstate(u32, buf, offset + 4, seg.limit);
8425         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
8426 }
8427
8428 #ifdef CONFIG_X86_64
8429 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
8430 {
8431         struct kvm_segment seg;
8432         int offset;
8433         u16 flags;
8434
8435         kvm_get_segment(vcpu, &seg, n);
8436         offset = 0x7e00 + n * 16;
8437
8438         flags = enter_smm_get_segment_flags(&seg) >> 8;
8439         put_smstate(u16, buf, offset, seg.selector);
8440         put_smstate(u16, buf, offset + 2, flags);
8441         put_smstate(u32, buf, offset + 4, seg.limit);
8442         put_smstate(u64, buf, offset + 8, seg.base);
8443 }
8444 #endif
8445
8446 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
8447 {
8448         struct desc_ptr dt;
8449         struct kvm_segment seg;
8450         unsigned long val;
8451         int i;
8452
8453         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
8454         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
8455         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
8456         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
8457
8458         for (i = 0; i < 8; i++)
8459                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
8460
8461         kvm_get_dr(vcpu, 6, &val);
8462         put_smstate(u32, buf, 0x7fcc, (u32)val);
8463         kvm_get_dr(vcpu, 7, &val);
8464         put_smstate(u32, buf, 0x7fc8, (u32)val);
8465
8466         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
8467         put_smstate(u32, buf, 0x7fc4, seg.selector);
8468         put_smstate(u32, buf, 0x7f64, seg.base);
8469         put_smstate(u32, buf, 0x7f60, seg.limit);
8470         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
8471
8472         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
8473         put_smstate(u32, buf, 0x7fc0, seg.selector);
8474         put_smstate(u32, buf, 0x7f80, seg.base);
8475         put_smstate(u32, buf, 0x7f7c, seg.limit);
8476         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
8477
8478         kvm_x86_ops.get_gdt(vcpu, &dt);
8479         put_smstate(u32, buf, 0x7f74, dt.address);
8480         put_smstate(u32, buf, 0x7f70, dt.size);
8481
8482         kvm_x86_ops.get_idt(vcpu, &dt);
8483         put_smstate(u32, buf, 0x7f58, dt.address);
8484         put_smstate(u32, buf, 0x7f54, dt.size);
8485
8486         for (i = 0; i < 6; i++)
8487                 enter_smm_save_seg_32(vcpu, buf, i);
8488
8489         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
8490
8491         /* revision id */
8492         put_smstate(u32, buf, 0x7efc, 0x00020000);
8493         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
8494 }
8495
8496 #ifdef CONFIG_X86_64
8497 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
8498 {
8499         struct desc_ptr dt;
8500         struct kvm_segment seg;
8501         unsigned long val;
8502         int i;
8503
8504         for (i = 0; i < 16; i++)
8505                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
8506
8507         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
8508         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
8509
8510         kvm_get_dr(vcpu, 6, &val);
8511         put_smstate(u64, buf, 0x7f68, val);
8512         kvm_get_dr(vcpu, 7, &val);
8513         put_smstate(u64, buf, 0x7f60, val);
8514
8515         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
8516         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
8517         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
8518
8519         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
8520
8521         /* revision id */
8522         put_smstate(u32, buf, 0x7efc, 0x00020064);
8523
8524         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
8525
8526         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
8527         put_smstate(u16, buf, 0x7e90, seg.selector);
8528         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
8529         put_smstate(u32, buf, 0x7e94, seg.limit);
8530         put_smstate(u64, buf, 0x7e98, seg.base);
8531
8532         kvm_x86_ops.get_idt(vcpu, &dt);
8533         put_smstate(u32, buf, 0x7e84, dt.size);
8534         put_smstate(u64, buf, 0x7e88, dt.address);
8535
8536         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
8537         put_smstate(u16, buf, 0x7e70, seg.selector);
8538         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
8539         put_smstate(u32, buf, 0x7e74, seg.limit);
8540         put_smstate(u64, buf, 0x7e78, seg.base);
8541
8542         kvm_x86_ops.get_gdt(vcpu, &dt);
8543         put_smstate(u32, buf, 0x7e64, dt.size);
8544         put_smstate(u64, buf, 0x7e68, dt.address);
8545
8546         for (i = 0; i < 6; i++)
8547                 enter_smm_save_seg_64(vcpu, buf, i);
8548 }
8549 #endif
8550
8551 static void enter_smm(struct kvm_vcpu *vcpu)
8552 {
8553         struct kvm_segment cs, ds;
8554         struct desc_ptr dt;
8555         char buf[512];
8556         u32 cr0;
8557
8558         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
8559         memset(buf, 0, 512);
8560 #ifdef CONFIG_X86_64
8561         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
8562                 enter_smm_save_state_64(vcpu, buf);
8563         else
8564 #endif
8565                 enter_smm_save_state_32(vcpu, buf);
8566
8567         /*
8568          * Give pre_enter_smm() a chance to make ISA-specific changes to the
8569          * vCPU state (e.g. leave guest mode) after we've saved the state into
8570          * the SMM state-save area.
8571          */
8572         kvm_x86_ops.pre_enter_smm(vcpu, buf);
8573
8574         vcpu->arch.hflags |= HF_SMM_MASK;
8575         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
8576
8577         if (kvm_x86_ops.get_nmi_mask(vcpu))
8578                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
8579         else
8580                 kvm_x86_ops.set_nmi_mask(vcpu, true);
8581
8582         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
8583         kvm_rip_write(vcpu, 0x8000);
8584
8585         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
8586         kvm_x86_ops.set_cr0(vcpu, cr0);
8587         vcpu->arch.cr0 = cr0;
8588
8589         kvm_x86_ops.set_cr4(vcpu, 0);
8590
8591         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
8592         dt.address = dt.size = 0;
8593         kvm_x86_ops.set_idt(vcpu, &dt);
8594
8595         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
8596
8597         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
8598         cs.base = vcpu->arch.smbase;
8599
8600         ds.selector = 0;
8601         ds.base = 0;
8602
8603         cs.limit    = ds.limit = 0xffffffff;
8604         cs.type     = ds.type = 0x3;
8605         cs.dpl      = ds.dpl = 0;
8606         cs.db       = ds.db = 0;
8607         cs.s        = ds.s = 1;
8608         cs.l        = ds.l = 0;
8609         cs.g        = ds.g = 1;
8610         cs.avl      = ds.avl = 0;
8611         cs.present  = ds.present = 1;
8612         cs.unusable = ds.unusable = 0;
8613         cs.padding  = ds.padding = 0;
8614
8615         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
8616         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
8617         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
8618         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
8619         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
8620         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
8621
8622 #ifdef CONFIG_X86_64
8623         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
8624                 kvm_x86_ops.set_efer(vcpu, 0);
8625 #endif
8626
8627         kvm_update_cpuid_runtime(vcpu);
8628         kvm_mmu_reset_context(vcpu);
8629 }
8630
8631 static void process_smi(struct kvm_vcpu *vcpu)
8632 {
8633         vcpu->arch.smi_pending = true;
8634         kvm_make_request(KVM_REQ_EVENT, vcpu);
8635 }
8636
8637 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
8638                                        unsigned long *vcpu_bitmap)
8639 {
8640         cpumask_var_t cpus;
8641
8642         zalloc_cpumask_var(&cpus, GFP_ATOMIC);
8643
8644         kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC,
8645                                     NULL, vcpu_bitmap, cpus);
8646
8647         free_cpumask_var(cpus);
8648 }
8649
8650 void kvm_make_scan_ioapic_request(struct kvm *kvm)
8651 {
8652         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
8653 }
8654
8655 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
8656 {
8657         if (!lapic_in_kernel(vcpu))
8658                 return;
8659
8660         vcpu->arch.apicv_active = kvm_apicv_activated(vcpu->kvm);
8661         kvm_apic_update_apicv(vcpu);
8662         kvm_x86_ops.refresh_apicv_exec_ctrl(vcpu);
8663 }
8664 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv);
8665
8666 /*
8667  * NOTE: Do not hold any lock prior to calling this.
8668  *
8669  * In particular, kvm_request_apicv_update() expects kvm->srcu not to be
8670  * locked, because it calls __x86_set_memory_region() which does
8671  * synchronize_srcu(&kvm->srcu).
8672  */
8673 void kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
8674 {
8675         struct kvm_vcpu *except;
8676         unsigned long old, new, expected;
8677
8678         if (!kvm_x86_ops.check_apicv_inhibit_reasons ||
8679             !kvm_x86_ops.check_apicv_inhibit_reasons(bit))
8680                 return;
8681
8682         old = READ_ONCE(kvm->arch.apicv_inhibit_reasons);
8683         do {
8684                 expected = new = old;
8685                 if (activate)
8686                         __clear_bit(bit, &new);
8687                 else
8688                         __set_bit(bit, &new);
8689                 if (new == old)
8690                         break;
8691                 old = cmpxchg(&kvm->arch.apicv_inhibit_reasons, expected, new);
8692         } while (old != expected);
8693
8694         if (!!old == !!new)
8695                 return;
8696
8697         trace_kvm_apicv_update_request(activate, bit);
8698         if (kvm_x86_ops.pre_update_apicv_exec_ctrl)
8699                 kvm_x86_ops.pre_update_apicv_exec_ctrl(kvm, activate);
8700
8701         /*
8702          * Sending request to update APICV for all other vcpus,
8703          * while update the calling vcpu immediately instead of
8704          * waiting for another #VMEXIT to handle the request.
8705          */
8706         except = kvm_get_running_vcpu();
8707         kvm_make_all_cpus_request_except(kvm, KVM_REQ_APICV_UPDATE,
8708                                          except);
8709         if (except)
8710                 kvm_vcpu_update_apicv(except);
8711 }
8712 EXPORT_SYMBOL_GPL(kvm_request_apicv_update);
8713
8714 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
8715 {
8716         if (!kvm_apic_present(vcpu))
8717                 return;
8718
8719         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
8720
8721         if (irqchip_split(vcpu->kvm))
8722                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
8723         else {
8724                 if (vcpu->arch.apicv_active)
8725                         kvm_x86_ops.sync_pir_to_irr(vcpu);
8726                 if (ioapic_in_kernel(vcpu->kvm))
8727                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
8728         }
8729
8730         if (is_guest_mode(vcpu))
8731                 vcpu->arch.load_eoi_exitmap_pending = true;
8732         else
8733                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
8734 }
8735
8736 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
8737 {
8738         u64 eoi_exit_bitmap[4];
8739
8740         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
8741                 return;
8742
8743         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
8744                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
8745         kvm_x86_ops.load_eoi_exitmap(vcpu, eoi_exit_bitmap);
8746 }
8747
8748 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
8749                                             unsigned long start, unsigned long end)
8750 {
8751         unsigned long apic_address;
8752
8753         /*
8754          * The physical address of apic access page is stored in the VMCS.
8755          * Update it when it becomes invalid.
8756          */
8757         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
8758         if (start <= apic_address && apic_address < end)
8759                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
8760 }
8761
8762 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
8763 {
8764         if (!lapic_in_kernel(vcpu))
8765                 return;
8766
8767         if (!kvm_x86_ops.set_apic_access_page_addr)
8768                 return;
8769
8770         kvm_x86_ops.set_apic_access_page_addr(vcpu);
8771 }
8772
8773 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
8774 {
8775         smp_send_reschedule(vcpu->cpu);
8776 }
8777 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
8778
8779 /*
8780  * Returns 1 to let vcpu_run() continue the guest execution loop without
8781  * exiting to the userspace.  Otherwise, the value will be returned to the
8782  * userspace.
8783  */
8784 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
8785 {
8786         int r;
8787         bool req_int_win =
8788                 dm_request_for_irq_injection(vcpu) &&
8789                 kvm_cpu_accept_dm_intr(vcpu);
8790         fastpath_t exit_fastpath;
8791
8792         bool req_immediate_exit = false;
8793
8794         /* Forbid vmenter if vcpu dirty ring is soft-full */
8795         if (unlikely(vcpu->kvm->dirty_ring_size &&
8796                      kvm_dirty_ring_soft_full(&vcpu->dirty_ring))) {
8797                 vcpu->run->exit_reason = KVM_EXIT_DIRTY_RING_FULL;
8798                 trace_kvm_dirty_ring_exit(vcpu);
8799                 r = 0;
8800                 goto out;
8801         }
8802
8803         if (kvm_request_pending(vcpu)) {
8804                 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu)) {
8805                         if (WARN_ON_ONCE(!is_guest_mode(vcpu)))
8806                                 ;
8807                         else if (unlikely(!kvm_x86_ops.nested_ops->get_nested_state_pages(vcpu))) {
8808                                 r = 0;
8809                                 goto out;
8810                         }
8811                 }
8812                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
8813                         kvm_mmu_unload(vcpu);
8814                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
8815                         __kvm_migrate_timers(vcpu);
8816                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
8817                         kvm_gen_update_masterclock(vcpu->kvm);
8818                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
8819                         kvm_gen_kvmclock_update(vcpu);
8820                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
8821                         r = kvm_guest_time_update(vcpu);
8822                         if (unlikely(r))
8823                                 goto out;
8824                 }
8825                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
8826                         kvm_mmu_sync_roots(vcpu);
8827                 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD, vcpu))
8828                         kvm_mmu_load_pgd(vcpu);
8829                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) {
8830                         kvm_vcpu_flush_tlb_all(vcpu);
8831
8832                         /* Flushing all ASIDs flushes the current ASID... */
8833                         kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
8834                 }
8835                 if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu))
8836                         kvm_vcpu_flush_tlb_current(vcpu);
8837                 if (kvm_check_request(KVM_REQ_HV_TLB_FLUSH, vcpu))
8838                         kvm_vcpu_flush_tlb_guest(vcpu);
8839
8840                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
8841                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
8842                         r = 0;
8843                         goto out;
8844                 }
8845                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
8846                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
8847                         vcpu->mmio_needed = 0;
8848                         r = 0;
8849                         goto out;
8850                 }
8851                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
8852                         /* Page is swapped out. Do synthetic halt */
8853                         vcpu->arch.apf.halted = true;
8854                         r = 1;
8855                         goto out;
8856                 }
8857                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
8858                         record_steal_time(vcpu);
8859                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
8860                         process_smi(vcpu);
8861                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
8862                         process_nmi(vcpu);
8863                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
8864                         kvm_pmu_handle_event(vcpu);
8865                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
8866                         kvm_pmu_deliver_pmi(vcpu);
8867                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
8868                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
8869                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
8870                                      vcpu->arch.ioapic_handled_vectors)) {
8871                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
8872                                 vcpu->run->eoi.vector =
8873                                                 vcpu->arch.pending_ioapic_eoi;
8874                                 r = 0;
8875                                 goto out;
8876                         }
8877                 }
8878                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
8879                         vcpu_scan_ioapic(vcpu);
8880                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
8881                         vcpu_load_eoi_exitmap(vcpu);
8882                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
8883                         kvm_vcpu_reload_apic_access_page(vcpu);
8884                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
8885                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
8886                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
8887                         r = 0;
8888                         goto out;
8889                 }
8890                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
8891                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
8892                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
8893                         r = 0;
8894                         goto out;
8895                 }
8896                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
8897                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
8898                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
8899                         r = 0;
8900                         goto out;
8901                 }
8902
8903                 /*
8904                  * KVM_REQ_HV_STIMER has to be processed after
8905                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
8906                  * depend on the guest clock being up-to-date
8907                  */
8908                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
8909                         kvm_hv_process_stimers(vcpu);
8910                 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
8911                         kvm_vcpu_update_apicv(vcpu);
8912                 if (kvm_check_request(KVM_REQ_APF_READY, vcpu))
8913                         kvm_check_async_pf_completion(vcpu);
8914                 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED, vcpu))
8915                         kvm_x86_ops.msr_filter_changed(vcpu);
8916         }
8917
8918         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
8919                 ++vcpu->stat.req_event;
8920                 kvm_apic_accept_events(vcpu);
8921                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
8922                         r = 1;
8923                         goto out;
8924                 }
8925
8926                 inject_pending_event(vcpu, &req_immediate_exit);
8927                 if (req_int_win)
8928                         kvm_x86_ops.enable_irq_window(vcpu);
8929
8930                 if (kvm_lapic_enabled(vcpu)) {
8931                         update_cr8_intercept(vcpu);
8932                         kvm_lapic_sync_to_vapic(vcpu);
8933                 }
8934         }
8935
8936         r = kvm_mmu_reload(vcpu);
8937         if (unlikely(r)) {
8938                 goto cancel_injection;
8939         }
8940
8941         preempt_disable();
8942
8943         kvm_x86_ops.prepare_guest_switch(vcpu);
8944
8945         /*
8946          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
8947          * IPI are then delayed after guest entry, which ensures that they
8948          * result in virtual interrupt delivery.
8949          */
8950         local_irq_disable();
8951         vcpu->mode = IN_GUEST_MODE;
8952
8953         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
8954
8955         /*
8956          * 1) We should set ->mode before checking ->requests.  Please see
8957          * the comment in kvm_vcpu_exiting_guest_mode().
8958          *
8959          * 2) For APICv, we should set ->mode before checking PID.ON. This
8960          * pairs with the memory barrier implicit in pi_test_and_set_on
8961          * (see vmx_deliver_posted_interrupt).
8962          *
8963          * 3) This also orders the write to mode from any reads to the page
8964          * tables done while the VCPU is running.  Please see the comment
8965          * in kvm_flush_remote_tlbs.
8966          */
8967         smp_mb__after_srcu_read_unlock();
8968
8969         /*
8970          * This handles the case where a posted interrupt was
8971          * notified with kvm_vcpu_kick.
8972          */
8973         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
8974                 kvm_x86_ops.sync_pir_to_irr(vcpu);
8975
8976         if (kvm_vcpu_exit_request(vcpu)) {
8977                 vcpu->mode = OUTSIDE_GUEST_MODE;
8978                 smp_wmb();
8979                 local_irq_enable();
8980                 preempt_enable();
8981                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8982                 r = 1;
8983                 goto cancel_injection;
8984         }
8985
8986         if (req_immediate_exit) {
8987                 kvm_make_request(KVM_REQ_EVENT, vcpu);
8988                 kvm_x86_ops.request_immediate_exit(vcpu);
8989         }
8990
8991         trace_kvm_entry(vcpu);
8992
8993         fpregs_assert_state_consistent();
8994         if (test_thread_flag(TIF_NEED_FPU_LOAD))
8995                 switch_fpu_return();
8996
8997         if (unlikely(vcpu->arch.switch_db_regs)) {
8998                 set_debugreg(0, 7);
8999                 set_debugreg(vcpu->arch.eff_db[0], 0);
9000                 set_debugreg(vcpu->arch.eff_db[1], 1);
9001                 set_debugreg(vcpu->arch.eff_db[2], 2);
9002                 set_debugreg(vcpu->arch.eff_db[3], 3);
9003                 set_debugreg(vcpu->arch.dr6, 6);
9004                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
9005         }
9006
9007         exit_fastpath = kvm_x86_ops.run(vcpu);
9008
9009         /*
9010          * Do this here before restoring debug registers on the host.  And
9011          * since we do this before handling the vmexit, a DR access vmexit
9012          * can (a) read the correct value of the debug registers, (b) set
9013          * KVM_DEBUGREG_WONT_EXIT again.
9014          */
9015         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
9016                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
9017                 kvm_x86_ops.sync_dirty_debug_regs(vcpu);
9018                 kvm_update_dr0123(vcpu);
9019                 kvm_update_dr7(vcpu);
9020                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
9021         }
9022
9023         /*
9024          * If the guest has used debug registers, at least dr7
9025          * will be disabled while returning to the host.
9026          * If we don't have active breakpoints in the host, we don't
9027          * care about the messed up debug address registers. But if
9028          * we have some of them active, restore the old state.
9029          */
9030         if (hw_breakpoint_active())
9031                 hw_breakpoint_restore();
9032
9033         vcpu->arch.last_vmentry_cpu = vcpu->cpu;
9034         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
9035
9036         vcpu->mode = OUTSIDE_GUEST_MODE;
9037         smp_wmb();
9038
9039         kvm_x86_ops.handle_exit_irqoff(vcpu);
9040
9041         /*
9042          * Consume any pending interrupts, including the possible source of
9043          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
9044          * An instruction is required after local_irq_enable() to fully unblock
9045          * interrupts on processors that implement an interrupt shadow, the
9046          * stat.exits increment will do nicely.
9047          */
9048         kvm_before_interrupt(vcpu);
9049         local_irq_enable();
9050         ++vcpu->stat.exits;
9051         local_irq_disable();
9052         kvm_after_interrupt(vcpu);
9053
9054         if (lapic_in_kernel(vcpu)) {
9055                 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
9056                 if (delta != S64_MIN) {
9057                         trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
9058                         vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
9059                 }
9060         }
9061
9062         local_irq_enable();
9063         preempt_enable();
9064
9065         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9066
9067         /*
9068          * Profile KVM exit RIPs:
9069          */
9070         if (unlikely(prof_on == KVM_PROFILING)) {
9071                 unsigned long rip = kvm_rip_read(vcpu);
9072                 profile_hit(KVM_PROFILING, (void *)rip);
9073         }
9074
9075         if (unlikely(vcpu->arch.tsc_always_catchup))
9076                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
9077
9078         if (vcpu->arch.apic_attention)
9079                 kvm_lapic_sync_from_vapic(vcpu);
9080
9081         r = kvm_x86_ops.handle_exit(vcpu, exit_fastpath);
9082         return r;
9083
9084 cancel_injection:
9085         if (req_immediate_exit)
9086                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9087         kvm_x86_ops.cancel_injection(vcpu);
9088         if (unlikely(vcpu->arch.apic_attention))
9089                 kvm_lapic_sync_from_vapic(vcpu);
9090 out:
9091         return r;
9092 }
9093
9094 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
9095 {
9096         if (!kvm_arch_vcpu_runnable(vcpu) &&
9097             (!kvm_x86_ops.pre_block || kvm_x86_ops.pre_block(vcpu) == 0)) {
9098                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9099                 kvm_vcpu_block(vcpu);
9100                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9101
9102                 if (kvm_x86_ops.post_block)
9103                         kvm_x86_ops.post_block(vcpu);
9104
9105                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
9106                         return 1;
9107         }
9108
9109         kvm_apic_accept_events(vcpu);
9110         switch(vcpu->arch.mp_state) {
9111         case KVM_MP_STATE_HALTED:
9112         case KVM_MP_STATE_AP_RESET_HOLD:
9113                 vcpu->arch.pv.pv_unhalted = false;
9114                 vcpu->arch.mp_state =
9115                         KVM_MP_STATE_RUNNABLE;
9116                 fallthrough;
9117         case KVM_MP_STATE_RUNNABLE:
9118                 vcpu->arch.apf.halted = false;
9119                 break;
9120         case KVM_MP_STATE_INIT_RECEIVED:
9121                 break;
9122         default:
9123                 return -EINTR;
9124         }
9125         return 1;
9126 }
9127
9128 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
9129 {
9130         if (is_guest_mode(vcpu))
9131                 kvm_x86_ops.nested_ops->check_events(vcpu);
9132
9133         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
9134                 !vcpu->arch.apf.halted);
9135 }
9136
9137 static int vcpu_run(struct kvm_vcpu *vcpu)
9138 {
9139         int r;
9140         struct kvm *kvm = vcpu->kvm;
9141
9142         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9143         vcpu->arch.l1tf_flush_l1d = true;
9144
9145         for (;;) {
9146                 if (kvm_vcpu_running(vcpu)) {
9147                         r = vcpu_enter_guest(vcpu);
9148                 } else {
9149                         r = vcpu_block(kvm, vcpu);
9150                 }
9151
9152                 if (r <= 0)
9153                         break;
9154
9155                 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
9156                 if (kvm_cpu_has_pending_timer(vcpu))
9157                         kvm_inject_pending_timer_irqs(vcpu);
9158
9159                 if (dm_request_for_irq_injection(vcpu) &&
9160                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
9161                         r = 0;
9162                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
9163                         ++vcpu->stat.request_irq_exits;
9164                         break;
9165                 }
9166
9167                 if (__xfer_to_guest_mode_work_pending()) {
9168                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9169                         r = xfer_to_guest_mode_handle_work(vcpu);
9170                         if (r)
9171                                 return r;
9172                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9173                 }
9174         }
9175
9176         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9177
9178         return r;
9179 }
9180
9181 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
9182 {
9183         int r;
9184
9185         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9186         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
9187         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9188         return r;
9189 }
9190
9191 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
9192 {
9193         BUG_ON(!vcpu->arch.pio.count);
9194
9195         return complete_emulated_io(vcpu);
9196 }
9197
9198 /*
9199  * Implements the following, as a state machine:
9200  *
9201  * read:
9202  *   for each fragment
9203  *     for each mmio piece in the fragment
9204  *       write gpa, len
9205  *       exit
9206  *       copy data
9207  *   execute insn
9208  *
9209  * write:
9210  *   for each fragment
9211  *     for each mmio piece in the fragment
9212  *       write gpa, len
9213  *       copy data
9214  *       exit
9215  */
9216 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
9217 {
9218         struct kvm_run *run = vcpu->run;
9219         struct kvm_mmio_fragment *frag;
9220         unsigned len;
9221
9222         BUG_ON(!vcpu->mmio_needed);
9223
9224         /* Complete previous fragment */
9225         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
9226         len = min(8u, frag->len);
9227         if (!vcpu->mmio_is_write)
9228                 memcpy(frag->data, run->mmio.data, len);
9229
9230         if (frag->len <= 8) {
9231                 /* Switch to the next fragment. */
9232                 frag++;
9233                 vcpu->mmio_cur_fragment++;
9234         } else {
9235                 /* Go forward to the next mmio piece. */
9236                 frag->data += len;
9237                 frag->gpa += len;
9238                 frag->len -= len;
9239         }
9240
9241         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
9242                 vcpu->mmio_needed = 0;
9243
9244                 /* FIXME: return into emulator if single-stepping.  */
9245                 if (vcpu->mmio_is_write)
9246                         return 1;
9247                 vcpu->mmio_read_completed = 1;
9248                 return complete_emulated_io(vcpu);
9249         }
9250
9251         run->exit_reason = KVM_EXIT_MMIO;
9252         run->mmio.phys_addr = frag->gpa;
9253         if (vcpu->mmio_is_write)
9254                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
9255         run->mmio.len = min(8u, frag->len);
9256         run->mmio.is_write = vcpu->mmio_is_write;
9257         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
9258         return 0;
9259 }
9260
9261 static void kvm_save_current_fpu(struct fpu *fpu)
9262 {
9263         /*
9264          * If the target FPU state is not resident in the CPU registers, just
9265          * memcpy() from current, else save CPU state directly to the target.
9266          */
9267         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9268                 memcpy(&fpu->state, &current->thread.fpu.state,
9269                        fpu_kernel_xstate_size);
9270         else
9271                 copy_fpregs_to_fpstate(fpu);
9272 }
9273
9274 /* Swap (qemu) user FPU context for the guest FPU context. */
9275 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
9276 {
9277         fpregs_lock();
9278
9279         kvm_save_current_fpu(vcpu->arch.user_fpu);
9280
9281         /*
9282          * Guests with protected state can't have it set by the hypervisor,
9283          * so skip trying to set it.
9284          */
9285         if (vcpu->arch.guest_fpu)
9286                 /* PKRU is separately restored in kvm_x86_ops.run. */
9287                 __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu->state,
9288                                         ~XFEATURE_MASK_PKRU);
9289
9290         fpregs_mark_activate();
9291         fpregs_unlock();
9292
9293         trace_kvm_fpu(1);
9294 }
9295
9296 /* When vcpu_run ends, restore user space FPU context. */
9297 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
9298 {
9299         fpregs_lock();
9300
9301         /*
9302          * Guests with protected state can't have it read by the hypervisor,
9303          * so skip trying to save it.
9304          */
9305         if (vcpu->arch.guest_fpu)
9306                 kvm_save_current_fpu(vcpu->arch.guest_fpu);
9307
9308         copy_kernel_to_fpregs(&vcpu->arch.user_fpu->state);
9309
9310         fpregs_mark_activate();
9311         fpregs_unlock();
9312
9313         ++vcpu->stat.fpu_reload;
9314         trace_kvm_fpu(0);
9315 }
9316
9317 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
9318 {
9319         struct kvm_run *kvm_run = vcpu->run;
9320         int r;
9321
9322         vcpu_load(vcpu);
9323         kvm_sigset_activate(vcpu);
9324         kvm_load_guest_fpu(vcpu);
9325
9326         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
9327                 if (kvm_run->immediate_exit) {
9328                         r = -EINTR;
9329                         goto out;
9330                 }
9331                 kvm_vcpu_block(vcpu);
9332                 kvm_apic_accept_events(vcpu);
9333                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
9334                 r = -EAGAIN;
9335                 if (signal_pending(current)) {
9336                         r = -EINTR;
9337                         kvm_run->exit_reason = KVM_EXIT_INTR;
9338                         ++vcpu->stat.signal_exits;
9339                 }
9340                 goto out;
9341         }
9342
9343         if (kvm_run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
9344                 r = -EINVAL;
9345                 goto out;
9346         }
9347
9348         if (kvm_run->kvm_dirty_regs) {
9349                 r = sync_regs(vcpu);
9350                 if (r != 0)
9351                         goto out;
9352         }
9353
9354         /* re-sync apic's tpr */
9355         if (!lapic_in_kernel(vcpu)) {
9356                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
9357                         r = -EINVAL;
9358                         goto out;
9359                 }
9360         }
9361
9362         if (unlikely(vcpu->arch.complete_userspace_io)) {
9363                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
9364                 vcpu->arch.complete_userspace_io = NULL;
9365                 r = cui(vcpu);
9366                 if (r <= 0)
9367                         goto out;
9368         } else
9369                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
9370
9371         if (kvm_run->immediate_exit)
9372                 r = -EINTR;
9373         else
9374                 r = vcpu_run(vcpu);
9375
9376 out:
9377         kvm_put_guest_fpu(vcpu);
9378         if (kvm_run->kvm_valid_regs)
9379                 store_regs(vcpu);
9380         post_kvm_run_save(vcpu);
9381         kvm_sigset_deactivate(vcpu);
9382
9383         vcpu_put(vcpu);
9384         return r;
9385 }
9386
9387 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9388 {
9389         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
9390                 /*
9391                  * We are here if userspace calls get_regs() in the middle of
9392                  * instruction emulation. Registers state needs to be copied
9393                  * back from emulation context to vcpu. Userspace shouldn't do
9394                  * that usually, but some bad designed PV devices (vmware
9395                  * backdoor interface) need this to work
9396                  */
9397                 emulator_writeback_register_cache(vcpu->arch.emulate_ctxt);
9398                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
9399         }
9400         regs->rax = kvm_rax_read(vcpu);
9401         regs->rbx = kvm_rbx_read(vcpu);
9402         regs->rcx = kvm_rcx_read(vcpu);
9403         regs->rdx = kvm_rdx_read(vcpu);
9404         regs->rsi = kvm_rsi_read(vcpu);
9405         regs->rdi = kvm_rdi_read(vcpu);
9406         regs->rsp = kvm_rsp_read(vcpu);
9407         regs->rbp = kvm_rbp_read(vcpu);
9408 #ifdef CONFIG_X86_64
9409         regs->r8 = kvm_r8_read(vcpu);
9410         regs->r9 = kvm_r9_read(vcpu);
9411         regs->r10 = kvm_r10_read(vcpu);
9412         regs->r11 = kvm_r11_read(vcpu);
9413         regs->r12 = kvm_r12_read(vcpu);
9414         regs->r13 = kvm_r13_read(vcpu);
9415         regs->r14 = kvm_r14_read(vcpu);
9416         regs->r15 = kvm_r15_read(vcpu);
9417 #endif
9418
9419         regs->rip = kvm_rip_read(vcpu);
9420         regs->rflags = kvm_get_rflags(vcpu);
9421 }
9422
9423 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9424 {
9425         vcpu_load(vcpu);
9426         __get_regs(vcpu, regs);
9427         vcpu_put(vcpu);
9428         return 0;
9429 }
9430
9431 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9432 {
9433         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
9434         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
9435
9436         kvm_rax_write(vcpu, regs->rax);
9437         kvm_rbx_write(vcpu, regs->rbx);
9438         kvm_rcx_write(vcpu, regs->rcx);
9439         kvm_rdx_write(vcpu, regs->rdx);
9440         kvm_rsi_write(vcpu, regs->rsi);
9441         kvm_rdi_write(vcpu, regs->rdi);
9442         kvm_rsp_write(vcpu, regs->rsp);
9443         kvm_rbp_write(vcpu, regs->rbp);
9444 #ifdef CONFIG_X86_64
9445         kvm_r8_write(vcpu, regs->r8);
9446         kvm_r9_write(vcpu, regs->r9);
9447         kvm_r10_write(vcpu, regs->r10);
9448         kvm_r11_write(vcpu, regs->r11);
9449         kvm_r12_write(vcpu, regs->r12);
9450         kvm_r13_write(vcpu, regs->r13);
9451         kvm_r14_write(vcpu, regs->r14);
9452         kvm_r15_write(vcpu, regs->r15);
9453 #endif
9454
9455         kvm_rip_write(vcpu, regs->rip);
9456         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
9457
9458         vcpu->arch.exception.pending = false;
9459
9460         kvm_make_request(KVM_REQ_EVENT, vcpu);
9461 }
9462
9463 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9464 {
9465         vcpu_load(vcpu);
9466         __set_regs(vcpu, regs);
9467         vcpu_put(vcpu);
9468         return 0;
9469 }
9470
9471 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
9472 {
9473         struct kvm_segment cs;
9474
9475         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
9476         *db = cs.db;
9477         *l = cs.l;
9478 }
9479 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
9480
9481 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9482 {
9483         struct desc_ptr dt;
9484
9485         if (vcpu->arch.guest_state_protected)
9486                 goto skip_protected_regs;
9487
9488         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
9489         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
9490         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
9491         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
9492         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
9493         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
9494
9495         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
9496         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
9497
9498         kvm_x86_ops.get_idt(vcpu, &dt);
9499         sregs->idt.limit = dt.size;
9500         sregs->idt.base = dt.address;
9501         kvm_x86_ops.get_gdt(vcpu, &dt);
9502         sregs->gdt.limit = dt.size;
9503         sregs->gdt.base = dt.address;
9504
9505         sregs->cr2 = vcpu->arch.cr2;
9506         sregs->cr3 = kvm_read_cr3(vcpu);
9507
9508 skip_protected_regs:
9509         sregs->cr0 = kvm_read_cr0(vcpu);
9510         sregs->cr4 = kvm_read_cr4(vcpu);
9511         sregs->cr8 = kvm_get_cr8(vcpu);
9512         sregs->efer = vcpu->arch.efer;
9513         sregs->apic_base = kvm_get_apic_base(vcpu);
9514
9515         memset(sregs->interrupt_bitmap, 0, sizeof(sregs->interrupt_bitmap));
9516
9517         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
9518                 set_bit(vcpu->arch.interrupt.nr,
9519                         (unsigned long *)sregs->interrupt_bitmap);
9520 }
9521
9522 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
9523                                   struct kvm_sregs *sregs)
9524 {
9525         vcpu_load(vcpu);
9526         __get_sregs(vcpu, sregs);
9527         vcpu_put(vcpu);
9528         return 0;
9529 }
9530
9531 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
9532                                     struct kvm_mp_state *mp_state)
9533 {
9534         vcpu_load(vcpu);
9535         if (kvm_mpx_supported())
9536                 kvm_load_guest_fpu(vcpu);
9537
9538         kvm_apic_accept_events(vcpu);
9539         if ((vcpu->arch.mp_state == KVM_MP_STATE_HALTED ||
9540              vcpu->arch.mp_state == KVM_MP_STATE_AP_RESET_HOLD) &&
9541             vcpu->arch.pv.pv_unhalted)
9542                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
9543         else
9544                 mp_state->mp_state = vcpu->arch.mp_state;
9545
9546         if (kvm_mpx_supported())
9547                 kvm_put_guest_fpu(vcpu);
9548         vcpu_put(vcpu);
9549         return 0;
9550 }
9551
9552 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
9553                                     struct kvm_mp_state *mp_state)
9554 {
9555         int ret = -EINVAL;
9556
9557         vcpu_load(vcpu);
9558
9559         if (!lapic_in_kernel(vcpu) &&
9560             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
9561                 goto out;
9562
9563         /*
9564          * KVM_MP_STATE_INIT_RECEIVED means the processor is in
9565          * INIT state; latched init should be reported using
9566          * KVM_SET_VCPU_EVENTS, so reject it here.
9567          */
9568         if ((kvm_vcpu_latch_init(vcpu) || vcpu->arch.smi_pending) &&
9569             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
9570              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
9571                 goto out;
9572
9573         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
9574                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
9575                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
9576         } else
9577                 vcpu->arch.mp_state = mp_state->mp_state;
9578         kvm_make_request(KVM_REQ_EVENT, vcpu);
9579
9580         ret = 0;
9581 out:
9582         vcpu_put(vcpu);
9583         return ret;
9584 }
9585
9586 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
9587                     int reason, bool has_error_code, u32 error_code)
9588 {
9589         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
9590         int ret;
9591
9592         init_emulate_ctxt(vcpu);
9593
9594         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
9595                                    has_error_code, error_code);
9596         if (ret) {
9597                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
9598                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
9599                 vcpu->run->internal.ndata = 0;
9600                 return 0;
9601         }
9602
9603         kvm_rip_write(vcpu, ctxt->eip);
9604         kvm_set_rflags(vcpu, ctxt->eflags);
9605         return 1;
9606 }
9607 EXPORT_SYMBOL_GPL(kvm_task_switch);
9608
9609 static bool kvm_is_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9610 {
9611         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
9612                 /*
9613                  * When EFER.LME and CR0.PG are set, the processor is in
9614                  * 64-bit mode (though maybe in a 32-bit code segment).
9615                  * CR4.PAE and EFER.LMA must be set.
9616                  */
9617                 if (!(sregs->cr4 & X86_CR4_PAE) || !(sregs->efer & EFER_LMA))
9618                         return false;
9619         } else {
9620                 /*
9621                  * Not in 64-bit mode: EFER.LMA is clear and the code
9622                  * segment cannot be 64-bit.
9623                  */
9624                 if (sregs->efer & EFER_LMA || sregs->cs.l)
9625                         return false;
9626         }
9627
9628         return kvm_is_valid_cr4(vcpu, sregs->cr4);
9629 }
9630
9631 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9632 {
9633         struct msr_data apic_base_msr;
9634         int mmu_reset_needed = 0;
9635         int pending_vec, max_bits, idx;
9636         struct desc_ptr dt;
9637         int ret = -EINVAL;
9638
9639         if (!kvm_is_valid_sregs(vcpu, sregs))
9640                 goto out;
9641
9642         apic_base_msr.data = sregs->apic_base;
9643         apic_base_msr.host_initiated = true;
9644         if (kvm_set_apic_base(vcpu, &apic_base_msr))
9645                 goto out;
9646
9647         if (vcpu->arch.guest_state_protected)
9648                 goto skip_protected_regs;
9649
9650         dt.size = sregs->idt.limit;
9651         dt.address = sregs->idt.base;
9652         kvm_x86_ops.set_idt(vcpu, &dt);
9653         dt.size = sregs->gdt.limit;
9654         dt.address = sregs->gdt.base;
9655         kvm_x86_ops.set_gdt(vcpu, &dt);
9656
9657         vcpu->arch.cr2 = sregs->cr2;
9658         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
9659         vcpu->arch.cr3 = sregs->cr3;
9660         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
9661
9662         kvm_set_cr8(vcpu, sregs->cr8);
9663
9664         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
9665         kvm_x86_ops.set_efer(vcpu, sregs->efer);
9666
9667         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
9668         kvm_x86_ops.set_cr0(vcpu, sregs->cr0);
9669         vcpu->arch.cr0 = sregs->cr0;
9670
9671         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
9672         kvm_x86_ops.set_cr4(vcpu, sregs->cr4);
9673
9674         idx = srcu_read_lock(&vcpu->kvm->srcu);
9675         if (is_pae_paging(vcpu)) {
9676                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
9677                 mmu_reset_needed = 1;
9678         }
9679         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9680
9681         if (mmu_reset_needed)
9682                 kvm_mmu_reset_context(vcpu);
9683
9684         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
9685         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
9686         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
9687         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
9688         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
9689         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
9690
9691         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
9692         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
9693
9694         update_cr8_intercept(vcpu);
9695
9696         /* Older userspace won't unhalt the vcpu on reset. */
9697         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
9698             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
9699             !is_protmode(vcpu))
9700                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9701
9702 skip_protected_regs:
9703         max_bits = KVM_NR_INTERRUPTS;
9704         pending_vec = find_first_bit(
9705                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
9706         if (pending_vec < max_bits) {
9707                 kvm_queue_interrupt(vcpu, pending_vec, false);
9708                 pr_debug("Set back pending irq %d\n", pending_vec);
9709         }
9710
9711         kvm_make_request(KVM_REQ_EVENT, vcpu);
9712
9713         ret = 0;
9714 out:
9715         return ret;
9716 }
9717
9718 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
9719                                   struct kvm_sregs *sregs)
9720 {
9721         int ret;
9722
9723         vcpu_load(vcpu);
9724         ret = __set_sregs(vcpu, sregs);
9725         vcpu_put(vcpu);
9726         return ret;
9727 }
9728
9729 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
9730                                         struct kvm_guest_debug *dbg)
9731 {
9732         unsigned long rflags;
9733         int i, r;
9734
9735         if (vcpu->arch.guest_state_protected)
9736                 return -EINVAL;
9737
9738         vcpu_load(vcpu);
9739
9740         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
9741                 r = -EBUSY;
9742                 if (vcpu->arch.exception.pending)
9743                         goto out;
9744                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
9745                         kvm_queue_exception(vcpu, DB_VECTOR);
9746                 else
9747                         kvm_queue_exception(vcpu, BP_VECTOR);
9748         }
9749
9750         /*
9751          * Read rflags as long as potentially injected trace flags are still
9752          * filtered out.
9753          */
9754         rflags = kvm_get_rflags(vcpu);
9755
9756         vcpu->guest_debug = dbg->control;
9757         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
9758                 vcpu->guest_debug = 0;
9759
9760         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
9761                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
9762                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
9763                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
9764         } else {
9765                 for (i = 0; i < KVM_NR_DB_REGS; i++)
9766                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
9767         }
9768         kvm_update_dr7(vcpu);
9769
9770         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
9771                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
9772                         get_segment_base(vcpu, VCPU_SREG_CS);
9773
9774         /*
9775          * Trigger an rflags update that will inject or remove the trace
9776          * flags.
9777          */
9778         kvm_set_rflags(vcpu, rflags);
9779
9780         kvm_x86_ops.update_exception_bitmap(vcpu);
9781
9782         r = 0;
9783
9784 out:
9785         vcpu_put(vcpu);
9786         return r;
9787 }
9788
9789 /*
9790  * Translate a guest virtual address to a guest physical address.
9791  */
9792 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
9793                                     struct kvm_translation *tr)
9794 {
9795         unsigned long vaddr = tr->linear_address;
9796         gpa_t gpa;
9797         int idx;
9798
9799         vcpu_load(vcpu);
9800
9801         idx = srcu_read_lock(&vcpu->kvm->srcu);
9802         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
9803         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9804         tr->physical_address = gpa;
9805         tr->valid = gpa != UNMAPPED_GVA;
9806         tr->writeable = 1;
9807         tr->usermode = 0;
9808
9809         vcpu_put(vcpu);
9810         return 0;
9811 }
9812
9813 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
9814 {
9815         struct fxregs_state *fxsave;
9816
9817         if (!vcpu->arch.guest_fpu)
9818                 return 0;
9819
9820         vcpu_load(vcpu);
9821
9822         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
9823         memcpy(fpu->fpr, fxsave->st_space, 128);
9824         fpu->fcw = fxsave->cwd;
9825         fpu->fsw = fxsave->swd;
9826         fpu->ftwx = fxsave->twd;
9827         fpu->last_opcode = fxsave->fop;
9828         fpu->last_ip = fxsave->rip;
9829         fpu->last_dp = fxsave->rdp;
9830         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
9831
9832         vcpu_put(vcpu);
9833         return 0;
9834 }
9835
9836 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
9837 {
9838         struct fxregs_state *fxsave;
9839
9840         if (!vcpu->arch.guest_fpu)
9841                 return 0;
9842
9843         vcpu_load(vcpu);
9844
9845         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
9846
9847         memcpy(fxsave->st_space, fpu->fpr, 128);
9848         fxsave->cwd = fpu->fcw;
9849         fxsave->swd = fpu->fsw;
9850         fxsave->twd = fpu->ftwx;
9851         fxsave->fop = fpu->last_opcode;
9852         fxsave->rip = fpu->last_ip;
9853         fxsave->rdp = fpu->last_dp;
9854         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
9855
9856         vcpu_put(vcpu);
9857         return 0;
9858 }
9859
9860 static void store_regs(struct kvm_vcpu *vcpu)
9861 {
9862         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
9863
9864         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
9865                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
9866
9867         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
9868                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
9869
9870         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
9871                 kvm_vcpu_ioctl_x86_get_vcpu_events(
9872                                 vcpu, &vcpu->run->s.regs.events);
9873 }
9874
9875 static int sync_regs(struct kvm_vcpu *vcpu)
9876 {
9877         if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
9878                 return -EINVAL;
9879
9880         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
9881                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
9882                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
9883         }
9884         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
9885                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
9886                         return -EINVAL;
9887                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
9888         }
9889         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
9890                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
9891                                 vcpu, &vcpu->run->s.regs.events))
9892                         return -EINVAL;
9893                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
9894         }
9895
9896         return 0;
9897 }
9898
9899 static void fx_init(struct kvm_vcpu *vcpu)
9900 {
9901         if (!vcpu->arch.guest_fpu)
9902                 return;
9903
9904         fpstate_init(&vcpu->arch.guest_fpu->state);
9905         if (boot_cpu_has(X86_FEATURE_XSAVES))
9906                 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
9907                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
9908
9909         /*
9910          * Ensure guest xcr0 is valid for loading
9911          */
9912         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
9913
9914         vcpu->arch.cr0 |= X86_CR0_ET;
9915 }
9916
9917 void kvm_free_guest_fpu(struct kvm_vcpu *vcpu)
9918 {
9919         if (vcpu->arch.guest_fpu) {
9920                 kmem_cache_free(x86_fpu_cache, vcpu->arch.guest_fpu);
9921                 vcpu->arch.guest_fpu = NULL;
9922         }
9923 }
9924 EXPORT_SYMBOL_GPL(kvm_free_guest_fpu);
9925
9926 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
9927 {
9928         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
9929                 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
9930                              "guest TSC will not be reliable\n");
9931
9932         return 0;
9933 }
9934
9935 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
9936 {
9937         struct page *page;
9938         int r;
9939
9940         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
9941                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9942         else
9943                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
9944
9945         kvm_set_tsc_khz(vcpu, max_tsc_khz);
9946
9947         r = kvm_mmu_create(vcpu);
9948         if (r < 0)
9949                 return r;
9950
9951         if (irqchip_in_kernel(vcpu->kvm)) {
9952                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
9953                 if (r < 0)
9954                         goto fail_mmu_destroy;
9955                 if (kvm_apicv_activated(vcpu->kvm))
9956                         vcpu->arch.apicv_active = true;
9957         } else
9958                 static_key_slow_inc(&kvm_no_apic_vcpu);
9959
9960         r = -ENOMEM;
9961
9962         page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO);
9963         if (!page)
9964                 goto fail_free_lapic;
9965         vcpu->arch.pio_data = page_address(page);
9966
9967         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
9968                                        GFP_KERNEL_ACCOUNT);
9969         if (!vcpu->arch.mce_banks)
9970                 goto fail_free_pio_data;
9971         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
9972
9973         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
9974                                 GFP_KERNEL_ACCOUNT))
9975                 goto fail_free_mce_banks;
9976
9977         if (!alloc_emulate_ctxt(vcpu))
9978                 goto free_wbinvd_dirty_mask;
9979
9980         vcpu->arch.user_fpu = kmem_cache_zalloc(x86_fpu_cache,
9981                                                 GFP_KERNEL_ACCOUNT);
9982         if (!vcpu->arch.user_fpu) {
9983                 pr_err("kvm: failed to allocate userspace's fpu\n");
9984                 goto free_emulate_ctxt;
9985         }
9986
9987         vcpu->arch.guest_fpu = kmem_cache_zalloc(x86_fpu_cache,
9988                                                  GFP_KERNEL_ACCOUNT);
9989         if (!vcpu->arch.guest_fpu) {
9990                 pr_err("kvm: failed to allocate vcpu's fpu\n");
9991                 goto free_user_fpu;
9992         }
9993         fx_init(vcpu);
9994
9995         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
9996
9997         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
9998
9999         kvm_async_pf_hash_reset(vcpu);
10000         kvm_pmu_init(vcpu);
10001
10002         vcpu->arch.pending_external_vector = -1;
10003         vcpu->arch.preempted_in_kernel = false;
10004
10005         kvm_hv_vcpu_init(vcpu);
10006
10007         r = kvm_x86_ops.vcpu_create(vcpu);
10008         if (r)
10009                 goto free_guest_fpu;
10010
10011         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
10012         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
10013         kvm_vcpu_mtrr_init(vcpu);
10014         vcpu_load(vcpu);
10015         kvm_vcpu_reset(vcpu, false);
10016         kvm_init_mmu(vcpu, false);
10017         vcpu_put(vcpu);
10018         return 0;
10019
10020 free_guest_fpu:
10021         kvm_free_guest_fpu(vcpu);
10022 free_user_fpu:
10023         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
10024 free_emulate_ctxt:
10025         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10026 free_wbinvd_dirty_mask:
10027         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10028 fail_free_mce_banks:
10029         kfree(vcpu->arch.mce_banks);
10030 fail_free_pio_data:
10031         free_page((unsigned long)vcpu->arch.pio_data);
10032 fail_free_lapic:
10033         kvm_free_lapic(vcpu);
10034 fail_mmu_destroy:
10035         kvm_mmu_destroy(vcpu);
10036         return r;
10037 }
10038
10039 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
10040 {
10041         struct kvm *kvm = vcpu->kvm;
10042
10043         kvm_hv_vcpu_postcreate(vcpu);
10044
10045         if (mutex_lock_killable(&vcpu->mutex))
10046                 return;
10047         vcpu_load(vcpu);
10048         kvm_synchronize_tsc(vcpu, 0);
10049         vcpu_put(vcpu);
10050
10051         /* poll control enabled by default */
10052         vcpu->arch.msr_kvm_poll_control = 1;
10053
10054         mutex_unlock(&vcpu->mutex);
10055
10056         if (kvmclock_periodic_sync && vcpu->vcpu_idx == 0)
10057                 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
10058                                                 KVMCLOCK_SYNC_PERIOD);
10059 }
10060
10061 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
10062 {
10063         struct gfn_to_pfn_cache *cache = &vcpu->arch.st.cache;
10064         int idx;
10065
10066         kvm_release_pfn(cache->pfn, cache->dirty, cache);
10067
10068         kvmclock_reset(vcpu);
10069
10070         kvm_x86_ops.vcpu_free(vcpu);
10071
10072         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10073         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10074         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
10075         kvm_free_guest_fpu(vcpu);
10076
10077         kvm_hv_vcpu_uninit(vcpu);
10078         kvm_pmu_destroy(vcpu);
10079         kfree(vcpu->arch.mce_banks);
10080         kvm_free_lapic(vcpu);
10081         idx = srcu_read_lock(&vcpu->kvm->srcu);
10082         kvm_mmu_destroy(vcpu);
10083         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10084         free_page((unsigned long)vcpu->arch.pio_data);
10085         kvfree(vcpu->arch.cpuid_entries);
10086         if (!lapic_in_kernel(vcpu))
10087                 static_key_slow_dec(&kvm_no_apic_vcpu);
10088 }
10089
10090 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
10091 {
10092         kvm_lapic_reset(vcpu, init_event);
10093
10094         vcpu->arch.hflags = 0;
10095
10096         vcpu->arch.smi_pending = 0;
10097         vcpu->arch.smi_count = 0;
10098         atomic_set(&vcpu->arch.nmi_queued, 0);
10099         vcpu->arch.nmi_pending = 0;
10100         vcpu->arch.nmi_injected = false;
10101         kvm_clear_interrupt_queue(vcpu);
10102         kvm_clear_exception_queue(vcpu);
10103
10104         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
10105         kvm_update_dr0123(vcpu);
10106         vcpu->arch.dr6 = DR6_INIT;
10107         vcpu->arch.dr7 = DR7_FIXED_1;
10108         kvm_update_dr7(vcpu);
10109
10110         vcpu->arch.cr2 = 0;
10111
10112         kvm_make_request(KVM_REQ_EVENT, vcpu);
10113         vcpu->arch.apf.msr_en_val = 0;
10114         vcpu->arch.apf.msr_int_val = 0;
10115         vcpu->arch.st.msr_val = 0;
10116
10117         kvmclock_reset(vcpu);
10118
10119         kvm_clear_async_pf_completion_queue(vcpu);
10120         kvm_async_pf_hash_reset(vcpu);
10121         vcpu->arch.apf.halted = false;
10122
10123         if (vcpu->arch.guest_fpu && kvm_mpx_supported()) {
10124                 void *mpx_state_buffer;
10125
10126                 /*
10127                  * To avoid have the INIT path from kvm_apic_has_events() that be
10128                  * called with loaded FPU and does not let userspace fix the state.
10129                  */
10130                 if (init_event)
10131                         kvm_put_guest_fpu(vcpu);
10132                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10133                                         XFEATURE_BNDREGS);
10134                 if (mpx_state_buffer)
10135                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
10136                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10137                                         XFEATURE_BNDCSR);
10138                 if (mpx_state_buffer)
10139                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
10140                 if (init_event)
10141                         kvm_load_guest_fpu(vcpu);
10142         }
10143
10144         if (!init_event) {
10145                 kvm_pmu_reset(vcpu);
10146                 vcpu->arch.smbase = 0x30000;
10147
10148                 vcpu->arch.msr_misc_features_enables = 0;
10149
10150                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10151         }
10152
10153         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
10154         vcpu->arch.regs_avail = ~0;
10155         vcpu->arch.regs_dirty = ~0;
10156
10157         vcpu->arch.ia32_xss = 0;
10158
10159         kvm_x86_ops.vcpu_reset(vcpu, init_event);
10160 }
10161
10162 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
10163 {
10164         struct kvm_segment cs;
10165
10166         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
10167         cs.selector = vector << 8;
10168         cs.base = vector << 12;
10169         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
10170         kvm_rip_write(vcpu, 0);
10171 }
10172 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector);
10173
10174 int kvm_arch_hardware_enable(void)
10175 {
10176         struct kvm *kvm;
10177         struct kvm_vcpu *vcpu;
10178         int i;
10179         int ret;
10180         u64 local_tsc;
10181         u64 max_tsc = 0;
10182         bool stable, backwards_tsc = false;
10183
10184         kvm_user_return_msr_cpu_online();
10185         ret = kvm_x86_ops.hardware_enable();
10186         if (ret != 0)
10187                 return ret;
10188
10189         local_tsc = rdtsc();
10190         stable = !kvm_check_tsc_unstable();
10191         list_for_each_entry(kvm, &vm_list, vm_list) {
10192                 kvm_for_each_vcpu(i, vcpu, kvm) {
10193                         if (!stable && vcpu->cpu == smp_processor_id())
10194                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
10195                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
10196                                 backwards_tsc = true;
10197                                 if (vcpu->arch.last_host_tsc > max_tsc)
10198                                         max_tsc = vcpu->arch.last_host_tsc;
10199                         }
10200                 }
10201         }
10202
10203         /*
10204          * Sometimes, even reliable TSCs go backwards.  This happens on
10205          * platforms that reset TSC during suspend or hibernate actions, but
10206          * maintain synchronization.  We must compensate.  Fortunately, we can
10207          * detect that condition here, which happens early in CPU bringup,
10208          * before any KVM threads can be running.  Unfortunately, we can't
10209          * bring the TSCs fully up to date with real time, as we aren't yet far
10210          * enough into CPU bringup that we know how much real time has actually
10211          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
10212          * variables that haven't been updated yet.
10213          *
10214          * So we simply find the maximum observed TSC above, then record the
10215          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
10216          * the adjustment will be applied.  Note that we accumulate
10217          * adjustments, in case multiple suspend cycles happen before some VCPU
10218          * gets a chance to run again.  In the event that no KVM threads get a
10219          * chance to run, we will miss the entire elapsed period, as we'll have
10220          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
10221          * loose cycle time.  This isn't too big a deal, since the loss will be
10222          * uniform across all VCPUs (not to mention the scenario is extremely
10223          * unlikely). It is possible that a second hibernate recovery happens
10224          * much faster than a first, causing the observed TSC here to be
10225          * smaller; this would require additional padding adjustment, which is
10226          * why we set last_host_tsc to the local tsc observed here.
10227          *
10228          * N.B. - this code below runs only on platforms with reliable TSC,
10229          * as that is the only way backwards_tsc is set above.  Also note
10230          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
10231          * have the same delta_cyc adjustment applied if backwards_tsc
10232          * is detected.  Note further, this adjustment is only done once,
10233          * as we reset last_host_tsc on all VCPUs to stop this from being
10234          * called multiple times (one for each physical CPU bringup).
10235          *
10236          * Platforms with unreliable TSCs don't have to deal with this, they
10237          * will be compensated by the logic in vcpu_load, which sets the TSC to
10238          * catchup mode.  This will catchup all VCPUs to real time, but cannot
10239          * guarantee that they stay in perfect synchronization.
10240          */
10241         if (backwards_tsc) {
10242                 u64 delta_cyc = max_tsc - local_tsc;
10243                 list_for_each_entry(kvm, &vm_list, vm_list) {
10244                         kvm->arch.backwards_tsc_observed = true;
10245                         kvm_for_each_vcpu(i, vcpu, kvm) {
10246                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
10247                                 vcpu->arch.last_host_tsc = local_tsc;
10248                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
10249                         }
10250
10251                         /*
10252                          * We have to disable TSC offset matching.. if you were
10253                          * booting a VM while issuing an S4 host suspend....
10254                          * you may have some problem.  Solving this issue is
10255                          * left as an exercise to the reader.
10256                          */
10257                         kvm->arch.last_tsc_nsec = 0;
10258                         kvm->arch.last_tsc_write = 0;
10259                 }
10260
10261         }
10262         return 0;
10263 }
10264
10265 void kvm_arch_hardware_disable(void)
10266 {
10267         kvm_x86_ops.hardware_disable();
10268         drop_user_return_notifiers();
10269 }
10270
10271 int kvm_arch_hardware_setup(void *opaque)
10272 {
10273         struct kvm_x86_init_ops *ops = opaque;
10274         int r;
10275
10276         rdmsrl_safe(MSR_EFER, &host_efer);
10277
10278         if (boot_cpu_has(X86_FEATURE_XSAVES))
10279                 rdmsrl(MSR_IA32_XSS, host_xss);
10280
10281         r = ops->hardware_setup();
10282         if (r != 0)
10283                 return r;
10284
10285         memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops));
10286
10287         if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
10288                 supported_xss = 0;
10289
10290 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
10291         cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
10292 #undef __kvm_cpu_cap_has
10293
10294         if (kvm_has_tsc_control) {
10295                 /*
10296                  * Make sure the user can only configure tsc_khz values that
10297                  * fit into a signed integer.
10298                  * A min value is not calculated because it will always
10299                  * be 1 on all machines.
10300                  */
10301                 u64 max = min(0x7fffffffULL,
10302                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
10303                 kvm_max_guest_tsc_khz = max;
10304
10305                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
10306         }
10307
10308         kvm_init_msr_list();
10309         return 0;
10310 }
10311
10312 void kvm_arch_hardware_unsetup(void)
10313 {
10314         kvm_x86_ops.hardware_unsetup();
10315 }
10316
10317 int kvm_arch_check_processor_compat(void *opaque)
10318 {
10319         struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
10320         struct kvm_x86_init_ops *ops = opaque;
10321
10322         WARN_ON(!irqs_disabled());
10323
10324         if (__cr4_reserved_bits(cpu_has, c) !=
10325             __cr4_reserved_bits(cpu_has, &boot_cpu_data))
10326                 return -EIO;
10327
10328         return ops->check_processor_compatibility();
10329 }
10330
10331 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
10332 {
10333         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
10334 }
10335 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
10336
10337 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
10338 {
10339         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
10340 }
10341
10342 struct static_key kvm_no_apic_vcpu __read_mostly;
10343 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
10344
10345 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
10346 {
10347         struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
10348
10349         vcpu->arch.l1tf_flush_l1d = true;
10350         if (pmu->version && unlikely(pmu->event_count)) {
10351                 pmu->need_cleanup = true;
10352                 kvm_make_request(KVM_REQ_PMU, vcpu);
10353         }
10354         kvm_x86_ops.sched_in(vcpu, cpu);
10355 }
10356
10357 void kvm_arch_free_vm(struct kvm *kvm)
10358 {
10359         kfree(kvm->arch.hyperv.hv_pa_pg);
10360         vfree(kvm);
10361 }
10362
10363
10364 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
10365 {
10366         if (type)
10367                 return -EINVAL;
10368
10369         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
10370         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
10371         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
10372         INIT_LIST_HEAD(&kvm->arch.lpage_disallowed_mmu_pages);
10373         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
10374         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
10375
10376         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
10377         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
10378         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
10379         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
10380                 &kvm->arch.irq_sources_bitmap);
10381
10382         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
10383         mutex_init(&kvm->arch.apic_map_lock);
10384         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
10385
10386         kvm->arch.kvmclock_offset = -get_kvmclock_base_ns();
10387         pvclock_update_vm_gtod_copy(kvm);
10388
10389         kvm->arch.guest_can_read_msr_platform_info = true;
10390
10391         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
10392         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
10393
10394         kvm_hv_init_vm(kvm);
10395         kvm_page_track_init(kvm);
10396         kvm_mmu_init_vm(kvm);
10397
10398         return kvm_x86_ops.vm_init(kvm);
10399 }
10400
10401 int kvm_arch_post_init_vm(struct kvm *kvm)
10402 {
10403         return kvm_mmu_post_init_vm(kvm);
10404 }
10405
10406 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
10407 {
10408         vcpu_load(vcpu);
10409         kvm_mmu_unload(vcpu);
10410         vcpu_put(vcpu);
10411 }
10412
10413 static void kvm_free_vcpus(struct kvm *kvm)
10414 {
10415         unsigned int i;
10416         struct kvm_vcpu *vcpu;
10417
10418         /*
10419          * Unpin any mmu pages first.
10420          */
10421         kvm_for_each_vcpu(i, vcpu, kvm) {
10422                 kvm_clear_async_pf_completion_queue(vcpu);
10423                 kvm_unload_vcpu_mmu(vcpu);
10424         }
10425         kvm_for_each_vcpu(i, vcpu, kvm)
10426                 kvm_vcpu_destroy(vcpu);
10427
10428         mutex_lock(&kvm->lock);
10429         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
10430                 kvm->vcpus[i] = NULL;
10431
10432         atomic_set(&kvm->online_vcpus, 0);
10433         mutex_unlock(&kvm->lock);
10434 }
10435
10436 void kvm_arch_sync_events(struct kvm *kvm)
10437 {
10438         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
10439         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
10440         kvm_free_pit(kvm);
10441 }
10442
10443 #define  ERR_PTR_USR(e)  ((void __user *)ERR_PTR(e))
10444
10445 /**
10446  * __x86_set_memory_region: Setup KVM internal memory slot
10447  *
10448  * @kvm: the kvm pointer to the VM.
10449  * @id: the slot ID to setup.
10450  * @gpa: the GPA to install the slot (unused when @size == 0).
10451  * @size: the size of the slot. Set to zero to uninstall a slot.
10452  *
10453  * This function helps to setup a KVM internal memory slot.  Specify
10454  * @size > 0 to install a new slot, while @size == 0 to uninstall a
10455  * slot.  The return code can be one of the following:
10456  *
10457  *   HVA:           on success (uninstall will return a bogus HVA)
10458  *   -errno:        on error
10459  *
10460  * The caller should always use IS_ERR() to check the return value
10461  * before use.  Note, the KVM internal memory slots are guaranteed to
10462  * remain valid and unchanged until the VM is destroyed, i.e., the
10463  * GPA->HVA translation will not change.  However, the HVA is a user
10464  * address, i.e. its accessibility is not guaranteed, and must be
10465  * accessed via __copy_{to,from}_user().
10466  */
10467 void __user * __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
10468                                       u32 size)
10469 {
10470         int i, r;
10471         unsigned long hva, old_npages;
10472         struct kvm_memslots *slots = kvm_memslots(kvm);
10473         struct kvm_memory_slot *slot;
10474
10475         /* Called with kvm->slots_lock held.  */
10476         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
10477                 return ERR_PTR_USR(-EINVAL);
10478
10479         slot = id_to_memslot(slots, id);
10480         if (size) {
10481                 if (slot && slot->npages)
10482                         return ERR_PTR_USR(-EEXIST);
10483
10484                 /*
10485                  * MAP_SHARED to prevent internal slot pages from being moved
10486                  * by fork()/COW.
10487                  */
10488                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
10489                               MAP_SHARED | MAP_ANONYMOUS, 0);
10490                 if (IS_ERR((void *)hva))
10491                         return (void __user *)hva;
10492         } else {
10493                 if (!slot || !slot->npages)
10494                         return 0;
10495
10496                 old_npages = slot->npages;
10497                 hva = 0;
10498         }
10499
10500         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
10501                 struct kvm_userspace_memory_region m;
10502
10503                 m.slot = id | (i << 16);
10504                 m.flags = 0;
10505                 m.guest_phys_addr = gpa;
10506                 m.userspace_addr = hva;
10507                 m.memory_size = size;
10508                 r = __kvm_set_memory_region(kvm, &m);
10509                 if (r < 0)
10510                         return ERR_PTR_USR(r);
10511         }
10512
10513         if (!size)
10514                 vm_munmap(hva, old_npages * PAGE_SIZE);
10515
10516         return (void __user *)hva;
10517 }
10518 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
10519
10520 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
10521 {
10522         kvm_mmu_pre_destroy_vm(kvm);
10523 }
10524
10525 void kvm_arch_destroy_vm(struct kvm *kvm)
10526 {
10527         u32 i;
10528
10529         if (current->mm == kvm->mm) {
10530                 /*
10531                  * Free memory regions allocated on behalf of userspace,
10532                  * unless the the memory map has changed due to process exit
10533                  * or fd copying.
10534                  */
10535                 mutex_lock(&kvm->slots_lock);
10536                 __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
10537                                         0, 0);
10538                 __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
10539                                         0, 0);
10540                 __x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
10541                 mutex_unlock(&kvm->slots_lock);
10542         }
10543         if (kvm_x86_ops.vm_destroy)
10544                 kvm_x86_ops.vm_destroy(kvm);
10545         for (i = 0; i < kvm->arch.msr_filter.count; i++)
10546                 kfree(kvm->arch.msr_filter.ranges[i].bitmap);
10547         kvm_pic_destroy(kvm);
10548         kvm_ioapic_destroy(kvm);
10549         kvm_free_vcpus(kvm);
10550         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
10551         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
10552         kvm_mmu_uninit_vm(kvm);
10553         kvm_page_track_cleanup(kvm);
10554         kvm_hv_destroy_vm(kvm);
10555 }
10556
10557 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
10558 {
10559         int i;
10560
10561         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10562                 kvfree(slot->arch.rmap[i]);
10563                 slot->arch.rmap[i] = NULL;
10564
10565                 if (i == 0)
10566                         continue;
10567
10568                 kvfree(slot->arch.lpage_info[i - 1]);
10569                 slot->arch.lpage_info[i - 1] = NULL;
10570         }
10571
10572         kvm_page_track_free_memslot(slot);
10573 }
10574
10575 static int kvm_alloc_memslot_metadata(struct kvm_memory_slot *slot,
10576                                       unsigned long npages)
10577 {
10578         int i;
10579
10580         /*
10581          * Clear out the previous array pointers for the KVM_MR_MOVE case.  The
10582          * old arrays will be freed by __kvm_set_memory_region() if installing
10583          * the new memslot is successful.
10584          */
10585         memset(&slot->arch, 0, sizeof(slot->arch));
10586
10587         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10588                 struct kvm_lpage_info *linfo;
10589                 unsigned long ugfn;
10590                 int lpages;
10591                 int level = i + 1;
10592
10593                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
10594                                       slot->base_gfn, level) + 1;
10595
10596                 slot->arch.rmap[i] =
10597                         kvcalloc(lpages, sizeof(*slot->arch.rmap[i]),
10598                                  GFP_KERNEL_ACCOUNT);
10599                 if (!slot->arch.rmap[i])
10600                         goto out_free;
10601                 if (i == 0)
10602                         continue;
10603
10604                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
10605                 if (!linfo)
10606                         goto out_free;
10607
10608                 slot->arch.lpage_info[i - 1] = linfo;
10609
10610                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
10611                         linfo[0].disallow_lpage = 1;
10612                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
10613                         linfo[lpages - 1].disallow_lpage = 1;
10614                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
10615                 /*
10616                  * If the gfn and userspace address are not aligned wrt each
10617                  * other, disable large page support for this slot.
10618                  */
10619                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1)) {
10620                         unsigned long j;
10621
10622                         for (j = 0; j < lpages; ++j)
10623                                 linfo[j].disallow_lpage = 1;
10624                 }
10625         }
10626
10627         if (kvm_page_track_create_memslot(slot, npages))
10628                 goto out_free;
10629
10630         return 0;
10631
10632 out_free:
10633         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10634                 kvfree(slot->arch.rmap[i]);
10635                 slot->arch.rmap[i] = NULL;
10636                 if (i == 0)
10637                         continue;
10638
10639                 kvfree(slot->arch.lpage_info[i - 1]);
10640                 slot->arch.lpage_info[i - 1] = NULL;
10641         }
10642         return -ENOMEM;
10643 }
10644
10645 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
10646 {
10647         struct kvm_vcpu *vcpu;
10648         int i;
10649
10650         /*
10651          * memslots->generation has been incremented.
10652          * mmio generation may have reached its maximum value.
10653          */
10654         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
10655
10656         /* Force re-initialization of steal_time cache */
10657         kvm_for_each_vcpu(i, vcpu, kvm)
10658                 kvm_vcpu_kick(vcpu);
10659 }
10660
10661 int kvm_arch_prepare_memory_region(struct kvm *kvm,
10662                                 struct kvm_memory_slot *memslot,
10663                                 const struct kvm_userspace_memory_region *mem,
10664                                 enum kvm_mr_change change)
10665 {
10666         if (change == KVM_MR_CREATE || change == KVM_MR_MOVE)
10667                 return kvm_alloc_memslot_metadata(memslot,
10668                                                   mem->memory_size >> PAGE_SHIFT);
10669         return 0;
10670 }
10671
10672 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
10673                                      struct kvm_memory_slot *old,
10674                                      struct kvm_memory_slot *new,
10675                                      enum kvm_mr_change change)
10676 {
10677         /*
10678          * Nothing to do for RO slots or CREATE/MOVE/DELETE of a slot.
10679          * See comments below.
10680          */
10681         if ((change != KVM_MR_FLAGS_ONLY) || (new->flags & KVM_MEM_READONLY))
10682                 return;
10683
10684         /*
10685          * Dirty logging tracks sptes in 4k granularity, meaning that large
10686          * sptes have to be split.  If live migration is successful, the guest
10687          * in the source machine will be destroyed and large sptes will be
10688          * created in the destination. However, if the guest continues to run
10689          * in the source machine (for example if live migration fails), small
10690          * sptes will remain around and cause bad performance.
10691          *
10692          * Scan sptes if dirty logging has been stopped, dropping those
10693          * which can be collapsed into a single large-page spte.  Later
10694          * page faults will create the large-page sptes.
10695          *
10696          * There is no need to do this in any of the following cases:
10697          * CREATE:      No dirty mappings will already exist.
10698          * MOVE/DELETE: The old mappings will already have been cleaned up by
10699          *              kvm_arch_flush_shadow_memslot()
10700          */
10701         if ((old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
10702             !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
10703                 kvm_mmu_zap_collapsible_sptes(kvm, new);
10704
10705         /*
10706          * Enable or disable dirty logging for the slot.
10707          *
10708          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of the old
10709          * slot have been zapped so no dirty logging updates are needed for
10710          * the old slot.
10711          * For KVM_MR_CREATE and KVM_MR_MOVE, once the new slot is visible
10712          * any mappings that might be created in it will consume the
10713          * properties of the new slot and do not need to be updated here.
10714          *
10715          * When PML is enabled, the kvm_x86_ops dirty logging hooks are
10716          * called to enable/disable dirty logging.
10717          *
10718          * When disabling dirty logging with PML enabled, the D-bit is set
10719          * for sptes in the slot in order to prevent unnecessary GPA
10720          * logging in the PML buffer (and potential PML buffer full VMEXIT).
10721          * This guarantees leaving PML enabled for the guest's lifetime
10722          * won't have any additional overhead from PML when the guest is
10723          * running with dirty logging disabled.
10724          *
10725          * When enabling dirty logging, large sptes are write-protected
10726          * so they can be split on first write.  New large sptes cannot
10727          * be created for this slot until the end of the logging.
10728          * See the comments in fast_page_fault().
10729          * For small sptes, nothing is done if the dirty log is in the
10730          * initial-all-set state.  Otherwise, depending on whether pml
10731          * is enabled the D-bit or the W-bit will be cleared.
10732          */
10733         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
10734                 if (kvm_x86_ops.slot_enable_log_dirty) {
10735                         kvm_x86_ops.slot_enable_log_dirty(kvm, new);
10736                 } else {
10737                         int level =
10738                                 kvm_dirty_log_manual_protect_and_init_set(kvm) ?
10739                                 PG_LEVEL_2M : PG_LEVEL_4K;
10740
10741                         /*
10742                          * If we're with initial-all-set, we don't need
10743                          * to write protect any small page because
10744                          * they're reported as dirty already.  However
10745                          * we still need to write-protect huge pages
10746                          * so that the page split can happen lazily on
10747                          * the first write to the huge page.
10748                          */
10749                         kvm_mmu_slot_remove_write_access(kvm, new, level);
10750                 }
10751         } else {
10752                 if (kvm_x86_ops.slot_disable_log_dirty)
10753                         kvm_x86_ops.slot_disable_log_dirty(kvm, new);
10754         }
10755 }
10756
10757 void kvm_arch_commit_memory_region(struct kvm *kvm,
10758                                 const struct kvm_userspace_memory_region *mem,
10759                                 struct kvm_memory_slot *old,
10760                                 const struct kvm_memory_slot *new,
10761                                 enum kvm_mr_change change)
10762 {
10763         if (!kvm->arch.n_requested_mmu_pages)
10764                 kvm_mmu_change_mmu_pages(kvm,
10765                                 kvm_mmu_calculate_default_mmu_pages(kvm));
10766
10767         /*
10768          * FIXME: const-ify all uses of struct kvm_memory_slot.
10769          */
10770         kvm_mmu_slot_apply_flags(kvm, old, (struct kvm_memory_slot *) new, change);
10771
10772         /* Free the arrays associated with the old memslot. */
10773         if (change == KVM_MR_MOVE)
10774                 kvm_arch_free_memslot(kvm, old);
10775 }
10776
10777 void kvm_arch_flush_shadow_all(struct kvm *kvm)
10778 {
10779         kvm_mmu_zap_all(kvm);
10780 }
10781
10782 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
10783                                    struct kvm_memory_slot *slot)
10784 {
10785         kvm_page_track_flush_slot(kvm, slot);
10786 }
10787
10788 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
10789 {
10790         return (is_guest_mode(vcpu) &&
10791                         kvm_x86_ops.guest_apic_has_interrupt &&
10792                         kvm_x86_ops.guest_apic_has_interrupt(vcpu));
10793 }
10794
10795 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
10796 {
10797         if (!list_empty_careful(&vcpu->async_pf.done))
10798                 return true;
10799
10800         if (kvm_apic_has_events(vcpu))
10801                 return true;
10802
10803         if (vcpu->arch.pv.pv_unhalted)
10804                 return true;
10805
10806         if (vcpu->arch.exception.pending)
10807                 return true;
10808
10809         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
10810             (vcpu->arch.nmi_pending &&
10811              kvm_x86_ops.nmi_allowed(vcpu, false)))
10812                 return true;
10813
10814         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
10815             (vcpu->arch.smi_pending &&
10816              kvm_x86_ops.smi_allowed(vcpu, false)))
10817                 return true;
10818
10819         if (kvm_arch_interrupt_allowed(vcpu) &&
10820             (kvm_cpu_has_interrupt(vcpu) ||
10821             kvm_guest_apic_has_interrupt(vcpu)))
10822                 return true;
10823
10824         if (kvm_hv_has_stimer_pending(vcpu))
10825                 return true;
10826
10827         if (is_guest_mode(vcpu) &&
10828             kvm_x86_ops.nested_ops->hv_timer_pending &&
10829             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
10830                 return true;
10831
10832         return false;
10833 }
10834
10835 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
10836 {
10837         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
10838 }
10839
10840 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
10841 {
10842         if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
10843                 return true;
10844
10845         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
10846                 kvm_test_request(KVM_REQ_SMI, vcpu) ||
10847                  kvm_test_request(KVM_REQ_EVENT, vcpu))
10848                 return true;
10849
10850         if (vcpu->arch.apicv_active && kvm_x86_ops.dy_apicv_has_pending_interrupt(vcpu))
10851                 return true;
10852
10853         return false;
10854 }
10855
10856 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
10857 {
10858         return vcpu->arch.preempted_in_kernel;
10859 }
10860
10861 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
10862 {
10863         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
10864 }
10865
10866 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
10867 {
10868         return kvm_x86_ops.interrupt_allowed(vcpu, false);
10869 }
10870
10871 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
10872 {
10873         /* Can't read the RIP when guest state is protected, just return 0 */
10874         if (vcpu->arch.guest_state_protected)
10875                 return 0;
10876
10877         if (is_64_bit_mode(vcpu))
10878                 return kvm_rip_read(vcpu);
10879         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
10880                      kvm_rip_read(vcpu));
10881 }
10882 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
10883
10884 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
10885 {
10886         return kvm_get_linear_rip(vcpu) == linear_rip;
10887 }
10888 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
10889
10890 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
10891 {
10892         unsigned long rflags;
10893
10894         rflags = kvm_x86_ops.get_rflags(vcpu);
10895         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
10896                 rflags &= ~X86_EFLAGS_TF;
10897         return rflags;
10898 }
10899 EXPORT_SYMBOL_GPL(kvm_get_rflags);
10900
10901 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
10902 {
10903         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
10904             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
10905                 rflags |= X86_EFLAGS_TF;
10906         kvm_x86_ops.set_rflags(vcpu, rflags);
10907 }
10908
10909 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
10910 {
10911         __kvm_set_rflags(vcpu, rflags);
10912         kvm_make_request(KVM_REQ_EVENT, vcpu);
10913 }
10914 EXPORT_SYMBOL_GPL(kvm_set_rflags);
10915
10916 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
10917 {
10918         int r;
10919
10920         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
10921               work->wakeup_all)
10922                 return;
10923
10924         r = kvm_mmu_reload(vcpu);
10925         if (unlikely(r))
10926                 return;
10927
10928         if (!vcpu->arch.mmu->direct_map &&
10929               work->arch.cr3 != vcpu->arch.mmu->get_guest_pgd(vcpu))
10930                 return;
10931
10932         kvm_mmu_do_page_fault(vcpu, work->cr2_or_gpa, 0, true);
10933 }
10934
10935 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
10936 {
10937         BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU));
10938
10939         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
10940 }
10941
10942 static inline u32 kvm_async_pf_next_probe(u32 key)
10943 {
10944         return (key + 1) & (ASYNC_PF_PER_VCPU - 1);
10945 }
10946
10947 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
10948 {
10949         u32 key = kvm_async_pf_hash_fn(gfn);
10950
10951         while (vcpu->arch.apf.gfns[key] != ~0)
10952                 key = kvm_async_pf_next_probe(key);
10953
10954         vcpu->arch.apf.gfns[key] = gfn;
10955 }
10956
10957 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
10958 {
10959         int i;
10960         u32 key = kvm_async_pf_hash_fn(gfn);
10961
10962         for (i = 0; i < ASYNC_PF_PER_VCPU &&
10963                      (vcpu->arch.apf.gfns[key] != gfn &&
10964                       vcpu->arch.apf.gfns[key] != ~0); i++)
10965                 key = kvm_async_pf_next_probe(key);
10966
10967         return key;
10968 }
10969
10970 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
10971 {
10972         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
10973 }
10974
10975 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
10976 {
10977         u32 i, j, k;
10978
10979         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
10980
10981         if (WARN_ON_ONCE(vcpu->arch.apf.gfns[i] != gfn))
10982                 return;
10983
10984         while (true) {
10985                 vcpu->arch.apf.gfns[i] = ~0;
10986                 do {
10987                         j = kvm_async_pf_next_probe(j);
10988                         if (vcpu->arch.apf.gfns[j] == ~0)
10989                                 return;
10990                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
10991                         /*
10992                          * k lies cyclically in ]i,j]
10993                          * |    i.k.j |
10994                          * |....j i.k.| or  |.k..j i...|
10995                          */
10996                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
10997                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
10998                 i = j;
10999         }
11000 }
11001
11002 static inline int apf_put_user_notpresent(struct kvm_vcpu *vcpu)
11003 {
11004         u32 reason = KVM_PV_REASON_PAGE_NOT_PRESENT;
11005
11006         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &reason,
11007                                       sizeof(reason));
11008 }
11009
11010 static inline int apf_put_user_ready(struct kvm_vcpu *vcpu, u32 token)
11011 {
11012         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
11013
11014         return kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
11015                                              &token, offset, sizeof(token));
11016 }
11017
11018 static inline bool apf_pageready_slot_free(struct kvm_vcpu *vcpu)
11019 {
11020         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
11021         u32 val;
11022
11023         if (kvm_read_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
11024                                          &val, offset, sizeof(val)))
11025                 return false;
11026
11027         return !val;
11028 }
11029
11030 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
11031 {
11032         if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
11033                 return false;
11034
11035         if (!kvm_pv_async_pf_enabled(vcpu) ||
11036             (vcpu->arch.apf.send_user_only && kvm_x86_ops.get_cpl(vcpu) == 0))
11037                 return false;
11038
11039         return true;
11040 }
11041
11042 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
11043 {
11044         if (unlikely(!lapic_in_kernel(vcpu) ||
11045                      kvm_event_needs_reinjection(vcpu) ||
11046                      vcpu->arch.exception.pending))
11047                 return false;
11048
11049         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
11050                 return false;
11051
11052         /*
11053          * If interrupts are off we cannot even use an artificial
11054          * halt state.
11055          */
11056         return kvm_arch_interrupt_allowed(vcpu);
11057 }
11058
11059 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
11060                                      struct kvm_async_pf *work)
11061 {
11062         struct x86_exception fault;
11063
11064         trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
11065         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
11066
11067         if (kvm_can_deliver_async_pf(vcpu) &&
11068             !apf_put_user_notpresent(vcpu)) {
11069                 fault.vector = PF_VECTOR;
11070                 fault.error_code_valid = true;
11071                 fault.error_code = 0;
11072                 fault.nested_page_fault = false;
11073                 fault.address = work->arch.token;
11074                 fault.async_page_fault = true;
11075                 kvm_inject_page_fault(vcpu, &fault);
11076                 return true;
11077         } else {
11078                 /*
11079                  * It is not possible to deliver a paravirtualized asynchronous
11080                  * page fault, but putting the guest in an artificial halt state
11081                  * can be beneficial nevertheless: if an interrupt arrives, we
11082                  * can deliver it timely and perhaps the guest will schedule
11083                  * another process.  When the instruction that triggered a page
11084                  * fault is retried, hopefully the page will be ready in the host.
11085                  */
11086                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
11087                 return false;
11088         }
11089 }
11090
11091 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
11092                                  struct kvm_async_pf *work)
11093 {
11094         struct kvm_lapic_irq irq = {
11095                 .delivery_mode = APIC_DM_FIXED,
11096                 .vector = vcpu->arch.apf.vec
11097         };
11098
11099         if (work->wakeup_all)
11100                 work->arch.token = ~0; /* broadcast wakeup */
11101         else
11102                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
11103         trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
11104
11105         if ((work->wakeup_all || work->notpresent_injected) &&
11106             kvm_pv_async_pf_enabled(vcpu) &&
11107             !apf_put_user_ready(vcpu, work->arch.token)) {
11108                 vcpu->arch.apf.pageready_pending = true;
11109                 kvm_apic_set_irq(vcpu, &irq, NULL);
11110         }
11111
11112         vcpu->arch.apf.halted = false;
11113         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
11114 }
11115
11116 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu)
11117 {
11118         kvm_make_request(KVM_REQ_APF_READY, vcpu);
11119         if (!vcpu->arch.apf.pageready_pending)
11120                 kvm_vcpu_kick(vcpu);
11121 }
11122
11123 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu)
11124 {
11125         if (!kvm_pv_async_pf_enabled(vcpu))
11126                 return true;
11127         else
11128                 return apf_pageready_slot_free(vcpu);
11129 }
11130
11131 void kvm_arch_start_assignment(struct kvm *kvm)
11132 {
11133         atomic_inc(&kvm->arch.assigned_device_count);
11134 }
11135 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
11136
11137 void kvm_arch_end_assignment(struct kvm *kvm)
11138 {
11139         atomic_dec(&kvm->arch.assigned_device_count);
11140 }
11141 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
11142
11143 bool kvm_arch_has_assigned_device(struct kvm *kvm)
11144 {
11145         return atomic_read(&kvm->arch.assigned_device_count);
11146 }
11147 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
11148
11149 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
11150 {
11151         atomic_inc(&kvm->arch.noncoherent_dma_count);
11152 }
11153 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
11154
11155 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
11156 {
11157         atomic_dec(&kvm->arch.noncoherent_dma_count);
11158 }
11159 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
11160
11161 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
11162 {
11163         return atomic_read(&kvm->arch.noncoherent_dma_count);
11164 }
11165 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
11166
11167 bool kvm_arch_has_irq_bypass(void)
11168 {
11169         return true;
11170 }
11171
11172 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
11173                                       struct irq_bypass_producer *prod)
11174 {
11175         struct kvm_kernel_irqfd *irqfd =
11176                 container_of(cons, struct kvm_kernel_irqfd, consumer);
11177         int ret;
11178
11179         irqfd->producer = prod;
11180         kvm_arch_start_assignment(irqfd->kvm);
11181         ret = kvm_x86_ops.update_pi_irte(irqfd->kvm,
11182                                          prod->irq, irqfd->gsi, 1);
11183
11184         if (ret)
11185                 kvm_arch_end_assignment(irqfd->kvm);
11186
11187         return ret;
11188 }
11189
11190 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
11191                                       struct irq_bypass_producer *prod)
11192 {
11193         int ret;
11194         struct kvm_kernel_irqfd *irqfd =
11195                 container_of(cons, struct kvm_kernel_irqfd, consumer);
11196
11197         WARN_ON(irqfd->producer != prod);
11198         irqfd->producer = NULL;
11199
11200         /*
11201          * When producer of consumer is unregistered, we change back to
11202          * remapped mode, so we can re-use the current implementation
11203          * when the irq is masked/disabled or the consumer side (KVM
11204          * int this case doesn't want to receive the interrupts.
11205         */
11206         ret = kvm_x86_ops.update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
11207         if (ret)
11208                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
11209                        " fails: %d\n", irqfd->consumer.token, ret);
11210
11211         kvm_arch_end_assignment(irqfd->kvm);
11212 }
11213
11214 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
11215                                    uint32_t guest_irq, bool set)
11216 {
11217         return kvm_x86_ops.update_pi_irte(kvm, host_irq, guest_irq, set);
11218 }
11219
11220 bool kvm_vector_hashing_enabled(void)
11221 {
11222         return vector_hashing;
11223 }
11224
11225 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
11226 {
11227         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
11228 }
11229 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
11230
11231
11232 int kvm_spec_ctrl_test_value(u64 value)
11233 {
11234         /*
11235          * test that setting IA32_SPEC_CTRL to given value
11236          * is allowed by the host processor
11237          */
11238
11239         u64 saved_value;
11240         unsigned long flags;
11241         int ret = 0;
11242
11243         local_irq_save(flags);
11244
11245         if (rdmsrl_safe(MSR_IA32_SPEC_CTRL, &saved_value))
11246                 ret = 1;
11247         else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value))
11248                 ret = 1;
11249         else
11250                 wrmsrl(MSR_IA32_SPEC_CTRL, saved_value);
11251
11252         local_irq_restore(flags);
11253
11254         return ret;
11255 }
11256 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value);
11257
11258 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code)
11259 {
11260         struct x86_exception fault;
11261         u32 access = error_code &
11262                 (PFERR_WRITE_MASK | PFERR_FETCH_MASK | PFERR_USER_MASK);
11263
11264         if (!(error_code & PFERR_PRESENT_MASK) ||
11265             vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, &fault) != UNMAPPED_GVA) {
11266                 /*
11267                  * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
11268                  * tables probably do not match the TLB.  Just proceed
11269                  * with the error code that the processor gave.
11270                  */
11271                 fault.vector = PF_VECTOR;
11272                 fault.error_code_valid = true;
11273                 fault.error_code = error_code;
11274                 fault.nested_page_fault = false;
11275                 fault.address = gva;
11276         }
11277         vcpu->arch.walk_mmu->inject_page_fault(vcpu, &fault);
11278 }
11279 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error);
11280
11281 /*
11282  * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
11283  * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
11284  * indicates whether exit to userspace is needed.
11285  */
11286 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
11287                               struct x86_exception *e)
11288 {
11289         if (r == X86EMUL_PROPAGATE_FAULT) {
11290                 kvm_inject_emulated_page_fault(vcpu, e);
11291                 return 1;
11292         }
11293
11294         /*
11295          * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
11296          * while handling a VMX instruction KVM could've handled the request
11297          * correctly by exiting to userspace and performing I/O but there
11298          * doesn't seem to be a real use-case behind such requests, just return
11299          * KVM_EXIT_INTERNAL_ERROR for now.
11300          */
11301         vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
11302         vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
11303         vcpu->run->internal.ndata = 0;
11304
11305         return 0;
11306 }
11307 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure);
11308
11309 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva)
11310 {
11311         bool pcid_enabled;
11312         struct x86_exception e;
11313         unsigned i;
11314         unsigned long roots_to_free = 0;
11315         struct {
11316                 u64 pcid;
11317                 u64 gla;
11318         } operand;
11319         int r;
11320
11321         r = kvm_read_guest_virt(vcpu, gva, &operand, sizeof(operand), &e);
11322         if (r != X86EMUL_CONTINUE)
11323                 return kvm_handle_memory_failure(vcpu, r, &e);
11324
11325         if (operand.pcid >> 12 != 0) {
11326                 kvm_inject_gp(vcpu, 0);
11327                 return 1;
11328         }
11329
11330         pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
11331
11332         switch (type) {
11333         case INVPCID_TYPE_INDIV_ADDR:
11334                 if ((!pcid_enabled && (operand.pcid != 0)) ||
11335                     is_noncanonical_address(operand.gla, vcpu)) {
11336                         kvm_inject_gp(vcpu, 0);
11337                         return 1;
11338                 }
11339                 kvm_mmu_invpcid_gva(vcpu, operand.gla, operand.pcid);
11340                 return kvm_skip_emulated_instruction(vcpu);
11341
11342         case INVPCID_TYPE_SINGLE_CTXT:
11343                 if (!pcid_enabled && (operand.pcid != 0)) {
11344                         kvm_inject_gp(vcpu, 0);
11345                         return 1;
11346                 }
11347
11348                 if (kvm_get_active_pcid(vcpu) == operand.pcid) {
11349                         kvm_mmu_sync_roots(vcpu);
11350                         kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
11351                 }
11352
11353                 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
11354                         if (kvm_get_pcid(vcpu, vcpu->arch.mmu->prev_roots[i].pgd)
11355                             == operand.pcid)
11356                                 roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
11357
11358                 kvm_mmu_free_roots(vcpu, vcpu->arch.mmu, roots_to_free);
11359                 /*
11360                  * If neither the current cr3 nor any of the prev_roots use the
11361                  * given PCID, then nothing needs to be done here because a
11362                  * resync will happen anyway before switching to any other CR3.
11363                  */
11364
11365                 return kvm_skip_emulated_instruction(vcpu);
11366
11367         case INVPCID_TYPE_ALL_NON_GLOBAL:
11368                 /*
11369                  * Currently, KVM doesn't mark global entries in the shadow
11370                  * page tables, so a non-global flush just degenerates to a
11371                  * global flush. If needed, we could optimize this later by
11372                  * keeping track of global entries in shadow page tables.
11373                  */
11374
11375                 fallthrough;
11376         case INVPCID_TYPE_ALL_INCL_GLOBAL:
11377                 kvm_mmu_unload(vcpu);
11378                 return kvm_skip_emulated_instruction(vcpu);
11379
11380         default:
11381                 BUG(); /* We have already checked above that type <= 3 */
11382         }
11383 }
11384 EXPORT_SYMBOL_GPL(kvm_handle_invpcid);
11385
11386 static int complete_sev_es_emulated_mmio(struct kvm_vcpu *vcpu)
11387 {
11388         struct kvm_run *run = vcpu->run;
11389         struct kvm_mmio_fragment *frag;
11390         unsigned int len;
11391
11392         BUG_ON(!vcpu->mmio_needed);
11393
11394         /* Complete previous fragment */
11395         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
11396         len = min(8u, frag->len);
11397         if (!vcpu->mmio_is_write)
11398                 memcpy(frag->data, run->mmio.data, len);
11399
11400         if (frag->len <= 8) {
11401                 /* Switch to the next fragment. */
11402                 frag++;
11403                 vcpu->mmio_cur_fragment++;
11404         } else {
11405                 /* Go forward to the next mmio piece. */
11406                 frag->data += len;
11407                 frag->gpa += len;
11408                 frag->len -= len;
11409         }
11410
11411         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
11412                 vcpu->mmio_needed = 0;
11413
11414                 // VMG change, at this point, we're always done
11415                 // RIP has already been advanced
11416                 return 1;
11417         }
11418
11419         // More MMIO is needed
11420         run->mmio.phys_addr = frag->gpa;
11421         run->mmio.len = min(8u, frag->len);
11422         run->mmio.is_write = vcpu->mmio_is_write;
11423         if (run->mmio.is_write)
11424                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
11425         run->exit_reason = KVM_EXIT_MMIO;
11426
11427         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
11428
11429         return 0;
11430 }
11431
11432 int kvm_sev_es_mmio_write(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
11433                           void *data)
11434 {
11435         int handled;
11436         struct kvm_mmio_fragment *frag;
11437
11438         if (!data)
11439                 return -EINVAL;
11440
11441         handled = write_emultor.read_write_mmio(vcpu, gpa, bytes, data);
11442         if (handled == bytes)
11443                 return 1;
11444
11445         bytes -= handled;
11446         gpa += handled;
11447         data += handled;
11448
11449         /*TODO: Check if need to increment number of frags */
11450         frag = vcpu->mmio_fragments;
11451         vcpu->mmio_nr_fragments = 1;
11452         frag->len = bytes;
11453         frag->gpa = gpa;
11454         frag->data = data;
11455
11456         vcpu->mmio_needed = 1;
11457         vcpu->mmio_cur_fragment = 0;
11458
11459         vcpu->run->mmio.phys_addr = gpa;
11460         vcpu->run->mmio.len = min(8u, frag->len);
11461         vcpu->run->mmio.is_write = 1;
11462         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
11463         vcpu->run->exit_reason = KVM_EXIT_MMIO;
11464
11465         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
11466
11467         return 0;
11468 }
11469 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write);
11470
11471 int kvm_sev_es_mmio_read(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
11472                          void *data)
11473 {
11474         int handled;
11475         struct kvm_mmio_fragment *frag;
11476
11477         if (!data)
11478                 return -EINVAL;
11479
11480         handled = read_emultor.read_write_mmio(vcpu, gpa, bytes, data);
11481         if (handled == bytes)
11482                 return 1;
11483
11484         bytes -= handled;
11485         gpa += handled;
11486         data += handled;
11487
11488         /*TODO: Check if need to increment number of frags */
11489         frag = vcpu->mmio_fragments;
11490         vcpu->mmio_nr_fragments = 1;
11491         frag->len = bytes;
11492         frag->gpa = gpa;
11493         frag->data = data;
11494
11495         vcpu->mmio_needed = 1;
11496         vcpu->mmio_cur_fragment = 0;
11497
11498         vcpu->run->mmio.phys_addr = gpa;
11499         vcpu->run->mmio.len = min(8u, frag->len);
11500         vcpu->run->mmio.is_write = 0;
11501         vcpu->run->exit_reason = KVM_EXIT_MMIO;
11502
11503         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
11504
11505         return 0;
11506 }
11507 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read);
11508
11509 static int complete_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
11510 {
11511         memcpy(vcpu->arch.guest_ins_data, vcpu->arch.pio_data,
11512                vcpu->arch.pio.count * vcpu->arch.pio.size);
11513         vcpu->arch.pio.count = 0;
11514
11515         return 1;
11516 }
11517
11518 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
11519                            unsigned int port, void *data,  unsigned int count)
11520 {
11521         int ret;
11522
11523         ret = emulator_pio_out_emulated(vcpu->arch.emulate_ctxt, size, port,
11524                                         data, count);
11525         if (ret)
11526                 return ret;
11527
11528         vcpu->arch.pio.count = 0;
11529
11530         return 0;
11531 }
11532
11533 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
11534                           unsigned int port, void *data, unsigned int count)
11535 {
11536         int ret;
11537
11538         ret = emulator_pio_in_emulated(vcpu->arch.emulate_ctxt, size, port,
11539                                        data, count);
11540         if (ret) {
11541                 vcpu->arch.pio.count = 0;
11542         } else {
11543                 vcpu->arch.guest_ins_data = data;
11544                 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_ins;
11545         }
11546
11547         return 0;
11548 }
11549
11550 int kvm_sev_es_string_io(struct kvm_vcpu *vcpu, unsigned int size,
11551                          unsigned int port, void *data,  unsigned int count,
11552                          int in)
11553 {
11554         return in ? kvm_sev_es_ins(vcpu, size, port, data, count)
11555                   : kvm_sev_es_outs(vcpu, size, port, data, count);
11556 }
11557 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io);
11558
11559 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
11560 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
11561 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
11562 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
11563 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
11564 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
11565 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
11566 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
11567 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
11568 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
11569 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
11570 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
11571 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
11572 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
11573 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
11574 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
11575 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
11576 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
11577 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
11578 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
11579 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log);
11580 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request);
11581 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter);
11582 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit);
11583 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter);
11584 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit);