arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *   Yaniv Kamay  <yaniv@qumranet.com>
  15  *   Amit Shah    <amit.shah@qumranet.com>
  16  *   Ben-Ami Yassour <benami@il.ibm.com>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "ioapic.h"
  22 #include "mmu.h"
  23 #include "i8254.h"
  24 #include "tss.h"
  25 #include "kvm_cache_regs.h"
  26 #include "kvm_emulate.h"
  27 #include "x86.h"
  28 #include "cpuid.h"
  29 #include "pmu.h"
  30 #include "hyperv.h"
  31 #include "lapic.h"
  32 #include "xen.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/export.h>
  40 #include <linux/moduleparam.h>
  41 #include <linux/mman.h>
  42 #include <linux/highmem.h>
  43 #include <linux/iommu.h>
  44 #include <linux/intel-iommu.h>
  45 #include <linux/cpufreq.h>
  46 #include <linux/user-return-notifier.h>
  47 #include <linux/srcu.h>
  48 #include <linux/slab.h>
  49 #include <linux/perf_event.h>
  50 #include <linux/uaccess.h>
  51 #include <linux/hash.h>
  52 #include <linux/pci.h>
  53 #include <linux/timekeeper_internal.h>
  54 #include <linux/pvclock_gtod.h>
  55 #include <linux/kvm_irqfd.h>
  56 #include <linux/irqbypass.h>
  57 #include <linux/sched/stat.h>
  58 #include <linux/sched/isolation.h>
  59 #include <linux/mem_encrypt.h>
  60 #include <linux/entry-kvm.h>
  61 #include <linux/suspend.h>
  62
  63 #include <trace/events/kvm.h>
  64
  65 #include <asm/debugreg.h>
  66 #include <asm/msr.h>
  67 #include <asm/desc.h>
  68 #include <asm/mce.h>
  69 #include <asm/pkru.h>
  70 #include <linux/kernel_stat.h>
  71 #include <asm/fpu/api.h>
  72 #include <asm/fpu/xcr.h>
  73 #include <asm/fpu/xstate.h>
  74 #include <asm/pvclock.h>
  75 #include <asm/div64.h>
  76 #include <asm/irq_remapping.h>
  77 #include <asm/mshyperv.h>
  78 #include <asm/hypervisor.h>
  79 #include <asm/tlbflush.h>
  80 #include <asm/intel_pt.h>
  81 #include <asm/emulate_prefix.h>
  82 #include <asm/sgx.h>
  83 #include <clocksource/hyperv_timer.h>
  84
  85 #define CREATE_TRACE_POINTS
  86 #include "trace.h"
  87
  88 #define MAX_IO_MSRS 256
  89 #define KVM_MAX_MCE_BANKS 32
  90 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  91 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  92
  93 #define  ERR_PTR_USR(e)  ((void __user *)ERR_PTR(e))
  94
  95 #define emul_to_vcpu(ctxt) \
  96         ((struct kvm_vcpu *)(ctxt)->vcpu)
  97
  98 /* EFER defaults:
  99  * - enable syscall per default because its emulated by KVM
 100  * - enable LME and LMA per default on 64 bit KVM
 101  */
 102 #ifdef CONFIG_X86_64
 103 static
 104 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
 105 #else
 106 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
 107 #endif
 108
 109 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
 110
 111 #define KVM_EXIT_HYPERCALL_VALID_MASK (1 << KVM_HC_MAP_GPA_RANGE)
 112
 113 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
 114                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 115
 116 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 117 static void process_nmi(struct kvm_vcpu *vcpu);
 118 static void process_smi(struct kvm_vcpu *vcpu);
 119 static void enter_smm(struct kvm_vcpu *vcpu);
 120 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 121 static void store_regs(struct kvm_vcpu *vcpu);
 122 static int sync_regs(struct kvm_vcpu *vcpu);
 123 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu);
 124
 125 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
 126 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
 127
 128 struct kvm_x86_ops kvm_x86_ops __read_mostly;
 129
 130 #define KVM_X86_OP(func)                                             \
 131         DEFINE_STATIC_CALL_NULL(kvm_x86_##func,                      \
 132                                 *(((struct kvm_x86_ops *)0)->func));
 133 #define KVM_X86_OP_NULL KVM_X86_OP
 134 #include <asm/kvm-x86-ops.h>
 135 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits);
 136 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg);
 137
 138 static bool __read_mostly ignore_msrs = 0;
 139 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 140
 141 bool __read_mostly report_ignored_msrs = true;
 142 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 143 EXPORT_SYMBOL_GPL(report_ignored_msrs);
 144
 145 unsigned int min_timer_period_us = 200;
 146 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 147
 148 static bool __read_mostly kvmclock_periodic_sync = true;
 149 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 150
 151 bool __read_mostly kvm_has_tsc_control;
 152 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 153 u32  __read_mostly kvm_max_guest_tsc_khz;
 154 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 155 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 156 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 157 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 158 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 159 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 160 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 161 bool __read_mostly kvm_has_bus_lock_exit;
 162 EXPORT_SYMBOL_GPL(kvm_has_bus_lock_exit);
 163
 164 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 165 static u32 __read_mostly tsc_tolerance_ppm = 250;
 166 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 167
 168 /*
 169  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 170  * adaptive tuning starting from default advancement of 1000ns.  '0' disables
 171  * advancement entirely.  Any other value is used as-is and disables adaptive
 172  * tuning, i.e. allows privileged userspace to set an exact advancement time.
 173  */
 174 static int __read_mostly lapic_timer_advance_ns = -1;
 175 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 176
 177 static bool __read_mostly vector_hashing = true;
 178 module_param(vector_hashing, bool, S_IRUGO);
 179
 180 bool __read_mostly enable_vmware_backdoor = false;
 181 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 182 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 183
 184 static bool __read_mostly force_emulation_prefix = false;
 185 module_param(force_emulation_prefix, bool, S_IRUGO);
 186
 187 int __read_mostly pi_inject_timer = -1;
 188 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
 189
 190 /* Enable/disable PMU virtualization */
 191 bool __read_mostly enable_pmu = true;
 192 EXPORT_SYMBOL_GPL(enable_pmu);
 193 module_param(enable_pmu, bool, 0444);
 194
 195 bool __read_mostly eager_page_split = true;
 196 module_param(eager_page_split, bool, 0644);
 197
 198 /*
 199  * Restoring the host value for MSRs that are only consumed when running in
 200  * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
 201  * returns to userspace, i.e. the kernel can run with the guest's value.
 202  */
 203 #define KVM_MAX_NR_USER_RETURN_MSRS 16
 204
 205 struct kvm_user_return_msrs {
 206         struct user_return_notifier urn;
 207         bool registered;
 208         struct kvm_user_return_msr_values {
 209                 u64 host;
 210                 u64 curr;
 211         } values[KVM_MAX_NR_USER_RETURN_MSRS];
 212 };
 213
 214 u32 __read_mostly kvm_nr_uret_msrs;
 215 EXPORT_SYMBOL_GPL(kvm_nr_uret_msrs);
 216 static u32 __read_mostly kvm_uret_msrs_list[KVM_MAX_NR_USER_RETURN_MSRS];
 217 static struct kvm_user_return_msrs __percpu *user_return_msrs;
 218
 219 #define KVM_SUPPORTED_XCR0     (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
 220                                 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
 221                                 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
 222                                 | XFEATURE_MASK_PKRU | XFEATURE_MASK_XTILE)
 223
 224 u64 __read_mostly host_efer;
 225 EXPORT_SYMBOL_GPL(host_efer);
 226
 227 bool __read_mostly allow_smaller_maxphyaddr = 0;
 228 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr);
 229
 230 bool __read_mostly enable_apicv = true;
 231 EXPORT_SYMBOL_GPL(enable_apicv);
 232
 233 u64 __read_mostly host_xss;
 234 EXPORT_SYMBOL_GPL(host_xss);
 235 u64 __read_mostly supported_xss;
 236 EXPORT_SYMBOL_GPL(supported_xss);
 237
 238 const struct _kvm_stats_desc kvm_vm_stats_desc[] = {
 239         KVM_GENERIC_VM_STATS(),
 240         STATS_DESC_COUNTER(VM, mmu_shadow_zapped),
 241         STATS_DESC_COUNTER(VM, mmu_pte_write),
 242         STATS_DESC_COUNTER(VM, mmu_pde_zapped),
 243         STATS_DESC_COUNTER(VM, mmu_flooded),
 244         STATS_DESC_COUNTER(VM, mmu_recycled),
 245         STATS_DESC_COUNTER(VM, mmu_cache_miss),
 246         STATS_DESC_ICOUNTER(VM, mmu_unsync),
 247         STATS_DESC_ICOUNTER(VM, pages_4k),
 248         STATS_DESC_ICOUNTER(VM, pages_2m),
 249         STATS_DESC_ICOUNTER(VM, pages_1g),
 250         STATS_DESC_ICOUNTER(VM, nx_lpage_splits),
 251         STATS_DESC_PCOUNTER(VM, max_mmu_rmap_size),
 252         STATS_DESC_PCOUNTER(VM, max_mmu_page_hash_collisions)
 253 };
 254
 255 const struct kvm_stats_header kvm_vm_stats_header = {
 256         .name_size = KVM_STATS_NAME_SIZE,
 257         .num_desc = ARRAY_SIZE(kvm_vm_stats_desc),
 258         .id_offset = sizeof(struct kvm_stats_header),
 259         .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
 260         .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
 261                        sizeof(kvm_vm_stats_desc),
 262 };
 263
 264 const struct _kvm_stats_desc kvm_vcpu_stats_desc[] = {
 265         KVM_GENERIC_VCPU_STATS(),
 266         STATS_DESC_COUNTER(VCPU, pf_fixed),
 267         STATS_DESC_COUNTER(VCPU, pf_guest),
 268         STATS_DESC_COUNTER(VCPU, tlb_flush),
 269         STATS_DESC_COUNTER(VCPU, invlpg),
 270         STATS_DESC_COUNTER(VCPU, exits),
 271         STATS_DESC_COUNTER(VCPU, io_exits),
 272         STATS_DESC_COUNTER(VCPU, mmio_exits),
 273         STATS_DESC_COUNTER(VCPU, signal_exits),
 274         STATS_DESC_COUNTER(VCPU, irq_window_exits),
 275         STATS_DESC_COUNTER(VCPU, nmi_window_exits),
 276         STATS_DESC_COUNTER(VCPU, l1d_flush),
 277         STATS_DESC_COUNTER(VCPU, halt_exits),
 278         STATS_DESC_COUNTER(VCPU, request_irq_exits),
 279         STATS_DESC_COUNTER(VCPU, irq_exits),
 280         STATS_DESC_COUNTER(VCPU, host_state_reload),
 281         STATS_DESC_COUNTER(VCPU, fpu_reload),
 282         STATS_DESC_COUNTER(VCPU, insn_emulation),
 283         STATS_DESC_COUNTER(VCPU, insn_emulation_fail),
 284         STATS_DESC_COUNTER(VCPU, hypercalls),
 285         STATS_DESC_COUNTER(VCPU, irq_injections),
 286         STATS_DESC_COUNTER(VCPU, nmi_injections),
 287         STATS_DESC_COUNTER(VCPU, req_event),
 288         STATS_DESC_COUNTER(VCPU, nested_run),
 289         STATS_DESC_COUNTER(VCPU, directed_yield_attempted),
 290         STATS_DESC_COUNTER(VCPU, directed_yield_successful),
 291         STATS_DESC_ICOUNTER(VCPU, guest_mode)
 292 };
 293
 294 const struct kvm_stats_header kvm_vcpu_stats_header = {
 295         .name_size = KVM_STATS_NAME_SIZE,
 296         .num_desc = ARRAY_SIZE(kvm_vcpu_stats_desc),
 297         .id_offset = sizeof(struct kvm_stats_header),
 298         .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
 299         .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
 300                        sizeof(kvm_vcpu_stats_desc),
 301 };
 302
 303 u64 __read_mostly host_xcr0;
 304 u64 __read_mostly supported_xcr0;
 305 EXPORT_SYMBOL_GPL(supported_xcr0);
 306
 307 static struct kmem_cache *x86_emulator_cache;
 308
 309 /*
 310  * When called, it means the previous get/set msr reached an invalid msr.
 311  * Return true if we want to ignore/silent this failed msr access.
 312  */
 313 static bool kvm_msr_ignored_check(u32 msr, u64 data, bool write)
 314 {
 315         const char *op = write ? "wrmsr" : "rdmsr";
 316
 317         if (ignore_msrs) {
 318                 if (report_ignored_msrs)
 319                         kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
 320                                       op, msr, data);
 321                 /* Mask the error */
 322                 return true;
 323         } else {
 324                 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
 325                                       op, msr, data);
 326                 return false;
 327         }
 328 }
 329
 330 static struct kmem_cache *kvm_alloc_emulator_cache(void)
 331 {
 332         unsigned int useroffset = offsetof(struct x86_emulate_ctxt, src);
 333         unsigned int size = sizeof(struct x86_emulate_ctxt);
 334
 335         return kmem_cache_create_usercopy("x86_emulator", size,
 336                                           __alignof__(struct x86_emulate_ctxt),
 337                                           SLAB_ACCOUNT, useroffset,
 338                                           size - useroffset, NULL);
 339 }
 340
 341 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 342
 343 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 344 {
 345         int i;
 346         for (i = 0; i < ASYNC_PF_PER_VCPU; i++)
 347                 vcpu->arch.apf.gfns[i] = ~0;
 348 }
 349
 350 static void kvm_on_user_return(struct user_return_notifier *urn)
 351 {
 352         unsigned slot;
 353         struct kvm_user_return_msrs *msrs
 354                 = container_of(urn, struct kvm_user_return_msrs, urn);
 355         struct kvm_user_return_msr_values *values;
 356         unsigned long flags;
 357
 358         /*
 359          * Disabling irqs at this point since the following code could be
 360          * interrupted and executed through kvm_arch_hardware_disable()
 361          */
 362         local_irq_save(flags);
 363         if (msrs->registered) {
 364                 msrs->registered = false;
 365                 user_return_notifier_unregister(urn);
 366         }
 367         local_irq_restore(flags);
 368         for (slot = 0; slot < kvm_nr_uret_msrs; ++slot) {
 369                 values = &msrs->values[slot];
 370                 if (values->host != values->curr) {
 371                         wrmsrl(kvm_uret_msrs_list[slot], values->host);
 372                         values->curr = values->host;
 373                 }
 374         }
 375 }
 376
 377 static int kvm_probe_user_return_msr(u32 msr)
 378 {
 379         u64 val;
 380         int ret;
 381
 382         preempt_disable();
 383         ret = rdmsrl_safe(msr, &val);
 384         if (ret)
 385                 goto out;
 386         ret = wrmsrl_safe(msr, val);
 387 out:
 388         preempt_enable();
 389         return ret;
 390 }
 391
 392 int kvm_add_user_return_msr(u32 msr)
 393 {
 394         BUG_ON(kvm_nr_uret_msrs >= KVM_MAX_NR_USER_RETURN_MSRS);
 395
 396         if (kvm_probe_user_return_msr(msr))
 397                 return -1;
 398
 399         kvm_uret_msrs_list[kvm_nr_uret_msrs] = msr;
 400         return kvm_nr_uret_msrs++;
 401 }
 402 EXPORT_SYMBOL_GPL(kvm_add_user_return_msr);
 403
 404 int kvm_find_user_return_msr(u32 msr)
 405 {
 406         int i;
 407
 408         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 409                 if (kvm_uret_msrs_list[i] == msr)
 410                         return i;
 411         }
 412         return -1;
 413 }
 414 EXPORT_SYMBOL_GPL(kvm_find_user_return_msr);
 415
 416 static void kvm_user_return_msr_cpu_online(void)
 417 {
 418         unsigned int cpu = smp_processor_id();
 419         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 420         u64 value;
 421         int i;
 422
 423         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 424                 rdmsrl_safe(kvm_uret_msrs_list[i], &value);
 425                 msrs->values[i].host = value;
 426                 msrs->values[i].curr = value;
 427         }
 428 }
 429
 430 int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)
 431 {
 432         unsigned int cpu = smp_processor_id();
 433         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 434         int err;
 435
 436         value = (value & mask) | (msrs->values[slot].host & ~mask);
 437         if (value == msrs->values[slot].curr)
 438                 return 0;
 439         err = wrmsrl_safe(kvm_uret_msrs_list[slot], value);
 440         if (err)
 441                 return 1;
 442
 443         msrs->values[slot].curr = value;
 444         if (!msrs->registered) {
 445                 msrs->urn.on_user_return = kvm_on_user_return;
 446                 user_return_notifier_register(&msrs->urn);
 447                 msrs->registered = true;
 448         }
 449         return 0;
 450 }
 451 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr);
 452
 453 static void drop_user_return_notifiers(void)
 454 {
 455         unsigned int cpu = smp_processor_id();
 456         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 457
 458         if (msrs->registered)
 459                 kvm_on_user_return(&msrs->urn);
 460 }
 461
 462 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 463 {
 464         return vcpu->arch.apic_base;
 465 }
 466 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 467
 468 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 469 {
 470         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 471 }
 472 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 473
 474 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 475 {
 476         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 477         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 478         u64 reserved_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu) | 0x2ff |
 479                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 480
 481         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 482                 return 1;
 483         if (!msr_info->host_initiated) {
 484                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 485                         return 1;
 486                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 487                         return 1;
 488         }
 489
 490         kvm_lapic_set_base(vcpu, msr_info->data);
 491         kvm_recalculate_apic_map(vcpu->kvm);
 492         return 0;
 493 }
 494 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 495
 496 /*
 497  * Handle a fault on a hardware virtualization (VMX or SVM) instruction.
 498  *
 499  * Hardware virtualization extension instructions may fault if a reboot turns
 500  * off virtualization while processes are running.  Usually after catching the
 501  * fault we just panic; during reboot instead the instruction is ignored.
 502  */
 503 noinstr void kvm_spurious_fault(void)
 504 {
 505         /* Fault while not rebooting.  We want the trace. */
 506         BUG_ON(!kvm_rebooting);
 507 }
 508 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 509
 510 #define EXCPT_BENIGN            0
 511 #define EXCPT_CONTRIBUTORY      1
 512 #define EXCPT_PF                2
 513
 514 static int exception_class(int vector)
 515 {
 516         switch (vector) {
 517         case PF_VECTOR:
 518                 return EXCPT_PF;
 519         case DE_VECTOR:
 520         case TS_VECTOR:
 521         case NP_VECTOR:
 522         case SS_VECTOR:
 523         case GP_VECTOR:
 524                 return EXCPT_CONTRIBUTORY;
 525         default:
 526                 break;
 527         }
 528         return EXCPT_BENIGN;
 529 }
 530
 531 #define EXCPT_FAULT             0
 532 #define EXCPT_TRAP              1
 533 #define EXCPT_ABORT             2
 534 #define EXCPT_INTERRUPT         3
 535
 536 static int exception_type(int vector)
 537 {
 538         unsigned int mask;
 539
 540         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 541                 return EXCPT_INTERRUPT;
 542
 543         mask = 1 << vector;
 544
 545         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 546         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 547                 return EXCPT_TRAP;
 548
 549         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 550                 return EXCPT_ABORT;
 551
 552         /* Reserved exceptions will result in fault */
 553         return EXCPT_FAULT;
 554 }
 555
 556 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 557 {
 558         unsigned nr = vcpu->arch.exception.nr;
 559         bool has_payload = vcpu->arch.exception.has_payload;
 560         unsigned long payload = vcpu->arch.exception.payload;
 561
 562         if (!has_payload)
 563                 return;
 564
 565         switch (nr) {
 566         case DB_VECTOR:
 567                 /*
 568                  * "Certain debug exceptions may clear bit 0-3.  The
 569                  * remaining contents of the DR6 register are never
 570                  * cleared by the processor".
 571                  */
 572                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 573                 /*
 574                  * In order to reflect the #DB exception payload in guest
 575                  * dr6, three components need to be considered: active low
 576                  * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
 577                  * DR6_BS and DR6_BT)
 578                  * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
 579                  * In the target guest dr6:
 580                  * FIXED_1 bits should always be set.
 581                  * Active low bits should be cleared if 1-setting in payload.
 582                  * Active high bits should be set if 1-setting in payload.
 583                  *
 584                  * Note, the payload is compatible with the pending debug
 585                  * exceptions/exit qualification under VMX, that active_low bits
 586                  * are active high in payload.
 587                  * So they need to be flipped for DR6.
 588                  */
 589                 vcpu->arch.dr6 |= DR6_ACTIVE_LOW;
 590                 vcpu->arch.dr6 |= payload;
 591                 vcpu->arch.dr6 ^= payload & DR6_ACTIVE_LOW;
 592
 593                 /*
 594                  * The #DB payload is defined as compatible with the 'pending
 595                  * debug exceptions' field under VMX, not DR6. While bit 12 is
 596                  * defined in the 'pending debug exceptions' field (enabled
 597                  * breakpoint), it is reserved and must be zero in DR6.
 598                  */
 599                 vcpu->arch.dr6 &= ~BIT(12);
 600                 break;
 601         case PF_VECTOR:
 602                 vcpu->arch.cr2 = payload;
 603                 break;
 604         }
 605
 606         vcpu->arch.exception.has_payload = false;
 607         vcpu->arch.exception.payload = 0;
 608 }
 609 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 610
 611 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 612                 unsigned nr, bool has_error, u32 error_code,
 613                 bool has_payload, unsigned long payload, bool reinject)
 614 {
 615         u32 prev_nr;
 616         int class1, class2;
 617
 618         kvm_make_request(KVM_REQ_EVENT, vcpu);
 619
 620         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 621         queue:
 622                 if (reinject) {
 623                         /*
 624                          * On vmentry, vcpu->arch.exception.pending is only
 625                          * true if an event injection was blocked by
 626                          * nested_run_pending.  In that case, however,
 627                          * vcpu_enter_guest requests an immediate exit,
 628                          * and the guest shouldn't proceed far enough to
 629                          * need reinjection.
 630                          */
 631                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 632                         vcpu->arch.exception.injected = true;
 633                         if (WARN_ON_ONCE(has_payload)) {
 634                                 /*
 635                                  * A reinjected event has already
 636                                  * delivered its payload.
 637                                  */
 638                                 has_payload = false;
 639                                 payload = 0;
 640                         }
 641                 } else {
 642                         vcpu->arch.exception.pending = true;
 643                         vcpu->arch.exception.injected = false;
 644                 }
 645                 vcpu->arch.exception.has_error_code = has_error;
 646                 vcpu->arch.exception.nr = nr;
 647                 vcpu->arch.exception.error_code = error_code;
 648                 vcpu->arch.exception.has_payload = has_payload;
 649                 vcpu->arch.exception.payload = payload;
 650                 if (!is_guest_mode(vcpu))
 651                         kvm_deliver_exception_payload(vcpu);
 652                 return;
 653         }
 654
 655         /* to check exception */
 656         prev_nr = vcpu->arch.exception.nr;
 657         if (prev_nr == DF_VECTOR) {
 658                 /* triple fault -> shutdown */
 659                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 660                 return;
 661         }
 662         class1 = exception_class(prev_nr);
 663         class2 = exception_class(nr);
 664         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 665                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 666                 /*
 667                  * Generate double fault per SDM Table 5-5.  Set
 668                  * exception.pending = true so that the double fault
 669                  * can trigger a nested vmexit.
 670                  */
 671                 vcpu->arch.exception.pending = true;
 672                 vcpu->arch.exception.injected = false;
 673                 vcpu->arch.exception.has_error_code = true;
 674                 vcpu->arch.exception.nr = DF_VECTOR;
 675                 vcpu->arch.exception.error_code = 0;
 676                 vcpu->arch.exception.has_payload = false;
 677                 vcpu->arch.exception.payload = 0;
 678         } else
 679                 /* replace previous exception with a new one in a hope
 680                    that instruction re-execution will regenerate lost
 681                    exception */
 682                 goto queue;
 683 }
 684
 685 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 686 {
 687         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 688 }
 689 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 690
 691 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 692 {
 693         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 694 }
 695 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 696
 697 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 698                            unsigned long payload)
 699 {
 700         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 701 }
 702 EXPORT_SYMBOL_GPL(kvm_queue_exception_p);
 703
 704 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 705                                     u32 error_code, unsigned long payload)
 706 {
 707         kvm_multiple_exception(vcpu, nr, true, error_code,
 708                                true, payload, false);
 709 }
 710
 711 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 712 {
 713         if (err)
 714                 kvm_inject_gp(vcpu, 0);
 715         else
 716                 return kvm_skip_emulated_instruction(vcpu);
 717
 718         return 1;
 719 }
 720 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 721
 722 static int complete_emulated_insn_gp(struct kvm_vcpu *vcpu, int err)
 723 {
 724         if (err) {
 725                 kvm_inject_gp(vcpu, 0);
 726                 return 1;
 727         }
 728
 729         return kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE | EMULTYPE_SKIP |
 730                                        EMULTYPE_COMPLETE_USER_EXIT);
 731 }
 732
 733 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 734 {
 735         ++vcpu->stat.pf_guest;
 736         vcpu->arch.exception.nested_apf =
 737                 is_guest_mode(vcpu) && fault->async_page_fault;
 738         if (vcpu->arch.exception.nested_apf) {
 739                 vcpu->arch.apf.nested_apf_token = fault->address;
 740                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 741         } else {
 742                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 743                                         fault->address);
 744         }
 745 }
 746 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 747
 748 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
 749                                     struct x86_exception *fault)
 750 {
 751         struct kvm_mmu *fault_mmu;
 752         WARN_ON_ONCE(fault->vector != PF_VECTOR);
 753
 754         fault_mmu = fault->nested_page_fault ? vcpu->arch.mmu :
 755                                                vcpu->arch.walk_mmu;
 756
 757         /*
 758          * Invalidate the TLB entry for the faulting address, if it exists,
 759          * else the access will fault indefinitely (and to emulate hardware).
 760          */
 761         if ((fault->error_code & PFERR_PRESENT_MASK) &&
 762             !(fault->error_code & PFERR_RSVD_MASK))
 763                 kvm_mmu_invalidate_gva(vcpu, fault_mmu, fault->address,
 764                                        fault_mmu->root_hpa);
 765
 766         fault_mmu->inject_page_fault(vcpu, fault);
 767         return fault->nested_page_fault;
 768 }
 769 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault);
 770
 771 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 772 {
 773         atomic_inc(&vcpu->arch.nmi_queued);
 774         kvm_make_request(KVM_REQ_NMI, vcpu);
 775 }
 776 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 777
 778 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 779 {
 780         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 781 }
 782 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 783
 784 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 785 {
 786         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 787 }
 788 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 789
 790 /*
 791  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 792  * a #GP and return false.
 793  */
 794 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 795 {
 796         if (static_call(kvm_x86_get_cpl)(vcpu) <= required_cpl)
 797                 return true;
 798         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 799         return false;
 800 }
 801 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 802
 803 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 804 {
 805         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 806                 return true;
 807
 808         kvm_queue_exception(vcpu, UD_VECTOR);
 809         return false;
 810 }
 811 EXPORT_SYMBOL_GPL(kvm_require_dr);
 812
 813 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
 814 {
 815         return vcpu->arch.reserved_gpa_bits | rsvd_bits(5, 8) | rsvd_bits(1, 2);
 816 }
 817
 818 /*
 819  * Load the pae pdptrs.  Return 1 if they are all valid, 0 otherwise.
 820  */
 821 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
 822 {
 823         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
 824         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 825         gpa_t real_gpa;
 826         int i;
 827         int ret;
 828         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 829
 830         /*
 831          * If the MMU is nested, CR3 holds an L2 GPA and needs to be translated
 832          * to an L1 GPA.
 833          */
 834         real_gpa = kvm_translate_gpa(vcpu, mmu, gfn_to_gpa(pdpt_gfn),
 835                                      PFERR_USER_MASK | PFERR_WRITE_MASK, NULL);
 836         if (real_gpa == UNMAPPED_GVA)
 837                 return 0;
 838
 839         /* Note the offset, PDPTRs are 32 byte aligned when using PAE paging. */
 840         ret = kvm_vcpu_read_guest_page(vcpu, gpa_to_gfn(real_gpa), pdpte,
 841                                        cr3 & GENMASK(11, 5), sizeof(pdpte));
 842         if (ret < 0)
 843                 return 0;
 844
 845         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 846                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 847                     (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
 848                         return 0;
 849                 }
 850         }
 851
 852         /*
 853          * Marking VCPU_EXREG_PDPTR dirty doesn't work for !tdp_enabled.
 854          * Shadow page roots need to be reconstructed instead.
 855          */
 856         if (!tdp_enabled && memcmp(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs)))
 857                 kvm_mmu_free_roots(vcpu, mmu, KVM_MMU_ROOT_CURRENT);
 858
 859         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 860         kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
 861         kvm_make_request(KVM_REQ_LOAD_MMU_PGD, vcpu);
 862         vcpu->arch.pdptrs_from_userspace = false;
 863
 864         return 1;
 865 }
 866 EXPORT_SYMBOL_GPL(load_pdptrs);
 867
 868 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0)
 869 {
 870         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 871                 kvm_clear_async_pf_completion_queue(vcpu);
 872                 kvm_async_pf_hash_reset(vcpu);
 873         }
 874
 875         if ((cr0 ^ old_cr0) & KVM_MMU_CR0_ROLE_BITS)
 876                 kvm_mmu_reset_context(vcpu);
 877
 878         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 879             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 880             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 881                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 882 }
 883 EXPORT_SYMBOL_GPL(kvm_post_set_cr0);
 884
 885 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 886 {
 887         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 888
 889         cr0 |= X86_CR0_ET;
 890
 891 #ifdef CONFIG_X86_64
 892         if (cr0 & 0xffffffff00000000UL)
 893                 return 1;
 894 #endif
 895
 896         cr0 &= ~CR0_RESERVED_BITS;
 897
 898         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 899                 return 1;
 900
 901         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 902                 return 1;
 903
 904 #ifdef CONFIG_X86_64
 905         if ((vcpu->arch.efer & EFER_LME) && !is_paging(vcpu) &&
 906             (cr0 & X86_CR0_PG)) {
 907                 int cs_db, cs_l;
 908
 909                 if (!is_pae(vcpu))
 910                         return 1;
 911                 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
 912                 if (cs_l)
 913                         return 1;
 914         }
 915 #endif
 916         if (!(vcpu->arch.efer & EFER_LME) && (cr0 & X86_CR0_PG) &&
 917             is_pae(vcpu) && ((cr0 ^ old_cr0) & X86_CR0_PDPTR_BITS) &&
 918             !load_pdptrs(vcpu, kvm_read_cr3(vcpu)))
 919                 return 1;
 920
 921         if (!(cr0 & X86_CR0_PG) &&
 922             (is_64_bit_mode(vcpu) || kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE)))
 923                 return 1;
 924
 925         static_call(kvm_x86_set_cr0)(vcpu, cr0);
 926
 927         kvm_post_set_cr0(vcpu, old_cr0, cr0);
 928
 929         return 0;
 930 }
 931 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 932
 933 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 934 {
 935         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 936 }
 937 EXPORT_SYMBOL_GPL(kvm_lmsw);
 938
 939 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
 940 {
 941         if (vcpu->arch.guest_state_protected)
 942                 return;
 943
 944         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 945
 946                 if (vcpu->arch.xcr0 != host_xcr0)
 947                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 948
 949                 if (vcpu->arch.xsaves_enabled &&
 950                     vcpu->arch.ia32_xss != host_xss)
 951                         wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
 952         }
 953
 954         if (static_cpu_has(X86_FEATURE_PKU) &&
 955             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 956              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU)) &&
 957             vcpu->arch.pkru != vcpu->arch.host_pkru)
 958                 write_pkru(vcpu->arch.pkru);
 959 }
 960 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
 961
 962 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
 963 {
 964         if (vcpu->arch.guest_state_protected)
 965                 return;
 966
 967         if (static_cpu_has(X86_FEATURE_PKU) &&
 968             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 969              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU))) {
 970                 vcpu->arch.pkru = rdpkru();
 971                 if (vcpu->arch.pkru != vcpu->arch.host_pkru)
 972                         write_pkru(vcpu->arch.host_pkru);
 973         }
 974
 975         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 976
 977                 if (vcpu->arch.xcr0 != host_xcr0)
 978                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 979
 980                 if (vcpu->arch.xsaves_enabled &&
 981                     vcpu->arch.ia32_xss != host_xss)
 982                         wrmsrl(MSR_IA32_XSS, host_xss);
 983         }
 984
 985 }
 986 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
 987
 988 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 989 {
 990         u64 xcr0 = xcr;
 991         u64 old_xcr0 = vcpu->arch.xcr0;
 992         u64 valid_bits;
 993
 994         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 995         if (index != XCR_XFEATURE_ENABLED_MASK)
 996                 return 1;
 997         if (!(xcr0 & XFEATURE_MASK_FP))
 998                 return 1;
 999         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
1000                 return 1;
1001
1002         /*
1003          * Do not allow the guest to set bits that we do not support
1004          * saving.  However, xcr0 bit 0 is always set, even if the
1005          * emulated CPU does not support XSAVE (see kvm_vcpu_reset()).
1006          */
1007         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
1008         if (xcr0 & ~valid_bits)
1009                 return 1;
1010
1011         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
1012             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
1013                 return 1;
1014
1015         if (xcr0 & XFEATURE_MASK_AVX512) {
1016                 if (!(xcr0 & XFEATURE_MASK_YMM))
1017                         return 1;
1018                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
1019                         return 1;
1020         }
1021
1022         if ((xcr0 & XFEATURE_MASK_XTILE) &&
1023             ((xcr0 & XFEATURE_MASK_XTILE) != XFEATURE_MASK_XTILE))
1024                 return 1;
1025
1026         vcpu->arch.xcr0 = xcr0;
1027
1028         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
1029                 kvm_update_cpuid_runtime(vcpu);
1030         return 0;
1031 }
1032
1033 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu)
1034 {
1035         if (static_call(kvm_x86_get_cpl)(vcpu) != 0 ||
1036             __kvm_set_xcr(vcpu, kvm_rcx_read(vcpu), kvm_read_edx_eax(vcpu))) {
1037                 kvm_inject_gp(vcpu, 0);
1038                 return 1;
1039         }
1040
1041         return kvm_skip_emulated_instruction(vcpu);
1042 }
1043 EXPORT_SYMBOL_GPL(kvm_emulate_xsetbv);
1044
1045 bool kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1046 {
1047         if (cr4 & cr4_reserved_bits)
1048                 return false;
1049
1050         if (cr4 & vcpu->arch.cr4_guest_rsvd_bits)
1051                 return false;
1052
1053         return static_call(kvm_x86_is_valid_cr4)(vcpu, cr4);
1054 }
1055 EXPORT_SYMBOL_GPL(kvm_is_valid_cr4);
1056
1057 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4)
1058 {
1059         /*
1060          * If any role bit is changed, the MMU needs to be reset.
1061          *
1062          * If CR4.PCIDE is changed 1 -> 0, the guest TLB must be flushed.
1063          * If CR4.PCIDE is changed 0 -> 1, there is no need to flush the TLB
1064          * according to the SDM; however, stale prev_roots could be reused
1065          * incorrectly in the future after a MOV to CR3 with NOFLUSH=1, so we
1066          * free them all.  KVM_REQ_MMU_RELOAD is fit for the both cases; it
1067          * is slow, but changing CR4.PCIDE is a rare case.
1068          *
1069          * If CR4.PGE is changed, the guest TLB must be flushed.
1070          *
1071          * Note: resetting MMU is a superset of KVM_REQ_MMU_RELOAD and
1072          * KVM_REQ_MMU_RELOAD is a superset of KVM_REQ_TLB_FLUSH_GUEST, hence
1073          * the usage of "else if".
1074          */
1075         if ((cr4 ^ old_cr4) & KVM_MMU_CR4_ROLE_BITS)
1076                 kvm_mmu_reset_context(vcpu);
1077         else if ((cr4 ^ old_cr4) & X86_CR4_PCIDE)
1078                 kvm_make_request(KVM_REQ_MMU_RELOAD, vcpu);
1079         else if ((cr4 ^ old_cr4) & X86_CR4_PGE)
1080                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
1081 }
1082 EXPORT_SYMBOL_GPL(kvm_post_set_cr4);
1083
1084 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1085 {
1086         unsigned long old_cr4 = kvm_read_cr4(vcpu);
1087
1088         if (!kvm_is_valid_cr4(vcpu, cr4))
1089                 return 1;
1090
1091         if (is_long_mode(vcpu)) {
1092                 if (!(cr4 & X86_CR4_PAE))
1093                         return 1;
1094                 if ((cr4 ^ old_cr4) & X86_CR4_LA57)
1095                         return 1;
1096         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
1097                    && ((cr4 ^ old_cr4) & X86_CR4_PDPTR_BITS)
1098                    && !load_pdptrs(vcpu, kvm_read_cr3(vcpu)))
1099                 return 1;
1100
1101         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
1102                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
1103                         return 1;
1104
1105                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1106                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
1107                         return 1;
1108         }
1109
1110         static_call(kvm_x86_set_cr4)(vcpu, cr4);
1111
1112         kvm_post_set_cr4(vcpu, old_cr4, cr4);
1113
1114         return 0;
1115 }
1116 EXPORT_SYMBOL_GPL(kvm_set_cr4);
1117
1118 static void kvm_invalidate_pcid(struct kvm_vcpu *vcpu, unsigned long pcid)
1119 {
1120         struct kvm_mmu *mmu = vcpu->arch.mmu;
1121         unsigned long roots_to_free = 0;
1122         int i;
1123
1124         /*
1125          * MOV CR3 and INVPCID are usually not intercepted when using TDP, but
1126          * this is reachable when running EPT=1 and unrestricted_guest=0,  and
1127          * also via the emulator.  KVM's TDP page tables are not in the scope of
1128          * the invalidation, but the guest's TLB entries need to be flushed as
1129          * the CPU may have cached entries in its TLB for the target PCID.
1130          */
1131         if (unlikely(tdp_enabled)) {
1132                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
1133                 return;
1134         }
1135
1136         /*
1137          * If neither the current CR3 nor any of the prev_roots use the given
1138          * PCID, then nothing needs to be done here because a resync will
1139          * happen anyway before switching to any other CR3.
1140          */
1141         if (kvm_get_active_pcid(vcpu) == pcid) {
1142                 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
1143                 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1144         }
1145
1146         /*
1147          * If PCID is disabled, there is no need to free prev_roots even if the
1148          * PCIDs for them are also 0, because MOV to CR3 always flushes the TLB
1149          * with PCIDE=0.
1150          */
1151         if (!kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
1152                 return;
1153
1154         for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
1155                 if (kvm_get_pcid(vcpu, mmu->prev_roots[i].pgd) == pcid)
1156                         roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
1157
1158         kvm_mmu_free_roots(vcpu, mmu, roots_to_free);
1159 }
1160
1161 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1162 {
1163         bool skip_tlb_flush = false;
1164         unsigned long pcid = 0;
1165 #ifdef CONFIG_X86_64
1166         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
1167
1168         if (pcid_enabled) {
1169                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
1170                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
1171                 pcid = cr3 & X86_CR3_PCID_MASK;
1172         }
1173 #endif
1174
1175         /* PDPTRs are always reloaded for PAE paging. */
1176         if (cr3 == kvm_read_cr3(vcpu) && !is_pae_paging(vcpu))
1177                 goto handle_tlb_flush;
1178
1179         /*
1180          * Do not condition the GPA check on long mode, this helper is used to
1181          * stuff CR3, e.g. for RSM emulation, and there is no guarantee that
1182          * the current vCPU mode is accurate.
1183          */
1184         if (kvm_vcpu_is_illegal_gpa(vcpu, cr3))
1185                 return 1;
1186
1187         if (is_pae_paging(vcpu) && !load_pdptrs(vcpu, cr3))
1188                 return 1;
1189
1190         if (cr3 != kvm_read_cr3(vcpu))
1191                 kvm_mmu_new_pgd(vcpu, cr3);
1192
1193         vcpu->arch.cr3 = cr3;
1194         kvm_register_mark_dirty(vcpu, VCPU_EXREG_CR3);
1195         /* Do not call post_set_cr3, we do not get here for confidential guests.  */
1196
1197 handle_tlb_flush:
1198         /*
1199          * A load of CR3 that flushes the TLB flushes only the current PCID,
1200          * even if PCID is disabled, in which case PCID=0 is flushed.  It's a
1201          * moot point in the end because _disabling_ PCID will flush all PCIDs,
1202          * and it's impossible to use a non-zero PCID when PCID is disabled,
1203          * i.e. only PCID=0 can be relevant.
1204          */
1205         if (!skip_tlb_flush)
1206                 kvm_invalidate_pcid(vcpu, pcid);
1207
1208         return 0;
1209 }
1210 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1211
1212 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1213 {
1214         if (cr8 & CR8_RESERVED_BITS)
1215                 return 1;
1216         if (lapic_in_kernel(vcpu))
1217                 kvm_lapic_set_tpr(vcpu, cr8);
1218         else
1219                 vcpu->arch.cr8 = cr8;
1220         return 0;
1221 }
1222 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1223
1224 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1225 {
1226         if (lapic_in_kernel(vcpu))
1227                 return kvm_lapic_get_cr8(vcpu);
1228         else
1229                 return vcpu->arch.cr8;
1230 }
1231 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1232
1233 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1234 {
1235         int i;
1236
1237         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1238                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1239                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1240         }
1241 }
1242
1243 void kvm_update_dr7(struct kvm_vcpu *vcpu)
1244 {
1245         unsigned long dr7;
1246
1247         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1248                 dr7 = vcpu->arch.guest_debug_dr7;
1249         else
1250                 dr7 = vcpu->arch.dr7;
1251         static_call(kvm_x86_set_dr7)(vcpu, dr7);
1252         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1253         if (dr7 & DR7_BP_EN_MASK)
1254                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1255 }
1256 EXPORT_SYMBOL_GPL(kvm_update_dr7);
1257
1258 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1259 {
1260         u64 fixed = DR6_FIXED_1;
1261
1262         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1263                 fixed |= DR6_RTM;
1264
1265         if (!guest_cpuid_has(vcpu, X86_FEATURE_BUS_LOCK_DETECT))
1266                 fixed |= DR6_BUS_LOCK;
1267         return fixed;
1268 }
1269
1270 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1271 {
1272         size_t size = ARRAY_SIZE(vcpu->arch.db);
1273
1274         switch (dr) {
1275         case 0 ... 3:
1276                 vcpu->arch.db[array_index_nospec(dr, size)] = val;
1277                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1278                         vcpu->arch.eff_db[dr] = val;
1279                 break;
1280         case 4:
1281         case 6:
1282                 if (!kvm_dr6_valid(val))
1283                         return 1; /* #GP */
1284                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1285                 break;
1286         case 5:
1287         default: /* 7 */
1288                 if (!kvm_dr7_valid(val))
1289                         return 1; /* #GP */
1290                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1291                 kvm_update_dr7(vcpu);
1292                 break;
1293         }
1294
1295         return 0;
1296 }
1297 EXPORT_SYMBOL_GPL(kvm_set_dr);
1298
1299 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1300 {
1301         size_t size = ARRAY_SIZE(vcpu->arch.db);
1302
1303         switch (dr) {
1304         case 0 ... 3:
1305                 *val = vcpu->arch.db[array_index_nospec(dr, size)];
1306                 break;
1307         case 4:
1308         case 6:
1309                 *val = vcpu->arch.dr6;
1310                 break;
1311         case 5:
1312         default: /* 7 */
1313                 *val = vcpu->arch.dr7;
1314                 break;
1315         }
1316 }
1317 EXPORT_SYMBOL_GPL(kvm_get_dr);
1318
1319 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu)
1320 {
1321         u32 ecx = kvm_rcx_read(vcpu);
1322         u64 data;
1323
1324         if (kvm_pmu_rdpmc(vcpu, ecx, &data)) {
1325                 kvm_inject_gp(vcpu, 0);
1326                 return 1;
1327         }
1328
1329         kvm_rax_write(vcpu, (u32)data);
1330         kvm_rdx_write(vcpu, data >> 32);
1331         return kvm_skip_emulated_instruction(vcpu);
1332 }
1333 EXPORT_SYMBOL_GPL(kvm_emulate_rdpmc);
1334
1335 /*
1336  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1337  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1338  *
1339  * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1340  * extract the supported MSRs from the related const lists.
1341  * msrs_to_save is selected from the msrs_to_save_all to reflect the
1342  * capabilities of the host cpu. This capabilities test skips MSRs that are
1343  * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1344  * may depend on host virtualization features rather than host cpu features.
1345  */
1346
1347 static const u32 msrs_to_save_all[] = {
1348         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1349         MSR_STAR,
1350 #ifdef CONFIG_X86_64
1351         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1352 #endif
1353         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1354         MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1355         MSR_IA32_SPEC_CTRL,
1356         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1357         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1358         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1359         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1360         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1361         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1362         MSR_IA32_UMWAIT_CONTROL,
1363
1364         MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1365         MSR_ARCH_PERFMON_FIXED_CTR0 + 2,
1366         MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1367         MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1368         MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1369         MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1370         MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1371         MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1372         MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1373         MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1374         MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1375         MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1376         MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1377         MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1378         MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1379         MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1380         MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1381         MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1382         MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1383         MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1384         MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1385         MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1386
1387         MSR_K7_EVNTSEL0, MSR_K7_EVNTSEL1, MSR_K7_EVNTSEL2, MSR_K7_EVNTSEL3,
1388         MSR_K7_PERFCTR0, MSR_K7_PERFCTR1, MSR_K7_PERFCTR2, MSR_K7_PERFCTR3,
1389         MSR_F15H_PERF_CTL0, MSR_F15H_PERF_CTL1, MSR_F15H_PERF_CTL2,
1390         MSR_F15H_PERF_CTL3, MSR_F15H_PERF_CTL4, MSR_F15H_PERF_CTL5,
1391         MSR_F15H_PERF_CTR0, MSR_F15H_PERF_CTR1, MSR_F15H_PERF_CTR2,
1392         MSR_F15H_PERF_CTR3, MSR_F15H_PERF_CTR4, MSR_F15H_PERF_CTR5,
1393         MSR_IA32_XFD, MSR_IA32_XFD_ERR,
1394 };
1395
1396 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
1397 static unsigned num_msrs_to_save;
1398
1399 static const u32 emulated_msrs_all[] = {
1400         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1401         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1402         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1403         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1404         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1405         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1406         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1407         HV_X64_MSR_RESET,
1408         HV_X64_MSR_VP_INDEX,
1409         HV_X64_MSR_VP_RUNTIME,
1410         HV_X64_MSR_SCONTROL,
1411         HV_X64_MSR_STIMER0_CONFIG,
1412         HV_X64_MSR_VP_ASSIST_PAGE,
1413         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1414         HV_X64_MSR_TSC_EMULATION_STATUS,
1415         HV_X64_MSR_SYNDBG_OPTIONS,
1416         HV_X64_MSR_SYNDBG_CONTROL, HV_X64_MSR_SYNDBG_STATUS,
1417         HV_X64_MSR_SYNDBG_SEND_BUFFER, HV_X64_MSR_SYNDBG_RECV_BUFFER,
1418         HV_X64_MSR_SYNDBG_PENDING_BUFFER,
1419
1420         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1421         MSR_KVM_PV_EOI_EN, MSR_KVM_ASYNC_PF_INT, MSR_KVM_ASYNC_PF_ACK,
1422
1423         MSR_IA32_TSC_ADJUST,
1424         MSR_IA32_TSC_DEADLINE,
1425         MSR_IA32_ARCH_CAPABILITIES,
1426         MSR_IA32_PERF_CAPABILITIES,
1427         MSR_IA32_MISC_ENABLE,
1428         MSR_IA32_MCG_STATUS,
1429         MSR_IA32_MCG_CTL,
1430         MSR_IA32_MCG_EXT_CTL,
1431         MSR_IA32_SMBASE,
1432         MSR_SMI_COUNT,
1433         MSR_PLATFORM_INFO,
1434         MSR_MISC_FEATURES_ENABLES,
1435         MSR_AMD64_VIRT_SPEC_CTRL,
1436         MSR_AMD64_TSC_RATIO,
1437         MSR_IA32_POWER_CTL,
1438         MSR_IA32_UCODE_REV,
1439
1440         /*
1441          * The following list leaves out MSRs whose values are determined
1442          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1443          * We always support the "true" VMX control MSRs, even if the host
1444          * processor does not, so I am putting these registers here rather
1445          * than in msrs_to_save_all.
1446          */
1447         MSR_IA32_VMX_BASIC,
1448         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1449         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1450         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1451         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1452         MSR_IA32_VMX_MISC,
1453         MSR_IA32_VMX_CR0_FIXED0,
1454         MSR_IA32_VMX_CR4_FIXED0,
1455         MSR_IA32_VMX_VMCS_ENUM,
1456         MSR_IA32_VMX_PROCBASED_CTLS2,
1457         MSR_IA32_VMX_EPT_VPID_CAP,
1458         MSR_IA32_VMX_VMFUNC,
1459
1460         MSR_K7_HWCR,
1461         MSR_KVM_POLL_CONTROL,
1462 };
1463
1464 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1465 static unsigned num_emulated_msrs;
1466
1467 /*
1468  * List of msr numbers which are used to expose MSR-based features that
1469  * can be used by a hypervisor to validate requested CPU features.
1470  */
1471 static const u32 msr_based_features_all[] = {
1472         MSR_IA32_VMX_BASIC,
1473         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1474         MSR_IA32_VMX_PINBASED_CTLS,
1475         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1476         MSR_IA32_VMX_PROCBASED_CTLS,
1477         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1478         MSR_IA32_VMX_EXIT_CTLS,
1479         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1480         MSR_IA32_VMX_ENTRY_CTLS,
1481         MSR_IA32_VMX_MISC,
1482         MSR_IA32_VMX_CR0_FIXED0,
1483         MSR_IA32_VMX_CR0_FIXED1,
1484         MSR_IA32_VMX_CR4_FIXED0,
1485         MSR_IA32_VMX_CR4_FIXED1,
1486         MSR_IA32_VMX_VMCS_ENUM,
1487         MSR_IA32_VMX_PROCBASED_CTLS2,
1488         MSR_IA32_VMX_EPT_VPID_CAP,
1489         MSR_IA32_VMX_VMFUNC,
1490
1491         MSR_F10H_DECFG,
1492         MSR_IA32_UCODE_REV,
1493         MSR_IA32_ARCH_CAPABILITIES,
1494         MSR_IA32_PERF_CAPABILITIES,
1495 };
1496
1497 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
1498 static unsigned int num_msr_based_features;
1499
1500 static u64 kvm_get_arch_capabilities(void)
1501 {
1502         u64 data = 0;
1503
1504         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1505                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1506
1507         /*
1508          * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1509          * the nested hypervisor runs with NX huge pages.  If it is not,
1510          * L1 is anyway vulnerable to ITLB_MULTIHIT exploits from other
1511          * L1 guests, so it need not worry about its own (L2) guests.
1512          */
1513         data |= ARCH_CAP_PSCHANGE_MC_NO;
1514
1515         /*
1516          * If we're doing cache flushes (either "always" or "cond")
1517          * we will do one whenever the guest does a vmlaunch/vmresume.
1518          * If an outer hypervisor is doing the cache flush for us
1519          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1520          * capability to the guest too, and if EPT is disabled we're not
1521          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1522          * require a nested hypervisor to do a flush of its own.
1523          */
1524         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1525                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1526
1527         if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1528                 data |= ARCH_CAP_RDCL_NO;
1529         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1530                 data |= ARCH_CAP_SSB_NO;
1531         if (!boot_cpu_has_bug(X86_BUG_MDS))
1532                 data |= ARCH_CAP_MDS_NO;
1533
1534         if (!boot_cpu_has(X86_FEATURE_RTM)) {
1535                 /*
1536                  * If RTM=0 because the kernel has disabled TSX, the host might
1537                  * have TAA_NO or TSX_CTRL.  Clear TAA_NO (the guest sees RTM=0
1538                  * and therefore knows that there cannot be TAA) but keep
1539                  * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1540                  * and we want to allow migrating those guests to tsx=off hosts.
1541                  */
1542                 data &= ~ARCH_CAP_TAA_NO;
1543         } else if (!boot_cpu_has_bug(X86_BUG_TAA)) {
1544                 data |= ARCH_CAP_TAA_NO;
1545         } else {
1546                 /*
1547                  * Nothing to do here; we emulate TSX_CTRL if present on the
1548                  * host so the guest can choose between disabling TSX or
1549                  * using VERW to clear CPU buffers.
1550                  */
1551         }
1552
1553         return data;
1554 }
1555
1556 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1557 {
1558         switch (msr->index) {
1559         case MSR_IA32_ARCH_CAPABILITIES:
1560                 msr->data = kvm_get_arch_capabilities();
1561                 break;
1562         case MSR_IA32_UCODE_REV:
1563                 rdmsrl_safe(msr->index, &msr->data);
1564                 break;
1565         default:
1566                 return static_call(kvm_x86_get_msr_feature)(msr);
1567         }
1568         return 0;
1569 }
1570
1571 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1572 {
1573         struct kvm_msr_entry msr;
1574         int r;
1575
1576         msr.index = index;
1577         r = kvm_get_msr_feature(&msr);
1578
1579         if (r == KVM_MSR_RET_INVALID) {
1580                 /* Unconditionally clear the output for simplicity */
1581                 *data = 0;
1582                 if (kvm_msr_ignored_check(index, 0, false))
1583                         r = 0;
1584         }
1585
1586         if (r)
1587                 return r;
1588
1589         *data = msr.data;
1590
1591         return 0;
1592 }
1593
1594 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1595 {
1596         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1597                 return false;
1598
1599         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1600                 return false;
1601
1602         if (efer & (EFER_LME | EFER_LMA) &&
1603             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1604                 return false;
1605
1606         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1607                 return false;
1608
1609         return true;
1610
1611 }
1612 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1613 {
1614         if (efer & efer_reserved_bits)
1615                 return false;
1616
1617         return __kvm_valid_efer(vcpu, efer);
1618 }
1619 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1620
1621 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1622 {
1623         u64 old_efer = vcpu->arch.efer;
1624         u64 efer = msr_info->data;
1625         int r;
1626
1627         if (efer & efer_reserved_bits)
1628                 return 1;
1629
1630         if (!msr_info->host_initiated) {
1631                 if (!__kvm_valid_efer(vcpu, efer))
1632                         return 1;
1633
1634                 if (is_paging(vcpu) &&
1635                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1636                         return 1;
1637         }
1638
1639         efer &= ~EFER_LMA;
1640         efer |= vcpu->arch.efer & EFER_LMA;
1641
1642         r = static_call(kvm_x86_set_efer)(vcpu, efer);
1643         if (r) {
1644                 WARN_ON(r > 0);
1645                 return r;
1646         }
1647
1648         /* Update reserved bits */
1649         if ((efer ^ old_efer) & EFER_NX)
1650                 kvm_mmu_reset_context(vcpu);
1651
1652         return 0;
1653 }
1654
1655 void kvm_enable_efer_bits(u64 mask)
1656 {
1657        efer_reserved_bits &= ~mask;
1658 }
1659 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1660
1661 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type)
1662 {
1663         struct kvm_x86_msr_filter *msr_filter;
1664         struct msr_bitmap_range *ranges;
1665         struct kvm *kvm = vcpu->kvm;
1666         bool allowed;
1667         int idx;
1668         u32 i;
1669
1670         /* x2APIC MSRs do not support filtering. */
1671         if (index >= 0x800 && index <= 0x8ff)
1672                 return true;
1673
1674         idx = srcu_read_lock(&kvm->srcu);
1675
1676         msr_filter = srcu_dereference(kvm->arch.msr_filter, &kvm->srcu);
1677         if (!msr_filter) {
1678                 allowed = true;
1679                 goto out;
1680         }
1681
1682         allowed = msr_filter->default_allow;
1683         ranges = msr_filter->ranges;
1684
1685         for (i = 0; i < msr_filter->count; i++) {
1686                 u32 start = ranges[i].base;
1687                 u32 end = start + ranges[i].nmsrs;
1688                 u32 flags = ranges[i].flags;
1689                 unsigned long *bitmap = ranges[i].bitmap;
1690
1691                 if ((index >= start) && (index < end) && (flags & type)) {
1692                         allowed = !!test_bit(index - start, bitmap);
1693                         break;
1694                 }
1695         }
1696
1697 out:
1698         srcu_read_unlock(&kvm->srcu, idx);
1699
1700         return allowed;
1701 }
1702 EXPORT_SYMBOL_GPL(kvm_msr_allowed);
1703
1704 /*
1705  * Write @data into the MSR specified by @index.  Select MSR specific fault
1706  * checks are bypassed if @host_initiated is %true.
1707  * Returns 0 on success, non-0 otherwise.
1708  * Assumes vcpu_load() was already called.
1709  */
1710 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1711                          bool host_initiated)
1712 {
1713         struct msr_data msr;
1714
1715         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_WRITE))
1716                 return KVM_MSR_RET_FILTERED;
1717
1718         switch (index) {
1719         case MSR_FS_BASE:
1720         case MSR_GS_BASE:
1721         case MSR_KERNEL_GS_BASE:
1722         case MSR_CSTAR:
1723         case MSR_LSTAR:
1724                 if (is_noncanonical_address(data, vcpu))
1725                         return 1;
1726                 break;
1727         case MSR_IA32_SYSENTER_EIP:
1728         case MSR_IA32_SYSENTER_ESP:
1729                 /*
1730                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1731                  * non-canonical address is written on Intel but not on
1732                  * AMD (which ignores the top 32-bits, because it does
1733                  * not implement 64-bit SYSENTER).
1734                  *
1735                  * 64-bit code should hence be able to write a non-canonical
1736                  * value on AMD.  Making the address canonical ensures that
1737                  * vmentry does not fail on Intel after writing a non-canonical
1738                  * value, and that something deterministic happens if the guest
1739                  * invokes 64-bit SYSENTER.
1740                  */
1741                 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1742                 break;
1743         case MSR_TSC_AUX:
1744                 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1745                         return 1;
1746
1747                 if (!host_initiated &&
1748                     !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1749                     !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1750                         return 1;
1751
1752                 /*
1753                  * Per Intel's SDM, bits 63:32 are reserved, but AMD's APM has
1754                  * incomplete and conflicting architectural behavior.  Current
1755                  * AMD CPUs completely ignore bits 63:32, i.e. they aren't
1756                  * reserved and always read as zeros.  Enforce Intel's reserved
1757                  * bits check if and only if the guest CPU is Intel, and clear
1758                  * the bits in all other cases.  This ensures cross-vendor
1759                  * migration will provide consistent behavior for the guest.
1760                  */
1761                 if (guest_cpuid_is_intel(vcpu) && (data >> 32) != 0)
1762                         return 1;
1763
1764                 data = (u32)data;
1765                 break;
1766         }
1767
1768         msr.data = data;
1769         msr.index = index;
1770         msr.host_initiated = host_initiated;
1771
1772         return static_call(kvm_x86_set_msr)(vcpu, &msr);
1773 }
1774
1775 static int kvm_set_msr_ignored_check(struct kvm_vcpu *vcpu,
1776                                      u32 index, u64 data, bool host_initiated)
1777 {
1778         int ret = __kvm_set_msr(vcpu, index, data, host_initiated);
1779
1780         if (ret == KVM_MSR_RET_INVALID)
1781                 if (kvm_msr_ignored_check(index, data, true))
1782                         ret = 0;
1783
1784         return ret;
1785 }
1786
1787 /*
1788  * Read the MSR specified by @index into @data.  Select MSR specific fault
1789  * checks are bypassed if @host_initiated is %true.
1790  * Returns 0 on success, non-0 otherwise.
1791  * Assumes vcpu_load() was already called.
1792  */
1793 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1794                   bool host_initiated)
1795 {
1796         struct msr_data msr;
1797         int ret;
1798
1799         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_READ))
1800                 return KVM_MSR_RET_FILTERED;
1801
1802         switch (index) {
1803         case MSR_TSC_AUX:
1804                 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1805                         return 1;
1806
1807                 if (!host_initiated &&
1808                     !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1809                     !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1810                         return 1;
1811                 break;
1812         }
1813
1814         msr.index = index;
1815         msr.host_initiated = host_initiated;
1816
1817         ret = static_call(kvm_x86_get_msr)(vcpu, &msr);
1818         if (!ret)
1819                 *data = msr.data;
1820         return ret;
1821 }
1822
1823 static int kvm_get_msr_ignored_check(struct kvm_vcpu *vcpu,
1824                                      u32 index, u64 *data, bool host_initiated)
1825 {
1826         int ret = __kvm_get_msr(vcpu, index, data, host_initiated);
1827
1828         if (ret == KVM_MSR_RET_INVALID) {
1829                 /* Unconditionally clear *data for simplicity */
1830                 *data = 0;
1831                 if (kvm_msr_ignored_check(index, 0, false))
1832                         ret = 0;
1833         }
1834
1835         return ret;
1836 }
1837
1838 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1839 {
1840         return kvm_get_msr_ignored_check(vcpu, index, data, false);
1841 }
1842 EXPORT_SYMBOL_GPL(kvm_get_msr);
1843
1844 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1845 {
1846         return kvm_set_msr_ignored_check(vcpu, index, data, false);
1847 }
1848 EXPORT_SYMBOL_GPL(kvm_set_msr);
1849
1850 static void complete_userspace_rdmsr(struct kvm_vcpu *vcpu)
1851 {
1852         if (!vcpu->run->msr.error) {
1853                 kvm_rax_write(vcpu, (u32)vcpu->run->msr.data);
1854                 kvm_rdx_write(vcpu, vcpu->run->msr.data >> 32);
1855         }
1856 }
1857
1858 static int complete_emulated_msr_access(struct kvm_vcpu *vcpu)
1859 {
1860         return complete_emulated_insn_gp(vcpu, vcpu->run->msr.error);
1861 }
1862
1863 static int complete_emulated_rdmsr(struct kvm_vcpu *vcpu)
1864 {
1865         complete_userspace_rdmsr(vcpu);
1866         return complete_emulated_msr_access(vcpu);
1867 }
1868
1869 static int complete_fast_msr_access(struct kvm_vcpu *vcpu)
1870 {
1871         return static_call(kvm_x86_complete_emulated_msr)(vcpu, vcpu->run->msr.error);
1872 }
1873
1874 static int complete_fast_rdmsr(struct kvm_vcpu *vcpu)
1875 {
1876         complete_userspace_rdmsr(vcpu);
1877         return complete_fast_msr_access(vcpu);
1878 }
1879
1880 static u64 kvm_msr_reason(int r)
1881 {
1882         switch (r) {
1883         case KVM_MSR_RET_INVALID:
1884                 return KVM_MSR_EXIT_REASON_UNKNOWN;
1885         case KVM_MSR_RET_FILTERED:
1886                 return KVM_MSR_EXIT_REASON_FILTER;
1887         default:
1888                 return KVM_MSR_EXIT_REASON_INVAL;
1889         }
1890 }
1891
1892 static int kvm_msr_user_space(struct kvm_vcpu *vcpu, u32 index,
1893                               u32 exit_reason, u64 data,
1894                               int (*completion)(struct kvm_vcpu *vcpu),
1895                               int r)
1896 {
1897         u64 msr_reason = kvm_msr_reason(r);
1898
1899         /* Check if the user wanted to know about this MSR fault */
1900         if (!(vcpu->kvm->arch.user_space_msr_mask & msr_reason))
1901                 return 0;
1902
1903         vcpu->run->exit_reason = exit_reason;
1904         vcpu->run->msr.error = 0;
1905         memset(vcpu->run->msr.pad, 0, sizeof(vcpu->run->msr.pad));
1906         vcpu->run->msr.reason = msr_reason;
1907         vcpu->run->msr.index = index;
1908         vcpu->run->msr.data = data;
1909         vcpu->arch.complete_userspace_io = completion;
1910
1911         return 1;
1912 }
1913
1914 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1915 {
1916         u32 ecx = kvm_rcx_read(vcpu);
1917         u64 data;
1918         int r;
1919
1920         r = kvm_get_msr(vcpu, ecx, &data);
1921
1922         if (!r) {
1923                 trace_kvm_msr_read(ecx, data);
1924
1925                 kvm_rax_write(vcpu, data & -1u);
1926                 kvm_rdx_write(vcpu, (data >> 32) & -1u);
1927         } else {
1928                 /* MSR read failed? See if we should ask user space */
1929                 if (kvm_msr_user_space(vcpu, ecx, KVM_EXIT_X86_RDMSR, 0,
1930                                        complete_fast_rdmsr, r))
1931                         return 0;
1932                 trace_kvm_msr_read_ex(ecx);
1933         }
1934
1935         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1936 }
1937 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1938
1939 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1940 {
1941         u32 ecx = kvm_rcx_read(vcpu);
1942         u64 data = kvm_read_edx_eax(vcpu);
1943         int r;
1944
1945         r = kvm_set_msr(vcpu, ecx, data);
1946
1947         if (!r) {
1948                 trace_kvm_msr_write(ecx, data);
1949         } else {
1950                 /* MSR write failed? See if we should ask user space */
1951                 if (kvm_msr_user_space(vcpu, ecx, KVM_EXIT_X86_WRMSR, data,
1952                                        complete_fast_msr_access, r))
1953                         return 0;
1954                 /* Signal all other negative errors to userspace */
1955                 if (r < 0)
1956                         return r;
1957                 trace_kvm_msr_write_ex(ecx, data);
1958         }
1959
1960         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1961 }
1962 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1963
1964 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu)
1965 {
1966         return kvm_skip_emulated_instruction(vcpu);
1967 }
1968 EXPORT_SYMBOL_GPL(kvm_emulate_as_nop);
1969
1970 int kvm_emulate_invd(struct kvm_vcpu *vcpu)
1971 {
1972         /* Treat an INVD instruction as a NOP and just skip it. */
1973         return kvm_emulate_as_nop(vcpu);
1974 }
1975 EXPORT_SYMBOL_GPL(kvm_emulate_invd);
1976
1977 int kvm_emulate_mwait(struct kvm_vcpu *vcpu)
1978 {
1979         pr_warn_once("kvm: MWAIT instruction emulated as NOP!\n");
1980         return kvm_emulate_as_nop(vcpu);
1981 }
1982 EXPORT_SYMBOL_GPL(kvm_emulate_mwait);
1983
1984 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu)
1985 {
1986         kvm_queue_exception(vcpu, UD_VECTOR);
1987         return 1;
1988 }
1989 EXPORT_SYMBOL_GPL(kvm_handle_invalid_op);
1990
1991 int kvm_emulate_monitor(struct kvm_vcpu *vcpu)
1992 {
1993         pr_warn_once("kvm: MONITOR instruction emulated as NOP!\n");
1994         return kvm_emulate_as_nop(vcpu);
1995 }
1996 EXPORT_SYMBOL_GPL(kvm_emulate_monitor);
1997
1998 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu)
1999 {
2000         xfer_to_guest_mode_prepare();
2001         return vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu) ||
2002                 xfer_to_guest_mode_work_pending();
2003 }
2004
2005 /*
2006  * The fast path for frequent and performance sensitive wrmsr emulation,
2007  * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
2008  * the latency of virtual IPI by avoiding the expensive bits of transitioning
2009  * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
2010  * other cases which must be called after interrupts are enabled on the host.
2011  */
2012 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
2013 {
2014         if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic))
2015                 return 1;
2016
2017         if (((data & APIC_SHORT_MASK) == APIC_DEST_NOSHORT) &&
2018                 ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
2019                 ((data & APIC_MODE_MASK) == APIC_DM_FIXED) &&
2020                 ((u32)(data >> 32) != X2APIC_BROADCAST)) {
2021
2022                 data &= ~(1 << 12);
2023                 kvm_apic_send_ipi(vcpu->arch.apic, (u32)data, (u32)(data >> 32));
2024                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR2, (u32)(data >> 32));
2025                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR, (u32)data);
2026                 trace_kvm_apic_write(APIC_ICR, (u32)data);
2027                 return 0;
2028         }
2029
2030         return 1;
2031 }
2032
2033 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
2034 {
2035         if (!kvm_can_use_hv_timer(vcpu))
2036                 return 1;
2037
2038         kvm_set_lapic_tscdeadline_msr(vcpu, data);
2039         return 0;
2040 }
2041
2042 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
2043 {
2044         u32 msr = kvm_rcx_read(vcpu);
2045         u64 data;
2046         fastpath_t ret = EXIT_FASTPATH_NONE;
2047
2048         switch (msr) {
2049         case APIC_BASE_MSR + (APIC_ICR >> 4):
2050                 data = kvm_read_edx_eax(vcpu);
2051                 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu, data)) {
2052                         kvm_skip_emulated_instruction(vcpu);
2053                         ret = EXIT_FASTPATH_EXIT_HANDLED;
2054                 }
2055                 break;
2056         case MSR_IA32_TSC_DEADLINE:
2057                 data = kvm_read_edx_eax(vcpu);
2058                 if (!handle_fastpath_set_tscdeadline(vcpu, data)) {
2059                         kvm_skip_emulated_instruction(vcpu);
2060                         ret = EXIT_FASTPATH_REENTER_GUEST;
2061                 }
2062                 break;
2063         default:
2064                 break;
2065         }
2066
2067         if (ret != EXIT_FASTPATH_NONE)
2068                 trace_kvm_msr_write(msr, data);
2069
2070         return ret;
2071 }
2072 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
2073
2074 /*
2075  * Adapt set_msr() to msr_io()'s calling convention
2076  */
2077 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2078 {
2079         return kvm_get_msr_ignored_check(vcpu, index, data, true);
2080 }
2081
2082 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2083 {
2084         return kvm_set_msr_ignored_check(vcpu, index, *data, true);
2085 }
2086
2087 #ifdef CONFIG_X86_64
2088 struct pvclock_clock {
2089         int vclock_mode;
2090         u64 cycle_last;
2091         u64 mask;
2092         u32 mult;
2093         u32 shift;
2094         u64 base_cycles;
2095         u64 offset;
2096 };
2097
2098 struct pvclock_gtod_data {
2099         seqcount_t      seq;
2100
2101         struct pvclock_clock clock; /* extract of a clocksource struct */
2102         struct pvclock_clock raw_clock; /* extract of a clocksource struct */
2103
2104         ktime_t         offs_boot;
2105         u64             wall_time_sec;
2106 };
2107
2108 static struct pvclock_gtod_data pvclock_gtod_data;
2109
2110 static void update_pvclock_gtod(struct timekeeper *tk)
2111 {
2112         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
2113
2114         write_seqcount_begin(&vdata->seq);
2115
2116         /* copy pvclock gtod data */
2117         vdata->clock.vclock_mode        = tk->tkr_mono.clock->vdso_clock_mode;
2118         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
2119         vdata->clock.mask               = tk->tkr_mono.mask;
2120         vdata->clock.mult               = tk->tkr_mono.mult;
2121         vdata->clock.shift              = tk->tkr_mono.shift;
2122         vdata->clock.base_cycles        = tk->tkr_mono.xtime_nsec;
2123         vdata->clock.offset             = tk->tkr_mono.base;
2124
2125         vdata->raw_clock.vclock_mode    = tk->tkr_raw.clock->vdso_clock_mode;
2126         vdata->raw_clock.cycle_last     = tk->tkr_raw.cycle_last;
2127         vdata->raw_clock.mask           = tk->tkr_raw.mask;
2128         vdata->raw_clock.mult           = tk->tkr_raw.mult;
2129         vdata->raw_clock.shift          = tk->tkr_raw.shift;
2130         vdata->raw_clock.base_cycles    = tk->tkr_raw.xtime_nsec;
2131         vdata->raw_clock.offset         = tk->tkr_raw.base;
2132
2133         vdata->wall_time_sec            = tk->xtime_sec;
2134
2135         vdata->offs_boot                = tk->offs_boot;
2136
2137         write_seqcount_end(&vdata->seq);
2138 }
2139
2140 static s64 get_kvmclock_base_ns(void)
2141 {
2142         /* Count up from boot time, but with the frequency of the raw clock.  */
2143         return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot));
2144 }
2145 #else
2146 static s64 get_kvmclock_base_ns(void)
2147 {
2148         /* Master clock not used, so we can just use CLOCK_BOOTTIME.  */
2149         return ktime_get_boottime_ns();
2150 }
2151 #endif
2152
2153 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock, int sec_hi_ofs)
2154 {
2155         int version;
2156         int r;
2157         struct pvclock_wall_clock wc;
2158         u32 wc_sec_hi;
2159         u64 wall_nsec;
2160
2161         if (!wall_clock)
2162                 return;
2163
2164         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
2165         if (r)
2166                 return;
2167
2168         if (version & 1)
2169                 ++version;  /* first time write, random junk */
2170
2171         ++version;
2172
2173         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
2174                 return;
2175
2176         /*
2177          * The guest calculates current wall clock time by adding
2178          * system time (updated by kvm_guest_time_update below) to the
2179          * wall clock specified here.  We do the reverse here.
2180          */
2181         wall_nsec = ktime_get_real_ns() - get_kvmclock_ns(kvm);
2182
2183         wc.nsec = do_div(wall_nsec, 1000000000);
2184         wc.sec = (u32)wall_nsec; /* overflow in 2106 guest time */
2185         wc.version = version;
2186
2187         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
2188
2189         if (sec_hi_ofs) {
2190                 wc_sec_hi = wall_nsec >> 32;
2191                 kvm_write_guest(kvm, wall_clock + sec_hi_ofs,
2192                                 &wc_sec_hi, sizeof(wc_sec_hi));
2193         }
2194
2195         version++;
2196         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
2197 }
2198
2199 static void kvm_write_system_time(struct kvm_vcpu *vcpu, gpa_t system_time,
2200                                   bool old_msr, bool host_initiated)
2201 {
2202         struct kvm_arch *ka = &vcpu->kvm->arch;
2203
2204         if (vcpu->vcpu_id == 0 && !host_initiated) {
2205                 if (ka->boot_vcpu_runs_old_kvmclock != old_msr)
2206                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2207
2208                 ka->boot_vcpu_runs_old_kvmclock = old_msr;
2209         }
2210
2211         vcpu->arch.time = system_time;
2212         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2213
2214         /* we verify if the enable bit is set... */
2215         vcpu->arch.pv_time_enabled = false;
2216         if (!(system_time & 1))
2217                 return;
2218
2219         if (!kvm_gfn_to_hva_cache_init(vcpu->kvm,
2220                                        &vcpu->arch.pv_time, system_time & ~1ULL,
2221                                        sizeof(struct pvclock_vcpu_time_info)))
2222                 vcpu->arch.pv_time_enabled = true;
2223
2224         return;
2225 }
2226
2227 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
2228 {
2229         do_shl32_div32(dividend, divisor);
2230         return dividend;
2231 }
2232
2233 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
2234                                s8 *pshift, u32 *pmultiplier)
2235 {
2236         uint64_t scaled64;
2237         int32_t  shift = 0;
2238         uint64_t tps64;
2239         uint32_t tps32;
2240
2241         tps64 = base_hz;
2242         scaled64 = scaled_hz;
2243         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
2244                 tps64 >>= 1;
2245                 shift--;
2246         }
2247
2248         tps32 = (uint32_t)tps64;
2249         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
2250                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
2251                         scaled64 >>= 1;
2252                 else
2253                         tps32 <<= 1;
2254                 shift++;
2255         }
2256
2257         *pshift = shift;
2258         *pmultiplier = div_frac(scaled64, tps32);
2259 }
2260
2261 #ifdef CONFIG_X86_64
2262 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
2263 #endif
2264
2265 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
2266 static unsigned long max_tsc_khz;
2267
2268 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
2269 {
2270         u64 v = (u64)khz * (1000000 + ppm);
2271         do_div(v, 1000000);
2272         return v;
2273 }
2274
2275 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier);
2276
2277 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
2278 {
2279         u64 ratio;
2280
2281         /* Guest TSC same frequency as host TSC? */
2282         if (!scale) {
2283                 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2284                 return 0;
2285         }
2286
2287         /* TSC scaling supported? */
2288         if (!kvm_has_tsc_control) {
2289                 if (user_tsc_khz > tsc_khz) {
2290                         vcpu->arch.tsc_catchup = 1;
2291                         vcpu->arch.tsc_always_catchup = 1;
2292                         return 0;
2293                 } else {
2294                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2295                         return -1;
2296                 }
2297         }
2298
2299         /* TSC scaling required  - calculate ratio */
2300         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
2301                                 user_tsc_khz, tsc_khz);
2302
2303         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
2304                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2305                                     user_tsc_khz);
2306                 return -1;
2307         }
2308
2309         kvm_vcpu_write_tsc_multiplier(vcpu, ratio);
2310         return 0;
2311 }
2312
2313 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
2314 {
2315         u32 thresh_lo, thresh_hi;
2316         int use_scaling = 0;
2317
2318         /* tsc_khz can be zero if TSC calibration fails */
2319         if (user_tsc_khz == 0) {
2320                 /* set tsc_scaling_ratio to a safe value */
2321                 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2322                 return -1;
2323         }
2324
2325         /* Compute a scale to convert nanoseconds in TSC cycles */
2326         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
2327                            &vcpu->arch.virtual_tsc_shift,
2328                            &vcpu->arch.virtual_tsc_mult);
2329         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
2330
2331         /*
2332          * Compute the variation in TSC rate which is acceptable
2333          * within the range of tolerance and decide if the
2334          * rate being applied is within that bounds of the hardware
2335          * rate.  If so, no scaling or compensation need be done.
2336          */
2337         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
2338         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
2339         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
2340                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
2341                 use_scaling = 1;
2342         }
2343         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
2344 }
2345
2346 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
2347 {
2348         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
2349                                       vcpu->arch.virtual_tsc_mult,
2350                                       vcpu->arch.virtual_tsc_shift);
2351         tsc += vcpu->arch.this_tsc_write;
2352         return tsc;
2353 }
2354
2355 static inline int gtod_is_based_on_tsc(int mode)
2356 {
2357         return mode == VDSO_CLOCKMODE_TSC || mode == VDSO_CLOCKMODE_HVCLOCK;
2358 }
2359
2360 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
2361 {
2362 #ifdef CONFIG_X86_64
2363         bool vcpus_matched;
2364         struct kvm_arch *ka = &vcpu->kvm->arch;
2365         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2366
2367         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2368                          atomic_read(&vcpu->kvm->online_vcpus));
2369
2370         /*
2371          * Once the masterclock is enabled, always perform request in
2372          * order to update it.
2373          *
2374          * In order to enable masterclock, the host clocksource must be TSC
2375          * and the vcpus need to have matched TSCs.  When that happens,
2376          * perform request to enable masterclock.
2377          */
2378         if (ka->use_master_clock ||
2379             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
2380                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2381
2382         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
2383                             atomic_read(&vcpu->kvm->online_vcpus),
2384                             ka->use_master_clock, gtod->clock.vclock_mode);
2385 #endif
2386 }
2387
2388 /*
2389  * Multiply tsc by a fixed point number represented by ratio.
2390  *
2391  * The most significant 64-N bits (mult) of ratio represent the
2392  * integral part of the fixed point number; the remaining N bits
2393  * (frac) represent the fractional part, ie. ratio represents a fixed
2394  * point number (mult + frac * 2^(-N)).
2395  *
2396  * N equals to kvm_tsc_scaling_ratio_frac_bits.
2397  */
2398 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
2399 {
2400         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
2401 }
2402
2403 u64 kvm_scale_tsc(u64 tsc, u64 ratio)
2404 {
2405         u64 _tsc = tsc;
2406
2407         if (ratio != kvm_default_tsc_scaling_ratio)
2408                 _tsc = __scale_tsc(ratio, tsc);
2409
2410         return _tsc;
2411 }
2412 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
2413
2414 static u64 kvm_compute_l1_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
2415 {
2416         u64 tsc;
2417
2418         tsc = kvm_scale_tsc(rdtsc(), vcpu->arch.l1_tsc_scaling_ratio);
2419
2420         return target_tsc - tsc;
2421 }
2422
2423 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
2424 {
2425         return vcpu->arch.l1_tsc_offset +
2426                 kvm_scale_tsc(host_tsc, vcpu->arch.l1_tsc_scaling_ratio);
2427 }
2428 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
2429
2430 u64 kvm_calc_nested_tsc_offset(u64 l1_offset, u64 l2_offset, u64 l2_multiplier)
2431 {
2432         u64 nested_offset;
2433
2434         if (l2_multiplier == kvm_default_tsc_scaling_ratio)
2435                 nested_offset = l1_offset;
2436         else
2437                 nested_offset = mul_s64_u64_shr((s64) l1_offset, l2_multiplier,
2438                                                 kvm_tsc_scaling_ratio_frac_bits);
2439
2440         nested_offset += l2_offset;
2441         return nested_offset;
2442 }
2443 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_offset);
2444
2445 u64 kvm_calc_nested_tsc_multiplier(u64 l1_multiplier, u64 l2_multiplier)
2446 {
2447         if (l2_multiplier != kvm_default_tsc_scaling_ratio)
2448                 return mul_u64_u64_shr(l1_multiplier, l2_multiplier,
2449                                        kvm_tsc_scaling_ratio_frac_bits);
2450
2451         return l1_multiplier;
2452 }
2453 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_multiplier);
2454
2455 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 l1_offset)
2456 {
2457         trace_kvm_write_tsc_offset(vcpu->vcpu_id,
2458                                    vcpu->arch.l1_tsc_offset,
2459                                    l1_offset);
2460
2461         vcpu->arch.l1_tsc_offset = l1_offset;
2462
2463         /*
2464          * If we are here because L1 chose not to trap WRMSR to TSC then
2465          * according to the spec this should set L1's TSC (as opposed to
2466          * setting L1's offset for L2).
2467          */
2468         if (is_guest_mode(vcpu))
2469                 vcpu->arch.tsc_offset = kvm_calc_nested_tsc_offset(
2470                         l1_offset,
2471                         static_call(kvm_x86_get_l2_tsc_offset)(vcpu),
2472                         static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2473         else
2474                 vcpu->arch.tsc_offset = l1_offset;
2475
2476         static_call(kvm_x86_write_tsc_offset)(vcpu, vcpu->arch.tsc_offset);
2477 }
2478
2479 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier)
2480 {
2481         vcpu->arch.l1_tsc_scaling_ratio = l1_multiplier;
2482
2483         /* Userspace is changing the multiplier while L2 is active */
2484         if (is_guest_mode(vcpu))
2485                 vcpu->arch.tsc_scaling_ratio = kvm_calc_nested_tsc_multiplier(
2486                         l1_multiplier,
2487                         static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2488         else
2489                 vcpu->arch.tsc_scaling_ratio = l1_multiplier;
2490
2491         if (kvm_has_tsc_control)
2492                 static_call(kvm_x86_write_tsc_multiplier)(
2493                         vcpu, vcpu->arch.tsc_scaling_ratio);
2494 }
2495
2496 static inline bool kvm_check_tsc_unstable(void)
2497 {
2498 #ifdef CONFIG_X86_64
2499         /*
2500          * TSC is marked unstable when we're running on Hyper-V,
2501          * 'TSC page' clocksource is good.
2502          */
2503         if (pvclock_gtod_data.clock.vclock_mode == VDSO_CLOCKMODE_HVCLOCK)
2504                 return false;
2505 #endif
2506         return check_tsc_unstable();
2507 }
2508
2509 /*
2510  * Infers attempts to synchronize the guest's tsc from host writes. Sets the
2511  * offset for the vcpu and tracks the TSC matching generation that the vcpu
2512  * participates in.
2513  */
2514 static void __kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 offset, u64 tsc,
2515                                   u64 ns, bool matched)
2516 {
2517         struct kvm *kvm = vcpu->kvm;
2518
2519         lockdep_assert_held(&kvm->arch.tsc_write_lock);
2520
2521         /*
2522          * We also track th most recent recorded KHZ, write and time to
2523          * allow the matching interval to be extended at each write.
2524          */
2525         kvm->arch.last_tsc_nsec = ns;
2526         kvm->arch.last_tsc_write = tsc;
2527         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2528         kvm->arch.last_tsc_offset = offset;
2529
2530         vcpu->arch.last_guest_tsc = tsc;
2531
2532         kvm_vcpu_write_tsc_offset(vcpu, offset);
2533
2534         if (!matched) {
2535                 /*
2536                  * We split periods of matched TSC writes into generations.
2537                  * For each generation, we track the original measured
2538                  * nanosecond time, offset, and write, so if TSCs are in
2539                  * sync, we can match exact offset, and if not, we can match
2540                  * exact software computation in compute_guest_tsc()
2541                  *
2542                  * These values are tracked in kvm->arch.cur_xxx variables.
2543                  */
2544                 kvm->arch.cur_tsc_generation++;
2545                 kvm->arch.cur_tsc_nsec = ns;
2546                 kvm->arch.cur_tsc_write = tsc;
2547                 kvm->arch.cur_tsc_offset = offset;
2548                 kvm->arch.nr_vcpus_matched_tsc = 0;
2549         } else if (vcpu->arch.this_tsc_generation != kvm->arch.cur_tsc_generation) {
2550                 kvm->arch.nr_vcpus_matched_tsc++;
2551         }
2552
2553         /* Keep track of which generation this VCPU has synchronized to */
2554         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2555         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2556         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2557
2558         kvm_track_tsc_matching(vcpu);
2559 }
2560
2561 static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 data)
2562 {
2563         struct kvm *kvm = vcpu->kvm;
2564         u64 offset, ns, elapsed;
2565         unsigned long flags;
2566         bool matched = false;
2567         bool synchronizing = false;
2568
2569         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
2570         offset = kvm_compute_l1_tsc_offset(vcpu, data);
2571         ns = get_kvmclock_base_ns();
2572         elapsed = ns - kvm->arch.last_tsc_nsec;
2573
2574         if (vcpu->arch.virtual_tsc_khz) {
2575                 if (data == 0) {
2576                         /*
2577                          * detection of vcpu initialization -- need to sync
2578                          * with other vCPUs. This particularly helps to keep
2579                          * kvm_clock stable after CPU hotplug
2580                          */
2581                         synchronizing = true;
2582                 } else {
2583                         u64 tsc_exp = kvm->arch.last_tsc_write +
2584                                                 nsec_to_cycles(vcpu, elapsed);
2585                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
2586                         /*
2587                          * Special case: TSC write with a small delta (1 second)
2588                          * of virtual cycle time against real time is
2589                          * interpreted as an attempt to synchronize the CPU.
2590                          */
2591                         synchronizing = data < tsc_exp + tsc_hz &&
2592                                         data + tsc_hz > tsc_exp;
2593                 }
2594         }
2595
2596         /*
2597          * For a reliable TSC, we can match TSC offsets, and for an unstable
2598          * TSC, we add elapsed time in this computation.  We could let the
2599          * compensation code attempt to catch up if we fall behind, but
2600          * it's better to try to match offsets from the beginning.
2601          */
2602         if (synchronizing &&
2603             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
2604                 if (!kvm_check_tsc_unstable()) {
2605                         offset = kvm->arch.cur_tsc_offset;
2606                 } else {
2607                         u64 delta = nsec_to_cycles(vcpu, elapsed);
2608                         data += delta;
2609                         offset = kvm_compute_l1_tsc_offset(vcpu, data);
2610                 }
2611                 matched = true;
2612         }
2613
2614         __kvm_synchronize_tsc(vcpu, offset, data, ns, matched);
2615         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2616 }
2617
2618 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2619                                            s64 adjustment)
2620 {
2621         u64 tsc_offset = vcpu->arch.l1_tsc_offset;
2622         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2623 }
2624
2625 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2626 {
2627         if (vcpu->arch.l1_tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
2628                 WARN_ON(adjustment < 0);
2629         adjustment = kvm_scale_tsc((u64) adjustment,
2630                                    vcpu->arch.l1_tsc_scaling_ratio);
2631         adjust_tsc_offset_guest(vcpu, adjustment);
2632 }
2633
2634 #ifdef CONFIG_X86_64
2635
2636 static u64 read_tsc(void)
2637 {
2638         u64 ret = (u64)rdtsc_ordered();
2639         u64 last = pvclock_gtod_data.clock.cycle_last;
2640
2641         if (likely(ret >= last))
2642                 return ret;
2643
2644         /*
2645          * GCC likes to generate cmov here, but this branch is extremely
2646          * predictable (it's just a function of time and the likely is
2647          * very likely) and there's a data dependence, so force GCC
2648          * to generate a branch instead.  I don't barrier() because
2649          * we don't actually need a barrier, and if this function
2650          * ever gets inlined it will generate worse code.
2651          */
2652         asm volatile ("");
2653         return last;
2654 }
2655
2656 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2657                           int *mode)
2658 {
2659         long v;
2660         u64 tsc_pg_val;
2661
2662         switch (clock->vclock_mode) {
2663         case VDSO_CLOCKMODE_HVCLOCK:
2664                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2665                                                   tsc_timestamp);
2666                 if (tsc_pg_val != U64_MAX) {
2667                         /* TSC page valid */
2668                         *mode = VDSO_CLOCKMODE_HVCLOCK;
2669                         v = (tsc_pg_val - clock->cycle_last) &
2670                                 clock->mask;
2671                 } else {
2672                         /* TSC page invalid */
2673                         *mode = VDSO_CLOCKMODE_NONE;
2674                 }
2675                 break;
2676         case VDSO_CLOCKMODE_TSC:
2677                 *mode = VDSO_CLOCKMODE_TSC;
2678                 *tsc_timestamp = read_tsc();
2679                 v = (*tsc_timestamp - clock->cycle_last) &
2680                         clock->mask;
2681                 break;
2682         default:
2683                 *mode = VDSO_CLOCKMODE_NONE;
2684         }
2685
2686         if (*mode == VDSO_CLOCKMODE_NONE)
2687                 *tsc_timestamp = v = 0;
2688
2689         return v * clock->mult;
2690 }
2691
2692 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2693 {
2694         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2695         unsigned long seq;
2696         int mode;
2697         u64 ns;
2698
2699         do {
2700                 seq = read_seqcount_begin(&gtod->seq);
2701                 ns = gtod->raw_clock.base_cycles;
2702                 ns += vgettsc(&gtod->raw_clock, tsc_timestamp, &mode);
2703                 ns >>= gtod->raw_clock.shift;
2704                 ns += ktime_to_ns(ktime_add(gtod->raw_clock.offset, gtod->offs_boot));
2705         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2706         *t = ns;
2707
2708         return mode;
2709 }
2710
2711 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2712 {
2713         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2714         unsigned long seq;
2715         int mode;
2716         u64 ns;
2717
2718         do {
2719                 seq = read_seqcount_begin(&gtod->seq);
2720                 ts->tv_sec = gtod->wall_time_sec;
2721                 ns = gtod->clock.base_cycles;
2722                 ns += vgettsc(&gtod->clock, tsc_timestamp, &mode);
2723                 ns >>= gtod->clock.shift;
2724         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2725
2726         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2727         ts->tv_nsec = ns;
2728
2729         return mode;
2730 }
2731
2732 /* returns true if host is using TSC based clocksource */
2733 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2734 {
2735         /* checked again under seqlock below */
2736         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2737                 return false;
2738
2739         return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2740                                                       tsc_timestamp));
2741 }
2742
2743 /* returns true if host is using TSC based clocksource */
2744 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2745                                            u64 *tsc_timestamp)
2746 {
2747         /* checked again under seqlock below */
2748         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2749                 return false;
2750
2751         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2752 }
2753 #endif
2754
2755 /*
2756  *
2757  * Assuming a stable TSC across physical CPUS, and a stable TSC
2758  * across virtual CPUs, the following condition is possible.
2759  * Each numbered line represents an event visible to both
2760  * CPUs at the next numbered event.
2761  *
2762  * "timespecX" represents host monotonic time. "tscX" represents
2763  * RDTSC value.
2764  *
2765  *              VCPU0 on CPU0           |       VCPU1 on CPU1
2766  *
2767  * 1.  read timespec0,tsc0
2768  * 2.                                   | timespec1 = timespec0 + N
2769  *                                      | tsc1 = tsc0 + M
2770  * 3. transition to guest               | transition to guest
2771  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2772  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2773  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2774  *
2775  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2776  *
2777  *      - ret0 < ret1
2778  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2779  *              ...
2780  *      - 0 < N - M => M < N
2781  *
2782  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2783  * always the case (the difference between two distinct xtime instances
2784  * might be smaller then the difference between corresponding TSC reads,
2785  * when updating guest vcpus pvclock areas).
2786  *
2787  * To avoid that problem, do not allow visibility of distinct
2788  * system_timestamp/tsc_timestamp values simultaneously: use a master
2789  * copy of host monotonic time values. Update that master copy
2790  * in lockstep.
2791  *
2792  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2793  *
2794  */
2795
2796 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2797 {
2798 #ifdef CONFIG_X86_64
2799         struct kvm_arch *ka = &kvm->arch;
2800         int vclock_mode;
2801         bool host_tsc_clocksource, vcpus_matched;
2802
2803         lockdep_assert_held(&kvm->arch.tsc_write_lock);
2804         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2805                         atomic_read(&kvm->online_vcpus));
2806
2807         /*
2808          * If the host uses TSC clock, then passthrough TSC as stable
2809          * to the guest.
2810          */
2811         host_tsc_clocksource = kvm_get_time_and_clockread(
2812                                         &ka->master_kernel_ns,
2813                                         &ka->master_cycle_now);
2814
2815         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2816                                 && !ka->backwards_tsc_observed
2817                                 && !ka->boot_vcpu_runs_old_kvmclock;
2818
2819         if (ka->use_master_clock)
2820                 atomic_set(&kvm_guest_has_master_clock, 1);
2821
2822         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2823         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2824                                         vcpus_matched);
2825 #endif
2826 }
2827
2828 static void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2829 {
2830         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2831 }
2832
2833 static void __kvm_start_pvclock_update(struct kvm *kvm)
2834 {
2835         raw_spin_lock_irq(&kvm->arch.tsc_write_lock);
2836         write_seqcount_begin(&kvm->arch.pvclock_sc);
2837 }
2838
2839 static void kvm_start_pvclock_update(struct kvm *kvm)
2840 {
2841         kvm_make_mclock_inprogress_request(kvm);
2842
2843         /* no guest entries from this point */
2844         __kvm_start_pvclock_update(kvm);
2845 }
2846
2847 static void kvm_end_pvclock_update(struct kvm *kvm)
2848 {
2849         struct kvm_arch *ka = &kvm->arch;
2850         struct kvm_vcpu *vcpu;
2851         unsigned long i;
2852
2853         write_seqcount_end(&ka->pvclock_sc);
2854         raw_spin_unlock_irq(&ka->tsc_write_lock);
2855         kvm_for_each_vcpu(i, vcpu, kvm)
2856                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2857
2858         /* guest entries allowed */
2859         kvm_for_each_vcpu(i, vcpu, kvm)
2860                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2861 }
2862
2863 static void kvm_update_masterclock(struct kvm *kvm)
2864 {
2865         kvm_hv_invalidate_tsc_page(kvm);
2866         kvm_start_pvclock_update(kvm);
2867         pvclock_update_vm_gtod_copy(kvm);
2868         kvm_end_pvclock_update(kvm);
2869 }
2870
2871 /* Called within read_seqcount_begin/retry for kvm->pvclock_sc.  */
2872 static void __get_kvmclock(struct kvm *kvm, struct kvm_clock_data *data)
2873 {
2874         struct kvm_arch *ka = &kvm->arch;
2875         struct pvclock_vcpu_time_info hv_clock;
2876
2877         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2878         get_cpu();
2879
2880         data->flags = 0;
2881         if (ka->use_master_clock && __this_cpu_read(cpu_tsc_khz)) {
2882 #ifdef CONFIG_X86_64
2883                 struct timespec64 ts;
2884
2885                 if (kvm_get_walltime_and_clockread(&ts, &data->host_tsc)) {
2886                         data->realtime = ts.tv_nsec + NSEC_PER_SEC * ts.tv_sec;
2887                         data->flags |= KVM_CLOCK_REALTIME | KVM_CLOCK_HOST_TSC;
2888                 } else
2889 #endif
2890                 data->host_tsc = rdtsc();
2891
2892                 data->flags |= KVM_CLOCK_TSC_STABLE;
2893                 hv_clock.tsc_timestamp = ka->master_cycle_now;
2894                 hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2895                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2896                                    &hv_clock.tsc_shift,
2897                                    &hv_clock.tsc_to_system_mul);
2898                 data->clock = __pvclock_read_cycles(&hv_clock, data->host_tsc);
2899         } else {
2900                 data->clock = get_kvmclock_base_ns() + ka->kvmclock_offset;
2901         }
2902
2903         put_cpu();
2904 }
2905
2906 static void get_kvmclock(struct kvm *kvm, struct kvm_clock_data *data)
2907 {
2908         struct kvm_arch *ka = &kvm->arch;
2909         unsigned seq;
2910
2911         do {
2912                 seq = read_seqcount_begin(&ka->pvclock_sc);
2913                 __get_kvmclock(kvm, data);
2914         } while (read_seqcount_retry(&ka->pvclock_sc, seq));
2915 }
2916
2917 u64 get_kvmclock_ns(struct kvm *kvm)
2918 {
2919         struct kvm_clock_data data;
2920
2921         get_kvmclock(kvm, &data);
2922         return data.clock;
2923 }
2924
2925 static void kvm_setup_pvclock_page(struct kvm_vcpu *v,
2926                                    struct gfn_to_hva_cache *cache,
2927                                    unsigned int offset)
2928 {
2929         struct kvm_vcpu_arch *vcpu = &v->arch;
2930         struct pvclock_vcpu_time_info guest_hv_clock;
2931
2932         if (unlikely(kvm_read_guest_offset_cached(v->kvm, cache,
2933                 &guest_hv_clock, offset, sizeof(guest_hv_clock))))
2934                 return;
2935
2936         /* This VCPU is paused, but it's legal for a guest to read another
2937          * VCPU's kvmclock, so we really have to follow the specification where
2938          * it says that version is odd if data is being modified, and even after
2939          * it is consistent.
2940          *
2941          * Version field updates must be kept separate.  This is because
2942          * kvm_write_guest_cached might use a "rep movs" instruction, and
2943          * writes within a string instruction are weakly ordered.  So there
2944          * are three writes overall.
2945          *
2946          * As a small optimization, only write the version field in the first
2947          * and third write.  The vcpu->pv_time cache is still valid, because the
2948          * version field is the first in the struct.
2949          */
2950         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2951
2952         if (guest_hv_clock.version & 1)
2953                 ++guest_hv_clock.version;  /* first time write, random junk */
2954
2955         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2956         kvm_write_guest_offset_cached(v->kvm, cache,
2957                                       &vcpu->hv_clock, offset,
2958                                       sizeof(vcpu->hv_clock.version));
2959
2960         smp_wmb();
2961
2962         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2963         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2964
2965         if (vcpu->pvclock_set_guest_stopped_request) {
2966                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2967                 vcpu->pvclock_set_guest_stopped_request = false;
2968         }
2969
2970         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2971
2972         kvm_write_guest_offset_cached(v->kvm, cache,
2973                                       &vcpu->hv_clock, offset,
2974                                       sizeof(vcpu->hv_clock));
2975
2976         smp_wmb();
2977
2978         vcpu->hv_clock.version++;
2979         kvm_write_guest_offset_cached(v->kvm, cache,
2980                                      &vcpu->hv_clock, offset,
2981                                      sizeof(vcpu->hv_clock.version));
2982 }
2983
2984 static int kvm_guest_time_update(struct kvm_vcpu *v)
2985 {
2986         unsigned long flags, tgt_tsc_khz;
2987         unsigned seq;
2988         struct kvm_vcpu_arch *vcpu = &v->arch;
2989         struct kvm_arch *ka = &v->kvm->arch;
2990         s64 kernel_ns;
2991         u64 tsc_timestamp, host_tsc;
2992         u8 pvclock_flags;
2993         bool use_master_clock;
2994
2995         kernel_ns = 0;
2996         host_tsc = 0;
2997
2998         /*
2999          * If the host uses TSC clock, then passthrough TSC as stable
3000          * to the guest.
3001          */
3002         do {
3003                 seq = read_seqcount_begin(&ka->pvclock_sc);
3004                 use_master_clock = ka->use_master_clock;
3005                 if (use_master_clock) {
3006                         host_tsc = ka->master_cycle_now;
3007                         kernel_ns = ka->master_kernel_ns;
3008                 }
3009         } while (read_seqcount_retry(&ka->pvclock_sc, seq));
3010
3011         /* Keep irq disabled to prevent changes to the clock */
3012         local_irq_save(flags);
3013         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
3014         if (unlikely(tgt_tsc_khz == 0)) {
3015                 local_irq_restore(flags);
3016                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
3017                 return 1;
3018         }
3019         if (!use_master_clock) {
3020                 host_tsc = rdtsc();
3021                 kernel_ns = get_kvmclock_base_ns();
3022         }
3023
3024         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
3025
3026         /*
3027          * We may have to catch up the TSC to match elapsed wall clock
3028          * time for two reasons, even if kvmclock is used.
3029          *   1) CPU could have been running below the maximum TSC rate
3030          *   2) Broken TSC compensation resets the base at each VCPU
3031          *      entry to avoid unknown leaps of TSC even when running
3032          *      again on the same CPU.  This may cause apparent elapsed
3033          *      time to disappear, and the guest to stand still or run
3034          *      very slowly.
3035          */
3036         if (vcpu->tsc_catchup) {
3037                 u64 tsc = compute_guest_tsc(v, kernel_ns);
3038                 if (tsc > tsc_timestamp) {
3039                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
3040                         tsc_timestamp = tsc;
3041                 }
3042         }
3043
3044         local_irq_restore(flags);
3045
3046         /* With all the info we got, fill in the values */
3047
3048         if (kvm_has_tsc_control)
3049                 tgt_tsc_khz = kvm_scale_tsc(tgt_tsc_khz,
3050                                             v->arch.l1_tsc_scaling_ratio);
3051
3052         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
3053                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
3054                                    &vcpu->hv_clock.tsc_shift,
3055                                    &vcpu->hv_clock.tsc_to_system_mul);
3056                 vcpu->hw_tsc_khz = tgt_tsc_khz;
3057         }
3058
3059         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
3060         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
3061         vcpu->last_guest_tsc = tsc_timestamp;
3062
3063         /* If the host uses TSC clocksource, then it is stable */
3064         pvclock_flags = 0;
3065         if (use_master_clock)
3066                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
3067
3068         vcpu->hv_clock.flags = pvclock_flags;
3069
3070         if (vcpu->pv_time_enabled)
3071                 kvm_setup_pvclock_page(v, &vcpu->pv_time, 0);
3072         if (vcpu->xen.vcpu_info_set)
3073                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_info_cache,
3074                                        offsetof(struct compat_vcpu_info, time));
3075         if (vcpu->xen.vcpu_time_info_set)
3076                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_time_info_cache, 0);
3077         if (!v->vcpu_idx)
3078                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
3079         return 0;
3080 }
3081
3082 /*
3083  * kvmclock updates which are isolated to a given vcpu, such as
3084  * vcpu->cpu migration, should not allow system_timestamp from
3085  * the rest of the vcpus to remain static. Otherwise ntp frequency
3086  * correction applies to one vcpu's system_timestamp but not
3087  * the others.
3088  *
3089  * So in those cases, request a kvmclock update for all vcpus.
3090  * We need to rate-limit these requests though, as they can
3091  * considerably slow guests that have a large number of vcpus.
3092  * The time for a remote vcpu to update its kvmclock is bound
3093  * by the delay we use to rate-limit the updates.
3094  */
3095
3096 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
3097
3098 static void kvmclock_update_fn(struct work_struct *work)
3099 {
3100         unsigned long i;
3101         struct delayed_work *dwork = to_delayed_work(work);
3102         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
3103                                            kvmclock_update_work);
3104         struct kvm *kvm = container_of(ka, struct kvm, arch);
3105         struct kvm_vcpu *vcpu;
3106
3107         kvm_for_each_vcpu(i, vcpu, kvm) {
3108                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3109                 kvm_vcpu_kick(vcpu);
3110         }
3111 }
3112
3113 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
3114 {
3115         struct kvm *kvm = v->kvm;
3116
3117         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
3118         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
3119                                         KVMCLOCK_UPDATE_DELAY);
3120 }
3121
3122 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
3123
3124 static void kvmclock_sync_fn(struct work_struct *work)
3125 {
3126         struct delayed_work *dwork = to_delayed_work(work);
3127         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
3128                                            kvmclock_sync_work);
3129         struct kvm *kvm = container_of(ka, struct kvm, arch);
3130
3131         if (!kvmclock_periodic_sync)
3132                 return;
3133
3134         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
3135         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
3136                                         KVMCLOCK_SYNC_PERIOD);
3137 }
3138
3139 /*
3140  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
3141  */
3142 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
3143 {
3144         /* McStatusWrEn enabled? */
3145         if (guest_cpuid_is_amd_or_hygon(vcpu))
3146                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
3147
3148         return false;
3149 }
3150
3151 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3152 {
3153         u64 mcg_cap = vcpu->arch.mcg_cap;
3154         unsigned bank_num = mcg_cap & 0xff;
3155         u32 msr = msr_info->index;
3156         u64 data = msr_info->data;
3157
3158         switch (msr) {
3159         case MSR_IA32_MCG_STATUS:
3160                 vcpu->arch.mcg_status = data;
3161                 break;
3162         case MSR_IA32_MCG_CTL:
3163                 if (!(mcg_cap & MCG_CTL_P) &&
3164                     (data || !msr_info->host_initiated))
3165                         return 1;
3166                 if (data != 0 && data != ~(u64)0)
3167                         return 1;
3168                 vcpu->arch.mcg_ctl = data;
3169                 break;
3170         default:
3171                 if (msr >= MSR_IA32_MC0_CTL &&
3172                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3173                         u32 offset = array_index_nospec(
3174                                 msr - MSR_IA32_MC0_CTL,
3175                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3176
3177                         /* only 0 or all 1s can be written to IA32_MCi_CTL
3178                          * some Linux kernels though clear bit 10 in bank 4 to
3179                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
3180                          * this to avoid an uncatched #GP in the guest
3181                          */
3182                         if ((offset & 0x3) == 0 &&
3183                             data != 0 && (data | (1 << 10)) != ~(u64)0)
3184                                 return -1;
3185
3186                         /* MCi_STATUS */
3187                         if (!msr_info->host_initiated &&
3188                             (offset & 0x3) == 1 && data != 0) {
3189                                 if (!can_set_mci_status(vcpu))
3190                                         return -1;
3191                         }
3192
3193                         vcpu->arch.mce_banks[offset] = data;
3194                         break;
3195                 }
3196                 return 1;
3197         }
3198         return 0;
3199 }
3200
3201 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu)
3202 {
3203         u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT;
3204
3205         return (vcpu->arch.apf.msr_en_val & mask) == mask;
3206 }
3207
3208 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
3209 {
3210         gpa_t gpa = data & ~0x3f;
3211
3212         /* Bits 4:5 are reserved, Should be zero */
3213         if (data & 0x30)
3214                 return 1;
3215
3216         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_VMEXIT) &&
3217             (data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT))
3218                 return 1;
3219
3220         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT) &&
3221             (data & KVM_ASYNC_PF_DELIVERY_AS_INT))
3222                 return 1;
3223
3224         if (!lapic_in_kernel(vcpu))
3225                 return data ? 1 : 0;
3226
3227         vcpu->arch.apf.msr_en_val = data;
3228
3229         if (!kvm_pv_async_pf_enabled(vcpu)) {
3230                 kvm_clear_async_pf_completion_queue(vcpu);
3231                 kvm_async_pf_hash_reset(vcpu);
3232                 return 0;
3233         }
3234
3235         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
3236                                         sizeof(u64)))
3237                 return 1;
3238
3239         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
3240         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
3241
3242         kvm_async_pf_wakeup_all(vcpu);
3243
3244         return 0;
3245 }
3246
3247 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu *vcpu, u64 data)
3248 {
3249         /* Bits 8-63 are reserved */
3250         if (data >> 8)
3251                 return 1;
3252
3253         if (!lapic_in_kernel(vcpu))
3254                 return 1;
3255
3256         vcpu->arch.apf.msr_int_val = data;
3257
3258         vcpu->arch.apf.vec = data & KVM_ASYNC_PF_VEC_MASK;
3259
3260         return 0;
3261 }
3262
3263 static void kvmclock_reset(struct kvm_vcpu *vcpu)
3264 {
3265         vcpu->arch.pv_time_enabled = false;
3266         vcpu->arch.time = 0;
3267 }
3268
3269 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu *vcpu)
3270 {
3271         ++vcpu->stat.tlb_flush;
3272         static_call(kvm_x86_flush_tlb_all)(vcpu);
3273 }
3274
3275 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu)
3276 {
3277         ++vcpu->stat.tlb_flush;
3278
3279         if (!tdp_enabled) {
3280                 /*
3281                  * A TLB flush on behalf of the guest is equivalent to
3282                  * INVPCID(all), toggling CR4.PGE, etc., which requires
3283                  * a forced sync of the shadow page tables.  Ensure all the
3284                  * roots are synced and the guest TLB in hardware is clean.
3285                  */
3286                 kvm_mmu_sync_roots(vcpu);
3287                 kvm_mmu_sync_prev_roots(vcpu);
3288         }
3289
3290         static_call(kvm_x86_flush_tlb_guest)(vcpu);
3291 }
3292
3293
3294 static inline void kvm_vcpu_flush_tlb_current(struct kvm_vcpu *vcpu)
3295 {
3296         ++vcpu->stat.tlb_flush;
3297         static_call(kvm_x86_flush_tlb_current)(vcpu);
3298 }
3299
3300 /*
3301  * Service "local" TLB flush requests, which are specific to the current MMU
3302  * context.  In addition to the generic event handling in vcpu_enter_guest(),
3303  * TLB flushes that are targeted at an MMU context also need to be serviced
3304  * prior before nested VM-Enter/VM-Exit.
3305  */
3306 void kvm_service_local_tlb_flush_requests(struct kvm_vcpu *vcpu)
3307 {
3308         if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu))
3309                 kvm_vcpu_flush_tlb_current(vcpu);
3310
3311         if (kvm_check_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu))
3312                 kvm_vcpu_flush_tlb_guest(vcpu);
3313 }
3314 EXPORT_SYMBOL_GPL(kvm_service_local_tlb_flush_requests);
3315
3316 static void record_steal_time(struct kvm_vcpu *vcpu)
3317 {
3318         struct gfn_to_hva_cache *ghc = &vcpu->arch.st.cache;
3319         struct kvm_steal_time __user *st;
3320         struct kvm_memslots *slots;
3321         u64 steal;
3322         u32 version;
3323
3324         if (kvm_xen_msr_enabled(vcpu->kvm)) {
3325                 kvm_xen_runstate_set_running(vcpu);
3326                 return;
3327         }
3328
3329         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3330                 return;
3331
3332         if (WARN_ON_ONCE(current->mm != vcpu->kvm->mm))
3333                 return;
3334
3335         slots = kvm_memslots(vcpu->kvm);
3336
3337         if (unlikely(slots->generation != ghc->generation ||
3338                      kvm_is_error_hva(ghc->hva) || !ghc->memslot)) {
3339                 gfn_t gfn = vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS;
3340
3341                 /* We rely on the fact that it fits in a single page. */
3342                 BUILD_BUG_ON((sizeof(*st) - 1) & KVM_STEAL_VALID_BITS);
3343
3344                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, ghc, gfn, sizeof(*st)) ||
3345                     kvm_is_error_hva(ghc->hva) || !ghc->memslot)
3346                         return;
3347         }
3348
3349         st = (struct kvm_steal_time __user *)ghc->hva;
3350         /*
3351          * Doing a TLB flush here, on the guest's behalf, can avoid
3352          * expensive IPIs.
3353          */
3354         if (guest_pv_has(vcpu, KVM_FEATURE_PV_TLB_FLUSH)) {
3355                 u8 st_preempted = 0;
3356                 int err = -EFAULT;
3357
3358                 if (!user_access_begin(st, sizeof(*st)))
3359                         return;
3360
3361                 asm volatile("1: xchgb %0, %2\n"
3362                              "xor %1, %1\n"
3363                              "2:\n"
3364                              _ASM_EXTABLE_UA(1b, 2b)
3365                              : "+q" (st_preempted),
3366                                "+&r" (err),
3367                                "+m" (st->preempted));
3368                 if (err)
3369                         goto out;
3370
3371                 user_access_end();
3372
3373                 vcpu->arch.st.preempted = 0;
3374
3375                 trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
3376                                        st_preempted & KVM_VCPU_FLUSH_TLB);
3377                 if (st_preempted & KVM_VCPU_FLUSH_TLB)
3378                         kvm_vcpu_flush_tlb_guest(vcpu);
3379
3380                 if (!user_access_begin(st, sizeof(*st)))
3381                         goto dirty;
3382         } else {
3383                 if (!user_access_begin(st, sizeof(*st)))
3384                         return;
3385
3386                 unsafe_put_user(0, &st->preempted, out);
3387                 vcpu->arch.st.preempted = 0;
3388         }
3389
3390         unsafe_get_user(version, &st->version, out);
3391         if (version & 1)
3392                 version += 1;  /* first time write, random junk */
3393
3394         version += 1;
3395         unsafe_put_user(version, &st->version, out);
3396
3397         smp_wmb();
3398
3399         unsafe_get_user(steal, &st->steal, out);
3400         steal += current->sched_info.run_delay -
3401                 vcpu->arch.st.last_steal;
3402         vcpu->arch.st.last_steal = current->sched_info.run_delay;
3403         unsafe_put_user(steal, &st->steal, out);
3404
3405         version += 1;
3406         unsafe_put_user(version, &st->version, out);
3407
3408  out:
3409         user_access_end();
3410  dirty:
3411         mark_page_dirty_in_slot(vcpu->kvm, ghc->memslot, gpa_to_gfn(ghc->gpa));
3412 }
3413
3414 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3415 {
3416         bool pr = false;
3417         u32 msr = msr_info->index;
3418         u64 data = msr_info->data;
3419
3420         if (msr && msr == vcpu->kvm->arch.xen_hvm_config.msr)
3421                 return kvm_xen_write_hypercall_page(vcpu, data);
3422
3423         switch (msr) {
3424         case MSR_AMD64_NB_CFG:
3425         case MSR_IA32_UCODE_WRITE:
3426         case MSR_VM_HSAVE_PA:
3427         case MSR_AMD64_PATCH_LOADER:
3428         case MSR_AMD64_BU_CFG2:
3429         case MSR_AMD64_DC_CFG:
3430         case MSR_F15H_EX_CFG:
3431                 break;
3432
3433         case MSR_IA32_UCODE_REV:
3434                 if (msr_info->host_initiated)
3435                         vcpu->arch.microcode_version = data;
3436                 break;
3437         case MSR_IA32_ARCH_CAPABILITIES:
3438                 if (!msr_info->host_initiated)
3439                         return 1;
3440                 vcpu->arch.arch_capabilities = data;
3441                 break;
3442         case MSR_IA32_PERF_CAPABILITIES: {
3443                 struct kvm_msr_entry msr_ent = {.index = msr, .data = 0};
3444
3445                 if (!msr_info->host_initiated)
3446                         return 1;
3447                 if (kvm_get_msr_feature(&msr_ent))
3448                         return 1;
3449                 if (data & ~msr_ent.data)
3450                         return 1;
3451
3452                 vcpu->arch.perf_capabilities = data;
3453
3454                 return 0;
3455                 }
3456         case MSR_EFER:
3457                 return set_efer(vcpu, msr_info);
3458         case MSR_K7_HWCR:
3459                 data &= ~(u64)0x40;     /* ignore flush filter disable */
3460                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
3461                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
3462
3463                 /* Handle McStatusWrEn */
3464                 if (data == BIT_ULL(18)) {
3465                         vcpu->arch.msr_hwcr = data;
3466                 } else if (data != 0) {
3467                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
3468                                     data);
3469                         return 1;
3470                 }
3471                 break;
3472         case MSR_FAM10H_MMIO_CONF_BASE:
3473                 if (data != 0) {
3474                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
3475                                     "0x%llx\n", data);
3476                         return 1;
3477                 }
3478                 break;
3479         case 0x200 ... 0x2ff:
3480                 return kvm_mtrr_set_msr(vcpu, msr, data);
3481         case MSR_IA32_APICBASE:
3482                 return kvm_set_apic_base(vcpu, msr_info);
3483         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3484                 return kvm_x2apic_msr_write(vcpu, msr, data);
3485         case MSR_IA32_TSC_DEADLINE:
3486                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
3487                 break;
3488         case MSR_IA32_TSC_ADJUST:
3489                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
3490                         if (!msr_info->host_initiated) {
3491                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
3492                                 adjust_tsc_offset_guest(vcpu, adj);
3493                                 /* Before back to guest, tsc_timestamp must be adjusted
3494                                  * as well, otherwise guest's percpu pvclock time could jump.
3495                                  */
3496                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3497                         }
3498                         vcpu->arch.ia32_tsc_adjust_msr = data;
3499                 }
3500                 break;
3501         case MSR_IA32_MISC_ENABLE:
3502                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
3503                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
3504                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
3505                                 return 1;
3506                         vcpu->arch.ia32_misc_enable_msr = data;
3507                         kvm_update_cpuid_runtime(vcpu);
3508                 } else {
3509                         vcpu->arch.ia32_misc_enable_msr = data;
3510                 }
3511                 break;
3512         case MSR_IA32_SMBASE:
3513                 if (!msr_info->host_initiated)
3514                         return 1;
3515                 vcpu->arch.smbase = data;
3516                 break;
3517         case MSR_IA32_POWER_CTL:
3518                 vcpu->arch.msr_ia32_power_ctl = data;
3519                 break;
3520         case MSR_IA32_TSC:
3521                 if (msr_info->host_initiated) {
3522                         kvm_synchronize_tsc(vcpu, data);
3523                 } else {
3524                         u64 adj = kvm_compute_l1_tsc_offset(vcpu, data) - vcpu->arch.l1_tsc_offset;
3525                         adjust_tsc_offset_guest(vcpu, adj);
3526                         vcpu->arch.ia32_tsc_adjust_msr += adj;
3527                 }
3528                 break;
3529         case MSR_IA32_XSS:
3530                 if (!msr_info->host_initiated &&
3531                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3532                         return 1;
3533                 /*
3534                  * KVM supports exposing PT to the guest, but does not support
3535                  * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3536                  * XSAVES/XRSTORS to save/restore PT MSRs.
3537                  */
3538                 if (data & ~supported_xss)
3539                         return 1;
3540                 vcpu->arch.ia32_xss = data;
3541                 kvm_update_cpuid_runtime(vcpu);
3542                 break;
3543         case MSR_SMI_COUNT:
3544                 if (!msr_info->host_initiated)
3545                         return 1;
3546                 vcpu->arch.smi_count = data;
3547                 break;
3548         case MSR_KVM_WALL_CLOCK_NEW:
3549                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3550                         return 1;
3551
3552                 vcpu->kvm->arch.wall_clock = data;
3553                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3554                 break;
3555         case MSR_KVM_WALL_CLOCK:
3556                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3557                         return 1;
3558
3559                 vcpu->kvm->arch.wall_clock = data;
3560                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3561                 break;
3562         case MSR_KVM_SYSTEM_TIME_NEW:
3563                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3564                         return 1;
3565
3566                 kvm_write_system_time(vcpu, data, false, msr_info->host_initiated);
3567                 break;
3568         case MSR_KVM_SYSTEM_TIME:
3569                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3570                         return 1;
3571
3572                 kvm_write_system_time(vcpu, data, true,  msr_info->host_initiated);
3573                 break;
3574         case MSR_KVM_ASYNC_PF_EN:
3575                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3576                         return 1;
3577
3578                 if (kvm_pv_enable_async_pf(vcpu, data))
3579                         return 1;
3580                 break;
3581         case MSR_KVM_ASYNC_PF_INT:
3582                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3583                         return 1;
3584
3585                 if (kvm_pv_enable_async_pf_int(vcpu, data))
3586                         return 1;
3587                 break;
3588         case MSR_KVM_ASYNC_PF_ACK:
3589                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3590                         return 1;
3591                 if (data & 0x1) {
3592                         vcpu->arch.apf.pageready_pending = false;
3593                         kvm_check_async_pf_completion(vcpu);
3594                 }
3595                 break;
3596         case MSR_KVM_STEAL_TIME:
3597                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3598                         return 1;
3599
3600                 if (unlikely(!sched_info_on()))
3601                         return 1;
3602
3603                 if (data & KVM_STEAL_RESERVED_MASK)
3604                         return 1;
3605
3606                 vcpu->arch.st.msr_val = data;
3607
3608                 if (!(data & KVM_MSR_ENABLED))
3609                         break;
3610
3611                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3612
3613                 break;
3614         case MSR_KVM_PV_EOI_EN:
3615                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3616                         return 1;
3617
3618                 if (kvm_lapic_set_pv_eoi(vcpu, data, sizeof(u8)))
3619                         return 1;
3620                 break;
3621
3622         case MSR_KVM_POLL_CONTROL:
3623                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3624                         return 1;
3625
3626                 /* only enable bit supported */
3627                 if (data & (-1ULL << 1))
3628                         return 1;
3629
3630                 vcpu->arch.msr_kvm_poll_control = data;
3631                 break;
3632
3633         case MSR_IA32_MCG_CTL:
3634         case MSR_IA32_MCG_STATUS:
3635         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3636                 return set_msr_mce(vcpu, msr_info);
3637
3638         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3639         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3640                 pr = true;
3641                 fallthrough;
3642         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3643         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3644                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3645                         return kvm_pmu_set_msr(vcpu, msr_info);
3646
3647                 if (pr || data != 0)
3648                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
3649                                     "0x%x data 0x%llx\n", msr, data);
3650                 break;
3651         case MSR_K7_CLK_CTL:
3652                 /*
3653                  * Ignore all writes to this no longer documented MSR.
3654                  * Writes are only relevant for old K7 processors,
3655                  * all pre-dating SVM, but a recommended workaround from
3656                  * AMD for these chips. It is possible to specify the
3657                  * affected processor models on the command line, hence
3658                  * the need to ignore the workaround.
3659                  */
3660                 break;
3661         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3662         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3663         case HV_X64_MSR_SYNDBG_OPTIONS:
3664         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3665         case HV_X64_MSR_CRASH_CTL:
3666         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3667         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3668         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3669         case HV_X64_MSR_TSC_EMULATION_STATUS:
3670                 return kvm_hv_set_msr_common(vcpu, msr, data,
3671                                              msr_info->host_initiated);
3672         case MSR_IA32_BBL_CR_CTL3:
3673                 /* Drop writes to this legacy MSR -- see rdmsr
3674                  * counterpart for further detail.
3675                  */
3676                 if (report_ignored_msrs)
3677                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
3678                                 msr, data);
3679                 break;
3680         case MSR_AMD64_OSVW_ID_LENGTH:
3681                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3682                         return 1;
3683                 vcpu->arch.osvw.length = data;
3684                 break;
3685         case MSR_AMD64_OSVW_STATUS:
3686                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3687                         return 1;
3688                 vcpu->arch.osvw.status = data;
3689                 break;
3690         case MSR_PLATFORM_INFO:
3691                 if (!msr_info->host_initiated ||
3692                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
3693                      cpuid_fault_enabled(vcpu)))
3694                         return 1;
3695                 vcpu->arch.msr_platform_info = data;
3696                 break;
3697         case MSR_MISC_FEATURES_ENABLES:
3698                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
3699                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
3700                      !supports_cpuid_fault(vcpu)))
3701                         return 1;
3702                 vcpu->arch.msr_misc_features_enables = data;
3703                 break;
3704 #ifdef CONFIG_X86_64
3705         case MSR_IA32_XFD:
3706                 if (!msr_info->host_initiated &&
3707                     !guest_cpuid_has(vcpu, X86_FEATURE_XFD))
3708                         return 1;
3709
3710                 if (data & ~(XFEATURE_MASK_USER_DYNAMIC &
3711                              vcpu->arch.guest_supported_xcr0))
3712                         return 1;
3713
3714                 fpu_update_guest_xfd(&vcpu->arch.guest_fpu, data);
3715                 break;
3716         case MSR_IA32_XFD_ERR:
3717                 if (!msr_info->host_initiated &&
3718                     !guest_cpuid_has(vcpu, X86_FEATURE_XFD))
3719                         return 1;
3720
3721                 if (data & ~(XFEATURE_MASK_USER_DYNAMIC &
3722                              vcpu->arch.guest_supported_xcr0))
3723                         return 1;
3724
3725                 vcpu->arch.guest_fpu.xfd_err = data;
3726                 break;
3727 #endif
3728         default:
3729                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3730                         return kvm_pmu_set_msr(vcpu, msr_info);
3731                 return KVM_MSR_RET_INVALID;
3732         }
3733         return 0;
3734 }
3735 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
3736
3737 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
3738 {
3739         u64 data;
3740         u64 mcg_cap = vcpu->arch.mcg_cap;
3741         unsigned bank_num = mcg_cap & 0xff;
3742
3743         switch (msr) {
3744         case MSR_IA32_P5_MC_ADDR:
3745         case MSR_IA32_P5_MC_TYPE:
3746                 data = 0;
3747                 break;
3748         case MSR_IA32_MCG_CAP:
3749                 data = vcpu->arch.mcg_cap;
3750                 break;
3751         case MSR_IA32_MCG_CTL:
3752                 if (!(mcg_cap & MCG_CTL_P) && !host)
3753                         return 1;
3754                 data = vcpu->arch.mcg_ctl;
3755                 break;
3756         case MSR_IA32_MCG_STATUS:
3757                 data = vcpu->arch.mcg_status;
3758                 break;
3759         default:
3760                 if (msr >= MSR_IA32_MC0_CTL &&
3761                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3762                         u32 offset = array_index_nospec(
3763                                 msr - MSR_IA32_MC0_CTL,
3764                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3765
3766                         data = vcpu->arch.mce_banks[offset];
3767                         break;
3768                 }
3769                 return 1;
3770         }
3771         *pdata = data;
3772         return 0;
3773 }
3774
3775 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3776 {
3777         switch (msr_info->index) {
3778         case MSR_IA32_PLATFORM_ID:
3779         case MSR_IA32_EBL_CR_POWERON:
3780         case MSR_IA32_LASTBRANCHFROMIP:
3781         case MSR_IA32_LASTBRANCHTOIP:
3782         case MSR_IA32_LASTINTFROMIP:
3783         case MSR_IA32_LASTINTTOIP:
3784         case MSR_AMD64_SYSCFG:
3785         case MSR_K8_TSEG_ADDR:
3786         case MSR_K8_TSEG_MASK:
3787         case MSR_VM_HSAVE_PA:
3788         case MSR_K8_INT_PENDING_MSG:
3789         case MSR_AMD64_NB_CFG:
3790         case MSR_FAM10H_MMIO_CONF_BASE:
3791         case MSR_AMD64_BU_CFG2:
3792         case MSR_IA32_PERF_CTL:
3793         case MSR_AMD64_DC_CFG:
3794         case MSR_F15H_EX_CFG:
3795         /*
3796          * Intel Sandy Bridge CPUs must support the RAPL (running average power
3797          * limit) MSRs. Just return 0, as we do not want to expose the host
3798          * data here. Do not conditionalize this on CPUID, as KVM does not do
3799          * so for existing CPU-specific MSRs.
3800          */
3801         case MSR_RAPL_POWER_UNIT:
3802         case MSR_PP0_ENERGY_STATUS:     /* Power plane 0 (core) */
3803         case MSR_PP1_ENERGY_STATUS:     /* Power plane 1 (graphics uncore) */
3804         case MSR_PKG_ENERGY_STATUS:     /* Total package */
3805         case MSR_DRAM_ENERGY_STATUS:    /* DRAM controller */
3806                 msr_info->data = 0;
3807                 break;
3808         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3809                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3810                         return kvm_pmu_get_msr(vcpu, msr_info);
3811                 if (!msr_info->host_initiated)
3812                         return 1;
3813                 msr_info->data = 0;
3814                 break;
3815         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3816         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3817         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3818         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3819                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3820                         return kvm_pmu_get_msr(vcpu, msr_info);
3821                 msr_info->data = 0;
3822                 break;
3823         case MSR_IA32_UCODE_REV:
3824                 msr_info->data = vcpu->arch.microcode_version;
3825                 break;
3826         case MSR_IA32_ARCH_CAPABILITIES:
3827                 if (!msr_info->host_initiated &&
3828                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
3829                         return 1;
3830                 msr_info->data = vcpu->arch.arch_capabilities;
3831                 break;
3832         case MSR_IA32_PERF_CAPABILITIES:
3833                 if (!msr_info->host_initiated &&
3834                     !guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
3835                         return 1;
3836                 msr_info->data = vcpu->arch.perf_capabilities;
3837                 break;
3838         case MSR_IA32_POWER_CTL:
3839                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
3840                 break;
3841         case MSR_IA32_TSC: {
3842                 /*
3843                  * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3844                  * even when not intercepted. AMD manual doesn't explicitly
3845                  * state this but appears to behave the same.
3846                  *
3847                  * On userspace reads and writes, however, we unconditionally
3848                  * return L1's TSC value to ensure backwards-compatible
3849                  * behavior for migration.
3850                  */
3851                 u64 offset, ratio;
3852
3853                 if (msr_info->host_initiated) {
3854                         offset = vcpu->arch.l1_tsc_offset;
3855                         ratio = vcpu->arch.l1_tsc_scaling_ratio;
3856                 } else {
3857                         offset = vcpu->arch.tsc_offset;
3858                         ratio = vcpu->arch.tsc_scaling_ratio;
3859                 }
3860
3861                 msr_info->data = kvm_scale_tsc(rdtsc(), ratio) + offset;
3862                 break;
3863         }
3864         case MSR_MTRRcap:
3865         case 0x200 ... 0x2ff:
3866                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
3867         case 0xcd: /* fsb frequency */
3868                 msr_info->data = 3;
3869                 break;
3870                 /*
3871                  * MSR_EBC_FREQUENCY_ID
3872                  * Conservative value valid for even the basic CPU models.
3873                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3874                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3875                  * and 266MHz for model 3, or 4. Set Core Clock
3876                  * Frequency to System Bus Frequency Ratio to 1 (bits
3877                  * 31:24) even though these are only valid for CPU
3878                  * models > 2, however guests may end up dividing or
3879                  * multiplying by zero otherwise.
3880                  */
3881         case MSR_EBC_FREQUENCY_ID:
3882                 msr_info->data = 1 << 24;
3883                 break;
3884         case MSR_IA32_APICBASE:
3885                 msr_info->data = kvm_get_apic_base(vcpu);
3886                 break;
3887         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3888                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
3889         case MSR_IA32_TSC_DEADLINE:
3890                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
3891                 break;
3892         case MSR_IA32_TSC_ADJUST:
3893                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
3894                 break;
3895         case MSR_IA32_MISC_ENABLE:
3896                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
3897                 break;
3898         case MSR_IA32_SMBASE:
3899                 if (!msr_info->host_initiated)
3900                         return 1;
3901                 msr_info->data = vcpu->arch.smbase;
3902                 break;
3903         case MSR_SMI_COUNT:
3904                 msr_info->data = vcpu->arch.smi_count;
3905                 break;
3906         case MSR_IA32_PERF_STATUS:
3907                 /* TSC increment by tick */
3908                 msr_info->data = 1000ULL;
3909                 /* CPU multiplier */
3910                 msr_info->data |= (((uint64_t)4ULL) << 40);
3911                 break;
3912         case MSR_EFER:
3913                 msr_info->data = vcpu->arch.efer;
3914                 break;
3915         case MSR_KVM_WALL_CLOCK:
3916                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3917                         return 1;
3918
3919                 msr_info->data = vcpu->kvm->arch.wall_clock;
3920                 break;
3921         case MSR_KVM_WALL_CLOCK_NEW:
3922                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3923                         return 1;
3924
3925                 msr_info->data = vcpu->kvm->arch.wall_clock;
3926                 break;
3927         case MSR_KVM_SYSTEM_TIME:
3928                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3929                         return 1;
3930
3931                 msr_info->data = vcpu->arch.time;
3932                 break;
3933         case MSR_KVM_SYSTEM_TIME_NEW:
3934                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3935                         return 1;
3936
3937                 msr_info->data = vcpu->arch.time;
3938                 break;
3939         case MSR_KVM_ASYNC_PF_EN:
3940                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3941                         return 1;
3942
3943                 msr_info->data = vcpu->arch.apf.msr_en_val;
3944                 break;
3945         case MSR_KVM_ASYNC_PF_INT:
3946                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3947                         return 1;
3948
3949                 msr_info->data = vcpu->arch.apf.msr_int_val;
3950                 break;
3951         case MSR_KVM_ASYNC_PF_ACK:
3952                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3953                         return 1;
3954
3955                 msr_info->data = 0;
3956                 break;
3957         case MSR_KVM_STEAL_TIME:
3958                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3959                         return 1;
3960
3961                 msr_info->data = vcpu->arch.st.msr_val;
3962                 break;
3963         case MSR_KVM_PV_EOI_EN:
3964                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3965                         return 1;
3966
3967                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3968                 break;
3969         case MSR_KVM_POLL_CONTROL:
3970                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3971                         return 1;
3972
3973                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3974                 break;
3975         case MSR_IA32_P5_MC_ADDR:
3976         case MSR_IA32_P5_MC_TYPE:
3977         case MSR_IA32_MCG_CAP:
3978         case MSR_IA32_MCG_CTL:
3979         case MSR_IA32_MCG_STATUS:
3980         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3981                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3982                                    msr_info->host_initiated);
3983         case MSR_IA32_XSS:
3984                 if (!msr_info->host_initiated &&
3985                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3986                         return 1;
3987                 msr_info->data = vcpu->arch.ia32_xss;
3988                 break;
3989         case MSR_K7_CLK_CTL:
3990                 /*
3991                  * Provide expected ramp-up count for K7. All other
3992                  * are set to zero, indicating minimum divisors for
3993                  * every field.
3994                  *
3995                  * This prevents guest kernels on AMD host with CPU
3996                  * type 6, model 8 and higher from exploding due to
3997                  * the rdmsr failing.
3998                  */
3999                 msr_info->data = 0x20000000;
4000                 break;
4001         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
4002         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
4003         case HV_X64_MSR_SYNDBG_OPTIONS:
4004         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
4005         case HV_X64_MSR_CRASH_CTL:
4006         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
4007         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
4008         case HV_X64_MSR_TSC_EMULATION_CONTROL:
4009         case HV_X64_MSR_TSC_EMULATION_STATUS:
4010                 return kvm_hv_get_msr_common(vcpu,
4011                                              msr_info->index, &msr_info->data,
4012                                              msr_info->host_initiated);
4013         case MSR_IA32_BBL_CR_CTL3:
4014                 /* This legacy MSR exists but isn't fully documented in current
4015                  * silicon.  It is however accessed by winxp in very narrow
4016                  * scenarios where it sets bit #19, itself documented as
4017                  * a "reserved" bit.  Best effort attempt to source coherent
4018                  * read data here should the balance of the register be
4019                  * interpreted by the guest:
4020                  *
4021                  * L2 cache control register 3: 64GB range, 256KB size,
4022                  * enabled, latency 0x1, configured
4023                  */
4024                 msr_info->data = 0xbe702111;
4025                 break;
4026         case MSR_AMD64_OSVW_ID_LENGTH:
4027                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
4028                         return 1;
4029                 msr_info->data = vcpu->arch.osvw.length;
4030                 break;
4031         case MSR_AMD64_OSVW_STATUS:
4032                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
4033                         return 1;
4034                 msr_info->data = vcpu->arch.osvw.status;
4035                 break;
4036         case MSR_PLATFORM_INFO:
4037                 if (!msr_info->host_initiated &&
4038                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
4039                         return 1;
4040                 msr_info->data = vcpu->arch.msr_platform_info;
4041                 break;
4042         case MSR_MISC_FEATURES_ENABLES:
4043                 msr_info->data = vcpu->arch.msr_misc_features_enables;
4044                 break;
4045         case MSR_K7_HWCR:
4046                 msr_info->data = vcpu->arch.msr_hwcr;
4047                 break;
4048 #ifdef CONFIG_X86_64
4049         case MSR_IA32_XFD:
4050                 if (!msr_info->host_initiated &&
4051                     !guest_cpuid_has(vcpu, X86_FEATURE_XFD))
4052                         return 1;
4053
4054                 msr_info->data = vcpu->arch.guest_fpu.fpstate->xfd;
4055                 break;
4056         case MSR_IA32_XFD_ERR:
4057                 if (!msr_info->host_initiated &&
4058                     !guest_cpuid_has(vcpu, X86_FEATURE_XFD))
4059                         return 1;
4060
4061                 msr_info->data = vcpu->arch.guest_fpu.xfd_err;
4062                 break;
4063 #endif
4064         default:
4065                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
4066                         return kvm_pmu_get_msr(vcpu, msr_info);
4067                 return KVM_MSR_RET_INVALID;
4068         }
4069         return 0;
4070 }
4071 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
4072
4073 /*
4074  * Read or write a bunch of msrs. All parameters are kernel addresses.
4075  *
4076  * @return number of msrs set successfully.
4077  */
4078 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
4079                     struct kvm_msr_entry *entries,
4080                     int (*do_msr)(struct kvm_vcpu *vcpu,
4081                                   unsigned index, u64 *data))
4082 {
4083         int i;
4084
4085         for (i = 0; i < msrs->nmsrs; ++i)
4086                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
4087                         break;
4088
4089         return i;
4090 }
4091
4092 /*
4093  * Read or write a bunch of msrs. Parameters are user addresses.
4094  *
4095  * @return number of msrs set successfully.
4096  */
4097 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
4098                   int (*do_msr)(struct kvm_vcpu *vcpu,
4099                                 unsigned index, u64 *data),
4100                   int writeback)
4101 {
4102         struct kvm_msrs msrs;
4103         struct kvm_msr_entry *entries;
4104         int r, n;
4105         unsigned size;
4106
4107         r = -EFAULT;
4108         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
4109                 goto out;
4110
4111         r = -E2BIG;
4112         if (msrs.nmsrs >= MAX_IO_MSRS)
4113                 goto out;
4114
4115         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
4116         entries = memdup_user(user_msrs->entries, size);
4117         if (IS_ERR(entries)) {
4118                 r = PTR_ERR(entries);
4119                 goto out;
4120         }
4121
4122         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
4123         if (r < 0)
4124                 goto out_free;
4125
4126         r = -EFAULT;
4127         if (writeback && copy_to_user(user_msrs->entries, entries, size))
4128                 goto out_free;
4129
4130         r = n;
4131
4132 out_free:
4133         kfree(entries);
4134 out:
4135         return r;
4136 }
4137
4138 static inline bool kvm_can_mwait_in_guest(void)
4139 {
4140         return boot_cpu_has(X86_FEATURE_MWAIT) &&
4141                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
4142                 boot_cpu_has(X86_FEATURE_ARAT);
4143 }
4144
4145 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu *vcpu,
4146                                             struct kvm_cpuid2 __user *cpuid_arg)
4147 {
4148         struct kvm_cpuid2 cpuid;
4149         int r;
4150
4151         r = -EFAULT;
4152         if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4153                 return r;
4154
4155         r = kvm_get_hv_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4156         if (r)
4157                 return r;
4158
4159         r = -EFAULT;
4160         if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4161                 return r;
4162
4163         return 0;
4164 }
4165
4166 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
4167 {
4168         int r = 0;
4169
4170         switch (ext) {
4171         case KVM_CAP_IRQCHIP:
4172         case KVM_CAP_HLT:
4173         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
4174         case KVM_CAP_SET_TSS_ADDR:
4175         case KVM_CAP_EXT_CPUID:
4176         case KVM_CAP_EXT_EMUL_CPUID:
4177         case KVM_CAP_CLOCKSOURCE:
4178         case KVM_CAP_PIT:
4179         case KVM_CAP_NOP_IO_DELAY:
4180         case KVM_CAP_MP_STATE:
4181         case KVM_CAP_SYNC_MMU:
4182         case KVM_CAP_USER_NMI:
4183         case KVM_CAP_REINJECT_CONTROL:
4184         case KVM_CAP_IRQ_INJECT_STATUS:
4185         case KVM_CAP_IOEVENTFD:
4186         case KVM_CAP_IOEVENTFD_NO_LENGTH:
4187         case KVM_CAP_PIT2:
4188         case KVM_CAP_PIT_STATE2:
4189         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
4190         case KVM_CAP_VCPU_EVENTS:
4191         case KVM_CAP_HYPERV:
4192         case KVM_CAP_HYPERV_VAPIC:
4193         case KVM_CAP_HYPERV_SPIN:
4194         case KVM_CAP_HYPERV_SYNIC:
4195         case KVM_CAP_HYPERV_SYNIC2:
4196         case KVM_CAP_HYPERV_VP_INDEX:
4197         case KVM_CAP_HYPERV_EVENTFD:
4198         case KVM_CAP_HYPERV_TLBFLUSH:
4199         case KVM_CAP_HYPERV_SEND_IPI:
4200         case KVM_CAP_HYPERV_CPUID:
4201         case KVM_CAP_HYPERV_ENFORCE_CPUID:
4202         case KVM_CAP_SYS_HYPERV_CPUID:
4203         case KVM_CAP_PCI_SEGMENT:
4204         case KVM_CAP_DEBUGREGS:
4205         case KVM_CAP_X86_ROBUST_SINGLESTEP:
4206         case KVM_CAP_XSAVE:
4207         case KVM_CAP_ASYNC_PF:
4208         case KVM_CAP_ASYNC_PF_INT:
4209         case KVM_CAP_GET_TSC_KHZ:
4210         case KVM_CAP_KVMCLOCK_CTRL:
4211         case KVM_CAP_READONLY_MEM:
4212         case KVM_CAP_HYPERV_TIME:
4213         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
4214         case KVM_CAP_TSC_DEADLINE_TIMER:
4215         case KVM_CAP_DISABLE_QUIRKS:
4216         case KVM_CAP_SET_BOOT_CPU_ID:
4217         case KVM_CAP_SPLIT_IRQCHIP:
4218         case KVM_CAP_IMMEDIATE_EXIT:
4219         case KVM_CAP_PMU_EVENT_FILTER:
4220         case KVM_CAP_GET_MSR_FEATURES:
4221         case KVM_CAP_MSR_PLATFORM_INFO:
4222         case KVM_CAP_EXCEPTION_PAYLOAD:
4223         case KVM_CAP_SET_GUEST_DEBUG:
4224         case KVM_CAP_LAST_CPU:
4225         case KVM_CAP_X86_USER_SPACE_MSR:
4226         case KVM_CAP_X86_MSR_FILTER:
4227         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4228 #ifdef CONFIG_X86_SGX_KVM
4229         case KVM_CAP_SGX_ATTRIBUTE:
4230 #endif
4231         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
4232         case KVM_CAP_VM_MOVE_ENC_CONTEXT_FROM:
4233         case KVM_CAP_SREGS2:
4234         case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
4235         case KVM_CAP_VCPU_ATTRIBUTES:
4236         case KVM_CAP_SYS_ATTRIBUTES:
4237         case KVM_CAP_VAPIC:
4238                 r = 1;
4239                 break;
4240         case KVM_CAP_EXIT_HYPERCALL:
4241                 r = KVM_EXIT_HYPERCALL_VALID_MASK;
4242                 break;
4243         case KVM_CAP_SET_GUEST_DEBUG2:
4244                 return KVM_GUESTDBG_VALID_MASK;
4245 #ifdef CONFIG_KVM_XEN
4246         case KVM_CAP_XEN_HVM:
4247                 r = KVM_XEN_HVM_CONFIG_HYPERCALL_MSR |
4248                     KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL |
4249                     KVM_XEN_HVM_CONFIG_SHARED_INFO |
4250                     KVM_XEN_HVM_CONFIG_EVTCHN_2LEVEL;
4251                 if (sched_info_on())
4252                         r |= KVM_XEN_HVM_CONFIG_RUNSTATE;
4253                 break;
4254 #endif
4255         case KVM_CAP_SYNC_REGS:
4256                 r = KVM_SYNC_X86_VALID_FIELDS;
4257                 break;
4258         case KVM_CAP_ADJUST_CLOCK:
4259                 r = KVM_CLOCK_VALID_FLAGS;
4260                 break;
4261         case KVM_CAP_X86_DISABLE_EXITS:
4262                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
4263                       KVM_X86_DISABLE_EXITS_CSTATE;
4264                 if(kvm_can_mwait_in_guest())
4265                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
4266                 break;
4267         case KVM_CAP_X86_SMM:
4268                 /* SMBASE is usually relocated above 1M on modern chipsets,
4269                  * and SMM handlers might indeed rely on 4G segment limits,
4270                  * so do not report SMM to be available if real mode is
4271                  * emulated via vm86 mode.  Still, do not go to great lengths
4272                  * to avoid userspace's usage of the feature, because it is a
4273                  * fringe case that is not enabled except via specific settings
4274                  * of the module parameters.
4275                  */
4276                 r = static_call(kvm_x86_has_emulated_msr)(kvm, MSR_IA32_SMBASE);
4277                 break;
4278         case KVM_CAP_NR_VCPUS:
4279                 r = min_t(unsigned int, num_online_cpus(), KVM_MAX_VCPUS);
4280                 break;
4281         case KVM_CAP_MAX_VCPUS:
4282                 r = KVM_MAX_VCPUS;
4283                 break;
4284         case KVM_CAP_MAX_VCPU_ID:
4285                 r = KVM_MAX_VCPU_IDS;
4286                 break;
4287         case KVM_CAP_PV_MMU:    /* obsolete */
4288                 r = 0;
4289                 break;
4290         case KVM_CAP_MCE:
4291                 r = KVM_MAX_MCE_BANKS;
4292                 break;
4293         case KVM_CAP_XCRS:
4294                 r = boot_cpu_has(X86_FEATURE_XSAVE);
4295                 break;
4296         case KVM_CAP_TSC_CONTROL:
4297                 r = kvm_has_tsc_control;
4298                 break;
4299         case KVM_CAP_X2APIC_API:
4300                 r = KVM_X2APIC_API_VALID_FLAGS;
4301                 break;
4302         case KVM_CAP_NESTED_STATE:
4303                 r = kvm_x86_ops.nested_ops->get_state ?
4304                         kvm_x86_ops.nested_ops->get_state(NULL, NULL, 0) : 0;
4305                 break;
4306         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4307                 r = kvm_x86_ops.enable_direct_tlbflush != NULL;
4308                 break;
4309         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4310                 r = kvm_x86_ops.nested_ops->enable_evmcs != NULL;
4311                 break;
4312         case KVM_CAP_SMALLER_MAXPHYADDR:
4313                 r = (int) allow_smaller_maxphyaddr;
4314                 break;
4315         case KVM_CAP_STEAL_TIME:
4316                 r = sched_info_on();
4317                 break;
4318         case KVM_CAP_X86_BUS_LOCK_EXIT:
4319                 if (kvm_has_bus_lock_exit)
4320                         r = KVM_BUS_LOCK_DETECTION_OFF |
4321                             KVM_BUS_LOCK_DETECTION_EXIT;
4322                 else
4323                         r = 0;
4324                 break;
4325         case KVM_CAP_XSAVE2: {
4326                 u64 guest_perm = xstate_get_guest_group_perm();
4327
4328                 r = xstate_required_size(supported_xcr0 & guest_perm, false);
4329                 if (r < sizeof(struct kvm_xsave))
4330                         r = sizeof(struct kvm_xsave);
4331                 break;
4332         }
4333         default:
4334                 break;
4335         }
4336         return r;
4337 }
4338
4339 static inline void __user *kvm_get_attr_addr(struct kvm_device_attr *attr)
4340 {
4341         void __user *uaddr = (void __user*)(unsigned long)attr->addr;
4342
4343         if ((u64)(unsigned long)uaddr != attr->addr)
4344                 return ERR_PTR_USR(-EFAULT);
4345         return uaddr;
4346 }
4347
4348 static int kvm_x86_dev_get_attr(struct kvm_device_attr *attr)
4349 {
4350         u64 __user *uaddr = kvm_get_attr_addr(attr);
4351
4352         if (attr->group)
4353                 return -ENXIO;
4354
4355         if (IS_ERR(uaddr))
4356                 return PTR_ERR(uaddr);
4357
4358         switch (attr->attr) {
4359         case KVM_X86_XCOMP_GUEST_SUPP:
4360                 if (put_user(supported_xcr0, uaddr))
4361                         return -EFAULT;
4362                 return 0;
4363         default:
4364                 return -ENXIO;
4365                 break;
4366         }
4367 }
4368
4369 static int kvm_x86_dev_has_attr(struct kvm_device_attr *attr)
4370 {
4371         if (attr->group)
4372                 return -ENXIO;
4373
4374         switch (attr->attr) {
4375         case KVM_X86_XCOMP_GUEST_SUPP:
4376                 return 0;
4377         default:
4378                 return -ENXIO;
4379         }
4380 }
4381
4382 long kvm_arch_dev_ioctl(struct file *filp,
4383                         unsigned int ioctl, unsigned long arg)
4384 {
4385         void __user *argp = (void __user *)arg;
4386         long r;
4387
4388         switch (ioctl) {
4389         case KVM_GET_MSR_INDEX_LIST: {
4390                 struct kvm_msr_list __user *user_msr_list = argp;
4391                 struct kvm_msr_list msr_list;
4392                 unsigned n;
4393
4394                 r = -EFAULT;
4395                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4396                         goto out;
4397                 n = msr_list.nmsrs;
4398                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
4399                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4400                         goto out;
4401                 r = -E2BIG;
4402                 if (n < msr_list.nmsrs)
4403                         goto out;
4404                 r = -EFAULT;
4405                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
4406                                  num_msrs_to_save * sizeof(u32)))
4407                         goto out;
4408                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
4409                                  &emulated_msrs,
4410                                  num_emulated_msrs * sizeof(u32)))
4411                         goto out;
4412                 r = 0;
4413                 break;
4414         }
4415         case KVM_GET_SUPPORTED_CPUID:
4416         case KVM_GET_EMULATED_CPUID: {
4417                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4418                 struct kvm_cpuid2 cpuid;
4419
4420                 r = -EFAULT;
4421                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4422                         goto out;
4423
4424                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
4425                                             ioctl);
4426                 if (r)
4427                         goto out;
4428
4429                 r = -EFAULT;
4430                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4431                         goto out;
4432                 r = 0;
4433                 break;
4434         }
4435         case KVM_X86_GET_MCE_CAP_SUPPORTED:
4436                 r = -EFAULT;
4437                 if (copy_to_user(argp, &kvm_mce_cap_supported,
4438                                  sizeof(kvm_mce_cap_supported)))
4439                         goto out;
4440                 r = 0;
4441                 break;
4442         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
4443                 struct kvm_msr_list __user *user_msr_list = argp;
4444                 struct kvm_msr_list msr_list;
4445                 unsigned int n;
4446
4447                 r = -EFAULT;
4448                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4449                         goto out;
4450                 n = msr_list.nmsrs;
4451                 msr_list.nmsrs = num_msr_based_features;
4452                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4453                         goto out;
4454                 r = -E2BIG;
4455                 if (n < msr_list.nmsrs)
4456                         goto out;
4457                 r = -EFAULT;
4458                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
4459                                  num_msr_based_features * sizeof(u32)))
4460                         goto out;
4461                 r = 0;
4462                 break;
4463         }
4464         case KVM_GET_MSRS:
4465                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
4466                 break;
4467         case KVM_GET_SUPPORTED_HV_CPUID:
4468                 r = kvm_ioctl_get_supported_hv_cpuid(NULL, argp);
4469                 break;
4470         case KVM_GET_DEVICE_ATTR: {
4471                 struct kvm_device_attr attr;
4472                 r = -EFAULT;
4473                 if (copy_from_user(&attr, (void __user *)arg, sizeof(attr)))
4474                         break;
4475                 r = kvm_x86_dev_get_attr(&attr);
4476                 break;
4477         }
4478         case KVM_HAS_DEVICE_ATTR: {
4479                 struct kvm_device_attr attr;
4480                 r = -EFAULT;
4481                 if (copy_from_user(&attr, (void __user *)arg, sizeof(attr)))
4482                         break;
4483                 r = kvm_x86_dev_has_attr(&attr);
4484                 break;
4485         }
4486         default:
4487                 r = -EINVAL;
4488                 break;
4489         }
4490 out:
4491         return r;
4492 }
4493
4494 static void wbinvd_ipi(void *garbage)
4495 {
4496         wbinvd();
4497 }
4498
4499 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
4500 {
4501         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
4502 }
4503
4504 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
4505 {
4506         /* Address WBINVD may be executed by guest */
4507         if (need_emulate_wbinvd(vcpu)) {
4508                 if (static_call(kvm_x86_has_wbinvd_exit)())
4509                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4510                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
4511                         smp_call_function_single(vcpu->cpu,
4512                                         wbinvd_ipi, NULL, 1);
4513         }
4514
4515         static_call(kvm_x86_vcpu_load)(vcpu, cpu);
4516
4517         /* Save host pkru register if supported */
4518         vcpu->arch.host_pkru = read_pkru();
4519
4520         /* Apply any externally detected TSC adjustments (due to suspend) */
4521         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
4522                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
4523                 vcpu->arch.tsc_offset_adjustment = 0;
4524                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4525         }
4526
4527         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
4528                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
4529                                 rdtsc() - vcpu->arch.last_host_tsc;
4530                 if (tsc_delta < 0)
4531                         mark_tsc_unstable("KVM discovered backwards TSC");
4532
4533                 if (kvm_check_tsc_unstable()) {
4534                         u64 offset = kvm_compute_l1_tsc_offset(vcpu,
4535                                                 vcpu->arch.last_guest_tsc);
4536                         kvm_vcpu_write_tsc_offset(vcpu, offset);
4537                         vcpu->arch.tsc_catchup = 1;
4538                 }
4539
4540                 if (kvm_lapic_hv_timer_in_use(vcpu))
4541                         kvm_lapic_restart_hv_timer(vcpu);
4542
4543                 /*
4544                  * On a host with synchronized TSC, there is no need to update
4545                  * kvmclock on vcpu->cpu migration
4546                  */
4547                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
4548                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
4549                 if (vcpu->cpu != cpu)
4550                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
4551                 vcpu->cpu = cpu;
4552         }
4553
4554         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
4555 }
4556
4557 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
4558 {
4559         struct gfn_to_hva_cache *ghc = &vcpu->arch.st.cache;
4560         struct kvm_steal_time __user *st;
4561         struct kvm_memslots *slots;
4562         static const u8 preempted = KVM_VCPU_PREEMPTED;
4563
4564         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
4565                 return;
4566
4567         if (vcpu->arch.st.preempted)
4568                 return;
4569
4570         /* This happens on process exit */
4571         if (unlikely(current->mm != vcpu->kvm->mm))
4572                 return;
4573
4574         slots = kvm_memslots(vcpu->kvm);
4575
4576         if (unlikely(slots->generation != ghc->generation ||
4577                      kvm_is_error_hva(ghc->hva) || !ghc->memslot))
4578                 return;
4579
4580         st = (struct kvm_steal_time __user *)ghc->hva;
4581         BUILD_BUG_ON(sizeof(st->preempted) != sizeof(preempted));
4582
4583         if (!copy_to_user_nofault(&st->preempted, &preempted, sizeof(preempted)))
4584                 vcpu->arch.st.preempted = KVM_VCPU_PREEMPTED;
4585
4586         mark_page_dirty_in_slot(vcpu->kvm, ghc->memslot, gpa_to_gfn(ghc->gpa));
4587 }
4588
4589 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
4590 {
4591         int idx;
4592
4593         if (vcpu->preempted && !vcpu->arch.guest_state_protected)
4594                 vcpu->arch.preempted_in_kernel = !static_call(kvm_x86_get_cpl)(vcpu);
4595
4596         /*
4597          * Take the srcu lock as memslots will be accessed to check the gfn
4598          * cache generation against the memslots generation.
4599          */
4600         idx = srcu_read_lock(&vcpu->kvm->srcu);
4601         if (kvm_xen_msr_enabled(vcpu->kvm))
4602                 kvm_xen_runstate_set_preempted(vcpu);
4603         else
4604                 kvm_steal_time_set_preempted(vcpu);
4605         srcu_read_unlock(&vcpu->kvm->srcu, idx);
4606
4607         static_call(kvm_x86_vcpu_put)(vcpu);
4608         vcpu->arch.last_host_tsc = rdtsc();
4609 }
4610
4611 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
4612                                     struct kvm_lapic_state *s)
4613 {
4614         static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
4615
4616         return kvm_apic_get_state(vcpu, s);
4617 }
4618
4619 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
4620                                     struct kvm_lapic_state *s)
4621 {
4622         int r;
4623
4624         r = kvm_apic_set_state(vcpu, s);
4625         if (r)
4626                 return r;
4627         update_cr8_intercept(vcpu);
4628
4629         return 0;
4630 }
4631
4632 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
4633 {
4634         /*
4635          * We can accept userspace's request for interrupt injection
4636          * as long as we have a place to store the interrupt number.
4637          * The actual injection will happen when the CPU is able to
4638          * deliver the interrupt.
4639          */
4640         if (kvm_cpu_has_extint(vcpu))
4641                 return false;
4642
4643         /* Acknowledging ExtINT does not happen if LINT0 is masked.  */
4644         return (!lapic_in_kernel(vcpu) ||
4645                 kvm_apic_accept_pic_intr(vcpu));
4646 }
4647
4648 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
4649 {
4650         /*
4651          * Do not cause an interrupt window exit if an exception
4652          * is pending or an event needs reinjection; userspace
4653          * might want to inject the interrupt manually using KVM_SET_REGS
4654          * or KVM_SET_SREGS.  For that to work, we must be at an
4655          * instruction boundary and with no events half-injected.
4656          */
4657         return (kvm_arch_interrupt_allowed(vcpu) &&
4658                 kvm_cpu_accept_dm_intr(vcpu) &&
4659                 !kvm_event_needs_reinjection(vcpu) &&
4660                 !vcpu->arch.exception.pending);
4661 }
4662
4663 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
4664                                     struct kvm_interrupt *irq)
4665 {
4666         if (irq->irq >= KVM_NR_INTERRUPTS)
4667                 return -EINVAL;
4668
4669         if (!irqchip_in_kernel(vcpu->kvm)) {
4670                 kvm_queue_interrupt(vcpu, irq->irq, false);
4671                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4672                 return 0;
4673         }
4674
4675         /*
4676          * With in-kernel LAPIC, we only use this to inject EXTINT, so
4677          * fail for in-kernel 8259.
4678          */
4679         if (pic_in_kernel(vcpu->kvm))
4680                 return -ENXIO;
4681
4682         if (vcpu->arch.pending_external_vector != -1)
4683                 return -EEXIST;
4684
4685         vcpu->arch.pending_external_vector = irq->irq;
4686         kvm_make_request(KVM_REQ_EVENT, vcpu);
4687         return 0;
4688 }
4689
4690 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
4691 {
4692         kvm_inject_nmi(vcpu);
4693
4694         return 0;
4695 }
4696
4697 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
4698 {
4699         kvm_make_request(KVM_REQ_SMI, vcpu);
4700
4701         return 0;
4702 }
4703
4704 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
4705                                            struct kvm_tpr_access_ctl *tac)
4706 {
4707         if (tac->flags)
4708                 return -EINVAL;
4709         vcpu->arch.tpr_access_reporting = !!tac->enabled;
4710         return 0;
4711 }
4712
4713 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
4714                                         u64 mcg_cap)
4715 {
4716         int r;
4717         unsigned bank_num = mcg_cap & 0xff, bank;
4718
4719         r = -EINVAL;
4720         if (!bank_num || bank_num > KVM_MAX_MCE_BANKS)
4721                 goto out;
4722         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
4723                 goto out;
4724         r = 0;
4725         vcpu->arch.mcg_cap = mcg_cap;
4726         /* Init IA32_MCG_CTL to all 1s */
4727         if (mcg_cap & MCG_CTL_P)
4728                 vcpu->arch.mcg_ctl = ~(u64)0;
4729         /* Init IA32_MCi_CTL to all 1s */
4730         for (bank = 0; bank < bank_num; bank++)
4731                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
4732
4733         static_call(kvm_x86_setup_mce)(vcpu);
4734 out:
4735         return r;
4736 }
4737
4738 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
4739                                       struct kvm_x86_mce *mce)
4740 {
4741         u64 mcg_cap = vcpu->arch.mcg_cap;
4742         unsigned bank_num = mcg_cap & 0xff;
4743         u64 *banks = vcpu->arch.mce_banks;
4744
4745         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
4746                 return -EINVAL;
4747         /*
4748          * if IA32_MCG_CTL is not all 1s, the uncorrected error
4749          * reporting is disabled
4750          */
4751         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
4752             vcpu->arch.mcg_ctl != ~(u64)0)
4753                 return 0;
4754         banks += 4 * mce->bank;
4755         /*
4756          * if IA32_MCi_CTL is not all 1s, the uncorrected error
4757          * reporting is disabled for the bank
4758          */
4759         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
4760                 return 0;
4761         if (mce->status & MCI_STATUS_UC) {
4762                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
4763                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
4764                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
4765                         return 0;
4766                 }
4767                 if (banks[1] & MCI_STATUS_VAL)
4768                         mce->status |= MCI_STATUS_OVER;
4769                 banks[2] = mce->addr;
4770                 banks[3] = mce->misc;
4771                 vcpu->arch.mcg_status = mce->mcg_status;
4772                 banks[1] = mce->status;
4773                 kvm_queue_exception(vcpu, MC_VECTOR);
4774         } else if (!(banks[1] & MCI_STATUS_VAL)
4775                    || !(banks[1] & MCI_STATUS_UC)) {
4776                 if (banks[1] & MCI_STATUS_VAL)
4777                         mce->status |= MCI_STATUS_OVER;
4778                 banks[2] = mce->addr;
4779                 banks[3] = mce->misc;
4780                 banks[1] = mce->status;
4781         } else
4782                 banks[1] |= MCI_STATUS_OVER;
4783         return 0;
4784 }
4785
4786 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
4787                                                struct kvm_vcpu_events *events)
4788 {
4789         process_nmi(vcpu);
4790
4791         if (kvm_check_request(KVM_REQ_SMI, vcpu))
4792                 process_smi(vcpu);
4793
4794         /*
4795          * In guest mode, payload delivery should be deferred,
4796          * so that the L1 hypervisor can intercept #PF before
4797          * CR2 is modified (or intercept #DB before DR6 is
4798          * modified under nVMX). Unless the per-VM capability,
4799          * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4800          * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4801          * opportunistically defer the exception payload, deliver it if the
4802          * capability hasn't been requested before processing a
4803          * KVM_GET_VCPU_EVENTS.
4804          */
4805         if (!vcpu->kvm->arch.exception_payload_enabled &&
4806             vcpu->arch.exception.pending && vcpu->arch.exception.has_payload)
4807                 kvm_deliver_exception_payload(vcpu);
4808
4809         /*
4810          * The API doesn't provide the instruction length for software
4811          * exceptions, so don't report them. As long as the guest RIP
4812          * isn't advanced, we should expect to encounter the exception
4813          * again.
4814          */
4815         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
4816                 events->exception.injected = 0;
4817                 events->exception.pending = 0;
4818         } else {
4819                 events->exception.injected = vcpu->arch.exception.injected;
4820                 events->exception.pending = vcpu->arch.exception.pending;
4821                 /*
4822                  * For ABI compatibility, deliberately conflate
4823                  * pending and injected exceptions when
4824                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4825                  */
4826                 if (!vcpu->kvm->arch.exception_payload_enabled)
4827                         events->exception.injected |=
4828                                 vcpu->arch.exception.pending;
4829         }
4830         events->exception.nr = vcpu->arch.exception.nr;
4831         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
4832         events->exception.error_code = vcpu->arch.exception.error_code;
4833         events->exception_has_payload = vcpu->arch.exception.has_payload;
4834         events->exception_payload = vcpu->arch.exception.payload;
4835
4836         events->interrupt.injected =
4837                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
4838         events->interrupt.nr = vcpu->arch.interrupt.nr;
4839         events->interrupt.soft = 0;
4840         events->interrupt.shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
4841
4842         events->nmi.injected = vcpu->arch.nmi_injected;
4843         events->nmi.pending = vcpu->arch.nmi_pending != 0;
4844         events->nmi.masked = static_call(kvm_x86_get_nmi_mask)(vcpu);
4845         events->nmi.pad = 0;
4846
4847         events->sipi_vector = 0; /* never valid when reporting to user space */
4848
4849         events->smi.smm = is_smm(vcpu);
4850         events->smi.pending = vcpu->arch.smi_pending;
4851         events->smi.smm_inside_nmi =
4852                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
4853         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
4854
4855         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
4856                          | KVM_VCPUEVENT_VALID_SHADOW
4857                          | KVM_VCPUEVENT_VALID_SMM);
4858         if (vcpu->kvm->arch.exception_payload_enabled)
4859                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
4860
4861         memset(&events->reserved, 0, sizeof(events->reserved));
4862 }
4863
4864 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm);
4865
4866 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
4867                                               struct kvm_vcpu_events *events)
4868 {
4869         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4870                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4871                               | KVM_VCPUEVENT_VALID_SHADOW
4872                               | KVM_VCPUEVENT_VALID_SMM
4873                               | KVM_VCPUEVENT_VALID_PAYLOAD))
4874                 return -EINVAL;
4875
4876         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
4877                 if (!vcpu->kvm->arch.exception_payload_enabled)
4878                         return -EINVAL;
4879                 if (events->exception.pending)
4880                         events->exception.injected = 0;
4881                 else
4882                         events->exception_has_payload = 0;
4883         } else {
4884                 events->exception.pending = 0;
4885                 events->exception_has_payload = 0;
4886         }
4887
4888         if ((events->exception.injected || events->exception.pending) &&
4889             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
4890                 return -EINVAL;
4891
4892         /* INITs are latched while in SMM */
4893         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
4894             (events->smi.smm || events->smi.pending) &&
4895             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
4896                 return -EINVAL;
4897
4898         process_nmi(vcpu);
4899         vcpu->arch.exception.injected = events->exception.injected;
4900         vcpu->arch.exception.pending = events->exception.pending;
4901         vcpu->arch.exception.nr = events->exception.nr;
4902         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
4903         vcpu->arch.exception.error_code = events->exception.error_code;
4904         vcpu->arch.exception.has_payload = events->exception_has_payload;
4905         vcpu->arch.exception.payload = events->exception_payload;
4906
4907         vcpu->arch.interrupt.injected = events->interrupt.injected;
4908         vcpu->arch.interrupt.nr = events->interrupt.nr;
4909         vcpu->arch.interrupt.soft = events->interrupt.soft;
4910         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
4911                 static_call(kvm_x86_set_interrupt_shadow)(vcpu,
4912                                                 events->interrupt.shadow);
4913
4914         vcpu->arch.nmi_injected = events->nmi.injected;
4915         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
4916                 vcpu->arch.nmi_pending = events->nmi.pending;
4917         static_call(kvm_x86_set_nmi_mask)(vcpu, events->nmi.masked);
4918
4919         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
4920             lapic_in_kernel(vcpu))
4921                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
4922
4923         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
4924                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
4925                         kvm_x86_ops.nested_ops->leave_nested(vcpu);
4926                         kvm_smm_changed(vcpu, events->smi.smm);
4927                 }
4928
4929                 vcpu->arch.smi_pending = events->smi.pending;
4930
4931                 if (events->smi.smm) {
4932                         if (events->smi.smm_inside_nmi)
4933                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
4934                         else
4935                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
4936                 }
4937
4938                 if (lapic_in_kernel(vcpu)) {
4939                         if (events->smi.latched_init)
4940                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4941                         else
4942                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4943                 }
4944         }
4945
4946         kvm_make_request(KVM_REQ_EVENT, vcpu);
4947
4948         return 0;
4949 }
4950
4951 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
4952                                              struct kvm_debugregs *dbgregs)
4953 {
4954         unsigned long val;
4955
4956         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
4957         kvm_get_dr(vcpu, 6, &val);
4958         dbgregs->dr6 = val;
4959         dbgregs->dr7 = vcpu->arch.dr7;
4960         dbgregs->flags = 0;
4961         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
4962 }
4963
4964 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
4965                                             struct kvm_debugregs *dbgregs)
4966 {
4967         if (dbgregs->flags)
4968                 return -EINVAL;
4969
4970         if (!kvm_dr6_valid(dbgregs->dr6))
4971                 return -EINVAL;
4972         if (!kvm_dr7_valid(dbgregs->dr7))
4973                 return -EINVAL;
4974
4975         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
4976         kvm_update_dr0123(vcpu);
4977         vcpu->arch.dr6 = dbgregs->dr6;
4978         vcpu->arch.dr7 = dbgregs->dr7;
4979         kvm_update_dr7(vcpu);
4980
4981         return 0;
4982 }
4983
4984 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
4985                                          struct kvm_xsave *guest_xsave)
4986 {
4987         if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
4988                 return;
4989
4990         fpu_copy_guest_fpstate_to_uabi(&vcpu->arch.guest_fpu,
4991                                        guest_xsave->region,
4992                                        sizeof(guest_xsave->region),
4993                                        vcpu->arch.pkru);
4994 }
4995
4996 static void kvm_vcpu_ioctl_x86_get_xsave2(struct kvm_vcpu *vcpu,
4997                                           u8 *state, unsigned int size)
4998 {
4999         if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
5000                 return;
5001
5002         fpu_copy_guest_fpstate_to_uabi(&vcpu->arch.guest_fpu,
5003                                        state, size, vcpu->arch.pkru);
5004 }
5005
5006 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
5007                                         struct kvm_xsave *guest_xsave)
5008 {
5009         if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
5010                 return 0;
5011
5012         return fpu_copy_uabi_to_guest_fpstate(&vcpu->arch.guest_fpu,
5013                                               guest_xsave->region,
5014                                               supported_xcr0, &vcpu->arch.pkru);
5015 }
5016
5017 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
5018                                         struct kvm_xcrs *guest_xcrs)
5019 {
5020         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
5021                 guest_xcrs->nr_xcrs = 0;
5022                 return;
5023         }
5024
5025         guest_xcrs->nr_xcrs = 1;
5026         guest_xcrs->flags = 0;
5027         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
5028         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
5029 }
5030
5031 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
5032                                        struct kvm_xcrs *guest_xcrs)
5033 {
5034         int i, r = 0;
5035
5036         if (!boot_cpu_has(X86_FEATURE_XSAVE))
5037                 return -EINVAL;
5038
5039         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
5040                 return -EINVAL;
5041
5042         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
5043                 /* Only support XCR0 currently */
5044                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
5045                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
5046                                 guest_xcrs->xcrs[i].value);
5047                         break;
5048                 }
5049         if (r)
5050                 r = -EINVAL;
5051         return r;
5052 }
5053
5054 /*
5055  * kvm_set_guest_paused() indicates to the guest kernel that it has been
5056  * stopped by the hypervisor.  This function will be called from the host only.
5057  * EINVAL is returned when the host attempts to set the flag for a guest that
5058  * does not support pv clocks.
5059  */
5060 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
5061 {
5062         if (!vcpu->arch.pv_time_enabled)
5063                 return -EINVAL;
5064         vcpu->arch.pvclock_set_guest_stopped_request = true;
5065         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5066         return 0;
5067 }
5068
5069 static int kvm_arch_tsc_has_attr(struct kvm_vcpu *vcpu,
5070                                  struct kvm_device_attr *attr)
5071 {
5072         int r;
5073
5074         switch (attr->attr) {
5075         case KVM_VCPU_TSC_OFFSET:
5076                 r = 0;
5077                 break;
5078         default:
5079                 r = -ENXIO;
5080         }
5081
5082         return r;
5083 }
5084
5085 static int kvm_arch_tsc_get_attr(struct kvm_vcpu *vcpu,
5086                                  struct kvm_device_attr *attr)
5087 {
5088         u64 __user *uaddr = kvm_get_attr_addr(attr);
5089         int r;
5090
5091         if (IS_ERR(uaddr))
5092                 return PTR_ERR(uaddr);
5093
5094         switch (attr->attr) {
5095         case KVM_VCPU_TSC_OFFSET:
5096                 r = -EFAULT;
5097                 if (put_user(vcpu->arch.l1_tsc_offset, uaddr))
5098                         break;
5099                 r = 0;
5100                 break;
5101         default:
5102                 r = -ENXIO;
5103         }
5104
5105         return r;
5106 }
5107
5108 static int kvm_arch_tsc_set_attr(struct kvm_vcpu *vcpu,
5109                                  struct kvm_device_attr *attr)
5110 {
5111         u64 __user *uaddr = kvm_get_attr_addr(attr);
5112         struct kvm *kvm = vcpu->kvm;
5113         int r;
5114
5115         if (IS_ERR(uaddr))
5116                 return PTR_ERR(uaddr);
5117
5118         switch (attr->attr) {
5119         case KVM_VCPU_TSC_OFFSET: {
5120                 u64 offset, tsc, ns;
5121                 unsigned long flags;
5122                 bool matched;
5123
5124                 r = -EFAULT;
5125                 if (get_user(offset, uaddr))
5126                         break;
5127
5128                 raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
5129
5130                 matched = (vcpu->arch.virtual_tsc_khz &&
5131                            kvm->arch.last_tsc_khz == vcpu->arch.virtual_tsc_khz &&
5132                            kvm->arch.last_tsc_offset == offset);
5133
5134                 tsc = kvm_scale_tsc(rdtsc(), vcpu->arch.l1_tsc_scaling_ratio) + offset;
5135                 ns = get_kvmclock_base_ns();
5136
5137                 __kvm_synchronize_tsc(vcpu, offset, tsc, ns, matched);
5138                 raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
5139
5140                 r = 0;
5141                 break;
5142         }
5143         default:
5144                 r = -ENXIO;
5145         }
5146
5147         return r;
5148 }
5149
5150 static int kvm_vcpu_ioctl_device_attr(struct kvm_vcpu *vcpu,
5151                                       unsigned int ioctl,
5152                                       void __user *argp)
5153 {
5154         struct kvm_device_attr attr;
5155         int r;
5156
5157         if (copy_from_user(&attr, argp, sizeof(attr)))
5158                 return -EFAULT;
5159
5160         if (attr.group != KVM_VCPU_TSC_CTRL)
5161                 return -ENXIO;
5162
5163         switch (ioctl) {
5164         case KVM_HAS_DEVICE_ATTR:
5165                 r = kvm_arch_tsc_has_attr(vcpu, &attr);
5166                 break;
5167         case KVM_GET_DEVICE_ATTR:
5168                 r = kvm_arch_tsc_get_attr(vcpu, &attr);
5169                 break;
5170         case KVM_SET_DEVICE_ATTR:
5171                 r = kvm_arch_tsc_set_attr(vcpu, &attr);
5172                 break;
5173         }
5174
5175         return r;
5176 }
5177
5178 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
5179                                      struct kvm_enable_cap *cap)
5180 {
5181         int r;
5182         uint16_t vmcs_version;
5183         void __user *user_ptr;
5184
5185         if (cap->flags)
5186                 return -EINVAL;
5187
5188         switch (cap->cap) {
5189         case KVM_CAP_HYPERV_SYNIC2:
5190                 if (cap->args[0])
5191                         return -EINVAL;
5192                 fallthrough;
5193
5194         case KVM_CAP_HYPERV_SYNIC:
5195                 if (!irqchip_in_kernel(vcpu->kvm))
5196                         return -EINVAL;
5197                 return kvm_hv_activate_synic(vcpu, cap->cap ==
5198                                              KVM_CAP_HYPERV_SYNIC2);
5199         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
5200                 if (!kvm_x86_ops.nested_ops->enable_evmcs)
5201                         return -ENOTTY;
5202                 r = kvm_x86_ops.nested_ops->enable_evmcs(vcpu, &vmcs_version);
5203                 if (!r) {
5204                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
5205                         if (copy_to_user(user_ptr, &vmcs_version,
5206                                          sizeof(vmcs_version)))
5207                                 r = -EFAULT;
5208                 }
5209                 return r;
5210         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
5211                 if (!kvm_x86_ops.enable_direct_tlbflush)
5212                         return -ENOTTY;
5213
5214                 return static_call(kvm_x86_enable_direct_tlbflush)(vcpu);
5215
5216         case KVM_CAP_HYPERV_ENFORCE_CPUID:
5217                 return kvm_hv_set_enforce_cpuid(vcpu, cap->args[0]);
5218
5219         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
5220                 vcpu->arch.pv_cpuid.enforce = cap->args[0];
5221                 if (vcpu->arch.pv_cpuid.enforce)
5222                         kvm_update_pv_runtime(vcpu);
5223
5224                 return 0;
5225         default:
5226                 return -EINVAL;
5227         }
5228 }
5229
5230 long kvm_arch_vcpu_ioctl(struct file *filp,
5231                          unsigned int ioctl, unsigned long arg)
5232 {
5233         struct kvm_vcpu *vcpu = filp->private_data;
5234         void __user *argp = (void __user *)arg;
5235         int r;
5236         union {
5237                 struct kvm_sregs2 *sregs2;
5238                 struct kvm_lapic_state *lapic;
5239                 struct kvm_xsave *xsave;
5240                 struct kvm_xcrs *xcrs;
5241                 void *buffer;
5242         } u;
5243
5244         vcpu_load(vcpu);
5245
5246         u.buffer = NULL;
5247         switch (ioctl) {
5248         case KVM_GET_LAPIC: {
5249                 r = -EINVAL;
5250                 if (!lapic_in_kernel(vcpu))
5251                         goto out;
5252                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
5253                                 GFP_KERNEL_ACCOUNT);
5254
5255                 r = -ENOMEM;
5256                 if (!u.lapic)
5257                         goto out;
5258                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
5259                 if (r)
5260                         goto out;
5261                 r = -EFAULT;
5262                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
5263                         goto out;
5264                 r = 0;
5265                 break;
5266         }
5267         case KVM_SET_LAPIC: {
5268                 r = -EINVAL;
5269                 if (!lapic_in_kernel(vcpu))
5270                         goto out;
5271                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
5272                 if (IS_ERR(u.lapic)) {
5273                         r = PTR_ERR(u.lapic);
5274                         goto out_nofree;
5275                 }
5276
5277                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
5278                 break;
5279         }
5280         case KVM_INTERRUPT: {
5281                 struct kvm_interrupt irq;
5282
5283                 r = -EFAULT;
5284                 if (copy_from_user(&irq, argp, sizeof(irq)))
5285                         goto out;
5286                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
5287                 break;
5288         }
5289         case KVM_NMI: {
5290                 r = kvm_vcpu_ioctl_nmi(vcpu);
5291                 break;
5292         }
5293         case KVM_SMI: {
5294                 r = kvm_vcpu_ioctl_smi(vcpu);
5295                 break;
5296         }
5297         case KVM_SET_CPUID: {
5298                 struct kvm_cpuid __user *cpuid_arg = argp;
5299                 struct kvm_cpuid cpuid;
5300
5301                 r = -EFAULT;
5302                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5303                         goto out;
5304                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
5305                 break;
5306         }
5307         case KVM_SET_CPUID2: {
5308                 struct kvm_cpuid2 __user *cpuid_arg = argp;
5309                 struct kvm_cpuid2 cpuid;
5310
5311                 r = -EFAULT;
5312                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5313                         goto out;
5314                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
5315                                               cpuid_arg->entries);
5316                 break;
5317         }
5318         case KVM_GET_CPUID2: {
5319                 struct kvm_cpuid2 __user *cpuid_arg = argp;
5320                 struct kvm_cpuid2 cpuid;
5321
5322                 r = -EFAULT;
5323                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5324                         goto out;
5325                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
5326                                               cpuid_arg->entries);
5327                 if (r)
5328                         goto out;
5329                 r = -EFAULT;
5330                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
5331                         goto out;
5332                 r = 0;
5333                 break;
5334         }
5335         case KVM_GET_MSRS: {
5336                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5337                 r = msr_io(vcpu, argp, do_get_msr, 1);
5338                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5339                 break;
5340         }
5341         case KVM_SET_MSRS: {
5342                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5343                 r = msr_io(vcpu, argp, do_set_msr, 0);
5344                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5345                 break;
5346         }
5347         case KVM_TPR_ACCESS_REPORTING: {
5348                 struct kvm_tpr_access_ctl tac;
5349
5350                 r = -EFAULT;
5351                 if (copy_from_user(&tac, argp, sizeof(tac)))
5352                         goto out;
5353                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
5354                 if (r)
5355                         goto out;
5356                 r = -EFAULT;
5357                 if (copy_to_user(argp, &tac, sizeof(tac)))
5358                         goto out;
5359                 r = 0;
5360                 break;
5361         };
5362         case KVM_SET_VAPIC_ADDR: {
5363                 struct kvm_vapic_addr va;
5364                 int idx;
5365
5366                 r = -EINVAL;
5367                 if (!lapic_in_kernel(vcpu))
5368                         goto out;
5369                 r = -EFAULT;
5370                 if (copy_from_user(&va, argp, sizeof(va)))
5371                         goto out;
5372                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5373                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
5374                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5375                 break;
5376         }
5377         case KVM_X86_SETUP_MCE: {
5378                 u64 mcg_cap;
5379
5380                 r = -EFAULT;
5381                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
5382                         goto out;
5383                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
5384                 break;
5385         }
5386         case KVM_X86_SET_MCE: {
5387                 struct kvm_x86_mce mce;
5388
5389                 r = -EFAULT;
5390                 if (copy_from_user(&mce, argp, sizeof(mce)))
5391                         goto out;
5392                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
5393                 break;
5394         }
5395         case KVM_GET_VCPU_EVENTS: {
5396                 struct kvm_vcpu_events events;
5397
5398                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
5399
5400                 r = -EFAULT;
5401                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
5402                         break;
5403                 r = 0;
5404                 break;
5405         }
5406         case KVM_SET_VCPU_EVENTS: {
5407                 struct kvm_vcpu_events events;
5408
5409                 r = -EFAULT;
5410                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
5411                         break;
5412
5413                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
5414                 break;
5415         }
5416         case KVM_GET_DEBUGREGS: {
5417                 struct kvm_debugregs dbgregs;
5418
5419                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
5420
5421                 r = -EFAULT;
5422                 if (copy_to_user(argp, &dbgregs,
5423                                  sizeof(struct kvm_debugregs)))
5424                         break;
5425                 r = 0;
5426                 break;
5427         }
5428         case KVM_SET_DEBUGREGS: {
5429                 struct kvm_debugregs dbgregs;
5430
5431                 r = -EFAULT;
5432                 if (copy_from_user(&dbgregs, argp,
5433                                    sizeof(struct kvm_debugregs)))
5434                         break;
5435
5436                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
5437                 break;
5438         }
5439         case KVM_GET_XSAVE: {
5440                 r = -EINVAL;
5441                 if (vcpu->arch.guest_fpu.uabi_size > sizeof(struct kvm_xsave))
5442                         break;
5443
5444                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
5445                 r = -ENOMEM;
5446                 if (!u.xsave)
5447                         break;
5448
5449                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
5450
5451                 r = -EFAULT;
5452                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
5453                         break;
5454                 r = 0;
5455                 break;
5456         }
5457         case KVM_SET_XSAVE: {
5458                 int size = vcpu->arch.guest_fpu.uabi_size;
5459
5460                 u.xsave = memdup_user(argp, size);
5461                 if (IS_ERR(u.xsave)) {
5462                         r = PTR_ERR(u.xsave);
5463                         goto out_nofree;
5464                 }
5465
5466                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
5467                 break;
5468         }
5469
5470         case KVM_GET_XSAVE2: {
5471                 int size = vcpu->arch.guest_fpu.uabi_size;
5472
5473                 u.xsave = kzalloc(size, GFP_KERNEL_ACCOUNT);
5474                 r = -ENOMEM;
5475                 if (!u.xsave)
5476                         break;
5477
5478                 kvm_vcpu_ioctl_x86_get_xsave2(vcpu, u.buffer, size);
5479
5480                 r = -EFAULT;
5481                 if (copy_to_user(argp, u.xsave, size))
5482                         break;
5483
5484                 r = 0;
5485                 break;
5486         }
5487
5488         case KVM_GET_XCRS: {
5489                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
5490                 r = -ENOMEM;
5491                 if (!u.xcrs)
5492                         break;
5493
5494                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
5495
5496                 r = -EFAULT;
5497                 if (copy_to_user(argp, u.xcrs,
5498                                  sizeof(struct kvm_xcrs)))
5499                         break;
5500                 r = 0;
5501                 break;
5502         }
5503         case KVM_SET_XCRS: {
5504                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
5505                 if (IS_ERR(u.xcrs)) {
5506                         r = PTR_ERR(u.xcrs);
5507                         goto out_nofree;
5508                 }
5509
5510                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
5511                 break;
5512         }
5513         case KVM_SET_TSC_KHZ: {
5514                 u32 user_tsc_khz;
5515
5516                 r = -EINVAL;
5517                 user_tsc_khz = (u32)arg;
5518
5519                 if (kvm_has_tsc_control &&
5520                     user_tsc_khz >= kvm_max_guest_tsc_khz)
5521                         goto out;
5522
5523                 if (user_tsc_khz == 0)
5524                         user_tsc_khz = tsc_khz;
5525
5526                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
5527                         r = 0;
5528
5529                 goto out;
5530         }
5531         case KVM_GET_TSC_KHZ: {
5532                 r = vcpu->arch.virtual_tsc_khz;
5533                 goto out;
5534         }
5535         case KVM_KVMCLOCK_CTRL: {
5536                 r = kvm_set_guest_paused(vcpu);
5537                 goto out;
5538         }
5539         case KVM_ENABLE_CAP: {
5540                 struct kvm_enable_cap cap;
5541
5542                 r = -EFAULT;
5543                 if (copy_from_user(&cap, argp, sizeof(cap)))
5544                         goto out;
5545                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
5546                 break;
5547         }
5548         case KVM_GET_NESTED_STATE: {
5549                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5550                 u32 user_data_size;
5551
5552                 r = -EINVAL;
5553                 if (!kvm_x86_ops.nested_ops->get_state)
5554                         break;
5555
5556                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
5557                 r = -EFAULT;
5558                 if (get_user(user_data_size, &user_kvm_nested_state->size))
5559                         break;
5560
5561                 r = kvm_x86_ops.nested_ops->get_state(vcpu, user_kvm_nested_state,
5562                                                      user_data_size);
5563                 if (r < 0)
5564                         break;
5565
5566                 if (r > user_data_size) {
5567                         if (put_user(r, &user_kvm_nested_state->size))
5568                                 r = -EFAULT;
5569                         else
5570                                 r = -E2BIG;
5571                         break;
5572                 }
5573
5574                 r = 0;
5575                 break;
5576         }
5577         case KVM_SET_NESTED_STATE: {
5578                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5579                 struct kvm_nested_state kvm_state;
5580                 int idx;
5581
5582                 r = -EINVAL;
5583                 if (!kvm_x86_ops.nested_ops->set_state)
5584                         break;
5585
5586                 r = -EFAULT;
5587                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
5588                         break;
5589
5590                 r = -EINVAL;
5591                 if (kvm_state.size < sizeof(kvm_state))
5592                         break;
5593
5594                 if (kvm_state.flags &
5595                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
5596                       | KVM_STATE_NESTED_EVMCS | KVM_STATE_NESTED_MTF_PENDING
5597                       | KVM_STATE_NESTED_GIF_SET))
5598                         break;
5599
5600                 /* nested_run_pending implies guest_mode.  */
5601                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
5602                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
5603                         break;
5604
5605                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5606                 r = kvm_x86_ops.nested_ops->set_state(vcpu, user_kvm_nested_state, &kvm_state);
5607                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5608                 break;
5609         }
5610         case KVM_GET_SUPPORTED_HV_CPUID:
5611                 r = kvm_ioctl_get_supported_hv_cpuid(vcpu, argp);
5612                 break;
5613 #ifdef CONFIG_KVM_XEN
5614         case KVM_XEN_VCPU_GET_ATTR: {
5615                 struct kvm_xen_vcpu_attr xva;
5616
5617                 r = -EFAULT;
5618                 if (copy_from_user(&xva, argp, sizeof(xva)))
5619                         goto out;
5620                 r = kvm_xen_vcpu_get_attr(vcpu, &xva);
5621                 if (!r && copy_to_user(argp, &xva, sizeof(xva)))
5622                         r = -EFAULT;
5623                 break;
5624         }
5625         case KVM_XEN_VCPU_SET_ATTR: {
5626                 struct kvm_xen_vcpu_attr xva;
5627
5628                 r = -EFAULT;
5629                 if (copy_from_user(&xva, argp, sizeof(xva)))
5630                         goto out;
5631                 r = kvm_xen_vcpu_set_attr(vcpu, &xva);
5632                 break;
5633         }
5634 #endif
5635         case KVM_GET_SREGS2: {
5636                 u.sregs2 = kzalloc(sizeof(struct kvm_sregs2), GFP_KERNEL);
5637                 r = -ENOMEM;
5638                 if (!u.sregs2)
5639                         goto out;
5640                 __get_sregs2(vcpu, u.sregs2);
5641                 r = -EFAULT;
5642                 if (copy_to_user(argp, u.sregs2, sizeof(struct kvm_sregs2)))
5643                         goto out;
5644                 r = 0;
5645                 break;
5646         }
5647         case KVM_SET_SREGS2: {
5648                 u.sregs2 = memdup_user(argp, sizeof(struct kvm_sregs2));
5649                 if (IS_ERR(u.sregs2)) {
5650                         r = PTR_ERR(u.sregs2);
5651                         u.sregs2 = NULL;
5652                         goto out;
5653                 }
5654                 r = __set_sregs2(vcpu, u.sregs2);
5655                 break;
5656         }
5657         case KVM_HAS_DEVICE_ATTR:
5658         case KVM_GET_DEVICE_ATTR:
5659         case KVM_SET_DEVICE_ATTR:
5660                 r = kvm_vcpu_ioctl_device_attr(vcpu, ioctl, argp);
5661                 break;
5662         default:
5663                 r = -EINVAL;
5664         }
5665 out:
5666         kfree(u.buffer);
5667 out_nofree:
5668         vcpu_put(vcpu);
5669         return r;
5670 }
5671
5672 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
5673 {
5674         return VM_FAULT_SIGBUS;
5675 }
5676
5677 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
5678 {
5679         int ret;
5680
5681         if (addr > (unsigned int)(-3 * PAGE_SIZE))
5682                 return -EINVAL;
5683         ret = static_call(kvm_x86_set_tss_addr)(kvm, addr);
5684         return ret;
5685 }
5686
5687 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
5688                                               u64 ident_addr)
5689 {
5690         return static_call(kvm_x86_set_identity_map_addr)(kvm, ident_addr);
5691 }
5692
5693 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
5694                                          unsigned long kvm_nr_mmu_pages)
5695 {
5696         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
5697                 return -EINVAL;
5698
5699         mutex_lock(&kvm->slots_lock);
5700
5701         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
5702         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
5703
5704         mutex_unlock(&kvm->slots_lock);
5705         return 0;
5706 }
5707
5708 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
5709 {
5710         return kvm->arch.n_max_mmu_pages;
5711 }
5712
5713 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5714 {
5715         struct kvm_pic *pic = kvm->arch.vpic;
5716         int r;
5717
5718         r = 0;
5719         switch (chip->chip_id) {
5720         case KVM_IRQCHIP_PIC_MASTER:
5721                 memcpy(&chip->chip.pic, &pic->pics[0],
5722                         sizeof(struct kvm_pic_state));
5723                 break;
5724         case KVM_IRQCHIP_PIC_SLAVE:
5725                 memcpy(&chip->chip.pic, &pic->pics[1],
5726                         sizeof(struct kvm_pic_state));
5727                 break;
5728         case KVM_IRQCHIP_IOAPIC:
5729                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
5730                 break;
5731         default:
5732                 r = -EINVAL;
5733                 break;
5734         }
5735         return r;
5736 }
5737
5738 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5739 {
5740         struct kvm_pic *pic = kvm->arch.vpic;
5741         int r;
5742
5743         r = 0;
5744         switch (chip->chip_id) {
5745         case KVM_IRQCHIP_PIC_MASTER:
5746                 spin_lock(&pic->lock);
5747                 memcpy(&pic->pics[0], &chip->chip.pic,
5748                         sizeof(struct kvm_pic_state));
5749                 spin_unlock(&pic->lock);
5750                 break;
5751         case KVM_IRQCHIP_PIC_SLAVE:
5752                 spin_lock(&pic->lock);
5753                 memcpy(&pic->pics[1], &chip->chip.pic,
5754                         sizeof(struct kvm_pic_state));
5755                 spin_unlock(&pic->lock);
5756                 break;
5757         case KVM_IRQCHIP_IOAPIC:
5758                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
5759                 break;
5760         default:
5761                 r = -EINVAL;
5762                 break;
5763         }
5764         kvm_pic_update_irq(pic);
5765         return r;
5766 }
5767
5768 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5769 {
5770         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
5771
5772         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
5773
5774         mutex_lock(&kps->lock);
5775         memcpy(ps, &kps->channels, sizeof(*ps));
5776         mutex_unlock(&kps->lock);
5777         return 0;
5778 }
5779
5780 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5781 {
5782         int i;
5783         struct kvm_pit *pit = kvm->arch.vpit;
5784
5785         mutex_lock(&pit->pit_state.lock);
5786         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
5787         for (i = 0; i < 3; i++)
5788                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
5789         mutex_unlock(&pit->pit_state.lock);
5790         return 0;
5791 }
5792
5793 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5794 {
5795         mutex_lock(&kvm->arch.vpit->pit_state.lock);
5796         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
5797                 sizeof(ps->channels));
5798         ps->flags = kvm->arch.vpit->pit_state.flags;
5799         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
5800         memset(&ps->reserved, 0, sizeof(ps->reserved));
5801         return 0;
5802 }
5803
5804 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5805 {
5806         int start = 0;
5807         int i;
5808         u32 prev_legacy, cur_legacy;
5809         struct kvm_pit *pit = kvm->arch.vpit;
5810
5811         mutex_lock(&pit->pit_state.lock);
5812         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
5813         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
5814         if (!prev_legacy && cur_legacy)
5815                 start = 1;
5816         memcpy(&pit->pit_state.channels, &ps->channels,
5817                sizeof(pit->pit_state.channels));
5818         pit->pit_state.flags = ps->flags;
5819         for (i = 0; i < 3; i++)
5820                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
5821                                    start && i == 0);
5822         mutex_unlock(&pit->pit_state.lock);
5823         return 0;
5824 }
5825
5826 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
5827                                  struct kvm_reinject_control *control)
5828 {
5829         struct kvm_pit *pit = kvm->arch.vpit;
5830
5831         /* pit->pit_state.lock was overloaded to prevent userspace from getting
5832          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5833          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
5834          */
5835         mutex_lock(&pit->pit_state.lock);
5836         kvm_pit_set_reinject(pit, control->pit_reinject);
5837         mutex_unlock(&pit->pit_state.lock);
5838
5839         return 0;
5840 }
5841
5842 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
5843 {
5844
5845         /*
5846          * Flush all CPUs' dirty log buffers to the  dirty_bitmap.  Called
5847          * before reporting dirty_bitmap to userspace.  KVM flushes the buffers
5848          * on all VM-Exits, thus we only need to kick running vCPUs to force a
5849          * VM-Exit.
5850          */
5851         struct kvm_vcpu *vcpu;
5852         unsigned long i;
5853
5854         kvm_for_each_vcpu(i, vcpu, kvm)
5855                 kvm_vcpu_kick(vcpu);
5856 }
5857
5858 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
5859                         bool line_status)
5860 {
5861         if (!irqchip_in_kernel(kvm))
5862                 return -ENXIO;
5863
5864         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
5865                                         irq_event->irq, irq_event->level,
5866                                         line_status);
5867         return 0;
5868 }
5869
5870 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
5871                             struct kvm_enable_cap *cap)
5872 {
5873         int r;
5874
5875         if (cap->flags)
5876                 return -EINVAL;
5877
5878         switch (cap->cap) {
5879         case KVM_CAP_DISABLE_QUIRKS:
5880                 kvm->arch.disabled_quirks = cap->args[0];
5881                 r = 0;
5882                 break;
5883         case KVM_CAP_SPLIT_IRQCHIP: {
5884                 mutex_lock(&kvm->lock);
5885                 r = -EINVAL;
5886                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
5887                         goto split_irqchip_unlock;
5888                 r = -EEXIST;
5889                 if (irqchip_in_kernel(kvm))
5890                         goto split_irqchip_unlock;
5891                 if (kvm->created_vcpus)
5892                         goto split_irqchip_unlock;
5893                 r = kvm_setup_empty_irq_routing(kvm);
5894                 if (r)
5895                         goto split_irqchip_unlock;
5896                 /* Pairs with irqchip_in_kernel. */
5897                 smp_wmb();
5898                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
5899                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
5900                 kvm_request_apicv_update(kvm, true, APICV_INHIBIT_REASON_ABSENT);
5901                 r = 0;
5902 split_irqchip_unlock:
5903                 mutex_unlock(&kvm->lock);
5904                 break;
5905         }
5906         case KVM_CAP_X2APIC_API:
5907                 r = -EINVAL;
5908                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
5909                         break;
5910
5911                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
5912                         kvm->arch.x2apic_format = true;
5913                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
5914                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
5915
5916                 r = 0;
5917                 break;
5918         case KVM_CAP_X86_DISABLE_EXITS:
5919                 r = -EINVAL;
5920                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
5921                         break;
5922
5923                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
5924                         kvm_can_mwait_in_guest())
5925                         kvm->arch.mwait_in_guest = true;
5926                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
5927                         kvm->arch.hlt_in_guest = true;
5928                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
5929                         kvm->arch.pause_in_guest = true;
5930                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
5931                         kvm->arch.cstate_in_guest = true;
5932                 r = 0;
5933                 break;
5934         case KVM_CAP_MSR_PLATFORM_INFO:
5935                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
5936                 r = 0;
5937                 break;
5938         case KVM_CAP_EXCEPTION_PAYLOAD:
5939                 kvm->arch.exception_payload_enabled = cap->args[0];
5940                 r = 0;
5941                 break;
5942         case KVM_CAP_X86_USER_SPACE_MSR:
5943                 kvm->arch.user_space_msr_mask = cap->args[0];
5944                 r = 0;
5945                 break;
5946         case KVM_CAP_X86_BUS_LOCK_EXIT:
5947                 r = -EINVAL;
5948                 if (cap->args[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE)
5949                         break;
5950
5951                 if ((cap->args[0] & KVM_BUS_LOCK_DETECTION_OFF) &&
5952                     (cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT))
5953                         break;
5954
5955                 if (kvm_has_bus_lock_exit &&
5956                     cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT)
5957                         kvm->arch.bus_lock_detection_enabled = true;
5958                 r = 0;
5959                 break;
5960 #ifdef CONFIG_X86_SGX_KVM
5961         case KVM_CAP_SGX_ATTRIBUTE: {
5962                 unsigned long allowed_attributes = 0;
5963
5964                 r = sgx_set_attribute(&allowed_attributes, cap->args[0]);
5965                 if (r)
5966                         break;
5967
5968                 /* KVM only supports the PROVISIONKEY privileged attribute. */
5969                 if ((allowed_attributes & SGX_ATTR_PROVISIONKEY) &&
5970                     !(allowed_attributes & ~SGX_ATTR_PROVISIONKEY))
5971                         kvm->arch.sgx_provisioning_allowed = true;
5972                 else
5973                         r = -EINVAL;
5974                 break;
5975         }
5976 #endif
5977         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
5978                 r = -EINVAL;
5979                 if (!kvm_x86_ops.vm_copy_enc_context_from)
5980                         break;
5981
5982                 r = static_call(kvm_x86_vm_copy_enc_context_from)(kvm, cap->args[0]);
5983                 break;
5984         case KVM_CAP_VM_MOVE_ENC_CONTEXT_FROM:
5985                 r = -EINVAL;
5986                 if (!kvm_x86_ops.vm_move_enc_context_from)
5987                         break;
5988
5989                 r = static_call(kvm_x86_vm_move_enc_context_from)(kvm, cap->args[0]);
5990                 break;
5991         case KVM_CAP_EXIT_HYPERCALL:
5992                 if (cap->args[0] & ~KVM_EXIT_HYPERCALL_VALID_MASK) {
5993                         r = -EINVAL;
5994                         break;
5995                 }
5996                 kvm->arch.hypercall_exit_enabled = cap->args[0];
5997                 r = 0;
5998                 break;
5999         case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
6000                 r = -EINVAL;
6001                 if (cap->args[0] & ~1)
6002                         break;
6003                 kvm->arch.exit_on_emulation_error = cap->args[0];
6004                 r = 0;
6005                 break;
6006         default:
6007                 r = -EINVAL;
6008                 break;
6009         }
6010         return r;
6011 }
6012
6013 static struct kvm_x86_msr_filter *kvm_alloc_msr_filter(bool default_allow)
6014 {
6015         struct kvm_x86_msr_filter *msr_filter;
6016
6017         msr_filter = kzalloc(sizeof(*msr_filter), GFP_KERNEL_ACCOUNT);
6018         if (!msr_filter)
6019                 return NULL;
6020
6021         msr_filter->default_allow = default_allow;
6022         return msr_filter;
6023 }
6024
6025 static void kvm_free_msr_filter(struct kvm_x86_msr_filter *msr_filter)
6026 {
6027         u32 i;
6028
6029         if (!msr_filter)
6030                 return;
6031
6032         for (i = 0; i < msr_filter->count; i++)
6033                 kfree(msr_filter->ranges[i].bitmap);
6034
6035         kfree(msr_filter);
6036 }
6037
6038 static int kvm_add_msr_filter(struct kvm_x86_msr_filter *msr_filter,
6039                               struct kvm_msr_filter_range *user_range)
6040 {
6041         unsigned long *bitmap = NULL;
6042         size_t bitmap_size;
6043
6044         if (!user_range->nmsrs)
6045                 return 0;
6046
6047         if (user_range->flags & ~(KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE))
6048                 return -EINVAL;
6049
6050         if (!user_range->flags)
6051                 return -EINVAL;
6052
6053         bitmap_size = BITS_TO_LONGS(user_range->nmsrs) * sizeof(long);
6054         if (!bitmap_size || bitmap_size > KVM_MSR_FILTER_MAX_BITMAP_SIZE)
6055                 return -EINVAL;
6056
6057         bitmap = memdup_user((__user u8*)user_range->bitmap, bitmap_size);
6058         if (IS_ERR(bitmap))
6059                 return PTR_ERR(bitmap);
6060
6061         msr_filter->ranges[msr_filter->count] = (struct msr_bitmap_range) {
6062                 .flags = user_range->flags,
6063                 .base = user_range->base,
6064                 .nmsrs = user_range->nmsrs,
6065                 .bitmap = bitmap,
6066         };
6067
6068         msr_filter->count++;
6069         return 0;
6070 }
6071
6072 static int kvm_vm_ioctl_set_msr_filter(struct kvm *kvm, void __user *argp)
6073 {
6074         struct kvm_msr_filter __user *user_msr_filter = argp;
6075         struct kvm_x86_msr_filter *new_filter, *old_filter;
6076         struct kvm_msr_filter filter;
6077         bool default_allow;
6078         bool empty = true;
6079         int r = 0;
6080         u32 i;
6081
6082         if (copy_from_user(&filter, user_msr_filter, sizeof(filter)))
6083                 return -EFAULT;
6084
6085         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++)
6086                 empty &= !filter.ranges[i].nmsrs;
6087
6088         default_allow = !(filter.flags & KVM_MSR_FILTER_DEFAULT_DENY);
6089         if (empty && !default_allow)
6090                 return -EINVAL;
6091
6092         new_filter = kvm_alloc_msr_filter(default_allow);
6093         if (!new_filter)
6094                 return -ENOMEM;
6095
6096         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++) {
6097                 r = kvm_add_msr_filter(new_filter, &filter.ranges[i]);
6098                 if (r) {
6099                         kvm_free_msr_filter(new_filter);
6100                         return r;
6101                 }
6102         }
6103
6104         mutex_lock(&kvm->lock);
6105
6106         /* The per-VM filter is protected by kvm->lock... */
6107         old_filter = srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1);
6108
6109         rcu_assign_pointer(kvm->arch.msr_filter, new_filter);
6110         synchronize_srcu(&kvm->srcu);
6111
6112         kvm_free_msr_filter(old_filter);
6113
6114         kvm_make_all_cpus_request(kvm, KVM_REQ_MSR_FILTER_CHANGED);
6115         mutex_unlock(&kvm->lock);
6116
6117         return 0;
6118 }
6119
6120 #ifdef CONFIG_HAVE_KVM_PM_NOTIFIER
6121 static int kvm_arch_suspend_notifier(struct kvm *kvm)
6122 {
6123         struct kvm_vcpu *vcpu;
6124         unsigned long i;
6125         int ret = 0;
6126
6127         mutex_lock(&kvm->lock);
6128         kvm_for_each_vcpu(i, vcpu, kvm) {
6129                 if (!vcpu->arch.pv_time_enabled)
6130                         continue;
6131
6132                 ret = kvm_set_guest_paused(vcpu);
6133                 if (ret) {
6134                         kvm_err("Failed to pause guest VCPU%d: %d\n",
6135                                 vcpu->vcpu_id, ret);
6136                         break;
6137                 }
6138         }
6139         mutex_unlock(&kvm->lock);
6140
6141         return ret ? NOTIFY_BAD : NOTIFY_DONE;
6142 }
6143
6144 int kvm_arch_pm_notifier(struct kvm *kvm, unsigned long state)
6145 {
6146         switch (state) {
6147         case PM_HIBERNATION_PREPARE:
6148         case PM_SUSPEND_PREPARE:
6149                 return kvm_arch_suspend_notifier(kvm);
6150         }
6151
6152         return NOTIFY_DONE;
6153 }
6154 #endif /* CONFIG_HAVE_KVM_PM_NOTIFIER */
6155
6156 static int kvm_vm_ioctl_get_clock(struct kvm *kvm, void __user *argp)
6157 {
6158         struct kvm_clock_data data = { 0 };
6159
6160         get_kvmclock(kvm, &data);
6161         if (copy_to_user(argp, &data, sizeof(data)))
6162                 return -EFAULT;
6163
6164         return 0;
6165 }
6166
6167 static int kvm_vm_ioctl_set_clock(struct kvm *kvm, void __user *argp)
6168 {
6169         struct kvm_arch *ka = &kvm->arch;
6170         struct kvm_clock_data data;
6171         u64 now_raw_ns;
6172
6173         if (copy_from_user(&data, argp, sizeof(data)))
6174                 return -EFAULT;
6175
6176         /*
6177          * Only KVM_CLOCK_REALTIME is used, but allow passing the
6178          * result of KVM_GET_CLOCK back to KVM_SET_CLOCK.
6179          */
6180         if (data.flags & ~KVM_CLOCK_VALID_FLAGS)
6181                 return -EINVAL;
6182
6183         kvm_hv_invalidate_tsc_page(kvm);
6184         kvm_start_pvclock_update(kvm);
6185         pvclock_update_vm_gtod_copy(kvm);
6186
6187         /*
6188          * This pairs with kvm_guest_time_update(): when masterclock is
6189          * in use, we use master_kernel_ns + kvmclock_offset to set
6190          * unsigned 'system_time' so if we use get_kvmclock_ns() (which
6191          * is slightly ahead) here we risk going negative on unsigned
6192          * 'system_time' when 'data.clock' is very small.
6193          */
6194         if (data.flags & KVM_CLOCK_REALTIME) {
6195                 u64 now_real_ns = ktime_get_real_ns();
6196
6197                 /*
6198                  * Avoid stepping the kvmclock backwards.
6199                  */
6200                 if (now_real_ns > data.realtime)
6201                         data.clock += now_real_ns - data.realtime;
6202         }
6203
6204         if (ka->use_master_clock)
6205                 now_raw_ns = ka->master_kernel_ns;
6206         else
6207                 now_raw_ns = get_kvmclock_base_ns();
6208         ka->kvmclock_offset = data.clock - now_raw_ns;
6209         kvm_end_pvclock_update(kvm);
6210         return 0;
6211 }
6212
6213 long kvm_arch_vm_ioctl(struct file *filp,
6214                        unsigned int ioctl, unsigned long arg)
6215 {
6216         struct kvm *kvm = filp->private_data;
6217         void __user *argp = (void __user *)arg;
6218         int r = -ENOTTY;
6219         /*
6220          * This union makes it completely explicit to gcc-3.x
6221          * that these two variables' stack usage should be
6222          * combined, not added together.
6223          */
6224         union {
6225                 struct kvm_pit_state ps;
6226                 struct kvm_pit_state2 ps2;
6227                 struct kvm_pit_config pit_config;
6228         } u;
6229
6230         switch (ioctl) {
6231         case KVM_SET_TSS_ADDR:
6232                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
6233                 break;
6234         case KVM_SET_IDENTITY_MAP_ADDR: {
6235                 u64 ident_addr;
6236
6237                 mutex_lock(&kvm->lock);
6238                 r = -EINVAL;
6239                 if (kvm->created_vcpus)
6240                         goto set_identity_unlock;
6241                 r = -EFAULT;
6242                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
6243                         goto set_identity_unlock;
6244                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
6245 set_identity_unlock:
6246                 mutex_unlock(&kvm->lock);
6247                 break;
6248         }
6249         case KVM_SET_NR_MMU_PAGES:
6250                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
6251                 break;
6252         case KVM_GET_NR_MMU_PAGES:
6253                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
6254                 break;
6255         case KVM_CREATE_IRQCHIP: {
6256                 mutex_lock(&kvm->lock);
6257
6258                 r = -EEXIST;
6259                 if (irqchip_in_kernel(kvm))
6260                         goto create_irqchip_unlock;
6261
6262                 r = -EINVAL;
6263                 if (kvm->created_vcpus)
6264                         goto create_irqchip_unlock;
6265
6266                 r = kvm_pic_init(kvm);
6267                 if (r)
6268                         goto create_irqchip_unlock;
6269
6270                 r = kvm_ioapic_init(kvm);
6271                 if (r) {
6272                         kvm_pic_destroy(kvm);
6273                         goto create_irqchip_unlock;
6274                 }
6275
6276                 r = kvm_setup_default_irq_routing(kvm);
6277                 if (r) {
6278                         kvm_ioapic_destroy(kvm);
6279                         kvm_pic_destroy(kvm);
6280                         goto create_irqchip_unlock;
6281                 }
6282                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
6283                 smp_wmb();
6284                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
6285                 kvm_request_apicv_update(kvm, true, APICV_INHIBIT_REASON_ABSENT);
6286         create_irqchip_unlock:
6287                 mutex_unlock(&kvm->lock);
6288                 break;
6289         }
6290         case KVM_CREATE_PIT:
6291                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
6292                 goto create_pit;
6293         case KVM_CREATE_PIT2:
6294                 r = -EFAULT;
6295                 if (copy_from_user(&u.pit_config, argp,
6296                                    sizeof(struct kvm_pit_config)))
6297                         goto out;
6298         create_pit:
6299                 mutex_lock(&kvm->lock);
6300                 r = -EEXIST;
6301                 if (kvm->arch.vpit)
6302                         goto create_pit_unlock;
6303                 r = -ENOMEM;
6304                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
6305                 if (kvm->arch.vpit)
6306                         r = 0;
6307         create_pit_unlock:
6308                 mutex_unlock(&kvm->lock);
6309                 break;
6310         case KVM_GET_IRQCHIP: {
6311                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
6312                 struct kvm_irqchip *chip;
6313
6314                 chip = memdup_user(argp, sizeof(*chip));
6315                 if (IS_ERR(chip)) {
6316                         r = PTR_ERR(chip);
6317                         goto out;
6318                 }
6319
6320                 r = -ENXIO;
6321                 if (!irqchip_kernel(kvm))
6322                         goto get_irqchip_out;
6323                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
6324                 if (r)
6325                         goto get_irqchip_out;
6326                 r = -EFAULT;
6327                 if (copy_to_user(argp, chip, sizeof(*chip)))
6328                         goto get_irqchip_out;
6329                 r = 0;
6330         get_irqchip_out:
6331                 kfree(chip);
6332                 break;
6333         }
6334         case KVM_SET_IRQCHIP: {
6335                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
6336                 struct kvm_irqchip *chip;
6337
6338                 chip = memdup_user(argp, sizeof(*chip));
6339                 if (IS_ERR(chip)) {
6340                         r = PTR_ERR(chip);
6341                         goto out;
6342                 }
6343
6344                 r = -ENXIO;
6345                 if (!irqchip_kernel(kvm))
6346                         goto set_irqchip_out;
6347                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
6348         set_irqchip_out:
6349                 kfree(chip);
6350                 break;
6351         }
6352         case KVM_GET_PIT: {
6353                 r = -EFAULT;
6354                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
6355                         goto out;
6356                 r = -ENXIO;
6357                 if (!kvm->arch.vpit)
6358                         goto out;
6359                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
6360                 if (r)
6361                         goto out;
6362                 r = -EFAULT;
6363                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
6364                         goto out;
6365                 r = 0;
6366                 break;
6367         }
6368         case KVM_SET_PIT: {
6369                 r = -EFAULT;
6370                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
6371                         goto out;
6372                 mutex_lock(&kvm->lock);
6373                 r = -ENXIO;
6374                 if (!kvm->arch.vpit)
6375                         goto set_pit_out;
6376                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
6377 set_pit_out:
6378                 mutex_unlock(&kvm->lock);
6379                 break;
6380         }
6381         case KVM_GET_PIT2: {
6382                 r = -ENXIO;
6383                 if (!kvm->arch.vpit)
6384                         goto out;
6385                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
6386                 if (r)
6387                         goto out;
6388                 r = -EFAULT;
6389                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
6390                         goto out;
6391                 r = 0;
6392                 break;
6393         }
6394         case KVM_SET_PIT2: {
6395                 r = -EFAULT;
6396                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
6397                         goto out;
6398                 mutex_lock(&kvm->lock);
6399                 r = -ENXIO;
6400                 if (!kvm->arch.vpit)
6401                         goto set_pit2_out;
6402                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
6403 set_pit2_out:
6404                 mutex_unlock(&kvm->lock);
6405                 break;
6406         }
6407         case KVM_REINJECT_CONTROL: {
6408                 struct kvm_reinject_control control;
6409                 r =  -EFAULT;
6410                 if (copy_from_user(&control, argp, sizeof(control)))
6411                         goto out;
6412                 r = -ENXIO;
6413                 if (!kvm->arch.vpit)
6414                         goto out;
6415                 r = kvm_vm_ioctl_reinject(kvm, &control);
6416                 break;
6417         }
6418         case KVM_SET_BOOT_CPU_ID:
6419                 r = 0;
6420                 mutex_lock(&kvm->lock);
6421                 if (kvm->created_vcpus)
6422                         r = -EBUSY;
6423                 else
6424                         kvm->arch.bsp_vcpu_id = arg;
6425                 mutex_unlock(&kvm->lock);
6426                 break;
6427 #ifdef CONFIG_KVM_XEN
6428         case KVM_XEN_HVM_CONFIG: {
6429                 struct kvm_xen_hvm_config xhc;
6430                 r = -EFAULT;
6431                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
6432                         goto out;
6433                 r = kvm_xen_hvm_config(kvm, &xhc);
6434                 break;
6435         }
6436         case KVM_XEN_HVM_GET_ATTR: {
6437                 struct kvm_xen_hvm_attr xha;
6438
6439                 r = -EFAULT;
6440                 if (copy_from_user(&xha, argp, sizeof(xha)))
6441                         goto out;
6442                 r = kvm_xen_hvm_get_attr(kvm, &xha);
6443                 if (!r && copy_to_user(argp, &xha, sizeof(xha)))
6444                         r = -EFAULT;
6445                 break;
6446         }
6447         case KVM_XEN_HVM_SET_ATTR: {
6448                 struct kvm_xen_hvm_attr xha;
6449
6450                 r = -EFAULT;
6451                 if (copy_from_user(&xha, argp, sizeof(xha)))
6452                         goto out;
6453                 r = kvm_xen_hvm_set_attr(kvm, &xha);
6454                 break;
6455         }
6456 #endif
6457         case KVM_SET_CLOCK:
6458                 r = kvm_vm_ioctl_set_clock(kvm, argp);
6459                 break;
6460         case KVM_GET_CLOCK:
6461                 r = kvm_vm_ioctl_get_clock(kvm, argp);
6462                 break;
6463         case KVM_MEMORY_ENCRYPT_OP: {
6464                 r = -ENOTTY;
6465                 if (!kvm_x86_ops.mem_enc_ioctl)
6466                         goto out;
6467
6468                 r = static_call(kvm_x86_mem_enc_ioctl)(kvm, argp);
6469                 break;
6470         }
6471         case KVM_MEMORY_ENCRYPT_REG_REGION: {
6472                 struct kvm_enc_region region;
6473
6474                 r = -EFAULT;
6475                 if (copy_from_user(&region, argp, sizeof(region)))
6476                         goto out;
6477
6478                 r = -ENOTTY;
6479                 if (!kvm_x86_ops.mem_enc_register_region)
6480                         goto out;
6481
6482                 r = static_call(kvm_x86_mem_enc_register_region)(kvm, &region);
6483                 break;
6484         }
6485         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
6486                 struct kvm_enc_region region;
6487
6488                 r = -EFAULT;
6489                 if (copy_from_user(&region, argp, sizeof(region)))
6490                         goto out;
6491
6492                 r = -ENOTTY;
6493                 if (!kvm_x86_ops.mem_enc_unregister_region)
6494                         goto out;
6495
6496                 r = static_call(kvm_x86_mem_enc_unregister_region)(kvm, &region);
6497                 break;
6498         }
6499         case KVM_HYPERV_EVENTFD: {
6500                 struct kvm_hyperv_eventfd hvevfd;
6501
6502                 r = -EFAULT;
6503                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
6504                         goto out;
6505                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
6506                 break;
6507         }
6508         case KVM_SET_PMU_EVENT_FILTER:
6509                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
6510                 break;
6511         case KVM_X86_SET_MSR_FILTER:
6512                 r = kvm_vm_ioctl_set_msr_filter(kvm, argp);
6513                 break;
6514         default:
6515                 r = -ENOTTY;
6516         }
6517 out:
6518         return r;
6519 }
6520
6521 static void kvm_init_msr_list(void)
6522 {
6523         struct x86_pmu_capability x86_pmu;
6524         u32 dummy[2];
6525         unsigned i;
6526
6527         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
6528                          "Please update the fixed PMCs in msrs_to_saved_all[]");
6529
6530         perf_get_x86_pmu_capability(&x86_pmu);
6531
6532         num_msrs_to_save = 0;
6533         num_emulated_msrs = 0;
6534         num_msr_based_features = 0;
6535
6536         for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
6537                 if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
6538                         continue;
6539
6540                 /*
6541                  * Even MSRs that are valid in the host may not be exposed
6542                  * to the guests in some cases.
6543                  */
6544                 switch (msrs_to_save_all[i]) {
6545                 case MSR_IA32_BNDCFGS:
6546                         if (!kvm_mpx_supported())
6547                                 continue;
6548                         break;
6549                 case MSR_TSC_AUX:
6550                         if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP) &&
6551                             !kvm_cpu_cap_has(X86_FEATURE_RDPID))
6552                                 continue;
6553                         break;
6554                 case MSR_IA32_UMWAIT_CONTROL:
6555                         if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG))
6556                                 continue;
6557                         break;
6558                 case MSR_IA32_RTIT_CTL:
6559                 case MSR_IA32_RTIT_STATUS:
6560                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT))
6561                                 continue;
6562                         break;
6563                 case MSR_IA32_RTIT_CR3_MATCH:
6564                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6565                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
6566                                 continue;
6567                         break;
6568                 case MSR_IA32_RTIT_OUTPUT_BASE:
6569                 case MSR_IA32_RTIT_OUTPUT_MASK:
6570                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6571                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
6572                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
6573                                 continue;
6574                         break;
6575                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
6576                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6577                                 msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
6578                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
6579                                 continue;
6580                         break;
6581                 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
6582                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
6583                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6584                                 continue;
6585                         break;
6586                 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
6587                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
6588                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6589                                 continue;
6590                         break;
6591                 case MSR_IA32_XFD:
6592                 case MSR_IA32_XFD_ERR:
6593                         if (!kvm_cpu_cap_has(X86_FEATURE_XFD))
6594                                 continue;
6595                         break;
6596                 default:
6597                         break;
6598                 }
6599
6600                 msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
6601         }
6602
6603         for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
6604                 if (!static_call(kvm_x86_has_emulated_msr)(NULL, emulated_msrs_all[i]))
6605                         continue;
6606
6607                 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
6608         }
6609
6610         for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
6611                 struct kvm_msr_entry msr;
6612
6613                 msr.index = msr_based_features_all[i];
6614                 if (kvm_get_msr_feature(&msr))
6615                         continue;
6616
6617                 msr_based_features[num_msr_based_features++] = msr_based_features_all[i];
6618         }
6619 }
6620
6621 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
6622                            const void *v)
6623 {
6624         int handled = 0;
6625         int n;
6626
6627         do {
6628                 n = min(len, 8);
6629                 if (!(lapic_in_kernel(vcpu) &&
6630                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
6631                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
6632                         break;
6633                 handled += n;
6634                 addr += n;
6635                 len -= n;
6636                 v += n;
6637         } while (len);
6638
6639         return handled;
6640 }
6641
6642 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
6643 {
6644         int handled = 0;
6645         int n;
6646
6647         do {
6648                 n = min(len, 8);
6649                 if (!(lapic_in_kernel(vcpu) &&
6650                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
6651                                          addr, n, v))
6652                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
6653                         break;
6654                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
6655                 handled += n;
6656                 addr += n;
6657                 len -= n;
6658                 v += n;
6659         } while (len);
6660
6661         return handled;
6662 }
6663
6664 static void kvm_set_segment(struct kvm_vcpu *vcpu,
6665                         struct kvm_segment *var, int seg)
6666 {
6667         static_call(kvm_x86_set_segment)(vcpu, var, seg);
6668 }
6669
6670 void kvm_get_segment(struct kvm_vcpu *vcpu,
6671                      struct kvm_segment *var, int seg)
6672 {
6673         static_call(kvm_x86_get_segment)(vcpu, var, seg);
6674 }
6675
6676 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
6677                            struct x86_exception *exception)
6678 {
6679         struct kvm_mmu *mmu = vcpu->arch.mmu;
6680         gpa_t t_gpa;
6681
6682         BUG_ON(!mmu_is_nested(vcpu));
6683
6684         /* NPT walks are always user-walks */
6685         access |= PFERR_USER_MASK;
6686         t_gpa  = mmu->gva_to_gpa(vcpu, mmu, gpa, access, exception);
6687
6688         return t_gpa;
6689 }
6690
6691 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
6692                               struct x86_exception *exception)
6693 {
6694         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6695
6696         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6697         return mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
6698 }
6699 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_read);
6700
6701  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
6702                                 struct x86_exception *exception)
6703 {
6704         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6705
6706         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6707         access |= PFERR_FETCH_MASK;
6708         return mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
6709 }
6710
6711 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
6712                                struct x86_exception *exception)
6713 {
6714         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6715
6716         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6717         access |= PFERR_WRITE_MASK;
6718         return mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
6719 }
6720 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_write);
6721
6722 /* uses this to access any guest's mapped memory without checking CPL */
6723 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
6724                                 struct x86_exception *exception)
6725 {
6726         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6727
6728         return mmu->gva_to_gpa(vcpu, mmu, gva, 0, exception);
6729 }
6730
6731 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6732                                       struct kvm_vcpu *vcpu, u32 access,
6733                                       struct x86_exception *exception)
6734 {
6735         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6736         void *data = val;
6737         int r = X86EMUL_CONTINUE;
6738
6739         while (bytes) {
6740                 gpa_t gpa = mmu->gva_to_gpa(vcpu, mmu, addr, access, exception);
6741                 unsigned offset = addr & (PAGE_SIZE-1);
6742                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
6743                 int ret;
6744
6745                 if (gpa == UNMAPPED_GVA)
6746                         return X86EMUL_PROPAGATE_FAULT;
6747                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
6748                                                offset, toread);
6749                 if (ret < 0) {
6750                         r = X86EMUL_IO_NEEDED;
6751                         goto out;
6752                 }
6753
6754                 bytes -= toread;
6755                 data += toread;
6756                 addr += toread;
6757         }
6758 out:
6759         return r;
6760 }
6761
6762 /* used for instruction fetching */
6763 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
6764                                 gva_t addr, void *val, unsigned int bytes,
6765                                 struct x86_exception *exception)
6766 {
6767         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6768         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6769         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6770         unsigned offset;
6771         int ret;
6772
6773         /* Inline kvm_read_guest_virt_helper for speed.  */
6774         gpa_t gpa = mmu->gva_to_gpa(vcpu, mmu, addr, access|PFERR_FETCH_MASK,
6775                                     exception);
6776         if (unlikely(gpa == UNMAPPED_GVA))
6777                 return X86EMUL_PROPAGATE_FAULT;
6778
6779         offset = addr & (PAGE_SIZE-1);
6780         if (WARN_ON(offset + bytes > PAGE_SIZE))
6781                 bytes = (unsigned)PAGE_SIZE - offset;
6782         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
6783                                        offset, bytes);
6784         if (unlikely(ret < 0))
6785                 return X86EMUL_IO_NEEDED;
6786
6787         return X86EMUL_CONTINUE;
6788 }
6789
6790 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
6791                                gva_t addr, void *val, unsigned int bytes,
6792                                struct x86_exception *exception)
6793 {
6794         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6795
6796         /*
6797          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
6798          * is returned, but our callers are not ready for that and they blindly
6799          * call kvm_inject_page_fault.  Ensure that they at least do not leak
6800          * uninitialized kernel stack memory into cr2 and error code.
6801          */
6802         memset(exception, 0, sizeof(*exception));
6803         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
6804                                           exception);
6805 }
6806 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
6807
6808 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
6809                              gva_t addr, void *val, unsigned int bytes,
6810                              struct x86_exception *exception, bool system)
6811 {
6812         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6813         u32 access = 0;
6814
6815         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6816                 access |= PFERR_USER_MASK;
6817
6818         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
6819 }
6820
6821 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
6822                 unsigned long addr, void *val, unsigned int bytes)
6823 {
6824         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6825         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
6826
6827         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
6828 }
6829
6830 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6831                                       struct kvm_vcpu *vcpu, u32 access,
6832                                       struct x86_exception *exception)
6833 {
6834         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6835         void *data = val;
6836         int r = X86EMUL_CONTINUE;
6837
6838         while (bytes) {
6839                 gpa_t gpa = mmu->gva_to_gpa(vcpu, mmu, addr, access, exception);
6840                 unsigned offset = addr & (PAGE_SIZE-1);
6841                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
6842                 int ret;
6843
6844                 if (gpa == UNMAPPED_GVA)
6845                         return X86EMUL_PROPAGATE_FAULT;
6846                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
6847                 if (ret < 0) {
6848                         r = X86EMUL_IO_NEEDED;
6849                         goto out;
6850                 }
6851
6852                 bytes -= towrite;
6853                 data += towrite;
6854                 addr += towrite;
6855         }
6856 out:
6857         return r;
6858 }
6859
6860 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
6861                               unsigned int bytes, struct x86_exception *exception,
6862                               bool system)
6863 {
6864         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6865         u32 access = PFERR_WRITE_MASK;
6866
6867         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6868                 access |= PFERR_USER_MASK;
6869
6870         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6871                                            access, exception);
6872 }
6873
6874 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
6875                                 unsigned int bytes, struct x86_exception *exception)
6876 {
6877         /* kvm_write_guest_virt_system can pull in tons of pages. */
6878         vcpu->arch.l1tf_flush_l1d = true;
6879
6880         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6881                                            PFERR_WRITE_MASK, exception);
6882 }
6883 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
6884
6885 static int kvm_can_emulate_insn(struct kvm_vcpu *vcpu, int emul_type,
6886                                 void *insn, int insn_len)
6887 {
6888         return static_call(kvm_x86_can_emulate_instruction)(vcpu, emul_type,
6889                                                             insn, insn_len);
6890 }
6891
6892 int handle_ud(struct kvm_vcpu *vcpu)
6893 {
6894         static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
6895         int emul_type = EMULTYPE_TRAP_UD;
6896         char sig[5]; /* ud2; .ascii "kvm" */
6897         struct x86_exception e;
6898
6899         if (unlikely(!kvm_can_emulate_insn(vcpu, emul_type, NULL, 0)))
6900                 return 1;
6901
6902         if (force_emulation_prefix &&
6903             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
6904                                 sig, sizeof(sig), &e) == 0 &&
6905             memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
6906                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
6907                 emul_type = EMULTYPE_TRAP_UD_FORCED;
6908         }
6909
6910         return kvm_emulate_instruction(vcpu, emul_type);
6911 }
6912 EXPORT_SYMBOL_GPL(handle_ud);
6913
6914 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6915                             gpa_t gpa, bool write)
6916 {
6917         /* For APIC access vmexit */
6918         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6919                 return 1;
6920
6921         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
6922                 trace_vcpu_match_mmio(gva, gpa, write, true);
6923                 return 1;
6924         }
6925
6926         return 0;
6927 }
6928
6929 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6930                                 gpa_t *gpa, struct x86_exception *exception,
6931                                 bool write)
6932 {
6933         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6934         u32 access = ((static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0)
6935                 | (write ? PFERR_WRITE_MASK : 0);
6936
6937         /*
6938          * currently PKRU is only applied to ept enabled guest so
6939          * there is no pkey in EPT page table for L1 guest or EPT
6940          * shadow page table for L2 guest.
6941          */
6942         if (vcpu_match_mmio_gva(vcpu, gva) && (!is_paging(vcpu) ||
6943             !permission_fault(vcpu, vcpu->arch.walk_mmu,
6944                               vcpu->arch.mmio_access, 0, access))) {
6945                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
6946                                         (gva & (PAGE_SIZE - 1));
6947                 trace_vcpu_match_mmio(gva, *gpa, write, false);
6948                 return 1;
6949         }
6950
6951         *gpa = mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
6952
6953         if (*gpa == UNMAPPED_GVA)
6954                 return -1;
6955
6956         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
6957 }
6958
6959 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
6960                         const void *val, int bytes)
6961 {
6962         int ret;
6963
6964         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
6965         if (ret < 0)
6966                 return 0;
6967         kvm_page_track_write(vcpu, gpa, val, bytes);
6968         return 1;
6969 }
6970
6971 struct read_write_emulator_ops {
6972         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
6973                                   int bytes);
6974         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
6975                                   void *val, int bytes);
6976         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6977                                int bytes, void *val);
6978         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6979                                     void *val, int bytes);
6980         bool write;
6981 };
6982
6983 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
6984 {
6985         if (vcpu->mmio_read_completed) {
6986                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
6987                                vcpu->mmio_fragments[0].gpa, val);
6988                 vcpu->mmio_read_completed = 0;
6989                 return 1;
6990         }
6991
6992         return 0;
6993 }
6994
6995 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6996                         void *val, int bytes)
6997 {
6998         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
6999 }
7000
7001 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
7002                          void *val, int bytes)
7003 {
7004         return emulator_write_phys(vcpu, gpa, val, bytes);
7005 }
7006
7007 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
7008 {
7009         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
7010         return vcpu_mmio_write(vcpu, gpa, bytes, val);
7011 }
7012
7013 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
7014                           void *val, int bytes)
7015 {
7016         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
7017         return X86EMUL_IO_NEEDED;
7018 }
7019
7020 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
7021                            void *val, int bytes)
7022 {
7023         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
7024
7025         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
7026         return X86EMUL_CONTINUE;
7027 }
7028
7029 static const struct read_write_emulator_ops read_emultor = {
7030         .read_write_prepare = read_prepare,
7031         .read_write_emulate = read_emulate,
7032         .read_write_mmio = vcpu_mmio_read,
7033         .read_write_exit_mmio = read_exit_mmio,
7034 };
7035
7036 static const struct read_write_emulator_ops write_emultor = {
7037         .read_write_emulate = write_emulate,
7038         .read_write_mmio = write_mmio,
7039         .read_write_exit_mmio = write_exit_mmio,
7040         .write = true,
7041 };
7042
7043 static int emulator_read_write_onepage(unsigned long addr, void *val,
7044                                        unsigned int bytes,
7045                                        struct x86_exception *exception,
7046                                        struct kvm_vcpu *vcpu,
7047                                        const struct read_write_emulator_ops *ops)
7048 {
7049         gpa_t gpa;
7050         int handled, ret;
7051         bool write = ops->write;
7052         struct kvm_mmio_fragment *frag;
7053         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7054
7055         /*
7056          * If the exit was due to a NPF we may already have a GPA.
7057          * If the GPA is present, use it to avoid the GVA to GPA table walk.
7058          * Note, this cannot be used on string operations since string
7059          * operation using rep will only have the initial GPA from the NPF
7060          * occurred.
7061          */
7062         if (ctxt->gpa_available && emulator_can_use_gpa(ctxt) &&
7063             (addr & ~PAGE_MASK) == (ctxt->gpa_val & ~PAGE_MASK)) {
7064                 gpa = ctxt->gpa_val;
7065                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
7066         } else {
7067                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
7068                 if (ret < 0)
7069                         return X86EMUL_PROPAGATE_FAULT;
7070         }
7071
7072         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
7073                 return X86EMUL_CONTINUE;
7074
7075         /*
7076          * Is this MMIO handled locally?
7077          */
7078         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
7079         if (handled == bytes)
7080                 return X86EMUL_CONTINUE;
7081
7082         gpa += handled;
7083         bytes -= handled;
7084         val += handled;
7085
7086         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
7087         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
7088         frag->gpa = gpa;
7089         frag->data = val;
7090         frag->len = bytes;
7091         return X86EMUL_CONTINUE;
7092 }
7093
7094 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
7095                         unsigned long addr,
7096                         void *val, unsigned int bytes,
7097                         struct x86_exception *exception,
7098                         const struct read_write_emulator_ops *ops)
7099 {
7100         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7101         gpa_t gpa;
7102         int rc;
7103
7104         if (ops->read_write_prepare &&
7105                   ops->read_write_prepare(vcpu, val, bytes))
7106                 return X86EMUL_CONTINUE;
7107
7108         vcpu->mmio_nr_fragments = 0;
7109
7110         /* Crossing a page boundary? */
7111         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
7112                 int now;
7113
7114                 now = -addr & ~PAGE_MASK;
7115                 rc = emulator_read_write_onepage(addr, val, now, exception,
7116                                                  vcpu, ops);
7117
7118                 if (rc != X86EMUL_CONTINUE)
7119                         return rc;
7120                 addr += now;
7121                 if (ctxt->mode != X86EMUL_MODE_PROT64)
7122                         addr = (u32)addr;
7123                 val += now;
7124                 bytes -= now;
7125         }
7126
7127         rc = emulator_read_write_onepage(addr, val, bytes, exception,
7128                                          vcpu, ops);
7129         if (rc != X86EMUL_CONTINUE)
7130                 return rc;
7131
7132         if (!vcpu->mmio_nr_fragments)
7133                 return rc;
7134
7135         gpa = vcpu->mmio_fragments[0].gpa;
7136
7137         vcpu->mmio_needed = 1;
7138         vcpu->mmio_cur_fragment = 0;
7139
7140         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
7141         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
7142         vcpu->run->exit_reason = KVM_EXIT_MMIO;
7143         vcpu->run->mmio.phys_addr = gpa;
7144
7145         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
7146 }
7147
7148 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
7149                                   unsigned long addr,
7150                                   void *val,
7151                                   unsigned int bytes,
7152                                   struct x86_exception *exception)
7153 {
7154         return emulator_read_write(ctxt, addr, val, bytes,
7155                                    exception, &read_emultor);
7156 }
7157
7158 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
7159                             unsigned long addr,
7160                             const void *val,
7161                             unsigned int bytes,
7162                             struct x86_exception *exception)
7163 {
7164         return emulator_read_write(ctxt, addr, (void *)val, bytes,
7165                                    exception, &write_emultor);
7166 }
7167
7168 #define CMPXCHG_TYPE(t, ptr, old, new) \
7169         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
7170
7171 #ifdef CONFIG_X86_64
7172 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
7173 #else
7174 #  define CMPXCHG64(ptr, old, new) \
7175         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
7176 #endif
7177
7178 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
7179                                      unsigned long addr,
7180                                      const void *old,
7181                                      const void *new,
7182                                      unsigned int bytes,
7183                                      struct x86_exception *exception)
7184 {
7185         struct kvm_host_map map;
7186         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7187         u64 page_line_mask;
7188         gpa_t gpa;
7189         char *kaddr;
7190         bool exchanged;
7191
7192         /* guests cmpxchg8b have to be emulated atomically */
7193         if (bytes > 8 || (bytes & (bytes - 1)))
7194                 goto emul_write;
7195
7196         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
7197
7198         if (gpa == UNMAPPED_GVA ||
7199             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
7200                 goto emul_write;
7201
7202         /*
7203          * Emulate the atomic as a straight write to avoid #AC if SLD is
7204          * enabled in the host and the access splits a cache line.
7205          */
7206         if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))
7207                 page_line_mask = ~(cache_line_size() - 1);
7208         else
7209                 page_line_mask = PAGE_MASK;
7210
7211         if (((gpa + bytes - 1) & page_line_mask) != (gpa & page_line_mask))
7212                 goto emul_write;
7213
7214         if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
7215                 goto emul_write;
7216
7217         kaddr = map.hva + offset_in_page(gpa);
7218
7219         switch (bytes) {
7220         case 1:
7221                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
7222                 break;
7223         case 2:
7224                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
7225                 break;
7226         case 4:
7227                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
7228                 break;
7229         case 8:
7230                 exchanged = CMPXCHG64(kaddr, old, new);
7231                 break;
7232         default:
7233                 BUG();
7234         }
7235
7236         kvm_vcpu_unmap(vcpu, &map, true);
7237
7238         if (!exchanged)
7239                 return X86EMUL_CMPXCHG_FAILED;
7240
7241         kvm_page_track_write(vcpu, gpa, new, bytes);
7242
7243         return X86EMUL_CONTINUE;
7244
7245 emul_write:
7246         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
7247
7248         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
7249 }
7250
7251 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
7252 {
7253         int r = 0, i;
7254
7255         for (i = 0; i < vcpu->arch.pio.count; i++) {
7256                 if (vcpu->arch.pio.in)
7257                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
7258                                             vcpu->arch.pio.size, pd);
7259                 else
7260                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
7261                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
7262                                              pd);
7263                 if (r)
7264                         break;
7265                 pd += vcpu->arch.pio.size;
7266         }
7267         return r;
7268 }
7269
7270 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
7271                                unsigned short port,
7272                                unsigned int count, bool in)
7273 {
7274         vcpu->arch.pio.port = port;
7275         vcpu->arch.pio.in = in;
7276         vcpu->arch.pio.count  = count;
7277         vcpu->arch.pio.size = size;
7278
7279         if (!kernel_pio(vcpu, vcpu->arch.pio_data))
7280                 return 1;
7281
7282         vcpu->run->exit_reason = KVM_EXIT_IO;
7283         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
7284         vcpu->run->io.size = size;
7285         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
7286         vcpu->run->io.count = count;
7287         vcpu->run->io.port = port;
7288
7289         return 0;
7290 }
7291
7292 static int __emulator_pio_in(struct kvm_vcpu *vcpu, int size,
7293                              unsigned short port, unsigned int count)
7294 {
7295         WARN_ON(vcpu->arch.pio.count);
7296         memset(vcpu->arch.pio_data, 0, size * count);
7297         return emulator_pio_in_out(vcpu, size, port, count, true);
7298 }
7299
7300 static void complete_emulator_pio_in(struct kvm_vcpu *vcpu, void *val)
7301 {
7302         int size = vcpu->arch.pio.size;
7303         unsigned count = vcpu->arch.pio.count;
7304         memcpy(val, vcpu->arch.pio_data, size * count);
7305         trace_kvm_pio(KVM_PIO_IN, vcpu->arch.pio.port, size, count, vcpu->arch.pio_data);
7306         vcpu->arch.pio.count = 0;
7307 }
7308
7309 static int emulator_pio_in(struct kvm_vcpu *vcpu, int size,
7310                            unsigned short port, void *val, unsigned int count)
7311 {
7312         if (vcpu->arch.pio.count) {
7313                 /*
7314                  * Complete a previous iteration that required userspace I/O.
7315                  * Note, @count isn't guaranteed to match pio.count as userspace
7316                  * can modify ECX before rerunning the vCPU.  Ignore any such
7317                  * shenanigans as KVM doesn't support modifying the rep count,
7318                  * and the emulator ensures @count doesn't overflow the buffer.
7319                  */
7320         } else {
7321                 int r = __emulator_pio_in(vcpu, size, port, count);
7322                 if (!r)
7323                         return r;
7324
7325                 /* Results already available, fall through.  */
7326         }
7327
7328         complete_emulator_pio_in(vcpu, val);
7329         return 1;
7330 }
7331
7332 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
7333                                     int size, unsigned short port, void *val,
7334                                     unsigned int count)
7335 {
7336         return emulator_pio_in(emul_to_vcpu(ctxt), size, port, val, count);
7337
7338 }
7339
7340 static int emulator_pio_out(struct kvm_vcpu *vcpu, int size,
7341                             unsigned short port, const void *val,
7342                             unsigned int count)
7343 {
7344         int ret;
7345
7346         memcpy(vcpu->arch.pio_data, val, size * count);
7347         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
7348         ret = emulator_pio_in_out(vcpu, size, port, count, false);
7349         if (ret)
7350                 vcpu->arch.pio.count = 0;
7351
7352         return ret;
7353 }
7354
7355 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
7356                                      int size, unsigned short port,
7357                                      const void *val, unsigned int count)
7358 {
7359         return emulator_pio_out(emul_to_vcpu(ctxt), size, port, val, count);
7360 }
7361
7362 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
7363 {
7364         return static_call(kvm_x86_get_segment_base)(vcpu, seg);
7365 }
7366
7367 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
7368 {
7369         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
7370 }
7371
7372 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
7373 {
7374         if (!need_emulate_wbinvd(vcpu))
7375                 return X86EMUL_CONTINUE;
7376
7377         if (static_call(kvm_x86_has_wbinvd_exit)()) {
7378                 int cpu = get_cpu();
7379
7380                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
7381                 on_each_cpu_mask(vcpu->arch.wbinvd_dirty_mask,
7382                                 wbinvd_ipi, NULL, 1);
7383                 put_cpu();
7384                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
7385         } else
7386                 wbinvd();
7387         return X86EMUL_CONTINUE;
7388 }
7389
7390 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
7391 {
7392         kvm_emulate_wbinvd_noskip(vcpu);
7393         return kvm_skip_emulated_instruction(vcpu);
7394 }
7395 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
7396
7397
7398
7399 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
7400 {
7401         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
7402 }
7403
7404 static void emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
7405                             unsigned long *dest)
7406 {
7407         kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
7408 }
7409
7410 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
7411                            unsigned long value)
7412 {
7413
7414         return kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
7415 }
7416
7417 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
7418 {
7419         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
7420 }
7421
7422 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
7423 {
7424         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7425         unsigned long value;
7426
7427         switch (cr) {
7428         case 0:
7429                 value = kvm_read_cr0(vcpu);
7430                 break;
7431         case 2:
7432                 value = vcpu->arch.cr2;
7433                 break;
7434         case 3:
7435                 value = kvm_read_cr3(vcpu);
7436                 break;
7437         case 4:
7438                 value = kvm_read_cr4(vcpu);
7439                 break;
7440         case 8:
7441                 value = kvm_get_cr8(vcpu);
7442                 break;
7443         default:
7444                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7445                 return 0;
7446         }
7447
7448         return value;
7449 }
7450
7451 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
7452 {
7453         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7454         int res = 0;
7455
7456         switch (cr) {
7457         case 0:
7458                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
7459                 break;
7460         case 2:
7461                 vcpu->arch.cr2 = val;
7462                 break;
7463         case 3:
7464                 res = kvm_set_cr3(vcpu, val);
7465                 break;
7466         case 4:
7467                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
7468                 break;
7469         case 8:
7470                 res = kvm_set_cr8(vcpu, val);
7471                 break;
7472         default:
7473                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7474                 res = -1;
7475         }
7476
7477         return res;
7478 }
7479
7480 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
7481 {
7482         return static_call(kvm_x86_get_cpl)(emul_to_vcpu(ctxt));
7483 }
7484
7485 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7486 {
7487         static_call(kvm_x86_get_gdt)(emul_to_vcpu(ctxt), dt);
7488 }
7489
7490 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7491 {
7492         static_call(kvm_x86_get_idt)(emul_to_vcpu(ctxt), dt);
7493 }
7494
7495 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7496 {
7497         static_call(kvm_x86_set_gdt)(emul_to_vcpu(ctxt), dt);
7498 }
7499
7500 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7501 {
7502         static_call(kvm_x86_set_idt)(emul_to_vcpu(ctxt), dt);
7503 }
7504
7505 static unsigned long emulator_get_cached_segment_base(
7506         struct x86_emulate_ctxt *ctxt, int seg)
7507 {
7508         return get_segment_base(emul_to_vcpu(ctxt), seg);
7509 }
7510
7511 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
7512                                  struct desc_struct *desc, u32 *base3,
7513                                  int seg)
7514 {
7515         struct kvm_segment var;
7516
7517         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
7518         *selector = var.selector;
7519
7520         if (var.unusable) {
7521                 memset(desc, 0, sizeof(*desc));
7522                 if (base3)
7523                         *base3 = 0;
7524                 return false;
7525         }
7526
7527         if (var.g)
7528                 var.limit >>= 12;
7529         set_desc_limit(desc, var.limit);
7530         set_desc_base(desc, (unsigned long)var.base);
7531 #ifdef CONFIG_X86_64
7532         if (base3)
7533                 *base3 = var.base >> 32;
7534 #endif
7535         desc->type = var.type;
7536         desc->s = var.s;
7537         desc->dpl = var.dpl;
7538         desc->p = var.present;
7539         desc->avl = var.avl;
7540         desc->l = var.l;
7541         desc->d = var.db;
7542         desc->g = var.g;
7543
7544         return true;
7545 }
7546
7547 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
7548                                  struct desc_struct *desc, u32 base3,
7549                                  int seg)
7550 {
7551         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7552         struct kvm_segment var;
7553
7554         var.selector = selector;
7555         var.base = get_desc_base(desc);
7556 #ifdef CONFIG_X86_64
7557         var.base |= ((u64)base3) << 32;
7558 #endif
7559         var.limit = get_desc_limit(desc);
7560         if (desc->g)
7561                 var.limit = (var.limit << 12) | 0xfff;
7562         var.type = desc->type;
7563         var.dpl = desc->dpl;
7564         var.db = desc->d;
7565         var.s = desc->s;
7566         var.l = desc->l;
7567         var.g = desc->g;
7568         var.avl = desc->avl;
7569         var.present = desc->p;
7570         var.unusable = !var.present;
7571         var.padding = 0;
7572
7573         kvm_set_segment(vcpu, &var, seg);
7574         return;
7575 }
7576
7577 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
7578                             u32 msr_index, u64 *pdata)
7579 {
7580         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7581         int r;
7582
7583         r = kvm_get_msr(vcpu, msr_index, pdata);
7584
7585         if (r && kvm_msr_user_space(vcpu, msr_index, KVM_EXIT_X86_RDMSR, 0,
7586                                     complete_emulated_rdmsr, r)) {
7587                 /* Bounce to user space */
7588                 return X86EMUL_IO_NEEDED;
7589         }
7590
7591         return r;
7592 }
7593
7594 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
7595                             u32 msr_index, u64 data)
7596 {
7597         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7598         int r;
7599
7600         r = kvm_set_msr(vcpu, msr_index, data);
7601
7602         if (r && kvm_msr_user_space(vcpu, msr_index, KVM_EXIT_X86_WRMSR, data,
7603                                     complete_emulated_msr_access, r)) {
7604                 /* Bounce to user space */
7605                 return X86EMUL_IO_NEEDED;
7606         }
7607
7608         return r;
7609 }
7610
7611 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
7612 {
7613         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7614
7615         return vcpu->arch.smbase;
7616 }
7617
7618 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
7619 {
7620         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7621
7622         vcpu->arch.smbase = smbase;
7623 }
7624
7625 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
7626                               u32 pmc)
7627 {
7628         if (kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc))
7629                 return 0;
7630         return -EINVAL;
7631 }
7632
7633 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
7634                              u32 pmc, u64 *pdata)
7635 {
7636         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
7637 }
7638
7639 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
7640 {
7641         emul_to_vcpu(ctxt)->arch.halt_request = 1;
7642 }
7643
7644 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
7645                               struct x86_instruction_info *info,
7646                               enum x86_intercept_stage stage)
7647 {
7648         return static_call(kvm_x86_check_intercept)(emul_to_vcpu(ctxt), info, stage,
7649                                             &ctxt->exception);
7650 }
7651
7652 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
7653                               u32 *eax, u32 *ebx, u32 *ecx, u32 *edx,
7654                               bool exact_only)
7655 {
7656         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, exact_only);
7657 }
7658
7659 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
7660 {
7661         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
7662 }
7663
7664 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
7665 {
7666         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
7667 }
7668
7669 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
7670 {
7671         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
7672 }
7673
7674 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
7675 {
7676         return kvm_register_read_raw(emul_to_vcpu(ctxt), reg);
7677 }
7678
7679 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
7680 {
7681         kvm_register_write_raw(emul_to_vcpu(ctxt), reg, val);
7682 }
7683
7684 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
7685 {
7686         static_call(kvm_x86_set_nmi_mask)(emul_to_vcpu(ctxt), masked);
7687 }
7688
7689 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
7690 {
7691         return emul_to_vcpu(ctxt)->arch.hflags;
7692 }
7693
7694 static void emulator_exiting_smm(struct x86_emulate_ctxt *ctxt)
7695 {
7696         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7697
7698         kvm_smm_changed(vcpu, false);
7699 }
7700
7701 static int emulator_leave_smm(struct x86_emulate_ctxt *ctxt,
7702                                   const char *smstate)
7703 {
7704         return static_call(kvm_x86_leave_smm)(emul_to_vcpu(ctxt), smstate);
7705 }
7706
7707 static void emulator_triple_fault(struct x86_emulate_ctxt *ctxt)
7708 {
7709         kvm_make_request(KVM_REQ_TRIPLE_FAULT, emul_to_vcpu(ctxt));
7710 }
7711
7712 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
7713 {
7714         return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
7715 }
7716
7717 static const struct x86_emulate_ops emulate_ops = {
7718         .read_gpr            = emulator_read_gpr,
7719         .write_gpr           = emulator_write_gpr,
7720         .read_std            = emulator_read_std,
7721         .write_std           = emulator_write_std,
7722         .read_phys           = kvm_read_guest_phys_system,
7723         .fetch               = kvm_fetch_guest_virt,
7724         .read_emulated       = emulator_read_emulated,
7725         .write_emulated      = emulator_write_emulated,
7726         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
7727         .invlpg              = emulator_invlpg,
7728         .pio_in_emulated     = emulator_pio_in_emulated,
7729         .pio_out_emulated    = emulator_pio_out_emulated,
7730         .get_segment         = emulator_get_segment,
7731         .set_segment         = emulator_set_segment,
7732         .get_cached_segment_base = emulator_get_cached_segment_base,
7733         .get_gdt             = emulator_get_gdt,
7734         .get_idt             = emulator_get_idt,
7735         .set_gdt             = emulator_set_gdt,
7736         .set_idt             = emulator_set_idt,
7737         .get_cr              = emulator_get_cr,
7738         .set_cr              = emulator_set_cr,
7739         .cpl                 = emulator_get_cpl,
7740         .get_dr              = emulator_get_dr,
7741         .set_dr              = emulator_set_dr,
7742         .get_smbase          = emulator_get_smbase,
7743         .set_smbase          = emulator_set_smbase,
7744         .set_msr             = emulator_set_msr,
7745         .get_msr             = emulator_get_msr,
7746         .check_pmc           = emulator_check_pmc,
7747         .read_pmc            = emulator_read_pmc,
7748         .halt                = emulator_halt,
7749         .wbinvd              = emulator_wbinvd,
7750         .fix_hypercall       = emulator_fix_hypercall,
7751         .intercept           = emulator_intercept,
7752         .get_cpuid           = emulator_get_cpuid,
7753         .guest_has_long_mode = emulator_guest_has_long_mode,
7754         .guest_has_movbe     = emulator_guest_has_movbe,
7755         .guest_has_fxsr      = emulator_guest_has_fxsr,
7756         .set_nmi_mask        = emulator_set_nmi_mask,
7757         .get_hflags          = emulator_get_hflags,
7758         .exiting_smm         = emulator_exiting_smm,
7759         .leave_smm           = emulator_leave_smm,
7760         .triple_fault        = emulator_triple_fault,
7761         .set_xcr             = emulator_set_xcr,
7762 };
7763
7764 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
7765 {
7766         u32 int_shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
7767         /*
7768          * an sti; sti; sequence only disable interrupts for the first
7769          * instruction. So, if the last instruction, be it emulated or
7770          * not, left the system with the INT_STI flag enabled, it
7771          * means that the last instruction is an sti. We should not
7772          * leave the flag on in this case. The same goes for mov ss
7773          */
7774         if (int_shadow & mask)
7775                 mask = 0;
7776         if (unlikely(int_shadow || mask)) {
7777                 static_call(kvm_x86_set_interrupt_shadow)(vcpu, mask);
7778                 if (!mask)
7779                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7780         }
7781 }
7782
7783 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
7784 {
7785         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7786         if (ctxt->exception.vector == PF_VECTOR)
7787                 return kvm_inject_emulated_page_fault(vcpu, &ctxt->exception);
7788
7789         if (ctxt->exception.error_code_valid)
7790                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
7791                                       ctxt->exception.error_code);
7792         else
7793                 kvm_queue_exception(vcpu, ctxt->exception.vector);
7794         return false;
7795 }
7796
7797 static struct x86_emulate_ctxt *alloc_emulate_ctxt(struct kvm_vcpu *vcpu)
7798 {
7799         struct x86_emulate_ctxt *ctxt;
7800
7801         ctxt = kmem_cache_zalloc(x86_emulator_cache, GFP_KERNEL_ACCOUNT);
7802         if (!ctxt) {
7803                 pr_err("kvm: failed to allocate vcpu's emulator\n");
7804                 return NULL;
7805         }
7806
7807         ctxt->vcpu = vcpu;
7808         ctxt->ops = &emulate_ops;
7809         vcpu->arch.emulate_ctxt = ctxt;
7810
7811         return ctxt;
7812 }
7813
7814 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
7815 {
7816         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7817         int cs_db, cs_l;
7818
7819         static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
7820
7821         ctxt->gpa_available = false;
7822         ctxt->eflags = kvm_get_rflags(vcpu);
7823         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
7824
7825         ctxt->eip = kvm_rip_read(vcpu);
7826         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
7827                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
7828                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
7829                      cs_db                              ? X86EMUL_MODE_PROT32 :
7830                                                           X86EMUL_MODE_PROT16;
7831         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
7832         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
7833         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
7834
7835         ctxt->interruptibility = 0;
7836         ctxt->have_exception = false;
7837         ctxt->exception.vector = -1;
7838         ctxt->perm_ok = false;
7839
7840         init_decode_cache(ctxt);
7841         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7842 }
7843
7844 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
7845 {
7846         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7847         int ret;
7848
7849         init_emulate_ctxt(vcpu);
7850
7851         ctxt->op_bytes = 2;
7852         ctxt->ad_bytes = 2;
7853         ctxt->_eip = ctxt->eip + inc_eip;
7854         ret = emulate_int_real(ctxt, irq);
7855
7856         if (ret != X86EMUL_CONTINUE) {
7857                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
7858         } else {
7859                 ctxt->eip = ctxt->_eip;
7860                 kvm_rip_write(vcpu, ctxt->eip);
7861                 kvm_set_rflags(vcpu, ctxt->eflags);
7862         }
7863 }
7864 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
7865
7866 static void prepare_emulation_failure_exit(struct kvm_vcpu *vcpu, u64 *data,
7867                                            u8 ndata, u8 *insn_bytes, u8 insn_size)
7868 {
7869         struct kvm_run *run = vcpu->run;
7870         u64 info[5];
7871         u8 info_start;
7872
7873         /*
7874          * Zero the whole array used to retrieve the exit info, as casting to
7875          * u32 for select entries will leave some chunks uninitialized.
7876          */
7877         memset(&info, 0, sizeof(info));
7878
7879         static_call(kvm_x86_get_exit_info)(vcpu, (u32 *)&info[0], &info[1],
7880                                            &info[2], (u32 *)&info[3],
7881                                            (u32 *)&info[4]);
7882
7883         run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7884         run->emulation_failure.suberror = KVM_INTERNAL_ERROR_EMULATION;
7885
7886         /*
7887          * There's currently space for 13 entries, but 5 are used for the exit
7888          * reason and info.  Restrict to 4 to reduce the maintenance burden
7889          * when expanding kvm_run.emulation_failure in the future.
7890          */
7891         if (WARN_ON_ONCE(ndata > 4))
7892                 ndata = 4;
7893
7894         /* Always include the flags as a 'data' entry. */
7895         info_start = 1;
7896         run->emulation_failure.flags = 0;
7897
7898         if (insn_size) {
7899                 BUILD_BUG_ON((sizeof(run->emulation_failure.insn_size) +
7900                               sizeof(run->emulation_failure.insn_bytes) != 16));
7901                 info_start += 2;
7902                 run->emulation_failure.flags |=
7903                         KVM_INTERNAL_ERROR_EMULATION_FLAG_INSTRUCTION_BYTES;
7904                 run->emulation_failure.insn_size = insn_size;
7905                 memset(run->emulation_failure.insn_bytes, 0x90,
7906                        sizeof(run->emulation_failure.insn_bytes));
7907                 memcpy(run->emulation_failure.insn_bytes, insn_bytes, insn_size);
7908         }
7909
7910         memcpy(&run->internal.data[info_start], info, sizeof(info));
7911         memcpy(&run->internal.data[info_start + ARRAY_SIZE(info)], data,
7912                ndata * sizeof(data[0]));
7913
7914         run->emulation_failure.ndata = info_start + ARRAY_SIZE(info) + ndata;
7915 }
7916
7917 static void prepare_emulation_ctxt_failure_exit(struct kvm_vcpu *vcpu)
7918 {
7919         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7920
7921         prepare_emulation_failure_exit(vcpu, NULL, 0, ctxt->fetch.data,
7922                                        ctxt->fetch.end - ctxt->fetch.data);
7923 }
7924
7925 void __kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu, u64 *data,
7926                                           u8 ndata)
7927 {
7928         prepare_emulation_failure_exit(vcpu, data, ndata, NULL, 0);
7929 }
7930 EXPORT_SYMBOL_GPL(__kvm_prepare_emulation_failure_exit);
7931
7932 void kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu)
7933 {
7934         __kvm_prepare_emulation_failure_exit(vcpu, NULL, 0);
7935 }
7936 EXPORT_SYMBOL_GPL(kvm_prepare_emulation_failure_exit);
7937
7938 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
7939 {
7940         struct kvm *kvm = vcpu->kvm;
7941
7942         ++vcpu->stat.insn_emulation_fail;
7943         trace_kvm_emulate_insn_failed(vcpu);
7944
7945         if (emulation_type & EMULTYPE_VMWARE_GP) {
7946                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7947                 return 1;
7948         }
7949
7950         if (kvm->arch.exit_on_emulation_error ||
7951             (emulation_type & EMULTYPE_SKIP)) {
7952                 prepare_emulation_ctxt_failure_exit(vcpu);
7953                 return 0;
7954         }
7955
7956         kvm_queue_exception(vcpu, UD_VECTOR);
7957
7958         if (!is_guest_mode(vcpu) && static_call(kvm_x86_get_cpl)(vcpu) == 0) {
7959                 prepare_emulation_ctxt_failure_exit(vcpu);
7960                 return 0;
7961         }
7962
7963         return 1;
7964 }
7965
7966 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7967                                   bool write_fault_to_shadow_pgtable,
7968                                   int emulation_type)
7969 {
7970         gpa_t gpa = cr2_or_gpa;
7971         kvm_pfn_t pfn;
7972
7973         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7974                 return false;
7975
7976         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7977             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7978                 return false;
7979
7980         if (!vcpu->arch.mmu->direct_map) {
7981                 /*
7982                  * Write permission should be allowed since only
7983                  * write access need to be emulated.
7984                  */
7985                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7986
7987                 /*
7988                  * If the mapping is invalid in guest, let cpu retry
7989                  * it to generate fault.
7990                  */
7991                 if (gpa == UNMAPPED_GVA)
7992                         return true;
7993         }
7994
7995         /*
7996          * Do not retry the unhandleable instruction if it faults on the
7997          * readonly host memory, otherwise it will goto a infinite loop:
7998          * retry instruction -> write #PF -> emulation fail -> retry
7999          * instruction -> ...
8000          */
8001         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
8002
8003         /*
8004          * If the instruction failed on the error pfn, it can not be fixed,
8005          * report the error to userspace.
8006          */
8007         if (is_error_noslot_pfn(pfn))
8008                 return false;
8009
8010         kvm_release_pfn_clean(pfn);
8011
8012         /* The instructions are well-emulated on direct mmu. */
8013         if (vcpu->arch.mmu->direct_map) {
8014                 unsigned int indirect_shadow_pages;
8015
8016                 write_lock(&vcpu->kvm->mmu_lock);
8017                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
8018                 write_unlock(&vcpu->kvm->mmu_lock);
8019
8020                 if (indirect_shadow_pages)
8021                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
8022
8023                 return true;
8024         }
8025
8026         /*
8027          * if emulation was due to access to shadowed page table
8028          * and it failed try to unshadow page and re-enter the
8029          * guest to let CPU execute the instruction.
8030          */
8031         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
8032
8033         /*
8034          * If the access faults on its page table, it can not
8035          * be fixed by unprotecting shadow page and it should
8036          * be reported to userspace.
8037          */
8038         return !write_fault_to_shadow_pgtable;
8039 }
8040
8041 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
8042                               gpa_t cr2_or_gpa,  int emulation_type)
8043 {
8044         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8045         unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
8046
8047         last_retry_eip = vcpu->arch.last_retry_eip;
8048         last_retry_addr = vcpu->arch.last_retry_addr;
8049
8050         /*
8051          * If the emulation is caused by #PF and it is non-page_table
8052          * writing instruction, it means the VM-EXIT is caused by shadow
8053          * page protected, we can zap the shadow page and retry this
8054          * instruction directly.
8055          *
8056          * Note: if the guest uses a non-page-table modifying instruction
8057          * on the PDE that points to the instruction, then we will unmap
8058          * the instruction and go to an infinite loop. So, we cache the
8059          * last retried eip and the last fault address, if we meet the eip
8060          * and the address again, we can break out of the potential infinite
8061          * loop.
8062          */
8063         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
8064
8065         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
8066                 return false;
8067
8068         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
8069             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
8070                 return false;
8071
8072         if (x86_page_table_writing_insn(ctxt))
8073                 return false;
8074
8075         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
8076                 return false;
8077
8078         vcpu->arch.last_retry_eip = ctxt->eip;
8079         vcpu->arch.last_retry_addr = cr2_or_gpa;
8080
8081         if (!vcpu->arch.mmu->direct_map)
8082                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
8083
8084         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
8085
8086         return true;
8087 }
8088
8089 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
8090 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
8091
8092 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm)
8093 {
8094         trace_kvm_smm_transition(vcpu->vcpu_id, vcpu->arch.smbase, entering_smm);
8095
8096         if (entering_smm) {
8097                 vcpu->arch.hflags |= HF_SMM_MASK;
8098         } else {
8099                 vcpu->arch.hflags &= ~(HF_SMM_MASK | HF_SMM_INSIDE_NMI_MASK);
8100
8101                 /* Process a latched INIT or SMI, if any.  */
8102                 kvm_make_request(KVM_REQ_EVENT, vcpu);
8103
8104                 /*
8105                  * Even if KVM_SET_SREGS2 loaded PDPTRs out of band,
8106                  * on SMM exit we still need to reload them from
8107                  * guest memory
8108                  */
8109                 vcpu->arch.pdptrs_from_userspace = false;
8110         }
8111
8112         kvm_mmu_reset_context(vcpu);
8113 }
8114
8115 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
8116                                 unsigned long *db)
8117 {
8118         u32 dr6 = 0;
8119         int i;
8120         u32 enable, rwlen;
8121
8122         enable = dr7;
8123         rwlen = dr7 >> 16;
8124         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
8125                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
8126                         dr6 |= (1 << i);
8127         return dr6;
8128 }
8129
8130 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
8131 {
8132         struct kvm_run *kvm_run = vcpu->run;
8133
8134         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
8135                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_ACTIVE_LOW;
8136                 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu);
8137                 kvm_run->debug.arch.exception = DB_VECTOR;
8138                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
8139                 return 0;
8140         }
8141         kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
8142         return 1;
8143 }
8144
8145 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
8146 {
8147         unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
8148         int r;
8149
8150         r = static_call(kvm_x86_skip_emulated_instruction)(vcpu);
8151         if (unlikely(!r))
8152                 return 0;
8153
8154         kvm_pmu_trigger_event(vcpu, PERF_COUNT_HW_INSTRUCTIONS);
8155
8156         /*
8157          * rflags is the old, "raw" value of the flags.  The new value has
8158          * not been saved yet.
8159          *
8160          * This is correct even for TF set by the guest, because "the
8161          * processor will not generate this exception after the instruction
8162          * that sets the TF flag".
8163          */
8164         if (unlikely(rflags & X86_EFLAGS_TF))
8165                 r = kvm_vcpu_do_singlestep(vcpu);
8166         return r;
8167 }
8168 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
8169
8170 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
8171 {
8172         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
8173             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
8174                 struct kvm_run *kvm_run = vcpu->run;
8175                 unsigned long eip = kvm_get_linear_rip(vcpu);
8176                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
8177                                            vcpu->arch.guest_debug_dr7,
8178                                            vcpu->arch.eff_db);
8179
8180                 if (dr6 != 0) {
8181                         kvm_run->debug.arch.dr6 = dr6 | DR6_ACTIVE_LOW;
8182                         kvm_run->debug.arch.pc = eip;
8183                         kvm_run->debug.arch.exception = DB_VECTOR;
8184                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
8185                         *r = 0;
8186                         return true;
8187                 }
8188         }
8189
8190         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
8191             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
8192                 unsigned long eip = kvm_get_linear_rip(vcpu);
8193                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
8194                                            vcpu->arch.dr7,
8195                                            vcpu->arch.db);
8196
8197                 if (dr6 != 0) {
8198                         kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
8199                         *r = 1;
8200                         return true;
8201                 }
8202         }
8203
8204         return false;
8205 }
8206
8207 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
8208 {
8209         switch (ctxt->opcode_len) {
8210         case 1:
8211                 switch (ctxt->b) {
8212                 case 0xe4:      /* IN */
8213                 case 0xe5:
8214                 case 0xec:
8215                 case 0xed:
8216                 case 0xe6:      /* OUT */
8217                 case 0xe7:
8218                 case 0xee:
8219                 case 0xef:
8220                 case 0x6c:      /* INS */
8221                 case 0x6d:
8222                 case 0x6e:      /* OUTS */
8223                 case 0x6f:
8224                         return true;
8225                 }
8226                 break;
8227         case 2:
8228                 switch (ctxt->b) {
8229                 case 0x33:      /* RDPMC */
8230                         return true;
8231                 }
8232                 break;
8233         }
8234
8235         return false;
8236 }
8237
8238 /*
8239  * Decode to be emulated instruction. Return EMULATION_OK if success.
8240  */
8241 int x86_decode_emulated_instruction(struct kvm_vcpu *vcpu, int emulation_type,
8242                                     void *insn, int insn_len)
8243 {
8244         int r = EMULATION_OK;
8245         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8246
8247         init_emulate_ctxt(vcpu);
8248
8249         /*
8250          * We will reenter on the same instruction since we do not set
8251          * complete_userspace_io. This does not handle watchpoints yet,
8252          * those would be handled in the emulate_ops.
8253          */
8254         if (!(emulation_type & EMULTYPE_SKIP) &&
8255             kvm_vcpu_check_breakpoint(vcpu, &r))
8256                 return r;
8257
8258         r = x86_decode_insn(ctxt, insn, insn_len, emulation_type);
8259
8260         trace_kvm_emulate_insn_start(vcpu);
8261         ++vcpu->stat.insn_emulation;
8262
8263         return r;
8264 }
8265 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction);
8266
8267 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
8268                             int emulation_type, void *insn, int insn_len)
8269 {
8270         int r;
8271         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8272         bool writeback = true;
8273         bool write_fault_to_spt;
8274
8275         if (unlikely(!kvm_can_emulate_insn(vcpu, emulation_type, insn, insn_len)))
8276                 return 1;
8277
8278         vcpu->arch.l1tf_flush_l1d = true;
8279
8280         /*
8281          * Clear write_fault_to_shadow_pgtable here to ensure it is
8282          * never reused.
8283          */
8284         write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
8285         vcpu->arch.write_fault_to_shadow_pgtable = false;
8286
8287         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
8288                 kvm_clear_exception_queue(vcpu);
8289
8290                 r = x86_decode_emulated_instruction(vcpu, emulation_type,
8291                                                     insn, insn_len);
8292                 if (r != EMULATION_OK)  {
8293                         if ((emulation_type & EMULTYPE_TRAP_UD) ||
8294                             (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
8295                                 kvm_queue_exception(vcpu, UD_VECTOR);
8296                                 return 1;
8297                         }
8298                         if (reexecute_instruction(vcpu, cr2_or_gpa,
8299                                                   write_fault_to_spt,
8300                                                   emulation_type))
8301                                 return 1;
8302                         if (ctxt->have_exception) {
8303                                 /*
8304                                  * #UD should result in just EMULATION_FAILED, and trap-like
8305                                  * exception should not be encountered during decode.
8306                                  */
8307                                 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
8308                                              exception_type(ctxt->exception.vector) == EXCPT_TRAP);
8309                                 inject_emulated_exception(vcpu);
8310                                 return 1;
8311                         }
8312                         return handle_emulation_failure(vcpu, emulation_type);
8313                 }
8314         }
8315
8316         if ((emulation_type & EMULTYPE_VMWARE_GP) &&
8317             !is_vmware_backdoor_opcode(ctxt)) {
8318                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
8319                 return 1;
8320         }
8321
8322         /*
8323          * EMULTYPE_SKIP without EMULTYPE_COMPLETE_USER_EXIT is intended for
8324          * use *only* by vendor callbacks for kvm_skip_emulated_instruction().
8325          * The caller is responsible for updating interruptibility state and
8326          * injecting single-step #DBs.
8327          */
8328         if (emulation_type & EMULTYPE_SKIP) {
8329                 if (ctxt->mode != X86EMUL_MODE_PROT64)
8330                         ctxt->eip = (u32)ctxt->_eip;
8331                 else
8332                         ctxt->eip = ctxt->_eip;
8333
8334                 if (emulation_type & EMULTYPE_COMPLETE_USER_EXIT) {
8335                         r = 1;
8336                         goto writeback;
8337                 }
8338
8339                 kvm_rip_write(vcpu, ctxt->eip);
8340                 if (ctxt->eflags & X86_EFLAGS_RF)
8341                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
8342                 return 1;
8343         }
8344
8345         if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
8346                 return 1;
8347
8348         /* this is needed for vmware backdoor interface to work since it
8349            changes registers values  during IO operation */
8350         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
8351                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
8352                 emulator_invalidate_register_cache(ctxt);
8353         }
8354
8355 restart:
8356         if (emulation_type & EMULTYPE_PF) {
8357                 /* Save the faulting GPA (cr2) in the address field */
8358                 ctxt->exception.address = cr2_or_gpa;
8359
8360                 /* With shadow page tables, cr2 contains a GVA or nGPA. */
8361                 if (vcpu->arch.mmu->direct_map) {
8362                         ctxt->gpa_available = true;
8363                         ctxt->gpa_val = cr2_or_gpa;
8364                 }
8365         } else {
8366                 /* Sanitize the address out of an abundance of paranoia. */
8367                 ctxt->exception.address = 0;
8368         }
8369
8370         r = x86_emulate_insn(ctxt);
8371
8372         if (r == EMULATION_INTERCEPTED)
8373                 return 1;
8374
8375         if (r == EMULATION_FAILED) {
8376                 if (reexecute_instruction(vcpu, cr2_or_gpa, write_fault_to_spt,
8377                                         emulation_type))
8378                         return 1;
8379
8380                 return handle_emulation_failure(vcpu, emulation_type);
8381         }
8382
8383         if (ctxt->have_exception) {
8384                 r = 1;
8385                 if (inject_emulated_exception(vcpu))
8386                         return r;
8387         } else if (vcpu->arch.pio.count) {
8388                 if (!vcpu->arch.pio.in) {
8389                         /* FIXME: return into emulator if single-stepping.  */
8390                         vcpu->arch.pio.count = 0;
8391                 } else {
8392                         writeback = false;
8393                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
8394                 }
8395                 r = 0;
8396         } else if (vcpu->mmio_needed) {
8397                 ++vcpu->stat.mmio_exits;
8398
8399                 if (!vcpu->mmio_is_write)
8400                         writeback = false;
8401                 r = 0;
8402                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
8403         } else if (vcpu->arch.complete_userspace_io) {
8404                 writeback = false;
8405                 r = 0;
8406         } else if (r == EMULATION_RESTART)
8407                 goto restart;
8408         else
8409                 r = 1;
8410
8411 writeback:
8412         if (writeback) {
8413                 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
8414                 toggle_interruptibility(vcpu, ctxt->interruptibility);
8415                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8416                 if (!ctxt->have_exception ||
8417                     exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
8418                         kvm_pmu_trigger_event(vcpu, PERF_COUNT_HW_INSTRUCTIONS);
8419                         if (ctxt->is_branch)
8420                                 kvm_pmu_trigger_event(vcpu, PERF_COUNT_HW_BRANCH_INSTRUCTIONS);
8421                         kvm_rip_write(vcpu, ctxt->eip);
8422                         if (r && (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
8423                                 r = kvm_vcpu_do_singlestep(vcpu);
8424                         static_call_cond(kvm_x86_update_emulated_instruction)(vcpu);
8425                         __kvm_set_rflags(vcpu, ctxt->eflags);
8426                 }
8427
8428                 /*
8429                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
8430                  * do nothing, and it will be requested again as soon as
8431                  * the shadow expires.  But we still need to check here,
8432                  * because POPF has no interrupt shadow.
8433                  */
8434                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
8435                         kvm_make_request(KVM_REQ_EVENT, vcpu);
8436         } else
8437                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
8438
8439         return r;
8440 }
8441
8442 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
8443 {
8444         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
8445 }
8446 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
8447
8448 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
8449                                         void *insn, int insn_len)
8450 {
8451         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
8452 }
8453 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
8454
8455 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
8456 {
8457         vcpu->arch.pio.count = 0;
8458         return 1;
8459 }
8460
8461 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
8462 {
8463         vcpu->arch.pio.count = 0;
8464
8465         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
8466                 return 1;
8467
8468         return kvm_skip_emulated_instruction(vcpu);
8469 }
8470
8471 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
8472                             unsigned short port)
8473 {
8474         unsigned long val = kvm_rax_read(vcpu);
8475         int ret = emulator_pio_out(vcpu, size, port, &val, 1);
8476
8477         if (ret)
8478                 return ret;
8479
8480         /*
8481          * Workaround userspace that relies on old KVM behavior of %rip being
8482          * incremented prior to exiting to userspace to handle "OUT 0x7e".
8483          */
8484         if (port == 0x7e &&
8485             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
8486                 vcpu->arch.complete_userspace_io =
8487                         complete_fast_pio_out_port_0x7e;
8488                 kvm_skip_emulated_instruction(vcpu);
8489         } else {
8490                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
8491                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
8492         }
8493         return 0;
8494 }
8495
8496 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
8497 {
8498         unsigned long val;
8499
8500         /* We should only ever be called with arch.pio.count equal to 1 */
8501         BUG_ON(vcpu->arch.pio.count != 1);
8502
8503         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
8504                 vcpu->arch.pio.count = 0;
8505                 return 1;
8506         }
8507
8508         /* For size less than 4 we merge, else we zero extend */
8509         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
8510
8511         /*
8512          * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
8513          * the copy and tracing
8514          */
8515         emulator_pio_in(vcpu, vcpu->arch.pio.size, vcpu->arch.pio.port, &val, 1);
8516         kvm_rax_write(vcpu, val);
8517
8518         return kvm_skip_emulated_instruction(vcpu);
8519 }
8520
8521 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
8522                            unsigned short port)
8523 {
8524         unsigned long val;
8525         int ret;
8526
8527         /* For size less than 4 we merge, else we zero extend */
8528         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
8529
8530         ret = emulator_pio_in(vcpu, size, port, &val, 1);
8531         if (ret) {
8532                 kvm_rax_write(vcpu, val);
8533                 return ret;
8534         }
8535
8536         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
8537         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
8538
8539         return 0;
8540 }
8541
8542 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
8543 {
8544         int ret;
8545
8546         if (in)
8547                 ret = kvm_fast_pio_in(vcpu, size, port);
8548         else
8549                 ret = kvm_fast_pio_out(vcpu, size, port);
8550         return ret && kvm_skip_emulated_instruction(vcpu);
8551 }
8552 EXPORT_SYMBOL_GPL(kvm_fast_pio);
8553
8554 static int kvmclock_cpu_down_prep(unsigned int cpu)
8555 {
8556         __this_cpu_write(cpu_tsc_khz, 0);
8557         return 0;
8558 }
8559
8560 static void tsc_khz_changed(void *data)
8561 {
8562         struct cpufreq_freqs *freq = data;
8563         unsigned long khz = 0;
8564
8565         if (data)
8566                 khz = freq->new;
8567         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8568                 khz = cpufreq_quick_get(raw_smp_processor_id());
8569         if (!khz)
8570                 khz = tsc_khz;
8571         __this_cpu_write(cpu_tsc_khz, khz);
8572 }
8573
8574 #ifdef CONFIG_X86_64
8575 static void kvm_hyperv_tsc_notifier(void)
8576 {
8577         struct kvm *kvm;
8578         int cpu;
8579
8580         mutex_lock(&kvm_lock);
8581         list_for_each_entry(kvm, &vm_list, vm_list)
8582                 kvm_make_mclock_inprogress_request(kvm);
8583
8584         /* no guest entries from this point */
8585         hyperv_stop_tsc_emulation();
8586
8587         /* TSC frequency always matches when on Hyper-V */
8588         for_each_present_cpu(cpu)
8589                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
8590         kvm_max_guest_tsc_khz = tsc_khz;
8591
8592         list_for_each_entry(kvm, &vm_list, vm_list) {
8593                 __kvm_start_pvclock_update(kvm);
8594                 pvclock_update_vm_gtod_copy(kvm);
8595                 kvm_end_pvclock_update(kvm);
8596         }
8597
8598         mutex_unlock(&kvm_lock);
8599 }
8600 #endif
8601
8602 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
8603 {
8604         struct kvm *kvm;
8605         struct kvm_vcpu *vcpu;
8606         int send_ipi = 0;
8607         unsigned long i;
8608
8609         /*
8610          * We allow guests to temporarily run on slowing clocks,
8611          * provided we notify them after, or to run on accelerating
8612          * clocks, provided we notify them before.  Thus time never
8613          * goes backwards.
8614          *
8615          * However, we have a problem.  We can't atomically update
8616          * the frequency of a given CPU from this function; it is
8617          * merely a notifier, which can be called from any CPU.
8618          * Changing the TSC frequency at arbitrary points in time
8619          * requires a recomputation of local variables related to
8620          * the TSC for each VCPU.  We must flag these local variables
8621          * to be updated and be sure the update takes place with the
8622          * new frequency before any guests proceed.
8623          *
8624          * Unfortunately, the combination of hotplug CPU and frequency
8625          * change creates an intractable locking scenario; the order
8626          * of when these callouts happen is undefined with respect to
8627          * CPU hotplug, and they can race with each other.  As such,
8628          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
8629          * undefined; you can actually have a CPU frequency change take
8630          * place in between the computation of X and the setting of the
8631          * variable.  To protect against this problem, all updates of
8632          * the per_cpu tsc_khz variable are done in an interrupt
8633          * protected IPI, and all callers wishing to update the value
8634          * must wait for a synchronous IPI to complete (which is trivial
8635          * if the caller is on the CPU already).  This establishes the
8636          * necessary total order on variable updates.
8637          *
8638          * Note that because a guest time update may take place
8639          * anytime after the setting of the VCPU's request bit, the
8640          * correct TSC value must be set before the request.  However,
8641          * to ensure the update actually makes it to any guest which
8642          * starts running in hardware virtualization between the set
8643          * and the acquisition of the spinlock, we must also ping the
8644          * CPU after setting the request bit.
8645          *
8646          */
8647
8648         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8649
8650         mutex_lock(&kvm_lock);
8651         list_for_each_entry(kvm, &vm_list, vm_list) {
8652                 kvm_for_each_vcpu(i, vcpu, kvm) {
8653                         if (vcpu->cpu != cpu)
8654                                 continue;
8655                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8656                         if (vcpu->cpu != raw_smp_processor_id())
8657                                 send_ipi = 1;
8658                 }
8659         }
8660         mutex_unlock(&kvm_lock);
8661
8662         if (freq->old < freq->new && send_ipi) {
8663                 /*
8664                  * We upscale the frequency.  Must make the guest
8665                  * doesn't see old kvmclock values while running with
8666                  * the new frequency, otherwise we risk the guest sees
8667                  * time go backwards.
8668                  *
8669                  * In case we update the frequency for another cpu
8670                  * (which might be in guest context) send an interrupt
8671                  * to kick the cpu out of guest context.  Next time
8672                  * guest context is entered kvmclock will be updated,
8673                  * so the guest will not see stale values.
8674                  */
8675                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8676         }
8677 }
8678
8679 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
8680                                      void *data)
8681 {
8682         struct cpufreq_freqs *freq = data;
8683         int cpu;
8684
8685         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
8686                 return 0;
8687         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
8688                 return 0;
8689
8690         for_each_cpu(cpu, freq->policy->cpus)
8691                 __kvmclock_cpufreq_notifier(freq, cpu);
8692
8693         return 0;
8694 }
8695
8696 static struct notifier_block kvmclock_cpufreq_notifier_block = {
8697         .notifier_call  = kvmclock_cpufreq_notifier
8698 };
8699
8700 static int kvmclock_cpu_online(unsigned int cpu)
8701 {
8702         tsc_khz_changed(NULL);
8703         return 0;
8704 }
8705
8706 static void kvm_timer_init(void)
8707 {
8708         max_tsc_khz = tsc_khz;
8709
8710         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
8711 #ifdef CONFIG_CPU_FREQ
8712                 struct cpufreq_policy *policy;
8713                 int cpu;
8714
8715                 cpu = get_cpu();
8716                 policy = cpufreq_cpu_get(cpu);
8717                 if (policy) {
8718                         if (policy->cpuinfo.max_freq)
8719                                 max_tsc_khz = policy->cpuinfo.max_freq;
8720                         cpufreq_cpu_put(policy);
8721                 }
8722                 put_cpu();
8723 #endif
8724                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
8725                                           CPUFREQ_TRANSITION_NOTIFIER);
8726         }
8727
8728         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
8729                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
8730 }
8731
8732 #ifdef CONFIG_X86_64
8733 static void pvclock_gtod_update_fn(struct work_struct *work)
8734 {
8735         struct kvm *kvm;
8736         struct kvm_vcpu *vcpu;
8737         unsigned long i;
8738
8739         mutex_lock(&kvm_lock);
8740         list_for_each_entry(kvm, &vm_list, vm_list)
8741                 kvm_for_each_vcpu(i, vcpu, kvm)
8742                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
8743         atomic_set(&kvm_guest_has_master_clock, 0);
8744         mutex_unlock(&kvm_lock);
8745 }
8746
8747 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
8748
8749 /*
8750  * Indirection to move queue_work() out of the tk_core.seq write held
8751  * region to prevent possible deadlocks against time accessors which
8752  * are invoked with work related locks held.
8753  */
8754 static void pvclock_irq_work_fn(struct irq_work *w)
8755 {
8756         queue_work(system_long_wq, &pvclock_gtod_work);
8757 }
8758
8759 static DEFINE_IRQ_WORK(pvclock_irq_work, pvclock_irq_work_fn);
8760
8761 /*
8762  * Notification about pvclock gtod data update.
8763  */
8764 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
8765                                void *priv)
8766 {
8767         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
8768         struct timekeeper *tk = priv;
8769
8770         update_pvclock_gtod(tk);
8771
8772         /*
8773          * Disable master clock if host does not trust, or does not use,
8774          * TSC based clocksource. Delegate queue_work() to irq_work as
8775          * this is invoked with tk_core.seq write held.
8776          */
8777         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
8778             atomic_read(&kvm_guest_has_master_clock) != 0)
8779                 irq_work_queue(&pvclock_irq_work);
8780         return 0;
8781 }
8782
8783 static struct notifier_block pvclock_gtod_notifier = {
8784         .notifier_call = pvclock_gtod_notify,
8785 };
8786 #endif
8787
8788 int kvm_arch_init(void *opaque)
8789 {
8790         struct kvm_x86_init_ops *ops = opaque;
8791         int r;
8792
8793         if (kvm_x86_ops.hardware_enable) {
8794                 pr_err("kvm: already loaded vendor module '%s'\n", kvm_x86_ops.name);
8795                 r = -EEXIST;
8796                 goto out;
8797         }
8798
8799         if (!ops->cpu_has_kvm_support()) {
8800                 pr_err_ratelimited("kvm: no hardware support for '%s'\n",
8801                                    ops->runtime_ops->name);
8802                 r = -EOPNOTSUPP;
8803                 goto out;
8804         }
8805         if (ops->disabled_by_bios()) {
8806                 pr_err_ratelimited("kvm: support for '%s' disabled by bios\n",
8807                                    ops->runtime_ops->name);
8808                 r = -EOPNOTSUPP;
8809                 goto out;
8810         }
8811
8812         /*
8813          * KVM explicitly assumes that the guest has an FPU and
8814          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
8815          * vCPU's FPU state as a fxregs_state struct.
8816          */
8817         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
8818                 printk(KERN_ERR "kvm: inadequate fpu\n");
8819                 r = -EOPNOTSUPP;
8820                 goto out;
8821         }
8822
8823         r = -ENOMEM;
8824
8825         x86_emulator_cache = kvm_alloc_emulator_cache();
8826         if (!x86_emulator_cache) {
8827                 pr_err("kvm: failed to allocate cache for x86 emulator\n");
8828                 goto out;
8829         }
8830
8831         user_return_msrs = alloc_percpu(struct kvm_user_return_msrs);
8832         if (!user_return_msrs) {
8833                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_user_return_msrs\n");
8834                 goto out_free_x86_emulator_cache;
8835         }
8836         kvm_nr_uret_msrs = 0;
8837
8838         r = kvm_mmu_module_init();
8839         if (r)
8840                 goto out_free_percpu;
8841
8842         kvm_timer_init();
8843
8844         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
8845                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
8846                 supported_xcr0 = host_xcr0 & KVM_SUPPORTED_XCR0;
8847         }
8848
8849         if (pi_inject_timer == -1)
8850                 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
8851 #ifdef CONFIG_X86_64
8852         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
8853
8854         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8855                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
8856 #endif
8857
8858         return 0;
8859
8860 out_free_percpu:
8861         free_percpu(user_return_msrs);
8862 out_free_x86_emulator_cache:
8863         kmem_cache_destroy(x86_emulator_cache);
8864 out:
8865         return r;
8866 }
8867
8868 void kvm_arch_exit(void)
8869 {
8870 #ifdef CONFIG_X86_64
8871         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8872                 clear_hv_tscchange_cb();
8873 #endif
8874         kvm_lapic_exit();
8875
8876         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8877                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
8878                                             CPUFREQ_TRANSITION_NOTIFIER);
8879         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
8880 #ifdef CONFIG_X86_64
8881         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
8882         irq_work_sync(&pvclock_irq_work);
8883         cancel_work_sync(&pvclock_gtod_work);
8884 #endif
8885         kvm_x86_ops.hardware_enable = NULL;
8886         kvm_mmu_module_exit();
8887         free_percpu(user_return_msrs);
8888         kmem_cache_destroy(x86_emulator_cache);
8889 #ifdef CONFIG_KVM_XEN
8890         static_key_deferred_flush(&kvm_xen_enabled);
8891         WARN_ON(static_branch_unlikely(&kvm_xen_enabled.key));
8892 #endif
8893 }
8894
8895 static int __kvm_emulate_halt(struct kvm_vcpu *vcpu, int state, int reason)
8896 {
8897         /*
8898          * The vCPU has halted, e.g. executed HLT.  Update the run state if the
8899          * local APIC is in-kernel, the run loop will detect the non-runnable
8900          * state and halt the vCPU.  Exit to userspace if the local APIC is
8901          * managed by userspace, in which case userspace is responsible for
8902          * handling wake events.
8903          */
8904         ++vcpu->stat.halt_exits;
8905         if (lapic_in_kernel(vcpu)) {
8906                 vcpu->arch.mp_state = state;
8907                 return 1;
8908         } else {
8909                 vcpu->run->exit_reason = reason;
8910                 return 0;
8911         }
8912 }
8913
8914 int kvm_emulate_halt_noskip(struct kvm_vcpu *vcpu)
8915 {
8916         return __kvm_emulate_halt(vcpu, KVM_MP_STATE_HALTED, KVM_EXIT_HLT);
8917 }
8918 EXPORT_SYMBOL_GPL(kvm_emulate_halt_noskip);
8919
8920 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
8921 {
8922         int ret = kvm_skip_emulated_instruction(vcpu);
8923         /*
8924          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
8925          * KVM_EXIT_DEBUG here.
8926          */
8927         return kvm_emulate_halt_noskip(vcpu) && ret;
8928 }
8929 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
8930
8931 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu)
8932 {
8933         int ret = kvm_skip_emulated_instruction(vcpu);
8934
8935         return __kvm_emulate_halt(vcpu, KVM_MP_STATE_AP_RESET_HOLD,
8936                                         KVM_EXIT_AP_RESET_HOLD) && ret;
8937 }
8938 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold);
8939
8940 #ifdef CONFIG_X86_64
8941 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
8942                                 unsigned long clock_type)
8943 {
8944         struct kvm_clock_pairing clock_pairing;
8945         struct timespec64 ts;
8946         u64 cycle;
8947         int ret;
8948
8949         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
8950                 return -KVM_EOPNOTSUPP;
8951
8952         if (!kvm_get_walltime_and_clockread(&ts, &cycle))
8953                 return -KVM_EOPNOTSUPP;
8954
8955         clock_pairing.sec = ts.tv_sec;
8956         clock_pairing.nsec = ts.tv_nsec;
8957         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
8958         clock_pairing.flags = 0;
8959         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
8960
8961         ret = 0;
8962         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
8963                             sizeof(struct kvm_clock_pairing)))
8964                 ret = -KVM_EFAULT;
8965
8966         return ret;
8967 }
8968 #endif
8969
8970 /*
8971  * kvm_pv_kick_cpu_op:  Kick a vcpu.
8972  *
8973  * @apicid - apicid of vcpu to be kicked.
8974  */
8975 static void kvm_pv_kick_cpu_op(struct kvm *kvm, int apicid)
8976 {
8977         struct kvm_lapic_irq lapic_irq;
8978
8979         lapic_irq.shorthand = APIC_DEST_NOSHORT;
8980         lapic_irq.dest_mode = APIC_DEST_PHYSICAL;
8981         lapic_irq.level = 0;
8982         lapic_irq.dest_id = apicid;
8983         lapic_irq.msi_redir_hint = false;
8984
8985         lapic_irq.delivery_mode = APIC_DM_REMRD;
8986         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
8987 }
8988
8989 bool kvm_apicv_activated(struct kvm *kvm)
8990 {
8991         return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
8992 }
8993 EXPORT_SYMBOL_GPL(kvm_apicv_activated);
8994
8995 static void kvm_apicv_init(struct kvm *kvm)
8996 {
8997         init_rwsem(&kvm->arch.apicv_update_lock);
8998
8999         set_bit(APICV_INHIBIT_REASON_ABSENT,
9000                 &kvm->arch.apicv_inhibit_reasons);
9001         if (!enable_apicv)
9002                 set_bit(APICV_INHIBIT_REASON_DISABLE,
9003                         &kvm->arch.apicv_inhibit_reasons);
9004 }
9005
9006 static void kvm_sched_yield(struct kvm_vcpu *vcpu, unsigned long dest_id)
9007 {
9008         struct kvm_vcpu *target = NULL;
9009         struct kvm_apic_map *map;
9010
9011         vcpu->stat.directed_yield_attempted++;
9012
9013         if (single_task_running())
9014                 goto no_yield;
9015
9016         rcu_read_lock();
9017         map = rcu_dereference(vcpu->kvm->arch.apic_map);
9018
9019         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
9020                 target = map->phys_map[dest_id]->vcpu;
9021
9022         rcu_read_unlock();
9023
9024         if (!target || !READ_ONCE(target->ready))
9025                 goto no_yield;
9026
9027         /* Ignore requests to yield to self */
9028         if (vcpu == target)
9029                 goto no_yield;
9030
9031         if (kvm_vcpu_yield_to(target) <= 0)
9032                 goto no_yield;
9033
9034         vcpu->stat.directed_yield_successful++;
9035
9036 no_yield:
9037         return;
9038 }
9039
9040 static int complete_hypercall_exit(struct kvm_vcpu *vcpu)
9041 {
9042         u64 ret = vcpu->run->hypercall.ret;
9043
9044         if (!is_64_bit_mode(vcpu))
9045                 ret = (u32)ret;
9046         kvm_rax_write(vcpu, ret);
9047         ++vcpu->stat.hypercalls;
9048         return kvm_skip_emulated_instruction(vcpu);
9049 }
9050
9051 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
9052 {
9053         unsigned long nr, a0, a1, a2, a3, ret;
9054         int op_64_bit;
9055
9056         if (kvm_xen_hypercall_enabled(vcpu->kvm))
9057                 return kvm_xen_hypercall(vcpu);
9058
9059         if (kvm_hv_hypercall_enabled(vcpu))
9060                 return kvm_hv_hypercall(vcpu);
9061
9062         nr = kvm_rax_read(vcpu);
9063         a0 = kvm_rbx_read(vcpu);
9064         a1 = kvm_rcx_read(vcpu);
9065         a2 = kvm_rdx_read(vcpu);
9066         a3 = kvm_rsi_read(vcpu);
9067
9068         trace_kvm_hypercall(nr, a0, a1, a2, a3);
9069
9070         op_64_bit = is_64_bit_hypercall(vcpu);
9071         if (!op_64_bit) {
9072                 nr &= 0xFFFFFFFF;
9073                 a0 &= 0xFFFFFFFF;
9074                 a1 &= 0xFFFFFFFF;
9075                 a2 &= 0xFFFFFFFF;
9076                 a3 &= 0xFFFFFFFF;
9077         }
9078
9079         if (static_call(kvm_x86_get_cpl)(vcpu) != 0) {
9080                 ret = -KVM_EPERM;
9081                 goto out;
9082         }
9083
9084         ret = -KVM_ENOSYS;
9085
9086         switch (nr) {
9087         case KVM_HC_VAPIC_POLL_IRQ:
9088                 ret = 0;
9089                 break;
9090         case KVM_HC_KICK_CPU:
9091                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_UNHALT))
9092                         break;
9093
9094                 kvm_pv_kick_cpu_op(vcpu->kvm, a1);
9095                 kvm_sched_yield(vcpu, a1);
9096                 ret = 0;
9097                 break;
9098 #ifdef CONFIG_X86_64
9099         case KVM_HC_CLOCK_PAIRING:
9100                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
9101                 break;
9102 #endif
9103         case KVM_HC_SEND_IPI:
9104                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SEND_IPI))
9105                         break;
9106
9107                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
9108                 break;
9109         case KVM_HC_SCHED_YIELD:
9110                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SCHED_YIELD))
9111                         break;
9112
9113                 kvm_sched_yield(vcpu, a0);
9114                 ret = 0;
9115                 break;
9116         case KVM_HC_MAP_GPA_RANGE: {
9117                 u64 gpa = a0, npages = a1, attrs = a2;
9118
9119                 ret = -KVM_ENOSYS;
9120                 if (!(vcpu->kvm->arch.hypercall_exit_enabled & (1 << KVM_HC_MAP_GPA_RANGE)))
9121                         break;
9122
9123                 if (!PAGE_ALIGNED(gpa) || !npages ||
9124                     gpa_to_gfn(gpa) + npages <= gpa_to_gfn(gpa)) {
9125                         ret = -KVM_EINVAL;
9126                         break;
9127                 }
9128
9129                 vcpu->run->exit_reason        = KVM_EXIT_HYPERCALL;
9130                 vcpu->run->hypercall.nr       = KVM_HC_MAP_GPA_RANGE;
9131                 vcpu->run->hypercall.args[0]  = gpa;
9132                 vcpu->run->hypercall.args[1]  = npages;
9133                 vcpu->run->hypercall.args[2]  = attrs;
9134                 vcpu->run->hypercall.longmode = op_64_bit;
9135                 vcpu->arch.complete_userspace_io = complete_hypercall_exit;
9136                 return 0;
9137         }
9138         default:
9139                 ret = -KVM_ENOSYS;
9140                 break;
9141         }
9142 out:
9143         if (!op_64_bit)
9144                 ret = (u32)ret;
9145         kvm_rax_write(vcpu, ret);
9146
9147         ++vcpu->stat.hypercalls;
9148         return kvm_skip_emulated_instruction(vcpu);
9149 }
9150 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
9151
9152 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
9153 {
9154         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
9155         char instruction[3];
9156         unsigned long rip = kvm_rip_read(vcpu);
9157
9158         static_call(kvm_x86_patch_hypercall)(vcpu, instruction);
9159
9160         return emulator_write_emulated(ctxt, rip, instruction, 3,
9161                 &ctxt->exception);
9162 }
9163
9164 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
9165 {
9166         return vcpu->run->request_interrupt_window &&
9167                 likely(!pic_in_kernel(vcpu->kvm));
9168 }
9169
9170 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
9171 {
9172         struct kvm_run *kvm_run = vcpu->run;
9173
9174         kvm_run->if_flag = static_call(kvm_x86_get_if_flag)(vcpu);
9175         kvm_run->cr8 = kvm_get_cr8(vcpu);
9176         kvm_run->apic_base = kvm_get_apic_base(vcpu);
9177
9178         /*
9179          * The call to kvm_ready_for_interrupt_injection() may end up in
9180          * kvm_xen_has_interrupt() which may require the srcu lock to be
9181          * held, to protect against changes in the vcpu_info address.
9182          */
9183         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9184         kvm_run->ready_for_interrupt_injection =
9185                 pic_in_kernel(vcpu->kvm) ||
9186                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
9187         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9188
9189         if (is_smm(vcpu))
9190                 kvm_run->flags |= KVM_RUN_X86_SMM;
9191 }
9192
9193 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
9194 {
9195         int max_irr, tpr;
9196
9197         if (!kvm_x86_ops.update_cr8_intercept)
9198                 return;
9199
9200         if (!lapic_in_kernel(vcpu))
9201                 return;
9202
9203         if (vcpu->arch.apicv_active)
9204                 return;
9205
9206         if (!vcpu->arch.apic->vapic_addr)
9207                 max_irr = kvm_lapic_find_highest_irr(vcpu);
9208         else
9209                 max_irr = -1;
9210
9211         if (max_irr != -1)
9212                 max_irr >>= 4;
9213
9214         tpr = kvm_lapic_get_cr8(vcpu);
9215
9216         static_call(kvm_x86_update_cr8_intercept)(vcpu, tpr, max_irr);
9217 }
9218
9219
9220 int kvm_check_nested_events(struct kvm_vcpu *vcpu)
9221 {
9222         if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
9223                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
9224                 return 1;
9225         }
9226
9227         return kvm_x86_ops.nested_ops->check_events(vcpu);
9228 }
9229
9230 static void kvm_inject_exception(struct kvm_vcpu *vcpu)
9231 {
9232         if (vcpu->arch.exception.error_code && !is_protmode(vcpu))
9233                 vcpu->arch.exception.error_code = false;
9234         static_call(kvm_x86_queue_exception)(vcpu);
9235 }
9236
9237 static int inject_pending_event(struct kvm_vcpu *vcpu, bool *req_immediate_exit)
9238 {
9239         int r;
9240         bool can_inject = true;
9241
9242         /* try to reinject previous events if any */
9243
9244         if (vcpu->arch.exception.injected) {
9245                 kvm_inject_exception(vcpu);
9246                 can_inject = false;
9247         }
9248         /*
9249          * Do not inject an NMI or interrupt if there is a pending
9250          * exception.  Exceptions and interrupts are recognized at
9251          * instruction boundaries, i.e. the start of an instruction.
9252          * Trap-like exceptions, e.g. #DB, have higher priority than
9253          * NMIs and interrupts, i.e. traps are recognized before an
9254          * NMI/interrupt that's pending on the same instruction.
9255          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
9256          * priority, but are only generated (pended) during instruction
9257          * execution, i.e. a pending fault-like exception means the
9258          * fault occurred on the *previous* instruction and must be
9259          * serviced prior to recognizing any new events in order to
9260          * fully complete the previous instruction.
9261          */
9262         else if (!vcpu->arch.exception.pending) {
9263                 if (vcpu->arch.nmi_injected) {
9264                         static_call(kvm_x86_inject_nmi)(vcpu);
9265                         can_inject = false;
9266                 } else if (vcpu->arch.interrupt.injected) {
9267                         static_call(kvm_x86_inject_irq)(vcpu);
9268                         can_inject = false;
9269                 }
9270         }
9271
9272         WARN_ON_ONCE(vcpu->arch.exception.injected &&
9273                      vcpu->arch.exception.pending);
9274
9275         /*
9276          * Call check_nested_events() even if we reinjected a previous event
9277          * in order for caller to determine if it should require immediate-exit
9278          * from L2 to L1 due to pending L1 events which require exit
9279          * from L2 to L1.
9280          */
9281         if (is_guest_mode(vcpu)) {
9282                 r = kvm_check_nested_events(vcpu);
9283                 if (r < 0)
9284                         goto out;
9285         }
9286
9287         /* try to inject new event if pending */
9288         if (vcpu->arch.exception.pending) {
9289                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
9290                                         vcpu->arch.exception.has_error_code,
9291                                         vcpu->arch.exception.error_code);
9292
9293                 vcpu->arch.exception.pending = false;
9294                 vcpu->arch.exception.injected = true;
9295
9296                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
9297                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
9298                                              X86_EFLAGS_RF);
9299
9300                 if (vcpu->arch.exception.nr == DB_VECTOR) {
9301                         kvm_deliver_exception_payload(vcpu);
9302                         if (vcpu->arch.dr7 & DR7_GD) {
9303                                 vcpu->arch.dr7 &= ~DR7_GD;
9304                                 kvm_update_dr7(vcpu);
9305                         }
9306                 }
9307
9308                 kvm_inject_exception(vcpu);
9309                 can_inject = false;
9310         }
9311
9312         /* Don't inject interrupts if the user asked to avoid doing so */
9313         if (vcpu->guest_debug & KVM_GUESTDBG_BLOCKIRQ)
9314                 return 0;
9315
9316         /*
9317          * Finally, inject interrupt events.  If an event cannot be injected
9318          * due to architectural conditions (e.g. IF=0) a window-open exit
9319          * will re-request KVM_REQ_EVENT.  Sometimes however an event is pending
9320          * and can architecturally be injected, but we cannot do it right now:
9321          * an interrupt could have arrived just now and we have to inject it
9322          * as a vmexit, or there could already an event in the queue, which is
9323          * indicated by can_inject.  In that case we request an immediate exit
9324          * in order to make progress and get back here for another iteration.
9325          * The kvm_x86_ops hooks communicate this by returning -EBUSY.
9326          */
9327         if (vcpu->arch.smi_pending) {
9328                 r = can_inject ? static_call(kvm_x86_smi_allowed)(vcpu, true) : -EBUSY;
9329                 if (r < 0)
9330                         goto out;
9331                 if (r) {
9332                         vcpu->arch.smi_pending = false;
9333                         ++vcpu->arch.smi_count;
9334                         enter_smm(vcpu);
9335                         can_inject = false;
9336                 } else
9337                         static_call(kvm_x86_enable_smi_window)(vcpu);
9338         }
9339
9340         if (vcpu->arch.nmi_pending) {
9341                 r = can_inject ? static_call(kvm_x86_nmi_allowed)(vcpu, true) : -EBUSY;
9342                 if (r < 0)
9343                         goto out;
9344                 if (r) {
9345                         --vcpu->arch.nmi_pending;
9346                         vcpu->arch.nmi_injected = true;
9347                         static_call(kvm_x86_inject_nmi)(vcpu);
9348                         can_inject = false;
9349                         WARN_ON(static_call(kvm_x86_nmi_allowed)(vcpu, true) < 0);
9350                 }
9351                 if (vcpu->arch.nmi_pending)
9352                         static_call(kvm_x86_enable_nmi_window)(vcpu);
9353         }
9354
9355         if (kvm_cpu_has_injectable_intr(vcpu)) {
9356                 r = can_inject ? static_call(kvm_x86_interrupt_allowed)(vcpu, true) : -EBUSY;
9357                 if (r < 0)
9358                         goto out;
9359                 if (r) {
9360                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu), false);
9361                         static_call(kvm_x86_inject_irq)(vcpu);
9362                         WARN_ON(static_call(kvm_x86_interrupt_allowed)(vcpu, true) < 0);
9363                 }
9364                 if (kvm_cpu_has_injectable_intr(vcpu))
9365                         static_call(kvm_x86_enable_irq_window)(vcpu);
9366         }
9367
9368         if (is_guest_mode(vcpu) &&
9369             kvm_x86_ops.nested_ops->hv_timer_pending &&
9370             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
9371                 *req_immediate_exit = true;
9372
9373         WARN_ON(vcpu->arch.exception.pending);
9374         return 0;
9375
9376 out:
9377         if (r == -EBUSY) {
9378                 *req_immediate_exit = true;
9379                 r = 0;
9380         }
9381         return r;
9382 }
9383
9384 static void process_nmi(struct kvm_vcpu *vcpu)
9385 {
9386         unsigned limit = 2;
9387
9388         /*
9389          * x86 is limited to one NMI running, and one NMI pending after it.
9390          * If an NMI is already in progress, limit further NMIs to just one.
9391          * Otherwise, allow two (and we'll inject the first one immediately).
9392          */
9393         if (static_call(kvm_x86_get_nmi_mask)(vcpu) || vcpu->arch.nmi_injected)
9394                 limit = 1;
9395
9396         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
9397         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
9398         kvm_make_request(KVM_REQ_EVENT, vcpu);
9399 }
9400
9401 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
9402 {
9403         u32 flags = 0;
9404         flags |= seg->g       << 23;
9405         flags |= seg->db      << 22;
9406         flags |= seg->l       << 21;
9407         flags |= seg->avl     << 20;
9408         flags |= seg->present << 15;
9409         flags |= seg->dpl     << 13;
9410         flags |= seg->s       << 12;
9411         flags |= seg->type    << 8;
9412         return flags;
9413 }
9414
9415 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
9416 {
9417         struct kvm_segment seg;
9418         int offset;
9419
9420         kvm_get_segment(vcpu, &seg, n);
9421         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
9422
9423         if (n < 3)
9424                 offset = 0x7f84 + n * 12;
9425         else
9426                 offset = 0x7f2c + (n - 3) * 12;
9427
9428         put_smstate(u32, buf, offset + 8, seg.base);
9429         put_smstate(u32, buf, offset + 4, seg.limit);
9430         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
9431 }
9432
9433 #ifdef CONFIG_X86_64
9434 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
9435 {
9436         struct kvm_segment seg;
9437         int offset;
9438         u16 flags;
9439
9440         kvm_get_segment(vcpu, &seg, n);
9441         offset = 0x7e00 + n * 16;
9442
9443         flags = enter_smm_get_segment_flags(&seg) >> 8;
9444         put_smstate(u16, buf, offset, seg.selector);
9445         put_smstate(u16, buf, offset + 2, flags);
9446         put_smstate(u32, buf, offset + 4, seg.limit);
9447         put_smstate(u64, buf, offset + 8, seg.base);
9448 }
9449 #endif
9450
9451 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
9452 {
9453         struct desc_ptr dt;
9454         struct kvm_segment seg;
9455         unsigned long val;
9456         int i;
9457
9458         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
9459         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
9460         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
9461         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
9462
9463         for (i = 0; i < 8; i++)
9464                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read_raw(vcpu, i));
9465
9466         kvm_get_dr(vcpu, 6, &val);
9467         put_smstate(u32, buf, 0x7fcc, (u32)val);
9468         kvm_get_dr(vcpu, 7, &val);
9469         put_smstate(u32, buf, 0x7fc8, (u32)val);
9470
9471         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
9472         put_smstate(u32, buf, 0x7fc4, seg.selector);
9473         put_smstate(u32, buf, 0x7f64, seg.base);
9474         put_smstate(u32, buf, 0x7f60, seg.limit);
9475         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
9476
9477         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
9478         put_smstate(u32, buf, 0x7fc0, seg.selector);
9479         put_smstate(u32, buf, 0x7f80, seg.base);
9480         put_smstate(u32, buf, 0x7f7c, seg.limit);
9481         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
9482
9483         static_call(kvm_x86_get_gdt)(vcpu, &dt);
9484         put_smstate(u32, buf, 0x7f74, dt.address);
9485         put_smstate(u32, buf, 0x7f70, dt.size);
9486
9487         static_call(kvm_x86_get_idt)(vcpu, &dt);
9488         put_smstate(u32, buf, 0x7f58, dt.address);
9489         put_smstate(u32, buf, 0x7f54, dt.size);
9490
9491         for (i = 0; i < 6; i++)
9492                 enter_smm_save_seg_32(vcpu, buf, i);
9493
9494         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
9495
9496         /* revision id */
9497         put_smstate(u32, buf, 0x7efc, 0x00020000);
9498         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
9499 }
9500
9501 #ifdef CONFIG_X86_64
9502 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
9503 {
9504         struct desc_ptr dt;
9505         struct kvm_segment seg;
9506         unsigned long val;
9507         int i;
9508
9509         for (i = 0; i < 16; i++)
9510                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read_raw(vcpu, i));
9511
9512         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
9513         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
9514
9515         kvm_get_dr(vcpu, 6, &val);
9516         put_smstate(u64, buf, 0x7f68, val);
9517         kvm_get_dr(vcpu, 7, &val);
9518         put_smstate(u64, buf, 0x7f60, val);
9519
9520         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
9521         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
9522         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
9523
9524         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
9525
9526         /* revision id */
9527         put_smstate(u32, buf, 0x7efc, 0x00020064);
9528
9529         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
9530
9531         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
9532         put_smstate(u16, buf, 0x7e90, seg.selector);
9533         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
9534         put_smstate(u32, buf, 0x7e94, seg.limit);
9535         put_smstate(u64, buf, 0x7e98, seg.base);
9536
9537         static_call(kvm_x86_get_idt)(vcpu, &dt);
9538         put_smstate(u32, buf, 0x7e84, dt.size);
9539         put_smstate(u64, buf, 0x7e88, dt.address);
9540
9541         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
9542         put_smstate(u16, buf, 0x7e70, seg.selector);
9543         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
9544         put_smstate(u32, buf, 0x7e74, seg.limit);
9545         put_smstate(u64, buf, 0x7e78, seg.base);
9546
9547         static_call(kvm_x86_get_gdt)(vcpu, &dt);
9548         put_smstate(u32, buf, 0x7e64, dt.size);
9549         put_smstate(u64, buf, 0x7e68, dt.address);
9550
9551         for (i = 0; i < 6; i++)
9552                 enter_smm_save_seg_64(vcpu, buf, i);
9553 }
9554 #endif
9555
9556 static void enter_smm(struct kvm_vcpu *vcpu)
9557 {
9558         struct kvm_segment cs, ds;
9559         struct desc_ptr dt;
9560         unsigned long cr0;
9561         char buf[512];
9562
9563         memset(buf, 0, 512);
9564 #ifdef CONFIG_X86_64
9565         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9566                 enter_smm_save_state_64(vcpu, buf);
9567         else
9568 #endif
9569                 enter_smm_save_state_32(vcpu, buf);
9570
9571         /*
9572          * Give enter_smm() a chance to make ISA-specific changes to the vCPU
9573          * state (e.g. leave guest mode) after we've saved the state into the
9574          * SMM state-save area.
9575          */
9576         static_call(kvm_x86_enter_smm)(vcpu, buf);
9577
9578         kvm_smm_changed(vcpu, true);
9579         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
9580
9581         if (static_call(kvm_x86_get_nmi_mask)(vcpu))
9582                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
9583         else
9584                 static_call(kvm_x86_set_nmi_mask)(vcpu, true);
9585
9586         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
9587         kvm_rip_write(vcpu, 0x8000);
9588
9589         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
9590         static_call(kvm_x86_set_cr0)(vcpu, cr0);
9591         vcpu->arch.cr0 = cr0;
9592
9593         static_call(kvm_x86_set_cr4)(vcpu, 0);
9594
9595         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
9596         dt.address = dt.size = 0;
9597         static_call(kvm_x86_set_idt)(vcpu, &dt);
9598
9599         kvm_set_dr(vcpu, 7, DR7_FIXED_1);
9600
9601         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
9602         cs.base = vcpu->arch.smbase;
9603
9604         ds.selector = 0;
9605         ds.base = 0;
9606
9607         cs.limit    = ds.limit = 0xffffffff;
9608         cs.type     = ds.type = 0x3;
9609         cs.dpl      = ds.dpl = 0;
9610         cs.db       = ds.db = 0;
9611         cs.s        = ds.s = 1;
9612         cs.l        = ds.l = 0;
9613         cs.g        = ds.g = 1;
9614         cs.avl      = ds.avl = 0;
9615         cs.present  = ds.present = 1;
9616         cs.unusable = ds.unusable = 0;
9617         cs.padding  = ds.padding = 0;
9618
9619         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
9620         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
9621         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
9622         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
9623         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
9624         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
9625
9626 #ifdef CONFIG_X86_64
9627         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9628                 static_call(kvm_x86_set_efer)(vcpu, 0);
9629 #endif
9630
9631         kvm_update_cpuid_runtime(vcpu);
9632         kvm_mmu_reset_context(vcpu);
9633 }
9634
9635 static void process_smi(struct kvm_vcpu *vcpu)
9636 {
9637         vcpu->arch.smi_pending = true;
9638         kvm_make_request(KVM_REQ_EVENT, vcpu);
9639 }
9640
9641 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
9642                                        unsigned long *vcpu_bitmap)
9643 {
9644         kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC, vcpu_bitmap);
9645 }
9646
9647 void kvm_make_scan_ioapic_request(struct kvm *kvm)
9648 {
9649         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
9650 }
9651
9652 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
9653 {
9654         bool activate;
9655
9656         if (!lapic_in_kernel(vcpu))
9657                 return;
9658
9659         down_read(&vcpu->kvm->arch.apicv_update_lock);
9660
9661         activate = kvm_apicv_activated(vcpu->kvm);
9662         if (vcpu->arch.apicv_active == activate)
9663                 goto out;
9664
9665         vcpu->arch.apicv_active = activate;
9666         kvm_apic_update_apicv(vcpu);
9667         static_call(kvm_x86_refresh_apicv_exec_ctrl)(vcpu);
9668
9669         /*
9670          * When APICv gets disabled, we may still have injected interrupts
9671          * pending. At the same time, KVM_REQ_EVENT may not be set as APICv was
9672          * still active when the interrupt got accepted. Make sure
9673          * inject_pending_event() is called to check for that.
9674          */
9675         if (!vcpu->arch.apicv_active)
9676                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9677
9678 out:
9679         up_read(&vcpu->kvm->arch.apicv_update_lock);
9680 }
9681 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv);
9682
9683 void __kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
9684 {
9685         unsigned long old, new;
9686
9687         lockdep_assert_held_write(&kvm->arch.apicv_update_lock);
9688
9689         if (!static_call(kvm_x86_check_apicv_inhibit_reasons)(bit))
9690                 return;
9691
9692         old = new = kvm->arch.apicv_inhibit_reasons;
9693
9694         if (activate)
9695                 __clear_bit(bit, &new);
9696         else
9697                 __set_bit(bit, &new);
9698
9699         if (!!old != !!new) {
9700                 trace_kvm_apicv_update_request(activate, bit);
9701                 /*
9702                  * Kick all vCPUs before setting apicv_inhibit_reasons to avoid
9703                  * false positives in the sanity check WARN in svm_vcpu_run().
9704                  * This task will wait for all vCPUs to ack the kick IRQ before
9705                  * updating apicv_inhibit_reasons, and all other vCPUs will
9706                  * block on acquiring apicv_update_lock so that vCPUs can't
9707                  * redo svm_vcpu_run() without seeing the new inhibit state.
9708                  *
9709                  * Note, holding apicv_update_lock and taking it in the read
9710                  * side (handling the request) also prevents other vCPUs from
9711                  * servicing the request with a stale apicv_inhibit_reasons.
9712                  */
9713                 kvm_make_all_cpus_request(kvm, KVM_REQ_APICV_UPDATE);
9714                 kvm->arch.apicv_inhibit_reasons = new;
9715                 if (new) {
9716                         unsigned long gfn = gpa_to_gfn(APIC_DEFAULT_PHYS_BASE);
9717                         kvm_zap_gfn_range(kvm, gfn, gfn+1);
9718                 }
9719         } else
9720                 kvm->arch.apicv_inhibit_reasons = new;
9721 }
9722
9723 void kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
9724 {
9725         if (!enable_apicv)
9726                 return;
9727
9728         down_write(&kvm->arch.apicv_update_lock);
9729         __kvm_request_apicv_update(kvm, activate, bit);
9730         up_write(&kvm->arch.apicv_update_lock);
9731 }
9732 EXPORT_SYMBOL_GPL(kvm_request_apicv_update);
9733
9734 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
9735 {
9736         if (!kvm_apic_present(vcpu))
9737                 return;
9738
9739         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
9740
9741         if (irqchip_split(vcpu->kvm))
9742                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
9743         else {
9744                 static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
9745                 if (ioapic_in_kernel(vcpu->kvm))
9746                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
9747         }
9748
9749         if (is_guest_mode(vcpu))
9750                 vcpu->arch.load_eoi_exitmap_pending = true;
9751         else
9752                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
9753 }
9754
9755 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
9756 {
9757         u64 eoi_exit_bitmap[4];
9758
9759         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
9760                 return;
9761
9762         if (to_hv_vcpu(vcpu)) {
9763                 bitmap_or((ulong *)eoi_exit_bitmap,
9764                           vcpu->arch.ioapic_handled_vectors,
9765                           to_hv_synic(vcpu)->vec_bitmap, 256);
9766                 static_call(kvm_x86_load_eoi_exitmap)(vcpu, eoi_exit_bitmap);
9767                 return;
9768         }
9769
9770         static_call(kvm_x86_load_eoi_exitmap)(
9771                 vcpu, (u64 *)vcpu->arch.ioapic_handled_vectors);
9772 }
9773
9774 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
9775                                             unsigned long start, unsigned long end)
9776 {
9777         unsigned long apic_address;
9778
9779         /*
9780          * The physical address of apic access page is stored in the VMCS.
9781          * Update it when it becomes invalid.
9782          */
9783         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
9784         if (start <= apic_address && apic_address < end)
9785                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
9786 }
9787
9788 static void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
9789 {
9790         if (!lapic_in_kernel(vcpu))
9791                 return;
9792
9793         static_call_cond(kvm_x86_set_apic_access_page_addr)(vcpu);
9794 }
9795
9796 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
9797 {
9798         smp_send_reschedule(vcpu->cpu);
9799 }
9800 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
9801
9802 /*
9803  * Returns 1 to let vcpu_run() continue the guest execution loop without
9804  * exiting to the userspace.  Otherwise, the value will be returned to the
9805  * userspace.
9806  */
9807 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
9808 {
9809         int r;
9810         bool req_int_win =
9811                 dm_request_for_irq_injection(vcpu) &&
9812                 kvm_cpu_accept_dm_intr(vcpu);
9813         fastpath_t exit_fastpath;
9814
9815         bool req_immediate_exit = false;
9816
9817         /* Forbid vmenter if vcpu dirty ring is soft-full */
9818         if (unlikely(vcpu->kvm->dirty_ring_size &&
9819                      kvm_dirty_ring_soft_full(&vcpu->dirty_ring))) {
9820                 vcpu->run->exit_reason = KVM_EXIT_DIRTY_RING_FULL;
9821                 trace_kvm_dirty_ring_exit(vcpu);
9822                 r = 0;
9823                 goto out;
9824         }
9825
9826         if (kvm_request_pending(vcpu)) {
9827                 if (kvm_check_request(KVM_REQ_VM_DEAD, vcpu)) {
9828                         r = -EIO;
9829                         goto out;
9830                 }
9831                 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu)) {
9832                         if (unlikely(!kvm_x86_ops.nested_ops->get_nested_state_pages(vcpu))) {
9833                                 r = 0;
9834                                 goto out;
9835                         }
9836                 }
9837                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
9838                         kvm_mmu_unload(vcpu);
9839                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
9840                         __kvm_migrate_timers(vcpu);
9841                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
9842                         kvm_update_masterclock(vcpu->kvm);
9843                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
9844                         kvm_gen_kvmclock_update(vcpu);
9845                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
9846                         r = kvm_guest_time_update(vcpu);
9847                         if (unlikely(r))
9848                                 goto out;
9849                 }
9850                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
9851                         kvm_mmu_sync_roots(vcpu);
9852                 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD, vcpu))
9853                         kvm_mmu_load_pgd(vcpu);
9854                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) {
9855                         kvm_vcpu_flush_tlb_all(vcpu);
9856
9857                         /* Flushing all ASIDs flushes the current ASID... */
9858                         kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
9859                 }
9860                 kvm_service_local_tlb_flush_requests(vcpu);
9861
9862                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
9863                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
9864                         r = 0;
9865                         goto out;
9866                 }
9867                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
9868                         if (is_guest_mode(vcpu)) {
9869                                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
9870                         } else {
9871                                 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
9872                                 vcpu->mmio_needed = 0;
9873                                 r = 0;
9874                                 goto out;
9875                         }
9876                 }
9877                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
9878                         /* Page is swapped out. Do synthetic halt */
9879                         vcpu->arch.apf.halted = true;
9880                         r = 1;
9881                         goto out;
9882                 }
9883                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
9884                         record_steal_time(vcpu);
9885                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
9886                         process_smi(vcpu);
9887                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
9888                         process_nmi(vcpu);
9889                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
9890                         kvm_pmu_handle_event(vcpu);
9891                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
9892                         kvm_pmu_deliver_pmi(vcpu);
9893                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
9894                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
9895                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
9896                                      vcpu->arch.ioapic_handled_vectors)) {
9897                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
9898                                 vcpu->run->eoi.vector =
9899                                                 vcpu->arch.pending_ioapic_eoi;
9900                                 r = 0;
9901                                 goto out;
9902                         }
9903                 }
9904                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
9905                         vcpu_scan_ioapic(vcpu);
9906                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
9907                         vcpu_load_eoi_exitmap(vcpu);
9908                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
9909                         kvm_vcpu_reload_apic_access_page(vcpu);
9910                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
9911                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9912                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
9913                         r = 0;
9914                         goto out;
9915                 }
9916                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
9917                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9918                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
9919                         r = 0;
9920                         goto out;
9921                 }
9922                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
9923                         struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
9924
9925                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
9926                         vcpu->run->hyperv = hv_vcpu->exit;
9927                         r = 0;
9928                         goto out;
9929                 }
9930
9931                 /*
9932                  * KVM_REQ_HV_STIMER has to be processed after
9933                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
9934                  * depend on the guest clock being up-to-date
9935                  */
9936                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
9937                         kvm_hv_process_stimers(vcpu);
9938                 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
9939                         kvm_vcpu_update_apicv(vcpu);
9940                 if (kvm_check_request(KVM_REQ_APF_READY, vcpu))
9941                         kvm_check_async_pf_completion(vcpu);
9942                 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED, vcpu))
9943                         static_call(kvm_x86_msr_filter_changed)(vcpu);
9944
9945                 if (kvm_check_request(KVM_REQ_UPDATE_CPU_DIRTY_LOGGING, vcpu))
9946                         static_call(kvm_x86_update_cpu_dirty_logging)(vcpu);
9947         }
9948
9949         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win ||
9950             kvm_xen_has_interrupt(vcpu)) {
9951                 ++vcpu->stat.req_event;
9952                 r = kvm_apic_accept_events(vcpu);
9953                 if (r < 0) {
9954                         r = 0;
9955                         goto out;
9956                 }
9957                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
9958                         r = 1;
9959                         goto out;
9960                 }
9961
9962                 r = inject_pending_event(vcpu, &req_immediate_exit);
9963                 if (r < 0) {
9964                         r = 0;
9965                         goto out;
9966                 }
9967                 if (req_int_win)
9968                         static_call(kvm_x86_enable_irq_window)(vcpu);
9969
9970                 if (kvm_lapic_enabled(vcpu)) {
9971                         update_cr8_intercept(vcpu);
9972                         kvm_lapic_sync_to_vapic(vcpu);
9973                 }
9974         }
9975
9976         r = kvm_mmu_reload(vcpu);
9977         if (unlikely(r)) {
9978                 goto cancel_injection;
9979         }
9980
9981         preempt_disable();
9982
9983         static_call(kvm_x86_prepare_switch_to_guest)(vcpu);
9984
9985         /*
9986          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
9987          * IPI are then delayed after guest entry, which ensures that they
9988          * result in virtual interrupt delivery.
9989          */
9990         local_irq_disable();
9991
9992         /* Store vcpu->apicv_active before vcpu->mode.  */
9993         smp_store_release(&vcpu->mode, IN_GUEST_MODE);
9994
9995         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9996
9997         /*
9998          * 1) We should set ->mode before checking ->requests.  Please see
9999          * the comment in kvm_vcpu_exiting_guest_mode().
10000          *
10001          * 2) For APICv, we should set ->mode before checking PID.ON. This
10002          * pairs with the memory barrier implicit in pi_test_and_set_on
10003          * (see vmx_deliver_posted_interrupt).
10004          *
10005          * 3) This also orders the write to mode from any reads to the page
10006          * tables done while the VCPU is running.  Please see the comment
10007          * in kvm_flush_remote_tlbs.
10008          */
10009         smp_mb__after_srcu_read_unlock();
10010
10011         /*
10012          * Process pending posted interrupts to handle the case where the
10013          * notification IRQ arrived in the host, or was never sent (because the
10014          * target vCPU wasn't running).  Do this regardless of the vCPU's APICv
10015          * status, KVM doesn't update assigned devices when APICv is inhibited,
10016          * i.e. they can post interrupts even if APICv is temporarily disabled.
10017          */
10018         if (kvm_lapic_enabled(vcpu))
10019                 static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
10020
10021         if (kvm_vcpu_exit_request(vcpu)) {
10022                 vcpu->mode = OUTSIDE_GUEST_MODE;
10023                 smp_wmb();
10024                 local_irq_enable();
10025                 preempt_enable();
10026                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
10027                 r = 1;
10028                 goto cancel_injection;
10029         }
10030
10031         if (req_immediate_exit) {
10032                 kvm_make_request(KVM_REQ_EVENT, vcpu);
10033                 static_call(kvm_x86_request_immediate_exit)(vcpu);
10034         }
10035
10036         fpregs_assert_state_consistent();
10037         if (test_thread_flag(TIF_NEED_FPU_LOAD))
10038                 switch_fpu_return();
10039
10040         if (vcpu->arch.guest_fpu.xfd_err)
10041                 wrmsrl(MSR_IA32_XFD_ERR, vcpu->arch.guest_fpu.xfd_err);
10042
10043         if (unlikely(vcpu->arch.switch_db_regs)) {
10044                 set_debugreg(0, 7);
10045                 set_debugreg(vcpu->arch.eff_db[0], 0);
10046                 set_debugreg(vcpu->arch.eff_db[1], 1);
10047                 set_debugreg(vcpu->arch.eff_db[2], 2);
10048                 set_debugreg(vcpu->arch.eff_db[3], 3);
10049         } else if (unlikely(hw_breakpoint_active())) {
10050                 set_debugreg(0, 7);
10051         }
10052
10053         guest_timing_enter_irqoff();
10054
10055         for (;;) {
10056                 /*
10057                  * Assert that vCPU vs. VM APICv state is consistent.  An APICv
10058                  * update must kick and wait for all vCPUs before toggling the
10059                  * per-VM state, and responsing vCPUs must wait for the update
10060                  * to complete before servicing KVM_REQ_APICV_UPDATE.
10061                  */
10062                 WARN_ON_ONCE(kvm_apicv_activated(vcpu->kvm) != kvm_vcpu_apicv_active(vcpu));
10063
10064                 exit_fastpath = static_call(kvm_x86_vcpu_run)(vcpu);
10065                 if (likely(exit_fastpath != EXIT_FASTPATH_REENTER_GUEST))
10066                         break;
10067
10068                 if (kvm_lapic_enabled(vcpu))
10069                         static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
10070
10071                 if (unlikely(kvm_vcpu_exit_request(vcpu))) {
10072                         exit_fastpath = EXIT_FASTPATH_EXIT_HANDLED;
10073                         break;
10074                 }
10075         }
10076
10077         /*
10078          * Do this here before restoring debug registers on the host.  And
10079          * since we do this before handling the vmexit, a DR access vmexit
10080          * can (a) read the correct value of the debug registers, (b) set
10081          * KVM_DEBUGREG_WONT_EXIT again.
10082          */
10083         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
10084                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
10085                 static_call(kvm_x86_sync_dirty_debug_regs)(vcpu);
10086                 kvm_update_dr0123(vcpu);
10087                 kvm_update_dr7(vcpu);
10088         }
10089
10090         /*
10091          * If the guest has used debug registers, at least dr7
10092          * will be disabled while returning to the host.
10093          * If we don't have active breakpoints in the host, we don't
10094          * care about the messed up debug address registers. But if
10095          * we have some of them active, restore the old state.
10096          */
10097         if (hw_breakpoint_active())
10098                 hw_breakpoint_restore();
10099
10100         vcpu->arch.last_vmentry_cpu = vcpu->cpu;
10101         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
10102
10103         vcpu->mode = OUTSIDE_GUEST_MODE;
10104         smp_wmb();
10105
10106         /*
10107          * Sync xfd before calling handle_exit_irqoff() which may
10108          * rely on the fact that guest_fpu::xfd is up-to-date (e.g.
10109          * in #NM irqoff handler).
10110          */
10111         if (vcpu->arch.xfd_no_write_intercept)
10112                 fpu_sync_guest_vmexit_xfd_state();
10113
10114         static_call(kvm_x86_handle_exit_irqoff)(vcpu);
10115
10116         if (vcpu->arch.guest_fpu.xfd_err)
10117                 wrmsrl(MSR_IA32_XFD_ERR, 0);
10118
10119         /*
10120          * Consume any pending interrupts, including the possible source of
10121          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
10122          * An instruction is required after local_irq_enable() to fully unblock
10123          * interrupts on processors that implement an interrupt shadow, the
10124          * stat.exits increment will do nicely.
10125          */
10126         kvm_before_interrupt(vcpu, KVM_HANDLING_IRQ);
10127         local_irq_enable();
10128         ++vcpu->stat.exits;
10129         local_irq_disable();
10130         kvm_after_interrupt(vcpu);
10131
10132         /*
10133          * Wait until after servicing IRQs to account guest time so that any
10134          * ticks that occurred while running the guest are properly accounted
10135          * to the guest.  Waiting until IRQs are enabled degrades the accuracy
10136          * of accounting via context tracking, but the loss of accuracy is
10137          * acceptable for all known use cases.
10138          */
10139         guest_timing_exit_irqoff();
10140
10141         if (lapic_in_kernel(vcpu)) {
10142                 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
10143                 if (delta != S64_MIN) {
10144                         trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
10145                         vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
10146                 }
10147         }
10148
10149         local_irq_enable();
10150         preempt_enable();
10151
10152         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
10153
10154         /*
10155          * Profile KVM exit RIPs:
10156          */
10157         if (unlikely(prof_on == KVM_PROFILING)) {
10158                 unsigned long rip = kvm_rip_read(vcpu);
10159                 profile_hit(KVM_PROFILING, (void *)rip);
10160         }
10161
10162         if (unlikely(vcpu->arch.tsc_always_catchup))
10163                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
10164
10165         if (vcpu->arch.apic_attention)
10166                 kvm_lapic_sync_from_vapic(vcpu);
10167
10168         r = static_call(kvm_x86_handle_exit)(vcpu, exit_fastpath);
10169         return r;
10170
10171 cancel_injection:
10172         if (req_immediate_exit)
10173                 kvm_make_request(KVM_REQ_EVENT, vcpu);
10174         static_call(kvm_x86_cancel_injection)(vcpu);
10175         if (unlikely(vcpu->arch.apic_attention))
10176                 kvm_lapic_sync_from_vapic(vcpu);
10177 out:
10178         return r;
10179 }
10180
10181 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
10182 {
10183         bool hv_timer;
10184
10185         if (!kvm_arch_vcpu_runnable(vcpu)) {
10186                 /*
10187                  * Switch to the software timer before halt-polling/blocking as
10188                  * the guest's timer may be a break event for the vCPU, and the
10189                  * hypervisor timer runs only when the CPU is in guest mode.
10190                  * Switch before halt-polling so that KVM recognizes an expired
10191                  * timer before blocking.
10192                  */
10193                 hv_timer = kvm_lapic_hv_timer_in_use(vcpu);
10194                 if (hv_timer)
10195                         kvm_lapic_switch_to_sw_timer(vcpu);
10196
10197                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
10198                 if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED)
10199                         kvm_vcpu_halt(vcpu);
10200                 else
10201                         kvm_vcpu_block(vcpu);
10202                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
10203
10204                 if (hv_timer)
10205                         kvm_lapic_switch_to_hv_timer(vcpu);
10206
10207                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
10208                         return 1;
10209         }
10210
10211         if (kvm_apic_accept_events(vcpu) < 0)
10212                 return 0;
10213         switch(vcpu->arch.mp_state) {
10214         case KVM_MP_STATE_HALTED:
10215         case KVM_MP_STATE_AP_RESET_HOLD:
10216                 vcpu->arch.pv.pv_unhalted = false;
10217                 vcpu->arch.mp_state =
10218                         KVM_MP_STATE_RUNNABLE;
10219                 fallthrough;
10220         case KVM_MP_STATE_RUNNABLE:
10221                 vcpu->arch.apf.halted = false;
10222                 break;
10223         case KVM_MP_STATE_INIT_RECEIVED:
10224                 break;
10225         default:
10226                 return -EINTR;
10227         }
10228         return 1;
10229 }
10230
10231 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
10232 {
10233         if (is_guest_mode(vcpu))
10234                 kvm_check_nested_events(vcpu);
10235
10236         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
10237                 !vcpu->arch.apf.halted);
10238 }
10239
10240 static int vcpu_run(struct kvm_vcpu *vcpu)
10241 {
10242         int r;
10243         struct kvm *kvm = vcpu->kvm;
10244
10245         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
10246         vcpu->arch.l1tf_flush_l1d = true;
10247
10248         for (;;) {
10249                 if (kvm_vcpu_running(vcpu)) {
10250                         r = vcpu_enter_guest(vcpu);
10251                 } else {
10252                         r = vcpu_block(kvm, vcpu);
10253                 }
10254
10255                 if (r <= 0)
10256                         break;
10257
10258                 kvm_clear_request(KVM_REQ_UNBLOCK, vcpu);
10259                 if (kvm_cpu_has_pending_timer(vcpu))
10260                         kvm_inject_pending_timer_irqs(vcpu);
10261
10262                 if (dm_request_for_irq_injection(vcpu) &&
10263                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
10264                         r = 0;
10265                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
10266                         ++vcpu->stat.request_irq_exits;
10267                         break;
10268                 }
10269
10270                 if (__xfer_to_guest_mode_work_pending()) {
10271                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
10272                         r = xfer_to_guest_mode_handle_work(vcpu);
10273                         if (r)
10274                                 return r;
10275                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
10276                 }
10277         }
10278
10279         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
10280
10281         return r;
10282 }
10283
10284 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
10285 {
10286         int r;
10287
10288         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
10289         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
10290         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
10291         return r;
10292 }
10293
10294 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
10295 {
10296         BUG_ON(!vcpu->arch.pio.count);
10297
10298         return complete_emulated_io(vcpu);
10299 }
10300
10301 /*
10302  * Implements the following, as a state machine:
10303  *
10304  * read:
10305  *   for each fragment
10306  *     for each mmio piece in the fragment
10307  *       write gpa, len
10308  *       exit
10309  *       copy data
10310  *   execute insn
10311  *
10312  * write:
10313  *   for each fragment
10314  *     for each mmio piece in the fragment
10315  *       write gpa, len
10316  *       copy data
10317  *       exit
10318  */
10319 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
10320 {
10321         struct kvm_run *run = vcpu->run;
10322         struct kvm_mmio_fragment *frag;
10323         unsigned len;
10324
10325         BUG_ON(!vcpu->mmio_needed);
10326
10327         /* Complete previous fragment */
10328         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
10329         len = min(8u, frag->len);
10330         if (!vcpu->mmio_is_write)
10331                 memcpy(frag->data, run->mmio.data, len);
10332
10333         if (frag->len <= 8) {
10334                 /* Switch to the next fragment. */
10335                 frag++;
10336                 vcpu->mmio_cur_fragment++;
10337         } else {
10338                 /* Go forward to the next mmio piece. */
10339                 frag->data += len;
10340                 frag->gpa += len;
10341                 frag->len -= len;
10342         }
10343
10344         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
10345                 vcpu->mmio_needed = 0;
10346
10347                 /* FIXME: return into emulator if single-stepping.  */
10348                 if (vcpu->mmio_is_write)
10349                         return 1;
10350                 vcpu->mmio_read_completed = 1;
10351                 return complete_emulated_io(vcpu);
10352         }
10353
10354         run->exit_reason = KVM_EXIT_MMIO;
10355         run->mmio.phys_addr = frag->gpa;
10356         if (vcpu->mmio_is_write)
10357                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
10358         run->mmio.len = min(8u, frag->len);
10359         run->mmio.is_write = vcpu->mmio_is_write;
10360         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
10361         return 0;
10362 }
10363
10364 /* Swap (qemu) user FPU context for the guest FPU context. */
10365 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
10366 {
10367         /* Exclude PKRU, it's restored separately immediately after VM-Exit. */
10368         fpu_swap_kvm_fpstate(&vcpu->arch.guest_fpu, true);
10369         trace_kvm_fpu(1);
10370 }
10371
10372 /* When vcpu_run ends, restore user space FPU context. */
10373 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
10374 {
10375         fpu_swap_kvm_fpstate(&vcpu->arch.guest_fpu, false);
10376         ++vcpu->stat.fpu_reload;
10377         trace_kvm_fpu(0);
10378 }
10379
10380 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
10381 {
10382         struct kvm_run *kvm_run = vcpu->run;
10383         int r;
10384
10385         vcpu_load(vcpu);
10386         kvm_sigset_activate(vcpu);
10387         kvm_run->flags = 0;
10388         kvm_load_guest_fpu(vcpu);
10389
10390         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
10391                 if (kvm_run->immediate_exit) {
10392                         r = -EINTR;
10393                         goto out;
10394                 }
10395                 /*
10396                  * It should be impossible for the hypervisor timer to be in
10397                  * use before KVM has ever run the vCPU.
10398                  */
10399                 WARN_ON_ONCE(kvm_lapic_hv_timer_in_use(vcpu));
10400                 kvm_vcpu_block(vcpu);
10401                 if (kvm_apic_accept_events(vcpu) < 0) {
10402                         r = 0;
10403                         goto out;
10404                 }
10405                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
10406                 r = -EAGAIN;
10407                 if (signal_pending(current)) {
10408                         r = -EINTR;
10409                         kvm_run->exit_reason = KVM_EXIT_INTR;
10410                         ++vcpu->stat.signal_exits;
10411                 }
10412                 goto out;
10413         }
10414
10415         if ((kvm_run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) ||
10416             (kvm_run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)) {
10417                 r = -EINVAL;
10418                 goto out;
10419         }
10420
10421         if (kvm_run->kvm_dirty_regs) {
10422                 r = sync_regs(vcpu);
10423                 if (r != 0)
10424                         goto out;
10425         }
10426
10427         /* re-sync apic's tpr */
10428         if (!lapic_in_kernel(vcpu)) {
10429                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
10430                         r = -EINVAL;
10431                         goto out;
10432                 }
10433         }
10434
10435         if (unlikely(vcpu->arch.complete_userspace_io)) {
10436                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
10437                 vcpu->arch.complete_userspace_io = NULL;
10438                 r = cui(vcpu);
10439                 if (r <= 0)
10440                         goto out;
10441         } else
10442                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
10443
10444         if (kvm_run->immediate_exit) {
10445                 r = -EINTR;
10446                 goto out;
10447         }
10448
10449         r = static_call(kvm_x86_vcpu_pre_run)(vcpu);
10450         if (r <= 0)
10451                 goto out;
10452
10453         r = vcpu_run(vcpu);
10454
10455 out:
10456         kvm_put_guest_fpu(vcpu);
10457         if (kvm_run->kvm_valid_regs)
10458                 store_regs(vcpu);
10459         post_kvm_run_save(vcpu);
10460         kvm_sigset_deactivate(vcpu);
10461
10462         vcpu_put(vcpu);
10463         return r;
10464 }
10465
10466 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10467 {
10468         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
10469                 /*
10470                  * We are here if userspace calls get_regs() in the middle of
10471                  * instruction emulation. Registers state needs to be copied
10472                  * back from emulation context to vcpu. Userspace shouldn't do
10473                  * that usually, but some bad designed PV devices (vmware
10474                  * backdoor interface) need this to work
10475                  */
10476                 emulator_writeback_register_cache(vcpu->arch.emulate_ctxt);
10477                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
10478         }
10479         regs->rax = kvm_rax_read(vcpu);
10480         regs->rbx = kvm_rbx_read(vcpu);
10481         regs->rcx = kvm_rcx_read(vcpu);
10482         regs->rdx = kvm_rdx_read(vcpu);
10483         regs->rsi = kvm_rsi_read(vcpu);
10484         regs->rdi = kvm_rdi_read(vcpu);
10485         regs->rsp = kvm_rsp_read(vcpu);
10486         regs->rbp = kvm_rbp_read(vcpu);
10487 #ifdef CONFIG_X86_64
10488         regs->r8 = kvm_r8_read(vcpu);
10489         regs->r9 = kvm_r9_read(vcpu);
10490         regs->r10 = kvm_r10_read(vcpu);
10491         regs->r11 = kvm_r11_read(vcpu);
10492         regs->r12 = kvm_r12_read(vcpu);
10493         regs->r13 = kvm_r13_read(vcpu);
10494         regs->r14 = kvm_r14_read(vcpu);
10495         regs->r15 = kvm_r15_read(vcpu);
10496 #endif
10497
10498         regs->rip = kvm_rip_read(vcpu);
10499         regs->rflags = kvm_get_rflags(vcpu);
10500 }
10501
10502 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10503 {
10504         vcpu_load(vcpu);
10505         __get_regs(vcpu, regs);
10506         vcpu_put(vcpu);
10507         return 0;
10508 }
10509
10510 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10511 {
10512         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
10513         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
10514
10515         kvm_rax_write(vcpu, regs->rax);
10516         kvm_rbx_write(vcpu, regs->rbx);
10517         kvm_rcx_write(vcpu, regs->rcx);
10518         kvm_rdx_write(vcpu, regs->rdx);
10519         kvm_rsi_write(vcpu, regs->rsi);
10520         kvm_rdi_write(vcpu, regs->rdi);
10521         kvm_rsp_write(vcpu, regs->rsp);
10522         kvm_rbp_write(vcpu, regs->rbp);
10523 #ifdef CONFIG_X86_64
10524         kvm_r8_write(vcpu, regs->r8);
10525         kvm_r9_write(vcpu, regs->r9);
10526         kvm_r10_write(vcpu, regs->r10);
10527         kvm_r11_write(vcpu, regs->r11);
10528         kvm_r12_write(vcpu, regs->r12);
10529         kvm_r13_write(vcpu, regs->r13);
10530         kvm_r14_write(vcpu, regs->r14);
10531         kvm_r15_write(vcpu, regs->r15);
10532 #endif
10533
10534         kvm_rip_write(vcpu, regs->rip);
10535         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
10536
10537         vcpu->arch.exception.pending = false;
10538
10539         kvm_make_request(KVM_REQ_EVENT, vcpu);
10540 }
10541
10542 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10543 {
10544         vcpu_load(vcpu);
10545         __set_regs(vcpu, regs);
10546         vcpu_put(vcpu);
10547         return 0;
10548 }
10549
10550 static void __get_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10551 {
10552         struct desc_ptr dt;
10553
10554         if (vcpu->arch.guest_state_protected)
10555                 goto skip_protected_regs;
10556
10557         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10558         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10559         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10560         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10561         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10562         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10563
10564         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10565         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10566
10567         static_call(kvm_x86_get_idt)(vcpu, &dt);
10568         sregs->idt.limit = dt.size;
10569         sregs->idt.base = dt.address;
10570         static_call(kvm_x86_get_gdt)(vcpu, &dt);
10571         sregs->gdt.limit = dt.size;
10572         sregs->gdt.base = dt.address;
10573
10574         sregs->cr2 = vcpu->arch.cr2;
10575         sregs->cr3 = kvm_read_cr3(vcpu);
10576
10577 skip_protected_regs:
10578         sregs->cr0 = kvm_read_cr0(vcpu);
10579         sregs->cr4 = kvm_read_cr4(vcpu);
10580         sregs->cr8 = kvm_get_cr8(vcpu);
10581         sregs->efer = vcpu->arch.efer;
10582         sregs->apic_base = kvm_get_apic_base(vcpu);
10583 }
10584
10585 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10586 {
10587         __get_sregs_common(vcpu, sregs);
10588
10589         if (vcpu->arch.guest_state_protected)
10590                 return;
10591
10592         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
10593                 set_bit(vcpu->arch.interrupt.nr,
10594                         (unsigned long *)sregs->interrupt_bitmap);
10595 }
10596
10597 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
10598 {
10599         int i;
10600
10601         __get_sregs_common(vcpu, (struct kvm_sregs *)sregs2);
10602
10603         if (vcpu->arch.guest_state_protected)
10604                 return;
10605
10606         if (is_pae_paging(vcpu)) {
10607                 for (i = 0 ; i < 4 ; i++)
10608                         sregs2->pdptrs[i] = kvm_pdptr_read(vcpu, i);
10609                 sregs2->flags |= KVM_SREGS2_FLAGS_PDPTRS_VALID;
10610         }
10611 }
10612
10613 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
10614                                   struct kvm_sregs *sregs)
10615 {
10616         vcpu_load(vcpu);
10617         __get_sregs(vcpu, sregs);
10618         vcpu_put(vcpu);
10619         return 0;
10620 }
10621
10622 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
10623                                     struct kvm_mp_state *mp_state)
10624 {
10625         int r;
10626
10627         vcpu_load(vcpu);
10628         if (kvm_mpx_supported())
10629                 kvm_load_guest_fpu(vcpu);
10630
10631         r = kvm_apic_accept_events(vcpu);
10632         if (r < 0)
10633                 goto out;
10634         r = 0;
10635
10636         if ((vcpu->arch.mp_state == KVM_MP_STATE_HALTED ||
10637              vcpu->arch.mp_state == KVM_MP_STATE_AP_RESET_HOLD) &&
10638             vcpu->arch.pv.pv_unhalted)
10639                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
10640         else
10641                 mp_state->mp_state = vcpu->arch.mp_state;
10642
10643 out:
10644         if (kvm_mpx_supported())
10645                 kvm_put_guest_fpu(vcpu);
10646         vcpu_put(vcpu);
10647         return r;
10648 }
10649
10650 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
10651                                     struct kvm_mp_state *mp_state)
10652 {
10653         int ret = -EINVAL;
10654
10655         vcpu_load(vcpu);
10656
10657         if (!lapic_in_kernel(vcpu) &&
10658             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
10659                 goto out;
10660
10661         /*
10662          * KVM_MP_STATE_INIT_RECEIVED means the processor is in
10663          * INIT state; latched init should be reported using
10664          * KVM_SET_VCPU_EVENTS, so reject it here.
10665          */
10666         if ((kvm_vcpu_latch_init(vcpu) || vcpu->arch.smi_pending) &&
10667             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
10668              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
10669                 goto out;
10670
10671         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
10672                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
10673                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
10674         } else
10675                 vcpu->arch.mp_state = mp_state->mp_state;
10676         kvm_make_request(KVM_REQ_EVENT, vcpu);
10677
10678         ret = 0;
10679 out:
10680         vcpu_put(vcpu);
10681         return ret;
10682 }
10683
10684 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
10685                     int reason, bool has_error_code, u32 error_code)
10686 {
10687         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
10688         int ret;
10689
10690         init_emulate_ctxt(vcpu);
10691
10692         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
10693                                    has_error_code, error_code);
10694         if (ret) {
10695                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
10696                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
10697                 vcpu->run->internal.ndata = 0;
10698                 return 0;
10699         }
10700
10701         kvm_rip_write(vcpu, ctxt->eip);
10702         kvm_set_rflags(vcpu, ctxt->eflags);
10703         return 1;
10704 }
10705 EXPORT_SYMBOL_GPL(kvm_task_switch);
10706
10707 static bool kvm_is_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10708 {
10709         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
10710                 /*
10711                  * When EFER.LME and CR0.PG are set, the processor is in
10712                  * 64-bit mode (though maybe in a 32-bit code segment).
10713                  * CR4.PAE and EFER.LMA must be set.
10714                  */
10715                 if (!(sregs->cr4 & X86_CR4_PAE) || !(sregs->efer & EFER_LMA))
10716                         return false;
10717                 if (kvm_vcpu_is_illegal_gpa(vcpu, sregs->cr3))
10718                         return false;
10719         } else {
10720                 /*
10721                  * Not in 64-bit mode: EFER.LMA is clear and the code
10722                  * segment cannot be 64-bit.
10723                  */
10724                 if (sregs->efer & EFER_LMA || sregs->cs.l)
10725                         return false;
10726         }
10727
10728         return kvm_is_valid_cr4(vcpu, sregs->cr4);
10729 }
10730
10731 static int __set_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs,
10732                 int *mmu_reset_needed, bool update_pdptrs)
10733 {
10734         struct msr_data apic_base_msr;
10735         int idx;
10736         struct desc_ptr dt;
10737
10738         if (!kvm_is_valid_sregs(vcpu, sregs))
10739                 return -EINVAL;
10740
10741         apic_base_msr.data = sregs->apic_base;
10742         apic_base_msr.host_initiated = true;
10743         if (kvm_set_apic_base(vcpu, &apic_base_msr))
10744                 return -EINVAL;
10745
10746         if (vcpu->arch.guest_state_protected)
10747                 return 0;
10748
10749         dt.size = sregs->idt.limit;
10750         dt.address = sregs->idt.base;
10751         static_call(kvm_x86_set_idt)(vcpu, &dt);
10752         dt.size = sregs->gdt.limit;
10753         dt.address = sregs->gdt.base;
10754         static_call(kvm_x86_set_gdt)(vcpu, &dt);
10755
10756         vcpu->arch.cr2 = sregs->cr2;
10757         *mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
10758         vcpu->arch.cr3 = sregs->cr3;
10759         kvm_register_mark_dirty(vcpu, VCPU_EXREG_CR3);
10760         static_call_cond(kvm_x86_post_set_cr3)(vcpu, sregs->cr3);
10761
10762         kvm_set_cr8(vcpu, sregs->cr8);
10763
10764         *mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
10765         static_call(kvm_x86_set_efer)(vcpu, sregs->efer);
10766
10767         *mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
10768         static_call(kvm_x86_set_cr0)(vcpu, sregs->cr0);
10769         vcpu->arch.cr0 = sregs->cr0;
10770
10771         *mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
10772         static_call(kvm_x86_set_cr4)(vcpu, sregs->cr4);
10773
10774         if (update_pdptrs) {
10775                 idx = srcu_read_lock(&vcpu->kvm->srcu);
10776                 if (is_pae_paging(vcpu)) {
10777                         load_pdptrs(vcpu, kvm_read_cr3(vcpu));
10778                         *mmu_reset_needed = 1;
10779                 }
10780                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
10781         }
10782
10783         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10784         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10785         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10786         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10787         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10788         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10789
10790         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10791         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10792
10793         update_cr8_intercept(vcpu);
10794
10795         /* Older userspace won't unhalt the vcpu on reset. */
10796         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
10797             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
10798             !is_protmode(vcpu))
10799                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10800
10801         return 0;
10802 }
10803
10804 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10805 {
10806         int pending_vec, max_bits;
10807         int mmu_reset_needed = 0;
10808         int ret = __set_sregs_common(vcpu, sregs, &mmu_reset_needed, true);
10809
10810         if (ret)
10811                 return ret;
10812
10813         if (mmu_reset_needed)
10814                 kvm_mmu_reset_context(vcpu);
10815
10816         max_bits = KVM_NR_INTERRUPTS;
10817         pending_vec = find_first_bit(
10818                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
10819
10820         if (pending_vec < max_bits) {
10821                 kvm_queue_interrupt(vcpu, pending_vec, false);
10822                 pr_debug("Set back pending irq %d\n", pending_vec);
10823                 kvm_make_request(KVM_REQ_EVENT, vcpu);
10824         }
10825         return 0;
10826 }
10827
10828 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
10829 {
10830         int mmu_reset_needed = 0;
10831         bool valid_pdptrs = sregs2->flags & KVM_SREGS2_FLAGS_PDPTRS_VALID;
10832         bool pae = (sregs2->cr0 & X86_CR0_PG) && (sregs2->cr4 & X86_CR4_PAE) &&
10833                 !(sregs2->efer & EFER_LMA);
10834         int i, ret;
10835
10836         if (sregs2->flags & ~KVM_SREGS2_FLAGS_PDPTRS_VALID)
10837                 return -EINVAL;
10838
10839         if (valid_pdptrs && (!pae || vcpu->arch.guest_state_protected))
10840                 return -EINVAL;
10841
10842         ret = __set_sregs_common(vcpu, (struct kvm_sregs *)sregs2,
10843                                  &mmu_reset_needed, !valid_pdptrs);
10844         if (ret)
10845                 return ret;
10846
10847         if (valid_pdptrs) {
10848                 for (i = 0; i < 4 ; i++)
10849                         kvm_pdptr_write(vcpu, i, sregs2->pdptrs[i]);
10850
10851                 kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
10852                 mmu_reset_needed = 1;
10853                 vcpu->arch.pdptrs_from_userspace = true;
10854         }
10855         if (mmu_reset_needed)
10856                 kvm_mmu_reset_context(vcpu);
10857         return 0;
10858 }
10859
10860 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
10861                                   struct kvm_sregs *sregs)
10862 {
10863         int ret;
10864
10865         vcpu_load(vcpu);
10866         ret = __set_sregs(vcpu, sregs);
10867         vcpu_put(vcpu);
10868         return ret;
10869 }
10870
10871 static void kvm_arch_vcpu_guestdbg_update_apicv_inhibit(struct kvm *kvm)
10872 {
10873         bool inhibit = false;
10874         struct kvm_vcpu *vcpu;
10875         unsigned long i;
10876
10877         down_write(&kvm->arch.apicv_update_lock);
10878
10879         kvm_for_each_vcpu(i, vcpu, kvm) {
10880                 if (vcpu->guest_debug & KVM_GUESTDBG_BLOCKIRQ) {
10881                         inhibit = true;
10882                         break;
10883                 }
10884         }
10885         __kvm_request_apicv_update(kvm, !inhibit, APICV_INHIBIT_REASON_BLOCKIRQ);
10886         up_write(&kvm->arch.apicv_update_lock);
10887 }
10888
10889 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
10890                                         struct kvm_guest_debug *dbg)
10891 {
10892         unsigned long rflags;
10893         int i, r;
10894
10895         if (vcpu->arch.guest_state_protected)
10896                 return -EINVAL;
10897
10898         vcpu_load(vcpu);
10899
10900         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
10901                 r = -EBUSY;
10902                 if (vcpu->arch.exception.pending)
10903                         goto out;
10904                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
10905                         kvm_queue_exception(vcpu, DB_VECTOR);
10906                 else
10907                         kvm_queue_exception(vcpu, BP_VECTOR);
10908         }
10909
10910         /*
10911          * Read rflags as long as potentially injected trace flags are still
10912          * filtered out.
10913          */
10914         rflags = kvm_get_rflags(vcpu);
10915
10916         vcpu->guest_debug = dbg->control;
10917         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
10918                 vcpu->guest_debug = 0;
10919
10920         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
10921                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
10922                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
10923                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
10924         } else {
10925                 for (i = 0; i < KVM_NR_DB_REGS; i++)
10926                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
10927         }
10928         kvm_update_dr7(vcpu);
10929
10930         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
10931                 vcpu->arch.singlestep_rip = kvm_get_linear_rip(vcpu);
10932
10933         /*
10934          * Trigger an rflags update that will inject or remove the trace
10935          * flags.
10936          */
10937         kvm_set_rflags(vcpu, rflags);
10938
10939         static_call(kvm_x86_update_exception_bitmap)(vcpu);
10940
10941         kvm_arch_vcpu_guestdbg_update_apicv_inhibit(vcpu->kvm);
10942
10943         r = 0;
10944
10945 out:
10946         vcpu_put(vcpu);
10947         return r;
10948 }
10949
10950 /*
10951  * Translate a guest virtual address to a guest physical address.
10952  */
10953 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
10954                                     struct kvm_translation *tr)
10955 {
10956         unsigned long vaddr = tr->linear_address;
10957         gpa_t gpa;
10958         int idx;
10959
10960         vcpu_load(vcpu);
10961
10962         idx = srcu_read_lock(&vcpu->kvm->srcu);
10963         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
10964         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10965         tr->physical_address = gpa;
10966         tr->valid = gpa != UNMAPPED_GVA;
10967         tr->writeable = 1;
10968         tr->usermode = 0;
10969
10970         vcpu_put(vcpu);
10971         return 0;
10972 }
10973
10974 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10975 {
10976         struct fxregs_state *fxsave;
10977
10978         if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
10979                 return 0;
10980
10981         vcpu_load(vcpu);
10982
10983         fxsave = &vcpu->arch.guest_fpu.fpstate->regs.fxsave;
10984         memcpy(fpu->fpr, fxsave->st_space, 128);
10985         fpu->fcw = fxsave->cwd;
10986         fpu->fsw = fxsave->swd;
10987         fpu->ftwx = fxsave->twd;
10988         fpu->last_opcode = fxsave->fop;
10989         fpu->last_ip = fxsave->rip;
10990         fpu->last_dp = fxsave->rdp;
10991         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
10992
10993         vcpu_put(vcpu);
10994         return 0;
10995 }
10996
10997 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10998 {
10999         struct fxregs_state *fxsave;
11000
11001         if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
11002                 return 0;
11003
11004         vcpu_load(vcpu);
11005
11006         fxsave = &vcpu->arch.guest_fpu.fpstate->regs.fxsave;
11007
11008         memcpy(fxsave->st_space, fpu->fpr, 128);
11009         fxsave->cwd = fpu->fcw;
11010         fxsave->swd = fpu->fsw;
11011         fxsave->twd = fpu->ftwx;
11012         fxsave->fop = fpu->last_opcode;
11013         fxsave->rip = fpu->last_ip;
11014         fxsave->rdp = fpu->last_dp;
11015         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
11016
11017         vcpu_put(vcpu);
11018         return 0;
11019 }
11020
11021 static void store_regs(struct kvm_vcpu *vcpu)
11022 {
11023         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
11024
11025         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
11026                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
11027
11028         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
11029                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
11030
11031         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
11032                 kvm_vcpu_ioctl_x86_get_vcpu_events(
11033                                 vcpu, &vcpu->run->s.regs.events);
11034 }
11035
11036 static int sync_regs(struct kvm_vcpu *vcpu)
11037 {
11038         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
11039                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
11040                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
11041         }
11042         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
11043                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
11044                         return -EINVAL;
11045                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
11046         }
11047         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
11048                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
11049                                 vcpu, &vcpu->run->s.regs.events))
11050                         return -EINVAL;
11051                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
11052         }
11053
11054         return 0;
11055 }
11056
11057 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
11058 {
11059         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
11060                 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
11061                              "guest TSC will not be reliable\n");
11062
11063         return 0;
11064 }
11065
11066 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
11067 {
11068         struct page *page;
11069         int r;
11070
11071         vcpu->arch.last_vmentry_cpu = -1;
11072         vcpu->arch.regs_avail = ~0;
11073         vcpu->arch.regs_dirty = ~0;
11074
11075         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
11076                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
11077         else
11078                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
11079
11080         r = kvm_mmu_create(vcpu);
11081         if (r < 0)
11082                 return r;
11083
11084         if (irqchip_in_kernel(vcpu->kvm)) {
11085                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
11086                 if (r < 0)
11087                         goto fail_mmu_destroy;
11088                 if (kvm_apicv_activated(vcpu->kvm))
11089                         vcpu->arch.apicv_active = true;
11090         } else
11091                 static_branch_inc(&kvm_has_noapic_vcpu);
11092
11093         r = -ENOMEM;
11094
11095         page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO);
11096         if (!page)
11097                 goto fail_free_lapic;
11098         vcpu->arch.pio_data = page_address(page);
11099
11100         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
11101                                        GFP_KERNEL_ACCOUNT);
11102         if (!vcpu->arch.mce_banks)
11103                 goto fail_free_pio_data;
11104         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
11105
11106         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
11107                                 GFP_KERNEL_ACCOUNT))
11108                 goto fail_free_mce_banks;
11109
11110         if (!alloc_emulate_ctxt(vcpu))
11111                 goto free_wbinvd_dirty_mask;
11112
11113         if (!fpu_alloc_guest_fpstate(&vcpu->arch.guest_fpu)) {
11114                 pr_err("kvm: failed to allocate vcpu's fpu\n");
11115                 goto free_emulate_ctxt;
11116         }
11117
11118         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
11119         vcpu->arch.reserved_gpa_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu);
11120
11121         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
11122
11123         kvm_async_pf_hash_reset(vcpu);
11124         kvm_pmu_init(vcpu);
11125
11126         vcpu->arch.pending_external_vector = -1;
11127         vcpu->arch.preempted_in_kernel = false;
11128
11129 #if IS_ENABLED(CONFIG_HYPERV)
11130         vcpu->arch.hv_root_tdp = INVALID_PAGE;
11131 #endif
11132
11133         r = static_call(kvm_x86_vcpu_create)(vcpu);
11134         if (r)
11135                 goto free_guest_fpu;
11136
11137         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
11138         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
11139         kvm_vcpu_mtrr_init(vcpu);
11140         vcpu_load(vcpu);
11141         kvm_set_tsc_khz(vcpu, max_tsc_khz);
11142         kvm_vcpu_reset(vcpu, false);
11143         kvm_init_mmu(vcpu);
11144         vcpu_put(vcpu);
11145         return 0;
11146
11147 free_guest_fpu:
11148         fpu_free_guest_fpstate(&vcpu->arch.guest_fpu);
11149 free_emulate_ctxt:
11150         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
11151 free_wbinvd_dirty_mask:
11152         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
11153 fail_free_mce_banks:
11154         kfree(vcpu->arch.mce_banks);
11155 fail_free_pio_data:
11156         free_page((unsigned long)vcpu->arch.pio_data);
11157 fail_free_lapic:
11158         kvm_free_lapic(vcpu);
11159 fail_mmu_destroy:
11160         kvm_mmu_destroy(vcpu);
11161         return r;
11162 }
11163
11164 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
11165 {
11166         struct kvm *kvm = vcpu->kvm;
11167
11168         if (mutex_lock_killable(&vcpu->mutex))
11169                 return;
11170         vcpu_load(vcpu);
11171         kvm_synchronize_tsc(vcpu, 0);
11172         vcpu_put(vcpu);
11173
11174         /* poll control enabled by default */
11175         vcpu->arch.msr_kvm_poll_control = 1;
11176
11177         mutex_unlock(&vcpu->mutex);
11178
11179         if (kvmclock_periodic_sync && vcpu->vcpu_idx == 0)
11180                 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
11181                                                 KVMCLOCK_SYNC_PERIOD);
11182 }
11183
11184 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
11185 {
11186         int idx;
11187
11188         kvmclock_reset(vcpu);
11189
11190         static_call(kvm_x86_vcpu_free)(vcpu);
11191
11192         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
11193         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
11194         fpu_free_guest_fpstate(&vcpu->arch.guest_fpu);
11195
11196         kvm_hv_vcpu_uninit(vcpu);
11197         kvm_pmu_destroy(vcpu);
11198         kfree(vcpu->arch.mce_banks);
11199         kvm_free_lapic(vcpu);
11200         idx = srcu_read_lock(&vcpu->kvm->srcu);
11201         kvm_mmu_destroy(vcpu);
11202         srcu_read_unlock(&vcpu->kvm->srcu, idx);
11203         free_page((unsigned long)vcpu->arch.pio_data);
11204         kvfree(vcpu->arch.cpuid_entries);
11205         if (!lapic_in_kernel(vcpu))
11206                 static_branch_dec(&kvm_has_noapic_vcpu);
11207 }
11208
11209 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
11210 {
11211         struct kvm_cpuid_entry2 *cpuid_0x1;
11212         unsigned long old_cr0 = kvm_read_cr0(vcpu);
11213         unsigned long new_cr0;
11214
11215         /*
11216          * Several of the "set" flows, e.g. ->set_cr0(), read other registers
11217          * to handle side effects.  RESET emulation hits those flows and relies
11218          * on emulated/virtualized registers, including those that are loaded
11219          * into hardware, to be zeroed at vCPU creation.  Use CRs as a sentinel
11220          * to detect improper or missing initialization.
11221          */
11222         WARN_ON_ONCE(!init_event &&
11223                      (old_cr0 || kvm_read_cr3(vcpu) || kvm_read_cr4(vcpu)));
11224
11225         kvm_lapic_reset(vcpu, init_event);
11226
11227         vcpu->arch.hflags = 0;
11228
11229         vcpu->arch.smi_pending = 0;
11230         vcpu->arch.smi_count = 0;
11231         atomic_set(&vcpu->arch.nmi_queued, 0);
11232         vcpu->arch.nmi_pending = 0;
11233         vcpu->arch.nmi_injected = false;
11234         kvm_clear_interrupt_queue(vcpu);
11235         kvm_clear_exception_queue(vcpu);
11236
11237         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
11238         kvm_update_dr0123(vcpu);
11239         vcpu->arch.dr6 = DR6_ACTIVE_LOW;
11240         vcpu->arch.dr7 = DR7_FIXED_1;
11241         kvm_update_dr7(vcpu);
11242
11243         vcpu->arch.cr2 = 0;
11244
11245         kvm_make_request(KVM_REQ_EVENT, vcpu);
11246         vcpu->arch.apf.msr_en_val = 0;
11247         vcpu->arch.apf.msr_int_val = 0;
11248         vcpu->arch.st.msr_val = 0;
11249
11250         kvmclock_reset(vcpu);
11251
11252         kvm_clear_async_pf_completion_queue(vcpu);
11253         kvm_async_pf_hash_reset(vcpu);
11254         vcpu->arch.apf.halted = false;
11255
11256         if (vcpu->arch.guest_fpu.fpstate && kvm_mpx_supported()) {
11257                 struct fpstate *fpstate = vcpu->arch.guest_fpu.fpstate;
11258
11259                 /*
11260                  * To avoid have the INIT path from kvm_apic_has_events() that be
11261                  * called with loaded FPU and does not let userspace fix the state.
11262                  */
11263                 if (init_event)
11264                         kvm_put_guest_fpu(vcpu);
11265
11266                 fpstate_clear_xstate_component(fpstate, XFEATURE_BNDREGS);
11267                 fpstate_clear_xstate_component(fpstate, XFEATURE_BNDCSR);
11268
11269                 if (init_event)
11270                         kvm_load_guest_fpu(vcpu);
11271         }
11272
11273         if (!init_event) {
11274                 kvm_pmu_reset(vcpu);
11275                 vcpu->arch.smbase = 0x30000;
11276
11277                 vcpu->arch.msr_misc_features_enables = 0;
11278
11279                 __kvm_set_xcr(vcpu, 0, XFEATURE_MASK_FP);
11280                 __kvm_set_msr(vcpu, MSR_IA32_XSS, 0, true);
11281         }
11282
11283         /* All GPRs except RDX (handled below) are zeroed on RESET/INIT. */
11284         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
11285         kvm_register_mark_dirty(vcpu, VCPU_REGS_RSP);
11286
11287         /*
11288          * Fall back to KVM's default Family/Model/Stepping of 0x600 (P6/Athlon)
11289          * if no CPUID match is found.  Note, it's impossible to get a match at
11290          * RESET since KVM emulates RESET before exposing the vCPU to userspace,
11291          * i.e. it's impossible for kvm_find_cpuid_entry() to find a valid entry
11292          * on RESET.  But, go through the motions in case that's ever remedied.
11293          */
11294         cpuid_0x1 = kvm_find_cpuid_entry(vcpu, 1, 0);
11295         kvm_rdx_write(vcpu, cpuid_0x1 ? cpuid_0x1->eax : 0x600);
11296
11297         static_call(kvm_x86_vcpu_reset)(vcpu, init_event);
11298
11299         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
11300         kvm_rip_write(vcpu, 0xfff0);
11301
11302         vcpu->arch.cr3 = 0;
11303         kvm_register_mark_dirty(vcpu, VCPU_EXREG_CR3);
11304
11305         /*
11306          * CR0.CD/NW are set on RESET, preserved on INIT.  Note, some versions
11307          * of Intel's SDM list CD/NW as being set on INIT, but they contradict
11308          * (or qualify) that with a footnote stating that CD/NW are preserved.
11309          */
11310         new_cr0 = X86_CR0_ET;
11311         if (init_event)
11312                 new_cr0 |= (old_cr0 & (X86_CR0_NW | X86_CR0_CD));
11313         else
11314                 new_cr0 |= X86_CR0_NW | X86_CR0_CD;
11315
11316         static_call(kvm_x86_set_cr0)(vcpu, new_cr0);
11317         static_call(kvm_x86_set_cr4)(vcpu, 0);
11318         static_call(kvm_x86_set_efer)(vcpu, 0);
11319         static_call(kvm_x86_update_exception_bitmap)(vcpu);
11320
11321         /*
11322          * Reset the MMU context if paging was enabled prior to INIT (which is
11323          * implied if CR0.PG=1 as CR0 will be '0' prior to RESET).  Unlike the
11324          * standard CR0/CR4/EFER modification paths, only CR0.PG needs to be
11325          * checked because it is unconditionally cleared on INIT and all other
11326          * paging related bits are ignored if paging is disabled, i.e. CR0.WP,
11327          * CR4, and EFER changes are all irrelevant if CR0.PG was '0'.
11328          */
11329         if (old_cr0 & X86_CR0_PG)
11330                 kvm_mmu_reset_context(vcpu);
11331
11332         /*
11333          * Intel's SDM states that all TLB entries are flushed on INIT.  AMD's
11334          * APM states the TLBs are untouched by INIT, but it also states that
11335          * the TLBs are flushed on "External initialization of the processor."
11336          * Flush the guest TLB regardless of vendor, there is no meaningful
11337          * benefit in relying on the guest to flush the TLB immediately after
11338          * INIT.  A spurious TLB flush is benign and likely negligible from a
11339          * performance perspective.
11340          */
11341         if (init_event)
11342                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
11343 }
11344 EXPORT_SYMBOL_GPL(kvm_vcpu_reset);
11345
11346 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
11347 {
11348         struct kvm_segment cs;
11349
11350         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
11351         cs.selector = vector << 8;
11352         cs.base = vector << 12;
11353         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
11354         kvm_rip_write(vcpu, 0);
11355 }
11356 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector);
11357
11358 int kvm_arch_hardware_enable(void)
11359 {
11360         struct kvm *kvm;
11361         struct kvm_vcpu *vcpu;
11362         unsigned long i;
11363         int ret;
11364         u64 local_tsc;
11365         u64 max_tsc = 0;
11366         bool stable, backwards_tsc = false;
11367
11368         kvm_user_return_msr_cpu_online();
11369         ret = static_call(kvm_x86_hardware_enable)();
11370         if (ret != 0)
11371                 return ret;
11372
11373         local_tsc = rdtsc();
11374         stable = !kvm_check_tsc_unstable();
11375         list_for_each_entry(kvm, &vm_list, vm_list) {
11376                 kvm_for_each_vcpu(i, vcpu, kvm) {
11377                         if (!stable && vcpu->cpu == smp_processor_id())
11378                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
11379                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
11380                                 backwards_tsc = true;
11381                                 if (vcpu->arch.last_host_tsc > max_tsc)
11382                                         max_tsc = vcpu->arch.last_host_tsc;
11383                         }
11384                 }
11385         }
11386
11387         /*
11388          * Sometimes, even reliable TSCs go backwards.  This happens on
11389          * platforms that reset TSC during suspend or hibernate actions, but
11390          * maintain synchronization.  We must compensate.  Fortunately, we can
11391          * detect that condition here, which happens early in CPU bringup,
11392          * before any KVM threads can be running.  Unfortunately, we can't
11393          * bring the TSCs fully up to date with real time, as we aren't yet far
11394          * enough into CPU bringup that we know how much real time has actually
11395          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
11396          * variables that haven't been updated yet.
11397          *
11398          * So we simply find the maximum observed TSC above, then record the
11399          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
11400          * the adjustment will be applied.  Note that we accumulate
11401          * adjustments, in case multiple suspend cycles happen before some VCPU
11402          * gets a chance to run again.  In the event that no KVM threads get a
11403          * chance to run, we will miss the entire elapsed period, as we'll have
11404          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
11405          * loose cycle time.  This isn't too big a deal, since the loss will be
11406          * uniform across all VCPUs (not to mention the scenario is extremely
11407          * unlikely). It is possible that a second hibernate recovery happens
11408          * much faster than a first, causing the observed TSC here to be
11409          * smaller; this would require additional padding adjustment, which is
11410          * why we set last_host_tsc to the local tsc observed here.
11411          *
11412          * N.B. - this code below runs only on platforms with reliable TSC,
11413          * as that is the only way backwards_tsc is set above.  Also note
11414          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
11415          * have the same delta_cyc adjustment applied if backwards_tsc
11416          * is detected.  Note further, this adjustment is only done once,
11417          * as we reset last_host_tsc on all VCPUs to stop this from being
11418          * called multiple times (one for each physical CPU bringup).
11419          *
11420          * Platforms with unreliable TSCs don't have to deal with this, they
11421          * will be compensated by the logic in vcpu_load, which sets the TSC to
11422          * catchup mode.  This will catchup all VCPUs to real time, but cannot
11423          * guarantee that they stay in perfect synchronization.
11424          */
11425         if (backwards_tsc) {
11426                 u64 delta_cyc = max_tsc - local_tsc;
11427                 list_for_each_entry(kvm, &vm_list, vm_list) {
11428                         kvm->arch.backwards_tsc_observed = true;
11429                         kvm_for_each_vcpu(i, vcpu, kvm) {
11430                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
11431                                 vcpu->arch.last_host_tsc = local_tsc;
11432                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
11433                         }
11434
11435                         /*
11436                          * We have to disable TSC offset matching.. if you were
11437                          * booting a VM while issuing an S4 host suspend....
11438                          * you may have some problem.  Solving this issue is
11439                          * left as an exercise to the reader.
11440                          */
11441                         kvm->arch.last_tsc_nsec = 0;
11442                         kvm->arch.last_tsc_write = 0;
11443                 }
11444
11445         }
11446         return 0;
11447 }
11448
11449 void kvm_arch_hardware_disable(void)
11450 {
11451         static_call(kvm_x86_hardware_disable)();
11452         drop_user_return_notifiers();
11453 }
11454
11455 int kvm_arch_hardware_setup(void *opaque)
11456 {
11457         struct kvm_x86_init_ops *ops = opaque;
11458         int r;
11459
11460         rdmsrl_safe(MSR_EFER, &host_efer);
11461
11462         if (boot_cpu_has(X86_FEATURE_XSAVES))
11463                 rdmsrl(MSR_IA32_XSS, host_xss);
11464
11465         r = ops->hardware_setup();
11466         if (r != 0)
11467                 return r;
11468
11469         memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops));
11470         kvm_ops_static_call_update();
11471
11472         kvm_register_perf_callbacks(ops->handle_intel_pt_intr);
11473
11474         if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
11475                 supported_xss = 0;
11476
11477 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
11478         cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
11479 #undef __kvm_cpu_cap_has
11480
11481         if (kvm_has_tsc_control) {
11482                 /*
11483                  * Make sure the user can only configure tsc_khz values that
11484                  * fit into a signed integer.
11485                  * A min value is not calculated because it will always
11486                  * be 1 on all machines.
11487                  */
11488                 u64 max = min(0x7fffffffULL,
11489                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
11490                 kvm_max_guest_tsc_khz = max;
11491
11492                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
11493         }
11494
11495         kvm_init_msr_list();
11496         return 0;
11497 }
11498
11499 void kvm_arch_hardware_unsetup(void)
11500 {
11501         kvm_unregister_perf_callbacks();
11502
11503         static_call(kvm_x86_hardware_unsetup)();
11504 }
11505
11506 int kvm_arch_check_processor_compat(void *opaque)
11507 {
11508         struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
11509         struct kvm_x86_init_ops *ops = opaque;
11510
11511         WARN_ON(!irqs_disabled());
11512
11513         if (__cr4_reserved_bits(cpu_has, c) !=
11514             __cr4_reserved_bits(cpu_has, &boot_cpu_data))
11515                 return -EIO;
11516
11517         return ops->check_processor_compatibility();
11518 }
11519
11520 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
11521 {
11522         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
11523 }
11524 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
11525
11526 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
11527 {
11528         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
11529 }
11530
11531 __read_mostly DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu);
11532 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu);
11533
11534 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
11535 {
11536         struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
11537
11538         vcpu->arch.l1tf_flush_l1d = true;
11539         if (pmu->version && unlikely(pmu->event_count)) {
11540                 pmu->need_cleanup = true;
11541                 kvm_make_request(KVM_REQ_PMU, vcpu);
11542         }
11543         static_call(kvm_x86_sched_in)(vcpu, cpu);
11544 }
11545
11546 void kvm_arch_free_vm(struct kvm *kvm)
11547 {
11548         kfree(to_kvm_hv(kvm)->hv_pa_pg);
11549         __kvm_arch_free_vm(kvm);
11550 }
11551
11552
11553 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
11554 {
11555         int ret;
11556         unsigned long flags;
11557
11558         if (type)
11559                 return -EINVAL;
11560
11561         ret = kvm_page_track_init(kvm);
11562         if (ret)
11563                 return ret;
11564
11565         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
11566         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
11567         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
11568         INIT_LIST_HEAD(&kvm->arch.lpage_disallowed_mmu_pages);
11569         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
11570         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
11571
11572         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
11573         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
11574         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
11575         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
11576                 &kvm->arch.irq_sources_bitmap);
11577
11578         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
11579         mutex_init(&kvm->arch.apic_map_lock);
11580         seqcount_raw_spinlock_init(&kvm->arch.pvclock_sc, &kvm->arch.tsc_write_lock);
11581         kvm->arch.kvmclock_offset = -get_kvmclock_base_ns();
11582
11583         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
11584         pvclock_update_vm_gtod_copy(kvm);
11585         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
11586
11587         kvm->arch.guest_can_read_msr_platform_info = true;
11588
11589 #if IS_ENABLED(CONFIG_HYPERV)
11590         spin_lock_init(&kvm->arch.hv_root_tdp_lock);
11591         kvm->arch.hv_root_tdp = INVALID_PAGE;
11592 #endif
11593
11594         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
11595         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
11596
11597         kvm_apicv_init(kvm);
11598         kvm_hv_init_vm(kvm);
11599         kvm_mmu_init_vm(kvm);
11600         kvm_xen_init_vm(kvm);
11601
11602         return static_call(kvm_x86_vm_init)(kvm);
11603 }
11604
11605 int kvm_arch_post_init_vm(struct kvm *kvm)
11606 {
11607         return kvm_mmu_post_init_vm(kvm);
11608 }
11609
11610 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
11611 {
11612         vcpu_load(vcpu);
11613         kvm_mmu_unload(vcpu);
11614         vcpu_put(vcpu);
11615 }
11616
11617 static void kvm_free_vcpus(struct kvm *kvm)
11618 {
11619         unsigned long i;
11620         struct kvm_vcpu *vcpu;
11621
11622         /*
11623          * Unpin any mmu pages first.
11624          */
11625         kvm_for_each_vcpu(i, vcpu, kvm) {
11626                 kvm_clear_async_pf_completion_queue(vcpu);
11627                 kvm_unload_vcpu_mmu(vcpu);
11628         }
11629
11630         kvm_destroy_vcpus(kvm);
11631 }
11632
11633 void kvm_arch_sync_events(struct kvm *kvm)
11634 {
11635         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
11636         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
11637         kvm_free_pit(kvm);
11638 }
11639
11640 /**
11641  * __x86_set_memory_region: Setup KVM internal memory slot
11642  *
11643  * @kvm: the kvm pointer to the VM.
11644  * @id: the slot ID to setup.
11645  * @gpa: the GPA to install the slot (unused when @size == 0).
11646  * @size: the size of the slot. Set to zero to uninstall a slot.
11647  *
11648  * This function helps to setup a KVM internal memory slot.  Specify
11649  * @size > 0 to install a new slot, while @size == 0 to uninstall a
11650  * slot.  The return code can be one of the following:
11651  *
11652  *   HVA:           on success (uninstall will return a bogus HVA)
11653  *   -errno:        on error
11654  *
11655  * The caller should always use IS_ERR() to check the return value
11656  * before use.  Note, the KVM internal memory slots are guaranteed to
11657  * remain valid and unchanged until the VM is destroyed, i.e., the
11658  * GPA->HVA translation will not change.  However, the HVA is a user
11659  * address, i.e. its accessibility is not guaranteed, and must be
11660  * accessed via __copy_{to,from}_user().
11661  */
11662 void __user * __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
11663                                       u32 size)
11664 {
11665         int i, r;
11666         unsigned long hva, old_npages;
11667         struct kvm_memslots *slots = kvm_memslots(kvm);
11668         struct kvm_memory_slot *slot;
11669
11670         /* Called with kvm->slots_lock held.  */
11671         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
11672                 return ERR_PTR_USR(-EINVAL);
11673
11674         slot = id_to_memslot(slots, id);
11675         if (size) {
11676                 if (slot && slot->npages)
11677                         return ERR_PTR_USR(-EEXIST);
11678
11679                 /*
11680                  * MAP_SHARED to prevent internal slot pages from being moved
11681                  * by fork()/COW.
11682                  */
11683                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
11684                               MAP_SHARED | MAP_ANONYMOUS, 0);
11685                 if (IS_ERR((void *)hva))
11686                         return (void __user *)hva;
11687         } else {
11688                 if (!slot || !slot->npages)
11689                         return NULL;
11690
11691                 old_npages = slot->npages;
11692                 hva = slot->userspace_addr;
11693         }
11694
11695         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
11696                 struct kvm_userspace_memory_region m;
11697
11698                 m.slot = id | (i << 16);
11699                 m.flags = 0;
11700                 m.guest_phys_addr = gpa;
11701                 m.userspace_addr = hva;
11702                 m.memory_size = size;
11703                 r = __kvm_set_memory_region(kvm, &m);
11704                 if (r < 0)
11705                         return ERR_PTR_USR(r);
11706         }
11707
11708         if (!size)
11709                 vm_munmap(hva, old_npages * PAGE_SIZE);
11710
11711         return (void __user *)hva;
11712 }
11713 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
11714
11715 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
11716 {
11717         kvm_mmu_pre_destroy_vm(kvm);
11718 }
11719
11720 void kvm_arch_destroy_vm(struct kvm *kvm)
11721 {
11722         if (current->mm == kvm->mm) {
11723                 /*
11724                  * Free memory regions allocated on behalf of userspace,
11725                  * unless the the memory map has changed due to process exit
11726                  * or fd copying.
11727                  */
11728                 mutex_lock(&kvm->slots_lock);
11729                 __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
11730                                         0, 0);
11731                 __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
11732                                         0, 0);
11733                 __x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
11734                 mutex_unlock(&kvm->slots_lock);
11735         }
11736         static_call_cond(kvm_x86_vm_destroy)(kvm);
11737         kvm_free_msr_filter(srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1));
11738         kvm_pic_destroy(kvm);
11739         kvm_ioapic_destroy(kvm);
11740         kvm_free_vcpus(kvm);
11741         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
11742         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
11743         kvm_mmu_uninit_vm(kvm);
11744         kvm_page_track_cleanup(kvm);
11745         kvm_xen_destroy_vm(kvm);
11746         kvm_hv_destroy_vm(kvm);
11747 }
11748
11749 static void memslot_rmap_free(struct kvm_memory_slot *slot)
11750 {
11751         int i;
11752
11753         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11754                 kvfree(slot->arch.rmap[i]);
11755                 slot->arch.rmap[i] = NULL;
11756         }
11757 }
11758
11759 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
11760 {
11761         int i;
11762
11763         memslot_rmap_free(slot);
11764
11765         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11766                 kvfree(slot->arch.lpage_info[i - 1]);
11767                 slot->arch.lpage_info[i - 1] = NULL;
11768         }
11769
11770         kvm_page_track_free_memslot(slot);
11771 }
11772
11773 int memslot_rmap_alloc(struct kvm_memory_slot *slot, unsigned long npages)
11774 {
11775         const int sz = sizeof(*slot->arch.rmap[0]);
11776         int i;
11777
11778         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11779                 int level = i + 1;
11780                 int lpages = __kvm_mmu_slot_lpages(slot, npages, level);
11781
11782                 if (slot->arch.rmap[i])
11783                         continue;
11784
11785                 slot->arch.rmap[i] = kvcalloc(lpages, sz, GFP_KERNEL_ACCOUNT);
11786                 if (!slot->arch.rmap[i]) {
11787                         memslot_rmap_free(slot);
11788                         return -ENOMEM;
11789                 }
11790         }
11791
11792         return 0;
11793 }
11794
11795 static int kvm_alloc_memslot_metadata(struct kvm *kvm,
11796                                       struct kvm_memory_slot *slot)
11797 {
11798         unsigned long npages = slot->npages;
11799         int i, r;
11800
11801         /*
11802          * Clear out the previous array pointers for the KVM_MR_MOVE case.  The
11803          * old arrays will be freed by __kvm_set_memory_region() if installing
11804          * the new memslot is successful.
11805          */
11806         memset(&slot->arch, 0, sizeof(slot->arch));
11807
11808         if (kvm_memslots_have_rmaps(kvm)) {
11809                 r = memslot_rmap_alloc(slot, npages);
11810                 if (r)
11811                         return r;
11812         }
11813
11814         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11815                 struct kvm_lpage_info *linfo;
11816                 unsigned long ugfn;
11817                 int lpages;
11818                 int level = i + 1;
11819
11820                 lpages = __kvm_mmu_slot_lpages(slot, npages, level);
11821
11822                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
11823                 if (!linfo)
11824                         goto out_free;
11825
11826                 slot->arch.lpage_info[i - 1] = linfo;
11827
11828                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
11829                         linfo[0].disallow_lpage = 1;
11830                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
11831                         linfo[lpages - 1].disallow_lpage = 1;
11832                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
11833                 /*
11834                  * If the gfn and userspace address are not aligned wrt each
11835                  * other, disable large page support for this slot.
11836                  */
11837                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1)) {
11838                         unsigned long j;
11839
11840                         for (j = 0; j < lpages; ++j)
11841                                 linfo[j].disallow_lpage = 1;
11842                 }
11843         }
11844
11845         if (kvm_page_track_create_memslot(kvm, slot, npages))
11846                 goto out_free;
11847
11848         return 0;
11849
11850 out_free:
11851         memslot_rmap_free(slot);
11852
11853         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11854                 kvfree(slot->arch.lpage_info[i - 1]);
11855                 slot->arch.lpage_info[i - 1] = NULL;
11856         }
11857         return -ENOMEM;
11858 }
11859
11860 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
11861 {
11862         struct kvm_vcpu *vcpu;
11863         unsigned long i;
11864
11865         /*
11866          * memslots->generation has been incremented.
11867          * mmio generation may have reached its maximum value.
11868          */
11869         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
11870
11871         /* Force re-initialization of steal_time cache */
11872         kvm_for_each_vcpu(i, vcpu, kvm)
11873                 kvm_vcpu_kick(vcpu);
11874 }
11875
11876 int kvm_arch_prepare_memory_region(struct kvm *kvm,
11877                                    const struct kvm_memory_slot *old,
11878                                    struct kvm_memory_slot *new,
11879                                    enum kvm_mr_change change)
11880 {
11881         if (change == KVM_MR_CREATE || change == KVM_MR_MOVE)
11882                 return kvm_alloc_memslot_metadata(kvm, new);
11883
11884         if (change == KVM_MR_FLAGS_ONLY)
11885                 memcpy(&new->arch, &old->arch, sizeof(old->arch));
11886         else if (WARN_ON_ONCE(change != KVM_MR_DELETE))
11887                 return -EIO;
11888
11889         return 0;
11890 }
11891
11892
11893 static void kvm_mmu_update_cpu_dirty_logging(struct kvm *kvm, bool enable)
11894 {
11895         struct kvm_arch *ka = &kvm->arch;
11896
11897         if (!kvm_x86_ops.cpu_dirty_log_size)
11898                 return;
11899
11900         if ((enable && ++ka->cpu_dirty_logging_count == 1) ||
11901             (!enable && --ka->cpu_dirty_logging_count == 0))
11902                 kvm_make_all_cpus_request(kvm, KVM_REQ_UPDATE_CPU_DIRTY_LOGGING);
11903
11904         WARN_ON_ONCE(ka->cpu_dirty_logging_count < 0);
11905 }
11906
11907 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
11908                                      struct kvm_memory_slot *old,
11909                                      const struct kvm_memory_slot *new,
11910                                      enum kvm_mr_change change)
11911 {
11912         u32 old_flags = old ? old->flags : 0;
11913         u32 new_flags = new ? new->flags : 0;
11914         bool log_dirty_pages = new_flags & KVM_MEM_LOG_DIRTY_PAGES;
11915
11916         /*
11917          * Update CPU dirty logging if dirty logging is being toggled.  This
11918          * applies to all operations.
11919          */
11920         if ((old_flags ^ new_flags) & KVM_MEM_LOG_DIRTY_PAGES)
11921                 kvm_mmu_update_cpu_dirty_logging(kvm, log_dirty_pages);
11922
11923         /*
11924          * Nothing more to do for RO slots (which can't be dirtied and can't be
11925          * made writable) or CREATE/MOVE/DELETE of a slot.
11926          *
11927          * For a memslot with dirty logging disabled:
11928          * CREATE:      No dirty mappings will already exist.
11929          * MOVE/DELETE: The old mappings will already have been cleaned up by
11930          *              kvm_arch_flush_shadow_memslot()
11931          *
11932          * For a memslot with dirty logging enabled:
11933          * CREATE:      No shadow pages exist, thus nothing to write-protect
11934          *              and no dirty bits to clear.
11935          * MOVE/DELETE: The old mappings will already have been cleaned up by
11936          *              kvm_arch_flush_shadow_memslot().
11937          */
11938         if ((change != KVM_MR_FLAGS_ONLY) || (new_flags & KVM_MEM_READONLY))
11939                 return;
11940
11941         /*
11942          * READONLY and non-flags changes were filtered out above, and the only
11943          * other flag is LOG_DIRTY_PAGES, i.e. something is wrong if dirty
11944          * logging isn't being toggled on or off.
11945          */
11946         if (WARN_ON_ONCE(!((old_flags ^ new_flags) & KVM_MEM_LOG_DIRTY_PAGES)))
11947                 return;
11948
11949         if (!log_dirty_pages) {
11950                 /*
11951                  * Dirty logging tracks sptes in 4k granularity, meaning that
11952                  * large sptes have to be split.  If live migration succeeds,
11953                  * the guest in the source machine will be destroyed and large
11954                  * sptes will be created in the destination.  However, if the
11955                  * guest continues to run in the source machine (for example if
11956                  * live migration fails), small sptes will remain around and
11957                  * cause bad performance.
11958                  *
11959                  * Scan sptes if dirty logging has been stopped, dropping those
11960                  * which can be collapsed into a single large-page spte.  Later
11961                  * page faults will create the large-page sptes.
11962                  */
11963                 kvm_mmu_zap_collapsible_sptes(kvm, new);
11964         } else {
11965                 /*
11966                  * Initially-all-set does not require write protecting any page,
11967                  * because they're all assumed to be dirty.
11968                  */
11969                 if (kvm_dirty_log_manual_protect_and_init_set(kvm))
11970                         return;
11971
11972                 if (READ_ONCE(eager_page_split))
11973                         kvm_mmu_slot_try_split_huge_pages(kvm, new, PG_LEVEL_4K);
11974
11975                 if (kvm_x86_ops.cpu_dirty_log_size) {
11976                         kvm_mmu_slot_leaf_clear_dirty(kvm, new);
11977                         kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_2M);
11978                 } else {
11979                         kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_4K);
11980                 }
11981         }
11982 }
11983
11984 void kvm_arch_commit_memory_region(struct kvm *kvm,
11985                                 struct kvm_memory_slot *old,
11986                                 const struct kvm_memory_slot *new,
11987                                 enum kvm_mr_change change)
11988 {
11989         if (!kvm->arch.n_requested_mmu_pages &&
11990             (change == KVM_MR_CREATE || change == KVM_MR_DELETE)) {
11991                 unsigned long nr_mmu_pages;
11992
11993                 nr_mmu_pages = kvm->nr_memslot_pages / KVM_MEMSLOT_PAGES_TO_MMU_PAGES_RATIO;
11994                 nr_mmu_pages = max(nr_mmu_pages, KVM_MIN_ALLOC_MMU_PAGES);
11995                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
11996         }
11997
11998         kvm_mmu_slot_apply_flags(kvm, old, new, change);
11999
12000         /* Free the arrays associated with the old memslot. */
12001         if (change == KVM_MR_MOVE)
12002                 kvm_arch_free_memslot(kvm, old);
12003 }
12004
12005 void kvm_arch_flush_shadow_all(struct kvm *kvm)
12006 {
12007         kvm_mmu_zap_all(kvm);
12008 }
12009
12010 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
12011                                    struct kvm_memory_slot *slot)
12012 {
12013         kvm_page_track_flush_slot(kvm, slot);
12014 }
12015
12016 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
12017 {
12018         return (is_guest_mode(vcpu) &&
12019                         kvm_x86_ops.guest_apic_has_interrupt &&
12020                         static_call(kvm_x86_guest_apic_has_interrupt)(vcpu));
12021 }
12022
12023 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
12024 {
12025         if (!list_empty_careful(&vcpu->async_pf.done))
12026                 return true;
12027
12028         if (kvm_apic_has_events(vcpu))
12029                 return true;
12030
12031         if (vcpu->arch.pv.pv_unhalted)
12032                 return true;
12033
12034         if (vcpu->arch.exception.pending)
12035                 return true;
12036
12037         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
12038             (vcpu->arch.nmi_pending &&
12039              static_call(kvm_x86_nmi_allowed)(vcpu, false)))
12040                 return true;
12041
12042         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
12043             (vcpu->arch.smi_pending &&
12044              static_call(kvm_x86_smi_allowed)(vcpu, false)))
12045                 return true;
12046
12047         if (kvm_arch_interrupt_allowed(vcpu) &&
12048             (kvm_cpu_has_interrupt(vcpu) ||
12049             kvm_guest_apic_has_interrupt(vcpu)))
12050                 return true;
12051
12052         if (kvm_hv_has_stimer_pending(vcpu))
12053                 return true;
12054
12055         if (is_guest_mode(vcpu) &&
12056             kvm_x86_ops.nested_ops->hv_timer_pending &&
12057             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
12058                 return true;
12059
12060         return false;
12061 }
12062
12063 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
12064 {
12065         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
12066 }
12067
12068 bool kvm_arch_dy_has_pending_interrupt(struct kvm_vcpu *vcpu)
12069 {
12070         if (vcpu->arch.apicv_active && static_call(kvm_x86_dy_apicv_has_pending_interrupt)(vcpu))
12071                 return true;
12072
12073         return false;
12074 }
12075
12076 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
12077 {
12078         if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
12079                 return true;
12080
12081         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
12082                 kvm_test_request(KVM_REQ_SMI, vcpu) ||
12083                  kvm_test_request(KVM_REQ_EVENT, vcpu))
12084                 return true;
12085
12086         return kvm_arch_dy_has_pending_interrupt(vcpu);
12087 }
12088
12089 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
12090 {
12091         if (vcpu->arch.guest_state_protected)
12092                 return true;
12093
12094         return vcpu->arch.preempted_in_kernel;
12095 }
12096
12097 unsigned long kvm_arch_vcpu_get_ip(struct kvm_vcpu *vcpu)
12098 {
12099         return kvm_rip_read(vcpu);
12100 }
12101
12102 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
12103 {
12104         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
12105 }
12106
12107 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
12108 {
12109         return static_call(kvm_x86_interrupt_allowed)(vcpu, false);
12110 }
12111
12112 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
12113 {
12114         /* Can't read the RIP when guest state is protected, just return 0 */
12115         if (vcpu->arch.guest_state_protected)
12116                 return 0;
12117
12118         if (is_64_bit_mode(vcpu))
12119                 return kvm_rip_read(vcpu);
12120         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
12121                      kvm_rip_read(vcpu));
12122 }
12123 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
12124
12125 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
12126 {
12127         return kvm_get_linear_rip(vcpu) == linear_rip;
12128 }
12129 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
12130
12131 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
12132 {
12133         unsigned long rflags;
12134
12135         rflags = static_call(kvm_x86_get_rflags)(vcpu);
12136         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
12137                 rflags &= ~X86_EFLAGS_TF;
12138         return rflags;
12139 }
12140 EXPORT_SYMBOL_GPL(kvm_get_rflags);
12141
12142 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
12143 {
12144         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
12145             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
12146                 rflags |= X86_EFLAGS_TF;
12147         static_call(kvm_x86_set_rflags)(vcpu, rflags);
12148 }
12149
12150 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
12151 {
12152         __kvm_set_rflags(vcpu, rflags);
12153         kvm_make_request(KVM_REQ_EVENT, vcpu);
12154 }
12155 EXPORT_SYMBOL_GPL(kvm_set_rflags);
12156
12157 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
12158 {
12159         int r;
12160
12161         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
12162               work->wakeup_all)
12163                 return;
12164
12165         r = kvm_mmu_reload(vcpu);
12166         if (unlikely(r))
12167                 return;
12168
12169         if (!vcpu->arch.mmu->direct_map &&
12170               work->arch.cr3 != vcpu->arch.mmu->get_guest_pgd(vcpu))
12171                 return;
12172
12173         kvm_mmu_do_page_fault(vcpu, work->cr2_or_gpa, 0, true);
12174 }
12175
12176 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
12177 {
12178         BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU));
12179
12180         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
12181 }
12182
12183 static inline u32 kvm_async_pf_next_probe(u32 key)
12184 {
12185         return (key + 1) & (ASYNC_PF_PER_VCPU - 1);
12186 }
12187
12188 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12189 {
12190         u32 key = kvm_async_pf_hash_fn(gfn);
12191
12192         while (vcpu->arch.apf.gfns[key] != ~0)
12193                 key = kvm_async_pf_next_probe(key);
12194
12195         vcpu->arch.apf.gfns[key] = gfn;
12196 }
12197
12198 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
12199 {
12200         int i;
12201         u32 key = kvm_async_pf_hash_fn(gfn);
12202
12203         for (i = 0; i < ASYNC_PF_PER_VCPU &&
12204                      (vcpu->arch.apf.gfns[key] != gfn &&
12205                       vcpu->arch.apf.gfns[key] != ~0); i++)
12206                 key = kvm_async_pf_next_probe(key);
12207
12208         return key;
12209 }
12210
12211 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12212 {
12213         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
12214 }
12215
12216 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12217 {
12218         u32 i, j, k;
12219
12220         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
12221
12222         if (WARN_ON_ONCE(vcpu->arch.apf.gfns[i] != gfn))
12223                 return;
12224
12225         while (true) {
12226                 vcpu->arch.apf.gfns[i] = ~0;
12227                 do {
12228                         j = kvm_async_pf_next_probe(j);
12229                         if (vcpu->arch.apf.gfns[j] == ~0)
12230                                 return;
12231                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
12232                         /*
12233                          * k lies cyclically in ]i,j]
12234                          * |    i.k.j |
12235                          * |....j i.k.| or  |.k..j i...|
12236                          */
12237                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
12238                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
12239                 i = j;
12240         }
12241 }
12242
12243 static inline int apf_put_user_notpresent(struct kvm_vcpu *vcpu)
12244 {
12245         u32 reason = KVM_PV_REASON_PAGE_NOT_PRESENT;
12246
12247         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &reason,
12248                                       sizeof(reason));
12249 }
12250
12251 static inline int apf_put_user_ready(struct kvm_vcpu *vcpu, u32 token)
12252 {
12253         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
12254
12255         return kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
12256                                              &token, offset, sizeof(token));
12257 }
12258
12259 static inline bool apf_pageready_slot_free(struct kvm_vcpu *vcpu)
12260 {
12261         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
12262         u32 val;
12263
12264         if (kvm_read_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
12265                                          &val, offset, sizeof(val)))
12266                 return false;
12267
12268         return !val;
12269 }
12270
12271 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
12272 {
12273         if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
12274                 return false;
12275
12276         if (!kvm_pv_async_pf_enabled(vcpu) ||
12277             (vcpu->arch.apf.send_user_only && static_call(kvm_x86_get_cpl)(vcpu) == 0))
12278                 return false;
12279
12280         return true;
12281 }
12282
12283 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
12284 {
12285         if (unlikely(!lapic_in_kernel(vcpu) ||
12286                      kvm_event_needs_reinjection(vcpu) ||
12287                      vcpu->arch.exception.pending))
12288                 return false;
12289
12290         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
12291                 return false;
12292
12293         /*
12294          * If interrupts are off we cannot even use an artificial
12295          * halt state.
12296          */
12297         return kvm_arch_interrupt_allowed(vcpu);
12298 }
12299
12300 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
12301                                      struct kvm_async_pf *work)
12302 {
12303         struct x86_exception fault;
12304
12305         trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
12306         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
12307
12308         if (kvm_can_deliver_async_pf(vcpu) &&
12309             !apf_put_user_notpresent(vcpu)) {
12310                 fault.vector = PF_VECTOR;
12311                 fault.error_code_valid = true;
12312                 fault.error_code = 0;
12313                 fault.nested_page_fault = false;
12314                 fault.address = work->arch.token;
12315                 fault.async_page_fault = true;
12316                 kvm_inject_page_fault(vcpu, &fault);
12317                 return true;
12318         } else {
12319                 /*
12320                  * It is not possible to deliver a paravirtualized asynchronous
12321                  * page fault, but putting the guest in an artificial halt state
12322                  * can be beneficial nevertheless: if an interrupt arrives, we
12323                  * can deliver it timely and perhaps the guest will schedule
12324                  * another process.  When the instruction that triggered a page
12325                  * fault is retried, hopefully the page will be ready in the host.
12326                  */
12327                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
12328                 return false;
12329         }
12330 }
12331
12332 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
12333                                  struct kvm_async_pf *work)
12334 {
12335         struct kvm_lapic_irq irq = {
12336                 .delivery_mode = APIC_DM_FIXED,
12337                 .vector = vcpu->arch.apf.vec
12338         };
12339
12340         if (work->wakeup_all)
12341                 work->arch.token = ~0; /* broadcast wakeup */
12342         else
12343                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
12344         trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
12345
12346         if ((work->wakeup_all || work->notpresent_injected) &&
12347             kvm_pv_async_pf_enabled(vcpu) &&
12348             !apf_put_user_ready(vcpu, work->arch.token)) {
12349                 vcpu->arch.apf.pageready_pending = true;
12350                 kvm_apic_set_irq(vcpu, &irq, NULL);
12351         }
12352
12353         vcpu->arch.apf.halted = false;
12354         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
12355 }
12356
12357 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu)
12358 {
12359         kvm_make_request(KVM_REQ_APF_READY, vcpu);
12360         if (!vcpu->arch.apf.pageready_pending)
12361                 kvm_vcpu_kick(vcpu);
12362 }
12363
12364 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu)
12365 {
12366         if (!kvm_pv_async_pf_enabled(vcpu))
12367                 return true;
12368         else
12369                 return kvm_lapic_enabled(vcpu) && apf_pageready_slot_free(vcpu);
12370 }
12371
12372 void kvm_arch_start_assignment(struct kvm *kvm)
12373 {
12374         if (atomic_inc_return(&kvm->arch.assigned_device_count) == 1)
12375                 static_call_cond(kvm_x86_pi_start_assignment)(kvm);
12376 }
12377 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
12378
12379 void kvm_arch_end_assignment(struct kvm *kvm)
12380 {
12381         atomic_dec(&kvm->arch.assigned_device_count);
12382 }
12383 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
12384
12385 bool kvm_arch_has_assigned_device(struct kvm *kvm)
12386 {
12387         return atomic_read(&kvm->arch.assigned_device_count);
12388 }
12389 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
12390
12391 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
12392 {
12393         atomic_inc(&kvm->arch.noncoherent_dma_count);
12394 }
12395 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
12396
12397 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
12398 {
12399         atomic_dec(&kvm->arch.noncoherent_dma_count);
12400 }
12401 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
12402
12403 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
12404 {
12405         return atomic_read(&kvm->arch.noncoherent_dma_count);
12406 }
12407 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
12408
12409 bool kvm_arch_has_irq_bypass(void)
12410 {
12411         return true;
12412 }
12413
12414 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
12415                                       struct irq_bypass_producer *prod)
12416 {
12417         struct kvm_kernel_irqfd *irqfd =
12418                 container_of(cons, struct kvm_kernel_irqfd, consumer);
12419         int ret;
12420
12421         irqfd->producer = prod;
12422         kvm_arch_start_assignment(irqfd->kvm);
12423         ret = static_call(kvm_x86_pi_update_irte)(irqfd->kvm,
12424                                          prod->irq, irqfd->gsi, 1);
12425
12426         if (ret)
12427                 kvm_arch_end_assignment(irqfd->kvm);
12428
12429         return ret;
12430 }
12431
12432 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
12433                                       struct irq_bypass_producer *prod)
12434 {
12435         int ret;
12436         struct kvm_kernel_irqfd *irqfd =
12437                 container_of(cons, struct kvm_kernel_irqfd, consumer);
12438
12439         WARN_ON(irqfd->producer != prod);
12440         irqfd->producer = NULL;
12441
12442         /*
12443          * When producer of consumer is unregistered, we change back to
12444          * remapped mode, so we can re-use the current implementation
12445          * when the irq is masked/disabled or the consumer side (KVM
12446          * int this case doesn't want to receive the interrupts.
12447         */
12448         ret = static_call(kvm_x86_pi_update_irte)(irqfd->kvm, prod->irq, irqfd->gsi, 0);
12449         if (ret)
12450                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
12451                        " fails: %d\n", irqfd->consumer.token, ret);
12452
12453         kvm_arch_end_assignment(irqfd->kvm);
12454 }
12455
12456 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
12457                                    uint32_t guest_irq, bool set)
12458 {
12459         return static_call(kvm_x86_pi_update_irte)(kvm, host_irq, guest_irq, set);
12460 }
12461
12462 bool kvm_arch_irqfd_route_changed(struct kvm_kernel_irq_routing_entry *old,
12463                                   struct kvm_kernel_irq_routing_entry *new)
12464 {
12465         if (new->type != KVM_IRQ_ROUTING_MSI)
12466                 return true;
12467
12468         return !!memcmp(&old->msi, &new->msi, sizeof(new->msi));
12469 }
12470
12471 bool kvm_vector_hashing_enabled(void)
12472 {
12473         return vector_hashing;
12474 }
12475
12476 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
12477 {
12478         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
12479 }
12480 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
12481
12482
12483 int kvm_spec_ctrl_test_value(u64 value)
12484 {
12485         /*
12486          * test that setting IA32_SPEC_CTRL to given value
12487          * is allowed by the host processor
12488          */
12489
12490         u64 saved_value;
12491         unsigned long flags;
12492         int ret = 0;
12493
12494         local_irq_save(flags);
12495
12496         if (rdmsrl_safe(MSR_IA32_SPEC_CTRL, &saved_value))
12497                 ret = 1;
12498         else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value))
12499                 ret = 1;
12500         else
12501                 wrmsrl(MSR_IA32_SPEC_CTRL, saved_value);
12502
12503         local_irq_restore(flags);
12504
12505         return ret;
12506 }
12507 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value);
12508
12509 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code)
12510 {
12511         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
12512         struct x86_exception fault;
12513         u32 access = error_code &
12514                 (PFERR_WRITE_MASK | PFERR_FETCH_MASK | PFERR_USER_MASK);
12515
12516         if (!(error_code & PFERR_PRESENT_MASK) ||
12517             mmu->gva_to_gpa(vcpu, mmu, gva, access, &fault) != UNMAPPED_GVA) {
12518                 /*
12519                  * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
12520                  * tables probably do not match the TLB.  Just proceed
12521                  * with the error code that the processor gave.
12522                  */
12523                 fault.vector = PF_VECTOR;
12524                 fault.error_code_valid = true;
12525                 fault.error_code = error_code;
12526                 fault.nested_page_fault = false;
12527                 fault.address = gva;
12528         }
12529         vcpu->arch.walk_mmu->inject_page_fault(vcpu, &fault);
12530 }
12531 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error);
12532
12533 /*
12534  * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
12535  * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
12536  * indicates whether exit to userspace is needed.
12537  */
12538 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
12539                               struct x86_exception *e)
12540 {
12541         if (r == X86EMUL_PROPAGATE_FAULT) {
12542                 kvm_inject_emulated_page_fault(vcpu, e);
12543                 return 1;
12544         }
12545
12546         /*
12547          * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
12548          * while handling a VMX instruction KVM could've handled the request
12549          * correctly by exiting to userspace and performing I/O but there
12550          * doesn't seem to be a real use-case behind such requests, just return
12551          * KVM_EXIT_INTERNAL_ERROR for now.
12552          */
12553         kvm_prepare_emulation_failure_exit(vcpu);
12554
12555         return 0;
12556 }
12557 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure);
12558
12559 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva)
12560 {
12561         bool pcid_enabled;
12562         struct x86_exception e;
12563         struct {
12564                 u64 pcid;
12565                 u64 gla;
12566         } operand;
12567         int r;
12568
12569         r = kvm_read_guest_virt(vcpu, gva, &operand, sizeof(operand), &e);
12570         if (r != X86EMUL_CONTINUE)
12571                 return kvm_handle_memory_failure(vcpu, r, &e);
12572
12573         if (operand.pcid >> 12 != 0) {
12574                 kvm_inject_gp(vcpu, 0);
12575                 return 1;
12576         }
12577
12578         pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
12579
12580         switch (type) {
12581         case INVPCID_TYPE_INDIV_ADDR:
12582                 if ((!pcid_enabled && (operand.pcid != 0)) ||
12583                     is_noncanonical_address(operand.gla, vcpu)) {
12584                         kvm_inject_gp(vcpu, 0);
12585                         return 1;
12586                 }
12587                 kvm_mmu_invpcid_gva(vcpu, operand.gla, operand.pcid);
12588                 return kvm_skip_emulated_instruction(vcpu);
12589
12590         case INVPCID_TYPE_SINGLE_CTXT:
12591                 if (!pcid_enabled && (operand.pcid != 0)) {
12592                         kvm_inject_gp(vcpu, 0);
12593                         return 1;
12594                 }
12595
12596                 kvm_invalidate_pcid(vcpu, operand.pcid);
12597                 return kvm_skip_emulated_instruction(vcpu);
12598
12599         case INVPCID_TYPE_ALL_NON_GLOBAL:
12600                 /*
12601                  * Currently, KVM doesn't mark global entries in the shadow
12602                  * page tables, so a non-global flush just degenerates to a
12603                  * global flush. If needed, we could optimize this later by
12604                  * keeping track of global entries in shadow page tables.
12605                  */
12606
12607                 fallthrough;
12608         case INVPCID_TYPE_ALL_INCL_GLOBAL:
12609                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
12610                 return kvm_skip_emulated_instruction(vcpu);
12611
12612         default:
12613                 kvm_inject_gp(vcpu, 0);
12614                 return 1;
12615         }
12616 }
12617 EXPORT_SYMBOL_GPL(kvm_handle_invpcid);
12618
12619 static int complete_sev_es_emulated_mmio(struct kvm_vcpu *vcpu)
12620 {
12621         struct kvm_run *run = vcpu->run;
12622         struct kvm_mmio_fragment *frag;
12623         unsigned int len;
12624
12625         BUG_ON(!vcpu->mmio_needed);
12626
12627         /* Complete previous fragment */
12628         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
12629         len = min(8u, frag->len);
12630         if (!vcpu->mmio_is_write)
12631                 memcpy(frag->data, run->mmio.data, len);
12632
12633         if (frag->len <= 8) {
12634                 /* Switch to the next fragment. */
12635                 frag++;
12636                 vcpu->mmio_cur_fragment++;
12637         } else {
12638                 /* Go forward to the next mmio piece. */
12639                 frag->data += len;
12640                 frag->gpa += len;
12641                 frag->len -= len;
12642         }
12643
12644         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
12645                 vcpu->mmio_needed = 0;
12646
12647                 // VMG change, at this point, we're always done
12648                 // RIP has already been advanced
12649                 return 1;
12650         }
12651
12652         // More MMIO is needed
12653         run->mmio.phys_addr = frag->gpa;
12654         run->mmio.len = min(8u, frag->len);
12655         run->mmio.is_write = vcpu->mmio_is_write;
12656         if (run->mmio.is_write)
12657                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
12658         run->exit_reason = KVM_EXIT_MMIO;
12659
12660         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12661
12662         return 0;
12663 }
12664
12665 int kvm_sev_es_mmio_write(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12666                           void *data)
12667 {
12668         int handled;
12669         struct kvm_mmio_fragment *frag;
12670
12671         if (!data)
12672                 return -EINVAL;
12673
12674         handled = write_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12675         if (handled == bytes)
12676                 return 1;
12677
12678         bytes -= handled;
12679         gpa += handled;
12680         data += handled;
12681
12682         /*TODO: Check if need to increment number of frags */
12683         frag = vcpu->mmio_fragments;
12684         vcpu->mmio_nr_fragments = 1;
12685         frag->len = bytes;
12686         frag->gpa = gpa;
12687         frag->data = data;
12688
12689         vcpu->mmio_needed = 1;
12690         vcpu->mmio_cur_fragment = 0;
12691
12692         vcpu->run->mmio.phys_addr = gpa;
12693         vcpu->run->mmio.len = min(8u, frag->len);
12694         vcpu->run->mmio.is_write = 1;
12695         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
12696         vcpu->run->exit_reason = KVM_EXIT_MMIO;
12697
12698         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12699
12700         return 0;
12701 }
12702 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write);
12703
12704 int kvm_sev_es_mmio_read(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12705                          void *data)
12706 {
12707         int handled;
12708         struct kvm_mmio_fragment *frag;
12709
12710         if (!data)
12711                 return -EINVAL;
12712
12713         handled = read_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12714         if (handled == bytes)
12715                 return 1;
12716
12717         bytes -= handled;
12718         gpa += handled;
12719         data += handled;
12720
12721         /*TODO: Check if need to increment number of frags */
12722         frag = vcpu->mmio_fragments;
12723         vcpu->mmio_nr_fragments = 1;
12724         frag->len = bytes;
12725         frag->gpa = gpa;
12726         frag->data = data;
12727
12728         vcpu->mmio_needed = 1;
12729         vcpu->mmio_cur_fragment = 0;
12730
12731         vcpu->run->mmio.phys_addr = gpa;
12732         vcpu->run->mmio.len = min(8u, frag->len);
12733         vcpu->run->mmio.is_write = 0;
12734         vcpu->run->exit_reason = KVM_EXIT_MMIO;
12735
12736         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12737
12738         return 0;
12739 }
12740 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read);
12741
12742 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
12743                            unsigned int port);
12744
12745 static int complete_sev_es_emulated_outs(struct kvm_vcpu *vcpu)
12746 {
12747         int size = vcpu->arch.pio.size;
12748         int port = vcpu->arch.pio.port;
12749
12750         vcpu->arch.pio.count = 0;
12751         if (vcpu->arch.sev_pio_count)
12752                 return kvm_sev_es_outs(vcpu, size, port);
12753         return 1;
12754 }
12755
12756 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
12757                            unsigned int port)
12758 {
12759         for (;;) {
12760                 unsigned int count =
12761                         min_t(unsigned int, PAGE_SIZE / size, vcpu->arch.sev_pio_count);
12762                 int ret = emulator_pio_out(vcpu, size, port, vcpu->arch.sev_pio_data, count);
12763
12764                 /* memcpy done already by emulator_pio_out.  */
12765                 vcpu->arch.sev_pio_count -= count;
12766                 vcpu->arch.sev_pio_data += count * vcpu->arch.pio.size;
12767                 if (!ret)
12768                         break;
12769
12770                 /* Emulation done by the kernel.  */
12771                 if (!vcpu->arch.sev_pio_count)
12772                         return 1;
12773         }
12774
12775         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_outs;
12776         return 0;
12777 }
12778
12779 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
12780                           unsigned int port);
12781
12782 static void advance_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
12783 {
12784         unsigned count = vcpu->arch.pio.count;
12785         complete_emulator_pio_in(vcpu, vcpu->arch.sev_pio_data);
12786         vcpu->arch.sev_pio_count -= count;
12787         vcpu->arch.sev_pio_data += count * vcpu->arch.pio.size;
12788 }
12789
12790 static int complete_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
12791 {
12792         int size = vcpu->arch.pio.size;
12793         int port = vcpu->arch.pio.port;
12794
12795         advance_sev_es_emulated_ins(vcpu);
12796         if (vcpu->arch.sev_pio_count)
12797                 return kvm_sev_es_ins(vcpu, size, port);
12798         return 1;
12799 }
12800
12801 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
12802                           unsigned int port)
12803 {
12804         for (;;) {
12805                 unsigned int count =
12806                         min_t(unsigned int, PAGE_SIZE / size, vcpu->arch.sev_pio_count);
12807                 if (!__emulator_pio_in(vcpu, size, port, count))
12808                         break;
12809
12810                 /* Emulation done by the kernel.  */
12811                 advance_sev_es_emulated_ins(vcpu);
12812                 if (!vcpu->arch.sev_pio_count)
12813                         return 1;
12814         }
12815
12816         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_ins;
12817         return 0;
12818 }
12819
12820 int kvm_sev_es_string_io(struct kvm_vcpu *vcpu, unsigned int size,
12821                          unsigned int port, void *data,  unsigned int count,
12822                          int in)
12823 {
12824         vcpu->arch.sev_pio_data = data;
12825         vcpu->arch.sev_pio_count = count;
12826         return in ? kvm_sev_es_ins(vcpu, size, port)
12827                   : kvm_sev_es_outs(vcpu, size, port);
12828 }
12829 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io);
12830
12831 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry);
12832 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
12833 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
12834 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
12835 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
12836 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
12837 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
12838 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
12839 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
12840 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
12841 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
12842 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
12843 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
12844 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
12845 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
12846 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
12847 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
12848 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
12849 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
12850 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
12851 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
12852 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log);
12853 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request);
12854 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_accept_irq);
12855 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter);
12856 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit);
12857 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter);
12858 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit);