arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *   Yaniv Kamay  <yaniv@qumranet.com>
  15  *   Amit Shah    <amit.shah@qumranet.com>
  16  *   Ben-Ami Yassour <benami@il.ibm.com>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "ioapic.h"
  22 #include "mmu.h"
  23 #include "i8254.h"
  24 #include "tss.h"
  25 #include "kvm_cache_regs.h"
  26 #include "kvm_emulate.h"
  27 #include "x86.h"
  28 #include "cpuid.h"
  29 #include "pmu.h"
  30 #include "hyperv.h"
  31 #include "lapic.h"
  32 #include "xen.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/export.h>
  40 #include <linux/moduleparam.h>
  41 #include <linux/mman.h>
  42 #include <linux/highmem.h>
  43 #include <linux/iommu.h>
  44 #include <linux/intel-iommu.h>
  45 #include <linux/cpufreq.h>
  46 #include <linux/user-return-notifier.h>
  47 #include <linux/srcu.h>
  48 #include <linux/slab.h>
  49 #include <linux/perf_event.h>
  50 #include <linux/uaccess.h>
  51 #include <linux/hash.h>
  52 #include <linux/pci.h>
  53 #include <linux/timekeeper_internal.h>
  54 #include <linux/pvclock_gtod.h>
  55 #include <linux/kvm_irqfd.h>
  56 #include <linux/irqbypass.h>
  57 #include <linux/sched/stat.h>
  58 #include <linux/sched/isolation.h>
  59 #include <linux/mem_encrypt.h>
  60 #include <linux/entry-kvm.h>
  61 #include <linux/suspend.h>
  62
  63 #include <trace/events/kvm.h>
  64
  65 #include <asm/debugreg.h>
  66 #include <asm/msr.h>
  67 #include <asm/desc.h>
  68 #include <asm/mce.h>
  69 #include <asm/pkru.h>
  70 #include <linux/kernel_stat.h>
  71 #include <asm/fpu/api.h>
  72 #include <asm/fpu/xcr.h>
  73 #include <asm/fpu/xstate.h>
  74 #include <asm/pvclock.h>
  75 #include <asm/div64.h>
  76 #include <asm/irq_remapping.h>
  77 #include <asm/mshyperv.h>
  78 #include <asm/hypervisor.h>
  79 #include <asm/tlbflush.h>
  80 #include <asm/intel_pt.h>
  81 #include <asm/emulate_prefix.h>
  82 #include <asm/sgx.h>
  83 #include <clocksource/hyperv_timer.h>
  84
  85 #define CREATE_TRACE_POINTS
  86 #include "trace.h"
  87
  88 #define MAX_IO_MSRS 256
  89 #define KVM_MAX_MCE_BANKS 32
  90 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  91 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  92
  93 #define emul_to_vcpu(ctxt) \
  94         ((struct kvm_vcpu *)(ctxt)->vcpu)
  95
  96 /* EFER defaults:
  97  * - enable syscall per default because its emulated by KVM
  98  * - enable LME and LMA per default on 64 bit KVM
  99  */
 100 #ifdef CONFIG_X86_64
 101 static
 102 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
 103 #else
 104 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
 105 #endif
 106
 107 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
 108
 109 #define KVM_EXIT_HYPERCALL_VALID_MASK (1 << KVM_HC_MAP_GPA_RANGE)
 110
 111 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
 112                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 113
 114 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 115 static void process_nmi(struct kvm_vcpu *vcpu);
 116 static void process_smi(struct kvm_vcpu *vcpu);
 117 static void enter_smm(struct kvm_vcpu *vcpu);
 118 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 119 static void store_regs(struct kvm_vcpu *vcpu);
 120 static int sync_regs(struct kvm_vcpu *vcpu);
 121 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu);
 122
 123 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
 124 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
 125
 126 struct kvm_x86_ops kvm_x86_ops __read_mostly;
 127 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 128
 129 #define KVM_X86_OP(func)                                             \
 130         DEFINE_STATIC_CALL_NULL(kvm_x86_##func,                      \
 131                                 *(((struct kvm_x86_ops *)0)->func));
 132 #define KVM_X86_OP_NULL KVM_X86_OP
 133 #include <asm/kvm-x86-ops.h>
 134 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits);
 135 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg);
 136 EXPORT_STATIC_CALL_GPL(kvm_x86_tlb_flush_current);
 137
 138 static bool __read_mostly ignore_msrs = 0;
 139 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 140
 141 bool __read_mostly report_ignored_msrs = true;
 142 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 143 EXPORT_SYMBOL_GPL(report_ignored_msrs);
 144
 145 unsigned int min_timer_period_us = 200;
 146 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 147
 148 static bool __read_mostly kvmclock_periodic_sync = true;
 149 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 150
 151 bool __read_mostly kvm_has_tsc_control;
 152 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 153 u32  __read_mostly kvm_max_guest_tsc_khz;
 154 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 155 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 156 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 157 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 158 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 159 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 160 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 161 bool __read_mostly kvm_has_bus_lock_exit;
 162 EXPORT_SYMBOL_GPL(kvm_has_bus_lock_exit);
 163
 164 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 165 static u32 __read_mostly tsc_tolerance_ppm = 250;
 166 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 167
 168 /*
 169  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 170  * adaptive tuning starting from default advancement of 1000ns.  '0' disables
 171  * advancement entirely.  Any other value is used as-is and disables adaptive
 172  * tuning, i.e. allows privileged userspace to set an exact advancement time.
 173  */
 174 static int __read_mostly lapic_timer_advance_ns = -1;
 175 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 176
 177 static bool __read_mostly vector_hashing = true;
 178 module_param(vector_hashing, bool, S_IRUGO);
 179
 180 bool __read_mostly enable_vmware_backdoor = false;
 181 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 182 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 183
 184 static bool __read_mostly force_emulation_prefix = false;
 185 module_param(force_emulation_prefix, bool, S_IRUGO);
 186
 187 int __read_mostly pi_inject_timer = -1;
 188 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
 189
 190 /* Enable/disable PMU virtualization */
 191 bool __read_mostly enable_pmu = true;
 192 EXPORT_SYMBOL_GPL(enable_pmu);
 193 module_param(enable_pmu, bool, 0444);
 194
 195 /*
 196  * Restoring the host value for MSRs that are only consumed when running in
 197  * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
 198  * returns to userspace, i.e. the kernel can run with the guest's value.
 199  */
 200 #define KVM_MAX_NR_USER_RETURN_MSRS 16
 201
 202 struct kvm_user_return_msrs {
 203         struct user_return_notifier urn;
 204         bool registered;
 205         struct kvm_user_return_msr_values {
 206                 u64 host;
 207                 u64 curr;
 208         } values[KVM_MAX_NR_USER_RETURN_MSRS];
 209 };
 210
 211 u32 __read_mostly kvm_nr_uret_msrs;
 212 EXPORT_SYMBOL_GPL(kvm_nr_uret_msrs);
 213 static u32 __read_mostly kvm_uret_msrs_list[KVM_MAX_NR_USER_RETURN_MSRS];
 214 static struct kvm_user_return_msrs __percpu *user_return_msrs;
 215
 216 #define KVM_SUPPORTED_XCR0     (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
 217                                 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
 218                                 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
 219                                 | XFEATURE_MASK_PKRU | XFEATURE_MASK_XTILE)
 220
 221 u64 __read_mostly host_efer;
 222 EXPORT_SYMBOL_GPL(host_efer);
 223
 224 bool __read_mostly allow_smaller_maxphyaddr = 0;
 225 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr);
 226
 227 bool __read_mostly enable_apicv = true;
 228 EXPORT_SYMBOL_GPL(enable_apicv);
 229
 230 u64 __read_mostly host_xss;
 231 EXPORT_SYMBOL_GPL(host_xss);
 232 u64 __read_mostly supported_xss;
 233 EXPORT_SYMBOL_GPL(supported_xss);
 234
 235 const struct _kvm_stats_desc kvm_vm_stats_desc[] = {
 236         KVM_GENERIC_VM_STATS(),
 237         STATS_DESC_COUNTER(VM, mmu_shadow_zapped),
 238         STATS_DESC_COUNTER(VM, mmu_pte_write),
 239         STATS_DESC_COUNTER(VM, mmu_pde_zapped),
 240         STATS_DESC_COUNTER(VM, mmu_flooded),
 241         STATS_DESC_COUNTER(VM, mmu_recycled),
 242         STATS_DESC_COUNTER(VM, mmu_cache_miss),
 243         STATS_DESC_ICOUNTER(VM, mmu_unsync),
 244         STATS_DESC_ICOUNTER(VM, pages_4k),
 245         STATS_DESC_ICOUNTER(VM, pages_2m),
 246         STATS_DESC_ICOUNTER(VM, pages_1g),
 247         STATS_DESC_ICOUNTER(VM, nx_lpage_splits),
 248         STATS_DESC_PCOUNTER(VM, max_mmu_rmap_size),
 249         STATS_DESC_PCOUNTER(VM, max_mmu_page_hash_collisions)
 250 };
 251
 252 const struct kvm_stats_header kvm_vm_stats_header = {
 253         .name_size = KVM_STATS_NAME_SIZE,
 254         .num_desc = ARRAY_SIZE(kvm_vm_stats_desc),
 255         .id_offset = sizeof(struct kvm_stats_header),
 256         .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
 257         .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
 258                        sizeof(kvm_vm_stats_desc),
 259 };
 260
 261 const struct _kvm_stats_desc kvm_vcpu_stats_desc[] = {
 262         KVM_GENERIC_VCPU_STATS(),
 263         STATS_DESC_COUNTER(VCPU, pf_fixed),
 264         STATS_DESC_COUNTER(VCPU, pf_guest),
 265         STATS_DESC_COUNTER(VCPU, tlb_flush),
 266         STATS_DESC_COUNTER(VCPU, invlpg),
 267         STATS_DESC_COUNTER(VCPU, exits),
 268         STATS_DESC_COUNTER(VCPU, io_exits),
 269         STATS_DESC_COUNTER(VCPU, mmio_exits),
 270         STATS_DESC_COUNTER(VCPU, signal_exits),
 271         STATS_DESC_COUNTER(VCPU, irq_window_exits),
 272         STATS_DESC_COUNTER(VCPU, nmi_window_exits),
 273         STATS_DESC_COUNTER(VCPU, l1d_flush),
 274         STATS_DESC_COUNTER(VCPU, halt_exits),
 275         STATS_DESC_COUNTER(VCPU, request_irq_exits),
 276         STATS_DESC_COUNTER(VCPU, irq_exits),
 277         STATS_DESC_COUNTER(VCPU, host_state_reload),
 278         STATS_DESC_COUNTER(VCPU, fpu_reload),
 279         STATS_DESC_COUNTER(VCPU, insn_emulation),
 280         STATS_DESC_COUNTER(VCPU, insn_emulation_fail),
 281         STATS_DESC_COUNTER(VCPU, hypercalls),
 282         STATS_DESC_COUNTER(VCPU, irq_injections),
 283         STATS_DESC_COUNTER(VCPU, nmi_injections),
 284         STATS_DESC_COUNTER(VCPU, req_event),
 285         STATS_DESC_COUNTER(VCPU, nested_run),
 286         STATS_DESC_COUNTER(VCPU, directed_yield_attempted),
 287         STATS_DESC_COUNTER(VCPU, directed_yield_successful),
 288         STATS_DESC_ICOUNTER(VCPU, guest_mode)
 289 };
 290
 291 const struct kvm_stats_header kvm_vcpu_stats_header = {
 292         .name_size = KVM_STATS_NAME_SIZE,
 293         .num_desc = ARRAY_SIZE(kvm_vcpu_stats_desc),
 294         .id_offset = sizeof(struct kvm_stats_header),
 295         .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
 296         .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
 297                        sizeof(kvm_vcpu_stats_desc),
 298 };
 299
 300 u64 __read_mostly host_xcr0;
 301 u64 __read_mostly supported_xcr0;
 302 EXPORT_SYMBOL_GPL(supported_xcr0);
 303
 304 static struct kmem_cache *x86_emulator_cache;
 305
 306 /*
 307  * When called, it means the previous get/set msr reached an invalid msr.
 308  * Return true if we want to ignore/silent this failed msr access.
 309  */
 310 static bool kvm_msr_ignored_check(u32 msr, u64 data, bool write)
 311 {
 312         const char *op = write ? "wrmsr" : "rdmsr";
 313
 314         if (ignore_msrs) {
 315                 if (report_ignored_msrs)
 316                         kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
 317                                       op, msr, data);
 318                 /* Mask the error */
 319                 return true;
 320         } else {
 321                 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
 322                                       op, msr, data);
 323                 return false;
 324         }
 325 }
 326
 327 static struct kmem_cache *kvm_alloc_emulator_cache(void)
 328 {
 329         unsigned int useroffset = offsetof(struct x86_emulate_ctxt, src);
 330         unsigned int size = sizeof(struct x86_emulate_ctxt);
 331
 332         return kmem_cache_create_usercopy("x86_emulator", size,
 333                                           __alignof__(struct x86_emulate_ctxt),
 334                                           SLAB_ACCOUNT, useroffset,
 335                                           size - useroffset, NULL);
 336 }
 337
 338 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 339
 340 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 341 {
 342         int i;
 343         for (i = 0; i < ASYNC_PF_PER_VCPU; i++)
 344                 vcpu->arch.apf.gfns[i] = ~0;
 345 }
 346
 347 static void kvm_on_user_return(struct user_return_notifier *urn)
 348 {
 349         unsigned slot;
 350         struct kvm_user_return_msrs *msrs
 351                 = container_of(urn, struct kvm_user_return_msrs, urn);
 352         struct kvm_user_return_msr_values *values;
 353         unsigned long flags;
 354
 355         /*
 356          * Disabling irqs at this point since the following code could be
 357          * interrupted and executed through kvm_arch_hardware_disable()
 358          */
 359         local_irq_save(flags);
 360         if (msrs->registered) {
 361                 msrs->registered = false;
 362                 user_return_notifier_unregister(urn);
 363         }
 364         local_irq_restore(flags);
 365         for (slot = 0; slot < kvm_nr_uret_msrs; ++slot) {
 366                 values = &msrs->values[slot];
 367                 if (values->host != values->curr) {
 368                         wrmsrl(kvm_uret_msrs_list[slot], values->host);
 369                         values->curr = values->host;
 370                 }
 371         }
 372 }
 373
 374 static int kvm_probe_user_return_msr(u32 msr)
 375 {
 376         u64 val;
 377         int ret;
 378
 379         preempt_disable();
 380         ret = rdmsrl_safe(msr, &val);
 381         if (ret)
 382                 goto out;
 383         ret = wrmsrl_safe(msr, val);
 384 out:
 385         preempt_enable();
 386         return ret;
 387 }
 388
 389 int kvm_add_user_return_msr(u32 msr)
 390 {
 391         BUG_ON(kvm_nr_uret_msrs >= KVM_MAX_NR_USER_RETURN_MSRS);
 392
 393         if (kvm_probe_user_return_msr(msr))
 394                 return -1;
 395
 396         kvm_uret_msrs_list[kvm_nr_uret_msrs] = msr;
 397         return kvm_nr_uret_msrs++;
 398 }
 399 EXPORT_SYMBOL_GPL(kvm_add_user_return_msr);
 400
 401 int kvm_find_user_return_msr(u32 msr)
 402 {
 403         int i;
 404
 405         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 406                 if (kvm_uret_msrs_list[i] == msr)
 407                         return i;
 408         }
 409         return -1;
 410 }
 411 EXPORT_SYMBOL_GPL(kvm_find_user_return_msr);
 412
 413 static void kvm_user_return_msr_cpu_online(void)
 414 {
 415         unsigned int cpu = smp_processor_id();
 416         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 417         u64 value;
 418         int i;
 419
 420         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 421                 rdmsrl_safe(kvm_uret_msrs_list[i], &value);
 422                 msrs->values[i].host = value;
 423                 msrs->values[i].curr = value;
 424         }
 425 }
 426
 427 int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)
 428 {
 429         unsigned int cpu = smp_processor_id();
 430         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 431         int err;
 432
 433         value = (value & mask) | (msrs->values[slot].host & ~mask);
 434         if (value == msrs->values[slot].curr)
 435                 return 0;
 436         err = wrmsrl_safe(kvm_uret_msrs_list[slot], value);
 437         if (err)
 438                 return 1;
 439
 440         msrs->values[slot].curr = value;
 441         if (!msrs->registered) {
 442                 msrs->urn.on_user_return = kvm_on_user_return;
 443                 user_return_notifier_register(&msrs->urn);
 444                 msrs->registered = true;
 445         }
 446         return 0;
 447 }
 448 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr);
 449
 450 static void drop_user_return_notifiers(void)
 451 {
 452         unsigned int cpu = smp_processor_id();
 453         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 454
 455         if (msrs->registered)
 456                 kvm_on_user_return(&msrs->urn);
 457 }
 458
 459 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 460 {
 461         return vcpu->arch.apic_base;
 462 }
 463 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 464
 465 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 466 {
 467         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 468 }
 469 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 470
 471 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 472 {
 473         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 474         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 475         u64 reserved_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu) | 0x2ff |
 476                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 477
 478         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 479                 return 1;
 480         if (!msr_info->host_initiated) {
 481                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 482                         return 1;
 483                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 484                         return 1;
 485         }
 486
 487         kvm_lapic_set_base(vcpu, msr_info->data);
 488         kvm_recalculate_apic_map(vcpu->kvm);
 489         return 0;
 490 }
 491 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 492
 493 /*
 494  * Handle a fault on a hardware virtualization (VMX or SVM) instruction.
 495  *
 496  * Hardware virtualization extension instructions may fault if a reboot turns
 497  * off virtualization while processes are running.  Usually after catching the
 498  * fault we just panic; during reboot instead the instruction is ignored.
 499  */
 500 noinstr void kvm_spurious_fault(void)
 501 {
 502         /* Fault while not rebooting.  We want the trace. */
 503         BUG_ON(!kvm_rebooting);
 504 }
 505 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 506
 507 #define EXCPT_BENIGN            0
 508 #define EXCPT_CONTRIBUTORY      1
 509 #define EXCPT_PF                2
 510
 511 static int exception_class(int vector)
 512 {
 513         switch (vector) {
 514         case PF_VECTOR:
 515                 return EXCPT_PF;
 516         case DE_VECTOR:
 517         case TS_VECTOR:
 518         case NP_VECTOR:
 519         case SS_VECTOR:
 520         case GP_VECTOR:
 521                 return EXCPT_CONTRIBUTORY;
 522         default:
 523                 break;
 524         }
 525         return EXCPT_BENIGN;
 526 }
 527
 528 #define EXCPT_FAULT             0
 529 #define EXCPT_TRAP              1
 530 #define EXCPT_ABORT             2
 531 #define EXCPT_INTERRUPT         3
 532
 533 static int exception_type(int vector)
 534 {
 535         unsigned int mask;
 536
 537         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 538                 return EXCPT_INTERRUPT;
 539
 540         mask = 1 << vector;
 541
 542         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 543         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 544                 return EXCPT_TRAP;
 545
 546         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 547                 return EXCPT_ABORT;
 548
 549         /* Reserved exceptions will result in fault */
 550         return EXCPT_FAULT;
 551 }
 552
 553 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 554 {
 555         unsigned nr = vcpu->arch.exception.nr;
 556         bool has_payload = vcpu->arch.exception.has_payload;
 557         unsigned long payload = vcpu->arch.exception.payload;
 558
 559         if (!has_payload)
 560                 return;
 561
 562         switch (nr) {
 563         case DB_VECTOR:
 564                 /*
 565                  * "Certain debug exceptions may clear bit 0-3.  The
 566                  * remaining contents of the DR6 register are never
 567                  * cleared by the processor".
 568                  */
 569                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 570                 /*
 571                  * In order to reflect the #DB exception payload in guest
 572                  * dr6, three components need to be considered: active low
 573                  * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
 574                  * DR6_BS and DR6_BT)
 575                  * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
 576                  * In the target guest dr6:
 577                  * FIXED_1 bits should always be set.
 578                  * Active low bits should be cleared if 1-setting in payload.
 579                  * Active high bits should be set if 1-setting in payload.
 580                  *
 581                  * Note, the payload is compatible with the pending debug
 582                  * exceptions/exit qualification under VMX, that active_low bits
 583                  * are active high in payload.
 584                  * So they need to be flipped for DR6.
 585                  */
 586                 vcpu->arch.dr6 |= DR6_ACTIVE_LOW;
 587                 vcpu->arch.dr6 |= payload;
 588                 vcpu->arch.dr6 ^= payload & DR6_ACTIVE_LOW;
 589
 590                 /*
 591                  * The #DB payload is defined as compatible with the 'pending
 592                  * debug exceptions' field under VMX, not DR6. While bit 12 is
 593                  * defined in the 'pending debug exceptions' field (enabled
 594                  * breakpoint), it is reserved and must be zero in DR6.
 595                  */
 596                 vcpu->arch.dr6 &= ~BIT(12);
 597                 break;
 598         case PF_VECTOR:
 599                 vcpu->arch.cr2 = payload;
 600                 break;
 601         }
 602
 603         vcpu->arch.exception.has_payload = false;
 604         vcpu->arch.exception.payload = 0;
 605 }
 606 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 607
 608 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 609                 unsigned nr, bool has_error, u32 error_code,
 610                 bool has_payload, unsigned long payload, bool reinject)
 611 {
 612         u32 prev_nr;
 613         int class1, class2;
 614
 615         kvm_make_request(KVM_REQ_EVENT, vcpu);
 616
 617         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 618         queue:
 619                 if (reinject) {
 620                         /*
 621                          * On vmentry, vcpu->arch.exception.pending is only
 622                          * true if an event injection was blocked by
 623                          * nested_run_pending.  In that case, however,
 624                          * vcpu_enter_guest requests an immediate exit,
 625                          * and the guest shouldn't proceed far enough to
 626                          * need reinjection.
 627                          */
 628                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 629                         vcpu->arch.exception.injected = true;
 630                         if (WARN_ON_ONCE(has_payload)) {
 631                                 /*
 632                                  * A reinjected event has already
 633                                  * delivered its payload.
 634                                  */
 635                                 has_payload = false;
 636                                 payload = 0;
 637                         }
 638                 } else {
 639                         vcpu->arch.exception.pending = true;
 640                         vcpu->arch.exception.injected = false;
 641                 }
 642                 vcpu->arch.exception.has_error_code = has_error;
 643                 vcpu->arch.exception.nr = nr;
 644                 vcpu->arch.exception.error_code = error_code;
 645                 vcpu->arch.exception.has_payload = has_payload;
 646                 vcpu->arch.exception.payload = payload;
 647                 if (!is_guest_mode(vcpu))
 648                         kvm_deliver_exception_payload(vcpu);
 649                 return;
 650         }
 651
 652         /* to check exception */
 653         prev_nr = vcpu->arch.exception.nr;
 654         if (prev_nr == DF_VECTOR) {
 655                 /* triple fault -> shutdown */
 656                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 657                 return;
 658         }
 659         class1 = exception_class(prev_nr);
 660         class2 = exception_class(nr);
 661         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 662                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 663                 /*
 664                  * Generate double fault per SDM Table 5-5.  Set
 665                  * exception.pending = true so that the double fault
 666                  * can trigger a nested vmexit.
 667                  */
 668                 vcpu->arch.exception.pending = true;
 669                 vcpu->arch.exception.injected = false;
 670                 vcpu->arch.exception.has_error_code = true;
 671                 vcpu->arch.exception.nr = DF_VECTOR;
 672                 vcpu->arch.exception.error_code = 0;
 673                 vcpu->arch.exception.has_payload = false;
 674                 vcpu->arch.exception.payload = 0;
 675         } else
 676                 /* replace previous exception with a new one in a hope
 677                    that instruction re-execution will regenerate lost
 678                    exception */
 679                 goto queue;
 680 }
 681
 682 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 683 {
 684         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 685 }
 686 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 687
 688 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 689 {
 690         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 691 }
 692 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 693
 694 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 695                            unsigned long payload)
 696 {
 697         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 698 }
 699 EXPORT_SYMBOL_GPL(kvm_queue_exception_p);
 700
 701 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 702                                     u32 error_code, unsigned long payload)
 703 {
 704         kvm_multiple_exception(vcpu, nr, true, error_code,
 705                                true, payload, false);
 706 }
 707
 708 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 709 {
 710         if (err)
 711                 kvm_inject_gp(vcpu, 0);
 712         else
 713                 return kvm_skip_emulated_instruction(vcpu);
 714
 715         return 1;
 716 }
 717 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 718
 719 static int complete_emulated_insn_gp(struct kvm_vcpu *vcpu, int err)
 720 {
 721         if (err) {
 722                 kvm_inject_gp(vcpu, 0);
 723                 return 1;
 724         }
 725
 726         return kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE | EMULTYPE_SKIP |
 727                                        EMULTYPE_COMPLETE_USER_EXIT);
 728 }
 729
 730 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 731 {
 732         ++vcpu->stat.pf_guest;
 733         vcpu->arch.exception.nested_apf =
 734                 is_guest_mode(vcpu) && fault->async_page_fault;
 735         if (vcpu->arch.exception.nested_apf) {
 736                 vcpu->arch.apf.nested_apf_token = fault->address;
 737                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 738         } else {
 739                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 740                                         fault->address);
 741         }
 742 }
 743 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 744
 745 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
 746                                     struct x86_exception *fault)
 747 {
 748         struct kvm_mmu *fault_mmu;
 749         WARN_ON_ONCE(fault->vector != PF_VECTOR);
 750
 751         fault_mmu = fault->nested_page_fault ? vcpu->arch.mmu :
 752                                                vcpu->arch.walk_mmu;
 753
 754         /*
 755          * Invalidate the TLB entry for the faulting address, if it exists,
 756          * else the access will fault indefinitely (and to emulate hardware).
 757          */
 758         if ((fault->error_code & PFERR_PRESENT_MASK) &&
 759             !(fault->error_code & PFERR_RSVD_MASK))
 760                 kvm_mmu_invalidate_gva(vcpu, fault_mmu, fault->address,
 761                                        fault_mmu->root_hpa);
 762
 763         fault_mmu->inject_page_fault(vcpu, fault);
 764         return fault->nested_page_fault;
 765 }
 766 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault);
 767
 768 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 769 {
 770         atomic_inc(&vcpu->arch.nmi_queued);
 771         kvm_make_request(KVM_REQ_NMI, vcpu);
 772 }
 773 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 774
 775 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 776 {
 777         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 778 }
 779 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 780
 781 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 782 {
 783         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 784 }
 785 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 786
 787 /*
 788  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 789  * a #GP and return false.
 790  */
 791 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 792 {
 793         if (static_call(kvm_x86_get_cpl)(vcpu) <= required_cpl)
 794                 return true;
 795         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 796         return false;
 797 }
 798 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 799
 800 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 801 {
 802         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 803                 return true;
 804
 805         kvm_queue_exception(vcpu, UD_VECTOR);
 806         return false;
 807 }
 808 EXPORT_SYMBOL_GPL(kvm_require_dr);
 809
 810 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
 811 {
 812         return vcpu->arch.reserved_gpa_bits | rsvd_bits(5, 8) | rsvd_bits(1, 2);
 813 }
 814
 815 /*
 816  * Load the pae pdptrs.  Return 1 if they are all valid, 0 otherwise.
 817  */
 818 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
 819 {
 820         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
 821         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 822         gpa_t real_gpa;
 823         int i;
 824         int ret;
 825         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 826
 827         /*
 828          * If the MMU is nested, CR3 holds an L2 GPA and needs to be translated
 829          * to an L1 GPA.
 830          */
 831         real_gpa = kvm_translate_gpa(vcpu, mmu, gfn_to_gpa(pdpt_gfn),
 832                                      PFERR_USER_MASK | PFERR_WRITE_MASK, NULL);
 833         if (real_gpa == UNMAPPED_GVA)
 834                 return 0;
 835
 836         /* Note the offset, PDPTRs are 32 byte aligned when using PAE paging. */
 837         ret = kvm_vcpu_read_guest_page(vcpu, gpa_to_gfn(real_gpa), pdpte,
 838                                        cr3 & GENMASK(11, 5), sizeof(pdpte));
 839         if (ret < 0)
 840                 return 0;
 841
 842         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 843                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 844                     (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
 845                         return 0;
 846                 }
 847         }
 848
 849         /*
 850          * Marking VCPU_EXREG_PDPTR dirty doesn't work for !tdp_enabled.
 851          * Shadow page roots need to be reconstructed instead.
 852          */
 853         if (!tdp_enabled && memcmp(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs)))
 854                 kvm_mmu_free_roots(vcpu, mmu, KVM_MMU_ROOT_CURRENT);
 855
 856         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 857         kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
 858         kvm_make_request(KVM_REQ_LOAD_MMU_PGD, vcpu);
 859         vcpu->arch.pdptrs_from_userspace = false;
 860
 861         return 1;
 862 }
 863 EXPORT_SYMBOL_GPL(load_pdptrs);
 864
 865 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0)
 866 {
 867         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 868                 kvm_clear_async_pf_completion_queue(vcpu);
 869                 kvm_async_pf_hash_reset(vcpu);
 870         }
 871
 872         if ((cr0 ^ old_cr0) & KVM_MMU_CR0_ROLE_BITS)
 873                 kvm_mmu_reset_context(vcpu);
 874
 875         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 876             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 877             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 878                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 879 }
 880 EXPORT_SYMBOL_GPL(kvm_post_set_cr0);
 881
 882 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 883 {
 884         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 885
 886         cr0 |= X86_CR0_ET;
 887
 888 #ifdef CONFIG_X86_64
 889         if (cr0 & 0xffffffff00000000UL)
 890                 return 1;
 891 #endif
 892
 893         cr0 &= ~CR0_RESERVED_BITS;
 894
 895         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 896                 return 1;
 897
 898         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 899                 return 1;
 900
 901 #ifdef CONFIG_X86_64
 902         if ((vcpu->arch.efer & EFER_LME) && !is_paging(vcpu) &&
 903             (cr0 & X86_CR0_PG)) {
 904                 int cs_db, cs_l;
 905
 906                 if (!is_pae(vcpu))
 907                         return 1;
 908                 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
 909                 if (cs_l)
 910                         return 1;
 911         }
 912 #endif
 913         if (!(vcpu->arch.efer & EFER_LME) && (cr0 & X86_CR0_PG) &&
 914             is_pae(vcpu) && ((cr0 ^ old_cr0) & X86_CR0_PDPTR_BITS) &&
 915             !load_pdptrs(vcpu, kvm_read_cr3(vcpu)))
 916                 return 1;
 917
 918         if (!(cr0 & X86_CR0_PG) &&
 919             (is_64_bit_mode(vcpu) || kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE)))
 920                 return 1;
 921
 922         static_call(kvm_x86_set_cr0)(vcpu, cr0);
 923
 924         kvm_post_set_cr0(vcpu, old_cr0, cr0);
 925
 926         return 0;
 927 }
 928 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 929
 930 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 931 {
 932         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 933 }
 934 EXPORT_SYMBOL_GPL(kvm_lmsw);
 935
 936 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
 937 {
 938         if (vcpu->arch.guest_state_protected)
 939                 return;
 940
 941         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 942
 943                 if (vcpu->arch.xcr0 != host_xcr0)
 944                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 945
 946                 if (vcpu->arch.xsaves_enabled &&
 947                     vcpu->arch.ia32_xss != host_xss)
 948                         wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
 949         }
 950
 951         if (static_cpu_has(X86_FEATURE_PKU) &&
 952             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 953              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU)) &&
 954             vcpu->arch.pkru != vcpu->arch.host_pkru)
 955                 write_pkru(vcpu->arch.pkru);
 956 }
 957 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
 958
 959 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
 960 {
 961         if (vcpu->arch.guest_state_protected)
 962                 return;
 963
 964         if (static_cpu_has(X86_FEATURE_PKU) &&
 965             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 966              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU))) {
 967                 vcpu->arch.pkru = rdpkru();
 968                 if (vcpu->arch.pkru != vcpu->arch.host_pkru)
 969                         write_pkru(vcpu->arch.host_pkru);
 970         }
 971
 972         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 973
 974                 if (vcpu->arch.xcr0 != host_xcr0)
 975                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 976
 977                 if (vcpu->arch.xsaves_enabled &&
 978                     vcpu->arch.ia32_xss != host_xss)
 979                         wrmsrl(MSR_IA32_XSS, host_xss);
 980         }
 981
 982 }
 983 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
 984
 985 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 986 {
 987         u64 xcr0 = xcr;
 988         u64 old_xcr0 = vcpu->arch.xcr0;
 989         u64 valid_bits;
 990
 991         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 992         if (index != XCR_XFEATURE_ENABLED_MASK)
 993                 return 1;
 994         if (!(xcr0 & XFEATURE_MASK_FP))
 995                 return 1;
 996         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 997                 return 1;
 998
 999         /*
1000          * Do not allow the guest to set bits that we do not support
1001          * saving.  However, xcr0 bit 0 is always set, even if the
1002          * emulated CPU does not support XSAVE (see kvm_vcpu_reset()).
1003          */
1004         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
1005         if (xcr0 & ~valid_bits)
1006                 return 1;
1007
1008         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
1009             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
1010                 return 1;
1011
1012         if (xcr0 & XFEATURE_MASK_AVX512) {
1013                 if (!(xcr0 & XFEATURE_MASK_YMM))
1014                         return 1;
1015                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
1016                         return 1;
1017         }
1018
1019         if ((xcr0 & XFEATURE_MASK_XTILE) &&
1020             ((xcr0 & XFEATURE_MASK_XTILE) != XFEATURE_MASK_XTILE))
1021                 return 1;
1022
1023         vcpu->arch.xcr0 = xcr0;
1024
1025         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
1026                 kvm_update_cpuid_runtime(vcpu);
1027         return 0;
1028 }
1029
1030 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu)
1031 {
1032         if (static_call(kvm_x86_get_cpl)(vcpu) != 0 ||
1033             __kvm_set_xcr(vcpu, kvm_rcx_read(vcpu), kvm_read_edx_eax(vcpu))) {
1034                 kvm_inject_gp(vcpu, 0);
1035                 return 1;
1036         }
1037
1038         return kvm_skip_emulated_instruction(vcpu);
1039 }
1040 EXPORT_SYMBOL_GPL(kvm_emulate_xsetbv);
1041
1042 bool kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1043 {
1044         if (cr4 & cr4_reserved_bits)
1045                 return false;
1046
1047         if (cr4 & vcpu->arch.cr4_guest_rsvd_bits)
1048                 return false;
1049
1050         return static_call(kvm_x86_is_valid_cr4)(vcpu, cr4);
1051 }
1052 EXPORT_SYMBOL_GPL(kvm_is_valid_cr4);
1053
1054 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4)
1055 {
1056         /*
1057          * If any role bit is changed, the MMU needs to be reset.
1058          *
1059          * If CR4.PCIDE is changed 1 -> 0, the guest TLB must be flushed.
1060          * If CR4.PCIDE is changed 0 -> 1, there is no need to flush the TLB
1061          * according to the SDM; however, stale prev_roots could be reused
1062          * incorrectly in the future after a MOV to CR3 with NOFLUSH=1, so we
1063          * free them all.  KVM_REQ_MMU_RELOAD is fit for the both cases; it
1064          * is slow, but changing CR4.PCIDE is a rare case.
1065          *
1066          * If CR4.PGE is changed, the guest TLB must be flushed.
1067          *
1068          * Note: resetting MMU is a superset of KVM_REQ_MMU_RELOAD and
1069          * KVM_REQ_MMU_RELOAD is a superset of KVM_REQ_TLB_FLUSH_GUEST, hence
1070          * the usage of "else if".
1071          */
1072         if ((cr4 ^ old_cr4) & KVM_MMU_CR4_ROLE_BITS)
1073                 kvm_mmu_reset_context(vcpu);
1074         else if ((cr4 ^ old_cr4) & X86_CR4_PCIDE)
1075                 kvm_make_request(KVM_REQ_MMU_RELOAD, vcpu);
1076         else if ((cr4 ^ old_cr4) & X86_CR4_PGE)
1077                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
1078 }
1079 EXPORT_SYMBOL_GPL(kvm_post_set_cr4);
1080
1081 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1082 {
1083         unsigned long old_cr4 = kvm_read_cr4(vcpu);
1084
1085         if (!kvm_is_valid_cr4(vcpu, cr4))
1086                 return 1;
1087
1088         if (is_long_mode(vcpu)) {
1089                 if (!(cr4 & X86_CR4_PAE))
1090                         return 1;
1091                 if ((cr4 ^ old_cr4) & X86_CR4_LA57)
1092                         return 1;
1093         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
1094                    && ((cr4 ^ old_cr4) & X86_CR4_PDPTR_BITS)
1095                    && !load_pdptrs(vcpu, kvm_read_cr3(vcpu)))
1096                 return 1;
1097
1098         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
1099                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
1100                         return 1;
1101
1102                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1103                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
1104                         return 1;
1105         }
1106
1107         static_call(kvm_x86_set_cr4)(vcpu, cr4);
1108
1109         kvm_post_set_cr4(vcpu, old_cr4, cr4);
1110
1111         return 0;
1112 }
1113 EXPORT_SYMBOL_GPL(kvm_set_cr4);
1114
1115 static void kvm_invalidate_pcid(struct kvm_vcpu *vcpu, unsigned long pcid)
1116 {
1117         struct kvm_mmu *mmu = vcpu->arch.mmu;
1118         unsigned long roots_to_free = 0;
1119         int i;
1120
1121         /*
1122          * MOV CR3 and INVPCID are usually not intercepted when using TDP, but
1123          * this is reachable when running EPT=1 and unrestricted_guest=0,  and
1124          * also via the emulator.  KVM's TDP page tables are not in the scope of
1125          * the invalidation, but the guest's TLB entries need to be flushed as
1126          * the CPU may have cached entries in its TLB for the target PCID.
1127          */
1128         if (unlikely(tdp_enabled)) {
1129                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
1130                 return;
1131         }
1132
1133         /*
1134          * If neither the current CR3 nor any of the prev_roots use the given
1135          * PCID, then nothing needs to be done here because a resync will
1136          * happen anyway before switching to any other CR3.
1137          */
1138         if (kvm_get_active_pcid(vcpu) == pcid) {
1139                 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
1140                 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1141         }
1142
1143         /*
1144          * If PCID is disabled, there is no need to free prev_roots even if the
1145          * PCIDs for them are also 0, because MOV to CR3 always flushes the TLB
1146          * with PCIDE=0.
1147          */
1148         if (!kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
1149                 return;
1150
1151         for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
1152                 if (kvm_get_pcid(vcpu, mmu->prev_roots[i].pgd) == pcid)
1153                         roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
1154
1155         kvm_mmu_free_roots(vcpu, mmu, roots_to_free);
1156 }
1157
1158 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1159 {
1160         bool skip_tlb_flush = false;
1161         unsigned long pcid = 0;
1162 #ifdef CONFIG_X86_64
1163         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
1164
1165         if (pcid_enabled) {
1166                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
1167                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
1168                 pcid = cr3 & X86_CR3_PCID_MASK;
1169         }
1170 #endif
1171
1172         /* PDPTRs are always reloaded for PAE paging. */
1173         if (cr3 == kvm_read_cr3(vcpu) && !is_pae_paging(vcpu))
1174                 goto handle_tlb_flush;
1175
1176         /*
1177          * Do not condition the GPA check on long mode, this helper is used to
1178          * stuff CR3, e.g. for RSM emulation, and there is no guarantee that
1179          * the current vCPU mode is accurate.
1180          */
1181         if (kvm_vcpu_is_illegal_gpa(vcpu, cr3))
1182                 return 1;
1183
1184         if (is_pae_paging(vcpu) && !load_pdptrs(vcpu, cr3))
1185                 return 1;
1186
1187         if (cr3 != kvm_read_cr3(vcpu))
1188                 kvm_mmu_new_pgd(vcpu, cr3);
1189
1190         vcpu->arch.cr3 = cr3;
1191         kvm_register_mark_dirty(vcpu, VCPU_EXREG_CR3);
1192         /* Do not call post_set_cr3, we do not get here for confidential guests.  */
1193
1194 handle_tlb_flush:
1195         /*
1196          * A load of CR3 that flushes the TLB flushes only the current PCID,
1197          * even if PCID is disabled, in which case PCID=0 is flushed.  It's a
1198          * moot point in the end because _disabling_ PCID will flush all PCIDs,
1199          * and it's impossible to use a non-zero PCID when PCID is disabled,
1200          * i.e. only PCID=0 can be relevant.
1201          */
1202         if (!skip_tlb_flush)
1203                 kvm_invalidate_pcid(vcpu, pcid);
1204
1205         return 0;
1206 }
1207 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1208
1209 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1210 {
1211         if (cr8 & CR8_RESERVED_BITS)
1212                 return 1;
1213         if (lapic_in_kernel(vcpu))
1214                 kvm_lapic_set_tpr(vcpu, cr8);
1215         else
1216                 vcpu->arch.cr8 = cr8;
1217         return 0;
1218 }
1219 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1220
1221 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1222 {
1223         if (lapic_in_kernel(vcpu))
1224                 return kvm_lapic_get_cr8(vcpu);
1225         else
1226                 return vcpu->arch.cr8;
1227 }
1228 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1229
1230 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1231 {
1232         int i;
1233
1234         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1235                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1236                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1237         }
1238 }
1239
1240 void kvm_update_dr7(struct kvm_vcpu *vcpu)
1241 {
1242         unsigned long dr7;
1243
1244         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1245                 dr7 = vcpu->arch.guest_debug_dr7;
1246         else
1247                 dr7 = vcpu->arch.dr7;
1248         static_call(kvm_x86_set_dr7)(vcpu, dr7);
1249         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1250         if (dr7 & DR7_BP_EN_MASK)
1251                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1252 }
1253 EXPORT_SYMBOL_GPL(kvm_update_dr7);
1254
1255 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1256 {
1257         u64 fixed = DR6_FIXED_1;
1258
1259         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1260                 fixed |= DR6_RTM;
1261
1262         if (!guest_cpuid_has(vcpu, X86_FEATURE_BUS_LOCK_DETECT))
1263                 fixed |= DR6_BUS_LOCK;
1264         return fixed;
1265 }
1266
1267 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1268 {
1269         size_t size = ARRAY_SIZE(vcpu->arch.db);
1270
1271         switch (dr) {
1272         case 0 ... 3:
1273                 vcpu->arch.db[array_index_nospec(dr, size)] = val;
1274                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1275                         vcpu->arch.eff_db[dr] = val;
1276                 break;
1277         case 4:
1278         case 6:
1279                 if (!kvm_dr6_valid(val))
1280                         return 1; /* #GP */
1281                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1282                 break;
1283         case 5:
1284         default: /* 7 */
1285                 if (!kvm_dr7_valid(val))
1286                         return 1; /* #GP */
1287                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1288                 kvm_update_dr7(vcpu);
1289                 break;
1290         }
1291
1292         return 0;
1293 }
1294 EXPORT_SYMBOL_GPL(kvm_set_dr);
1295
1296 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1297 {
1298         size_t size = ARRAY_SIZE(vcpu->arch.db);
1299
1300         switch (dr) {
1301         case 0 ... 3:
1302                 *val = vcpu->arch.db[array_index_nospec(dr, size)];
1303                 break;
1304         case 4:
1305         case 6:
1306                 *val = vcpu->arch.dr6;
1307                 break;
1308         case 5:
1309         default: /* 7 */
1310                 *val = vcpu->arch.dr7;
1311                 break;
1312         }
1313 }
1314 EXPORT_SYMBOL_GPL(kvm_get_dr);
1315
1316 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu)
1317 {
1318         u32 ecx = kvm_rcx_read(vcpu);
1319         u64 data;
1320
1321         if (kvm_pmu_rdpmc(vcpu, ecx, &data)) {
1322                 kvm_inject_gp(vcpu, 0);
1323                 return 1;
1324         }
1325
1326         kvm_rax_write(vcpu, (u32)data);
1327         kvm_rdx_write(vcpu, data >> 32);
1328         return kvm_skip_emulated_instruction(vcpu);
1329 }
1330 EXPORT_SYMBOL_GPL(kvm_emulate_rdpmc);
1331
1332 /*
1333  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1334  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1335  *
1336  * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1337  * extract the supported MSRs from the related const lists.
1338  * msrs_to_save is selected from the msrs_to_save_all to reflect the
1339  * capabilities of the host cpu. This capabilities test skips MSRs that are
1340  * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1341  * may depend on host virtualization features rather than host cpu features.
1342  */
1343
1344 static const u32 msrs_to_save_all[] = {
1345         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1346         MSR_STAR,
1347 #ifdef CONFIG_X86_64
1348         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1349 #endif
1350         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1351         MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1352         MSR_IA32_SPEC_CTRL,
1353         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1354         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1355         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1356         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1357         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1358         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1359         MSR_IA32_UMWAIT_CONTROL,
1360
1361         MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1362         MSR_ARCH_PERFMON_FIXED_CTR0 + 2,
1363         MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1364         MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1365         MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1366         MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1367         MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1368         MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1369         MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1370         MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1371         MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1372         MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1373         MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1374         MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1375         MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1376         MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1377         MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1378         MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1379         MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1380         MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1381         MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1382         MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1383
1384         MSR_K7_EVNTSEL0, MSR_K7_EVNTSEL1, MSR_K7_EVNTSEL2, MSR_K7_EVNTSEL3,
1385         MSR_K7_PERFCTR0, MSR_K7_PERFCTR1, MSR_K7_PERFCTR2, MSR_K7_PERFCTR3,
1386         MSR_F15H_PERF_CTL0, MSR_F15H_PERF_CTL1, MSR_F15H_PERF_CTL2,
1387         MSR_F15H_PERF_CTL3, MSR_F15H_PERF_CTL4, MSR_F15H_PERF_CTL5,
1388         MSR_F15H_PERF_CTR0, MSR_F15H_PERF_CTR1, MSR_F15H_PERF_CTR2,
1389         MSR_F15H_PERF_CTR3, MSR_F15H_PERF_CTR4, MSR_F15H_PERF_CTR5,
1390         MSR_IA32_XFD, MSR_IA32_XFD_ERR,
1391 };
1392
1393 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
1394 static unsigned num_msrs_to_save;
1395
1396 static const u32 emulated_msrs_all[] = {
1397         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1398         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1399         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1400         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1401         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1402         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1403         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1404         HV_X64_MSR_RESET,
1405         HV_X64_MSR_VP_INDEX,
1406         HV_X64_MSR_VP_RUNTIME,
1407         HV_X64_MSR_SCONTROL,
1408         HV_X64_MSR_STIMER0_CONFIG,
1409         HV_X64_MSR_VP_ASSIST_PAGE,
1410         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1411         HV_X64_MSR_TSC_EMULATION_STATUS,
1412         HV_X64_MSR_SYNDBG_OPTIONS,
1413         HV_X64_MSR_SYNDBG_CONTROL, HV_X64_MSR_SYNDBG_STATUS,
1414         HV_X64_MSR_SYNDBG_SEND_BUFFER, HV_X64_MSR_SYNDBG_RECV_BUFFER,
1415         HV_X64_MSR_SYNDBG_PENDING_BUFFER,
1416
1417         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1418         MSR_KVM_PV_EOI_EN, MSR_KVM_ASYNC_PF_INT, MSR_KVM_ASYNC_PF_ACK,
1419
1420         MSR_IA32_TSC_ADJUST,
1421         MSR_IA32_TSC_DEADLINE,
1422         MSR_IA32_ARCH_CAPABILITIES,
1423         MSR_IA32_PERF_CAPABILITIES,
1424         MSR_IA32_MISC_ENABLE,
1425         MSR_IA32_MCG_STATUS,
1426         MSR_IA32_MCG_CTL,
1427         MSR_IA32_MCG_EXT_CTL,
1428         MSR_IA32_SMBASE,
1429         MSR_SMI_COUNT,
1430         MSR_PLATFORM_INFO,
1431         MSR_MISC_FEATURES_ENABLES,
1432         MSR_AMD64_VIRT_SPEC_CTRL,
1433         MSR_AMD64_TSC_RATIO,
1434         MSR_IA32_POWER_CTL,
1435         MSR_IA32_UCODE_REV,
1436
1437         /*
1438          * The following list leaves out MSRs whose values are determined
1439          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1440          * We always support the "true" VMX control MSRs, even if the host
1441          * processor does not, so I am putting these registers here rather
1442          * than in msrs_to_save_all.
1443          */
1444         MSR_IA32_VMX_BASIC,
1445         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1446         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1447         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1448         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1449         MSR_IA32_VMX_MISC,
1450         MSR_IA32_VMX_CR0_FIXED0,
1451         MSR_IA32_VMX_CR4_FIXED0,
1452         MSR_IA32_VMX_VMCS_ENUM,
1453         MSR_IA32_VMX_PROCBASED_CTLS2,
1454         MSR_IA32_VMX_EPT_VPID_CAP,
1455         MSR_IA32_VMX_VMFUNC,
1456
1457         MSR_K7_HWCR,
1458         MSR_KVM_POLL_CONTROL,
1459 };
1460
1461 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1462 static unsigned num_emulated_msrs;
1463
1464 /*
1465  * List of msr numbers which are used to expose MSR-based features that
1466  * can be used by a hypervisor to validate requested CPU features.
1467  */
1468 static const u32 msr_based_features_all[] = {
1469         MSR_IA32_VMX_BASIC,
1470         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1471         MSR_IA32_VMX_PINBASED_CTLS,
1472         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1473         MSR_IA32_VMX_PROCBASED_CTLS,
1474         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1475         MSR_IA32_VMX_EXIT_CTLS,
1476         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1477         MSR_IA32_VMX_ENTRY_CTLS,
1478         MSR_IA32_VMX_MISC,
1479         MSR_IA32_VMX_CR0_FIXED0,
1480         MSR_IA32_VMX_CR0_FIXED1,
1481         MSR_IA32_VMX_CR4_FIXED0,
1482         MSR_IA32_VMX_CR4_FIXED1,
1483         MSR_IA32_VMX_VMCS_ENUM,
1484         MSR_IA32_VMX_PROCBASED_CTLS2,
1485         MSR_IA32_VMX_EPT_VPID_CAP,
1486         MSR_IA32_VMX_VMFUNC,
1487
1488         MSR_F10H_DECFG,
1489         MSR_IA32_UCODE_REV,
1490         MSR_IA32_ARCH_CAPABILITIES,
1491         MSR_IA32_PERF_CAPABILITIES,
1492 };
1493
1494 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
1495 static unsigned int num_msr_based_features;
1496
1497 static u64 kvm_get_arch_capabilities(void)
1498 {
1499         u64 data = 0;
1500
1501         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1502                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1503
1504         /*
1505          * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1506          * the nested hypervisor runs with NX huge pages.  If it is not,
1507          * L1 is anyway vulnerable to ITLB_MULTIHIT exploits from other
1508          * L1 guests, so it need not worry about its own (L2) guests.
1509          */
1510         data |= ARCH_CAP_PSCHANGE_MC_NO;
1511
1512         /*
1513          * If we're doing cache flushes (either "always" or "cond")
1514          * we will do one whenever the guest does a vmlaunch/vmresume.
1515          * If an outer hypervisor is doing the cache flush for us
1516          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1517          * capability to the guest too, and if EPT is disabled we're not
1518          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1519          * require a nested hypervisor to do a flush of its own.
1520          */
1521         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1522                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1523
1524         if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1525                 data |= ARCH_CAP_RDCL_NO;
1526         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1527                 data |= ARCH_CAP_SSB_NO;
1528         if (!boot_cpu_has_bug(X86_BUG_MDS))
1529                 data |= ARCH_CAP_MDS_NO;
1530
1531         if (!boot_cpu_has(X86_FEATURE_RTM)) {
1532                 /*
1533                  * If RTM=0 because the kernel has disabled TSX, the host might
1534                  * have TAA_NO or TSX_CTRL.  Clear TAA_NO (the guest sees RTM=0
1535                  * and therefore knows that there cannot be TAA) but keep
1536                  * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1537                  * and we want to allow migrating those guests to tsx=off hosts.
1538                  */
1539                 data &= ~ARCH_CAP_TAA_NO;
1540         } else if (!boot_cpu_has_bug(X86_BUG_TAA)) {
1541                 data |= ARCH_CAP_TAA_NO;
1542         } else {
1543                 /*
1544                  * Nothing to do here; we emulate TSX_CTRL if present on the
1545                  * host so the guest can choose between disabling TSX or
1546                  * using VERW to clear CPU buffers.
1547                  */
1548         }
1549
1550         return data;
1551 }
1552
1553 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1554 {
1555         switch (msr->index) {
1556         case MSR_IA32_ARCH_CAPABILITIES:
1557                 msr->data = kvm_get_arch_capabilities();
1558                 break;
1559         case MSR_IA32_UCODE_REV:
1560                 rdmsrl_safe(msr->index, &msr->data);
1561                 break;
1562         default:
1563                 return static_call(kvm_x86_get_msr_feature)(msr);
1564         }
1565         return 0;
1566 }
1567
1568 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1569 {
1570         struct kvm_msr_entry msr;
1571         int r;
1572
1573         msr.index = index;
1574         r = kvm_get_msr_feature(&msr);
1575
1576         if (r == KVM_MSR_RET_INVALID) {
1577                 /* Unconditionally clear the output for simplicity */
1578                 *data = 0;
1579                 if (kvm_msr_ignored_check(index, 0, false))
1580                         r = 0;
1581         }
1582
1583         if (r)
1584                 return r;
1585
1586         *data = msr.data;
1587
1588         return 0;
1589 }
1590
1591 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1592 {
1593         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1594                 return false;
1595
1596         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1597                 return false;
1598
1599         if (efer & (EFER_LME | EFER_LMA) &&
1600             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1601                 return false;
1602
1603         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1604                 return false;
1605
1606         return true;
1607
1608 }
1609 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1610 {
1611         if (efer & efer_reserved_bits)
1612                 return false;
1613
1614         return __kvm_valid_efer(vcpu, efer);
1615 }
1616 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1617
1618 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1619 {
1620         u64 old_efer = vcpu->arch.efer;
1621         u64 efer = msr_info->data;
1622         int r;
1623
1624         if (efer & efer_reserved_bits)
1625                 return 1;
1626
1627         if (!msr_info->host_initiated) {
1628                 if (!__kvm_valid_efer(vcpu, efer))
1629                         return 1;
1630
1631                 if (is_paging(vcpu) &&
1632                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1633                         return 1;
1634         }
1635
1636         efer &= ~EFER_LMA;
1637         efer |= vcpu->arch.efer & EFER_LMA;
1638
1639         r = static_call(kvm_x86_set_efer)(vcpu, efer);
1640         if (r) {
1641                 WARN_ON(r > 0);
1642                 return r;
1643         }
1644
1645         /* Update reserved bits */
1646         if ((efer ^ old_efer) & EFER_NX)
1647                 kvm_mmu_reset_context(vcpu);
1648
1649         return 0;
1650 }
1651
1652 void kvm_enable_efer_bits(u64 mask)
1653 {
1654        efer_reserved_bits &= ~mask;
1655 }
1656 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1657
1658 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type)
1659 {
1660         struct kvm_x86_msr_filter *msr_filter;
1661         struct msr_bitmap_range *ranges;
1662         struct kvm *kvm = vcpu->kvm;
1663         bool allowed;
1664         int idx;
1665         u32 i;
1666
1667         /* x2APIC MSRs do not support filtering. */
1668         if (index >= 0x800 && index <= 0x8ff)
1669                 return true;
1670
1671         idx = srcu_read_lock(&kvm->srcu);
1672
1673         msr_filter = srcu_dereference(kvm->arch.msr_filter, &kvm->srcu);
1674         if (!msr_filter) {
1675                 allowed = true;
1676                 goto out;
1677         }
1678
1679         allowed = msr_filter->default_allow;
1680         ranges = msr_filter->ranges;
1681
1682         for (i = 0; i < msr_filter->count; i++) {
1683                 u32 start = ranges[i].base;
1684                 u32 end = start + ranges[i].nmsrs;
1685                 u32 flags = ranges[i].flags;
1686                 unsigned long *bitmap = ranges[i].bitmap;
1687
1688                 if ((index >= start) && (index < end) && (flags & type)) {
1689                         allowed = !!test_bit(index - start, bitmap);
1690                         break;
1691                 }
1692         }
1693
1694 out:
1695         srcu_read_unlock(&kvm->srcu, idx);
1696
1697         return allowed;
1698 }
1699 EXPORT_SYMBOL_GPL(kvm_msr_allowed);
1700
1701 /*
1702  * Write @data into the MSR specified by @index.  Select MSR specific fault
1703  * checks are bypassed if @host_initiated is %true.
1704  * Returns 0 on success, non-0 otherwise.
1705  * Assumes vcpu_load() was already called.
1706  */
1707 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1708                          bool host_initiated)
1709 {
1710         struct msr_data msr;
1711
1712         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_WRITE))
1713                 return KVM_MSR_RET_FILTERED;
1714
1715         switch (index) {
1716         case MSR_FS_BASE:
1717         case MSR_GS_BASE:
1718         case MSR_KERNEL_GS_BASE:
1719         case MSR_CSTAR:
1720         case MSR_LSTAR:
1721                 if (is_noncanonical_address(data, vcpu))
1722                         return 1;
1723                 break;
1724         case MSR_IA32_SYSENTER_EIP:
1725         case MSR_IA32_SYSENTER_ESP:
1726                 /*
1727                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1728                  * non-canonical address is written on Intel but not on
1729                  * AMD (which ignores the top 32-bits, because it does
1730                  * not implement 64-bit SYSENTER).
1731                  *
1732                  * 64-bit code should hence be able to write a non-canonical
1733                  * value on AMD.  Making the address canonical ensures that
1734                  * vmentry does not fail on Intel after writing a non-canonical
1735                  * value, and that something deterministic happens if the guest
1736                  * invokes 64-bit SYSENTER.
1737                  */
1738                 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1739                 break;
1740         case MSR_TSC_AUX:
1741                 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1742                         return 1;
1743
1744                 if (!host_initiated &&
1745                     !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1746                     !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1747                         return 1;
1748
1749                 /*
1750                  * Per Intel's SDM, bits 63:32 are reserved, but AMD's APM has
1751                  * incomplete and conflicting architectural behavior.  Current
1752                  * AMD CPUs completely ignore bits 63:32, i.e. they aren't
1753                  * reserved and always read as zeros.  Enforce Intel's reserved
1754                  * bits check if and only if the guest CPU is Intel, and clear
1755                  * the bits in all other cases.  This ensures cross-vendor
1756                  * migration will provide consistent behavior for the guest.
1757                  */
1758                 if (guest_cpuid_is_intel(vcpu) && (data >> 32) != 0)
1759                         return 1;
1760
1761                 data = (u32)data;
1762                 break;
1763         }
1764
1765         msr.data = data;
1766         msr.index = index;
1767         msr.host_initiated = host_initiated;
1768
1769         return static_call(kvm_x86_set_msr)(vcpu, &msr);
1770 }
1771
1772 static int kvm_set_msr_ignored_check(struct kvm_vcpu *vcpu,
1773                                      u32 index, u64 data, bool host_initiated)
1774 {
1775         int ret = __kvm_set_msr(vcpu, index, data, host_initiated);
1776
1777         if (ret == KVM_MSR_RET_INVALID)
1778                 if (kvm_msr_ignored_check(index, data, true))
1779                         ret = 0;
1780
1781         return ret;
1782 }
1783
1784 /*
1785  * Read the MSR specified by @index into @data.  Select MSR specific fault
1786  * checks are bypassed if @host_initiated is %true.
1787  * Returns 0 on success, non-0 otherwise.
1788  * Assumes vcpu_load() was already called.
1789  */
1790 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1791                   bool host_initiated)
1792 {
1793         struct msr_data msr;
1794         int ret;
1795
1796         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_READ))
1797                 return KVM_MSR_RET_FILTERED;
1798
1799         switch (index) {
1800         case MSR_TSC_AUX:
1801                 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1802                         return 1;
1803
1804                 if (!host_initiated &&
1805                     !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1806                     !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1807                         return 1;
1808                 break;
1809         }
1810
1811         msr.index = index;
1812         msr.host_initiated = host_initiated;
1813
1814         ret = static_call(kvm_x86_get_msr)(vcpu, &msr);
1815         if (!ret)
1816                 *data = msr.data;
1817         return ret;
1818 }
1819
1820 static int kvm_get_msr_ignored_check(struct kvm_vcpu *vcpu,
1821                                      u32 index, u64 *data, bool host_initiated)
1822 {
1823         int ret = __kvm_get_msr(vcpu, index, data, host_initiated);
1824
1825         if (ret == KVM_MSR_RET_INVALID) {
1826                 /* Unconditionally clear *data for simplicity */
1827                 *data = 0;
1828                 if (kvm_msr_ignored_check(index, 0, false))
1829                         ret = 0;
1830         }
1831
1832         return ret;
1833 }
1834
1835 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1836 {
1837         return kvm_get_msr_ignored_check(vcpu, index, data, false);
1838 }
1839 EXPORT_SYMBOL_GPL(kvm_get_msr);
1840
1841 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1842 {
1843         return kvm_set_msr_ignored_check(vcpu, index, data, false);
1844 }
1845 EXPORT_SYMBOL_GPL(kvm_set_msr);
1846
1847 static void complete_userspace_rdmsr(struct kvm_vcpu *vcpu)
1848 {
1849         if (!vcpu->run->msr.error) {
1850                 kvm_rax_write(vcpu, (u32)vcpu->run->msr.data);
1851                 kvm_rdx_write(vcpu, vcpu->run->msr.data >> 32);
1852         }
1853 }
1854
1855 static int complete_emulated_msr_access(struct kvm_vcpu *vcpu)
1856 {
1857         return complete_emulated_insn_gp(vcpu, vcpu->run->msr.error);
1858 }
1859
1860 static int complete_emulated_rdmsr(struct kvm_vcpu *vcpu)
1861 {
1862         complete_userspace_rdmsr(vcpu);
1863         return complete_emulated_msr_access(vcpu);
1864 }
1865
1866 static int complete_fast_msr_access(struct kvm_vcpu *vcpu)
1867 {
1868         return static_call(kvm_x86_complete_emulated_msr)(vcpu, vcpu->run->msr.error);
1869 }
1870
1871 static int complete_fast_rdmsr(struct kvm_vcpu *vcpu)
1872 {
1873         complete_userspace_rdmsr(vcpu);
1874         return complete_fast_msr_access(vcpu);
1875 }
1876
1877 static u64 kvm_msr_reason(int r)
1878 {
1879         switch (r) {
1880         case KVM_MSR_RET_INVALID:
1881                 return KVM_MSR_EXIT_REASON_UNKNOWN;
1882         case KVM_MSR_RET_FILTERED:
1883                 return KVM_MSR_EXIT_REASON_FILTER;
1884         default:
1885                 return KVM_MSR_EXIT_REASON_INVAL;
1886         }
1887 }
1888
1889 static int kvm_msr_user_space(struct kvm_vcpu *vcpu, u32 index,
1890                               u32 exit_reason, u64 data,
1891                               int (*completion)(struct kvm_vcpu *vcpu),
1892                               int r)
1893 {
1894         u64 msr_reason = kvm_msr_reason(r);
1895
1896         /* Check if the user wanted to know about this MSR fault */
1897         if (!(vcpu->kvm->arch.user_space_msr_mask & msr_reason))
1898                 return 0;
1899
1900         vcpu->run->exit_reason = exit_reason;
1901         vcpu->run->msr.error = 0;
1902         memset(vcpu->run->msr.pad, 0, sizeof(vcpu->run->msr.pad));
1903         vcpu->run->msr.reason = msr_reason;
1904         vcpu->run->msr.index = index;
1905         vcpu->run->msr.data = data;
1906         vcpu->arch.complete_userspace_io = completion;
1907
1908         return 1;
1909 }
1910
1911 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1912 {
1913         u32 ecx = kvm_rcx_read(vcpu);
1914         u64 data;
1915         int r;
1916
1917         r = kvm_get_msr(vcpu, ecx, &data);
1918
1919         if (!r) {
1920                 trace_kvm_msr_read(ecx, data);
1921
1922                 kvm_rax_write(vcpu, data & -1u);
1923                 kvm_rdx_write(vcpu, (data >> 32) & -1u);
1924         } else {
1925                 /* MSR read failed? See if we should ask user space */
1926                 if (kvm_msr_user_space(vcpu, ecx, KVM_EXIT_X86_RDMSR, 0,
1927                                        complete_fast_rdmsr, r))
1928                         return 0;
1929                 trace_kvm_msr_read_ex(ecx);
1930         }
1931
1932         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1933 }
1934 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1935
1936 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1937 {
1938         u32 ecx = kvm_rcx_read(vcpu);
1939         u64 data = kvm_read_edx_eax(vcpu);
1940         int r;
1941
1942         r = kvm_set_msr(vcpu, ecx, data);
1943
1944         if (!r) {
1945                 trace_kvm_msr_write(ecx, data);
1946         } else {
1947                 /* MSR write failed? See if we should ask user space */
1948                 if (kvm_msr_user_space(vcpu, ecx, KVM_EXIT_X86_WRMSR, data,
1949                                        complete_fast_msr_access, r))
1950                         return 0;
1951                 /* Signal all other negative errors to userspace */
1952                 if (r < 0)
1953                         return r;
1954                 trace_kvm_msr_write_ex(ecx, data);
1955         }
1956
1957         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1958 }
1959 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1960
1961 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu)
1962 {
1963         return kvm_skip_emulated_instruction(vcpu);
1964 }
1965 EXPORT_SYMBOL_GPL(kvm_emulate_as_nop);
1966
1967 int kvm_emulate_invd(struct kvm_vcpu *vcpu)
1968 {
1969         /* Treat an INVD instruction as a NOP and just skip it. */
1970         return kvm_emulate_as_nop(vcpu);
1971 }
1972 EXPORT_SYMBOL_GPL(kvm_emulate_invd);
1973
1974 int kvm_emulate_mwait(struct kvm_vcpu *vcpu)
1975 {
1976         pr_warn_once("kvm: MWAIT instruction emulated as NOP!\n");
1977         return kvm_emulate_as_nop(vcpu);
1978 }
1979 EXPORT_SYMBOL_GPL(kvm_emulate_mwait);
1980
1981 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu)
1982 {
1983         kvm_queue_exception(vcpu, UD_VECTOR);
1984         return 1;
1985 }
1986 EXPORT_SYMBOL_GPL(kvm_handle_invalid_op);
1987
1988 int kvm_emulate_monitor(struct kvm_vcpu *vcpu)
1989 {
1990         pr_warn_once("kvm: MONITOR instruction emulated as NOP!\n");
1991         return kvm_emulate_as_nop(vcpu);
1992 }
1993 EXPORT_SYMBOL_GPL(kvm_emulate_monitor);
1994
1995 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu)
1996 {
1997         xfer_to_guest_mode_prepare();
1998         return vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu) ||
1999                 xfer_to_guest_mode_work_pending();
2000 }
2001
2002 /*
2003  * The fast path for frequent and performance sensitive wrmsr emulation,
2004  * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
2005  * the latency of virtual IPI by avoiding the expensive bits of transitioning
2006  * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
2007  * other cases which must be called after interrupts are enabled on the host.
2008  */
2009 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
2010 {
2011         if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic))
2012                 return 1;
2013
2014         if (((data & APIC_SHORT_MASK) == APIC_DEST_NOSHORT) &&
2015                 ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
2016                 ((data & APIC_MODE_MASK) == APIC_DM_FIXED) &&
2017                 ((u32)(data >> 32) != X2APIC_BROADCAST)) {
2018
2019                 data &= ~(1 << 12);
2020                 kvm_apic_send_ipi(vcpu->arch.apic, (u32)data, (u32)(data >> 32));
2021                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR2, (u32)(data >> 32));
2022                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR, (u32)data);
2023                 trace_kvm_apic_write(APIC_ICR, (u32)data);
2024                 return 0;
2025         }
2026
2027         return 1;
2028 }
2029
2030 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
2031 {
2032         if (!kvm_can_use_hv_timer(vcpu))
2033                 return 1;
2034
2035         kvm_set_lapic_tscdeadline_msr(vcpu, data);
2036         return 0;
2037 }
2038
2039 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
2040 {
2041         u32 msr = kvm_rcx_read(vcpu);
2042         u64 data;
2043         fastpath_t ret = EXIT_FASTPATH_NONE;
2044
2045         switch (msr) {
2046         case APIC_BASE_MSR + (APIC_ICR >> 4):
2047                 data = kvm_read_edx_eax(vcpu);
2048                 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu, data)) {
2049                         kvm_skip_emulated_instruction(vcpu);
2050                         ret = EXIT_FASTPATH_EXIT_HANDLED;
2051                 }
2052                 break;
2053         case MSR_IA32_TSC_DEADLINE:
2054                 data = kvm_read_edx_eax(vcpu);
2055                 if (!handle_fastpath_set_tscdeadline(vcpu, data)) {
2056                         kvm_skip_emulated_instruction(vcpu);
2057                         ret = EXIT_FASTPATH_REENTER_GUEST;
2058                 }
2059                 break;
2060         default:
2061                 break;
2062         }
2063
2064         if (ret != EXIT_FASTPATH_NONE)
2065                 trace_kvm_msr_write(msr, data);
2066
2067         return ret;
2068 }
2069 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
2070
2071 /*
2072  * Adapt set_msr() to msr_io()'s calling convention
2073  */
2074 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2075 {
2076         return kvm_get_msr_ignored_check(vcpu, index, data, true);
2077 }
2078
2079 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2080 {
2081         return kvm_set_msr_ignored_check(vcpu, index, *data, true);
2082 }
2083
2084 #ifdef CONFIG_X86_64
2085 struct pvclock_clock {
2086         int vclock_mode;
2087         u64 cycle_last;
2088         u64 mask;
2089         u32 mult;
2090         u32 shift;
2091         u64 base_cycles;
2092         u64 offset;
2093 };
2094
2095 struct pvclock_gtod_data {
2096         seqcount_t      seq;
2097
2098         struct pvclock_clock clock; /* extract of a clocksource struct */
2099         struct pvclock_clock raw_clock; /* extract of a clocksource struct */
2100
2101         ktime_t         offs_boot;
2102         u64             wall_time_sec;
2103 };
2104
2105 static struct pvclock_gtod_data pvclock_gtod_data;
2106
2107 static void update_pvclock_gtod(struct timekeeper *tk)
2108 {
2109         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
2110
2111         write_seqcount_begin(&vdata->seq);
2112
2113         /* copy pvclock gtod data */
2114         vdata->clock.vclock_mode        = tk->tkr_mono.clock->vdso_clock_mode;
2115         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
2116         vdata->clock.mask               = tk->tkr_mono.mask;
2117         vdata->clock.mult               = tk->tkr_mono.mult;
2118         vdata->clock.shift              = tk->tkr_mono.shift;
2119         vdata->clock.base_cycles        = tk->tkr_mono.xtime_nsec;
2120         vdata->clock.offset             = tk->tkr_mono.base;
2121
2122         vdata->raw_clock.vclock_mode    = tk->tkr_raw.clock->vdso_clock_mode;
2123         vdata->raw_clock.cycle_last     = tk->tkr_raw.cycle_last;
2124         vdata->raw_clock.mask           = tk->tkr_raw.mask;
2125         vdata->raw_clock.mult           = tk->tkr_raw.mult;
2126         vdata->raw_clock.shift          = tk->tkr_raw.shift;
2127         vdata->raw_clock.base_cycles    = tk->tkr_raw.xtime_nsec;
2128         vdata->raw_clock.offset         = tk->tkr_raw.base;
2129
2130         vdata->wall_time_sec            = tk->xtime_sec;
2131
2132         vdata->offs_boot                = tk->offs_boot;
2133
2134         write_seqcount_end(&vdata->seq);
2135 }
2136
2137 static s64 get_kvmclock_base_ns(void)
2138 {
2139         /* Count up from boot time, but with the frequency of the raw clock.  */
2140         return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot));
2141 }
2142 #else
2143 static s64 get_kvmclock_base_ns(void)
2144 {
2145         /* Master clock not used, so we can just use CLOCK_BOOTTIME.  */
2146         return ktime_get_boottime_ns();
2147 }
2148 #endif
2149
2150 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock, int sec_hi_ofs)
2151 {
2152         int version;
2153         int r;
2154         struct pvclock_wall_clock wc;
2155         u32 wc_sec_hi;
2156         u64 wall_nsec;
2157
2158         if (!wall_clock)
2159                 return;
2160
2161         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
2162         if (r)
2163                 return;
2164
2165         if (version & 1)
2166                 ++version;  /* first time write, random junk */
2167
2168         ++version;
2169
2170         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
2171                 return;
2172
2173         /*
2174          * The guest calculates current wall clock time by adding
2175          * system time (updated by kvm_guest_time_update below) to the
2176          * wall clock specified here.  We do the reverse here.
2177          */
2178         wall_nsec = ktime_get_real_ns() - get_kvmclock_ns(kvm);
2179
2180         wc.nsec = do_div(wall_nsec, 1000000000);
2181         wc.sec = (u32)wall_nsec; /* overflow in 2106 guest time */
2182         wc.version = version;
2183
2184         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
2185
2186         if (sec_hi_ofs) {
2187                 wc_sec_hi = wall_nsec >> 32;
2188                 kvm_write_guest(kvm, wall_clock + sec_hi_ofs,
2189                                 &wc_sec_hi, sizeof(wc_sec_hi));
2190         }
2191
2192         version++;
2193         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
2194 }
2195
2196 static void kvm_write_system_time(struct kvm_vcpu *vcpu, gpa_t system_time,
2197                                   bool old_msr, bool host_initiated)
2198 {
2199         struct kvm_arch *ka = &vcpu->kvm->arch;
2200
2201         if (vcpu->vcpu_id == 0 && !host_initiated) {
2202                 if (ka->boot_vcpu_runs_old_kvmclock != old_msr)
2203                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2204
2205                 ka->boot_vcpu_runs_old_kvmclock = old_msr;
2206         }
2207
2208         vcpu->arch.time = system_time;
2209         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2210
2211         /* we verify if the enable bit is set... */
2212         vcpu->arch.pv_time_enabled = false;
2213         if (!(system_time & 1))
2214                 return;
2215
2216         if (!kvm_gfn_to_hva_cache_init(vcpu->kvm,
2217                                        &vcpu->arch.pv_time, system_time & ~1ULL,
2218                                        sizeof(struct pvclock_vcpu_time_info)))
2219                 vcpu->arch.pv_time_enabled = true;
2220
2221         return;
2222 }
2223
2224 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
2225 {
2226         do_shl32_div32(dividend, divisor);
2227         return dividend;
2228 }
2229
2230 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
2231                                s8 *pshift, u32 *pmultiplier)
2232 {
2233         uint64_t scaled64;
2234         int32_t  shift = 0;
2235         uint64_t tps64;
2236         uint32_t tps32;
2237
2238         tps64 = base_hz;
2239         scaled64 = scaled_hz;
2240         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
2241                 tps64 >>= 1;
2242                 shift--;
2243         }
2244
2245         tps32 = (uint32_t)tps64;
2246         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
2247                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
2248                         scaled64 >>= 1;
2249                 else
2250                         tps32 <<= 1;
2251                 shift++;
2252         }
2253
2254         *pshift = shift;
2255         *pmultiplier = div_frac(scaled64, tps32);
2256 }
2257
2258 #ifdef CONFIG_X86_64
2259 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
2260 #endif
2261
2262 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
2263 static unsigned long max_tsc_khz;
2264
2265 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
2266 {
2267         u64 v = (u64)khz * (1000000 + ppm);
2268         do_div(v, 1000000);
2269         return v;
2270 }
2271
2272 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier);
2273
2274 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
2275 {
2276         u64 ratio;
2277
2278         /* Guest TSC same frequency as host TSC? */
2279         if (!scale) {
2280                 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2281                 return 0;
2282         }
2283
2284         /* TSC scaling supported? */
2285         if (!kvm_has_tsc_control) {
2286                 if (user_tsc_khz > tsc_khz) {
2287                         vcpu->arch.tsc_catchup = 1;
2288                         vcpu->arch.tsc_always_catchup = 1;
2289                         return 0;
2290                 } else {
2291                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2292                         return -1;
2293                 }
2294         }
2295
2296         /* TSC scaling required  - calculate ratio */
2297         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
2298                                 user_tsc_khz, tsc_khz);
2299
2300         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
2301                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2302                                     user_tsc_khz);
2303                 return -1;
2304         }
2305
2306         kvm_vcpu_write_tsc_multiplier(vcpu, ratio);
2307         return 0;
2308 }
2309
2310 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
2311 {
2312         u32 thresh_lo, thresh_hi;
2313         int use_scaling = 0;
2314
2315         /* tsc_khz can be zero if TSC calibration fails */
2316         if (user_tsc_khz == 0) {
2317                 /* set tsc_scaling_ratio to a safe value */
2318                 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2319                 return -1;
2320         }
2321
2322         /* Compute a scale to convert nanoseconds in TSC cycles */
2323         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
2324                            &vcpu->arch.virtual_tsc_shift,
2325                            &vcpu->arch.virtual_tsc_mult);
2326         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
2327
2328         /*
2329          * Compute the variation in TSC rate which is acceptable
2330          * within the range of tolerance and decide if the
2331          * rate being applied is within that bounds of the hardware
2332          * rate.  If so, no scaling or compensation need be done.
2333          */
2334         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
2335         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
2336         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
2337                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
2338                 use_scaling = 1;
2339         }
2340         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
2341 }
2342
2343 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
2344 {
2345         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
2346                                       vcpu->arch.virtual_tsc_mult,
2347                                       vcpu->arch.virtual_tsc_shift);
2348         tsc += vcpu->arch.this_tsc_write;
2349         return tsc;
2350 }
2351
2352 static inline int gtod_is_based_on_tsc(int mode)
2353 {
2354         return mode == VDSO_CLOCKMODE_TSC || mode == VDSO_CLOCKMODE_HVCLOCK;
2355 }
2356
2357 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
2358 {
2359 #ifdef CONFIG_X86_64
2360         bool vcpus_matched;
2361         struct kvm_arch *ka = &vcpu->kvm->arch;
2362         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2363
2364         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2365                          atomic_read(&vcpu->kvm->online_vcpus));
2366
2367         /*
2368          * Once the masterclock is enabled, always perform request in
2369          * order to update it.
2370          *
2371          * In order to enable masterclock, the host clocksource must be TSC
2372          * and the vcpus need to have matched TSCs.  When that happens,
2373          * perform request to enable masterclock.
2374          */
2375         if (ka->use_master_clock ||
2376             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
2377                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2378
2379         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
2380                             atomic_read(&vcpu->kvm->online_vcpus),
2381                             ka->use_master_clock, gtod->clock.vclock_mode);
2382 #endif
2383 }
2384
2385 /*
2386  * Multiply tsc by a fixed point number represented by ratio.
2387  *
2388  * The most significant 64-N bits (mult) of ratio represent the
2389  * integral part of the fixed point number; the remaining N bits
2390  * (frac) represent the fractional part, ie. ratio represents a fixed
2391  * point number (mult + frac * 2^(-N)).
2392  *
2393  * N equals to kvm_tsc_scaling_ratio_frac_bits.
2394  */
2395 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
2396 {
2397         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
2398 }
2399
2400 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc, u64 ratio)
2401 {
2402         u64 _tsc = tsc;
2403
2404         if (ratio != kvm_default_tsc_scaling_ratio)
2405                 _tsc = __scale_tsc(ratio, tsc);
2406
2407         return _tsc;
2408 }
2409 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
2410
2411 static u64 kvm_compute_l1_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
2412 {
2413         u64 tsc;
2414
2415         tsc = kvm_scale_tsc(vcpu, rdtsc(), vcpu->arch.l1_tsc_scaling_ratio);
2416
2417         return target_tsc - tsc;
2418 }
2419
2420 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
2421 {
2422         return vcpu->arch.l1_tsc_offset +
2423                 kvm_scale_tsc(vcpu, host_tsc, vcpu->arch.l1_tsc_scaling_ratio);
2424 }
2425 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
2426
2427 u64 kvm_calc_nested_tsc_offset(u64 l1_offset, u64 l2_offset, u64 l2_multiplier)
2428 {
2429         u64 nested_offset;
2430
2431         if (l2_multiplier == kvm_default_tsc_scaling_ratio)
2432                 nested_offset = l1_offset;
2433         else
2434                 nested_offset = mul_s64_u64_shr((s64) l1_offset, l2_multiplier,
2435                                                 kvm_tsc_scaling_ratio_frac_bits);
2436
2437         nested_offset += l2_offset;
2438         return nested_offset;
2439 }
2440 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_offset);
2441
2442 u64 kvm_calc_nested_tsc_multiplier(u64 l1_multiplier, u64 l2_multiplier)
2443 {
2444         if (l2_multiplier != kvm_default_tsc_scaling_ratio)
2445                 return mul_u64_u64_shr(l1_multiplier, l2_multiplier,
2446                                        kvm_tsc_scaling_ratio_frac_bits);
2447
2448         return l1_multiplier;
2449 }
2450 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_multiplier);
2451
2452 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 l1_offset)
2453 {
2454         trace_kvm_write_tsc_offset(vcpu->vcpu_id,
2455                                    vcpu->arch.l1_tsc_offset,
2456                                    l1_offset);
2457
2458         vcpu->arch.l1_tsc_offset = l1_offset;
2459
2460         /*
2461          * If we are here because L1 chose not to trap WRMSR to TSC then
2462          * according to the spec this should set L1's TSC (as opposed to
2463          * setting L1's offset for L2).
2464          */
2465         if (is_guest_mode(vcpu))
2466                 vcpu->arch.tsc_offset = kvm_calc_nested_tsc_offset(
2467                         l1_offset,
2468                         static_call(kvm_x86_get_l2_tsc_offset)(vcpu),
2469                         static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2470         else
2471                 vcpu->arch.tsc_offset = l1_offset;
2472
2473         static_call(kvm_x86_write_tsc_offset)(vcpu, vcpu->arch.tsc_offset);
2474 }
2475
2476 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier)
2477 {
2478         vcpu->arch.l1_tsc_scaling_ratio = l1_multiplier;
2479
2480         /* Userspace is changing the multiplier while L2 is active */
2481         if (is_guest_mode(vcpu))
2482                 vcpu->arch.tsc_scaling_ratio = kvm_calc_nested_tsc_multiplier(
2483                         l1_multiplier,
2484                         static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2485         else
2486                 vcpu->arch.tsc_scaling_ratio = l1_multiplier;
2487
2488         if (kvm_has_tsc_control)
2489                 static_call(kvm_x86_write_tsc_multiplier)(
2490                         vcpu, vcpu->arch.tsc_scaling_ratio);
2491 }
2492
2493 static inline bool kvm_check_tsc_unstable(void)
2494 {
2495 #ifdef CONFIG_X86_64
2496         /*
2497          * TSC is marked unstable when we're running on Hyper-V,
2498          * 'TSC page' clocksource is good.
2499          */
2500         if (pvclock_gtod_data.clock.vclock_mode == VDSO_CLOCKMODE_HVCLOCK)
2501                 return false;
2502 #endif
2503         return check_tsc_unstable();
2504 }
2505
2506 /*
2507  * Infers attempts to synchronize the guest's tsc from host writes. Sets the
2508  * offset for the vcpu and tracks the TSC matching generation that the vcpu
2509  * participates in.
2510  */
2511 static void __kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 offset, u64 tsc,
2512                                   u64 ns, bool matched)
2513 {
2514         struct kvm *kvm = vcpu->kvm;
2515
2516         lockdep_assert_held(&kvm->arch.tsc_write_lock);
2517
2518         /*
2519          * We also track th most recent recorded KHZ, write and time to
2520          * allow the matching interval to be extended at each write.
2521          */
2522         kvm->arch.last_tsc_nsec = ns;
2523         kvm->arch.last_tsc_write = tsc;
2524         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2525         kvm->arch.last_tsc_offset = offset;
2526
2527         vcpu->arch.last_guest_tsc = tsc;
2528
2529         kvm_vcpu_write_tsc_offset(vcpu, offset);
2530
2531         if (!matched) {
2532                 /*
2533                  * We split periods of matched TSC writes into generations.
2534                  * For each generation, we track the original measured
2535                  * nanosecond time, offset, and write, so if TSCs are in
2536                  * sync, we can match exact offset, and if not, we can match
2537                  * exact software computation in compute_guest_tsc()
2538                  *
2539                  * These values are tracked in kvm->arch.cur_xxx variables.
2540                  */
2541                 kvm->arch.cur_tsc_generation++;
2542                 kvm->arch.cur_tsc_nsec = ns;
2543                 kvm->arch.cur_tsc_write = tsc;
2544                 kvm->arch.cur_tsc_offset = offset;
2545                 kvm->arch.nr_vcpus_matched_tsc = 0;
2546         } else if (vcpu->arch.this_tsc_generation != kvm->arch.cur_tsc_generation) {
2547                 kvm->arch.nr_vcpus_matched_tsc++;
2548         }
2549
2550         /* Keep track of which generation this VCPU has synchronized to */
2551         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2552         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2553         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2554
2555         kvm_track_tsc_matching(vcpu);
2556 }
2557
2558 static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 data)
2559 {
2560         struct kvm *kvm = vcpu->kvm;
2561         u64 offset, ns, elapsed;
2562         unsigned long flags;
2563         bool matched = false;
2564         bool synchronizing = false;
2565
2566         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
2567         offset = kvm_compute_l1_tsc_offset(vcpu, data);
2568         ns = get_kvmclock_base_ns();
2569         elapsed = ns - kvm->arch.last_tsc_nsec;
2570
2571         if (vcpu->arch.virtual_tsc_khz) {
2572                 if (data == 0) {
2573                         /*
2574                          * detection of vcpu initialization -- need to sync
2575                          * with other vCPUs. This particularly helps to keep
2576                          * kvm_clock stable after CPU hotplug
2577                          */
2578                         synchronizing = true;
2579                 } else {
2580                         u64 tsc_exp = kvm->arch.last_tsc_write +
2581                                                 nsec_to_cycles(vcpu, elapsed);
2582                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
2583                         /*
2584                          * Special case: TSC write with a small delta (1 second)
2585                          * of virtual cycle time against real time is
2586                          * interpreted as an attempt to synchronize the CPU.
2587                          */
2588                         synchronizing = data < tsc_exp + tsc_hz &&
2589                                         data + tsc_hz > tsc_exp;
2590                 }
2591         }
2592
2593         /*
2594          * For a reliable TSC, we can match TSC offsets, and for an unstable
2595          * TSC, we add elapsed time in this computation.  We could let the
2596          * compensation code attempt to catch up if we fall behind, but
2597          * it's better to try to match offsets from the beginning.
2598          */
2599         if (synchronizing &&
2600             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
2601                 if (!kvm_check_tsc_unstable()) {
2602                         offset = kvm->arch.cur_tsc_offset;
2603                 } else {
2604                         u64 delta = nsec_to_cycles(vcpu, elapsed);
2605                         data += delta;
2606                         offset = kvm_compute_l1_tsc_offset(vcpu, data);
2607                 }
2608                 matched = true;
2609         }
2610
2611         __kvm_synchronize_tsc(vcpu, offset, data, ns, matched);
2612         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2613 }
2614
2615 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2616                                            s64 adjustment)
2617 {
2618         u64 tsc_offset = vcpu->arch.l1_tsc_offset;
2619         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2620 }
2621
2622 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2623 {
2624         if (vcpu->arch.l1_tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
2625                 WARN_ON(adjustment < 0);
2626         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment,
2627                                    vcpu->arch.l1_tsc_scaling_ratio);
2628         adjust_tsc_offset_guest(vcpu, adjustment);
2629 }
2630
2631 #ifdef CONFIG_X86_64
2632
2633 static u64 read_tsc(void)
2634 {
2635         u64 ret = (u64)rdtsc_ordered();
2636         u64 last = pvclock_gtod_data.clock.cycle_last;
2637
2638         if (likely(ret >= last))
2639                 return ret;
2640
2641         /*
2642          * GCC likes to generate cmov here, but this branch is extremely
2643          * predictable (it's just a function of time and the likely is
2644          * very likely) and there's a data dependence, so force GCC
2645          * to generate a branch instead.  I don't barrier() because
2646          * we don't actually need a barrier, and if this function
2647          * ever gets inlined it will generate worse code.
2648          */
2649         asm volatile ("");
2650         return last;
2651 }
2652
2653 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2654                           int *mode)
2655 {
2656         long v;
2657         u64 tsc_pg_val;
2658
2659         switch (clock->vclock_mode) {
2660         case VDSO_CLOCKMODE_HVCLOCK:
2661                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2662                                                   tsc_timestamp);
2663                 if (tsc_pg_val != U64_MAX) {
2664                         /* TSC page valid */
2665                         *mode = VDSO_CLOCKMODE_HVCLOCK;
2666                         v = (tsc_pg_val - clock->cycle_last) &
2667                                 clock->mask;
2668                 } else {
2669                         /* TSC page invalid */
2670                         *mode = VDSO_CLOCKMODE_NONE;
2671                 }
2672                 break;
2673         case VDSO_CLOCKMODE_TSC:
2674                 *mode = VDSO_CLOCKMODE_TSC;
2675                 *tsc_timestamp = read_tsc();
2676                 v = (*tsc_timestamp - clock->cycle_last) &
2677                         clock->mask;
2678                 break;
2679         default:
2680                 *mode = VDSO_CLOCKMODE_NONE;
2681         }
2682
2683         if (*mode == VDSO_CLOCKMODE_NONE)
2684                 *tsc_timestamp = v = 0;
2685
2686         return v * clock->mult;
2687 }
2688
2689 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2690 {
2691         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2692         unsigned long seq;
2693         int mode;
2694         u64 ns;
2695
2696         do {
2697                 seq = read_seqcount_begin(&gtod->seq);
2698                 ns = gtod->raw_clock.base_cycles;
2699                 ns += vgettsc(&gtod->raw_clock, tsc_timestamp, &mode);
2700                 ns >>= gtod->raw_clock.shift;
2701                 ns += ktime_to_ns(ktime_add(gtod->raw_clock.offset, gtod->offs_boot));
2702         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2703         *t = ns;
2704
2705         return mode;
2706 }
2707
2708 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2709 {
2710         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2711         unsigned long seq;
2712         int mode;
2713         u64 ns;
2714
2715         do {
2716                 seq = read_seqcount_begin(&gtod->seq);
2717                 ts->tv_sec = gtod->wall_time_sec;
2718                 ns = gtod->clock.base_cycles;
2719                 ns += vgettsc(&gtod->clock, tsc_timestamp, &mode);
2720                 ns >>= gtod->clock.shift;
2721         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2722
2723         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2724         ts->tv_nsec = ns;
2725
2726         return mode;
2727 }
2728
2729 /* returns true if host is using TSC based clocksource */
2730 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2731 {
2732         /* checked again under seqlock below */
2733         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2734                 return false;
2735
2736         return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2737                                                       tsc_timestamp));
2738 }
2739
2740 /* returns true if host is using TSC based clocksource */
2741 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2742                                            u64 *tsc_timestamp)
2743 {
2744         /* checked again under seqlock below */
2745         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2746                 return false;
2747
2748         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2749 }
2750 #endif
2751
2752 /*
2753  *
2754  * Assuming a stable TSC across physical CPUS, and a stable TSC
2755  * across virtual CPUs, the following condition is possible.
2756  * Each numbered line represents an event visible to both
2757  * CPUs at the next numbered event.
2758  *
2759  * "timespecX" represents host monotonic time. "tscX" represents
2760  * RDTSC value.
2761  *
2762  *              VCPU0 on CPU0           |       VCPU1 on CPU1
2763  *
2764  * 1.  read timespec0,tsc0
2765  * 2.                                   | timespec1 = timespec0 + N
2766  *                                      | tsc1 = tsc0 + M
2767  * 3. transition to guest               | transition to guest
2768  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2769  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2770  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2771  *
2772  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2773  *
2774  *      - ret0 < ret1
2775  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2776  *              ...
2777  *      - 0 < N - M => M < N
2778  *
2779  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2780  * always the case (the difference between two distinct xtime instances
2781  * might be smaller then the difference between corresponding TSC reads,
2782  * when updating guest vcpus pvclock areas).
2783  *
2784  * To avoid that problem, do not allow visibility of distinct
2785  * system_timestamp/tsc_timestamp values simultaneously: use a master
2786  * copy of host monotonic time values. Update that master copy
2787  * in lockstep.
2788  *
2789  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2790  *
2791  */
2792
2793 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2794 {
2795 #ifdef CONFIG_X86_64
2796         struct kvm_arch *ka = &kvm->arch;
2797         int vclock_mode;
2798         bool host_tsc_clocksource, vcpus_matched;
2799
2800         lockdep_assert_held(&kvm->arch.tsc_write_lock);
2801         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2802                         atomic_read(&kvm->online_vcpus));
2803
2804         /*
2805          * If the host uses TSC clock, then passthrough TSC as stable
2806          * to the guest.
2807          */
2808         host_tsc_clocksource = kvm_get_time_and_clockread(
2809                                         &ka->master_kernel_ns,
2810                                         &ka->master_cycle_now);
2811
2812         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2813                                 && !ka->backwards_tsc_observed
2814                                 && !ka->boot_vcpu_runs_old_kvmclock;
2815
2816         if (ka->use_master_clock)
2817                 atomic_set(&kvm_guest_has_master_clock, 1);
2818
2819         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2820         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2821                                         vcpus_matched);
2822 #endif
2823 }
2824
2825 static void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2826 {
2827         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2828 }
2829
2830 static void __kvm_start_pvclock_update(struct kvm *kvm)
2831 {
2832         raw_spin_lock_irq(&kvm->arch.tsc_write_lock);
2833         write_seqcount_begin(&kvm->arch.pvclock_sc);
2834 }
2835
2836 static void kvm_start_pvclock_update(struct kvm *kvm)
2837 {
2838         kvm_make_mclock_inprogress_request(kvm);
2839
2840         /* no guest entries from this point */
2841         __kvm_start_pvclock_update(kvm);
2842 }
2843
2844 static void kvm_end_pvclock_update(struct kvm *kvm)
2845 {
2846         struct kvm_arch *ka = &kvm->arch;
2847         struct kvm_vcpu *vcpu;
2848         unsigned long i;
2849
2850         write_seqcount_end(&ka->pvclock_sc);
2851         raw_spin_unlock_irq(&ka->tsc_write_lock);
2852         kvm_for_each_vcpu(i, vcpu, kvm)
2853                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2854
2855         /* guest entries allowed */
2856         kvm_for_each_vcpu(i, vcpu, kvm)
2857                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2858 }
2859
2860 static void kvm_update_masterclock(struct kvm *kvm)
2861 {
2862         kvm_hv_invalidate_tsc_page(kvm);
2863         kvm_start_pvclock_update(kvm);
2864         pvclock_update_vm_gtod_copy(kvm);
2865         kvm_end_pvclock_update(kvm);
2866 }
2867
2868 /* Called within read_seqcount_begin/retry for kvm->pvclock_sc.  */
2869 static void __get_kvmclock(struct kvm *kvm, struct kvm_clock_data *data)
2870 {
2871         struct kvm_arch *ka = &kvm->arch;
2872         struct pvclock_vcpu_time_info hv_clock;
2873
2874         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2875         get_cpu();
2876
2877         data->flags = 0;
2878         if (ka->use_master_clock && __this_cpu_read(cpu_tsc_khz)) {
2879 #ifdef CONFIG_X86_64
2880                 struct timespec64 ts;
2881
2882                 if (kvm_get_walltime_and_clockread(&ts, &data->host_tsc)) {
2883                         data->realtime = ts.tv_nsec + NSEC_PER_SEC * ts.tv_sec;
2884                         data->flags |= KVM_CLOCK_REALTIME | KVM_CLOCK_HOST_TSC;
2885                 } else
2886 #endif
2887                 data->host_tsc = rdtsc();
2888
2889                 data->flags |= KVM_CLOCK_TSC_STABLE;
2890                 hv_clock.tsc_timestamp = ka->master_cycle_now;
2891                 hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2892                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2893                                    &hv_clock.tsc_shift,
2894                                    &hv_clock.tsc_to_system_mul);
2895                 data->clock = __pvclock_read_cycles(&hv_clock, data->host_tsc);
2896         } else {
2897                 data->clock = get_kvmclock_base_ns() + ka->kvmclock_offset;
2898         }
2899
2900         put_cpu();
2901 }
2902
2903 static void get_kvmclock(struct kvm *kvm, struct kvm_clock_data *data)
2904 {
2905         struct kvm_arch *ka = &kvm->arch;
2906         unsigned seq;
2907
2908         do {
2909                 seq = read_seqcount_begin(&ka->pvclock_sc);
2910                 __get_kvmclock(kvm, data);
2911         } while (read_seqcount_retry(&ka->pvclock_sc, seq));
2912 }
2913
2914 u64 get_kvmclock_ns(struct kvm *kvm)
2915 {
2916         struct kvm_clock_data data;
2917
2918         get_kvmclock(kvm, &data);
2919         return data.clock;
2920 }
2921
2922 static void kvm_setup_pvclock_page(struct kvm_vcpu *v,
2923                                    struct gfn_to_hva_cache *cache,
2924                                    unsigned int offset)
2925 {
2926         struct kvm_vcpu_arch *vcpu = &v->arch;
2927         struct pvclock_vcpu_time_info guest_hv_clock;
2928
2929         if (unlikely(kvm_read_guest_offset_cached(v->kvm, cache,
2930                 &guest_hv_clock, offset, sizeof(guest_hv_clock))))
2931                 return;
2932
2933         /* This VCPU is paused, but it's legal for a guest to read another
2934          * VCPU's kvmclock, so we really have to follow the specification where
2935          * it says that version is odd if data is being modified, and even after
2936          * it is consistent.
2937          *
2938          * Version field updates must be kept separate.  This is because
2939          * kvm_write_guest_cached might use a "rep movs" instruction, and
2940          * writes within a string instruction are weakly ordered.  So there
2941          * are three writes overall.
2942          *
2943          * As a small optimization, only write the version field in the first
2944          * and third write.  The vcpu->pv_time cache is still valid, because the
2945          * version field is the first in the struct.
2946          */
2947         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2948
2949         if (guest_hv_clock.version & 1)
2950                 ++guest_hv_clock.version;  /* first time write, random junk */
2951
2952         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2953         kvm_write_guest_offset_cached(v->kvm, cache,
2954                                       &vcpu->hv_clock, offset,
2955                                       sizeof(vcpu->hv_clock.version));
2956
2957         smp_wmb();
2958
2959         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2960         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2961
2962         if (vcpu->pvclock_set_guest_stopped_request) {
2963                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2964                 vcpu->pvclock_set_guest_stopped_request = false;
2965         }
2966
2967         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2968
2969         kvm_write_guest_offset_cached(v->kvm, cache,
2970                                       &vcpu->hv_clock, offset,
2971                                       sizeof(vcpu->hv_clock));
2972
2973         smp_wmb();
2974
2975         vcpu->hv_clock.version++;
2976         kvm_write_guest_offset_cached(v->kvm, cache,
2977                                      &vcpu->hv_clock, offset,
2978                                      sizeof(vcpu->hv_clock.version));
2979 }
2980
2981 static int kvm_guest_time_update(struct kvm_vcpu *v)
2982 {
2983         unsigned long flags, tgt_tsc_khz;
2984         unsigned seq;
2985         struct kvm_vcpu_arch *vcpu = &v->arch;
2986         struct kvm_arch *ka = &v->kvm->arch;
2987         s64 kernel_ns;
2988         u64 tsc_timestamp, host_tsc;
2989         u8 pvclock_flags;
2990         bool use_master_clock;
2991
2992         kernel_ns = 0;
2993         host_tsc = 0;
2994
2995         /*
2996          * If the host uses TSC clock, then passthrough TSC as stable
2997          * to the guest.
2998          */
2999         do {
3000                 seq = read_seqcount_begin(&ka->pvclock_sc);
3001                 use_master_clock = ka->use_master_clock;
3002                 if (use_master_clock) {
3003                         host_tsc = ka->master_cycle_now;
3004                         kernel_ns = ka->master_kernel_ns;
3005                 }
3006         } while (read_seqcount_retry(&ka->pvclock_sc, seq));
3007
3008         /* Keep irq disabled to prevent changes to the clock */
3009         local_irq_save(flags);
3010         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
3011         if (unlikely(tgt_tsc_khz == 0)) {
3012                 local_irq_restore(flags);
3013                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
3014                 return 1;
3015         }
3016         if (!use_master_clock) {
3017                 host_tsc = rdtsc();
3018                 kernel_ns = get_kvmclock_base_ns();
3019         }
3020
3021         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
3022
3023         /*
3024          * We may have to catch up the TSC to match elapsed wall clock
3025          * time for two reasons, even if kvmclock is used.
3026          *   1) CPU could have been running below the maximum TSC rate
3027          *   2) Broken TSC compensation resets the base at each VCPU
3028          *      entry to avoid unknown leaps of TSC even when running
3029          *      again on the same CPU.  This may cause apparent elapsed
3030          *      time to disappear, and the guest to stand still or run
3031          *      very slowly.
3032          */
3033         if (vcpu->tsc_catchup) {
3034                 u64 tsc = compute_guest_tsc(v, kernel_ns);
3035                 if (tsc > tsc_timestamp) {
3036                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
3037                         tsc_timestamp = tsc;
3038                 }
3039         }
3040
3041         local_irq_restore(flags);
3042
3043         /* With all the info we got, fill in the values */
3044
3045         if (kvm_has_tsc_control)
3046                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz,
3047                                             v->arch.l1_tsc_scaling_ratio);
3048
3049         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
3050                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
3051                                    &vcpu->hv_clock.tsc_shift,
3052                                    &vcpu->hv_clock.tsc_to_system_mul);
3053                 vcpu->hw_tsc_khz = tgt_tsc_khz;
3054         }
3055
3056         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
3057         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
3058         vcpu->last_guest_tsc = tsc_timestamp;
3059
3060         /* If the host uses TSC clocksource, then it is stable */
3061         pvclock_flags = 0;
3062         if (use_master_clock)
3063                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
3064
3065         vcpu->hv_clock.flags = pvclock_flags;
3066
3067         if (vcpu->pv_time_enabled)
3068                 kvm_setup_pvclock_page(v, &vcpu->pv_time, 0);
3069         if (vcpu->xen.vcpu_info_set)
3070                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_info_cache,
3071                                        offsetof(struct compat_vcpu_info, time));
3072         if (vcpu->xen.vcpu_time_info_set)
3073                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_time_info_cache, 0);
3074         if (!v->vcpu_idx)
3075                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
3076         return 0;
3077 }
3078
3079 /*
3080  * kvmclock updates which are isolated to a given vcpu, such as
3081  * vcpu->cpu migration, should not allow system_timestamp from
3082  * the rest of the vcpus to remain static. Otherwise ntp frequency
3083  * correction applies to one vcpu's system_timestamp but not
3084  * the others.
3085  *
3086  * So in those cases, request a kvmclock update for all vcpus.
3087  * We need to rate-limit these requests though, as they can
3088  * considerably slow guests that have a large number of vcpus.
3089  * The time for a remote vcpu to update its kvmclock is bound
3090  * by the delay we use to rate-limit the updates.
3091  */
3092
3093 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
3094
3095 static void kvmclock_update_fn(struct work_struct *work)
3096 {
3097         unsigned long i;
3098         struct delayed_work *dwork = to_delayed_work(work);
3099         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
3100                                            kvmclock_update_work);
3101         struct kvm *kvm = container_of(ka, struct kvm, arch);
3102         struct kvm_vcpu *vcpu;
3103
3104         kvm_for_each_vcpu(i, vcpu, kvm) {
3105                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3106                 kvm_vcpu_kick(vcpu);
3107         }
3108 }
3109
3110 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
3111 {
3112         struct kvm *kvm = v->kvm;
3113
3114         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
3115         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
3116                                         KVMCLOCK_UPDATE_DELAY);
3117 }
3118
3119 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
3120
3121 static void kvmclock_sync_fn(struct work_struct *work)
3122 {
3123         struct delayed_work *dwork = to_delayed_work(work);
3124         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
3125                                            kvmclock_sync_work);
3126         struct kvm *kvm = container_of(ka, struct kvm, arch);
3127
3128         if (!kvmclock_periodic_sync)
3129                 return;
3130
3131         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
3132         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
3133                                         KVMCLOCK_SYNC_PERIOD);
3134 }
3135
3136 /*
3137  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
3138  */
3139 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
3140 {
3141         /* McStatusWrEn enabled? */
3142         if (guest_cpuid_is_amd_or_hygon(vcpu))
3143                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
3144
3145         return false;
3146 }
3147
3148 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3149 {
3150         u64 mcg_cap = vcpu->arch.mcg_cap;
3151         unsigned bank_num = mcg_cap & 0xff;
3152         u32 msr = msr_info->index;
3153         u64 data = msr_info->data;
3154
3155         switch (msr) {
3156         case MSR_IA32_MCG_STATUS:
3157                 vcpu->arch.mcg_status = data;
3158                 break;
3159         case MSR_IA32_MCG_CTL:
3160                 if (!(mcg_cap & MCG_CTL_P) &&
3161                     (data || !msr_info->host_initiated))
3162                         return 1;
3163                 if (data != 0 && data != ~(u64)0)
3164                         return 1;
3165                 vcpu->arch.mcg_ctl = data;
3166                 break;
3167         default:
3168                 if (msr >= MSR_IA32_MC0_CTL &&
3169                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3170                         u32 offset = array_index_nospec(
3171                                 msr - MSR_IA32_MC0_CTL,
3172                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3173
3174                         /* only 0 or all 1s can be written to IA32_MCi_CTL
3175                          * some Linux kernels though clear bit 10 in bank 4 to
3176                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
3177                          * this to avoid an uncatched #GP in the guest
3178                          */
3179                         if ((offset & 0x3) == 0 &&
3180                             data != 0 && (data | (1 << 10)) != ~(u64)0)
3181                                 return -1;
3182
3183                         /* MCi_STATUS */
3184                         if (!msr_info->host_initiated &&
3185                             (offset & 0x3) == 1 && data != 0) {
3186                                 if (!can_set_mci_status(vcpu))
3187                                         return -1;
3188                         }
3189
3190                         vcpu->arch.mce_banks[offset] = data;
3191                         break;
3192                 }
3193                 return 1;
3194         }
3195         return 0;
3196 }
3197
3198 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu)
3199 {
3200         u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT;
3201
3202         return (vcpu->arch.apf.msr_en_val & mask) == mask;
3203 }
3204
3205 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
3206 {
3207         gpa_t gpa = data & ~0x3f;
3208
3209         /* Bits 4:5 are reserved, Should be zero */
3210         if (data & 0x30)
3211                 return 1;
3212
3213         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_VMEXIT) &&
3214             (data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT))
3215                 return 1;
3216
3217         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT) &&
3218             (data & KVM_ASYNC_PF_DELIVERY_AS_INT))
3219                 return 1;
3220
3221         if (!lapic_in_kernel(vcpu))
3222                 return data ? 1 : 0;
3223
3224         vcpu->arch.apf.msr_en_val = data;
3225
3226         if (!kvm_pv_async_pf_enabled(vcpu)) {
3227                 kvm_clear_async_pf_completion_queue(vcpu);
3228                 kvm_async_pf_hash_reset(vcpu);
3229                 return 0;
3230         }
3231
3232         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
3233                                         sizeof(u64)))
3234                 return 1;
3235
3236         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
3237         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
3238
3239         kvm_async_pf_wakeup_all(vcpu);
3240
3241         return 0;
3242 }
3243
3244 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu *vcpu, u64 data)
3245 {
3246         /* Bits 8-63 are reserved */
3247         if (data >> 8)
3248                 return 1;
3249
3250         if (!lapic_in_kernel(vcpu))
3251                 return 1;
3252
3253         vcpu->arch.apf.msr_int_val = data;
3254
3255         vcpu->arch.apf.vec = data & KVM_ASYNC_PF_VEC_MASK;
3256
3257         return 0;
3258 }
3259
3260 static void kvmclock_reset(struct kvm_vcpu *vcpu)
3261 {
3262         vcpu->arch.pv_time_enabled = false;
3263         vcpu->arch.time = 0;
3264 }
3265
3266 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu *vcpu)
3267 {
3268         ++vcpu->stat.tlb_flush;
3269         static_call(kvm_x86_tlb_flush_all)(vcpu);
3270 }
3271
3272 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu)
3273 {
3274         ++vcpu->stat.tlb_flush;
3275
3276         if (!tdp_enabled) {
3277                 /*
3278                  * A TLB flush on behalf of the guest is equivalent to
3279                  * INVPCID(all), toggling CR4.PGE, etc., which requires
3280                  * a forced sync of the shadow page tables.  Ensure all the
3281                  * roots are synced and the guest TLB in hardware is clean.
3282                  */
3283                 kvm_mmu_sync_roots(vcpu);
3284                 kvm_mmu_sync_prev_roots(vcpu);
3285         }
3286
3287         static_call(kvm_x86_tlb_flush_guest)(vcpu);
3288 }
3289
3290
3291 static inline void kvm_vcpu_flush_tlb_current(struct kvm_vcpu *vcpu)
3292 {
3293         ++vcpu->stat.tlb_flush;
3294         static_call(kvm_x86_tlb_flush_current)(vcpu);
3295 }
3296
3297 /*
3298  * Service "local" TLB flush requests, which are specific to the current MMU
3299  * context.  In addition to the generic event handling in vcpu_enter_guest(),
3300  * TLB flushes that are targeted at an MMU context also need to be serviced
3301  * prior before nested VM-Enter/VM-Exit.
3302  */
3303 void kvm_service_local_tlb_flush_requests(struct kvm_vcpu *vcpu)
3304 {
3305         if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu))
3306                 kvm_vcpu_flush_tlb_current(vcpu);
3307
3308         if (kvm_check_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu))
3309                 kvm_vcpu_flush_tlb_guest(vcpu);
3310 }
3311 EXPORT_SYMBOL_GPL(kvm_service_local_tlb_flush_requests);
3312
3313 static void record_steal_time(struct kvm_vcpu *vcpu)
3314 {
3315         struct gfn_to_hva_cache *ghc = &vcpu->arch.st.cache;
3316         struct kvm_steal_time __user *st;
3317         struct kvm_memslots *slots;
3318         u64 steal;
3319         u32 version;
3320
3321         if (kvm_xen_msr_enabled(vcpu->kvm)) {
3322                 kvm_xen_runstate_set_running(vcpu);
3323                 return;
3324         }
3325
3326         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3327                 return;
3328
3329         if (WARN_ON_ONCE(current->mm != vcpu->kvm->mm))
3330                 return;
3331
3332         slots = kvm_memslots(vcpu->kvm);
3333
3334         if (unlikely(slots->generation != ghc->generation ||
3335                      kvm_is_error_hva(ghc->hva) || !ghc->memslot)) {
3336                 gfn_t gfn = vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS;
3337
3338                 /* We rely on the fact that it fits in a single page. */
3339                 BUILD_BUG_ON((sizeof(*st) - 1) & KVM_STEAL_VALID_BITS);
3340
3341                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, ghc, gfn, sizeof(*st)) ||
3342                     kvm_is_error_hva(ghc->hva) || !ghc->memslot)
3343                         return;
3344         }
3345
3346         st = (struct kvm_steal_time __user *)ghc->hva;
3347         /*
3348          * Doing a TLB flush here, on the guest's behalf, can avoid
3349          * expensive IPIs.
3350          */
3351         if (guest_pv_has(vcpu, KVM_FEATURE_PV_TLB_FLUSH)) {
3352                 u8 st_preempted = 0;
3353                 int err = -EFAULT;
3354
3355                 if (!user_access_begin(st, sizeof(*st)))
3356                         return;
3357
3358                 asm volatile("1: xchgb %0, %2\n"
3359                              "xor %1, %1\n"
3360                              "2:\n"
3361                              _ASM_EXTABLE_UA(1b, 2b)
3362                              : "+q" (st_preempted),
3363                                "+&r" (err),
3364                                "+m" (st->preempted));
3365                 if (err)
3366                         goto out;
3367
3368                 user_access_end();
3369
3370                 vcpu->arch.st.preempted = 0;
3371
3372                 trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
3373                                        st_preempted & KVM_VCPU_FLUSH_TLB);
3374                 if (st_preempted & KVM_VCPU_FLUSH_TLB)
3375                         kvm_vcpu_flush_tlb_guest(vcpu);
3376
3377                 if (!user_access_begin(st, sizeof(*st)))
3378                         goto dirty;
3379         } else {
3380                 if (!user_access_begin(st, sizeof(*st)))
3381                         return;
3382
3383                 unsafe_put_user(0, &st->preempted, out);
3384                 vcpu->arch.st.preempted = 0;
3385         }
3386
3387         unsafe_get_user(version, &st->version, out);
3388         if (version & 1)
3389                 version += 1;  /* first time write, random junk */
3390
3391         version += 1;
3392         unsafe_put_user(version, &st->version, out);
3393
3394         smp_wmb();
3395
3396         unsafe_get_user(steal, &st->steal, out);
3397         steal += current->sched_info.run_delay -
3398                 vcpu->arch.st.last_steal;
3399         vcpu->arch.st.last_steal = current->sched_info.run_delay;
3400         unsafe_put_user(steal, &st->steal, out);
3401
3402         version += 1;
3403         unsafe_put_user(version, &st->version, out);
3404
3405  out:
3406         user_access_end();
3407  dirty:
3408         mark_page_dirty_in_slot(vcpu->kvm, ghc->memslot, gpa_to_gfn(ghc->gpa));
3409 }
3410
3411 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3412 {
3413         bool pr = false;
3414         u32 msr = msr_info->index;
3415         u64 data = msr_info->data;
3416
3417         if (msr && msr == vcpu->kvm->arch.xen_hvm_config.msr)
3418                 return kvm_xen_write_hypercall_page(vcpu, data);
3419
3420         switch (msr) {
3421         case MSR_AMD64_NB_CFG:
3422         case MSR_IA32_UCODE_WRITE:
3423         case MSR_VM_HSAVE_PA:
3424         case MSR_AMD64_PATCH_LOADER:
3425         case MSR_AMD64_BU_CFG2:
3426         case MSR_AMD64_DC_CFG:
3427         case MSR_F15H_EX_CFG:
3428                 break;
3429
3430         case MSR_IA32_UCODE_REV:
3431                 if (msr_info->host_initiated)
3432                         vcpu->arch.microcode_version = data;
3433                 break;
3434         case MSR_IA32_ARCH_CAPABILITIES:
3435                 if (!msr_info->host_initiated)
3436                         return 1;
3437                 vcpu->arch.arch_capabilities = data;
3438                 break;
3439         case MSR_IA32_PERF_CAPABILITIES: {
3440                 struct kvm_msr_entry msr_ent = {.index = msr, .data = 0};
3441
3442                 if (!msr_info->host_initiated)
3443                         return 1;
3444                 if (kvm_get_msr_feature(&msr_ent))
3445                         return 1;
3446                 if (data & ~msr_ent.data)
3447                         return 1;
3448
3449                 vcpu->arch.perf_capabilities = data;
3450
3451                 return 0;
3452                 }
3453         case MSR_EFER:
3454                 return set_efer(vcpu, msr_info);
3455         case MSR_K7_HWCR:
3456                 data &= ~(u64)0x40;     /* ignore flush filter disable */
3457                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
3458                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
3459
3460                 /* Handle McStatusWrEn */
3461                 if (data == BIT_ULL(18)) {
3462                         vcpu->arch.msr_hwcr = data;
3463                 } else if (data != 0) {
3464                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
3465                                     data);
3466                         return 1;
3467                 }
3468                 break;
3469         case MSR_FAM10H_MMIO_CONF_BASE:
3470                 if (data != 0) {
3471                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
3472                                     "0x%llx\n", data);
3473                         return 1;
3474                 }
3475                 break;
3476         case 0x200 ... 0x2ff:
3477                 return kvm_mtrr_set_msr(vcpu, msr, data);
3478         case MSR_IA32_APICBASE:
3479                 return kvm_set_apic_base(vcpu, msr_info);
3480         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3481                 return kvm_x2apic_msr_write(vcpu, msr, data);
3482         case MSR_IA32_TSC_DEADLINE:
3483                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
3484                 break;
3485         case MSR_IA32_TSC_ADJUST:
3486                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
3487                         if (!msr_info->host_initiated) {
3488                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
3489                                 adjust_tsc_offset_guest(vcpu, adj);
3490                                 /* Before back to guest, tsc_timestamp must be adjusted
3491                                  * as well, otherwise guest's percpu pvclock time could jump.
3492                                  */
3493                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3494                         }
3495                         vcpu->arch.ia32_tsc_adjust_msr = data;
3496                 }
3497                 break;
3498         case MSR_IA32_MISC_ENABLE:
3499                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
3500                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
3501                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
3502                                 return 1;
3503                         vcpu->arch.ia32_misc_enable_msr = data;
3504                         kvm_update_cpuid_runtime(vcpu);
3505                 } else {
3506                         vcpu->arch.ia32_misc_enable_msr = data;
3507                 }
3508                 break;
3509         case MSR_IA32_SMBASE:
3510                 if (!msr_info->host_initiated)
3511                         return 1;
3512                 vcpu->arch.smbase = data;
3513                 break;
3514         case MSR_IA32_POWER_CTL:
3515                 vcpu->arch.msr_ia32_power_ctl = data;
3516                 break;
3517         case MSR_IA32_TSC:
3518                 if (msr_info->host_initiated) {
3519                         kvm_synchronize_tsc(vcpu, data);
3520                 } else {
3521                         u64 adj = kvm_compute_l1_tsc_offset(vcpu, data) - vcpu->arch.l1_tsc_offset;
3522                         adjust_tsc_offset_guest(vcpu, adj);
3523                         vcpu->arch.ia32_tsc_adjust_msr += adj;
3524                 }
3525                 break;
3526         case MSR_IA32_XSS:
3527                 if (!msr_info->host_initiated &&
3528                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3529                         return 1;
3530                 /*
3531                  * KVM supports exposing PT to the guest, but does not support
3532                  * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3533                  * XSAVES/XRSTORS to save/restore PT MSRs.
3534                  */
3535                 if (data & ~supported_xss)
3536                         return 1;
3537                 vcpu->arch.ia32_xss = data;
3538                 kvm_update_cpuid_runtime(vcpu);
3539                 break;
3540         case MSR_SMI_COUNT:
3541                 if (!msr_info->host_initiated)
3542                         return 1;
3543                 vcpu->arch.smi_count = data;
3544                 break;
3545         case MSR_KVM_WALL_CLOCK_NEW:
3546                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3547                         return 1;
3548
3549                 vcpu->kvm->arch.wall_clock = data;
3550                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3551                 break;
3552         case MSR_KVM_WALL_CLOCK:
3553                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3554                         return 1;
3555
3556                 vcpu->kvm->arch.wall_clock = data;
3557                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3558                 break;
3559         case MSR_KVM_SYSTEM_TIME_NEW:
3560                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3561                         return 1;
3562
3563                 kvm_write_system_time(vcpu, data, false, msr_info->host_initiated);
3564                 break;
3565         case MSR_KVM_SYSTEM_TIME:
3566                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3567                         return 1;
3568
3569                 kvm_write_system_time(vcpu, data, true,  msr_info->host_initiated);
3570                 break;
3571         case MSR_KVM_ASYNC_PF_EN:
3572                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3573                         return 1;
3574
3575                 if (kvm_pv_enable_async_pf(vcpu, data))
3576                         return 1;
3577                 break;
3578         case MSR_KVM_ASYNC_PF_INT:
3579                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3580                         return 1;
3581
3582                 if (kvm_pv_enable_async_pf_int(vcpu, data))
3583                         return 1;
3584                 break;
3585         case MSR_KVM_ASYNC_PF_ACK:
3586                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3587                         return 1;
3588                 if (data & 0x1) {
3589                         vcpu->arch.apf.pageready_pending = false;
3590                         kvm_check_async_pf_completion(vcpu);
3591                 }
3592                 break;
3593         case MSR_KVM_STEAL_TIME:
3594                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3595                         return 1;
3596
3597                 if (unlikely(!sched_info_on()))
3598                         return 1;
3599
3600                 if (data & KVM_STEAL_RESERVED_MASK)
3601                         return 1;
3602
3603                 vcpu->arch.st.msr_val = data;
3604
3605                 if (!(data & KVM_MSR_ENABLED))
3606                         break;
3607
3608                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3609
3610                 break;
3611         case MSR_KVM_PV_EOI_EN:
3612                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3613                         return 1;
3614
3615                 if (kvm_lapic_set_pv_eoi(vcpu, data, sizeof(u8)))
3616                         return 1;
3617                 break;
3618
3619         case MSR_KVM_POLL_CONTROL:
3620                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3621                         return 1;
3622
3623                 /* only enable bit supported */
3624                 if (data & (-1ULL << 1))
3625                         return 1;
3626
3627                 vcpu->arch.msr_kvm_poll_control = data;
3628                 break;
3629
3630         case MSR_IA32_MCG_CTL:
3631         case MSR_IA32_MCG_STATUS:
3632         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3633                 return set_msr_mce(vcpu, msr_info);
3634
3635         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3636         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3637                 pr = true;
3638                 fallthrough;
3639         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3640         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3641                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3642                         return kvm_pmu_set_msr(vcpu, msr_info);
3643
3644                 if (pr || data != 0)
3645                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
3646                                     "0x%x data 0x%llx\n", msr, data);
3647                 break;
3648         case MSR_K7_CLK_CTL:
3649                 /*
3650                  * Ignore all writes to this no longer documented MSR.
3651                  * Writes are only relevant for old K7 processors,
3652                  * all pre-dating SVM, but a recommended workaround from
3653                  * AMD for these chips. It is possible to specify the
3654                  * affected processor models on the command line, hence
3655                  * the need to ignore the workaround.
3656                  */
3657                 break;
3658         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3659         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3660         case HV_X64_MSR_SYNDBG_OPTIONS:
3661         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3662         case HV_X64_MSR_CRASH_CTL:
3663         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3664         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3665         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3666         case HV_X64_MSR_TSC_EMULATION_STATUS:
3667                 return kvm_hv_set_msr_common(vcpu, msr, data,
3668                                              msr_info->host_initiated);
3669         case MSR_IA32_BBL_CR_CTL3:
3670                 /* Drop writes to this legacy MSR -- see rdmsr
3671                  * counterpart for further detail.
3672                  */
3673                 if (report_ignored_msrs)
3674                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
3675                                 msr, data);
3676                 break;
3677         case MSR_AMD64_OSVW_ID_LENGTH:
3678                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3679                         return 1;
3680                 vcpu->arch.osvw.length = data;
3681                 break;
3682         case MSR_AMD64_OSVW_STATUS:
3683                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3684                         return 1;
3685                 vcpu->arch.osvw.status = data;
3686                 break;
3687         case MSR_PLATFORM_INFO:
3688                 if (!msr_info->host_initiated ||
3689                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
3690                      cpuid_fault_enabled(vcpu)))
3691                         return 1;
3692                 vcpu->arch.msr_platform_info = data;
3693                 break;
3694         case MSR_MISC_FEATURES_ENABLES:
3695                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
3696                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
3697                      !supports_cpuid_fault(vcpu)))
3698                         return 1;
3699                 vcpu->arch.msr_misc_features_enables = data;
3700                 break;
3701 #ifdef CONFIG_X86_64
3702         case MSR_IA32_XFD:
3703                 if (!msr_info->host_initiated &&
3704                     !guest_cpuid_has(vcpu, X86_FEATURE_XFD))
3705                         return 1;
3706
3707                 if (data & ~(XFEATURE_MASK_USER_DYNAMIC &
3708                              vcpu->arch.guest_supported_xcr0))
3709                         return 1;
3710
3711                 fpu_update_guest_xfd(&vcpu->arch.guest_fpu, data);
3712                 break;
3713         case MSR_IA32_XFD_ERR:
3714                 if (!msr_info->host_initiated &&
3715                     !guest_cpuid_has(vcpu, X86_FEATURE_XFD))
3716                         return 1;
3717
3718                 if (data & ~(XFEATURE_MASK_USER_DYNAMIC &
3719                              vcpu->arch.guest_supported_xcr0))
3720                         return 1;
3721
3722                 vcpu->arch.guest_fpu.xfd_err = data;
3723                 break;
3724 #endif
3725         default:
3726                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3727                         return kvm_pmu_set_msr(vcpu, msr_info);
3728                 return KVM_MSR_RET_INVALID;
3729         }
3730         return 0;
3731 }
3732 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
3733
3734 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
3735 {
3736         u64 data;
3737         u64 mcg_cap = vcpu->arch.mcg_cap;
3738         unsigned bank_num = mcg_cap & 0xff;
3739
3740         switch (msr) {
3741         case MSR_IA32_P5_MC_ADDR:
3742         case MSR_IA32_P5_MC_TYPE:
3743                 data = 0;
3744                 break;
3745         case MSR_IA32_MCG_CAP:
3746                 data = vcpu->arch.mcg_cap;
3747                 break;
3748         case MSR_IA32_MCG_CTL:
3749                 if (!(mcg_cap & MCG_CTL_P) && !host)
3750                         return 1;
3751                 data = vcpu->arch.mcg_ctl;
3752                 break;
3753         case MSR_IA32_MCG_STATUS:
3754                 data = vcpu->arch.mcg_status;
3755                 break;
3756         default:
3757                 if (msr >= MSR_IA32_MC0_CTL &&
3758                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3759                         u32 offset = array_index_nospec(
3760                                 msr - MSR_IA32_MC0_CTL,
3761                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3762
3763                         data = vcpu->arch.mce_banks[offset];
3764                         break;
3765                 }
3766                 return 1;
3767         }
3768         *pdata = data;
3769         return 0;
3770 }
3771
3772 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3773 {
3774         switch (msr_info->index) {
3775         case MSR_IA32_PLATFORM_ID:
3776         case MSR_IA32_EBL_CR_POWERON:
3777         case MSR_IA32_LASTBRANCHFROMIP:
3778         case MSR_IA32_LASTBRANCHTOIP:
3779         case MSR_IA32_LASTINTFROMIP:
3780         case MSR_IA32_LASTINTTOIP:
3781         case MSR_AMD64_SYSCFG:
3782         case MSR_K8_TSEG_ADDR:
3783         case MSR_K8_TSEG_MASK:
3784         case MSR_VM_HSAVE_PA:
3785         case MSR_K8_INT_PENDING_MSG:
3786         case MSR_AMD64_NB_CFG:
3787         case MSR_FAM10H_MMIO_CONF_BASE:
3788         case MSR_AMD64_BU_CFG2:
3789         case MSR_IA32_PERF_CTL:
3790         case MSR_AMD64_DC_CFG:
3791         case MSR_F15H_EX_CFG:
3792         /*
3793          * Intel Sandy Bridge CPUs must support the RAPL (running average power
3794          * limit) MSRs. Just return 0, as we do not want to expose the host
3795          * data here. Do not conditionalize this on CPUID, as KVM does not do
3796          * so for existing CPU-specific MSRs.
3797          */
3798         case MSR_RAPL_POWER_UNIT:
3799         case MSR_PP0_ENERGY_STATUS:     /* Power plane 0 (core) */
3800         case MSR_PP1_ENERGY_STATUS:     /* Power plane 1 (graphics uncore) */
3801         case MSR_PKG_ENERGY_STATUS:     /* Total package */
3802         case MSR_DRAM_ENERGY_STATUS:    /* DRAM controller */
3803                 msr_info->data = 0;
3804                 break;
3805         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3806                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3807                         return kvm_pmu_get_msr(vcpu, msr_info);
3808                 if (!msr_info->host_initiated)
3809                         return 1;
3810                 msr_info->data = 0;
3811                 break;
3812         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3813         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3814         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3815         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3816                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3817                         return kvm_pmu_get_msr(vcpu, msr_info);
3818                 msr_info->data = 0;
3819                 break;
3820         case MSR_IA32_UCODE_REV:
3821                 msr_info->data = vcpu->arch.microcode_version;
3822                 break;
3823         case MSR_IA32_ARCH_CAPABILITIES:
3824                 if (!msr_info->host_initiated &&
3825                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
3826                         return 1;
3827                 msr_info->data = vcpu->arch.arch_capabilities;
3828                 break;
3829         case MSR_IA32_PERF_CAPABILITIES:
3830                 if (!msr_info->host_initiated &&
3831                     !guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
3832                         return 1;
3833                 msr_info->data = vcpu->arch.perf_capabilities;
3834                 break;
3835         case MSR_IA32_POWER_CTL:
3836                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
3837                 break;
3838         case MSR_IA32_TSC: {
3839                 /*
3840                  * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3841                  * even when not intercepted. AMD manual doesn't explicitly
3842                  * state this but appears to behave the same.
3843                  *
3844                  * On userspace reads and writes, however, we unconditionally
3845                  * return L1's TSC value to ensure backwards-compatible
3846                  * behavior for migration.
3847                  */
3848                 u64 offset, ratio;
3849
3850                 if (msr_info->host_initiated) {
3851                         offset = vcpu->arch.l1_tsc_offset;
3852                         ratio = vcpu->arch.l1_tsc_scaling_ratio;
3853                 } else {
3854                         offset = vcpu->arch.tsc_offset;
3855                         ratio = vcpu->arch.tsc_scaling_ratio;
3856                 }
3857
3858                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc(), ratio) + offset;
3859                 break;
3860         }
3861         case MSR_MTRRcap:
3862         case 0x200 ... 0x2ff:
3863                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
3864         case 0xcd: /* fsb frequency */
3865                 msr_info->data = 3;
3866                 break;
3867                 /*
3868                  * MSR_EBC_FREQUENCY_ID
3869                  * Conservative value valid for even the basic CPU models.
3870                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3871                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3872                  * and 266MHz for model 3, or 4. Set Core Clock
3873                  * Frequency to System Bus Frequency Ratio to 1 (bits
3874                  * 31:24) even though these are only valid for CPU
3875                  * models > 2, however guests may end up dividing or
3876                  * multiplying by zero otherwise.
3877                  */
3878         case MSR_EBC_FREQUENCY_ID:
3879                 msr_info->data = 1 << 24;
3880                 break;
3881         case MSR_IA32_APICBASE:
3882                 msr_info->data = kvm_get_apic_base(vcpu);
3883                 break;
3884         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3885                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
3886         case MSR_IA32_TSC_DEADLINE:
3887                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
3888                 break;
3889         case MSR_IA32_TSC_ADJUST:
3890                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
3891                 break;
3892         case MSR_IA32_MISC_ENABLE:
3893                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
3894                 break;
3895         case MSR_IA32_SMBASE:
3896                 if (!msr_info->host_initiated)
3897                         return 1;
3898                 msr_info->data = vcpu->arch.smbase;
3899                 break;
3900         case MSR_SMI_COUNT:
3901                 msr_info->data = vcpu->arch.smi_count;
3902                 break;
3903         case MSR_IA32_PERF_STATUS:
3904                 /* TSC increment by tick */
3905                 msr_info->data = 1000ULL;
3906                 /* CPU multiplier */
3907                 msr_info->data |= (((uint64_t)4ULL) << 40);
3908                 break;
3909         case MSR_EFER:
3910                 msr_info->data = vcpu->arch.efer;
3911                 break;
3912         case MSR_KVM_WALL_CLOCK:
3913                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3914                         return 1;
3915
3916                 msr_info->data = vcpu->kvm->arch.wall_clock;
3917                 break;
3918         case MSR_KVM_WALL_CLOCK_NEW:
3919                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3920                         return 1;
3921
3922                 msr_info->data = vcpu->kvm->arch.wall_clock;
3923                 break;
3924         case MSR_KVM_SYSTEM_TIME:
3925                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3926                         return 1;
3927
3928                 msr_info->data = vcpu->arch.time;
3929                 break;
3930         case MSR_KVM_SYSTEM_TIME_NEW:
3931                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3932                         return 1;
3933
3934                 msr_info->data = vcpu->arch.time;
3935                 break;
3936         case MSR_KVM_ASYNC_PF_EN:
3937                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3938                         return 1;
3939
3940                 msr_info->data = vcpu->arch.apf.msr_en_val;
3941                 break;
3942         case MSR_KVM_ASYNC_PF_INT:
3943                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3944                         return 1;
3945
3946                 msr_info->data = vcpu->arch.apf.msr_int_val;
3947                 break;
3948         case MSR_KVM_ASYNC_PF_ACK:
3949                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3950                         return 1;
3951
3952                 msr_info->data = 0;
3953                 break;
3954         case MSR_KVM_STEAL_TIME:
3955                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3956                         return 1;
3957
3958                 msr_info->data = vcpu->arch.st.msr_val;
3959                 break;
3960         case MSR_KVM_PV_EOI_EN:
3961                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3962                         return 1;
3963
3964                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3965                 break;
3966         case MSR_KVM_POLL_CONTROL:
3967                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3968                         return 1;
3969
3970                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3971                 break;
3972         case MSR_IA32_P5_MC_ADDR:
3973         case MSR_IA32_P5_MC_TYPE:
3974         case MSR_IA32_MCG_CAP:
3975         case MSR_IA32_MCG_CTL:
3976         case MSR_IA32_MCG_STATUS:
3977         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3978                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3979                                    msr_info->host_initiated);
3980         case MSR_IA32_XSS:
3981                 if (!msr_info->host_initiated &&
3982                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3983                         return 1;
3984                 msr_info->data = vcpu->arch.ia32_xss;
3985                 break;
3986         case MSR_K7_CLK_CTL:
3987                 /*
3988                  * Provide expected ramp-up count for K7. All other
3989                  * are set to zero, indicating minimum divisors for
3990                  * every field.
3991                  *
3992                  * This prevents guest kernels on AMD host with CPU
3993                  * type 6, model 8 and higher from exploding due to
3994                  * the rdmsr failing.
3995                  */
3996                 msr_info->data = 0x20000000;
3997                 break;
3998         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3999         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
4000         case HV_X64_MSR_SYNDBG_OPTIONS:
4001         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
4002         case HV_X64_MSR_CRASH_CTL:
4003         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
4004         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
4005         case HV_X64_MSR_TSC_EMULATION_CONTROL:
4006         case HV_X64_MSR_TSC_EMULATION_STATUS:
4007                 return kvm_hv_get_msr_common(vcpu,
4008                                              msr_info->index, &msr_info->data,
4009                                              msr_info->host_initiated);
4010         case MSR_IA32_BBL_CR_CTL3:
4011                 /* This legacy MSR exists but isn't fully documented in current
4012                  * silicon.  It is however accessed by winxp in very narrow
4013                  * scenarios where it sets bit #19, itself documented as
4014                  * a "reserved" bit.  Best effort attempt to source coherent
4015                  * read data here should the balance of the register be
4016                  * interpreted by the guest:
4017                  *
4018                  * L2 cache control register 3: 64GB range, 256KB size,
4019                  * enabled, latency 0x1, configured
4020                  */
4021                 msr_info->data = 0xbe702111;
4022                 break;
4023         case MSR_AMD64_OSVW_ID_LENGTH:
4024                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
4025                         return 1;
4026                 msr_info->data = vcpu->arch.osvw.length;
4027                 break;
4028         case MSR_AMD64_OSVW_STATUS:
4029                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
4030                         return 1;
4031                 msr_info->data = vcpu->arch.osvw.status;
4032                 break;
4033         case MSR_PLATFORM_INFO:
4034                 if (!msr_info->host_initiated &&
4035                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
4036                         return 1;
4037                 msr_info->data = vcpu->arch.msr_platform_info;
4038                 break;
4039         case MSR_MISC_FEATURES_ENABLES:
4040                 msr_info->data = vcpu->arch.msr_misc_features_enables;
4041                 break;
4042         case MSR_K7_HWCR:
4043                 msr_info->data = vcpu->arch.msr_hwcr;
4044                 break;
4045 #ifdef CONFIG_X86_64
4046         case MSR_IA32_XFD:
4047                 if (!msr_info->host_initiated &&
4048                     !guest_cpuid_has(vcpu, X86_FEATURE_XFD))
4049                         return 1;
4050
4051                 msr_info->data = vcpu->arch.guest_fpu.fpstate->xfd;
4052                 break;
4053         case MSR_IA32_XFD_ERR:
4054                 if (!msr_info->host_initiated &&
4055                     !guest_cpuid_has(vcpu, X86_FEATURE_XFD))
4056                         return 1;
4057
4058                 msr_info->data = vcpu->arch.guest_fpu.xfd_err;
4059                 break;
4060 #endif
4061         default:
4062                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
4063                         return kvm_pmu_get_msr(vcpu, msr_info);
4064                 return KVM_MSR_RET_INVALID;
4065         }
4066         return 0;
4067 }
4068 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
4069
4070 /*
4071  * Read or write a bunch of msrs. All parameters are kernel addresses.
4072  *
4073  * @return number of msrs set successfully.
4074  */
4075 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
4076                     struct kvm_msr_entry *entries,
4077                     int (*do_msr)(struct kvm_vcpu *vcpu,
4078                                   unsigned index, u64 *data))
4079 {
4080         int i;
4081
4082         for (i = 0; i < msrs->nmsrs; ++i)
4083                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
4084                         break;
4085
4086         return i;
4087 }
4088
4089 /*
4090  * Read or write a bunch of msrs. Parameters are user addresses.
4091  *
4092  * @return number of msrs set successfully.
4093  */
4094 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
4095                   int (*do_msr)(struct kvm_vcpu *vcpu,
4096                                 unsigned index, u64 *data),
4097                   int writeback)
4098 {
4099         struct kvm_msrs msrs;
4100         struct kvm_msr_entry *entries;
4101         int r, n;
4102         unsigned size;
4103
4104         r = -EFAULT;
4105         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
4106                 goto out;
4107
4108         r = -E2BIG;
4109         if (msrs.nmsrs >= MAX_IO_MSRS)
4110                 goto out;
4111
4112         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
4113         entries = memdup_user(user_msrs->entries, size);
4114         if (IS_ERR(entries)) {
4115                 r = PTR_ERR(entries);
4116                 goto out;
4117         }
4118
4119         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
4120         if (r < 0)
4121                 goto out_free;
4122
4123         r = -EFAULT;
4124         if (writeback && copy_to_user(user_msrs->entries, entries, size))
4125                 goto out_free;
4126
4127         r = n;
4128
4129 out_free:
4130         kfree(entries);
4131 out:
4132         return r;
4133 }
4134
4135 static inline bool kvm_can_mwait_in_guest(void)
4136 {
4137         return boot_cpu_has(X86_FEATURE_MWAIT) &&
4138                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
4139                 boot_cpu_has(X86_FEATURE_ARAT);
4140 }
4141
4142 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu *vcpu,
4143                                             struct kvm_cpuid2 __user *cpuid_arg)
4144 {
4145         struct kvm_cpuid2 cpuid;
4146         int r;
4147
4148         r = -EFAULT;
4149         if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4150                 return r;
4151
4152         r = kvm_get_hv_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4153         if (r)
4154                 return r;
4155
4156         r = -EFAULT;
4157         if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4158                 return r;
4159
4160         return 0;
4161 }
4162
4163 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
4164 {
4165         int r = 0;
4166
4167         switch (ext) {
4168         case KVM_CAP_IRQCHIP:
4169         case KVM_CAP_HLT:
4170         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
4171         case KVM_CAP_SET_TSS_ADDR:
4172         case KVM_CAP_EXT_CPUID:
4173         case KVM_CAP_EXT_EMUL_CPUID:
4174         case KVM_CAP_CLOCKSOURCE:
4175         case KVM_CAP_PIT:
4176         case KVM_CAP_NOP_IO_DELAY:
4177         case KVM_CAP_MP_STATE:
4178         case KVM_CAP_SYNC_MMU:
4179         case KVM_CAP_USER_NMI:
4180         case KVM_CAP_REINJECT_CONTROL:
4181         case KVM_CAP_IRQ_INJECT_STATUS:
4182         case KVM_CAP_IOEVENTFD:
4183         case KVM_CAP_IOEVENTFD_NO_LENGTH:
4184         case KVM_CAP_PIT2:
4185         case KVM_CAP_PIT_STATE2:
4186         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
4187         case KVM_CAP_VCPU_EVENTS:
4188         case KVM_CAP_HYPERV:
4189         case KVM_CAP_HYPERV_VAPIC:
4190         case KVM_CAP_HYPERV_SPIN:
4191         case KVM_CAP_HYPERV_SYNIC:
4192         case KVM_CAP_HYPERV_SYNIC2:
4193         case KVM_CAP_HYPERV_VP_INDEX:
4194         case KVM_CAP_HYPERV_EVENTFD:
4195         case KVM_CAP_HYPERV_TLBFLUSH:
4196         case KVM_CAP_HYPERV_SEND_IPI:
4197         case KVM_CAP_HYPERV_CPUID:
4198         case KVM_CAP_HYPERV_ENFORCE_CPUID:
4199         case KVM_CAP_SYS_HYPERV_CPUID:
4200         case KVM_CAP_PCI_SEGMENT:
4201         case KVM_CAP_DEBUGREGS:
4202         case KVM_CAP_X86_ROBUST_SINGLESTEP:
4203         case KVM_CAP_XSAVE:
4204         case KVM_CAP_ASYNC_PF:
4205         case KVM_CAP_ASYNC_PF_INT:
4206         case KVM_CAP_GET_TSC_KHZ:
4207         case KVM_CAP_KVMCLOCK_CTRL:
4208         case KVM_CAP_READONLY_MEM:
4209         case KVM_CAP_HYPERV_TIME:
4210         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
4211         case KVM_CAP_TSC_DEADLINE_TIMER:
4212         case KVM_CAP_DISABLE_QUIRKS:
4213         case KVM_CAP_SET_BOOT_CPU_ID:
4214         case KVM_CAP_SPLIT_IRQCHIP:
4215         case KVM_CAP_IMMEDIATE_EXIT:
4216         case KVM_CAP_PMU_EVENT_FILTER:
4217         case KVM_CAP_GET_MSR_FEATURES:
4218         case KVM_CAP_MSR_PLATFORM_INFO:
4219         case KVM_CAP_EXCEPTION_PAYLOAD:
4220         case KVM_CAP_SET_GUEST_DEBUG:
4221         case KVM_CAP_LAST_CPU:
4222         case KVM_CAP_X86_USER_SPACE_MSR:
4223         case KVM_CAP_X86_MSR_FILTER:
4224         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4225 #ifdef CONFIG_X86_SGX_KVM
4226         case KVM_CAP_SGX_ATTRIBUTE:
4227 #endif
4228         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
4229         case KVM_CAP_VM_MOVE_ENC_CONTEXT_FROM:
4230         case KVM_CAP_SREGS2:
4231         case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
4232         case KVM_CAP_VCPU_ATTRIBUTES:
4233         case KVM_CAP_SYS_ATTRIBUTES:
4234                 r = 1;
4235                 break;
4236         case KVM_CAP_EXIT_HYPERCALL:
4237                 r = KVM_EXIT_HYPERCALL_VALID_MASK;
4238                 break;
4239         case KVM_CAP_SET_GUEST_DEBUG2:
4240                 return KVM_GUESTDBG_VALID_MASK;
4241 #ifdef CONFIG_KVM_XEN
4242         case KVM_CAP_XEN_HVM:
4243                 r = KVM_XEN_HVM_CONFIG_HYPERCALL_MSR |
4244                     KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL |
4245                     KVM_XEN_HVM_CONFIG_SHARED_INFO |
4246                     KVM_XEN_HVM_CONFIG_EVTCHN_2LEVEL;
4247                 if (sched_info_on())
4248                         r |= KVM_XEN_HVM_CONFIG_RUNSTATE;
4249                 break;
4250 #endif
4251         case KVM_CAP_SYNC_REGS:
4252                 r = KVM_SYNC_X86_VALID_FIELDS;
4253                 break;
4254         case KVM_CAP_ADJUST_CLOCK:
4255                 r = KVM_CLOCK_VALID_FLAGS;
4256                 break;
4257         case KVM_CAP_X86_DISABLE_EXITS:
4258                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
4259                       KVM_X86_DISABLE_EXITS_CSTATE;
4260                 if(kvm_can_mwait_in_guest())
4261                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
4262                 break;
4263         case KVM_CAP_X86_SMM:
4264                 /* SMBASE is usually relocated above 1M on modern chipsets,
4265                  * and SMM handlers might indeed rely on 4G segment limits,
4266                  * so do not report SMM to be available if real mode is
4267                  * emulated via vm86 mode.  Still, do not go to great lengths
4268                  * to avoid userspace's usage of the feature, because it is a
4269                  * fringe case that is not enabled except via specific settings
4270                  * of the module parameters.
4271                  */
4272                 r = static_call(kvm_x86_has_emulated_msr)(kvm, MSR_IA32_SMBASE);
4273                 break;
4274         case KVM_CAP_VAPIC:
4275                 r = !static_call(kvm_x86_cpu_has_accelerated_tpr)();
4276                 break;
4277         case KVM_CAP_NR_VCPUS:
4278                 r = min_t(unsigned int, num_online_cpus(), KVM_MAX_VCPUS);
4279                 break;
4280         case KVM_CAP_MAX_VCPUS:
4281                 r = KVM_MAX_VCPUS;
4282                 break;
4283         case KVM_CAP_MAX_VCPU_ID:
4284                 r = KVM_MAX_VCPU_IDS;
4285                 break;
4286         case KVM_CAP_PV_MMU:    /* obsolete */
4287                 r = 0;
4288                 break;
4289         case KVM_CAP_MCE:
4290                 r = KVM_MAX_MCE_BANKS;
4291                 break;
4292         case KVM_CAP_XCRS:
4293                 r = boot_cpu_has(X86_FEATURE_XSAVE);
4294                 break;
4295         case KVM_CAP_TSC_CONTROL:
4296                 r = kvm_has_tsc_control;
4297                 break;
4298         case KVM_CAP_X2APIC_API:
4299                 r = KVM_X2APIC_API_VALID_FLAGS;
4300                 break;
4301         case KVM_CAP_NESTED_STATE:
4302                 r = kvm_x86_ops.nested_ops->get_state ?
4303                         kvm_x86_ops.nested_ops->get_state(NULL, NULL, 0) : 0;
4304                 break;
4305         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4306                 r = kvm_x86_ops.enable_direct_tlbflush != NULL;
4307                 break;
4308         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4309                 r = kvm_x86_ops.nested_ops->enable_evmcs != NULL;
4310                 break;
4311         case KVM_CAP_SMALLER_MAXPHYADDR:
4312                 r = (int) allow_smaller_maxphyaddr;
4313                 break;
4314         case KVM_CAP_STEAL_TIME:
4315                 r = sched_info_on();
4316                 break;
4317         case KVM_CAP_X86_BUS_LOCK_EXIT:
4318                 if (kvm_has_bus_lock_exit)
4319                         r = KVM_BUS_LOCK_DETECTION_OFF |
4320                             KVM_BUS_LOCK_DETECTION_EXIT;
4321                 else
4322                         r = 0;
4323                 break;
4324         case KVM_CAP_XSAVE2: {
4325                 u64 guest_perm = xstate_get_guest_group_perm();
4326
4327                 r = xstate_required_size(supported_xcr0 & guest_perm, false);
4328                 if (r < sizeof(struct kvm_xsave))
4329                         r = sizeof(struct kvm_xsave);
4330                 break;
4331         }
4332         default:
4333                 break;
4334         }
4335         return r;
4336 }
4337
4338 static inline void __user *kvm_get_attr_addr(struct kvm_device_attr *attr)
4339 {
4340         void __user *uaddr = (void __user*)(unsigned long)attr->addr;
4341
4342         if ((u64)(unsigned long)uaddr != attr->addr)
4343                 return ERR_PTR(-EFAULT);
4344         return uaddr;
4345 }
4346
4347 static int kvm_x86_dev_get_attr(struct kvm_device_attr *attr)
4348 {
4349         u64 __user *uaddr = kvm_get_attr_addr(attr);
4350
4351         if (attr->group)
4352                 return -ENXIO;
4353
4354         if (IS_ERR(uaddr))
4355                 return PTR_ERR(uaddr);
4356
4357         switch (attr->attr) {
4358         case KVM_X86_XCOMP_GUEST_SUPP:
4359                 if (put_user(supported_xcr0, uaddr))
4360                         return -EFAULT;
4361                 return 0;
4362         default:
4363                 return -ENXIO;
4364                 break;
4365         }
4366 }
4367
4368 static int kvm_x86_dev_has_attr(struct kvm_device_attr *attr)
4369 {
4370         if (attr->group)
4371                 return -ENXIO;
4372
4373         switch (attr->attr) {
4374         case KVM_X86_XCOMP_GUEST_SUPP:
4375                 return 0;
4376         default:
4377                 return -ENXIO;
4378         }
4379 }
4380
4381 long kvm_arch_dev_ioctl(struct file *filp,
4382                         unsigned int ioctl, unsigned long arg)
4383 {
4384         void __user *argp = (void __user *)arg;
4385         long r;
4386
4387         switch (ioctl) {
4388         case KVM_GET_MSR_INDEX_LIST: {
4389                 struct kvm_msr_list __user *user_msr_list = argp;
4390                 struct kvm_msr_list msr_list;
4391                 unsigned n;
4392
4393                 r = -EFAULT;
4394                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4395                         goto out;
4396                 n = msr_list.nmsrs;
4397                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
4398                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4399                         goto out;
4400                 r = -E2BIG;
4401                 if (n < msr_list.nmsrs)
4402                         goto out;
4403                 r = -EFAULT;
4404                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
4405                                  num_msrs_to_save * sizeof(u32)))
4406                         goto out;
4407                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
4408                                  &emulated_msrs,
4409                                  num_emulated_msrs * sizeof(u32)))
4410                         goto out;
4411                 r = 0;
4412                 break;
4413         }
4414         case KVM_GET_SUPPORTED_CPUID:
4415         case KVM_GET_EMULATED_CPUID: {
4416                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4417                 struct kvm_cpuid2 cpuid;
4418
4419                 r = -EFAULT;
4420                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4421                         goto out;
4422
4423                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
4424                                             ioctl);
4425                 if (r)
4426                         goto out;
4427
4428                 r = -EFAULT;
4429                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4430                         goto out;
4431                 r = 0;
4432                 break;
4433         }
4434         case KVM_X86_GET_MCE_CAP_SUPPORTED:
4435                 r = -EFAULT;
4436                 if (copy_to_user(argp, &kvm_mce_cap_supported,
4437                                  sizeof(kvm_mce_cap_supported)))
4438                         goto out;
4439                 r = 0;
4440                 break;
4441         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
4442                 struct kvm_msr_list __user *user_msr_list = argp;
4443                 struct kvm_msr_list msr_list;
4444                 unsigned int n;
4445
4446                 r = -EFAULT;
4447                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4448                         goto out;
4449                 n = msr_list.nmsrs;
4450                 msr_list.nmsrs = num_msr_based_features;
4451                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4452                         goto out;
4453                 r = -E2BIG;
4454                 if (n < msr_list.nmsrs)
4455                         goto out;
4456                 r = -EFAULT;
4457                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
4458                                  num_msr_based_features * sizeof(u32)))
4459                         goto out;
4460                 r = 0;
4461                 break;
4462         }
4463         case KVM_GET_MSRS:
4464                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
4465                 break;
4466         case KVM_GET_SUPPORTED_HV_CPUID:
4467                 r = kvm_ioctl_get_supported_hv_cpuid(NULL, argp);
4468                 break;
4469         case KVM_GET_DEVICE_ATTR: {
4470                 struct kvm_device_attr attr;
4471                 r = -EFAULT;
4472                 if (copy_from_user(&attr, (void __user *)arg, sizeof(attr)))
4473                         break;
4474                 r = kvm_x86_dev_get_attr(&attr);
4475                 break;
4476         }
4477         case KVM_HAS_DEVICE_ATTR: {
4478                 struct kvm_device_attr attr;
4479                 r = -EFAULT;
4480                 if (copy_from_user(&attr, (void __user *)arg, sizeof(attr)))
4481                         break;
4482                 r = kvm_x86_dev_has_attr(&attr);
4483                 break;
4484         }
4485         default:
4486                 r = -EINVAL;
4487                 break;
4488         }
4489 out:
4490         return r;
4491 }
4492
4493 static void wbinvd_ipi(void *garbage)
4494 {
4495         wbinvd();
4496 }
4497
4498 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
4499 {
4500         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
4501 }
4502
4503 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
4504 {
4505         /* Address WBINVD may be executed by guest */
4506         if (need_emulate_wbinvd(vcpu)) {
4507                 if (static_call(kvm_x86_has_wbinvd_exit)())
4508                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4509                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
4510                         smp_call_function_single(vcpu->cpu,
4511                                         wbinvd_ipi, NULL, 1);
4512         }
4513
4514         static_call(kvm_x86_vcpu_load)(vcpu, cpu);
4515
4516         /* Save host pkru register if supported */
4517         vcpu->arch.host_pkru = read_pkru();
4518
4519         /* Apply any externally detected TSC adjustments (due to suspend) */
4520         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
4521                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
4522                 vcpu->arch.tsc_offset_adjustment = 0;
4523                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4524         }
4525
4526         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
4527                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
4528                                 rdtsc() - vcpu->arch.last_host_tsc;
4529                 if (tsc_delta < 0)
4530                         mark_tsc_unstable("KVM discovered backwards TSC");
4531
4532                 if (kvm_check_tsc_unstable()) {
4533                         u64 offset = kvm_compute_l1_tsc_offset(vcpu,
4534                                                 vcpu->arch.last_guest_tsc);
4535                         kvm_vcpu_write_tsc_offset(vcpu, offset);
4536                         vcpu->arch.tsc_catchup = 1;
4537                 }
4538
4539                 if (kvm_lapic_hv_timer_in_use(vcpu))
4540                         kvm_lapic_restart_hv_timer(vcpu);
4541
4542                 /*
4543                  * On a host with synchronized TSC, there is no need to update
4544                  * kvmclock on vcpu->cpu migration
4545                  */
4546                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
4547                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
4548                 if (vcpu->cpu != cpu)
4549                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
4550                 vcpu->cpu = cpu;
4551         }
4552
4553         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
4554 }
4555
4556 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
4557 {
4558         struct gfn_to_hva_cache *ghc = &vcpu->arch.st.cache;
4559         struct kvm_steal_time __user *st;
4560         struct kvm_memslots *slots;
4561         static const u8 preempted = KVM_VCPU_PREEMPTED;
4562
4563         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
4564                 return;
4565
4566         if (vcpu->arch.st.preempted)
4567                 return;
4568
4569         /* This happens on process exit */
4570         if (unlikely(current->mm != vcpu->kvm->mm))
4571                 return;
4572
4573         slots = kvm_memslots(vcpu->kvm);
4574
4575         if (unlikely(slots->generation != ghc->generation ||
4576                      kvm_is_error_hva(ghc->hva) || !ghc->memslot))
4577                 return;
4578
4579         st = (struct kvm_steal_time __user *)ghc->hva;
4580         BUILD_BUG_ON(sizeof(st->preempted) != sizeof(preempted));
4581
4582         if (!copy_to_user_nofault(&st->preempted, &preempted, sizeof(preempted)))
4583                 vcpu->arch.st.preempted = KVM_VCPU_PREEMPTED;
4584
4585         mark_page_dirty_in_slot(vcpu->kvm, ghc->memslot, gpa_to_gfn(ghc->gpa));
4586 }
4587
4588 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
4589 {
4590         int idx;
4591
4592         if (vcpu->preempted && !vcpu->arch.guest_state_protected)
4593                 vcpu->arch.preempted_in_kernel = !static_call(kvm_x86_get_cpl)(vcpu);
4594
4595         /*
4596          * Take the srcu lock as memslots will be accessed to check the gfn
4597          * cache generation against the memslots generation.
4598          */
4599         idx = srcu_read_lock(&vcpu->kvm->srcu);
4600         if (kvm_xen_msr_enabled(vcpu->kvm))
4601                 kvm_xen_runstate_set_preempted(vcpu);
4602         else
4603                 kvm_steal_time_set_preempted(vcpu);
4604         srcu_read_unlock(&vcpu->kvm->srcu, idx);
4605
4606         static_call(kvm_x86_vcpu_put)(vcpu);
4607         vcpu->arch.last_host_tsc = rdtsc();
4608 }
4609
4610 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
4611                                     struct kvm_lapic_state *s)
4612 {
4613         static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
4614
4615         return kvm_apic_get_state(vcpu, s);
4616 }
4617
4618 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
4619                                     struct kvm_lapic_state *s)
4620 {
4621         int r;
4622
4623         r = kvm_apic_set_state(vcpu, s);
4624         if (r)
4625                 return r;
4626         update_cr8_intercept(vcpu);
4627
4628         return 0;
4629 }
4630
4631 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
4632 {
4633         /*
4634          * We can accept userspace's request for interrupt injection
4635          * as long as we have a place to store the interrupt number.
4636          * The actual injection will happen when the CPU is able to
4637          * deliver the interrupt.
4638          */
4639         if (kvm_cpu_has_extint(vcpu))
4640                 return false;
4641
4642         /* Acknowledging ExtINT does not happen if LINT0 is masked.  */
4643         return (!lapic_in_kernel(vcpu) ||
4644                 kvm_apic_accept_pic_intr(vcpu));
4645 }
4646
4647 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
4648 {
4649         /*
4650          * Do not cause an interrupt window exit if an exception
4651          * is pending or an event needs reinjection; userspace
4652          * might want to inject the interrupt manually using KVM_SET_REGS
4653          * or KVM_SET_SREGS.  For that to work, we must be at an
4654          * instruction boundary and with no events half-injected.
4655          */
4656         return (kvm_arch_interrupt_allowed(vcpu) &&
4657                 kvm_cpu_accept_dm_intr(vcpu) &&
4658                 !kvm_event_needs_reinjection(vcpu) &&
4659                 !vcpu->arch.exception.pending);
4660 }
4661
4662 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
4663                                     struct kvm_interrupt *irq)
4664 {
4665         if (irq->irq >= KVM_NR_INTERRUPTS)
4666                 return -EINVAL;
4667
4668         if (!irqchip_in_kernel(vcpu->kvm)) {
4669                 kvm_queue_interrupt(vcpu, irq->irq, false);
4670                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4671                 return 0;
4672         }
4673
4674         /*
4675          * With in-kernel LAPIC, we only use this to inject EXTINT, so
4676          * fail for in-kernel 8259.
4677          */
4678         if (pic_in_kernel(vcpu->kvm))
4679                 return -ENXIO;
4680
4681         if (vcpu->arch.pending_external_vector != -1)
4682                 return -EEXIST;
4683
4684         vcpu->arch.pending_external_vector = irq->irq;
4685         kvm_make_request(KVM_REQ_EVENT, vcpu);
4686         return 0;
4687 }
4688
4689 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
4690 {
4691         kvm_inject_nmi(vcpu);
4692
4693         return 0;
4694 }
4695
4696 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
4697 {
4698         kvm_make_request(KVM_REQ_SMI, vcpu);
4699
4700         return 0;
4701 }
4702
4703 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
4704                                            struct kvm_tpr_access_ctl *tac)
4705 {
4706         if (tac->flags)
4707                 return -EINVAL;
4708         vcpu->arch.tpr_access_reporting = !!tac->enabled;
4709         return 0;
4710 }
4711
4712 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
4713                                         u64 mcg_cap)
4714 {
4715         int r;
4716         unsigned bank_num = mcg_cap & 0xff, bank;
4717
4718         r = -EINVAL;
4719         if (!bank_num || bank_num > KVM_MAX_MCE_BANKS)
4720                 goto out;
4721         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
4722                 goto out;
4723         r = 0;
4724         vcpu->arch.mcg_cap = mcg_cap;
4725         /* Init IA32_MCG_CTL to all 1s */
4726         if (mcg_cap & MCG_CTL_P)
4727                 vcpu->arch.mcg_ctl = ~(u64)0;
4728         /* Init IA32_MCi_CTL to all 1s */
4729         for (bank = 0; bank < bank_num; bank++)
4730                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
4731
4732         static_call(kvm_x86_setup_mce)(vcpu);
4733 out:
4734         return r;
4735 }
4736
4737 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
4738                                       struct kvm_x86_mce *mce)
4739 {
4740         u64 mcg_cap = vcpu->arch.mcg_cap;
4741         unsigned bank_num = mcg_cap & 0xff;
4742         u64 *banks = vcpu->arch.mce_banks;
4743
4744         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
4745                 return -EINVAL;
4746         /*
4747          * if IA32_MCG_CTL is not all 1s, the uncorrected error
4748          * reporting is disabled
4749          */
4750         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
4751             vcpu->arch.mcg_ctl != ~(u64)0)
4752                 return 0;
4753         banks += 4 * mce->bank;
4754         /*
4755          * if IA32_MCi_CTL is not all 1s, the uncorrected error
4756          * reporting is disabled for the bank
4757          */
4758         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
4759                 return 0;
4760         if (mce->status & MCI_STATUS_UC) {
4761                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
4762                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
4763                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
4764                         return 0;
4765                 }
4766                 if (banks[1] & MCI_STATUS_VAL)
4767                         mce->status |= MCI_STATUS_OVER;
4768                 banks[2] = mce->addr;
4769                 banks[3] = mce->misc;
4770                 vcpu->arch.mcg_status = mce->mcg_status;
4771                 banks[1] = mce->status;
4772                 kvm_queue_exception(vcpu, MC_VECTOR);
4773         } else if (!(banks[1] & MCI_STATUS_VAL)
4774                    || !(banks[1] & MCI_STATUS_UC)) {
4775                 if (banks[1] & MCI_STATUS_VAL)
4776                         mce->status |= MCI_STATUS_OVER;
4777                 banks[2] = mce->addr;
4778                 banks[3] = mce->misc;
4779                 banks[1] = mce->status;
4780         } else
4781                 banks[1] |= MCI_STATUS_OVER;
4782         return 0;
4783 }
4784
4785 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
4786                                                struct kvm_vcpu_events *events)
4787 {
4788         process_nmi(vcpu);
4789
4790         if (kvm_check_request(KVM_REQ_SMI, vcpu))
4791                 process_smi(vcpu);
4792
4793         /*
4794          * In guest mode, payload delivery should be deferred,
4795          * so that the L1 hypervisor can intercept #PF before
4796          * CR2 is modified (or intercept #DB before DR6 is
4797          * modified under nVMX). Unless the per-VM capability,
4798          * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4799          * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4800          * opportunistically defer the exception payload, deliver it if the
4801          * capability hasn't been requested before processing a
4802          * KVM_GET_VCPU_EVENTS.
4803          */
4804         if (!vcpu->kvm->arch.exception_payload_enabled &&
4805             vcpu->arch.exception.pending && vcpu->arch.exception.has_payload)
4806                 kvm_deliver_exception_payload(vcpu);
4807
4808         /*
4809          * The API doesn't provide the instruction length for software
4810          * exceptions, so don't report them. As long as the guest RIP
4811          * isn't advanced, we should expect to encounter the exception
4812          * again.
4813          */
4814         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
4815                 events->exception.injected = 0;
4816                 events->exception.pending = 0;
4817         } else {
4818                 events->exception.injected = vcpu->arch.exception.injected;
4819                 events->exception.pending = vcpu->arch.exception.pending;
4820                 /*
4821                  * For ABI compatibility, deliberately conflate
4822                  * pending and injected exceptions when
4823                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4824                  */
4825                 if (!vcpu->kvm->arch.exception_payload_enabled)
4826                         events->exception.injected |=
4827                                 vcpu->arch.exception.pending;
4828         }
4829         events->exception.nr = vcpu->arch.exception.nr;
4830         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
4831         events->exception.error_code = vcpu->arch.exception.error_code;
4832         events->exception_has_payload = vcpu->arch.exception.has_payload;
4833         events->exception_payload = vcpu->arch.exception.payload;
4834
4835         events->interrupt.injected =
4836                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
4837         events->interrupt.nr = vcpu->arch.interrupt.nr;
4838         events->interrupt.soft = 0;
4839         events->interrupt.shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
4840
4841         events->nmi.injected = vcpu->arch.nmi_injected;
4842         events->nmi.pending = vcpu->arch.nmi_pending != 0;
4843         events->nmi.masked = static_call(kvm_x86_get_nmi_mask)(vcpu);
4844         events->nmi.pad = 0;
4845
4846         events->sipi_vector = 0; /* never valid when reporting to user space */
4847
4848         events->smi.smm = is_smm(vcpu);
4849         events->smi.pending = vcpu->arch.smi_pending;
4850         events->smi.smm_inside_nmi =
4851                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
4852         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
4853
4854         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
4855                          | KVM_VCPUEVENT_VALID_SHADOW
4856                          | KVM_VCPUEVENT_VALID_SMM);
4857         if (vcpu->kvm->arch.exception_payload_enabled)
4858                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
4859
4860         memset(&events->reserved, 0, sizeof(events->reserved));
4861 }
4862
4863 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm);
4864
4865 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
4866                                               struct kvm_vcpu_events *events)
4867 {
4868         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4869                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4870                               | KVM_VCPUEVENT_VALID_SHADOW
4871                               | KVM_VCPUEVENT_VALID_SMM
4872                               | KVM_VCPUEVENT_VALID_PAYLOAD))
4873                 return -EINVAL;
4874
4875         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
4876                 if (!vcpu->kvm->arch.exception_payload_enabled)
4877                         return -EINVAL;
4878                 if (events->exception.pending)
4879                         events->exception.injected = 0;
4880                 else
4881                         events->exception_has_payload = 0;
4882         } else {
4883                 events->exception.pending = 0;
4884                 events->exception_has_payload = 0;
4885         }
4886
4887         if ((events->exception.injected || events->exception.pending) &&
4888             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
4889                 return -EINVAL;
4890
4891         /* INITs are latched while in SMM */
4892         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
4893             (events->smi.smm || events->smi.pending) &&
4894             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
4895                 return -EINVAL;
4896
4897         process_nmi(vcpu);
4898         vcpu->arch.exception.injected = events->exception.injected;
4899         vcpu->arch.exception.pending = events->exception.pending;
4900         vcpu->arch.exception.nr = events->exception.nr;
4901         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
4902         vcpu->arch.exception.error_code = events->exception.error_code;
4903         vcpu->arch.exception.has_payload = events->exception_has_payload;
4904         vcpu->arch.exception.payload = events->exception_payload;
4905
4906         vcpu->arch.interrupt.injected = events->interrupt.injected;
4907         vcpu->arch.interrupt.nr = events->interrupt.nr;
4908         vcpu->arch.interrupt.soft = events->interrupt.soft;
4909         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
4910                 static_call(kvm_x86_set_interrupt_shadow)(vcpu,
4911                                                 events->interrupt.shadow);
4912
4913         vcpu->arch.nmi_injected = events->nmi.injected;
4914         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
4915                 vcpu->arch.nmi_pending = events->nmi.pending;
4916         static_call(kvm_x86_set_nmi_mask)(vcpu, events->nmi.masked);
4917
4918         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
4919             lapic_in_kernel(vcpu))
4920                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
4921
4922         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
4923                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
4924                         kvm_x86_ops.nested_ops->leave_nested(vcpu);
4925                         kvm_smm_changed(vcpu, events->smi.smm);
4926                 }
4927
4928                 vcpu->arch.smi_pending = events->smi.pending;
4929
4930                 if (events->smi.smm) {
4931                         if (events->smi.smm_inside_nmi)
4932                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
4933                         else
4934                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
4935                 }
4936
4937                 if (lapic_in_kernel(vcpu)) {
4938                         if (events->smi.latched_init)
4939                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4940                         else
4941                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4942                 }
4943         }
4944
4945         kvm_make_request(KVM_REQ_EVENT, vcpu);
4946
4947         return 0;
4948 }
4949
4950 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
4951                                              struct kvm_debugregs *dbgregs)
4952 {
4953         unsigned long val;
4954
4955         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
4956         kvm_get_dr(vcpu, 6, &val);
4957         dbgregs->dr6 = val;
4958         dbgregs->dr7 = vcpu->arch.dr7;
4959         dbgregs->flags = 0;
4960         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
4961 }
4962
4963 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
4964                                             struct kvm_debugregs *dbgregs)
4965 {
4966         if (dbgregs->flags)
4967                 return -EINVAL;
4968
4969         if (!kvm_dr6_valid(dbgregs->dr6))
4970                 return -EINVAL;
4971         if (!kvm_dr7_valid(dbgregs->dr7))
4972                 return -EINVAL;
4973
4974         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
4975         kvm_update_dr0123(vcpu);
4976         vcpu->arch.dr6 = dbgregs->dr6;
4977         vcpu->arch.dr7 = dbgregs->dr7;
4978         kvm_update_dr7(vcpu);
4979
4980         return 0;
4981 }
4982
4983 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
4984                                          struct kvm_xsave *guest_xsave)
4985 {
4986         if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
4987                 return;
4988
4989         fpu_copy_guest_fpstate_to_uabi(&vcpu->arch.guest_fpu,
4990                                        guest_xsave->region,
4991                                        sizeof(guest_xsave->region),
4992                                        vcpu->arch.pkru);
4993 }
4994
4995 static void kvm_vcpu_ioctl_x86_get_xsave2(struct kvm_vcpu *vcpu,
4996                                           u8 *state, unsigned int size)
4997 {
4998         if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
4999                 return;
5000
5001         fpu_copy_guest_fpstate_to_uabi(&vcpu->arch.guest_fpu,
5002                                        state, size, vcpu->arch.pkru);
5003 }
5004
5005 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
5006                                         struct kvm_xsave *guest_xsave)
5007 {
5008         if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
5009                 return 0;
5010
5011         return fpu_copy_uabi_to_guest_fpstate(&vcpu->arch.guest_fpu,
5012                                               guest_xsave->region,
5013                                               supported_xcr0, &vcpu->arch.pkru);
5014 }
5015
5016 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
5017                                         struct kvm_xcrs *guest_xcrs)
5018 {
5019         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
5020                 guest_xcrs->nr_xcrs = 0;
5021                 return;
5022         }
5023
5024         guest_xcrs->nr_xcrs = 1;
5025         guest_xcrs->flags = 0;
5026         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
5027         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
5028 }
5029
5030 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
5031                                        struct kvm_xcrs *guest_xcrs)
5032 {
5033         int i, r = 0;
5034
5035         if (!boot_cpu_has(X86_FEATURE_XSAVE))
5036                 return -EINVAL;
5037
5038         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
5039                 return -EINVAL;
5040
5041         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
5042                 /* Only support XCR0 currently */
5043                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
5044                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
5045                                 guest_xcrs->xcrs[i].value);
5046                         break;
5047                 }
5048         if (r)
5049                 r = -EINVAL;
5050         return r;
5051 }
5052
5053 /*
5054  * kvm_set_guest_paused() indicates to the guest kernel that it has been
5055  * stopped by the hypervisor.  This function will be called from the host only.
5056  * EINVAL is returned when the host attempts to set the flag for a guest that
5057  * does not support pv clocks.
5058  */
5059 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
5060 {
5061         if (!vcpu->arch.pv_time_enabled)
5062                 return -EINVAL;
5063         vcpu->arch.pvclock_set_guest_stopped_request = true;
5064         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5065         return 0;
5066 }
5067
5068 static int kvm_arch_tsc_has_attr(struct kvm_vcpu *vcpu,
5069                                  struct kvm_device_attr *attr)
5070 {
5071         int r;
5072
5073         switch (attr->attr) {
5074         case KVM_VCPU_TSC_OFFSET:
5075                 r = 0;
5076                 break;
5077         default:
5078                 r = -ENXIO;
5079         }
5080
5081         return r;
5082 }
5083
5084 static int kvm_arch_tsc_get_attr(struct kvm_vcpu *vcpu,
5085                                  struct kvm_device_attr *attr)
5086 {
5087         u64 __user *uaddr = kvm_get_attr_addr(attr);
5088         int r;
5089
5090         if (IS_ERR(uaddr))
5091                 return PTR_ERR(uaddr);
5092
5093         switch (attr->attr) {
5094         case KVM_VCPU_TSC_OFFSET:
5095                 r = -EFAULT;
5096                 if (put_user(vcpu->arch.l1_tsc_offset, uaddr))
5097                         break;
5098                 r = 0;
5099                 break;
5100         default:
5101                 r = -ENXIO;
5102         }
5103
5104         return r;
5105 }
5106
5107 static int kvm_arch_tsc_set_attr(struct kvm_vcpu *vcpu,
5108                                  struct kvm_device_attr *attr)
5109 {
5110         u64 __user *uaddr = kvm_get_attr_addr(attr);
5111         struct kvm *kvm = vcpu->kvm;
5112         int r;
5113
5114         if (IS_ERR(uaddr))
5115                 return PTR_ERR(uaddr);
5116
5117         switch (attr->attr) {
5118         case KVM_VCPU_TSC_OFFSET: {
5119                 u64 offset, tsc, ns;
5120                 unsigned long flags;
5121                 bool matched;
5122
5123                 r = -EFAULT;
5124                 if (get_user(offset, uaddr))
5125                         break;
5126
5127                 raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
5128
5129                 matched = (vcpu->arch.virtual_tsc_khz &&
5130                            kvm->arch.last_tsc_khz == vcpu->arch.virtual_tsc_khz &&
5131                            kvm->arch.last_tsc_offset == offset);
5132
5133                 tsc = kvm_scale_tsc(vcpu, rdtsc(), vcpu->arch.l1_tsc_scaling_ratio) + offset;
5134                 ns = get_kvmclock_base_ns();
5135
5136                 __kvm_synchronize_tsc(vcpu, offset, tsc, ns, matched);
5137                 raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
5138
5139                 r = 0;
5140                 break;
5141         }
5142         default:
5143                 r = -ENXIO;
5144         }
5145
5146         return r;
5147 }
5148
5149 static int kvm_vcpu_ioctl_device_attr(struct kvm_vcpu *vcpu,
5150                                       unsigned int ioctl,
5151                                       void __user *argp)
5152 {
5153         struct kvm_device_attr attr;
5154         int r;
5155
5156         if (copy_from_user(&attr, argp, sizeof(attr)))
5157                 return -EFAULT;
5158
5159         if (attr.group != KVM_VCPU_TSC_CTRL)
5160                 return -ENXIO;
5161
5162         switch (ioctl) {
5163         case KVM_HAS_DEVICE_ATTR:
5164                 r = kvm_arch_tsc_has_attr(vcpu, &attr);
5165                 break;
5166         case KVM_GET_DEVICE_ATTR:
5167                 r = kvm_arch_tsc_get_attr(vcpu, &attr);
5168                 break;
5169         case KVM_SET_DEVICE_ATTR:
5170                 r = kvm_arch_tsc_set_attr(vcpu, &attr);
5171                 break;
5172         }
5173
5174         return r;
5175 }
5176
5177 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
5178                                      struct kvm_enable_cap *cap)
5179 {
5180         int r;
5181         uint16_t vmcs_version;
5182         void __user *user_ptr;
5183
5184         if (cap->flags)
5185                 return -EINVAL;
5186
5187         switch (cap->cap) {
5188         case KVM_CAP_HYPERV_SYNIC2:
5189                 if (cap->args[0])
5190                         return -EINVAL;
5191                 fallthrough;
5192
5193         case KVM_CAP_HYPERV_SYNIC:
5194                 if (!irqchip_in_kernel(vcpu->kvm))
5195                         return -EINVAL;
5196                 return kvm_hv_activate_synic(vcpu, cap->cap ==
5197                                              KVM_CAP_HYPERV_SYNIC2);
5198         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
5199                 if (!kvm_x86_ops.nested_ops->enable_evmcs)
5200                         return -ENOTTY;
5201                 r = kvm_x86_ops.nested_ops->enable_evmcs(vcpu, &vmcs_version);
5202                 if (!r) {
5203                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
5204                         if (copy_to_user(user_ptr, &vmcs_version,
5205                                          sizeof(vmcs_version)))
5206                                 r = -EFAULT;
5207                 }
5208                 return r;
5209         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
5210                 if (!kvm_x86_ops.enable_direct_tlbflush)
5211                         return -ENOTTY;
5212
5213                 return static_call(kvm_x86_enable_direct_tlbflush)(vcpu);
5214
5215         case KVM_CAP_HYPERV_ENFORCE_CPUID:
5216                 return kvm_hv_set_enforce_cpuid(vcpu, cap->args[0]);
5217
5218         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
5219                 vcpu->arch.pv_cpuid.enforce = cap->args[0];
5220                 if (vcpu->arch.pv_cpuid.enforce)
5221                         kvm_update_pv_runtime(vcpu);
5222
5223                 return 0;
5224         default:
5225                 return -EINVAL;
5226         }
5227 }
5228
5229 long kvm_arch_vcpu_ioctl(struct file *filp,
5230                          unsigned int ioctl, unsigned long arg)
5231 {
5232         struct kvm_vcpu *vcpu = filp->private_data;
5233         void __user *argp = (void __user *)arg;
5234         int r;
5235         union {
5236                 struct kvm_sregs2 *sregs2;
5237                 struct kvm_lapic_state *lapic;
5238                 struct kvm_xsave *xsave;
5239                 struct kvm_xcrs *xcrs;
5240                 void *buffer;
5241         } u;
5242
5243         vcpu_load(vcpu);
5244
5245         u.buffer = NULL;
5246         switch (ioctl) {
5247         case KVM_GET_LAPIC: {
5248                 r = -EINVAL;
5249                 if (!lapic_in_kernel(vcpu))
5250                         goto out;
5251                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
5252                                 GFP_KERNEL_ACCOUNT);
5253
5254                 r = -ENOMEM;
5255                 if (!u.lapic)
5256                         goto out;
5257                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
5258                 if (r)
5259                         goto out;
5260                 r = -EFAULT;
5261                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
5262                         goto out;
5263                 r = 0;
5264                 break;
5265         }
5266         case KVM_SET_LAPIC: {
5267                 r = -EINVAL;
5268                 if (!lapic_in_kernel(vcpu))
5269                         goto out;
5270                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
5271                 if (IS_ERR(u.lapic)) {
5272                         r = PTR_ERR(u.lapic);
5273                         goto out_nofree;
5274                 }
5275
5276                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
5277                 break;
5278         }
5279         case KVM_INTERRUPT: {
5280                 struct kvm_interrupt irq;
5281
5282                 r = -EFAULT;
5283                 if (copy_from_user(&irq, argp, sizeof(irq)))
5284                         goto out;
5285                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
5286                 break;
5287         }
5288         case KVM_NMI: {
5289                 r = kvm_vcpu_ioctl_nmi(vcpu);
5290                 break;
5291         }
5292         case KVM_SMI: {
5293                 r = kvm_vcpu_ioctl_smi(vcpu);
5294                 break;
5295         }
5296         case KVM_SET_CPUID: {
5297                 struct kvm_cpuid __user *cpuid_arg = argp;
5298                 struct kvm_cpuid cpuid;
5299
5300                 r = -EFAULT;
5301                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5302                         goto out;
5303                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
5304                 break;
5305         }
5306         case KVM_SET_CPUID2: {
5307                 struct kvm_cpuid2 __user *cpuid_arg = argp;
5308                 struct kvm_cpuid2 cpuid;
5309
5310                 r = -EFAULT;
5311                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5312                         goto out;
5313                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
5314                                               cpuid_arg->entries);
5315                 break;
5316         }
5317         case KVM_GET_CPUID2: {
5318                 struct kvm_cpuid2 __user *cpuid_arg = argp;
5319                 struct kvm_cpuid2 cpuid;
5320
5321                 r = -EFAULT;
5322                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5323                         goto out;
5324                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
5325                                               cpuid_arg->entries);
5326                 if (r)
5327                         goto out;
5328                 r = -EFAULT;
5329                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
5330                         goto out;
5331                 r = 0;
5332                 break;
5333         }
5334         case KVM_GET_MSRS: {
5335                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5336                 r = msr_io(vcpu, argp, do_get_msr, 1);
5337                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5338                 break;
5339         }
5340         case KVM_SET_MSRS: {
5341                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5342                 r = msr_io(vcpu, argp, do_set_msr, 0);
5343                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5344                 break;
5345         }
5346         case KVM_TPR_ACCESS_REPORTING: {
5347                 struct kvm_tpr_access_ctl tac;
5348
5349                 r = -EFAULT;
5350                 if (copy_from_user(&tac, argp, sizeof(tac)))
5351                         goto out;
5352                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
5353                 if (r)
5354                         goto out;
5355                 r = -EFAULT;
5356                 if (copy_to_user(argp, &tac, sizeof(tac)))
5357                         goto out;
5358                 r = 0;
5359                 break;
5360         };
5361         case KVM_SET_VAPIC_ADDR: {
5362                 struct kvm_vapic_addr va;
5363                 int idx;
5364
5365                 r = -EINVAL;
5366                 if (!lapic_in_kernel(vcpu))
5367                         goto out;
5368                 r = -EFAULT;
5369                 if (copy_from_user(&va, argp, sizeof(va)))
5370                         goto out;
5371                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5372                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
5373                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5374                 break;
5375         }
5376         case KVM_X86_SETUP_MCE: {
5377                 u64 mcg_cap;
5378
5379                 r = -EFAULT;
5380                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
5381                         goto out;
5382                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
5383                 break;
5384         }
5385         case KVM_X86_SET_MCE: {
5386                 struct kvm_x86_mce mce;
5387
5388                 r = -EFAULT;
5389                 if (copy_from_user(&mce, argp, sizeof(mce)))
5390                         goto out;
5391                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
5392                 break;
5393         }
5394         case KVM_GET_VCPU_EVENTS: {
5395                 struct kvm_vcpu_events events;
5396
5397                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
5398
5399                 r = -EFAULT;
5400                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
5401                         break;
5402                 r = 0;
5403                 break;
5404         }
5405         case KVM_SET_VCPU_EVENTS: {
5406                 struct kvm_vcpu_events events;
5407
5408                 r = -EFAULT;
5409                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
5410                         break;
5411
5412                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
5413                 break;
5414         }
5415         case KVM_GET_DEBUGREGS: {
5416                 struct kvm_debugregs dbgregs;
5417
5418                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
5419
5420                 r = -EFAULT;
5421                 if (copy_to_user(argp, &dbgregs,
5422                                  sizeof(struct kvm_debugregs)))
5423                         break;
5424                 r = 0;
5425                 break;
5426         }
5427         case KVM_SET_DEBUGREGS: {
5428                 struct kvm_debugregs dbgregs;
5429
5430                 r = -EFAULT;
5431                 if (copy_from_user(&dbgregs, argp,
5432                                    sizeof(struct kvm_debugregs)))
5433                         break;
5434
5435                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
5436                 break;
5437         }
5438         case KVM_GET_XSAVE: {
5439                 r = -EINVAL;
5440                 if (vcpu->arch.guest_fpu.uabi_size > sizeof(struct kvm_xsave))
5441                         break;
5442
5443                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
5444                 r = -ENOMEM;
5445                 if (!u.xsave)
5446                         break;
5447
5448                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
5449
5450                 r = -EFAULT;
5451                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
5452                         break;
5453                 r = 0;
5454                 break;
5455         }
5456         case KVM_SET_XSAVE: {
5457                 int size = vcpu->arch.guest_fpu.uabi_size;
5458
5459                 u.xsave = memdup_user(argp, size);
5460                 if (IS_ERR(u.xsave)) {
5461                         r = PTR_ERR(u.xsave);
5462                         goto out_nofree;
5463                 }
5464
5465                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
5466                 break;
5467         }
5468
5469         case KVM_GET_XSAVE2: {
5470                 int size = vcpu->arch.guest_fpu.uabi_size;
5471
5472                 u.xsave = kzalloc(size, GFP_KERNEL_ACCOUNT);
5473                 r = -ENOMEM;
5474                 if (!u.xsave)
5475                         break;
5476
5477                 kvm_vcpu_ioctl_x86_get_xsave2(vcpu, u.buffer, size);
5478
5479                 r = -EFAULT;
5480                 if (copy_to_user(argp, u.xsave, size))
5481                         break;
5482
5483                 r = 0;
5484                 break;
5485         }
5486
5487         case KVM_GET_XCRS: {
5488                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
5489                 r = -ENOMEM;
5490                 if (!u.xcrs)
5491                         break;
5492
5493                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
5494
5495                 r = -EFAULT;
5496                 if (copy_to_user(argp, u.xcrs,
5497                                  sizeof(struct kvm_xcrs)))
5498                         break;
5499                 r = 0;
5500                 break;
5501         }
5502         case KVM_SET_XCRS: {
5503                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
5504                 if (IS_ERR(u.xcrs)) {
5505                         r = PTR_ERR(u.xcrs);
5506                         goto out_nofree;
5507                 }
5508
5509                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
5510                 break;
5511         }
5512         case KVM_SET_TSC_KHZ: {
5513                 u32 user_tsc_khz;
5514
5515                 r = -EINVAL;
5516                 user_tsc_khz = (u32)arg;
5517
5518                 if (kvm_has_tsc_control &&
5519                     user_tsc_khz >= kvm_max_guest_tsc_khz)
5520                         goto out;
5521
5522                 if (user_tsc_khz == 0)
5523                         user_tsc_khz = tsc_khz;
5524
5525                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
5526                         r = 0;
5527
5528                 goto out;
5529         }
5530         case KVM_GET_TSC_KHZ: {
5531                 r = vcpu->arch.virtual_tsc_khz;
5532                 goto out;
5533         }
5534         case KVM_KVMCLOCK_CTRL: {
5535                 r = kvm_set_guest_paused(vcpu);
5536                 goto out;
5537         }
5538         case KVM_ENABLE_CAP: {
5539                 struct kvm_enable_cap cap;
5540
5541                 r = -EFAULT;
5542                 if (copy_from_user(&cap, argp, sizeof(cap)))
5543                         goto out;
5544                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
5545                 break;
5546         }
5547         case KVM_GET_NESTED_STATE: {
5548                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5549                 u32 user_data_size;
5550
5551                 r = -EINVAL;
5552                 if (!kvm_x86_ops.nested_ops->get_state)
5553                         break;
5554
5555                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
5556                 r = -EFAULT;
5557                 if (get_user(user_data_size, &user_kvm_nested_state->size))
5558                         break;
5559
5560                 r = kvm_x86_ops.nested_ops->get_state(vcpu, user_kvm_nested_state,
5561                                                      user_data_size);
5562                 if (r < 0)
5563                         break;
5564
5565                 if (r > user_data_size) {
5566                         if (put_user(r, &user_kvm_nested_state->size))
5567                                 r = -EFAULT;
5568                         else
5569                                 r = -E2BIG;
5570                         break;
5571                 }
5572
5573                 r = 0;
5574                 break;
5575         }
5576         case KVM_SET_NESTED_STATE: {
5577                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5578                 struct kvm_nested_state kvm_state;
5579                 int idx;
5580
5581                 r = -EINVAL;
5582                 if (!kvm_x86_ops.nested_ops->set_state)
5583                         break;
5584
5585                 r = -EFAULT;
5586                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
5587                         break;
5588
5589                 r = -EINVAL;
5590                 if (kvm_state.size < sizeof(kvm_state))
5591                         break;
5592
5593                 if (kvm_state.flags &
5594                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
5595                       | KVM_STATE_NESTED_EVMCS | KVM_STATE_NESTED_MTF_PENDING
5596                       | KVM_STATE_NESTED_GIF_SET))
5597                         break;
5598
5599                 /* nested_run_pending implies guest_mode.  */
5600                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
5601                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
5602                         break;
5603
5604                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5605                 r = kvm_x86_ops.nested_ops->set_state(vcpu, user_kvm_nested_state, &kvm_state);
5606                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5607                 break;
5608         }
5609         case KVM_GET_SUPPORTED_HV_CPUID:
5610                 r = kvm_ioctl_get_supported_hv_cpuid(vcpu, argp);
5611                 break;
5612 #ifdef CONFIG_KVM_XEN
5613         case KVM_XEN_VCPU_GET_ATTR: {
5614                 struct kvm_xen_vcpu_attr xva;
5615
5616                 r = -EFAULT;
5617                 if (copy_from_user(&xva, argp, sizeof(xva)))
5618                         goto out;
5619                 r = kvm_xen_vcpu_get_attr(vcpu, &xva);
5620                 if (!r && copy_to_user(argp, &xva, sizeof(xva)))
5621                         r = -EFAULT;
5622                 break;
5623         }
5624         case KVM_XEN_VCPU_SET_ATTR: {
5625                 struct kvm_xen_vcpu_attr xva;
5626
5627                 r = -EFAULT;
5628                 if (copy_from_user(&xva, argp, sizeof(xva)))
5629                         goto out;
5630                 r = kvm_xen_vcpu_set_attr(vcpu, &xva);
5631                 break;
5632         }
5633 #endif
5634         case KVM_GET_SREGS2: {
5635                 u.sregs2 = kzalloc(sizeof(struct kvm_sregs2), GFP_KERNEL);
5636                 r = -ENOMEM;
5637                 if (!u.sregs2)
5638                         goto out;
5639                 __get_sregs2(vcpu, u.sregs2);
5640                 r = -EFAULT;
5641                 if (copy_to_user(argp, u.sregs2, sizeof(struct kvm_sregs2)))
5642                         goto out;
5643                 r = 0;
5644                 break;
5645         }
5646         case KVM_SET_SREGS2: {
5647                 u.sregs2 = memdup_user(argp, sizeof(struct kvm_sregs2));
5648                 if (IS_ERR(u.sregs2)) {
5649                         r = PTR_ERR(u.sregs2);
5650                         u.sregs2 = NULL;
5651                         goto out;
5652                 }
5653                 r = __set_sregs2(vcpu, u.sregs2);
5654                 break;
5655         }
5656         case KVM_HAS_DEVICE_ATTR:
5657         case KVM_GET_DEVICE_ATTR:
5658         case KVM_SET_DEVICE_ATTR:
5659                 r = kvm_vcpu_ioctl_device_attr(vcpu, ioctl, argp);
5660                 break;
5661         default:
5662                 r = -EINVAL;
5663         }
5664 out:
5665         kfree(u.buffer);
5666 out_nofree:
5667         vcpu_put(vcpu);
5668         return r;
5669 }
5670
5671 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
5672 {
5673         return VM_FAULT_SIGBUS;
5674 }
5675
5676 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
5677 {
5678         int ret;
5679
5680         if (addr > (unsigned int)(-3 * PAGE_SIZE))
5681                 return -EINVAL;
5682         ret = static_call(kvm_x86_set_tss_addr)(kvm, addr);
5683         return ret;
5684 }
5685
5686 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
5687                                               u64 ident_addr)
5688 {
5689         return static_call(kvm_x86_set_identity_map_addr)(kvm, ident_addr);
5690 }
5691
5692 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
5693                                          unsigned long kvm_nr_mmu_pages)
5694 {
5695         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
5696                 return -EINVAL;
5697
5698         mutex_lock(&kvm->slots_lock);
5699
5700         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
5701         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
5702
5703         mutex_unlock(&kvm->slots_lock);
5704         return 0;
5705 }
5706
5707 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
5708 {
5709         return kvm->arch.n_max_mmu_pages;
5710 }
5711
5712 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5713 {
5714         struct kvm_pic *pic = kvm->arch.vpic;
5715         int r;
5716
5717         r = 0;
5718         switch (chip->chip_id) {
5719         case KVM_IRQCHIP_PIC_MASTER:
5720                 memcpy(&chip->chip.pic, &pic->pics[0],
5721                         sizeof(struct kvm_pic_state));
5722                 break;
5723         case KVM_IRQCHIP_PIC_SLAVE:
5724                 memcpy(&chip->chip.pic, &pic->pics[1],
5725                         sizeof(struct kvm_pic_state));
5726                 break;
5727         case KVM_IRQCHIP_IOAPIC:
5728                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
5729                 break;
5730         default:
5731                 r = -EINVAL;
5732                 break;
5733         }
5734         return r;
5735 }
5736
5737 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5738 {
5739         struct kvm_pic *pic = kvm->arch.vpic;
5740         int r;
5741
5742         r = 0;
5743         switch (chip->chip_id) {
5744         case KVM_IRQCHIP_PIC_MASTER:
5745                 spin_lock(&pic->lock);
5746                 memcpy(&pic->pics[0], &chip->chip.pic,
5747                         sizeof(struct kvm_pic_state));
5748                 spin_unlock(&pic->lock);
5749                 break;
5750         case KVM_IRQCHIP_PIC_SLAVE:
5751                 spin_lock(&pic->lock);
5752                 memcpy(&pic->pics[1], &chip->chip.pic,
5753                         sizeof(struct kvm_pic_state));
5754                 spin_unlock(&pic->lock);
5755                 break;
5756         case KVM_IRQCHIP_IOAPIC:
5757                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
5758                 break;
5759         default:
5760                 r = -EINVAL;
5761                 break;
5762         }
5763         kvm_pic_update_irq(pic);
5764         return r;
5765 }
5766
5767 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5768 {
5769         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
5770
5771         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
5772
5773         mutex_lock(&kps->lock);
5774         memcpy(ps, &kps->channels, sizeof(*ps));
5775         mutex_unlock(&kps->lock);
5776         return 0;
5777 }
5778
5779 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5780 {
5781         int i;
5782         struct kvm_pit *pit = kvm->arch.vpit;
5783
5784         mutex_lock(&pit->pit_state.lock);
5785         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
5786         for (i = 0; i < 3; i++)
5787                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
5788         mutex_unlock(&pit->pit_state.lock);
5789         return 0;
5790 }
5791
5792 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5793 {
5794         mutex_lock(&kvm->arch.vpit->pit_state.lock);
5795         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
5796                 sizeof(ps->channels));
5797         ps->flags = kvm->arch.vpit->pit_state.flags;
5798         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
5799         memset(&ps->reserved, 0, sizeof(ps->reserved));
5800         return 0;
5801 }
5802
5803 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5804 {
5805         int start = 0;
5806         int i;
5807         u32 prev_legacy, cur_legacy;
5808         struct kvm_pit *pit = kvm->arch.vpit;
5809
5810         mutex_lock(&pit->pit_state.lock);
5811         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
5812         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
5813         if (!prev_legacy && cur_legacy)
5814                 start = 1;
5815         memcpy(&pit->pit_state.channels, &ps->channels,
5816                sizeof(pit->pit_state.channels));
5817         pit->pit_state.flags = ps->flags;
5818         for (i = 0; i < 3; i++)
5819                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
5820                                    start && i == 0);
5821         mutex_unlock(&pit->pit_state.lock);
5822         return 0;
5823 }
5824
5825 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
5826                                  struct kvm_reinject_control *control)
5827 {
5828         struct kvm_pit *pit = kvm->arch.vpit;
5829
5830         /* pit->pit_state.lock was overloaded to prevent userspace from getting
5831          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5832          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
5833          */
5834         mutex_lock(&pit->pit_state.lock);
5835         kvm_pit_set_reinject(pit, control->pit_reinject);
5836         mutex_unlock(&pit->pit_state.lock);
5837
5838         return 0;
5839 }
5840
5841 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
5842 {
5843
5844         /*
5845          * Flush all CPUs' dirty log buffers to the  dirty_bitmap.  Called
5846          * before reporting dirty_bitmap to userspace.  KVM flushes the buffers
5847          * on all VM-Exits, thus we only need to kick running vCPUs to force a
5848          * VM-Exit.
5849          */
5850         struct kvm_vcpu *vcpu;
5851         unsigned long i;
5852
5853         kvm_for_each_vcpu(i, vcpu, kvm)
5854                 kvm_vcpu_kick(vcpu);
5855 }
5856
5857 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
5858                         bool line_status)
5859 {
5860         if (!irqchip_in_kernel(kvm))
5861                 return -ENXIO;
5862
5863         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
5864                                         irq_event->irq, irq_event->level,
5865                                         line_status);
5866         return 0;
5867 }
5868
5869 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
5870                             struct kvm_enable_cap *cap)
5871 {
5872         int r;
5873
5874         if (cap->flags)
5875                 return -EINVAL;
5876
5877         switch (cap->cap) {
5878         case KVM_CAP_DISABLE_QUIRKS:
5879                 kvm->arch.disabled_quirks = cap->args[0];
5880                 r = 0;
5881                 break;
5882         case KVM_CAP_SPLIT_IRQCHIP: {
5883                 mutex_lock(&kvm->lock);
5884                 r = -EINVAL;
5885                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
5886                         goto split_irqchip_unlock;
5887                 r = -EEXIST;
5888                 if (irqchip_in_kernel(kvm))
5889                         goto split_irqchip_unlock;
5890                 if (kvm->created_vcpus)
5891                         goto split_irqchip_unlock;
5892                 r = kvm_setup_empty_irq_routing(kvm);
5893                 if (r)
5894                         goto split_irqchip_unlock;
5895                 /* Pairs with irqchip_in_kernel. */
5896                 smp_wmb();
5897                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
5898                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
5899                 kvm_request_apicv_update(kvm, true, APICV_INHIBIT_REASON_ABSENT);
5900                 r = 0;
5901 split_irqchip_unlock:
5902                 mutex_unlock(&kvm->lock);
5903                 break;
5904         }
5905         case KVM_CAP_X2APIC_API:
5906                 r = -EINVAL;
5907                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
5908                         break;
5909
5910                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
5911                         kvm->arch.x2apic_format = true;
5912                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
5913                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
5914
5915                 r = 0;
5916                 break;
5917         case KVM_CAP_X86_DISABLE_EXITS:
5918                 r = -EINVAL;
5919                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
5920                         break;
5921
5922                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
5923                         kvm_can_mwait_in_guest())
5924                         kvm->arch.mwait_in_guest = true;
5925                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
5926                         kvm->arch.hlt_in_guest = true;
5927                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
5928                         kvm->arch.pause_in_guest = true;
5929                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
5930                         kvm->arch.cstate_in_guest = true;
5931                 r = 0;
5932                 break;
5933         case KVM_CAP_MSR_PLATFORM_INFO:
5934                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
5935                 r = 0;
5936                 break;
5937         case KVM_CAP_EXCEPTION_PAYLOAD:
5938                 kvm->arch.exception_payload_enabled = cap->args[0];
5939                 r = 0;
5940                 break;
5941         case KVM_CAP_X86_USER_SPACE_MSR:
5942                 kvm->arch.user_space_msr_mask = cap->args[0];
5943                 r = 0;
5944                 break;
5945         case KVM_CAP_X86_BUS_LOCK_EXIT:
5946                 r = -EINVAL;
5947                 if (cap->args[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE)
5948                         break;
5949
5950                 if ((cap->args[0] & KVM_BUS_LOCK_DETECTION_OFF) &&
5951                     (cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT))
5952                         break;
5953
5954                 if (kvm_has_bus_lock_exit &&
5955                     cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT)
5956                         kvm->arch.bus_lock_detection_enabled = true;
5957                 r = 0;
5958                 break;
5959 #ifdef CONFIG_X86_SGX_KVM
5960         case KVM_CAP_SGX_ATTRIBUTE: {
5961                 unsigned long allowed_attributes = 0;
5962
5963                 r = sgx_set_attribute(&allowed_attributes, cap->args[0]);
5964                 if (r)
5965                         break;
5966
5967                 /* KVM only supports the PROVISIONKEY privileged attribute. */
5968                 if ((allowed_attributes & SGX_ATTR_PROVISIONKEY) &&
5969                     !(allowed_attributes & ~SGX_ATTR_PROVISIONKEY))
5970                         kvm->arch.sgx_provisioning_allowed = true;
5971                 else
5972                         r = -EINVAL;
5973                 break;
5974         }
5975 #endif
5976         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
5977                 r = -EINVAL;
5978                 if (kvm_x86_ops.vm_copy_enc_context_from)
5979                         r = kvm_x86_ops.vm_copy_enc_context_from(kvm, cap->args[0]);
5980                 return r;
5981         case KVM_CAP_VM_MOVE_ENC_CONTEXT_FROM:
5982                 r = -EINVAL;
5983                 if (kvm_x86_ops.vm_move_enc_context_from)
5984                         r = kvm_x86_ops.vm_move_enc_context_from(
5985                                 kvm, cap->args[0]);
5986                 return r;
5987         case KVM_CAP_EXIT_HYPERCALL:
5988                 if (cap->args[0] & ~KVM_EXIT_HYPERCALL_VALID_MASK) {
5989                         r = -EINVAL;
5990                         break;
5991                 }
5992                 kvm->arch.hypercall_exit_enabled = cap->args[0];
5993                 r = 0;
5994                 break;
5995         case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
5996                 r = -EINVAL;
5997                 if (cap->args[0] & ~1)
5998                         break;
5999                 kvm->arch.exit_on_emulation_error = cap->args[0];
6000                 r = 0;
6001                 break;
6002         default:
6003                 r = -EINVAL;
6004                 break;
6005         }
6006         return r;
6007 }
6008
6009 static struct kvm_x86_msr_filter *kvm_alloc_msr_filter(bool default_allow)
6010 {
6011         struct kvm_x86_msr_filter *msr_filter;
6012
6013         msr_filter = kzalloc(sizeof(*msr_filter), GFP_KERNEL_ACCOUNT);
6014         if (!msr_filter)
6015                 return NULL;
6016
6017         msr_filter->default_allow = default_allow;
6018         return msr_filter;
6019 }
6020
6021 static void kvm_free_msr_filter(struct kvm_x86_msr_filter *msr_filter)
6022 {
6023         u32 i;
6024
6025         if (!msr_filter)
6026                 return;
6027
6028         for (i = 0; i < msr_filter->count; i++)
6029                 kfree(msr_filter->ranges[i].bitmap);
6030
6031         kfree(msr_filter);
6032 }
6033
6034 static int kvm_add_msr_filter(struct kvm_x86_msr_filter *msr_filter,
6035                               struct kvm_msr_filter_range *user_range)
6036 {
6037         unsigned long *bitmap = NULL;
6038         size_t bitmap_size;
6039
6040         if (!user_range->nmsrs)
6041                 return 0;
6042
6043         if (user_range->flags & ~(KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE))
6044                 return -EINVAL;
6045
6046         if (!user_range->flags)
6047                 return -EINVAL;
6048
6049         bitmap_size = BITS_TO_LONGS(user_range->nmsrs) * sizeof(long);
6050         if (!bitmap_size || bitmap_size > KVM_MSR_FILTER_MAX_BITMAP_SIZE)
6051                 return -EINVAL;
6052
6053         bitmap = memdup_user((__user u8*)user_range->bitmap, bitmap_size);
6054         if (IS_ERR(bitmap))
6055                 return PTR_ERR(bitmap);
6056
6057         msr_filter->ranges[msr_filter->count] = (struct msr_bitmap_range) {
6058                 .flags = user_range->flags,
6059                 .base = user_range->base,
6060                 .nmsrs = user_range->nmsrs,
6061                 .bitmap = bitmap,
6062         };
6063
6064         msr_filter->count++;
6065         return 0;
6066 }
6067
6068 static int kvm_vm_ioctl_set_msr_filter(struct kvm *kvm, void __user *argp)
6069 {
6070         struct kvm_msr_filter __user *user_msr_filter = argp;
6071         struct kvm_x86_msr_filter *new_filter, *old_filter;
6072         struct kvm_msr_filter filter;
6073         bool default_allow;
6074         bool empty = true;
6075         int r = 0;
6076         u32 i;
6077
6078         if (copy_from_user(&filter, user_msr_filter, sizeof(filter)))
6079                 return -EFAULT;
6080
6081         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++)
6082                 empty &= !filter.ranges[i].nmsrs;
6083
6084         default_allow = !(filter.flags & KVM_MSR_FILTER_DEFAULT_DENY);
6085         if (empty && !default_allow)
6086                 return -EINVAL;
6087
6088         new_filter = kvm_alloc_msr_filter(default_allow);
6089         if (!new_filter)
6090                 return -ENOMEM;
6091
6092         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++) {
6093                 r = kvm_add_msr_filter(new_filter, &filter.ranges[i]);
6094                 if (r) {
6095                         kvm_free_msr_filter(new_filter);
6096                         return r;
6097                 }
6098         }
6099
6100         mutex_lock(&kvm->lock);
6101
6102         /* The per-VM filter is protected by kvm->lock... */
6103         old_filter = srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1);
6104
6105         rcu_assign_pointer(kvm->arch.msr_filter, new_filter);
6106         synchronize_srcu(&kvm->srcu);
6107
6108         kvm_free_msr_filter(old_filter);
6109
6110         kvm_make_all_cpus_request(kvm, KVM_REQ_MSR_FILTER_CHANGED);
6111         mutex_unlock(&kvm->lock);
6112
6113         return 0;
6114 }
6115
6116 #ifdef CONFIG_HAVE_KVM_PM_NOTIFIER
6117 static int kvm_arch_suspend_notifier(struct kvm *kvm)
6118 {
6119         struct kvm_vcpu *vcpu;
6120         unsigned long i;
6121         int ret = 0;
6122
6123         mutex_lock(&kvm->lock);
6124         kvm_for_each_vcpu(i, vcpu, kvm) {
6125                 if (!vcpu->arch.pv_time_enabled)
6126                         continue;
6127
6128                 ret = kvm_set_guest_paused(vcpu);
6129                 if (ret) {
6130                         kvm_err("Failed to pause guest VCPU%d: %d\n",
6131                                 vcpu->vcpu_id, ret);
6132                         break;
6133                 }
6134         }
6135         mutex_unlock(&kvm->lock);
6136
6137         return ret ? NOTIFY_BAD : NOTIFY_DONE;
6138 }
6139
6140 int kvm_arch_pm_notifier(struct kvm *kvm, unsigned long state)
6141 {
6142         switch (state) {
6143         case PM_HIBERNATION_PREPARE:
6144         case PM_SUSPEND_PREPARE:
6145                 return kvm_arch_suspend_notifier(kvm);
6146         }
6147
6148         return NOTIFY_DONE;
6149 }
6150 #endif /* CONFIG_HAVE_KVM_PM_NOTIFIER */
6151
6152 static int kvm_vm_ioctl_get_clock(struct kvm *kvm, void __user *argp)
6153 {
6154         struct kvm_clock_data data = { 0 };
6155
6156         get_kvmclock(kvm, &data);
6157         if (copy_to_user(argp, &data, sizeof(data)))
6158                 return -EFAULT;
6159
6160         return 0;
6161 }
6162
6163 static int kvm_vm_ioctl_set_clock(struct kvm *kvm, void __user *argp)
6164 {
6165         struct kvm_arch *ka = &kvm->arch;
6166         struct kvm_clock_data data;
6167         u64 now_raw_ns;
6168
6169         if (copy_from_user(&data, argp, sizeof(data)))
6170                 return -EFAULT;
6171
6172         /*
6173          * Only KVM_CLOCK_REALTIME is used, but allow passing the
6174          * result of KVM_GET_CLOCK back to KVM_SET_CLOCK.
6175          */
6176         if (data.flags & ~KVM_CLOCK_VALID_FLAGS)
6177                 return -EINVAL;
6178
6179         kvm_hv_invalidate_tsc_page(kvm);
6180         kvm_start_pvclock_update(kvm);
6181         pvclock_update_vm_gtod_copy(kvm);
6182
6183         /*
6184          * This pairs with kvm_guest_time_update(): when masterclock is
6185          * in use, we use master_kernel_ns + kvmclock_offset to set
6186          * unsigned 'system_time' so if we use get_kvmclock_ns() (which
6187          * is slightly ahead) here we risk going negative on unsigned
6188          * 'system_time' when 'data.clock' is very small.
6189          */
6190         if (data.flags & KVM_CLOCK_REALTIME) {
6191                 u64 now_real_ns = ktime_get_real_ns();
6192
6193                 /*
6194                  * Avoid stepping the kvmclock backwards.
6195                  */
6196                 if (now_real_ns > data.realtime)
6197                         data.clock += now_real_ns - data.realtime;
6198         }
6199
6200         if (ka->use_master_clock)
6201                 now_raw_ns = ka->master_kernel_ns;
6202         else
6203                 now_raw_ns = get_kvmclock_base_ns();
6204         ka->kvmclock_offset = data.clock - now_raw_ns;
6205         kvm_end_pvclock_update(kvm);
6206         return 0;
6207 }
6208
6209 long kvm_arch_vm_ioctl(struct file *filp,
6210                        unsigned int ioctl, unsigned long arg)
6211 {
6212         struct kvm *kvm = filp->private_data;
6213         void __user *argp = (void __user *)arg;
6214         int r = -ENOTTY;
6215         /*
6216          * This union makes it completely explicit to gcc-3.x
6217          * that these two variables' stack usage should be
6218          * combined, not added together.
6219          */
6220         union {
6221                 struct kvm_pit_state ps;
6222                 struct kvm_pit_state2 ps2;
6223                 struct kvm_pit_config pit_config;
6224         } u;
6225
6226         switch (ioctl) {
6227         case KVM_SET_TSS_ADDR:
6228                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
6229                 break;
6230         case KVM_SET_IDENTITY_MAP_ADDR: {
6231                 u64 ident_addr;
6232
6233                 mutex_lock(&kvm->lock);
6234                 r = -EINVAL;
6235                 if (kvm->created_vcpus)
6236                         goto set_identity_unlock;
6237                 r = -EFAULT;
6238                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
6239                         goto set_identity_unlock;
6240                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
6241 set_identity_unlock:
6242                 mutex_unlock(&kvm->lock);
6243                 break;
6244         }
6245         case KVM_SET_NR_MMU_PAGES:
6246                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
6247                 break;
6248         case KVM_GET_NR_MMU_PAGES:
6249                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
6250                 break;
6251         case KVM_CREATE_IRQCHIP: {
6252                 mutex_lock(&kvm->lock);
6253
6254                 r = -EEXIST;
6255                 if (irqchip_in_kernel(kvm))
6256                         goto create_irqchip_unlock;
6257
6258                 r = -EINVAL;
6259                 if (kvm->created_vcpus)
6260                         goto create_irqchip_unlock;
6261
6262                 r = kvm_pic_init(kvm);
6263                 if (r)
6264                         goto create_irqchip_unlock;
6265
6266                 r = kvm_ioapic_init(kvm);
6267                 if (r) {
6268                         kvm_pic_destroy(kvm);
6269                         goto create_irqchip_unlock;
6270                 }
6271
6272                 r = kvm_setup_default_irq_routing(kvm);
6273                 if (r) {
6274                         kvm_ioapic_destroy(kvm);
6275                         kvm_pic_destroy(kvm);
6276                         goto create_irqchip_unlock;
6277                 }
6278                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
6279                 smp_wmb();
6280                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
6281                 kvm_request_apicv_update(kvm, true, APICV_INHIBIT_REASON_ABSENT);
6282         create_irqchip_unlock:
6283                 mutex_unlock(&kvm->lock);
6284                 break;
6285         }
6286         case KVM_CREATE_PIT:
6287                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
6288                 goto create_pit;
6289         case KVM_CREATE_PIT2:
6290                 r = -EFAULT;
6291                 if (copy_from_user(&u.pit_config, argp,
6292                                    sizeof(struct kvm_pit_config)))
6293                         goto out;
6294         create_pit:
6295                 mutex_lock(&kvm->lock);
6296                 r = -EEXIST;
6297                 if (kvm->arch.vpit)
6298                         goto create_pit_unlock;
6299                 r = -ENOMEM;
6300                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
6301                 if (kvm->arch.vpit)
6302                         r = 0;
6303         create_pit_unlock:
6304                 mutex_unlock(&kvm->lock);
6305                 break;
6306         case KVM_GET_IRQCHIP: {
6307                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
6308                 struct kvm_irqchip *chip;
6309
6310                 chip = memdup_user(argp, sizeof(*chip));
6311                 if (IS_ERR(chip)) {
6312                         r = PTR_ERR(chip);
6313                         goto out;
6314                 }
6315
6316                 r = -ENXIO;
6317                 if (!irqchip_kernel(kvm))
6318                         goto get_irqchip_out;
6319                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
6320                 if (r)
6321                         goto get_irqchip_out;
6322                 r = -EFAULT;
6323                 if (copy_to_user(argp, chip, sizeof(*chip)))
6324                         goto get_irqchip_out;
6325                 r = 0;
6326         get_irqchip_out:
6327                 kfree(chip);
6328                 break;
6329         }
6330         case KVM_SET_IRQCHIP: {
6331                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
6332                 struct kvm_irqchip *chip;
6333
6334                 chip = memdup_user(argp, sizeof(*chip));
6335                 if (IS_ERR(chip)) {
6336                         r = PTR_ERR(chip);
6337                         goto out;
6338                 }
6339
6340                 r = -ENXIO;
6341                 if (!irqchip_kernel(kvm))
6342                         goto set_irqchip_out;
6343                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
6344         set_irqchip_out:
6345                 kfree(chip);
6346                 break;
6347         }
6348         case KVM_GET_PIT: {
6349                 r = -EFAULT;
6350                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
6351                         goto out;
6352                 r = -ENXIO;
6353                 if (!kvm->arch.vpit)
6354                         goto out;
6355                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
6356                 if (r)
6357                         goto out;
6358                 r = -EFAULT;
6359                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
6360                         goto out;
6361                 r = 0;
6362                 break;
6363         }
6364         case KVM_SET_PIT: {
6365                 r = -EFAULT;
6366                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
6367                         goto out;
6368                 mutex_lock(&kvm->lock);
6369                 r = -ENXIO;
6370                 if (!kvm->arch.vpit)
6371                         goto set_pit_out;
6372                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
6373 set_pit_out:
6374                 mutex_unlock(&kvm->lock);
6375                 break;
6376         }
6377         case KVM_GET_PIT2: {
6378                 r = -ENXIO;
6379                 if (!kvm->arch.vpit)
6380                         goto out;
6381                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
6382                 if (r)
6383                         goto out;
6384                 r = -EFAULT;
6385                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
6386                         goto out;
6387                 r = 0;
6388                 break;
6389         }
6390         case KVM_SET_PIT2: {
6391                 r = -EFAULT;
6392                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
6393                         goto out;
6394                 mutex_lock(&kvm->lock);
6395                 r = -ENXIO;
6396                 if (!kvm->arch.vpit)
6397                         goto set_pit2_out;
6398                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
6399 set_pit2_out:
6400                 mutex_unlock(&kvm->lock);
6401                 break;
6402         }
6403         case KVM_REINJECT_CONTROL: {
6404                 struct kvm_reinject_control control;
6405                 r =  -EFAULT;
6406                 if (copy_from_user(&control, argp, sizeof(control)))
6407                         goto out;
6408                 r = -ENXIO;
6409                 if (!kvm->arch.vpit)
6410                         goto out;
6411                 r = kvm_vm_ioctl_reinject(kvm, &control);
6412                 break;
6413         }
6414         case KVM_SET_BOOT_CPU_ID:
6415                 r = 0;
6416                 mutex_lock(&kvm->lock);
6417                 if (kvm->created_vcpus)
6418                         r = -EBUSY;
6419                 else
6420                         kvm->arch.bsp_vcpu_id = arg;
6421                 mutex_unlock(&kvm->lock);
6422                 break;
6423 #ifdef CONFIG_KVM_XEN
6424         case KVM_XEN_HVM_CONFIG: {
6425                 struct kvm_xen_hvm_config xhc;
6426                 r = -EFAULT;
6427                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
6428                         goto out;
6429                 r = kvm_xen_hvm_config(kvm, &xhc);
6430                 break;
6431         }
6432         case KVM_XEN_HVM_GET_ATTR: {
6433                 struct kvm_xen_hvm_attr xha;
6434
6435                 r = -EFAULT;
6436                 if (copy_from_user(&xha, argp, sizeof(xha)))
6437                         goto out;
6438                 r = kvm_xen_hvm_get_attr(kvm, &xha);
6439                 if (!r && copy_to_user(argp, &xha, sizeof(xha)))
6440                         r = -EFAULT;
6441                 break;
6442         }
6443         case KVM_XEN_HVM_SET_ATTR: {
6444                 struct kvm_xen_hvm_attr xha;
6445
6446                 r = -EFAULT;
6447                 if (copy_from_user(&xha, argp, sizeof(xha)))
6448                         goto out;
6449                 r = kvm_xen_hvm_set_attr(kvm, &xha);
6450                 break;
6451         }
6452 #endif
6453         case KVM_SET_CLOCK:
6454                 r = kvm_vm_ioctl_set_clock(kvm, argp);
6455                 break;
6456         case KVM_GET_CLOCK:
6457                 r = kvm_vm_ioctl_get_clock(kvm, argp);
6458                 break;
6459         case KVM_MEMORY_ENCRYPT_OP: {
6460                 r = -ENOTTY;
6461                 if (kvm_x86_ops.mem_enc_op)
6462                         r = static_call(kvm_x86_mem_enc_op)(kvm, argp);
6463                 break;
6464         }
6465         case KVM_MEMORY_ENCRYPT_REG_REGION: {
6466                 struct kvm_enc_region region;
6467
6468                 r = -EFAULT;
6469                 if (copy_from_user(&region, argp, sizeof(region)))
6470                         goto out;
6471
6472                 r = -ENOTTY;
6473                 if (kvm_x86_ops.mem_enc_reg_region)
6474                         r = static_call(kvm_x86_mem_enc_reg_region)(kvm, &region);
6475                 break;
6476         }
6477         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
6478                 struct kvm_enc_region region;
6479
6480                 r = -EFAULT;
6481                 if (copy_from_user(&region, argp, sizeof(region)))
6482                         goto out;
6483
6484                 r = -ENOTTY;
6485                 if (kvm_x86_ops.mem_enc_unreg_region)
6486                         r = static_call(kvm_x86_mem_enc_unreg_region)(kvm, &region);
6487                 break;
6488         }
6489         case KVM_HYPERV_EVENTFD: {
6490                 struct kvm_hyperv_eventfd hvevfd;
6491
6492                 r = -EFAULT;
6493                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
6494                         goto out;
6495                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
6496                 break;
6497         }
6498         case KVM_SET_PMU_EVENT_FILTER:
6499                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
6500                 break;
6501         case KVM_X86_SET_MSR_FILTER:
6502                 r = kvm_vm_ioctl_set_msr_filter(kvm, argp);
6503                 break;
6504         default:
6505                 r = -ENOTTY;
6506         }
6507 out:
6508         return r;
6509 }
6510
6511 static void kvm_init_msr_list(void)
6512 {
6513         struct x86_pmu_capability x86_pmu;
6514         u32 dummy[2];
6515         unsigned i;
6516
6517         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
6518                          "Please update the fixed PMCs in msrs_to_saved_all[]");
6519
6520         perf_get_x86_pmu_capability(&x86_pmu);
6521
6522         num_msrs_to_save = 0;
6523         num_emulated_msrs = 0;
6524         num_msr_based_features = 0;
6525
6526         for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
6527                 if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
6528                         continue;
6529
6530                 /*
6531                  * Even MSRs that are valid in the host may not be exposed
6532                  * to the guests in some cases.
6533                  */
6534                 switch (msrs_to_save_all[i]) {
6535                 case MSR_IA32_BNDCFGS:
6536                         if (!kvm_mpx_supported())
6537                                 continue;
6538                         break;
6539                 case MSR_TSC_AUX:
6540                         if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP) &&
6541                             !kvm_cpu_cap_has(X86_FEATURE_RDPID))
6542                                 continue;
6543                         break;
6544                 case MSR_IA32_UMWAIT_CONTROL:
6545                         if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG))
6546                                 continue;
6547                         break;
6548                 case MSR_IA32_RTIT_CTL:
6549                 case MSR_IA32_RTIT_STATUS:
6550                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT))
6551                                 continue;
6552                         break;
6553                 case MSR_IA32_RTIT_CR3_MATCH:
6554                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6555                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
6556                                 continue;
6557                         break;
6558                 case MSR_IA32_RTIT_OUTPUT_BASE:
6559                 case MSR_IA32_RTIT_OUTPUT_MASK:
6560                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6561                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
6562                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
6563                                 continue;
6564                         break;
6565                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
6566                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6567                                 msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
6568                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
6569                                 continue;
6570                         break;
6571                 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
6572                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
6573                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6574                                 continue;
6575                         break;
6576                 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
6577                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
6578                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6579                                 continue;
6580                         break;
6581                 case MSR_IA32_XFD:
6582                 case MSR_IA32_XFD_ERR:
6583                         if (!kvm_cpu_cap_has(X86_FEATURE_XFD))
6584                                 continue;
6585                         break;
6586                 default:
6587                         break;
6588                 }
6589
6590                 msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
6591         }
6592
6593         for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
6594                 if (!static_call(kvm_x86_has_emulated_msr)(NULL, emulated_msrs_all[i]))
6595                         continue;
6596
6597                 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
6598         }
6599
6600         for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
6601                 struct kvm_msr_entry msr;
6602
6603                 msr.index = msr_based_features_all[i];
6604                 if (kvm_get_msr_feature(&msr))
6605                         continue;
6606
6607                 msr_based_features[num_msr_based_features++] = msr_based_features_all[i];
6608         }
6609 }
6610
6611 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
6612                            const void *v)
6613 {
6614         int handled = 0;
6615         int n;
6616
6617         do {
6618                 n = min(len, 8);
6619                 if (!(lapic_in_kernel(vcpu) &&
6620                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
6621                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
6622                         break;
6623                 handled += n;
6624                 addr += n;
6625                 len -= n;
6626                 v += n;
6627         } while (len);
6628
6629         return handled;
6630 }
6631
6632 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
6633 {
6634         int handled = 0;
6635         int n;
6636
6637         do {
6638                 n = min(len, 8);
6639                 if (!(lapic_in_kernel(vcpu) &&
6640                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
6641                                          addr, n, v))
6642                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
6643                         break;
6644                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
6645                 handled += n;
6646                 addr += n;
6647                 len -= n;
6648                 v += n;
6649         } while (len);
6650
6651         return handled;
6652 }
6653
6654 static void kvm_set_segment(struct kvm_vcpu *vcpu,
6655                         struct kvm_segment *var, int seg)
6656 {
6657         static_call(kvm_x86_set_segment)(vcpu, var, seg);
6658 }
6659
6660 void kvm_get_segment(struct kvm_vcpu *vcpu,
6661                      struct kvm_segment *var, int seg)
6662 {
6663         static_call(kvm_x86_get_segment)(vcpu, var, seg);
6664 }
6665
6666 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
6667                            struct x86_exception *exception)
6668 {
6669         struct kvm_mmu *mmu = vcpu->arch.mmu;
6670         gpa_t t_gpa;
6671
6672         BUG_ON(!mmu_is_nested(vcpu));
6673
6674         /* NPT walks are always user-walks */
6675         access |= PFERR_USER_MASK;
6676         t_gpa  = mmu->gva_to_gpa(vcpu, mmu, gpa, access, exception);
6677
6678         return t_gpa;
6679 }
6680
6681 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
6682                               struct x86_exception *exception)
6683 {
6684         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6685
6686         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6687         return mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
6688 }
6689 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_read);
6690
6691  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
6692                                 struct x86_exception *exception)
6693 {
6694         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6695
6696         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6697         access |= PFERR_FETCH_MASK;
6698         return mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
6699 }
6700
6701 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
6702                                struct x86_exception *exception)
6703 {
6704         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6705
6706         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6707         access |= PFERR_WRITE_MASK;
6708         return mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
6709 }
6710 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_write);
6711
6712 /* uses this to access any guest's mapped memory without checking CPL */
6713 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
6714                                 struct x86_exception *exception)
6715 {
6716         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6717
6718         return mmu->gva_to_gpa(vcpu, mmu, gva, 0, exception);
6719 }
6720
6721 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6722                                       struct kvm_vcpu *vcpu, u32 access,
6723                                       struct x86_exception *exception)
6724 {
6725         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6726         void *data = val;
6727         int r = X86EMUL_CONTINUE;
6728
6729         while (bytes) {
6730                 gpa_t gpa = mmu->gva_to_gpa(vcpu, mmu, addr, access, exception);
6731                 unsigned offset = addr & (PAGE_SIZE-1);
6732                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
6733                 int ret;
6734
6735                 if (gpa == UNMAPPED_GVA)
6736                         return X86EMUL_PROPAGATE_FAULT;
6737                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
6738                                                offset, toread);
6739                 if (ret < 0) {
6740                         r = X86EMUL_IO_NEEDED;
6741                         goto out;
6742                 }
6743
6744                 bytes -= toread;
6745                 data += toread;
6746                 addr += toread;
6747         }
6748 out:
6749         return r;
6750 }
6751
6752 /* used for instruction fetching */
6753 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
6754                                 gva_t addr, void *val, unsigned int bytes,
6755                                 struct x86_exception *exception)
6756 {
6757         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6758         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6759         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6760         unsigned offset;
6761         int ret;
6762
6763         /* Inline kvm_read_guest_virt_helper for speed.  */
6764         gpa_t gpa = mmu->gva_to_gpa(vcpu, mmu, addr, access|PFERR_FETCH_MASK,
6765                                     exception);
6766         if (unlikely(gpa == UNMAPPED_GVA))
6767                 return X86EMUL_PROPAGATE_FAULT;
6768
6769         offset = addr & (PAGE_SIZE-1);
6770         if (WARN_ON(offset + bytes > PAGE_SIZE))
6771                 bytes = (unsigned)PAGE_SIZE - offset;
6772         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
6773                                        offset, bytes);
6774         if (unlikely(ret < 0))
6775                 return X86EMUL_IO_NEEDED;
6776
6777         return X86EMUL_CONTINUE;
6778 }
6779
6780 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
6781                                gva_t addr, void *val, unsigned int bytes,
6782                                struct x86_exception *exception)
6783 {
6784         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6785
6786         /*
6787          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
6788          * is returned, but our callers are not ready for that and they blindly
6789          * call kvm_inject_page_fault.  Ensure that they at least do not leak
6790          * uninitialized kernel stack memory into cr2 and error code.
6791          */
6792         memset(exception, 0, sizeof(*exception));
6793         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
6794                                           exception);
6795 }
6796 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
6797
6798 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
6799                              gva_t addr, void *val, unsigned int bytes,
6800                              struct x86_exception *exception, bool system)
6801 {
6802         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6803         u32 access = 0;
6804
6805         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6806                 access |= PFERR_USER_MASK;
6807
6808         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
6809 }
6810
6811 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
6812                 unsigned long addr, void *val, unsigned int bytes)
6813 {
6814         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6815         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
6816
6817         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
6818 }
6819
6820 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6821                                       struct kvm_vcpu *vcpu, u32 access,
6822                                       struct x86_exception *exception)
6823 {
6824         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6825         void *data = val;
6826         int r = X86EMUL_CONTINUE;
6827
6828         while (bytes) {
6829                 gpa_t gpa = mmu->gva_to_gpa(vcpu, mmu, addr, access, exception);
6830                 unsigned offset = addr & (PAGE_SIZE-1);
6831                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
6832                 int ret;
6833
6834                 if (gpa == UNMAPPED_GVA)
6835                         return X86EMUL_PROPAGATE_FAULT;
6836                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
6837                 if (ret < 0) {
6838                         r = X86EMUL_IO_NEEDED;
6839                         goto out;
6840                 }
6841
6842                 bytes -= towrite;
6843                 data += towrite;
6844                 addr += towrite;
6845         }
6846 out:
6847         return r;
6848 }
6849
6850 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
6851                               unsigned int bytes, struct x86_exception *exception,
6852                               bool system)
6853 {
6854         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6855         u32 access = PFERR_WRITE_MASK;
6856
6857         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6858                 access |= PFERR_USER_MASK;
6859
6860         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6861                                            access, exception);
6862 }
6863
6864 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
6865                                 unsigned int bytes, struct x86_exception *exception)
6866 {
6867         /* kvm_write_guest_virt_system can pull in tons of pages. */
6868         vcpu->arch.l1tf_flush_l1d = true;
6869
6870         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6871                                            PFERR_WRITE_MASK, exception);
6872 }
6873 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
6874
6875 static int kvm_can_emulate_insn(struct kvm_vcpu *vcpu, int emul_type,
6876                                 void *insn, int insn_len)
6877 {
6878         return static_call(kvm_x86_can_emulate_instruction)(vcpu, emul_type,
6879                                                             insn, insn_len);
6880 }
6881
6882 int handle_ud(struct kvm_vcpu *vcpu)
6883 {
6884         static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
6885         int emul_type = EMULTYPE_TRAP_UD;
6886         char sig[5]; /* ud2; .ascii "kvm" */
6887         struct x86_exception e;
6888
6889         if (unlikely(!kvm_can_emulate_insn(vcpu, emul_type, NULL, 0)))
6890                 return 1;
6891
6892         if (force_emulation_prefix &&
6893             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
6894                                 sig, sizeof(sig), &e) == 0 &&
6895             memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
6896                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
6897                 emul_type = EMULTYPE_TRAP_UD_FORCED;
6898         }
6899
6900         return kvm_emulate_instruction(vcpu, emul_type);
6901 }
6902 EXPORT_SYMBOL_GPL(handle_ud);
6903
6904 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6905                             gpa_t gpa, bool write)
6906 {
6907         /* For APIC access vmexit */
6908         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6909                 return 1;
6910
6911         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
6912                 trace_vcpu_match_mmio(gva, gpa, write, true);
6913                 return 1;
6914         }
6915
6916         return 0;
6917 }
6918
6919 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6920                                 gpa_t *gpa, struct x86_exception *exception,
6921                                 bool write)
6922 {
6923         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6924         u32 access = ((static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0)
6925                 | (write ? PFERR_WRITE_MASK : 0);
6926
6927         /*
6928          * currently PKRU is only applied to ept enabled guest so
6929          * there is no pkey in EPT page table for L1 guest or EPT
6930          * shadow page table for L2 guest.
6931          */
6932         if (vcpu_match_mmio_gva(vcpu, gva) && (!is_paging(vcpu) ||
6933             !permission_fault(vcpu, vcpu->arch.walk_mmu,
6934                               vcpu->arch.mmio_access, 0, access))) {
6935                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
6936                                         (gva & (PAGE_SIZE - 1));
6937                 trace_vcpu_match_mmio(gva, *gpa, write, false);
6938                 return 1;
6939         }
6940
6941         *gpa = mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
6942
6943         if (*gpa == UNMAPPED_GVA)
6944                 return -1;
6945
6946         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
6947 }
6948
6949 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
6950                         const void *val, int bytes)
6951 {
6952         int ret;
6953
6954         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
6955         if (ret < 0)
6956                 return 0;
6957         kvm_page_track_write(vcpu, gpa, val, bytes);
6958         return 1;
6959 }
6960
6961 struct read_write_emulator_ops {
6962         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
6963                                   int bytes);
6964         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
6965                                   void *val, int bytes);
6966         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6967                                int bytes, void *val);
6968         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6969                                     void *val, int bytes);
6970         bool write;
6971 };
6972
6973 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
6974 {
6975         if (vcpu->mmio_read_completed) {
6976                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
6977                                vcpu->mmio_fragments[0].gpa, val);
6978                 vcpu->mmio_read_completed = 0;
6979                 return 1;
6980         }
6981
6982         return 0;
6983 }
6984
6985 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6986                         void *val, int bytes)
6987 {
6988         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
6989 }
6990
6991 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6992                          void *val, int bytes)
6993 {
6994         return emulator_write_phys(vcpu, gpa, val, bytes);
6995 }
6996
6997 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
6998 {
6999         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
7000         return vcpu_mmio_write(vcpu, gpa, bytes, val);
7001 }
7002
7003 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
7004                           void *val, int bytes)
7005 {
7006         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
7007         return X86EMUL_IO_NEEDED;
7008 }
7009
7010 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
7011                            void *val, int bytes)
7012 {
7013         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
7014
7015         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
7016         return X86EMUL_CONTINUE;
7017 }
7018
7019 static const struct read_write_emulator_ops read_emultor = {
7020         .read_write_prepare = read_prepare,
7021         .read_write_emulate = read_emulate,
7022         .read_write_mmio = vcpu_mmio_read,
7023         .read_write_exit_mmio = read_exit_mmio,
7024 };
7025
7026 static const struct read_write_emulator_ops write_emultor = {
7027         .read_write_emulate = write_emulate,
7028         .read_write_mmio = write_mmio,
7029         .read_write_exit_mmio = write_exit_mmio,
7030         .write = true,
7031 };
7032
7033 static int emulator_read_write_onepage(unsigned long addr, void *val,
7034                                        unsigned int bytes,
7035                                        struct x86_exception *exception,
7036                                        struct kvm_vcpu *vcpu,
7037                                        const struct read_write_emulator_ops *ops)
7038 {
7039         gpa_t gpa;
7040         int handled, ret;
7041         bool write = ops->write;
7042         struct kvm_mmio_fragment *frag;
7043         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7044
7045         /*
7046          * If the exit was due to a NPF we may already have a GPA.
7047          * If the GPA is present, use it to avoid the GVA to GPA table walk.
7048          * Note, this cannot be used on string operations since string
7049          * operation using rep will only have the initial GPA from the NPF
7050          * occurred.
7051          */
7052         if (ctxt->gpa_available && emulator_can_use_gpa(ctxt) &&
7053             (addr & ~PAGE_MASK) == (ctxt->gpa_val & ~PAGE_MASK)) {
7054                 gpa = ctxt->gpa_val;
7055                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
7056         } else {
7057                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
7058                 if (ret < 0)
7059                         return X86EMUL_PROPAGATE_FAULT;
7060         }
7061
7062         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
7063                 return X86EMUL_CONTINUE;
7064
7065         /*
7066          * Is this MMIO handled locally?
7067          */
7068         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
7069         if (handled == bytes)
7070                 return X86EMUL_CONTINUE;
7071
7072         gpa += handled;
7073         bytes -= handled;
7074         val += handled;
7075
7076         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
7077         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
7078         frag->gpa = gpa;
7079         frag->data = val;
7080         frag->len = bytes;
7081         return X86EMUL_CONTINUE;
7082 }
7083
7084 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
7085                         unsigned long addr,
7086                         void *val, unsigned int bytes,
7087                         struct x86_exception *exception,
7088                         const struct read_write_emulator_ops *ops)
7089 {
7090         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7091         gpa_t gpa;
7092         int rc;
7093
7094         if (ops->read_write_prepare &&
7095                   ops->read_write_prepare(vcpu, val, bytes))
7096                 return X86EMUL_CONTINUE;
7097
7098         vcpu->mmio_nr_fragments = 0;
7099
7100         /* Crossing a page boundary? */
7101         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
7102                 int now;
7103
7104                 now = -addr & ~PAGE_MASK;
7105                 rc = emulator_read_write_onepage(addr, val, now, exception,
7106                                                  vcpu, ops);
7107
7108                 if (rc != X86EMUL_CONTINUE)
7109                         return rc;
7110                 addr += now;
7111                 if (ctxt->mode != X86EMUL_MODE_PROT64)
7112                         addr = (u32)addr;
7113                 val += now;
7114                 bytes -= now;
7115         }
7116
7117         rc = emulator_read_write_onepage(addr, val, bytes, exception,
7118                                          vcpu, ops);
7119         if (rc != X86EMUL_CONTINUE)
7120                 return rc;
7121
7122         if (!vcpu->mmio_nr_fragments)
7123                 return rc;
7124
7125         gpa = vcpu->mmio_fragments[0].gpa;
7126
7127         vcpu->mmio_needed = 1;
7128         vcpu->mmio_cur_fragment = 0;
7129
7130         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
7131         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
7132         vcpu->run->exit_reason = KVM_EXIT_MMIO;
7133         vcpu->run->mmio.phys_addr = gpa;
7134
7135         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
7136 }
7137
7138 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
7139                                   unsigned long addr,
7140                                   void *val,
7141                                   unsigned int bytes,
7142                                   struct x86_exception *exception)
7143 {
7144         return emulator_read_write(ctxt, addr, val, bytes,
7145                                    exception, &read_emultor);
7146 }
7147
7148 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
7149                             unsigned long addr,
7150                             const void *val,
7151                             unsigned int bytes,
7152                             struct x86_exception *exception)
7153 {
7154         return emulator_read_write(ctxt, addr, (void *)val, bytes,
7155                                    exception, &write_emultor);
7156 }
7157
7158 #define CMPXCHG_TYPE(t, ptr, old, new) \
7159         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
7160
7161 #ifdef CONFIG_X86_64
7162 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
7163 #else
7164 #  define CMPXCHG64(ptr, old, new) \
7165         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
7166 #endif
7167
7168 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
7169                                      unsigned long addr,
7170                                      const void *old,
7171                                      const void *new,
7172                                      unsigned int bytes,
7173                                      struct x86_exception *exception)
7174 {
7175         struct kvm_host_map map;
7176         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7177         u64 page_line_mask;
7178         gpa_t gpa;
7179         char *kaddr;
7180         bool exchanged;
7181
7182         /* guests cmpxchg8b have to be emulated atomically */
7183         if (bytes > 8 || (bytes & (bytes - 1)))
7184                 goto emul_write;
7185
7186         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
7187
7188         if (gpa == UNMAPPED_GVA ||
7189             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
7190                 goto emul_write;
7191
7192         /*
7193          * Emulate the atomic as a straight write to avoid #AC if SLD is
7194          * enabled in the host and the access splits a cache line.
7195          */
7196         if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))
7197                 page_line_mask = ~(cache_line_size() - 1);
7198         else
7199                 page_line_mask = PAGE_MASK;
7200
7201         if (((gpa + bytes - 1) & page_line_mask) != (gpa & page_line_mask))
7202                 goto emul_write;
7203
7204         if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
7205                 goto emul_write;
7206
7207         kaddr = map.hva + offset_in_page(gpa);
7208
7209         switch (bytes) {
7210         case 1:
7211                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
7212                 break;
7213         case 2:
7214                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
7215                 break;
7216         case 4:
7217                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
7218                 break;
7219         case 8:
7220                 exchanged = CMPXCHG64(kaddr, old, new);
7221                 break;
7222         default:
7223                 BUG();
7224         }
7225
7226         kvm_vcpu_unmap(vcpu, &map, true);
7227
7228         if (!exchanged)
7229                 return X86EMUL_CMPXCHG_FAILED;
7230
7231         kvm_page_track_write(vcpu, gpa, new, bytes);
7232
7233         return X86EMUL_CONTINUE;
7234
7235 emul_write:
7236         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
7237
7238         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
7239 }
7240
7241 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
7242 {
7243         int r = 0, i;
7244
7245         for (i = 0; i < vcpu->arch.pio.count; i++) {
7246                 if (vcpu->arch.pio.in)
7247                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
7248                                             vcpu->arch.pio.size, pd);
7249                 else
7250                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
7251                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
7252                                              pd);
7253                 if (r)
7254                         break;
7255                 pd += vcpu->arch.pio.size;
7256         }
7257         return r;
7258 }
7259
7260 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
7261                                unsigned short port,
7262                                unsigned int count, bool in)
7263 {
7264         vcpu->arch.pio.port = port;
7265         vcpu->arch.pio.in = in;
7266         vcpu->arch.pio.count  = count;
7267         vcpu->arch.pio.size = size;
7268
7269         if (!kernel_pio(vcpu, vcpu->arch.pio_data))
7270                 return 1;
7271
7272         vcpu->run->exit_reason = KVM_EXIT_IO;
7273         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
7274         vcpu->run->io.size = size;
7275         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
7276         vcpu->run->io.count = count;
7277         vcpu->run->io.port = port;
7278
7279         return 0;
7280 }
7281
7282 static int __emulator_pio_in(struct kvm_vcpu *vcpu, int size,
7283                              unsigned short port, unsigned int count)
7284 {
7285         WARN_ON(vcpu->arch.pio.count);
7286         memset(vcpu->arch.pio_data, 0, size * count);
7287         return emulator_pio_in_out(vcpu, size, port, count, true);
7288 }
7289
7290 static void complete_emulator_pio_in(struct kvm_vcpu *vcpu, void *val)
7291 {
7292         int size = vcpu->arch.pio.size;
7293         unsigned count = vcpu->arch.pio.count;
7294         memcpy(val, vcpu->arch.pio_data, size * count);
7295         trace_kvm_pio(KVM_PIO_IN, vcpu->arch.pio.port, size, count, vcpu->arch.pio_data);
7296         vcpu->arch.pio.count = 0;
7297 }
7298
7299 static int emulator_pio_in(struct kvm_vcpu *vcpu, int size,
7300                            unsigned short port, void *val, unsigned int count)
7301 {
7302         if (vcpu->arch.pio.count) {
7303                 /*
7304                  * Complete a previous iteration that required userspace I/O.
7305                  * Note, @count isn't guaranteed to match pio.count as userspace
7306                  * can modify ECX before rerunning the vCPU.  Ignore any such
7307                  * shenanigans as KVM doesn't support modifying the rep count,
7308                  * and the emulator ensures @count doesn't overflow the buffer.
7309                  */
7310         } else {
7311                 int r = __emulator_pio_in(vcpu, size, port, count);
7312                 if (!r)
7313                         return r;
7314
7315                 /* Results already available, fall through.  */
7316         }
7317
7318         complete_emulator_pio_in(vcpu, val);
7319         return 1;
7320 }
7321
7322 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
7323                                     int size, unsigned short port, void *val,
7324                                     unsigned int count)
7325 {
7326         return emulator_pio_in(emul_to_vcpu(ctxt), size, port, val, count);
7327
7328 }
7329
7330 static int emulator_pio_out(struct kvm_vcpu *vcpu, int size,
7331                             unsigned short port, const void *val,
7332                             unsigned int count)
7333 {
7334         int ret;
7335
7336         memcpy(vcpu->arch.pio_data, val, size * count);
7337         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
7338         ret = emulator_pio_in_out(vcpu, size, port, count, false);
7339         if (ret)
7340                 vcpu->arch.pio.count = 0;
7341
7342         return ret;
7343 }
7344
7345 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
7346                                      int size, unsigned short port,
7347                                      const void *val, unsigned int count)
7348 {
7349         return emulator_pio_out(emul_to_vcpu(ctxt), size, port, val, count);
7350 }
7351
7352 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
7353 {
7354         return static_call(kvm_x86_get_segment_base)(vcpu, seg);
7355 }
7356
7357 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
7358 {
7359         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
7360 }
7361
7362 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
7363 {
7364         if (!need_emulate_wbinvd(vcpu))
7365                 return X86EMUL_CONTINUE;
7366
7367         if (static_call(kvm_x86_has_wbinvd_exit)()) {
7368                 int cpu = get_cpu();
7369
7370                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
7371                 on_each_cpu_mask(vcpu->arch.wbinvd_dirty_mask,
7372                                 wbinvd_ipi, NULL, 1);
7373                 put_cpu();
7374                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
7375         } else
7376                 wbinvd();
7377         return X86EMUL_CONTINUE;
7378 }
7379
7380 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
7381 {
7382         kvm_emulate_wbinvd_noskip(vcpu);
7383         return kvm_skip_emulated_instruction(vcpu);
7384 }
7385 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
7386
7387
7388
7389 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
7390 {
7391         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
7392 }
7393
7394 static void emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
7395                             unsigned long *dest)
7396 {
7397         kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
7398 }
7399
7400 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
7401                            unsigned long value)
7402 {
7403
7404         return kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
7405 }
7406
7407 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
7408 {
7409         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
7410 }
7411
7412 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
7413 {
7414         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7415         unsigned long value;
7416
7417         switch (cr) {
7418         case 0:
7419                 value = kvm_read_cr0(vcpu);
7420                 break;
7421         case 2:
7422                 value = vcpu->arch.cr2;
7423                 break;
7424         case 3:
7425                 value = kvm_read_cr3(vcpu);
7426                 break;
7427         case 4:
7428                 value = kvm_read_cr4(vcpu);
7429                 break;
7430         case 8:
7431                 value = kvm_get_cr8(vcpu);
7432                 break;
7433         default:
7434                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7435                 return 0;
7436         }
7437
7438         return value;
7439 }
7440
7441 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
7442 {
7443         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7444         int res = 0;
7445
7446         switch (cr) {
7447         case 0:
7448                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
7449                 break;
7450         case 2:
7451                 vcpu->arch.cr2 = val;
7452                 break;
7453         case 3:
7454                 res = kvm_set_cr3(vcpu, val);
7455                 break;
7456         case 4:
7457                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
7458                 break;
7459         case 8:
7460                 res = kvm_set_cr8(vcpu, val);
7461                 break;
7462         default:
7463                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7464                 res = -1;
7465         }
7466
7467         return res;
7468 }
7469
7470 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
7471 {
7472         return static_call(kvm_x86_get_cpl)(emul_to_vcpu(ctxt));
7473 }
7474
7475 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7476 {
7477         static_call(kvm_x86_get_gdt)(emul_to_vcpu(ctxt), dt);
7478 }
7479
7480 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7481 {
7482         static_call(kvm_x86_get_idt)(emul_to_vcpu(ctxt), dt);
7483 }
7484
7485 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7486 {
7487         static_call(kvm_x86_set_gdt)(emul_to_vcpu(ctxt), dt);
7488 }
7489
7490 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7491 {
7492         static_call(kvm_x86_set_idt)(emul_to_vcpu(ctxt), dt);
7493 }
7494
7495 static unsigned long emulator_get_cached_segment_base(
7496         struct x86_emulate_ctxt *ctxt, int seg)
7497 {
7498         return get_segment_base(emul_to_vcpu(ctxt), seg);
7499 }
7500
7501 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
7502                                  struct desc_struct *desc, u32 *base3,
7503                                  int seg)
7504 {
7505         struct kvm_segment var;
7506
7507         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
7508         *selector = var.selector;
7509
7510         if (var.unusable) {
7511                 memset(desc, 0, sizeof(*desc));
7512                 if (base3)
7513                         *base3 = 0;
7514                 return false;
7515         }
7516
7517         if (var.g)
7518                 var.limit >>= 12;
7519         set_desc_limit(desc, var.limit);
7520         set_desc_base(desc, (unsigned long)var.base);
7521 #ifdef CONFIG_X86_64
7522         if (base3)
7523                 *base3 = var.base >> 32;
7524 #endif
7525         desc->type = var.type;
7526         desc->s = var.s;
7527         desc->dpl = var.dpl;
7528         desc->p = var.present;
7529         desc->avl = var.avl;
7530         desc->l = var.l;
7531         desc->d = var.db;
7532         desc->g = var.g;
7533
7534         return true;
7535 }
7536
7537 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
7538                                  struct desc_struct *desc, u32 base3,
7539                                  int seg)
7540 {
7541         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7542         struct kvm_segment var;
7543
7544         var.selector = selector;
7545         var.base = get_desc_base(desc);
7546 #ifdef CONFIG_X86_64
7547         var.base |= ((u64)base3) << 32;
7548 #endif
7549         var.limit = get_desc_limit(desc);
7550         if (desc->g)
7551                 var.limit = (var.limit << 12) | 0xfff;
7552         var.type = desc->type;
7553         var.dpl = desc->dpl;
7554         var.db = desc->d;
7555         var.s = desc->s;
7556         var.l = desc->l;
7557         var.g = desc->g;
7558         var.avl = desc->avl;
7559         var.present = desc->p;
7560         var.unusable = !var.present;
7561         var.padding = 0;
7562
7563         kvm_set_segment(vcpu, &var, seg);
7564         return;
7565 }
7566
7567 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
7568                             u32 msr_index, u64 *pdata)
7569 {
7570         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7571         int r;
7572
7573         r = kvm_get_msr(vcpu, msr_index, pdata);
7574
7575         if (r && kvm_msr_user_space(vcpu, msr_index, KVM_EXIT_X86_RDMSR, 0,
7576                                     complete_emulated_rdmsr, r)) {
7577                 /* Bounce to user space */
7578                 return X86EMUL_IO_NEEDED;
7579         }
7580
7581         return r;
7582 }
7583
7584 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
7585                             u32 msr_index, u64 data)
7586 {
7587         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7588         int r;
7589
7590         r = kvm_set_msr(vcpu, msr_index, data);
7591
7592         if (r && kvm_msr_user_space(vcpu, msr_index, KVM_EXIT_X86_WRMSR, data,
7593                                     complete_emulated_msr_access, r)) {
7594                 /* Bounce to user space */
7595                 return X86EMUL_IO_NEEDED;
7596         }
7597
7598         return r;
7599 }
7600
7601 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
7602 {
7603         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7604
7605         return vcpu->arch.smbase;
7606 }
7607
7608 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
7609 {
7610         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7611
7612         vcpu->arch.smbase = smbase;
7613 }
7614
7615 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
7616                               u32 pmc)
7617 {
7618         if (kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc))
7619                 return 0;
7620         return -EINVAL;
7621 }
7622
7623 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
7624                              u32 pmc, u64 *pdata)
7625 {
7626         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
7627 }
7628
7629 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
7630 {
7631         emul_to_vcpu(ctxt)->arch.halt_request = 1;
7632 }
7633
7634 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
7635                               struct x86_instruction_info *info,
7636                               enum x86_intercept_stage stage)
7637 {
7638         return static_call(kvm_x86_check_intercept)(emul_to_vcpu(ctxt), info, stage,
7639                                             &ctxt->exception);
7640 }
7641
7642 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
7643                               u32 *eax, u32 *ebx, u32 *ecx, u32 *edx,
7644                               bool exact_only)
7645 {
7646         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, exact_only);
7647 }
7648
7649 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
7650 {
7651         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
7652 }
7653
7654 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
7655 {
7656         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
7657 }
7658
7659 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
7660 {
7661         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
7662 }
7663
7664 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
7665 {
7666         return kvm_register_read_raw(emul_to_vcpu(ctxt), reg);
7667 }
7668
7669 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
7670 {
7671         kvm_register_write_raw(emul_to_vcpu(ctxt), reg, val);
7672 }
7673
7674 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
7675 {
7676         static_call(kvm_x86_set_nmi_mask)(emul_to_vcpu(ctxt), masked);
7677 }
7678
7679 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
7680 {
7681         return emul_to_vcpu(ctxt)->arch.hflags;
7682 }
7683
7684 static void emulator_exiting_smm(struct x86_emulate_ctxt *ctxt)
7685 {
7686         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7687
7688         kvm_smm_changed(vcpu, false);
7689 }
7690
7691 static int emulator_leave_smm(struct x86_emulate_ctxt *ctxt,
7692                                   const char *smstate)
7693 {
7694         return static_call(kvm_x86_leave_smm)(emul_to_vcpu(ctxt), smstate);
7695 }
7696
7697 static void emulator_triple_fault(struct x86_emulate_ctxt *ctxt)
7698 {
7699         kvm_make_request(KVM_REQ_TRIPLE_FAULT, emul_to_vcpu(ctxt));
7700 }
7701
7702 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
7703 {
7704         return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
7705 }
7706
7707 static const struct x86_emulate_ops emulate_ops = {
7708         .read_gpr            = emulator_read_gpr,
7709         .write_gpr           = emulator_write_gpr,
7710         .read_std            = emulator_read_std,
7711         .write_std           = emulator_write_std,
7712         .read_phys           = kvm_read_guest_phys_system,
7713         .fetch               = kvm_fetch_guest_virt,
7714         .read_emulated       = emulator_read_emulated,
7715         .write_emulated      = emulator_write_emulated,
7716         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
7717         .invlpg              = emulator_invlpg,
7718         .pio_in_emulated     = emulator_pio_in_emulated,
7719         .pio_out_emulated    = emulator_pio_out_emulated,
7720         .get_segment         = emulator_get_segment,
7721         .set_segment         = emulator_set_segment,
7722         .get_cached_segment_base = emulator_get_cached_segment_base,
7723         .get_gdt             = emulator_get_gdt,
7724         .get_idt             = emulator_get_idt,
7725         .set_gdt             = emulator_set_gdt,
7726         .set_idt             = emulator_set_idt,
7727         .get_cr              = emulator_get_cr,
7728         .set_cr              = emulator_set_cr,
7729         .cpl                 = emulator_get_cpl,
7730         .get_dr              = emulator_get_dr,
7731         .set_dr              = emulator_set_dr,
7732         .get_smbase          = emulator_get_smbase,
7733         .set_smbase          = emulator_set_smbase,
7734         .set_msr             = emulator_set_msr,
7735         .get_msr             = emulator_get_msr,
7736         .check_pmc           = emulator_check_pmc,
7737         .read_pmc            = emulator_read_pmc,
7738         .halt                = emulator_halt,
7739         .wbinvd              = emulator_wbinvd,
7740         .fix_hypercall       = emulator_fix_hypercall,
7741         .intercept           = emulator_intercept,
7742         .get_cpuid           = emulator_get_cpuid,
7743         .guest_has_long_mode = emulator_guest_has_long_mode,
7744         .guest_has_movbe     = emulator_guest_has_movbe,
7745         .guest_has_fxsr      = emulator_guest_has_fxsr,
7746         .set_nmi_mask        = emulator_set_nmi_mask,
7747         .get_hflags          = emulator_get_hflags,
7748         .exiting_smm         = emulator_exiting_smm,
7749         .leave_smm           = emulator_leave_smm,
7750         .triple_fault        = emulator_triple_fault,
7751         .set_xcr             = emulator_set_xcr,
7752 };
7753
7754 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
7755 {
7756         u32 int_shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
7757         /*
7758          * an sti; sti; sequence only disable interrupts for the first
7759          * instruction. So, if the last instruction, be it emulated or
7760          * not, left the system with the INT_STI flag enabled, it
7761          * means that the last instruction is an sti. We should not
7762          * leave the flag on in this case. The same goes for mov ss
7763          */
7764         if (int_shadow & mask)
7765                 mask = 0;
7766         if (unlikely(int_shadow || mask)) {
7767                 static_call(kvm_x86_set_interrupt_shadow)(vcpu, mask);
7768                 if (!mask)
7769                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7770         }
7771 }
7772
7773 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
7774 {
7775         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7776         if (ctxt->exception.vector == PF_VECTOR)
7777                 return kvm_inject_emulated_page_fault(vcpu, &ctxt->exception);
7778
7779         if (ctxt->exception.error_code_valid)
7780                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
7781                                       ctxt->exception.error_code);
7782         else
7783                 kvm_queue_exception(vcpu, ctxt->exception.vector);
7784         return false;
7785 }
7786
7787 static struct x86_emulate_ctxt *alloc_emulate_ctxt(struct kvm_vcpu *vcpu)
7788 {
7789         struct x86_emulate_ctxt *ctxt;
7790
7791         ctxt = kmem_cache_zalloc(x86_emulator_cache, GFP_KERNEL_ACCOUNT);
7792         if (!ctxt) {
7793                 pr_err("kvm: failed to allocate vcpu's emulator\n");
7794                 return NULL;
7795         }
7796
7797         ctxt->vcpu = vcpu;
7798         ctxt->ops = &emulate_ops;
7799         vcpu->arch.emulate_ctxt = ctxt;
7800
7801         return ctxt;
7802 }
7803
7804 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
7805 {
7806         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7807         int cs_db, cs_l;
7808
7809         static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
7810
7811         ctxt->gpa_available = false;
7812         ctxt->eflags = kvm_get_rflags(vcpu);
7813         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
7814
7815         ctxt->eip = kvm_rip_read(vcpu);
7816         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
7817                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
7818                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
7819                      cs_db                              ? X86EMUL_MODE_PROT32 :
7820                                                           X86EMUL_MODE_PROT16;
7821         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
7822         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
7823         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
7824
7825         ctxt->interruptibility = 0;
7826         ctxt->have_exception = false;
7827         ctxt->exception.vector = -1;
7828         ctxt->perm_ok = false;
7829
7830         init_decode_cache(ctxt);
7831         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7832 }
7833
7834 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
7835 {
7836         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7837         int ret;
7838
7839         init_emulate_ctxt(vcpu);
7840
7841         ctxt->op_bytes = 2;
7842         ctxt->ad_bytes = 2;
7843         ctxt->_eip = ctxt->eip + inc_eip;
7844         ret = emulate_int_real(ctxt, irq);
7845
7846         if (ret != X86EMUL_CONTINUE) {
7847                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
7848         } else {
7849                 ctxt->eip = ctxt->_eip;
7850                 kvm_rip_write(vcpu, ctxt->eip);
7851                 kvm_set_rflags(vcpu, ctxt->eflags);
7852         }
7853 }
7854 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
7855
7856 static void prepare_emulation_failure_exit(struct kvm_vcpu *vcpu, u64 *data,
7857                                            u8 ndata, u8 *insn_bytes, u8 insn_size)
7858 {
7859         struct kvm_run *run = vcpu->run;
7860         u64 info[5];
7861         u8 info_start;
7862
7863         /*
7864          * Zero the whole array used to retrieve the exit info, as casting to
7865          * u32 for select entries will leave some chunks uninitialized.
7866          */
7867         memset(&info, 0, sizeof(info));
7868
7869         static_call(kvm_x86_get_exit_info)(vcpu, (u32 *)&info[0], &info[1],
7870                                            &info[2], (u32 *)&info[3],
7871                                            (u32 *)&info[4]);
7872
7873         run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7874         run->emulation_failure.suberror = KVM_INTERNAL_ERROR_EMULATION;
7875
7876         /*
7877          * There's currently space for 13 entries, but 5 are used for the exit
7878          * reason and info.  Restrict to 4 to reduce the maintenance burden
7879          * when expanding kvm_run.emulation_failure in the future.
7880          */
7881         if (WARN_ON_ONCE(ndata > 4))
7882                 ndata = 4;
7883
7884         /* Always include the flags as a 'data' entry. */
7885         info_start = 1;
7886         run->emulation_failure.flags = 0;
7887
7888         if (insn_size) {
7889                 BUILD_BUG_ON((sizeof(run->emulation_failure.insn_size) +
7890                               sizeof(run->emulation_failure.insn_bytes) != 16));
7891                 info_start += 2;
7892                 run->emulation_failure.flags |=
7893                         KVM_INTERNAL_ERROR_EMULATION_FLAG_INSTRUCTION_BYTES;
7894                 run->emulation_failure.insn_size = insn_size;
7895                 memset(run->emulation_failure.insn_bytes, 0x90,
7896                        sizeof(run->emulation_failure.insn_bytes));
7897                 memcpy(run->emulation_failure.insn_bytes, insn_bytes, insn_size);
7898         }
7899
7900         memcpy(&run->internal.data[info_start], info, sizeof(info));
7901         memcpy(&run->internal.data[info_start + ARRAY_SIZE(info)], data,
7902                ndata * sizeof(data[0]));
7903
7904         run->emulation_failure.ndata = info_start + ARRAY_SIZE(info) + ndata;
7905 }
7906
7907 static void prepare_emulation_ctxt_failure_exit(struct kvm_vcpu *vcpu)
7908 {
7909         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7910
7911         prepare_emulation_failure_exit(vcpu, NULL, 0, ctxt->fetch.data,
7912                                        ctxt->fetch.end - ctxt->fetch.data);
7913 }
7914
7915 void __kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu, u64 *data,
7916                                           u8 ndata)
7917 {
7918         prepare_emulation_failure_exit(vcpu, data, ndata, NULL, 0);
7919 }
7920 EXPORT_SYMBOL_GPL(__kvm_prepare_emulation_failure_exit);
7921
7922 void kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu)
7923 {
7924         __kvm_prepare_emulation_failure_exit(vcpu, NULL, 0);
7925 }
7926 EXPORT_SYMBOL_GPL(kvm_prepare_emulation_failure_exit);
7927
7928 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
7929 {
7930         struct kvm *kvm = vcpu->kvm;
7931
7932         ++vcpu->stat.insn_emulation_fail;
7933         trace_kvm_emulate_insn_failed(vcpu);
7934
7935         if (emulation_type & EMULTYPE_VMWARE_GP) {
7936                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7937                 return 1;
7938         }
7939
7940         if (kvm->arch.exit_on_emulation_error ||
7941             (emulation_type & EMULTYPE_SKIP)) {
7942                 prepare_emulation_ctxt_failure_exit(vcpu);
7943                 return 0;
7944         }
7945
7946         kvm_queue_exception(vcpu, UD_VECTOR);
7947
7948         if (!is_guest_mode(vcpu) && static_call(kvm_x86_get_cpl)(vcpu) == 0) {
7949                 prepare_emulation_ctxt_failure_exit(vcpu);
7950                 return 0;
7951         }
7952
7953         return 1;
7954 }
7955
7956 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7957                                   bool write_fault_to_shadow_pgtable,
7958                                   int emulation_type)
7959 {
7960         gpa_t gpa = cr2_or_gpa;
7961         kvm_pfn_t pfn;
7962
7963         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7964                 return false;
7965
7966         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7967             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7968                 return false;
7969
7970         if (!vcpu->arch.mmu->direct_map) {
7971                 /*
7972                  * Write permission should be allowed since only
7973                  * write access need to be emulated.
7974                  */
7975                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7976
7977                 /*
7978                  * If the mapping is invalid in guest, let cpu retry
7979                  * it to generate fault.
7980                  */
7981                 if (gpa == UNMAPPED_GVA)
7982                         return true;
7983         }
7984
7985         /*
7986          * Do not retry the unhandleable instruction if it faults on the
7987          * readonly host memory, otherwise it will goto a infinite loop:
7988          * retry instruction -> write #PF -> emulation fail -> retry
7989          * instruction -> ...
7990          */
7991         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
7992
7993         /*
7994          * If the instruction failed on the error pfn, it can not be fixed,
7995          * report the error to userspace.
7996          */
7997         if (is_error_noslot_pfn(pfn))
7998                 return false;
7999
8000         kvm_release_pfn_clean(pfn);
8001
8002         /* The instructions are well-emulated on direct mmu. */
8003         if (vcpu->arch.mmu->direct_map) {
8004                 unsigned int indirect_shadow_pages;
8005
8006                 write_lock(&vcpu->kvm->mmu_lock);
8007                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
8008                 write_unlock(&vcpu->kvm->mmu_lock);
8009
8010                 if (indirect_shadow_pages)
8011                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
8012
8013                 return true;
8014         }
8015
8016         /*
8017          * if emulation was due to access to shadowed page table
8018          * and it failed try to unshadow page and re-enter the
8019          * guest to let CPU execute the instruction.
8020          */
8021         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
8022
8023         /*
8024          * If the access faults on its page table, it can not
8025          * be fixed by unprotecting shadow page and it should
8026          * be reported to userspace.
8027          */
8028         return !write_fault_to_shadow_pgtable;
8029 }
8030
8031 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
8032                               gpa_t cr2_or_gpa,  int emulation_type)
8033 {
8034         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8035         unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
8036
8037         last_retry_eip = vcpu->arch.last_retry_eip;
8038         last_retry_addr = vcpu->arch.last_retry_addr;
8039
8040         /*
8041          * If the emulation is caused by #PF and it is non-page_table
8042          * writing instruction, it means the VM-EXIT is caused by shadow
8043          * page protected, we can zap the shadow page and retry this
8044          * instruction directly.
8045          *
8046          * Note: if the guest uses a non-page-table modifying instruction
8047          * on the PDE that points to the instruction, then we will unmap
8048          * the instruction and go to an infinite loop. So, we cache the
8049          * last retried eip and the last fault address, if we meet the eip
8050          * and the address again, we can break out of the potential infinite
8051          * loop.
8052          */
8053         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
8054
8055         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
8056                 return false;
8057
8058         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
8059             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
8060                 return false;
8061
8062         if (x86_page_table_writing_insn(ctxt))
8063                 return false;
8064
8065         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
8066                 return false;
8067
8068         vcpu->arch.last_retry_eip = ctxt->eip;
8069         vcpu->arch.last_retry_addr = cr2_or_gpa;
8070
8071         if (!vcpu->arch.mmu->direct_map)
8072                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
8073
8074         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
8075
8076         return true;
8077 }
8078
8079 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
8080 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
8081
8082 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm)
8083 {
8084         trace_kvm_smm_transition(vcpu->vcpu_id, vcpu->arch.smbase, entering_smm);
8085
8086         if (entering_smm) {
8087                 vcpu->arch.hflags |= HF_SMM_MASK;
8088         } else {
8089                 vcpu->arch.hflags &= ~(HF_SMM_MASK | HF_SMM_INSIDE_NMI_MASK);
8090
8091                 /* Process a latched INIT or SMI, if any.  */
8092                 kvm_make_request(KVM_REQ_EVENT, vcpu);
8093
8094                 /*
8095                  * Even if KVM_SET_SREGS2 loaded PDPTRs out of band,
8096                  * on SMM exit we still need to reload them from
8097                  * guest memory
8098                  */
8099                 vcpu->arch.pdptrs_from_userspace = false;
8100         }
8101
8102         kvm_mmu_reset_context(vcpu);
8103 }
8104
8105 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
8106                                 unsigned long *db)
8107 {
8108         u32 dr6 = 0;
8109         int i;
8110         u32 enable, rwlen;
8111
8112         enable = dr7;
8113         rwlen = dr7 >> 16;
8114         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
8115                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
8116                         dr6 |= (1 << i);
8117         return dr6;
8118 }
8119
8120 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
8121 {
8122         struct kvm_run *kvm_run = vcpu->run;
8123
8124         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
8125                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_ACTIVE_LOW;
8126                 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu);
8127                 kvm_run->debug.arch.exception = DB_VECTOR;
8128                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
8129                 return 0;
8130         }
8131         kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
8132         return 1;
8133 }
8134
8135 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
8136 {
8137         unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
8138         int r;
8139
8140         r = static_call(kvm_x86_skip_emulated_instruction)(vcpu);
8141         if (unlikely(!r))
8142                 return 0;
8143
8144         kvm_pmu_trigger_event(vcpu, PERF_COUNT_HW_INSTRUCTIONS);
8145
8146         /*
8147          * rflags is the old, "raw" value of the flags.  The new value has
8148          * not been saved yet.
8149          *
8150          * This is correct even for TF set by the guest, because "the
8151          * processor will not generate this exception after the instruction
8152          * that sets the TF flag".
8153          */
8154         if (unlikely(rflags & X86_EFLAGS_TF))
8155                 r = kvm_vcpu_do_singlestep(vcpu);
8156         return r;
8157 }
8158 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
8159
8160 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
8161 {
8162         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
8163             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
8164                 struct kvm_run *kvm_run = vcpu->run;
8165                 unsigned long eip = kvm_get_linear_rip(vcpu);
8166                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
8167                                            vcpu->arch.guest_debug_dr7,
8168                                            vcpu->arch.eff_db);
8169
8170                 if (dr6 != 0) {
8171                         kvm_run->debug.arch.dr6 = dr6 | DR6_ACTIVE_LOW;
8172                         kvm_run->debug.arch.pc = eip;
8173                         kvm_run->debug.arch.exception = DB_VECTOR;
8174                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
8175                         *r = 0;
8176                         return true;
8177                 }
8178         }
8179
8180         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
8181             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
8182                 unsigned long eip = kvm_get_linear_rip(vcpu);
8183                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
8184                                            vcpu->arch.dr7,
8185                                            vcpu->arch.db);
8186
8187                 if (dr6 != 0) {
8188                         kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
8189                         *r = 1;
8190                         return true;
8191                 }
8192         }
8193
8194         return false;
8195 }
8196
8197 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
8198 {
8199         switch (ctxt->opcode_len) {
8200         case 1:
8201                 switch (ctxt->b) {
8202                 case 0xe4:      /* IN */
8203                 case 0xe5:
8204                 case 0xec:
8205                 case 0xed:
8206                 case 0xe6:      /* OUT */
8207                 case 0xe7:
8208                 case 0xee:
8209                 case 0xef:
8210                 case 0x6c:      /* INS */
8211                 case 0x6d:
8212                 case 0x6e:      /* OUTS */
8213                 case 0x6f:
8214                         return true;
8215                 }
8216                 break;
8217         case 2:
8218                 switch (ctxt->b) {
8219                 case 0x33:      /* RDPMC */
8220                         return true;
8221                 }
8222                 break;
8223         }
8224
8225         return false;
8226 }
8227
8228 /*
8229  * Decode to be emulated instruction. Return EMULATION_OK if success.
8230  */
8231 int x86_decode_emulated_instruction(struct kvm_vcpu *vcpu, int emulation_type,
8232                                     void *insn, int insn_len)
8233 {
8234         int r = EMULATION_OK;
8235         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8236
8237         init_emulate_ctxt(vcpu);
8238
8239         /*
8240          * We will reenter on the same instruction since we do not set
8241          * complete_userspace_io. This does not handle watchpoints yet,
8242          * those would be handled in the emulate_ops.
8243          */
8244         if (!(emulation_type & EMULTYPE_SKIP) &&
8245             kvm_vcpu_check_breakpoint(vcpu, &r))
8246                 return r;
8247
8248         r = x86_decode_insn(ctxt, insn, insn_len, emulation_type);
8249
8250         trace_kvm_emulate_insn_start(vcpu);
8251         ++vcpu->stat.insn_emulation;
8252
8253         return r;
8254 }
8255 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction);
8256
8257 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
8258                             int emulation_type, void *insn, int insn_len)
8259 {
8260         int r;
8261         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8262         bool writeback = true;
8263         bool write_fault_to_spt;
8264
8265         if (unlikely(!kvm_can_emulate_insn(vcpu, emulation_type, insn, insn_len)))
8266                 return 1;
8267
8268         vcpu->arch.l1tf_flush_l1d = true;
8269
8270         /*
8271          * Clear write_fault_to_shadow_pgtable here to ensure it is
8272          * never reused.
8273          */
8274         write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
8275         vcpu->arch.write_fault_to_shadow_pgtable = false;
8276
8277         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
8278                 kvm_clear_exception_queue(vcpu);
8279
8280                 r = x86_decode_emulated_instruction(vcpu, emulation_type,
8281                                                     insn, insn_len);
8282                 if (r != EMULATION_OK)  {
8283                         if ((emulation_type & EMULTYPE_TRAP_UD) ||
8284                             (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
8285                                 kvm_queue_exception(vcpu, UD_VECTOR);
8286                                 return 1;
8287                         }
8288                         if (reexecute_instruction(vcpu, cr2_or_gpa,
8289                                                   write_fault_to_spt,
8290                                                   emulation_type))
8291                                 return 1;
8292                         if (ctxt->have_exception) {
8293                                 /*
8294                                  * #UD should result in just EMULATION_FAILED, and trap-like
8295                                  * exception should not be encountered during decode.
8296                                  */
8297                                 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
8298                                              exception_type(ctxt->exception.vector) == EXCPT_TRAP);
8299                                 inject_emulated_exception(vcpu);
8300                                 return 1;
8301                         }
8302                         return handle_emulation_failure(vcpu, emulation_type);
8303                 }
8304         }
8305
8306         if ((emulation_type & EMULTYPE_VMWARE_GP) &&
8307             !is_vmware_backdoor_opcode(ctxt)) {
8308                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
8309                 return 1;
8310         }
8311
8312         /*
8313          * EMULTYPE_SKIP without EMULTYPE_COMPLETE_USER_EXIT is intended for
8314          * use *only* by vendor callbacks for kvm_skip_emulated_instruction().
8315          * The caller is responsible for updating interruptibility state and
8316          * injecting single-step #DBs.
8317          */
8318         if (emulation_type & EMULTYPE_SKIP) {
8319                 if (ctxt->mode != X86EMUL_MODE_PROT64)
8320                         ctxt->eip = (u32)ctxt->_eip;
8321                 else
8322                         ctxt->eip = ctxt->_eip;
8323
8324                 if (emulation_type & EMULTYPE_COMPLETE_USER_EXIT) {
8325                         r = 1;
8326                         goto writeback;
8327                 }
8328
8329                 kvm_rip_write(vcpu, ctxt->eip);
8330                 if (ctxt->eflags & X86_EFLAGS_RF)
8331                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
8332                 return 1;
8333         }
8334
8335         if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
8336                 return 1;
8337
8338         /* this is needed for vmware backdoor interface to work since it
8339            changes registers values  during IO operation */
8340         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
8341                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
8342                 emulator_invalidate_register_cache(ctxt);
8343         }
8344
8345 restart:
8346         if (emulation_type & EMULTYPE_PF) {
8347                 /* Save the faulting GPA (cr2) in the address field */
8348                 ctxt->exception.address = cr2_or_gpa;
8349
8350                 /* With shadow page tables, cr2 contains a GVA or nGPA. */
8351                 if (vcpu->arch.mmu->direct_map) {
8352                         ctxt->gpa_available = true;
8353                         ctxt->gpa_val = cr2_or_gpa;
8354                 }
8355         } else {
8356                 /* Sanitize the address out of an abundance of paranoia. */
8357                 ctxt->exception.address = 0;
8358         }
8359
8360         r = x86_emulate_insn(ctxt);
8361
8362         if (r == EMULATION_INTERCEPTED)
8363                 return 1;
8364
8365         if (r == EMULATION_FAILED) {
8366                 if (reexecute_instruction(vcpu, cr2_or_gpa, write_fault_to_spt,
8367                                         emulation_type))
8368                         return 1;
8369
8370                 return handle_emulation_failure(vcpu, emulation_type);
8371         }
8372
8373         if (ctxt->have_exception) {
8374                 r = 1;
8375                 if (inject_emulated_exception(vcpu))
8376                         return r;
8377         } else if (vcpu->arch.pio.count) {
8378                 if (!vcpu->arch.pio.in) {
8379                         /* FIXME: return into emulator if single-stepping.  */
8380                         vcpu->arch.pio.count = 0;
8381                 } else {
8382                         writeback = false;
8383                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
8384                 }
8385                 r = 0;
8386         } else if (vcpu->mmio_needed) {
8387                 ++vcpu->stat.mmio_exits;
8388
8389                 if (!vcpu->mmio_is_write)
8390                         writeback = false;
8391                 r = 0;
8392                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
8393         } else if (vcpu->arch.complete_userspace_io) {
8394                 writeback = false;
8395                 r = 0;
8396         } else if (r == EMULATION_RESTART)
8397                 goto restart;
8398         else
8399                 r = 1;
8400
8401 writeback:
8402         if (writeback) {
8403                 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
8404                 toggle_interruptibility(vcpu, ctxt->interruptibility);
8405                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8406                 if (!ctxt->have_exception ||
8407                     exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
8408                         kvm_pmu_trigger_event(vcpu, PERF_COUNT_HW_INSTRUCTIONS);
8409                         if (ctxt->is_branch)
8410                                 kvm_pmu_trigger_event(vcpu, PERF_COUNT_HW_BRANCH_INSTRUCTIONS);
8411                         kvm_rip_write(vcpu, ctxt->eip);
8412                         if (r && (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
8413                                 r = kvm_vcpu_do_singlestep(vcpu);
8414                         if (kvm_x86_ops.update_emulated_instruction)
8415                                 static_call(kvm_x86_update_emulated_instruction)(vcpu);
8416                         __kvm_set_rflags(vcpu, ctxt->eflags);
8417                 }
8418
8419                 /*
8420                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
8421                  * do nothing, and it will be requested again as soon as
8422                  * the shadow expires.  But we still need to check here,
8423                  * because POPF has no interrupt shadow.
8424                  */
8425                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
8426                         kvm_make_request(KVM_REQ_EVENT, vcpu);
8427         } else
8428                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
8429
8430         return r;
8431 }
8432
8433 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
8434 {
8435         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
8436 }
8437 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
8438
8439 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
8440                                         void *insn, int insn_len)
8441 {
8442         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
8443 }
8444 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
8445
8446 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
8447 {
8448         vcpu->arch.pio.count = 0;
8449         return 1;
8450 }
8451
8452 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
8453 {
8454         vcpu->arch.pio.count = 0;
8455
8456         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
8457                 return 1;
8458
8459         return kvm_skip_emulated_instruction(vcpu);
8460 }
8461
8462 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
8463                             unsigned short port)
8464 {
8465         unsigned long val = kvm_rax_read(vcpu);
8466         int ret = emulator_pio_out(vcpu, size, port, &val, 1);
8467
8468         if (ret)
8469                 return ret;
8470
8471         /*
8472          * Workaround userspace that relies on old KVM behavior of %rip being
8473          * incremented prior to exiting to userspace to handle "OUT 0x7e".
8474          */
8475         if (port == 0x7e &&
8476             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
8477                 vcpu->arch.complete_userspace_io =
8478                         complete_fast_pio_out_port_0x7e;
8479                 kvm_skip_emulated_instruction(vcpu);
8480         } else {
8481                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
8482                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
8483         }
8484         return 0;
8485 }
8486
8487 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
8488 {
8489         unsigned long val;
8490
8491         /* We should only ever be called with arch.pio.count equal to 1 */
8492         BUG_ON(vcpu->arch.pio.count != 1);
8493
8494         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
8495                 vcpu->arch.pio.count = 0;
8496                 return 1;
8497         }
8498
8499         /* For size less than 4 we merge, else we zero extend */
8500         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
8501
8502         /*
8503          * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
8504          * the copy and tracing
8505          */
8506         emulator_pio_in(vcpu, vcpu->arch.pio.size, vcpu->arch.pio.port, &val, 1);
8507         kvm_rax_write(vcpu, val);
8508
8509         return kvm_skip_emulated_instruction(vcpu);
8510 }
8511
8512 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
8513                            unsigned short port)
8514 {
8515         unsigned long val;
8516         int ret;
8517
8518         /* For size less than 4 we merge, else we zero extend */
8519         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
8520
8521         ret = emulator_pio_in(vcpu, size, port, &val, 1);
8522         if (ret) {
8523                 kvm_rax_write(vcpu, val);
8524                 return ret;
8525         }
8526
8527         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
8528         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
8529
8530         return 0;
8531 }
8532
8533 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
8534 {
8535         int ret;
8536
8537         if (in)
8538                 ret = kvm_fast_pio_in(vcpu, size, port);
8539         else
8540                 ret = kvm_fast_pio_out(vcpu, size, port);
8541         return ret && kvm_skip_emulated_instruction(vcpu);
8542 }
8543 EXPORT_SYMBOL_GPL(kvm_fast_pio);
8544
8545 static int kvmclock_cpu_down_prep(unsigned int cpu)
8546 {
8547         __this_cpu_write(cpu_tsc_khz, 0);
8548         return 0;
8549 }
8550
8551 static void tsc_khz_changed(void *data)
8552 {
8553         struct cpufreq_freqs *freq = data;
8554         unsigned long khz = 0;
8555
8556         if (data)
8557                 khz = freq->new;
8558         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8559                 khz = cpufreq_quick_get(raw_smp_processor_id());
8560         if (!khz)
8561                 khz = tsc_khz;
8562         __this_cpu_write(cpu_tsc_khz, khz);
8563 }
8564
8565 #ifdef CONFIG_X86_64
8566 static void kvm_hyperv_tsc_notifier(void)
8567 {
8568         struct kvm *kvm;
8569         int cpu;
8570
8571         mutex_lock(&kvm_lock);
8572         list_for_each_entry(kvm, &vm_list, vm_list)
8573                 kvm_make_mclock_inprogress_request(kvm);
8574
8575         /* no guest entries from this point */
8576         hyperv_stop_tsc_emulation();
8577
8578         /* TSC frequency always matches when on Hyper-V */
8579         for_each_present_cpu(cpu)
8580                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
8581         kvm_max_guest_tsc_khz = tsc_khz;
8582
8583         list_for_each_entry(kvm, &vm_list, vm_list) {
8584                 __kvm_start_pvclock_update(kvm);
8585                 pvclock_update_vm_gtod_copy(kvm);
8586                 kvm_end_pvclock_update(kvm);
8587         }
8588
8589         mutex_unlock(&kvm_lock);
8590 }
8591 #endif
8592
8593 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
8594 {
8595         struct kvm *kvm;
8596         struct kvm_vcpu *vcpu;
8597         int send_ipi = 0;
8598         unsigned long i;
8599
8600         /*
8601          * We allow guests to temporarily run on slowing clocks,
8602          * provided we notify them after, or to run on accelerating
8603          * clocks, provided we notify them before.  Thus time never
8604          * goes backwards.
8605          *
8606          * However, we have a problem.  We can't atomically update
8607          * the frequency of a given CPU from this function; it is
8608          * merely a notifier, which can be called from any CPU.
8609          * Changing the TSC frequency at arbitrary points in time
8610          * requires a recomputation of local variables related to
8611          * the TSC for each VCPU.  We must flag these local variables
8612          * to be updated and be sure the update takes place with the
8613          * new frequency before any guests proceed.
8614          *
8615          * Unfortunately, the combination of hotplug CPU and frequency
8616          * change creates an intractable locking scenario; the order
8617          * of when these callouts happen is undefined with respect to
8618          * CPU hotplug, and they can race with each other.  As such,
8619          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
8620          * undefined; you can actually have a CPU frequency change take
8621          * place in between the computation of X and the setting of the
8622          * variable.  To protect against this problem, all updates of
8623          * the per_cpu tsc_khz variable are done in an interrupt
8624          * protected IPI, and all callers wishing to update the value
8625          * must wait for a synchronous IPI to complete (which is trivial
8626          * if the caller is on the CPU already).  This establishes the
8627          * necessary total order on variable updates.
8628          *
8629          * Note that because a guest time update may take place
8630          * anytime after the setting of the VCPU's request bit, the
8631          * correct TSC value must be set before the request.  However,
8632          * to ensure the update actually makes it to any guest which
8633          * starts running in hardware virtualization between the set
8634          * and the acquisition of the spinlock, we must also ping the
8635          * CPU after setting the request bit.
8636          *
8637          */
8638
8639         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8640
8641         mutex_lock(&kvm_lock);
8642         list_for_each_entry(kvm, &vm_list, vm_list) {
8643                 kvm_for_each_vcpu(i, vcpu, kvm) {
8644                         if (vcpu->cpu != cpu)
8645                                 continue;
8646                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8647                         if (vcpu->cpu != raw_smp_processor_id())
8648                                 send_ipi = 1;
8649                 }
8650         }
8651         mutex_unlock(&kvm_lock);
8652
8653         if (freq->old < freq->new && send_ipi) {
8654                 /*
8655                  * We upscale the frequency.  Must make the guest
8656                  * doesn't see old kvmclock values while running with
8657                  * the new frequency, otherwise we risk the guest sees
8658                  * time go backwards.
8659                  *
8660                  * In case we update the frequency for another cpu
8661                  * (which might be in guest context) send an interrupt
8662                  * to kick the cpu out of guest context.  Next time
8663                  * guest context is entered kvmclock will be updated,
8664                  * so the guest will not see stale values.
8665                  */
8666                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8667         }
8668 }
8669
8670 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
8671                                      void *data)
8672 {
8673         struct cpufreq_freqs *freq = data;
8674         int cpu;
8675
8676         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
8677                 return 0;
8678         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
8679                 return 0;
8680
8681         for_each_cpu(cpu, freq->policy->cpus)
8682                 __kvmclock_cpufreq_notifier(freq, cpu);
8683
8684         return 0;
8685 }
8686
8687 static struct notifier_block kvmclock_cpufreq_notifier_block = {
8688         .notifier_call  = kvmclock_cpufreq_notifier
8689 };
8690
8691 static int kvmclock_cpu_online(unsigned int cpu)
8692 {
8693         tsc_khz_changed(NULL);
8694         return 0;
8695 }
8696
8697 static void kvm_timer_init(void)
8698 {
8699         max_tsc_khz = tsc_khz;
8700
8701         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
8702 #ifdef CONFIG_CPU_FREQ
8703                 struct cpufreq_policy *policy;
8704                 int cpu;
8705
8706                 cpu = get_cpu();
8707                 policy = cpufreq_cpu_get(cpu);
8708                 if (policy) {
8709                         if (policy->cpuinfo.max_freq)
8710                                 max_tsc_khz = policy->cpuinfo.max_freq;
8711                         cpufreq_cpu_put(policy);
8712                 }
8713                 put_cpu();
8714 #endif
8715                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
8716                                           CPUFREQ_TRANSITION_NOTIFIER);
8717         }
8718
8719         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
8720                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
8721 }
8722
8723 #ifdef CONFIG_X86_64
8724 static void pvclock_gtod_update_fn(struct work_struct *work)
8725 {
8726         struct kvm *kvm;
8727         struct kvm_vcpu *vcpu;
8728         unsigned long i;
8729
8730         mutex_lock(&kvm_lock);
8731         list_for_each_entry(kvm, &vm_list, vm_list)
8732                 kvm_for_each_vcpu(i, vcpu, kvm)
8733                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
8734         atomic_set(&kvm_guest_has_master_clock, 0);
8735         mutex_unlock(&kvm_lock);
8736 }
8737
8738 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
8739
8740 /*
8741  * Indirection to move queue_work() out of the tk_core.seq write held
8742  * region to prevent possible deadlocks against time accessors which
8743  * are invoked with work related locks held.
8744  */
8745 static void pvclock_irq_work_fn(struct irq_work *w)
8746 {
8747         queue_work(system_long_wq, &pvclock_gtod_work);
8748 }
8749
8750 static DEFINE_IRQ_WORK(pvclock_irq_work, pvclock_irq_work_fn);
8751
8752 /*
8753  * Notification about pvclock gtod data update.
8754  */
8755 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
8756                                void *priv)
8757 {
8758         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
8759         struct timekeeper *tk = priv;
8760
8761         update_pvclock_gtod(tk);
8762
8763         /*
8764          * Disable master clock if host does not trust, or does not use,
8765          * TSC based clocksource. Delegate queue_work() to irq_work as
8766          * this is invoked with tk_core.seq write held.
8767          */
8768         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
8769             atomic_read(&kvm_guest_has_master_clock) != 0)
8770                 irq_work_queue(&pvclock_irq_work);
8771         return 0;
8772 }
8773
8774 static struct notifier_block pvclock_gtod_notifier = {
8775         .notifier_call = pvclock_gtod_notify,
8776 };
8777 #endif
8778
8779 int kvm_arch_init(void *opaque)
8780 {
8781         struct kvm_x86_init_ops *ops = opaque;
8782         int r;
8783
8784         if (kvm_x86_ops.hardware_enable) {
8785                 pr_err("kvm: already loaded vendor module '%s'\n", kvm_x86_ops.name);
8786                 r = -EEXIST;
8787                 goto out;
8788         }
8789
8790         if (!ops->cpu_has_kvm_support()) {
8791                 pr_err_ratelimited("kvm: no hardware support for '%s'\n",
8792                                    ops->runtime_ops->name);
8793                 r = -EOPNOTSUPP;
8794                 goto out;
8795         }
8796         if (ops->disabled_by_bios()) {
8797                 pr_err_ratelimited("kvm: support for '%s' disabled by bios\n",
8798                                    ops->runtime_ops->name);
8799                 r = -EOPNOTSUPP;
8800                 goto out;
8801         }
8802
8803         /*
8804          * KVM explicitly assumes that the guest has an FPU and
8805          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
8806          * vCPU's FPU state as a fxregs_state struct.
8807          */
8808         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
8809                 printk(KERN_ERR "kvm: inadequate fpu\n");
8810                 r = -EOPNOTSUPP;
8811                 goto out;
8812         }
8813
8814         r = -ENOMEM;
8815
8816         x86_emulator_cache = kvm_alloc_emulator_cache();
8817         if (!x86_emulator_cache) {
8818                 pr_err("kvm: failed to allocate cache for x86 emulator\n");
8819                 goto out;
8820         }
8821
8822         user_return_msrs = alloc_percpu(struct kvm_user_return_msrs);
8823         if (!user_return_msrs) {
8824                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_user_return_msrs\n");
8825                 goto out_free_x86_emulator_cache;
8826         }
8827         kvm_nr_uret_msrs = 0;
8828
8829         r = kvm_mmu_module_init();
8830         if (r)
8831                 goto out_free_percpu;
8832
8833         kvm_timer_init();
8834
8835         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
8836                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
8837                 supported_xcr0 = host_xcr0 & KVM_SUPPORTED_XCR0;
8838         }
8839
8840         if (pi_inject_timer == -1)
8841                 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
8842 #ifdef CONFIG_X86_64
8843         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
8844
8845         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8846                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
8847 #endif
8848
8849         return 0;
8850
8851 out_free_percpu:
8852         free_percpu(user_return_msrs);
8853 out_free_x86_emulator_cache:
8854         kmem_cache_destroy(x86_emulator_cache);
8855 out:
8856         return r;
8857 }
8858
8859 void kvm_arch_exit(void)
8860 {
8861 #ifdef CONFIG_X86_64
8862         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8863                 clear_hv_tscchange_cb();
8864 #endif
8865         kvm_lapic_exit();
8866
8867         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8868                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
8869                                             CPUFREQ_TRANSITION_NOTIFIER);
8870         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
8871 #ifdef CONFIG_X86_64
8872         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
8873         irq_work_sync(&pvclock_irq_work);
8874         cancel_work_sync(&pvclock_gtod_work);
8875 #endif
8876         kvm_x86_ops.hardware_enable = NULL;
8877         kvm_mmu_module_exit();
8878         free_percpu(user_return_msrs);
8879         kmem_cache_destroy(x86_emulator_cache);
8880 #ifdef CONFIG_KVM_XEN
8881         static_key_deferred_flush(&kvm_xen_enabled);
8882         WARN_ON(static_branch_unlikely(&kvm_xen_enabled.key));
8883 #endif
8884 }
8885
8886 static int __kvm_emulate_halt(struct kvm_vcpu *vcpu, int state, int reason)
8887 {
8888         /*
8889          * The vCPU has halted, e.g. executed HLT.  Update the run state if the
8890          * local APIC is in-kernel, the run loop will detect the non-runnable
8891          * state and halt the vCPU.  Exit to userspace if the local APIC is
8892          * managed by userspace, in which case userspace is responsible for
8893          * handling wake events.
8894          */
8895         ++vcpu->stat.halt_exits;
8896         if (lapic_in_kernel(vcpu)) {
8897                 vcpu->arch.mp_state = state;
8898                 return 1;
8899         } else {
8900                 vcpu->run->exit_reason = reason;
8901                 return 0;
8902         }
8903 }
8904
8905 int kvm_emulate_halt_noskip(struct kvm_vcpu *vcpu)
8906 {
8907         return __kvm_emulate_halt(vcpu, KVM_MP_STATE_HALTED, KVM_EXIT_HLT);
8908 }
8909 EXPORT_SYMBOL_GPL(kvm_emulate_halt_noskip);
8910
8911 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
8912 {
8913         int ret = kvm_skip_emulated_instruction(vcpu);
8914         /*
8915          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
8916          * KVM_EXIT_DEBUG here.
8917          */
8918         return kvm_emulate_halt_noskip(vcpu) && ret;
8919 }
8920 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
8921
8922 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu)
8923 {
8924         int ret = kvm_skip_emulated_instruction(vcpu);
8925
8926         return __kvm_emulate_halt(vcpu, KVM_MP_STATE_AP_RESET_HOLD,
8927                                         KVM_EXIT_AP_RESET_HOLD) && ret;
8928 }
8929 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold);
8930
8931 #ifdef CONFIG_X86_64
8932 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
8933                                 unsigned long clock_type)
8934 {
8935         struct kvm_clock_pairing clock_pairing;
8936         struct timespec64 ts;
8937         u64 cycle;
8938         int ret;
8939
8940         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
8941                 return -KVM_EOPNOTSUPP;
8942
8943         if (!kvm_get_walltime_and_clockread(&ts, &cycle))
8944                 return -KVM_EOPNOTSUPP;
8945
8946         clock_pairing.sec = ts.tv_sec;
8947         clock_pairing.nsec = ts.tv_nsec;
8948         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
8949         clock_pairing.flags = 0;
8950         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
8951
8952         ret = 0;
8953         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
8954                             sizeof(struct kvm_clock_pairing)))
8955                 ret = -KVM_EFAULT;
8956
8957         return ret;
8958 }
8959 #endif
8960
8961 /*
8962  * kvm_pv_kick_cpu_op:  Kick a vcpu.
8963  *
8964  * @apicid - apicid of vcpu to be kicked.
8965  */
8966 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
8967 {
8968         struct kvm_lapic_irq lapic_irq;
8969
8970         lapic_irq.shorthand = APIC_DEST_NOSHORT;
8971         lapic_irq.dest_mode = APIC_DEST_PHYSICAL;
8972         lapic_irq.level = 0;
8973         lapic_irq.dest_id = apicid;
8974         lapic_irq.msi_redir_hint = false;
8975
8976         lapic_irq.delivery_mode = APIC_DM_REMRD;
8977         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
8978 }
8979
8980 bool kvm_apicv_activated(struct kvm *kvm)
8981 {
8982         return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
8983 }
8984 EXPORT_SYMBOL_GPL(kvm_apicv_activated);
8985
8986 static void kvm_apicv_init(struct kvm *kvm)
8987 {
8988         init_rwsem(&kvm->arch.apicv_update_lock);
8989
8990         set_bit(APICV_INHIBIT_REASON_ABSENT,
8991                 &kvm->arch.apicv_inhibit_reasons);
8992         if (!enable_apicv)
8993                 set_bit(APICV_INHIBIT_REASON_DISABLE,
8994                         &kvm->arch.apicv_inhibit_reasons);
8995 }
8996
8997 static void kvm_sched_yield(struct kvm_vcpu *vcpu, unsigned long dest_id)
8998 {
8999         struct kvm_vcpu *target = NULL;
9000         struct kvm_apic_map *map;
9001
9002         vcpu->stat.directed_yield_attempted++;
9003
9004         if (single_task_running())
9005                 goto no_yield;
9006
9007         rcu_read_lock();
9008         map = rcu_dereference(vcpu->kvm->arch.apic_map);
9009
9010         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
9011                 target = map->phys_map[dest_id]->vcpu;
9012
9013         rcu_read_unlock();
9014
9015         if (!target || !READ_ONCE(target->ready))
9016                 goto no_yield;
9017
9018         /* Ignore requests to yield to self */
9019         if (vcpu == target)
9020                 goto no_yield;
9021
9022         if (kvm_vcpu_yield_to(target) <= 0)
9023                 goto no_yield;
9024
9025         vcpu->stat.directed_yield_successful++;
9026
9027 no_yield:
9028         return;
9029 }
9030
9031 static int complete_hypercall_exit(struct kvm_vcpu *vcpu)
9032 {
9033         u64 ret = vcpu->run->hypercall.ret;
9034
9035         if (!is_64_bit_mode(vcpu))
9036                 ret = (u32)ret;
9037         kvm_rax_write(vcpu, ret);
9038         ++vcpu->stat.hypercalls;
9039         return kvm_skip_emulated_instruction(vcpu);
9040 }
9041
9042 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
9043 {
9044         unsigned long nr, a0, a1, a2, a3, ret;
9045         int op_64_bit;
9046
9047         if (kvm_xen_hypercall_enabled(vcpu->kvm))
9048                 return kvm_xen_hypercall(vcpu);
9049
9050         if (kvm_hv_hypercall_enabled(vcpu))
9051                 return kvm_hv_hypercall(vcpu);
9052
9053         nr = kvm_rax_read(vcpu);
9054         a0 = kvm_rbx_read(vcpu);
9055         a1 = kvm_rcx_read(vcpu);
9056         a2 = kvm_rdx_read(vcpu);
9057         a3 = kvm_rsi_read(vcpu);
9058
9059         trace_kvm_hypercall(nr, a0, a1, a2, a3);
9060
9061         op_64_bit = is_64_bit_hypercall(vcpu);
9062         if (!op_64_bit) {
9063                 nr &= 0xFFFFFFFF;
9064                 a0 &= 0xFFFFFFFF;
9065                 a1 &= 0xFFFFFFFF;
9066                 a2 &= 0xFFFFFFFF;
9067                 a3 &= 0xFFFFFFFF;
9068         }
9069
9070         if (static_call(kvm_x86_get_cpl)(vcpu) != 0) {
9071                 ret = -KVM_EPERM;
9072                 goto out;
9073         }
9074
9075         ret = -KVM_ENOSYS;
9076
9077         switch (nr) {
9078         case KVM_HC_VAPIC_POLL_IRQ:
9079                 ret = 0;
9080                 break;
9081         case KVM_HC_KICK_CPU:
9082                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_UNHALT))
9083                         break;
9084
9085                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
9086                 kvm_sched_yield(vcpu, a1);
9087                 ret = 0;
9088                 break;
9089 #ifdef CONFIG_X86_64
9090         case KVM_HC_CLOCK_PAIRING:
9091                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
9092                 break;
9093 #endif
9094         case KVM_HC_SEND_IPI:
9095                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SEND_IPI))
9096                         break;
9097
9098                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
9099                 break;
9100         case KVM_HC_SCHED_YIELD:
9101                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SCHED_YIELD))
9102                         break;
9103
9104                 kvm_sched_yield(vcpu, a0);
9105                 ret = 0;
9106                 break;
9107         case KVM_HC_MAP_GPA_RANGE: {
9108                 u64 gpa = a0, npages = a1, attrs = a2;
9109
9110                 ret = -KVM_ENOSYS;
9111                 if (!(vcpu->kvm->arch.hypercall_exit_enabled & (1 << KVM_HC_MAP_GPA_RANGE)))
9112                         break;
9113
9114                 if (!PAGE_ALIGNED(gpa) || !npages ||
9115                     gpa_to_gfn(gpa) + npages <= gpa_to_gfn(gpa)) {
9116                         ret = -KVM_EINVAL;
9117                         break;
9118                 }
9119
9120                 vcpu->run->exit_reason        = KVM_EXIT_HYPERCALL;
9121                 vcpu->run->hypercall.nr       = KVM_HC_MAP_GPA_RANGE;
9122                 vcpu->run->hypercall.args[0]  = gpa;
9123                 vcpu->run->hypercall.args[1]  = npages;
9124                 vcpu->run->hypercall.args[2]  = attrs;
9125                 vcpu->run->hypercall.longmode = op_64_bit;
9126                 vcpu->arch.complete_userspace_io = complete_hypercall_exit;
9127                 return 0;
9128         }
9129         default:
9130                 ret = -KVM_ENOSYS;
9131                 break;
9132         }
9133 out:
9134         if (!op_64_bit)
9135                 ret = (u32)ret;
9136         kvm_rax_write(vcpu, ret);
9137
9138         ++vcpu->stat.hypercalls;
9139         return kvm_skip_emulated_instruction(vcpu);
9140 }
9141 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
9142
9143 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
9144 {
9145         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
9146         char instruction[3];
9147         unsigned long rip = kvm_rip_read(vcpu);
9148
9149         static_call(kvm_x86_patch_hypercall)(vcpu, instruction);
9150
9151         return emulator_write_emulated(ctxt, rip, instruction, 3,
9152                 &ctxt->exception);
9153 }
9154
9155 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
9156 {
9157         return vcpu->run->request_interrupt_window &&
9158                 likely(!pic_in_kernel(vcpu->kvm));
9159 }
9160
9161 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
9162 {
9163         struct kvm_run *kvm_run = vcpu->run;
9164
9165         kvm_run->if_flag = static_call(kvm_x86_get_if_flag)(vcpu);
9166         kvm_run->cr8 = kvm_get_cr8(vcpu);
9167         kvm_run->apic_base = kvm_get_apic_base(vcpu);
9168
9169         /*
9170          * The call to kvm_ready_for_interrupt_injection() may end up in
9171          * kvm_xen_has_interrupt() which may require the srcu lock to be
9172          * held, to protect against changes in the vcpu_info address.
9173          */
9174         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9175         kvm_run->ready_for_interrupt_injection =
9176                 pic_in_kernel(vcpu->kvm) ||
9177                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
9178         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9179
9180         if (is_smm(vcpu))
9181                 kvm_run->flags |= KVM_RUN_X86_SMM;
9182 }
9183
9184 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
9185 {
9186         int max_irr, tpr;
9187
9188         if (!kvm_x86_ops.update_cr8_intercept)
9189                 return;
9190
9191         if (!lapic_in_kernel(vcpu))
9192                 return;
9193
9194         if (vcpu->arch.apicv_active)
9195                 return;
9196
9197         if (!vcpu->arch.apic->vapic_addr)
9198                 max_irr = kvm_lapic_find_highest_irr(vcpu);
9199         else
9200                 max_irr = -1;
9201
9202         if (max_irr != -1)
9203                 max_irr >>= 4;
9204
9205         tpr = kvm_lapic_get_cr8(vcpu);
9206
9207         static_call(kvm_x86_update_cr8_intercept)(vcpu, tpr, max_irr);
9208 }
9209
9210
9211 int kvm_check_nested_events(struct kvm_vcpu *vcpu)
9212 {
9213         if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
9214                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
9215                 return 1;
9216         }
9217
9218         return kvm_x86_ops.nested_ops->check_events(vcpu);
9219 }
9220
9221 static void kvm_inject_exception(struct kvm_vcpu *vcpu)
9222 {
9223         if (vcpu->arch.exception.error_code && !is_protmode(vcpu))
9224                 vcpu->arch.exception.error_code = false;
9225         static_call(kvm_x86_queue_exception)(vcpu);
9226 }
9227
9228 static int inject_pending_event(struct kvm_vcpu *vcpu, bool *req_immediate_exit)
9229 {
9230         int r;
9231         bool can_inject = true;
9232
9233         /* try to reinject previous events if any */
9234
9235         if (vcpu->arch.exception.injected) {
9236                 kvm_inject_exception(vcpu);
9237                 can_inject = false;
9238         }
9239         /*
9240          * Do not inject an NMI or interrupt if there is a pending
9241          * exception.  Exceptions and interrupts are recognized at
9242          * instruction boundaries, i.e. the start of an instruction.
9243          * Trap-like exceptions, e.g. #DB, have higher priority than
9244          * NMIs and interrupts, i.e. traps are recognized before an
9245          * NMI/interrupt that's pending on the same instruction.
9246          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
9247          * priority, but are only generated (pended) during instruction
9248          * execution, i.e. a pending fault-like exception means the
9249          * fault occurred on the *previous* instruction and must be
9250          * serviced prior to recognizing any new events in order to
9251          * fully complete the previous instruction.
9252          */
9253         else if (!vcpu->arch.exception.pending) {
9254                 if (vcpu->arch.nmi_injected) {
9255                         static_call(kvm_x86_set_nmi)(vcpu);
9256                         can_inject = false;
9257                 } else if (vcpu->arch.interrupt.injected) {
9258                         static_call(kvm_x86_set_irq)(vcpu);
9259                         can_inject = false;
9260                 }
9261         }
9262
9263         WARN_ON_ONCE(vcpu->arch.exception.injected &&
9264                      vcpu->arch.exception.pending);
9265
9266         /*
9267          * Call check_nested_events() even if we reinjected a previous event
9268          * in order for caller to determine if it should require immediate-exit
9269          * from L2 to L1 due to pending L1 events which require exit
9270          * from L2 to L1.
9271          */
9272         if (is_guest_mode(vcpu)) {
9273                 r = kvm_check_nested_events(vcpu);
9274                 if (r < 0)
9275                         goto out;
9276         }
9277
9278         /* try to inject new event if pending */
9279         if (vcpu->arch.exception.pending) {
9280                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
9281                                         vcpu->arch.exception.has_error_code,
9282                                         vcpu->arch.exception.error_code);
9283
9284                 vcpu->arch.exception.pending = false;
9285                 vcpu->arch.exception.injected = true;
9286
9287                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
9288                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
9289                                              X86_EFLAGS_RF);
9290
9291                 if (vcpu->arch.exception.nr == DB_VECTOR) {
9292                         kvm_deliver_exception_payload(vcpu);
9293                         if (vcpu->arch.dr7 & DR7_GD) {
9294                                 vcpu->arch.dr7 &= ~DR7_GD;
9295                                 kvm_update_dr7(vcpu);
9296                         }
9297                 }
9298
9299                 kvm_inject_exception(vcpu);
9300                 can_inject = false;
9301         }
9302
9303         /* Don't inject interrupts if the user asked to avoid doing so */
9304         if (vcpu->guest_debug & KVM_GUESTDBG_BLOCKIRQ)
9305                 return 0;
9306
9307         /*
9308          * Finally, inject interrupt events.  If an event cannot be injected
9309          * due to architectural conditions (e.g. IF=0) a window-open exit
9310          * will re-request KVM_REQ_EVENT.  Sometimes however an event is pending
9311          * and can architecturally be injected, but we cannot do it right now:
9312          * an interrupt could have arrived just now and we have to inject it
9313          * as a vmexit, or there could already an event in the queue, which is
9314          * indicated by can_inject.  In that case we request an immediate exit
9315          * in order to make progress and get back here for another iteration.
9316          * The kvm_x86_ops hooks communicate this by returning -EBUSY.
9317          */
9318         if (vcpu->arch.smi_pending) {
9319                 r = can_inject ? static_call(kvm_x86_smi_allowed)(vcpu, true) : -EBUSY;
9320                 if (r < 0)
9321                         goto out;
9322                 if (r) {
9323                         vcpu->arch.smi_pending = false;
9324                         ++vcpu->arch.smi_count;
9325                         enter_smm(vcpu);
9326                         can_inject = false;
9327                 } else
9328                         static_call(kvm_x86_enable_smi_window)(vcpu);
9329         }
9330
9331         if (vcpu->arch.nmi_pending) {
9332                 r = can_inject ? static_call(kvm_x86_nmi_allowed)(vcpu, true) : -EBUSY;
9333                 if (r < 0)
9334                         goto out;
9335                 if (r) {
9336                         --vcpu->arch.nmi_pending;
9337                         vcpu->arch.nmi_injected = true;
9338                         static_call(kvm_x86_set_nmi)(vcpu);
9339                         can_inject = false;
9340                         WARN_ON(static_call(kvm_x86_nmi_allowed)(vcpu, true) < 0);
9341                 }
9342                 if (vcpu->arch.nmi_pending)
9343                         static_call(kvm_x86_enable_nmi_window)(vcpu);
9344         }
9345
9346         if (kvm_cpu_has_injectable_intr(vcpu)) {
9347                 r = can_inject ? static_call(kvm_x86_interrupt_allowed)(vcpu, true) : -EBUSY;
9348                 if (r < 0)
9349                         goto out;
9350                 if (r) {
9351                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu), false);
9352                         static_call(kvm_x86_set_irq)(vcpu);
9353                         WARN_ON(static_call(kvm_x86_interrupt_allowed)(vcpu, true) < 0);
9354                 }
9355                 if (kvm_cpu_has_injectable_intr(vcpu))
9356                         static_call(kvm_x86_enable_irq_window)(vcpu);
9357         }
9358
9359         if (is_guest_mode(vcpu) &&
9360             kvm_x86_ops.nested_ops->hv_timer_pending &&
9361             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
9362                 *req_immediate_exit = true;
9363
9364         WARN_ON(vcpu->arch.exception.pending);
9365         return 0;
9366
9367 out:
9368         if (r == -EBUSY) {
9369                 *req_immediate_exit = true;
9370                 r = 0;
9371         }
9372         return r;
9373 }
9374
9375 static void process_nmi(struct kvm_vcpu *vcpu)
9376 {
9377         unsigned limit = 2;
9378
9379         /*
9380          * x86 is limited to one NMI running, and one NMI pending after it.
9381          * If an NMI is already in progress, limit further NMIs to just one.
9382          * Otherwise, allow two (and we'll inject the first one immediately).
9383          */
9384         if (static_call(kvm_x86_get_nmi_mask)(vcpu) || vcpu->arch.nmi_injected)
9385                 limit = 1;
9386
9387         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
9388         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
9389         kvm_make_request(KVM_REQ_EVENT, vcpu);
9390 }
9391
9392 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
9393 {
9394         u32 flags = 0;
9395         flags |= seg->g       << 23;
9396         flags |= seg->db      << 22;
9397         flags |= seg->l       << 21;
9398         flags |= seg->avl     << 20;
9399         flags |= seg->present << 15;
9400         flags |= seg->dpl     << 13;
9401         flags |= seg->s       << 12;
9402         flags |= seg->type    << 8;
9403         return flags;
9404 }
9405
9406 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
9407 {
9408         struct kvm_segment seg;
9409         int offset;
9410
9411         kvm_get_segment(vcpu, &seg, n);
9412         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
9413
9414         if (n < 3)
9415                 offset = 0x7f84 + n * 12;
9416         else
9417                 offset = 0x7f2c + (n - 3) * 12;
9418
9419         put_smstate(u32, buf, offset + 8, seg.base);
9420         put_smstate(u32, buf, offset + 4, seg.limit);
9421         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
9422 }
9423
9424 #ifdef CONFIG_X86_64
9425 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
9426 {
9427         struct kvm_segment seg;
9428         int offset;
9429         u16 flags;
9430
9431         kvm_get_segment(vcpu, &seg, n);
9432         offset = 0x7e00 + n * 16;
9433
9434         flags = enter_smm_get_segment_flags(&seg) >> 8;
9435         put_smstate(u16, buf, offset, seg.selector);
9436         put_smstate(u16, buf, offset + 2, flags);
9437         put_smstate(u32, buf, offset + 4, seg.limit);
9438         put_smstate(u64, buf, offset + 8, seg.base);
9439 }
9440 #endif
9441
9442 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
9443 {
9444         struct desc_ptr dt;
9445         struct kvm_segment seg;
9446         unsigned long val;
9447         int i;
9448
9449         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
9450         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
9451         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
9452         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
9453
9454         for (i = 0; i < 8; i++)
9455                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read_raw(vcpu, i));
9456
9457         kvm_get_dr(vcpu, 6, &val);
9458         put_smstate(u32, buf, 0x7fcc, (u32)val);
9459         kvm_get_dr(vcpu, 7, &val);
9460         put_smstate(u32, buf, 0x7fc8, (u32)val);
9461
9462         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
9463         put_smstate(u32, buf, 0x7fc4, seg.selector);
9464         put_smstate(u32, buf, 0x7f64, seg.base);
9465         put_smstate(u32, buf, 0x7f60, seg.limit);
9466         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
9467
9468         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
9469         put_smstate(u32, buf, 0x7fc0, seg.selector);
9470         put_smstate(u32, buf, 0x7f80, seg.base);
9471         put_smstate(u32, buf, 0x7f7c, seg.limit);
9472         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
9473
9474         static_call(kvm_x86_get_gdt)(vcpu, &dt);
9475         put_smstate(u32, buf, 0x7f74, dt.address);
9476         put_smstate(u32, buf, 0x7f70, dt.size);
9477
9478         static_call(kvm_x86_get_idt)(vcpu, &dt);
9479         put_smstate(u32, buf, 0x7f58, dt.address);
9480         put_smstate(u32, buf, 0x7f54, dt.size);
9481
9482         for (i = 0; i < 6; i++)
9483                 enter_smm_save_seg_32(vcpu, buf, i);
9484
9485         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
9486
9487         /* revision id */
9488         put_smstate(u32, buf, 0x7efc, 0x00020000);
9489         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
9490 }
9491
9492 #ifdef CONFIG_X86_64
9493 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
9494 {
9495         struct desc_ptr dt;
9496         struct kvm_segment seg;
9497         unsigned long val;
9498         int i;
9499
9500         for (i = 0; i < 16; i++)
9501                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read_raw(vcpu, i));
9502
9503         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
9504         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
9505
9506         kvm_get_dr(vcpu, 6, &val);
9507         put_smstate(u64, buf, 0x7f68, val);
9508         kvm_get_dr(vcpu, 7, &val);
9509         put_smstate(u64, buf, 0x7f60, val);
9510
9511         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
9512         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
9513         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
9514
9515         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
9516
9517         /* revision id */
9518         put_smstate(u32, buf, 0x7efc, 0x00020064);
9519
9520         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
9521
9522         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
9523         put_smstate(u16, buf, 0x7e90, seg.selector);
9524         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
9525         put_smstate(u32, buf, 0x7e94, seg.limit);
9526         put_smstate(u64, buf, 0x7e98, seg.base);
9527
9528         static_call(kvm_x86_get_idt)(vcpu, &dt);
9529         put_smstate(u32, buf, 0x7e84, dt.size);
9530         put_smstate(u64, buf, 0x7e88, dt.address);
9531
9532         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
9533         put_smstate(u16, buf, 0x7e70, seg.selector);
9534         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
9535         put_smstate(u32, buf, 0x7e74, seg.limit);
9536         put_smstate(u64, buf, 0x7e78, seg.base);
9537
9538         static_call(kvm_x86_get_gdt)(vcpu, &dt);
9539         put_smstate(u32, buf, 0x7e64, dt.size);
9540         put_smstate(u64, buf, 0x7e68, dt.address);
9541
9542         for (i = 0; i < 6; i++)
9543                 enter_smm_save_seg_64(vcpu, buf, i);
9544 }
9545 #endif
9546
9547 static void enter_smm(struct kvm_vcpu *vcpu)
9548 {
9549         struct kvm_segment cs, ds;
9550         struct desc_ptr dt;
9551         unsigned long cr0;
9552         char buf[512];
9553
9554         memset(buf, 0, 512);
9555 #ifdef CONFIG_X86_64
9556         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9557                 enter_smm_save_state_64(vcpu, buf);
9558         else
9559 #endif
9560                 enter_smm_save_state_32(vcpu, buf);
9561
9562         /*
9563          * Give enter_smm() a chance to make ISA-specific changes to the vCPU
9564          * state (e.g. leave guest mode) after we've saved the state into the
9565          * SMM state-save area.
9566          */
9567         static_call(kvm_x86_enter_smm)(vcpu, buf);
9568
9569         kvm_smm_changed(vcpu, true);
9570         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
9571
9572         if (static_call(kvm_x86_get_nmi_mask)(vcpu))
9573                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
9574         else
9575                 static_call(kvm_x86_set_nmi_mask)(vcpu, true);
9576
9577         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
9578         kvm_rip_write(vcpu, 0x8000);
9579
9580         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
9581         static_call(kvm_x86_set_cr0)(vcpu, cr0);
9582         vcpu->arch.cr0 = cr0;
9583
9584         static_call(kvm_x86_set_cr4)(vcpu, 0);
9585
9586         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
9587         dt.address = dt.size = 0;
9588         static_call(kvm_x86_set_idt)(vcpu, &dt);
9589
9590         kvm_set_dr(vcpu, 7, DR7_FIXED_1);
9591
9592         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
9593         cs.base = vcpu->arch.smbase;
9594
9595         ds.selector = 0;
9596         ds.base = 0;
9597
9598         cs.limit    = ds.limit = 0xffffffff;
9599         cs.type     = ds.type = 0x3;
9600         cs.dpl      = ds.dpl = 0;
9601         cs.db       = ds.db = 0;
9602         cs.s        = ds.s = 1;
9603         cs.l        = ds.l = 0;
9604         cs.g        = ds.g = 1;
9605         cs.avl      = ds.avl = 0;
9606         cs.present  = ds.present = 1;
9607         cs.unusable = ds.unusable = 0;
9608         cs.padding  = ds.padding = 0;
9609
9610         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
9611         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
9612         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
9613         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
9614         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
9615         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
9616
9617 #ifdef CONFIG_X86_64
9618         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9619                 static_call(kvm_x86_set_efer)(vcpu, 0);
9620 #endif
9621
9622         kvm_update_cpuid_runtime(vcpu);
9623         kvm_mmu_reset_context(vcpu);
9624 }
9625
9626 static void process_smi(struct kvm_vcpu *vcpu)
9627 {
9628         vcpu->arch.smi_pending = true;
9629         kvm_make_request(KVM_REQ_EVENT, vcpu);
9630 }
9631
9632 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
9633                                        unsigned long *vcpu_bitmap)
9634 {
9635         kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC, vcpu_bitmap);
9636 }
9637
9638 void kvm_make_scan_ioapic_request(struct kvm *kvm)
9639 {
9640         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
9641 }
9642
9643 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
9644 {
9645         bool activate;
9646
9647         if (!lapic_in_kernel(vcpu))
9648                 return;
9649
9650         down_read(&vcpu->kvm->arch.apicv_update_lock);
9651
9652         activate = kvm_apicv_activated(vcpu->kvm);
9653         if (vcpu->arch.apicv_active == activate)
9654                 goto out;
9655
9656         vcpu->arch.apicv_active = activate;
9657         kvm_apic_update_apicv(vcpu);
9658         static_call(kvm_x86_refresh_apicv_exec_ctrl)(vcpu);
9659
9660         /*
9661          * When APICv gets disabled, we may still have injected interrupts
9662          * pending. At the same time, KVM_REQ_EVENT may not be set as APICv was
9663          * still active when the interrupt got accepted. Make sure
9664          * inject_pending_event() is called to check for that.
9665          */
9666         if (!vcpu->arch.apicv_active)
9667                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9668
9669 out:
9670         up_read(&vcpu->kvm->arch.apicv_update_lock);
9671 }
9672 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv);
9673
9674 void __kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
9675 {
9676         unsigned long old, new;
9677
9678         lockdep_assert_held_write(&kvm->arch.apicv_update_lock);
9679
9680         if (!kvm_x86_ops.check_apicv_inhibit_reasons ||
9681             !static_call(kvm_x86_check_apicv_inhibit_reasons)(bit))
9682                 return;
9683
9684         old = new = kvm->arch.apicv_inhibit_reasons;
9685
9686         if (activate)
9687                 __clear_bit(bit, &new);
9688         else
9689                 __set_bit(bit, &new);
9690
9691         if (!!old != !!new) {
9692                 trace_kvm_apicv_update_request(activate, bit);
9693                 /*
9694                  * Kick all vCPUs before setting apicv_inhibit_reasons to avoid
9695                  * false positives in the sanity check WARN in svm_vcpu_run().
9696                  * This task will wait for all vCPUs to ack the kick IRQ before
9697                  * updating apicv_inhibit_reasons, and all other vCPUs will
9698                  * block on acquiring apicv_update_lock so that vCPUs can't
9699                  * redo svm_vcpu_run() without seeing the new inhibit state.
9700                  *
9701                  * Note, holding apicv_update_lock and taking it in the read
9702                  * side (handling the request) also prevents other vCPUs from
9703                  * servicing the request with a stale apicv_inhibit_reasons.
9704                  */
9705                 kvm_make_all_cpus_request(kvm, KVM_REQ_APICV_UPDATE);
9706                 kvm->arch.apicv_inhibit_reasons = new;
9707                 if (new) {
9708                         unsigned long gfn = gpa_to_gfn(APIC_DEFAULT_PHYS_BASE);
9709                         kvm_zap_gfn_range(kvm, gfn, gfn+1);
9710                 }
9711         } else
9712                 kvm->arch.apicv_inhibit_reasons = new;
9713 }
9714 EXPORT_SYMBOL_GPL(__kvm_request_apicv_update);
9715
9716 void kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
9717 {
9718         down_write(&kvm->arch.apicv_update_lock);
9719         __kvm_request_apicv_update(kvm, activate, bit);
9720         up_write(&kvm->arch.apicv_update_lock);
9721 }
9722 EXPORT_SYMBOL_GPL(kvm_request_apicv_update);
9723
9724 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
9725 {
9726         if (!kvm_apic_present(vcpu))
9727                 return;
9728
9729         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
9730
9731         if (irqchip_split(vcpu->kvm))
9732                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
9733         else {
9734                 static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
9735                 if (ioapic_in_kernel(vcpu->kvm))
9736                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
9737         }
9738
9739         if (is_guest_mode(vcpu))
9740                 vcpu->arch.load_eoi_exitmap_pending = true;
9741         else
9742                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
9743 }
9744
9745 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
9746 {
9747         u64 eoi_exit_bitmap[4];
9748
9749         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
9750                 return;
9751
9752         if (to_hv_vcpu(vcpu)) {
9753                 bitmap_or((ulong *)eoi_exit_bitmap,
9754                           vcpu->arch.ioapic_handled_vectors,
9755                           to_hv_synic(vcpu)->vec_bitmap, 256);
9756                 static_call(kvm_x86_load_eoi_exitmap)(vcpu, eoi_exit_bitmap);
9757                 return;
9758         }
9759
9760         static_call(kvm_x86_load_eoi_exitmap)(
9761                 vcpu, (u64 *)vcpu->arch.ioapic_handled_vectors);
9762 }
9763
9764 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
9765                                             unsigned long start, unsigned long end)
9766 {
9767         unsigned long apic_address;
9768
9769         /*
9770          * The physical address of apic access page is stored in the VMCS.
9771          * Update it when it becomes invalid.
9772          */
9773         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
9774         if (start <= apic_address && apic_address < end)
9775                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
9776 }
9777
9778 static void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
9779 {
9780         if (!lapic_in_kernel(vcpu))
9781                 return;
9782
9783         if (!kvm_x86_ops.set_apic_access_page_addr)
9784                 return;
9785
9786         static_call(kvm_x86_set_apic_access_page_addr)(vcpu);
9787 }
9788
9789 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
9790 {
9791         smp_send_reschedule(vcpu->cpu);
9792 }
9793 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
9794
9795 /*
9796  * Returns 1 to let vcpu_run() continue the guest execution loop without
9797  * exiting to the userspace.  Otherwise, the value will be returned to the
9798  * userspace.
9799  */
9800 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
9801 {
9802         int r;
9803         bool req_int_win =
9804                 dm_request_for_irq_injection(vcpu) &&
9805                 kvm_cpu_accept_dm_intr(vcpu);
9806         fastpath_t exit_fastpath;
9807
9808         bool req_immediate_exit = false;
9809
9810         /* Forbid vmenter if vcpu dirty ring is soft-full */
9811         if (unlikely(vcpu->kvm->dirty_ring_size &&
9812                      kvm_dirty_ring_soft_full(&vcpu->dirty_ring))) {
9813                 vcpu->run->exit_reason = KVM_EXIT_DIRTY_RING_FULL;
9814                 trace_kvm_dirty_ring_exit(vcpu);
9815                 r = 0;
9816                 goto out;
9817         }
9818
9819         if (kvm_request_pending(vcpu)) {
9820                 if (kvm_check_request(KVM_REQ_VM_DEAD, vcpu)) {
9821                         r = -EIO;
9822                         goto out;
9823                 }
9824                 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu)) {
9825                         if (unlikely(!kvm_x86_ops.nested_ops->get_nested_state_pages(vcpu))) {
9826                                 r = 0;
9827                                 goto out;
9828                         }
9829                 }
9830                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
9831                         kvm_mmu_unload(vcpu);
9832                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
9833                         __kvm_migrate_timers(vcpu);
9834                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
9835                         kvm_update_masterclock(vcpu->kvm);
9836                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
9837                         kvm_gen_kvmclock_update(vcpu);
9838                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
9839                         r = kvm_guest_time_update(vcpu);
9840                         if (unlikely(r))
9841                                 goto out;
9842                 }
9843                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
9844                         kvm_mmu_sync_roots(vcpu);
9845                 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD, vcpu))
9846                         kvm_mmu_load_pgd(vcpu);
9847                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) {
9848                         kvm_vcpu_flush_tlb_all(vcpu);
9849
9850                         /* Flushing all ASIDs flushes the current ASID... */
9851                         kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
9852                 }
9853                 kvm_service_local_tlb_flush_requests(vcpu);
9854
9855                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
9856                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
9857                         r = 0;
9858                         goto out;
9859                 }
9860                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
9861                         if (is_guest_mode(vcpu)) {
9862                                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
9863                         } else {
9864                                 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
9865                                 vcpu->mmio_needed = 0;
9866                                 r = 0;
9867                                 goto out;
9868                         }
9869                 }
9870                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
9871                         /* Page is swapped out. Do synthetic halt */
9872                         vcpu->arch.apf.halted = true;
9873                         r = 1;
9874                         goto out;
9875                 }
9876                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
9877                         record_steal_time(vcpu);
9878                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
9879                         process_smi(vcpu);
9880                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
9881                         process_nmi(vcpu);
9882                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
9883                         kvm_pmu_handle_event(vcpu);
9884                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
9885                         kvm_pmu_deliver_pmi(vcpu);
9886                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
9887                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
9888                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
9889                                      vcpu->arch.ioapic_handled_vectors)) {
9890                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
9891                                 vcpu->run->eoi.vector =
9892                                                 vcpu->arch.pending_ioapic_eoi;
9893                                 r = 0;
9894                                 goto out;
9895                         }
9896                 }
9897                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
9898                         vcpu_scan_ioapic(vcpu);
9899                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
9900                         vcpu_load_eoi_exitmap(vcpu);
9901                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
9902                         kvm_vcpu_reload_apic_access_page(vcpu);
9903                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
9904                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9905                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
9906                         r = 0;
9907                         goto out;
9908                 }
9909                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
9910                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9911                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
9912                         r = 0;
9913                         goto out;
9914                 }
9915                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
9916                         struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
9917
9918                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
9919                         vcpu->run->hyperv = hv_vcpu->exit;
9920                         r = 0;
9921                         goto out;
9922                 }
9923
9924                 /*
9925                  * KVM_REQ_HV_STIMER has to be processed after
9926                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
9927                  * depend on the guest clock being up-to-date
9928                  */
9929                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
9930                         kvm_hv_process_stimers(vcpu);
9931                 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
9932                         kvm_vcpu_update_apicv(vcpu);
9933                 if (kvm_check_request(KVM_REQ_APF_READY, vcpu))
9934                         kvm_check_async_pf_completion(vcpu);
9935                 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED, vcpu))
9936                         static_call(kvm_x86_msr_filter_changed)(vcpu);
9937
9938                 if (kvm_check_request(KVM_REQ_UPDATE_CPU_DIRTY_LOGGING, vcpu))
9939                         static_call(kvm_x86_update_cpu_dirty_logging)(vcpu);
9940         }
9941
9942         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win ||
9943             kvm_xen_has_interrupt(vcpu)) {
9944                 ++vcpu->stat.req_event;
9945                 r = kvm_apic_accept_events(vcpu);
9946                 if (r < 0) {
9947                         r = 0;
9948                         goto out;
9949                 }
9950                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
9951                         r = 1;
9952                         goto out;
9953                 }
9954
9955                 r = inject_pending_event(vcpu, &req_immediate_exit);
9956                 if (r < 0) {
9957                         r = 0;
9958                         goto out;
9959                 }
9960                 if (req_int_win)
9961                         static_call(kvm_x86_enable_irq_window)(vcpu);
9962
9963                 if (kvm_lapic_enabled(vcpu)) {
9964                         update_cr8_intercept(vcpu);
9965                         kvm_lapic_sync_to_vapic(vcpu);
9966                 }
9967         }
9968
9969         r = kvm_mmu_reload(vcpu);
9970         if (unlikely(r)) {
9971                 goto cancel_injection;
9972         }
9973
9974         preempt_disable();
9975
9976         static_call(kvm_x86_prepare_guest_switch)(vcpu);
9977
9978         /*
9979          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
9980          * IPI are then delayed after guest entry, which ensures that they
9981          * result in virtual interrupt delivery.
9982          */
9983         local_irq_disable();
9984         vcpu->mode = IN_GUEST_MODE;
9985
9986         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9987
9988         /*
9989          * 1) We should set ->mode before checking ->requests.  Please see
9990          * the comment in kvm_vcpu_exiting_guest_mode().
9991          *
9992          * 2) For APICv, we should set ->mode before checking PID.ON. This
9993          * pairs with the memory barrier implicit in pi_test_and_set_on
9994          * (see vmx_deliver_posted_interrupt).
9995          *
9996          * 3) This also orders the write to mode from any reads to the page
9997          * tables done while the VCPU is running.  Please see the comment
9998          * in kvm_flush_remote_tlbs.
9999          */
10000         smp_mb__after_srcu_read_unlock();
10001
10002         /*
10003          * Process pending posted interrupts to handle the case where the
10004          * notification IRQ arrived in the host, or was never sent (because the
10005          * target vCPU wasn't running).  Do this regardless of the vCPU's APICv
10006          * status, KVM doesn't update assigned devices when APICv is inhibited,
10007          * i.e. they can post interrupts even if APICv is temporarily disabled.
10008          */
10009         if (kvm_lapic_enabled(vcpu))
10010                 static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
10011
10012         if (kvm_vcpu_exit_request(vcpu)) {
10013                 vcpu->mode = OUTSIDE_GUEST_MODE;
10014                 smp_wmb();
10015                 local_irq_enable();
10016                 preempt_enable();
10017                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
10018                 r = 1;
10019                 goto cancel_injection;
10020         }
10021
10022         if (req_immediate_exit) {
10023                 kvm_make_request(KVM_REQ_EVENT, vcpu);
10024                 static_call(kvm_x86_request_immediate_exit)(vcpu);
10025         }
10026
10027         fpregs_assert_state_consistent();
10028         if (test_thread_flag(TIF_NEED_FPU_LOAD))
10029                 switch_fpu_return();
10030
10031         if (vcpu->arch.guest_fpu.xfd_err)
10032                 wrmsrl(MSR_IA32_XFD_ERR, vcpu->arch.guest_fpu.xfd_err);
10033
10034         if (unlikely(vcpu->arch.switch_db_regs)) {
10035                 set_debugreg(0, 7);
10036                 set_debugreg(vcpu->arch.eff_db[0], 0);
10037                 set_debugreg(vcpu->arch.eff_db[1], 1);
10038                 set_debugreg(vcpu->arch.eff_db[2], 2);
10039                 set_debugreg(vcpu->arch.eff_db[3], 3);
10040         } else if (unlikely(hw_breakpoint_active())) {
10041                 set_debugreg(0, 7);
10042         }
10043
10044         for (;;) {
10045                 /*
10046                  * Assert that vCPU vs. VM APICv state is consistent.  An APICv
10047                  * update must kick and wait for all vCPUs before toggling the
10048                  * per-VM state, and responsing vCPUs must wait for the update
10049                  * to complete before servicing KVM_REQ_APICV_UPDATE.
10050                  */
10051                 WARN_ON_ONCE(kvm_apicv_activated(vcpu->kvm) != kvm_vcpu_apicv_active(vcpu));
10052
10053                 exit_fastpath = static_call(kvm_x86_run)(vcpu);
10054                 if (likely(exit_fastpath != EXIT_FASTPATH_REENTER_GUEST))
10055                         break;
10056
10057                 if (kvm_lapic_enabled(vcpu))
10058                         static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
10059
10060                 if (unlikely(kvm_vcpu_exit_request(vcpu))) {
10061                         exit_fastpath = EXIT_FASTPATH_EXIT_HANDLED;
10062                         break;
10063                 }
10064         }
10065
10066         /*
10067          * Do this here before restoring debug registers on the host.  And
10068          * since we do this before handling the vmexit, a DR access vmexit
10069          * can (a) read the correct value of the debug registers, (b) set
10070          * KVM_DEBUGREG_WONT_EXIT again.
10071          */
10072         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
10073                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
10074                 static_call(kvm_x86_sync_dirty_debug_regs)(vcpu);
10075                 kvm_update_dr0123(vcpu);
10076                 kvm_update_dr7(vcpu);
10077         }
10078
10079         /*
10080          * If the guest has used debug registers, at least dr7
10081          * will be disabled while returning to the host.
10082          * If we don't have active breakpoints in the host, we don't
10083          * care about the messed up debug address registers. But if
10084          * we have some of them active, restore the old state.
10085          */
10086         if (hw_breakpoint_active())
10087                 hw_breakpoint_restore();
10088
10089         vcpu->arch.last_vmentry_cpu = vcpu->cpu;
10090         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
10091
10092         vcpu->mode = OUTSIDE_GUEST_MODE;
10093         smp_wmb();
10094
10095         /*
10096          * Sync xfd before calling handle_exit_irqoff() which may
10097          * rely on the fact that guest_fpu::xfd is up-to-date (e.g.
10098          * in #NM irqoff handler).
10099          */
10100         if (vcpu->arch.xfd_no_write_intercept)
10101                 fpu_sync_guest_vmexit_xfd_state();
10102
10103         static_call(kvm_x86_handle_exit_irqoff)(vcpu);
10104
10105         if (vcpu->arch.guest_fpu.xfd_err)
10106                 wrmsrl(MSR_IA32_XFD_ERR, 0);
10107
10108         /*
10109          * Consume any pending interrupts, including the possible source of
10110          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
10111          * An instruction is required after local_irq_enable() to fully unblock
10112          * interrupts on processors that implement an interrupt shadow, the
10113          * stat.exits increment will do nicely.
10114          */
10115         kvm_before_interrupt(vcpu, KVM_HANDLING_IRQ);
10116         local_irq_enable();
10117         ++vcpu->stat.exits;
10118         local_irq_disable();
10119         kvm_after_interrupt(vcpu);
10120
10121         /*
10122          * Wait until after servicing IRQs to account guest time so that any
10123          * ticks that occurred while running the guest are properly accounted
10124          * to the guest.  Waiting until IRQs are enabled degrades the accuracy
10125          * of accounting via context tracking, but the loss of accuracy is
10126          * acceptable for all known use cases.
10127          */
10128         vtime_account_guest_exit();
10129
10130         if (lapic_in_kernel(vcpu)) {
10131                 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
10132                 if (delta != S64_MIN) {
10133                         trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
10134                         vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
10135                 }
10136         }
10137
10138         local_irq_enable();
10139         preempt_enable();
10140
10141         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
10142
10143         /*
10144          * Profile KVM exit RIPs:
10145          */
10146         if (unlikely(prof_on == KVM_PROFILING)) {
10147                 unsigned long rip = kvm_rip_read(vcpu);
10148                 profile_hit(KVM_PROFILING, (void *)rip);
10149         }
10150
10151         if (unlikely(vcpu->arch.tsc_always_catchup))
10152                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
10153
10154         if (vcpu->arch.apic_attention)
10155                 kvm_lapic_sync_from_vapic(vcpu);
10156
10157         r = static_call(kvm_x86_handle_exit)(vcpu, exit_fastpath);
10158         return r;
10159
10160 cancel_injection:
10161         if (req_immediate_exit)
10162                 kvm_make_request(KVM_REQ_EVENT, vcpu);
10163         static_call(kvm_x86_cancel_injection)(vcpu);
10164         if (unlikely(vcpu->arch.apic_attention))
10165                 kvm_lapic_sync_from_vapic(vcpu);
10166 out:
10167         return r;
10168 }
10169
10170 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
10171 {
10172         bool hv_timer;
10173
10174         if (!kvm_arch_vcpu_runnable(vcpu)) {
10175                 /*
10176                  * Switch to the software timer before halt-polling/blocking as
10177                  * the guest's timer may be a break event for the vCPU, and the
10178                  * hypervisor timer runs only when the CPU is in guest mode.
10179                  * Switch before halt-polling so that KVM recognizes an expired
10180                  * timer before blocking.
10181                  */
10182                 hv_timer = kvm_lapic_hv_timer_in_use(vcpu);
10183                 if (hv_timer)
10184                         kvm_lapic_switch_to_sw_timer(vcpu);
10185
10186                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
10187                 if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED)
10188                         kvm_vcpu_halt(vcpu);
10189                 else
10190                         kvm_vcpu_block(vcpu);
10191                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
10192
10193                 if (hv_timer)
10194                         kvm_lapic_switch_to_hv_timer(vcpu);
10195
10196                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
10197                         return 1;
10198         }
10199
10200         if (kvm_apic_accept_events(vcpu) < 0)
10201                 return 0;
10202         switch(vcpu->arch.mp_state) {
10203         case KVM_MP_STATE_HALTED:
10204         case KVM_MP_STATE_AP_RESET_HOLD:
10205                 vcpu->arch.pv.pv_unhalted = false;
10206                 vcpu->arch.mp_state =
10207                         KVM_MP_STATE_RUNNABLE;
10208                 fallthrough;
10209         case KVM_MP_STATE_RUNNABLE:
10210                 vcpu->arch.apf.halted = false;
10211                 break;
10212         case KVM_MP_STATE_INIT_RECEIVED:
10213                 break;
10214         default:
10215                 return -EINTR;
10216         }
10217         return 1;
10218 }
10219
10220 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
10221 {
10222         if (is_guest_mode(vcpu))
10223                 kvm_check_nested_events(vcpu);
10224
10225         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
10226                 !vcpu->arch.apf.halted);
10227 }
10228
10229 static int vcpu_run(struct kvm_vcpu *vcpu)
10230 {
10231         int r;
10232         struct kvm *kvm = vcpu->kvm;
10233
10234         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
10235         vcpu->arch.l1tf_flush_l1d = true;
10236
10237         for (;;) {
10238                 if (kvm_vcpu_running(vcpu)) {
10239                         r = vcpu_enter_guest(vcpu);
10240                 } else {
10241                         r = vcpu_block(kvm, vcpu);
10242                 }
10243
10244                 if (r <= 0)
10245                         break;
10246
10247                 kvm_clear_request(KVM_REQ_UNBLOCK, vcpu);
10248                 if (kvm_cpu_has_pending_timer(vcpu))
10249                         kvm_inject_pending_timer_irqs(vcpu);
10250
10251                 if (dm_request_for_irq_injection(vcpu) &&
10252                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
10253                         r = 0;
10254                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
10255                         ++vcpu->stat.request_irq_exits;
10256                         break;
10257                 }
10258
10259                 if (__xfer_to_guest_mode_work_pending()) {
10260                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
10261                         r = xfer_to_guest_mode_handle_work(vcpu);
10262                         if (r)
10263                                 return r;
10264                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
10265                 }
10266         }
10267
10268         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
10269
10270         return r;
10271 }
10272
10273 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
10274 {
10275         int r;
10276
10277         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
10278         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
10279         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
10280         return r;
10281 }
10282
10283 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
10284 {
10285         BUG_ON(!vcpu->arch.pio.count);
10286
10287         return complete_emulated_io(vcpu);
10288 }
10289
10290 /*
10291  * Implements the following, as a state machine:
10292  *
10293  * read:
10294  *   for each fragment
10295  *     for each mmio piece in the fragment
10296  *       write gpa, len
10297  *       exit
10298  *       copy data
10299  *   execute insn
10300  *
10301  * write:
10302  *   for each fragment
10303  *     for each mmio piece in the fragment
10304  *       write gpa, len
10305  *       copy data
10306  *       exit
10307  */
10308 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
10309 {
10310         struct kvm_run *run = vcpu->run;
10311         struct kvm_mmio_fragment *frag;
10312         unsigned len;
10313
10314         BUG_ON(!vcpu->mmio_needed);
10315
10316         /* Complete previous fragment */
10317         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
10318         len = min(8u, frag->len);
10319         if (!vcpu->mmio_is_write)
10320                 memcpy(frag->data, run->mmio.data, len);
10321
10322         if (frag->len <= 8) {
10323                 /* Switch to the next fragment. */
10324                 frag++;
10325                 vcpu->mmio_cur_fragment++;
10326         } else {
10327                 /* Go forward to the next mmio piece. */
10328                 frag->data += len;
10329                 frag->gpa += len;
10330                 frag->len -= len;
10331         }
10332
10333         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
10334                 vcpu->mmio_needed = 0;
10335
10336                 /* FIXME: return into emulator if single-stepping.  */
10337                 if (vcpu->mmio_is_write)
10338                         return 1;
10339                 vcpu->mmio_read_completed = 1;
10340                 return complete_emulated_io(vcpu);
10341         }
10342
10343         run->exit_reason = KVM_EXIT_MMIO;
10344         run->mmio.phys_addr = frag->gpa;
10345         if (vcpu->mmio_is_write)
10346                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
10347         run->mmio.len = min(8u, frag->len);
10348         run->mmio.is_write = vcpu->mmio_is_write;
10349         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
10350         return 0;
10351 }
10352
10353 /* Swap (qemu) user FPU context for the guest FPU context. */
10354 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
10355 {
10356         /*
10357          * Exclude PKRU from restore as restored separately in
10358          * kvm_x86_ops.run().
10359          */
10360         fpu_swap_kvm_fpstate(&vcpu->arch.guest_fpu, true);
10361         trace_kvm_fpu(1);
10362 }
10363
10364 /* When vcpu_run ends, restore user space FPU context. */
10365 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
10366 {
10367         fpu_swap_kvm_fpstate(&vcpu->arch.guest_fpu, false);
10368         ++vcpu->stat.fpu_reload;
10369         trace_kvm_fpu(0);
10370 }
10371
10372 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
10373 {
10374         struct kvm_run *kvm_run = vcpu->run;
10375         int r;
10376
10377         vcpu_load(vcpu);
10378         kvm_sigset_activate(vcpu);
10379         kvm_run->flags = 0;
10380         kvm_load_guest_fpu(vcpu);
10381
10382         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
10383                 if (kvm_run->immediate_exit) {
10384                         r = -EINTR;
10385                         goto out;
10386                 }
10387                 /*
10388                  * It should be impossible for the hypervisor timer to be in
10389                  * use before KVM has ever run the vCPU.
10390                  */
10391                 WARN_ON_ONCE(kvm_lapic_hv_timer_in_use(vcpu));
10392                 kvm_vcpu_block(vcpu);
10393                 if (kvm_apic_accept_events(vcpu) < 0) {
10394                         r = 0;
10395                         goto out;
10396                 }
10397                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
10398                 r = -EAGAIN;
10399                 if (signal_pending(current)) {
10400                         r = -EINTR;
10401                         kvm_run->exit_reason = KVM_EXIT_INTR;
10402                         ++vcpu->stat.signal_exits;
10403                 }
10404                 goto out;
10405         }
10406
10407         if ((kvm_run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) ||
10408             (kvm_run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)) {
10409                 r = -EINVAL;
10410                 goto out;
10411         }
10412
10413         if (kvm_run->kvm_dirty_regs) {
10414                 r = sync_regs(vcpu);
10415                 if (r != 0)
10416                         goto out;
10417         }
10418
10419         /* re-sync apic's tpr */
10420         if (!lapic_in_kernel(vcpu)) {
10421                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
10422                         r = -EINVAL;
10423                         goto out;
10424                 }
10425         }
10426
10427         if (unlikely(vcpu->arch.complete_userspace_io)) {
10428                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
10429                 vcpu->arch.complete_userspace_io = NULL;
10430                 r = cui(vcpu);
10431                 if (r <= 0)
10432                         goto out;
10433         } else
10434                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
10435
10436         if (kvm_run->immediate_exit) {
10437                 r = -EINTR;
10438                 goto out;
10439         }
10440
10441         r = static_call(kvm_x86_vcpu_pre_run)(vcpu);
10442         if (r <= 0)
10443                 goto out;
10444
10445         r = vcpu_run(vcpu);
10446
10447 out:
10448         kvm_put_guest_fpu(vcpu);
10449         if (kvm_run->kvm_valid_regs)
10450                 store_regs(vcpu);
10451         post_kvm_run_save(vcpu);
10452         kvm_sigset_deactivate(vcpu);
10453
10454         vcpu_put(vcpu);
10455         return r;
10456 }
10457
10458 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10459 {
10460         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
10461                 /*
10462                  * We are here if userspace calls get_regs() in the middle of
10463                  * instruction emulation. Registers state needs to be copied
10464                  * back from emulation context to vcpu. Userspace shouldn't do
10465                  * that usually, but some bad designed PV devices (vmware
10466                  * backdoor interface) need this to work
10467                  */
10468                 emulator_writeback_register_cache(vcpu->arch.emulate_ctxt);
10469                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
10470         }
10471         regs->rax = kvm_rax_read(vcpu);
10472         regs->rbx = kvm_rbx_read(vcpu);
10473         regs->rcx = kvm_rcx_read(vcpu);
10474         regs->rdx = kvm_rdx_read(vcpu);
10475         regs->rsi = kvm_rsi_read(vcpu);
10476         regs->rdi = kvm_rdi_read(vcpu);
10477         regs->rsp = kvm_rsp_read(vcpu);
10478         regs->rbp = kvm_rbp_read(vcpu);
10479 #ifdef CONFIG_X86_64
10480         regs->r8 = kvm_r8_read(vcpu);
10481         regs->r9 = kvm_r9_read(vcpu);
10482         regs->r10 = kvm_r10_read(vcpu);
10483         regs->r11 = kvm_r11_read(vcpu);
10484         regs->r12 = kvm_r12_read(vcpu);
10485         regs->r13 = kvm_r13_read(vcpu);
10486         regs->r14 = kvm_r14_read(vcpu);
10487         regs->r15 = kvm_r15_read(vcpu);
10488 #endif
10489
10490         regs->rip = kvm_rip_read(vcpu);
10491         regs->rflags = kvm_get_rflags(vcpu);
10492 }
10493
10494 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10495 {
10496         vcpu_load(vcpu);
10497         __get_regs(vcpu, regs);
10498         vcpu_put(vcpu);
10499         return 0;
10500 }
10501
10502 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10503 {
10504         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
10505         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
10506
10507         kvm_rax_write(vcpu, regs->rax);
10508         kvm_rbx_write(vcpu, regs->rbx);
10509         kvm_rcx_write(vcpu, regs->rcx);
10510         kvm_rdx_write(vcpu, regs->rdx);
10511         kvm_rsi_write(vcpu, regs->rsi);
10512         kvm_rdi_write(vcpu, regs->rdi);
10513         kvm_rsp_write(vcpu, regs->rsp);
10514         kvm_rbp_write(vcpu, regs->rbp);
10515 #ifdef CONFIG_X86_64
10516         kvm_r8_write(vcpu, regs->r8);
10517         kvm_r9_write(vcpu, regs->r9);
10518         kvm_r10_write(vcpu, regs->r10);
10519         kvm_r11_write(vcpu, regs->r11);
10520         kvm_r12_write(vcpu, regs->r12);
10521         kvm_r13_write(vcpu, regs->r13);
10522         kvm_r14_write(vcpu, regs->r14);
10523         kvm_r15_write(vcpu, regs->r15);
10524 #endif
10525
10526         kvm_rip_write(vcpu, regs->rip);
10527         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
10528
10529         vcpu->arch.exception.pending = false;
10530
10531         kvm_make_request(KVM_REQ_EVENT, vcpu);
10532 }
10533
10534 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10535 {
10536         vcpu_load(vcpu);
10537         __set_regs(vcpu, regs);
10538         vcpu_put(vcpu);
10539         return 0;
10540 }
10541
10542 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
10543 {
10544         struct kvm_segment cs;
10545
10546         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
10547         *db = cs.db;
10548         *l = cs.l;
10549 }
10550 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
10551
10552 static void __get_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10553 {
10554         struct desc_ptr dt;
10555
10556         if (vcpu->arch.guest_state_protected)
10557                 goto skip_protected_regs;
10558
10559         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10560         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10561         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10562         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10563         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10564         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10565
10566         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10567         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10568
10569         static_call(kvm_x86_get_idt)(vcpu, &dt);
10570         sregs->idt.limit = dt.size;
10571         sregs->idt.base = dt.address;
10572         static_call(kvm_x86_get_gdt)(vcpu, &dt);
10573         sregs->gdt.limit = dt.size;
10574         sregs->gdt.base = dt.address;
10575
10576         sregs->cr2 = vcpu->arch.cr2;
10577         sregs->cr3 = kvm_read_cr3(vcpu);
10578
10579 skip_protected_regs:
10580         sregs->cr0 = kvm_read_cr0(vcpu);
10581         sregs->cr4 = kvm_read_cr4(vcpu);
10582         sregs->cr8 = kvm_get_cr8(vcpu);
10583         sregs->efer = vcpu->arch.efer;
10584         sregs->apic_base = kvm_get_apic_base(vcpu);
10585 }
10586
10587 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10588 {
10589         __get_sregs_common(vcpu, sregs);
10590
10591         if (vcpu->arch.guest_state_protected)
10592                 return;
10593
10594         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
10595                 set_bit(vcpu->arch.interrupt.nr,
10596                         (unsigned long *)sregs->interrupt_bitmap);
10597 }
10598
10599 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
10600 {
10601         int i;
10602
10603         __get_sregs_common(vcpu, (struct kvm_sregs *)sregs2);
10604
10605         if (vcpu->arch.guest_state_protected)
10606                 return;
10607
10608         if (is_pae_paging(vcpu)) {
10609                 for (i = 0 ; i < 4 ; i++)
10610                         sregs2->pdptrs[i] = kvm_pdptr_read(vcpu, i);
10611                 sregs2->flags |= KVM_SREGS2_FLAGS_PDPTRS_VALID;
10612         }
10613 }
10614
10615 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
10616                                   struct kvm_sregs *sregs)
10617 {
10618         vcpu_load(vcpu);
10619         __get_sregs(vcpu, sregs);
10620         vcpu_put(vcpu);
10621         return 0;
10622 }
10623
10624 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
10625                                     struct kvm_mp_state *mp_state)
10626 {
10627         int r;
10628
10629         vcpu_load(vcpu);
10630         if (kvm_mpx_supported())
10631                 kvm_load_guest_fpu(vcpu);
10632
10633         r = kvm_apic_accept_events(vcpu);
10634         if (r < 0)
10635                 goto out;
10636         r = 0;
10637
10638         if ((vcpu->arch.mp_state == KVM_MP_STATE_HALTED ||
10639              vcpu->arch.mp_state == KVM_MP_STATE_AP_RESET_HOLD) &&
10640             vcpu->arch.pv.pv_unhalted)
10641                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
10642         else
10643                 mp_state->mp_state = vcpu->arch.mp_state;
10644
10645 out:
10646         if (kvm_mpx_supported())
10647                 kvm_put_guest_fpu(vcpu);
10648         vcpu_put(vcpu);
10649         return r;
10650 }
10651
10652 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
10653                                     struct kvm_mp_state *mp_state)
10654 {
10655         int ret = -EINVAL;
10656
10657         vcpu_load(vcpu);
10658
10659         if (!lapic_in_kernel(vcpu) &&
10660             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
10661                 goto out;
10662
10663         /*
10664          * KVM_MP_STATE_INIT_RECEIVED means the processor is in
10665          * INIT state; latched init should be reported using
10666          * KVM_SET_VCPU_EVENTS, so reject it here.
10667          */
10668         if ((kvm_vcpu_latch_init(vcpu) || vcpu->arch.smi_pending) &&
10669             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
10670              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
10671                 goto out;
10672
10673         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
10674                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
10675                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
10676         } else
10677                 vcpu->arch.mp_state = mp_state->mp_state;
10678         kvm_make_request(KVM_REQ_EVENT, vcpu);
10679
10680         ret = 0;
10681 out:
10682         vcpu_put(vcpu);
10683         return ret;
10684 }
10685
10686 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
10687                     int reason, bool has_error_code, u32 error_code)
10688 {
10689         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
10690         int ret;
10691
10692         init_emulate_ctxt(vcpu);
10693
10694         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
10695                                    has_error_code, error_code);
10696         if (ret) {
10697                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
10698                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
10699                 vcpu->run->internal.ndata = 0;
10700                 return 0;
10701         }
10702
10703         kvm_rip_write(vcpu, ctxt->eip);
10704         kvm_set_rflags(vcpu, ctxt->eflags);
10705         return 1;
10706 }
10707 EXPORT_SYMBOL_GPL(kvm_task_switch);
10708
10709 static bool kvm_is_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10710 {
10711         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
10712                 /*
10713                  * When EFER.LME and CR0.PG are set, the processor is in
10714                  * 64-bit mode (though maybe in a 32-bit code segment).
10715                  * CR4.PAE and EFER.LMA must be set.
10716                  */
10717                 if (!(sregs->cr4 & X86_CR4_PAE) || !(sregs->efer & EFER_LMA))
10718                         return false;
10719                 if (kvm_vcpu_is_illegal_gpa(vcpu, sregs->cr3))
10720                         return false;
10721         } else {
10722                 /*
10723                  * Not in 64-bit mode: EFER.LMA is clear and the code
10724                  * segment cannot be 64-bit.
10725                  */
10726                 if (sregs->efer & EFER_LMA || sregs->cs.l)
10727                         return false;
10728         }
10729
10730         return kvm_is_valid_cr4(vcpu, sregs->cr4);
10731 }
10732
10733 static int __set_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs,
10734                 int *mmu_reset_needed, bool update_pdptrs)
10735 {
10736         struct msr_data apic_base_msr;
10737         int idx;
10738         struct desc_ptr dt;
10739
10740         if (!kvm_is_valid_sregs(vcpu, sregs))
10741                 return -EINVAL;
10742
10743         apic_base_msr.data = sregs->apic_base;
10744         apic_base_msr.host_initiated = true;
10745         if (kvm_set_apic_base(vcpu, &apic_base_msr))
10746                 return -EINVAL;
10747
10748         if (vcpu->arch.guest_state_protected)
10749                 return 0;
10750
10751         dt.size = sregs->idt.limit;
10752         dt.address = sregs->idt.base;
10753         static_call(kvm_x86_set_idt)(vcpu, &dt);
10754         dt.size = sregs->gdt.limit;
10755         dt.address = sregs->gdt.base;
10756         static_call(kvm_x86_set_gdt)(vcpu, &dt);
10757
10758         vcpu->arch.cr2 = sregs->cr2;
10759         *mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
10760         vcpu->arch.cr3 = sregs->cr3;
10761         kvm_register_mark_dirty(vcpu, VCPU_EXREG_CR3);
10762         static_call_cond(kvm_x86_post_set_cr3)(vcpu, sregs->cr3);
10763
10764         kvm_set_cr8(vcpu, sregs->cr8);
10765
10766         *mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
10767         static_call(kvm_x86_set_efer)(vcpu, sregs->efer);
10768
10769         *mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
10770         static_call(kvm_x86_set_cr0)(vcpu, sregs->cr0);
10771         vcpu->arch.cr0 = sregs->cr0;
10772
10773         *mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
10774         static_call(kvm_x86_set_cr4)(vcpu, sregs->cr4);
10775
10776         if (update_pdptrs) {
10777                 idx = srcu_read_lock(&vcpu->kvm->srcu);
10778                 if (is_pae_paging(vcpu)) {
10779                         load_pdptrs(vcpu, kvm_read_cr3(vcpu));
10780                         *mmu_reset_needed = 1;
10781                 }
10782                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
10783         }
10784
10785         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10786         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10787         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10788         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10789         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10790         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10791
10792         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10793         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10794
10795         update_cr8_intercept(vcpu);
10796
10797         /* Older userspace won't unhalt the vcpu on reset. */
10798         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
10799             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
10800             !is_protmode(vcpu))
10801                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10802
10803         return 0;
10804 }
10805
10806 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10807 {
10808         int pending_vec, max_bits;
10809         int mmu_reset_needed = 0;
10810         int ret = __set_sregs_common(vcpu, sregs, &mmu_reset_needed, true);
10811
10812         if (ret)
10813                 return ret;
10814
10815         if (mmu_reset_needed)
10816                 kvm_mmu_reset_context(vcpu);
10817
10818         max_bits = KVM_NR_INTERRUPTS;
10819         pending_vec = find_first_bit(
10820                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
10821
10822         if (pending_vec < max_bits) {
10823                 kvm_queue_interrupt(vcpu, pending_vec, false);
10824                 pr_debug("Set back pending irq %d\n", pending_vec);
10825                 kvm_make_request(KVM_REQ_EVENT, vcpu);
10826         }
10827         return 0;
10828 }
10829
10830 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
10831 {
10832         int mmu_reset_needed = 0;
10833         bool valid_pdptrs = sregs2->flags & KVM_SREGS2_FLAGS_PDPTRS_VALID;
10834         bool pae = (sregs2->cr0 & X86_CR0_PG) && (sregs2->cr4 & X86_CR4_PAE) &&
10835                 !(sregs2->efer & EFER_LMA);
10836         int i, ret;
10837
10838         if (sregs2->flags & ~KVM_SREGS2_FLAGS_PDPTRS_VALID)
10839                 return -EINVAL;
10840
10841         if (valid_pdptrs && (!pae || vcpu->arch.guest_state_protected))
10842                 return -EINVAL;
10843
10844         ret = __set_sregs_common(vcpu, (struct kvm_sregs *)sregs2,
10845                                  &mmu_reset_needed, !valid_pdptrs);
10846         if (ret)
10847                 return ret;
10848
10849         if (valid_pdptrs) {
10850                 for (i = 0; i < 4 ; i++)
10851                         kvm_pdptr_write(vcpu, i, sregs2->pdptrs[i]);
10852
10853                 kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
10854                 mmu_reset_needed = 1;
10855                 vcpu->arch.pdptrs_from_userspace = true;
10856         }
10857         if (mmu_reset_needed)
10858                 kvm_mmu_reset_context(vcpu);
10859         return 0;
10860 }
10861
10862 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
10863                                   struct kvm_sregs *sregs)
10864 {
10865         int ret;
10866
10867         vcpu_load(vcpu);
10868         ret = __set_sregs(vcpu, sregs);
10869         vcpu_put(vcpu);
10870         return ret;
10871 }
10872
10873 static void kvm_arch_vcpu_guestdbg_update_apicv_inhibit(struct kvm *kvm)
10874 {
10875         bool inhibit = false;
10876         struct kvm_vcpu *vcpu;
10877         unsigned long i;
10878
10879         down_write(&kvm->arch.apicv_update_lock);
10880
10881         kvm_for_each_vcpu(i, vcpu, kvm) {
10882                 if (vcpu->guest_debug & KVM_GUESTDBG_BLOCKIRQ) {
10883                         inhibit = true;
10884                         break;
10885                 }
10886         }
10887         __kvm_request_apicv_update(kvm, !inhibit, APICV_INHIBIT_REASON_BLOCKIRQ);
10888         up_write(&kvm->arch.apicv_update_lock);
10889 }
10890
10891 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
10892                                         struct kvm_guest_debug *dbg)
10893 {
10894         unsigned long rflags;
10895         int i, r;
10896
10897         if (vcpu->arch.guest_state_protected)
10898                 return -EINVAL;
10899
10900         vcpu_load(vcpu);
10901
10902         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
10903                 r = -EBUSY;
10904                 if (vcpu->arch.exception.pending)
10905                         goto out;
10906                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
10907                         kvm_queue_exception(vcpu, DB_VECTOR);
10908                 else
10909                         kvm_queue_exception(vcpu, BP_VECTOR);
10910         }
10911
10912         /*
10913          * Read rflags as long as potentially injected trace flags are still
10914          * filtered out.
10915          */
10916         rflags = kvm_get_rflags(vcpu);
10917
10918         vcpu->guest_debug = dbg->control;
10919         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
10920                 vcpu->guest_debug = 0;
10921
10922         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
10923                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
10924                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
10925                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
10926         } else {
10927                 for (i = 0; i < KVM_NR_DB_REGS; i++)
10928                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
10929         }
10930         kvm_update_dr7(vcpu);
10931
10932         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
10933                 vcpu->arch.singlestep_rip = kvm_get_linear_rip(vcpu);
10934
10935         /*
10936          * Trigger an rflags update that will inject or remove the trace
10937          * flags.
10938          */
10939         kvm_set_rflags(vcpu, rflags);
10940
10941         static_call(kvm_x86_update_exception_bitmap)(vcpu);
10942
10943         kvm_arch_vcpu_guestdbg_update_apicv_inhibit(vcpu->kvm);
10944
10945         r = 0;
10946
10947 out:
10948         vcpu_put(vcpu);
10949         return r;
10950 }
10951
10952 /*
10953  * Translate a guest virtual address to a guest physical address.
10954  */
10955 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
10956                                     struct kvm_translation *tr)
10957 {
10958         unsigned long vaddr = tr->linear_address;
10959         gpa_t gpa;
10960         int idx;
10961
10962         vcpu_load(vcpu);
10963
10964         idx = srcu_read_lock(&vcpu->kvm->srcu);
10965         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
10966         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10967         tr->physical_address = gpa;
10968         tr->valid = gpa != UNMAPPED_GVA;
10969         tr->writeable = 1;
10970         tr->usermode = 0;
10971
10972         vcpu_put(vcpu);
10973         return 0;
10974 }
10975
10976 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10977 {
10978         struct fxregs_state *fxsave;
10979
10980         if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
10981                 return 0;
10982
10983         vcpu_load(vcpu);
10984
10985         fxsave = &vcpu->arch.guest_fpu.fpstate->regs.fxsave;
10986         memcpy(fpu->fpr, fxsave->st_space, 128);
10987         fpu->fcw = fxsave->cwd;
10988         fpu->fsw = fxsave->swd;
10989         fpu->ftwx = fxsave->twd;
10990         fpu->last_opcode = fxsave->fop;
10991         fpu->last_ip = fxsave->rip;
10992         fpu->last_dp = fxsave->rdp;
10993         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
10994
10995         vcpu_put(vcpu);
10996         return 0;
10997 }
10998
10999 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
11000 {
11001         struct fxregs_state *fxsave;
11002
11003         if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
11004                 return 0;
11005
11006         vcpu_load(vcpu);
11007
11008         fxsave = &vcpu->arch.guest_fpu.fpstate->regs.fxsave;
11009
11010         memcpy(fxsave->st_space, fpu->fpr, 128);
11011         fxsave->cwd = fpu->fcw;
11012         fxsave->swd = fpu->fsw;
11013         fxsave->twd = fpu->ftwx;
11014         fxsave->fop = fpu->last_opcode;
11015         fxsave->rip = fpu->last_ip;
11016         fxsave->rdp = fpu->last_dp;
11017         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
11018
11019         vcpu_put(vcpu);
11020         return 0;
11021 }
11022
11023 static void store_regs(struct kvm_vcpu *vcpu)
11024 {
11025         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
11026
11027         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
11028                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
11029
11030         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
11031                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
11032
11033         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
11034                 kvm_vcpu_ioctl_x86_get_vcpu_events(
11035                                 vcpu, &vcpu->run->s.regs.events);
11036 }
11037
11038 static int sync_regs(struct kvm_vcpu *vcpu)
11039 {
11040         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
11041                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
11042                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
11043         }
11044         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
11045                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
11046                         return -EINVAL;
11047                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
11048         }
11049         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
11050                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
11051                                 vcpu, &vcpu->run->s.regs.events))
11052                         return -EINVAL;
11053                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
11054         }
11055
11056         return 0;
11057 }
11058
11059 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
11060 {
11061         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
11062                 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
11063                              "guest TSC will not be reliable\n");
11064
11065         return 0;
11066 }
11067
11068 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
11069 {
11070         struct page *page;
11071         int r;
11072
11073         vcpu->arch.last_vmentry_cpu = -1;
11074         vcpu->arch.regs_avail = ~0;
11075         vcpu->arch.regs_dirty = ~0;
11076
11077         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
11078                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
11079         else
11080                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
11081
11082         r = kvm_mmu_create(vcpu);
11083         if (r < 0)
11084                 return r;
11085
11086         if (irqchip_in_kernel(vcpu->kvm)) {
11087                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
11088                 if (r < 0)
11089                         goto fail_mmu_destroy;
11090                 if (kvm_apicv_activated(vcpu->kvm))
11091                         vcpu->arch.apicv_active = true;
11092         } else
11093                 static_branch_inc(&kvm_has_noapic_vcpu);
11094
11095         r = -ENOMEM;
11096
11097         page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO);
11098         if (!page)
11099                 goto fail_free_lapic;
11100         vcpu->arch.pio_data = page_address(page);
11101
11102         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
11103                                        GFP_KERNEL_ACCOUNT);
11104         if (!vcpu->arch.mce_banks)
11105                 goto fail_free_pio_data;
11106         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
11107
11108         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
11109                                 GFP_KERNEL_ACCOUNT))
11110                 goto fail_free_mce_banks;
11111
11112         if (!alloc_emulate_ctxt(vcpu))
11113                 goto free_wbinvd_dirty_mask;
11114
11115         if (!fpu_alloc_guest_fpstate(&vcpu->arch.guest_fpu)) {
11116                 pr_err("kvm: failed to allocate vcpu's fpu\n");
11117                 goto free_emulate_ctxt;
11118         }
11119
11120         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
11121         vcpu->arch.reserved_gpa_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu);
11122
11123         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
11124
11125         kvm_async_pf_hash_reset(vcpu);
11126         kvm_pmu_init(vcpu);
11127
11128         vcpu->arch.pending_external_vector = -1;
11129         vcpu->arch.preempted_in_kernel = false;
11130
11131 #if IS_ENABLED(CONFIG_HYPERV)
11132         vcpu->arch.hv_root_tdp = INVALID_PAGE;
11133 #endif
11134
11135         r = static_call(kvm_x86_vcpu_create)(vcpu);
11136         if (r)
11137                 goto free_guest_fpu;
11138
11139         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
11140         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
11141         kvm_vcpu_mtrr_init(vcpu);
11142         vcpu_load(vcpu);
11143         kvm_set_tsc_khz(vcpu, max_tsc_khz);
11144         kvm_vcpu_reset(vcpu, false);
11145         kvm_init_mmu(vcpu);
11146         vcpu_put(vcpu);
11147         return 0;
11148
11149 free_guest_fpu:
11150         fpu_free_guest_fpstate(&vcpu->arch.guest_fpu);
11151 free_emulate_ctxt:
11152         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
11153 free_wbinvd_dirty_mask:
11154         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
11155 fail_free_mce_banks:
11156         kfree(vcpu->arch.mce_banks);
11157 fail_free_pio_data:
11158         free_page((unsigned long)vcpu->arch.pio_data);
11159 fail_free_lapic:
11160         kvm_free_lapic(vcpu);
11161 fail_mmu_destroy:
11162         kvm_mmu_destroy(vcpu);
11163         return r;
11164 }
11165
11166 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
11167 {
11168         struct kvm *kvm = vcpu->kvm;
11169
11170         if (mutex_lock_killable(&vcpu->mutex))
11171                 return;
11172         vcpu_load(vcpu);
11173         kvm_synchronize_tsc(vcpu, 0);
11174         vcpu_put(vcpu);
11175
11176         /* poll control enabled by default */
11177         vcpu->arch.msr_kvm_poll_control = 1;
11178
11179         mutex_unlock(&vcpu->mutex);
11180
11181         if (kvmclock_periodic_sync && vcpu->vcpu_idx == 0)
11182                 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
11183                                                 KVMCLOCK_SYNC_PERIOD);
11184 }
11185
11186 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
11187 {
11188         int idx;
11189
11190         kvmclock_reset(vcpu);
11191
11192         static_call(kvm_x86_vcpu_free)(vcpu);
11193
11194         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
11195         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
11196         fpu_free_guest_fpstate(&vcpu->arch.guest_fpu);
11197
11198         kvm_hv_vcpu_uninit(vcpu);
11199         kvm_pmu_destroy(vcpu);
11200         kfree(vcpu->arch.mce_banks);
11201         kvm_free_lapic(vcpu);
11202         idx = srcu_read_lock(&vcpu->kvm->srcu);
11203         kvm_mmu_destroy(vcpu);
11204         srcu_read_unlock(&vcpu->kvm->srcu, idx);
11205         free_page((unsigned long)vcpu->arch.pio_data);
11206         kvfree(vcpu->arch.cpuid_entries);
11207         if (!lapic_in_kernel(vcpu))
11208                 static_branch_dec(&kvm_has_noapic_vcpu);
11209 }
11210
11211 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
11212 {
11213         struct kvm_cpuid_entry2 *cpuid_0x1;
11214         unsigned long old_cr0 = kvm_read_cr0(vcpu);
11215         unsigned long new_cr0;
11216
11217         /*
11218          * Several of the "set" flows, e.g. ->set_cr0(), read other registers
11219          * to handle side effects.  RESET emulation hits those flows and relies
11220          * on emulated/virtualized registers, including those that are loaded
11221          * into hardware, to be zeroed at vCPU creation.  Use CRs as a sentinel
11222          * to detect improper or missing initialization.
11223          */
11224         WARN_ON_ONCE(!init_event &&
11225                      (old_cr0 || kvm_read_cr3(vcpu) || kvm_read_cr4(vcpu)));
11226
11227         kvm_lapic_reset(vcpu, init_event);
11228
11229         vcpu->arch.hflags = 0;
11230
11231         vcpu->arch.smi_pending = 0;
11232         vcpu->arch.smi_count = 0;
11233         atomic_set(&vcpu->arch.nmi_queued, 0);
11234         vcpu->arch.nmi_pending = 0;
11235         vcpu->arch.nmi_injected = false;
11236         kvm_clear_interrupt_queue(vcpu);
11237         kvm_clear_exception_queue(vcpu);
11238
11239         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
11240         kvm_update_dr0123(vcpu);
11241         vcpu->arch.dr6 = DR6_ACTIVE_LOW;
11242         vcpu->arch.dr7 = DR7_FIXED_1;
11243         kvm_update_dr7(vcpu);
11244
11245         vcpu->arch.cr2 = 0;
11246
11247         kvm_make_request(KVM_REQ_EVENT, vcpu);
11248         vcpu->arch.apf.msr_en_val = 0;
11249         vcpu->arch.apf.msr_int_val = 0;
11250         vcpu->arch.st.msr_val = 0;
11251
11252         kvmclock_reset(vcpu);
11253
11254         kvm_clear_async_pf_completion_queue(vcpu);
11255         kvm_async_pf_hash_reset(vcpu);
11256         vcpu->arch.apf.halted = false;
11257
11258         if (vcpu->arch.guest_fpu.fpstate && kvm_mpx_supported()) {
11259                 struct fpstate *fpstate = vcpu->arch.guest_fpu.fpstate;
11260
11261                 /*
11262                  * To avoid have the INIT path from kvm_apic_has_events() that be
11263                  * called with loaded FPU and does not let userspace fix the state.
11264                  */
11265                 if (init_event)
11266                         kvm_put_guest_fpu(vcpu);
11267
11268                 fpstate_clear_xstate_component(fpstate, XFEATURE_BNDREGS);
11269                 fpstate_clear_xstate_component(fpstate, XFEATURE_BNDCSR);
11270
11271                 if (init_event)
11272                         kvm_load_guest_fpu(vcpu);
11273         }
11274
11275         if (!init_event) {
11276                 kvm_pmu_reset(vcpu);
11277                 vcpu->arch.smbase = 0x30000;
11278
11279                 vcpu->arch.msr_misc_features_enables = 0;
11280
11281                 __kvm_set_xcr(vcpu, 0, XFEATURE_MASK_FP);
11282                 __kvm_set_msr(vcpu, MSR_IA32_XSS, 0, true);
11283         }
11284
11285         /* All GPRs except RDX (handled below) are zeroed on RESET/INIT. */
11286         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
11287         kvm_register_mark_dirty(vcpu, VCPU_REGS_RSP);
11288
11289         /*
11290          * Fall back to KVM's default Family/Model/Stepping of 0x600 (P6/Athlon)
11291          * if no CPUID match is found.  Note, it's impossible to get a match at
11292          * RESET since KVM emulates RESET before exposing the vCPU to userspace,
11293          * i.e. it's impossible for kvm_find_cpuid_entry() to find a valid entry
11294          * on RESET.  But, go through the motions in case that's ever remedied.
11295          */
11296         cpuid_0x1 = kvm_find_cpuid_entry(vcpu, 1, 0);
11297         kvm_rdx_write(vcpu, cpuid_0x1 ? cpuid_0x1->eax : 0x600);
11298
11299         static_call(kvm_x86_vcpu_reset)(vcpu, init_event);
11300
11301         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
11302         kvm_rip_write(vcpu, 0xfff0);
11303
11304         vcpu->arch.cr3 = 0;
11305         kvm_register_mark_dirty(vcpu, VCPU_EXREG_CR3);
11306
11307         /*
11308          * CR0.CD/NW are set on RESET, preserved on INIT.  Note, some versions
11309          * of Intel's SDM list CD/NW as being set on INIT, but they contradict
11310          * (or qualify) that with a footnote stating that CD/NW are preserved.
11311          */
11312         new_cr0 = X86_CR0_ET;
11313         if (init_event)
11314                 new_cr0 |= (old_cr0 & (X86_CR0_NW | X86_CR0_CD));
11315         else
11316                 new_cr0 |= X86_CR0_NW | X86_CR0_CD;
11317
11318         static_call(kvm_x86_set_cr0)(vcpu, new_cr0);
11319         static_call(kvm_x86_set_cr4)(vcpu, 0);
11320         static_call(kvm_x86_set_efer)(vcpu, 0);
11321         static_call(kvm_x86_update_exception_bitmap)(vcpu);
11322
11323         /*
11324          * Reset the MMU context if paging was enabled prior to INIT (which is
11325          * implied if CR0.PG=1 as CR0 will be '0' prior to RESET).  Unlike the
11326          * standard CR0/CR4/EFER modification paths, only CR0.PG needs to be
11327          * checked because it is unconditionally cleared on INIT and all other
11328          * paging related bits are ignored if paging is disabled, i.e. CR0.WP,
11329          * CR4, and EFER changes are all irrelevant if CR0.PG was '0'.
11330          */
11331         if (old_cr0 & X86_CR0_PG)
11332                 kvm_mmu_reset_context(vcpu);
11333
11334         /*
11335          * Intel's SDM states that all TLB entries are flushed on INIT.  AMD's
11336          * APM states the TLBs are untouched by INIT, but it also states that
11337          * the TLBs are flushed on "External initialization of the processor."
11338          * Flush the guest TLB regardless of vendor, there is no meaningful
11339          * benefit in relying on the guest to flush the TLB immediately after
11340          * INIT.  A spurious TLB flush is benign and likely negligible from a
11341          * performance perspective.
11342          */
11343         if (init_event)
11344                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
11345 }
11346 EXPORT_SYMBOL_GPL(kvm_vcpu_reset);
11347
11348 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
11349 {
11350         struct kvm_segment cs;
11351
11352         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
11353         cs.selector = vector << 8;
11354         cs.base = vector << 12;
11355         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
11356         kvm_rip_write(vcpu, 0);
11357 }
11358 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector);
11359
11360 int kvm_arch_hardware_enable(void)
11361 {
11362         struct kvm *kvm;
11363         struct kvm_vcpu *vcpu;
11364         unsigned long i;
11365         int ret;
11366         u64 local_tsc;
11367         u64 max_tsc = 0;
11368         bool stable, backwards_tsc = false;
11369
11370         kvm_user_return_msr_cpu_online();
11371         ret = static_call(kvm_x86_hardware_enable)();
11372         if (ret != 0)
11373                 return ret;
11374
11375         local_tsc = rdtsc();
11376         stable = !kvm_check_tsc_unstable();
11377         list_for_each_entry(kvm, &vm_list, vm_list) {
11378                 kvm_for_each_vcpu(i, vcpu, kvm) {
11379                         if (!stable && vcpu->cpu == smp_processor_id())
11380                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
11381                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
11382                                 backwards_tsc = true;
11383                                 if (vcpu->arch.last_host_tsc > max_tsc)
11384                                         max_tsc = vcpu->arch.last_host_tsc;
11385                         }
11386                 }
11387         }
11388
11389         /*
11390          * Sometimes, even reliable TSCs go backwards.  This happens on
11391          * platforms that reset TSC during suspend or hibernate actions, but
11392          * maintain synchronization.  We must compensate.  Fortunately, we can
11393          * detect that condition here, which happens early in CPU bringup,
11394          * before any KVM threads can be running.  Unfortunately, we can't
11395          * bring the TSCs fully up to date with real time, as we aren't yet far
11396          * enough into CPU bringup that we know how much real time has actually
11397          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
11398          * variables that haven't been updated yet.
11399          *
11400          * So we simply find the maximum observed TSC above, then record the
11401          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
11402          * the adjustment will be applied.  Note that we accumulate
11403          * adjustments, in case multiple suspend cycles happen before some VCPU
11404          * gets a chance to run again.  In the event that no KVM threads get a
11405          * chance to run, we will miss the entire elapsed period, as we'll have
11406          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
11407          * loose cycle time.  This isn't too big a deal, since the loss will be
11408          * uniform across all VCPUs (not to mention the scenario is extremely
11409          * unlikely). It is possible that a second hibernate recovery happens
11410          * much faster than a first, causing the observed TSC here to be
11411          * smaller; this would require additional padding adjustment, which is
11412          * why we set last_host_tsc to the local tsc observed here.
11413          *
11414          * N.B. - this code below runs only on platforms with reliable TSC,
11415          * as that is the only way backwards_tsc is set above.  Also note
11416          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
11417          * have the same delta_cyc adjustment applied if backwards_tsc
11418          * is detected.  Note further, this adjustment is only done once,
11419          * as we reset last_host_tsc on all VCPUs to stop this from being
11420          * called multiple times (one for each physical CPU bringup).
11421          *
11422          * Platforms with unreliable TSCs don't have to deal with this, they
11423          * will be compensated by the logic in vcpu_load, which sets the TSC to
11424          * catchup mode.  This will catchup all VCPUs to real time, but cannot
11425          * guarantee that they stay in perfect synchronization.
11426          */
11427         if (backwards_tsc) {
11428                 u64 delta_cyc = max_tsc - local_tsc;
11429                 list_for_each_entry(kvm, &vm_list, vm_list) {
11430                         kvm->arch.backwards_tsc_observed = true;
11431                         kvm_for_each_vcpu(i, vcpu, kvm) {
11432                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
11433                                 vcpu->arch.last_host_tsc = local_tsc;
11434                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
11435                         }
11436
11437                         /*
11438                          * We have to disable TSC offset matching.. if you were
11439                          * booting a VM while issuing an S4 host suspend....
11440                          * you may have some problem.  Solving this issue is
11441                          * left as an exercise to the reader.
11442                          */
11443                         kvm->arch.last_tsc_nsec = 0;
11444                         kvm->arch.last_tsc_write = 0;
11445                 }
11446
11447         }
11448         return 0;
11449 }
11450
11451 void kvm_arch_hardware_disable(void)
11452 {
11453         static_call(kvm_x86_hardware_disable)();
11454         drop_user_return_notifiers();
11455 }
11456
11457 int kvm_arch_hardware_setup(void *opaque)
11458 {
11459         struct kvm_x86_init_ops *ops = opaque;
11460         int r;
11461
11462         rdmsrl_safe(MSR_EFER, &host_efer);
11463
11464         if (boot_cpu_has(X86_FEATURE_XSAVES))
11465                 rdmsrl(MSR_IA32_XSS, host_xss);
11466
11467         r = ops->hardware_setup();
11468         if (r != 0)
11469                 return r;
11470
11471         memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops));
11472         kvm_ops_static_call_update();
11473
11474         kvm_register_perf_callbacks(ops->handle_intel_pt_intr);
11475
11476         if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
11477                 supported_xss = 0;
11478
11479 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
11480         cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
11481 #undef __kvm_cpu_cap_has
11482
11483         if (kvm_has_tsc_control) {
11484                 /*
11485                  * Make sure the user can only configure tsc_khz values that
11486                  * fit into a signed integer.
11487                  * A min value is not calculated because it will always
11488                  * be 1 on all machines.
11489                  */
11490                 u64 max = min(0x7fffffffULL,
11491                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
11492                 kvm_max_guest_tsc_khz = max;
11493
11494                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
11495         }
11496
11497         kvm_init_msr_list();
11498         return 0;
11499 }
11500
11501 void kvm_arch_hardware_unsetup(void)
11502 {
11503         kvm_unregister_perf_callbacks();
11504
11505         static_call(kvm_x86_hardware_unsetup)();
11506 }
11507
11508 int kvm_arch_check_processor_compat(void *opaque)
11509 {
11510         struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
11511         struct kvm_x86_init_ops *ops = opaque;
11512
11513         WARN_ON(!irqs_disabled());
11514
11515         if (__cr4_reserved_bits(cpu_has, c) !=
11516             __cr4_reserved_bits(cpu_has, &boot_cpu_data))
11517                 return -EIO;
11518
11519         return ops->check_processor_compatibility();
11520 }
11521
11522 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
11523 {
11524         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
11525 }
11526 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
11527
11528 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
11529 {
11530         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
11531 }
11532
11533 __read_mostly DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu);
11534 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu);
11535
11536 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
11537 {
11538         struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
11539
11540         vcpu->arch.l1tf_flush_l1d = true;
11541         if (pmu->version && unlikely(pmu->event_count)) {
11542                 pmu->need_cleanup = true;
11543                 kvm_make_request(KVM_REQ_PMU, vcpu);
11544         }
11545         static_call(kvm_x86_sched_in)(vcpu, cpu);
11546 }
11547
11548 void kvm_arch_free_vm(struct kvm *kvm)
11549 {
11550         kfree(to_kvm_hv(kvm)->hv_pa_pg);
11551         __kvm_arch_free_vm(kvm);
11552 }
11553
11554
11555 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
11556 {
11557         int ret;
11558         unsigned long flags;
11559
11560         if (type)
11561                 return -EINVAL;
11562
11563         ret = kvm_page_track_init(kvm);
11564         if (ret)
11565                 return ret;
11566
11567         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
11568         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
11569         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
11570         INIT_LIST_HEAD(&kvm->arch.lpage_disallowed_mmu_pages);
11571         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
11572         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
11573
11574         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
11575         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
11576         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
11577         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
11578                 &kvm->arch.irq_sources_bitmap);
11579
11580         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
11581         mutex_init(&kvm->arch.apic_map_lock);
11582         seqcount_raw_spinlock_init(&kvm->arch.pvclock_sc, &kvm->arch.tsc_write_lock);
11583         kvm->arch.kvmclock_offset = -get_kvmclock_base_ns();
11584
11585         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
11586         pvclock_update_vm_gtod_copy(kvm);
11587         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
11588
11589         kvm->arch.guest_can_read_msr_platform_info = true;
11590
11591 #if IS_ENABLED(CONFIG_HYPERV)
11592         spin_lock_init(&kvm->arch.hv_root_tdp_lock);
11593         kvm->arch.hv_root_tdp = INVALID_PAGE;
11594 #endif
11595
11596         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
11597         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
11598
11599         kvm_apicv_init(kvm);
11600         kvm_hv_init_vm(kvm);
11601         kvm_mmu_init_vm(kvm);
11602         kvm_xen_init_vm(kvm);
11603
11604         return static_call(kvm_x86_vm_init)(kvm);
11605 }
11606
11607 int kvm_arch_post_init_vm(struct kvm *kvm)
11608 {
11609         return kvm_mmu_post_init_vm(kvm);
11610 }
11611
11612 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
11613 {
11614         vcpu_load(vcpu);
11615         kvm_mmu_unload(vcpu);
11616         vcpu_put(vcpu);
11617 }
11618
11619 static void kvm_free_vcpus(struct kvm *kvm)
11620 {
11621         unsigned long i;
11622         struct kvm_vcpu *vcpu;
11623
11624         /*
11625          * Unpin any mmu pages first.
11626          */
11627         kvm_for_each_vcpu(i, vcpu, kvm) {
11628                 kvm_clear_async_pf_completion_queue(vcpu);
11629                 kvm_unload_vcpu_mmu(vcpu);
11630         }
11631
11632         kvm_destroy_vcpus(kvm);
11633 }
11634
11635 void kvm_arch_sync_events(struct kvm *kvm)
11636 {
11637         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
11638         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
11639         kvm_free_pit(kvm);
11640 }
11641
11642 #define  ERR_PTR_USR(e)  ((void __user *)ERR_PTR(e))
11643
11644 /**
11645  * __x86_set_memory_region: Setup KVM internal memory slot
11646  *
11647  * @kvm: the kvm pointer to the VM.
11648  * @id: the slot ID to setup.
11649  * @gpa: the GPA to install the slot (unused when @size == 0).
11650  * @size: the size of the slot. Set to zero to uninstall a slot.
11651  *
11652  * This function helps to setup a KVM internal memory slot.  Specify
11653  * @size > 0 to install a new slot, while @size == 0 to uninstall a
11654  * slot.  The return code can be one of the following:
11655  *
11656  *   HVA:           on success (uninstall will return a bogus HVA)
11657  *   -errno:        on error
11658  *
11659  * The caller should always use IS_ERR() to check the return value
11660  * before use.  Note, the KVM internal memory slots are guaranteed to
11661  * remain valid and unchanged until the VM is destroyed, i.e., the
11662  * GPA->HVA translation will not change.  However, the HVA is a user
11663  * address, i.e. its accessibility is not guaranteed, and must be
11664  * accessed via __copy_{to,from}_user().
11665  */
11666 void __user * __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
11667                                       u32 size)
11668 {
11669         int i, r;
11670         unsigned long hva, old_npages;
11671         struct kvm_memslots *slots = kvm_memslots(kvm);
11672         struct kvm_memory_slot *slot;
11673
11674         /* Called with kvm->slots_lock held.  */
11675         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
11676                 return ERR_PTR_USR(-EINVAL);
11677
11678         slot = id_to_memslot(slots, id);
11679         if (size) {
11680                 if (slot && slot->npages)
11681                         return ERR_PTR_USR(-EEXIST);
11682
11683                 /*
11684                  * MAP_SHARED to prevent internal slot pages from being moved
11685                  * by fork()/COW.
11686                  */
11687                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
11688                               MAP_SHARED | MAP_ANONYMOUS, 0);
11689                 if (IS_ERR((void *)hva))
11690                         return (void __user *)hva;
11691         } else {
11692                 if (!slot || !slot->npages)
11693                         return NULL;
11694
11695                 old_npages = slot->npages;
11696                 hva = slot->userspace_addr;
11697         }
11698
11699         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
11700                 struct kvm_userspace_memory_region m;
11701
11702                 m.slot = id | (i << 16);
11703                 m.flags = 0;
11704                 m.guest_phys_addr = gpa;
11705                 m.userspace_addr = hva;
11706                 m.memory_size = size;
11707                 r = __kvm_set_memory_region(kvm, &m);
11708                 if (r < 0)
11709                         return ERR_PTR_USR(r);
11710         }
11711
11712         if (!size)
11713                 vm_munmap(hva, old_npages * PAGE_SIZE);
11714
11715         return (void __user *)hva;
11716 }
11717 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
11718
11719 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
11720 {
11721         kvm_mmu_pre_destroy_vm(kvm);
11722 }
11723
11724 void kvm_arch_destroy_vm(struct kvm *kvm)
11725 {
11726         if (current->mm == kvm->mm) {
11727                 /*
11728                  * Free memory regions allocated on behalf of userspace,
11729                  * unless the the memory map has changed due to process exit
11730                  * or fd copying.
11731                  */
11732                 mutex_lock(&kvm->slots_lock);
11733                 __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
11734                                         0, 0);
11735                 __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
11736                                         0, 0);
11737                 __x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
11738                 mutex_unlock(&kvm->slots_lock);
11739         }
11740         static_call_cond(kvm_x86_vm_destroy)(kvm);
11741         kvm_free_msr_filter(srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1));
11742         kvm_pic_destroy(kvm);
11743         kvm_ioapic_destroy(kvm);
11744         kvm_free_vcpus(kvm);
11745         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
11746         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
11747         kvm_mmu_uninit_vm(kvm);
11748         kvm_page_track_cleanup(kvm);
11749         kvm_xen_destroy_vm(kvm);
11750         kvm_hv_destroy_vm(kvm);
11751 }
11752
11753 static void memslot_rmap_free(struct kvm_memory_slot *slot)
11754 {
11755         int i;
11756
11757         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11758                 kvfree(slot->arch.rmap[i]);
11759                 slot->arch.rmap[i] = NULL;
11760         }
11761 }
11762
11763 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
11764 {
11765         int i;
11766
11767         memslot_rmap_free(slot);
11768
11769         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11770                 kvfree(slot->arch.lpage_info[i - 1]);
11771                 slot->arch.lpage_info[i - 1] = NULL;
11772         }
11773
11774         kvm_page_track_free_memslot(slot);
11775 }
11776
11777 int memslot_rmap_alloc(struct kvm_memory_slot *slot, unsigned long npages)
11778 {
11779         const int sz = sizeof(*slot->arch.rmap[0]);
11780         int i;
11781
11782         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11783                 int level = i + 1;
11784                 int lpages = __kvm_mmu_slot_lpages(slot, npages, level);
11785
11786                 if (slot->arch.rmap[i])
11787                         continue;
11788
11789                 slot->arch.rmap[i] = kvcalloc(lpages, sz, GFP_KERNEL_ACCOUNT);
11790                 if (!slot->arch.rmap[i]) {
11791                         memslot_rmap_free(slot);
11792                         return -ENOMEM;
11793                 }
11794         }
11795
11796         return 0;
11797 }
11798
11799 static int kvm_alloc_memslot_metadata(struct kvm *kvm,
11800                                       struct kvm_memory_slot *slot)
11801 {
11802         unsigned long npages = slot->npages;
11803         int i, r;
11804
11805         /*
11806          * Clear out the previous array pointers for the KVM_MR_MOVE case.  The
11807          * old arrays will be freed by __kvm_set_memory_region() if installing
11808          * the new memslot is successful.
11809          */
11810         memset(&slot->arch, 0, sizeof(slot->arch));
11811
11812         if (kvm_memslots_have_rmaps(kvm)) {
11813                 r = memslot_rmap_alloc(slot, npages);
11814                 if (r)
11815                         return r;
11816         }
11817
11818         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11819                 struct kvm_lpage_info *linfo;
11820                 unsigned long ugfn;
11821                 int lpages;
11822                 int level = i + 1;
11823
11824                 lpages = __kvm_mmu_slot_lpages(slot, npages, level);
11825
11826                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
11827                 if (!linfo)
11828                         goto out_free;
11829
11830                 slot->arch.lpage_info[i - 1] = linfo;
11831
11832                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
11833                         linfo[0].disallow_lpage = 1;
11834                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
11835                         linfo[lpages - 1].disallow_lpage = 1;
11836                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
11837                 /*
11838                  * If the gfn and userspace address are not aligned wrt each
11839                  * other, disable large page support for this slot.
11840                  */
11841                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1)) {
11842                         unsigned long j;
11843
11844                         for (j = 0; j < lpages; ++j)
11845                                 linfo[j].disallow_lpage = 1;
11846                 }
11847         }
11848
11849         if (kvm_page_track_create_memslot(kvm, slot, npages))
11850                 goto out_free;
11851
11852         return 0;
11853
11854 out_free:
11855         memslot_rmap_free(slot);
11856
11857         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11858                 kvfree(slot->arch.lpage_info[i - 1]);
11859                 slot->arch.lpage_info[i - 1] = NULL;
11860         }
11861         return -ENOMEM;
11862 }
11863
11864 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
11865 {
11866         struct kvm_vcpu *vcpu;
11867         unsigned long i;
11868
11869         /*
11870          * memslots->generation has been incremented.
11871          * mmio generation may have reached its maximum value.
11872          */
11873         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
11874
11875         /* Force re-initialization of steal_time cache */
11876         kvm_for_each_vcpu(i, vcpu, kvm)
11877                 kvm_vcpu_kick(vcpu);
11878 }
11879
11880 int kvm_arch_prepare_memory_region(struct kvm *kvm,
11881                                    const struct kvm_memory_slot *old,
11882                                    struct kvm_memory_slot *new,
11883                                    enum kvm_mr_change change)
11884 {
11885         if (change == KVM_MR_CREATE || change == KVM_MR_MOVE)
11886                 return kvm_alloc_memslot_metadata(kvm, new);
11887
11888         if (change == KVM_MR_FLAGS_ONLY)
11889                 memcpy(&new->arch, &old->arch, sizeof(old->arch));
11890         else if (WARN_ON_ONCE(change != KVM_MR_DELETE))
11891                 return -EIO;
11892
11893         return 0;
11894 }
11895
11896
11897 static void kvm_mmu_update_cpu_dirty_logging(struct kvm *kvm, bool enable)
11898 {
11899         struct kvm_arch *ka = &kvm->arch;
11900
11901         if (!kvm_x86_ops.cpu_dirty_log_size)
11902                 return;
11903
11904         if ((enable && ++ka->cpu_dirty_logging_count == 1) ||
11905             (!enable && --ka->cpu_dirty_logging_count == 0))
11906                 kvm_make_all_cpus_request(kvm, KVM_REQ_UPDATE_CPU_DIRTY_LOGGING);
11907
11908         WARN_ON_ONCE(ka->cpu_dirty_logging_count < 0);
11909 }
11910
11911 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
11912                                      struct kvm_memory_slot *old,
11913                                      const struct kvm_memory_slot *new,
11914                                      enum kvm_mr_change change)
11915 {
11916         u32 old_flags = old ? old->flags : 0;
11917         u32 new_flags = new ? new->flags : 0;
11918         bool log_dirty_pages = new_flags & KVM_MEM_LOG_DIRTY_PAGES;
11919
11920         /*
11921          * Update CPU dirty logging if dirty logging is being toggled.  This
11922          * applies to all operations.
11923          */
11924         if ((old_flags ^ new_flags) & KVM_MEM_LOG_DIRTY_PAGES)
11925                 kvm_mmu_update_cpu_dirty_logging(kvm, log_dirty_pages);
11926
11927         /*
11928          * Nothing more to do for RO slots (which can't be dirtied and can't be
11929          * made writable) or CREATE/MOVE/DELETE of a slot.
11930          *
11931          * For a memslot with dirty logging disabled:
11932          * CREATE:      No dirty mappings will already exist.
11933          * MOVE/DELETE: The old mappings will already have been cleaned up by
11934          *              kvm_arch_flush_shadow_memslot()
11935          *
11936          * For a memslot with dirty logging enabled:
11937          * CREATE:      No shadow pages exist, thus nothing to write-protect
11938          *              and no dirty bits to clear.
11939          * MOVE/DELETE: The old mappings will already have been cleaned up by
11940          *              kvm_arch_flush_shadow_memslot().
11941          */
11942         if ((change != KVM_MR_FLAGS_ONLY) || (new_flags & KVM_MEM_READONLY))
11943                 return;
11944
11945         /*
11946          * READONLY and non-flags changes were filtered out above, and the only
11947          * other flag is LOG_DIRTY_PAGES, i.e. something is wrong if dirty
11948          * logging isn't being toggled on or off.
11949          */
11950         if (WARN_ON_ONCE(!((old_flags ^ new_flags) & KVM_MEM_LOG_DIRTY_PAGES)))
11951                 return;
11952
11953         if (!log_dirty_pages) {
11954                 /*
11955                  * Dirty logging tracks sptes in 4k granularity, meaning that
11956                  * large sptes have to be split.  If live migration succeeds,
11957                  * the guest in the source machine will be destroyed and large
11958                  * sptes will be created in the destination.  However, if the
11959                  * guest continues to run in the source machine (for example if
11960                  * live migration fails), small sptes will remain around and
11961                  * cause bad performance.
11962                  *
11963                  * Scan sptes if dirty logging has been stopped, dropping those
11964                  * which can be collapsed into a single large-page spte.  Later
11965                  * page faults will create the large-page sptes.
11966                  */
11967                 kvm_mmu_zap_collapsible_sptes(kvm, new);
11968         } else {
11969                 /*
11970                  * Initially-all-set does not require write protecting any page,
11971                  * because they're all assumed to be dirty.
11972                  */
11973                 if (kvm_dirty_log_manual_protect_and_init_set(kvm))
11974                         return;
11975
11976                 if (kvm_x86_ops.cpu_dirty_log_size) {
11977                         kvm_mmu_slot_leaf_clear_dirty(kvm, new);
11978                         kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_2M);
11979                 } else {
11980                         kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_4K);
11981                 }
11982         }
11983 }
11984
11985 void kvm_arch_commit_memory_region(struct kvm *kvm,
11986                                 struct kvm_memory_slot *old,
11987                                 const struct kvm_memory_slot *new,
11988                                 enum kvm_mr_change change)
11989 {
11990         if (!kvm->arch.n_requested_mmu_pages &&
11991             (change == KVM_MR_CREATE || change == KVM_MR_DELETE)) {
11992                 unsigned long nr_mmu_pages;
11993
11994                 nr_mmu_pages = kvm->nr_memslot_pages / KVM_MEMSLOT_PAGES_TO_MMU_PAGES_RATIO;
11995                 nr_mmu_pages = max(nr_mmu_pages, KVM_MIN_ALLOC_MMU_PAGES);
11996                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
11997         }
11998
11999         kvm_mmu_slot_apply_flags(kvm, old, new, change);
12000
12001         /* Free the arrays associated with the old memslot. */
12002         if (change == KVM_MR_MOVE)
12003                 kvm_arch_free_memslot(kvm, old);
12004 }
12005
12006 void kvm_arch_flush_shadow_all(struct kvm *kvm)
12007 {
12008         kvm_mmu_zap_all(kvm);
12009 }
12010
12011 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
12012                                    struct kvm_memory_slot *slot)
12013 {
12014         kvm_page_track_flush_slot(kvm, slot);
12015 }
12016
12017 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
12018 {
12019         return (is_guest_mode(vcpu) &&
12020                         kvm_x86_ops.guest_apic_has_interrupt &&
12021                         static_call(kvm_x86_guest_apic_has_interrupt)(vcpu));
12022 }
12023
12024 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
12025 {
12026         if (!list_empty_careful(&vcpu->async_pf.done))
12027                 return true;
12028
12029         if (kvm_apic_has_events(vcpu))
12030                 return true;
12031
12032         if (vcpu->arch.pv.pv_unhalted)
12033                 return true;
12034
12035         if (vcpu->arch.exception.pending)
12036                 return true;
12037
12038         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
12039             (vcpu->arch.nmi_pending &&
12040              static_call(kvm_x86_nmi_allowed)(vcpu, false)))
12041                 return true;
12042
12043         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
12044             (vcpu->arch.smi_pending &&
12045              static_call(kvm_x86_smi_allowed)(vcpu, false)))
12046                 return true;
12047
12048         if (kvm_arch_interrupt_allowed(vcpu) &&
12049             (kvm_cpu_has_interrupt(vcpu) ||
12050             kvm_guest_apic_has_interrupt(vcpu)))
12051                 return true;
12052
12053         if (kvm_hv_has_stimer_pending(vcpu))
12054                 return true;
12055
12056         if (is_guest_mode(vcpu) &&
12057             kvm_x86_ops.nested_ops->hv_timer_pending &&
12058             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
12059                 return true;
12060
12061         return false;
12062 }
12063
12064 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
12065 {
12066         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
12067 }
12068
12069 bool kvm_arch_dy_has_pending_interrupt(struct kvm_vcpu *vcpu)
12070 {
12071         if (vcpu->arch.apicv_active && static_call(kvm_x86_dy_apicv_has_pending_interrupt)(vcpu))
12072                 return true;
12073
12074         return false;
12075 }
12076
12077 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
12078 {
12079         if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
12080                 return true;
12081
12082         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
12083                 kvm_test_request(KVM_REQ_SMI, vcpu) ||
12084                  kvm_test_request(KVM_REQ_EVENT, vcpu))
12085                 return true;
12086
12087         return kvm_arch_dy_has_pending_interrupt(vcpu);
12088 }
12089
12090 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
12091 {
12092         if (vcpu->arch.guest_state_protected)
12093                 return true;
12094
12095         return vcpu->arch.preempted_in_kernel;
12096 }
12097
12098 unsigned long kvm_arch_vcpu_get_ip(struct kvm_vcpu *vcpu)
12099 {
12100         return kvm_rip_read(vcpu);
12101 }
12102
12103 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
12104 {
12105         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
12106 }
12107
12108 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
12109 {
12110         return static_call(kvm_x86_interrupt_allowed)(vcpu, false);
12111 }
12112
12113 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
12114 {
12115         /* Can't read the RIP when guest state is protected, just return 0 */
12116         if (vcpu->arch.guest_state_protected)
12117                 return 0;
12118
12119         if (is_64_bit_mode(vcpu))
12120                 return kvm_rip_read(vcpu);
12121         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
12122                      kvm_rip_read(vcpu));
12123 }
12124 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
12125
12126 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
12127 {
12128         return kvm_get_linear_rip(vcpu) == linear_rip;
12129 }
12130 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
12131
12132 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
12133 {
12134         unsigned long rflags;
12135
12136         rflags = static_call(kvm_x86_get_rflags)(vcpu);
12137         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
12138                 rflags &= ~X86_EFLAGS_TF;
12139         return rflags;
12140 }
12141 EXPORT_SYMBOL_GPL(kvm_get_rflags);
12142
12143 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
12144 {
12145         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
12146             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
12147                 rflags |= X86_EFLAGS_TF;
12148         static_call(kvm_x86_set_rflags)(vcpu, rflags);
12149 }
12150
12151 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
12152 {
12153         __kvm_set_rflags(vcpu, rflags);
12154         kvm_make_request(KVM_REQ_EVENT, vcpu);
12155 }
12156 EXPORT_SYMBOL_GPL(kvm_set_rflags);
12157
12158 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
12159 {
12160         int r;
12161
12162         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
12163               work->wakeup_all)
12164                 return;
12165
12166         r = kvm_mmu_reload(vcpu);
12167         if (unlikely(r))
12168                 return;
12169
12170         if (!vcpu->arch.mmu->direct_map &&
12171               work->arch.cr3 != vcpu->arch.mmu->get_guest_pgd(vcpu))
12172                 return;
12173
12174         kvm_mmu_do_page_fault(vcpu, work->cr2_or_gpa, 0, true);
12175 }
12176
12177 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
12178 {
12179         BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU));
12180
12181         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
12182 }
12183
12184 static inline u32 kvm_async_pf_next_probe(u32 key)
12185 {
12186         return (key + 1) & (ASYNC_PF_PER_VCPU - 1);
12187 }
12188
12189 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12190 {
12191         u32 key = kvm_async_pf_hash_fn(gfn);
12192
12193         while (vcpu->arch.apf.gfns[key] != ~0)
12194                 key = kvm_async_pf_next_probe(key);
12195
12196         vcpu->arch.apf.gfns[key] = gfn;
12197 }
12198
12199 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
12200 {
12201         int i;
12202         u32 key = kvm_async_pf_hash_fn(gfn);
12203
12204         for (i = 0; i < ASYNC_PF_PER_VCPU &&
12205                      (vcpu->arch.apf.gfns[key] != gfn &&
12206                       vcpu->arch.apf.gfns[key] != ~0); i++)
12207                 key = kvm_async_pf_next_probe(key);
12208
12209         return key;
12210 }
12211
12212 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12213 {
12214         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
12215 }
12216
12217 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12218 {
12219         u32 i, j, k;
12220
12221         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
12222
12223         if (WARN_ON_ONCE(vcpu->arch.apf.gfns[i] != gfn))
12224                 return;
12225
12226         while (true) {
12227                 vcpu->arch.apf.gfns[i] = ~0;
12228                 do {
12229                         j = kvm_async_pf_next_probe(j);
12230                         if (vcpu->arch.apf.gfns[j] == ~0)
12231                                 return;
12232                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
12233                         /*
12234                          * k lies cyclically in ]i,j]
12235                          * |    i.k.j |
12236                          * |....j i.k.| or  |.k..j i...|
12237                          */
12238                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
12239                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
12240                 i = j;
12241         }
12242 }
12243
12244 static inline int apf_put_user_notpresent(struct kvm_vcpu *vcpu)
12245 {
12246         u32 reason = KVM_PV_REASON_PAGE_NOT_PRESENT;
12247
12248         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &reason,
12249                                       sizeof(reason));
12250 }
12251
12252 static inline int apf_put_user_ready(struct kvm_vcpu *vcpu, u32 token)
12253 {
12254         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
12255
12256         return kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
12257                                              &token, offset, sizeof(token));
12258 }
12259
12260 static inline bool apf_pageready_slot_free(struct kvm_vcpu *vcpu)
12261 {
12262         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
12263         u32 val;
12264
12265         if (kvm_read_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
12266                                          &val, offset, sizeof(val)))
12267                 return false;
12268
12269         return !val;
12270 }
12271
12272 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
12273 {
12274         if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
12275                 return false;
12276
12277         if (!kvm_pv_async_pf_enabled(vcpu) ||
12278             (vcpu->arch.apf.send_user_only && static_call(kvm_x86_get_cpl)(vcpu) == 0))
12279                 return false;
12280
12281         return true;
12282 }
12283
12284 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
12285 {
12286         if (unlikely(!lapic_in_kernel(vcpu) ||
12287                      kvm_event_needs_reinjection(vcpu) ||
12288                      vcpu->arch.exception.pending))
12289                 return false;
12290
12291         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
12292                 return false;
12293
12294         /*
12295          * If interrupts are off we cannot even use an artificial
12296          * halt state.
12297          */
12298         return kvm_arch_interrupt_allowed(vcpu);
12299 }
12300
12301 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
12302                                      struct kvm_async_pf *work)
12303 {
12304         struct x86_exception fault;
12305
12306         trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
12307         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
12308
12309         if (kvm_can_deliver_async_pf(vcpu) &&
12310             !apf_put_user_notpresent(vcpu)) {
12311                 fault.vector = PF_VECTOR;
12312                 fault.error_code_valid = true;
12313                 fault.error_code = 0;
12314                 fault.nested_page_fault = false;
12315                 fault.address = work->arch.token;
12316                 fault.async_page_fault = true;
12317                 kvm_inject_page_fault(vcpu, &fault);
12318                 return true;
12319         } else {
12320                 /*
12321                  * It is not possible to deliver a paravirtualized asynchronous
12322                  * page fault, but putting the guest in an artificial halt state
12323                  * can be beneficial nevertheless: if an interrupt arrives, we
12324                  * can deliver it timely and perhaps the guest will schedule
12325                  * another process.  When the instruction that triggered a page
12326                  * fault is retried, hopefully the page will be ready in the host.
12327                  */
12328                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
12329                 return false;
12330         }
12331 }
12332
12333 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
12334                                  struct kvm_async_pf *work)
12335 {
12336         struct kvm_lapic_irq irq = {
12337                 .delivery_mode = APIC_DM_FIXED,
12338                 .vector = vcpu->arch.apf.vec
12339         };
12340
12341         if (work->wakeup_all)
12342                 work->arch.token = ~0; /* broadcast wakeup */
12343         else
12344                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
12345         trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
12346
12347         if ((work->wakeup_all || work->notpresent_injected) &&
12348             kvm_pv_async_pf_enabled(vcpu) &&
12349             !apf_put_user_ready(vcpu, work->arch.token)) {
12350                 vcpu->arch.apf.pageready_pending = true;
12351                 kvm_apic_set_irq(vcpu, &irq, NULL);
12352         }
12353
12354         vcpu->arch.apf.halted = false;
12355         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
12356 }
12357
12358 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu)
12359 {
12360         kvm_make_request(KVM_REQ_APF_READY, vcpu);
12361         if (!vcpu->arch.apf.pageready_pending)
12362                 kvm_vcpu_kick(vcpu);
12363 }
12364
12365 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu)
12366 {
12367         if (!kvm_pv_async_pf_enabled(vcpu))
12368                 return true;
12369         else
12370                 return kvm_lapic_enabled(vcpu) && apf_pageready_slot_free(vcpu);
12371 }
12372
12373 void kvm_arch_start_assignment(struct kvm *kvm)
12374 {
12375         if (atomic_inc_return(&kvm->arch.assigned_device_count) == 1)
12376                 static_call_cond(kvm_x86_start_assignment)(kvm);
12377 }
12378 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
12379
12380 void kvm_arch_end_assignment(struct kvm *kvm)
12381 {
12382         atomic_dec(&kvm->arch.assigned_device_count);
12383 }
12384 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
12385
12386 bool kvm_arch_has_assigned_device(struct kvm *kvm)
12387 {
12388         return atomic_read(&kvm->arch.assigned_device_count);
12389 }
12390 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
12391
12392 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
12393 {
12394         atomic_inc(&kvm->arch.noncoherent_dma_count);
12395 }
12396 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
12397
12398 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
12399 {
12400         atomic_dec(&kvm->arch.noncoherent_dma_count);
12401 }
12402 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
12403
12404 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
12405 {
12406         return atomic_read(&kvm->arch.noncoherent_dma_count);
12407 }
12408 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
12409
12410 bool kvm_arch_has_irq_bypass(void)
12411 {
12412         return true;
12413 }
12414
12415 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
12416                                       struct irq_bypass_producer *prod)
12417 {
12418         struct kvm_kernel_irqfd *irqfd =
12419                 container_of(cons, struct kvm_kernel_irqfd, consumer);
12420         int ret;
12421
12422         irqfd->producer = prod;
12423         kvm_arch_start_assignment(irqfd->kvm);
12424         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm,
12425                                          prod->irq, irqfd->gsi, 1);
12426
12427         if (ret)
12428                 kvm_arch_end_assignment(irqfd->kvm);
12429
12430         return ret;
12431 }
12432
12433 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
12434                                       struct irq_bypass_producer *prod)
12435 {
12436         int ret;
12437         struct kvm_kernel_irqfd *irqfd =
12438                 container_of(cons, struct kvm_kernel_irqfd, consumer);
12439
12440         WARN_ON(irqfd->producer != prod);
12441         irqfd->producer = NULL;
12442
12443         /*
12444          * When producer of consumer is unregistered, we change back to
12445          * remapped mode, so we can re-use the current implementation
12446          * when the irq is masked/disabled or the consumer side (KVM
12447          * int this case doesn't want to receive the interrupts.
12448         */
12449         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm, prod->irq, irqfd->gsi, 0);
12450         if (ret)
12451                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
12452                        " fails: %d\n", irqfd->consumer.token, ret);
12453
12454         kvm_arch_end_assignment(irqfd->kvm);
12455 }
12456
12457 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
12458                                    uint32_t guest_irq, bool set)
12459 {
12460         return static_call(kvm_x86_update_pi_irte)(kvm, host_irq, guest_irq, set);
12461 }
12462
12463 bool kvm_arch_irqfd_route_changed(struct kvm_kernel_irq_routing_entry *old,
12464                                   struct kvm_kernel_irq_routing_entry *new)
12465 {
12466         if (new->type != KVM_IRQ_ROUTING_MSI)
12467                 return true;
12468
12469         return !!memcmp(&old->msi, &new->msi, sizeof(new->msi));
12470 }
12471
12472 bool kvm_vector_hashing_enabled(void)
12473 {
12474         return vector_hashing;
12475 }
12476
12477 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
12478 {
12479         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
12480 }
12481 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
12482
12483
12484 int kvm_spec_ctrl_test_value(u64 value)
12485 {
12486         /*
12487          * test that setting IA32_SPEC_CTRL to given value
12488          * is allowed by the host processor
12489          */
12490
12491         u64 saved_value;
12492         unsigned long flags;
12493         int ret = 0;
12494
12495         local_irq_save(flags);
12496
12497         if (rdmsrl_safe(MSR_IA32_SPEC_CTRL, &saved_value))
12498                 ret = 1;
12499         else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value))
12500                 ret = 1;
12501         else
12502                 wrmsrl(MSR_IA32_SPEC_CTRL, saved_value);
12503
12504         local_irq_restore(flags);
12505
12506         return ret;
12507 }
12508 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value);
12509
12510 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code)
12511 {
12512         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
12513         struct x86_exception fault;
12514         u32 access = error_code &
12515                 (PFERR_WRITE_MASK | PFERR_FETCH_MASK | PFERR_USER_MASK);
12516
12517         if (!(error_code & PFERR_PRESENT_MASK) ||
12518             mmu->gva_to_gpa(vcpu, mmu, gva, access, &fault) != UNMAPPED_GVA) {
12519                 /*
12520                  * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
12521                  * tables probably do not match the TLB.  Just proceed
12522                  * with the error code that the processor gave.
12523                  */
12524                 fault.vector = PF_VECTOR;
12525                 fault.error_code_valid = true;
12526                 fault.error_code = error_code;
12527                 fault.nested_page_fault = false;
12528                 fault.address = gva;
12529         }
12530         vcpu->arch.walk_mmu->inject_page_fault(vcpu, &fault);
12531 }
12532 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error);
12533
12534 /*
12535  * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
12536  * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
12537  * indicates whether exit to userspace is needed.
12538  */
12539 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
12540                               struct x86_exception *e)
12541 {
12542         if (r == X86EMUL_PROPAGATE_FAULT) {
12543                 kvm_inject_emulated_page_fault(vcpu, e);
12544                 return 1;
12545         }
12546
12547         /*
12548          * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
12549          * while handling a VMX instruction KVM could've handled the request
12550          * correctly by exiting to userspace and performing I/O but there
12551          * doesn't seem to be a real use-case behind such requests, just return
12552          * KVM_EXIT_INTERNAL_ERROR for now.
12553          */
12554         kvm_prepare_emulation_failure_exit(vcpu);
12555
12556         return 0;
12557 }
12558 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure);
12559
12560 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva)
12561 {
12562         bool pcid_enabled;
12563         struct x86_exception e;
12564         struct {
12565                 u64 pcid;
12566                 u64 gla;
12567         } operand;
12568         int r;
12569
12570         r = kvm_read_guest_virt(vcpu, gva, &operand, sizeof(operand), &e);
12571         if (r != X86EMUL_CONTINUE)
12572                 return kvm_handle_memory_failure(vcpu, r, &e);
12573
12574         if (operand.pcid >> 12 != 0) {
12575                 kvm_inject_gp(vcpu, 0);
12576                 return 1;
12577         }
12578
12579         pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
12580
12581         switch (type) {
12582         case INVPCID_TYPE_INDIV_ADDR:
12583                 if ((!pcid_enabled && (operand.pcid != 0)) ||
12584                     is_noncanonical_address(operand.gla, vcpu)) {
12585                         kvm_inject_gp(vcpu, 0);
12586                         return 1;
12587                 }
12588                 kvm_mmu_invpcid_gva(vcpu, operand.gla, operand.pcid);
12589                 return kvm_skip_emulated_instruction(vcpu);
12590
12591         case INVPCID_TYPE_SINGLE_CTXT:
12592                 if (!pcid_enabled && (operand.pcid != 0)) {
12593                         kvm_inject_gp(vcpu, 0);
12594                         return 1;
12595                 }
12596
12597                 kvm_invalidate_pcid(vcpu, operand.pcid);
12598                 return kvm_skip_emulated_instruction(vcpu);
12599
12600         case INVPCID_TYPE_ALL_NON_GLOBAL:
12601                 /*
12602                  * Currently, KVM doesn't mark global entries in the shadow
12603                  * page tables, so a non-global flush just degenerates to a
12604                  * global flush. If needed, we could optimize this later by
12605                  * keeping track of global entries in shadow page tables.
12606                  */
12607
12608                 fallthrough;
12609         case INVPCID_TYPE_ALL_INCL_GLOBAL:
12610                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
12611                 return kvm_skip_emulated_instruction(vcpu);
12612
12613         default:
12614                 kvm_inject_gp(vcpu, 0);
12615                 return 1;
12616         }
12617 }
12618 EXPORT_SYMBOL_GPL(kvm_handle_invpcid);
12619
12620 static int complete_sev_es_emulated_mmio(struct kvm_vcpu *vcpu)
12621 {
12622         struct kvm_run *run = vcpu->run;
12623         struct kvm_mmio_fragment *frag;
12624         unsigned int len;
12625
12626         BUG_ON(!vcpu->mmio_needed);
12627
12628         /* Complete previous fragment */
12629         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
12630         len = min(8u, frag->len);
12631         if (!vcpu->mmio_is_write)
12632                 memcpy(frag->data, run->mmio.data, len);
12633
12634         if (frag->len <= 8) {
12635                 /* Switch to the next fragment. */
12636                 frag++;
12637                 vcpu->mmio_cur_fragment++;
12638         } else {
12639                 /* Go forward to the next mmio piece. */
12640                 frag->data += len;
12641                 frag->gpa += len;
12642                 frag->len -= len;
12643         }
12644
12645         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
12646                 vcpu->mmio_needed = 0;
12647
12648                 // VMG change, at this point, we're always done
12649                 // RIP has already been advanced
12650                 return 1;
12651         }
12652
12653         // More MMIO is needed
12654         run->mmio.phys_addr = frag->gpa;
12655         run->mmio.len = min(8u, frag->len);
12656         run->mmio.is_write = vcpu->mmio_is_write;
12657         if (run->mmio.is_write)
12658                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
12659         run->exit_reason = KVM_EXIT_MMIO;
12660
12661         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12662
12663         return 0;
12664 }
12665
12666 int kvm_sev_es_mmio_write(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12667                           void *data)
12668 {
12669         int handled;
12670         struct kvm_mmio_fragment *frag;
12671
12672         if (!data)
12673                 return -EINVAL;
12674
12675         handled = write_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12676         if (handled == bytes)
12677                 return 1;
12678
12679         bytes -= handled;
12680         gpa += handled;
12681         data += handled;
12682
12683         /*TODO: Check if need to increment number of frags */
12684         frag = vcpu->mmio_fragments;
12685         vcpu->mmio_nr_fragments = 1;
12686         frag->len = bytes;
12687         frag->gpa = gpa;
12688         frag->data = data;
12689
12690         vcpu->mmio_needed = 1;
12691         vcpu->mmio_cur_fragment = 0;
12692
12693         vcpu->run->mmio.phys_addr = gpa;
12694         vcpu->run->mmio.len = min(8u, frag->len);
12695         vcpu->run->mmio.is_write = 1;
12696         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
12697         vcpu->run->exit_reason = KVM_EXIT_MMIO;
12698
12699         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12700
12701         return 0;
12702 }
12703 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write);
12704
12705 int kvm_sev_es_mmio_read(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12706                          void *data)
12707 {
12708         int handled;
12709         struct kvm_mmio_fragment *frag;
12710
12711         if (!data)
12712                 return -EINVAL;
12713
12714         handled = read_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12715         if (handled == bytes)
12716                 return 1;
12717
12718         bytes -= handled;
12719         gpa += handled;
12720         data += handled;
12721
12722         /*TODO: Check if need to increment number of frags */
12723         frag = vcpu->mmio_fragments;
12724         vcpu->mmio_nr_fragments = 1;
12725         frag->len = bytes;
12726         frag->gpa = gpa;
12727         frag->data = data;
12728
12729         vcpu->mmio_needed = 1;
12730         vcpu->mmio_cur_fragment = 0;
12731
12732         vcpu->run->mmio.phys_addr = gpa;
12733         vcpu->run->mmio.len = min(8u, frag->len);
12734         vcpu->run->mmio.is_write = 0;
12735         vcpu->run->exit_reason = KVM_EXIT_MMIO;
12736
12737         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12738
12739         return 0;
12740 }
12741 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read);
12742
12743 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
12744                            unsigned int port);
12745
12746 static int complete_sev_es_emulated_outs(struct kvm_vcpu *vcpu)
12747 {
12748         int size = vcpu->arch.pio.size;
12749         int port = vcpu->arch.pio.port;
12750
12751         vcpu->arch.pio.count = 0;
12752         if (vcpu->arch.sev_pio_count)
12753                 return kvm_sev_es_outs(vcpu, size, port);
12754         return 1;
12755 }
12756
12757 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
12758                            unsigned int port)
12759 {
12760         for (;;) {
12761                 unsigned int count =
12762                         min_t(unsigned int, PAGE_SIZE / size, vcpu->arch.sev_pio_count);
12763                 int ret = emulator_pio_out(vcpu, size, port, vcpu->arch.sev_pio_data, count);
12764
12765                 /* memcpy done already by emulator_pio_out.  */
12766                 vcpu->arch.sev_pio_count -= count;
12767                 vcpu->arch.sev_pio_data += count * vcpu->arch.pio.size;
12768                 if (!ret)
12769                         break;
12770
12771                 /* Emulation done by the kernel.  */
12772                 if (!vcpu->arch.sev_pio_count)
12773                         return 1;
12774         }
12775
12776         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_outs;
12777         return 0;
12778 }
12779
12780 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
12781                           unsigned int port);
12782
12783 static void advance_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
12784 {
12785         unsigned count = vcpu->arch.pio.count;
12786         complete_emulator_pio_in(vcpu, vcpu->arch.sev_pio_data);
12787         vcpu->arch.sev_pio_count -= count;
12788         vcpu->arch.sev_pio_data += count * vcpu->arch.pio.size;
12789 }
12790
12791 static int complete_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
12792 {
12793         int size = vcpu->arch.pio.size;
12794         int port = vcpu->arch.pio.port;
12795
12796         advance_sev_es_emulated_ins(vcpu);
12797         if (vcpu->arch.sev_pio_count)
12798                 return kvm_sev_es_ins(vcpu, size, port);
12799         return 1;
12800 }
12801
12802 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
12803                           unsigned int port)
12804 {
12805         for (;;) {
12806                 unsigned int count =
12807                         min_t(unsigned int, PAGE_SIZE / size, vcpu->arch.sev_pio_count);
12808                 if (!__emulator_pio_in(vcpu, size, port, count))
12809                         break;
12810
12811                 /* Emulation done by the kernel.  */
12812                 advance_sev_es_emulated_ins(vcpu);
12813                 if (!vcpu->arch.sev_pio_count)
12814                         return 1;
12815         }
12816
12817         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_ins;
12818         return 0;
12819 }
12820
12821 int kvm_sev_es_string_io(struct kvm_vcpu *vcpu, unsigned int size,
12822                          unsigned int port, void *data,  unsigned int count,
12823                          int in)
12824 {
12825         vcpu->arch.sev_pio_data = data;
12826         vcpu->arch.sev_pio_count = count;
12827         return in ? kvm_sev_es_ins(vcpu, size, port)
12828                   : kvm_sev_es_outs(vcpu, size, port);
12829 }
12830 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io);
12831
12832 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry);
12833 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
12834 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
12835 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
12836 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
12837 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
12838 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
12839 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
12840 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
12841 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
12842 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
12843 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
12844 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
12845 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
12846 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
12847 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
12848 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
12849 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
12850 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
12851 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
12852 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
12853 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log);
12854 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request);
12855 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_accept_irq);
12856 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter);
12857 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit);
12858 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter);
12859 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit);