arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *   Yaniv Kamay  <yaniv@qumranet.com>
  15  *   Amit Shah    <amit.shah@qumranet.com>
  16  *   Ben-Ami Yassour <benami@il.ibm.com>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "ioapic.h"
  22 #include "mmu.h"
  23 #include "i8254.h"
  24 #include "tss.h"
  25 #include "kvm_cache_regs.h"
  26 #include "kvm_emulate.h"
  27 #include "x86.h"
  28 #include "cpuid.h"
  29 #include "pmu.h"
  30 #include "hyperv.h"
  31 #include "lapic.h"
  32 #include "xen.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/export.h>
  40 #include <linux/moduleparam.h>
  41 #include <linux/mman.h>
  42 #include <linux/highmem.h>
  43 #include <linux/iommu.h>
  44 #include <linux/intel-iommu.h>
  45 #include <linux/cpufreq.h>
  46 #include <linux/user-return-notifier.h>
  47 #include <linux/srcu.h>
  48 #include <linux/slab.h>
  49 #include <linux/perf_event.h>
  50 #include <linux/uaccess.h>
  51 #include <linux/hash.h>
  52 #include <linux/pci.h>
  53 #include <linux/timekeeper_internal.h>
  54 #include <linux/pvclock_gtod.h>
  55 #include <linux/kvm_irqfd.h>
  56 #include <linux/irqbypass.h>
  57 #include <linux/sched/stat.h>
  58 #include <linux/sched/isolation.h>
  59 #include <linux/mem_encrypt.h>
  60 #include <linux/entry-kvm.h>
  61 #include <linux/suspend.h>
  62
  63 #include <trace/events/kvm.h>
  64
  65 #include <asm/debugreg.h>
  66 #include <asm/msr.h>
  67 #include <asm/desc.h>
  68 #include <asm/mce.h>
  69 #include <asm/pkru.h>
  70 #include <linux/kernel_stat.h>
  71 #include <asm/fpu/internal.h> /* Ugh! */
  72 #include <asm/pvclock.h>
  73 #include <asm/div64.h>
  74 #include <asm/irq_remapping.h>
  75 #include <asm/mshyperv.h>
  76 #include <asm/hypervisor.h>
  77 #include <asm/tlbflush.h>
  78 #include <asm/intel_pt.h>
  79 #include <asm/emulate_prefix.h>
  80 #include <asm/sgx.h>
  81 #include <clocksource/hyperv_timer.h>
  82
  83 #define CREATE_TRACE_POINTS
  84 #include "trace.h"
  85
  86 #define MAX_IO_MSRS 256
  87 #define KVM_MAX_MCE_BANKS 32
  88 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  89 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  90
  91 #define emul_to_vcpu(ctxt) \
  92         ((struct kvm_vcpu *)(ctxt)->vcpu)
  93
  94 /* EFER defaults:
  95  * - enable syscall per default because its emulated by KVM
  96  * - enable LME and LMA per default on 64 bit KVM
  97  */
  98 #ifdef CONFIG_X86_64
  99 static
 100 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
 101 #else
 102 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
 103 #endif
 104
 105 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
 106
 107 #define KVM_EXIT_HYPERCALL_VALID_MASK (1 << KVM_HC_MAP_GPA_RANGE)
 108
 109 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
 110                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 111
 112 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 113 static void process_nmi(struct kvm_vcpu *vcpu);
 114 static void process_smi(struct kvm_vcpu *vcpu);
 115 static void enter_smm(struct kvm_vcpu *vcpu);
 116 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 117 static void store_regs(struct kvm_vcpu *vcpu);
 118 static int sync_regs(struct kvm_vcpu *vcpu);
 119
 120 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
 121 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
 122
 123 struct kvm_x86_ops kvm_x86_ops __read_mostly;
 124 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 125
 126 #define KVM_X86_OP(func)                                             \
 127         DEFINE_STATIC_CALL_NULL(kvm_x86_##func,                      \
 128                                 *(((struct kvm_x86_ops *)0)->func));
 129 #define KVM_X86_OP_NULL KVM_X86_OP
 130 #include <asm/kvm-x86-ops.h>
 131 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits);
 132 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg);
 133 EXPORT_STATIC_CALL_GPL(kvm_x86_tlb_flush_current);
 134
 135 static bool __read_mostly ignore_msrs = 0;
 136 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 137
 138 bool __read_mostly report_ignored_msrs = true;
 139 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 140 EXPORT_SYMBOL_GPL(report_ignored_msrs);
 141
 142 unsigned int min_timer_period_us = 200;
 143 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 144
 145 static bool __read_mostly kvmclock_periodic_sync = true;
 146 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 147
 148 bool __read_mostly kvm_has_tsc_control;
 149 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 150 u32  __read_mostly kvm_max_guest_tsc_khz;
 151 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 152 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 153 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 154 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 155 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 156 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 157 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 158 bool __read_mostly kvm_has_bus_lock_exit;
 159 EXPORT_SYMBOL_GPL(kvm_has_bus_lock_exit);
 160
 161 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 162 static u32 __read_mostly tsc_tolerance_ppm = 250;
 163 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 164
 165 /*
 166  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 167  * adaptive tuning starting from default advancement of 1000ns.  '0' disables
 168  * advancement entirely.  Any other value is used as-is and disables adaptive
 169  * tuning, i.e. allows privileged userspace to set an exact advancement time.
 170  */
 171 static int __read_mostly lapic_timer_advance_ns = -1;
 172 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 173
 174 static bool __read_mostly vector_hashing = true;
 175 module_param(vector_hashing, bool, S_IRUGO);
 176
 177 bool __read_mostly enable_vmware_backdoor = false;
 178 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 179 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 180
 181 static bool __read_mostly force_emulation_prefix = false;
 182 module_param(force_emulation_prefix, bool, S_IRUGO);
 183
 184 int __read_mostly pi_inject_timer = -1;
 185 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
 186
 187 /*
 188  * Restoring the host value for MSRs that are only consumed when running in
 189  * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
 190  * returns to userspace, i.e. the kernel can run with the guest's value.
 191  */
 192 #define KVM_MAX_NR_USER_RETURN_MSRS 16
 193
 194 struct kvm_user_return_msrs {
 195         struct user_return_notifier urn;
 196         bool registered;
 197         struct kvm_user_return_msr_values {
 198                 u64 host;
 199                 u64 curr;
 200         } values[KVM_MAX_NR_USER_RETURN_MSRS];
 201 };
 202
 203 u32 __read_mostly kvm_nr_uret_msrs;
 204 EXPORT_SYMBOL_GPL(kvm_nr_uret_msrs);
 205 static u32 __read_mostly kvm_uret_msrs_list[KVM_MAX_NR_USER_RETURN_MSRS];
 206 static struct kvm_user_return_msrs __percpu *user_return_msrs;
 207
 208 #define KVM_SUPPORTED_XCR0     (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
 209                                 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
 210                                 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
 211                                 | XFEATURE_MASK_PKRU)
 212
 213 u64 __read_mostly host_efer;
 214 EXPORT_SYMBOL_GPL(host_efer);
 215
 216 bool __read_mostly allow_smaller_maxphyaddr = 0;
 217 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr);
 218
 219 bool __read_mostly enable_apicv = true;
 220 EXPORT_SYMBOL_GPL(enable_apicv);
 221
 222 u64 __read_mostly host_xss;
 223 EXPORT_SYMBOL_GPL(host_xss);
 224 u64 __read_mostly supported_xss;
 225 EXPORT_SYMBOL_GPL(supported_xss);
 226
 227 const struct _kvm_stats_desc kvm_vm_stats_desc[] = {
 228         KVM_GENERIC_VM_STATS(),
 229         STATS_DESC_COUNTER(VM, mmu_shadow_zapped),
 230         STATS_DESC_COUNTER(VM, mmu_pte_write),
 231         STATS_DESC_COUNTER(VM, mmu_pde_zapped),
 232         STATS_DESC_COUNTER(VM, mmu_flooded),
 233         STATS_DESC_COUNTER(VM, mmu_recycled),
 234         STATS_DESC_COUNTER(VM, mmu_cache_miss),
 235         STATS_DESC_ICOUNTER(VM, mmu_unsync),
 236         STATS_DESC_ICOUNTER(VM, pages_4k),
 237         STATS_DESC_ICOUNTER(VM, pages_2m),
 238         STATS_DESC_ICOUNTER(VM, pages_1g),
 239         STATS_DESC_ICOUNTER(VM, nx_lpage_splits),
 240         STATS_DESC_PCOUNTER(VM, max_mmu_rmap_size),
 241         STATS_DESC_PCOUNTER(VM, max_mmu_page_hash_collisions)
 242 };
 243
 244 const struct kvm_stats_header kvm_vm_stats_header = {
 245         .name_size = KVM_STATS_NAME_SIZE,
 246         .num_desc = ARRAY_SIZE(kvm_vm_stats_desc),
 247         .id_offset = sizeof(struct kvm_stats_header),
 248         .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
 249         .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
 250                        sizeof(kvm_vm_stats_desc),
 251 };
 252
 253 const struct _kvm_stats_desc kvm_vcpu_stats_desc[] = {
 254         KVM_GENERIC_VCPU_STATS(),
 255         STATS_DESC_COUNTER(VCPU, pf_fixed),
 256         STATS_DESC_COUNTER(VCPU, pf_guest),
 257         STATS_DESC_COUNTER(VCPU, tlb_flush),
 258         STATS_DESC_COUNTER(VCPU, invlpg),
 259         STATS_DESC_COUNTER(VCPU, exits),
 260         STATS_DESC_COUNTER(VCPU, io_exits),
 261         STATS_DESC_COUNTER(VCPU, mmio_exits),
 262         STATS_DESC_COUNTER(VCPU, signal_exits),
 263         STATS_DESC_COUNTER(VCPU, irq_window_exits),
 264         STATS_DESC_COUNTER(VCPU, nmi_window_exits),
 265         STATS_DESC_COUNTER(VCPU, l1d_flush),
 266         STATS_DESC_COUNTER(VCPU, halt_exits),
 267         STATS_DESC_COUNTER(VCPU, request_irq_exits),
 268         STATS_DESC_COUNTER(VCPU, irq_exits),
 269         STATS_DESC_COUNTER(VCPU, host_state_reload),
 270         STATS_DESC_COUNTER(VCPU, fpu_reload),
 271         STATS_DESC_COUNTER(VCPU, insn_emulation),
 272         STATS_DESC_COUNTER(VCPU, insn_emulation_fail),
 273         STATS_DESC_COUNTER(VCPU, hypercalls),
 274         STATS_DESC_COUNTER(VCPU, irq_injections),
 275         STATS_DESC_COUNTER(VCPU, nmi_injections),
 276         STATS_DESC_COUNTER(VCPU, req_event),
 277         STATS_DESC_COUNTER(VCPU, nested_run),
 278         STATS_DESC_COUNTER(VCPU, directed_yield_attempted),
 279         STATS_DESC_COUNTER(VCPU, directed_yield_successful),
 280         STATS_DESC_ICOUNTER(VCPU, guest_mode)
 281 };
 282
 283 const struct kvm_stats_header kvm_vcpu_stats_header = {
 284         .name_size = KVM_STATS_NAME_SIZE,
 285         .num_desc = ARRAY_SIZE(kvm_vcpu_stats_desc),
 286         .id_offset = sizeof(struct kvm_stats_header),
 287         .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
 288         .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
 289                        sizeof(kvm_vcpu_stats_desc),
 290 };
 291
 292 u64 __read_mostly host_xcr0;
 293 u64 __read_mostly supported_xcr0;
 294 EXPORT_SYMBOL_GPL(supported_xcr0);
 295
 296 static struct kmem_cache *x86_fpu_cache;
 297
 298 static struct kmem_cache *x86_emulator_cache;
 299
 300 /*
 301  * When called, it means the previous get/set msr reached an invalid msr.
 302  * Return true if we want to ignore/silent this failed msr access.
 303  */
 304 static bool kvm_msr_ignored_check(u32 msr, u64 data, bool write)
 305 {
 306         const char *op = write ? "wrmsr" : "rdmsr";
 307
 308         if (ignore_msrs) {
 309                 if (report_ignored_msrs)
 310                         kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
 311                                       op, msr, data);
 312                 /* Mask the error */
 313                 return true;
 314         } else {
 315                 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
 316                                       op, msr, data);
 317                 return false;
 318         }
 319 }
 320
 321 static struct kmem_cache *kvm_alloc_emulator_cache(void)
 322 {
 323         unsigned int useroffset = offsetof(struct x86_emulate_ctxt, src);
 324         unsigned int size = sizeof(struct x86_emulate_ctxt);
 325
 326         return kmem_cache_create_usercopy("x86_emulator", size,
 327                                           __alignof__(struct x86_emulate_ctxt),
 328                                           SLAB_ACCOUNT, useroffset,
 329                                           size - useroffset, NULL);
 330 }
 331
 332 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 333
 334 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 335 {
 336         int i;
 337         for (i = 0; i < ASYNC_PF_PER_VCPU; i++)
 338                 vcpu->arch.apf.gfns[i] = ~0;
 339 }
 340
 341 static void kvm_on_user_return(struct user_return_notifier *urn)
 342 {
 343         unsigned slot;
 344         struct kvm_user_return_msrs *msrs
 345                 = container_of(urn, struct kvm_user_return_msrs, urn);
 346         struct kvm_user_return_msr_values *values;
 347         unsigned long flags;
 348
 349         /*
 350          * Disabling irqs at this point since the following code could be
 351          * interrupted and executed through kvm_arch_hardware_disable()
 352          */
 353         local_irq_save(flags);
 354         if (msrs->registered) {
 355                 msrs->registered = false;
 356                 user_return_notifier_unregister(urn);
 357         }
 358         local_irq_restore(flags);
 359         for (slot = 0; slot < kvm_nr_uret_msrs; ++slot) {
 360                 values = &msrs->values[slot];
 361                 if (values->host != values->curr) {
 362                         wrmsrl(kvm_uret_msrs_list[slot], values->host);
 363                         values->curr = values->host;
 364                 }
 365         }
 366 }
 367
 368 static int kvm_probe_user_return_msr(u32 msr)
 369 {
 370         u64 val;
 371         int ret;
 372
 373         preempt_disable();
 374         ret = rdmsrl_safe(msr, &val);
 375         if (ret)
 376                 goto out;
 377         ret = wrmsrl_safe(msr, val);
 378 out:
 379         preempt_enable();
 380         return ret;
 381 }
 382
 383 int kvm_add_user_return_msr(u32 msr)
 384 {
 385         BUG_ON(kvm_nr_uret_msrs >= KVM_MAX_NR_USER_RETURN_MSRS);
 386
 387         if (kvm_probe_user_return_msr(msr))
 388                 return -1;
 389
 390         kvm_uret_msrs_list[kvm_nr_uret_msrs] = msr;
 391         return kvm_nr_uret_msrs++;
 392 }
 393 EXPORT_SYMBOL_GPL(kvm_add_user_return_msr);
 394
 395 int kvm_find_user_return_msr(u32 msr)
 396 {
 397         int i;
 398
 399         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 400                 if (kvm_uret_msrs_list[i] == msr)
 401                         return i;
 402         }
 403         return -1;
 404 }
 405 EXPORT_SYMBOL_GPL(kvm_find_user_return_msr);
 406
 407 static void kvm_user_return_msr_cpu_online(void)
 408 {
 409         unsigned int cpu = smp_processor_id();
 410         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 411         u64 value;
 412         int i;
 413
 414         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 415                 rdmsrl_safe(kvm_uret_msrs_list[i], &value);
 416                 msrs->values[i].host = value;
 417                 msrs->values[i].curr = value;
 418         }
 419 }
 420
 421 int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)
 422 {
 423         unsigned int cpu = smp_processor_id();
 424         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 425         int err;
 426
 427         value = (value & mask) | (msrs->values[slot].host & ~mask);
 428         if (value == msrs->values[slot].curr)
 429                 return 0;
 430         err = wrmsrl_safe(kvm_uret_msrs_list[slot], value);
 431         if (err)
 432                 return 1;
 433
 434         msrs->values[slot].curr = value;
 435         if (!msrs->registered) {
 436                 msrs->urn.on_user_return = kvm_on_user_return;
 437                 user_return_notifier_register(&msrs->urn);
 438                 msrs->registered = true;
 439         }
 440         return 0;
 441 }
 442 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr);
 443
 444 static void drop_user_return_notifiers(void)
 445 {
 446         unsigned int cpu = smp_processor_id();
 447         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 448
 449         if (msrs->registered)
 450                 kvm_on_user_return(&msrs->urn);
 451 }
 452
 453 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 454 {
 455         return vcpu->arch.apic_base;
 456 }
 457 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 458
 459 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 460 {
 461         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 462 }
 463 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 464
 465 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 466 {
 467         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 468         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 469         u64 reserved_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu) | 0x2ff |
 470                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 471
 472         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 473                 return 1;
 474         if (!msr_info->host_initiated) {
 475                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 476                         return 1;
 477                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 478                         return 1;
 479         }
 480
 481         kvm_lapic_set_base(vcpu, msr_info->data);
 482         kvm_recalculate_apic_map(vcpu->kvm);
 483         return 0;
 484 }
 485 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 486
 487 /*
 488  * Handle a fault on a hardware virtualization (VMX or SVM) instruction.
 489  *
 490  * Hardware virtualization extension instructions may fault if a reboot turns
 491  * off virtualization while processes are running.  Usually after catching the
 492  * fault we just panic; during reboot instead the instruction is ignored.
 493  */
 494 noinstr void kvm_spurious_fault(void)
 495 {
 496         /* Fault while not rebooting.  We want the trace. */
 497         BUG_ON(!kvm_rebooting);
 498 }
 499 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 500
 501 #define EXCPT_BENIGN            0
 502 #define EXCPT_CONTRIBUTORY      1
 503 #define EXCPT_PF                2
 504
 505 static int exception_class(int vector)
 506 {
 507         switch (vector) {
 508         case PF_VECTOR:
 509                 return EXCPT_PF;
 510         case DE_VECTOR:
 511         case TS_VECTOR:
 512         case NP_VECTOR:
 513         case SS_VECTOR:
 514         case GP_VECTOR:
 515                 return EXCPT_CONTRIBUTORY;
 516         default:
 517                 break;
 518         }
 519         return EXCPT_BENIGN;
 520 }
 521
 522 #define EXCPT_FAULT             0
 523 #define EXCPT_TRAP              1
 524 #define EXCPT_ABORT             2
 525 #define EXCPT_INTERRUPT         3
 526
 527 static int exception_type(int vector)
 528 {
 529         unsigned int mask;
 530
 531         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 532                 return EXCPT_INTERRUPT;
 533
 534         mask = 1 << vector;
 535
 536         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 537         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 538                 return EXCPT_TRAP;
 539
 540         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 541                 return EXCPT_ABORT;
 542
 543         /* Reserved exceptions will result in fault */
 544         return EXCPT_FAULT;
 545 }
 546
 547 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 548 {
 549         unsigned nr = vcpu->arch.exception.nr;
 550         bool has_payload = vcpu->arch.exception.has_payload;
 551         unsigned long payload = vcpu->arch.exception.payload;
 552
 553         if (!has_payload)
 554                 return;
 555
 556         switch (nr) {
 557         case DB_VECTOR:
 558                 /*
 559                  * "Certain debug exceptions may clear bit 0-3.  The
 560                  * remaining contents of the DR6 register are never
 561                  * cleared by the processor".
 562                  */
 563                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 564                 /*
 565                  * In order to reflect the #DB exception payload in guest
 566                  * dr6, three components need to be considered: active low
 567                  * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
 568                  * DR6_BS and DR6_BT)
 569                  * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
 570                  * In the target guest dr6:
 571                  * FIXED_1 bits should always be set.
 572                  * Active low bits should be cleared if 1-setting in payload.
 573                  * Active high bits should be set if 1-setting in payload.
 574                  *
 575                  * Note, the payload is compatible with the pending debug
 576                  * exceptions/exit qualification under VMX, that active_low bits
 577                  * are active high in payload.
 578                  * So they need to be flipped for DR6.
 579                  */
 580                 vcpu->arch.dr6 |= DR6_ACTIVE_LOW;
 581                 vcpu->arch.dr6 |= payload;
 582                 vcpu->arch.dr6 ^= payload & DR6_ACTIVE_LOW;
 583
 584                 /*
 585                  * The #DB payload is defined as compatible with the 'pending
 586                  * debug exceptions' field under VMX, not DR6. While bit 12 is
 587                  * defined in the 'pending debug exceptions' field (enabled
 588                  * breakpoint), it is reserved and must be zero in DR6.
 589                  */
 590                 vcpu->arch.dr6 &= ~BIT(12);
 591                 break;
 592         case PF_VECTOR:
 593                 vcpu->arch.cr2 = payload;
 594                 break;
 595         }
 596
 597         vcpu->arch.exception.has_payload = false;
 598         vcpu->arch.exception.payload = 0;
 599 }
 600 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 601
 602 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 603                 unsigned nr, bool has_error, u32 error_code,
 604                 bool has_payload, unsigned long payload, bool reinject)
 605 {
 606         u32 prev_nr;
 607         int class1, class2;
 608
 609         kvm_make_request(KVM_REQ_EVENT, vcpu);
 610
 611         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 612         queue:
 613                 if (reinject) {
 614                         /*
 615                          * On vmentry, vcpu->arch.exception.pending is only
 616                          * true if an event injection was blocked by
 617                          * nested_run_pending.  In that case, however,
 618                          * vcpu_enter_guest requests an immediate exit,
 619                          * and the guest shouldn't proceed far enough to
 620                          * need reinjection.
 621                          */
 622                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 623                         vcpu->arch.exception.injected = true;
 624                         if (WARN_ON_ONCE(has_payload)) {
 625                                 /*
 626                                  * A reinjected event has already
 627                                  * delivered its payload.
 628                                  */
 629                                 has_payload = false;
 630                                 payload = 0;
 631                         }
 632                 } else {
 633                         vcpu->arch.exception.pending = true;
 634                         vcpu->arch.exception.injected = false;
 635                 }
 636                 vcpu->arch.exception.has_error_code = has_error;
 637                 vcpu->arch.exception.nr = nr;
 638                 vcpu->arch.exception.error_code = error_code;
 639                 vcpu->arch.exception.has_payload = has_payload;
 640                 vcpu->arch.exception.payload = payload;
 641                 if (!is_guest_mode(vcpu))
 642                         kvm_deliver_exception_payload(vcpu);
 643                 return;
 644         }
 645
 646         /* to check exception */
 647         prev_nr = vcpu->arch.exception.nr;
 648         if (prev_nr == DF_VECTOR) {
 649                 /* triple fault -> shutdown */
 650                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 651                 return;
 652         }
 653         class1 = exception_class(prev_nr);
 654         class2 = exception_class(nr);
 655         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 656                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 657                 /*
 658                  * Generate double fault per SDM Table 5-5.  Set
 659                  * exception.pending = true so that the double fault
 660                  * can trigger a nested vmexit.
 661                  */
 662                 vcpu->arch.exception.pending = true;
 663                 vcpu->arch.exception.injected = false;
 664                 vcpu->arch.exception.has_error_code = true;
 665                 vcpu->arch.exception.nr = DF_VECTOR;
 666                 vcpu->arch.exception.error_code = 0;
 667                 vcpu->arch.exception.has_payload = false;
 668                 vcpu->arch.exception.payload = 0;
 669         } else
 670                 /* replace previous exception with a new one in a hope
 671                    that instruction re-execution will regenerate lost
 672                    exception */
 673                 goto queue;
 674 }
 675
 676 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 677 {
 678         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 679 }
 680 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 681
 682 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 683 {
 684         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 685 }
 686 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 687
 688 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 689                            unsigned long payload)
 690 {
 691         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 692 }
 693 EXPORT_SYMBOL_GPL(kvm_queue_exception_p);
 694
 695 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 696                                     u32 error_code, unsigned long payload)
 697 {
 698         kvm_multiple_exception(vcpu, nr, true, error_code,
 699                                true, payload, false);
 700 }
 701
 702 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 703 {
 704         if (err)
 705                 kvm_inject_gp(vcpu, 0);
 706         else
 707                 return kvm_skip_emulated_instruction(vcpu);
 708
 709         return 1;
 710 }
 711 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 712
 713 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 714 {
 715         ++vcpu->stat.pf_guest;
 716         vcpu->arch.exception.nested_apf =
 717                 is_guest_mode(vcpu) && fault->async_page_fault;
 718         if (vcpu->arch.exception.nested_apf) {
 719                 vcpu->arch.apf.nested_apf_token = fault->address;
 720                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 721         } else {
 722                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 723                                         fault->address);
 724         }
 725 }
 726 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 727
 728 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
 729                                     struct x86_exception *fault)
 730 {
 731         struct kvm_mmu *fault_mmu;
 732         WARN_ON_ONCE(fault->vector != PF_VECTOR);
 733
 734         fault_mmu = fault->nested_page_fault ? vcpu->arch.mmu :
 735                                                vcpu->arch.walk_mmu;
 736
 737         /*
 738          * Invalidate the TLB entry for the faulting address, if it exists,
 739          * else the access will fault indefinitely (and to emulate hardware).
 740          */
 741         if ((fault->error_code & PFERR_PRESENT_MASK) &&
 742             !(fault->error_code & PFERR_RSVD_MASK))
 743                 kvm_mmu_invalidate_gva(vcpu, fault_mmu, fault->address,
 744                                        fault_mmu->root_hpa);
 745
 746         fault_mmu->inject_page_fault(vcpu, fault);
 747         return fault->nested_page_fault;
 748 }
 749 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault);
 750
 751 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 752 {
 753         atomic_inc(&vcpu->arch.nmi_queued);
 754         kvm_make_request(KVM_REQ_NMI, vcpu);
 755 }
 756 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 757
 758 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 759 {
 760         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 761 }
 762 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 763
 764 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 765 {
 766         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 767 }
 768 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 769
 770 /*
 771  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 772  * a #GP and return false.
 773  */
 774 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 775 {
 776         if (static_call(kvm_x86_get_cpl)(vcpu) <= required_cpl)
 777                 return true;
 778         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 779         return false;
 780 }
 781 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 782
 783 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 784 {
 785         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 786                 return true;
 787
 788         kvm_queue_exception(vcpu, UD_VECTOR);
 789         return false;
 790 }
 791 EXPORT_SYMBOL_GPL(kvm_require_dr);
 792
 793 /*
 794  * This function will be used to read from the physical memory of the currently
 795  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 796  * can read from guest physical or from the guest's guest physical memory.
 797  */
 798 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 799                             gfn_t ngfn, void *data, int offset, int len,
 800                             u32 access)
 801 {
 802         struct x86_exception exception;
 803         gfn_t real_gfn;
 804         gpa_t ngpa;
 805
 806         ngpa     = gfn_to_gpa(ngfn);
 807         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 808         if (real_gfn == UNMAPPED_GVA)
 809                 return -EFAULT;
 810
 811         real_gfn = gpa_to_gfn(real_gfn);
 812
 813         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 814 }
 815 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 816
 817 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
 818 {
 819         return vcpu->arch.reserved_gpa_bits | rsvd_bits(5, 8) | rsvd_bits(1, 2);
 820 }
 821
 822 /*
 823  * Load the pae pdptrs.  Return 1 if they are all valid, 0 otherwise.
 824  */
 825 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 826 {
 827         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 828         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 829         int i;
 830         int ret;
 831         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 832
 833         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 834                                       offset * sizeof(u64), sizeof(pdpte),
 835                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 836         if (ret < 0) {
 837                 ret = 0;
 838                 goto out;
 839         }
 840         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 841                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 842                     (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
 843                         ret = 0;
 844                         goto out;
 845                 }
 846         }
 847         ret = 1;
 848
 849         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 850         kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
 851         vcpu->arch.pdptrs_from_userspace = false;
 852
 853 out:
 854
 855         return ret;
 856 }
 857 EXPORT_SYMBOL_GPL(load_pdptrs);
 858
 859 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0)
 860 {
 861         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 862                 kvm_clear_async_pf_completion_queue(vcpu);
 863                 kvm_async_pf_hash_reset(vcpu);
 864         }
 865
 866         if ((cr0 ^ old_cr0) & KVM_MMU_CR0_ROLE_BITS)
 867                 kvm_mmu_reset_context(vcpu);
 868
 869         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 870             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 871             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 872                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 873 }
 874 EXPORT_SYMBOL_GPL(kvm_post_set_cr0);
 875
 876 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 877 {
 878         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 879         unsigned long pdptr_bits = X86_CR0_CD | X86_CR0_NW | X86_CR0_PG;
 880
 881         cr0 |= X86_CR0_ET;
 882
 883 #ifdef CONFIG_X86_64
 884         if (cr0 & 0xffffffff00000000UL)
 885                 return 1;
 886 #endif
 887
 888         cr0 &= ~CR0_RESERVED_BITS;
 889
 890         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 891                 return 1;
 892
 893         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 894                 return 1;
 895
 896 #ifdef CONFIG_X86_64
 897         if ((vcpu->arch.efer & EFER_LME) && !is_paging(vcpu) &&
 898             (cr0 & X86_CR0_PG)) {
 899                 int cs_db, cs_l;
 900
 901                 if (!is_pae(vcpu))
 902                         return 1;
 903                 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
 904                 if (cs_l)
 905                         return 1;
 906         }
 907 #endif
 908         if (!(vcpu->arch.efer & EFER_LME) && (cr0 & X86_CR0_PG) &&
 909             is_pae(vcpu) && ((cr0 ^ old_cr0) & pdptr_bits) &&
 910             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu)))
 911                 return 1;
 912
 913         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 914                 return 1;
 915
 916         static_call(kvm_x86_set_cr0)(vcpu, cr0);
 917
 918         kvm_post_set_cr0(vcpu, old_cr0, cr0);
 919
 920         return 0;
 921 }
 922 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 923
 924 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 925 {
 926         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 927 }
 928 EXPORT_SYMBOL_GPL(kvm_lmsw);
 929
 930 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
 931 {
 932         if (vcpu->arch.guest_state_protected)
 933                 return;
 934
 935         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 936
 937                 if (vcpu->arch.xcr0 != host_xcr0)
 938                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 939
 940                 if (vcpu->arch.xsaves_enabled &&
 941                     vcpu->arch.ia32_xss != host_xss)
 942                         wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
 943         }
 944
 945         if (static_cpu_has(X86_FEATURE_PKU) &&
 946             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 947              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU)) &&
 948             vcpu->arch.pkru != vcpu->arch.host_pkru)
 949                 write_pkru(vcpu->arch.pkru);
 950 }
 951 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
 952
 953 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
 954 {
 955         if (vcpu->arch.guest_state_protected)
 956                 return;
 957
 958         if (static_cpu_has(X86_FEATURE_PKU) &&
 959             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 960              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU))) {
 961                 vcpu->arch.pkru = rdpkru();
 962                 if (vcpu->arch.pkru != vcpu->arch.host_pkru)
 963                         write_pkru(vcpu->arch.host_pkru);
 964         }
 965
 966         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 967
 968                 if (vcpu->arch.xcr0 != host_xcr0)
 969                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 970
 971                 if (vcpu->arch.xsaves_enabled &&
 972                     vcpu->arch.ia32_xss != host_xss)
 973                         wrmsrl(MSR_IA32_XSS, host_xss);
 974         }
 975
 976 }
 977 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
 978
 979 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 980 {
 981         u64 xcr0 = xcr;
 982         u64 old_xcr0 = vcpu->arch.xcr0;
 983         u64 valid_bits;
 984
 985         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 986         if (index != XCR_XFEATURE_ENABLED_MASK)
 987                 return 1;
 988         if (!(xcr0 & XFEATURE_MASK_FP))
 989                 return 1;
 990         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 991                 return 1;
 992
 993         /*
 994          * Do not allow the guest to set bits that we do not support
 995          * saving.  However, xcr0 bit 0 is always set, even if the
 996          * emulated CPU does not support XSAVE (see fx_init).
 997          */
 998         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 999         if (xcr0 & ~valid_bits)
1000                 return 1;
1001
1002         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
1003             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
1004                 return 1;
1005
1006         if (xcr0 & XFEATURE_MASK_AVX512) {
1007                 if (!(xcr0 & XFEATURE_MASK_YMM))
1008                         return 1;
1009                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
1010                         return 1;
1011         }
1012         vcpu->arch.xcr0 = xcr0;
1013
1014         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
1015                 kvm_update_cpuid_runtime(vcpu);
1016         return 0;
1017 }
1018
1019 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu)
1020 {
1021         if (static_call(kvm_x86_get_cpl)(vcpu) != 0 ||
1022             __kvm_set_xcr(vcpu, kvm_rcx_read(vcpu), kvm_read_edx_eax(vcpu))) {
1023                 kvm_inject_gp(vcpu, 0);
1024                 return 1;
1025         }
1026
1027         return kvm_skip_emulated_instruction(vcpu);
1028 }
1029 EXPORT_SYMBOL_GPL(kvm_emulate_xsetbv);
1030
1031 bool kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1032 {
1033         if (cr4 & cr4_reserved_bits)
1034                 return false;
1035
1036         if (cr4 & vcpu->arch.cr4_guest_rsvd_bits)
1037                 return false;
1038
1039         return static_call(kvm_x86_is_valid_cr4)(vcpu, cr4);
1040 }
1041 EXPORT_SYMBOL_GPL(kvm_is_valid_cr4);
1042
1043 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4)
1044 {
1045         if (((cr4 ^ old_cr4) & KVM_MMU_CR4_ROLE_BITS) ||
1046             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
1047                 kvm_mmu_reset_context(vcpu);
1048 }
1049 EXPORT_SYMBOL_GPL(kvm_post_set_cr4);
1050
1051 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1052 {
1053         unsigned long old_cr4 = kvm_read_cr4(vcpu);
1054         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
1055                                    X86_CR4_SMEP;
1056
1057         if (!kvm_is_valid_cr4(vcpu, cr4))
1058                 return 1;
1059
1060         if (is_long_mode(vcpu)) {
1061                 if (!(cr4 & X86_CR4_PAE))
1062                         return 1;
1063                 if ((cr4 ^ old_cr4) & X86_CR4_LA57)
1064                         return 1;
1065         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
1066                    && ((cr4 ^ old_cr4) & pdptr_bits)
1067                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
1068                                    kvm_read_cr3(vcpu)))
1069                 return 1;
1070
1071         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
1072                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
1073                         return 1;
1074
1075                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1076                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
1077                         return 1;
1078         }
1079
1080         static_call(kvm_x86_set_cr4)(vcpu, cr4);
1081
1082         kvm_post_set_cr4(vcpu, old_cr4, cr4);
1083
1084         return 0;
1085 }
1086 EXPORT_SYMBOL_GPL(kvm_set_cr4);
1087
1088 static void kvm_invalidate_pcid(struct kvm_vcpu *vcpu, unsigned long pcid)
1089 {
1090         struct kvm_mmu *mmu = vcpu->arch.mmu;
1091         unsigned long roots_to_free = 0;
1092         int i;
1093
1094         /*
1095          * If neither the current CR3 nor any of the prev_roots use the given
1096          * PCID, then nothing needs to be done here because a resync will
1097          * happen anyway before switching to any other CR3.
1098          */
1099         if (kvm_get_active_pcid(vcpu) == pcid) {
1100                 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
1101                 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1102         }
1103
1104         for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
1105                 if (kvm_get_pcid(vcpu, mmu->prev_roots[i].pgd) == pcid)
1106                         roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
1107
1108         kvm_mmu_free_roots(vcpu, mmu, roots_to_free);
1109 }
1110
1111 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1112 {
1113         bool skip_tlb_flush = false;
1114         unsigned long pcid = 0;
1115 #ifdef CONFIG_X86_64
1116         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
1117
1118         if (pcid_enabled) {
1119                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
1120                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
1121                 pcid = cr3 & X86_CR3_PCID_MASK;
1122         }
1123 #endif
1124
1125         /* PDPTRs are always reloaded for PAE paging. */
1126         if (cr3 == kvm_read_cr3(vcpu) && !is_pae_paging(vcpu))
1127                 goto handle_tlb_flush;
1128
1129         /*
1130          * Do not condition the GPA check on long mode, this helper is used to
1131          * stuff CR3, e.g. for RSM emulation, and there is no guarantee that
1132          * the current vCPU mode is accurate.
1133          */
1134         if (kvm_vcpu_is_illegal_gpa(vcpu, cr3))
1135                 return 1;
1136
1137         if (is_pae_paging(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
1138                 return 1;
1139
1140         if (cr3 != kvm_read_cr3(vcpu))
1141                 kvm_mmu_new_pgd(vcpu, cr3);
1142
1143         vcpu->arch.cr3 = cr3;
1144         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
1145
1146 handle_tlb_flush:
1147         /*
1148          * A load of CR3 that flushes the TLB flushes only the current PCID,
1149          * even if PCID is disabled, in which case PCID=0 is flushed.  It's a
1150          * moot point in the end because _disabling_ PCID will flush all PCIDs,
1151          * and it's impossible to use a non-zero PCID when PCID is disabled,
1152          * i.e. only PCID=0 can be relevant.
1153          */
1154         if (!skip_tlb_flush)
1155                 kvm_invalidate_pcid(vcpu, pcid);
1156
1157         return 0;
1158 }
1159 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1160
1161 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1162 {
1163         if (cr8 & CR8_RESERVED_BITS)
1164                 return 1;
1165         if (lapic_in_kernel(vcpu))
1166                 kvm_lapic_set_tpr(vcpu, cr8);
1167         else
1168                 vcpu->arch.cr8 = cr8;
1169         return 0;
1170 }
1171 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1172
1173 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1174 {
1175         if (lapic_in_kernel(vcpu))
1176                 return kvm_lapic_get_cr8(vcpu);
1177         else
1178                 return vcpu->arch.cr8;
1179 }
1180 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1181
1182 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1183 {
1184         int i;
1185
1186         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1187                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1188                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1189         }
1190 }
1191
1192 void kvm_update_dr7(struct kvm_vcpu *vcpu)
1193 {
1194         unsigned long dr7;
1195
1196         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1197                 dr7 = vcpu->arch.guest_debug_dr7;
1198         else
1199                 dr7 = vcpu->arch.dr7;
1200         static_call(kvm_x86_set_dr7)(vcpu, dr7);
1201         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1202         if (dr7 & DR7_BP_EN_MASK)
1203                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1204 }
1205 EXPORT_SYMBOL_GPL(kvm_update_dr7);
1206
1207 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1208 {
1209         u64 fixed = DR6_FIXED_1;
1210
1211         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1212                 fixed |= DR6_RTM;
1213
1214         if (!guest_cpuid_has(vcpu, X86_FEATURE_BUS_LOCK_DETECT))
1215                 fixed |= DR6_BUS_LOCK;
1216         return fixed;
1217 }
1218
1219 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1220 {
1221         size_t size = ARRAY_SIZE(vcpu->arch.db);
1222
1223         switch (dr) {
1224         case 0 ... 3:
1225                 vcpu->arch.db[array_index_nospec(dr, size)] = val;
1226                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1227                         vcpu->arch.eff_db[dr] = val;
1228                 break;
1229         case 4:
1230         case 6:
1231                 if (!kvm_dr6_valid(val))
1232                         return 1; /* #GP */
1233                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1234                 break;
1235         case 5:
1236         default: /* 7 */
1237                 if (!kvm_dr7_valid(val))
1238                         return 1; /* #GP */
1239                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1240                 kvm_update_dr7(vcpu);
1241                 break;
1242         }
1243
1244         return 0;
1245 }
1246 EXPORT_SYMBOL_GPL(kvm_set_dr);
1247
1248 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1249 {
1250         size_t size = ARRAY_SIZE(vcpu->arch.db);
1251
1252         switch (dr) {
1253         case 0 ... 3:
1254                 *val = vcpu->arch.db[array_index_nospec(dr, size)];
1255                 break;
1256         case 4:
1257         case 6:
1258                 *val = vcpu->arch.dr6;
1259                 break;
1260         case 5:
1261         default: /* 7 */
1262                 *val = vcpu->arch.dr7;
1263                 break;
1264         }
1265 }
1266 EXPORT_SYMBOL_GPL(kvm_get_dr);
1267
1268 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu)
1269 {
1270         u32 ecx = kvm_rcx_read(vcpu);
1271         u64 data;
1272
1273         if (kvm_pmu_rdpmc(vcpu, ecx, &data)) {
1274                 kvm_inject_gp(vcpu, 0);
1275                 return 1;
1276         }
1277
1278         kvm_rax_write(vcpu, (u32)data);
1279         kvm_rdx_write(vcpu, data >> 32);
1280         return kvm_skip_emulated_instruction(vcpu);
1281 }
1282 EXPORT_SYMBOL_GPL(kvm_emulate_rdpmc);
1283
1284 /*
1285  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1286  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1287  *
1288  * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1289  * extract the supported MSRs from the related const lists.
1290  * msrs_to_save is selected from the msrs_to_save_all to reflect the
1291  * capabilities of the host cpu. This capabilities test skips MSRs that are
1292  * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1293  * may depend on host virtualization features rather than host cpu features.
1294  */
1295
1296 static const u32 msrs_to_save_all[] = {
1297         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1298         MSR_STAR,
1299 #ifdef CONFIG_X86_64
1300         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1301 #endif
1302         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1303         MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1304         MSR_IA32_SPEC_CTRL,
1305         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1306         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1307         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1308         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1309         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1310         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1311         MSR_IA32_UMWAIT_CONTROL,
1312
1313         MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1314         MSR_ARCH_PERFMON_FIXED_CTR0 + 2, MSR_ARCH_PERFMON_FIXED_CTR0 + 3,
1315         MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1316         MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1317         MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1318         MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1319         MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1320         MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1321         MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1322         MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1323         MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1324         MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1325         MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1326         MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1327         MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1328         MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1329         MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1330         MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1331         MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1332         MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1333         MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1334         MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1335
1336         MSR_K7_EVNTSEL0, MSR_K7_EVNTSEL1, MSR_K7_EVNTSEL2, MSR_K7_EVNTSEL3,
1337         MSR_K7_PERFCTR0, MSR_K7_PERFCTR1, MSR_K7_PERFCTR2, MSR_K7_PERFCTR3,
1338         MSR_F15H_PERF_CTL0, MSR_F15H_PERF_CTL1, MSR_F15H_PERF_CTL2,
1339         MSR_F15H_PERF_CTL3, MSR_F15H_PERF_CTL4, MSR_F15H_PERF_CTL5,
1340         MSR_F15H_PERF_CTR0, MSR_F15H_PERF_CTR1, MSR_F15H_PERF_CTR2,
1341         MSR_F15H_PERF_CTR3, MSR_F15H_PERF_CTR4, MSR_F15H_PERF_CTR5,
1342 };
1343
1344 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
1345 static unsigned num_msrs_to_save;
1346
1347 static const u32 emulated_msrs_all[] = {
1348         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1349         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1350         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1351         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1352         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1353         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1354         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1355         HV_X64_MSR_RESET,
1356         HV_X64_MSR_VP_INDEX,
1357         HV_X64_MSR_VP_RUNTIME,
1358         HV_X64_MSR_SCONTROL,
1359         HV_X64_MSR_STIMER0_CONFIG,
1360         HV_X64_MSR_VP_ASSIST_PAGE,
1361         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1362         HV_X64_MSR_TSC_EMULATION_STATUS,
1363         HV_X64_MSR_SYNDBG_OPTIONS,
1364         HV_X64_MSR_SYNDBG_CONTROL, HV_X64_MSR_SYNDBG_STATUS,
1365         HV_X64_MSR_SYNDBG_SEND_BUFFER, HV_X64_MSR_SYNDBG_RECV_BUFFER,
1366         HV_X64_MSR_SYNDBG_PENDING_BUFFER,
1367
1368         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1369         MSR_KVM_PV_EOI_EN, MSR_KVM_ASYNC_PF_INT, MSR_KVM_ASYNC_PF_ACK,
1370
1371         MSR_IA32_TSC_ADJUST,
1372         MSR_IA32_TSC_DEADLINE,
1373         MSR_IA32_ARCH_CAPABILITIES,
1374         MSR_IA32_PERF_CAPABILITIES,
1375         MSR_IA32_MISC_ENABLE,
1376         MSR_IA32_MCG_STATUS,
1377         MSR_IA32_MCG_CTL,
1378         MSR_IA32_MCG_EXT_CTL,
1379         MSR_IA32_SMBASE,
1380         MSR_SMI_COUNT,
1381         MSR_PLATFORM_INFO,
1382         MSR_MISC_FEATURES_ENABLES,
1383         MSR_AMD64_VIRT_SPEC_CTRL,
1384         MSR_IA32_POWER_CTL,
1385         MSR_IA32_UCODE_REV,
1386
1387         /*
1388          * The following list leaves out MSRs whose values are determined
1389          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1390          * We always support the "true" VMX control MSRs, even if the host
1391          * processor does not, so I am putting these registers here rather
1392          * than in msrs_to_save_all.
1393          */
1394         MSR_IA32_VMX_BASIC,
1395         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1396         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1397         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1398         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1399         MSR_IA32_VMX_MISC,
1400         MSR_IA32_VMX_CR0_FIXED0,
1401         MSR_IA32_VMX_CR4_FIXED0,
1402         MSR_IA32_VMX_VMCS_ENUM,
1403         MSR_IA32_VMX_PROCBASED_CTLS2,
1404         MSR_IA32_VMX_EPT_VPID_CAP,
1405         MSR_IA32_VMX_VMFUNC,
1406
1407         MSR_K7_HWCR,
1408         MSR_KVM_POLL_CONTROL,
1409 };
1410
1411 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1412 static unsigned num_emulated_msrs;
1413
1414 /*
1415  * List of msr numbers which are used to expose MSR-based features that
1416  * can be used by a hypervisor to validate requested CPU features.
1417  */
1418 static const u32 msr_based_features_all[] = {
1419         MSR_IA32_VMX_BASIC,
1420         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1421         MSR_IA32_VMX_PINBASED_CTLS,
1422         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1423         MSR_IA32_VMX_PROCBASED_CTLS,
1424         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1425         MSR_IA32_VMX_EXIT_CTLS,
1426         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1427         MSR_IA32_VMX_ENTRY_CTLS,
1428         MSR_IA32_VMX_MISC,
1429         MSR_IA32_VMX_CR0_FIXED0,
1430         MSR_IA32_VMX_CR0_FIXED1,
1431         MSR_IA32_VMX_CR4_FIXED0,
1432         MSR_IA32_VMX_CR4_FIXED1,
1433         MSR_IA32_VMX_VMCS_ENUM,
1434         MSR_IA32_VMX_PROCBASED_CTLS2,
1435         MSR_IA32_VMX_EPT_VPID_CAP,
1436         MSR_IA32_VMX_VMFUNC,
1437
1438         MSR_F10H_DECFG,
1439         MSR_IA32_UCODE_REV,
1440         MSR_IA32_ARCH_CAPABILITIES,
1441         MSR_IA32_PERF_CAPABILITIES,
1442 };
1443
1444 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
1445 static unsigned int num_msr_based_features;
1446
1447 static u64 kvm_get_arch_capabilities(void)
1448 {
1449         u64 data = 0;
1450
1451         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1452                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1453
1454         /*
1455          * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1456          * the nested hypervisor runs with NX huge pages.  If it is not,
1457          * L1 is anyway vulnerable to ITLB_MULTIHIT exploits from other
1458          * L1 guests, so it need not worry about its own (L2) guests.
1459          */
1460         data |= ARCH_CAP_PSCHANGE_MC_NO;
1461
1462         /*
1463          * If we're doing cache flushes (either "always" or "cond")
1464          * we will do one whenever the guest does a vmlaunch/vmresume.
1465          * If an outer hypervisor is doing the cache flush for us
1466          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1467          * capability to the guest too, and if EPT is disabled we're not
1468          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1469          * require a nested hypervisor to do a flush of its own.
1470          */
1471         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1472                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1473
1474         if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1475                 data |= ARCH_CAP_RDCL_NO;
1476         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1477                 data |= ARCH_CAP_SSB_NO;
1478         if (!boot_cpu_has_bug(X86_BUG_MDS))
1479                 data |= ARCH_CAP_MDS_NO;
1480
1481         if (!boot_cpu_has(X86_FEATURE_RTM)) {
1482                 /*
1483                  * If RTM=0 because the kernel has disabled TSX, the host might
1484                  * have TAA_NO or TSX_CTRL.  Clear TAA_NO (the guest sees RTM=0
1485                  * and therefore knows that there cannot be TAA) but keep
1486                  * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1487                  * and we want to allow migrating those guests to tsx=off hosts.
1488                  */
1489                 data &= ~ARCH_CAP_TAA_NO;
1490         } else if (!boot_cpu_has_bug(X86_BUG_TAA)) {
1491                 data |= ARCH_CAP_TAA_NO;
1492         } else {
1493                 /*
1494                  * Nothing to do here; we emulate TSX_CTRL if present on the
1495                  * host so the guest can choose between disabling TSX or
1496                  * using VERW to clear CPU buffers.
1497                  */
1498         }
1499
1500         return data;
1501 }
1502
1503 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1504 {
1505         switch (msr->index) {
1506         case MSR_IA32_ARCH_CAPABILITIES:
1507                 msr->data = kvm_get_arch_capabilities();
1508                 break;
1509         case MSR_IA32_UCODE_REV:
1510                 rdmsrl_safe(msr->index, &msr->data);
1511                 break;
1512         default:
1513                 return static_call(kvm_x86_get_msr_feature)(msr);
1514         }
1515         return 0;
1516 }
1517
1518 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1519 {
1520         struct kvm_msr_entry msr;
1521         int r;
1522
1523         msr.index = index;
1524         r = kvm_get_msr_feature(&msr);
1525
1526         if (r == KVM_MSR_RET_INVALID) {
1527                 /* Unconditionally clear the output for simplicity */
1528                 *data = 0;
1529                 if (kvm_msr_ignored_check(index, 0, false))
1530                         r = 0;
1531         }
1532
1533         if (r)
1534                 return r;
1535
1536         *data = msr.data;
1537
1538         return 0;
1539 }
1540
1541 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1542 {
1543         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1544                 return false;
1545
1546         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1547                 return false;
1548
1549         if (efer & (EFER_LME | EFER_LMA) &&
1550             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1551                 return false;
1552
1553         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1554                 return false;
1555
1556         return true;
1557
1558 }
1559 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1560 {
1561         if (efer & efer_reserved_bits)
1562                 return false;
1563
1564         return __kvm_valid_efer(vcpu, efer);
1565 }
1566 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1567
1568 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1569 {
1570         u64 old_efer = vcpu->arch.efer;
1571         u64 efer = msr_info->data;
1572         int r;
1573
1574         if (efer & efer_reserved_bits)
1575                 return 1;
1576
1577         if (!msr_info->host_initiated) {
1578                 if (!__kvm_valid_efer(vcpu, efer))
1579                         return 1;
1580
1581                 if (is_paging(vcpu) &&
1582                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1583                         return 1;
1584         }
1585
1586         efer &= ~EFER_LMA;
1587         efer |= vcpu->arch.efer & EFER_LMA;
1588
1589         r = static_call(kvm_x86_set_efer)(vcpu, efer);
1590         if (r) {
1591                 WARN_ON(r > 0);
1592                 return r;
1593         }
1594
1595         /* Update reserved bits */
1596         if ((efer ^ old_efer) & EFER_NX)
1597                 kvm_mmu_reset_context(vcpu);
1598
1599         return 0;
1600 }
1601
1602 void kvm_enable_efer_bits(u64 mask)
1603 {
1604        efer_reserved_bits &= ~mask;
1605 }
1606 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1607
1608 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type)
1609 {
1610         struct kvm_x86_msr_filter *msr_filter;
1611         struct msr_bitmap_range *ranges;
1612         struct kvm *kvm = vcpu->kvm;
1613         bool allowed;
1614         int idx;
1615         u32 i;
1616
1617         /* x2APIC MSRs do not support filtering. */
1618         if (index >= 0x800 && index <= 0x8ff)
1619                 return true;
1620
1621         idx = srcu_read_lock(&kvm->srcu);
1622
1623         msr_filter = srcu_dereference(kvm->arch.msr_filter, &kvm->srcu);
1624         if (!msr_filter) {
1625                 allowed = true;
1626                 goto out;
1627         }
1628
1629         allowed = msr_filter->default_allow;
1630         ranges = msr_filter->ranges;
1631
1632         for (i = 0; i < msr_filter->count; i++) {
1633                 u32 start = ranges[i].base;
1634                 u32 end = start + ranges[i].nmsrs;
1635                 u32 flags = ranges[i].flags;
1636                 unsigned long *bitmap = ranges[i].bitmap;
1637
1638                 if ((index >= start) && (index < end) && (flags & type)) {
1639                         allowed = !!test_bit(index - start, bitmap);
1640                         break;
1641                 }
1642         }
1643
1644 out:
1645         srcu_read_unlock(&kvm->srcu, idx);
1646
1647         return allowed;
1648 }
1649 EXPORT_SYMBOL_GPL(kvm_msr_allowed);
1650
1651 /*
1652  * Write @data into the MSR specified by @index.  Select MSR specific fault
1653  * checks are bypassed if @host_initiated is %true.
1654  * Returns 0 on success, non-0 otherwise.
1655  * Assumes vcpu_load() was already called.
1656  */
1657 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1658                          bool host_initiated)
1659 {
1660         struct msr_data msr;
1661
1662         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_WRITE))
1663                 return KVM_MSR_RET_FILTERED;
1664
1665         switch (index) {
1666         case MSR_FS_BASE:
1667         case MSR_GS_BASE:
1668         case MSR_KERNEL_GS_BASE:
1669         case MSR_CSTAR:
1670         case MSR_LSTAR:
1671                 if (is_noncanonical_address(data, vcpu))
1672                         return 1;
1673                 break;
1674         case MSR_IA32_SYSENTER_EIP:
1675         case MSR_IA32_SYSENTER_ESP:
1676                 /*
1677                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1678                  * non-canonical address is written on Intel but not on
1679                  * AMD (which ignores the top 32-bits, because it does
1680                  * not implement 64-bit SYSENTER).
1681                  *
1682                  * 64-bit code should hence be able to write a non-canonical
1683                  * value on AMD.  Making the address canonical ensures that
1684                  * vmentry does not fail on Intel after writing a non-canonical
1685                  * value, and that something deterministic happens if the guest
1686                  * invokes 64-bit SYSENTER.
1687                  */
1688                 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1689                 break;
1690         case MSR_TSC_AUX:
1691                 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1692                         return 1;
1693
1694                 if (!host_initiated &&
1695                     !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1696                     !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1697                         return 1;
1698
1699                 /*
1700                  * Per Intel's SDM, bits 63:32 are reserved, but AMD's APM has
1701                  * incomplete and conflicting architectural behavior.  Current
1702                  * AMD CPUs completely ignore bits 63:32, i.e. they aren't
1703                  * reserved and always read as zeros.  Enforce Intel's reserved
1704                  * bits check if and only if the guest CPU is Intel, and clear
1705                  * the bits in all other cases.  This ensures cross-vendor
1706                  * migration will provide consistent behavior for the guest.
1707                  */
1708                 if (guest_cpuid_is_intel(vcpu) && (data >> 32) != 0)
1709                         return 1;
1710
1711                 data = (u32)data;
1712                 break;
1713         }
1714
1715         msr.data = data;
1716         msr.index = index;
1717         msr.host_initiated = host_initiated;
1718
1719         return static_call(kvm_x86_set_msr)(vcpu, &msr);
1720 }
1721
1722 static int kvm_set_msr_ignored_check(struct kvm_vcpu *vcpu,
1723                                      u32 index, u64 data, bool host_initiated)
1724 {
1725         int ret = __kvm_set_msr(vcpu, index, data, host_initiated);
1726
1727         if (ret == KVM_MSR_RET_INVALID)
1728                 if (kvm_msr_ignored_check(index, data, true))
1729                         ret = 0;
1730
1731         return ret;
1732 }
1733
1734 /*
1735  * Read the MSR specified by @index into @data.  Select MSR specific fault
1736  * checks are bypassed if @host_initiated is %true.
1737  * Returns 0 on success, non-0 otherwise.
1738  * Assumes vcpu_load() was already called.
1739  */
1740 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1741                   bool host_initiated)
1742 {
1743         struct msr_data msr;
1744         int ret;
1745
1746         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_READ))
1747                 return KVM_MSR_RET_FILTERED;
1748
1749         switch (index) {
1750         case MSR_TSC_AUX:
1751                 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1752                         return 1;
1753
1754                 if (!host_initiated &&
1755                     !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1756                     !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1757                         return 1;
1758                 break;
1759         }
1760
1761         msr.index = index;
1762         msr.host_initiated = host_initiated;
1763
1764         ret = static_call(kvm_x86_get_msr)(vcpu, &msr);
1765         if (!ret)
1766                 *data = msr.data;
1767         return ret;
1768 }
1769
1770 static int kvm_get_msr_ignored_check(struct kvm_vcpu *vcpu,
1771                                      u32 index, u64 *data, bool host_initiated)
1772 {
1773         int ret = __kvm_get_msr(vcpu, index, data, host_initiated);
1774
1775         if (ret == KVM_MSR_RET_INVALID) {
1776                 /* Unconditionally clear *data for simplicity */
1777                 *data = 0;
1778                 if (kvm_msr_ignored_check(index, 0, false))
1779                         ret = 0;
1780         }
1781
1782         return ret;
1783 }
1784
1785 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1786 {
1787         return kvm_get_msr_ignored_check(vcpu, index, data, false);
1788 }
1789 EXPORT_SYMBOL_GPL(kvm_get_msr);
1790
1791 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1792 {
1793         return kvm_set_msr_ignored_check(vcpu, index, data, false);
1794 }
1795 EXPORT_SYMBOL_GPL(kvm_set_msr);
1796
1797 static int complete_emulated_rdmsr(struct kvm_vcpu *vcpu)
1798 {
1799         int err = vcpu->run->msr.error;
1800         if (!err) {
1801                 kvm_rax_write(vcpu, (u32)vcpu->run->msr.data);
1802                 kvm_rdx_write(vcpu, vcpu->run->msr.data >> 32);
1803         }
1804
1805         return static_call(kvm_x86_complete_emulated_msr)(vcpu, err);
1806 }
1807
1808 static int complete_emulated_wrmsr(struct kvm_vcpu *vcpu)
1809 {
1810         return static_call(kvm_x86_complete_emulated_msr)(vcpu, vcpu->run->msr.error);
1811 }
1812
1813 static u64 kvm_msr_reason(int r)
1814 {
1815         switch (r) {
1816         case KVM_MSR_RET_INVALID:
1817                 return KVM_MSR_EXIT_REASON_UNKNOWN;
1818         case KVM_MSR_RET_FILTERED:
1819                 return KVM_MSR_EXIT_REASON_FILTER;
1820         default:
1821                 return KVM_MSR_EXIT_REASON_INVAL;
1822         }
1823 }
1824
1825 static int kvm_msr_user_space(struct kvm_vcpu *vcpu, u32 index,
1826                               u32 exit_reason, u64 data,
1827                               int (*completion)(struct kvm_vcpu *vcpu),
1828                               int r)
1829 {
1830         u64 msr_reason = kvm_msr_reason(r);
1831
1832         /* Check if the user wanted to know about this MSR fault */
1833         if (!(vcpu->kvm->arch.user_space_msr_mask & msr_reason))
1834                 return 0;
1835
1836         vcpu->run->exit_reason = exit_reason;
1837         vcpu->run->msr.error = 0;
1838         memset(vcpu->run->msr.pad, 0, sizeof(vcpu->run->msr.pad));
1839         vcpu->run->msr.reason = msr_reason;
1840         vcpu->run->msr.index = index;
1841         vcpu->run->msr.data = data;
1842         vcpu->arch.complete_userspace_io = completion;
1843
1844         return 1;
1845 }
1846
1847 static int kvm_get_msr_user_space(struct kvm_vcpu *vcpu, u32 index, int r)
1848 {
1849         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_RDMSR, 0,
1850                                    complete_emulated_rdmsr, r);
1851 }
1852
1853 static int kvm_set_msr_user_space(struct kvm_vcpu *vcpu, u32 index, u64 data, int r)
1854 {
1855         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_WRMSR, data,
1856                                    complete_emulated_wrmsr, r);
1857 }
1858
1859 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1860 {
1861         u32 ecx = kvm_rcx_read(vcpu);
1862         u64 data;
1863         int r;
1864
1865         r = kvm_get_msr(vcpu, ecx, &data);
1866
1867         /* MSR read failed? See if we should ask user space */
1868         if (r && kvm_get_msr_user_space(vcpu, ecx, r)) {
1869                 /* Bounce to user space */
1870                 return 0;
1871         }
1872
1873         if (!r) {
1874                 trace_kvm_msr_read(ecx, data);
1875
1876                 kvm_rax_write(vcpu, data & -1u);
1877                 kvm_rdx_write(vcpu, (data >> 32) & -1u);
1878         } else {
1879                 trace_kvm_msr_read_ex(ecx);
1880         }
1881
1882         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1883 }
1884 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1885
1886 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1887 {
1888         u32 ecx = kvm_rcx_read(vcpu);
1889         u64 data = kvm_read_edx_eax(vcpu);
1890         int r;
1891
1892         r = kvm_set_msr(vcpu, ecx, data);
1893
1894         /* MSR write failed? See if we should ask user space */
1895         if (r && kvm_set_msr_user_space(vcpu, ecx, data, r))
1896                 /* Bounce to user space */
1897                 return 0;
1898
1899         /* Signal all other negative errors to userspace */
1900         if (r < 0)
1901                 return r;
1902
1903         if (!r)
1904                 trace_kvm_msr_write(ecx, data);
1905         else
1906                 trace_kvm_msr_write_ex(ecx, data);
1907
1908         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1909 }
1910 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1911
1912 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu)
1913 {
1914         return kvm_skip_emulated_instruction(vcpu);
1915 }
1916 EXPORT_SYMBOL_GPL(kvm_emulate_as_nop);
1917
1918 int kvm_emulate_invd(struct kvm_vcpu *vcpu)
1919 {
1920         /* Treat an INVD instruction as a NOP and just skip it. */
1921         return kvm_emulate_as_nop(vcpu);
1922 }
1923 EXPORT_SYMBOL_GPL(kvm_emulate_invd);
1924
1925 int kvm_emulate_mwait(struct kvm_vcpu *vcpu)
1926 {
1927         pr_warn_once("kvm: MWAIT instruction emulated as NOP!\n");
1928         return kvm_emulate_as_nop(vcpu);
1929 }
1930 EXPORT_SYMBOL_GPL(kvm_emulate_mwait);
1931
1932 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu)
1933 {
1934         kvm_queue_exception(vcpu, UD_VECTOR);
1935         return 1;
1936 }
1937 EXPORT_SYMBOL_GPL(kvm_handle_invalid_op);
1938
1939 int kvm_emulate_monitor(struct kvm_vcpu *vcpu)
1940 {
1941         pr_warn_once("kvm: MONITOR instruction emulated as NOP!\n");
1942         return kvm_emulate_as_nop(vcpu);
1943 }
1944 EXPORT_SYMBOL_GPL(kvm_emulate_monitor);
1945
1946 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu)
1947 {
1948         xfer_to_guest_mode_prepare();
1949         return vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu) ||
1950                 xfer_to_guest_mode_work_pending();
1951 }
1952
1953 /*
1954  * The fast path for frequent and performance sensitive wrmsr emulation,
1955  * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
1956  * the latency of virtual IPI by avoiding the expensive bits of transitioning
1957  * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
1958  * other cases which must be called after interrupts are enabled on the host.
1959  */
1960 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
1961 {
1962         if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic))
1963                 return 1;
1964
1965         if (((data & APIC_SHORT_MASK) == APIC_DEST_NOSHORT) &&
1966                 ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
1967                 ((data & APIC_MODE_MASK) == APIC_DM_FIXED) &&
1968                 ((u32)(data >> 32) != X2APIC_BROADCAST)) {
1969
1970                 data &= ~(1 << 12);
1971                 kvm_apic_send_ipi(vcpu->arch.apic, (u32)data, (u32)(data >> 32));
1972                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR2, (u32)(data >> 32));
1973                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR, (u32)data);
1974                 trace_kvm_apic_write(APIC_ICR, (u32)data);
1975                 return 0;
1976         }
1977
1978         return 1;
1979 }
1980
1981 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
1982 {
1983         if (!kvm_can_use_hv_timer(vcpu))
1984                 return 1;
1985
1986         kvm_set_lapic_tscdeadline_msr(vcpu, data);
1987         return 0;
1988 }
1989
1990 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
1991 {
1992         u32 msr = kvm_rcx_read(vcpu);
1993         u64 data;
1994         fastpath_t ret = EXIT_FASTPATH_NONE;
1995
1996         switch (msr) {
1997         case APIC_BASE_MSR + (APIC_ICR >> 4):
1998                 data = kvm_read_edx_eax(vcpu);
1999                 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu, data)) {
2000                         kvm_skip_emulated_instruction(vcpu);
2001                         ret = EXIT_FASTPATH_EXIT_HANDLED;
2002                 }
2003                 break;
2004         case MSR_IA32_TSC_DEADLINE:
2005                 data = kvm_read_edx_eax(vcpu);
2006                 if (!handle_fastpath_set_tscdeadline(vcpu, data)) {
2007                         kvm_skip_emulated_instruction(vcpu);
2008                         ret = EXIT_FASTPATH_REENTER_GUEST;
2009                 }
2010                 break;
2011         default:
2012                 break;
2013         }
2014
2015         if (ret != EXIT_FASTPATH_NONE)
2016                 trace_kvm_msr_write(msr, data);
2017
2018         return ret;
2019 }
2020 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
2021
2022 /*
2023  * Adapt set_msr() to msr_io()'s calling convention
2024  */
2025 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2026 {
2027         return kvm_get_msr_ignored_check(vcpu, index, data, true);
2028 }
2029
2030 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2031 {
2032         return kvm_set_msr_ignored_check(vcpu, index, *data, true);
2033 }
2034
2035 #ifdef CONFIG_X86_64
2036 struct pvclock_clock {
2037         int vclock_mode;
2038         u64 cycle_last;
2039         u64 mask;
2040         u32 mult;
2041         u32 shift;
2042         u64 base_cycles;
2043         u64 offset;
2044 };
2045
2046 struct pvclock_gtod_data {
2047         seqcount_t      seq;
2048
2049         struct pvclock_clock clock; /* extract of a clocksource struct */
2050         struct pvclock_clock raw_clock; /* extract of a clocksource struct */
2051
2052         ktime_t         offs_boot;
2053         u64             wall_time_sec;
2054 };
2055
2056 static struct pvclock_gtod_data pvclock_gtod_data;
2057
2058 static void update_pvclock_gtod(struct timekeeper *tk)
2059 {
2060         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
2061
2062         write_seqcount_begin(&vdata->seq);
2063
2064         /* copy pvclock gtod data */
2065         vdata->clock.vclock_mode        = tk->tkr_mono.clock->vdso_clock_mode;
2066         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
2067         vdata->clock.mask               = tk->tkr_mono.mask;
2068         vdata->clock.mult               = tk->tkr_mono.mult;
2069         vdata->clock.shift              = tk->tkr_mono.shift;
2070         vdata->clock.base_cycles        = tk->tkr_mono.xtime_nsec;
2071         vdata->clock.offset             = tk->tkr_mono.base;
2072
2073         vdata->raw_clock.vclock_mode    = tk->tkr_raw.clock->vdso_clock_mode;
2074         vdata->raw_clock.cycle_last     = tk->tkr_raw.cycle_last;
2075         vdata->raw_clock.mask           = tk->tkr_raw.mask;
2076         vdata->raw_clock.mult           = tk->tkr_raw.mult;
2077         vdata->raw_clock.shift          = tk->tkr_raw.shift;
2078         vdata->raw_clock.base_cycles    = tk->tkr_raw.xtime_nsec;
2079         vdata->raw_clock.offset         = tk->tkr_raw.base;
2080
2081         vdata->wall_time_sec            = tk->xtime_sec;
2082
2083         vdata->offs_boot                = tk->offs_boot;
2084
2085         write_seqcount_end(&vdata->seq);
2086 }
2087
2088 static s64 get_kvmclock_base_ns(void)
2089 {
2090         /* Count up from boot time, but with the frequency of the raw clock.  */
2091         return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot));
2092 }
2093 #else
2094 static s64 get_kvmclock_base_ns(void)
2095 {
2096         /* Master clock not used, so we can just use CLOCK_BOOTTIME.  */
2097         return ktime_get_boottime_ns();
2098 }
2099 #endif
2100
2101 void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock, int sec_hi_ofs)
2102 {
2103         int version;
2104         int r;
2105         struct pvclock_wall_clock wc;
2106         u32 wc_sec_hi;
2107         u64 wall_nsec;
2108
2109         if (!wall_clock)
2110                 return;
2111
2112         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
2113         if (r)
2114                 return;
2115
2116         if (version & 1)
2117                 ++version;  /* first time write, random junk */
2118
2119         ++version;
2120
2121         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
2122                 return;
2123
2124         /*
2125          * The guest calculates current wall clock time by adding
2126          * system time (updated by kvm_guest_time_update below) to the
2127          * wall clock specified here.  We do the reverse here.
2128          */
2129         wall_nsec = ktime_get_real_ns() - get_kvmclock_ns(kvm);
2130
2131         wc.nsec = do_div(wall_nsec, 1000000000);
2132         wc.sec = (u32)wall_nsec; /* overflow in 2106 guest time */
2133         wc.version = version;
2134
2135         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
2136
2137         if (sec_hi_ofs) {
2138                 wc_sec_hi = wall_nsec >> 32;
2139                 kvm_write_guest(kvm, wall_clock + sec_hi_ofs,
2140                                 &wc_sec_hi, sizeof(wc_sec_hi));
2141         }
2142
2143         version++;
2144         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
2145 }
2146
2147 static void kvm_write_system_time(struct kvm_vcpu *vcpu, gpa_t system_time,
2148                                   bool old_msr, bool host_initiated)
2149 {
2150         struct kvm_arch *ka = &vcpu->kvm->arch;
2151
2152         if (vcpu->vcpu_id == 0 && !host_initiated) {
2153                 if (ka->boot_vcpu_runs_old_kvmclock != old_msr)
2154                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2155
2156                 ka->boot_vcpu_runs_old_kvmclock = old_msr;
2157         }
2158
2159         vcpu->arch.time = system_time;
2160         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2161
2162         /* we verify if the enable bit is set... */
2163         vcpu->arch.pv_time_enabled = false;
2164         if (!(system_time & 1))
2165                 return;
2166
2167         if (!kvm_gfn_to_hva_cache_init(vcpu->kvm,
2168                                        &vcpu->arch.pv_time, system_time & ~1ULL,
2169                                        sizeof(struct pvclock_vcpu_time_info)))
2170                 vcpu->arch.pv_time_enabled = true;
2171
2172         return;
2173 }
2174
2175 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
2176 {
2177         do_shl32_div32(dividend, divisor);
2178         return dividend;
2179 }
2180
2181 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
2182                                s8 *pshift, u32 *pmultiplier)
2183 {
2184         uint64_t scaled64;
2185         int32_t  shift = 0;
2186         uint64_t tps64;
2187         uint32_t tps32;
2188
2189         tps64 = base_hz;
2190         scaled64 = scaled_hz;
2191         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
2192                 tps64 >>= 1;
2193                 shift--;
2194         }
2195
2196         tps32 = (uint32_t)tps64;
2197         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
2198                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
2199                         scaled64 >>= 1;
2200                 else
2201                         tps32 <<= 1;
2202                 shift++;
2203         }
2204
2205         *pshift = shift;
2206         *pmultiplier = div_frac(scaled64, tps32);
2207 }
2208
2209 #ifdef CONFIG_X86_64
2210 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
2211 #endif
2212
2213 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
2214 static unsigned long max_tsc_khz;
2215
2216 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
2217 {
2218         u64 v = (u64)khz * (1000000 + ppm);
2219         do_div(v, 1000000);
2220         return v;
2221 }
2222
2223 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier);
2224
2225 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
2226 {
2227         u64 ratio;
2228
2229         /* Guest TSC same frequency as host TSC? */
2230         if (!scale) {
2231                 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2232                 return 0;
2233         }
2234
2235         /* TSC scaling supported? */
2236         if (!kvm_has_tsc_control) {
2237                 if (user_tsc_khz > tsc_khz) {
2238                         vcpu->arch.tsc_catchup = 1;
2239                         vcpu->arch.tsc_always_catchup = 1;
2240                         return 0;
2241                 } else {
2242                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2243                         return -1;
2244                 }
2245         }
2246
2247         /* TSC scaling required  - calculate ratio */
2248         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
2249                                 user_tsc_khz, tsc_khz);
2250
2251         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
2252                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2253                                     user_tsc_khz);
2254                 return -1;
2255         }
2256
2257         kvm_vcpu_write_tsc_multiplier(vcpu, ratio);
2258         return 0;
2259 }
2260
2261 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
2262 {
2263         u32 thresh_lo, thresh_hi;
2264         int use_scaling = 0;
2265
2266         /* tsc_khz can be zero if TSC calibration fails */
2267         if (user_tsc_khz == 0) {
2268                 /* set tsc_scaling_ratio to a safe value */
2269                 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2270                 return -1;
2271         }
2272
2273         /* Compute a scale to convert nanoseconds in TSC cycles */
2274         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
2275                            &vcpu->arch.virtual_tsc_shift,
2276                            &vcpu->arch.virtual_tsc_mult);
2277         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
2278
2279         /*
2280          * Compute the variation in TSC rate which is acceptable
2281          * within the range of tolerance and decide if the
2282          * rate being applied is within that bounds of the hardware
2283          * rate.  If so, no scaling or compensation need be done.
2284          */
2285         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
2286         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
2287         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
2288                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
2289                 use_scaling = 1;
2290         }
2291         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
2292 }
2293
2294 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
2295 {
2296         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
2297                                       vcpu->arch.virtual_tsc_mult,
2298                                       vcpu->arch.virtual_tsc_shift);
2299         tsc += vcpu->arch.this_tsc_write;
2300         return tsc;
2301 }
2302
2303 static inline int gtod_is_based_on_tsc(int mode)
2304 {
2305         return mode == VDSO_CLOCKMODE_TSC || mode == VDSO_CLOCKMODE_HVCLOCK;
2306 }
2307
2308 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
2309 {
2310 #ifdef CONFIG_X86_64
2311         bool vcpus_matched;
2312         struct kvm_arch *ka = &vcpu->kvm->arch;
2313         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2314
2315         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2316                          atomic_read(&vcpu->kvm->online_vcpus));
2317
2318         /*
2319          * Once the masterclock is enabled, always perform request in
2320          * order to update it.
2321          *
2322          * In order to enable masterclock, the host clocksource must be TSC
2323          * and the vcpus need to have matched TSCs.  When that happens,
2324          * perform request to enable masterclock.
2325          */
2326         if (ka->use_master_clock ||
2327             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
2328                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2329
2330         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
2331                             atomic_read(&vcpu->kvm->online_vcpus),
2332                             ka->use_master_clock, gtod->clock.vclock_mode);
2333 #endif
2334 }
2335
2336 /*
2337  * Multiply tsc by a fixed point number represented by ratio.
2338  *
2339  * The most significant 64-N bits (mult) of ratio represent the
2340  * integral part of the fixed point number; the remaining N bits
2341  * (frac) represent the fractional part, ie. ratio represents a fixed
2342  * point number (mult + frac * 2^(-N)).
2343  *
2344  * N equals to kvm_tsc_scaling_ratio_frac_bits.
2345  */
2346 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
2347 {
2348         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
2349 }
2350
2351 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc, u64 ratio)
2352 {
2353         u64 _tsc = tsc;
2354
2355         if (ratio != kvm_default_tsc_scaling_ratio)
2356                 _tsc = __scale_tsc(ratio, tsc);
2357
2358         return _tsc;
2359 }
2360 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
2361
2362 static u64 kvm_compute_l1_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
2363 {
2364         u64 tsc;
2365
2366         tsc = kvm_scale_tsc(vcpu, rdtsc(), vcpu->arch.l1_tsc_scaling_ratio);
2367
2368         return target_tsc - tsc;
2369 }
2370
2371 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
2372 {
2373         return vcpu->arch.l1_tsc_offset +
2374                 kvm_scale_tsc(vcpu, host_tsc, vcpu->arch.l1_tsc_scaling_ratio);
2375 }
2376 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
2377
2378 u64 kvm_calc_nested_tsc_offset(u64 l1_offset, u64 l2_offset, u64 l2_multiplier)
2379 {
2380         u64 nested_offset;
2381
2382         if (l2_multiplier == kvm_default_tsc_scaling_ratio)
2383                 nested_offset = l1_offset;
2384         else
2385                 nested_offset = mul_s64_u64_shr((s64) l1_offset, l2_multiplier,
2386                                                 kvm_tsc_scaling_ratio_frac_bits);
2387
2388         nested_offset += l2_offset;
2389         return nested_offset;
2390 }
2391 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_offset);
2392
2393 u64 kvm_calc_nested_tsc_multiplier(u64 l1_multiplier, u64 l2_multiplier)
2394 {
2395         if (l2_multiplier != kvm_default_tsc_scaling_ratio)
2396                 return mul_u64_u64_shr(l1_multiplier, l2_multiplier,
2397                                        kvm_tsc_scaling_ratio_frac_bits);
2398
2399         return l1_multiplier;
2400 }
2401 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_multiplier);
2402
2403 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 l1_offset)
2404 {
2405         trace_kvm_write_tsc_offset(vcpu->vcpu_id,
2406                                    vcpu->arch.l1_tsc_offset,
2407                                    l1_offset);
2408
2409         vcpu->arch.l1_tsc_offset = l1_offset;
2410
2411         /*
2412          * If we are here because L1 chose not to trap WRMSR to TSC then
2413          * according to the spec this should set L1's TSC (as opposed to
2414          * setting L1's offset for L2).
2415          */
2416         if (is_guest_mode(vcpu))
2417                 vcpu->arch.tsc_offset = kvm_calc_nested_tsc_offset(
2418                         l1_offset,
2419                         static_call(kvm_x86_get_l2_tsc_offset)(vcpu),
2420                         static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2421         else
2422                 vcpu->arch.tsc_offset = l1_offset;
2423
2424         static_call(kvm_x86_write_tsc_offset)(vcpu, vcpu->arch.tsc_offset);
2425 }
2426
2427 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier)
2428 {
2429         vcpu->arch.l1_tsc_scaling_ratio = l1_multiplier;
2430
2431         /* Userspace is changing the multiplier while L2 is active */
2432         if (is_guest_mode(vcpu))
2433                 vcpu->arch.tsc_scaling_ratio = kvm_calc_nested_tsc_multiplier(
2434                         l1_multiplier,
2435                         static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2436         else
2437                 vcpu->arch.tsc_scaling_ratio = l1_multiplier;
2438
2439         if (kvm_has_tsc_control)
2440                 static_call(kvm_x86_write_tsc_multiplier)(
2441                         vcpu, vcpu->arch.tsc_scaling_ratio);
2442 }
2443
2444 static inline bool kvm_check_tsc_unstable(void)
2445 {
2446 #ifdef CONFIG_X86_64
2447         /*
2448          * TSC is marked unstable when we're running on Hyper-V,
2449          * 'TSC page' clocksource is good.
2450          */
2451         if (pvclock_gtod_data.clock.vclock_mode == VDSO_CLOCKMODE_HVCLOCK)
2452                 return false;
2453 #endif
2454         return check_tsc_unstable();
2455 }
2456
2457 static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 data)
2458 {
2459         struct kvm *kvm = vcpu->kvm;
2460         u64 offset, ns, elapsed;
2461         unsigned long flags;
2462         bool matched;
2463         bool already_matched;
2464         bool synchronizing = false;
2465
2466         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
2467         offset = kvm_compute_l1_tsc_offset(vcpu, data);
2468         ns = get_kvmclock_base_ns();
2469         elapsed = ns - kvm->arch.last_tsc_nsec;
2470
2471         if (vcpu->arch.virtual_tsc_khz) {
2472                 if (data == 0) {
2473                         /*
2474                          * detection of vcpu initialization -- need to sync
2475                          * with other vCPUs. This particularly helps to keep
2476                          * kvm_clock stable after CPU hotplug
2477                          */
2478                         synchronizing = true;
2479                 } else {
2480                         u64 tsc_exp = kvm->arch.last_tsc_write +
2481                                                 nsec_to_cycles(vcpu, elapsed);
2482                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
2483                         /*
2484                          * Special case: TSC write with a small delta (1 second)
2485                          * of virtual cycle time against real time is
2486                          * interpreted as an attempt to synchronize the CPU.
2487                          */
2488                         synchronizing = data < tsc_exp + tsc_hz &&
2489                                         data + tsc_hz > tsc_exp;
2490                 }
2491         }
2492
2493         /*
2494          * For a reliable TSC, we can match TSC offsets, and for an unstable
2495          * TSC, we add elapsed time in this computation.  We could let the
2496          * compensation code attempt to catch up if we fall behind, but
2497          * it's better to try to match offsets from the beginning.
2498          */
2499         if (synchronizing &&
2500             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
2501                 if (!kvm_check_tsc_unstable()) {
2502                         offset = kvm->arch.cur_tsc_offset;
2503                 } else {
2504                         u64 delta = nsec_to_cycles(vcpu, elapsed);
2505                         data += delta;
2506                         offset = kvm_compute_l1_tsc_offset(vcpu, data);
2507                 }
2508                 matched = true;
2509                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
2510         } else {
2511                 /*
2512                  * We split periods of matched TSC writes into generations.
2513                  * For each generation, we track the original measured
2514                  * nanosecond time, offset, and write, so if TSCs are in
2515                  * sync, we can match exact offset, and if not, we can match
2516                  * exact software computation in compute_guest_tsc()
2517                  *
2518                  * These values are tracked in kvm->arch.cur_xxx variables.
2519                  */
2520                 kvm->arch.cur_tsc_generation++;
2521                 kvm->arch.cur_tsc_nsec = ns;
2522                 kvm->arch.cur_tsc_write = data;
2523                 kvm->arch.cur_tsc_offset = offset;
2524                 matched = false;
2525         }
2526
2527         /*
2528          * We also track th most recent recorded KHZ, write and time to
2529          * allow the matching interval to be extended at each write.
2530          */
2531         kvm->arch.last_tsc_nsec = ns;
2532         kvm->arch.last_tsc_write = data;
2533         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2534
2535         vcpu->arch.last_guest_tsc = data;
2536
2537         /* Keep track of which generation this VCPU has synchronized to */
2538         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2539         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2540         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2541
2542         kvm_vcpu_write_tsc_offset(vcpu, offset);
2543         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2544
2545         raw_spin_lock_irqsave(&kvm->arch.pvclock_gtod_sync_lock, flags);
2546         if (!matched) {
2547                 kvm->arch.nr_vcpus_matched_tsc = 0;
2548         } else if (!already_matched) {
2549                 kvm->arch.nr_vcpus_matched_tsc++;
2550         }
2551
2552         kvm_track_tsc_matching(vcpu);
2553         raw_spin_unlock_irqrestore(&kvm->arch.pvclock_gtod_sync_lock, flags);
2554 }
2555
2556 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2557                                            s64 adjustment)
2558 {
2559         u64 tsc_offset = vcpu->arch.l1_tsc_offset;
2560         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2561 }
2562
2563 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2564 {
2565         if (vcpu->arch.l1_tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
2566                 WARN_ON(adjustment < 0);
2567         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment,
2568                                    vcpu->arch.l1_tsc_scaling_ratio);
2569         adjust_tsc_offset_guest(vcpu, adjustment);
2570 }
2571
2572 #ifdef CONFIG_X86_64
2573
2574 static u64 read_tsc(void)
2575 {
2576         u64 ret = (u64)rdtsc_ordered();
2577         u64 last = pvclock_gtod_data.clock.cycle_last;
2578
2579         if (likely(ret >= last))
2580                 return ret;
2581
2582         /*
2583          * GCC likes to generate cmov here, but this branch is extremely
2584          * predictable (it's just a function of time and the likely is
2585          * very likely) and there's a data dependence, so force GCC
2586          * to generate a branch instead.  I don't barrier() because
2587          * we don't actually need a barrier, and if this function
2588          * ever gets inlined it will generate worse code.
2589          */
2590         asm volatile ("");
2591         return last;
2592 }
2593
2594 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2595                           int *mode)
2596 {
2597         long v;
2598         u64 tsc_pg_val;
2599
2600         switch (clock->vclock_mode) {
2601         case VDSO_CLOCKMODE_HVCLOCK:
2602                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2603                                                   tsc_timestamp);
2604                 if (tsc_pg_val != U64_MAX) {
2605                         /* TSC page valid */
2606                         *mode = VDSO_CLOCKMODE_HVCLOCK;
2607                         v = (tsc_pg_val - clock->cycle_last) &
2608                                 clock->mask;
2609                 } else {
2610                         /* TSC page invalid */
2611                         *mode = VDSO_CLOCKMODE_NONE;
2612                 }
2613                 break;
2614         case VDSO_CLOCKMODE_TSC:
2615                 *mode = VDSO_CLOCKMODE_TSC;
2616                 *tsc_timestamp = read_tsc();
2617                 v = (*tsc_timestamp - clock->cycle_last) &
2618                         clock->mask;
2619                 break;
2620         default:
2621                 *mode = VDSO_CLOCKMODE_NONE;
2622         }
2623
2624         if (*mode == VDSO_CLOCKMODE_NONE)
2625                 *tsc_timestamp = v = 0;
2626
2627         return v * clock->mult;
2628 }
2629
2630 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2631 {
2632         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2633         unsigned long seq;
2634         int mode;
2635         u64 ns;
2636
2637         do {
2638                 seq = read_seqcount_begin(&gtod->seq);
2639                 ns = gtod->raw_clock.base_cycles;
2640                 ns += vgettsc(&gtod->raw_clock, tsc_timestamp, &mode);
2641                 ns >>= gtod->raw_clock.shift;
2642                 ns += ktime_to_ns(ktime_add(gtod->raw_clock.offset, gtod->offs_boot));
2643         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2644         *t = ns;
2645
2646         return mode;
2647 }
2648
2649 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2650 {
2651         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2652         unsigned long seq;
2653         int mode;
2654         u64 ns;
2655
2656         do {
2657                 seq = read_seqcount_begin(&gtod->seq);
2658                 ts->tv_sec = gtod->wall_time_sec;
2659                 ns = gtod->clock.base_cycles;
2660                 ns += vgettsc(&gtod->clock, tsc_timestamp, &mode);
2661                 ns >>= gtod->clock.shift;
2662         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2663
2664         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2665         ts->tv_nsec = ns;
2666
2667         return mode;
2668 }
2669
2670 /* returns true if host is using TSC based clocksource */
2671 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2672 {
2673         /* checked again under seqlock below */
2674         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2675                 return false;
2676
2677         return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2678                                                       tsc_timestamp));
2679 }
2680
2681 /* returns true if host is using TSC based clocksource */
2682 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2683                                            u64 *tsc_timestamp)
2684 {
2685         /* checked again under seqlock below */
2686         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2687                 return false;
2688
2689         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2690 }
2691 #endif
2692
2693 /*
2694  *
2695  * Assuming a stable TSC across physical CPUS, and a stable TSC
2696  * across virtual CPUs, the following condition is possible.
2697  * Each numbered line represents an event visible to both
2698  * CPUs at the next numbered event.
2699  *
2700  * "timespecX" represents host monotonic time. "tscX" represents
2701  * RDTSC value.
2702  *
2703  *              VCPU0 on CPU0           |       VCPU1 on CPU1
2704  *
2705  * 1.  read timespec0,tsc0
2706  * 2.                                   | timespec1 = timespec0 + N
2707  *                                      | tsc1 = tsc0 + M
2708  * 3. transition to guest               | transition to guest
2709  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2710  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2711  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2712  *
2713  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2714  *
2715  *      - ret0 < ret1
2716  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2717  *              ...
2718  *      - 0 < N - M => M < N
2719  *
2720  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2721  * always the case (the difference between two distinct xtime instances
2722  * might be smaller then the difference between corresponding TSC reads,
2723  * when updating guest vcpus pvclock areas).
2724  *
2725  * To avoid that problem, do not allow visibility of distinct
2726  * system_timestamp/tsc_timestamp values simultaneously: use a master
2727  * copy of host monotonic time values. Update that master copy
2728  * in lockstep.
2729  *
2730  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2731  *
2732  */
2733
2734 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2735 {
2736 #ifdef CONFIG_X86_64
2737         struct kvm_arch *ka = &kvm->arch;
2738         int vclock_mode;
2739         bool host_tsc_clocksource, vcpus_matched;
2740
2741         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2742                         atomic_read(&kvm->online_vcpus));
2743
2744         /*
2745          * If the host uses TSC clock, then passthrough TSC as stable
2746          * to the guest.
2747          */
2748         host_tsc_clocksource = kvm_get_time_and_clockread(
2749                                         &ka->master_kernel_ns,
2750                                         &ka->master_cycle_now);
2751
2752         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2753                                 && !ka->backwards_tsc_observed
2754                                 && !ka->boot_vcpu_runs_old_kvmclock;
2755
2756         if (ka->use_master_clock)
2757                 atomic_set(&kvm_guest_has_master_clock, 1);
2758
2759         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2760         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2761                                         vcpus_matched);
2762 #endif
2763 }
2764
2765 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2766 {
2767         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2768 }
2769
2770 static void kvm_gen_update_masterclock(struct kvm *kvm)
2771 {
2772 #ifdef CONFIG_X86_64
2773         int i;
2774         struct kvm_vcpu *vcpu;
2775         struct kvm_arch *ka = &kvm->arch;
2776         unsigned long flags;
2777
2778         kvm_hv_invalidate_tsc_page(kvm);
2779
2780         kvm_make_mclock_inprogress_request(kvm);
2781
2782         /* no guest entries from this point */
2783         raw_spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2784         pvclock_update_vm_gtod_copy(kvm);
2785         raw_spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2786
2787         kvm_for_each_vcpu(i, vcpu, kvm)
2788                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2789
2790         /* guest entries allowed */
2791         kvm_for_each_vcpu(i, vcpu, kvm)
2792                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2793 #endif
2794 }
2795
2796 u64 get_kvmclock_ns(struct kvm *kvm)
2797 {
2798         struct kvm_arch *ka = &kvm->arch;
2799         struct pvclock_vcpu_time_info hv_clock;
2800         unsigned long flags;
2801         u64 ret;
2802
2803         raw_spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2804         if (!ka->use_master_clock) {
2805                 raw_spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2806                 return get_kvmclock_base_ns() + ka->kvmclock_offset;
2807         }
2808
2809         hv_clock.tsc_timestamp = ka->master_cycle_now;
2810         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2811         raw_spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2812
2813         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2814         get_cpu();
2815
2816         if (__this_cpu_read(cpu_tsc_khz)) {
2817                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2818                                    &hv_clock.tsc_shift,
2819                                    &hv_clock.tsc_to_system_mul);
2820                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2821         } else
2822                 ret = get_kvmclock_base_ns() + ka->kvmclock_offset;
2823
2824         put_cpu();
2825
2826         return ret;
2827 }
2828
2829 static void kvm_setup_pvclock_page(struct kvm_vcpu *v,
2830                                    struct gfn_to_hva_cache *cache,
2831                                    unsigned int offset)
2832 {
2833         struct kvm_vcpu_arch *vcpu = &v->arch;
2834         struct pvclock_vcpu_time_info guest_hv_clock;
2835
2836         if (unlikely(kvm_read_guest_offset_cached(v->kvm, cache,
2837                 &guest_hv_clock, offset, sizeof(guest_hv_clock))))
2838                 return;
2839
2840         /* This VCPU is paused, but it's legal for a guest to read another
2841          * VCPU's kvmclock, so we really have to follow the specification where
2842          * it says that version is odd if data is being modified, and even after
2843          * it is consistent.
2844          *
2845          * Version field updates must be kept separate.  This is because
2846          * kvm_write_guest_cached might use a "rep movs" instruction, and
2847          * writes within a string instruction are weakly ordered.  So there
2848          * are three writes overall.
2849          *
2850          * As a small optimization, only write the version field in the first
2851          * and third write.  The vcpu->pv_time cache is still valid, because the
2852          * version field is the first in the struct.
2853          */
2854         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2855
2856         if (guest_hv_clock.version & 1)
2857                 ++guest_hv_clock.version;  /* first time write, random junk */
2858
2859         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2860         kvm_write_guest_offset_cached(v->kvm, cache,
2861                                       &vcpu->hv_clock, offset,
2862                                       sizeof(vcpu->hv_clock.version));
2863
2864         smp_wmb();
2865
2866         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2867         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2868
2869         if (vcpu->pvclock_set_guest_stopped_request) {
2870                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2871                 vcpu->pvclock_set_guest_stopped_request = false;
2872         }
2873
2874         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2875
2876         kvm_write_guest_offset_cached(v->kvm, cache,
2877                                       &vcpu->hv_clock, offset,
2878                                       sizeof(vcpu->hv_clock));
2879
2880         smp_wmb();
2881
2882         vcpu->hv_clock.version++;
2883         kvm_write_guest_offset_cached(v->kvm, cache,
2884                                      &vcpu->hv_clock, offset,
2885                                      sizeof(vcpu->hv_clock.version));
2886 }
2887
2888 static int kvm_guest_time_update(struct kvm_vcpu *v)
2889 {
2890         unsigned long flags, tgt_tsc_khz;
2891         struct kvm_vcpu_arch *vcpu = &v->arch;
2892         struct kvm_arch *ka = &v->kvm->arch;
2893         s64 kernel_ns;
2894         u64 tsc_timestamp, host_tsc;
2895         u8 pvclock_flags;
2896         bool use_master_clock;
2897
2898         kernel_ns = 0;
2899         host_tsc = 0;
2900
2901         /*
2902          * If the host uses TSC clock, then passthrough TSC as stable
2903          * to the guest.
2904          */
2905         raw_spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2906         use_master_clock = ka->use_master_clock;
2907         if (use_master_clock) {
2908                 host_tsc = ka->master_cycle_now;
2909                 kernel_ns = ka->master_kernel_ns;
2910         }
2911         raw_spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2912
2913         /* Keep irq disabled to prevent changes to the clock */
2914         local_irq_save(flags);
2915         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2916         if (unlikely(tgt_tsc_khz == 0)) {
2917                 local_irq_restore(flags);
2918                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2919                 return 1;
2920         }
2921         if (!use_master_clock) {
2922                 host_tsc = rdtsc();
2923                 kernel_ns = get_kvmclock_base_ns();
2924         }
2925
2926         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2927
2928         /*
2929          * We may have to catch up the TSC to match elapsed wall clock
2930          * time for two reasons, even if kvmclock is used.
2931          *   1) CPU could have been running below the maximum TSC rate
2932          *   2) Broken TSC compensation resets the base at each VCPU
2933          *      entry to avoid unknown leaps of TSC even when running
2934          *      again on the same CPU.  This may cause apparent elapsed
2935          *      time to disappear, and the guest to stand still or run
2936          *      very slowly.
2937          */
2938         if (vcpu->tsc_catchup) {
2939                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2940                 if (tsc > tsc_timestamp) {
2941                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2942                         tsc_timestamp = tsc;
2943                 }
2944         }
2945
2946         local_irq_restore(flags);
2947
2948         /* With all the info we got, fill in the values */
2949
2950         if (kvm_has_tsc_control)
2951                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz,
2952                                             v->arch.l1_tsc_scaling_ratio);
2953
2954         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2955                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2956                                    &vcpu->hv_clock.tsc_shift,
2957                                    &vcpu->hv_clock.tsc_to_system_mul);
2958                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2959         }
2960
2961         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2962         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2963         vcpu->last_guest_tsc = tsc_timestamp;
2964
2965         /* If the host uses TSC clocksource, then it is stable */
2966         pvclock_flags = 0;
2967         if (use_master_clock)
2968                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2969
2970         vcpu->hv_clock.flags = pvclock_flags;
2971
2972         if (vcpu->pv_time_enabled)
2973                 kvm_setup_pvclock_page(v, &vcpu->pv_time, 0);
2974         if (vcpu->xen.vcpu_info_set)
2975                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_info_cache,
2976                                        offsetof(struct compat_vcpu_info, time));
2977         if (vcpu->xen.vcpu_time_info_set)
2978                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_time_info_cache, 0);
2979         if (!v->vcpu_idx)
2980                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2981         return 0;
2982 }
2983
2984 /*
2985  * kvmclock updates which are isolated to a given vcpu, such as
2986  * vcpu->cpu migration, should not allow system_timestamp from
2987  * the rest of the vcpus to remain static. Otherwise ntp frequency
2988  * correction applies to one vcpu's system_timestamp but not
2989  * the others.
2990  *
2991  * So in those cases, request a kvmclock update for all vcpus.
2992  * We need to rate-limit these requests though, as they can
2993  * considerably slow guests that have a large number of vcpus.
2994  * The time for a remote vcpu to update its kvmclock is bound
2995  * by the delay we use to rate-limit the updates.
2996  */
2997
2998 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2999
3000 static void kvmclock_update_fn(struct work_struct *work)
3001 {
3002         int i;
3003         struct delayed_work *dwork = to_delayed_work(work);
3004         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
3005                                            kvmclock_update_work);
3006         struct kvm *kvm = container_of(ka, struct kvm, arch);
3007         struct kvm_vcpu *vcpu;
3008
3009         kvm_for_each_vcpu(i, vcpu, kvm) {
3010                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3011                 kvm_vcpu_kick(vcpu);
3012         }
3013 }
3014
3015 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
3016 {
3017         struct kvm *kvm = v->kvm;
3018
3019         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
3020         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
3021                                         KVMCLOCK_UPDATE_DELAY);
3022 }
3023
3024 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
3025
3026 static void kvmclock_sync_fn(struct work_struct *work)
3027 {
3028         struct delayed_work *dwork = to_delayed_work(work);
3029         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
3030                                            kvmclock_sync_work);
3031         struct kvm *kvm = container_of(ka, struct kvm, arch);
3032
3033         if (!kvmclock_periodic_sync)
3034                 return;
3035
3036         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
3037         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
3038                                         KVMCLOCK_SYNC_PERIOD);
3039 }
3040
3041 /*
3042  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
3043  */
3044 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
3045 {
3046         /* McStatusWrEn enabled? */
3047         if (guest_cpuid_is_amd_or_hygon(vcpu))
3048                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
3049
3050         return false;
3051 }
3052
3053 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3054 {
3055         u64 mcg_cap = vcpu->arch.mcg_cap;
3056         unsigned bank_num = mcg_cap & 0xff;
3057         u32 msr = msr_info->index;
3058         u64 data = msr_info->data;
3059
3060         switch (msr) {
3061         case MSR_IA32_MCG_STATUS:
3062                 vcpu->arch.mcg_status = data;
3063                 break;
3064         case MSR_IA32_MCG_CTL:
3065                 if (!(mcg_cap & MCG_CTL_P) &&
3066                     (data || !msr_info->host_initiated))
3067                         return 1;
3068                 if (data != 0 && data != ~(u64)0)
3069                         return 1;
3070                 vcpu->arch.mcg_ctl = data;
3071                 break;
3072         default:
3073                 if (msr >= MSR_IA32_MC0_CTL &&
3074                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3075                         u32 offset = array_index_nospec(
3076                                 msr - MSR_IA32_MC0_CTL,
3077                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3078
3079                         /* only 0 or all 1s can be written to IA32_MCi_CTL
3080                          * some Linux kernels though clear bit 10 in bank 4 to
3081                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
3082                          * this to avoid an uncatched #GP in the guest
3083                          */
3084                         if ((offset & 0x3) == 0 &&
3085                             data != 0 && (data | (1 << 10)) != ~(u64)0)
3086                                 return -1;
3087
3088                         /* MCi_STATUS */
3089                         if (!msr_info->host_initiated &&
3090                             (offset & 0x3) == 1 && data != 0) {
3091                                 if (!can_set_mci_status(vcpu))
3092                                         return -1;
3093                         }
3094
3095                         vcpu->arch.mce_banks[offset] = data;
3096                         break;
3097                 }
3098                 return 1;
3099         }
3100         return 0;
3101 }
3102
3103 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu)
3104 {
3105         u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT;
3106
3107         return (vcpu->arch.apf.msr_en_val & mask) == mask;
3108 }
3109
3110 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
3111 {
3112         gpa_t gpa = data & ~0x3f;
3113
3114         /* Bits 4:5 are reserved, Should be zero */
3115         if (data & 0x30)
3116                 return 1;
3117
3118         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_VMEXIT) &&
3119             (data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT))
3120                 return 1;
3121
3122         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT) &&
3123             (data & KVM_ASYNC_PF_DELIVERY_AS_INT))
3124                 return 1;
3125
3126         if (!lapic_in_kernel(vcpu))
3127                 return data ? 1 : 0;
3128
3129         vcpu->arch.apf.msr_en_val = data;
3130
3131         if (!kvm_pv_async_pf_enabled(vcpu)) {
3132                 kvm_clear_async_pf_completion_queue(vcpu);
3133                 kvm_async_pf_hash_reset(vcpu);
3134                 return 0;
3135         }
3136
3137         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
3138                                         sizeof(u64)))
3139                 return 1;
3140
3141         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
3142         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
3143
3144         kvm_async_pf_wakeup_all(vcpu);
3145
3146         return 0;
3147 }
3148
3149 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu *vcpu, u64 data)
3150 {
3151         /* Bits 8-63 are reserved */
3152         if (data >> 8)
3153                 return 1;
3154
3155         if (!lapic_in_kernel(vcpu))
3156                 return 1;
3157
3158         vcpu->arch.apf.msr_int_val = data;
3159
3160         vcpu->arch.apf.vec = data & KVM_ASYNC_PF_VEC_MASK;
3161
3162         return 0;
3163 }
3164
3165 static void kvmclock_reset(struct kvm_vcpu *vcpu)
3166 {
3167         vcpu->arch.pv_time_enabled = false;
3168         vcpu->arch.time = 0;
3169 }
3170
3171 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu *vcpu)
3172 {
3173         ++vcpu->stat.tlb_flush;
3174         static_call(kvm_x86_tlb_flush_all)(vcpu);
3175 }
3176
3177 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu)
3178 {
3179         ++vcpu->stat.tlb_flush;
3180
3181         if (!tdp_enabled) {
3182                /*
3183                  * A TLB flush on behalf of the guest is equivalent to
3184                  * INVPCID(all), toggling CR4.PGE, etc., which requires
3185                  * a forced sync of the shadow page tables.  Unload the
3186                  * entire MMU here and the subsequent load will sync the
3187                  * shadow page tables, and also flush the TLB.
3188                  */
3189                 kvm_mmu_unload(vcpu);
3190                 return;
3191         }
3192
3193         static_call(kvm_x86_tlb_flush_guest)(vcpu);
3194 }
3195
3196 static void record_steal_time(struct kvm_vcpu *vcpu)
3197 {
3198         struct kvm_host_map map;
3199         struct kvm_steal_time *st;
3200
3201         if (kvm_xen_msr_enabled(vcpu->kvm)) {
3202                 kvm_xen_runstate_set_running(vcpu);
3203                 return;
3204         }
3205
3206         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3207                 return;
3208
3209         /* -EAGAIN is returned in atomic context so we can just return. */
3210         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT,
3211                         &map, &vcpu->arch.st.cache, false))
3212                 return;
3213
3214         st = map.hva +
3215                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
3216
3217         /*
3218          * Doing a TLB flush here, on the guest's behalf, can avoid
3219          * expensive IPIs.
3220          */
3221         if (guest_pv_has(vcpu, KVM_FEATURE_PV_TLB_FLUSH)) {
3222                 u8 st_preempted = xchg(&st->preempted, 0);
3223
3224                 trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
3225                                        st_preempted & KVM_VCPU_FLUSH_TLB);
3226                 if (st_preempted & KVM_VCPU_FLUSH_TLB)
3227                         kvm_vcpu_flush_tlb_guest(vcpu);
3228         } else {
3229                 st->preempted = 0;
3230         }
3231
3232         vcpu->arch.st.preempted = 0;
3233
3234         if (st->version & 1)
3235                 st->version += 1;  /* first time write, random junk */
3236
3237         st->version += 1;
3238
3239         smp_wmb();
3240
3241         st->steal += current->sched_info.run_delay -
3242                 vcpu->arch.st.last_steal;
3243         vcpu->arch.st.last_steal = current->sched_info.run_delay;
3244
3245         smp_wmb();
3246
3247         st->version += 1;
3248
3249         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, false);
3250 }
3251
3252 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3253 {
3254         bool pr = false;
3255         u32 msr = msr_info->index;
3256         u64 data = msr_info->data;
3257
3258         if (msr && msr == vcpu->kvm->arch.xen_hvm_config.msr)
3259                 return kvm_xen_write_hypercall_page(vcpu, data);
3260
3261         switch (msr) {
3262         case MSR_AMD64_NB_CFG:
3263         case MSR_IA32_UCODE_WRITE:
3264         case MSR_VM_HSAVE_PA:
3265         case MSR_AMD64_PATCH_LOADER:
3266         case MSR_AMD64_BU_CFG2:
3267         case MSR_AMD64_DC_CFG:
3268         case MSR_F15H_EX_CFG:
3269                 break;
3270
3271         case MSR_IA32_UCODE_REV:
3272                 if (msr_info->host_initiated)
3273                         vcpu->arch.microcode_version = data;
3274                 break;
3275         case MSR_IA32_ARCH_CAPABILITIES:
3276                 if (!msr_info->host_initiated)
3277                         return 1;
3278                 vcpu->arch.arch_capabilities = data;
3279                 break;
3280         case MSR_IA32_PERF_CAPABILITIES: {
3281                 struct kvm_msr_entry msr_ent = {.index = msr, .data = 0};
3282
3283                 if (!msr_info->host_initiated)
3284                         return 1;
3285                 if (guest_cpuid_has(vcpu, X86_FEATURE_PDCM) && kvm_get_msr_feature(&msr_ent))
3286                         return 1;
3287                 if (data & ~msr_ent.data)
3288                         return 1;
3289
3290                 vcpu->arch.perf_capabilities = data;
3291
3292                 return 0;
3293                 }
3294         case MSR_EFER:
3295                 return set_efer(vcpu, msr_info);
3296         case MSR_K7_HWCR:
3297                 data &= ~(u64)0x40;     /* ignore flush filter disable */
3298                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
3299                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
3300
3301                 /* Handle McStatusWrEn */
3302                 if (data == BIT_ULL(18)) {
3303                         vcpu->arch.msr_hwcr = data;
3304                 } else if (data != 0) {
3305                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
3306                                     data);
3307                         return 1;
3308                 }
3309                 break;
3310         case MSR_FAM10H_MMIO_CONF_BASE:
3311                 if (data != 0) {
3312                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
3313                                     "0x%llx\n", data);
3314                         return 1;
3315                 }
3316                 break;
3317         case 0x200 ... 0x2ff:
3318                 return kvm_mtrr_set_msr(vcpu, msr, data);
3319         case MSR_IA32_APICBASE:
3320                 return kvm_set_apic_base(vcpu, msr_info);
3321         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3322                 return kvm_x2apic_msr_write(vcpu, msr, data);
3323         case MSR_IA32_TSC_DEADLINE:
3324                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
3325                 break;
3326         case MSR_IA32_TSC_ADJUST:
3327                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
3328                         if (!msr_info->host_initiated) {
3329                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
3330                                 adjust_tsc_offset_guest(vcpu, adj);
3331                                 /* Before back to guest, tsc_timestamp must be adjusted
3332                                  * as well, otherwise guest's percpu pvclock time could jump.
3333                                  */
3334                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3335                         }
3336                         vcpu->arch.ia32_tsc_adjust_msr = data;
3337                 }
3338                 break;
3339         case MSR_IA32_MISC_ENABLE:
3340                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
3341                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
3342                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
3343                                 return 1;
3344                         vcpu->arch.ia32_misc_enable_msr = data;
3345                         kvm_update_cpuid_runtime(vcpu);
3346                 } else {
3347                         vcpu->arch.ia32_misc_enable_msr = data;
3348                 }
3349                 break;
3350         case MSR_IA32_SMBASE:
3351                 if (!msr_info->host_initiated)
3352                         return 1;
3353                 vcpu->arch.smbase = data;
3354                 break;
3355         case MSR_IA32_POWER_CTL:
3356                 vcpu->arch.msr_ia32_power_ctl = data;
3357                 break;
3358         case MSR_IA32_TSC:
3359                 if (msr_info->host_initiated) {
3360                         kvm_synchronize_tsc(vcpu, data);
3361                 } else {
3362                         u64 adj = kvm_compute_l1_tsc_offset(vcpu, data) - vcpu->arch.l1_tsc_offset;
3363                         adjust_tsc_offset_guest(vcpu, adj);
3364                         vcpu->arch.ia32_tsc_adjust_msr += adj;
3365                 }
3366                 break;
3367         case MSR_IA32_XSS:
3368                 if (!msr_info->host_initiated &&
3369                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3370                         return 1;
3371                 /*
3372                  * KVM supports exposing PT to the guest, but does not support
3373                  * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3374                  * XSAVES/XRSTORS to save/restore PT MSRs.
3375                  */
3376                 if (data & ~supported_xss)
3377                         return 1;
3378                 vcpu->arch.ia32_xss = data;
3379                 break;
3380         case MSR_SMI_COUNT:
3381                 if (!msr_info->host_initiated)
3382                         return 1;
3383                 vcpu->arch.smi_count = data;
3384                 break;
3385         case MSR_KVM_WALL_CLOCK_NEW:
3386                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3387                         return 1;
3388
3389                 vcpu->kvm->arch.wall_clock = data;
3390                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3391                 break;
3392         case MSR_KVM_WALL_CLOCK:
3393                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3394                         return 1;
3395
3396                 vcpu->kvm->arch.wall_clock = data;
3397                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3398                 break;
3399         case MSR_KVM_SYSTEM_TIME_NEW:
3400                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3401                         return 1;
3402
3403                 kvm_write_system_time(vcpu, data, false, msr_info->host_initiated);
3404                 break;
3405         case MSR_KVM_SYSTEM_TIME:
3406                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3407                         return 1;
3408
3409                 kvm_write_system_time(vcpu, data, true,  msr_info->host_initiated);
3410                 break;
3411         case MSR_KVM_ASYNC_PF_EN:
3412                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3413                         return 1;
3414
3415                 if (kvm_pv_enable_async_pf(vcpu, data))
3416                         return 1;
3417                 break;
3418         case MSR_KVM_ASYNC_PF_INT:
3419                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3420                         return 1;
3421
3422                 if (kvm_pv_enable_async_pf_int(vcpu, data))
3423                         return 1;
3424                 break;
3425         case MSR_KVM_ASYNC_PF_ACK:
3426                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3427                         return 1;
3428                 if (data & 0x1) {
3429                         vcpu->arch.apf.pageready_pending = false;
3430                         kvm_check_async_pf_completion(vcpu);
3431                 }
3432                 break;
3433         case MSR_KVM_STEAL_TIME:
3434                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3435                         return 1;
3436
3437                 if (unlikely(!sched_info_on()))
3438                         return 1;
3439
3440                 if (data & KVM_STEAL_RESERVED_MASK)
3441                         return 1;
3442
3443                 vcpu->arch.st.msr_val = data;
3444
3445                 if (!(data & KVM_MSR_ENABLED))
3446                         break;
3447
3448                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3449
3450                 break;
3451         case MSR_KVM_PV_EOI_EN:
3452                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3453                         return 1;
3454
3455                 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
3456                         return 1;
3457                 break;
3458
3459         case MSR_KVM_POLL_CONTROL:
3460                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3461                         return 1;
3462
3463                 /* only enable bit supported */
3464                 if (data & (-1ULL << 1))
3465                         return 1;
3466
3467                 vcpu->arch.msr_kvm_poll_control = data;
3468                 break;
3469
3470         case MSR_IA32_MCG_CTL:
3471         case MSR_IA32_MCG_STATUS:
3472         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3473                 return set_msr_mce(vcpu, msr_info);
3474
3475         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3476         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3477                 pr = true;
3478                 fallthrough;
3479         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3480         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3481                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3482                         return kvm_pmu_set_msr(vcpu, msr_info);
3483
3484                 if (pr || data != 0)
3485                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
3486                                     "0x%x data 0x%llx\n", msr, data);
3487                 break;
3488         case MSR_K7_CLK_CTL:
3489                 /*
3490                  * Ignore all writes to this no longer documented MSR.
3491                  * Writes are only relevant for old K7 processors,
3492                  * all pre-dating SVM, but a recommended workaround from
3493                  * AMD for these chips. It is possible to specify the
3494                  * affected processor models on the command line, hence
3495                  * the need to ignore the workaround.
3496                  */
3497                 break;
3498         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3499         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3500         case HV_X64_MSR_SYNDBG_OPTIONS:
3501         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3502         case HV_X64_MSR_CRASH_CTL:
3503         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3504         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3505         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3506         case HV_X64_MSR_TSC_EMULATION_STATUS:
3507                 return kvm_hv_set_msr_common(vcpu, msr, data,
3508                                              msr_info->host_initiated);
3509         case MSR_IA32_BBL_CR_CTL3:
3510                 /* Drop writes to this legacy MSR -- see rdmsr
3511                  * counterpart for further detail.
3512                  */
3513                 if (report_ignored_msrs)
3514                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
3515                                 msr, data);
3516                 break;
3517         case MSR_AMD64_OSVW_ID_LENGTH:
3518                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3519                         return 1;
3520                 vcpu->arch.osvw.length = data;
3521                 break;
3522         case MSR_AMD64_OSVW_STATUS:
3523                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3524                         return 1;
3525                 vcpu->arch.osvw.status = data;
3526                 break;
3527         case MSR_PLATFORM_INFO:
3528                 if (!msr_info->host_initiated ||
3529                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
3530                      cpuid_fault_enabled(vcpu)))
3531                         return 1;
3532                 vcpu->arch.msr_platform_info = data;
3533                 break;
3534         case MSR_MISC_FEATURES_ENABLES:
3535                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
3536                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
3537                      !supports_cpuid_fault(vcpu)))
3538                         return 1;
3539                 vcpu->arch.msr_misc_features_enables = data;
3540                 break;
3541         default:
3542                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3543                         return kvm_pmu_set_msr(vcpu, msr_info);
3544                 return KVM_MSR_RET_INVALID;
3545         }
3546         return 0;
3547 }
3548 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
3549
3550 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
3551 {
3552         u64 data;
3553         u64 mcg_cap = vcpu->arch.mcg_cap;
3554         unsigned bank_num = mcg_cap & 0xff;
3555
3556         switch (msr) {
3557         case MSR_IA32_P5_MC_ADDR:
3558         case MSR_IA32_P5_MC_TYPE:
3559                 data = 0;
3560                 break;
3561         case MSR_IA32_MCG_CAP:
3562                 data = vcpu->arch.mcg_cap;
3563                 break;
3564         case MSR_IA32_MCG_CTL:
3565                 if (!(mcg_cap & MCG_CTL_P) && !host)
3566                         return 1;
3567                 data = vcpu->arch.mcg_ctl;
3568                 break;
3569         case MSR_IA32_MCG_STATUS:
3570                 data = vcpu->arch.mcg_status;
3571                 break;
3572         default:
3573                 if (msr >= MSR_IA32_MC0_CTL &&
3574                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3575                         u32 offset = array_index_nospec(
3576                                 msr - MSR_IA32_MC0_CTL,
3577                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3578
3579                         data = vcpu->arch.mce_banks[offset];
3580                         break;
3581                 }
3582                 return 1;
3583         }
3584         *pdata = data;
3585         return 0;
3586 }
3587
3588 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3589 {
3590         switch (msr_info->index) {
3591         case MSR_IA32_PLATFORM_ID:
3592         case MSR_IA32_EBL_CR_POWERON:
3593         case MSR_IA32_LASTBRANCHFROMIP:
3594         case MSR_IA32_LASTBRANCHTOIP:
3595         case MSR_IA32_LASTINTFROMIP:
3596         case MSR_IA32_LASTINTTOIP:
3597         case MSR_AMD64_SYSCFG:
3598         case MSR_K8_TSEG_ADDR:
3599         case MSR_K8_TSEG_MASK:
3600         case MSR_VM_HSAVE_PA:
3601         case MSR_K8_INT_PENDING_MSG:
3602         case MSR_AMD64_NB_CFG:
3603         case MSR_FAM10H_MMIO_CONF_BASE:
3604         case MSR_AMD64_BU_CFG2:
3605         case MSR_IA32_PERF_CTL:
3606         case MSR_AMD64_DC_CFG:
3607         case MSR_F15H_EX_CFG:
3608         /*
3609          * Intel Sandy Bridge CPUs must support the RAPL (running average power
3610          * limit) MSRs. Just return 0, as we do not want to expose the host
3611          * data here. Do not conditionalize this on CPUID, as KVM does not do
3612          * so for existing CPU-specific MSRs.
3613          */
3614         case MSR_RAPL_POWER_UNIT:
3615         case MSR_PP0_ENERGY_STATUS:     /* Power plane 0 (core) */
3616         case MSR_PP1_ENERGY_STATUS:     /* Power plane 1 (graphics uncore) */
3617         case MSR_PKG_ENERGY_STATUS:     /* Total package */
3618         case MSR_DRAM_ENERGY_STATUS:    /* DRAM controller */
3619                 msr_info->data = 0;
3620                 break;
3621         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3622                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3623                         return kvm_pmu_get_msr(vcpu, msr_info);
3624                 if (!msr_info->host_initiated)
3625                         return 1;
3626                 msr_info->data = 0;
3627                 break;
3628         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3629         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3630         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3631         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3632                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3633                         return kvm_pmu_get_msr(vcpu, msr_info);
3634                 msr_info->data = 0;
3635                 break;
3636         case MSR_IA32_UCODE_REV:
3637                 msr_info->data = vcpu->arch.microcode_version;
3638                 break;
3639         case MSR_IA32_ARCH_CAPABILITIES:
3640                 if (!msr_info->host_initiated &&
3641                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
3642                         return 1;
3643                 msr_info->data = vcpu->arch.arch_capabilities;
3644                 break;
3645         case MSR_IA32_PERF_CAPABILITIES:
3646                 if (!msr_info->host_initiated &&
3647                     !guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
3648                         return 1;
3649                 msr_info->data = vcpu->arch.perf_capabilities;
3650                 break;
3651         case MSR_IA32_POWER_CTL:
3652                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
3653                 break;
3654         case MSR_IA32_TSC: {
3655                 /*
3656                  * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3657                  * even when not intercepted. AMD manual doesn't explicitly
3658                  * state this but appears to behave the same.
3659                  *
3660                  * On userspace reads and writes, however, we unconditionally
3661                  * return L1's TSC value to ensure backwards-compatible
3662                  * behavior for migration.
3663                  */
3664                 u64 offset, ratio;
3665
3666                 if (msr_info->host_initiated) {
3667                         offset = vcpu->arch.l1_tsc_offset;
3668                         ratio = vcpu->arch.l1_tsc_scaling_ratio;
3669                 } else {
3670                         offset = vcpu->arch.tsc_offset;
3671                         ratio = vcpu->arch.tsc_scaling_ratio;
3672                 }
3673
3674                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc(), ratio) + offset;
3675                 break;
3676         }
3677         case MSR_MTRRcap:
3678         case 0x200 ... 0x2ff:
3679                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
3680         case 0xcd: /* fsb frequency */
3681                 msr_info->data = 3;
3682                 break;
3683                 /*
3684                  * MSR_EBC_FREQUENCY_ID
3685                  * Conservative value valid for even the basic CPU models.
3686                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3687                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3688                  * and 266MHz for model 3, or 4. Set Core Clock
3689                  * Frequency to System Bus Frequency Ratio to 1 (bits
3690                  * 31:24) even though these are only valid for CPU
3691                  * models > 2, however guests may end up dividing or
3692                  * multiplying by zero otherwise.
3693                  */
3694         case MSR_EBC_FREQUENCY_ID:
3695                 msr_info->data = 1 << 24;
3696                 break;
3697         case MSR_IA32_APICBASE:
3698                 msr_info->data = kvm_get_apic_base(vcpu);
3699                 break;
3700         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3701                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
3702         case MSR_IA32_TSC_DEADLINE:
3703                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
3704                 break;
3705         case MSR_IA32_TSC_ADJUST:
3706                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
3707                 break;
3708         case MSR_IA32_MISC_ENABLE:
3709                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
3710                 break;
3711         case MSR_IA32_SMBASE:
3712                 if (!msr_info->host_initiated)
3713                         return 1;
3714                 msr_info->data = vcpu->arch.smbase;
3715                 break;
3716         case MSR_SMI_COUNT:
3717                 msr_info->data = vcpu->arch.smi_count;
3718                 break;
3719         case MSR_IA32_PERF_STATUS:
3720                 /* TSC increment by tick */
3721                 msr_info->data = 1000ULL;
3722                 /* CPU multiplier */
3723                 msr_info->data |= (((uint64_t)4ULL) << 40);
3724                 break;
3725         case MSR_EFER:
3726                 msr_info->data = vcpu->arch.efer;
3727                 break;
3728         case MSR_KVM_WALL_CLOCK:
3729                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3730                         return 1;
3731
3732                 msr_info->data = vcpu->kvm->arch.wall_clock;
3733                 break;
3734         case MSR_KVM_WALL_CLOCK_NEW:
3735                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3736                         return 1;
3737
3738                 msr_info->data = vcpu->kvm->arch.wall_clock;
3739                 break;
3740         case MSR_KVM_SYSTEM_TIME:
3741                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3742                         return 1;
3743
3744                 msr_info->data = vcpu->arch.time;
3745                 break;
3746         case MSR_KVM_SYSTEM_TIME_NEW:
3747                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3748                         return 1;
3749
3750                 msr_info->data = vcpu->arch.time;
3751                 break;
3752         case MSR_KVM_ASYNC_PF_EN:
3753                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3754                         return 1;
3755
3756                 msr_info->data = vcpu->arch.apf.msr_en_val;
3757                 break;
3758         case MSR_KVM_ASYNC_PF_INT:
3759                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3760                         return 1;
3761
3762                 msr_info->data = vcpu->arch.apf.msr_int_val;
3763                 break;
3764         case MSR_KVM_ASYNC_PF_ACK:
3765                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3766                         return 1;
3767
3768                 msr_info->data = 0;
3769                 break;
3770         case MSR_KVM_STEAL_TIME:
3771                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3772                         return 1;
3773
3774                 msr_info->data = vcpu->arch.st.msr_val;
3775                 break;
3776         case MSR_KVM_PV_EOI_EN:
3777                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3778                         return 1;
3779
3780                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3781                 break;
3782         case MSR_KVM_POLL_CONTROL:
3783                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3784                         return 1;
3785
3786                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3787                 break;
3788         case MSR_IA32_P5_MC_ADDR:
3789         case MSR_IA32_P5_MC_TYPE:
3790         case MSR_IA32_MCG_CAP:
3791         case MSR_IA32_MCG_CTL:
3792         case MSR_IA32_MCG_STATUS:
3793         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3794                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3795                                    msr_info->host_initiated);
3796         case MSR_IA32_XSS:
3797                 if (!msr_info->host_initiated &&
3798                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3799                         return 1;
3800                 msr_info->data = vcpu->arch.ia32_xss;
3801                 break;
3802         case MSR_K7_CLK_CTL:
3803                 /*
3804                  * Provide expected ramp-up count for K7. All other
3805                  * are set to zero, indicating minimum divisors for
3806                  * every field.
3807                  *
3808                  * This prevents guest kernels on AMD host with CPU
3809                  * type 6, model 8 and higher from exploding due to
3810                  * the rdmsr failing.
3811                  */
3812                 msr_info->data = 0x20000000;
3813                 break;
3814         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3815         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3816         case HV_X64_MSR_SYNDBG_OPTIONS:
3817         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3818         case HV_X64_MSR_CRASH_CTL:
3819         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3820         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3821         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3822         case HV_X64_MSR_TSC_EMULATION_STATUS:
3823                 return kvm_hv_get_msr_common(vcpu,
3824                                              msr_info->index, &msr_info->data,
3825                                              msr_info->host_initiated);
3826         case MSR_IA32_BBL_CR_CTL3:
3827                 /* This legacy MSR exists but isn't fully documented in current
3828                  * silicon.  It is however accessed by winxp in very narrow
3829                  * scenarios where it sets bit #19, itself documented as
3830                  * a "reserved" bit.  Best effort attempt to source coherent
3831                  * read data here should the balance of the register be
3832                  * interpreted by the guest:
3833                  *
3834                  * L2 cache control register 3: 64GB range, 256KB size,
3835                  * enabled, latency 0x1, configured
3836                  */
3837                 msr_info->data = 0xbe702111;
3838                 break;
3839         case MSR_AMD64_OSVW_ID_LENGTH:
3840                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3841                         return 1;
3842                 msr_info->data = vcpu->arch.osvw.length;
3843                 break;
3844         case MSR_AMD64_OSVW_STATUS:
3845                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3846                         return 1;
3847                 msr_info->data = vcpu->arch.osvw.status;
3848                 break;
3849         case MSR_PLATFORM_INFO:
3850                 if (!msr_info->host_initiated &&
3851                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
3852                         return 1;
3853                 msr_info->data = vcpu->arch.msr_platform_info;
3854                 break;
3855         case MSR_MISC_FEATURES_ENABLES:
3856                 msr_info->data = vcpu->arch.msr_misc_features_enables;
3857                 break;
3858         case MSR_K7_HWCR:
3859                 msr_info->data = vcpu->arch.msr_hwcr;
3860                 break;
3861         default:
3862                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3863                         return kvm_pmu_get_msr(vcpu, msr_info);
3864                 return KVM_MSR_RET_INVALID;
3865         }
3866         return 0;
3867 }
3868 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
3869
3870 /*
3871  * Read or write a bunch of msrs. All parameters are kernel addresses.
3872  *
3873  * @return number of msrs set successfully.
3874  */
3875 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
3876                     struct kvm_msr_entry *entries,
3877                     int (*do_msr)(struct kvm_vcpu *vcpu,
3878                                   unsigned index, u64 *data))
3879 {
3880         int i;
3881
3882         for (i = 0; i < msrs->nmsrs; ++i)
3883                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
3884                         break;
3885
3886         return i;
3887 }
3888
3889 /*
3890  * Read or write a bunch of msrs. Parameters are user addresses.
3891  *
3892  * @return number of msrs set successfully.
3893  */
3894 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
3895                   int (*do_msr)(struct kvm_vcpu *vcpu,
3896                                 unsigned index, u64 *data),
3897                   int writeback)
3898 {
3899         struct kvm_msrs msrs;
3900         struct kvm_msr_entry *entries;
3901         int r, n;
3902         unsigned size;
3903
3904         r = -EFAULT;
3905         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
3906                 goto out;
3907
3908         r = -E2BIG;
3909         if (msrs.nmsrs >= MAX_IO_MSRS)
3910                 goto out;
3911
3912         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
3913         entries = memdup_user(user_msrs->entries, size);
3914         if (IS_ERR(entries)) {
3915                 r = PTR_ERR(entries);
3916                 goto out;
3917         }
3918
3919         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
3920         if (r < 0)
3921                 goto out_free;
3922
3923         r = -EFAULT;
3924         if (writeback && copy_to_user(user_msrs->entries, entries, size))
3925                 goto out_free;
3926
3927         r = n;
3928
3929 out_free:
3930         kfree(entries);
3931 out:
3932         return r;
3933 }
3934
3935 static inline bool kvm_can_mwait_in_guest(void)
3936 {
3937         return boot_cpu_has(X86_FEATURE_MWAIT) &&
3938                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
3939                 boot_cpu_has(X86_FEATURE_ARAT);
3940 }
3941
3942 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu *vcpu,
3943                                             struct kvm_cpuid2 __user *cpuid_arg)
3944 {
3945         struct kvm_cpuid2 cpuid;
3946         int r;
3947
3948         r = -EFAULT;
3949         if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3950                 return r;
3951
3952         r = kvm_get_hv_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3953         if (r)
3954                 return r;
3955
3956         r = -EFAULT;
3957         if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3958                 return r;
3959
3960         return 0;
3961 }
3962
3963 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
3964 {
3965         int r = 0;
3966
3967         switch (ext) {
3968         case KVM_CAP_IRQCHIP:
3969         case KVM_CAP_HLT:
3970         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
3971         case KVM_CAP_SET_TSS_ADDR:
3972         case KVM_CAP_EXT_CPUID:
3973         case KVM_CAP_EXT_EMUL_CPUID:
3974         case KVM_CAP_CLOCKSOURCE:
3975         case KVM_CAP_PIT:
3976         case KVM_CAP_NOP_IO_DELAY:
3977         case KVM_CAP_MP_STATE:
3978         case KVM_CAP_SYNC_MMU:
3979         case KVM_CAP_USER_NMI:
3980         case KVM_CAP_REINJECT_CONTROL:
3981         case KVM_CAP_IRQ_INJECT_STATUS:
3982         case KVM_CAP_IOEVENTFD:
3983         case KVM_CAP_IOEVENTFD_NO_LENGTH:
3984         case KVM_CAP_PIT2:
3985         case KVM_CAP_PIT_STATE2:
3986         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
3987         case KVM_CAP_VCPU_EVENTS:
3988         case KVM_CAP_HYPERV:
3989         case KVM_CAP_HYPERV_VAPIC:
3990         case KVM_CAP_HYPERV_SPIN:
3991         case KVM_CAP_HYPERV_SYNIC:
3992         case KVM_CAP_HYPERV_SYNIC2:
3993         case KVM_CAP_HYPERV_VP_INDEX:
3994         case KVM_CAP_HYPERV_EVENTFD:
3995         case KVM_CAP_HYPERV_TLBFLUSH:
3996         case KVM_CAP_HYPERV_SEND_IPI:
3997         case KVM_CAP_HYPERV_CPUID:
3998         case KVM_CAP_HYPERV_ENFORCE_CPUID:
3999         case KVM_CAP_SYS_HYPERV_CPUID:
4000         case KVM_CAP_PCI_SEGMENT:
4001         case KVM_CAP_DEBUGREGS:
4002         case KVM_CAP_X86_ROBUST_SINGLESTEP:
4003         case KVM_CAP_XSAVE:
4004         case KVM_CAP_ASYNC_PF:
4005         case KVM_CAP_ASYNC_PF_INT:
4006         case KVM_CAP_GET_TSC_KHZ:
4007         case KVM_CAP_KVMCLOCK_CTRL:
4008         case KVM_CAP_READONLY_MEM:
4009         case KVM_CAP_HYPERV_TIME:
4010         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
4011         case KVM_CAP_TSC_DEADLINE_TIMER:
4012         case KVM_CAP_DISABLE_QUIRKS:
4013         case KVM_CAP_SET_BOOT_CPU_ID:
4014         case KVM_CAP_SPLIT_IRQCHIP:
4015         case KVM_CAP_IMMEDIATE_EXIT:
4016         case KVM_CAP_PMU_EVENT_FILTER:
4017         case KVM_CAP_GET_MSR_FEATURES:
4018         case KVM_CAP_MSR_PLATFORM_INFO:
4019         case KVM_CAP_EXCEPTION_PAYLOAD:
4020         case KVM_CAP_SET_GUEST_DEBUG:
4021         case KVM_CAP_LAST_CPU:
4022         case KVM_CAP_X86_USER_SPACE_MSR:
4023         case KVM_CAP_X86_MSR_FILTER:
4024         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4025 #ifdef CONFIG_X86_SGX_KVM
4026         case KVM_CAP_SGX_ATTRIBUTE:
4027 #endif
4028         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
4029         case KVM_CAP_SREGS2:
4030         case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
4031                 r = 1;
4032                 break;
4033         case KVM_CAP_EXIT_HYPERCALL:
4034                 r = KVM_EXIT_HYPERCALL_VALID_MASK;
4035                 break;
4036         case KVM_CAP_SET_GUEST_DEBUG2:
4037                 return KVM_GUESTDBG_VALID_MASK;
4038 #ifdef CONFIG_KVM_XEN
4039         case KVM_CAP_XEN_HVM:
4040                 r = KVM_XEN_HVM_CONFIG_HYPERCALL_MSR |
4041                     KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL |
4042                     KVM_XEN_HVM_CONFIG_SHARED_INFO;
4043                 if (sched_info_on())
4044                         r |= KVM_XEN_HVM_CONFIG_RUNSTATE;
4045                 break;
4046 #endif
4047         case KVM_CAP_SYNC_REGS:
4048                 r = KVM_SYNC_X86_VALID_FIELDS;
4049                 break;
4050         case KVM_CAP_ADJUST_CLOCK:
4051                 r = KVM_CLOCK_TSC_STABLE;
4052                 break;
4053         case KVM_CAP_X86_DISABLE_EXITS:
4054                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
4055                       KVM_X86_DISABLE_EXITS_CSTATE;
4056                 if(kvm_can_mwait_in_guest())
4057                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
4058                 break;
4059         case KVM_CAP_X86_SMM:
4060                 /* SMBASE is usually relocated above 1M on modern chipsets,
4061                  * and SMM handlers might indeed rely on 4G segment limits,
4062                  * so do not report SMM to be available if real mode is
4063                  * emulated via vm86 mode.  Still, do not go to great lengths
4064                  * to avoid userspace's usage of the feature, because it is a
4065                  * fringe case that is not enabled except via specific settings
4066                  * of the module parameters.
4067                  */
4068                 r = static_call(kvm_x86_has_emulated_msr)(kvm, MSR_IA32_SMBASE);
4069                 break;
4070         case KVM_CAP_VAPIC:
4071                 r = !static_call(kvm_x86_cpu_has_accelerated_tpr)();
4072                 break;
4073         case KVM_CAP_NR_VCPUS:
4074                 r = KVM_SOFT_MAX_VCPUS;
4075                 break;
4076         case KVM_CAP_MAX_VCPUS:
4077                 r = KVM_MAX_VCPUS;
4078                 break;
4079         case KVM_CAP_MAX_VCPU_ID:
4080                 r = KVM_MAX_VCPU_ID;
4081                 break;
4082         case KVM_CAP_PV_MMU:    /* obsolete */
4083                 r = 0;
4084                 break;
4085         case KVM_CAP_MCE:
4086                 r = KVM_MAX_MCE_BANKS;
4087                 break;
4088         case KVM_CAP_XCRS:
4089                 r = boot_cpu_has(X86_FEATURE_XSAVE);
4090                 break;
4091         case KVM_CAP_TSC_CONTROL:
4092                 r = kvm_has_tsc_control;
4093                 break;
4094         case KVM_CAP_X2APIC_API:
4095                 r = KVM_X2APIC_API_VALID_FLAGS;
4096                 break;
4097         case KVM_CAP_NESTED_STATE:
4098                 r = kvm_x86_ops.nested_ops->get_state ?
4099                         kvm_x86_ops.nested_ops->get_state(NULL, NULL, 0) : 0;
4100                 break;
4101         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4102                 r = kvm_x86_ops.enable_direct_tlbflush != NULL;
4103                 break;
4104         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4105                 r = kvm_x86_ops.nested_ops->enable_evmcs != NULL;
4106                 break;
4107         case KVM_CAP_SMALLER_MAXPHYADDR:
4108                 r = (int) allow_smaller_maxphyaddr;
4109                 break;
4110         case KVM_CAP_STEAL_TIME:
4111                 r = sched_info_on();
4112                 break;
4113         case KVM_CAP_X86_BUS_LOCK_EXIT:
4114                 if (kvm_has_bus_lock_exit)
4115                         r = KVM_BUS_LOCK_DETECTION_OFF |
4116                             KVM_BUS_LOCK_DETECTION_EXIT;
4117                 else
4118                         r = 0;
4119                 break;
4120         default:
4121                 break;
4122         }
4123         return r;
4124
4125 }
4126
4127 long kvm_arch_dev_ioctl(struct file *filp,
4128                         unsigned int ioctl, unsigned long arg)
4129 {
4130         void __user *argp = (void __user *)arg;
4131         long r;
4132
4133         switch (ioctl) {
4134         case KVM_GET_MSR_INDEX_LIST: {
4135                 struct kvm_msr_list __user *user_msr_list = argp;
4136                 struct kvm_msr_list msr_list;
4137                 unsigned n;
4138
4139                 r = -EFAULT;
4140                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4141                         goto out;
4142                 n = msr_list.nmsrs;
4143                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
4144                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4145                         goto out;
4146                 r = -E2BIG;
4147                 if (n < msr_list.nmsrs)
4148                         goto out;
4149                 r = -EFAULT;
4150                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
4151                                  num_msrs_to_save * sizeof(u32)))
4152                         goto out;
4153                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
4154                                  &emulated_msrs,
4155                                  num_emulated_msrs * sizeof(u32)))
4156                         goto out;
4157                 r = 0;
4158                 break;
4159         }
4160         case KVM_GET_SUPPORTED_CPUID:
4161         case KVM_GET_EMULATED_CPUID: {
4162                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4163                 struct kvm_cpuid2 cpuid;
4164
4165                 r = -EFAULT;
4166                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4167                         goto out;
4168
4169                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
4170                                             ioctl);
4171                 if (r)
4172                         goto out;
4173
4174                 r = -EFAULT;
4175                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4176                         goto out;
4177                 r = 0;
4178                 break;
4179         }
4180         case KVM_X86_GET_MCE_CAP_SUPPORTED:
4181                 r = -EFAULT;
4182                 if (copy_to_user(argp, &kvm_mce_cap_supported,
4183                                  sizeof(kvm_mce_cap_supported)))
4184                         goto out;
4185                 r = 0;
4186                 break;
4187         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
4188                 struct kvm_msr_list __user *user_msr_list = argp;
4189                 struct kvm_msr_list msr_list;
4190                 unsigned int n;
4191
4192                 r = -EFAULT;
4193                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4194                         goto out;
4195                 n = msr_list.nmsrs;
4196                 msr_list.nmsrs = num_msr_based_features;
4197                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4198                         goto out;
4199                 r = -E2BIG;
4200                 if (n < msr_list.nmsrs)
4201                         goto out;
4202                 r = -EFAULT;
4203                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
4204                                  num_msr_based_features * sizeof(u32)))
4205                         goto out;
4206                 r = 0;
4207                 break;
4208         }
4209         case KVM_GET_MSRS:
4210                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
4211                 break;
4212         case KVM_GET_SUPPORTED_HV_CPUID:
4213                 r = kvm_ioctl_get_supported_hv_cpuid(NULL, argp);
4214                 break;
4215         default:
4216                 r = -EINVAL;
4217                 break;
4218         }
4219 out:
4220         return r;
4221 }
4222
4223 static void wbinvd_ipi(void *garbage)
4224 {
4225         wbinvd();
4226 }
4227
4228 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
4229 {
4230         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
4231 }
4232
4233 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
4234 {
4235         /* Address WBINVD may be executed by guest */
4236         if (need_emulate_wbinvd(vcpu)) {
4237                 if (static_call(kvm_x86_has_wbinvd_exit)())
4238                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4239                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
4240                         smp_call_function_single(vcpu->cpu,
4241                                         wbinvd_ipi, NULL, 1);
4242         }
4243
4244         static_call(kvm_x86_vcpu_load)(vcpu, cpu);
4245
4246         /* Save host pkru register if supported */
4247         vcpu->arch.host_pkru = read_pkru();
4248
4249         /* Apply any externally detected TSC adjustments (due to suspend) */
4250         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
4251                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
4252                 vcpu->arch.tsc_offset_adjustment = 0;
4253                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4254         }
4255
4256         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
4257                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
4258                                 rdtsc() - vcpu->arch.last_host_tsc;
4259                 if (tsc_delta < 0)
4260                         mark_tsc_unstable("KVM discovered backwards TSC");
4261
4262                 if (kvm_check_tsc_unstable()) {
4263                         u64 offset = kvm_compute_l1_tsc_offset(vcpu,
4264                                                 vcpu->arch.last_guest_tsc);
4265                         kvm_vcpu_write_tsc_offset(vcpu, offset);
4266                         vcpu->arch.tsc_catchup = 1;
4267                 }
4268
4269                 if (kvm_lapic_hv_timer_in_use(vcpu))
4270                         kvm_lapic_restart_hv_timer(vcpu);
4271
4272                 /*
4273                  * On a host with synchronized TSC, there is no need to update
4274                  * kvmclock on vcpu->cpu migration
4275                  */
4276                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
4277                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
4278                 if (vcpu->cpu != cpu)
4279                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
4280                 vcpu->cpu = cpu;
4281         }
4282
4283         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
4284 }
4285
4286 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
4287 {
4288         struct kvm_host_map map;
4289         struct kvm_steal_time *st;
4290
4291         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
4292                 return;
4293
4294         if (vcpu->arch.st.preempted)
4295                 return;
4296
4297         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT, &map,
4298                         &vcpu->arch.st.cache, true))
4299                 return;
4300
4301         st = map.hva +
4302                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
4303
4304         st->preempted = vcpu->arch.st.preempted = KVM_VCPU_PREEMPTED;
4305
4306         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, true);
4307 }
4308
4309 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
4310 {
4311         int idx;
4312
4313         if (vcpu->preempted && !vcpu->arch.guest_state_protected)
4314                 vcpu->arch.preempted_in_kernel = !static_call(kvm_x86_get_cpl)(vcpu);
4315
4316         /*
4317          * Take the srcu lock as memslots will be accessed to check the gfn
4318          * cache generation against the memslots generation.
4319          */
4320         idx = srcu_read_lock(&vcpu->kvm->srcu);
4321         if (kvm_xen_msr_enabled(vcpu->kvm))
4322                 kvm_xen_runstate_set_preempted(vcpu);
4323         else
4324                 kvm_steal_time_set_preempted(vcpu);
4325         srcu_read_unlock(&vcpu->kvm->srcu, idx);
4326
4327         static_call(kvm_x86_vcpu_put)(vcpu);
4328         vcpu->arch.last_host_tsc = rdtsc();
4329 }
4330
4331 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
4332                                     struct kvm_lapic_state *s)
4333 {
4334         if (vcpu->arch.apicv_active)
4335                 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
4336
4337         return kvm_apic_get_state(vcpu, s);
4338 }
4339
4340 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
4341                                     struct kvm_lapic_state *s)
4342 {
4343         int r;
4344
4345         r = kvm_apic_set_state(vcpu, s);
4346         if (r)
4347                 return r;
4348         update_cr8_intercept(vcpu);
4349
4350         return 0;
4351 }
4352
4353 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
4354 {
4355         /*
4356          * We can accept userspace's request for interrupt injection
4357          * as long as we have a place to store the interrupt number.
4358          * The actual injection will happen when the CPU is able to
4359          * deliver the interrupt.
4360          */
4361         if (kvm_cpu_has_extint(vcpu))
4362                 return false;
4363
4364         /* Acknowledging ExtINT does not happen if LINT0 is masked.  */
4365         return (!lapic_in_kernel(vcpu) ||
4366                 kvm_apic_accept_pic_intr(vcpu));
4367 }
4368
4369 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
4370 {
4371         /*
4372          * Do not cause an interrupt window exit if an exception
4373          * is pending or an event needs reinjection; userspace
4374          * might want to inject the interrupt manually using KVM_SET_REGS
4375          * or KVM_SET_SREGS.  For that to work, we must be at an
4376          * instruction boundary and with no events half-injected.
4377          */
4378         return (kvm_arch_interrupt_allowed(vcpu) &&
4379                 kvm_cpu_accept_dm_intr(vcpu) &&
4380                 !kvm_event_needs_reinjection(vcpu) &&
4381                 !vcpu->arch.exception.pending);
4382 }
4383
4384 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
4385                                     struct kvm_interrupt *irq)
4386 {
4387         if (irq->irq >= KVM_NR_INTERRUPTS)
4388                 return -EINVAL;
4389
4390         if (!irqchip_in_kernel(vcpu->kvm)) {
4391                 kvm_queue_interrupt(vcpu, irq->irq, false);
4392                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4393                 return 0;
4394         }
4395
4396         /*
4397          * With in-kernel LAPIC, we only use this to inject EXTINT, so
4398          * fail for in-kernel 8259.
4399          */
4400         if (pic_in_kernel(vcpu->kvm))
4401                 return -ENXIO;
4402
4403         if (vcpu->arch.pending_external_vector != -1)
4404                 return -EEXIST;
4405
4406         vcpu->arch.pending_external_vector = irq->irq;
4407         kvm_make_request(KVM_REQ_EVENT, vcpu);
4408         return 0;
4409 }
4410
4411 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
4412 {
4413         kvm_inject_nmi(vcpu);
4414
4415         return 0;
4416 }
4417
4418 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
4419 {
4420         kvm_make_request(KVM_REQ_SMI, vcpu);
4421
4422         return 0;
4423 }
4424
4425 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
4426                                            struct kvm_tpr_access_ctl *tac)
4427 {
4428         if (tac->flags)
4429                 return -EINVAL;
4430         vcpu->arch.tpr_access_reporting = !!tac->enabled;
4431         return 0;
4432 }
4433
4434 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
4435                                         u64 mcg_cap)
4436 {
4437         int r;
4438         unsigned bank_num = mcg_cap & 0xff, bank;
4439
4440         r = -EINVAL;
4441         if (!bank_num || bank_num > KVM_MAX_MCE_BANKS)
4442                 goto out;
4443         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
4444                 goto out;
4445         r = 0;
4446         vcpu->arch.mcg_cap = mcg_cap;
4447         /* Init IA32_MCG_CTL to all 1s */
4448         if (mcg_cap & MCG_CTL_P)
4449                 vcpu->arch.mcg_ctl = ~(u64)0;
4450         /* Init IA32_MCi_CTL to all 1s */
4451         for (bank = 0; bank < bank_num; bank++)
4452                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
4453
4454         static_call(kvm_x86_setup_mce)(vcpu);
4455 out:
4456         return r;
4457 }
4458
4459 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
4460                                       struct kvm_x86_mce *mce)
4461 {
4462         u64 mcg_cap = vcpu->arch.mcg_cap;
4463         unsigned bank_num = mcg_cap & 0xff;
4464         u64 *banks = vcpu->arch.mce_banks;
4465
4466         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
4467                 return -EINVAL;
4468         /*
4469          * if IA32_MCG_CTL is not all 1s, the uncorrected error
4470          * reporting is disabled
4471          */
4472         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
4473             vcpu->arch.mcg_ctl != ~(u64)0)
4474                 return 0;
4475         banks += 4 * mce->bank;
4476         /*
4477          * if IA32_MCi_CTL is not all 1s, the uncorrected error
4478          * reporting is disabled for the bank
4479          */
4480         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
4481                 return 0;
4482         if (mce->status & MCI_STATUS_UC) {
4483                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
4484                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
4485                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
4486                         return 0;
4487                 }
4488                 if (banks[1] & MCI_STATUS_VAL)
4489                         mce->status |= MCI_STATUS_OVER;
4490                 banks[2] = mce->addr;
4491                 banks[3] = mce->misc;
4492                 vcpu->arch.mcg_status = mce->mcg_status;
4493                 banks[1] = mce->status;
4494                 kvm_queue_exception(vcpu, MC_VECTOR);
4495         } else if (!(banks[1] & MCI_STATUS_VAL)
4496                    || !(banks[1] & MCI_STATUS_UC)) {
4497                 if (banks[1] & MCI_STATUS_VAL)
4498                         mce->status |= MCI_STATUS_OVER;
4499                 banks[2] = mce->addr;
4500                 banks[3] = mce->misc;
4501                 banks[1] = mce->status;
4502         } else
4503                 banks[1] |= MCI_STATUS_OVER;
4504         return 0;
4505 }
4506
4507 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
4508                                                struct kvm_vcpu_events *events)
4509 {
4510         process_nmi(vcpu);
4511
4512         if (kvm_check_request(KVM_REQ_SMI, vcpu))
4513                 process_smi(vcpu);
4514
4515         /*
4516          * In guest mode, payload delivery should be deferred,
4517          * so that the L1 hypervisor can intercept #PF before
4518          * CR2 is modified (or intercept #DB before DR6 is
4519          * modified under nVMX). Unless the per-VM capability,
4520          * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4521          * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4522          * opportunistically defer the exception payload, deliver it if the
4523          * capability hasn't been requested before processing a
4524          * KVM_GET_VCPU_EVENTS.
4525          */
4526         if (!vcpu->kvm->arch.exception_payload_enabled &&
4527             vcpu->arch.exception.pending && vcpu->arch.exception.has_payload)
4528                 kvm_deliver_exception_payload(vcpu);
4529
4530         /*
4531          * The API doesn't provide the instruction length for software
4532          * exceptions, so don't report them. As long as the guest RIP
4533          * isn't advanced, we should expect to encounter the exception
4534          * again.
4535          */
4536         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
4537                 events->exception.injected = 0;
4538                 events->exception.pending = 0;
4539         } else {
4540                 events->exception.injected = vcpu->arch.exception.injected;
4541                 events->exception.pending = vcpu->arch.exception.pending;
4542                 /*
4543                  * For ABI compatibility, deliberately conflate
4544                  * pending and injected exceptions when
4545                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4546                  */
4547                 if (!vcpu->kvm->arch.exception_payload_enabled)
4548                         events->exception.injected |=
4549                                 vcpu->arch.exception.pending;
4550         }
4551         events->exception.nr = vcpu->arch.exception.nr;
4552         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
4553         events->exception.error_code = vcpu->arch.exception.error_code;
4554         events->exception_has_payload = vcpu->arch.exception.has_payload;
4555         events->exception_payload = vcpu->arch.exception.payload;
4556
4557         events->interrupt.injected =
4558                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
4559         events->interrupt.nr = vcpu->arch.interrupt.nr;
4560         events->interrupt.soft = 0;
4561         events->interrupt.shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
4562
4563         events->nmi.injected = vcpu->arch.nmi_injected;
4564         events->nmi.pending = vcpu->arch.nmi_pending != 0;
4565         events->nmi.masked = static_call(kvm_x86_get_nmi_mask)(vcpu);
4566         events->nmi.pad = 0;
4567
4568         events->sipi_vector = 0; /* never valid when reporting to user space */
4569
4570         events->smi.smm = is_smm(vcpu);
4571         events->smi.pending = vcpu->arch.smi_pending;
4572         events->smi.smm_inside_nmi =
4573                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
4574         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
4575
4576         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
4577                          | KVM_VCPUEVENT_VALID_SHADOW
4578                          | KVM_VCPUEVENT_VALID_SMM);
4579         if (vcpu->kvm->arch.exception_payload_enabled)
4580                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
4581
4582         memset(&events->reserved, 0, sizeof(events->reserved));
4583 }
4584
4585 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm);
4586
4587 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
4588                                               struct kvm_vcpu_events *events)
4589 {
4590         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4591                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4592                               | KVM_VCPUEVENT_VALID_SHADOW
4593                               | KVM_VCPUEVENT_VALID_SMM
4594                               | KVM_VCPUEVENT_VALID_PAYLOAD))
4595                 return -EINVAL;
4596
4597         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
4598                 if (!vcpu->kvm->arch.exception_payload_enabled)
4599                         return -EINVAL;
4600                 if (events->exception.pending)
4601                         events->exception.injected = 0;
4602                 else
4603                         events->exception_has_payload = 0;
4604         } else {
4605                 events->exception.pending = 0;
4606                 events->exception_has_payload = 0;
4607         }
4608
4609         if ((events->exception.injected || events->exception.pending) &&
4610             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
4611                 return -EINVAL;
4612
4613         /* INITs are latched while in SMM */
4614         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
4615             (events->smi.smm || events->smi.pending) &&
4616             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
4617                 return -EINVAL;
4618
4619         process_nmi(vcpu);
4620         vcpu->arch.exception.injected = events->exception.injected;
4621         vcpu->arch.exception.pending = events->exception.pending;
4622         vcpu->arch.exception.nr = events->exception.nr;
4623         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
4624         vcpu->arch.exception.error_code = events->exception.error_code;
4625         vcpu->arch.exception.has_payload = events->exception_has_payload;
4626         vcpu->arch.exception.payload = events->exception_payload;
4627
4628         vcpu->arch.interrupt.injected = events->interrupt.injected;
4629         vcpu->arch.interrupt.nr = events->interrupt.nr;
4630         vcpu->arch.interrupt.soft = events->interrupt.soft;
4631         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
4632                 static_call(kvm_x86_set_interrupt_shadow)(vcpu,
4633                                                 events->interrupt.shadow);
4634
4635         vcpu->arch.nmi_injected = events->nmi.injected;
4636         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
4637                 vcpu->arch.nmi_pending = events->nmi.pending;
4638         static_call(kvm_x86_set_nmi_mask)(vcpu, events->nmi.masked);
4639
4640         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
4641             lapic_in_kernel(vcpu))
4642                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
4643
4644         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
4645                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm)
4646                         kvm_smm_changed(vcpu, events->smi.smm);
4647
4648                 vcpu->arch.smi_pending = events->smi.pending;
4649
4650                 if (events->smi.smm) {
4651                         if (events->smi.smm_inside_nmi)
4652                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
4653                         else
4654                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
4655                 }
4656
4657                 if (lapic_in_kernel(vcpu)) {
4658                         if (events->smi.latched_init)
4659                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4660                         else
4661                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4662                 }
4663         }
4664
4665         kvm_make_request(KVM_REQ_EVENT, vcpu);
4666
4667         return 0;
4668 }
4669
4670 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
4671                                              struct kvm_debugregs *dbgregs)
4672 {
4673         unsigned long val;
4674
4675         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
4676         kvm_get_dr(vcpu, 6, &val);
4677         dbgregs->dr6 = val;
4678         dbgregs->dr7 = vcpu->arch.dr7;
4679         dbgregs->flags = 0;
4680         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
4681 }
4682
4683 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
4684                                             struct kvm_debugregs *dbgregs)
4685 {
4686         if (dbgregs->flags)
4687                 return -EINVAL;
4688
4689         if (!kvm_dr6_valid(dbgregs->dr6))
4690                 return -EINVAL;
4691         if (!kvm_dr7_valid(dbgregs->dr7))
4692                 return -EINVAL;
4693
4694         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
4695         kvm_update_dr0123(vcpu);
4696         vcpu->arch.dr6 = dbgregs->dr6;
4697         vcpu->arch.dr7 = dbgregs->dr7;
4698         kvm_update_dr7(vcpu);
4699
4700         return 0;
4701 }
4702
4703 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
4704
4705 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
4706 {
4707         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4708         u64 xstate_bv = xsave->header.xfeatures;
4709         u64 valid;
4710
4711         /*
4712          * Copy legacy XSAVE area, to avoid complications with CPUID
4713          * leaves 0 and 1 in the loop below.
4714          */
4715         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
4716
4717         /* Set XSTATE_BV */
4718         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
4719         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
4720
4721         /*
4722          * Copy each region from the possibly compacted offset to the
4723          * non-compacted offset.
4724          */
4725         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4726         while (valid) {
4727                 u32 size, offset, ecx, edx;
4728                 u64 xfeature_mask = valid & -valid;
4729                 int xfeature_nr = fls64(xfeature_mask) - 1;
4730                 void *src;
4731
4732                 cpuid_count(XSTATE_CPUID, xfeature_nr,
4733                             &size, &offset, &ecx, &edx);
4734
4735                 if (xfeature_nr == XFEATURE_PKRU) {
4736                         memcpy(dest + offset, &vcpu->arch.pkru,
4737                                sizeof(vcpu->arch.pkru));
4738                 } else {
4739                         src = get_xsave_addr(xsave, xfeature_nr);
4740                         if (src)
4741                                 memcpy(dest + offset, src, size);
4742                 }
4743
4744                 valid -= xfeature_mask;
4745         }
4746 }
4747
4748 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
4749 {
4750         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4751         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
4752         u64 valid;
4753
4754         /*
4755          * Copy legacy XSAVE area, to avoid complications with CPUID
4756          * leaves 0 and 1 in the loop below.
4757          */
4758         memcpy(xsave, src, XSAVE_HDR_OFFSET);
4759
4760         /* Set XSTATE_BV and possibly XCOMP_BV.  */
4761         xsave->header.xfeatures = xstate_bv;
4762         if (boot_cpu_has(X86_FEATURE_XSAVES))
4763                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
4764
4765         /*
4766          * Copy each region from the non-compacted offset to the
4767          * possibly compacted offset.
4768          */
4769         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4770         while (valid) {
4771                 u32 size, offset, ecx, edx;
4772                 u64 xfeature_mask = valid & -valid;
4773                 int xfeature_nr = fls64(xfeature_mask) - 1;
4774
4775                 cpuid_count(XSTATE_CPUID, xfeature_nr,
4776                             &size, &offset, &ecx, &edx);
4777
4778                 if (xfeature_nr == XFEATURE_PKRU) {
4779                         memcpy(&vcpu->arch.pkru, src + offset,
4780                                sizeof(vcpu->arch.pkru));
4781                 } else {
4782                         void *dest = get_xsave_addr(xsave, xfeature_nr);
4783
4784                         if (dest)
4785                                 memcpy(dest, src + offset, size);
4786                 }
4787
4788                 valid -= xfeature_mask;
4789         }
4790 }
4791
4792 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
4793                                          struct kvm_xsave *guest_xsave)
4794 {
4795         if (!vcpu->arch.guest_fpu)
4796                 return;
4797
4798         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4799                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
4800                 fill_xsave((u8 *) guest_xsave->region, vcpu);
4801         } else {
4802                 memcpy(guest_xsave->region,
4803                         &vcpu->arch.guest_fpu->state.fxsave,
4804                         sizeof(struct fxregs_state));
4805                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
4806                         XFEATURE_MASK_FPSSE;
4807         }
4808 }
4809
4810 #define XSAVE_MXCSR_OFFSET 24
4811
4812 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
4813                                         struct kvm_xsave *guest_xsave)
4814 {
4815         u64 xstate_bv;
4816         u32 mxcsr;
4817
4818         if (!vcpu->arch.guest_fpu)
4819                 return 0;
4820
4821         xstate_bv = *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
4822         mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
4823
4824         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4825                 /*
4826                  * Here we allow setting states that are not present in
4827                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
4828                  * with old userspace.
4829                  */
4830                 if (xstate_bv & ~supported_xcr0 || mxcsr & ~mxcsr_feature_mask)
4831                         return -EINVAL;
4832                 load_xsave(vcpu, (u8 *)guest_xsave->region);
4833         } else {
4834                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
4835                         mxcsr & ~mxcsr_feature_mask)
4836                         return -EINVAL;
4837                 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
4838                         guest_xsave->region, sizeof(struct fxregs_state));
4839         }
4840         return 0;
4841 }
4842
4843 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
4844                                         struct kvm_xcrs *guest_xcrs)
4845 {
4846         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
4847                 guest_xcrs->nr_xcrs = 0;
4848                 return;
4849         }
4850
4851         guest_xcrs->nr_xcrs = 1;
4852         guest_xcrs->flags = 0;
4853         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
4854         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
4855 }
4856
4857 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
4858                                        struct kvm_xcrs *guest_xcrs)
4859 {
4860         int i, r = 0;
4861
4862         if (!boot_cpu_has(X86_FEATURE_XSAVE))
4863                 return -EINVAL;
4864
4865         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
4866                 return -EINVAL;
4867
4868         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
4869                 /* Only support XCR0 currently */
4870                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
4871                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
4872                                 guest_xcrs->xcrs[i].value);
4873                         break;
4874                 }
4875         if (r)
4876                 r = -EINVAL;
4877         return r;
4878 }
4879
4880 /*
4881  * kvm_set_guest_paused() indicates to the guest kernel that it has been
4882  * stopped by the hypervisor.  This function will be called from the host only.
4883  * EINVAL is returned when the host attempts to set the flag for a guest that
4884  * does not support pv clocks.
4885  */
4886 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
4887 {
4888         if (!vcpu->arch.pv_time_enabled)
4889                 return -EINVAL;
4890         vcpu->arch.pvclock_set_guest_stopped_request = true;
4891         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4892         return 0;
4893 }
4894
4895 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
4896                                      struct kvm_enable_cap *cap)
4897 {
4898         int r;
4899         uint16_t vmcs_version;
4900         void __user *user_ptr;
4901
4902         if (cap->flags)
4903                 return -EINVAL;
4904
4905         switch (cap->cap) {
4906         case KVM_CAP_HYPERV_SYNIC2:
4907                 if (cap->args[0])
4908                         return -EINVAL;
4909                 fallthrough;
4910
4911         case KVM_CAP_HYPERV_SYNIC:
4912                 if (!irqchip_in_kernel(vcpu->kvm))
4913                         return -EINVAL;
4914                 return kvm_hv_activate_synic(vcpu, cap->cap ==
4915                                              KVM_CAP_HYPERV_SYNIC2);
4916         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4917                 if (!kvm_x86_ops.nested_ops->enable_evmcs)
4918                         return -ENOTTY;
4919                 r = kvm_x86_ops.nested_ops->enable_evmcs(vcpu, &vmcs_version);
4920                 if (!r) {
4921                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
4922                         if (copy_to_user(user_ptr, &vmcs_version,
4923                                          sizeof(vmcs_version)))
4924                                 r = -EFAULT;
4925                 }
4926                 return r;
4927         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4928                 if (!kvm_x86_ops.enable_direct_tlbflush)
4929                         return -ENOTTY;
4930
4931                 return static_call(kvm_x86_enable_direct_tlbflush)(vcpu);
4932
4933         case KVM_CAP_HYPERV_ENFORCE_CPUID:
4934                 return kvm_hv_set_enforce_cpuid(vcpu, cap->args[0]);
4935
4936         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4937                 vcpu->arch.pv_cpuid.enforce = cap->args[0];
4938                 if (vcpu->arch.pv_cpuid.enforce)
4939                         kvm_update_pv_runtime(vcpu);
4940
4941                 return 0;
4942         default:
4943                 return -EINVAL;
4944         }
4945 }
4946
4947 long kvm_arch_vcpu_ioctl(struct file *filp,
4948                          unsigned int ioctl, unsigned long arg)
4949 {
4950         struct kvm_vcpu *vcpu = filp->private_data;
4951         void __user *argp = (void __user *)arg;
4952         int r;
4953         union {
4954                 struct kvm_sregs2 *sregs2;
4955                 struct kvm_lapic_state *lapic;
4956                 struct kvm_xsave *xsave;
4957                 struct kvm_xcrs *xcrs;
4958                 void *buffer;
4959         } u;
4960
4961         vcpu_load(vcpu);
4962
4963         u.buffer = NULL;
4964         switch (ioctl) {
4965         case KVM_GET_LAPIC: {
4966                 r = -EINVAL;
4967                 if (!lapic_in_kernel(vcpu))
4968                         goto out;
4969                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
4970                                 GFP_KERNEL_ACCOUNT);
4971
4972                 r = -ENOMEM;
4973                 if (!u.lapic)
4974                         goto out;
4975                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
4976                 if (r)
4977                         goto out;
4978                 r = -EFAULT;
4979                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
4980                         goto out;
4981                 r = 0;
4982                 break;
4983         }
4984         case KVM_SET_LAPIC: {
4985                 r = -EINVAL;
4986                 if (!lapic_in_kernel(vcpu))
4987                         goto out;
4988                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
4989                 if (IS_ERR(u.lapic)) {
4990                         r = PTR_ERR(u.lapic);
4991                         goto out_nofree;
4992                 }
4993
4994                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
4995                 break;
4996         }
4997         case KVM_INTERRUPT: {
4998                 struct kvm_interrupt irq;
4999
5000                 r = -EFAULT;
5001                 if (copy_from_user(&irq, argp, sizeof(irq)))
5002                         goto out;
5003                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
5004                 break;
5005         }
5006         case KVM_NMI: {
5007                 r = kvm_vcpu_ioctl_nmi(vcpu);
5008                 break;
5009         }
5010         case KVM_SMI: {
5011                 r = kvm_vcpu_ioctl_smi(vcpu);
5012                 break;
5013         }
5014         case KVM_SET_CPUID: {
5015                 struct kvm_cpuid __user *cpuid_arg = argp;
5016                 struct kvm_cpuid cpuid;
5017
5018                 r = -EFAULT;
5019                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5020                         goto out;
5021                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
5022                 break;
5023         }
5024         case KVM_SET_CPUID2: {
5025                 struct kvm_cpuid2 __user *cpuid_arg = argp;
5026                 struct kvm_cpuid2 cpuid;
5027
5028                 r = -EFAULT;
5029                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5030                         goto out;
5031                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
5032                                               cpuid_arg->entries);
5033                 break;
5034         }
5035         case KVM_GET_CPUID2: {
5036                 struct kvm_cpuid2 __user *cpuid_arg = argp;
5037                 struct kvm_cpuid2 cpuid;
5038
5039                 r = -EFAULT;
5040                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5041                         goto out;
5042                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
5043                                               cpuid_arg->entries);
5044                 if (r)
5045                         goto out;
5046                 r = -EFAULT;
5047                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
5048                         goto out;
5049                 r = 0;
5050                 break;
5051         }
5052         case KVM_GET_MSRS: {
5053                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5054                 r = msr_io(vcpu, argp, do_get_msr, 1);
5055                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5056                 break;
5057         }
5058         case KVM_SET_MSRS: {
5059                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5060                 r = msr_io(vcpu, argp, do_set_msr, 0);
5061                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5062                 break;
5063         }
5064         case KVM_TPR_ACCESS_REPORTING: {
5065                 struct kvm_tpr_access_ctl tac;
5066
5067                 r = -EFAULT;
5068                 if (copy_from_user(&tac, argp, sizeof(tac)))
5069                         goto out;
5070                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
5071                 if (r)
5072                         goto out;
5073                 r = -EFAULT;
5074                 if (copy_to_user(argp, &tac, sizeof(tac)))
5075                         goto out;
5076                 r = 0;
5077                 break;
5078         };
5079         case KVM_SET_VAPIC_ADDR: {
5080                 struct kvm_vapic_addr va;
5081                 int idx;
5082
5083                 r = -EINVAL;
5084                 if (!lapic_in_kernel(vcpu))
5085                         goto out;
5086                 r = -EFAULT;
5087                 if (copy_from_user(&va, argp, sizeof(va)))
5088                         goto out;
5089                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5090                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
5091                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5092                 break;
5093         }
5094         case KVM_X86_SETUP_MCE: {
5095                 u64 mcg_cap;
5096
5097                 r = -EFAULT;
5098                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
5099                         goto out;
5100                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
5101                 break;
5102         }
5103         case KVM_X86_SET_MCE: {
5104                 struct kvm_x86_mce mce;
5105
5106                 r = -EFAULT;
5107                 if (copy_from_user(&mce, argp, sizeof(mce)))
5108                         goto out;
5109                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
5110                 break;
5111         }
5112         case KVM_GET_VCPU_EVENTS: {
5113                 struct kvm_vcpu_events events;
5114
5115                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
5116
5117                 r = -EFAULT;
5118                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
5119                         break;
5120                 r = 0;
5121                 break;
5122         }
5123         case KVM_SET_VCPU_EVENTS: {
5124                 struct kvm_vcpu_events events;
5125
5126                 r = -EFAULT;
5127                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
5128                         break;
5129
5130                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
5131                 break;
5132         }
5133         case KVM_GET_DEBUGREGS: {
5134                 struct kvm_debugregs dbgregs;
5135
5136                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
5137
5138                 r = -EFAULT;
5139                 if (copy_to_user(argp, &dbgregs,
5140                                  sizeof(struct kvm_debugregs)))
5141                         break;
5142                 r = 0;
5143                 break;
5144         }
5145         case KVM_SET_DEBUGREGS: {
5146                 struct kvm_debugregs dbgregs;
5147
5148                 r = -EFAULT;
5149                 if (copy_from_user(&dbgregs, argp,
5150                                    sizeof(struct kvm_debugregs)))
5151                         break;
5152
5153                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
5154                 break;
5155         }
5156         case KVM_GET_XSAVE: {
5157                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
5158                 r = -ENOMEM;
5159                 if (!u.xsave)
5160                         break;
5161
5162                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
5163
5164                 r = -EFAULT;
5165                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
5166                         break;
5167                 r = 0;
5168                 break;
5169         }
5170         case KVM_SET_XSAVE: {
5171                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
5172                 if (IS_ERR(u.xsave)) {
5173                         r = PTR_ERR(u.xsave);
5174                         goto out_nofree;
5175                 }
5176
5177                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
5178                 break;
5179         }
5180         case KVM_GET_XCRS: {
5181                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
5182                 r = -ENOMEM;
5183                 if (!u.xcrs)
5184                         break;
5185
5186                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
5187
5188                 r = -EFAULT;
5189                 if (copy_to_user(argp, u.xcrs,
5190                                  sizeof(struct kvm_xcrs)))
5191                         break;
5192                 r = 0;
5193                 break;
5194         }
5195         case KVM_SET_XCRS: {
5196                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
5197                 if (IS_ERR(u.xcrs)) {
5198                         r = PTR_ERR(u.xcrs);
5199                         goto out_nofree;
5200                 }
5201
5202                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
5203                 break;
5204         }
5205         case KVM_SET_TSC_KHZ: {
5206                 u32 user_tsc_khz;
5207
5208                 r = -EINVAL;
5209                 user_tsc_khz = (u32)arg;
5210
5211                 if (kvm_has_tsc_control &&
5212                     user_tsc_khz >= kvm_max_guest_tsc_khz)
5213                         goto out;
5214
5215                 if (user_tsc_khz == 0)
5216                         user_tsc_khz = tsc_khz;
5217
5218                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
5219                         r = 0;
5220
5221                 goto out;
5222         }
5223         case KVM_GET_TSC_KHZ: {
5224                 r = vcpu->arch.virtual_tsc_khz;
5225                 goto out;
5226         }
5227         case KVM_KVMCLOCK_CTRL: {
5228                 r = kvm_set_guest_paused(vcpu);
5229                 goto out;
5230         }
5231         case KVM_ENABLE_CAP: {
5232                 struct kvm_enable_cap cap;
5233
5234                 r = -EFAULT;
5235                 if (copy_from_user(&cap, argp, sizeof(cap)))
5236                         goto out;
5237                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
5238                 break;
5239         }
5240         case KVM_GET_NESTED_STATE: {
5241                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5242                 u32 user_data_size;
5243
5244                 r = -EINVAL;
5245                 if (!kvm_x86_ops.nested_ops->get_state)
5246                         break;
5247
5248                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
5249                 r = -EFAULT;
5250                 if (get_user(user_data_size, &user_kvm_nested_state->size))
5251                         break;
5252
5253                 r = kvm_x86_ops.nested_ops->get_state(vcpu, user_kvm_nested_state,
5254                                                      user_data_size);
5255                 if (r < 0)
5256                         break;
5257
5258                 if (r > user_data_size) {
5259                         if (put_user(r, &user_kvm_nested_state->size))
5260                                 r = -EFAULT;
5261                         else
5262                                 r = -E2BIG;
5263                         break;
5264                 }
5265
5266                 r = 0;
5267                 break;
5268         }
5269         case KVM_SET_NESTED_STATE: {
5270                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5271                 struct kvm_nested_state kvm_state;
5272                 int idx;
5273
5274                 r = -EINVAL;
5275                 if (!kvm_x86_ops.nested_ops->set_state)
5276                         break;
5277
5278                 r = -EFAULT;
5279                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
5280                         break;
5281
5282                 r = -EINVAL;
5283                 if (kvm_state.size < sizeof(kvm_state))
5284                         break;
5285
5286                 if (kvm_state.flags &
5287                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
5288                       | KVM_STATE_NESTED_EVMCS | KVM_STATE_NESTED_MTF_PENDING
5289                       | KVM_STATE_NESTED_GIF_SET))
5290                         break;
5291
5292                 /* nested_run_pending implies guest_mode.  */
5293                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
5294                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
5295                         break;
5296
5297                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5298                 r = kvm_x86_ops.nested_ops->set_state(vcpu, user_kvm_nested_state, &kvm_state);
5299                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5300                 break;
5301         }
5302         case KVM_GET_SUPPORTED_HV_CPUID:
5303                 r = kvm_ioctl_get_supported_hv_cpuid(vcpu, argp);
5304                 break;
5305 #ifdef CONFIG_KVM_XEN
5306         case KVM_XEN_VCPU_GET_ATTR: {
5307                 struct kvm_xen_vcpu_attr xva;
5308
5309                 r = -EFAULT;
5310                 if (copy_from_user(&xva, argp, sizeof(xva)))
5311                         goto out;
5312                 r = kvm_xen_vcpu_get_attr(vcpu, &xva);
5313                 if (!r && copy_to_user(argp, &xva, sizeof(xva)))
5314                         r = -EFAULT;
5315                 break;
5316         }
5317         case KVM_XEN_VCPU_SET_ATTR: {
5318                 struct kvm_xen_vcpu_attr xva;
5319
5320                 r = -EFAULT;
5321                 if (copy_from_user(&xva, argp, sizeof(xva)))
5322                         goto out;
5323                 r = kvm_xen_vcpu_set_attr(vcpu, &xva);
5324                 break;
5325         }
5326 #endif
5327         case KVM_GET_SREGS2: {
5328                 u.sregs2 = kzalloc(sizeof(struct kvm_sregs2), GFP_KERNEL);
5329                 r = -ENOMEM;
5330                 if (!u.sregs2)
5331                         goto out;
5332                 __get_sregs2(vcpu, u.sregs2);
5333                 r = -EFAULT;
5334                 if (copy_to_user(argp, u.sregs2, sizeof(struct kvm_sregs2)))
5335                         goto out;
5336                 r = 0;
5337                 break;
5338         }
5339         case KVM_SET_SREGS2: {
5340                 u.sregs2 = memdup_user(argp, sizeof(struct kvm_sregs2));
5341                 if (IS_ERR(u.sregs2)) {
5342                         r = PTR_ERR(u.sregs2);
5343                         u.sregs2 = NULL;
5344                         goto out;
5345                 }
5346                 r = __set_sregs2(vcpu, u.sregs2);
5347                 break;
5348         }
5349         default:
5350                 r = -EINVAL;
5351         }
5352 out:
5353         kfree(u.buffer);
5354 out_nofree:
5355         vcpu_put(vcpu);
5356         return r;
5357 }
5358
5359 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
5360 {
5361         return VM_FAULT_SIGBUS;
5362 }
5363
5364 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
5365 {
5366         int ret;
5367
5368         if (addr > (unsigned int)(-3 * PAGE_SIZE))
5369                 return -EINVAL;
5370         ret = static_call(kvm_x86_set_tss_addr)(kvm, addr);
5371         return ret;
5372 }
5373
5374 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
5375                                               u64 ident_addr)
5376 {
5377         return static_call(kvm_x86_set_identity_map_addr)(kvm, ident_addr);
5378 }
5379
5380 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
5381                                          unsigned long kvm_nr_mmu_pages)
5382 {
5383         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
5384                 return -EINVAL;
5385
5386         mutex_lock(&kvm->slots_lock);
5387
5388         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
5389         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
5390
5391         mutex_unlock(&kvm->slots_lock);
5392         return 0;
5393 }
5394
5395 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
5396 {
5397         return kvm->arch.n_max_mmu_pages;
5398 }
5399
5400 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5401 {
5402         struct kvm_pic *pic = kvm->arch.vpic;
5403         int r;
5404
5405         r = 0;
5406         switch (chip->chip_id) {
5407         case KVM_IRQCHIP_PIC_MASTER:
5408                 memcpy(&chip->chip.pic, &pic->pics[0],
5409                         sizeof(struct kvm_pic_state));
5410                 break;
5411         case KVM_IRQCHIP_PIC_SLAVE:
5412                 memcpy(&chip->chip.pic, &pic->pics[1],
5413                         sizeof(struct kvm_pic_state));
5414                 break;
5415         case KVM_IRQCHIP_IOAPIC:
5416                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
5417                 break;
5418         default:
5419                 r = -EINVAL;
5420                 break;
5421         }
5422         return r;
5423 }
5424
5425 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5426 {
5427         struct kvm_pic *pic = kvm->arch.vpic;
5428         int r;
5429
5430         r = 0;
5431         switch (chip->chip_id) {
5432         case KVM_IRQCHIP_PIC_MASTER:
5433                 spin_lock(&pic->lock);
5434                 memcpy(&pic->pics[0], &chip->chip.pic,
5435                         sizeof(struct kvm_pic_state));
5436                 spin_unlock(&pic->lock);
5437                 break;
5438         case KVM_IRQCHIP_PIC_SLAVE:
5439                 spin_lock(&pic->lock);
5440                 memcpy(&pic->pics[1], &chip->chip.pic,
5441                         sizeof(struct kvm_pic_state));
5442                 spin_unlock(&pic->lock);
5443                 break;
5444         case KVM_IRQCHIP_IOAPIC:
5445                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
5446                 break;
5447         default:
5448                 r = -EINVAL;
5449                 break;
5450         }
5451         kvm_pic_update_irq(pic);
5452         return r;
5453 }
5454
5455 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5456 {
5457         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
5458
5459         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
5460
5461         mutex_lock(&kps->lock);
5462         memcpy(ps, &kps->channels, sizeof(*ps));
5463         mutex_unlock(&kps->lock);
5464         return 0;
5465 }
5466
5467 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5468 {
5469         int i;
5470         struct kvm_pit *pit = kvm->arch.vpit;
5471
5472         mutex_lock(&pit->pit_state.lock);
5473         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
5474         for (i = 0; i < 3; i++)
5475                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
5476         mutex_unlock(&pit->pit_state.lock);
5477         return 0;
5478 }
5479
5480 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5481 {
5482         mutex_lock(&kvm->arch.vpit->pit_state.lock);
5483         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
5484                 sizeof(ps->channels));
5485         ps->flags = kvm->arch.vpit->pit_state.flags;
5486         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
5487         memset(&ps->reserved, 0, sizeof(ps->reserved));
5488         return 0;
5489 }
5490
5491 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5492 {
5493         int start = 0;
5494         int i;
5495         u32 prev_legacy, cur_legacy;
5496         struct kvm_pit *pit = kvm->arch.vpit;
5497
5498         mutex_lock(&pit->pit_state.lock);
5499         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
5500         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
5501         if (!prev_legacy && cur_legacy)
5502                 start = 1;
5503         memcpy(&pit->pit_state.channels, &ps->channels,
5504                sizeof(pit->pit_state.channels));
5505         pit->pit_state.flags = ps->flags;
5506         for (i = 0; i < 3; i++)
5507                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
5508                                    start && i == 0);
5509         mutex_unlock(&pit->pit_state.lock);
5510         return 0;
5511 }
5512
5513 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
5514                                  struct kvm_reinject_control *control)
5515 {
5516         struct kvm_pit *pit = kvm->arch.vpit;
5517
5518         /* pit->pit_state.lock was overloaded to prevent userspace from getting
5519          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5520          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
5521          */
5522         mutex_lock(&pit->pit_state.lock);
5523         kvm_pit_set_reinject(pit, control->pit_reinject);
5524         mutex_unlock(&pit->pit_state.lock);
5525
5526         return 0;
5527 }
5528
5529 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
5530 {
5531
5532         /*
5533          * Flush all CPUs' dirty log buffers to the  dirty_bitmap.  Called
5534          * before reporting dirty_bitmap to userspace.  KVM flushes the buffers
5535          * on all VM-Exits, thus we only need to kick running vCPUs to force a
5536          * VM-Exit.
5537          */
5538         struct kvm_vcpu *vcpu;
5539         int i;
5540
5541         kvm_for_each_vcpu(i, vcpu, kvm)
5542                 kvm_vcpu_kick(vcpu);
5543 }
5544
5545 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
5546                         bool line_status)
5547 {
5548         if (!irqchip_in_kernel(kvm))
5549                 return -ENXIO;
5550
5551         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
5552                                         irq_event->irq, irq_event->level,
5553                                         line_status);
5554         return 0;
5555 }
5556
5557 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
5558                             struct kvm_enable_cap *cap)
5559 {
5560         int r;
5561
5562         if (cap->flags)
5563                 return -EINVAL;
5564
5565         switch (cap->cap) {
5566         case KVM_CAP_DISABLE_QUIRKS:
5567                 kvm->arch.disabled_quirks = cap->args[0];
5568                 r = 0;
5569                 break;
5570         case KVM_CAP_SPLIT_IRQCHIP: {
5571                 mutex_lock(&kvm->lock);
5572                 r = -EINVAL;
5573                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
5574                         goto split_irqchip_unlock;
5575                 r = -EEXIST;
5576                 if (irqchip_in_kernel(kvm))
5577                         goto split_irqchip_unlock;
5578                 if (kvm->created_vcpus)
5579                         goto split_irqchip_unlock;
5580                 r = kvm_setup_empty_irq_routing(kvm);
5581                 if (r)
5582                         goto split_irqchip_unlock;
5583                 /* Pairs with irqchip_in_kernel. */
5584                 smp_wmb();
5585                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
5586                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
5587                 r = 0;
5588 split_irqchip_unlock:
5589                 mutex_unlock(&kvm->lock);
5590                 break;
5591         }
5592         case KVM_CAP_X2APIC_API:
5593                 r = -EINVAL;
5594                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
5595                         break;
5596
5597                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
5598                         kvm->arch.x2apic_format = true;
5599                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
5600                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
5601
5602                 r = 0;
5603                 break;
5604         case KVM_CAP_X86_DISABLE_EXITS:
5605                 r = -EINVAL;
5606                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
5607                         break;
5608
5609                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
5610                         kvm_can_mwait_in_guest())
5611                         kvm->arch.mwait_in_guest = true;
5612                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
5613                         kvm->arch.hlt_in_guest = true;
5614                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
5615                         kvm->arch.pause_in_guest = true;
5616                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
5617                         kvm->arch.cstate_in_guest = true;
5618                 r = 0;
5619                 break;
5620         case KVM_CAP_MSR_PLATFORM_INFO:
5621                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
5622                 r = 0;
5623                 break;
5624         case KVM_CAP_EXCEPTION_PAYLOAD:
5625                 kvm->arch.exception_payload_enabled = cap->args[0];
5626                 r = 0;
5627                 break;
5628         case KVM_CAP_X86_USER_SPACE_MSR:
5629                 kvm->arch.user_space_msr_mask = cap->args[0];
5630                 r = 0;
5631                 break;
5632         case KVM_CAP_X86_BUS_LOCK_EXIT:
5633                 r = -EINVAL;
5634                 if (cap->args[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE)
5635                         break;
5636
5637                 if ((cap->args[0] & KVM_BUS_LOCK_DETECTION_OFF) &&
5638                     (cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT))
5639                         break;
5640
5641                 if (kvm_has_bus_lock_exit &&
5642                     cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT)
5643                         kvm->arch.bus_lock_detection_enabled = true;
5644                 r = 0;
5645                 break;
5646 #ifdef CONFIG_X86_SGX_KVM
5647         case KVM_CAP_SGX_ATTRIBUTE: {
5648                 unsigned long allowed_attributes = 0;
5649
5650                 r = sgx_set_attribute(&allowed_attributes, cap->args[0]);
5651                 if (r)
5652                         break;
5653
5654                 /* KVM only supports the PROVISIONKEY privileged attribute. */
5655                 if ((allowed_attributes & SGX_ATTR_PROVISIONKEY) &&
5656                     !(allowed_attributes & ~SGX_ATTR_PROVISIONKEY))
5657                         kvm->arch.sgx_provisioning_allowed = true;
5658                 else
5659                         r = -EINVAL;
5660                 break;
5661         }
5662 #endif
5663         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
5664                 r = -EINVAL;
5665                 if (kvm_x86_ops.vm_copy_enc_context_from)
5666                         r = kvm_x86_ops.vm_copy_enc_context_from(kvm, cap->args[0]);
5667                 return r;
5668         case KVM_CAP_EXIT_HYPERCALL:
5669                 if (cap->args[0] & ~KVM_EXIT_HYPERCALL_VALID_MASK) {
5670                         r = -EINVAL;
5671                         break;
5672                 }
5673                 kvm->arch.hypercall_exit_enabled = cap->args[0];
5674                 r = 0;
5675                 break;
5676         case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
5677                 r = -EINVAL;
5678                 if (cap->args[0] & ~1)
5679                         break;
5680                 kvm->arch.exit_on_emulation_error = cap->args[0];
5681                 r = 0;
5682                 break;
5683         default:
5684                 r = -EINVAL;
5685                 break;
5686         }
5687         return r;
5688 }
5689
5690 static struct kvm_x86_msr_filter *kvm_alloc_msr_filter(bool default_allow)
5691 {
5692         struct kvm_x86_msr_filter *msr_filter;
5693
5694         msr_filter = kzalloc(sizeof(*msr_filter), GFP_KERNEL_ACCOUNT);
5695         if (!msr_filter)
5696                 return NULL;
5697
5698         msr_filter->default_allow = default_allow;
5699         return msr_filter;
5700 }
5701
5702 static void kvm_free_msr_filter(struct kvm_x86_msr_filter *msr_filter)
5703 {
5704         u32 i;
5705
5706         if (!msr_filter)
5707                 return;
5708
5709         for (i = 0; i < msr_filter->count; i++)
5710                 kfree(msr_filter->ranges[i].bitmap);
5711
5712         kfree(msr_filter);
5713 }
5714
5715 static int kvm_add_msr_filter(struct kvm_x86_msr_filter *msr_filter,
5716                               struct kvm_msr_filter_range *user_range)
5717 {
5718         unsigned long *bitmap = NULL;
5719         size_t bitmap_size;
5720
5721         if (!user_range->nmsrs)
5722                 return 0;
5723
5724         if (user_range->flags & ~(KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE))
5725                 return -EINVAL;
5726
5727         if (!user_range->flags)
5728                 return -EINVAL;
5729
5730         bitmap_size = BITS_TO_LONGS(user_range->nmsrs) * sizeof(long);
5731         if (!bitmap_size || bitmap_size > KVM_MSR_FILTER_MAX_BITMAP_SIZE)
5732                 return -EINVAL;
5733
5734         bitmap = memdup_user((__user u8*)user_range->bitmap, bitmap_size);
5735         if (IS_ERR(bitmap))
5736                 return PTR_ERR(bitmap);
5737
5738         msr_filter->ranges[msr_filter->count] = (struct msr_bitmap_range) {
5739                 .flags = user_range->flags,
5740                 .base = user_range->base,
5741                 .nmsrs = user_range->nmsrs,
5742                 .bitmap = bitmap,
5743         };
5744
5745         msr_filter->count++;
5746         return 0;
5747 }
5748
5749 static int kvm_vm_ioctl_set_msr_filter(struct kvm *kvm, void __user *argp)
5750 {
5751         struct kvm_msr_filter __user *user_msr_filter = argp;
5752         struct kvm_x86_msr_filter *new_filter, *old_filter;
5753         struct kvm_msr_filter filter;
5754         bool default_allow;
5755         bool empty = true;
5756         int r = 0;
5757         u32 i;
5758
5759         if (copy_from_user(&filter, user_msr_filter, sizeof(filter)))
5760                 return -EFAULT;
5761
5762         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++)
5763                 empty &= !filter.ranges[i].nmsrs;
5764
5765         default_allow = !(filter.flags & KVM_MSR_FILTER_DEFAULT_DENY);
5766         if (empty && !default_allow)
5767                 return -EINVAL;
5768
5769         new_filter = kvm_alloc_msr_filter(default_allow);
5770         if (!new_filter)
5771                 return -ENOMEM;
5772
5773         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++) {
5774                 r = kvm_add_msr_filter(new_filter, &filter.ranges[i]);
5775                 if (r) {
5776                         kvm_free_msr_filter(new_filter);
5777                         return r;
5778                 }
5779         }
5780
5781         mutex_lock(&kvm->lock);
5782
5783         /* The per-VM filter is protected by kvm->lock... */
5784         old_filter = srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1);
5785
5786         rcu_assign_pointer(kvm->arch.msr_filter, new_filter);
5787         synchronize_srcu(&kvm->srcu);
5788
5789         kvm_free_msr_filter(old_filter);
5790
5791         kvm_make_all_cpus_request(kvm, KVM_REQ_MSR_FILTER_CHANGED);
5792         mutex_unlock(&kvm->lock);
5793
5794         return 0;
5795 }
5796
5797 #ifdef CONFIG_HAVE_KVM_PM_NOTIFIER
5798 static int kvm_arch_suspend_notifier(struct kvm *kvm)
5799 {
5800         struct kvm_vcpu *vcpu;
5801         int i, ret = 0;
5802
5803         mutex_lock(&kvm->lock);
5804         kvm_for_each_vcpu(i, vcpu, kvm) {
5805                 if (!vcpu->arch.pv_time_enabled)
5806                         continue;
5807
5808                 ret = kvm_set_guest_paused(vcpu);
5809                 if (ret) {
5810                         kvm_err("Failed to pause guest VCPU%d: %d\n",
5811                                 vcpu->vcpu_id, ret);
5812                         break;
5813                 }
5814         }
5815         mutex_unlock(&kvm->lock);
5816
5817         return ret ? NOTIFY_BAD : NOTIFY_DONE;
5818 }
5819
5820 int kvm_arch_pm_notifier(struct kvm *kvm, unsigned long state)
5821 {
5822         switch (state) {
5823         case PM_HIBERNATION_PREPARE:
5824         case PM_SUSPEND_PREPARE:
5825                 return kvm_arch_suspend_notifier(kvm);
5826         }
5827
5828         return NOTIFY_DONE;
5829 }
5830 #endif /* CONFIG_HAVE_KVM_PM_NOTIFIER */
5831
5832 long kvm_arch_vm_ioctl(struct file *filp,
5833                        unsigned int ioctl, unsigned long arg)
5834 {
5835         struct kvm *kvm = filp->private_data;
5836         void __user *argp = (void __user *)arg;
5837         int r = -ENOTTY;
5838         /*
5839          * This union makes it completely explicit to gcc-3.x
5840          * that these two variables' stack usage should be
5841          * combined, not added together.
5842          */
5843         union {
5844                 struct kvm_pit_state ps;
5845                 struct kvm_pit_state2 ps2;
5846                 struct kvm_pit_config pit_config;
5847         } u;
5848
5849         switch (ioctl) {
5850         case KVM_SET_TSS_ADDR:
5851                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
5852                 break;
5853         case KVM_SET_IDENTITY_MAP_ADDR: {
5854                 u64 ident_addr;
5855
5856                 mutex_lock(&kvm->lock);
5857                 r = -EINVAL;
5858                 if (kvm->created_vcpus)
5859                         goto set_identity_unlock;
5860                 r = -EFAULT;
5861                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
5862                         goto set_identity_unlock;
5863                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
5864 set_identity_unlock:
5865                 mutex_unlock(&kvm->lock);
5866                 break;
5867         }
5868         case KVM_SET_NR_MMU_PAGES:
5869                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
5870                 break;
5871         case KVM_GET_NR_MMU_PAGES:
5872                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
5873                 break;
5874         case KVM_CREATE_IRQCHIP: {
5875                 mutex_lock(&kvm->lock);
5876
5877                 r = -EEXIST;
5878                 if (irqchip_in_kernel(kvm))
5879                         goto create_irqchip_unlock;
5880
5881                 r = -EINVAL;
5882                 if (kvm->created_vcpus)
5883                         goto create_irqchip_unlock;
5884
5885                 r = kvm_pic_init(kvm);
5886                 if (r)
5887                         goto create_irqchip_unlock;
5888
5889                 r = kvm_ioapic_init(kvm);
5890                 if (r) {
5891                         kvm_pic_destroy(kvm);
5892                         goto create_irqchip_unlock;
5893                 }
5894
5895                 r = kvm_setup_default_irq_routing(kvm);
5896                 if (r) {
5897                         kvm_ioapic_destroy(kvm);
5898                         kvm_pic_destroy(kvm);
5899                         goto create_irqchip_unlock;
5900                 }
5901                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
5902                 smp_wmb();
5903                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
5904         create_irqchip_unlock:
5905                 mutex_unlock(&kvm->lock);
5906                 break;
5907         }
5908         case KVM_CREATE_PIT:
5909                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
5910                 goto create_pit;
5911         case KVM_CREATE_PIT2:
5912                 r = -EFAULT;
5913                 if (copy_from_user(&u.pit_config, argp,
5914                                    sizeof(struct kvm_pit_config)))
5915                         goto out;
5916         create_pit:
5917                 mutex_lock(&kvm->lock);
5918                 r = -EEXIST;
5919                 if (kvm->arch.vpit)
5920                         goto create_pit_unlock;
5921                 r = -ENOMEM;
5922                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
5923                 if (kvm->arch.vpit)
5924                         r = 0;
5925         create_pit_unlock:
5926                 mutex_unlock(&kvm->lock);
5927                 break;
5928         case KVM_GET_IRQCHIP: {
5929                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5930                 struct kvm_irqchip *chip;
5931
5932                 chip = memdup_user(argp, sizeof(*chip));
5933                 if (IS_ERR(chip)) {
5934                         r = PTR_ERR(chip);
5935                         goto out;
5936                 }
5937
5938                 r = -ENXIO;
5939                 if (!irqchip_kernel(kvm))
5940                         goto get_irqchip_out;
5941                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
5942                 if (r)
5943                         goto get_irqchip_out;
5944                 r = -EFAULT;
5945                 if (copy_to_user(argp, chip, sizeof(*chip)))
5946                         goto get_irqchip_out;
5947                 r = 0;
5948         get_irqchip_out:
5949                 kfree(chip);
5950                 break;
5951         }
5952         case KVM_SET_IRQCHIP: {
5953                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5954                 struct kvm_irqchip *chip;
5955
5956                 chip = memdup_user(argp, sizeof(*chip));
5957                 if (IS_ERR(chip)) {
5958                         r = PTR_ERR(chip);
5959                         goto out;
5960                 }
5961
5962                 r = -ENXIO;
5963                 if (!irqchip_kernel(kvm))
5964                         goto set_irqchip_out;
5965                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
5966         set_irqchip_out:
5967                 kfree(chip);
5968                 break;
5969         }
5970         case KVM_GET_PIT: {
5971                 r = -EFAULT;
5972                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
5973                         goto out;
5974                 r = -ENXIO;
5975                 if (!kvm->arch.vpit)
5976                         goto out;
5977                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
5978                 if (r)
5979                         goto out;
5980                 r = -EFAULT;
5981                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
5982                         goto out;
5983                 r = 0;
5984                 break;
5985         }
5986         case KVM_SET_PIT: {
5987                 r = -EFAULT;
5988                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
5989                         goto out;
5990                 mutex_lock(&kvm->lock);
5991                 r = -ENXIO;
5992                 if (!kvm->arch.vpit)
5993                         goto set_pit_out;
5994                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
5995 set_pit_out:
5996                 mutex_unlock(&kvm->lock);
5997                 break;
5998         }
5999         case KVM_GET_PIT2: {
6000                 r = -ENXIO;
6001                 if (!kvm->arch.vpit)
6002                         goto out;
6003                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
6004                 if (r)
6005                         goto out;
6006                 r = -EFAULT;
6007                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
6008                         goto out;
6009                 r = 0;
6010                 break;
6011         }
6012         case KVM_SET_PIT2: {
6013                 r = -EFAULT;
6014                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
6015                         goto out;
6016                 mutex_lock(&kvm->lock);
6017                 r = -ENXIO;
6018                 if (!kvm->arch.vpit)
6019                         goto set_pit2_out;
6020                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
6021 set_pit2_out:
6022                 mutex_unlock(&kvm->lock);
6023                 break;
6024         }
6025         case KVM_REINJECT_CONTROL: {
6026                 struct kvm_reinject_control control;
6027                 r =  -EFAULT;
6028                 if (copy_from_user(&control, argp, sizeof(control)))
6029                         goto out;
6030                 r = -ENXIO;
6031                 if (!kvm->arch.vpit)
6032                         goto out;
6033                 r = kvm_vm_ioctl_reinject(kvm, &control);
6034                 break;
6035         }
6036         case KVM_SET_BOOT_CPU_ID:
6037                 r = 0;
6038                 mutex_lock(&kvm->lock);
6039                 if (kvm->created_vcpus)
6040                         r = -EBUSY;
6041                 else
6042                         kvm->arch.bsp_vcpu_id = arg;
6043                 mutex_unlock(&kvm->lock);
6044                 break;
6045 #ifdef CONFIG_KVM_XEN
6046         case KVM_XEN_HVM_CONFIG: {
6047                 struct kvm_xen_hvm_config xhc;
6048                 r = -EFAULT;
6049                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
6050                         goto out;
6051                 r = kvm_xen_hvm_config(kvm, &xhc);
6052                 break;
6053         }
6054         case KVM_XEN_HVM_GET_ATTR: {
6055                 struct kvm_xen_hvm_attr xha;
6056
6057                 r = -EFAULT;
6058                 if (copy_from_user(&xha, argp, sizeof(xha)))
6059                         goto out;
6060                 r = kvm_xen_hvm_get_attr(kvm, &xha);
6061                 if (!r && copy_to_user(argp, &xha, sizeof(xha)))
6062                         r = -EFAULT;
6063                 break;
6064         }
6065         case KVM_XEN_HVM_SET_ATTR: {
6066                 struct kvm_xen_hvm_attr xha;
6067
6068                 r = -EFAULT;
6069                 if (copy_from_user(&xha, argp, sizeof(xha)))
6070                         goto out;
6071                 r = kvm_xen_hvm_set_attr(kvm, &xha);
6072                 break;
6073         }
6074 #endif
6075         case KVM_SET_CLOCK: {
6076                 struct kvm_arch *ka = &kvm->arch;
6077                 struct kvm_clock_data user_ns;
6078                 u64 now_ns;
6079
6080                 r = -EFAULT;
6081                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
6082                         goto out;
6083
6084                 r = -EINVAL;
6085                 if (user_ns.flags)
6086                         goto out;
6087
6088                 r = 0;
6089                 /*
6090                  * TODO: userspace has to take care of races with VCPU_RUN, so
6091                  * kvm_gen_update_masterclock() can be cut down to locked
6092                  * pvclock_update_vm_gtod_copy().
6093                  */
6094                 kvm_gen_update_masterclock(kvm);
6095
6096                 /*
6097                  * This pairs with kvm_guest_time_update(): when masterclock is
6098                  * in use, we use master_kernel_ns + kvmclock_offset to set
6099                  * unsigned 'system_time' so if we use get_kvmclock_ns() (which
6100                  * is slightly ahead) here we risk going negative on unsigned
6101                  * 'system_time' when 'user_ns.clock' is very small.
6102                  */
6103                 raw_spin_lock_irq(&ka->pvclock_gtod_sync_lock);
6104                 if (kvm->arch.use_master_clock)
6105                         now_ns = ka->master_kernel_ns;
6106                 else
6107                         now_ns = get_kvmclock_base_ns();
6108                 ka->kvmclock_offset = user_ns.clock - now_ns;
6109                 raw_spin_unlock_irq(&ka->pvclock_gtod_sync_lock);
6110
6111                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
6112                 break;
6113         }
6114         case KVM_GET_CLOCK: {
6115                 struct kvm_clock_data user_ns;
6116                 u64 now_ns;
6117
6118                 now_ns = get_kvmclock_ns(kvm);
6119                 user_ns.clock = now_ns;
6120                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
6121                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
6122
6123                 r = -EFAULT;
6124                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
6125                         goto out;
6126                 r = 0;
6127                 break;
6128         }
6129         case KVM_MEMORY_ENCRYPT_OP: {
6130                 r = -ENOTTY;
6131                 if (kvm_x86_ops.mem_enc_op)
6132                         r = static_call(kvm_x86_mem_enc_op)(kvm, argp);
6133                 break;
6134         }
6135         case KVM_MEMORY_ENCRYPT_REG_REGION: {
6136                 struct kvm_enc_region region;
6137
6138                 r = -EFAULT;
6139                 if (copy_from_user(&region, argp, sizeof(region)))
6140                         goto out;
6141
6142                 r = -ENOTTY;
6143                 if (kvm_x86_ops.mem_enc_reg_region)
6144                         r = static_call(kvm_x86_mem_enc_reg_region)(kvm, &region);
6145                 break;
6146         }
6147         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
6148                 struct kvm_enc_region region;
6149
6150                 r = -EFAULT;
6151                 if (copy_from_user(&region, argp, sizeof(region)))
6152                         goto out;
6153
6154                 r = -ENOTTY;
6155                 if (kvm_x86_ops.mem_enc_unreg_region)
6156                         r = static_call(kvm_x86_mem_enc_unreg_region)(kvm, &region);
6157                 break;
6158         }
6159         case KVM_HYPERV_EVENTFD: {
6160                 struct kvm_hyperv_eventfd hvevfd;
6161
6162                 r = -EFAULT;
6163                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
6164                         goto out;
6165                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
6166                 break;
6167         }
6168         case KVM_SET_PMU_EVENT_FILTER:
6169                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
6170                 break;
6171         case KVM_X86_SET_MSR_FILTER:
6172                 r = kvm_vm_ioctl_set_msr_filter(kvm, argp);
6173                 break;
6174         default:
6175                 r = -ENOTTY;
6176         }
6177 out:
6178         return r;
6179 }
6180
6181 static void kvm_init_msr_list(void)
6182 {
6183         struct x86_pmu_capability x86_pmu;
6184         u32 dummy[2];
6185         unsigned i;
6186
6187         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
6188                          "Please update the fixed PMCs in msrs_to_saved_all[]");
6189
6190         perf_get_x86_pmu_capability(&x86_pmu);
6191
6192         num_msrs_to_save = 0;
6193         num_emulated_msrs = 0;
6194         num_msr_based_features = 0;
6195
6196         for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
6197                 if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
6198                         continue;
6199
6200                 /*
6201                  * Even MSRs that are valid in the host may not be exposed
6202                  * to the guests in some cases.
6203                  */
6204                 switch (msrs_to_save_all[i]) {
6205                 case MSR_IA32_BNDCFGS:
6206                         if (!kvm_mpx_supported())
6207                                 continue;
6208                         break;
6209                 case MSR_TSC_AUX:
6210                         if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP) &&
6211                             !kvm_cpu_cap_has(X86_FEATURE_RDPID))
6212                                 continue;
6213                         break;
6214                 case MSR_IA32_UMWAIT_CONTROL:
6215                         if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG))
6216                                 continue;
6217                         break;
6218                 case MSR_IA32_RTIT_CTL:
6219                 case MSR_IA32_RTIT_STATUS:
6220                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT))
6221                                 continue;
6222                         break;
6223                 case MSR_IA32_RTIT_CR3_MATCH:
6224                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6225                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
6226                                 continue;
6227                         break;
6228                 case MSR_IA32_RTIT_OUTPUT_BASE:
6229                 case MSR_IA32_RTIT_OUTPUT_MASK:
6230                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6231                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
6232                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
6233                                 continue;
6234                         break;
6235                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
6236                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6237                                 msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
6238                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
6239                                 continue;
6240                         break;
6241                 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
6242                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
6243                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6244                                 continue;
6245                         break;
6246                 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
6247                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
6248                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6249                                 continue;
6250                         break;
6251                 default:
6252                         break;
6253                 }
6254
6255                 msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
6256         }
6257
6258         for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
6259                 if (!static_call(kvm_x86_has_emulated_msr)(NULL, emulated_msrs_all[i]))
6260                         continue;
6261
6262                 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
6263         }
6264
6265         for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
6266                 struct kvm_msr_entry msr;
6267
6268                 msr.index = msr_based_features_all[i];
6269                 if (kvm_get_msr_feature(&msr))
6270                         continue;
6271
6272                 msr_based_features[num_msr_based_features++] = msr_based_features_all[i];
6273         }
6274 }
6275
6276 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
6277                            const void *v)
6278 {
6279         int handled = 0;
6280         int n;
6281
6282         do {
6283                 n = min(len, 8);
6284                 if (!(lapic_in_kernel(vcpu) &&
6285                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
6286                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
6287                         break;
6288                 handled += n;
6289                 addr += n;
6290                 len -= n;
6291                 v += n;
6292         } while (len);
6293
6294         return handled;
6295 }
6296
6297 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
6298 {
6299         int handled = 0;
6300         int n;
6301
6302         do {
6303                 n = min(len, 8);
6304                 if (!(lapic_in_kernel(vcpu) &&
6305                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
6306                                          addr, n, v))
6307                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
6308                         break;
6309                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
6310                 handled += n;
6311                 addr += n;
6312                 len -= n;
6313                 v += n;
6314         } while (len);
6315
6316         return handled;
6317 }
6318
6319 static void kvm_set_segment(struct kvm_vcpu *vcpu,
6320                         struct kvm_segment *var, int seg)
6321 {
6322         static_call(kvm_x86_set_segment)(vcpu, var, seg);
6323 }
6324
6325 void kvm_get_segment(struct kvm_vcpu *vcpu,
6326                      struct kvm_segment *var, int seg)
6327 {
6328         static_call(kvm_x86_get_segment)(vcpu, var, seg);
6329 }
6330
6331 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
6332                            struct x86_exception *exception)
6333 {
6334         gpa_t t_gpa;
6335
6336         BUG_ON(!mmu_is_nested(vcpu));
6337
6338         /* NPT walks are always user-walks */
6339         access |= PFERR_USER_MASK;
6340         t_gpa  = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
6341
6342         return t_gpa;
6343 }
6344
6345 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
6346                               struct x86_exception *exception)
6347 {
6348         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6349         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6350 }
6351 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_read);
6352
6353  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
6354                                 struct x86_exception *exception)
6355 {
6356         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6357         access |= PFERR_FETCH_MASK;
6358         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6359 }
6360
6361 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
6362                                struct x86_exception *exception)
6363 {
6364         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6365         access |= PFERR_WRITE_MASK;
6366         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6367 }
6368 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_write);
6369
6370 /* uses this to access any guest's mapped memory without checking CPL */
6371 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
6372                                 struct x86_exception *exception)
6373 {
6374         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
6375 }
6376
6377 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6378                                       struct kvm_vcpu *vcpu, u32 access,
6379                                       struct x86_exception *exception)
6380 {
6381         void *data = val;
6382         int r = X86EMUL_CONTINUE;
6383
6384         while (bytes) {
6385                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
6386                                                             exception);
6387                 unsigned offset = addr & (PAGE_SIZE-1);
6388                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
6389                 int ret;
6390
6391                 if (gpa == UNMAPPED_GVA)
6392                         return X86EMUL_PROPAGATE_FAULT;
6393                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
6394                                                offset, toread);
6395                 if (ret < 0) {
6396                         r = X86EMUL_IO_NEEDED;
6397                         goto out;
6398                 }
6399
6400                 bytes -= toread;
6401                 data += toread;
6402                 addr += toread;
6403         }
6404 out:
6405         return r;
6406 }
6407
6408 /* used for instruction fetching */
6409 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
6410                                 gva_t addr, void *val, unsigned int bytes,
6411                                 struct x86_exception *exception)
6412 {
6413         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6414         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6415         unsigned offset;
6416         int ret;
6417
6418         /* Inline kvm_read_guest_virt_helper for speed.  */
6419         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
6420                                                     exception);
6421         if (unlikely(gpa == UNMAPPED_GVA))
6422                 return X86EMUL_PROPAGATE_FAULT;
6423
6424         offset = addr & (PAGE_SIZE-1);
6425         if (WARN_ON(offset + bytes > PAGE_SIZE))
6426                 bytes = (unsigned)PAGE_SIZE - offset;
6427         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
6428                                        offset, bytes);
6429         if (unlikely(ret < 0))
6430                 return X86EMUL_IO_NEEDED;
6431
6432         return X86EMUL_CONTINUE;
6433 }
6434
6435 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
6436                                gva_t addr, void *val, unsigned int bytes,
6437                                struct x86_exception *exception)
6438 {
6439         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6440
6441         /*
6442          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
6443          * is returned, but our callers are not ready for that and they blindly
6444          * call kvm_inject_page_fault.  Ensure that they at least do not leak
6445          * uninitialized kernel stack memory into cr2 and error code.
6446          */
6447         memset(exception, 0, sizeof(*exception));
6448         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
6449                                           exception);
6450 }
6451 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
6452
6453 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
6454                              gva_t addr, void *val, unsigned int bytes,
6455                              struct x86_exception *exception, bool system)
6456 {
6457         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6458         u32 access = 0;
6459
6460         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6461                 access |= PFERR_USER_MASK;
6462
6463         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
6464 }
6465
6466 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
6467                 unsigned long addr, void *val, unsigned int bytes)
6468 {
6469         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6470         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
6471
6472         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
6473 }
6474
6475 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6476                                       struct kvm_vcpu *vcpu, u32 access,
6477                                       struct x86_exception *exception)
6478 {
6479         void *data = val;
6480         int r = X86EMUL_CONTINUE;
6481
6482         while (bytes) {
6483                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
6484                                                              access,
6485                                                              exception);
6486                 unsigned offset = addr & (PAGE_SIZE-1);
6487                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
6488                 int ret;
6489
6490                 if (gpa == UNMAPPED_GVA)
6491                         return X86EMUL_PROPAGATE_FAULT;
6492                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
6493                 if (ret < 0) {
6494                         r = X86EMUL_IO_NEEDED;
6495                         goto out;
6496                 }
6497
6498                 bytes -= towrite;
6499                 data += towrite;
6500                 addr += towrite;
6501         }
6502 out:
6503         return r;
6504 }
6505
6506 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
6507                               unsigned int bytes, struct x86_exception *exception,
6508                               bool system)
6509 {
6510         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6511         u32 access = PFERR_WRITE_MASK;
6512
6513         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6514                 access |= PFERR_USER_MASK;
6515
6516         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6517                                            access, exception);
6518 }
6519
6520 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
6521                                 unsigned int bytes, struct x86_exception *exception)
6522 {
6523         /* kvm_write_guest_virt_system can pull in tons of pages. */
6524         vcpu->arch.l1tf_flush_l1d = true;
6525
6526         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6527                                            PFERR_WRITE_MASK, exception);
6528 }
6529 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
6530
6531 int handle_ud(struct kvm_vcpu *vcpu)
6532 {
6533         static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
6534         int emul_type = EMULTYPE_TRAP_UD;
6535         char sig[5]; /* ud2; .ascii "kvm" */
6536         struct x86_exception e;
6537
6538         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, NULL, 0)))
6539                 return 1;
6540
6541         if (force_emulation_prefix &&
6542             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
6543                                 sig, sizeof(sig), &e) == 0 &&
6544             memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
6545                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
6546                 emul_type = EMULTYPE_TRAP_UD_FORCED;
6547         }
6548
6549         return kvm_emulate_instruction(vcpu, emul_type);
6550 }
6551 EXPORT_SYMBOL_GPL(handle_ud);
6552
6553 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6554                             gpa_t gpa, bool write)
6555 {
6556         /* For APIC access vmexit */
6557         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6558                 return 1;
6559
6560         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
6561                 trace_vcpu_match_mmio(gva, gpa, write, true);
6562                 return 1;
6563         }
6564
6565         return 0;
6566 }
6567
6568 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6569                                 gpa_t *gpa, struct x86_exception *exception,
6570                                 bool write)
6571 {
6572         u32 access = ((static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0)
6573                 | (write ? PFERR_WRITE_MASK : 0);
6574
6575         /*
6576          * currently PKRU is only applied to ept enabled guest so
6577          * there is no pkey in EPT page table for L1 guest or EPT
6578          * shadow page table for L2 guest.
6579          */
6580         if (vcpu_match_mmio_gva(vcpu, gva) && (!is_paging(vcpu) ||
6581             !permission_fault(vcpu, vcpu->arch.walk_mmu,
6582                               vcpu->arch.mmio_access, 0, access))) {
6583                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
6584                                         (gva & (PAGE_SIZE - 1));
6585                 trace_vcpu_match_mmio(gva, *gpa, write, false);
6586                 return 1;
6587         }
6588
6589         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6590
6591         if (*gpa == UNMAPPED_GVA)
6592                 return -1;
6593
6594         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
6595 }
6596
6597 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
6598                         const void *val, int bytes)
6599 {
6600         int ret;
6601
6602         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
6603         if (ret < 0)
6604                 return 0;
6605         kvm_page_track_write(vcpu, gpa, val, bytes);
6606         return 1;
6607 }
6608
6609 struct read_write_emulator_ops {
6610         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
6611                                   int bytes);
6612         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
6613                                   void *val, int bytes);
6614         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6615                                int bytes, void *val);
6616         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6617                                     void *val, int bytes);
6618         bool write;
6619 };
6620
6621 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
6622 {
6623         if (vcpu->mmio_read_completed) {
6624                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
6625                                vcpu->mmio_fragments[0].gpa, val);
6626                 vcpu->mmio_read_completed = 0;
6627                 return 1;
6628         }
6629
6630         return 0;
6631 }
6632
6633 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6634                         void *val, int bytes)
6635 {
6636         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
6637 }
6638
6639 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6640                          void *val, int bytes)
6641 {
6642         return emulator_write_phys(vcpu, gpa, val, bytes);
6643 }
6644
6645 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
6646 {
6647         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
6648         return vcpu_mmio_write(vcpu, gpa, bytes, val);
6649 }
6650
6651 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6652                           void *val, int bytes)
6653 {
6654         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
6655         return X86EMUL_IO_NEEDED;
6656 }
6657
6658 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6659                            void *val, int bytes)
6660 {
6661         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
6662
6663         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
6664         return X86EMUL_CONTINUE;
6665 }
6666
6667 static const struct read_write_emulator_ops read_emultor = {
6668         .read_write_prepare = read_prepare,
6669         .read_write_emulate = read_emulate,
6670         .read_write_mmio = vcpu_mmio_read,
6671         .read_write_exit_mmio = read_exit_mmio,
6672 };
6673
6674 static const struct read_write_emulator_ops write_emultor = {
6675         .read_write_emulate = write_emulate,
6676         .read_write_mmio = write_mmio,
6677         .read_write_exit_mmio = write_exit_mmio,
6678         .write = true,
6679 };
6680
6681 static int emulator_read_write_onepage(unsigned long addr, void *val,
6682                                        unsigned int bytes,
6683                                        struct x86_exception *exception,
6684                                        struct kvm_vcpu *vcpu,
6685                                        const struct read_write_emulator_ops *ops)
6686 {
6687         gpa_t gpa;
6688         int handled, ret;
6689         bool write = ops->write;
6690         struct kvm_mmio_fragment *frag;
6691         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6692
6693         /*
6694          * If the exit was due to a NPF we may already have a GPA.
6695          * If the GPA is present, use it to avoid the GVA to GPA table walk.
6696          * Note, this cannot be used on string operations since string
6697          * operation using rep will only have the initial GPA from the NPF
6698          * occurred.
6699          */
6700         if (ctxt->gpa_available && emulator_can_use_gpa(ctxt) &&
6701             (addr & ~PAGE_MASK) == (ctxt->gpa_val & ~PAGE_MASK)) {
6702                 gpa = ctxt->gpa_val;
6703                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
6704         } else {
6705                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
6706                 if (ret < 0)
6707                         return X86EMUL_PROPAGATE_FAULT;
6708         }
6709
6710         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
6711                 return X86EMUL_CONTINUE;
6712
6713         /*
6714          * Is this MMIO handled locally?
6715          */
6716         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
6717         if (handled == bytes)
6718                 return X86EMUL_CONTINUE;
6719
6720         gpa += handled;
6721         bytes -= handled;
6722         val += handled;
6723
6724         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
6725         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
6726         frag->gpa = gpa;
6727         frag->data = val;
6728         frag->len = bytes;
6729         return X86EMUL_CONTINUE;
6730 }
6731
6732 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
6733                         unsigned long addr,
6734                         void *val, unsigned int bytes,
6735                         struct x86_exception *exception,
6736                         const struct read_write_emulator_ops *ops)
6737 {
6738         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6739         gpa_t gpa;
6740         int rc;
6741
6742         if (ops->read_write_prepare &&
6743                   ops->read_write_prepare(vcpu, val, bytes))
6744                 return X86EMUL_CONTINUE;
6745
6746         vcpu->mmio_nr_fragments = 0;
6747
6748         /* Crossing a page boundary? */
6749         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
6750                 int now;
6751
6752                 now = -addr & ~PAGE_MASK;
6753                 rc = emulator_read_write_onepage(addr, val, now, exception,
6754                                                  vcpu, ops);
6755
6756                 if (rc != X86EMUL_CONTINUE)
6757                         return rc;
6758                 addr += now;
6759                 if (ctxt->mode != X86EMUL_MODE_PROT64)
6760                         addr = (u32)addr;
6761                 val += now;
6762                 bytes -= now;
6763         }
6764
6765         rc = emulator_read_write_onepage(addr, val, bytes, exception,
6766                                          vcpu, ops);
6767         if (rc != X86EMUL_CONTINUE)
6768                 return rc;
6769
6770         if (!vcpu->mmio_nr_fragments)
6771                 return rc;
6772
6773         gpa = vcpu->mmio_fragments[0].gpa;
6774
6775         vcpu->mmio_needed = 1;
6776         vcpu->mmio_cur_fragment = 0;
6777
6778         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
6779         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
6780         vcpu->run->exit_reason = KVM_EXIT_MMIO;
6781         vcpu->run->mmio.phys_addr = gpa;
6782
6783         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
6784 }
6785
6786 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
6787                                   unsigned long addr,
6788                                   void *val,
6789                                   unsigned int bytes,
6790                                   struct x86_exception *exception)
6791 {
6792         return emulator_read_write(ctxt, addr, val, bytes,
6793                                    exception, &read_emultor);
6794 }
6795
6796 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
6797                             unsigned long addr,
6798                             const void *val,
6799                             unsigned int bytes,
6800                             struct x86_exception *exception)
6801 {
6802         return emulator_read_write(ctxt, addr, (void *)val, bytes,
6803                                    exception, &write_emultor);
6804 }
6805
6806 #define CMPXCHG_TYPE(t, ptr, old, new) \
6807         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
6808
6809 #ifdef CONFIG_X86_64
6810 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
6811 #else
6812 #  define CMPXCHG64(ptr, old, new) \
6813         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
6814 #endif
6815
6816 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
6817                                      unsigned long addr,
6818                                      const void *old,
6819                                      const void *new,
6820                                      unsigned int bytes,
6821                                      struct x86_exception *exception)
6822 {
6823         struct kvm_host_map map;
6824         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6825         u64 page_line_mask;
6826         gpa_t gpa;
6827         char *kaddr;
6828         bool exchanged;
6829
6830         /* guests cmpxchg8b have to be emulated atomically */
6831         if (bytes > 8 || (bytes & (bytes - 1)))
6832                 goto emul_write;
6833
6834         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
6835
6836         if (gpa == UNMAPPED_GVA ||
6837             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6838                 goto emul_write;
6839
6840         /*
6841          * Emulate the atomic as a straight write to avoid #AC if SLD is
6842          * enabled in the host and the access splits a cache line.
6843          */
6844         if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))
6845                 page_line_mask = ~(cache_line_size() - 1);
6846         else
6847                 page_line_mask = PAGE_MASK;
6848
6849         if (((gpa + bytes - 1) & page_line_mask) != (gpa & page_line_mask))
6850                 goto emul_write;
6851
6852         if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
6853                 goto emul_write;
6854
6855         kaddr = map.hva + offset_in_page(gpa);
6856
6857         switch (bytes) {
6858         case 1:
6859                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
6860                 break;
6861         case 2:
6862                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
6863                 break;
6864         case 4:
6865                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
6866                 break;
6867         case 8:
6868                 exchanged = CMPXCHG64(kaddr, old, new);
6869                 break;
6870         default:
6871                 BUG();
6872         }
6873
6874         kvm_vcpu_unmap(vcpu, &map, true);
6875
6876         if (!exchanged)
6877                 return X86EMUL_CMPXCHG_FAILED;
6878
6879         kvm_page_track_write(vcpu, gpa, new, bytes);
6880
6881         return X86EMUL_CONTINUE;
6882
6883 emul_write:
6884         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
6885
6886         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
6887 }
6888
6889 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
6890 {
6891         int r = 0, i;
6892
6893         for (i = 0; i < vcpu->arch.pio.count; i++) {
6894                 if (vcpu->arch.pio.in)
6895                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
6896                                             vcpu->arch.pio.size, pd);
6897                 else
6898                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
6899                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
6900                                              pd);
6901                 if (r)
6902                         break;
6903                 pd += vcpu->arch.pio.size;
6904         }
6905         return r;
6906 }
6907
6908 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
6909                                unsigned short port, void *val,
6910                                unsigned int count, bool in)
6911 {
6912         vcpu->arch.pio.port = port;
6913         vcpu->arch.pio.in = in;
6914         vcpu->arch.pio.count  = count;
6915         vcpu->arch.pio.size = size;
6916
6917         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
6918                 vcpu->arch.pio.count = 0;
6919                 return 1;
6920         }
6921
6922         vcpu->run->exit_reason = KVM_EXIT_IO;
6923         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
6924         vcpu->run->io.size = size;
6925         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
6926         vcpu->run->io.count = count;
6927         vcpu->run->io.port = port;
6928
6929         return 0;
6930 }
6931
6932 static int emulator_pio_in(struct kvm_vcpu *vcpu, int size,
6933                            unsigned short port, void *val, unsigned int count)
6934 {
6935         int ret;
6936
6937         if (vcpu->arch.pio.count)
6938                 goto data_avail;
6939
6940         memset(vcpu->arch.pio_data, 0, size * count);
6941
6942         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
6943         if (ret) {
6944 data_avail:
6945                 memcpy(val, vcpu->arch.pio_data, size * count);
6946                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
6947                 vcpu->arch.pio.count = 0;
6948                 return 1;
6949         }
6950
6951         return 0;
6952 }
6953
6954 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
6955                                     int size, unsigned short port, void *val,
6956                                     unsigned int count)
6957 {
6958         return emulator_pio_in(emul_to_vcpu(ctxt), size, port, val, count);
6959
6960 }
6961
6962 static int emulator_pio_out(struct kvm_vcpu *vcpu, int size,
6963                             unsigned short port, const void *val,
6964                             unsigned int count)
6965 {
6966         memcpy(vcpu->arch.pio_data, val, size * count);
6967         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
6968         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
6969 }
6970
6971 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
6972                                      int size, unsigned short port,
6973                                      const void *val, unsigned int count)
6974 {
6975         return emulator_pio_out(emul_to_vcpu(ctxt), size, port, val, count);
6976 }
6977
6978 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
6979 {
6980         return static_call(kvm_x86_get_segment_base)(vcpu, seg);
6981 }
6982
6983 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
6984 {
6985         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
6986 }
6987
6988 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
6989 {
6990         if (!need_emulate_wbinvd(vcpu))
6991                 return X86EMUL_CONTINUE;
6992
6993         if (static_call(kvm_x86_has_wbinvd_exit)()) {
6994                 int cpu = get_cpu();
6995
6996                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
6997                 on_each_cpu_mask(vcpu->arch.wbinvd_dirty_mask,
6998                                 wbinvd_ipi, NULL, 1);
6999                 put_cpu();
7000                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
7001         } else
7002                 wbinvd();
7003         return X86EMUL_CONTINUE;
7004 }
7005
7006 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
7007 {
7008         kvm_emulate_wbinvd_noskip(vcpu);
7009         return kvm_skip_emulated_instruction(vcpu);
7010 }
7011 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
7012
7013
7014
7015 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
7016 {
7017         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
7018 }
7019
7020 static void emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
7021                             unsigned long *dest)
7022 {
7023         kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
7024 }
7025
7026 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
7027                            unsigned long value)
7028 {
7029
7030         return kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
7031 }
7032
7033 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
7034 {
7035         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
7036 }
7037
7038 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
7039 {
7040         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7041         unsigned long value;
7042
7043         switch (cr) {
7044         case 0:
7045                 value = kvm_read_cr0(vcpu);
7046                 break;
7047         case 2:
7048                 value = vcpu->arch.cr2;
7049                 break;
7050         case 3:
7051                 value = kvm_read_cr3(vcpu);
7052                 break;
7053         case 4:
7054                 value = kvm_read_cr4(vcpu);
7055                 break;
7056         case 8:
7057                 value = kvm_get_cr8(vcpu);
7058                 break;
7059         default:
7060                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7061                 return 0;
7062         }
7063
7064         return value;
7065 }
7066
7067 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
7068 {
7069         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7070         int res = 0;
7071
7072         switch (cr) {
7073         case 0:
7074                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
7075                 break;
7076         case 2:
7077                 vcpu->arch.cr2 = val;
7078                 break;
7079         case 3:
7080                 res = kvm_set_cr3(vcpu, val);
7081                 break;
7082         case 4:
7083                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
7084                 break;
7085         case 8:
7086                 res = kvm_set_cr8(vcpu, val);
7087                 break;
7088         default:
7089                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7090                 res = -1;
7091         }
7092
7093         return res;
7094 }
7095
7096 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
7097 {
7098         return static_call(kvm_x86_get_cpl)(emul_to_vcpu(ctxt));
7099 }
7100
7101 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7102 {
7103         static_call(kvm_x86_get_gdt)(emul_to_vcpu(ctxt), dt);
7104 }
7105
7106 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7107 {
7108         static_call(kvm_x86_get_idt)(emul_to_vcpu(ctxt), dt);
7109 }
7110
7111 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7112 {
7113         static_call(kvm_x86_set_gdt)(emul_to_vcpu(ctxt), dt);
7114 }
7115
7116 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7117 {
7118         static_call(kvm_x86_set_idt)(emul_to_vcpu(ctxt), dt);
7119 }
7120
7121 static unsigned long emulator_get_cached_segment_base(
7122         struct x86_emulate_ctxt *ctxt, int seg)
7123 {
7124         return get_segment_base(emul_to_vcpu(ctxt), seg);
7125 }
7126
7127 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
7128                                  struct desc_struct *desc, u32 *base3,
7129                                  int seg)
7130 {
7131         struct kvm_segment var;
7132
7133         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
7134         *selector = var.selector;
7135
7136         if (var.unusable) {
7137                 memset(desc, 0, sizeof(*desc));
7138                 if (base3)
7139                         *base3 = 0;
7140                 return false;
7141         }
7142
7143         if (var.g)
7144                 var.limit >>= 12;
7145         set_desc_limit(desc, var.limit);
7146         set_desc_base(desc, (unsigned long)var.base);
7147 #ifdef CONFIG_X86_64
7148         if (base3)
7149                 *base3 = var.base >> 32;
7150 #endif
7151         desc->type = var.type;
7152         desc->s = var.s;
7153         desc->dpl = var.dpl;
7154         desc->p = var.present;
7155         desc->avl = var.avl;
7156         desc->l = var.l;
7157         desc->d = var.db;
7158         desc->g = var.g;
7159
7160         return true;
7161 }
7162
7163 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
7164                                  struct desc_struct *desc, u32 base3,
7165                                  int seg)
7166 {
7167         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7168         struct kvm_segment var;
7169
7170         var.selector = selector;
7171         var.base = get_desc_base(desc);
7172 #ifdef CONFIG_X86_64
7173         var.base |= ((u64)base3) << 32;
7174 #endif
7175         var.limit = get_desc_limit(desc);
7176         if (desc->g)
7177                 var.limit = (var.limit << 12) | 0xfff;
7178         var.type = desc->type;
7179         var.dpl = desc->dpl;
7180         var.db = desc->d;
7181         var.s = desc->s;
7182         var.l = desc->l;
7183         var.g = desc->g;
7184         var.avl = desc->avl;
7185         var.present = desc->p;
7186         var.unusable = !var.present;
7187         var.padding = 0;
7188
7189         kvm_set_segment(vcpu, &var, seg);
7190         return;
7191 }
7192
7193 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
7194                             u32 msr_index, u64 *pdata)
7195 {
7196         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7197         int r;
7198
7199         r = kvm_get_msr(vcpu, msr_index, pdata);
7200
7201         if (r && kvm_get_msr_user_space(vcpu, msr_index, r)) {
7202                 /* Bounce to user space */
7203                 return X86EMUL_IO_NEEDED;
7204         }
7205
7206         return r;
7207 }
7208
7209 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
7210                             u32 msr_index, u64 data)
7211 {
7212         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7213         int r;
7214
7215         r = kvm_set_msr(vcpu, msr_index, data);
7216
7217         if (r && kvm_set_msr_user_space(vcpu, msr_index, data, r)) {
7218                 /* Bounce to user space */
7219                 return X86EMUL_IO_NEEDED;
7220         }
7221
7222         return r;
7223 }
7224
7225 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
7226 {
7227         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7228
7229         return vcpu->arch.smbase;
7230 }
7231
7232 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
7233 {
7234         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7235
7236         vcpu->arch.smbase = smbase;
7237 }
7238
7239 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
7240                               u32 pmc)
7241 {
7242         return kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc);
7243 }
7244
7245 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
7246                              u32 pmc, u64 *pdata)
7247 {
7248         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
7249 }
7250
7251 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
7252 {
7253         emul_to_vcpu(ctxt)->arch.halt_request = 1;
7254 }
7255
7256 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
7257                               struct x86_instruction_info *info,
7258                               enum x86_intercept_stage stage)
7259 {
7260         return static_call(kvm_x86_check_intercept)(emul_to_vcpu(ctxt), info, stage,
7261                                             &ctxt->exception);
7262 }
7263
7264 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
7265                               u32 *eax, u32 *ebx, u32 *ecx, u32 *edx,
7266                               bool exact_only)
7267 {
7268         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, exact_only);
7269 }
7270
7271 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
7272 {
7273         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
7274 }
7275
7276 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
7277 {
7278         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
7279 }
7280
7281 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
7282 {
7283         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
7284 }
7285
7286 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
7287 {
7288         return kvm_register_read_raw(emul_to_vcpu(ctxt), reg);
7289 }
7290
7291 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
7292 {
7293         kvm_register_write_raw(emul_to_vcpu(ctxt), reg, val);
7294 }
7295
7296 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
7297 {
7298         static_call(kvm_x86_set_nmi_mask)(emul_to_vcpu(ctxt), masked);
7299 }
7300
7301 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
7302 {
7303         return emul_to_vcpu(ctxt)->arch.hflags;
7304 }
7305
7306 static void emulator_exiting_smm(struct x86_emulate_ctxt *ctxt)
7307 {
7308         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7309
7310         kvm_smm_changed(vcpu, false);
7311 }
7312
7313 static int emulator_leave_smm(struct x86_emulate_ctxt *ctxt,
7314                                   const char *smstate)
7315 {
7316         return static_call(kvm_x86_leave_smm)(emul_to_vcpu(ctxt), smstate);
7317 }
7318
7319 static void emulator_triple_fault(struct x86_emulate_ctxt *ctxt)
7320 {
7321         kvm_make_request(KVM_REQ_TRIPLE_FAULT, emul_to_vcpu(ctxt));
7322 }
7323
7324 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
7325 {
7326         return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
7327 }
7328
7329 static const struct x86_emulate_ops emulate_ops = {
7330         .read_gpr            = emulator_read_gpr,
7331         .write_gpr           = emulator_write_gpr,
7332         .read_std            = emulator_read_std,
7333         .write_std           = emulator_write_std,
7334         .read_phys           = kvm_read_guest_phys_system,
7335         .fetch               = kvm_fetch_guest_virt,
7336         .read_emulated       = emulator_read_emulated,
7337         .write_emulated      = emulator_write_emulated,
7338         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
7339         .invlpg              = emulator_invlpg,
7340         .pio_in_emulated     = emulator_pio_in_emulated,
7341         .pio_out_emulated    = emulator_pio_out_emulated,
7342         .get_segment         = emulator_get_segment,
7343         .set_segment         = emulator_set_segment,
7344         .get_cached_segment_base = emulator_get_cached_segment_base,
7345         .get_gdt             = emulator_get_gdt,
7346         .get_idt             = emulator_get_idt,
7347         .set_gdt             = emulator_set_gdt,
7348         .set_idt             = emulator_set_idt,
7349         .get_cr              = emulator_get_cr,
7350         .set_cr              = emulator_set_cr,
7351         .cpl                 = emulator_get_cpl,
7352         .get_dr              = emulator_get_dr,
7353         .set_dr              = emulator_set_dr,
7354         .get_smbase          = emulator_get_smbase,
7355         .set_smbase          = emulator_set_smbase,
7356         .set_msr             = emulator_set_msr,
7357         .get_msr             = emulator_get_msr,
7358         .check_pmc           = emulator_check_pmc,
7359         .read_pmc            = emulator_read_pmc,
7360         .halt                = emulator_halt,
7361         .wbinvd              = emulator_wbinvd,
7362         .fix_hypercall       = emulator_fix_hypercall,
7363         .intercept           = emulator_intercept,
7364         .get_cpuid           = emulator_get_cpuid,
7365         .guest_has_long_mode = emulator_guest_has_long_mode,
7366         .guest_has_movbe     = emulator_guest_has_movbe,
7367         .guest_has_fxsr      = emulator_guest_has_fxsr,
7368         .set_nmi_mask        = emulator_set_nmi_mask,
7369         .get_hflags          = emulator_get_hflags,
7370         .exiting_smm         = emulator_exiting_smm,
7371         .leave_smm           = emulator_leave_smm,
7372         .triple_fault        = emulator_triple_fault,
7373         .set_xcr             = emulator_set_xcr,
7374 };
7375
7376 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
7377 {
7378         u32 int_shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
7379         /*
7380          * an sti; sti; sequence only disable interrupts for the first
7381          * instruction. So, if the last instruction, be it emulated or
7382          * not, left the system with the INT_STI flag enabled, it
7383          * means that the last instruction is an sti. We should not
7384          * leave the flag on in this case. The same goes for mov ss
7385          */
7386         if (int_shadow & mask)
7387                 mask = 0;
7388         if (unlikely(int_shadow || mask)) {
7389                 static_call(kvm_x86_set_interrupt_shadow)(vcpu, mask);
7390                 if (!mask)
7391                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7392         }
7393 }
7394
7395 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
7396 {
7397         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7398         if (ctxt->exception.vector == PF_VECTOR)
7399                 return kvm_inject_emulated_page_fault(vcpu, &ctxt->exception);
7400
7401         if (ctxt->exception.error_code_valid)
7402                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
7403                                       ctxt->exception.error_code);
7404         else
7405                 kvm_queue_exception(vcpu, ctxt->exception.vector);
7406         return false;
7407 }
7408
7409 static struct x86_emulate_ctxt *alloc_emulate_ctxt(struct kvm_vcpu *vcpu)
7410 {
7411         struct x86_emulate_ctxt *ctxt;
7412
7413         ctxt = kmem_cache_zalloc(x86_emulator_cache, GFP_KERNEL_ACCOUNT);
7414         if (!ctxt) {
7415                 pr_err("kvm: failed to allocate vcpu's emulator\n");
7416                 return NULL;
7417         }
7418
7419         ctxt->vcpu = vcpu;
7420         ctxt->ops = &emulate_ops;
7421         vcpu->arch.emulate_ctxt = ctxt;
7422
7423         return ctxt;
7424 }
7425
7426 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
7427 {
7428         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7429         int cs_db, cs_l;
7430
7431         static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
7432
7433         ctxt->gpa_available = false;
7434         ctxt->eflags = kvm_get_rflags(vcpu);
7435         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
7436
7437         ctxt->eip = kvm_rip_read(vcpu);
7438         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
7439                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
7440                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
7441                      cs_db                              ? X86EMUL_MODE_PROT32 :
7442                                                           X86EMUL_MODE_PROT16;
7443         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
7444         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
7445         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
7446
7447         ctxt->interruptibility = 0;
7448         ctxt->have_exception = false;
7449         ctxt->exception.vector = -1;
7450         ctxt->perm_ok = false;
7451
7452         init_decode_cache(ctxt);
7453         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7454 }
7455
7456 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
7457 {
7458         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7459         int ret;
7460
7461         init_emulate_ctxt(vcpu);
7462
7463         ctxt->op_bytes = 2;
7464         ctxt->ad_bytes = 2;
7465         ctxt->_eip = ctxt->eip + inc_eip;
7466         ret = emulate_int_real(ctxt, irq);
7467
7468         if (ret != X86EMUL_CONTINUE) {
7469                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
7470         } else {
7471                 ctxt->eip = ctxt->_eip;
7472                 kvm_rip_write(vcpu, ctxt->eip);
7473                 kvm_set_rflags(vcpu, ctxt->eflags);
7474         }
7475 }
7476 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
7477
7478 static void prepare_emulation_failure_exit(struct kvm_vcpu *vcpu)
7479 {
7480         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7481         u32 insn_size = ctxt->fetch.end - ctxt->fetch.data;
7482         struct kvm_run *run = vcpu->run;
7483
7484         run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7485         run->emulation_failure.suberror = KVM_INTERNAL_ERROR_EMULATION;
7486         run->emulation_failure.ndata = 0;
7487         run->emulation_failure.flags = 0;
7488
7489         if (insn_size) {
7490                 run->emulation_failure.ndata = 3;
7491                 run->emulation_failure.flags |=
7492                         KVM_INTERNAL_ERROR_EMULATION_FLAG_INSTRUCTION_BYTES;
7493                 run->emulation_failure.insn_size = insn_size;
7494                 memset(run->emulation_failure.insn_bytes, 0x90,
7495                        sizeof(run->emulation_failure.insn_bytes));
7496                 memcpy(run->emulation_failure.insn_bytes,
7497                        ctxt->fetch.data, insn_size);
7498         }
7499 }
7500
7501 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
7502 {
7503         struct kvm *kvm = vcpu->kvm;
7504
7505         ++vcpu->stat.insn_emulation_fail;
7506         trace_kvm_emulate_insn_failed(vcpu);
7507
7508         if (emulation_type & EMULTYPE_VMWARE_GP) {
7509                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7510                 return 1;
7511         }
7512
7513         if (kvm->arch.exit_on_emulation_error ||
7514             (emulation_type & EMULTYPE_SKIP)) {
7515                 prepare_emulation_failure_exit(vcpu);
7516                 return 0;
7517         }
7518
7519         kvm_queue_exception(vcpu, UD_VECTOR);
7520
7521         if (!is_guest_mode(vcpu) && static_call(kvm_x86_get_cpl)(vcpu) == 0) {
7522                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7523                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
7524                 vcpu->run->internal.ndata = 0;
7525                 return 0;
7526         }
7527
7528         return 1;
7529 }
7530
7531 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7532                                   bool write_fault_to_shadow_pgtable,
7533                                   int emulation_type)
7534 {
7535         gpa_t gpa = cr2_or_gpa;
7536         kvm_pfn_t pfn;
7537
7538         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7539                 return false;
7540
7541         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7542             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7543                 return false;
7544
7545         if (!vcpu->arch.mmu->direct_map) {
7546                 /*
7547                  * Write permission should be allowed since only
7548                  * write access need to be emulated.
7549                  */
7550                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7551
7552                 /*
7553                  * If the mapping is invalid in guest, let cpu retry
7554                  * it to generate fault.
7555                  */
7556                 if (gpa == UNMAPPED_GVA)
7557                         return true;
7558         }
7559
7560         /*
7561          * Do not retry the unhandleable instruction if it faults on the
7562          * readonly host memory, otherwise it will goto a infinite loop:
7563          * retry instruction -> write #PF -> emulation fail -> retry
7564          * instruction -> ...
7565          */
7566         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
7567
7568         /*
7569          * If the instruction failed on the error pfn, it can not be fixed,
7570          * report the error to userspace.
7571          */
7572         if (is_error_noslot_pfn(pfn))
7573                 return false;
7574
7575         kvm_release_pfn_clean(pfn);
7576
7577         /* The instructions are well-emulated on direct mmu. */
7578         if (vcpu->arch.mmu->direct_map) {
7579                 unsigned int indirect_shadow_pages;
7580
7581                 write_lock(&vcpu->kvm->mmu_lock);
7582                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
7583                 write_unlock(&vcpu->kvm->mmu_lock);
7584
7585                 if (indirect_shadow_pages)
7586                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7587
7588                 return true;
7589         }
7590
7591         /*
7592          * if emulation was due to access to shadowed page table
7593          * and it failed try to unshadow page and re-enter the
7594          * guest to let CPU execute the instruction.
7595          */
7596         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7597
7598         /*
7599          * If the access faults on its page table, it can not
7600          * be fixed by unprotecting shadow page and it should
7601          * be reported to userspace.
7602          */
7603         return !write_fault_to_shadow_pgtable;
7604 }
7605
7606 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
7607                               gpa_t cr2_or_gpa,  int emulation_type)
7608 {
7609         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7610         unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
7611
7612         last_retry_eip = vcpu->arch.last_retry_eip;
7613         last_retry_addr = vcpu->arch.last_retry_addr;
7614
7615         /*
7616          * If the emulation is caused by #PF and it is non-page_table
7617          * writing instruction, it means the VM-EXIT is caused by shadow
7618          * page protected, we can zap the shadow page and retry this
7619          * instruction directly.
7620          *
7621          * Note: if the guest uses a non-page-table modifying instruction
7622          * on the PDE that points to the instruction, then we will unmap
7623          * the instruction and go to an infinite loop. So, we cache the
7624          * last retried eip and the last fault address, if we meet the eip
7625          * and the address again, we can break out of the potential infinite
7626          * loop.
7627          */
7628         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
7629
7630         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7631                 return false;
7632
7633         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7634             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7635                 return false;
7636
7637         if (x86_page_table_writing_insn(ctxt))
7638                 return false;
7639
7640         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
7641                 return false;
7642
7643         vcpu->arch.last_retry_eip = ctxt->eip;
7644         vcpu->arch.last_retry_addr = cr2_or_gpa;
7645
7646         if (!vcpu->arch.mmu->direct_map)
7647                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7648
7649         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7650
7651         return true;
7652 }
7653
7654 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
7655 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
7656
7657 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm)
7658 {
7659         trace_kvm_smm_transition(vcpu->vcpu_id, vcpu->arch.smbase, entering_smm);
7660
7661         if (entering_smm) {
7662                 vcpu->arch.hflags |= HF_SMM_MASK;
7663         } else {
7664                 vcpu->arch.hflags &= ~(HF_SMM_MASK | HF_SMM_INSIDE_NMI_MASK);
7665
7666                 /* Process a latched INIT or SMI, if any.  */
7667                 kvm_make_request(KVM_REQ_EVENT, vcpu);
7668
7669                 /*
7670                  * Even if KVM_SET_SREGS2 loaded PDPTRs out of band,
7671                  * on SMM exit we still need to reload them from
7672                  * guest memory
7673                  */
7674                 vcpu->arch.pdptrs_from_userspace = false;
7675         }
7676
7677         kvm_mmu_reset_context(vcpu);
7678 }
7679
7680 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
7681                                 unsigned long *db)
7682 {
7683         u32 dr6 = 0;
7684         int i;
7685         u32 enable, rwlen;
7686
7687         enable = dr7;
7688         rwlen = dr7 >> 16;
7689         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
7690                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
7691                         dr6 |= (1 << i);
7692         return dr6;
7693 }
7694
7695 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
7696 {
7697         struct kvm_run *kvm_run = vcpu->run;
7698
7699         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
7700                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_ACTIVE_LOW;
7701                 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu);
7702                 kvm_run->debug.arch.exception = DB_VECTOR;
7703                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
7704                 return 0;
7705         }
7706         kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
7707         return 1;
7708 }
7709
7710 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
7711 {
7712         unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7713         int r;
7714
7715         r = static_call(kvm_x86_skip_emulated_instruction)(vcpu);
7716         if (unlikely(!r))
7717                 return 0;
7718
7719         /*
7720          * rflags is the old, "raw" value of the flags.  The new value has
7721          * not been saved yet.
7722          *
7723          * This is correct even for TF set by the guest, because "the
7724          * processor will not generate this exception after the instruction
7725          * that sets the TF flag".
7726          */
7727         if (unlikely(rflags & X86_EFLAGS_TF))
7728                 r = kvm_vcpu_do_singlestep(vcpu);
7729         return r;
7730 }
7731 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
7732
7733 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
7734 {
7735         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
7736             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
7737                 struct kvm_run *kvm_run = vcpu->run;
7738                 unsigned long eip = kvm_get_linear_rip(vcpu);
7739                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7740                                            vcpu->arch.guest_debug_dr7,
7741                                            vcpu->arch.eff_db);
7742
7743                 if (dr6 != 0) {
7744                         kvm_run->debug.arch.dr6 = dr6 | DR6_ACTIVE_LOW;
7745                         kvm_run->debug.arch.pc = eip;
7746                         kvm_run->debug.arch.exception = DB_VECTOR;
7747                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
7748                         *r = 0;
7749                         return true;
7750                 }
7751         }
7752
7753         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
7754             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
7755                 unsigned long eip = kvm_get_linear_rip(vcpu);
7756                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7757                                            vcpu->arch.dr7,
7758                                            vcpu->arch.db);
7759
7760                 if (dr6 != 0) {
7761                         kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
7762                         *r = 1;
7763                         return true;
7764                 }
7765         }
7766
7767         return false;
7768 }
7769
7770 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
7771 {
7772         switch (ctxt->opcode_len) {
7773         case 1:
7774                 switch (ctxt->b) {
7775                 case 0xe4:      /* IN */
7776                 case 0xe5:
7777                 case 0xec:
7778                 case 0xed:
7779                 case 0xe6:      /* OUT */
7780                 case 0xe7:
7781                 case 0xee:
7782                 case 0xef:
7783                 case 0x6c:      /* INS */
7784                 case 0x6d:
7785                 case 0x6e:      /* OUTS */
7786                 case 0x6f:
7787                         return true;
7788                 }
7789                 break;
7790         case 2:
7791                 switch (ctxt->b) {
7792                 case 0x33:      /* RDPMC */
7793                         return true;
7794                 }
7795                 break;
7796         }
7797
7798         return false;
7799 }
7800
7801 /*
7802  * Decode to be emulated instruction. Return EMULATION_OK if success.
7803  */
7804 int x86_decode_emulated_instruction(struct kvm_vcpu *vcpu, int emulation_type,
7805                                     void *insn, int insn_len)
7806 {
7807         int r = EMULATION_OK;
7808         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7809
7810         init_emulate_ctxt(vcpu);
7811
7812         /*
7813          * We will reenter on the same instruction since we do not set
7814          * complete_userspace_io. This does not handle watchpoints yet,
7815          * those would be handled in the emulate_ops.
7816          */
7817         if (!(emulation_type & EMULTYPE_SKIP) &&
7818             kvm_vcpu_check_breakpoint(vcpu, &r))
7819                 return r;
7820
7821         r = x86_decode_insn(ctxt, insn, insn_len, emulation_type);
7822
7823         trace_kvm_emulate_insn_start(vcpu);
7824         ++vcpu->stat.insn_emulation;
7825
7826         return r;
7827 }
7828 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction);
7829
7830 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7831                             int emulation_type, void *insn, int insn_len)
7832 {
7833         int r;
7834         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7835         bool writeback = true;
7836         bool write_fault_to_spt;
7837
7838         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, insn, insn_len)))
7839                 return 1;
7840
7841         vcpu->arch.l1tf_flush_l1d = true;
7842
7843         /*
7844          * Clear write_fault_to_shadow_pgtable here to ensure it is
7845          * never reused.
7846          */
7847         write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
7848         vcpu->arch.write_fault_to_shadow_pgtable = false;
7849
7850         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
7851                 kvm_clear_exception_queue(vcpu);
7852
7853                 r = x86_decode_emulated_instruction(vcpu, emulation_type,
7854                                                     insn, insn_len);
7855                 if (r != EMULATION_OK)  {
7856                         if ((emulation_type & EMULTYPE_TRAP_UD) ||
7857                             (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
7858                                 kvm_queue_exception(vcpu, UD_VECTOR);
7859                                 return 1;
7860                         }
7861                         if (reexecute_instruction(vcpu, cr2_or_gpa,
7862                                                   write_fault_to_spt,
7863                                                   emulation_type))
7864                                 return 1;
7865                         if (ctxt->have_exception) {
7866                                 /*
7867                                  * #UD should result in just EMULATION_FAILED, and trap-like
7868                                  * exception should not be encountered during decode.
7869                                  */
7870                                 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
7871                                              exception_type(ctxt->exception.vector) == EXCPT_TRAP);
7872                                 inject_emulated_exception(vcpu);
7873                                 return 1;
7874                         }
7875                         return handle_emulation_failure(vcpu, emulation_type);
7876                 }
7877         }
7878
7879         if ((emulation_type & EMULTYPE_VMWARE_GP) &&
7880             !is_vmware_backdoor_opcode(ctxt)) {
7881                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7882                 return 1;
7883         }
7884
7885         /*
7886          * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
7887          * for kvm_skip_emulated_instruction().  The caller is responsible for
7888          * updating interruptibility state and injecting single-step #DBs.
7889          */
7890         if (emulation_type & EMULTYPE_SKIP) {
7891                 kvm_rip_write(vcpu, ctxt->_eip);
7892                 if (ctxt->eflags & X86_EFLAGS_RF)
7893                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
7894                 return 1;
7895         }
7896
7897         if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
7898                 return 1;
7899
7900         /* this is needed for vmware backdoor interface to work since it
7901            changes registers values  during IO operation */
7902         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
7903                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7904                 emulator_invalidate_register_cache(ctxt);
7905         }
7906
7907 restart:
7908         if (emulation_type & EMULTYPE_PF) {
7909                 /* Save the faulting GPA (cr2) in the address field */
7910                 ctxt->exception.address = cr2_or_gpa;
7911
7912                 /* With shadow page tables, cr2 contains a GVA or nGPA. */
7913                 if (vcpu->arch.mmu->direct_map) {
7914                         ctxt->gpa_available = true;
7915                         ctxt->gpa_val = cr2_or_gpa;
7916                 }
7917         } else {
7918                 /* Sanitize the address out of an abundance of paranoia. */
7919                 ctxt->exception.address = 0;
7920         }
7921
7922         r = x86_emulate_insn(ctxt);
7923
7924         if (r == EMULATION_INTERCEPTED)
7925                 return 1;
7926
7927         if (r == EMULATION_FAILED) {
7928                 if (reexecute_instruction(vcpu, cr2_or_gpa, write_fault_to_spt,
7929                                         emulation_type))
7930                         return 1;
7931
7932                 return handle_emulation_failure(vcpu, emulation_type);
7933         }
7934
7935         if (ctxt->have_exception) {
7936                 r = 1;
7937                 if (inject_emulated_exception(vcpu))
7938                         return r;
7939         } else if (vcpu->arch.pio.count) {
7940                 if (!vcpu->arch.pio.in) {
7941                         /* FIXME: return into emulator if single-stepping.  */
7942                         vcpu->arch.pio.count = 0;
7943                 } else {
7944                         writeback = false;
7945                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
7946                 }
7947                 r = 0;
7948         } else if (vcpu->mmio_needed) {
7949                 ++vcpu->stat.mmio_exits;
7950
7951                 if (!vcpu->mmio_is_write)
7952                         writeback = false;
7953                 r = 0;
7954                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7955         } else if (r == EMULATION_RESTART)
7956                 goto restart;
7957         else
7958                 r = 1;
7959
7960         if (writeback) {
7961                 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7962                 toggle_interruptibility(vcpu, ctxt->interruptibility);
7963                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7964                 if (!ctxt->have_exception ||
7965                     exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
7966                         kvm_rip_write(vcpu, ctxt->eip);
7967                         if (r && (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
7968                                 r = kvm_vcpu_do_singlestep(vcpu);
7969                         if (kvm_x86_ops.update_emulated_instruction)
7970                                 static_call(kvm_x86_update_emulated_instruction)(vcpu);
7971                         __kvm_set_rflags(vcpu, ctxt->eflags);
7972                 }
7973
7974                 /*
7975                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
7976                  * do nothing, and it will be requested again as soon as
7977                  * the shadow expires.  But we still need to check here,
7978                  * because POPF has no interrupt shadow.
7979                  */
7980                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
7981                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7982         } else
7983                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
7984
7985         return r;
7986 }
7987
7988 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
7989 {
7990         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
7991 }
7992 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
7993
7994 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
7995                                         void *insn, int insn_len)
7996 {
7997         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
7998 }
7999 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
8000
8001 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
8002 {
8003         vcpu->arch.pio.count = 0;
8004         return 1;
8005 }
8006
8007 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
8008 {
8009         vcpu->arch.pio.count = 0;
8010
8011         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
8012                 return 1;
8013
8014         return kvm_skip_emulated_instruction(vcpu);
8015 }
8016
8017 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
8018                             unsigned short port)
8019 {
8020         unsigned long val = kvm_rax_read(vcpu);
8021         int ret = emulator_pio_out(vcpu, size, port, &val, 1);
8022
8023         if (ret)
8024                 return ret;
8025
8026         /*
8027          * Workaround userspace that relies on old KVM behavior of %rip being
8028          * incremented prior to exiting to userspace to handle "OUT 0x7e".
8029          */
8030         if (port == 0x7e &&
8031             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
8032                 vcpu->arch.complete_userspace_io =
8033                         complete_fast_pio_out_port_0x7e;
8034                 kvm_skip_emulated_instruction(vcpu);
8035         } else {
8036                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
8037                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
8038         }
8039         return 0;
8040 }
8041
8042 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
8043 {
8044         unsigned long val;
8045
8046         /* We should only ever be called with arch.pio.count equal to 1 */
8047         BUG_ON(vcpu->arch.pio.count != 1);
8048
8049         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
8050                 vcpu->arch.pio.count = 0;
8051                 return 1;
8052         }
8053
8054         /* For size less than 4 we merge, else we zero extend */
8055         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
8056
8057         /*
8058          * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
8059          * the copy and tracing
8060          */
8061         emulator_pio_in(vcpu, vcpu->arch.pio.size, vcpu->arch.pio.port, &val, 1);
8062         kvm_rax_write(vcpu, val);
8063
8064         return kvm_skip_emulated_instruction(vcpu);
8065 }
8066
8067 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
8068                            unsigned short port)
8069 {
8070         unsigned long val;
8071         int ret;
8072
8073         /* For size less than 4 we merge, else we zero extend */
8074         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
8075
8076         ret = emulator_pio_in(vcpu, size, port, &val, 1);
8077         if (ret) {
8078                 kvm_rax_write(vcpu, val);
8079                 return ret;
8080         }
8081
8082         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
8083         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
8084
8085         return 0;
8086 }
8087
8088 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
8089 {
8090         int ret;
8091
8092         if (in)
8093                 ret = kvm_fast_pio_in(vcpu, size, port);
8094         else
8095                 ret = kvm_fast_pio_out(vcpu, size, port);
8096         return ret && kvm_skip_emulated_instruction(vcpu);
8097 }
8098 EXPORT_SYMBOL_GPL(kvm_fast_pio);
8099
8100 static int kvmclock_cpu_down_prep(unsigned int cpu)
8101 {
8102         __this_cpu_write(cpu_tsc_khz, 0);
8103         return 0;
8104 }
8105
8106 static void tsc_khz_changed(void *data)
8107 {
8108         struct cpufreq_freqs *freq = data;
8109         unsigned long khz = 0;
8110
8111         if (data)
8112                 khz = freq->new;
8113         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8114                 khz = cpufreq_quick_get(raw_smp_processor_id());
8115         if (!khz)
8116                 khz = tsc_khz;
8117         __this_cpu_write(cpu_tsc_khz, khz);
8118 }
8119
8120 #ifdef CONFIG_X86_64
8121 static void kvm_hyperv_tsc_notifier(void)
8122 {
8123         struct kvm *kvm;
8124         struct kvm_vcpu *vcpu;
8125         int cpu;
8126         unsigned long flags;
8127
8128         mutex_lock(&kvm_lock);
8129         list_for_each_entry(kvm, &vm_list, vm_list)
8130                 kvm_make_mclock_inprogress_request(kvm);
8131
8132         hyperv_stop_tsc_emulation();
8133
8134         /* TSC frequency always matches when on Hyper-V */
8135         for_each_present_cpu(cpu)
8136                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
8137         kvm_max_guest_tsc_khz = tsc_khz;
8138
8139         list_for_each_entry(kvm, &vm_list, vm_list) {
8140                 struct kvm_arch *ka = &kvm->arch;
8141
8142                 raw_spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
8143                 pvclock_update_vm_gtod_copy(kvm);
8144                 raw_spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
8145
8146                 kvm_for_each_vcpu(cpu, vcpu, kvm)
8147                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8148
8149                 kvm_for_each_vcpu(cpu, vcpu, kvm)
8150                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
8151         }
8152         mutex_unlock(&kvm_lock);
8153 }
8154 #endif
8155
8156 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
8157 {
8158         struct kvm *kvm;
8159         struct kvm_vcpu *vcpu;
8160         int i, send_ipi = 0;
8161
8162         /*
8163          * We allow guests to temporarily run on slowing clocks,
8164          * provided we notify them after, or to run on accelerating
8165          * clocks, provided we notify them before.  Thus time never
8166          * goes backwards.
8167          *
8168          * However, we have a problem.  We can't atomically update
8169          * the frequency of a given CPU from this function; it is
8170          * merely a notifier, which can be called from any CPU.
8171          * Changing the TSC frequency at arbitrary points in time
8172          * requires a recomputation of local variables related to
8173          * the TSC for each VCPU.  We must flag these local variables
8174          * to be updated and be sure the update takes place with the
8175          * new frequency before any guests proceed.
8176          *
8177          * Unfortunately, the combination of hotplug CPU and frequency
8178          * change creates an intractable locking scenario; the order
8179          * of when these callouts happen is undefined with respect to
8180          * CPU hotplug, and they can race with each other.  As such,
8181          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
8182          * undefined; you can actually have a CPU frequency change take
8183          * place in between the computation of X and the setting of the
8184          * variable.  To protect against this problem, all updates of
8185          * the per_cpu tsc_khz variable are done in an interrupt
8186          * protected IPI, and all callers wishing to update the value
8187          * must wait for a synchronous IPI to complete (which is trivial
8188          * if the caller is on the CPU already).  This establishes the
8189          * necessary total order on variable updates.
8190          *
8191          * Note that because a guest time update may take place
8192          * anytime after the setting of the VCPU's request bit, the
8193          * correct TSC value must be set before the request.  However,
8194          * to ensure the update actually makes it to any guest which
8195          * starts running in hardware virtualization between the set
8196          * and the acquisition of the spinlock, we must also ping the
8197          * CPU after setting the request bit.
8198          *
8199          */
8200
8201         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8202
8203         mutex_lock(&kvm_lock);
8204         list_for_each_entry(kvm, &vm_list, vm_list) {
8205                 kvm_for_each_vcpu(i, vcpu, kvm) {
8206                         if (vcpu->cpu != cpu)
8207                                 continue;
8208                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8209                         if (vcpu->cpu != raw_smp_processor_id())
8210                                 send_ipi = 1;
8211                 }
8212         }
8213         mutex_unlock(&kvm_lock);
8214
8215         if (freq->old < freq->new && send_ipi) {
8216                 /*
8217                  * We upscale the frequency.  Must make the guest
8218                  * doesn't see old kvmclock values while running with
8219                  * the new frequency, otherwise we risk the guest sees
8220                  * time go backwards.
8221                  *
8222                  * In case we update the frequency for another cpu
8223                  * (which might be in guest context) send an interrupt
8224                  * to kick the cpu out of guest context.  Next time
8225                  * guest context is entered kvmclock will be updated,
8226                  * so the guest will not see stale values.
8227                  */
8228                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8229         }
8230 }
8231
8232 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
8233                                      void *data)
8234 {
8235         struct cpufreq_freqs *freq = data;
8236         int cpu;
8237
8238         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
8239                 return 0;
8240         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
8241                 return 0;
8242
8243         for_each_cpu(cpu, freq->policy->cpus)
8244                 __kvmclock_cpufreq_notifier(freq, cpu);
8245
8246         return 0;
8247 }
8248
8249 static struct notifier_block kvmclock_cpufreq_notifier_block = {
8250         .notifier_call  = kvmclock_cpufreq_notifier
8251 };
8252
8253 static int kvmclock_cpu_online(unsigned int cpu)
8254 {
8255         tsc_khz_changed(NULL);
8256         return 0;
8257 }
8258
8259 static void kvm_timer_init(void)
8260 {
8261         max_tsc_khz = tsc_khz;
8262
8263         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
8264 #ifdef CONFIG_CPU_FREQ
8265                 struct cpufreq_policy *policy;
8266                 int cpu;
8267
8268                 cpu = get_cpu();
8269                 policy = cpufreq_cpu_get(cpu);
8270                 if (policy) {
8271                         if (policy->cpuinfo.max_freq)
8272                                 max_tsc_khz = policy->cpuinfo.max_freq;
8273                         cpufreq_cpu_put(policy);
8274                 }
8275                 put_cpu();
8276 #endif
8277                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
8278                                           CPUFREQ_TRANSITION_NOTIFIER);
8279         }
8280
8281         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
8282                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
8283 }
8284
8285 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
8286 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
8287
8288 int kvm_is_in_guest(void)
8289 {
8290         return __this_cpu_read(current_vcpu) != NULL;
8291 }
8292
8293 static int kvm_is_user_mode(void)
8294 {
8295         int user_mode = 3;
8296
8297         if (__this_cpu_read(current_vcpu))
8298                 user_mode = static_call(kvm_x86_get_cpl)(__this_cpu_read(current_vcpu));
8299
8300         return user_mode != 0;
8301 }
8302
8303 static unsigned long kvm_get_guest_ip(void)
8304 {
8305         unsigned long ip = 0;
8306
8307         if (__this_cpu_read(current_vcpu))
8308                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
8309
8310         return ip;
8311 }
8312
8313 static void kvm_handle_intel_pt_intr(void)
8314 {
8315         struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
8316
8317         kvm_make_request(KVM_REQ_PMI, vcpu);
8318         __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
8319                         (unsigned long *)&vcpu->arch.pmu.global_status);
8320 }
8321
8322 static struct perf_guest_info_callbacks kvm_guest_cbs = {
8323         .is_in_guest            = kvm_is_in_guest,
8324         .is_user_mode           = kvm_is_user_mode,
8325         .get_guest_ip           = kvm_get_guest_ip,
8326         .handle_intel_pt_intr   = kvm_handle_intel_pt_intr,
8327 };
8328
8329 #ifdef CONFIG_X86_64
8330 static void pvclock_gtod_update_fn(struct work_struct *work)
8331 {
8332         struct kvm *kvm;
8333
8334         struct kvm_vcpu *vcpu;
8335         int i;
8336
8337         mutex_lock(&kvm_lock);
8338         list_for_each_entry(kvm, &vm_list, vm_list)
8339                 kvm_for_each_vcpu(i, vcpu, kvm)
8340                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
8341         atomic_set(&kvm_guest_has_master_clock, 0);
8342         mutex_unlock(&kvm_lock);
8343 }
8344
8345 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
8346
8347 /*
8348  * Indirection to move queue_work() out of the tk_core.seq write held
8349  * region to prevent possible deadlocks against time accessors which
8350  * are invoked with work related locks held.
8351  */
8352 static void pvclock_irq_work_fn(struct irq_work *w)
8353 {
8354         queue_work(system_long_wq, &pvclock_gtod_work);
8355 }
8356
8357 static DEFINE_IRQ_WORK(pvclock_irq_work, pvclock_irq_work_fn);
8358
8359 /*
8360  * Notification about pvclock gtod data update.
8361  */
8362 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
8363                                void *priv)
8364 {
8365         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
8366         struct timekeeper *tk = priv;
8367
8368         update_pvclock_gtod(tk);
8369
8370         /*
8371          * Disable master clock if host does not trust, or does not use,
8372          * TSC based clocksource. Delegate queue_work() to irq_work as
8373          * this is invoked with tk_core.seq write held.
8374          */
8375         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
8376             atomic_read(&kvm_guest_has_master_clock) != 0)
8377                 irq_work_queue(&pvclock_irq_work);
8378         return 0;
8379 }
8380
8381 static struct notifier_block pvclock_gtod_notifier = {
8382         .notifier_call = pvclock_gtod_notify,
8383 };
8384 #endif
8385
8386 int kvm_arch_init(void *opaque)
8387 {
8388         struct kvm_x86_init_ops *ops = opaque;
8389         int r;
8390
8391         if (kvm_x86_ops.hardware_enable) {
8392                 printk(KERN_ERR "kvm: already loaded the other module\n");
8393                 r = -EEXIST;
8394                 goto out;
8395         }
8396
8397         if (!ops->cpu_has_kvm_support()) {
8398                 pr_err_ratelimited("kvm: no hardware support\n");
8399                 r = -EOPNOTSUPP;
8400                 goto out;
8401         }
8402         if (ops->disabled_by_bios()) {
8403                 pr_err_ratelimited("kvm: disabled by bios\n");
8404                 r = -EOPNOTSUPP;
8405                 goto out;
8406         }
8407
8408         /*
8409          * KVM explicitly assumes that the guest has an FPU and
8410          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
8411          * vCPU's FPU state as a fxregs_state struct.
8412          */
8413         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
8414                 printk(KERN_ERR "kvm: inadequate fpu\n");
8415                 r = -EOPNOTSUPP;
8416                 goto out;
8417         }
8418
8419         r = -ENOMEM;
8420         x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
8421                                           __alignof__(struct fpu), SLAB_ACCOUNT,
8422                                           NULL);
8423         if (!x86_fpu_cache) {
8424                 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
8425                 goto out;
8426         }
8427
8428         x86_emulator_cache = kvm_alloc_emulator_cache();
8429         if (!x86_emulator_cache) {
8430                 pr_err("kvm: failed to allocate cache for x86 emulator\n");
8431                 goto out_free_x86_fpu_cache;
8432         }
8433
8434         user_return_msrs = alloc_percpu(struct kvm_user_return_msrs);
8435         if (!user_return_msrs) {
8436                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_user_return_msrs\n");
8437                 goto out_free_x86_emulator_cache;
8438         }
8439         kvm_nr_uret_msrs = 0;
8440
8441         r = kvm_mmu_module_init();
8442         if (r)
8443                 goto out_free_percpu;
8444
8445         kvm_timer_init();
8446
8447         perf_register_guest_info_callbacks(&kvm_guest_cbs);
8448
8449         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
8450                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
8451                 supported_xcr0 = host_xcr0 & KVM_SUPPORTED_XCR0;
8452         }
8453
8454         if (pi_inject_timer == -1)
8455                 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
8456 #ifdef CONFIG_X86_64
8457         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
8458
8459         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8460                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
8461 #endif
8462
8463         return 0;
8464
8465 out_free_percpu:
8466         free_percpu(user_return_msrs);
8467 out_free_x86_emulator_cache:
8468         kmem_cache_destroy(x86_emulator_cache);
8469 out_free_x86_fpu_cache:
8470         kmem_cache_destroy(x86_fpu_cache);
8471 out:
8472         return r;
8473 }
8474
8475 void kvm_arch_exit(void)
8476 {
8477 #ifdef CONFIG_X86_64
8478         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8479                 clear_hv_tscchange_cb();
8480 #endif
8481         kvm_lapic_exit();
8482         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
8483
8484         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8485                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
8486                                             CPUFREQ_TRANSITION_NOTIFIER);
8487         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
8488 #ifdef CONFIG_X86_64
8489         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
8490         irq_work_sync(&pvclock_irq_work);
8491         cancel_work_sync(&pvclock_gtod_work);
8492 #endif
8493         kvm_x86_ops.hardware_enable = NULL;
8494         kvm_mmu_module_exit();
8495         free_percpu(user_return_msrs);
8496         kmem_cache_destroy(x86_emulator_cache);
8497         kmem_cache_destroy(x86_fpu_cache);
8498 #ifdef CONFIG_KVM_XEN
8499         static_key_deferred_flush(&kvm_xen_enabled);
8500         WARN_ON(static_branch_unlikely(&kvm_xen_enabled.key));
8501 #endif
8502 }
8503
8504 static int __kvm_vcpu_halt(struct kvm_vcpu *vcpu, int state, int reason)
8505 {
8506         ++vcpu->stat.halt_exits;
8507         if (lapic_in_kernel(vcpu)) {
8508                 vcpu->arch.mp_state = state;
8509                 return 1;
8510         } else {
8511                 vcpu->run->exit_reason = reason;
8512                 return 0;
8513         }
8514 }
8515
8516 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
8517 {
8518         return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_HALTED, KVM_EXIT_HLT);
8519 }
8520 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
8521
8522 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
8523 {
8524         int ret = kvm_skip_emulated_instruction(vcpu);
8525         /*
8526          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
8527          * KVM_EXIT_DEBUG here.
8528          */
8529         return kvm_vcpu_halt(vcpu) && ret;
8530 }
8531 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
8532
8533 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu)
8534 {
8535         int ret = kvm_skip_emulated_instruction(vcpu);
8536
8537         return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_AP_RESET_HOLD, KVM_EXIT_AP_RESET_HOLD) && ret;
8538 }
8539 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold);
8540
8541 #ifdef CONFIG_X86_64
8542 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
8543                                 unsigned long clock_type)
8544 {
8545         struct kvm_clock_pairing clock_pairing;
8546         struct timespec64 ts;
8547         u64 cycle;
8548         int ret;
8549
8550         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
8551                 return -KVM_EOPNOTSUPP;
8552
8553         if (!kvm_get_walltime_and_clockread(&ts, &cycle))
8554                 return -KVM_EOPNOTSUPP;
8555
8556         clock_pairing.sec = ts.tv_sec;
8557         clock_pairing.nsec = ts.tv_nsec;
8558         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
8559         clock_pairing.flags = 0;
8560         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
8561
8562         ret = 0;
8563         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
8564                             sizeof(struct kvm_clock_pairing)))
8565                 ret = -KVM_EFAULT;
8566
8567         return ret;
8568 }
8569 #endif
8570
8571 /*
8572  * kvm_pv_kick_cpu_op:  Kick a vcpu.
8573  *
8574  * @apicid - apicid of vcpu to be kicked.
8575  */
8576 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
8577 {
8578         struct kvm_lapic_irq lapic_irq;
8579
8580         lapic_irq.shorthand = APIC_DEST_NOSHORT;
8581         lapic_irq.dest_mode = APIC_DEST_PHYSICAL;
8582         lapic_irq.level = 0;
8583         lapic_irq.dest_id = apicid;
8584         lapic_irq.msi_redir_hint = false;
8585
8586         lapic_irq.delivery_mode = APIC_DM_REMRD;
8587         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
8588 }
8589
8590 bool kvm_apicv_activated(struct kvm *kvm)
8591 {
8592         return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
8593 }
8594 EXPORT_SYMBOL_GPL(kvm_apicv_activated);
8595
8596 static void kvm_apicv_init(struct kvm *kvm)
8597 {
8598         mutex_init(&kvm->arch.apicv_update_lock);
8599
8600         if (enable_apicv)
8601                 clear_bit(APICV_INHIBIT_REASON_DISABLE,
8602                           &kvm->arch.apicv_inhibit_reasons);
8603         else
8604                 set_bit(APICV_INHIBIT_REASON_DISABLE,
8605                         &kvm->arch.apicv_inhibit_reasons);
8606 }
8607
8608 static void kvm_sched_yield(struct kvm_vcpu *vcpu, unsigned long dest_id)
8609 {
8610         struct kvm_vcpu *target = NULL;
8611         struct kvm_apic_map *map;
8612
8613         vcpu->stat.directed_yield_attempted++;
8614
8615         if (single_task_running())
8616                 goto no_yield;
8617
8618         rcu_read_lock();
8619         map = rcu_dereference(vcpu->kvm->arch.apic_map);
8620
8621         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
8622                 target = map->phys_map[dest_id]->vcpu;
8623
8624         rcu_read_unlock();
8625
8626         if (!target || !READ_ONCE(target->ready))
8627                 goto no_yield;
8628
8629         /* Ignore requests to yield to self */
8630         if (vcpu == target)
8631                 goto no_yield;
8632
8633         if (kvm_vcpu_yield_to(target) <= 0)
8634                 goto no_yield;
8635
8636         vcpu->stat.directed_yield_successful++;
8637
8638 no_yield:
8639         return;
8640 }
8641
8642 static int complete_hypercall_exit(struct kvm_vcpu *vcpu)
8643 {
8644         u64 ret = vcpu->run->hypercall.ret;
8645
8646         if (!is_64_bit_mode(vcpu))
8647                 ret = (u32)ret;
8648         kvm_rax_write(vcpu, ret);
8649         ++vcpu->stat.hypercalls;
8650         return kvm_skip_emulated_instruction(vcpu);
8651 }
8652
8653 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
8654 {
8655         unsigned long nr, a0, a1, a2, a3, ret;
8656         int op_64_bit;
8657
8658         if (kvm_xen_hypercall_enabled(vcpu->kvm))
8659                 return kvm_xen_hypercall(vcpu);
8660
8661         if (kvm_hv_hypercall_enabled(vcpu))
8662                 return kvm_hv_hypercall(vcpu);
8663
8664         nr = kvm_rax_read(vcpu);
8665         a0 = kvm_rbx_read(vcpu);
8666         a1 = kvm_rcx_read(vcpu);
8667         a2 = kvm_rdx_read(vcpu);
8668         a3 = kvm_rsi_read(vcpu);
8669
8670         trace_kvm_hypercall(nr, a0, a1, a2, a3);
8671
8672         op_64_bit = is_64_bit_mode(vcpu);
8673         if (!op_64_bit) {
8674                 nr &= 0xFFFFFFFF;
8675                 a0 &= 0xFFFFFFFF;
8676                 a1 &= 0xFFFFFFFF;
8677                 a2 &= 0xFFFFFFFF;
8678                 a3 &= 0xFFFFFFFF;
8679         }
8680
8681         if (static_call(kvm_x86_get_cpl)(vcpu) != 0) {
8682                 ret = -KVM_EPERM;
8683                 goto out;
8684         }
8685
8686         ret = -KVM_ENOSYS;
8687
8688         switch (nr) {
8689         case KVM_HC_VAPIC_POLL_IRQ:
8690                 ret = 0;
8691                 break;
8692         case KVM_HC_KICK_CPU:
8693                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_UNHALT))
8694                         break;
8695
8696                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
8697                 kvm_sched_yield(vcpu, a1);
8698                 ret = 0;
8699                 break;
8700 #ifdef CONFIG_X86_64
8701         case KVM_HC_CLOCK_PAIRING:
8702                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
8703                 break;
8704 #endif
8705         case KVM_HC_SEND_IPI:
8706                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SEND_IPI))
8707                         break;
8708
8709                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
8710                 break;
8711         case KVM_HC_SCHED_YIELD:
8712                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SCHED_YIELD))
8713                         break;
8714
8715                 kvm_sched_yield(vcpu, a0);
8716                 ret = 0;
8717                 break;
8718         case KVM_HC_MAP_GPA_RANGE: {
8719                 u64 gpa = a0, npages = a1, attrs = a2;
8720
8721                 ret = -KVM_ENOSYS;
8722                 if (!(vcpu->kvm->arch.hypercall_exit_enabled & (1 << KVM_HC_MAP_GPA_RANGE)))
8723                         break;
8724
8725                 if (!PAGE_ALIGNED(gpa) || !npages ||
8726                     gpa_to_gfn(gpa) + npages <= gpa_to_gfn(gpa)) {
8727                         ret = -KVM_EINVAL;
8728                         break;
8729                 }
8730
8731                 vcpu->run->exit_reason        = KVM_EXIT_HYPERCALL;
8732                 vcpu->run->hypercall.nr       = KVM_HC_MAP_GPA_RANGE;
8733                 vcpu->run->hypercall.args[0]  = gpa;
8734                 vcpu->run->hypercall.args[1]  = npages;
8735                 vcpu->run->hypercall.args[2]  = attrs;
8736                 vcpu->run->hypercall.longmode = op_64_bit;
8737                 vcpu->arch.complete_userspace_io = complete_hypercall_exit;
8738                 return 0;
8739         }
8740         default:
8741                 ret = -KVM_ENOSYS;
8742                 break;
8743         }
8744 out:
8745         if (!op_64_bit)
8746                 ret = (u32)ret;
8747         kvm_rax_write(vcpu, ret);
8748
8749         ++vcpu->stat.hypercalls;
8750         return kvm_skip_emulated_instruction(vcpu);
8751 }
8752 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
8753
8754 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
8755 {
8756         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8757         char instruction[3];
8758         unsigned long rip = kvm_rip_read(vcpu);
8759
8760         static_call(kvm_x86_patch_hypercall)(vcpu, instruction);
8761
8762         return emulator_write_emulated(ctxt, rip, instruction, 3,
8763                 &ctxt->exception);
8764 }
8765
8766 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
8767 {
8768         return vcpu->run->request_interrupt_window &&
8769                 likely(!pic_in_kernel(vcpu->kvm));
8770 }
8771
8772 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
8773 {
8774         struct kvm_run *kvm_run = vcpu->run;
8775
8776         /*
8777          * if_flag is obsolete and useless, so do not bother
8778          * setting it for SEV-ES guests.  Userspace can just
8779          * use kvm_run->ready_for_interrupt_injection.
8780          */
8781         kvm_run->if_flag = !vcpu->arch.guest_state_protected
8782                 && (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
8783
8784         kvm_run->cr8 = kvm_get_cr8(vcpu);
8785         kvm_run->apic_base = kvm_get_apic_base(vcpu);
8786         kvm_run->ready_for_interrupt_injection =
8787                 pic_in_kernel(vcpu->kvm) ||
8788                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
8789
8790         if (is_smm(vcpu))
8791                 kvm_run->flags |= KVM_RUN_X86_SMM;
8792 }
8793
8794 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
8795 {
8796         int max_irr, tpr;
8797
8798         if (!kvm_x86_ops.update_cr8_intercept)
8799                 return;
8800
8801         if (!lapic_in_kernel(vcpu))
8802                 return;
8803
8804         if (vcpu->arch.apicv_active)
8805                 return;
8806
8807         if (!vcpu->arch.apic->vapic_addr)
8808                 max_irr = kvm_lapic_find_highest_irr(vcpu);
8809         else
8810                 max_irr = -1;
8811
8812         if (max_irr != -1)
8813                 max_irr >>= 4;
8814
8815         tpr = kvm_lapic_get_cr8(vcpu);
8816
8817         static_call(kvm_x86_update_cr8_intercept)(vcpu, tpr, max_irr);
8818 }
8819
8820
8821 int kvm_check_nested_events(struct kvm_vcpu *vcpu)
8822 {
8823         if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
8824                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
8825                 return 1;
8826         }
8827
8828         return kvm_x86_ops.nested_ops->check_events(vcpu);
8829 }
8830
8831 static void kvm_inject_exception(struct kvm_vcpu *vcpu)
8832 {
8833         if (vcpu->arch.exception.error_code && !is_protmode(vcpu))
8834                 vcpu->arch.exception.error_code = false;
8835         static_call(kvm_x86_queue_exception)(vcpu);
8836 }
8837
8838 static int inject_pending_event(struct kvm_vcpu *vcpu, bool *req_immediate_exit)
8839 {
8840         int r;
8841         bool can_inject = true;
8842
8843         /* try to reinject previous events if any */
8844
8845         if (vcpu->arch.exception.injected) {
8846                 kvm_inject_exception(vcpu);
8847                 can_inject = false;
8848         }
8849         /*
8850          * Do not inject an NMI or interrupt if there is a pending
8851          * exception.  Exceptions and interrupts are recognized at
8852          * instruction boundaries, i.e. the start of an instruction.
8853          * Trap-like exceptions, e.g. #DB, have higher priority than
8854          * NMIs and interrupts, i.e. traps are recognized before an
8855          * NMI/interrupt that's pending on the same instruction.
8856          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
8857          * priority, but are only generated (pended) during instruction
8858          * execution, i.e. a pending fault-like exception means the
8859          * fault occurred on the *previous* instruction and must be
8860          * serviced prior to recognizing any new events in order to
8861          * fully complete the previous instruction.
8862          */
8863         else if (!vcpu->arch.exception.pending) {
8864                 if (vcpu->arch.nmi_injected) {
8865                         static_call(kvm_x86_set_nmi)(vcpu);
8866                         can_inject = false;
8867                 } else if (vcpu->arch.interrupt.injected) {
8868                         static_call(kvm_x86_set_irq)(vcpu);
8869                         can_inject = false;
8870                 }
8871         }
8872
8873         WARN_ON_ONCE(vcpu->arch.exception.injected &&
8874                      vcpu->arch.exception.pending);
8875
8876         /*
8877          * Call check_nested_events() even if we reinjected a previous event
8878          * in order for caller to determine if it should require immediate-exit
8879          * from L2 to L1 due to pending L1 events which require exit
8880          * from L2 to L1.
8881          */
8882         if (is_guest_mode(vcpu)) {
8883                 r = kvm_check_nested_events(vcpu);
8884                 if (r < 0)
8885                         goto out;
8886         }
8887
8888         /* try to inject new event if pending */
8889         if (vcpu->arch.exception.pending) {
8890                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
8891                                         vcpu->arch.exception.has_error_code,
8892                                         vcpu->arch.exception.error_code);
8893
8894                 vcpu->arch.exception.pending = false;
8895                 vcpu->arch.exception.injected = true;
8896
8897                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
8898                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
8899                                              X86_EFLAGS_RF);
8900
8901                 if (vcpu->arch.exception.nr == DB_VECTOR) {
8902                         kvm_deliver_exception_payload(vcpu);
8903                         if (vcpu->arch.dr7 & DR7_GD) {
8904                                 vcpu->arch.dr7 &= ~DR7_GD;
8905                                 kvm_update_dr7(vcpu);
8906                         }
8907                 }
8908
8909                 kvm_inject_exception(vcpu);
8910                 can_inject = false;
8911         }
8912
8913         /* Don't inject interrupts if the user asked to avoid doing so */
8914         if (vcpu->guest_debug & KVM_GUESTDBG_BLOCKIRQ)
8915                 return 0;
8916
8917         /*
8918          * Finally, inject interrupt events.  If an event cannot be injected
8919          * due to architectural conditions (e.g. IF=0) a window-open exit
8920          * will re-request KVM_REQ_EVENT.  Sometimes however an event is pending
8921          * and can architecturally be injected, but we cannot do it right now:
8922          * an interrupt could have arrived just now and we have to inject it
8923          * as a vmexit, or there could already an event in the queue, which is
8924          * indicated by can_inject.  In that case we request an immediate exit
8925          * in order to make progress and get back here for another iteration.
8926          * The kvm_x86_ops hooks communicate this by returning -EBUSY.
8927          */
8928         if (vcpu->arch.smi_pending) {
8929                 r = can_inject ? static_call(kvm_x86_smi_allowed)(vcpu, true) : -EBUSY;
8930                 if (r < 0)
8931                         goto out;
8932                 if (r) {
8933                         vcpu->arch.smi_pending = false;
8934                         ++vcpu->arch.smi_count;
8935                         enter_smm(vcpu);
8936                         can_inject = false;
8937                 } else
8938                         static_call(kvm_x86_enable_smi_window)(vcpu);
8939         }
8940
8941         if (vcpu->arch.nmi_pending) {
8942                 r = can_inject ? static_call(kvm_x86_nmi_allowed)(vcpu, true) : -EBUSY;
8943                 if (r < 0)
8944                         goto out;
8945                 if (r) {
8946                         --vcpu->arch.nmi_pending;
8947                         vcpu->arch.nmi_injected = true;
8948                         static_call(kvm_x86_set_nmi)(vcpu);
8949                         can_inject = false;
8950                         WARN_ON(static_call(kvm_x86_nmi_allowed)(vcpu, true) < 0);
8951                 }
8952                 if (vcpu->arch.nmi_pending)
8953                         static_call(kvm_x86_enable_nmi_window)(vcpu);
8954         }
8955
8956         if (kvm_cpu_has_injectable_intr(vcpu)) {
8957                 r = can_inject ? static_call(kvm_x86_interrupt_allowed)(vcpu, true) : -EBUSY;
8958                 if (r < 0)
8959                         goto out;
8960                 if (r) {
8961                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu), false);
8962                         static_call(kvm_x86_set_irq)(vcpu);
8963                         WARN_ON(static_call(kvm_x86_interrupt_allowed)(vcpu, true) < 0);
8964                 }
8965                 if (kvm_cpu_has_injectable_intr(vcpu))
8966                         static_call(kvm_x86_enable_irq_window)(vcpu);
8967         }
8968
8969         if (is_guest_mode(vcpu) &&
8970             kvm_x86_ops.nested_ops->hv_timer_pending &&
8971             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
8972                 *req_immediate_exit = true;
8973
8974         WARN_ON(vcpu->arch.exception.pending);
8975         return 0;
8976
8977 out:
8978         if (r == -EBUSY) {
8979                 *req_immediate_exit = true;
8980                 r = 0;
8981         }
8982         return r;
8983 }
8984
8985 static void process_nmi(struct kvm_vcpu *vcpu)
8986 {
8987         unsigned limit = 2;
8988
8989         /*
8990          * x86 is limited to one NMI running, and one NMI pending after it.
8991          * If an NMI is already in progress, limit further NMIs to just one.
8992          * Otherwise, allow two (and we'll inject the first one immediately).
8993          */
8994         if (static_call(kvm_x86_get_nmi_mask)(vcpu) || vcpu->arch.nmi_injected)
8995                 limit = 1;
8996
8997         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
8998         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
8999         kvm_make_request(KVM_REQ_EVENT, vcpu);
9000 }
9001
9002 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
9003 {
9004         u32 flags = 0;
9005         flags |= seg->g       << 23;
9006         flags |= seg->db      << 22;
9007         flags |= seg->l       << 21;
9008         flags |= seg->avl     << 20;
9009         flags |= seg->present << 15;
9010         flags |= seg->dpl     << 13;
9011         flags |= seg->s       << 12;
9012         flags |= seg->type    << 8;
9013         return flags;
9014 }
9015
9016 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
9017 {
9018         struct kvm_segment seg;
9019         int offset;
9020
9021         kvm_get_segment(vcpu, &seg, n);
9022         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
9023
9024         if (n < 3)
9025                 offset = 0x7f84 + n * 12;
9026         else
9027                 offset = 0x7f2c + (n - 3) * 12;
9028
9029         put_smstate(u32, buf, offset + 8, seg.base);
9030         put_smstate(u32, buf, offset + 4, seg.limit);
9031         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
9032 }
9033
9034 #ifdef CONFIG_X86_64
9035 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
9036 {
9037         struct kvm_segment seg;
9038         int offset;
9039         u16 flags;
9040
9041         kvm_get_segment(vcpu, &seg, n);
9042         offset = 0x7e00 + n * 16;
9043
9044         flags = enter_smm_get_segment_flags(&seg) >> 8;
9045         put_smstate(u16, buf, offset, seg.selector);
9046         put_smstate(u16, buf, offset + 2, flags);
9047         put_smstate(u32, buf, offset + 4, seg.limit);
9048         put_smstate(u64, buf, offset + 8, seg.base);
9049 }
9050 #endif
9051
9052 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
9053 {
9054         struct desc_ptr dt;
9055         struct kvm_segment seg;
9056         unsigned long val;
9057         int i;
9058
9059         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
9060         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
9061         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
9062         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
9063
9064         for (i = 0; i < 8; i++)
9065                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read_raw(vcpu, i));
9066
9067         kvm_get_dr(vcpu, 6, &val);
9068         put_smstate(u32, buf, 0x7fcc, (u32)val);
9069         kvm_get_dr(vcpu, 7, &val);
9070         put_smstate(u32, buf, 0x7fc8, (u32)val);
9071
9072         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
9073         put_smstate(u32, buf, 0x7fc4, seg.selector);
9074         put_smstate(u32, buf, 0x7f64, seg.base);
9075         put_smstate(u32, buf, 0x7f60, seg.limit);
9076         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
9077
9078         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
9079         put_smstate(u32, buf, 0x7fc0, seg.selector);
9080         put_smstate(u32, buf, 0x7f80, seg.base);
9081         put_smstate(u32, buf, 0x7f7c, seg.limit);
9082         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
9083
9084         static_call(kvm_x86_get_gdt)(vcpu, &dt);
9085         put_smstate(u32, buf, 0x7f74, dt.address);
9086         put_smstate(u32, buf, 0x7f70, dt.size);
9087
9088         static_call(kvm_x86_get_idt)(vcpu, &dt);
9089         put_smstate(u32, buf, 0x7f58, dt.address);
9090         put_smstate(u32, buf, 0x7f54, dt.size);
9091
9092         for (i = 0; i < 6; i++)
9093                 enter_smm_save_seg_32(vcpu, buf, i);
9094
9095         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
9096
9097         /* revision id */
9098         put_smstate(u32, buf, 0x7efc, 0x00020000);
9099         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
9100 }
9101
9102 #ifdef CONFIG_X86_64
9103 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
9104 {
9105         struct desc_ptr dt;
9106         struct kvm_segment seg;
9107         unsigned long val;
9108         int i;
9109
9110         for (i = 0; i < 16; i++)
9111                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read_raw(vcpu, i));
9112
9113         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
9114         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
9115
9116         kvm_get_dr(vcpu, 6, &val);
9117         put_smstate(u64, buf, 0x7f68, val);
9118         kvm_get_dr(vcpu, 7, &val);
9119         put_smstate(u64, buf, 0x7f60, val);
9120
9121         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
9122         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
9123         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
9124
9125         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
9126
9127         /* revision id */
9128         put_smstate(u32, buf, 0x7efc, 0x00020064);
9129
9130         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
9131
9132         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
9133         put_smstate(u16, buf, 0x7e90, seg.selector);
9134         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
9135         put_smstate(u32, buf, 0x7e94, seg.limit);
9136         put_smstate(u64, buf, 0x7e98, seg.base);
9137
9138         static_call(kvm_x86_get_idt)(vcpu, &dt);
9139         put_smstate(u32, buf, 0x7e84, dt.size);
9140         put_smstate(u64, buf, 0x7e88, dt.address);
9141
9142         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
9143         put_smstate(u16, buf, 0x7e70, seg.selector);
9144         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
9145         put_smstate(u32, buf, 0x7e74, seg.limit);
9146         put_smstate(u64, buf, 0x7e78, seg.base);
9147
9148         static_call(kvm_x86_get_gdt)(vcpu, &dt);
9149         put_smstate(u32, buf, 0x7e64, dt.size);
9150         put_smstate(u64, buf, 0x7e68, dt.address);
9151
9152         for (i = 0; i < 6; i++)
9153                 enter_smm_save_seg_64(vcpu, buf, i);
9154 }
9155 #endif
9156
9157 static void enter_smm(struct kvm_vcpu *vcpu)
9158 {
9159         struct kvm_segment cs, ds;
9160         struct desc_ptr dt;
9161         unsigned long cr0;
9162         char buf[512];
9163
9164         memset(buf, 0, 512);
9165 #ifdef CONFIG_X86_64
9166         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9167                 enter_smm_save_state_64(vcpu, buf);
9168         else
9169 #endif
9170                 enter_smm_save_state_32(vcpu, buf);
9171
9172         /*
9173          * Give enter_smm() a chance to make ISA-specific changes to the vCPU
9174          * state (e.g. leave guest mode) after we've saved the state into the
9175          * SMM state-save area.
9176          */
9177         static_call(kvm_x86_enter_smm)(vcpu, buf);
9178
9179         kvm_smm_changed(vcpu, true);
9180         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
9181
9182         if (static_call(kvm_x86_get_nmi_mask)(vcpu))
9183                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
9184         else
9185                 static_call(kvm_x86_set_nmi_mask)(vcpu, true);
9186
9187         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
9188         kvm_rip_write(vcpu, 0x8000);
9189
9190         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
9191         static_call(kvm_x86_set_cr0)(vcpu, cr0);
9192         vcpu->arch.cr0 = cr0;
9193
9194         static_call(kvm_x86_set_cr4)(vcpu, 0);
9195
9196         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
9197         dt.address = dt.size = 0;
9198         static_call(kvm_x86_set_idt)(vcpu, &dt);
9199
9200         kvm_set_dr(vcpu, 7, DR7_FIXED_1);
9201
9202         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
9203         cs.base = vcpu->arch.smbase;
9204
9205         ds.selector = 0;
9206         ds.base = 0;
9207
9208         cs.limit    = ds.limit = 0xffffffff;
9209         cs.type     = ds.type = 0x3;
9210         cs.dpl      = ds.dpl = 0;
9211         cs.db       = ds.db = 0;
9212         cs.s        = ds.s = 1;
9213         cs.l        = ds.l = 0;
9214         cs.g        = ds.g = 1;
9215         cs.avl      = ds.avl = 0;
9216         cs.present  = ds.present = 1;
9217         cs.unusable = ds.unusable = 0;
9218         cs.padding  = ds.padding = 0;
9219
9220         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
9221         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
9222         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
9223         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
9224         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
9225         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
9226
9227 #ifdef CONFIG_X86_64
9228         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9229                 static_call(kvm_x86_set_efer)(vcpu, 0);
9230 #endif
9231
9232         kvm_update_cpuid_runtime(vcpu);
9233         kvm_mmu_reset_context(vcpu);
9234 }
9235
9236 static void process_smi(struct kvm_vcpu *vcpu)
9237 {
9238         vcpu->arch.smi_pending = true;
9239         kvm_make_request(KVM_REQ_EVENT, vcpu);
9240 }
9241
9242 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
9243                                        unsigned long *vcpu_bitmap)
9244 {
9245         cpumask_var_t cpus;
9246
9247         zalloc_cpumask_var(&cpus, GFP_ATOMIC);
9248
9249         kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC,
9250                                     NULL, vcpu_bitmap, cpus);
9251
9252         free_cpumask_var(cpus);
9253 }
9254
9255 void kvm_make_scan_ioapic_request(struct kvm *kvm)
9256 {
9257         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
9258 }
9259
9260 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
9261 {
9262         bool activate;
9263
9264         if (!lapic_in_kernel(vcpu))
9265                 return;
9266
9267         mutex_lock(&vcpu->kvm->arch.apicv_update_lock);
9268
9269         activate = kvm_apicv_activated(vcpu->kvm);
9270         if (vcpu->arch.apicv_active == activate)
9271                 goto out;
9272
9273         vcpu->arch.apicv_active = activate;
9274         kvm_apic_update_apicv(vcpu);
9275         static_call(kvm_x86_refresh_apicv_exec_ctrl)(vcpu);
9276
9277         /*
9278          * When APICv gets disabled, we may still have injected interrupts
9279          * pending. At the same time, KVM_REQ_EVENT may not be set as APICv was
9280          * still active when the interrupt got accepted. Make sure
9281          * inject_pending_event() is called to check for that.
9282          */
9283         if (!vcpu->arch.apicv_active)
9284                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9285
9286 out:
9287         mutex_unlock(&vcpu->kvm->arch.apicv_update_lock);
9288 }
9289 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv);
9290
9291 void __kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
9292 {
9293         unsigned long old, new;
9294
9295         if (!kvm_x86_ops.check_apicv_inhibit_reasons ||
9296             !static_call(kvm_x86_check_apicv_inhibit_reasons)(bit))
9297                 return;
9298
9299         old = new = kvm->arch.apicv_inhibit_reasons;
9300
9301         if (activate)
9302                 __clear_bit(bit, &new);
9303         else
9304                 __set_bit(bit, &new);
9305
9306         if (!!old != !!new) {
9307                 trace_kvm_apicv_update_request(activate, bit);
9308                 kvm_make_all_cpus_request(kvm, KVM_REQ_APICV_UPDATE);
9309                 kvm->arch.apicv_inhibit_reasons = new;
9310                 if (new) {
9311                         unsigned long gfn = gpa_to_gfn(APIC_DEFAULT_PHYS_BASE);
9312                         kvm_zap_gfn_range(kvm, gfn, gfn+1);
9313                 }
9314         } else
9315                 kvm->arch.apicv_inhibit_reasons = new;
9316 }
9317 EXPORT_SYMBOL_GPL(__kvm_request_apicv_update);
9318
9319 void kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
9320 {
9321         mutex_lock(&kvm->arch.apicv_update_lock);
9322         __kvm_request_apicv_update(kvm, activate, bit);
9323         mutex_unlock(&kvm->arch.apicv_update_lock);
9324 }
9325 EXPORT_SYMBOL_GPL(kvm_request_apicv_update);
9326
9327 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
9328 {
9329         if (!kvm_apic_present(vcpu))
9330                 return;
9331
9332         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
9333
9334         if (irqchip_split(vcpu->kvm))
9335                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
9336         else {
9337                 if (vcpu->arch.apicv_active)
9338                         static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9339                 if (ioapic_in_kernel(vcpu->kvm))
9340                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
9341         }
9342
9343         if (is_guest_mode(vcpu))
9344                 vcpu->arch.load_eoi_exitmap_pending = true;
9345         else
9346                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
9347 }
9348
9349 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
9350 {
9351         u64 eoi_exit_bitmap[4];
9352
9353         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
9354                 return;
9355
9356         if (to_hv_vcpu(vcpu))
9357                 bitmap_or((ulong *)eoi_exit_bitmap,
9358                           vcpu->arch.ioapic_handled_vectors,
9359                           to_hv_synic(vcpu)->vec_bitmap, 256);
9360
9361         static_call(kvm_x86_load_eoi_exitmap)(vcpu, eoi_exit_bitmap);
9362 }
9363
9364 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
9365                                             unsigned long start, unsigned long end)
9366 {
9367         unsigned long apic_address;
9368
9369         /*
9370          * The physical address of apic access page is stored in the VMCS.
9371          * Update it when it becomes invalid.
9372          */
9373         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
9374         if (start <= apic_address && apic_address < end)
9375                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
9376 }
9377
9378 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
9379 {
9380         if (!lapic_in_kernel(vcpu))
9381                 return;
9382
9383         if (!kvm_x86_ops.set_apic_access_page_addr)
9384                 return;
9385
9386         static_call(kvm_x86_set_apic_access_page_addr)(vcpu);
9387 }
9388
9389 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
9390 {
9391         smp_send_reschedule(vcpu->cpu);
9392 }
9393 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
9394
9395 /*
9396  * Returns 1 to let vcpu_run() continue the guest execution loop without
9397  * exiting to the userspace.  Otherwise, the value will be returned to the
9398  * userspace.
9399  */
9400 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
9401 {
9402         int r;
9403         bool req_int_win =
9404                 dm_request_for_irq_injection(vcpu) &&
9405                 kvm_cpu_accept_dm_intr(vcpu);
9406         fastpath_t exit_fastpath;
9407
9408         bool req_immediate_exit = false;
9409
9410         /* Forbid vmenter if vcpu dirty ring is soft-full */
9411         if (unlikely(vcpu->kvm->dirty_ring_size &&
9412                      kvm_dirty_ring_soft_full(&vcpu->dirty_ring))) {
9413                 vcpu->run->exit_reason = KVM_EXIT_DIRTY_RING_FULL;
9414                 trace_kvm_dirty_ring_exit(vcpu);
9415                 r = 0;
9416                 goto out;
9417         }
9418
9419         if (kvm_request_pending(vcpu)) {
9420                 if (kvm_check_request(KVM_REQ_VM_BUGGED, vcpu)) {
9421                         r = -EIO;
9422                         goto out;
9423                 }
9424                 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu)) {
9425                         if (unlikely(!kvm_x86_ops.nested_ops->get_nested_state_pages(vcpu))) {
9426                                 r = 0;
9427                                 goto out;
9428                         }
9429                 }
9430                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
9431                         kvm_mmu_unload(vcpu);
9432                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
9433                         __kvm_migrate_timers(vcpu);
9434                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
9435                         kvm_gen_update_masterclock(vcpu->kvm);
9436                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
9437                         kvm_gen_kvmclock_update(vcpu);
9438                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
9439                         r = kvm_guest_time_update(vcpu);
9440                         if (unlikely(r))
9441                                 goto out;
9442                 }
9443                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
9444                         kvm_mmu_sync_roots(vcpu);
9445                 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD, vcpu))
9446                         kvm_mmu_load_pgd(vcpu);
9447                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) {
9448                         kvm_vcpu_flush_tlb_all(vcpu);
9449
9450                         /* Flushing all ASIDs flushes the current ASID... */
9451                         kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
9452                 }
9453                 if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu))
9454                         kvm_vcpu_flush_tlb_current(vcpu);
9455                 if (kvm_check_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu))
9456                         kvm_vcpu_flush_tlb_guest(vcpu);
9457
9458                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
9459                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
9460                         r = 0;
9461                         goto out;
9462                 }
9463                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
9464                         if (is_guest_mode(vcpu)) {
9465                                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
9466                         } else {
9467                                 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
9468                                 vcpu->mmio_needed = 0;
9469                                 r = 0;
9470                                 goto out;
9471                         }
9472                 }
9473                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
9474                         /* Page is swapped out. Do synthetic halt */
9475                         vcpu->arch.apf.halted = true;
9476                         r = 1;
9477                         goto out;
9478                 }
9479                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
9480                         record_steal_time(vcpu);
9481                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
9482                         process_smi(vcpu);
9483                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
9484                         process_nmi(vcpu);
9485                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
9486                         kvm_pmu_handle_event(vcpu);
9487                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
9488                         kvm_pmu_deliver_pmi(vcpu);
9489                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
9490                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
9491                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
9492                                      vcpu->arch.ioapic_handled_vectors)) {
9493                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
9494                                 vcpu->run->eoi.vector =
9495                                                 vcpu->arch.pending_ioapic_eoi;
9496                                 r = 0;
9497                                 goto out;
9498                         }
9499                 }
9500                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
9501                         vcpu_scan_ioapic(vcpu);
9502                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
9503                         vcpu_load_eoi_exitmap(vcpu);
9504                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
9505                         kvm_vcpu_reload_apic_access_page(vcpu);
9506                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
9507                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9508                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
9509                         r = 0;
9510                         goto out;
9511                 }
9512                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
9513                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9514                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
9515                         r = 0;
9516                         goto out;
9517                 }
9518                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
9519                         struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
9520
9521                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
9522                         vcpu->run->hyperv = hv_vcpu->exit;
9523                         r = 0;
9524                         goto out;
9525                 }
9526
9527                 /*
9528                  * KVM_REQ_HV_STIMER has to be processed after
9529                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
9530                  * depend on the guest clock being up-to-date
9531                  */
9532                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
9533                         kvm_hv_process_stimers(vcpu);
9534                 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
9535                         kvm_vcpu_update_apicv(vcpu);
9536                 if (kvm_check_request(KVM_REQ_APF_READY, vcpu))
9537                         kvm_check_async_pf_completion(vcpu);
9538                 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED, vcpu))
9539                         static_call(kvm_x86_msr_filter_changed)(vcpu);
9540
9541                 if (kvm_check_request(KVM_REQ_UPDATE_CPU_DIRTY_LOGGING, vcpu))
9542                         static_call(kvm_x86_update_cpu_dirty_logging)(vcpu);
9543         }
9544
9545         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win ||
9546             kvm_xen_has_interrupt(vcpu)) {
9547                 ++vcpu->stat.req_event;
9548                 r = kvm_apic_accept_events(vcpu);
9549                 if (r < 0) {
9550                         r = 0;
9551                         goto out;
9552                 }
9553                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
9554                         r = 1;
9555                         goto out;
9556                 }
9557
9558                 r = inject_pending_event(vcpu, &req_immediate_exit);
9559                 if (r < 0) {
9560                         r = 0;
9561                         goto out;
9562                 }
9563                 if (req_int_win)
9564                         static_call(kvm_x86_enable_irq_window)(vcpu);
9565
9566                 if (kvm_lapic_enabled(vcpu)) {
9567                         update_cr8_intercept(vcpu);
9568                         kvm_lapic_sync_to_vapic(vcpu);
9569                 }
9570         }
9571
9572         r = kvm_mmu_reload(vcpu);
9573         if (unlikely(r)) {
9574                 goto cancel_injection;
9575         }
9576
9577         preempt_disable();
9578
9579         static_call(kvm_x86_prepare_guest_switch)(vcpu);
9580
9581         /*
9582          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
9583          * IPI are then delayed after guest entry, which ensures that they
9584          * result in virtual interrupt delivery.
9585          */
9586         local_irq_disable();
9587         vcpu->mode = IN_GUEST_MODE;
9588
9589         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9590
9591         /*
9592          * 1) We should set ->mode before checking ->requests.  Please see
9593          * the comment in kvm_vcpu_exiting_guest_mode().
9594          *
9595          * 2) For APICv, we should set ->mode before checking PID.ON. This
9596          * pairs with the memory barrier implicit in pi_test_and_set_on
9597          * (see vmx_deliver_posted_interrupt).
9598          *
9599          * 3) This also orders the write to mode from any reads to the page
9600          * tables done while the VCPU is running.  Please see the comment
9601          * in kvm_flush_remote_tlbs.
9602          */
9603         smp_mb__after_srcu_read_unlock();
9604
9605         /*
9606          * This handles the case where a posted interrupt was
9607          * notified with kvm_vcpu_kick.
9608          */
9609         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
9610                 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9611
9612         if (kvm_vcpu_exit_request(vcpu)) {
9613                 vcpu->mode = OUTSIDE_GUEST_MODE;
9614                 smp_wmb();
9615                 local_irq_enable();
9616                 preempt_enable();
9617                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9618                 r = 1;
9619                 goto cancel_injection;
9620         }
9621
9622         if (req_immediate_exit) {
9623                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9624                 static_call(kvm_x86_request_immediate_exit)(vcpu);
9625         }
9626
9627         fpregs_assert_state_consistent();
9628         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9629                 switch_fpu_return();
9630
9631         if (unlikely(vcpu->arch.switch_db_regs)) {
9632                 set_debugreg(0, 7);
9633                 set_debugreg(vcpu->arch.eff_db[0], 0);
9634                 set_debugreg(vcpu->arch.eff_db[1], 1);
9635                 set_debugreg(vcpu->arch.eff_db[2], 2);
9636                 set_debugreg(vcpu->arch.eff_db[3], 3);
9637         } else if (unlikely(hw_breakpoint_active())) {
9638                 set_debugreg(0, 7);
9639         }
9640
9641         for (;;) {
9642                 exit_fastpath = static_call(kvm_x86_run)(vcpu);
9643                 if (likely(exit_fastpath != EXIT_FASTPATH_REENTER_GUEST))
9644                         break;
9645
9646                 if (unlikely(kvm_vcpu_exit_request(vcpu))) {
9647                         exit_fastpath = EXIT_FASTPATH_EXIT_HANDLED;
9648                         break;
9649                 }
9650
9651                 if (vcpu->arch.apicv_active)
9652                         static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9653         }
9654
9655         /*
9656          * Do this here before restoring debug registers on the host.  And
9657          * since we do this before handling the vmexit, a DR access vmexit
9658          * can (a) read the correct value of the debug registers, (b) set
9659          * KVM_DEBUGREG_WONT_EXIT again.
9660          */
9661         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
9662                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
9663                 static_call(kvm_x86_sync_dirty_debug_regs)(vcpu);
9664                 kvm_update_dr0123(vcpu);
9665                 kvm_update_dr7(vcpu);
9666         }
9667
9668         /*
9669          * If the guest has used debug registers, at least dr7
9670          * will be disabled while returning to the host.
9671          * If we don't have active breakpoints in the host, we don't
9672          * care about the messed up debug address registers. But if
9673          * we have some of them active, restore the old state.
9674          */
9675         if (hw_breakpoint_active())
9676                 hw_breakpoint_restore();
9677
9678         vcpu->arch.last_vmentry_cpu = vcpu->cpu;
9679         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
9680
9681         vcpu->mode = OUTSIDE_GUEST_MODE;
9682         smp_wmb();
9683
9684         static_call(kvm_x86_handle_exit_irqoff)(vcpu);
9685
9686         /*
9687          * Consume any pending interrupts, including the possible source of
9688          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
9689          * An instruction is required after local_irq_enable() to fully unblock
9690          * interrupts on processors that implement an interrupt shadow, the
9691          * stat.exits increment will do nicely.
9692          */
9693         kvm_before_interrupt(vcpu);
9694         local_irq_enable();
9695         ++vcpu->stat.exits;
9696         local_irq_disable();
9697         kvm_after_interrupt(vcpu);
9698
9699         /*
9700          * Wait until after servicing IRQs to account guest time so that any
9701          * ticks that occurred while running the guest are properly accounted
9702          * to the guest.  Waiting until IRQs are enabled degrades the accuracy
9703          * of accounting via context tracking, but the loss of accuracy is
9704          * acceptable for all known use cases.
9705          */
9706         vtime_account_guest_exit();
9707
9708         if (lapic_in_kernel(vcpu)) {
9709                 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
9710                 if (delta != S64_MIN) {
9711                         trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
9712                         vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
9713                 }
9714         }
9715
9716         local_irq_enable();
9717         preempt_enable();
9718
9719         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9720
9721         /*
9722          * Profile KVM exit RIPs:
9723          */
9724         if (unlikely(prof_on == KVM_PROFILING)) {
9725                 unsigned long rip = kvm_rip_read(vcpu);
9726                 profile_hit(KVM_PROFILING, (void *)rip);
9727         }
9728
9729         if (unlikely(vcpu->arch.tsc_always_catchup))
9730                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
9731
9732         if (vcpu->arch.apic_attention)
9733                 kvm_lapic_sync_from_vapic(vcpu);
9734
9735         r = static_call(kvm_x86_handle_exit)(vcpu, exit_fastpath);
9736         return r;
9737
9738 cancel_injection:
9739         if (req_immediate_exit)
9740                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9741         static_call(kvm_x86_cancel_injection)(vcpu);
9742         if (unlikely(vcpu->arch.apic_attention))
9743                 kvm_lapic_sync_from_vapic(vcpu);
9744 out:
9745         return r;
9746 }
9747
9748 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
9749 {
9750         if (!kvm_arch_vcpu_runnable(vcpu) &&
9751             (!kvm_x86_ops.pre_block || static_call(kvm_x86_pre_block)(vcpu) == 0)) {
9752                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9753                 kvm_vcpu_block(vcpu);
9754                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9755
9756                 if (kvm_x86_ops.post_block)
9757                         static_call(kvm_x86_post_block)(vcpu);
9758
9759                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
9760                         return 1;
9761         }
9762
9763         if (kvm_apic_accept_events(vcpu) < 0)
9764                 return 0;
9765         switch(vcpu->arch.mp_state) {
9766         case KVM_MP_STATE_HALTED:
9767         case KVM_MP_STATE_AP_RESET_HOLD:
9768                 vcpu->arch.pv.pv_unhalted = false;
9769                 vcpu->arch.mp_state =
9770                         KVM_MP_STATE_RUNNABLE;
9771                 fallthrough;
9772         case KVM_MP_STATE_RUNNABLE:
9773                 vcpu->arch.apf.halted = false;
9774                 break;
9775         case KVM_MP_STATE_INIT_RECEIVED:
9776                 break;
9777         default:
9778                 return -EINTR;
9779         }
9780         return 1;
9781 }
9782
9783 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
9784 {
9785         if (is_guest_mode(vcpu))
9786                 kvm_check_nested_events(vcpu);
9787
9788         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
9789                 !vcpu->arch.apf.halted);
9790 }
9791
9792 static int vcpu_run(struct kvm_vcpu *vcpu)
9793 {
9794         int r;
9795         struct kvm *kvm = vcpu->kvm;
9796
9797         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9798         vcpu->arch.l1tf_flush_l1d = true;
9799
9800         for (;;) {
9801                 if (kvm_vcpu_running(vcpu)) {
9802                         r = vcpu_enter_guest(vcpu);
9803                 } else {
9804                         r = vcpu_block(kvm, vcpu);
9805                 }
9806
9807                 if (r <= 0)
9808                         break;
9809
9810                 kvm_clear_request(KVM_REQ_UNBLOCK, vcpu);
9811                 if (kvm_cpu_has_pending_timer(vcpu))
9812                         kvm_inject_pending_timer_irqs(vcpu);
9813
9814                 if (dm_request_for_irq_injection(vcpu) &&
9815                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
9816                         r = 0;
9817                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
9818                         ++vcpu->stat.request_irq_exits;
9819                         break;
9820                 }
9821
9822                 if (__xfer_to_guest_mode_work_pending()) {
9823                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9824                         r = xfer_to_guest_mode_handle_work(vcpu);
9825                         if (r)
9826                                 return r;
9827                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9828                 }
9829         }
9830
9831         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9832
9833         return r;
9834 }
9835
9836 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
9837 {
9838         int r;
9839
9840         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9841         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
9842         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9843         return r;
9844 }
9845
9846 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
9847 {
9848         BUG_ON(!vcpu->arch.pio.count);
9849
9850         return complete_emulated_io(vcpu);
9851 }
9852
9853 /*
9854  * Implements the following, as a state machine:
9855  *
9856  * read:
9857  *   for each fragment
9858  *     for each mmio piece in the fragment
9859  *       write gpa, len
9860  *       exit
9861  *       copy data
9862  *   execute insn
9863  *
9864  * write:
9865  *   for each fragment
9866  *     for each mmio piece in the fragment
9867  *       write gpa, len
9868  *       copy data
9869  *       exit
9870  */
9871 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
9872 {
9873         struct kvm_run *run = vcpu->run;
9874         struct kvm_mmio_fragment *frag;
9875         unsigned len;
9876
9877         BUG_ON(!vcpu->mmio_needed);
9878
9879         /* Complete previous fragment */
9880         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
9881         len = min(8u, frag->len);
9882         if (!vcpu->mmio_is_write)
9883                 memcpy(frag->data, run->mmio.data, len);
9884
9885         if (frag->len <= 8) {
9886                 /* Switch to the next fragment. */
9887                 frag++;
9888                 vcpu->mmio_cur_fragment++;
9889         } else {
9890                 /* Go forward to the next mmio piece. */
9891                 frag->data += len;
9892                 frag->gpa += len;
9893                 frag->len -= len;
9894         }
9895
9896         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
9897                 vcpu->mmio_needed = 0;
9898
9899                 /* FIXME: return into emulator if single-stepping.  */
9900                 if (vcpu->mmio_is_write)
9901                         return 1;
9902                 vcpu->mmio_read_completed = 1;
9903                 return complete_emulated_io(vcpu);
9904         }
9905
9906         run->exit_reason = KVM_EXIT_MMIO;
9907         run->mmio.phys_addr = frag->gpa;
9908         if (vcpu->mmio_is_write)
9909                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
9910         run->mmio.len = min(8u, frag->len);
9911         run->mmio.is_write = vcpu->mmio_is_write;
9912         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
9913         return 0;
9914 }
9915
9916 static void kvm_save_current_fpu(struct fpu *fpu)
9917 {
9918         /*
9919          * If the target FPU state is not resident in the CPU registers, just
9920          * memcpy() from current, else save CPU state directly to the target.
9921          */
9922         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9923                 memcpy(&fpu->state, &current->thread.fpu.state,
9924                        fpu_kernel_xstate_size);
9925         else
9926                 save_fpregs_to_fpstate(fpu);
9927 }
9928
9929 /* Swap (qemu) user FPU context for the guest FPU context. */
9930 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
9931 {
9932         fpregs_lock();
9933
9934         kvm_save_current_fpu(vcpu->arch.user_fpu);
9935
9936         /*
9937          * Guests with protected state can't have it set by the hypervisor,
9938          * so skip trying to set it.
9939          */
9940         if (vcpu->arch.guest_fpu)
9941                 /* PKRU is separately restored in kvm_x86_ops.run. */
9942                 __restore_fpregs_from_fpstate(&vcpu->arch.guest_fpu->state,
9943                                         ~XFEATURE_MASK_PKRU);
9944
9945         fpregs_mark_activate();
9946         fpregs_unlock();
9947
9948         trace_kvm_fpu(1);
9949 }
9950
9951 /* When vcpu_run ends, restore user space FPU context. */
9952 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
9953 {
9954         fpregs_lock();
9955
9956         /*
9957          * Guests with protected state can't have it read by the hypervisor,
9958          * so skip trying to save it.
9959          */
9960         if (vcpu->arch.guest_fpu)
9961                 kvm_save_current_fpu(vcpu->arch.guest_fpu);
9962
9963         restore_fpregs_from_fpstate(&vcpu->arch.user_fpu->state);
9964
9965         fpregs_mark_activate();
9966         fpregs_unlock();
9967
9968         ++vcpu->stat.fpu_reload;
9969         trace_kvm_fpu(0);
9970 }
9971
9972 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
9973 {
9974         struct kvm_run *kvm_run = vcpu->run;
9975         int r;
9976
9977         vcpu_load(vcpu);
9978         kvm_sigset_activate(vcpu);
9979         kvm_run->flags = 0;
9980         kvm_load_guest_fpu(vcpu);
9981
9982         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
9983                 if (kvm_run->immediate_exit) {
9984                         r = -EINTR;
9985                         goto out;
9986                 }
9987                 kvm_vcpu_block(vcpu);
9988                 if (kvm_apic_accept_events(vcpu) < 0) {
9989                         r = 0;
9990                         goto out;
9991                 }
9992                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
9993                 r = -EAGAIN;
9994                 if (signal_pending(current)) {
9995                         r = -EINTR;
9996                         kvm_run->exit_reason = KVM_EXIT_INTR;
9997                         ++vcpu->stat.signal_exits;
9998                 }
9999                 goto out;
10000         }
10001
10002         if ((kvm_run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) ||
10003             (kvm_run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)) {
10004                 r = -EINVAL;
10005                 goto out;
10006         }
10007
10008         if (kvm_run->kvm_dirty_regs) {
10009                 r = sync_regs(vcpu);
10010                 if (r != 0)
10011                         goto out;
10012         }
10013
10014         /* re-sync apic's tpr */
10015         if (!lapic_in_kernel(vcpu)) {
10016                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
10017                         r = -EINVAL;
10018                         goto out;
10019                 }
10020         }
10021
10022         if (unlikely(vcpu->arch.complete_userspace_io)) {
10023                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
10024                 vcpu->arch.complete_userspace_io = NULL;
10025                 r = cui(vcpu);
10026                 if (r <= 0)
10027                         goto out;
10028         } else
10029                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
10030
10031         if (kvm_run->immediate_exit)
10032                 r = -EINTR;
10033         else
10034                 r = vcpu_run(vcpu);
10035
10036 out:
10037         kvm_put_guest_fpu(vcpu);
10038         if (kvm_run->kvm_valid_regs)
10039                 store_regs(vcpu);
10040         post_kvm_run_save(vcpu);
10041         kvm_sigset_deactivate(vcpu);
10042
10043         vcpu_put(vcpu);
10044         return r;
10045 }
10046
10047 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10048 {
10049         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
10050                 /*
10051                  * We are here if userspace calls get_regs() in the middle of
10052                  * instruction emulation. Registers state needs to be copied
10053                  * back from emulation context to vcpu. Userspace shouldn't do
10054                  * that usually, but some bad designed PV devices (vmware
10055                  * backdoor interface) need this to work
10056                  */
10057                 emulator_writeback_register_cache(vcpu->arch.emulate_ctxt);
10058                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
10059         }
10060         regs->rax = kvm_rax_read(vcpu);
10061         regs->rbx = kvm_rbx_read(vcpu);
10062         regs->rcx = kvm_rcx_read(vcpu);
10063         regs->rdx = kvm_rdx_read(vcpu);
10064         regs->rsi = kvm_rsi_read(vcpu);
10065         regs->rdi = kvm_rdi_read(vcpu);
10066         regs->rsp = kvm_rsp_read(vcpu);
10067         regs->rbp = kvm_rbp_read(vcpu);
10068 #ifdef CONFIG_X86_64
10069         regs->r8 = kvm_r8_read(vcpu);
10070         regs->r9 = kvm_r9_read(vcpu);
10071         regs->r10 = kvm_r10_read(vcpu);
10072         regs->r11 = kvm_r11_read(vcpu);
10073         regs->r12 = kvm_r12_read(vcpu);
10074         regs->r13 = kvm_r13_read(vcpu);
10075         regs->r14 = kvm_r14_read(vcpu);
10076         regs->r15 = kvm_r15_read(vcpu);
10077 #endif
10078
10079         regs->rip = kvm_rip_read(vcpu);
10080         regs->rflags = kvm_get_rflags(vcpu);
10081 }
10082
10083 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10084 {
10085         vcpu_load(vcpu);
10086         __get_regs(vcpu, regs);
10087         vcpu_put(vcpu);
10088         return 0;
10089 }
10090
10091 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10092 {
10093         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
10094         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
10095
10096         kvm_rax_write(vcpu, regs->rax);
10097         kvm_rbx_write(vcpu, regs->rbx);
10098         kvm_rcx_write(vcpu, regs->rcx);
10099         kvm_rdx_write(vcpu, regs->rdx);
10100         kvm_rsi_write(vcpu, regs->rsi);
10101         kvm_rdi_write(vcpu, regs->rdi);
10102         kvm_rsp_write(vcpu, regs->rsp);
10103         kvm_rbp_write(vcpu, regs->rbp);
10104 #ifdef CONFIG_X86_64
10105         kvm_r8_write(vcpu, regs->r8);
10106         kvm_r9_write(vcpu, regs->r9);
10107         kvm_r10_write(vcpu, regs->r10);
10108         kvm_r11_write(vcpu, regs->r11);
10109         kvm_r12_write(vcpu, regs->r12);
10110         kvm_r13_write(vcpu, regs->r13);
10111         kvm_r14_write(vcpu, regs->r14);
10112         kvm_r15_write(vcpu, regs->r15);
10113 #endif
10114
10115         kvm_rip_write(vcpu, regs->rip);
10116         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
10117
10118         vcpu->arch.exception.pending = false;
10119
10120         kvm_make_request(KVM_REQ_EVENT, vcpu);
10121 }
10122
10123 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10124 {
10125         vcpu_load(vcpu);
10126         __set_regs(vcpu, regs);
10127         vcpu_put(vcpu);
10128         return 0;
10129 }
10130
10131 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
10132 {
10133         struct kvm_segment cs;
10134
10135         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
10136         *db = cs.db;
10137         *l = cs.l;
10138 }
10139 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
10140
10141 static void __get_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10142 {
10143         struct desc_ptr dt;
10144
10145         if (vcpu->arch.guest_state_protected)
10146                 goto skip_protected_regs;
10147
10148         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10149         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10150         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10151         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10152         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10153         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10154
10155         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10156         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10157
10158         static_call(kvm_x86_get_idt)(vcpu, &dt);
10159         sregs->idt.limit = dt.size;
10160         sregs->idt.base = dt.address;
10161         static_call(kvm_x86_get_gdt)(vcpu, &dt);
10162         sregs->gdt.limit = dt.size;
10163         sregs->gdt.base = dt.address;
10164
10165         sregs->cr2 = vcpu->arch.cr2;
10166         sregs->cr3 = kvm_read_cr3(vcpu);
10167
10168 skip_protected_regs:
10169         sregs->cr0 = kvm_read_cr0(vcpu);
10170         sregs->cr4 = kvm_read_cr4(vcpu);
10171         sregs->cr8 = kvm_get_cr8(vcpu);
10172         sregs->efer = vcpu->arch.efer;
10173         sregs->apic_base = kvm_get_apic_base(vcpu);
10174 }
10175
10176 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10177 {
10178         __get_sregs_common(vcpu, sregs);
10179
10180         if (vcpu->arch.guest_state_protected)
10181                 return;
10182
10183         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
10184                 set_bit(vcpu->arch.interrupt.nr,
10185                         (unsigned long *)sregs->interrupt_bitmap);
10186 }
10187
10188 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
10189 {
10190         int i;
10191
10192         __get_sregs_common(vcpu, (struct kvm_sregs *)sregs2);
10193
10194         if (vcpu->arch.guest_state_protected)
10195                 return;
10196
10197         if (is_pae_paging(vcpu)) {
10198                 for (i = 0 ; i < 4 ; i++)
10199                         sregs2->pdptrs[i] = kvm_pdptr_read(vcpu, i);
10200                 sregs2->flags |= KVM_SREGS2_FLAGS_PDPTRS_VALID;
10201         }
10202 }
10203
10204 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
10205                                   struct kvm_sregs *sregs)
10206 {
10207         vcpu_load(vcpu);
10208         __get_sregs(vcpu, sregs);
10209         vcpu_put(vcpu);
10210         return 0;
10211 }
10212
10213 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
10214                                     struct kvm_mp_state *mp_state)
10215 {
10216         int r;
10217
10218         vcpu_load(vcpu);
10219         if (kvm_mpx_supported())
10220                 kvm_load_guest_fpu(vcpu);
10221
10222         r = kvm_apic_accept_events(vcpu);
10223         if (r < 0)
10224                 goto out;
10225         r = 0;
10226
10227         if ((vcpu->arch.mp_state == KVM_MP_STATE_HALTED ||
10228              vcpu->arch.mp_state == KVM_MP_STATE_AP_RESET_HOLD) &&
10229             vcpu->arch.pv.pv_unhalted)
10230                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
10231         else
10232                 mp_state->mp_state = vcpu->arch.mp_state;
10233
10234 out:
10235         if (kvm_mpx_supported())
10236                 kvm_put_guest_fpu(vcpu);
10237         vcpu_put(vcpu);
10238         return r;
10239 }
10240
10241 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
10242                                     struct kvm_mp_state *mp_state)
10243 {
10244         int ret = -EINVAL;
10245
10246         vcpu_load(vcpu);
10247
10248         if (!lapic_in_kernel(vcpu) &&
10249             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
10250                 goto out;
10251
10252         /*
10253          * KVM_MP_STATE_INIT_RECEIVED means the processor is in
10254          * INIT state; latched init should be reported using
10255          * KVM_SET_VCPU_EVENTS, so reject it here.
10256          */
10257         if ((kvm_vcpu_latch_init(vcpu) || vcpu->arch.smi_pending) &&
10258             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
10259              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
10260                 goto out;
10261
10262         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
10263                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
10264                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
10265         } else
10266                 vcpu->arch.mp_state = mp_state->mp_state;
10267         kvm_make_request(KVM_REQ_EVENT, vcpu);
10268
10269         ret = 0;
10270 out:
10271         vcpu_put(vcpu);
10272         return ret;
10273 }
10274
10275 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
10276                     int reason, bool has_error_code, u32 error_code)
10277 {
10278         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
10279         int ret;
10280
10281         init_emulate_ctxt(vcpu);
10282
10283         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
10284                                    has_error_code, error_code);
10285         if (ret) {
10286                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
10287                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
10288                 vcpu->run->internal.ndata = 0;
10289                 return 0;
10290         }
10291
10292         kvm_rip_write(vcpu, ctxt->eip);
10293         kvm_set_rflags(vcpu, ctxt->eflags);
10294         return 1;
10295 }
10296 EXPORT_SYMBOL_GPL(kvm_task_switch);
10297
10298 static bool kvm_is_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10299 {
10300         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
10301                 /*
10302                  * When EFER.LME and CR0.PG are set, the processor is in
10303                  * 64-bit mode (though maybe in a 32-bit code segment).
10304                  * CR4.PAE and EFER.LMA must be set.
10305                  */
10306                 if (!(sregs->cr4 & X86_CR4_PAE) || !(sregs->efer & EFER_LMA))
10307                         return false;
10308                 if (kvm_vcpu_is_illegal_gpa(vcpu, sregs->cr3))
10309                         return false;
10310         } else {
10311                 /*
10312                  * Not in 64-bit mode: EFER.LMA is clear and the code
10313                  * segment cannot be 64-bit.
10314                  */
10315                 if (sregs->efer & EFER_LMA || sregs->cs.l)
10316                         return false;
10317         }
10318
10319         return kvm_is_valid_cr4(vcpu, sregs->cr4);
10320 }
10321
10322 static int __set_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs,
10323                 int *mmu_reset_needed, bool update_pdptrs)
10324 {
10325         struct msr_data apic_base_msr;
10326         int idx;
10327         struct desc_ptr dt;
10328
10329         if (!kvm_is_valid_sregs(vcpu, sregs))
10330                 return -EINVAL;
10331
10332         apic_base_msr.data = sregs->apic_base;
10333         apic_base_msr.host_initiated = true;
10334         if (kvm_set_apic_base(vcpu, &apic_base_msr))
10335                 return -EINVAL;
10336
10337         if (vcpu->arch.guest_state_protected)
10338                 return 0;
10339
10340         dt.size = sregs->idt.limit;
10341         dt.address = sregs->idt.base;
10342         static_call(kvm_x86_set_idt)(vcpu, &dt);
10343         dt.size = sregs->gdt.limit;
10344         dt.address = sregs->gdt.base;
10345         static_call(kvm_x86_set_gdt)(vcpu, &dt);
10346
10347         vcpu->arch.cr2 = sregs->cr2;
10348         *mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
10349         vcpu->arch.cr3 = sregs->cr3;
10350         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
10351
10352         kvm_set_cr8(vcpu, sregs->cr8);
10353
10354         *mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
10355         static_call(kvm_x86_set_efer)(vcpu, sregs->efer);
10356
10357         *mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
10358         static_call(kvm_x86_set_cr0)(vcpu, sregs->cr0);
10359         vcpu->arch.cr0 = sregs->cr0;
10360
10361         *mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
10362         static_call(kvm_x86_set_cr4)(vcpu, sregs->cr4);
10363
10364         if (update_pdptrs) {
10365                 idx = srcu_read_lock(&vcpu->kvm->srcu);
10366                 if (is_pae_paging(vcpu)) {
10367                         load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
10368                         *mmu_reset_needed = 1;
10369                 }
10370                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
10371         }
10372
10373         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10374         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10375         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10376         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10377         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10378         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10379
10380         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10381         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10382
10383         update_cr8_intercept(vcpu);
10384
10385         /* Older userspace won't unhalt the vcpu on reset. */
10386         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
10387             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
10388             !is_protmode(vcpu))
10389                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10390
10391         return 0;
10392 }
10393
10394 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10395 {
10396         int pending_vec, max_bits;
10397         int mmu_reset_needed = 0;
10398         int ret = __set_sregs_common(vcpu, sregs, &mmu_reset_needed, true);
10399
10400         if (ret)
10401                 return ret;
10402
10403         if (mmu_reset_needed)
10404                 kvm_mmu_reset_context(vcpu);
10405
10406         max_bits = KVM_NR_INTERRUPTS;
10407         pending_vec = find_first_bit(
10408                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
10409
10410         if (pending_vec < max_bits) {
10411                 kvm_queue_interrupt(vcpu, pending_vec, false);
10412                 pr_debug("Set back pending irq %d\n", pending_vec);
10413                 kvm_make_request(KVM_REQ_EVENT, vcpu);
10414         }
10415         return 0;
10416 }
10417
10418 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
10419 {
10420         int mmu_reset_needed = 0;
10421         bool valid_pdptrs = sregs2->flags & KVM_SREGS2_FLAGS_PDPTRS_VALID;
10422         bool pae = (sregs2->cr0 & X86_CR0_PG) && (sregs2->cr4 & X86_CR4_PAE) &&
10423                 !(sregs2->efer & EFER_LMA);
10424         int i, ret;
10425
10426         if (sregs2->flags & ~KVM_SREGS2_FLAGS_PDPTRS_VALID)
10427                 return -EINVAL;
10428
10429         if (valid_pdptrs && (!pae || vcpu->arch.guest_state_protected))
10430                 return -EINVAL;
10431
10432         ret = __set_sregs_common(vcpu, (struct kvm_sregs *)sregs2,
10433                                  &mmu_reset_needed, !valid_pdptrs);
10434         if (ret)
10435                 return ret;
10436
10437         if (valid_pdptrs) {
10438                 for (i = 0; i < 4 ; i++)
10439                         kvm_pdptr_write(vcpu, i, sregs2->pdptrs[i]);
10440
10441                 kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
10442                 mmu_reset_needed = 1;
10443                 vcpu->arch.pdptrs_from_userspace = true;
10444         }
10445         if (mmu_reset_needed)
10446                 kvm_mmu_reset_context(vcpu);
10447         return 0;
10448 }
10449
10450 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
10451                                   struct kvm_sregs *sregs)
10452 {
10453         int ret;
10454
10455         vcpu_load(vcpu);
10456         ret = __set_sregs(vcpu, sregs);
10457         vcpu_put(vcpu);
10458         return ret;
10459 }
10460
10461 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
10462                                         struct kvm_guest_debug *dbg)
10463 {
10464         unsigned long rflags;
10465         int i, r;
10466
10467         if (vcpu->arch.guest_state_protected)
10468                 return -EINVAL;
10469
10470         vcpu_load(vcpu);
10471
10472         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
10473                 r = -EBUSY;
10474                 if (vcpu->arch.exception.pending)
10475                         goto out;
10476                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
10477                         kvm_queue_exception(vcpu, DB_VECTOR);
10478                 else
10479                         kvm_queue_exception(vcpu, BP_VECTOR);
10480         }
10481
10482         /*
10483          * Read rflags as long as potentially injected trace flags are still
10484          * filtered out.
10485          */
10486         rflags = kvm_get_rflags(vcpu);
10487
10488         vcpu->guest_debug = dbg->control;
10489         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
10490                 vcpu->guest_debug = 0;
10491
10492         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
10493                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
10494                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
10495                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
10496         } else {
10497                 for (i = 0; i < KVM_NR_DB_REGS; i++)
10498                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
10499         }
10500         kvm_update_dr7(vcpu);
10501
10502         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
10503                 vcpu->arch.singlestep_rip = kvm_get_linear_rip(vcpu);
10504
10505         /*
10506          * Trigger an rflags update that will inject or remove the trace
10507          * flags.
10508          */
10509         kvm_set_rflags(vcpu, rflags);
10510
10511         static_call(kvm_x86_update_exception_bitmap)(vcpu);
10512
10513         r = 0;
10514
10515 out:
10516         vcpu_put(vcpu);
10517         return r;
10518 }
10519
10520 /*
10521  * Translate a guest virtual address to a guest physical address.
10522  */
10523 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
10524                                     struct kvm_translation *tr)
10525 {
10526         unsigned long vaddr = tr->linear_address;
10527         gpa_t gpa;
10528         int idx;
10529
10530         vcpu_load(vcpu);
10531
10532         idx = srcu_read_lock(&vcpu->kvm->srcu);
10533         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
10534         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10535         tr->physical_address = gpa;
10536         tr->valid = gpa != UNMAPPED_GVA;
10537         tr->writeable = 1;
10538         tr->usermode = 0;
10539
10540         vcpu_put(vcpu);
10541         return 0;
10542 }
10543
10544 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10545 {
10546         struct fxregs_state *fxsave;
10547
10548         if (!vcpu->arch.guest_fpu)
10549                 return 0;
10550
10551         vcpu_load(vcpu);
10552
10553         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
10554         memcpy(fpu->fpr, fxsave->st_space, 128);
10555         fpu->fcw = fxsave->cwd;
10556         fpu->fsw = fxsave->swd;
10557         fpu->ftwx = fxsave->twd;
10558         fpu->last_opcode = fxsave->fop;
10559         fpu->last_ip = fxsave->rip;
10560         fpu->last_dp = fxsave->rdp;
10561         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
10562
10563         vcpu_put(vcpu);
10564         return 0;
10565 }
10566
10567 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10568 {
10569         struct fxregs_state *fxsave;
10570
10571         if (!vcpu->arch.guest_fpu)
10572                 return 0;
10573
10574         vcpu_load(vcpu);
10575
10576         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
10577
10578         memcpy(fxsave->st_space, fpu->fpr, 128);
10579         fxsave->cwd = fpu->fcw;
10580         fxsave->swd = fpu->fsw;
10581         fxsave->twd = fpu->ftwx;
10582         fxsave->fop = fpu->last_opcode;
10583         fxsave->rip = fpu->last_ip;
10584         fxsave->rdp = fpu->last_dp;
10585         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
10586
10587         vcpu_put(vcpu);
10588         return 0;
10589 }
10590
10591 static void store_regs(struct kvm_vcpu *vcpu)
10592 {
10593         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
10594
10595         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
10596                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
10597
10598         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
10599                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
10600
10601         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
10602                 kvm_vcpu_ioctl_x86_get_vcpu_events(
10603                                 vcpu, &vcpu->run->s.regs.events);
10604 }
10605
10606 static int sync_regs(struct kvm_vcpu *vcpu)
10607 {
10608         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
10609                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
10610                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
10611         }
10612         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
10613                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
10614                         return -EINVAL;
10615                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
10616         }
10617         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
10618                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
10619                                 vcpu, &vcpu->run->s.regs.events))
10620                         return -EINVAL;
10621                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
10622         }
10623
10624         return 0;
10625 }
10626
10627 static void fx_init(struct kvm_vcpu *vcpu)
10628 {
10629         if (!vcpu->arch.guest_fpu)
10630                 return;
10631
10632         fpstate_init(&vcpu->arch.guest_fpu->state);
10633         if (boot_cpu_has(X86_FEATURE_XSAVES))
10634                 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
10635                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
10636
10637         /*
10638          * Ensure guest xcr0 is valid for loading
10639          */
10640         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10641
10642         vcpu->arch.cr0 |= X86_CR0_ET;
10643 }
10644
10645 void kvm_free_guest_fpu(struct kvm_vcpu *vcpu)
10646 {
10647         if (vcpu->arch.guest_fpu) {
10648                 kmem_cache_free(x86_fpu_cache, vcpu->arch.guest_fpu);
10649                 vcpu->arch.guest_fpu = NULL;
10650         }
10651 }
10652 EXPORT_SYMBOL_GPL(kvm_free_guest_fpu);
10653
10654 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
10655 {
10656         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
10657                 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
10658                              "guest TSC will not be reliable\n");
10659
10660         return 0;
10661 }
10662
10663 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
10664 {
10665         struct page *page;
10666         int r;
10667
10668         vcpu->arch.last_vmentry_cpu = -1;
10669         vcpu->arch.regs_avail = ~0;
10670         vcpu->arch.regs_dirty = ~0;
10671
10672         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
10673                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10674         else
10675                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
10676
10677         r = kvm_mmu_create(vcpu);
10678         if (r < 0)
10679                 return r;
10680
10681         if (irqchip_in_kernel(vcpu->kvm)) {
10682                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
10683                 if (r < 0)
10684                         goto fail_mmu_destroy;
10685                 if (kvm_apicv_activated(vcpu->kvm))
10686                         vcpu->arch.apicv_active = true;
10687         } else
10688                 static_branch_inc(&kvm_has_noapic_vcpu);
10689
10690         r = -ENOMEM;
10691
10692         page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO);
10693         if (!page)
10694                 goto fail_free_lapic;
10695         vcpu->arch.pio_data = page_address(page);
10696
10697         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
10698                                        GFP_KERNEL_ACCOUNT);
10699         if (!vcpu->arch.mce_banks)
10700                 goto fail_free_pio_data;
10701         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
10702
10703         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
10704                                 GFP_KERNEL_ACCOUNT))
10705                 goto fail_free_mce_banks;
10706
10707         if (!alloc_emulate_ctxt(vcpu))
10708                 goto free_wbinvd_dirty_mask;
10709
10710         vcpu->arch.user_fpu = kmem_cache_zalloc(x86_fpu_cache,
10711                                                 GFP_KERNEL_ACCOUNT);
10712         if (!vcpu->arch.user_fpu) {
10713                 pr_err("kvm: failed to allocate userspace's fpu\n");
10714                 goto free_emulate_ctxt;
10715         }
10716
10717         vcpu->arch.guest_fpu = kmem_cache_zalloc(x86_fpu_cache,
10718                                                  GFP_KERNEL_ACCOUNT);
10719         if (!vcpu->arch.guest_fpu) {
10720                 pr_err("kvm: failed to allocate vcpu's fpu\n");
10721                 goto free_user_fpu;
10722         }
10723         fx_init(vcpu);
10724
10725         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
10726         vcpu->arch.reserved_gpa_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu);
10727
10728         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
10729
10730         kvm_async_pf_hash_reset(vcpu);
10731         kvm_pmu_init(vcpu);
10732
10733         vcpu->arch.pending_external_vector = -1;
10734         vcpu->arch.preempted_in_kernel = false;
10735
10736 #if IS_ENABLED(CONFIG_HYPERV)
10737         vcpu->arch.hv_root_tdp = INVALID_PAGE;
10738 #endif
10739
10740         r = static_call(kvm_x86_vcpu_create)(vcpu);
10741         if (r)
10742                 goto free_guest_fpu;
10743
10744         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
10745         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
10746         kvm_vcpu_mtrr_init(vcpu);
10747         vcpu_load(vcpu);
10748         kvm_set_tsc_khz(vcpu, max_tsc_khz);
10749         kvm_vcpu_reset(vcpu, false);
10750         kvm_init_mmu(vcpu);
10751         vcpu_put(vcpu);
10752         return 0;
10753
10754 free_guest_fpu:
10755         kvm_free_guest_fpu(vcpu);
10756 free_user_fpu:
10757         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
10758 free_emulate_ctxt:
10759         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10760 free_wbinvd_dirty_mask:
10761         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10762 fail_free_mce_banks:
10763         kfree(vcpu->arch.mce_banks);
10764 fail_free_pio_data:
10765         free_page((unsigned long)vcpu->arch.pio_data);
10766 fail_free_lapic:
10767         kvm_free_lapic(vcpu);
10768 fail_mmu_destroy:
10769         kvm_mmu_destroy(vcpu);
10770         return r;
10771 }
10772
10773 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
10774 {
10775         struct kvm *kvm = vcpu->kvm;
10776
10777         if (mutex_lock_killable(&vcpu->mutex))
10778                 return;
10779         vcpu_load(vcpu);
10780         kvm_synchronize_tsc(vcpu, 0);
10781         vcpu_put(vcpu);
10782
10783         /* poll control enabled by default */
10784         vcpu->arch.msr_kvm_poll_control = 1;
10785
10786         mutex_unlock(&vcpu->mutex);
10787
10788         if (kvmclock_periodic_sync && vcpu->vcpu_idx == 0)
10789                 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
10790                                                 KVMCLOCK_SYNC_PERIOD);
10791 }
10792
10793 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
10794 {
10795         struct gfn_to_pfn_cache *cache = &vcpu->arch.st.cache;
10796         int idx;
10797
10798         kvm_release_pfn(cache->pfn, cache->dirty, cache);
10799
10800         kvmclock_reset(vcpu);
10801
10802         static_call(kvm_x86_vcpu_free)(vcpu);
10803
10804         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10805         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10806         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
10807         kvm_free_guest_fpu(vcpu);
10808
10809         kvm_hv_vcpu_uninit(vcpu);
10810         kvm_pmu_destroy(vcpu);
10811         kfree(vcpu->arch.mce_banks);
10812         kvm_free_lapic(vcpu);
10813         idx = srcu_read_lock(&vcpu->kvm->srcu);
10814         kvm_mmu_destroy(vcpu);
10815         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10816         free_page((unsigned long)vcpu->arch.pio_data);
10817         kvfree(vcpu->arch.cpuid_entries);
10818         if (!lapic_in_kernel(vcpu))
10819                 static_branch_dec(&kvm_has_noapic_vcpu);
10820 }
10821
10822 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
10823 {
10824         unsigned long old_cr0 = kvm_read_cr0(vcpu);
10825         unsigned long new_cr0;
10826         u32 eax, dummy;
10827
10828         kvm_lapic_reset(vcpu, init_event);
10829
10830         vcpu->arch.hflags = 0;
10831
10832         vcpu->arch.smi_pending = 0;
10833         vcpu->arch.smi_count = 0;
10834         atomic_set(&vcpu->arch.nmi_queued, 0);
10835         vcpu->arch.nmi_pending = 0;
10836         vcpu->arch.nmi_injected = false;
10837         kvm_clear_interrupt_queue(vcpu);
10838         kvm_clear_exception_queue(vcpu);
10839
10840         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
10841         kvm_update_dr0123(vcpu);
10842         vcpu->arch.dr6 = DR6_ACTIVE_LOW;
10843         vcpu->arch.dr7 = DR7_FIXED_1;
10844         kvm_update_dr7(vcpu);
10845
10846         vcpu->arch.cr2 = 0;
10847
10848         kvm_make_request(KVM_REQ_EVENT, vcpu);
10849         vcpu->arch.apf.msr_en_val = 0;
10850         vcpu->arch.apf.msr_int_val = 0;
10851         vcpu->arch.st.msr_val = 0;
10852
10853         kvmclock_reset(vcpu);
10854
10855         kvm_clear_async_pf_completion_queue(vcpu);
10856         kvm_async_pf_hash_reset(vcpu);
10857         vcpu->arch.apf.halted = false;
10858
10859         if (vcpu->arch.guest_fpu && kvm_mpx_supported()) {
10860                 void *mpx_state_buffer;
10861
10862                 /*
10863                  * To avoid have the INIT path from kvm_apic_has_events() that be
10864                  * called with loaded FPU and does not let userspace fix the state.
10865                  */
10866                 if (init_event)
10867                         kvm_put_guest_fpu(vcpu);
10868                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10869                                         XFEATURE_BNDREGS);
10870                 if (mpx_state_buffer)
10871                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
10872                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10873                                         XFEATURE_BNDCSR);
10874                 if (mpx_state_buffer)
10875                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
10876                 if (init_event)
10877                         kvm_load_guest_fpu(vcpu);
10878         }
10879
10880         if (!init_event) {
10881                 kvm_pmu_reset(vcpu);
10882                 vcpu->arch.smbase = 0x30000;
10883
10884                 vcpu->arch.msr_misc_features_enables = 0;
10885
10886                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10887         }
10888
10889         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
10890         vcpu->arch.regs_avail = ~0;
10891         vcpu->arch.regs_dirty = ~0;
10892
10893         /*
10894          * Fall back to KVM's default Family/Model/Stepping of 0x600 (P6/Athlon)
10895          * if no CPUID match is found.  Note, it's impossible to get a match at
10896          * RESET since KVM emulates RESET before exposing the vCPU to userspace,
10897          * i.e. it'simpossible for kvm_cpuid() to find a valid entry on RESET.
10898          * But, go through the motions in case that's ever remedied.
10899          */
10900         eax = 1;
10901         if (!kvm_cpuid(vcpu, &eax, &dummy, &dummy, &dummy, true))
10902                 eax = 0x600;
10903         kvm_rdx_write(vcpu, eax);
10904
10905         vcpu->arch.ia32_xss = 0;
10906
10907         static_call(kvm_x86_vcpu_reset)(vcpu, init_event);
10908
10909         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
10910         kvm_rip_write(vcpu, 0xfff0);
10911
10912         vcpu->arch.cr3 = 0;
10913         kvm_register_mark_dirty(vcpu, VCPU_EXREG_CR3);
10914
10915         /*
10916          * CR0.CD/NW are set on RESET, preserved on INIT.  Note, some versions
10917          * of Intel's SDM list CD/NW as being set on INIT, but they contradict
10918          * (or qualify) that with a footnote stating that CD/NW are preserved.
10919          */
10920         new_cr0 = X86_CR0_ET;
10921         if (init_event)
10922                 new_cr0 |= (old_cr0 & (X86_CR0_NW | X86_CR0_CD));
10923         else
10924                 new_cr0 |= X86_CR0_NW | X86_CR0_CD;
10925
10926         static_call(kvm_x86_set_cr0)(vcpu, new_cr0);
10927         static_call(kvm_x86_set_cr4)(vcpu, 0);
10928         static_call(kvm_x86_set_efer)(vcpu, 0);
10929         static_call(kvm_x86_update_exception_bitmap)(vcpu);
10930
10931         /*
10932          * Reset the MMU context if paging was enabled prior to INIT (which is
10933          * implied if CR0.PG=1 as CR0 will be '0' prior to RESET).  Unlike the
10934          * standard CR0/CR4/EFER modification paths, only CR0.PG needs to be
10935          * checked because it is unconditionally cleared on INIT and all other
10936          * paging related bits are ignored if paging is disabled, i.e. CR0.WP,
10937          * CR4, and EFER changes are all irrelevant if CR0.PG was '0'.
10938          */
10939         if (old_cr0 & X86_CR0_PG)
10940                 kvm_mmu_reset_context(vcpu);
10941
10942         /*
10943          * Intel's SDM states that all TLB entries are flushed on INIT.  AMD's
10944          * APM states the TLBs are untouched by INIT, but it also states that
10945          * the TLBs are flushed on "External initialization of the processor."
10946          * Flush the guest TLB regardless of vendor, there is no meaningful
10947          * benefit in relying on the guest to flush the TLB immediately after
10948          * INIT.  A spurious TLB flush is benign and likely negligible from a
10949          * performance perspective.
10950          */
10951         if (init_event)
10952                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
10953 }
10954 EXPORT_SYMBOL_GPL(kvm_vcpu_reset);
10955
10956 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
10957 {
10958         struct kvm_segment cs;
10959
10960         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
10961         cs.selector = vector << 8;
10962         cs.base = vector << 12;
10963         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
10964         kvm_rip_write(vcpu, 0);
10965 }
10966 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector);
10967
10968 int kvm_arch_hardware_enable(void)
10969 {
10970         struct kvm *kvm;
10971         struct kvm_vcpu *vcpu;
10972         int i;
10973         int ret;
10974         u64 local_tsc;
10975         u64 max_tsc = 0;
10976         bool stable, backwards_tsc = false;
10977
10978         kvm_user_return_msr_cpu_online();
10979         ret = static_call(kvm_x86_hardware_enable)();
10980         if (ret != 0)
10981                 return ret;
10982
10983         local_tsc = rdtsc();
10984         stable = !kvm_check_tsc_unstable();
10985         list_for_each_entry(kvm, &vm_list, vm_list) {
10986                 kvm_for_each_vcpu(i, vcpu, kvm) {
10987                         if (!stable && vcpu->cpu == smp_processor_id())
10988                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
10989                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
10990                                 backwards_tsc = true;
10991                                 if (vcpu->arch.last_host_tsc > max_tsc)
10992                                         max_tsc = vcpu->arch.last_host_tsc;
10993                         }
10994                 }
10995         }
10996
10997         /*
10998          * Sometimes, even reliable TSCs go backwards.  This happens on
10999          * platforms that reset TSC during suspend or hibernate actions, but
11000          * maintain synchronization.  We must compensate.  Fortunately, we can
11001          * detect that condition here, which happens early in CPU bringup,
11002          * before any KVM threads can be running.  Unfortunately, we can't
11003          * bring the TSCs fully up to date with real time, as we aren't yet far
11004          * enough into CPU bringup that we know how much real time has actually
11005          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
11006          * variables that haven't been updated yet.
11007          *
11008          * So we simply find the maximum observed TSC above, then record the
11009          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
11010          * the adjustment will be applied.  Note that we accumulate
11011          * adjustments, in case multiple suspend cycles happen before some VCPU
11012          * gets a chance to run again.  In the event that no KVM threads get a
11013          * chance to run, we will miss the entire elapsed period, as we'll have
11014          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
11015          * loose cycle time.  This isn't too big a deal, since the loss will be
11016          * uniform across all VCPUs (not to mention the scenario is extremely
11017          * unlikely). It is possible that a second hibernate recovery happens
11018          * much faster than a first, causing the observed TSC here to be
11019          * smaller; this would require additional padding adjustment, which is
11020          * why we set last_host_tsc to the local tsc observed here.
11021          *
11022          * N.B. - this code below runs only on platforms with reliable TSC,
11023          * as that is the only way backwards_tsc is set above.  Also note
11024          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
11025          * have the same delta_cyc adjustment applied if backwards_tsc
11026          * is detected.  Note further, this adjustment is only done once,
11027          * as we reset last_host_tsc on all VCPUs to stop this from being
11028          * called multiple times (one for each physical CPU bringup).
11029          *
11030          * Platforms with unreliable TSCs don't have to deal with this, they
11031          * will be compensated by the logic in vcpu_load, which sets the TSC to
11032          * catchup mode.  This will catchup all VCPUs to real time, but cannot
11033          * guarantee that they stay in perfect synchronization.
11034          */
11035         if (backwards_tsc) {
11036                 u64 delta_cyc = max_tsc - local_tsc;
11037                 list_for_each_entry(kvm, &vm_list, vm_list) {
11038                         kvm->arch.backwards_tsc_observed = true;
11039                         kvm_for_each_vcpu(i, vcpu, kvm) {
11040                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
11041                                 vcpu->arch.last_host_tsc = local_tsc;
11042                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
11043                         }
11044
11045                         /*
11046                          * We have to disable TSC offset matching.. if you were
11047                          * booting a VM while issuing an S4 host suspend....
11048                          * you may have some problem.  Solving this issue is
11049                          * left as an exercise to the reader.
11050                          */
11051                         kvm->arch.last_tsc_nsec = 0;
11052                         kvm->arch.last_tsc_write = 0;
11053                 }
11054
11055         }
11056         return 0;
11057 }
11058
11059 void kvm_arch_hardware_disable(void)
11060 {
11061         static_call(kvm_x86_hardware_disable)();
11062         drop_user_return_notifiers();
11063 }
11064
11065 int kvm_arch_hardware_setup(void *opaque)
11066 {
11067         struct kvm_x86_init_ops *ops = opaque;
11068         int r;
11069
11070         rdmsrl_safe(MSR_EFER, &host_efer);
11071
11072         if (boot_cpu_has(X86_FEATURE_XSAVES))
11073                 rdmsrl(MSR_IA32_XSS, host_xss);
11074
11075         r = ops->hardware_setup();
11076         if (r != 0)
11077                 return r;
11078
11079         memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops));
11080         kvm_ops_static_call_update();
11081
11082         if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
11083                 supported_xss = 0;
11084
11085 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
11086         cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
11087 #undef __kvm_cpu_cap_has
11088
11089         if (kvm_has_tsc_control) {
11090                 /*
11091                  * Make sure the user can only configure tsc_khz values that
11092                  * fit into a signed integer.
11093                  * A min value is not calculated because it will always
11094                  * be 1 on all machines.
11095                  */
11096                 u64 max = min(0x7fffffffULL,
11097                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
11098                 kvm_max_guest_tsc_khz = max;
11099
11100                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
11101         }
11102
11103         kvm_init_msr_list();
11104         return 0;
11105 }
11106
11107 void kvm_arch_hardware_unsetup(void)
11108 {
11109         static_call(kvm_x86_hardware_unsetup)();
11110 }
11111
11112 int kvm_arch_check_processor_compat(void *opaque)
11113 {
11114         struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
11115         struct kvm_x86_init_ops *ops = opaque;
11116
11117         WARN_ON(!irqs_disabled());
11118
11119         if (__cr4_reserved_bits(cpu_has, c) !=
11120             __cr4_reserved_bits(cpu_has, &boot_cpu_data))
11121                 return -EIO;
11122
11123         return ops->check_processor_compatibility();
11124 }
11125
11126 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
11127 {
11128         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
11129 }
11130 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
11131
11132 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
11133 {
11134         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
11135 }
11136
11137 __read_mostly DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu);
11138 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu);
11139
11140 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
11141 {
11142         struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
11143
11144         vcpu->arch.l1tf_flush_l1d = true;
11145         if (pmu->version && unlikely(pmu->event_count)) {
11146                 pmu->need_cleanup = true;
11147                 kvm_make_request(KVM_REQ_PMU, vcpu);
11148         }
11149         static_call(kvm_x86_sched_in)(vcpu, cpu);
11150 }
11151
11152 void kvm_arch_free_vm(struct kvm *kvm)
11153 {
11154         kfree(to_kvm_hv(kvm)->hv_pa_pg);
11155         vfree(kvm);
11156 }
11157
11158
11159 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
11160 {
11161         int ret;
11162
11163         if (type)
11164                 return -EINVAL;
11165
11166         ret = kvm_page_track_init(kvm);
11167         if (ret)
11168                 return ret;
11169
11170         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
11171         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
11172         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
11173         INIT_LIST_HEAD(&kvm->arch.lpage_disallowed_mmu_pages);
11174         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
11175         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
11176
11177         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
11178         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
11179         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
11180         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
11181                 &kvm->arch.irq_sources_bitmap);
11182
11183         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
11184         mutex_init(&kvm->arch.apic_map_lock);
11185         raw_spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
11186
11187         kvm->arch.kvmclock_offset = -get_kvmclock_base_ns();
11188         pvclock_update_vm_gtod_copy(kvm);
11189
11190         kvm->arch.guest_can_read_msr_platform_info = true;
11191
11192 #if IS_ENABLED(CONFIG_HYPERV)
11193         spin_lock_init(&kvm->arch.hv_root_tdp_lock);
11194         kvm->arch.hv_root_tdp = INVALID_PAGE;
11195 #endif
11196
11197         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
11198         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
11199
11200         kvm_apicv_init(kvm);
11201         kvm_hv_init_vm(kvm);
11202         kvm_mmu_init_vm(kvm);
11203         kvm_xen_init_vm(kvm);
11204
11205         return static_call(kvm_x86_vm_init)(kvm);
11206 }
11207
11208 int kvm_arch_post_init_vm(struct kvm *kvm)
11209 {
11210         return kvm_mmu_post_init_vm(kvm);
11211 }
11212
11213 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
11214 {
11215         vcpu_load(vcpu);
11216         kvm_mmu_unload(vcpu);
11217         vcpu_put(vcpu);
11218 }
11219
11220 static void kvm_free_vcpus(struct kvm *kvm)
11221 {
11222         unsigned int i;
11223         struct kvm_vcpu *vcpu;
11224
11225         /*
11226          * Unpin any mmu pages first.
11227          */
11228         kvm_for_each_vcpu(i, vcpu, kvm) {
11229                 kvm_clear_async_pf_completion_queue(vcpu);
11230                 kvm_unload_vcpu_mmu(vcpu);
11231         }
11232         kvm_for_each_vcpu(i, vcpu, kvm)
11233                 kvm_vcpu_destroy(vcpu);
11234
11235         mutex_lock(&kvm->lock);
11236         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
11237                 kvm->vcpus[i] = NULL;
11238
11239         atomic_set(&kvm->online_vcpus, 0);
11240         mutex_unlock(&kvm->lock);
11241 }
11242
11243 void kvm_arch_sync_events(struct kvm *kvm)
11244 {
11245         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
11246         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
11247         kvm_free_pit(kvm);
11248 }
11249
11250 #define  ERR_PTR_USR(e)  ((void __user *)ERR_PTR(e))
11251
11252 /**
11253  * __x86_set_memory_region: Setup KVM internal memory slot
11254  *
11255  * @kvm: the kvm pointer to the VM.
11256  * @id: the slot ID to setup.
11257  * @gpa: the GPA to install the slot (unused when @size == 0).
11258  * @size: the size of the slot. Set to zero to uninstall a slot.
11259  *
11260  * This function helps to setup a KVM internal memory slot.  Specify
11261  * @size > 0 to install a new slot, while @size == 0 to uninstall a
11262  * slot.  The return code can be one of the following:
11263  *
11264  *   HVA:           on success (uninstall will return a bogus HVA)
11265  *   -errno:        on error
11266  *
11267  * The caller should always use IS_ERR() to check the return value
11268  * before use.  Note, the KVM internal memory slots are guaranteed to
11269  * remain valid and unchanged until the VM is destroyed, i.e., the
11270  * GPA->HVA translation will not change.  However, the HVA is a user
11271  * address, i.e. its accessibility is not guaranteed, and must be
11272  * accessed via __copy_{to,from}_user().
11273  */
11274 void __user * __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
11275                                       u32 size)
11276 {
11277         int i, r;
11278         unsigned long hva, old_npages;
11279         struct kvm_memslots *slots = kvm_memslots(kvm);
11280         struct kvm_memory_slot *slot;
11281
11282         /* Called with kvm->slots_lock held.  */
11283         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
11284                 return ERR_PTR_USR(-EINVAL);
11285
11286         slot = id_to_memslot(slots, id);
11287         if (size) {
11288                 if (slot && slot->npages)
11289                         return ERR_PTR_USR(-EEXIST);
11290
11291                 /*
11292                  * MAP_SHARED to prevent internal slot pages from being moved
11293                  * by fork()/COW.
11294                  */
11295                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
11296                               MAP_SHARED | MAP_ANONYMOUS, 0);
11297                 if (IS_ERR((void *)hva))
11298                         return (void __user *)hva;
11299         } else {
11300                 if (!slot || !slot->npages)
11301                         return NULL;
11302
11303                 old_npages = slot->npages;
11304                 hva = slot->userspace_addr;
11305         }
11306
11307         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
11308                 struct kvm_userspace_memory_region m;
11309
11310                 m.slot = id | (i << 16);
11311                 m.flags = 0;
11312                 m.guest_phys_addr = gpa;
11313                 m.userspace_addr = hva;
11314                 m.memory_size = size;
11315                 r = __kvm_set_memory_region(kvm, &m);
11316                 if (r < 0)
11317                         return ERR_PTR_USR(r);
11318         }
11319
11320         if (!size)
11321                 vm_munmap(hva, old_npages * PAGE_SIZE);
11322
11323         return (void __user *)hva;
11324 }
11325 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
11326
11327 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
11328 {
11329         kvm_mmu_pre_destroy_vm(kvm);
11330 }
11331
11332 void kvm_arch_destroy_vm(struct kvm *kvm)
11333 {
11334         if (current->mm == kvm->mm) {
11335                 /*
11336                  * Free memory regions allocated on behalf of userspace,
11337                  * unless the the memory map has changed due to process exit
11338                  * or fd copying.
11339                  */
11340                 mutex_lock(&kvm->slots_lock);
11341                 __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
11342                                         0, 0);
11343                 __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
11344                                         0, 0);
11345                 __x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
11346                 mutex_unlock(&kvm->slots_lock);
11347         }
11348         static_call_cond(kvm_x86_vm_destroy)(kvm);
11349         kvm_free_msr_filter(srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1));
11350         kvm_pic_destroy(kvm);
11351         kvm_ioapic_destroy(kvm);
11352         kvm_free_vcpus(kvm);
11353         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
11354         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
11355         kvm_mmu_uninit_vm(kvm);
11356         kvm_page_track_cleanup(kvm);
11357         kvm_xen_destroy_vm(kvm);
11358         kvm_hv_destroy_vm(kvm);
11359 }
11360
11361 static void memslot_rmap_free(struct kvm_memory_slot *slot)
11362 {
11363         int i;
11364
11365         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11366                 kvfree(slot->arch.rmap[i]);
11367                 slot->arch.rmap[i] = NULL;
11368         }
11369 }
11370
11371 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
11372 {
11373         int i;
11374
11375         memslot_rmap_free(slot);
11376
11377         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11378                 kvfree(slot->arch.lpage_info[i - 1]);
11379                 slot->arch.lpage_info[i - 1] = NULL;
11380         }
11381
11382         kvm_page_track_free_memslot(slot);
11383 }
11384
11385 static int memslot_rmap_alloc(struct kvm_memory_slot *slot,
11386                               unsigned long npages)
11387 {
11388         const int sz = sizeof(*slot->arch.rmap[0]);
11389         int i;
11390
11391         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11392                 int level = i + 1;
11393                 int lpages = __kvm_mmu_slot_lpages(slot, npages, level);
11394
11395                 if (slot->arch.rmap[i])
11396                         continue;
11397
11398                 slot->arch.rmap[i] = kvcalloc(lpages, sz, GFP_KERNEL_ACCOUNT);
11399                 if (!slot->arch.rmap[i]) {
11400                         memslot_rmap_free(slot);
11401                         return -ENOMEM;
11402                 }
11403         }
11404
11405         return 0;
11406 }
11407
11408 int alloc_all_memslots_rmaps(struct kvm *kvm)
11409 {
11410         struct kvm_memslots *slots;
11411         struct kvm_memory_slot *slot;
11412         int r, i;
11413
11414         /*
11415          * Check if memslots alreday have rmaps early before acquiring
11416          * the slots_arch_lock below.
11417          */
11418         if (kvm_memslots_have_rmaps(kvm))
11419                 return 0;
11420
11421         mutex_lock(&kvm->slots_arch_lock);
11422
11423         /*
11424          * Read memslots_have_rmaps again, under the slots arch lock,
11425          * before allocating the rmaps
11426          */
11427         if (kvm_memslots_have_rmaps(kvm)) {
11428                 mutex_unlock(&kvm->slots_arch_lock);
11429                 return 0;
11430         }
11431
11432         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
11433                 slots = __kvm_memslots(kvm, i);
11434                 kvm_for_each_memslot(slot, slots) {
11435                         r = memslot_rmap_alloc(slot, slot->npages);
11436                         if (r) {
11437                                 mutex_unlock(&kvm->slots_arch_lock);
11438                                 return r;
11439                         }
11440                 }
11441         }
11442
11443         /*
11444          * Ensure that memslots_have_rmaps becomes true strictly after
11445          * all the rmap pointers are set.
11446          */
11447         smp_store_release(&kvm->arch.memslots_have_rmaps, true);
11448         mutex_unlock(&kvm->slots_arch_lock);
11449         return 0;
11450 }
11451
11452 static int kvm_alloc_memslot_metadata(struct kvm *kvm,
11453                                       struct kvm_memory_slot *slot,
11454                                       unsigned long npages)
11455 {
11456         int i, r;
11457
11458         /*
11459          * Clear out the previous array pointers for the KVM_MR_MOVE case.  The
11460          * old arrays will be freed by __kvm_set_memory_region() if installing
11461          * the new memslot is successful.
11462          */
11463         memset(&slot->arch, 0, sizeof(slot->arch));
11464
11465         if (kvm_memslots_have_rmaps(kvm)) {
11466                 r = memslot_rmap_alloc(slot, npages);
11467                 if (r)
11468                         return r;
11469         }
11470
11471         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11472                 struct kvm_lpage_info *linfo;
11473                 unsigned long ugfn;
11474                 int lpages;
11475                 int level = i + 1;
11476
11477                 lpages = __kvm_mmu_slot_lpages(slot, npages, level);
11478
11479                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
11480                 if (!linfo)
11481                         goto out_free;
11482
11483                 slot->arch.lpage_info[i - 1] = linfo;
11484
11485                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
11486                         linfo[0].disallow_lpage = 1;
11487                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
11488                         linfo[lpages - 1].disallow_lpage = 1;
11489                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
11490                 /*
11491                  * If the gfn and userspace address are not aligned wrt each
11492                  * other, disable large page support for this slot.
11493                  */
11494                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1)) {
11495                         unsigned long j;
11496
11497                         for (j = 0; j < lpages; ++j)
11498                                 linfo[j].disallow_lpage = 1;
11499                 }
11500         }
11501
11502         if (kvm_page_track_create_memslot(slot, npages))
11503                 goto out_free;
11504
11505         return 0;
11506
11507 out_free:
11508         memslot_rmap_free(slot);
11509
11510         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11511                 kvfree(slot->arch.lpage_info[i - 1]);
11512                 slot->arch.lpage_info[i - 1] = NULL;
11513         }
11514         return -ENOMEM;
11515 }
11516
11517 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
11518 {
11519         struct kvm_vcpu *vcpu;
11520         int i;
11521
11522         /*
11523          * memslots->generation has been incremented.
11524          * mmio generation may have reached its maximum value.
11525          */
11526         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
11527
11528         /* Force re-initialization of steal_time cache */
11529         kvm_for_each_vcpu(i, vcpu, kvm)
11530                 kvm_vcpu_kick(vcpu);
11531 }
11532
11533 int kvm_arch_prepare_memory_region(struct kvm *kvm,
11534                                 struct kvm_memory_slot *memslot,
11535                                 const struct kvm_userspace_memory_region *mem,
11536                                 enum kvm_mr_change change)
11537 {
11538         if (change == KVM_MR_CREATE || change == KVM_MR_MOVE)
11539                 return kvm_alloc_memslot_metadata(kvm, memslot,
11540                                                   mem->memory_size >> PAGE_SHIFT);
11541         return 0;
11542 }
11543
11544
11545 static void kvm_mmu_update_cpu_dirty_logging(struct kvm *kvm, bool enable)
11546 {
11547         struct kvm_arch *ka = &kvm->arch;
11548
11549         if (!kvm_x86_ops.cpu_dirty_log_size)
11550                 return;
11551
11552         if ((enable && ++ka->cpu_dirty_logging_count == 1) ||
11553             (!enable && --ka->cpu_dirty_logging_count == 0))
11554                 kvm_make_all_cpus_request(kvm, KVM_REQ_UPDATE_CPU_DIRTY_LOGGING);
11555
11556         WARN_ON_ONCE(ka->cpu_dirty_logging_count < 0);
11557 }
11558
11559 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
11560                                      struct kvm_memory_slot *old,
11561                                      const struct kvm_memory_slot *new,
11562                                      enum kvm_mr_change change)
11563 {
11564         bool log_dirty_pages = new->flags & KVM_MEM_LOG_DIRTY_PAGES;
11565
11566         /*
11567          * Update CPU dirty logging if dirty logging is being toggled.  This
11568          * applies to all operations.
11569          */
11570         if ((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)
11571                 kvm_mmu_update_cpu_dirty_logging(kvm, log_dirty_pages);
11572
11573         /*
11574          * Nothing more to do for RO slots (which can't be dirtied and can't be
11575          * made writable) or CREATE/MOVE/DELETE of a slot.
11576          *
11577          * For a memslot with dirty logging disabled:
11578          * CREATE:      No dirty mappings will already exist.
11579          * MOVE/DELETE: The old mappings will already have been cleaned up by
11580          *              kvm_arch_flush_shadow_memslot()
11581          *
11582          * For a memslot with dirty logging enabled:
11583          * CREATE:      No shadow pages exist, thus nothing to write-protect
11584          *              and no dirty bits to clear.
11585          * MOVE/DELETE: The old mappings will already have been cleaned up by
11586          *              kvm_arch_flush_shadow_memslot().
11587          */
11588         if ((change != KVM_MR_FLAGS_ONLY) || (new->flags & KVM_MEM_READONLY))
11589                 return;
11590
11591         /*
11592          * READONLY and non-flags changes were filtered out above, and the only
11593          * other flag is LOG_DIRTY_PAGES, i.e. something is wrong if dirty
11594          * logging isn't being toggled on or off.
11595          */
11596         if (WARN_ON_ONCE(!((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)))
11597                 return;
11598
11599         if (!log_dirty_pages) {
11600                 /*
11601                  * Dirty logging tracks sptes in 4k granularity, meaning that
11602                  * large sptes have to be split.  If live migration succeeds,
11603                  * the guest in the source machine will be destroyed and large
11604                  * sptes will be created in the destination.  However, if the
11605                  * guest continues to run in the source machine (for example if
11606                  * live migration fails), small sptes will remain around and
11607                  * cause bad performance.
11608                  *
11609                  * Scan sptes if dirty logging has been stopped, dropping those
11610                  * which can be collapsed into a single large-page spte.  Later
11611                  * page faults will create the large-page sptes.
11612                  */
11613                 kvm_mmu_zap_collapsible_sptes(kvm, new);
11614         } else {
11615                 /*
11616                  * Initially-all-set does not require write protecting any page,
11617                  * because they're all assumed to be dirty.
11618                  */
11619                 if (kvm_dirty_log_manual_protect_and_init_set(kvm))
11620                         return;
11621
11622                 if (kvm_x86_ops.cpu_dirty_log_size) {
11623                         kvm_mmu_slot_leaf_clear_dirty(kvm, new);
11624                         kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_2M);
11625                 } else {
11626                         kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_4K);
11627                 }
11628         }
11629 }
11630
11631 void kvm_arch_commit_memory_region(struct kvm *kvm,
11632                                 const struct kvm_userspace_memory_region *mem,
11633                                 struct kvm_memory_slot *old,
11634                                 const struct kvm_memory_slot *new,
11635                                 enum kvm_mr_change change)
11636 {
11637         if (!kvm->arch.n_requested_mmu_pages)
11638                 kvm_mmu_change_mmu_pages(kvm,
11639                                 kvm_mmu_calculate_default_mmu_pages(kvm));
11640
11641         kvm_mmu_slot_apply_flags(kvm, old, new, change);
11642
11643         /* Free the arrays associated with the old memslot. */
11644         if (change == KVM_MR_MOVE)
11645                 kvm_arch_free_memslot(kvm, old);
11646 }
11647
11648 void kvm_arch_flush_shadow_all(struct kvm *kvm)
11649 {
11650         kvm_mmu_zap_all(kvm);
11651 }
11652
11653 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
11654                                    struct kvm_memory_slot *slot)
11655 {
11656         kvm_page_track_flush_slot(kvm, slot);
11657 }
11658
11659 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
11660 {
11661         return (is_guest_mode(vcpu) &&
11662                         kvm_x86_ops.guest_apic_has_interrupt &&
11663                         static_call(kvm_x86_guest_apic_has_interrupt)(vcpu));
11664 }
11665
11666 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
11667 {
11668         if (!list_empty_careful(&vcpu->async_pf.done))
11669                 return true;
11670
11671         if (kvm_apic_has_events(vcpu))
11672                 return true;
11673
11674         if (vcpu->arch.pv.pv_unhalted)
11675                 return true;
11676
11677         if (vcpu->arch.exception.pending)
11678                 return true;
11679
11680         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
11681             (vcpu->arch.nmi_pending &&
11682              static_call(kvm_x86_nmi_allowed)(vcpu, false)))
11683                 return true;
11684
11685         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
11686             (vcpu->arch.smi_pending &&
11687              static_call(kvm_x86_smi_allowed)(vcpu, false)))
11688                 return true;
11689
11690         if (kvm_arch_interrupt_allowed(vcpu) &&
11691             (kvm_cpu_has_interrupt(vcpu) ||
11692             kvm_guest_apic_has_interrupt(vcpu)))
11693                 return true;
11694
11695         if (kvm_hv_has_stimer_pending(vcpu))
11696                 return true;
11697
11698         if (is_guest_mode(vcpu) &&
11699             kvm_x86_ops.nested_ops->hv_timer_pending &&
11700             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
11701                 return true;
11702
11703         return false;
11704 }
11705
11706 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
11707 {
11708         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
11709 }
11710
11711 bool kvm_arch_dy_has_pending_interrupt(struct kvm_vcpu *vcpu)
11712 {
11713         if (vcpu->arch.apicv_active && static_call(kvm_x86_dy_apicv_has_pending_interrupt)(vcpu))
11714                 return true;
11715
11716         return false;
11717 }
11718
11719 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
11720 {
11721         if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
11722                 return true;
11723
11724         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
11725                 kvm_test_request(KVM_REQ_SMI, vcpu) ||
11726                  kvm_test_request(KVM_REQ_EVENT, vcpu))
11727                 return true;
11728
11729         return kvm_arch_dy_has_pending_interrupt(vcpu);
11730 }
11731
11732 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
11733 {
11734         if (vcpu->arch.guest_state_protected)
11735                 return true;
11736
11737         return vcpu->arch.preempted_in_kernel;
11738 }
11739
11740 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
11741 {
11742         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
11743 }
11744
11745 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
11746 {
11747         return static_call(kvm_x86_interrupt_allowed)(vcpu, false);
11748 }
11749
11750 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
11751 {
11752         /* Can't read the RIP when guest state is protected, just return 0 */
11753         if (vcpu->arch.guest_state_protected)
11754                 return 0;
11755
11756         if (is_64_bit_mode(vcpu))
11757                 return kvm_rip_read(vcpu);
11758         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
11759                      kvm_rip_read(vcpu));
11760 }
11761 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
11762
11763 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
11764 {
11765         return kvm_get_linear_rip(vcpu) == linear_rip;
11766 }
11767 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
11768
11769 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
11770 {
11771         unsigned long rflags;
11772
11773         rflags = static_call(kvm_x86_get_rflags)(vcpu);
11774         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
11775                 rflags &= ~X86_EFLAGS_TF;
11776         return rflags;
11777 }
11778 EXPORT_SYMBOL_GPL(kvm_get_rflags);
11779
11780 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
11781 {
11782         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
11783             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
11784                 rflags |= X86_EFLAGS_TF;
11785         static_call(kvm_x86_set_rflags)(vcpu, rflags);
11786 }
11787
11788 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
11789 {
11790         __kvm_set_rflags(vcpu, rflags);
11791         kvm_make_request(KVM_REQ_EVENT, vcpu);
11792 }
11793 EXPORT_SYMBOL_GPL(kvm_set_rflags);
11794
11795 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
11796 {
11797         int r;
11798
11799         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
11800               work->wakeup_all)
11801                 return;
11802
11803         r = kvm_mmu_reload(vcpu);
11804         if (unlikely(r))
11805                 return;
11806
11807         if (!vcpu->arch.mmu->direct_map &&
11808               work->arch.cr3 != vcpu->arch.mmu->get_guest_pgd(vcpu))
11809                 return;
11810
11811         kvm_mmu_do_page_fault(vcpu, work->cr2_or_gpa, 0, true);
11812 }
11813
11814 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
11815 {
11816         BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU));
11817
11818         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
11819 }
11820
11821 static inline u32 kvm_async_pf_next_probe(u32 key)
11822 {
11823         return (key + 1) & (ASYNC_PF_PER_VCPU - 1);
11824 }
11825
11826 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11827 {
11828         u32 key = kvm_async_pf_hash_fn(gfn);
11829
11830         while (vcpu->arch.apf.gfns[key] != ~0)
11831                 key = kvm_async_pf_next_probe(key);
11832
11833         vcpu->arch.apf.gfns[key] = gfn;
11834 }
11835
11836 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
11837 {
11838         int i;
11839         u32 key = kvm_async_pf_hash_fn(gfn);
11840
11841         for (i = 0; i < ASYNC_PF_PER_VCPU &&
11842                      (vcpu->arch.apf.gfns[key] != gfn &&
11843                       vcpu->arch.apf.gfns[key] != ~0); i++)
11844                 key = kvm_async_pf_next_probe(key);
11845
11846         return key;
11847 }
11848
11849 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11850 {
11851         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
11852 }
11853
11854 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11855 {
11856         u32 i, j, k;
11857
11858         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
11859
11860         if (WARN_ON_ONCE(vcpu->arch.apf.gfns[i] != gfn))
11861                 return;
11862
11863         while (true) {
11864                 vcpu->arch.apf.gfns[i] = ~0;
11865                 do {
11866                         j = kvm_async_pf_next_probe(j);
11867                         if (vcpu->arch.apf.gfns[j] == ~0)
11868                                 return;
11869                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
11870                         /*
11871                          * k lies cyclically in ]i,j]
11872                          * |    i.k.j |
11873                          * |....j i.k.| or  |.k..j i...|
11874                          */
11875                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
11876                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
11877                 i = j;
11878         }
11879 }
11880
11881 static inline int apf_put_user_notpresent(struct kvm_vcpu *vcpu)
11882 {
11883         u32 reason = KVM_PV_REASON_PAGE_NOT_PRESENT;
11884
11885         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &reason,
11886                                       sizeof(reason));
11887 }
11888
11889 static inline int apf_put_user_ready(struct kvm_vcpu *vcpu, u32 token)
11890 {
11891         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
11892
11893         return kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
11894                                              &token, offset, sizeof(token));
11895 }
11896
11897 static inline bool apf_pageready_slot_free(struct kvm_vcpu *vcpu)
11898 {
11899         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
11900         u32 val;
11901
11902         if (kvm_read_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
11903                                          &val, offset, sizeof(val)))
11904                 return false;
11905
11906         return !val;
11907 }
11908
11909 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
11910 {
11911         if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
11912                 return false;
11913
11914         if (!kvm_pv_async_pf_enabled(vcpu) ||
11915             (vcpu->arch.apf.send_user_only && static_call(kvm_x86_get_cpl)(vcpu) == 0))
11916                 return false;
11917
11918         return true;
11919 }
11920
11921 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
11922 {
11923         if (unlikely(!lapic_in_kernel(vcpu) ||
11924                      kvm_event_needs_reinjection(vcpu) ||
11925                      vcpu->arch.exception.pending))
11926                 return false;
11927
11928         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
11929                 return false;
11930
11931         /*
11932          * If interrupts are off we cannot even use an artificial
11933          * halt state.
11934          */
11935         return kvm_arch_interrupt_allowed(vcpu);
11936 }
11937
11938 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
11939                                      struct kvm_async_pf *work)
11940 {
11941         struct x86_exception fault;
11942
11943         trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
11944         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
11945
11946         if (kvm_can_deliver_async_pf(vcpu) &&
11947             !apf_put_user_notpresent(vcpu)) {
11948                 fault.vector = PF_VECTOR;
11949                 fault.error_code_valid = true;
11950                 fault.error_code = 0;
11951                 fault.nested_page_fault = false;
11952                 fault.address = work->arch.token;
11953                 fault.async_page_fault = true;
11954                 kvm_inject_page_fault(vcpu, &fault);
11955                 return true;
11956         } else {
11957                 /*
11958                  * It is not possible to deliver a paravirtualized asynchronous
11959                  * page fault, but putting the guest in an artificial halt state
11960                  * can be beneficial nevertheless: if an interrupt arrives, we
11961                  * can deliver it timely and perhaps the guest will schedule
11962                  * another process.  When the instruction that triggered a page
11963                  * fault is retried, hopefully the page will be ready in the host.
11964                  */
11965                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
11966                 return false;
11967         }
11968 }
11969
11970 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
11971                                  struct kvm_async_pf *work)
11972 {
11973         struct kvm_lapic_irq irq = {
11974                 .delivery_mode = APIC_DM_FIXED,
11975                 .vector = vcpu->arch.apf.vec
11976         };
11977
11978         if (work->wakeup_all)
11979                 work->arch.token = ~0; /* broadcast wakeup */
11980         else
11981                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
11982         trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
11983
11984         if ((work->wakeup_all || work->notpresent_injected) &&
11985             kvm_pv_async_pf_enabled(vcpu) &&
11986             !apf_put_user_ready(vcpu, work->arch.token)) {
11987                 vcpu->arch.apf.pageready_pending = true;
11988                 kvm_apic_set_irq(vcpu, &irq, NULL);
11989         }
11990
11991         vcpu->arch.apf.halted = false;
11992         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
11993 }
11994
11995 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu)
11996 {
11997         kvm_make_request(KVM_REQ_APF_READY, vcpu);
11998         if (!vcpu->arch.apf.pageready_pending)
11999                 kvm_vcpu_kick(vcpu);
12000 }
12001
12002 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu)
12003 {
12004         if (!kvm_pv_async_pf_enabled(vcpu))
12005                 return true;
12006         else
12007                 return kvm_lapic_enabled(vcpu) && apf_pageready_slot_free(vcpu);
12008 }
12009
12010 void kvm_arch_start_assignment(struct kvm *kvm)
12011 {
12012         if (atomic_inc_return(&kvm->arch.assigned_device_count) == 1)
12013                 static_call_cond(kvm_x86_start_assignment)(kvm);
12014 }
12015 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
12016
12017 void kvm_arch_end_assignment(struct kvm *kvm)
12018 {
12019         atomic_dec(&kvm->arch.assigned_device_count);
12020 }
12021 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
12022
12023 bool kvm_arch_has_assigned_device(struct kvm *kvm)
12024 {
12025         return atomic_read(&kvm->arch.assigned_device_count);
12026 }
12027 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
12028
12029 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
12030 {
12031         atomic_inc(&kvm->arch.noncoherent_dma_count);
12032 }
12033 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
12034
12035 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
12036 {
12037         atomic_dec(&kvm->arch.noncoherent_dma_count);
12038 }
12039 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
12040
12041 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
12042 {
12043         return atomic_read(&kvm->arch.noncoherent_dma_count);
12044 }
12045 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
12046
12047 bool kvm_arch_has_irq_bypass(void)
12048 {
12049         return true;
12050 }
12051
12052 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
12053                                       struct irq_bypass_producer *prod)
12054 {
12055         struct kvm_kernel_irqfd *irqfd =
12056                 container_of(cons, struct kvm_kernel_irqfd, consumer);
12057         int ret;
12058
12059         irqfd->producer = prod;
12060         kvm_arch_start_assignment(irqfd->kvm);
12061         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm,
12062                                          prod->irq, irqfd->gsi, 1);
12063
12064         if (ret)
12065                 kvm_arch_end_assignment(irqfd->kvm);
12066
12067         return ret;
12068 }
12069
12070 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
12071                                       struct irq_bypass_producer *prod)
12072 {
12073         int ret;
12074         struct kvm_kernel_irqfd *irqfd =
12075                 container_of(cons, struct kvm_kernel_irqfd, consumer);
12076
12077         WARN_ON(irqfd->producer != prod);
12078         irqfd->producer = NULL;
12079
12080         /*
12081          * When producer of consumer is unregistered, we change back to
12082          * remapped mode, so we can re-use the current implementation
12083          * when the irq is masked/disabled or the consumer side (KVM
12084          * int this case doesn't want to receive the interrupts.
12085         */
12086         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm, prod->irq, irqfd->gsi, 0);
12087         if (ret)
12088                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
12089                        " fails: %d\n", irqfd->consumer.token, ret);
12090
12091         kvm_arch_end_assignment(irqfd->kvm);
12092 }
12093
12094 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
12095                                    uint32_t guest_irq, bool set)
12096 {
12097         return static_call(kvm_x86_update_pi_irte)(kvm, host_irq, guest_irq, set);
12098 }
12099
12100 bool kvm_vector_hashing_enabled(void)
12101 {
12102         return vector_hashing;
12103 }
12104
12105 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
12106 {
12107         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
12108 }
12109 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
12110
12111
12112 int kvm_spec_ctrl_test_value(u64 value)
12113 {
12114         /*
12115          * test that setting IA32_SPEC_CTRL to given value
12116          * is allowed by the host processor
12117          */
12118
12119         u64 saved_value;
12120         unsigned long flags;
12121         int ret = 0;
12122
12123         local_irq_save(flags);
12124
12125         if (rdmsrl_safe(MSR_IA32_SPEC_CTRL, &saved_value))
12126                 ret = 1;
12127         else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value))
12128                 ret = 1;
12129         else
12130                 wrmsrl(MSR_IA32_SPEC_CTRL, saved_value);
12131
12132         local_irq_restore(flags);
12133
12134         return ret;
12135 }
12136 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value);
12137
12138 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code)
12139 {
12140         struct x86_exception fault;
12141         u32 access = error_code &
12142                 (PFERR_WRITE_MASK | PFERR_FETCH_MASK | PFERR_USER_MASK);
12143
12144         if (!(error_code & PFERR_PRESENT_MASK) ||
12145             vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, &fault) != UNMAPPED_GVA) {
12146                 /*
12147                  * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
12148                  * tables probably do not match the TLB.  Just proceed
12149                  * with the error code that the processor gave.
12150                  */
12151                 fault.vector = PF_VECTOR;
12152                 fault.error_code_valid = true;
12153                 fault.error_code = error_code;
12154                 fault.nested_page_fault = false;
12155                 fault.address = gva;
12156         }
12157         vcpu->arch.walk_mmu->inject_page_fault(vcpu, &fault);
12158 }
12159 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error);
12160
12161 /*
12162  * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
12163  * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
12164  * indicates whether exit to userspace is needed.
12165  */
12166 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
12167                               struct x86_exception *e)
12168 {
12169         if (r == X86EMUL_PROPAGATE_FAULT) {
12170                 kvm_inject_emulated_page_fault(vcpu, e);
12171                 return 1;
12172         }
12173
12174         /*
12175          * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
12176          * while handling a VMX instruction KVM could've handled the request
12177          * correctly by exiting to userspace and performing I/O but there
12178          * doesn't seem to be a real use-case behind such requests, just return
12179          * KVM_EXIT_INTERNAL_ERROR for now.
12180          */
12181         vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
12182         vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
12183         vcpu->run->internal.ndata = 0;
12184
12185         return 0;
12186 }
12187 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure);
12188
12189 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva)
12190 {
12191         bool pcid_enabled;
12192         struct x86_exception e;
12193         struct {
12194                 u64 pcid;
12195                 u64 gla;
12196         } operand;
12197         int r;
12198
12199         r = kvm_read_guest_virt(vcpu, gva, &operand, sizeof(operand), &e);
12200         if (r != X86EMUL_CONTINUE)
12201                 return kvm_handle_memory_failure(vcpu, r, &e);
12202
12203         if (operand.pcid >> 12 != 0) {
12204                 kvm_inject_gp(vcpu, 0);
12205                 return 1;
12206         }
12207
12208         pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
12209
12210         switch (type) {
12211         case INVPCID_TYPE_INDIV_ADDR:
12212                 if ((!pcid_enabled && (operand.pcid != 0)) ||
12213                     is_noncanonical_address(operand.gla, vcpu)) {
12214                         kvm_inject_gp(vcpu, 0);
12215                         return 1;
12216                 }
12217                 kvm_mmu_invpcid_gva(vcpu, operand.gla, operand.pcid);
12218                 return kvm_skip_emulated_instruction(vcpu);
12219
12220         case INVPCID_TYPE_SINGLE_CTXT:
12221                 if (!pcid_enabled && (operand.pcid != 0)) {
12222                         kvm_inject_gp(vcpu, 0);
12223                         return 1;
12224                 }
12225
12226                 kvm_invalidate_pcid(vcpu, operand.pcid);
12227                 return kvm_skip_emulated_instruction(vcpu);
12228
12229         case INVPCID_TYPE_ALL_NON_GLOBAL:
12230                 /*
12231                  * Currently, KVM doesn't mark global entries in the shadow
12232                  * page tables, so a non-global flush just degenerates to a
12233                  * global flush. If needed, we could optimize this later by
12234                  * keeping track of global entries in shadow page tables.
12235                  */
12236
12237                 fallthrough;
12238         case INVPCID_TYPE_ALL_INCL_GLOBAL:
12239                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
12240                 return kvm_skip_emulated_instruction(vcpu);
12241
12242         default:
12243                 BUG(); /* We have already checked above that type <= 3 */
12244         }
12245 }
12246 EXPORT_SYMBOL_GPL(kvm_handle_invpcid);
12247
12248 static int complete_sev_es_emulated_mmio(struct kvm_vcpu *vcpu)
12249 {
12250         struct kvm_run *run = vcpu->run;
12251         struct kvm_mmio_fragment *frag;
12252         unsigned int len;
12253
12254         BUG_ON(!vcpu->mmio_needed);
12255
12256         /* Complete previous fragment */
12257         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
12258         len = min(8u, frag->len);
12259         if (!vcpu->mmio_is_write)
12260                 memcpy(frag->data, run->mmio.data, len);
12261
12262         if (frag->len <= 8) {
12263                 /* Switch to the next fragment. */
12264                 frag++;
12265                 vcpu->mmio_cur_fragment++;
12266         } else {
12267                 /* Go forward to the next mmio piece. */
12268                 frag->data += len;
12269                 frag->gpa += len;
12270                 frag->len -= len;
12271         }
12272
12273         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
12274                 vcpu->mmio_needed = 0;
12275
12276                 // VMG change, at this point, we're always done
12277                 // RIP has already been advanced
12278                 return 1;
12279         }
12280
12281         // More MMIO is needed
12282         run->mmio.phys_addr = frag->gpa;
12283         run->mmio.len = min(8u, frag->len);
12284         run->mmio.is_write = vcpu->mmio_is_write;
12285         if (run->mmio.is_write)
12286                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
12287         run->exit_reason = KVM_EXIT_MMIO;
12288
12289         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12290
12291         return 0;
12292 }
12293
12294 int kvm_sev_es_mmio_write(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12295                           void *data)
12296 {
12297         int handled;
12298         struct kvm_mmio_fragment *frag;
12299
12300         if (!data)
12301                 return -EINVAL;
12302
12303         handled = write_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12304         if (handled == bytes)
12305                 return 1;
12306
12307         bytes -= handled;
12308         gpa += handled;
12309         data += handled;
12310
12311         /*TODO: Check if need to increment number of frags */
12312         frag = vcpu->mmio_fragments;
12313         vcpu->mmio_nr_fragments = 1;
12314         frag->len = bytes;
12315         frag->gpa = gpa;
12316         frag->data = data;
12317
12318         vcpu->mmio_needed = 1;
12319         vcpu->mmio_cur_fragment = 0;
12320
12321         vcpu->run->mmio.phys_addr = gpa;
12322         vcpu->run->mmio.len = min(8u, frag->len);
12323         vcpu->run->mmio.is_write = 1;
12324         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
12325         vcpu->run->exit_reason = KVM_EXIT_MMIO;
12326
12327         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12328
12329         return 0;
12330 }
12331 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write);
12332
12333 int kvm_sev_es_mmio_read(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12334                          void *data)
12335 {
12336         int handled;
12337         struct kvm_mmio_fragment *frag;
12338
12339         if (!data)
12340                 return -EINVAL;
12341
12342         handled = read_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12343         if (handled == bytes)
12344                 return 1;
12345
12346         bytes -= handled;
12347         gpa += handled;
12348         data += handled;
12349
12350         /*TODO: Check if need to increment number of frags */
12351         frag = vcpu->mmio_fragments;
12352         vcpu->mmio_nr_fragments = 1;
12353         frag->len = bytes;
12354         frag->gpa = gpa;
12355         frag->data = data;
12356
12357         vcpu->mmio_needed = 1;
12358         vcpu->mmio_cur_fragment = 0;
12359
12360         vcpu->run->mmio.phys_addr = gpa;
12361         vcpu->run->mmio.len = min(8u, frag->len);
12362         vcpu->run->mmio.is_write = 0;
12363         vcpu->run->exit_reason = KVM_EXIT_MMIO;
12364
12365         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12366
12367         return 0;
12368 }
12369 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read);
12370
12371 static int complete_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
12372 {
12373         memcpy(vcpu->arch.guest_ins_data, vcpu->arch.pio_data,
12374                vcpu->arch.pio.count * vcpu->arch.pio.size);
12375         vcpu->arch.pio.count = 0;
12376
12377         return 1;
12378 }
12379
12380 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
12381                            unsigned int port, void *data,  unsigned int count)
12382 {
12383         int ret;
12384
12385         ret = emulator_pio_out_emulated(vcpu->arch.emulate_ctxt, size, port,
12386                                         data, count);
12387         if (ret)
12388                 return ret;
12389
12390         vcpu->arch.pio.count = 0;
12391
12392         return 0;
12393 }
12394
12395 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
12396                           unsigned int port, void *data, unsigned int count)
12397 {
12398         int ret;
12399
12400         ret = emulator_pio_in_emulated(vcpu->arch.emulate_ctxt, size, port,
12401                                        data, count);
12402         if (ret) {
12403                 vcpu->arch.pio.count = 0;
12404         } else {
12405                 vcpu->arch.guest_ins_data = data;
12406                 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_ins;
12407         }
12408
12409         return 0;
12410 }
12411
12412 int kvm_sev_es_string_io(struct kvm_vcpu *vcpu, unsigned int size,
12413                          unsigned int port, void *data,  unsigned int count,
12414                          int in)
12415 {
12416         return in ? kvm_sev_es_ins(vcpu, size, port, data, count)
12417                   : kvm_sev_es_outs(vcpu, size, port, data, count);
12418 }
12419 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io);
12420
12421 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry);
12422 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
12423 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
12424 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
12425 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
12426 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
12427 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
12428 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
12429 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
12430 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
12431 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
12432 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
12433 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
12434 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
12435 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
12436 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
12437 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
12438 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
12439 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
12440 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
12441 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
12442 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log);
12443 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request);
12444 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter);
12445 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit);
12446 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter);
12447 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit);