arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *   Yaniv Kamay  <yaniv@qumranet.com>
  15  *   Amit Shah    <amit.shah@qumranet.com>
  16  *   Ben-Ami Yassour <benami@il.ibm.com>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "mmu.h"
  22 #include "i8254.h"
  23 #include "tss.h"
  24 #include "kvm_cache_regs.h"
  25 #include "x86.h"
  26 #include "cpuid.h"
  27 #include "pmu.h"
  28 #include "hyperv.h"
  29 #include "lapic.h"
  30
  31 #include <linux/clocksource.h>
  32 #include <linux/interrupt.h>
  33 #include <linux/kvm.h>
  34 #include <linux/fs.h>
  35 #include <linux/vmalloc.h>
  36 #include <linux/export.h>
  37 #include <linux/moduleparam.h>
  38 #include <linux/mman.h>
  39 #include <linux/highmem.h>
  40 #include <linux/iommu.h>
  41 #include <linux/intel-iommu.h>
  42 #include <linux/cpufreq.h>
  43 #include <linux/user-return-notifier.h>
  44 #include <linux/srcu.h>
  45 #include <linux/slab.h>
  46 #include <linux/perf_event.h>
  47 #include <linux/uaccess.h>
  48 #include <linux/hash.h>
  49 #include <linux/pci.h>
  50 #include <linux/timekeeper_internal.h>
  51 #include <linux/pvclock_gtod.h>
  52 #include <linux/kvm_irqfd.h>
  53 #include <linux/irqbypass.h>
  54 #include <linux/sched/stat.h>
  55 #include <linux/sched/isolation.h>
  56 #include <linux/mem_encrypt.h>
  57
  58 #include <trace/events/kvm.h>
  59
  60 #include <asm/debugreg.h>
  61 #include <asm/msr.h>
  62 #include <asm/desc.h>
  63 #include <asm/mce.h>
  64 #include <linux/kernel_stat.h>
  65 #include <asm/fpu/internal.h> /* Ugh! */
  66 #include <asm/pvclock.h>
  67 #include <asm/div64.h>
  68 #include <asm/irq_remapping.h>
  69 #include <asm/mshyperv.h>
  70 #include <asm/hypervisor.h>
  71 #include <asm/intel_pt.h>
  72 #include <asm/emulate_prefix.h>
  73 #include <clocksource/hyperv_timer.h>
  74
  75 #define CREATE_TRACE_POINTS
  76 #include "trace.h"
  77
  78 #define MAX_IO_MSRS 256
  79 #define KVM_MAX_MCE_BANKS 32
  80 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  81 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  82
  83 #define emul_to_vcpu(ctxt) \
  84         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  85
  86 /* EFER defaults:
  87  * - enable syscall per default because its emulated by KVM
  88  * - enable LME and LMA per default on 64 bit KVM
  89  */
  90 #ifdef CONFIG_X86_64
  91 static
  92 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  93 #else
  94 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  95 #endif
  96
  97 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
  98
  99 #define VM_STAT(x, ...) offsetof(struct kvm, stat.x), KVM_STAT_VM, ## __VA_ARGS__
 100 #define VCPU_STAT(x, ...) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU, ## __VA_ARGS__
 101
 102 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
 103                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 104
 105 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 106 static void process_nmi(struct kvm_vcpu *vcpu);
 107 static void enter_smm(struct kvm_vcpu *vcpu);
 108 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 109 static void store_regs(struct kvm_vcpu *vcpu);
 110 static int sync_regs(struct kvm_vcpu *vcpu);
 111
 112 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
 113 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 114
 115 static bool __read_mostly ignore_msrs = 0;
 116 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 117
 118 static bool __read_mostly report_ignored_msrs = true;
 119 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 120
 121 unsigned int min_timer_period_us = 200;
 122 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 123
 124 static bool __read_mostly kvmclock_periodic_sync = true;
 125 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 126
 127 bool __read_mostly kvm_has_tsc_control;
 128 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 129 u32  __read_mostly kvm_max_guest_tsc_khz;
 130 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 131 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 132 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 133 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 134 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 135 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 136 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 137
 138 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 139 static u32 __read_mostly tsc_tolerance_ppm = 250;
 140 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 141
 142 /*
 143  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 144  * adaptive tuning starting from default advancment of 1000ns.  '0' disables
 145  * advancement entirely.  Any other value is used as-is and disables adaptive
 146  * tuning, i.e. allows priveleged userspace to set an exact advancement time.
 147  */
 148 static int __read_mostly lapic_timer_advance_ns = -1;
 149 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 150
 151 static bool __read_mostly vector_hashing = true;
 152 module_param(vector_hashing, bool, S_IRUGO);
 153
 154 bool __read_mostly enable_vmware_backdoor = false;
 155 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 156 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 157
 158 static bool __read_mostly force_emulation_prefix = false;
 159 module_param(force_emulation_prefix, bool, S_IRUGO);
 160
 161 int __read_mostly pi_inject_timer = -1;
 162 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
 163
 164 #define KVM_NR_SHARED_MSRS 16
 165
 166 struct kvm_shared_msrs_global {
 167         int nr;
 168         u32 msrs[KVM_NR_SHARED_MSRS];
 169 };
 170
 171 struct kvm_shared_msrs {
 172         struct user_return_notifier urn;
 173         bool registered;
 174         struct kvm_shared_msr_values {
 175                 u64 host;
 176                 u64 curr;
 177         } values[KVM_NR_SHARED_MSRS];
 178 };
 179
 180 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 181 static struct kvm_shared_msrs __percpu *shared_msrs;
 182
 183 static u64 __read_mostly host_xss;
 184
 185 struct kvm_stats_debugfs_item debugfs_entries[] = {
 186         { "pf_fixed", VCPU_STAT(pf_fixed) },
 187         { "pf_guest", VCPU_STAT(pf_guest) },
 188         { "tlb_flush", VCPU_STAT(tlb_flush) },
 189         { "invlpg", VCPU_STAT(invlpg) },
 190         { "exits", VCPU_STAT(exits) },
 191         { "io_exits", VCPU_STAT(io_exits) },
 192         { "mmio_exits", VCPU_STAT(mmio_exits) },
 193         { "signal_exits", VCPU_STAT(signal_exits) },
 194         { "irq_window", VCPU_STAT(irq_window_exits) },
 195         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 196         { "halt_exits", VCPU_STAT(halt_exits) },
 197         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 198         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 199         { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
 200         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 201         { "hypercalls", VCPU_STAT(hypercalls) },
 202         { "request_irq", VCPU_STAT(request_irq_exits) },
 203         { "irq_exits", VCPU_STAT(irq_exits) },
 204         { "host_state_reload", VCPU_STAT(host_state_reload) },
 205         { "fpu_reload", VCPU_STAT(fpu_reload) },
 206         { "insn_emulation", VCPU_STAT(insn_emulation) },
 207         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 208         { "irq_injections", VCPU_STAT(irq_injections) },
 209         { "nmi_injections", VCPU_STAT(nmi_injections) },
 210         { "req_event", VCPU_STAT(req_event) },
 211         { "l1d_flush", VCPU_STAT(l1d_flush) },
 212         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 213         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 214         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 215         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 216         { "mmu_flooded", VM_STAT(mmu_flooded) },
 217         { "mmu_recycled", VM_STAT(mmu_recycled) },
 218         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 219         { "mmu_unsync", VM_STAT(mmu_unsync) },
 220         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 221         { "largepages", VM_STAT(lpages, .mode = 0444) },
 222         { "nx_largepages_splitted", VM_STAT(nx_lpage_splits, .mode = 0444) },
 223         { "max_mmu_page_hash_collisions",
 224                 VM_STAT(max_mmu_page_hash_collisions) },
 225         { NULL }
 226 };
 227
 228 u64 __read_mostly host_xcr0;
 229
 230 struct kmem_cache *x86_fpu_cache;
 231 EXPORT_SYMBOL_GPL(x86_fpu_cache);
 232
 233 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 234
 235 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 236 {
 237         int i;
 238         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 239                 vcpu->arch.apf.gfns[i] = ~0;
 240 }
 241
 242 static void kvm_on_user_return(struct user_return_notifier *urn)
 243 {
 244         unsigned slot;
 245         struct kvm_shared_msrs *locals
 246                 = container_of(urn, struct kvm_shared_msrs, urn);
 247         struct kvm_shared_msr_values *values;
 248         unsigned long flags;
 249
 250         /*
 251          * Disabling irqs at this point since the following code could be
 252          * interrupted and executed through kvm_arch_hardware_disable()
 253          */
 254         local_irq_save(flags);
 255         if (locals->registered) {
 256                 locals->registered = false;
 257                 user_return_notifier_unregister(urn);
 258         }
 259         local_irq_restore(flags);
 260         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 261                 values = &locals->values[slot];
 262                 if (values->host != values->curr) {
 263                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 264                         values->curr = values->host;
 265                 }
 266         }
 267 }
 268
 269 void kvm_define_shared_msr(unsigned slot, u32 msr)
 270 {
 271         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 272         shared_msrs_global.msrs[slot] = msr;
 273         if (slot >= shared_msrs_global.nr)
 274                 shared_msrs_global.nr = slot + 1;
 275 }
 276 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 277
 278 static void kvm_shared_msr_cpu_online(void)
 279 {
 280         unsigned int cpu = smp_processor_id();
 281         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 282         u64 value;
 283         int i;
 284
 285         for (i = 0; i < shared_msrs_global.nr; ++i) {
 286                 rdmsrl_safe(shared_msrs_global.msrs[i], &value);
 287                 smsr->values[i].host = value;
 288                 smsr->values[i].curr = value;
 289         }
 290 }
 291
 292 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 293 {
 294         unsigned int cpu = smp_processor_id();
 295         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 296         int err;
 297
 298         value = (value & mask) | (smsr->values[slot].host & ~mask);
 299         if (value == smsr->values[slot].curr)
 300                 return 0;
 301         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 302         if (err)
 303                 return 1;
 304
 305         smsr->values[slot].curr = value;
 306         if (!smsr->registered) {
 307                 smsr->urn.on_user_return = kvm_on_user_return;
 308                 user_return_notifier_register(&smsr->urn);
 309                 smsr->registered = true;
 310         }
 311         return 0;
 312 }
 313 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 314
 315 static void drop_user_return_notifiers(void)
 316 {
 317         unsigned int cpu = smp_processor_id();
 318         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 319
 320         if (smsr->registered)
 321                 kvm_on_user_return(&smsr->urn);
 322 }
 323
 324 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 325 {
 326         return vcpu->arch.apic_base;
 327 }
 328 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 329
 330 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 331 {
 332         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 333 }
 334 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 335
 336 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 337 {
 338         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 339         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 340         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) | 0x2ff |
 341                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 342
 343         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 344                 return 1;
 345         if (!msr_info->host_initiated) {
 346                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 347                         return 1;
 348                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 349                         return 1;
 350         }
 351
 352         kvm_lapic_set_base(vcpu, msr_info->data);
 353         return 0;
 354 }
 355 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 356
 357 asmlinkage __visible void kvm_spurious_fault(void)
 358 {
 359         /* Fault while not rebooting.  We want the trace. */
 360         BUG_ON(!kvm_rebooting);
 361 }
 362 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 363
 364 #define EXCPT_BENIGN            0
 365 #define EXCPT_CONTRIBUTORY      1
 366 #define EXCPT_PF                2
 367
 368 static int exception_class(int vector)
 369 {
 370         switch (vector) {
 371         case PF_VECTOR:
 372                 return EXCPT_PF;
 373         case DE_VECTOR:
 374         case TS_VECTOR:
 375         case NP_VECTOR:
 376         case SS_VECTOR:
 377         case GP_VECTOR:
 378                 return EXCPT_CONTRIBUTORY;
 379         default:
 380                 break;
 381         }
 382         return EXCPT_BENIGN;
 383 }
 384
 385 #define EXCPT_FAULT             0
 386 #define EXCPT_TRAP              1
 387 #define EXCPT_ABORT             2
 388 #define EXCPT_INTERRUPT         3
 389
 390 static int exception_type(int vector)
 391 {
 392         unsigned int mask;
 393
 394         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 395                 return EXCPT_INTERRUPT;
 396
 397         mask = 1 << vector;
 398
 399         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 400         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 401                 return EXCPT_TRAP;
 402
 403         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 404                 return EXCPT_ABORT;
 405
 406         /* Reserved exceptions will result in fault */
 407         return EXCPT_FAULT;
 408 }
 409
 410 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 411 {
 412         unsigned nr = vcpu->arch.exception.nr;
 413         bool has_payload = vcpu->arch.exception.has_payload;
 414         unsigned long payload = vcpu->arch.exception.payload;
 415
 416         if (!has_payload)
 417                 return;
 418
 419         switch (nr) {
 420         case DB_VECTOR:
 421                 /*
 422                  * "Certain debug exceptions may clear bit 0-3.  The
 423                  * remaining contents of the DR6 register are never
 424                  * cleared by the processor".
 425                  */
 426                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 427                 /*
 428                  * DR6.RTM is set by all #DB exceptions that don't clear it.
 429                  */
 430                 vcpu->arch.dr6 |= DR6_RTM;
 431                 vcpu->arch.dr6 |= payload;
 432                 /*
 433                  * Bit 16 should be set in the payload whenever the #DB
 434                  * exception should clear DR6.RTM. This makes the payload
 435                  * compatible with the pending debug exceptions under VMX.
 436                  * Though not currently documented in the SDM, this also
 437                  * makes the payload compatible with the exit qualification
 438                  * for #DB exceptions under VMX.
 439                  */
 440                 vcpu->arch.dr6 ^= payload & DR6_RTM;
 441                 break;
 442         case PF_VECTOR:
 443                 vcpu->arch.cr2 = payload;
 444                 break;
 445         }
 446
 447         vcpu->arch.exception.has_payload = false;
 448         vcpu->arch.exception.payload = 0;
 449 }
 450 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 451
 452 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 453                 unsigned nr, bool has_error, u32 error_code,
 454                 bool has_payload, unsigned long payload, bool reinject)
 455 {
 456         u32 prev_nr;
 457         int class1, class2;
 458
 459         kvm_make_request(KVM_REQ_EVENT, vcpu);
 460
 461         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 462         queue:
 463                 if (has_error && !is_protmode(vcpu))
 464                         has_error = false;
 465                 if (reinject) {
 466                         /*
 467                          * On vmentry, vcpu->arch.exception.pending is only
 468                          * true if an event injection was blocked by
 469                          * nested_run_pending.  In that case, however,
 470                          * vcpu_enter_guest requests an immediate exit,
 471                          * and the guest shouldn't proceed far enough to
 472                          * need reinjection.
 473                          */
 474                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 475                         vcpu->arch.exception.injected = true;
 476                         if (WARN_ON_ONCE(has_payload)) {
 477                                 /*
 478                                  * A reinjected event has already
 479                                  * delivered its payload.
 480                                  */
 481                                 has_payload = false;
 482                                 payload = 0;
 483                         }
 484                 } else {
 485                         vcpu->arch.exception.pending = true;
 486                         vcpu->arch.exception.injected = false;
 487                 }
 488                 vcpu->arch.exception.has_error_code = has_error;
 489                 vcpu->arch.exception.nr = nr;
 490                 vcpu->arch.exception.error_code = error_code;
 491                 vcpu->arch.exception.has_payload = has_payload;
 492                 vcpu->arch.exception.payload = payload;
 493                 /*
 494                  * In guest mode, payload delivery should be deferred,
 495                  * so that the L1 hypervisor can intercept #PF before
 496                  * CR2 is modified (or intercept #DB before DR6 is
 497                  * modified under nVMX).  However, for ABI
 498                  * compatibility with KVM_GET_VCPU_EVENTS and
 499                  * KVM_SET_VCPU_EVENTS, we can't delay payload
 500                  * delivery unless userspace has enabled this
 501                  * functionality via the per-VM capability,
 502                  * KVM_CAP_EXCEPTION_PAYLOAD.
 503                  */
 504                 if (!vcpu->kvm->arch.exception_payload_enabled ||
 505                     !is_guest_mode(vcpu))
 506                         kvm_deliver_exception_payload(vcpu);
 507                 return;
 508         }
 509
 510         /* to check exception */
 511         prev_nr = vcpu->arch.exception.nr;
 512         if (prev_nr == DF_VECTOR) {
 513                 /* triple fault -> shutdown */
 514                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 515                 return;
 516         }
 517         class1 = exception_class(prev_nr);
 518         class2 = exception_class(nr);
 519         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 520                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 521                 /*
 522                  * Generate double fault per SDM Table 5-5.  Set
 523                  * exception.pending = true so that the double fault
 524                  * can trigger a nested vmexit.
 525                  */
 526                 vcpu->arch.exception.pending = true;
 527                 vcpu->arch.exception.injected = false;
 528                 vcpu->arch.exception.has_error_code = true;
 529                 vcpu->arch.exception.nr = DF_VECTOR;
 530                 vcpu->arch.exception.error_code = 0;
 531                 vcpu->arch.exception.has_payload = false;
 532                 vcpu->arch.exception.payload = 0;
 533         } else
 534                 /* replace previous exception with a new one in a hope
 535                    that instruction re-execution will regenerate lost
 536                    exception */
 537                 goto queue;
 538 }
 539
 540 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 541 {
 542         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 543 }
 544 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 545
 546 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 547 {
 548         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 549 }
 550 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 551
 552 static void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 553                                   unsigned long payload)
 554 {
 555         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 556 }
 557
 558 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 559                                     u32 error_code, unsigned long payload)
 560 {
 561         kvm_multiple_exception(vcpu, nr, true, error_code,
 562                                true, payload, false);
 563 }
 564
 565 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 566 {
 567         if (err)
 568                 kvm_inject_gp(vcpu, 0);
 569         else
 570                 return kvm_skip_emulated_instruction(vcpu);
 571
 572         return 1;
 573 }
 574 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 575
 576 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 577 {
 578         ++vcpu->stat.pf_guest;
 579         vcpu->arch.exception.nested_apf =
 580                 is_guest_mode(vcpu) && fault->async_page_fault;
 581         if (vcpu->arch.exception.nested_apf) {
 582                 vcpu->arch.apf.nested_apf_token = fault->address;
 583                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 584         } else {
 585                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 586                                         fault->address);
 587         }
 588 }
 589 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 590
 591 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 592 {
 593         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 594                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 595         else
 596                 vcpu->arch.mmu->inject_page_fault(vcpu, fault);
 597
 598         return fault->nested_page_fault;
 599 }
 600
 601 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 602 {
 603         atomic_inc(&vcpu->arch.nmi_queued);
 604         kvm_make_request(KVM_REQ_NMI, vcpu);
 605 }
 606 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 607
 608 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 609 {
 610         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 611 }
 612 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 613
 614 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 615 {
 616         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 617 }
 618 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 619
 620 /*
 621  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 622  * a #GP and return false.
 623  */
 624 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 625 {
 626         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 627                 return true;
 628         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 629         return false;
 630 }
 631 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 632
 633 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 634 {
 635         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 636                 return true;
 637
 638         kvm_queue_exception(vcpu, UD_VECTOR);
 639         return false;
 640 }
 641 EXPORT_SYMBOL_GPL(kvm_require_dr);
 642
 643 /*
 644  * This function will be used to read from the physical memory of the currently
 645  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 646  * can read from guest physical or from the guest's guest physical memory.
 647  */
 648 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 649                             gfn_t ngfn, void *data, int offset, int len,
 650                             u32 access)
 651 {
 652         struct x86_exception exception;
 653         gfn_t real_gfn;
 654         gpa_t ngpa;
 655
 656         ngpa     = gfn_to_gpa(ngfn);
 657         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 658         if (real_gfn == UNMAPPED_GVA)
 659                 return -EFAULT;
 660
 661         real_gfn = gpa_to_gfn(real_gfn);
 662
 663         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 664 }
 665 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 666
 667 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 668                                void *data, int offset, int len, u32 access)
 669 {
 670         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 671                                        data, offset, len, access);
 672 }
 673
 674 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
 675 {
 676         return rsvd_bits(cpuid_maxphyaddr(vcpu), 63) | rsvd_bits(5, 8) |
 677                rsvd_bits(1, 2);
 678 }
 679
 680 /*
 681  * Load the pae pdptrs.  Return 1 if they are all valid, 0 otherwise.
 682  */
 683 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 684 {
 685         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 686         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 687         int i;
 688         int ret;
 689         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 690
 691         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 692                                       offset * sizeof(u64), sizeof(pdpte),
 693                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 694         if (ret < 0) {
 695                 ret = 0;
 696                 goto out;
 697         }
 698         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 699                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 700                     (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
 701                         ret = 0;
 702                         goto out;
 703                 }
 704         }
 705         ret = 1;
 706
 707         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 708         kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
 709
 710 out:
 711
 712         return ret;
 713 }
 714 EXPORT_SYMBOL_GPL(load_pdptrs);
 715
 716 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 717 {
 718         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 719         int offset;
 720         gfn_t gfn;
 721         int r;
 722
 723         if (!is_pae_paging(vcpu))
 724                 return false;
 725
 726         if (!kvm_register_is_available(vcpu, VCPU_EXREG_PDPTR))
 727                 return true;
 728
 729         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 730         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 731         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 732                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 733         if (r < 0)
 734                 return true;
 735
 736         return memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 737 }
 738 EXPORT_SYMBOL_GPL(pdptrs_changed);
 739
 740 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 741 {
 742         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 743         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 744
 745         cr0 |= X86_CR0_ET;
 746
 747 #ifdef CONFIG_X86_64
 748         if (cr0 & 0xffffffff00000000UL)
 749                 return 1;
 750 #endif
 751
 752         cr0 &= ~CR0_RESERVED_BITS;
 753
 754         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 755                 return 1;
 756
 757         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 758                 return 1;
 759
 760         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 761 #ifdef CONFIG_X86_64
 762                 if ((vcpu->arch.efer & EFER_LME)) {
 763                         int cs_db, cs_l;
 764
 765                         if (!is_pae(vcpu))
 766                                 return 1;
 767                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 768                         if (cs_l)
 769                                 return 1;
 770                 } else
 771 #endif
 772                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 773                                                  kvm_read_cr3(vcpu)))
 774                         return 1;
 775         }
 776
 777         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 778                 return 1;
 779
 780         kvm_x86_ops->set_cr0(vcpu, cr0);
 781
 782         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 783                 kvm_clear_async_pf_completion_queue(vcpu);
 784                 kvm_async_pf_hash_reset(vcpu);
 785         }
 786
 787         if ((cr0 ^ old_cr0) & update_bits)
 788                 kvm_mmu_reset_context(vcpu);
 789
 790         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 791             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 792             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 793                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 794
 795         return 0;
 796 }
 797 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 798
 799 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 800 {
 801         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 802 }
 803 EXPORT_SYMBOL_GPL(kvm_lmsw);
 804
 805 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
 806 {
 807         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 808
 809                 if (vcpu->arch.xcr0 != host_xcr0)
 810                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 811
 812                 if (vcpu->arch.xsaves_enabled &&
 813                     vcpu->arch.ia32_xss != host_xss)
 814                         wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
 815         }
 816 }
 817 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
 818
 819 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
 820 {
 821         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 822
 823                 if (vcpu->arch.xcr0 != host_xcr0)
 824                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 825
 826                 if (vcpu->arch.xsaves_enabled &&
 827                     vcpu->arch.ia32_xss != host_xss)
 828                         wrmsrl(MSR_IA32_XSS, host_xss);
 829         }
 830
 831 }
 832 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
 833
 834 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 835 {
 836         u64 xcr0 = xcr;
 837         u64 old_xcr0 = vcpu->arch.xcr0;
 838         u64 valid_bits;
 839
 840         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 841         if (index != XCR_XFEATURE_ENABLED_MASK)
 842                 return 1;
 843         if (!(xcr0 & XFEATURE_MASK_FP))
 844                 return 1;
 845         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 846                 return 1;
 847
 848         /*
 849          * Do not allow the guest to set bits that we do not support
 850          * saving.  However, xcr0 bit 0 is always set, even if the
 851          * emulated CPU does not support XSAVE (see fx_init).
 852          */
 853         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 854         if (xcr0 & ~valid_bits)
 855                 return 1;
 856
 857         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 858             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 859                 return 1;
 860
 861         if (xcr0 & XFEATURE_MASK_AVX512) {
 862                 if (!(xcr0 & XFEATURE_MASK_YMM))
 863                         return 1;
 864                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 865                         return 1;
 866         }
 867         vcpu->arch.xcr0 = xcr0;
 868
 869         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 870                 kvm_update_cpuid(vcpu);
 871         return 0;
 872 }
 873
 874 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 875 {
 876         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 877             __kvm_set_xcr(vcpu, index, xcr)) {
 878                 kvm_inject_gp(vcpu, 0);
 879                 return 1;
 880         }
 881         return 0;
 882 }
 883 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 884
 885 #define __cr4_reserved_bits(__cpu_has, __c)             \
 886 ({                                                      \
 887         u64 __reserved_bits = CR4_RESERVED_BITS;        \
 888                                                         \
 889         if (!__cpu_has(__c, X86_FEATURE_XSAVE))         \
 890                 __reserved_bits |= X86_CR4_OSXSAVE;     \
 891         if (!__cpu_has(__c, X86_FEATURE_SMEP))          \
 892                 __reserved_bits |= X86_CR4_SMEP;        \
 893         if (!__cpu_has(__c, X86_FEATURE_SMAP))          \
 894                 __reserved_bits |= X86_CR4_SMAP;        \
 895         if (!__cpu_has(__c, X86_FEATURE_FSGSBASE))      \
 896                 __reserved_bits |= X86_CR4_FSGSBASE;    \
 897         if (!__cpu_has(__c, X86_FEATURE_PKU))           \
 898                 __reserved_bits |= X86_CR4_PKE;         \
 899         if (!__cpu_has(__c, X86_FEATURE_LA57))          \
 900                 __reserved_bits |= X86_CR4_LA57;        \
 901         __reserved_bits;                                \
 902 })
 903
 904 static u64 kvm_host_cr4_reserved_bits(struct cpuinfo_x86 *c)
 905 {
 906         u64 reserved_bits = __cr4_reserved_bits(cpu_has, c);
 907
 908         if (cpuid_ecx(0x7) & feature_bit(LA57))
 909                 reserved_bits &= ~X86_CR4_LA57;
 910
 911         if (kvm_x86_ops->umip_emulated())
 912                 reserved_bits &= ~X86_CR4_UMIP;
 913
 914         return reserved_bits;
 915 }
 916
 917 static int kvm_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 918 {
 919         if (cr4 & cr4_reserved_bits)
 920                 return -EINVAL;
 921
 922         if (cr4 & __cr4_reserved_bits(guest_cpuid_has, vcpu))
 923                 return -EINVAL;
 924
 925         return 0;
 926 }
 927
 928 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 929 {
 930         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 931         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 932                                    X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
 933
 934         if (kvm_valid_cr4(vcpu, cr4))
 935                 return 1;
 936
 937         if (is_long_mode(vcpu)) {
 938                 if (!(cr4 & X86_CR4_PAE))
 939                         return 1;
 940         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 941                    && ((cr4 ^ old_cr4) & pdptr_bits)
 942                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 943                                    kvm_read_cr3(vcpu)))
 944                 return 1;
 945
 946         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 947                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
 948                         return 1;
 949
 950                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 951                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 952                         return 1;
 953         }
 954
 955         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 956                 return 1;
 957
 958         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 959             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 960                 kvm_mmu_reset_context(vcpu);
 961
 962         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
 963                 kvm_update_cpuid(vcpu);
 964
 965         return 0;
 966 }
 967 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 968
 969 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 970 {
 971         bool skip_tlb_flush = false;
 972 #ifdef CONFIG_X86_64
 973         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
 974
 975         if (pcid_enabled) {
 976                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
 977                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
 978         }
 979 #endif
 980
 981         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 982                 if (!skip_tlb_flush) {
 983                         kvm_mmu_sync_roots(vcpu);
 984                         kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 985                 }
 986                 return 0;
 987         }
 988
 989         if (is_long_mode(vcpu) &&
 990             (cr3 & rsvd_bits(cpuid_maxphyaddr(vcpu), 63)))
 991                 return 1;
 992         else if (is_pae_paging(vcpu) &&
 993                  !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 994                 return 1;
 995
 996         kvm_mmu_new_cr3(vcpu, cr3, skip_tlb_flush);
 997         vcpu->arch.cr3 = cr3;
 998         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
 999
1000         return 0;
1001 }
1002 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1003
1004 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1005 {
1006         if (cr8 & CR8_RESERVED_BITS)
1007                 return 1;
1008         if (lapic_in_kernel(vcpu))
1009                 kvm_lapic_set_tpr(vcpu, cr8);
1010         else
1011                 vcpu->arch.cr8 = cr8;
1012         return 0;
1013 }
1014 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1015
1016 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1017 {
1018         if (lapic_in_kernel(vcpu))
1019                 return kvm_lapic_get_cr8(vcpu);
1020         else
1021                 return vcpu->arch.cr8;
1022 }
1023 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1024
1025 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1026 {
1027         int i;
1028
1029         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1030                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1031                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1032                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
1033         }
1034 }
1035
1036 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
1037 {
1038         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1039                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
1040 }
1041
1042 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
1043 {
1044         unsigned long dr7;
1045
1046         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1047                 dr7 = vcpu->arch.guest_debug_dr7;
1048         else
1049                 dr7 = vcpu->arch.dr7;
1050         kvm_x86_ops->set_dr7(vcpu, dr7);
1051         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1052         if (dr7 & DR7_BP_EN_MASK)
1053                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1054 }
1055
1056 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1057 {
1058         u64 fixed = DR6_FIXED_1;
1059
1060         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1061                 fixed |= DR6_RTM;
1062         return fixed;
1063 }
1064
1065 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1066 {
1067         size_t size = ARRAY_SIZE(vcpu->arch.db);
1068
1069         switch (dr) {
1070         case 0 ... 3:
1071                 vcpu->arch.db[array_index_nospec(dr, size)] = val;
1072                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1073                         vcpu->arch.eff_db[dr] = val;
1074                 break;
1075         case 4:
1076                 /* fall through */
1077         case 6:
1078                 if (val & 0xffffffff00000000ULL)
1079                         return -1; /* #GP */
1080                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1081                 kvm_update_dr6(vcpu);
1082                 break;
1083         case 5:
1084                 /* fall through */
1085         default: /* 7 */
1086                 if (!kvm_dr7_valid(val))
1087                         return -1; /* #GP */
1088                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1089                 kvm_update_dr7(vcpu);
1090                 break;
1091         }
1092
1093         return 0;
1094 }
1095
1096 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1097 {
1098         if (__kvm_set_dr(vcpu, dr, val)) {
1099                 kvm_inject_gp(vcpu, 0);
1100                 return 1;
1101         }
1102         return 0;
1103 }
1104 EXPORT_SYMBOL_GPL(kvm_set_dr);
1105
1106 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1107 {
1108         size_t size = ARRAY_SIZE(vcpu->arch.db);
1109
1110         switch (dr) {
1111         case 0 ... 3:
1112                 *val = vcpu->arch.db[array_index_nospec(dr, size)];
1113                 break;
1114         case 4:
1115                 /* fall through */
1116         case 6:
1117                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1118                         *val = vcpu->arch.dr6;
1119                 else
1120                         *val = kvm_x86_ops->get_dr6(vcpu);
1121                 break;
1122         case 5:
1123                 /* fall through */
1124         default: /* 7 */
1125                 *val = vcpu->arch.dr7;
1126                 break;
1127         }
1128         return 0;
1129 }
1130 EXPORT_SYMBOL_GPL(kvm_get_dr);
1131
1132 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
1133 {
1134         u32 ecx = kvm_rcx_read(vcpu);
1135         u64 data;
1136         int err;
1137
1138         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
1139         if (err)
1140                 return err;
1141         kvm_rax_write(vcpu, (u32)data);
1142         kvm_rdx_write(vcpu, data >> 32);
1143         return err;
1144 }
1145 EXPORT_SYMBOL_GPL(kvm_rdpmc);
1146
1147 /*
1148  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1149  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1150  *
1151  * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1152  * extract the supported MSRs from the related const lists.
1153  * msrs_to_save is selected from the msrs_to_save_all to reflect the
1154  * capabilities of the host cpu. This capabilities test skips MSRs that are
1155  * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1156  * may depend on host virtualization features rather than host cpu features.
1157  */
1158
1159 static const u32 msrs_to_save_all[] = {
1160         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1161         MSR_STAR,
1162 #ifdef CONFIG_X86_64
1163         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1164 #endif
1165         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1166         MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1167         MSR_IA32_SPEC_CTRL,
1168         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1169         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1170         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1171         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1172         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1173         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1174         MSR_IA32_UMWAIT_CONTROL,
1175
1176         MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1177         MSR_ARCH_PERFMON_FIXED_CTR0 + 2, MSR_ARCH_PERFMON_FIXED_CTR0 + 3,
1178         MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1179         MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1180         MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1181         MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1182         MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1183         MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1184         MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1185         MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1186         MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1187         MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1188         MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1189         MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1190         MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1191         MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1192         MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1193         MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1194         MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1195         MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1196         MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1197         MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1198 };
1199
1200 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
1201 static unsigned num_msrs_to_save;
1202
1203 static const u32 emulated_msrs_all[] = {
1204         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1205         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1206         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1207         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1208         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1209         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1210         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1211         HV_X64_MSR_RESET,
1212         HV_X64_MSR_VP_INDEX,
1213         HV_X64_MSR_VP_RUNTIME,
1214         HV_X64_MSR_SCONTROL,
1215         HV_X64_MSR_STIMER0_CONFIG,
1216         HV_X64_MSR_VP_ASSIST_PAGE,
1217         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1218         HV_X64_MSR_TSC_EMULATION_STATUS,
1219
1220         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1221         MSR_KVM_PV_EOI_EN,
1222
1223         MSR_IA32_TSC_ADJUST,
1224         MSR_IA32_TSCDEADLINE,
1225         MSR_IA32_ARCH_CAPABILITIES,
1226         MSR_IA32_MISC_ENABLE,
1227         MSR_IA32_MCG_STATUS,
1228         MSR_IA32_MCG_CTL,
1229         MSR_IA32_MCG_EXT_CTL,
1230         MSR_IA32_SMBASE,
1231         MSR_SMI_COUNT,
1232         MSR_PLATFORM_INFO,
1233         MSR_MISC_FEATURES_ENABLES,
1234         MSR_AMD64_VIRT_SPEC_CTRL,
1235         MSR_IA32_POWER_CTL,
1236         MSR_IA32_UCODE_REV,
1237
1238         /*
1239          * The following list leaves out MSRs whose values are determined
1240          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1241          * We always support the "true" VMX control MSRs, even if the host
1242          * processor does not, so I am putting these registers here rather
1243          * than in msrs_to_save_all.
1244          */
1245         MSR_IA32_VMX_BASIC,
1246         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1247         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1248         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1249         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1250         MSR_IA32_VMX_MISC,
1251         MSR_IA32_VMX_CR0_FIXED0,
1252         MSR_IA32_VMX_CR4_FIXED0,
1253         MSR_IA32_VMX_VMCS_ENUM,
1254         MSR_IA32_VMX_PROCBASED_CTLS2,
1255         MSR_IA32_VMX_EPT_VPID_CAP,
1256         MSR_IA32_VMX_VMFUNC,
1257
1258         MSR_K7_HWCR,
1259         MSR_KVM_POLL_CONTROL,
1260 };
1261
1262 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1263 static unsigned num_emulated_msrs;
1264
1265 /*
1266  * List of msr numbers which are used to expose MSR-based features that
1267  * can be used by a hypervisor to validate requested CPU features.
1268  */
1269 static const u32 msr_based_features_all[] = {
1270         MSR_IA32_VMX_BASIC,
1271         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1272         MSR_IA32_VMX_PINBASED_CTLS,
1273         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1274         MSR_IA32_VMX_PROCBASED_CTLS,
1275         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1276         MSR_IA32_VMX_EXIT_CTLS,
1277         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1278         MSR_IA32_VMX_ENTRY_CTLS,
1279         MSR_IA32_VMX_MISC,
1280         MSR_IA32_VMX_CR0_FIXED0,
1281         MSR_IA32_VMX_CR0_FIXED1,
1282         MSR_IA32_VMX_CR4_FIXED0,
1283         MSR_IA32_VMX_CR4_FIXED1,
1284         MSR_IA32_VMX_VMCS_ENUM,
1285         MSR_IA32_VMX_PROCBASED_CTLS2,
1286         MSR_IA32_VMX_EPT_VPID_CAP,
1287         MSR_IA32_VMX_VMFUNC,
1288
1289         MSR_F10H_DECFG,
1290         MSR_IA32_UCODE_REV,
1291         MSR_IA32_ARCH_CAPABILITIES,
1292 };
1293
1294 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
1295 static unsigned int num_msr_based_features;
1296
1297 static u64 kvm_get_arch_capabilities(void)
1298 {
1299         u64 data = 0;
1300
1301         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1302                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1303
1304         /*
1305          * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1306          * the nested hypervisor runs with NX huge pages.  If it is not,
1307          * L1 is anyway vulnerable to ITLB_MULTIHIT explots from other
1308          * L1 guests, so it need not worry about its own (L2) guests.
1309          */
1310         data |= ARCH_CAP_PSCHANGE_MC_NO;
1311
1312         /*
1313          * If we're doing cache flushes (either "always" or "cond")
1314          * we will do one whenever the guest does a vmlaunch/vmresume.
1315          * If an outer hypervisor is doing the cache flush for us
1316          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1317          * capability to the guest too, and if EPT is disabled we're not
1318          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1319          * require a nested hypervisor to do a flush of its own.
1320          */
1321         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1322                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1323
1324         if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1325                 data |= ARCH_CAP_RDCL_NO;
1326         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1327                 data |= ARCH_CAP_SSB_NO;
1328         if (!boot_cpu_has_bug(X86_BUG_MDS))
1329                 data |= ARCH_CAP_MDS_NO;
1330
1331         /*
1332          * On TAA affected systems:
1333          *      - nothing to do if TSX is disabled on the host.
1334          *      - we emulate TSX_CTRL if present on the host.
1335          *        This lets the guest use VERW to clear CPU buffers.
1336          */
1337         if (!boot_cpu_has(X86_FEATURE_RTM))
1338                 data &= ~(ARCH_CAP_TAA_NO | ARCH_CAP_TSX_CTRL_MSR);
1339         else if (!boot_cpu_has_bug(X86_BUG_TAA))
1340                 data |= ARCH_CAP_TAA_NO;
1341
1342         return data;
1343 }
1344
1345 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1346 {
1347         switch (msr->index) {
1348         case MSR_IA32_ARCH_CAPABILITIES:
1349                 msr->data = kvm_get_arch_capabilities();
1350                 break;
1351         case MSR_IA32_UCODE_REV:
1352                 rdmsrl_safe(msr->index, &msr->data);
1353                 break;
1354         default:
1355                 if (kvm_x86_ops->get_msr_feature(msr))
1356                         return 1;
1357         }
1358         return 0;
1359 }
1360
1361 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1362 {
1363         struct kvm_msr_entry msr;
1364         int r;
1365
1366         msr.index = index;
1367         r = kvm_get_msr_feature(&msr);
1368         if (r)
1369                 return r;
1370
1371         *data = msr.data;
1372
1373         return 0;
1374 }
1375
1376 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1377 {
1378         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1379                 return false;
1380
1381         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1382                 return false;
1383
1384         if (efer & (EFER_LME | EFER_LMA) &&
1385             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1386                 return false;
1387
1388         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1389                 return false;
1390
1391         return true;
1392
1393 }
1394 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1395 {
1396         if (efer & efer_reserved_bits)
1397                 return false;
1398
1399         return __kvm_valid_efer(vcpu, efer);
1400 }
1401 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1402
1403 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1404 {
1405         u64 old_efer = vcpu->arch.efer;
1406         u64 efer = msr_info->data;
1407
1408         if (efer & efer_reserved_bits)
1409                 return 1;
1410
1411         if (!msr_info->host_initiated) {
1412                 if (!__kvm_valid_efer(vcpu, efer))
1413                         return 1;
1414
1415                 if (is_paging(vcpu) &&
1416                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1417                         return 1;
1418         }
1419
1420         efer &= ~EFER_LMA;
1421         efer |= vcpu->arch.efer & EFER_LMA;
1422
1423         kvm_x86_ops->set_efer(vcpu, efer);
1424
1425         /* Update reserved bits */
1426         if ((efer ^ old_efer) & EFER_NX)
1427                 kvm_mmu_reset_context(vcpu);
1428
1429         return 0;
1430 }
1431
1432 void kvm_enable_efer_bits(u64 mask)
1433 {
1434        efer_reserved_bits &= ~mask;
1435 }
1436 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1437
1438 /*
1439  * Write @data into the MSR specified by @index.  Select MSR specific fault
1440  * checks are bypassed if @host_initiated is %true.
1441  * Returns 0 on success, non-0 otherwise.
1442  * Assumes vcpu_load() was already called.
1443  */
1444 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1445                          bool host_initiated)
1446 {
1447         struct msr_data msr;
1448
1449         switch (index) {
1450         case MSR_FS_BASE:
1451         case MSR_GS_BASE:
1452         case MSR_KERNEL_GS_BASE:
1453         case MSR_CSTAR:
1454         case MSR_LSTAR:
1455                 if (is_noncanonical_address(data, vcpu))
1456                         return 1;
1457                 break;
1458         case MSR_IA32_SYSENTER_EIP:
1459         case MSR_IA32_SYSENTER_ESP:
1460                 /*
1461                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1462                  * non-canonical address is written on Intel but not on
1463                  * AMD (which ignores the top 32-bits, because it does
1464                  * not implement 64-bit SYSENTER).
1465                  *
1466                  * 64-bit code should hence be able to write a non-canonical
1467                  * value on AMD.  Making the address canonical ensures that
1468                  * vmentry does not fail on Intel after writing a non-canonical
1469                  * value, and that something deterministic happens if the guest
1470                  * invokes 64-bit SYSENTER.
1471                  */
1472                 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1473         }
1474
1475         msr.data = data;
1476         msr.index = index;
1477         msr.host_initiated = host_initiated;
1478
1479         return kvm_x86_ops->set_msr(vcpu, &msr);
1480 }
1481
1482 /*
1483  * Read the MSR specified by @index into @data.  Select MSR specific fault
1484  * checks are bypassed if @host_initiated is %true.
1485  * Returns 0 on success, non-0 otherwise.
1486  * Assumes vcpu_load() was already called.
1487  */
1488 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1489                   bool host_initiated)
1490 {
1491         struct msr_data msr;
1492         int ret;
1493
1494         msr.index = index;
1495         msr.host_initiated = host_initiated;
1496
1497         ret = kvm_x86_ops->get_msr(vcpu, &msr);
1498         if (!ret)
1499                 *data = msr.data;
1500         return ret;
1501 }
1502
1503 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1504 {
1505         return __kvm_get_msr(vcpu, index, data, false);
1506 }
1507 EXPORT_SYMBOL_GPL(kvm_get_msr);
1508
1509 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1510 {
1511         return __kvm_set_msr(vcpu, index, data, false);
1512 }
1513 EXPORT_SYMBOL_GPL(kvm_set_msr);
1514
1515 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1516 {
1517         u32 ecx = kvm_rcx_read(vcpu);
1518         u64 data;
1519
1520         if (kvm_get_msr(vcpu, ecx, &data)) {
1521                 trace_kvm_msr_read_ex(ecx);
1522                 kvm_inject_gp(vcpu, 0);
1523                 return 1;
1524         }
1525
1526         trace_kvm_msr_read(ecx, data);
1527
1528         kvm_rax_write(vcpu, data & -1u);
1529         kvm_rdx_write(vcpu, (data >> 32) & -1u);
1530         return kvm_skip_emulated_instruction(vcpu);
1531 }
1532 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1533
1534 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1535 {
1536         u32 ecx = kvm_rcx_read(vcpu);
1537         u64 data = kvm_read_edx_eax(vcpu);
1538
1539         if (kvm_set_msr(vcpu, ecx, data)) {
1540                 trace_kvm_msr_write_ex(ecx, data);
1541                 kvm_inject_gp(vcpu, 0);
1542                 return 1;
1543         }
1544
1545         trace_kvm_msr_write(ecx, data);
1546         return kvm_skip_emulated_instruction(vcpu);
1547 }
1548 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1549
1550 /*
1551  * The fast path for frequent and performance sensitive wrmsr emulation,
1552  * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
1553  * the latency of virtual IPI by avoiding the expensive bits of transitioning
1554  * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
1555  * other cases which must be called after interrupts are enabled on the host.
1556  */
1557 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
1558 {
1559         if (lapic_in_kernel(vcpu) && apic_x2apic_mode(vcpu->arch.apic) &&
1560                 ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
1561                 ((data & APIC_MODE_MASK) == APIC_DM_FIXED)) {
1562
1563                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR2, (u32)(data >> 32));
1564                 return kvm_lapic_reg_write(vcpu->arch.apic, APIC_ICR, (u32)data);
1565         }
1566
1567         return 1;
1568 }
1569
1570 enum exit_fastpath_completion handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
1571 {
1572         u32 msr = kvm_rcx_read(vcpu);
1573         u64 data = kvm_read_edx_eax(vcpu);
1574         int ret = 0;
1575
1576         switch (msr) {
1577         case APIC_BASE_MSR + (APIC_ICR >> 4):
1578                 ret = handle_fastpath_set_x2apic_icr_irqoff(vcpu, data);
1579                 break;
1580         default:
1581                 return EXIT_FASTPATH_NONE;
1582         }
1583
1584         if (!ret) {
1585                 trace_kvm_msr_write(msr, data);
1586                 return EXIT_FASTPATH_SKIP_EMUL_INS;
1587         }
1588
1589         return EXIT_FASTPATH_NONE;
1590 }
1591 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
1592
1593 /*
1594  * Adapt set_msr() to msr_io()'s calling convention
1595  */
1596 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1597 {
1598         return __kvm_get_msr(vcpu, index, data, true);
1599 }
1600
1601 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1602 {
1603         return __kvm_set_msr(vcpu, index, *data, true);
1604 }
1605
1606 #ifdef CONFIG_X86_64
1607 struct pvclock_clock {
1608         int vclock_mode;
1609         u64 cycle_last;
1610         u64 mask;
1611         u32 mult;
1612         u32 shift;
1613 };
1614
1615 struct pvclock_gtod_data {
1616         seqcount_t      seq;
1617
1618         struct pvclock_clock clock; /* extract of a clocksource struct */
1619         struct pvclock_clock raw_clock; /* extract of a clocksource struct */
1620
1621         u64             boot_ns_raw;
1622         u64             boot_ns;
1623         u64             nsec_base;
1624         u64             wall_time_sec;
1625         u64             monotonic_raw_nsec;
1626 };
1627
1628 static struct pvclock_gtod_data pvclock_gtod_data;
1629
1630 static void update_pvclock_gtod(struct timekeeper *tk)
1631 {
1632         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1633         u64 boot_ns, boot_ns_raw;
1634
1635         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1636         boot_ns_raw = ktime_to_ns(ktime_add(tk->tkr_raw.base, tk->offs_boot));
1637
1638         write_seqcount_begin(&vdata->seq);
1639
1640         /* copy pvclock gtod data */
1641         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1642         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1643         vdata->clock.mask               = tk->tkr_mono.mask;
1644         vdata->clock.mult               = tk->tkr_mono.mult;
1645         vdata->clock.shift              = tk->tkr_mono.shift;
1646
1647         vdata->raw_clock.vclock_mode    = tk->tkr_raw.clock->archdata.vclock_mode;
1648         vdata->raw_clock.cycle_last     = tk->tkr_raw.cycle_last;
1649         vdata->raw_clock.mask           = tk->tkr_raw.mask;
1650         vdata->raw_clock.mult           = tk->tkr_raw.mult;
1651         vdata->raw_clock.shift          = tk->tkr_raw.shift;
1652
1653         vdata->boot_ns                  = boot_ns;
1654         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1655
1656         vdata->wall_time_sec            = tk->xtime_sec;
1657
1658         vdata->boot_ns_raw              = boot_ns_raw;
1659         vdata->monotonic_raw_nsec       = tk->tkr_raw.xtime_nsec;
1660
1661         write_seqcount_end(&vdata->seq);
1662 }
1663 #endif
1664
1665 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1666 {
1667         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1668         kvm_vcpu_kick(vcpu);
1669 }
1670
1671 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1672 {
1673         int version;
1674         int r;
1675         struct pvclock_wall_clock wc;
1676         struct timespec64 boot;
1677
1678         if (!wall_clock)
1679                 return;
1680
1681         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1682         if (r)
1683                 return;
1684
1685         if (version & 1)
1686                 ++version;  /* first time write, random junk */
1687
1688         ++version;
1689
1690         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1691                 return;
1692
1693         /*
1694          * The guest calculates current wall clock time by adding
1695          * system time (updated by kvm_guest_time_update below) to the
1696          * wall clock specified here.  guest system time equals host
1697          * system time for us, thus we must fill in host boot time here.
1698          */
1699         getboottime64(&boot);
1700
1701         if (kvm->arch.kvmclock_offset) {
1702                 struct timespec64 ts = ns_to_timespec64(kvm->arch.kvmclock_offset);
1703                 boot = timespec64_sub(boot, ts);
1704         }
1705         wc.sec = (u32)boot.tv_sec; /* overflow in 2106 guest time */
1706         wc.nsec = boot.tv_nsec;
1707         wc.version = version;
1708
1709         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1710
1711         version++;
1712         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1713 }
1714
1715 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1716 {
1717         do_shl32_div32(dividend, divisor);
1718         return dividend;
1719 }
1720
1721 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1722                                s8 *pshift, u32 *pmultiplier)
1723 {
1724         uint64_t scaled64;
1725         int32_t  shift = 0;
1726         uint64_t tps64;
1727         uint32_t tps32;
1728
1729         tps64 = base_hz;
1730         scaled64 = scaled_hz;
1731         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1732                 tps64 >>= 1;
1733                 shift--;
1734         }
1735
1736         tps32 = (uint32_t)tps64;
1737         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1738                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1739                         scaled64 >>= 1;
1740                 else
1741                         tps32 <<= 1;
1742                 shift++;
1743         }
1744
1745         *pshift = shift;
1746         *pmultiplier = div_frac(scaled64, tps32);
1747 }
1748
1749 #ifdef CONFIG_X86_64
1750 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1751 #endif
1752
1753 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1754 static unsigned long max_tsc_khz;
1755
1756 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1757 {
1758         u64 v = (u64)khz * (1000000 + ppm);
1759         do_div(v, 1000000);
1760         return v;
1761 }
1762
1763 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1764 {
1765         u64 ratio;
1766
1767         /* Guest TSC same frequency as host TSC? */
1768         if (!scale) {
1769                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1770                 return 0;
1771         }
1772
1773         /* TSC scaling supported? */
1774         if (!kvm_has_tsc_control) {
1775                 if (user_tsc_khz > tsc_khz) {
1776                         vcpu->arch.tsc_catchup = 1;
1777                         vcpu->arch.tsc_always_catchup = 1;
1778                         return 0;
1779                 } else {
1780                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
1781                         return -1;
1782                 }
1783         }
1784
1785         /* TSC scaling required  - calculate ratio */
1786         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1787                                 user_tsc_khz, tsc_khz);
1788
1789         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1790                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1791                                     user_tsc_khz);
1792                 return -1;
1793         }
1794
1795         vcpu->arch.tsc_scaling_ratio = ratio;
1796         return 0;
1797 }
1798
1799 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1800 {
1801         u32 thresh_lo, thresh_hi;
1802         int use_scaling = 0;
1803
1804         /* tsc_khz can be zero if TSC calibration fails */
1805         if (user_tsc_khz == 0) {
1806                 /* set tsc_scaling_ratio to a safe value */
1807                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1808                 return -1;
1809         }
1810
1811         /* Compute a scale to convert nanoseconds in TSC cycles */
1812         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
1813                            &vcpu->arch.virtual_tsc_shift,
1814                            &vcpu->arch.virtual_tsc_mult);
1815         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
1816
1817         /*
1818          * Compute the variation in TSC rate which is acceptable
1819          * within the range of tolerance and decide if the
1820          * rate being applied is within that bounds of the hardware
1821          * rate.  If so, no scaling or compensation need be done.
1822          */
1823         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1824         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1825         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
1826                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
1827                 use_scaling = 1;
1828         }
1829         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
1830 }
1831
1832 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1833 {
1834         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1835                                       vcpu->arch.virtual_tsc_mult,
1836                                       vcpu->arch.virtual_tsc_shift);
1837         tsc += vcpu->arch.this_tsc_write;
1838         return tsc;
1839 }
1840
1841 static inline int gtod_is_based_on_tsc(int mode)
1842 {
1843         return mode == VCLOCK_TSC || mode == VCLOCK_HVCLOCK;
1844 }
1845
1846 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1847 {
1848 #ifdef CONFIG_X86_64
1849         bool vcpus_matched;
1850         struct kvm_arch *ka = &vcpu->kvm->arch;
1851         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1852
1853         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1854                          atomic_read(&vcpu->kvm->online_vcpus));
1855
1856         /*
1857          * Once the masterclock is enabled, always perform request in
1858          * order to update it.
1859          *
1860          * In order to enable masterclock, the host clocksource must be TSC
1861          * and the vcpus need to have matched TSCs.  When that happens,
1862          * perform request to enable masterclock.
1863          */
1864         if (ka->use_master_clock ||
1865             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
1866                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1867
1868         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1869                             atomic_read(&vcpu->kvm->online_vcpus),
1870                             ka->use_master_clock, gtod->clock.vclock_mode);
1871 #endif
1872 }
1873
1874 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1875 {
1876         u64 curr_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1877         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1878 }
1879
1880 /*
1881  * Multiply tsc by a fixed point number represented by ratio.
1882  *
1883  * The most significant 64-N bits (mult) of ratio represent the
1884  * integral part of the fixed point number; the remaining N bits
1885  * (frac) represent the fractional part, ie. ratio represents a fixed
1886  * point number (mult + frac * 2^(-N)).
1887  *
1888  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1889  */
1890 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1891 {
1892         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1893 }
1894
1895 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1896 {
1897         u64 _tsc = tsc;
1898         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1899
1900         if (ratio != kvm_default_tsc_scaling_ratio)
1901                 _tsc = __scale_tsc(ratio, tsc);
1902
1903         return _tsc;
1904 }
1905 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1906
1907 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1908 {
1909         u64 tsc;
1910
1911         tsc = kvm_scale_tsc(vcpu, rdtsc());
1912
1913         return target_tsc - tsc;
1914 }
1915
1916 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1917 {
1918         u64 tsc_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1919
1920         return tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
1921 }
1922 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1923
1924 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
1925 {
1926         vcpu->arch.tsc_offset = kvm_x86_ops->write_l1_tsc_offset(vcpu, offset);
1927 }
1928
1929 static inline bool kvm_check_tsc_unstable(void)
1930 {
1931 #ifdef CONFIG_X86_64
1932         /*
1933          * TSC is marked unstable when we're running on Hyper-V,
1934          * 'TSC page' clocksource is good.
1935          */
1936         if (pvclock_gtod_data.clock.vclock_mode == VCLOCK_HVCLOCK)
1937                 return false;
1938 #endif
1939         return check_tsc_unstable();
1940 }
1941
1942 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1943 {
1944         struct kvm *kvm = vcpu->kvm;
1945         u64 offset, ns, elapsed;
1946         unsigned long flags;
1947         bool matched;
1948         bool already_matched;
1949         u64 data = msr->data;
1950         bool synchronizing = false;
1951
1952         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1953         offset = kvm_compute_tsc_offset(vcpu, data);
1954         ns = ktime_get_boottime_ns();
1955         elapsed = ns - kvm->arch.last_tsc_nsec;
1956
1957         if (vcpu->arch.virtual_tsc_khz) {
1958                 if (data == 0 && msr->host_initiated) {
1959                         /*
1960                          * detection of vcpu initialization -- need to sync
1961                          * with other vCPUs. This particularly helps to keep
1962                          * kvm_clock stable after CPU hotplug
1963                          */
1964                         synchronizing = true;
1965                 } else {
1966                         u64 tsc_exp = kvm->arch.last_tsc_write +
1967                                                 nsec_to_cycles(vcpu, elapsed);
1968                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
1969                         /*
1970                          * Special case: TSC write with a small delta (1 second)
1971                          * of virtual cycle time against real time is
1972                          * interpreted as an attempt to synchronize the CPU.
1973                          */
1974                         synchronizing = data < tsc_exp + tsc_hz &&
1975                                         data + tsc_hz > tsc_exp;
1976                 }
1977         }
1978
1979         /*
1980          * For a reliable TSC, we can match TSC offsets, and for an unstable
1981          * TSC, we add elapsed time in this computation.  We could let the
1982          * compensation code attempt to catch up if we fall behind, but
1983          * it's better to try to match offsets from the beginning.
1984          */
1985         if (synchronizing &&
1986             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1987                 if (!kvm_check_tsc_unstable()) {
1988                         offset = kvm->arch.cur_tsc_offset;
1989                 } else {
1990                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1991                         data += delta;
1992                         offset = kvm_compute_tsc_offset(vcpu, data);
1993                 }
1994                 matched = true;
1995                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1996         } else {
1997                 /*
1998                  * We split periods of matched TSC writes into generations.
1999                  * For each generation, we track the original measured
2000                  * nanosecond time, offset, and write, so if TSCs are in
2001                  * sync, we can match exact offset, and if not, we can match
2002                  * exact software computation in compute_guest_tsc()
2003                  *
2004                  * These values are tracked in kvm->arch.cur_xxx variables.
2005                  */
2006                 kvm->arch.cur_tsc_generation++;
2007                 kvm->arch.cur_tsc_nsec = ns;
2008                 kvm->arch.cur_tsc_write = data;
2009                 kvm->arch.cur_tsc_offset = offset;
2010                 matched = false;
2011         }
2012
2013         /*
2014          * We also track th most recent recorded KHZ, write and time to
2015          * allow the matching interval to be extended at each write.
2016          */
2017         kvm->arch.last_tsc_nsec = ns;
2018         kvm->arch.last_tsc_write = data;
2019         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2020
2021         vcpu->arch.last_guest_tsc = data;
2022
2023         /* Keep track of which generation this VCPU has synchronized to */
2024         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2025         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2026         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2027
2028         if (!msr->host_initiated && guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST))
2029                 update_ia32_tsc_adjust_msr(vcpu, offset);
2030
2031         kvm_vcpu_write_tsc_offset(vcpu, offset);
2032         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2033
2034         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
2035         if (!matched) {
2036                 kvm->arch.nr_vcpus_matched_tsc = 0;
2037         } else if (!already_matched) {
2038                 kvm->arch.nr_vcpus_matched_tsc++;
2039         }
2040
2041         kvm_track_tsc_matching(vcpu);
2042         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
2043 }
2044
2045 EXPORT_SYMBOL_GPL(kvm_write_tsc);
2046
2047 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2048                                            s64 adjustment)
2049 {
2050         u64 tsc_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
2051         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2052 }
2053
2054 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2055 {
2056         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
2057                 WARN_ON(adjustment < 0);
2058         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
2059         adjust_tsc_offset_guest(vcpu, adjustment);
2060 }
2061
2062 #ifdef CONFIG_X86_64
2063
2064 static u64 read_tsc(void)
2065 {
2066         u64 ret = (u64)rdtsc_ordered();
2067         u64 last = pvclock_gtod_data.clock.cycle_last;
2068
2069         if (likely(ret >= last))
2070                 return ret;
2071
2072         /*
2073          * GCC likes to generate cmov here, but this branch is extremely
2074          * predictable (it's just a function of time and the likely is
2075          * very likely) and there's a data dependence, so force GCC
2076          * to generate a branch instead.  I don't barrier() because
2077          * we don't actually need a barrier, and if this function
2078          * ever gets inlined it will generate worse code.
2079          */
2080         asm volatile ("");
2081         return last;
2082 }
2083
2084 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2085                           int *mode)
2086 {
2087         long v;
2088         u64 tsc_pg_val;
2089
2090         switch (clock->vclock_mode) {
2091         case VCLOCK_HVCLOCK:
2092                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2093                                                   tsc_timestamp);
2094                 if (tsc_pg_val != U64_MAX) {
2095                         /* TSC page valid */
2096                         *mode = VCLOCK_HVCLOCK;
2097                         v = (tsc_pg_val - clock->cycle_last) &
2098                                 clock->mask;
2099                 } else {
2100                         /* TSC page invalid */
2101                         *mode = VCLOCK_NONE;
2102                 }
2103                 break;
2104         case VCLOCK_TSC:
2105                 *mode = VCLOCK_TSC;
2106                 *tsc_timestamp = read_tsc();
2107                 v = (*tsc_timestamp - clock->cycle_last) &
2108                         clock->mask;
2109                 break;
2110         default:
2111                 *mode = VCLOCK_NONE;
2112         }
2113
2114         if (*mode == VCLOCK_NONE)
2115                 *tsc_timestamp = v = 0;
2116
2117         return v * clock->mult;
2118 }
2119
2120 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2121 {
2122         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2123         unsigned long seq;
2124         int mode;
2125         u64 ns;
2126
2127         do {
2128                 seq = read_seqcount_begin(&gtod->seq);
2129                 ns = gtod->monotonic_raw_nsec;
2130                 ns += vgettsc(&gtod->raw_clock, tsc_timestamp, &mode);
2131                 ns >>= gtod->clock.shift;
2132                 ns += gtod->boot_ns_raw;
2133         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2134         *t = ns;
2135
2136         return mode;
2137 }
2138
2139 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2140 {
2141         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2142         unsigned long seq;
2143         int mode;
2144         u64 ns;
2145
2146         do {
2147                 seq = read_seqcount_begin(&gtod->seq);
2148                 ts->tv_sec = gtod->wall_time_sec;
2149                 ns = gtod->nsec_base;
2150                 ns += vgettsc(&gtod->clock, tsc_timestamp, &mode);
2151                 ns >>= gtod->clock.shift;
2152         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2153
2154         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2155         ts->tv_nsec = ns;
2156
2157         return mode;
2158 }
2159
2160 /* returns true if host is using TSC based clocksource */
2161 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2162 {
2163         /* checked again under seqlock below */
2164         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2165                 return false;
2166
2167         return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2168                                                       tsc_timestamp));
2169 }
2170
2171 /* returns true if host is using TSC based clocksource */
2172 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2173                                            u64 *tsc_timestamp)
2174 {
2175         /* checked again under seqlock below */
2176         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2177                 return false;
2178
2179         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2180 }
2181 #endif
2182
2183 /*
2184  *
2185  * Assuming a stable TSC across physical CPUS, and a stable TSC
2186  * across virtual CPUs, the following condition is possible.
2187  * Each numbered line represents an event visible to both
2188  * CPUs at the next numbered event.
2189  *
2190  * "timespecX" represents host monotonic time. "tscX" represents
2191  * RDTSC value.
2192  *
2193  *              VCPU0 on CPU0           |       VCPU1 on CPU1
2194  *
2195  * 1.  read timespec0,tsc0
2196  * 2.                                   | timespec1 = timespec0 + N
2197  *                                      | tsc1 = tsc0 + M
2198  * 3. transition to guest               | transition to guest
2199  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2200  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2201  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2202  *
2203  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2204  *
2205  *      - ret0 < ret1
2206  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2207  *              ...
2208  *      - 0 < N - M => M < N
2209  *
2210  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2211  * always the case (the difference between two distinct xtime instances
2212  * might be smaller then the difference between corresponding TSC reads,
2213  * when updating guest vcpus pvclock areas).
2214  *
2215  * To avoid that problem, do not allow visibility of distinct
2216  * system_timestamp/tsc_timestamp values simultaneously: use a master
2217  * copy of host monotonic time values. Update that master copy
2218  * in lockstep.
2219  *
2220  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2221  *
2222  */
2223
2224 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2225 {
2226 #ifdef CONFIG_X86_64
2227         struct kvm_arch *ka = &kvm->arch;
2228         int vclock_mode;
2229         bool host_tsc_clocksource, vcpus_matched;
2230
2231         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2232                         atomic_read(&kvm->online_vcpus));
2233
2234         /*
2235          * If the host uses TSC clock, then passthrough TSC as stable
2236          * to the guest.
2237          */
2238         host_tsc_clocksource = kvm_get_time_and_clockread(
2239                                         &ka->master_kernel_ns,
2240                                         &ka->master_cycle_now);
2241
2242         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2243                                 && !ka->backwards_tsc_observed
2244                                 && !ka->boot_vcpu_runs_old_kvmclock;
2245
2246         if (ka->use_master_clock)
2247                 atomic_set(&kvm_guest_has_master_clock, 1);
2248
2249         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2250         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2251                                         vcpus_matched);
2252 #endif
2253 }
2254
2255 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2256 {
2257         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2258 }
2259
2260 static void kvm_gen_update_masterclock(struct kvm *kvm)
2261 {
2262 #ifdef CONFIG_X86_64
2263         int i;
2264         struct kvm_vcpu *vcpu;
2265         struct kvm_arch *ka = &kvm->arch;
2266
2267         spin_lock(&ka->pvclock_gtod_sync_lock);
2268         kvm_make_mclock_inprogress_request(kvm);
2269         /* no guest entries from this point */
2270         pvclock_update_vm_gtod_copy(kvm);
2271
2272         kvm_for_each_vcpu(i, vcpu, kvm)
2273                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2274
2275         /* guest entries allowed */
2276         kvm_for_each_vcpu(i, vcpu, kvm)
2277                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2278
2279         spin_unlock(&ka->pvclock_gtod_sync_lock);
2280 #endif
2281 }
2282
2283 u64 get_kvmclock_ns(struct kvm *kvm)
2284 {
2285         struct kvm_arch *ka = &kvm->arch;
2286         struct pvclock_vcpu_time_info hv_clock;
2287         u64 ret;
2288
2289         spin_lock(&ka->pvclock_gtod_sync_lock);
2290         if (!ka->use_master_clock) {
2291                 spin_unlock(&ka->pvclock_gtod_sync_lock);
2292                 return ktime_get_boottime_ns() + ka->kvmclock_offset;
2293         }
2294
2295         hv_clock.tsc_timestamp = ka->master_cycle_now;
2296         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2297         spin_unlock(&ka->pvclock_gtod_sync_lock);
2298
2299         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2300         get_cpu();
2301
2302         if (__this_cpu_read(cpu_tsc_khz)) {
2303                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2304                                    &hv_clock.tsc_shift,
2305                                    &hv_clock.tsc_to_system_mul);
2306                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2307         } else
2308                 ret = ktime_get_boottime_ns() + ka->kvmclock_offset;
2309
2310         put_cpu();
2311
2312         return ret;
2313 }
2314
2315 static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
2316 {
2317         struct kvm_vcpu_arch *vcpu = &v->arch;
2318         struct pvclock_vcpu_time_info guest_hv_clock;
2319
2320         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
2321                 &guest_hv_clock, sizeof(guest_hv_clock))))
2322                 return;
2323
2324         /* This VCPU is paused, but it's legal for a guest to read another
2325          * VCPU's kvmclock, so we really have to follow the specification where
2326          * it says that version is odd if data is being modified, and even after
2327          * it is consistent.
2328          *
2329          * Version field updates must be kept separate.  This is because
2330          * kvm_write_guest_cached might use a "rep movs" instruction, and
2331          * writes within a string instruction are weakly ordered.  So there
2332          * are three writes overall.
2333          *
2334          * As a small optimization, only write the version field in the first
2335          * and third write.  The vcpu->pv_time cache is still valid, because the
2336          * version field is the first in the struct.
2337          */
2338         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2339
2340         if (guest_hv_clock.version & 1)
2341                 ++guest_hv_clock.version;  /* first time write, random junk */
2342
2343         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2344         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2345                                 &vcpu->hv_clock,
2346                                 sizeof(vcpu->hv_clock.version));
2347
2348         smp_wmb();
2349
2350         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2351         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2352
2353         if (vcpu->pvclock_set_guest_stopped_request) {
2354                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2355                 vcpu->pvclock_set_guest_stopped_request = false;
2356         }
2357
2358         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2359
2360         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2361                                 &vcpu->hv_clock,
2362                                 sizeof(vcpu->hv_clock));
2363
2364         smp_wmb();
2365
2366         vcpu->hv_clock.version++;
2367         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2368                                 &vcpu->hv_clock,
2369                                 sizeof(vcpu->hv_clock.version));
2370 }
2371
2372 static int kvm_guest_time_update(struct kvm_vcpu *v)
2373 {
2374         unsigned long flags, tgt_tsc_khz;
2375         struct kvm_vcpu_arch *vcpu = &v->arch;
2376         struct kvm_arch *ka = &v->kvm->arch;
2377         s64 kernel_ns;
2378         u64 tsc_timestamp, host_tsc;
2379         u8 pvclock_flags;
2380         bool use_master_clock;
2381
2382         kernel_ns = 0;
2383         host_tsc = 0;
2384
2385         /*
2386          * If the host uses TSC clock, then passthrough TSC as stable
2387          * to the guest.
2388          */
2389         spin_lock(&ka->pvclock_gtod_sync_lock);
2390         use_master_clock = ka->use_master_clock;
2391         if (use_master_clock) {
2392                 host_tsc = ka->master_cycle_now;
2393                 kernel_ns = ka->master_kernel_ns;
2394         }
2395         spin_unlock(&ka->pvclock_gtod_sync_lock);
2396
2397         /* Keep irq disabled to prevent changes to the clock */
2398         local_irq_save(flags);
2399         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2400         if (unlikely(tgt_tsc_khz == 0)) {
2401                 local_irq_restore(flags);
2402                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2403                 return 1;
2404         }
2405         if (!use_master_clock) {
2406                 host_tsc = rdtsc();
2407                 kernel_ns = ktime_get_boottime_ns();
2408         }
2409
2410         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2411
2412         /*
2413          * We may have to catch up the TSC to match elapsed wall clock
2414          * time for two reasons, even if kvmclock is used.
2415          *   1) CPU could have been running below the maximum TSC rate
2416          *   2) Broken TSC compensation resets the base at each VCPU
2417          *      entry to avoid unknown leaps of TSC even when running
2418          *      again on the same CPU.  This may cause apparent elapsed
2419          *      time to disappear, and the guest to stand still or run
2420          *      very slowly.
2421          */
2422         if (vcpu->tsc_catchup) {
2423                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2424                 if (tsc > tsc_timestamp) {
2425                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2426                         tsc_timestamp = tsc;
2427                 }
2428         }
2429
2430         local_irq_restore(flags);
2431
2432         /* With all the info we got, fill in the values */
2433
2434         if (kvm_has_tsc_control)
2435                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
2436
2437         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2438                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2439                                    &vcpu->hv_clock.tsc_shift,
2440                                    &vcpu->hv_clock.tsc_to_system_mul);
2441                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2442         }
2443
2444         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2445         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2446         vcpu->last_guest_tsc = tsc_timestamp;
2447
2448         /* If the host uses TSC clocksource, then it is stable */
2449         pvclock_flags = 0;
2450         if (use_master_clock)
2451                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2452
2453         vcpu->hv_clock.flags = pvclock_flags;
2454
2455         if (vcpu->pv_time_enabled)
2456                 kvm_setup_pvclock_page(v);
2457         if (v == kvm_get_vcpu(v->kvm, 0))
2458                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2459         return 0;
2460 }
2461
2462 /*
2463  * kvmclock updates which are isolated to a given vcpu, such as
2464  * vcpu->cpu migration, should not allow system_timestamp from
2465  * the rest of the vcpus to remain static. Otherwise ntp frequency
2466  * correction applies to one vcpu's system_timestamp but not
2467  * the others.
2468  *
2469  * So in those cases, request a kvmclock update for all vcpus.
2470  * We need to rate-limit these requests though, as they can
2471  * considerably slow guests that have a large number of vcpus.
2472  * The time for a remote vcpu to update its kvmclock is bound
2473  * by the delay we use to rate-limit the updates.
2474  */
2475
2476 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2477
2478 static void kvmclock_update_fn(struct work_struct *work)
2479 {
2480         int i;
2481         struct delayed_work *dwork = to_delayed_work(work);
2482         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2483                                            kvmclock_update_work);
2484         struct kvm *kvm = container_of(ka, struct kvm, arch);
2485         struct kvm_vcpu *vcpu;
2486
2487         kvm_for_each_vcpu(i, vcpu, kvm) {
2488                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2489                 kvm_vcpu_kick(vcpu);
2490         }
2491 }
2492
2493 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2494 {
2495         struct kvm *kvm = v->kvm;
2496
2497         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2498         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2499                                         KVMCLOCK_UPDATE_DELAY);
2500 }
2501
2502 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2503
2504 static void kvmclock_sync_fn(struct work_struct *work)
2505 {
2506         struct delayed_work *dwork = to_delayed_work(work);
2507         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2508                                            kvmclock_sync_work);
2509         struct kvm *kvm = container_of(ka, struct kvm, arch);
2510
2511         if (!kvmclock_periodic_sync)
2512                 return;
2513
2514         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2515         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2516                                         KVMCLOCK_SYNC_PERIOD);
2517 }
2518
2519 /*
2520  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
2521  */
2522 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
2523 {
2524         /* McStatusWrEn enabled? */
2525         if (guest_cpuid_is_amd(vcpu))
2526                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
2527
2528         return false;
2529 }
2530
2531 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2532 {
2533         u64 mcg_cap = vcpu->arch.mcg_cap;
2534         unsigned bank_num = mcg_cap & 0xff;
2535         u32 msr = msr_info->index;
2536         u64 data = msr_info->data;
2537
2538         switch (msr) {
2539         case MSR_IA32_MCG_STATUS:
2540                 vcpu->arch.mcg_status = data;
2541                 break;
2542         case MSR_IA32_MCG_CTL:
2543                 if (!(mcg_cap & MCG_CTL_P) &&
2544                     (data || !msr_info->host_initiated))
2545                         return 1;
2546                 if (data != 0 && data != ~(u64)0)
2547                         return 1;
2548                 vcpu->arch.mcg_ctl = data;
2549                 break;
2550         default:
2551                 if (msr >= MSR_IA32_MC0_CTL &&
2552                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2553                         u32 offset = array_index_nospec(
2554                                 msr - MSR_IA32_MC0_CTL,
2555                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
2556
2557                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2558                          * some Linux kernels though clear bit 10 in bank 4 to
2559                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2560                          * this to avoid an uncatched #GP in the guest
2561                          */
2562                         if ((offset & 0x3) == 0 &&
2563                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2564                                 return -1;
2565
2566                         /* MCi_STATUS */
2567                         if (!msr_info->host_initiated &&
2568                             (offset & 0x3) == 1 && data != 0) {
2569                                 if (!can_set_mci_status(vcpu))
2570                                         return -1;
2571                         }
2572
2573                         vcpu->arch.mce_banks[offset] = data;
2574                         break;
2575                 }
2576                 return 1;
2577         }
2578         return 0;
2579 }
2580
2581 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2582 {
2583         struct kvm *kvm = vcpu->kvm;
2584         int lm = is_long_mode(vcpu);
2585         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2586                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2587         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2588                 : kvm->arch.xen_hvm_config.blob_size_32;
2589         u32 page_num = data & ~PAGE_MASK;
2590         u64 page_addr = data & PAGE_MASK;
2591         u8 *page;
2592         int r;
2593
2594         r = -E2BIG;
2595         if (page_num >= blob_size)
2596                 goto out;
2597         r = -ENOMEM;
2598         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2599         if (IS_ERR(page)) {
2600                 r = PTR_ERR(page);
2601                 goto out;
2602         }
2603         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
2604                 goto out_free;
2605         r = 0;
2606 out_free:
2607         kfree(page);
2608 out:
2609         return r;
2610 }
2611
2612 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2613 {
2614         gpa_t gpa = data & ~0x3f;
2615
2616         /* Bits 3:5 are reserved, Should be zero */
2617         if (data & 0x38)
2618                 return 1;
2619
2620         vcpu->arch.apf.msr_val = data;
2621
2622         if (!(data & KVM_ASYNC_PF_ENABLED)) {
2623                 kvm_clear_async_pf_completion_queue(vcpu);
2624                 kvm_async_pf_hash_reset(vcpu);
2625                 return 0;
2626         }
2627
2628         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2629                                         sizeof(u32)))
2630                 return 1;
2631
2632         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2633         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
2634         kvm_async_pf_wakeup_all(vcpu);
2635         return 0;
2636 }
2637
2638 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2639 {
2640         vcpu->arch.pv_time_enabled = false;
2641         vcpu->arch.time = 0;
2642 }
2643
2644 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu, bool invalidate_gpa)
2645 {
2646         ++vcpu->stat.tlb_flush;
2647         kvm_x86_ops->tlb_flush(vcpu, invalidate_gpa);
2648 }
2649
2650 static void record_steal_time(struct kvm_vcpu *vcpu)
2651 {
2652         struct kvm_host_map map;
2653         struct kvm_steal_time *st;
2654
2655         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2656                 return;
2657
2658         /* -EAGAIN is returned in atomic context so we can just return. */
2659         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT,
2660                         &map, &vcpu->arch.st.cache, false))
2661                 return;
2662
2663         st = map.hva +
2664                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
2665
2666         /*
2667          * Doing a TLB flush here, on the guest's behalf, can avoid
2668          * expensive IPIs.
2669          */
2670         trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
2671                 st->preempted & KVM_VCPU_FLUSH_TLB);
2672         if (xchg(&st->preempted, 0) & KVM_VCPU_FLUSH_TLB)
2673                 kvm_vcpu_flush_tlb(vcpu, false);
2674
2675         vcpu->arch.st.preempted = 0;
2676
2677         if (st->version & 1)
2678                 st->version += 1;  /* first time write, random junk */
2679
2680         st->version += 1;
2681
2682         smp_wmb();
2683
2684         st->steal += current->sched_info.run_delay -
2685                 vcpu->arch.st.last_steal;
2686         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2687
2688         smp_wmb();
2689
2690         st->version += 1;
2691
2692         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, false);
2693 }
2694
2695 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2696 {
2697         bool pr = false;
2698         u32 msr = msr_info->index;
2699         u64 data = msr_info->data;
2700
2701         switch (msr) {
2702         case MSR_AMD64_NB_CFG:
2703         case MSR_IA32_UCODE_WRITE:
2704         case MSR_VM_HSAVE_PA:
2705         case MSR_AMD64_PATCH_LOADER:
2706         case MSR_AMD64_BU_CFG2:
2707         case MSR_AMD64_DC_CFG:
2708         case MSR_F15H_EX_CFG:
2709                 break;
2710
2711         case MSR_IA32_UCODE_REV:
2712                 if (msr_info->host_initiated)
2713                         vcpu->arch.microcode_version = data;
2714                 break;
2715         case MSR_IA32_ARCH_CAPABILITIES:
2716                 if (!msr_info->host_initiated)
2717                         return 1;
2718                 vcpu->arch.arch_capabilities = data;
2719                 break;
2720         case MSR_EFER:
2721                 return set_efer(vcpu, msr_info);
2722         case MSR_K7_HWCR:
2723                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2724                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2725                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2726
2727                 /* Handle McStatusWrEn */
2728                 if (data == BIT_ULL(18)) {
2729                         vcpu->arch.msr_hwcr = data;
2730                 } else if (data != 0) {
2731                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2732                                     data);
2733                         return 1;
2734                 }
2735                 break;
2736         case MSR_FAM10H_MMIO_CONF_BASE:
2737                 if (data != 0) {
2738                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2739                                     "0x%llx\n", data);
2740                         return 1;
2741                 }
2742                 break;
2743         case MSR_IA32_DEBUGCTLMSR:
2744                 if (!data) {
2745                         /* We support the non-activated case already */
2746                         break;
2747                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2748                         /* Values other than LBR and BTF are vendor-specific,
2749                            thus reserved and should throw a #GP */
2750                         return 1;
2751                 }
2752                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2753                             __func__, data);
2754                 break;
2755         case 0x200 ... 0x2ff:
2756                 return kvm_mtrr_set_msr(vcpu, msr, data);
2757         case MSR_IA32_APICBASE:
2758                 return kvm_set_apic_base(vcpu, msr_info);
2759         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2760                 return kvm_x2apic_msr_write(vcpu, msr, data);
2761         case MSR_IA32_TSCDEADLINE:
2762                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2763                 break;
2764         case MSR_IA32_TSC_ADJUST:
2765                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
2766                         if (!msr_info->host_initiated) {
2767                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2768                                 adjust_tsc_offset_guest(vcpu, adj);
2769                         }
2770                         vcpu->arch.ia32_tsc_adjust_msr = data;
2771                 }
2772                 break;
2773         case MSR_IA32_MISC_ENABLE:
2774                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
2775                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
2776                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
2777                                 return 1;
2778                         vcpu->arch.ia32_misc_enable_msr = data;
2779                         kvm_update_cpuid(vcpu);
2780                 } else {
2781                         vcpu->arch.ia32_misc_enable_msr = data;
2782                 }
2783                 break;
2784         case MSR_IA32_SMBASE:
2785                 if (!msr_info->host_initiated)
2786                         return 1;
2787                 vcpu->arch.smbase = data;
2788                 break;
2789         case MSR_IA32_POWER_CTL:
2790                 vcpu->arch.msr_ia32_power_ctl = data;
2791                 break;
2792         case MSR_IA32_TSC:
2793                 kvm_write_tsc(vcpu, msr_info);
2794                 break;
2795         case MSR_IA32_XSS:
2796                 if (!msr_info->host_initiated &&
2797                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
2798                         return 1;
2799                 /*
2800                  * We do support PT if kvm_x86_ops->pt_supported(), but we do
2801                  * not support IA32_XSS[bit 8]. Guests will have to use
2802                  * RDMSR/WRMSR rather than XSAVES/XRSTORS to save/restore PT
2803                  * MSRs.
2804                  */
2805                 if (data != 0)
2806                         return 1;
2807                 vcpu->arch.ia32_xss = data;
2808                 break;
2809         case MSR_SMI_COUNT:
2810                 if (!msr_info->host_initiated)
2811                         return 1;
2812                 vcpu->arch.smi_count = data;
2813                 break;
2814         case MSR_KVM_WALL_CLOCK_NEW:
2815         case MSR_KVM_WALL_CLOCK:
2816                 vcpu->kvm->arch.wall_clock = data;
2817                 kvm_write_wall_clock(vcpu->kvm, data);
2818                 break;
2819         case MSR_KVM_SYSTEM_TIME_NEW:
2820         case MSR_KVM_SYSTEM_TIME: {
2821                 struct kvm_arch *ka = &vcpu->kvm->arch;
2822
2823                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2824                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2825
2826                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2827                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2828
2829                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2830                 }
2831
2832                 vcpu->arch.time = data;
2833                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2834
2835                 /* we verify if the enable bit is set... */
2836                 vcpu->arch.pv_time_enabled = false;
2837                 if (!(data & 1))
2838                         break;
2839
2840                 if (!kvm_gfn_to_hva_cache_init(vcpu->kvm,
2841                      &vcpu->arch.pv_time, data & ~1ULL,
2842                      sizeof(struct pvclock_vcpu_time_info)))
2843                         vcpu->arch.pv_time_enabled = true;
2844
2845                 break;
2846         }
2847         case MSR_KVM_ASYNC_PF_EN:
2848                 if (kvm_pv_enable_async_pf(vcpu, data))
2849                         return 1;
2850                 break;
2851         case MSR_KVM_STEAL_TIME:
2852
2853                 if (unlikely(!sched_info_on()))
2854                         return 1;
2855
2856                 if (data & KVM_STEAL_RESERVED_MASK)
2857                         return 1;
2858
2859                 vcpu->arch.st.msr_val = data;
2860
2861                 if (!(data & KVM_MSR_ENABLED))
2862                         break;
2863
2864                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2865
2866                 break;
2867         case MSR_KVM_PV_EOI_EN:
2868                 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
2869                         return 1;
2870                 break;
2871
2872         case MSR_KVM_POLL_CONTROL:
2873                 /* only enable bit supported */
2874                 if (data & (-1ULL << 1))
2875                         return 1;
2876
2877                 vcpu->arch.msr_kvm_poll_control = data;
2878                 break;
2879
2880         case MSR_IA32_MCG_CTL:
2881         case MSR_IA32_MCG_STATUS:
2882         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2883                 return set_msr_mce(vcpu, msr_info);
2884
2885         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2886         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2887                 pr = true; /* fall through */
2888         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2889         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2890                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2891                         return kvm_pmu_set_msr(vcpu, msr_info);
2892
2893                 if (pr || data != 0)
2894                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2895                                     "0x%x data 0x%llx\n", msr, data);
2896                 break;
2897         case MSR_K7_CLK_CTL:
2898                 /*
2899                  * Ignore all writes to this no longer documented MSR.
2900                  * Writes are only relevant for old K7 processors,
2901                  * all pre-dating SVM, but a recommended workaround from
2902                  * AMD for these chips. It is possible to specify the
2903                  * affected processor models on the command line, hence
2904                  * the need to ignore the workaround.
2905                  */
2906                 break;
2907         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2908         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2909         case HV_X64_MSR_CRASH_CTL:
2910         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2911         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
2912         case HV_X64_MSR_TSC_EMULATION_CONTROL:
2913         case HV_X64_MSR_TSC_EMULATION_STATUS:
2914                 return kvm_hv_set_msr_common(vcpu, msr, data,
2915                                              msr_info->host_initiated);
2916         case MSR_IA32_BBL_CR_CTL3:
2917                 /* Drop writes to this legacy MSR -- see rdmsr
2918                  * counterpart for further detail.
2919                  */
2920                 if (report_ignored_msrs)
2921                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
2922                                 msr, data);
2923                 break;
2924         case MSR_AMD64_OSVW_ID_LENGTH:
2925                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2926                         return 1;
2927                 vcpu->arch.osvw.length = data;
2928                 break;
2929         case MSR_AMD64_OSVW_STATUS:
2930                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2931                         return 1;
2932                 vcpu->arch.osvw.status = data;
2933                 break;
2934         case MSR_PLATFORM_INFO:
2935                 if (!msr_info->host_initiated ||
2936                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
2937                      cpuid_fault_enabled(vcpu)))
2938                         return 1;
2939                 vcpu->arch.msr_platform_info = data;
2940                 break;
2941         case MSR_MISC_FEATURES_ENABLES:
2942                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
2943                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
2944                      !supports_cpuid_fault(vcpu)))
2945                         return 1;
2946                 vcpu->arch.msr_misc_features_enables = data;
2947                 break;
2948         default:
2949                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2950                         return xen_hvm_config(vcpu, data);
2951                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2952                         return kvm_pmu_set_msr(vcpu, msr_info);
2953                 if (!ignore_msrs) {
2954                         vcpu_debug_ratelimited(vcpu, "unhandled wrmsr: 0x%x data 0x%llx\n",
2955                                     msr, data);
2956                         return 1;
2957                 } else {
2958                         if (report_ignored_msrs)
2959                                 vcpu_unimpl(vcpu,
2960                                         "ignored wrmsr: 0x%x data 0x%llx\n",
2961                                         msr, data);
2962                         break;
2963                 }
2964         }
2965         return 0;
2966 }
2967 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2968
2969 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
2970 {
2971         u64 data;
2972         u64 mcg_cap = vcpu->arch.mcg_cap;
2973         unsigned bank_num = mcg_cap & 0xff;
2974
2975         switch (msr) {
2976         case MSR_IA32_P5_MC_ADDR:
2977         case MSR_IA32_P5_MC_TYPE:
2978                 data = 0;
2979                 break;
2980         case MSR_IA32_MCG_CAP:
2981                 data = vcpu->arch.mcg_cap;
2982                 break;
2983         case MSR_IA32_MCG_CTL:
2984                 if (!(mcg_cap & MCG_CTL_P) && !host)
2985                         return 1;
2986                 data = vcpu->arch.mcg_ctl;
2987                 break;
2988         case MSR_IA32_MCG_STATUS:
2989                 data = vcpu->arch.mcg_status;
2990                 break;
2991         default:
2992                 if (msr >= MSR_IA32_MC0_CTL &&
2993                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2994                         u32 offset = array_index_nospec(
2995                                 msr - MSR_IA32_MC0_CTL,
2996                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
2997
2998                         data = vcpu->arch.mce_banks[offset];
2999                         break;
3000                 }
3001                 return 1;
3002         }
3003         *pdata = data;
3004         return 0;
3005 }
3006
3007 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3008 {
3009         switch (msr_info->index) {
3010         case MSR_IA32_PLATFORM_ID:
3011         case MSR_IA32_EBL_CR_POWERON:
3012         case MSR_IA32_DEBUGCTLMSR:
3013         case MSR_IA32_LASTBRANCHFROMIP:
3014         case MSR_IA32_LASTBRANCHTOIP:
3015         case MSR_IA32_LASTINTFROMIP:
3016         case MSR_IA32_LASTINTTOIP:
3017         case MSR_K8_SYSCFG:
3018         case MSR_K8_TSEG_ADDR:
3019         case MSR_K8_TSEG_MASK:
3020         case MSR_VM_HSAVE_PA:
3021         case MSR_K8_INT_PENDING_MSG:
3022         case MSR_AMD64_NB_CFG:
3023         case MSR_FAM10H_MMIO_CONF_BASE:
3024         case MSR_AMD64_BU_CFG2:
3025         case MSR_IA32_PERF_CTL:
3026         case MSR_AMD64_DC_CFG:
3027         case MSR_F15H_EX_CFG:
3028                 msr_info->data = 0;
3029                 break;
3030         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3031         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3032         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3033         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3034         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3035                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3036                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
3037                 msr_info->data = 0;
3038                 break;
3039         case MSR_IA32_UCODE_REV:
3040                 msr_info->data = vcpu->arch.microcode_version;
3041                 break;
3042         case MSR_IA32_ARCH_CAPABILITIES:
3043                 if (!msr_info->host_initiated &&
3044                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
3045                         return 1;
3046                 msr_info->data = vcpu->arch.arch_capabilities;
3047                 break;
3048         case MSR_IA32_POWER_CTL:
3049                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
3050                 break;
3051         case MSR_IA32_TSC:
3052                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc()) + vcpu->arch.tsc_offset;
3053                 break;
3054         case MSR_MTRRcap:
3055         case 0x200 ... 0x2ff:
3056                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
3057         case 0xcd: /* fsb frequency */
3058                 msr_info->data = 3;
3059                 break;
3060                 /*
3061                  * MSR_EBC_FREQUENCY_ID
3062                  * Conservative value valid for even the basic CPU models.
3063                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3064                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3065                  * and 266MHz for model 3, or 4. Set Core Clock
3066                  * Frequency to System Bus Frequency Ratio to 1 (bits
3067                  * 31:24) even though these are only valid for CPU
3068                  * models > 2, however guests may end up dividing or
3069                  * multiplying by zero otherwise.
3070                  */
3071         case MSR_EBC_FREQUENCY_ID:
3072                 msr_info->data = 1 << 24;
3073                 break;
3074         case MSR_IA32_APICBASE:
3075                 msr_info->data = kvm_get_apic_base(vcpu);
3076                 break;
3077         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
3078                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
3079                 break;
3080         case MSR_IA32_TSCDEADLINE:
3081                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
3082                 break;
3083         case MSR_IA32_TSC_ADJUST:
3084                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
3085                 break;
3086         case MSR_IA32_MISC_ENABLE:
3087                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
3088                 break;
3089         case MSR_IA32_SMBASE:
3090                 if (!msr_info->host_initiated)
3091                         return 1;
3092                 msr_info->data = vcpu->arch.smbase;
3093                 break;
3094         case MSR_SMI_COUNT:
3095                 msr_info->data = vcpu->arch.smi_count;
3096                 break;
3097         case MSR_IA32_PERF_STATUS:
3098                 /* TSC increment by tick */
3099                 msr_info->data = 1000ULL;
3100                 /* CPU multiplier */
3101                 msr_info->data |= (((uint64_t)4ULL) << 40);
3102                 break;
3103         case MSR_EFER:
3104                 msr_info->data = vcpu->arch.efer;
3105                 break;
3106         case MSR_KVM_WALL_CLOCK:
3107         case MSR_KVM_WALL_CLOCK_NEW:
3108                 msr_info->data = vcpu->kvm->arch.wall_clock;
3109                 break;
3110         case MSR_KVM_SYSTEM_TIME:
3111         case MSR_KVM_SYSTEM_TIME_NEW:
3112                 msr_info->data = vcpu->arch.time;
3113                 break;
3114         case MSR_KVM_ASYNC_PF_EN:
3115                 msr_info->data = vcpu->arch.apf.msr_val;
3116                 break;
3117         case MSR_KVM_STEAL_TIME:
3118                 msr_info->data = vcpu->arch.st.msr_val;
3119                 break;
3120         case MSR_KVM_PV_EOI_EN:
3121                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3122                 break;
3123         case MSR_KVM_POLL_CONTROL:
3124                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3125                 break;
3126         case MSR_IA32_P5_MC_ADDR:
3127         case MSR_IA32_P5_MC_TYPE:
3128         case MSR_IA32_MCG_CAP:
3129         case MSR_IA32_MCG_CTL:
3130         case MSR_IA32_MCG_STATUS:
3131         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3132                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3133                                    msr_info->host_initiated);
3134         case MSR_IA32_XSS:
3135                 if (!msr_info->host_initiated &&
3136                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3137                         return 1;
3138                 msr_info->data = vcpu->arch.ia32_xss;
3139                 break;
3140         case MSR_K7_CLK_CTL:
3141                 /*
3142                  * Provide expected ramp-up count for K7. All other
3143                  * are set to zero, indicating minimum divisors for
3144                  * every field.
3145                  *
3146                  * This prevents guest kernels on AMD host with CPU
3147                  * type 6, model 8 and higher from exploding due to
3148                  * the rdmsr failing.
3149                  */
3150                 msr_info->data = 0x20000000;
3151                 break;
3152         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3153         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3154         case HV_X64_MSR_CRASH_CTL:
3155         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3156         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3157         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3158         case HV_X64_MSR_TSC_EMULATION_STATUS:
3159                 return kvm_hv_get_msr_common(vcpu,
3160                                              msr_info->index, &msr_info->data,
3161                                              msr_info->host_initiated);
3162                 break;
3163         case MSR_IA32_BBL_CR_CTL3:
3164                 /* This legacy MSR exists but isn't fully documented in current
3165                  * silicon.  It is however accessed by winxp in very narrow
3166                  * scenarios where it sets bit #19, itself documented as
3167                  * a "reserved" bit.  Best effort attempt to source coherent
3168                  * read data here should the balance of the register be
3169                  * interpreted by the guest:
3170                  *
3171                  * L2 cache control register 3: 64GB range, 256KB size,
3172                  * enabled, latency 0x1, configured
3173                  */
3174                 msr_info->data = 0xbe702111;
3175                 break;
3176         case MSR_AMD64_OSVW_ID_LENGTH:
3177                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3178                         return 1;
3179                 msr_info->data = vcpu->arch.osvw.length;
3180                 break;
3181         case MSR_AMD64_OSVW_STATUS:
3182                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3183                         return 1;
3184                 msr_info->data = vcpu->arch.osvw.status;
3185                 break;
3186         case MSR_PLATFORM_INFO:
3187                 if (!msr_info->host_initiated &&
3188                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
3189                         return 1;
3190                 msr_info->data = vcpu->arch.msr_platform_info;
3191                 break;
3192         case MSR_MISC_FEATURES_ENABLES:
3193                 msr_info->data = vcpu->arch.msr_misc_features_enables;
3194                 break;
3195         case MSR_K7_HWCR:
3196                 msr_info->data = vcpu->arch.msr_hwcr;
3197                 break;
3198         default:
3199                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3200                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
3201                 if (!ignore_msrs) {
3202                         vcpu_debug_ratelimited(vcpu, "unhandled rdmsr: 0x%x\n",
3203                                                msr_info->index);
3204                         return 1;
3205                 } else {
3206                         if (report_ignored_msrs)
3207                                 vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n",
3208                                         msr_info->index);
3209                         msr_info->data = 0;
3210                 }
3211                 break;
3212         }
3213         return 0;
3214 }
3215 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
3216
3217 /*
3218  * Read or write a bunch of msrs. All parameters are kernel addresses.
3219  *
3220  * @return number of msrs set successfully.
3221  */
3222 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
3223                     struct kvm_msr_entry *entries,
3224                     int (*do_msr)(struct kvm_vcpu *vcpu,
3225                                   unsigned index, u64 *data))
3226 {
3227         int i;
3228
3229         for (i = 0; i < msrs->nmsrs; ++i)
3230                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
3231                         break;
3232
3233         return i;
3234 }
3235
3236 /*
3237  * Read or write a bunch of msrs. Parameters are user addresses.
3238  *
3239  * @return number of msrs set successfully.
3240  */
3241 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
3242                   int (*do_msr)(struct kvm_vcpu *vcpu,
3243                                 unsigned index, u64 *data),
3244                   int writeback)
3245 {
3246         struct kvm_msrs msrs;
3247         struct kvm_msr_entry *entries;
3248         int r, n;
3249         unsigned size;
3250
3251         r = -EFAULT;
3252         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
3253                 goto out;
3254
3255         r = -E2BIG;
3256         if (msrs.nmsrs >= MAX_IO_MSRS)
3257                 goto out;
3258
3259         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
3260         entries = memdup_user(user_msrs->entries, size);
3261         if (IS_ERR(entries)) {
3262                 r = PTR_ERR(entries);
3263                 goto out;
3264         }
3265
3266         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
3267         if (r < 0)
3268                 goto out_free;
3269
3270         r = -EFAULT;
3271         if (writeback && copy_to_user(user_msrs->entries, entries, size))
3272                 goto out_free;
3273
3274         r = n;
3275
3276 out_free:
3277         kfree(entries);
3278 out:
3279         return r;
3280 }
3281
3282 static inline bool kvm_can_mwait_in_guest(void)
3283 {
3284         return boot_cpu_has(X86_FEATURE_MWAIT) &&
3285                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
3286                 boot_cpu_has(X86_FEATURE_ARAT);
3287 }
3288
3289 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
3290 {
3291         int r = 0;
3292
3293         switch (ext) {
3294         case KVM_CAP_IRQCHIP:
3295         case KVM_CAP_HLT:
3296         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
3297         case KVM_CAP_SET_TSS_ADDR:
3298         case KVM_CAP_EXT_CPUID:
3299         case KVM_CAP_EXT_EMUL_CPUID:
3300         case KVM_CAP_CLOCKSOURCE:
3301         case KVM_CAP_PIT:
3302         case KVM_CAP_NOP_IO_DELAY:
3303         case KVM_CAP_MP_STATE:
3304         case KVM_CAP_SYNC_MMU:
3305         case KVM_CAP_USER_NMI:
3306         case KVM_CAP_REINJECT_CONTROL:
3307         case KVM_CAP_IRQ_INJECT_STATUS:
3308         case KVM_CAP_IOEVENTFD:
3309         case KVM_CAP_IOEVENTFD_NO_LENGTH:
3310         case KVM_CAP_PIT2:
3311         case KVM_CAP_PIT_STATE2:
3312         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
3313         case KVM_CAP_XEN_HVM:
3314         case KVM_CAP_VCPU_EVENTS:
3315         case KVM_CAP_HYPERV:
3316         case KVM_CAP_HYPERV_VAPIC:
3317         case KVM_CAP_HYPERV_SPIN:
3318         case KVM_CAP_HYPERV_SYNIC:
3319         case KVM_CAP_HYPERV_SYNIC2:
3320         case KVM_CAP_HYPERV_VP_INDEX:
3321         case KVM_CAP_HYPERV_EVENTFD:
3322         case KVM_CAP_HYPERV_TLBFLUSH:
3323         case KVM_CAP_HYPERV_SEND_IPI:
3324         case KVM_CAP_HYPERV_CPUID:
3325         case KVM_CAP_PCI_SEGMENT:
3326         case KVM_CAP_DEBUGREGS:
3327         case KVM_CAP_X86_ROBUST_SINGLESTEP:
3328         case KVM_CAP_XSAVE:
3329         case KVM_CAP_ASYNC_PF:
3330         case KVM_CAP_GET_TSC_KHZ:
3331         case KVM_CAP_KVMCLOCK_CTRL:
3332         case KVM_CAP_READONLY_MEM:
3333         case KVM_CAP_HYPERV_TIME:
3334         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
3335         case KVM_CAP_TSC_DEADLINE_TIMER:
3336         case KVM_CAP_DISABLE_QUIRKS:
3337         case KVM_CAP_SET_BOOT_CPU_ID:
3338         case KVM_CAP_SPLIT_IRQCHIP:
3339         case KVM_CAP_IMMEDIATE_EXIT:
3340         case KVM_CAP_PMU_EVENT_FILTER:
3341         case KVM_CAP_GET_MSR_FEATURES:
3342         case KVM_CAP_MSR_PLATFORM_INFO:
3343         case KVM_CAP_EXCEPTION_PAYLOAD:
3344                 r = 1;
3345                 break;
3346         case KVM_CAP_SYNC_REGS:
3347                 r = KVM_SYNC_X86_VALID_FIELDS;
3348                 break;
3349         case KVM_CAP_ADJUST_CLOCK:
3350                 r = KVM_CLOCK_TSC_STABLE;
3351                 break;
3352         case KVM_CAP_X86_DISABLE_EXITS:
3353                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
3354                       KVM_X86_DISABLE_EXITS_CSTATE;
3355                 if(kvm_can_mwait_in_guest())
3356                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
3357                 break;
3358         case KVM_CAP_X86_SMM:
3359                 /* SMBASE is usually relocated above 1M on modern chipsets,
3360                  * and SMM handlers might indeed rely on 4G segment limits,
3361                  * so do not report SMM to be available if real mode is
3362                  * emulated via vm86 mode.  Still, do not go to great lengths
3363                  * to avoid userspace's usage of the feature, because it is a
3364                  * fringe case that is not enabled except via specific settings
3365                  * of the module parameters.
3366                  */
3367                 r = kvm_x86_ops->has_emulated_msr(MSR_IA32_SMBASE);
3368                 break;
3369         case KVM_CAP_VAPIC:
3370                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
3371                 break;
3372         case KVM_CAP_NR_VCPUS:
3373                 r = KVM_SOFT_MAX_VCPUS;
3374                 break;
3375         case KVM_CAP_MAX_VCPUS:
3376                 r = KVM_MAX_VCPUS;
3377                 break;
3378         case KVM_CAP_MAX_VCPU_ID:
3379                 r = KVM_MAX_VCPU_ID;
3380                 break;
3381         case KVM_CAP_PV_MMU:    /* obsolete */
3382                 r = 0;
3383                 break;
3384         case KVM_CAP_MCE:
3385                 r = KVM_MAX_MCE_BANKS;
3386                 break;
3387         case KVM_CAP_XCRS:
3388                 r = boot_cpu_has(X86_FEATURE_XSAVE);
3389                 break;
3390         case KVM_CAP_TSC_CONTROL:
3391                 r = kvm_has_tsc_control;
3392                 break;
3393         case KVM_CAP_X2APIC_API:
3394                 r = KVM_X2APIC_API_VALID_FLAGS;
3395                 break;
3396         case KVM_CAP_NESTED_STATE:
3397                 r = kvm_x86_ops->get_nested_state ?
3398                         kvm_x86_ops->get_nested_state(NULL, NULL, 0) : 0;
3399                 break;
3400         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
3401                 r = kvm_x86_ops->enable_direct_tlbflush != NULL;
3402                 break;
3403         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
3404                 r = kvm_x86_ops->nested_enable_evmcs != NULL;
3405                 break;
3406         default:
3407                 break;
3408         }
3409         return r;
3410
3411 }
3412
3413 long kvm_arch_dev_ioctl(struct file *filp,
3414                         unsigned int ioctl, unsigned long arg)
3415 {
3416         void __user *argp = (void __user *)arg;
3417         long r;
3418
3419         switch (ioctl) {
3420         case KVM_GET_MSR_INDEX_LIST: {
3421                 struct kvm_msr_list __user *user_msr_list = argp;
3422                 struct kvm_msr_list msr_list;
3423                 unsigned n;
3424
3425                 r = -EFAULT;
3426                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3427                         goto out;
3428                 n = msr_list.nmsrs;
3429                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
3430                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3431                         goto out;
3432                 r = -E2BIG;
3433                 if (n < msr_list.nmsrs)
3434                         goto out;
3435                 r = -EFAULT;
3436                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
3437                                  num_msrs_to_save * sizeof(u32)))
3438                         goto out;
3439                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
3440                                  &emulated_msrs,
3441                                  num_emulated_msrs * sizeof(u32)))
3442                         goto out;
3443                 r = 0;
3444                 break;
3445         }
3446         case KVM_GET_SUPPORTED_CPUID:
3447         case KVM_GET_EMULATED_CPUID: {
3448                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3449                 struct kvm_cpuid2 cpuid;
3450
3451                 r = -EFAULT;
3452                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3453                         goto out;
3454
3455                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
3456                                             ioctl);
3457                 if (r)
3458                         goto out;
3459
3460                 r = -EFAULT;
3461                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3462                         goto out;
3463                 r = 0;
3464                 break;
3465         }
3466         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
3467                 r = -EFAULT;
3468                 if (copy_to_user(argp, &kvm_mce_cap_supported,
3469                                  sizeof(kvm_mce_cap_supported)))
3470                         goto out;
3471                 r = 0;
3472                 break;
3473         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
3474                 struct kvm_msr_list __user *user_msr_list = argp;
3475                 struct kvm_msr_list msr_list;
3476                 unsigned int n;
3477
3478                 r = -EFAULT;
3479                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3480                         goto out;
3481                 n = msr_list.nmsrs;
3482                 msr_list.nmsrs = num_msr_based_features;
3483                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3484                         goto out;
3485                 r = -E2BIG;
3486                 if (n < msr_list.nmsrs)
3487                         goto out;
3488                 r = -EFAULT;
3489                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
3490                                  num_msr_based_features * sizeof(u32)))
3491                         goto out;
3492                 r = 0;
3493                 break;
3494         }
3495         case KVM_GET_MSRS:
3496                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
3497                 break;
3498         }
3499         default:
3500                 r = -EINVAL;
3501         }
3502 out:
3503         return r;
3504 }
3505
3506 static void wbinvd_ipi(void *garbage)
3507 {
3508         wbinvd();
3509 }
3510
3511 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
3512 {
3513         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
3514 }
3515
3516 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
3517 {
3518         /* Address WBINVD may be executed by guest */
3519         if (need_emulate_wbinvd(vcpu)) {
3520                 if (kvm_x86_ops->has_wbinvd_exit())
3521                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
3522                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
3523                         smp_call_function_single(vcpu->cpu,
3524                                         wbinvd_ipi, NULL, 1);
3525         }
3526
3527         kvm_x86_ops->vcpu_load(vcpu, cpu);
3528
3529         /* Apply any externally detected TSC adjustments (due to suspend) */
3530         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
3531                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
3532                 vcpu->arch.tsc_offset_adjustment = 0;
3533                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3534         }
3535
3536         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
3537                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
3538                                 rdtsc() - vcpu->arch.last_host_tsc;
3539                 if (tsc_delta < 0)
3540                         mark_tsc_unstable("KVM discovered backwards TSC");
3541
3542                 if (kvm_check_tsc_unstable()) {
3543                         u64 offset = kvm_compute_tsc_offset(vcpu,
3544                                                 vcpu->arch.last_guest_tsc);
3545                         kvm_vcpu_write_tsc_offset(vcpu, offset);
3546                         vcpu->arch.tsc_catchup = 1;
3547                 }
3548
3549                 if (kvm_lapic_hv_timer_in_use(vcpu))
3550                         kvm_lapic_restart_hv_timer(vcpu);
3551
3552                 /*
3553                  * On a host with synchronized TSC, there is no need to update
3554                  * kvmclock on vcpu->cpu migration
3555                  */
3556                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
3557                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
3558                 if (vcpu->cpu != cpu)
3559                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
3560                 vcpu->cpu = cpu;
3561         }
3562
3563         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3564 }
3565
3566 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
3567 {
3568         struct kvm_host_map map;
3569         struct kvm_steal_time *st;
3570
3571         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3572                 return;
3573
3574         if (vcpu->arch.st.preempted)
3575                 return;
3576
3577         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT, &map,
3578                         &vcpu->arch.st.cache, true))
3579                 return;
3580
3581         st = map.hva +
3582                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
3583
3584         st->preempted = vcpu->arch.st.preempted = KVM_VCPU_PREEMPTED;
3585
3586         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, true);
3587 }
3588
3589 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
3590 {
3591         int idx;
3592
3593         if (vcpu->preempted)
3594                 vcpu->arch.preempted_in_kernel = !kvm_x86_ops->get_cpl(vcpu);
3595
3596         /*
3597          * Disable page faults because we're in atomic context here.
3598          * kvm_write_guest_offset_cached() would call might_fault()
3599          * that relies on pagefault_disable() to tell if there's a
3600          * bug. NOTE: the write to guest memory may not go through if
3601          * during postcopy live migration or if there's heavy guest
3602          * paging.
3603          */
3604         pagefault_disable();
3605         /*
3606          * kvm_memslots() will be called by
3607          * kvm_write_guest_offset_cached() so take the srcu lock.
3608          */
3609         idx = srcu_read_lock(&vcpu->kvm->srcu);
3610         kvm_steal_time_set_preempted(vcpu);
3611         srcu_read_unlock(&vcpu->kvm->srcu, idx);
3612         pagefault_enable();
3613         kvm_x86_ops->vcpu_put(vcpu);
3614         vcpu->arch.last_host_tsc = rdtsc();
3615         /*
3616          * If userspace has set any breakpoints or watchpoints, dr6 is restored
3617          * on every vmexit, but if not, we might have a stale dr6 from the
3618          * guest. do_debug expects dr6 to be cleared after it runs, do the same.
3619          */
3620         set_debugreg(0, 6);
3621 }
3622
3623 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
3624                                     struct kvm_lapic_state *s)
3625 {
3626         if (vcpu->arch.apicv_active)
3627                 kvm_x86_ops->sync_pir_to_irr(vcpu);
3628
3629         return kvm_apic_get_state(vcpu, s);
3630 }
3631
3632 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
3633                                     struct kvm_lapic_state *s)
3634 {
3635         int r;
3636
3637         r = kvm_apic_set_state(vcpu, s);
3638         if (r)
3639                 return r;
3640         update_cr8_intercept(vcpu);
3641
3642         return 0;
3643 }
3644
3645 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
3646 {
3647         return (!lapic_in_kernel(vcpu) ||
3648                 kvm_apic_accept_pic_intr(vcpu));
3649 }
3650
3651 /*
3652  * if userspace requested an interrupt window, check that the
3653  * interrupt window is open.
3654  *
3655  * No need to exit to userspace if we already have an interrupt queued.
3656  */
3657 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
3658 {
3659         return kvm_arch_interrupt_allowed(vcpu) &&
3660                 !kvm_cpu_has_interrupt(vcpu) &&
3661                 !kvm_event_needs_reinjection(vcpu) &&
3662                 kvm_cpu_accept_dm_intr(vcpu);
3663 }
3664
3665 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
3666                                     struct kvm_interrupt *irq)
3667 {
3668         if (irq->irq >= KVM_NR_INTERRUPTS)
3669                 return -EINVAL;
3670
3671         if (!irqchip_in_kernel(vcpu->kvm)) {
3672                 kvm_queue_interrupt(vcpu, irq->irq, false);
3673                 kvm_make_request(KVM_REQ_EVENT, vcpu);
3674                 return 0;
3675         }
3676
3677         /*
3678          * With in-kernel LAPIC, we only use this to inject EXTINT, so
3679          * fail for in-kernel 8259.
3680          */
3681         if (pic_in_kernel(vcpu->kvm))
3682                 return -ENXIO;
3683
3684         if (vcpu->arch.pending_external_vector != -1)
3685                 return -EEXIST;
3686
3687         vcpu->arch.pending_external_vector = irq->irq;
3688         kvm_make_request(KVM_REQ_EVENT, vcpu);
3689         return 0;
3690 }
3691
3692 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
3693 {
3694         kvm_inject_nmi(vcpu);
3695
3696         return 0;
3697 }
3698
3699 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
3700 {
3701         kvm_make_request(KVM_REQ_SMI, vcpu);
3702
3703         return 0;
3704 }
3705
3706 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
3707                                            struct kvm_tpr_access_ctl *tac)
3708 {
3709         if (tac->flags)
3710                 return -EINVAL;
3711         vcpu->arch.tpr_access_reporting = !!tac->enabled;
3712         return 0;
3713 }
3714
3715 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
3716                                         u64 mcg_cap)
3717 {
3718         int r;
3719         unsigned bank_num = mcg_cap & 0xff, bank;
3720
3721         r = -EINVAL;
3722         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
3723                 goto out;
3724         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
3725                 goto out;
3726         r = 0;
3727         vcpu->arch.mcg_cap = mcg_cap;
3728         /* Init IA32_MCG_CTL to all 1s */
3729         if (mcg_cap & MCG_CTL_P)
3730                 vcpu->arch.mcg_ctl = ~(u64)0;
3731         /* Init IA32_MCi_CTL to all 1s */
3732         for (bank = 0; bank < bank_num; bank++)
3733                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
3734
3735         kvm_x86_ops->setup_mce(vcpu);
3736 out:
3737         return r;
3738 }
3739
3740 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
3741                                       struct kvm_x86_mce *mce)
3742 {
3743         u64 mcg_cap = vcpu->arch.mcg_cap;
3744         unsigned bank_num = mcg_cap & 0xff;
3745         u64 *banks = vcpu->arch.mce_banks;
3746
3747         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
3748                 return -EINVAL;
3749         /*
3750          * if IA32_MCG_CTL is not all 1s, the uncorrected error
3751          * reporting is disabled
3752          */
3753         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
3754             vcpu->arch.mcg_ctl != ~(u64)0)
3755                 return 0;
3756         banks += 4 * mce->bank;
3757         /*
3758          * if IA32_MCi_CTL is not all 1s, the uncorrected error
3759          * reporting is disabled for the bank
3760          */
3761         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
3762                 return 0;
3763         if (mce->status & MCI_STATUS_UC) {
3764                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
3765                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
3766                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3767                         return 0;
3768                 }
3769                 if (banks[1] & MCI_STATUS_VAL)
3770                         mce->status |= MCI_STATUS_OVER;
3771                 banks[2] = mce->addr;
3772                 banks[3] = mce->misc;
3773                 vcpu->arch.mcg_status = mce->mcg_status;
3774                 banks[1] = mce->status;
3775                 kvm_queue_exception(vcpu, MC_VECTOR);
3776         } else if (!(banks[1] & MCI_STATUS_VAL)
3777                    || !(banks[1] & MCI_STATUS_UC)) {
3778                 if (banks[1] & MCI_STATUS_VAL)
3779                         mce->status |= MCI_STATUS_OVER;
3780                 banks[2] = mce->addr;
3781                 banks[3] = mce->misc;
3782                 banks[1] = mce->status;
3783         } else
3784                 banks[1] |= MCI_STATUS_OVER;
3785         return 0;
3786 }
3787
3788 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
3789                                                struct kvm_vcpu_events *events)
3790 {
3791         process_nmi(vcpu);
3792
3793         /*
3794          * The API doesn't provide the instruction length for software
3795          * exceptions, so don't report them. As long as the guest RIP
3796          * isn't advanced, we should expect to encounter the exception
3797          * again.
3798          */
3799         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
3800                 events->exception.injected = 0;
3801                 events->exception.pending = 0;
3802         } else {
3803                 events->exception.injected = vcpu->arch.exception.injected;
3804                 events->exception.pending = vcpu->arch.exception.pending;
3805                 /*
3806                  * For ABI compatibility, deliberately conflate
3807                  * pending and injected exceptions when
3808                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
3809                  */
3810                 if (!vcpu->kvm->arch.exception_payload_enabled)
3811                         events->exception.injected |=
3812                                 vcpu->arch.exception.pending;
3813         }
3814         events->exception.nr = vcpu->arch.exception.nr;
3815         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
3816         events->exception.error_code = vcpu->arch.exception.error_code;
3817         events->exception_has_payload = vcpu->arch.exception.has_payload;
3818         events->exception_payload = vcpu->arch.exception.payload;
3819
3820         events->interrupt.injected =
3821                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
3822         events->interrupt.nr = vcpu->arch.interrupt.nr;
3823         events->interrupt.soft = 0;
3824         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
3825
3826         events->nmi.injected = vcpu->arch.nmi_injected;
3827         events->nmi.pending = vcpu->arch.nmi_pending != 0;
3828         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
3829         events->nmi.pad = 0;
3830
3831         events->sipi_vector = 0; /* never valid when reporting to user space */
3832
3833         events->smi.smm = is_smm(vcpu);
3834         events->smi.pending = vcpu->arch.smi_pending;
3835         events->smi.smm_inside_nmi =
3836                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
3837         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
3838
3839         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
3840                          | KVM_VCPUEVENT_VALID_SHADOW
3841                          | KVM_VCPUEVENT_VALID_SMM);
3842         if (vcpu->kvm->arch.exception_payload_enabled)
3843                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
3844
3845         memset(&events->reserved, 0, sizeof(events->reserved));
3846 }
3847
3848 static void kvm_smm_changed(struct kvm_vcpu *vcpu);
3849
3850 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
3851                                               struct kvm_vcpu_events *events)
3852 {
3853         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3854                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3855                               | KVM_VCPUEVENT_VALID_SHADOW
3856                               | KVM_VCPUEVENT_VALID_SMM
3857                               | KVM_VCPUEVENT_VALID_PAYLOAD))
3858                 return -EINVAL;
3859
3860         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
3861                 if (!vcpu->kvm->arch.exception_payload_enabled)
3862                         return -EINVAL;
3863                 if (events->exception.pending)
3864                         events->exception.injected = 0;
3865                 else
3866                         events->exception_has_payload = 0;
3867         } else {
3868                 events->exception.pending = 0;
3869                 events->exception_has_payload = 0;
3870         }
3871
3872         if ((events->exception.injected || events->exception.pending) &&
3873             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
3874                 return -EINVAL;
3875
3876         /* INITs are latched while in SMM */
3877         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
3878             (events->smi.smm || events->smi.pending) &&
3879             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
3880                 return -EINVAL;
3881
3882         process_nmi(vcpu);
3883         vcpu->arch.exception.injected = events->exception.injected;
3884         vcpu->arch.exception.pending = events->exception.pending;
3885         vcpu->arch.exception.nr = events->exception.nr;
3886         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3887         vcpu->arch.exception.error_code = events->exception.error_code;
3888         vcpu->arch.exception.has_payload = events->exception_has_payload;
3889         vcpu->arch.exception.payload = events->exception_payload;
3890
3891         vcpu->arch.interrupt.injected = events->interrupt.injected;
3892         vcpu->arch.interrupt.nr = events->interrupt.nr;
3893         vcpu->arch.interrupt.soft = events->interrupt.soft;
3894         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3895                 kvm_x86_ops->set_interrupt_shadow(vcpu,
3896                                                   events->interrupt.shadow);
3897
3898         vcpu->arch.nmi_injected = events->nmi.injected;
3899         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3900                 vcpu->arch.nmi_pending = events->nmi.pending;
3901         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3902
3903         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3904             lapic_in_kernel(vcpu))
3905                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3906
3907         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
3908                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
3909                         if (events->smi.smm)
3910                                 vcpu->arch.hflags |= HF_SMM_MASK;
3911                         else
3912                                 vcpu->arch.hflags &= ~HF_SMM_MASK;
3913                         kvm_smm_changed(vcpu);
3914                 }
3915
3916                 vcpu->arch.smi_pending = events->smi.pending;
3917
3918                 if (events->smi.smm) {
3919                         if (events->smi.smm_inside_nmi)
3920                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3921                         else
3922                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3923                 }
3924
3925                 if (lapic_in_kernel(vcpu)) {
3926                         if (events->smi.latched_init)
3927                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3928                         else
3929                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3930                 }
3931         }
3932
3933         kvm_make_request(KVM_REQ_EVENT, vcpu);
3934
3935         return 0;
3936 }
3937
3938 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3939                                              struct kvm_debugregs *dbgregs)
3940 {
3941         unsigned long val;
3942
3943         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3944         kvm_get_dr(vcpu, 6, &val);
3945         dbgregs->dr6 = val;
3946         dbgregs->dr7 = vcpu->arch.dr7;
3947         dbgregs->flags = 0;
3948         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3949 }
3950
3951 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3952                                             struct kvm_debugregs *dbgregs)
3953 {
3954         if (dbgregs->flags)
3955                 return -EINVAL;
3956
3957         if (dbgregs->dr6 & ~0xffffffffull)
3958                 return -EINVAL;
3959         if (dbgregs->dr7 & ~0xffffffffull)
3960                 return -EINVAL;
3961
3962         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3963         kvm_update_dr0123(vcpu);
3964         vcpu->arch.dr6 = dbgregs->dr6;
3965         kvm_update_dr6(vcpu);
3966         vcpu->arch.dr7 = dbgregs->dr7;
3967         kvm_update_dr7(vcpu);
3968
3969         return 0;
3970 }
3971
3972 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3973
3974 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3975 {
3976         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
3977         u64 xstate_bv = xsave->header.xfeatures;
3978         u64 valid;
3979
3980         /*
3981          * Copy legacy XSAVE area, to avoid complications with CPUID
3982          * leaves 0 and 1 in the loop below.
3983          */
3984         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3985
3986         /* Set XSTATE_BV */
3987         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
3988         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3989
3990         /*
3991          * Copy each region from the possibly compacted offset to the
3992          * non-compacted offset.
3993          */
3994         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3995         while (valid) {
3996                 u64 xfeature_mask = valid & -valid;
3997                 int xfeature_nr = fls64(xfeature_mask) - 1;
3998                 void *src = get_xsave_addr(xsave, xfeature_nr);
3999
4000                 if (src) {
4001                         u32 size, offset, ecx, edx;
4002                         cpuid_count(XSTATE_CPUID, xfeature_nr,
4003                                     &size, &offset, &ecx, &edx);
4004                         if (xfeature_nr == XFEATURE_PKRU)
4005                                 memcpy(dest + offset, &vcpu->arch.pkru,
4006                                        sizeof(vcpu->arch.pkru));
4007                         else
4008                                 memcpy(dest + offset, src, size);
4009
4010                 }
4011
4012                 valid -= xfeature_mask;
4013         }
4014 }
4015
4016 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
4017 {
4018         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4019         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
4020         u64 valid;
4021
4022         /*
4023          * Copy legacy XSAVE area, to avoid complications with CPUID
4024          * leaves 0 and 1 in the loop below.
4025          */
4026         memcpy(xsave, src, XSAVE_HDR_OFFSET);
4027
4028         /* Set XSTATE_BV and possibly XCOMP_BV.  */
4029         xsave->header.xfeatures = xstate_bv;
4030         if (boot_cpu_has(X86_FEATURE_XSAVES))
4031                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
4032
4033         /*
4034          * Copy each region from the non-compacted offset to the
4035          * possibly compacted offset.
4036          */
4037         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4038         while (valid) {
4039                 u64 xfeature_mask = valid & -valid;
4040                 int xfeature_nr = fls64(xfeature_mask) - 1;
4041                 void *dest = get_xsave_addr(xsave, xfeature_nr);
4042
4043                 if (dest) {
4044                         u32 size, offset, ecx, edx;
4045                         cpuid_count(XSTATE_CPUID, xfeature_nr,
4046                                     &size, &offset, &ecx, &edx);
4047                         if (xfeature_nr == XFEATURE_PKRU)
4048                                 memcpy(&vcpu->arch.pkru, src + offset,
4049                                        sizeof(vcpu->arch.pkru));
4050                         else
4051                                 memcpy(dest, src + offset, size);
4052                 }
4053
4054                 valid -= xfeature_mask;
4055         }
4056 }
4057
4058 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
4059                                          struct kvm_xsave *guest_xsave)
4060 {
4061         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4062                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
4063                 fill_xsave((u8 *) guest_xsave->region, vcpu);
4064         } else {
4065                 memcpy(guest_xsave->region,
4066                         &vcpu->arch.guest_fpu->state.fxsave,
4067                         sizeof(struct fxregs_state));
4068                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
4069                         XFEATURE_MASK_FPSSE;
4070         }
4071 }
4072
4073 #define XSAVE_MXCSR_OFFSET 24
4074
4075 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
4076                                         struct kvm_xsave *guest_xsave)
4077 {
4078         u64 xstate_bv =
4079                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
4080         u32 mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
4081
4082         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4083                 /*
4084                  * Here we allow setting states that are not present in
4085                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
4086                  * with old userspace.
4087                  */
4088                 if (xstate_bv & ~kvm_supported_xcr0() ||
4089                         mxcsr & ~mxcsr_feature_mask)
4090                         return -EINVAL;
4091                 load_xsave(vcpu, (u8 *)guest_xsave->region);
4092         } else {
4093                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
4094                         mxcsr & ~mxcsr_feature_mask)
4095                         return -EINVAL;
4096                 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
4097                         guest_xsave->region, sizeof(struct fxregs_state));
4098         }
4099         return 0;
4100 }
4101
4102 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
4103                                         struct kvm_xcrs *guest_xcrs)
4104 {
4105         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
4106                 guest_xcrs->nr_xcrs = 0;
4107                 return;
4108         }
4109
4110         guest_xcrs->nr_xcrs = 1;
4111         guest_xcrs->flags = 0;
4112         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
4113         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
4114 }
4115
4116 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
4117                                        struct kvm_xcrs *guest_xcrs)
4118 {
4119         int i, r = 0;
4120
4121         if (!boot_cpu_has(X86_FEATURE_XSAVE))
4122                 return -EINVAL;
4123
4124         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
4125                 return -EINVAL;
4126
4127         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
4128                 /* Only support XCR0 currently */
4129                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
4130                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
4131                                 guest_xcrs->xcrs[i].value);
4132                         break;
4133                 }
4134         if (r)
4135                 r = -EINVAL;
4136         return r;
4137 }
4138
4139 /*
4140  * kvm_set_guest_paused() indicates to the guest kernel that it has been
4141  * stopped by the hypervisor.  This function will be called from the host only.
4142  * EINVAL is returned when the host attempts to set the flag for a guest that
4143  * does not support pv clocks.
4144  */
4145 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
4146 {
4147         if (!vcpu->arch.pv_time_enabled)
4148                 return -EINVAL;
4149         vcpu->arch.pvclock_set_guest_stopped_request = true;
4150         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4151         return 0;
4152 }
4153
4154 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
4155                                      struct kvm_enable_cap *cap)
4156 {
4157         int r;
4158         uint16_t vmcs_version;
4159         void __user *user_ptr;
4160
4161         if (cap->flags)
4162                 return -EINVAL;
4163
4164         switch (cap->cap) {
4165         case KVM_CAP_HYPERV_SYNIC2:
4166                 if (cap->args[0])
4167                         return -EINVAL;
4168                 /* fall through */
4169
4170         case KVM_CAP_HYPERV_SYNIC:
4171                 if (!irqchip_in_kernel(vcpu->kvm))
4172                         return -EINVAL;
4173                 return kvm_hv_activate_synic(vcpu, cap->cap ==
4174                                              KVM_CAP_HYPERV_SYNIC2);
4175         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4176                 if (!kvm_x86_ops->nested_enable_evmcs)
4177                         return -ENOTTY;
4178                 r = kvm_x86_ops->nested_enable_evmcs(vcpu, &vmcs_version);
4179                 if (!r) {
4180                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
4181                         if (copy_to_user(user_ptr, &vmcs_version,
4182                                          sizeof(vmcs_version)))
4183                                 r = -EFAULT;
4184                 }
4185                 return r;
4186         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4187                 if (!kvm_x86_ops->enable_direct_tlbflush)
4188                         return -ENOTTY;
4189
4190                 return kvm_x86_ops->enable_direct_tlbflush(vcpu);
4191
4192         default:
4193                 return -EINVAL;
4194         }
4195 }
4196
4197 long kvm_arch_vcpu_ioctl(struct file *filp,
4198                          unsigned int ioctl, unsigned long arg)
4199 {
4200         struct kvm_vcpu *vcpu = filp->private_data;
4201         void __user *argp = (void __user *)arg;
4202         int r;
4203         union {
4204                 struct kvm_lapic_state *lapic;
4205                 struct kvm_xsave *xsave;
4206                 struct kvm_xcrs *xcrs;
4207                 void *buffer;
4208         } u;
4209
4210         vcpu_load(vcpu);
4211
4212         u.buffer = NULL;
4213         switch (ioctl) {
4214         case KVM_GET_LAPIC: {
4215                 r = -EINVAL;
4216                 if (!lapic_in_kernel(vcpu))
4217                         goto out;
4218                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
4219                                 GFP_KERNEL_ACCOUNT);
4220
4221                 r = -ENOMEM;
4222                 if (!u.lapic)
4223                         goto out;
4224                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
4225                 if (r)
4226                         goto out;
4227                 r = -EFAULT;
4228                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
4229                         goto out;
4230                 r = 0;
4231                 break;
4232         }
4233         case KVM_SET_LAPIC: {
4234                 r = -EINVAL;
4235                 if (!lapic_in_kernel(vcpu))
4236                         goto out;
4237                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
4238                 if (IS_ERR(u.lapic)) {
4239                         r = PTR_ERR(u.lapic);
4240                         goto out_nofree;
4241                 }
4242
4243                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
4244                 break;
4245         }
4246         case KVM_INTERRUPT: {
4247                 struct kvm_interrupt irq;
4248
4249                 r = -EFAULT;
4250                 if (copy_from_user(&irq, argp, sizeof(irq)))
4251                         goto out;
4252                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
4253                 break;
4254         }
4255         case KVM_NMI: {
4256                 r = kvm_vcpu_ioctl_nmi(vcpu);
4257                 break;
4258         }
4259         case KVM_SMI: {
4260                 r = kvm_vcpu_ioctl_smi(vcpu);
4261                 break;
4262         }
4263         case KVM_SET_CPUID: {
4264                 struct kvm_cpuid __user *cpuid_arg = argp;
4265                 struct kvm_cpuid cpuid;
4266
4267                 r = -EFAULT;
4268                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4269                         goto out;
4270                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4271                 break;
4272         }
4273         case KVM_SET_CPUID2: {
4274                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4275                 struct kvm_cpuid2 cpuid;
4276
4277                 r = -EFAULT;
4278                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4279                         goto out;
4280                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
4281                                               cpuid_arg->entries);
4282                 break;
4283         }
4284         case KVM_GET_CPUID2: {
4285                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4286                 struct kvm_cpuid2 cpuid;
4287
4288                 r = -EFAULT;
4289                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4290                         goto out;
4291                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
4292                                               cpuid_arg->entries);
4293                 if (r)
4294                         goto out;
4295                 r = -EFAULT;
4296                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4297                         goto out;
4298                 r = 0;
4299                 break;
4300         }
4301         case KVM_GET_MSRS: {
4302                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4303                 r = msr_io(vcpu, argp, do_get_msr, 1);
4304                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4305                 break;
4306         }
4307         case KVM_SET_MSRS: {
4308                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4309                 r = msr_io(vcpu, argp, do_set_msr, 0);
4310                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4311                 break;
4312         }
4313         case KVM_TPR_ACCESS_REPORTING: {
4314                 struct kvm_tpr_access_ctl tac;
4315
4316                 r = -EFAULT;
4317                 if (copy_from_user(&tac, argp, sizeof(tac)))
4318                         goto out;
4319                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
4320                 if (r)
4321                         goto out;
4322                 r = -EFAULT;
4323                 if (copy_to_user(argp, &tac, sizeof(tac)))
4324                         goto out;
4325                 r = 0;
4326                 break;
4327         };
4328         case KVM_SET_VAPIC_ADDR: {
4329                 struct kvm_vapic_addr va;
4330                 int idx;
4331
4332                 r = -EINVAL;
4333                 if (!lapic_in_kernel(vcpu))
4334                         goto out;
4335                 r = -EFAULT;
4336                 if (copy_from_user(&va, argp, sizeof(va)))
4337                         goto out;
4338                 idx = srcu_read_lock(&vcpu->kvm->srcu);
4339                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
4340                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4341                 break;
4342         }
4343         case KVM_X86_SETUP_MCE: {
4344                 u64 mcg_cap;
4345
4346                 r = -EFAULT;
4347                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
4348                         goto out;
4349                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
4350                 break;
4351         }
4352         case KVM_X86_SET_MCE: {
4353                 struct kvm_x86_mce mce;
4354
4355                 r = -EFAULT;
4356                 if (copy_from_user(&mce, argp, sizeof(mce)))
4357                         goto out;
4358                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
4359                 break;
4360         }
4361         case KVM_GET_VCPU_EVENTS: {
4362                 struct kvm_vcpu_events events;
4363
4364                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
4365
4366                 r = -EFAULT;
4367                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
4368                         break;
4369                 r = 0;
4370                 break;
4371         }
4372         case KVM_SET_VCPU_EVENTS: {
4373                 struct kvm_vcpu_events events;
4374
4375                 r = -EFAULT;
4376                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
4377                         break;
4378
4379                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
4380                 break;
4381         }
4382         case KVM_GET_DEBUGREGS: {
4383                 struct kvm_debugregs dbgregs;
4384
4385                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
4386
4387                 r = -EFAULT;
4388                 if (copy_to_user(argp, &dbgregs,
4389                                  sizeof(struct kvm_debugregs)))
4390                         break;
4391                 r = 0;
4392                 break;
4393         }
4394         case KVM_SET_DEBUGREGS: {
4395                 struct kvm_debugregs dbgregs;
4396
4397                 r = -EFAULT;
4398                 if (copy_from_user(&dbgregs, argp,
4399                                    sizeof(struct kvm_debugregs)))
4400                         break;
4401
4402                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
4403                 break;
4404         }
4405         case KVM_GET_XSAVE: {
4406                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
4407                 r = -ENOMEM;
4408                 if (!u.xsave)
4409                         break;
4410
4411                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
4412
4413                 r = -EFAULT;
4414                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
4415                         break;
4416                 r = 0;
4417                 break;
4418         }
4419         case KVM_SET_XSAVE: {
4420                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
4421                 if (IS_ERR(u.xsave)) {
4422                         r = PTR_ERR(u.xsave);
4423                         goto out_nofree;
4424                 }
4425
4426                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
4427                 break;
4428         }
4429         case KVM_GET_XCRS: {
4430                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
4431                 r = -ENOMEM;
4432                 if (!u.xcrs)
4433                         break;
4434
4435                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
4436
4437                 r = -EFAULT;
4438                 if (copy_to_user(argp, u.xcrs,
4439                                  sizeof(struct kvm_xcrs)))
4440                         break;
4441                 r = 0;
4442                 break;
4443         }
4444         case KVM_SET_XCRS: {
4445                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
4446                 if (IS_ERR(u.xcrs)) {
4447                         r = PTR_ERR(u.xcrs);
4448                         goto out_nofree;
4449                 }
4450
4451                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
4452                 break;
4453         }
4454         case KVM_SET_TSC_KHZ: {
4455                 u32 user_tsc_khz;
4456
4457                 r = -EINVAL;
4458                 user_tsc_khz = (u32)arg;
4459
4460                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
4461                         goto out;
4462
4463                 if (user_tsc_khz == 0)
4464                         user_tsc_khz = tsc_khz;
4465
4466                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
4467                         r = 0;
4468
4469                 goto out;
4470         }
4471         case KVM_GET_TSC_KHZ: {
4472                 r = vcpu->arch.virtual_tsc_khz;
4473                 goto out;
4474         }
4475         case KVM_KVMCLOCK_CTRL: {
4476                 r = kvm_set_guest_paused(vcpu);
4477                 goto out;
4478         }
4479         case KVM_ENABLE_CAP: {
4480                 struct kvm_enable_cap cap;
4481
4482                 r = -EFAULT;
4483                 if (copy_from_user(&cap, argp, sizeof(cap)))
4484                         goto out;
4485                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
4486                 break;
4487         }
4488         case KVM_GET_NESTED_STATE: {
4489                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4490                 u32 user_data_size;
4491
4492                 r = -EINVAL;
4493                 if (!kvm_x86_ops->get_nested_state)
4494                         break;
4495
4496                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
4497                 r = -EFAULT;
4498                 if (get_user(user_data_size, &user_kvm_nested_state->size))
4499                         break;
4500
4501                 r = kvm_x86_ops->get_nested_state(vcpu, user_kvm_nested_state,
4502                                                   user_data_size);
4503                 if (r < 0)
4504                         break;
4505
4506                 if (r > user_data_size) {
4507                         if (put_user(r, &user_kvm_nested_state->size))
4508                                 r = -EFAULT;
4509                         else
4510                                 r = -E2BIG;
4511                         break;
4512                 }
4513
4514                 r = 0;
4515                 break;
4516         }
4517         case KVM_SET_NESTED_STATE: {
4518                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4519                 struct kvm_nested_state kvm_state;
4520                 int idx;
4521
4522                 r = -EINVAL;
4523                 if (!kvm_x86_ops->set_nested_state)
4524                         break;
4525
4526                 r = -EFAULT;
4527                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
4528                         break;
4529
4530                 r = -EINVAL;
4531                 if (kvm_state.size < sizeof(kvm_state))
4532                         break;
4533
4534                 if (kvm_state.flags &
4535                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
4536                       | KVM_STATE_NESTED_EVMCS))
4537                         break;
4538
4539                 /* nested_run_pending implies guest_mode.  */
4540                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
4541                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
4542                         break;
4543
4544                 idx = srcu_read_lock(&vcpu->kvm->srcu);
4545                 r = kvm_x86_ops->set_nested_state(vcpu, user_kvm_nested_state, &kvm_state);
4546                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4547                 break;
4548         }
4549         case KVM_GET_SUPPORTED_HV_CPUID: {
4550                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4551                 struct kvm_cpuid2 cpuid;
4552
4553                 r = -EFAULT;
4554                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4555                         goto out;
4556
4557                 r = kvm_vcpu_ioctl_get_hv_cpuid(vcpu, &cpuid,
4558                                                 cpuid_arg->entries);
4559                 if (r)
4560                         goto out;
4561
4562                 r = -EFAULT;
4563                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4564                         goto out;
4565                 r = 0;
4566                 break;
4567         }
4568         default:
4569                 r = -EINVAL;
4570         }
4571 out:
4572         kfree(u.buffer);
4573 out_nofree:
4574         vcpu_put(vcpu);
4575         return r;
4576 }
4577
4578 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
4579 {
4580         return VM_FAULT_SIGBUS;
4581 }
4582
4583 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
4584 {
4585         int ret;
4586
4587         if (addr > (unsigned int)(-3 * PAGE_SIZE))
4588                 return -EINVAL;
4589         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
4590         return ret;
4591 }
4592
4593 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
4594                                               u64 ident_addr)
4595 {
4596         return kvm_x86_ops->set_identity_map_addr(kvm, ident_addr);
4597 }
4598
4599 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
4600                                          unsigned long kvm_nr_mmu_pages)
4601 {
4602         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
4603                 return -EINVAL;
4604
4605         mutex_lock(&kvm->slots_lock);
4606
4607         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
4608         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
4609
4610         mutex_unlock(&kvm->slots_lock);
4611         return 0;
4612 }
4613
4614 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
4615 {
4616         return kvm->arch.n_max_mmu_pages;
4617 }
4618
4619 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
4620 {
4621         struct kvm_pic *pic = kvm->arch.vpic;
4622         int r;
4623
4624         r = 0;
4625         switch (chip->chip_id) {
4626         case KVM_IRQCHIP_PIC_MASTER:
4627                 memcpy(&chip->chip.pic, &pic->pics[0],
4628                         sizeof(struct kvm_pic_state));
4629                 break;
4630         case KVM_IRQCHIP_PIC_SLAVE:
4631                 memcpy(&chip->chip.pic, &pic->pics[1],
4632                         sizeof(struct kvm_pic_state));
4633                 break;
4634         case KVM_IRQCHIP_IOAPIC:
4635                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
4636                 break;
4637         default:
4638                 r = -EINVAL;
4639                 break;
4640         }
4641         return r;
4642 }
4643
4644 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
4645 {
4646         struct kvm_pic *pic = kvm->arch.vpic;
4647         int r;
4648
4649         r = 0;
4650         switch (chip->chip_id) {
4651         case KVM_IRQCHIP_PIC_MASTER:
4652                 spin_lock(&pic->lock);
4653                 memcpy(&pic->pics[0], &chip->chip.pic,
4654                         sizeof(struct kvm_pic_state));
4655                 spin_unlock(&pic->lock);
4656                 break;
4657         case KVM_IRQCHIP_PIC_SLAVE:
4658                 spin_lock(&pic->lock);
4659                 memcpy(&pic->pics[1], &chip->chip.pic,
4660                         sizeof(struct kvm_pic_state));
4661                 spin_unlock(&pic->lock);
4662                 break;
4663         case KVM_IRQCHIP_IOAPIC:
4664                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
4665                 break;
4666         default:
4667                 r = -EINVAL;
4668                 break;
4669         }
4670         kvm_pic_update_irq(pic);
4671         return r;
4672 }
4673
4674 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4675 {
4676         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
4677
4678         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
4679
4680         mutex_lock(&kps->lock);
4681         memcpy(ps, &kps->channels, sizeof(*ps));
4682         mutex_unlock(&kps->lock);
4683         return 0;
4684 }
4685
4686 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4687 {
4688         int i;
4689         struct kvm_pit *pit = kvm->arch.vpit;
4690
4691         mutex_lock(&pit->pit_state.lock);
4692         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
4693         for (i = 0; i < 3; i++)
4694                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
4695         mutex_unlock(&pit->pit_state.lock);
4696         return 0;
4697 }
4698
4699 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4700 {
4701         mutex_lock(&kvm->arch.vpit->pit_state.lock);
4702         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
4703                 sizeof(ps->channels));
4704         ps->flags = kvm->arch.vpit->pit_state.flags;
4705         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
4706         memset(&ps->reserved, 0, sizeof(ps->reserved));
4707         return 0;
4708 }
4709
4710 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4711 {
4712         int start = 0;
4713         int i;
4714         u32 prev_legacy, cur_legacy;
4715         struct kvm_pit *pit = kvm->arch.vpit;
4716
4717         mutex_lock(&pit->pit_state.lock);
4718         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
4719         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
4720         if (!prev_legacy && cur_legacy)
4721                 start = 1;
4722         memcpy(&pit->pit_state.channels, &ps->channels,
4723                sizeof(pit->pit_state.channels));
4724         pit->pit_state.flags = ps->flags;
4725         for (i = 0; i < 3; i++)
4726                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
4727                                    start && i == 0);
4728         mutex_unlock(&pit->pit_state.lock);
4729         return 0;
4730 }
4731
4732 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
4733                                  struct kvm_reinject_control *control)
4734 {
4735         struct kvm_pit *pit = kvm->arch.vpit;
4736
4737         /* pit->pit_state.lock was overloaded to prevent userspace from getting
4738          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
4739          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
4740          */
4741         mutex_lock(&pit->pit_state.lock);
4742         kvm_pit_set_reinject(pit, control->pit_reinject);
4743         mutex_unlock(&pit->pit_state.lock);
4744
4745         return 0;
4746 }
4747
4748 /**
4749  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
4750  * @kvm: kvm instance
4751  * @log: slot id and address to which we copy the log
4752  *
4753  * Steps 1-4 below provide general overview of dirty page logging. See
4754  * kvm_get_dirty_log_protect() function description for additional details.
4755  *
4756  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
4757  * always flush the TLB (step 4) even if previous step failed  and the dirty
4758  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
4759  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
4760  * writes will be marked dirty for next log read.
4761  *
4762  *   1. Take a snapshot of the bit and clear it if needed.
4763  *   2. Write protect the corresponding page.
4764  *   3. Copy the snapshot to the userspace.
4765  *   4. Flush TLB's if needed.
4766  */
4767 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
4768 {
4769         bool flush = false;
4770         int r;
4771
4772         mutex_lock(&kvm->slots_lock);
4773
4774         /*
4775          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4776          */
4777         if (kvm_x86_ops->flush_log_dirty)
4778                 kvm_x86_ops->flush_log_dirty(kvm);
4779
4780         r = kvm_get_dirty_log_protect(kvm, log, &flush);
4781
4782         /*
4783          * All the TLBs can be flushed out of mmu lock, see the comments in
4784          * kvm_mmu_slot_remove_write_access().
4785          */
4786         lockdep_assert_held(&kvm->slots_lock);
4787         if (flush)
4788                 kvm_flush_remote_tlbs(kvm);
4789
4790         mutex_unlock(&kvm->slots_lock);
4791         return r;
4792 }
4793
4794 int kvm_vm_ioctl_clear_dirty_log(struct kvm *kvm, struct kvm_clear_dirty_log *log)
4795 {
4796         bool flush = false;
4797         int r;
4798
4799         mutex_lock(&kvm->slots_lock);
4800
4801         /*
4802          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4803          */
4804         if (kvm_x86_ops->flush_log_dirty)
4805                 kvm_x86_ops->flush_log_dirty(kvm);
4806
4807         r = kvm_clear_dirty_log_protect(kvm, log, &flush);
4808
4809         /*
4810          * All the TLBs can be flushed out of mmu lock, see the comments in
4811          * kvm_mmu_slot_remove_write_access().
4812          */
4813         lockdep_assert_held(&kvm->slots_lock);
4814         if (flush)
4815                 kvm_flush_remote_tlbs(kvm);
4816
4817         mutex_unlock(&kvm->slots_lock);
4818         return r;
4819 }
4820
4821 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
4822                         bool line_status)
4823 {
4824         if (!irqchip_in_kernel(kvm))
4825                 return -ENXIO;
4826
4827         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
4828                                         irq_event->irq, irq_event->level,
4829                                         line_status);
4830         return 0;
4831 }
4832
4833 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
4834                             struct kvm_enable_cap *cap)
4835 {
4836         int r;
4837
4838         if (cap->flags)
4839                 return -EINVAL;
4840
4841         switch (cap->cap) {
4842         case KVM_CAP_DISABLE_QUIRKS:
4843                 kvm->arch.disabled_quirks = cap->args[0];
4844                 r = 0;
4845                 break;
4846         case KVM_CAP_SPLIT_IRQCHIP: {
4847                 mutex_lock(&kvm->lock);
4848                 r = -EINVAL;
4849                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
4850                         goto split_irqchip_unlock;
4851                 r = -EEXIST;
4852                 if (irqchip_in_kernel(kvm))
4853                         goto split_irqchip_unlock;
4854                 if (kvm->created_vcpus)
4855                         goto split_irqchip_unlock;
4856                 r = kvm_setup_empty_irq_routing(kvm);
4857                 if (r)
4858                         goto split_irqchip_unlock;
4859                 /* Pairs with irqchip_in_kernel. */
4860                 smp_wmb();
4861                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
4862                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
4863                 r = 0;
4864 split_irqchip_unlock:
4865                 mutex_unlock(&kvm->lock);
4866                 break;
4867         }
4868         case KVM_CAP_X2APIC_API:
4869                 r = -EINVAL;
4870                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
4871                         break;
4872
4873                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
4874                         kvm->arch.x2apic_format = true;
4875                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
4876                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
4877
4878                 r = 0;
4879                 break;
4880         case KVM_CAP_X86_DISABLE_EXITS:
4881                 r = -EINVAL;
4882                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
4883                         break;
4884
4885                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
4886                         kvm_can_mwait_in_guest())
4887                         kvm->arch.mwait_in_guest = true;
4888                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
4889                         kvm->arch.hlt_in_guest = true;
4890                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
4891                         kvm->arch.pause_in_guest = true;
4892                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
4893                         kvm->arch.cstate_in_guest = true;
4894                 r = 0;
4895                 break;
4896         case KVM_CAP_MSR_PLATFORM_INFO:
4897                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
4898                 r = 0;
4899                 break;
4900         case KVM_CAP_EXCEPTION_PAYLOAD:
4901                 kvm->arch.exception_payload_enabled = cap->args[0];
4902                 r = 0;
4903                 break;
4904         default:
4905                 r = -EINVAL;
4906                 break;
4907         }
4908         return r;
4909 }
4910
4911 long kvm_arch_vm_ioctl(struct file *filp,
4912                        unsigned int ioctl, unsigned long arg)
4913 {
4914         struct kvm *kvm = filp->private_data;
4915         void __user *argp = (void __user *)arg;
4916         int r = -ENOTTY;
4917         /*
4918          * This union makes it completely explicit to gcc-3.x
4919          * that these two variables' stack usage should be
4920          * combined, not added together.
4921          */
4922         union {
4923                 struct kvm_pit_state ps;
4924                 struct kvm_pit_state2 ps2;
4925                 struct kvm_pit_config pit_config;
4926         } u;
4927
4928         switch (ioctl) {
4929         case KVM_SET_TSS_ADDR:
4930                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
4931                 break;
4932         case KVM_SET_IDENTITY_MAP_ADDR: {
4933                 u64 ident_addr;
4934
4935                 mutex_lock(&kvm->lock);
4936                 r = -EINVAL;
4937                 if (kvm->created_vcpus)
4938                         goto set_identity_unlock;
4939                 r = -EFAULT;
4940                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
4941                         goto set_identity_unlock;
4942                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
4943 set_identity_unlock:
4944                 mutex_unlock(&kvm->lock);
4945                 break;
4946         }
4947         case KVM_SET_NR_MMU_PAGES:
4948                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
4949                 break;
4950         case KVM_GET_NR_MMU_PAGES:
4951                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
4952                 break;
4953         case KVM_CREATE_IRQCHIP: {
4954                 mutex_lock(&kvm->lock);
4955
4956                 r = -EEXIST;
4957                 if (irqchip_in_kernel(kvm))
4958                         goto create_irqchip_unlock;
4959
4960                 r = -EINVAL;
4961                 if (kvm->created_vcpus)
4962                         goto create_irqchip_unlock;
4963
4964                 r = kvm_pic_init(kvm);
4965                 if (r)
4966                         goto create_irqchip_unlock;
4967
4968                 r = kvm_ioapic_init(kvm);
4969                 if (r) {
4970                         kvm_pic_destroy(kvm);
4971                         goto create_irqchip_unlock;
4972                 }
4973
4974                 r = kvm_setup_default_irq_routing(kvm);
4975                 if (r) {
4976                         kvm_ioapic_destroy(kvm);
4977                         kvm_pic_destroy(kvm);
4978                         goto create_irqchip_unlock;
4979                 }
4980                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4981                 smp_wmb();
4982                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
4983         create_irqchip_unlock:
4984                 mutex_unlock(&kvm->lock);
4985                 break;
4986         }
4987         case KVM_CREATE_PIT:
4988                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
4989                 goto create_pit;
4990         case KVM_CREATE_PIT2:
4991                 r = -EFAULT;
4992                 if (copy_from_user(&u.pit_config, argp,
4993                                    sizeof(struct kvm_pit_config)))
4994                         goto out;
4995         create_pit:
4996                 mutex_lock(&kvm->lock);
4997                 r = -EEXIST;
4998                 if (kvm->arch.vpit)
4999                         goto create_pit_unlock;
5000                 r = -ENOMEM;
5001                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
5002                 if (kvm->arch.vpit)
5003                         r = 0;
5004         create_pit_unlock:
5005                 mutex_unlock(&kvm->lock);
5006                 break;
5007         case KVM_GET_IRQCHIP: {
5008                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5009                 struct kvm_irqchip *chip;
5010
5011                 chip = memdup_user(argp, sizeof(*chip));
5012                 if (IS_ERR(chip)) {
5013                         r = PTR_ERR(chip);
5014                         goto out;
5015                 }
5016
5017                 r = -ENXIO;
5018                 if (!irqchip_kernel(kvm))
5019                         goto get_irqchip_out;
5020                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
5021                 if (r)
5022                         goto get_irqchip_out;
5023                 r = -EFAULT;
5024                 if (copy_to_user(argp, chip, sizeof(*chip)))
5025                         goto get_irqchip_out;
5026                 r = 0;
5027         get_irqchip_out:
5028                 kfree(chip);
5029                 break;
5030         }
5031         case KVM_SET_IRQCHIP: {
5032                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5033                 struct kvm_irqchip *chip;
5034
5035                 chip = memdup_user(argp, sizeof(*chip));
5036                 if (IS_ERR(chip)) {
5037                         r = PTR_ERR(chip);
5038                         goto out;
5039                 }
5040
5041                 r = -ENXIO;
5042                 if (!irqchip_kernel(kvm))
5043                         goto set_irqchip_out;
5044                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
5045         set_irqchip_out:
5046                 kfree(chip);
5047                 break;
5048         }
5049         case KVM_GET_PIT: {
5050                 r = -EFAULT;
5051                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
5052                         goto out;
5053                 r = -ENXIO;
5054                 if (!kvm->arch.vpit)
5055                         goto out;
5056                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
5057                 if (r)
5058                         goto out;
5059                 r = -EFAULT;
5060                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
5061                         goto out;
5062                 r = 0;
5063                 break;
5064         }
5065         case KVM_SET_PIT: {
5066                 r = -EFAULT;
5067                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
5068                         goto out;
5069                 r = -ENXIO;
5070                 if (!kvm->arch.vpit)
5071                         goto out;
5072                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
5073                 break;
5074         }
5075         case KVM_GET_PIT2: {
5076                 r = -ENXIO;
5077                 if (!kvm->arch.vpit)
5078                         goto out;
5079                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
5080                 if (r)
5081                         goto out;
5082                 r = -EFAULT;
5083                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
5084                         goto out;
5085                 r = 0;
5086                 break;
5087         }
5088         case KVM_SET_PIT2: {
5089                 r = -EFAULT;
5090                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
5091                         goto out;
5092                 r = -ENXIO;
5093                 if (!kvm->arch.vpit)
5094                         goto out;
5095                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
5096                 break;
5097         }
5098         case KVM_REINJECT_CONTROL: {
5099                 struct kvm_reinject_control control;
5100                 r =  -EFAULT;
5101                 if (copy_from_user(&control, argp, sizeof(control)))
5102                         goto out;
5103                 r = -ENXIO;
5104                 if (!kvm->arch.vpit)
5105                         goto out;
5106                 r = kvm_vm_ioctl_reinject(kvm, &control);
5107                 break;
5108         }
5109         case KVM_SET_BOOT_CPU_ID:
5110                 r = 0;
5111                 mutex_lock(&kvm->lock);
5112                 if (kvm->created_vcpus)
5113                         r = -EBUSY;
5114                 else
5115                         kvm->arch.bsp_vcpu_id = arg;
5116                 mutex_unlock(&kvm->lock);
5117                 break;
5118         case KVM_XEN_HVM_CONFIG: {
5119                 struct kvm_xen_hvm_config xhc;
5120                 r = -EFAULT;
5121                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
5122                         goto out;
5123                 r = -EINVAL;
5124                 if (xhc.flags)
5125                         goto out;
5126                 memcpy(&kvm->arch.xen_hvm_config, &xhc, sizeof(xhc));
5127                 r = 0;
5128                 break;
5129         }
5130         case KVM_SET_CLOCK: {
5131                 struct kvm_clock_data user_ns;
5132                 u64 now_ns;
5133
5134                 r = -EFAULT;
5135                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
5136                         goto out;
5137
5138                 r = -EINVAL;
5139                 if (user_ns.flags)
5140                         goto out;
5141
5142                 r = 0;
5143                 /*
5144                  * TODO: userspace has to take care of races with VCPU_RUN, so
5145                  * kvm_gen_update_masterclock() can be cut down to locked
5146                  * pvclock_update_vm_gtod_copy().
5147                  */
5148                 kvm_gen_update_masterclock(kvm);
5149                 now_ns = get_kvmclock_ns(kvm);
5150                 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
5151                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
5152                 break;
5153         }
5154         case KVM_GET_CLOCK: {
5155                 struct kvm_clock_data user_ns;
5156                 u64 now_ns;
5157
5158                 now_ns = get_kvmclock_ns(kvm);
5159                 user_ns.clock = now_ns;
5160                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
5161                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
5162
5163                 r = -EFAULT;
5164                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
5165                         goto out;
5166                 r = 0;
5167                 break;
5168         }
5169         case KVM_MEMORY_ENCRYPT_OP: {
5170                 r = -ENOTTY;
5171                 if (kvm_x86_ops->mem_enc_op)
5172                         r = kvm_x86_ops->mem_enc_op(kvm, argp);
5173                 break;
5174         }
5175         case KVM_MEMORY_ENCRYPT_REG_REGION: {
5176                 struct kvm_enc_region region;
5177
5178                 r = -EFAULT;
5179                 if (copy_from_user(&region, argp, sizeof(region)))
5180                         goto out;
5181
5182                 r = -ENOTTY;
5183                 if (kvm_x86_ops->mem_enc_reg_region)
5184                         r = kvm_x86_ops->mem_enc_reg_region(kvm, &region);
5185                 break;
5186         }
5187         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
5188                 struct kvm_enc_region region;
5189
5190                 r = -EFAULT;
5191                 if (copy_from_user(&region, argp, sizeof(region)))
5192                         goto out;
5193
5194                 r = -ENOTTY;
5195                 if (kvm_x86_ops->mem_enc_unreg_region)
5196                         r = kvm_x86_ops->mem_enc_unreg_region(kvm, &region);
5197                 break;
5198         }
5199         case KVM_HYPERV_EVENTFD: {
5200                 struct kvm_hyperv_eventfd hvevfd;
5201
5202                 r = -EFAULT;
5203                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
5204                         goto out;
5205                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
5206                 break;
5207         }
5208         case KVM_SET_PMU_EVENT_FILTER:
5209                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
5210                 break;
5211         default:
5212                 r = -ENOTTY;
5213         }
5214 out:
5215         return r;
5216 }
5217
5218 static void kvm_init_msr_list(void)
5219 {
5220         struct x86_pmu_capability x86_pmu;
5221         u32 dummy[2];
5222         unsigned i;
5223
5224         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
5225                          "Please update the fixed PMCs in msrs_to_saved_all[]");
5226
5227         perf_get_x86_pmu_capability(&x86_pmu);
5228
5229         num_msrs_to_save = 0;
5230         num_emulated_msrs = 0;
5231         num_msr_based_features = 0;
5232
5233         for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
5234                 if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
5235                         continue;
5236
5237                 /*
5238                  * Even MSRs that are valid in the host may not be exposed
5239                  * to the guests in some cases.
5240                  */
5241                 switch (msrs_to_save_all[i]) {
5242                 case MSR_IA32_BNDCFGS:
5243                         if (!kvm_mpx_supported())
5244                                 continue;
5245                         break;
5246                 case MSR_TSC_AUX:
5247                         if (!kvm_x86_ops->rdtscp_supported())
5248                                 continue;
5249                         break;
5250                 case MSR_IA32_RTIT_CTL:
5251                 case MSR_IA32_RTIT_STATUS:
5252                         if (!kvm_x86_ops->pt_supported())
5253                                 continue;
5254                         break;
5255                 case MSR_IA32_RTIT_CR3_MATCH:
5256                         if (!kvm_x86_ops->pt_supported() ||
5257                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
5258                                 continue;
5259                         break;
5260                 case MSR_IA32_RTIT_OUTPUT_BASE:
5261                 case MSR_IA32_RTIT_OUTPUT_MASK:
5262                         if (!kvm_x86_ops->pt_supported() ||
5263                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
5264                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
5265                                 continue;
5266                         break;
5267                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B: {
5268                         if (!kvm_x86_ops->pt_supported() ||
5269                                 msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
5270                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
5271                                 continue;
5272                         break;
5273                 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
5274                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
5275                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
5276                                 continue;
5277                         break;
5278                 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
5279                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
5280                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
5281                                 continue;
5282                 }
5283                 default:
5284                         break;
5285                 }
5286
5287                 msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
5288         }
5289
5290         for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
5291                 if (!kvm_x86_ops->has_emulated_msr(emulated_msrs_all[i]))
5292                         continue;
5293
5294                 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
5295         }
5296
5297         for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
5298                 struct kvm_msr_entry msr;
5299
5300                 msr.index = msr_based_features_all[i];
5301                 if (kvm_get_msr_feature(&msr))
5302                         continue;
5303
5304                 msr_based_features[num_msr_based_features++] = msr_based_features_all[i];
5305         }
5306 }
5307
5308 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
5309                            const void *v)
5310 {
5311         int handled = 0;
5312         int n;
5313
5314         do {
5315                 n = min(len, 8);
5316                 if (!(lapic_in_kernel(vcpu) &&
5317                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
5318                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
5319                         break;
5320                 handled += n;
5321                 addr += n;
5322                 len -= n;
5323                 v += n;
5324         } while (len);
5325
5326         return handled;
5327 }
5328
5329 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
5330 {
5331         int handled = 0;
5332         int n;
5333
5334         do {
5335                 n = min(len, 8);
5336                 if (!(lapic_in_kernel(vcpu) &&
5337                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
5338                                          addr, n, v))
5339                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
5340                         break;
5341                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
5342                 handled += n;
5343                 addr += n;
5344                 len -= n;
5345                 v += n;
5346         } while (len);
5347
5348         return handled;
5349 }
5350
5351 static void kvm_set_segment(struct kvm_vcpu *vcpu,
5352                         struct kvm_segment *var, int seg)
5353 {
5354         kvm_x86_ops->set_segment(vcpu, var, seg);
5355 }
5356
5357 void kvm_get_segment(struct kvm_vcpu *vcpu,
5358                      struct kvm_segment *var, int seg)
5359 {
5360         kvm_x86_ops->get_segment(vcpu, var, seg);
5361 }
5362
5363 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
5364                            struct x86_exception *exception)
5365 {
5366         gpa_t t_gpa;
5367
5368         BUG_ON(!mmu_is_nested(vcpu));
5369
5370         /* NPT walks are always user-walks */
5371         access |= PFERR_USER_MASK;
5372         t_gpa  = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
5373
5374         return t_gpa;
5375 }
5376
5377 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
5378                               struct x86_exception *exception)
5379 {
5380         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5381         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5382 }
5383
5384  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
5385                                 struct x86_exception *exception)
5386 {
5387         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5388         access |= PFERR_FETCH_MASK;
5389         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5390 }
5391
5392 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
5393                                struct x86_exception *exception)
5394 {
5395         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5396         access |= PFERR_WRITE_MASK;
5397         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5398 }
5399
5400 /* uses this to access any guest's mapped memory without checking CPL */
5401 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
5402                                 struct x86_exception *exception)
5403 {
5404         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
5405 }
5406
5407 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
5408                                       struct kvm_vcpu *vcpu, u32 access,
5409                                       struct x86_exception *exception)
5410 {
5411         void *data = val;
5412         int r = X86EMUL_CONTINUE;
5413
5414         while (bytes) {
5415                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
5416                                                             exception);
5417                 unsigned offset = addr & (PAGE_SIZE-1);
5418                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
5419                 int ret;
5420
5421                 if (gpa == UNMAPPED_GVA)
5422                         return X86EMUL_PROPAGATE_FAULT;
5423                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
5424                                                offset, toread);
5425                 if (ret < 0) {
5426                         r = X86EMUL_IO_NEEDED;
5427                         goto out;
5428                 }
5429
5430                 bytes -= toread;
5431                 data += toread;
5432                 addr += toread;
5433         }
5434 out:
5435         return r;
5436 }
5437
5438 /* used for instruction fetching */
5439 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
5440                                 gva_t addr, void *val, unsigned int bytes,
5441                                 struct x86_exception *exception)
5442 {
5443         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5444         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5445         unsigned offset;
5446         int ret;
5447
5448         /* Inline kvm_read_guest_virt_helper for speed.  */
5449         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
5450                                                     exception);
5451         if (unlikely(gpa == UNMAPPED_GVA))
5452                 return X86EMUL_PROPAGATE_FAULT;
5453
5454         offset = addr & (PAGE_SIZE-1);
5455         if (WARN_ON(offset + bytes > PAGE_SIZE))
5456                 bytes = (unsigned)PAGE_SIZE - offset;
5457         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
5458                                        offset, bytes);
5459         if (unlikely(ret < 0))
5460                 return X86EMUL_IO_NEEDED;
5461
5462         return X86EMUL_CONTINUE;
5463 }
5464
5465 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
5466                                gva_t addr, void *val, unsigned int bytes,
5467                                struct x86_exception *exception)
5468 {
5469         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5470
5471         /*
5472          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
5473          * is returned, but our callers are not ready for that and they blindly
5474          * call kvm_inject_page_fault.  Ensure that they at least do not leak
5475          * uninitialized kernel stack memory into cr2 and error code.
5476          */
5477         memset(exception, 0, sizeof(*exception));
5478         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
5479                                           exception);
5480 }
5481 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
5482
5483 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
5484                              gva_t addr, void *val, unsigned int bytes,
5485                              struct x86_exception *exception, bool system)
5486 {
5487         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5488         u32 access = 0;
5489
5490         if (!system && kvm_x86_ops->get_cpl(vcpu) == 3)
5491                 access |= PFERR_USER_MASK;
5492
5493         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
5494 }
5495
5496 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
5497                 unsigned long addr, void *val, unsigned int bytes)
5498 {
5499         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5500         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
5501
5502         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
5503 }
5504
5505 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
5506                                       struct kvm_vcpu *vcpu, u32 access,
5507                                       struct x86_exception *exception)
5508 {
5509         void *data = val;
5510         int r = X86EMUL_CONTINUE;
5511
5512         while (bytes) {
5513                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
5514                                                              access,
5515                                                              exception);
5516                 unsigned offset = addr & (PAGE_SIZE-1);
5517                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
5518                 int ret;
5519
5520                 if (gpa == UNMAPPED_GVA)
5521                         return X86EMUL_PROPAGATE_FAULT;
5522                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
5523                 if (ret < 0) {
5524                         r = X86EMUL_IO_NEEDED;
5525                         goto out;
5526                 }
5527
5528                 bytes -= towrite;
5529                 data += towrite;
5530                 addr += towrite;
5531         }
5532 out:
5533         return r;
5534 }
5535
5536 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
5537                               unsigned int bytes, struct x86_exception *exception,
5538                               bool system)
5539 {
5540         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5541         u32 access = PFERR_WRITE_MASK;
5542
5543         if (!system && kvm_x86_ops->get_cpl(vcpu) == 3)
5544                 access |= PFERR_USER_MASK;
5545
5546         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
5547                                            access, exception);
5548 }
5549
5550 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
5551                                 unsigned int bytes, struct x86_exception *exception)
5552 {
5553         /* kvm_write_guest_virt_system can pull in tons of pages. */
5554         vcpu->arch.l1tf_flush_l1d = true;
5555
5556         /*
5557          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
5558          * is returned, but our callers are not ready for that and they blindly
5559          * call kvm_inject_page_fault.  Ensure that they at least do not leak
5560          * uninitialized kernel stack memory into cr2 and error code.
5561          */
5562         memset(exception, 0, sizeof(*exception));
5563         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
5564                                            PFERR_WRITE_MASK, exception);
5565 }
5566 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
5567
5568 int handle_ud(struct kvm_vcpu *vcpu)
5569 {
5570         static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
5571         int emul_type = EMULTYPE_TRAP_UD;
5572         char sig[5]; /* ud2; .ascii "kvm" */
5573         struct x86_exception e;
5574
5575         if (force_emulation_prefix &&
5576             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
5577                                 sig, sizeof(sig), &e) == 0 &&
5578             memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
5579                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
5580                 emul_type = EMULTYPE_TRAP_UD_FORCED;
5581         }
5582
5583         return kvm_emulate_instruction(vcpu, emul_type);
5584 }
5585 EXPORT_SYMBOL_GPL(handle_ud);
5586
5587 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
5588                             gpa_t gpa, bool write)
5589 {
5590         /* For APIC access vmexit */
5591         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
5592                 return 1;
5593
5594         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
5595                 trace_vcpu_match_mmio(gva, gpa, write, true);
5596                 return 1;
5597         }
5598
5599         return 0;
5600 }
5601
5602 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
5603                                 gpa_t *gpa, struct x86_exception *exception,
5604                                 bool write)
5605 {
5606         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
5607                 | (write ? PFERR_WRITE_MASK : 0);
5608
5609         /*
5610          * currently PKRU is only applied to ept enabled guest so
5611          * there is no pkey in EPT page table for L1 guest or EPT
5612          * shadow page table for L2 guest.
5613          */
5614         if (vcpu_match_mmio_gva(vcpu, gva)
5615             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
5616                                  vcpu->arch.mmio_access, 0, access)) {
5617                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
5618                                         (gva & (PAGE_SIZE - 1));
5619                 trace_vcpu_match_mmio(gva, *gpa, write, false);
5620                 return 1;
5621         }
5622
5623         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5624
5625         if (*gpa == UNMAPPED_GVA)
5626                 return -1;
5627
5628         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
5629 }
5630
5631 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
5632                         const void *val, int bytes)
5633 {
5634         int ret;
5635
5636         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
5637         if (ret < 0)
5638                 return 0;
5639         kvm_page_track_write(vcpu, gpa, val, bytes);
5640         return 1;
5641 }
5642
5643 struct read_write_emulator_ops {
5644         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
5645                                   int bytes);
5646         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
5647                                   void *val, int bytes);
5648         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
5649                                int bytes, void *val);
5650         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
5651                                     void *val, int bytes);
5652         bool write;
5653 };
5654
5655 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
5656 {
5657         if (vcpu->mmio_read_completed) {
5658                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
5659                                vcpu->mmio_fragments[0].gpa, val);
5660                 vcpu->mmio_read_completed = 0;
5661                 return 1;
5662         }
5663
5664         return 0;
5665 }
5666
5667 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
5668                         void *val, int bytes)
5669 {
5670         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
5671 }
5672
5673 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
5674                          void *val, int bytes)
5675 {
5676         return emulator_write_phys(vcpu, gpa, val, bytes);
5677 }
5678
5679 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
5680 {
5681         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
5682         return vcpu_mmio_write(vcpu, gpa, bytes, val);
5683 }
5684
5685 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
5686                           void *val, int bytes)
5687 {
5688         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
5689         return X86EMUL_IO_NEEDED;
5690 }
5691
5692 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
5693                            void *val, int bytes)
5694 {
5695         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
5696
5697         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
5698         return X86EMUL_CONTINUE;
5699 }
5700
5701 static const struct read_write_emulator_ops read_emultor = {
5702         .read_write_prepare = read_prepare,
5703         .read_write_emulate = read_emulate,
5704         .read_write_mmio = vcpu_mmio_read,
5705         .read_write_exit_mmio = read_exit_mmio,
5706 };
5707
5708 static const struct read_write_emulator_ops write_emultor = {
5709         .read_write_emulate = write_emulate,
5710         .read_write_mmio = write_mmio,
5711         .read_write_exit_mmio = write_exit_mmio,
5712         .write = true,
5713 };
5714
5715 static int emulator_read_write_onepage(unsigned long addr, void *val,
5716                                        unsigned int bytes,
5717                                        struct x86_exception *exception,
5718                                        struct kvm_vcpu *vcpu,
5719                                        const struct read_write_emulator_ops *ops)
5720 {
5721         gpa_t gpa;
5722         int handled, ret;
5723         bool write = ops->write;
5724         struct kvm_mmio_fragment *frag;
5725         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5726
5727         /*
5728          * If the exit was due to a NPF we may already have a GPA.
5729          * If the GPA is present, use it to avoid the GVA to GPA table walk.
5730          * Note, this cannot be used on string operations since string
5731          * operation using rep will only have the initial GPA from the NPF
5732          * occurred.
5733          */
5734         if (vcpu->arch.gpa_available &&
5735             emulator_can_use_gpa(ctxt) &&
5736             (addr & ~PAGE_MASK) == (vcpu->arch.gpa_val & ~PAGE_MASK)) {
5737                 gpa = vcpu->arch.gpa_val;
5738                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
5739         } else {
5740                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
5741                 if (ret < 0)
5742                         return X86EMUL_PROPAGATE_FAULT;
5743         }
5744
5745         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
5746                 return X86EMUL_CONTINUE;
5747
5748         /*
5749          * Is this MMIO handled locally?
5750          */
5751         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
5752         if (handled == bytes)
5753                 return X86EMUL_CONTINUE;
5754
5755         gpa += handled;
5756         bytes -= handled;
5757         val += handled;
5758
5759         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
5760         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
5761         frag->gpa = gpa;
5762         frag->data = val;
5763         frag->len = bytes;
5764         return X86EMUL_CONTINUE;
5765 }
5766
5767 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
5768                         unsigned long addr,
5769                         void *val, unsigned int bytes,
5770                         struct x86_exception *exception,
5771                         const struct read_write_emulator_ops *ops)
5772 {
5773         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5774         gpa_t gpa;
5775         int rc;
5776
5777         if (ops->read_write_prepare &&
5778                   ops->read_write_prepare(vcpu, val, bytes))
5779                 return X86EMUL_CONTINUE;
5780
5781         vcpu->mmio_nr_fragments = 0;
5782
5783         /* Crossing a page boundary? */
5784         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
5785                 int now;
5786
5787                 now = -addr & ~PAGE_MASK;
5788                 rc = emulator_read_write_onepage(addr, val, now, exception,
5789                                                  vcpu, ops);
5790
5791                 if (rc != X86EMUL_CONTINUE)
5792                         return rc;
5793                 addr += now;
5794                 if (ctxt->mode != X86EMUL_MODE_PROT64)
5795                         addr = (u32)addr;
5796                 val += now;
5797                 bytes -= now;
5798         }
5799
5800         rc = emulator_read_write_onepage(addr, val, bytes, exception,
5801                                          vcpu, ops);
5802         if (rc != X86EMUL_CONTINUE)
5803                 return rc;
5804
5805         if (!vcpu->mmio_nr_fragments)
5806                 return rc;
5807
5808         gpa = vcpu->mmio_fragments[0].gpa;
5809
5810         vcpu->mmio_needed = 1;
5811         vcpu->mmio_cur_fragment = 0;
5812
5813         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
5814         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
5815         vcpu->run->exit_reason = KVM_EXIT_MMIO;
5816         vcpu->run->mmio.phys_addr = gpa;
5817
5818         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
5819 }
5820
5821 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
5822                                   unsigned long addr,
5823                                   void *val,
5824                                   unsigned int bytes,
5825                                   struct x86_exception *exception)
5826 {
5827         return emulator_read_write(ctxt, addr, val, bytes,
5828                                    exception, &read_emultor);
5829 }
5830
5831 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
5832                             unsigned long addr,
5833                             const void *val,
5834                             unsigned int bytes,
5835                             struct x86_exception *exception)
5836 {
5837         return emulator_read_write(ctxt, addr, (void *)val, bytes,
5838                                    exception, &write_emultor);
5839 }
5840
5841 #define CMPXCHG_TYPE(t, ptr, old, new) \
5842         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
5843
5844 #ifdef CONFIG_X86_64
5845 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
5846 #else
5847 #  define CMPXCHG64(ptr, old, new) \
5848         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
5849 #endif
5850
5851 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
5852                                      unsigned long addr,
5853                                      const void *old,
5854                                      const void *new,
5855                                      unsigned int bytes,
5856                                      struct x86_exception *exception)
5857 {
5858         struct kvm_host_map map;
5859         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5860         gpa_t gpa;
5861         char *kaddr;
5862         bool exchanged;
5863
5864         /* guests cmpxchg8b have to be emulated atomically */
5865         if (bytes > 8 || (bytes & (bytes - 1)))
5866                 goto emul_write;
5867
5868         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
5869
5870         if (gpa == UNMAPPED_GVA ||
5871             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
5872                 goto emul_write;
5873
5874         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
5875                 goto emul_write;
5876
5877         if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
5878                 goto emul_write;
5879
5880         kaddr = map.hva + offset_in_page(gpa);
5881
5882         switch (bytes) {
5883         case 1:
5884                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
5885                 break;
5886         case 2:
5887                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
5888                 break;
5889         case 4:
5890                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
5891                 break;
5892         case 8:
5893                 exchanged = CMPXCHG64(kaddr, old, new);
5894                 break;
5895         default:
5896                 BUG();
5897         }
5898
5899         kvm_vcpu_unmap(vcpu, &map, true);
5900
5901         if (!exchanged)
5902                 return X86EMUL_CMPXCHG_FAILED;
5903
5904         kvm_page_track_write(vcpu, gpa, new, bytes);
5905
5906         return X86EMUL_CONTINUE;
5907
5908 emul_write:
5909         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
5910
5911         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
5912 }
5913
5914 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
5915 {
5916         int r = 0, i;
5917
5918         for (i = 0; i < vcpu->arch.pio.count; i++) {
5919                 if (vcpu->arch.pio.in)
5920                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
5921                                             vcpu->arch.pio.size, pd);
5922                 else
5923                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
5924                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
5925                                              pd);
5926                 if (r)
5927                         break;
5928                 pd += vcpu->arch.pio.size;
5929         }
5930         return r;
5931 }
5932
5933 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
5934                                unsigned short port, void *val,
5935                                unsigned int count, bool in)
5936 {
5937         vcpu->arch.pio.port = port;
5938         vcpu->arch.pio.in = in;
5939         vcpu->arch.pio.count  = count;
5940         vcpu->arch.pio.size = size;
5941
5942         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
5943                 vcpu->arch.pio.count = 0;
5944                 return 1;
5945         }
5946
5947         vcpu->run->exit_reason = KVM_EXIT_IO;
5948         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
5949         vcpu->run->io.size = size;
5950         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
5951         vcpu->run->io.count = count;
5952         vcpu->run->io.port = port;
5953
5954         return 0;
5955 }
5956
5957 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
5958                                     int size, unsigned short port, void *val,
5959                                     unsigned int count)
5960 {
5961         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5962         int ret;
5963
5964         if (vcpu->arch.pio.count)
5965                 goto data_avail;
5966
5967         memset(vcpu->arch.pio_data, 0, size * count);
5968
5969         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
5970         if (ret) {
5971 data_avail:
5972                 memcpy(val, vcpu->arch.pio_data, size * count);
5973                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
5974                 vcpu->arch.pio.count = 0;
5975                 return 1;
5976         }
5977
5978         return 0;
5979 }
5980
5981 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
5982                                      int size, unsigned short port,
5983                                      const void *val, unsigned int count)
5984 {
5985         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5986
5987         memcpy(vcpu->arch.pio_data, val, size * count);
5988         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
5989         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
5990 }
5991
5992 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
5993 {
5994         return kvm_x86_ops->get_segment_base(vcpu, seg);
5995 }
5996
5997 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
5998 {
5999         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
6000 }
6001
6002 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
6003 {
6004         if (!need_emulate_wbinvd(vcpu))
6005                 return X86EMUL_CONTINUE;
6006
6007         if (kvm_x86_ops->has_wbinvd_exit()) {
6008                 int cpu = get_cpu();
6009
6010                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
6011                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
6012                                 wbinvd_ipi, NULL, 1);
6013                 put_cpu();
6014                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
6015         } else
6016                 wbinvd();
6017         return X86EMUL_CONTINUE;
6018 }
6019
6020 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
6021 {
6022         kvm_emulate_wbinvd_noskip(vcpu);
6023         return kvm_skip_emulated_instruction(vcpu);
6024 }
6025 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
6026
6027
6028
6029 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
6030 {
6031         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
6032 }
6033
6034 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
6035                            unsigned long *dest)
6036 {
6037         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
6038 }
6039
6040 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
6041                            unsigned long value)
6042 {
6043
6044         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
6045 }
6046
6047 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
6048 {
6049         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
6050 }
6051
6052 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
6053 {
6054         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6055         unsigned long value;
6056
6057         switch (cr) {
6058         case 0:
6059                 value = kvm_read_cr0(vcpu);
6060                 break;
6061         case 2:
6062                 value = vcpu->arch.cr2;
6063                 break;
6064         case 3:
6065                 value = kvm_read_cr3(vcpu);
6066                 break;
6067         case 4:
6068                 value = kvm_read_cr4(vcpu);
6069                 break;
6070         case 8:
6071                 value = kvm_get_cr8(vcpu);
6072                 break;
6073         default:
6074                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
6075                 return 0;
6076         }
6077
6078         return value;
6079 }
6080
6081 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
6082 {
6083         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6084         int res = 0;
6085
6086         switch (cr) {
6087         case 0:
6088                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
6089                 break;
6090         case 2:
6091                 vcpu->arch.cr2 = val;
6092                 break;
6093         case 3:
6094                 res = kvm_set_cr3(vcpu, val);
6095                 break;
6096         case 4:
6097                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
6098                 break;
6099         case 8:
6100                 res = kvm_set_cr8(vcpu, val);
6101                 break;
6102         default:
6103                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
6104                 res = -1;
6105         }
6106
6107         return res;
6108 }
6109
6110 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
6111 {
6112         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
6113 }
6114
6115 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6116 {
6117         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
6118 }
6119
6120 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6121 {
6122         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
6123 }
6124
6125 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6126 {
6127         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
6128 }
6129
6130 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6131 {
6132         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
6133 }
6134
6135 static unsigned long emulator_get_cached_segment_base(
6136         struct x86_emulate_ctxt *ctxt, int seg)
6137 {
6138         return get_segment_base(emul_to_vcpu(ctxt), seg);
6139 }
6140
6141 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
6142                                  struct desc_struct *desc, u32 *base3,
6143                                  int seg)
6144 {
6145         struct kvm_segment var;
6146
6147         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
6148         *selector = var.selector;
6149
6150         if (var.unusable) {
6151                 memset(desc, 0, sizeof(*desc));
6152                 if (base3)
6153                         *base3 = 0;
6154                 return false;
6155         }
6156
6157         if (var.g)
6158                 var.limit >>= 12;
6159         set_desc_limit(desc, var.limit);
6160         set_desc_base(desc, (unsigned long)var.base);
6161 #ifdef CONFIG_X86_64
6162         if (base3)
6163                 *base3 = var.base >> 32;
6164 #endif
6165         desc->type = var.type;
6166         desc->s = var.s;
6167         desc->dpl = var.dpl;
6168         desc->p = var.present;
6169         desc->avl = var.avl;
6170         desc->l = var.l;
6171         desc->d = var.db;
6172         desc->g = var.g;
6173
6174         return true;
6175 }
6176
6177 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
6178                                  struct desc_struct *desc, u32 base3,
6179                                  int seg)
6180 {
6181         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6182         struct kvm_segment var;
6183
6184         var.selector = selector;
6185         var.base = get_desc_base(desc);
6186 #ifdef CONFIG_X86_64
6187         var.base |= ((u64)base3) << 32;
6188 #endif
6189         var.limit = get_desc_limit(desc);
6190         if (desc->g)
6191                 var.limit = (var.limit << 12) | 0xfff;
6192         var.type = desc->type;
6193         var.dpl = desc->dpl;
6194         var.db = desc->d;
6195         var.s = desc->s;
6196         var.l = desc->l;
6197         var.g = desc->g;
6198         var.avl = desc->avl;
6199         var.present = desc->p;
6200         var.unusable = !var.present;
6201         var.padding = 0;
6202
6203         kvm_set_segment(vcpu, &var, seg);
6204         return;
6205 }
6206
6207 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
6208                             u32 msr_index, u64 *pdata)
6209 {
6210         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
6211 }
6212
6213 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
6214                             u32 msr_index, u64 data)
6215 {
6216         return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
6217 }
6218
6219 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
6220 {
6221         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6222
6223         return vcpu->arch.smbase;
6224 }
6225
6226 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
6227 {
6228         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6229
6230         vcpu->arch.smbase = smbase;
6231 }
6232
6233 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
6234                               u32 pmc)
6235 {
6236         return kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc);
6237 }
6238
6239 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
6240                              u32 pmc, u64 *pdata)
6241 {
6242         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
6243 }
6244
6245 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
6246 {
6247         emul_to_vcpu(ctxt)->arch.halt_request = 1;
6248 }
6249
6250 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
6251                               struct x86_instruction_info *info,
6252                               enum x86_intercept_stage stage)
6253 {
6254         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
6255 }
6256
6257 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
6258                         u32 *eax, u32 *ebx, u32 *ecx, u32 *edx, bool check_limit)
6259 {
6260         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, check_limit);
6261 }
6262
6263 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
6264 {
6265         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
6266 }
6267
6268 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
6269 {
6270         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
6271 }
6272
6273 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
6274 {
6275         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
6276 }
6277
6278 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
6279 {
6280         return kvm_register_read(emul_to_vcpu(ctxt), reg);
6281 }
6282
6283 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
6284 {
6285         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
6286 }
6287
6288 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
6289 {
6290         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
6291 }
6292
6293 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
6294 {
6295         return emul_to_vcpu(ctxt)->arch.hflags;
6296 }
6297
6298 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
6299 {
6300         emul_to_vcpu(ctxt)->arch.hflags = emul_flags;
6301 }
6302
6303 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt,
6304                                   const char *smstate)
6305 {
6306         return kvm_x86_ops->pre_leave_smm(emul_to_vcpu(ctxt), smstate);
6307 }
6308
6309 static void emulator_post_leave_smm(struct x86_emulate_ctxt *ctxt)
6310 {
6311         kvm_smm_changed(emul_to_vcpu(ctxt));
6312 }
6313
6314 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
6315 {
6316         return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
6317 }
6318
6319 static const struct x86_emulate_ops emulate_ops = {
6320         .read_gpr            = emulator_read_gpr,
6321         .write_gpr           = emulator_write_gpr,
6322         .read_std            = emulator_read_std,
6323         .write_std           = emulator_write_std,
6324         .read_phys           = kvm_read_guest_phys_system,
6325         .fetch               = kvm_fetch_guest_virt,
6326         .read_emulated       = emulator_read_emulated,
6327         .write_emulated      = emulator_write_emulated,
6328         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
6329         .invlpg              = emulator_invlpg,
6330         .pio_in_emulated     = emulator_pio_in_emulated,
6331         .pio_out_emulated    = emulator_pio_out_emulated,
6332         .get_segment         = emulator_get_segment,
6333         .set_segment         = emulator_set_segment,
6334         .get_cached_segment_base = emulator_get_cached_segment_base,
6335         .get_gdt             = emulator_get_gdt,
6336         .get_idt             = emulator_get_idt,
6337         .set_gdt             = emulator_set_gdt,
6338         .set_idt             = emulator_set_idt,
6339         .get_cr              = emulator_get_cr,
6340         .set_cr              = emulator_set_cr,
6341         .cpl                 = emulator_get_cpl,
6342         .get_dr              = emulator_get_dr,
6343         .set_dr              = emulator_set_dr,
6344         .get_smbase          = emulator_get_smbase,
6345         .set_smbase          = emulator_set_smbase,
6346         .set_msr             = emulator_set_msr,
6347         .get_msr             = emulator_get_msr,
6348         .check_pmc           = emulator_check_pmc,
6349         .read_pmc            = emulator_read_pmc,
6350         .halt                = emulator_halt,
6351         .wbinvd              = emulator_wbinvd,
6352         .fix_hypercall       = emulator_fix_hypercall,
6353         .intercept           = emulator_intercept,
6354         .get_cpuid           = emulator_get_cpuid,
6355         .guest_has_long_mode = emulator_guest_has_long_mode,
6356         .guest_has_movbe     = emulator_guest_has_movbe,
6357         .guest_has_fxsr      = emulator_guest_has_fxsr,
6358         .set_nmi_mask        = emulator_set_nmi_mask,
6359         .get_hflags          = emulator_get_hflags,
6360         .set_hflags          = emulator_set_hflags,
6361         .pre_leave_smm       = emulator_pre_leave_smm,
6362         .post_leave_smm      = emulator_post_leave_smm,
6363         .set_xcr             = emulator_set_xcr,
6364 };
6365
6366 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
6367 {
6368         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
6369         /*
6370          * an sti; sti; sequence only disable interrupts for the first
6371          * instruction. So, if the last instruction, be it emulated or
6372          * not, left the system with the INT_STI flag enabled, it
6373          * means that the last instruction is an sti. We should not
6374          * leave the flag on in this case. The same goes for mov ss
6375          */
6376         if (int_shadow & mask)
6377                 mask = 0;
6378         if (unlikely(int_shadow || mask)) {
6379                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
6380                 if (!mask)
6381                         kvm_make_request(KVM_REQ_EVENT, vcpu);
6382         }
6383 }
6384
6385 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
6386 {
6387         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6388         if (ctxt->exception.vector == PF_VECTOR)
6389                 return kvm_propagate_fault(vcpu, &ctxt->exception);
6390
6391         if (ctxt->exception.error_code_valid)
6392                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
6393                                       ctxt->exception.error_code);
6394         else
6395                 kvm_queue_exception(vcpu, ctxt->exception.vector);
6396         return false;
6397 }
6398
6399 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
6400 {
6401         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6402         int cs_db, cs_l;
6403
6404         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
6405
6406         ctxt->eflags = kvm_get_rflags(vcpu);
6407         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
6408
6409         ctxt->eip = kvm_rip_read(vcpu);
6410         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
6411                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
6412                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
6413                      cs_db                              ? X86EMUL_MODE_PROT32 :
6414                                                           X86EMUL_MODE_PROT16;
6415         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
6416         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
6417         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
6418
6419         init_decode_cache(ctxt);
6420         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
6421 }
6422
6423 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
6424 {
6425         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6426         int ret;
6427
6428         init_emulate_ctxt(vcpu);
6429
6430         ctxt->op_bytes = 2;
6431         ctxt->ad_bytes = 2;
6432         ctxt->_eip = ctxt->eip + inc_eip;
6433         ret = emulate_int_real(ctxt, irq);
6434
6435         if (ret != X86EMUL_CONTINUE) {
6436                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
6437         } else {
6438                 ctxt->eip = ctxt->_eip;
6439                 kvm_rip_write(vcpu, ctxt->eip);
6440                 kvm_set_rflags(vcpu, ctxt->eflags);
6441         }
6442 }
6443 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
6444
6445 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
6446 {
6447         ++vcpu->stat.insn_emulation_fail;
6448         trace_kvm_emulate_insn_failed(vcpu);
6449
6450         if (emulation_type & EMULTYPE_VMWARE_GP) {
6451                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
6452                 return 1;
6453         }
6454
6455         if (emulation_type & EMULTYPE_SKIP) {
6456                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
6457                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
6458                 vcpu->run->internal.ndata = 0;
6459                 return 0;
6460         }
6461
6462         kvm_queue_exception(vcpu, UD_VECTOR);
6463
6464         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
6465                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
6466                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
6467                 vcpu->run->internal.ndata = 0;
6468                 return 0;
6469         }
6470
6471         return 1;
6472 }
6473
6474 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
6475                                   bool write_fault_to_shadow_pgtable,
6476                                   int emulation_type)
6477 {
6478         gpa_t gpa = cr2_or_gpa;
6479         kvm_pfn_t pfn;
6480
6481         if (!(emulation_type & EMULTYPE_ALLOW_RETRY))
6482                 return false;
6483
6484         if (WARN_ON_ONCE(is_guest_mode(vcpu)))
6485                 return false;
6486
6487         if (!vcpu->arch.mmu->direct_map) {
6488                 /*
6489                  * Write permission should be allowed since only
6490                  * write access need to be emulated.
6491                  */
6492                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
6493
6494                 /*
6495                  * If the mapping is invalid in guest, let cpu retry
6496                  * it to generate fault.
6497                  */
6498                 if (gpa == UNMAPPED_GVA)
6499                         return true;
6500         }
6501
6502         /*
6503          * Do not retry the unhandleable instruction if it faults on the
6504          * readonly host memory, otherwise it will goto a infinite loop:
6505          * retry instruction -> write #PF -> emulation fail -> retry
6506          * instruction -> ...
6507          */
6508         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
6509
6510         /*
6511          * If the instruction failed on the error pfn, it can not be fixed,
6512          * report the error to userspace.
6513          */
6514         if (is_error_noslot_pfn(pfn))
6515                 return false;
6516
6517         kvm_release_pfn_clean(pfn);
6518
6519         /* The instructions are well-emulated on direct mmu. */
6520         if (vcpu->arch.mmu->direct_map) {
6521                 unsigned int indirect_shadow_pages;
6522
6523                 spin_lock(&vcpu->kvm->mmu_lock);
6524                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
6525                 spin_unlock(&vcpu->kvm->mmu_lock);
6526
6527                 if (indirect_shadow_pages)
6528                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6529
6530                 return true;
6531         }
6532
6533         /*
6534          * if emulation was due to access to shadowed page table
6535          * and it failed try to unshadow page and re-enter the
6536          * guest to let CPU execute the instruction.
6537          */
6538         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6539
6540         /*
6541          * If the access faults on its page table, it can not
6542          * be fixed by unprotecting shadow page and it should
6543          * be reported to userspace.
6544          */
6545         return !write_fault_to_shadow_pgtable;
6546 }
6547
6548 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
6549                               gpa_t cr2_or_gpa,  int emulation_type)
6550 {
6551         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6552         unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
6553
6554         last_retry_eip = vcpu->arch.last_retry_eip;
6555         last_retry_addr = vcpu->arch.last_retry_addr;
6556
6557         /*
6558          * If the emulation is caused by #PF and it is non-page_table
6559          * writing instruction, it means the VM-EXIT is caused by shadow
6560          * page protected, we can zap the shadow page and retry this
6561          * instruction directly.
6562          *
6563          * Note: if the guest uses a non-page-table modifying instruction
6564          * on the PDE that points to the instruction, then we will unmap
6565          * the instruction and go to an infinite loop. So, we cache the
6566          * last retried eip and the last fault address, if we meet the eip
6567          * and the address again, we can break out of the potential infinite
6568          * loop.
6569          */
6570         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
6571
6572         if (!(emulation_type & EMULTYPE_ALLOW_RETRY))
6573                 return false;
6574
6575         if (WARN_ON_ONCE(is_guest_mode(vcpu)))
6576                 return false;
6577
6578         if (x86_page_table_writing_insn(ctxt))
6579                 return false;
6580
6581         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
6582                 return false;
6583
6584         vcpu->arch.last_retry_eip = ctxt->eip;
6585         vcpu->arch.last_retry_addr = cr2_or_gpa;
6586
6587         if (!vcpu->arch.mmu->direct_map)
6588                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
6589
6590         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6591
6592         return true;
6593 }
6594
6595 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
6596 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
6597
6598 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
6599 {
6600         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
6601                 /* This is a good place to trace that we are exiting SMM.  */
6602                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
6603
6604                 /* Process a latched INIT or SMI, if any.  */
6605                 kvm_make_request(KVM_REQ_EVENT, vcpu);
6606         }
6607
6608         kvm_mmu_reset_context(vcpu);
6609 }
6610
6611 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
6612                                 unsigned long *db)
6613 {
6614         u32 dr6 = 0;
6615         int i;
6616         u32 enable, rwlen;
6617
6618         enable = dr7;
6619         rwlen = dr7 >> 16;
6620         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
6621                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
6622                         dr6 |= (1 << i);
6623         return dr6;
6624 }
6625
6626 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
6627 {
6628         struct kvm_run *kvm_run = vcpu->run;
6629
6630         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
6631                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 | DR6_RTM;
6632                 kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
6633                 kvm_run->debug.arch.exception = DB_VECTOR;
6634                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
6635                 return 0;
6636         }
6637         kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
6638         return 1;
6639 }
6640
6641 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
6642 {
6643         unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
6644         int r;
6645
6646         r = kvm_x86_ops->skip_emulated_instruction(vcpu);
6647         if (unlikely(!r))
6648                 return 0;
6649
6650         /*
6651          * rflags is the old, "raw" value of the flags.  The new value has
6652          * not been saved yet.
6653          *
6654          * This is correct even for TF set by the guest, because "the
6655          * processor will not generate this exception after the instruction
6656          * that sets the TF flag".
6657          */
6658         if (unlikely(rflags & X86_EFLAGS_TF))
6659                 r = kvm_vcpu_do_singlestep(vcpu);
6660         return r;
6661 }
6662 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
6663
6664 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
6665 {
6666         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
6667             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
6668                 struct kvm_run *kvm_run = vcpu->run;
6669                 unsigned long eip = kvm_get_linear_rip(vcpu);
6670                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
6671                                            vcpu->arch.guest_debug_dr7,
6672                                            vcpu->arch.eff_db);
6673
6674                 if (dr6 != 0) {
6675                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
6676                         kvm_run->debug.arch.pc = eip;
6677                         kvm_run->debug.arch.exception = DB_VECTOR;
6678                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
6679                         *r = 0;
6680                         return true;
6681                 }
6682         }
6683
6684         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
6685             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
6686                 unsigned long eip = kvm_get_linear_rip(vcpu);
6687                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
6688                                            vcpu->arch.dr7,
6689                                            vcpu->arch.db);
6690
6691                 if (dr6 != 0) {
6692                         vcpu->arch.dr6 &= ~DR_TRAP_BITS;
6693                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
6694                         kvm_queue_exception(vcpu, DB_VECTOR);
6695                         *r = 1;
6696                         return true;
6697                 }
6698         }
6699
6700         return false;
6701 }
6702
6703 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
6704 {
6705         switch (ctxt->opcode_len) {
6706         case 1:
6707                 switch (ctxt->b) {
6708                 case 0xe4:      /* IN */
6709                 case 0xe5:
6710                 case 0xec:
6711                 case 0xed:
6712                 case 0xe6:      /* OUT */
6713                 case 0xe7:
6714                 case 0xee:
6715                 case 0xef:
6716                 case 0x6c:      /* INS */
6717                 case 0x6d:
6718                 case 0x6e:      /* OUTS */
6719                 case 0x6f:
6720                         return true;
6721                 }
6722                 break;
6723         case 2:
6724                 switch (ctxt->b) {
6725                 case 0x33:      /* RDPMC */
6726                         return true;
6727                 }
6728                 break;
6729         }
6730
6731         return false;
6732 }
6733
6734 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
6735                             int emulation_type, void *insn, int insn_len)
6736 {
6737         int r;
6738         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6739         bool writeback = true;
6740         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
6741
6742         vcpu->arch.l1tf_flush_l1d = true;
6743
6744         /*
6745          * Clear write_fault_to_shadow_pgtable here to ensure it is
6746          * never reused.
6747          */
6748         vcpu->arch.write_fault_to_shadow_pgtable = false;
6749         kvm_clear_exception_queue(vcpu);
6750
6751         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
6752                 init_emulate_ctxt(vcpu);
6753
6754                 /*
6755                  * We will reenter on the same instruction since
6756                  * we do not set complete_userspace_io.  This does not
6757                  * handle watchpoints yet, those would be handled in
6758                  * the emulate_ops.
6759                  */
6760                 if (!(emulation_type & EMULTYPE_SKIP) &&
6761                     kvm_vcpu_check_breakpoint(vcpu, &r))
6762                         return r;
6763
6764                 ctxt->interruptibility = 0;
6765                 ctxt->have_exception = false;
6766                 ctxt->exception.vector = -1;
6767                 ctxt->perm_ok = false;
6768
6769                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
6770
6771                 r = x86_decode_insn(ctxt, insn, insn_len);
6772
6773                 trace_kvm_emulate_insn_start(vcpu);
6774                 ++vcpu->stat.insn_emulation;
6775                 if (r != EMULATION_OK)  {
6776                         if ((emulation_type & EMULTYPE_TRAP_UD) ||
6777                             (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
6778                                 kvm_queue_exception(vcpu, UD_VECTOR);
6779                                 return 1;
6780                         }
6781                         if (reexecute_instruction(vcpu, cr2_or_gpa,
6782                                                   write_fault_to_spt,
6783                                                   emulation_type))
6784                                 return 1;
6785                         if (ctxt->have_exception) {
6786                                 /*
6787                                  * #UD should result in just EMULATION_FAILED, and trap-like
6788                                  * exception should not be encountered during decode.
6789                                  */
6790                                 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
6791                                              exception_type(ctxt->exception.vector) == EXCPT_TRAP);
6792                                 inject_emulated_exception(vcpu);
6793                                 return 1;
6794                         }
6795                         return handle_emulation_failure(vcpu, emulation_type);
6796                 }
6797         }
6798
6799         if ((emulation_type & EMULTYPE_VMWARE_GP) &&
6800             !is_vmware_backdoor_opcode(ctxt)) {
6801                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
6802                 return 1;
6803         }
6804
6805         /*
6806          * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
6807          * for kvm_skip_emulated_instruction().  The caller is responsible for
6808          * updating interruptibility state and injecting single-step #DBs.
6809          */
6810         if (emulation_type & EMULTYPE_SKIP) {
6811                 kvm_rip_write(vcpu, ctxt->_eip);
6812                 if (ctxt->eflags & X86_EFLAGS_RF)
6813                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
6814                 return 1;
6815         }
6816
6817         if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
6818                 return 1;
6819
6820         /* this is needed for vmware backdoor interface to work since it
6821            changes registers values  during IO operation */
6822         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
6823                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
6824                 emulator_invalidate_register_cache(ctxt);
6825         }
6826
6827 restart:
6828         /* Save the faulting GPA (cr2) in the address field */
6829         ctxt->exception.address = cr2_or_gpa;
6830
6831         r = x86_emulate_insn(ctxt);
6832
6833         if (r == EMULATION_INTERCEPTED)
6834                 return 1;
6835
6836         if (r == EMULATION_FAILED) {
6837                 if (reexecute_instruction(vcpu, cr2_or_gpa, write_fault_to_spt,
6838                                         emulation_type))
6839                         return 1;
6840
6841                 return handle_emulation_failure(vcpu, emulation_type);
6842         }
6843
6844         if (ctxt->have_exception) {
6845                 r = 1;
6846                 if (inject_emulated_exception(vcpu))
6847                         return r;
6848         } else if (vcpu->arch.pio.count) {
6849                 if (!vcpu->arch.pio.in) {
6850                         /* FIXME: return into emulator if single-stepping.  */
6851                         vcpu->arch.pio.count = 0;
6852                 } else {
6853                         writeback = false;
6854                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
6855                 }
6856                 r = 0;
6857         } else if (vcpu->mmio_needed) {
6858                 ++vcpu->stat.mmio_exits;
6859
6860                 if (!vcpu->mmio_is_write)
6861                         writeback = false;
6862                 r = 0;
6863                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6864         } else if (r == EMULATION_RESTART)
6865                 goto restart;
6866         else
6867                 r = 1;
6868
6869         if (writeback) {
6870                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
6871                 toggle_interruptibility(vcpu, ctxt->interruptibility);
6872                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6873                 if (!ctxt->have_exception ||
6874                     exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
6875                         kvm_rip_write(vcpu, ctxt->eip);
6876                         if (r && ctxt->tf)
6877                                 r = kvm_vcpu_do_singlestep(vcpu);
6878                         __kvm_set_rflags(vcpu, ctxt->eflags);
6879                 }
6880
6881                 /*
6882                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
6883                  * do nothing, and it will be requested again as soon as
6884                  * the shadow expires.  But we still need to check here,
6885                  * because POPF has no interrupt shadow.
6886                  */
6887                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
6888                         kvm_make_request(KVM_REQ_EVENT, vcpu);
6889         } else
6890                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
6891
6892         return r;
6893 }
6894
6895 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
6896 {
6897         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
6898 }
6899 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
6900
6901 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
6902                                         void *insn, int insn_len)
6903 {
6904         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
6905 }
6906 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
6907
6908 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
6909 {
6910         vcpu->arch.pio.count = 0;
6911         return 1;
6912 }
6913
6914 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
6915 {
6916         vcpu->arch.pio.count = 0;
6917
6918         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
6919                 return 1;
6920
6921         return kvm_skip_emulated_instruction(vcpu);
6922 }
6923
6924 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
6925                             unsigned short port)
6926 {
6927         unsigned long val = kvm_rax_read(vcpu);
6928         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
6929                                             size, port, &val, 1);
6930         if (ret)
6931                 return ret;
6932
6933         /*
6934          * Workaround userspace that relies on old KVM behavior of %rip being
6935          * incremented prior to exiting to userspace to handle "OUT 0x7e".
6936          */
6937         if (port == 0x7e &&
6938             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
6939                 vcpu->arch.complete_userspace_io =
6940                         complete_fast_pio_out_port_0x7e;
6941                 kvm_skip_emulated_instruction(vcpu);
6942         } else {
6943                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
6944                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
6945         }
6946         return 0;
6947 }
6948
6949 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
6950 {
6951         unsigned long val;
6952
6953         /* We should only ever be called with arch.pio.count equal to 1 */
6954         BUG_ON(vcpu->arch.pio.count != 1);
6955
6956         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
6957                 vcpu->arch.pio.count = 0;
6958                 return 1;
6959         }
6960
6961         /* For size less than 4 we merge, else we zero extend */
6962         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
6963
6964         /*
6965          * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
6966          * the copy and tracing
6967          */
6968         emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, vcpu->arch.pio.size,
6969                                  vcpu->arch.pio.port, &val, 1);
6970         kvm_rax_write(vcpu, val);
6971
6972         return kvm_skip_emulated_instruction(vcpu);
6973 }
6974
6975 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
6976                            unsigned short port)
6977 {
6978         unsigned long val;
6979         int ret;
6980
6981         /* For size less than 4 we merge, else we zero extend */
6982         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
6983
6984         ret = emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, size, port,
6985                                        &val, 1);
6986         if (ret) {
6987                 kvm_rax_write(vcpu, val);
6988                 return ret;
6989         }
6990
6991         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
6992         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
6993
6994         return 0;
6995 }
6996
6997 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
6998 {
6999         int ret;
7000
7001         if (in)
7002                 ret = kvm_fast_pio_in(vcpu, size, port);
7003         else
7004                 ret = kvm_fast_pio_out(vcpu, size, port);
7005         return ret && kvm_skip_emulated_instruction(vcpu);
7006 }
7007 EXPORT_SYMBOL_GPL(kvm_fast_pio);
7008
7009 static int kvmclock_cpu_down_prep(unsigned int cpu)
7010 {
7011         __this_cpu_write(cpu_tsc_khz, 0);
7012         return 0;
7013 }
7014
7015 static void tsc_khz_changed(void *data)
7016 {
7017         struct cpufreq_freqs *freq = data;
7018         unsigned long khz = 0;
7019
7020         if (data)
7021                 khz = freq->new;
7022         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
7023                 khz = cpufreq_quick_get(raw_smp_processor_id());
7024         if (!khz)
7025                 khz = tsc_khz;
7026         __this_cpu_write(cpu_tsc_khz, khz);
7027 }
7028
7029 #ifdef CONFIG_X86_64
7030 static void kvm_hyperv_tsc_notifier(void)
7031 {
7032         struct kvm *kvm;
7033         struct kvm_vcpu *vcpu;
7034         int cpu;
7035
7036         mutex_lock(&kvm_lock);
7037         list_for_each_entry(kvm, &vm_list, vm_list)
7038                 kvm_make_mclock_inprogress_request(kvm);
7039
7040         hyperv_stop_tsc_emulation();
7041
7042         /* TSC frequency always matches when on Hyper-V */
7043         for_each_present_cpu(cpu)
7044                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
7045         kvm_max_guest_tsc_khz = tsc_khz;
7046
7047         list_for_each_entry(kvm, &vm_list, vm_list) {
7048                 struct kvm_arch *ka = &kvm->arch;
7049
7050                 spin_lock(&ka->pvclock_gtod_sync_lock);
7051
7052                 pvclock_update_vm_gtod_copy(kvm);
7053
7054                 kvm_for_each_vcpu(cpu, vcpu, kvm)
7055                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7056
7057                 kvm_for_each_vcpu(cpu, vcpu, kvm)
7058                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
7059
7060                 spin_unlock(&ka->pvclock_gtod_sync_lock);
7061         }
7062         mutex_unlock(&kvm_lock);
7063 }
7064 #endif
7065
7066 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
7067 {
7068         struct kvm *kvm;
7069         struct kvm_vcpu *vcpu;
7070         int i, send_ipi = 0;
7071
7072         /*
7073          * We allow guests to temporarily run on slowing clocks,
7074          * provided we notify them after, or to run on accelerating
7075          * clocks, provided we notify them before.  Thus time never
7076          * goes backwards.
7077          *
7078          * However, we have a problem.  We can't atomically update
7079          * the frequency of a given CPU from this function; it is
7080          * merely a notifier, which can be called from any CPU.
7081          * Changing the TSC frequency at arbitrary points in time
7082          * requires a recomputation of local variables related to
7083          * the TSC for each VCPU.  We must flag these local variables
7084          * to be updated and be sure the update takes place with the
7085          * new frequency before any guests proceed.
7086          *
7087          * Unfortunately, the combination of hotplug CPU and frequency
7088          * change creates an intractable locking scenario; the order
7089          * of when these callouts happen is undefined with respect to
7090          * CPU hotplug, and they can race with each other.  As such,
7091          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
7092          * undefined; you can actually have a CPU frequency change take
7093          * place in between the computation of X and the setting of the
7094          * variable.  To protect against this problem, all updates of
7095          * the per_cpu tsc_khz variable are done in an interrupt
7096          * protected IPI, and all callers wishing to update the value
7097          * must wait for a synchronous IPI to complete (which is trivial
7098          * if the caller is on the CPU already).  This establishes the
7099          * necessary total order on variable updates.
7100          *
7101          * Note that because a guest time update may take place
7102          * anytime after the setting of the VCPU's request bit, the
7103          * correct TSC value must be set before the request.  However,
7104          * to ensure the update actually makes it to any guest which
7105          * starts running in hardware virtualization between the set
7106          * and the acquisition of the spinlock, we must also ping the
7107          * CPU after setting the request bit.
7108          *
7109          */
7110
7111         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
7112
7113         mutex_lock(&kvm_lock);
7114         list_for_each_entry(kvm, &vm_list, vm_list) {
7115                 kvm_for_each_vcpu(i, vcpu, kvm) {
7116                         if (vcpu->cpu != cpu)
7117                                 continue;
7118                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7119                         if (vcpu->cpu != raw_smp_processor_id())
7120                                 send_ipi = 1;
7121                 }
7122         }
7123         mutex_unlock(&kvm_lock);
7124
7125         if (freq->old < freq->new && send_ipi) {
7126                 /*
7127                  * We upscale the frequency.  Must make the guest
7128                  * doesn't see old kvmclock values while running with
7129                  * the new frequency, otherwise we risk the guest sees
7130                  * time go backwards.
7131                  *
7132                  * In case we update the frequency for another cpu
7133                  * (which might be in guest context) send an interrupt
7134                  * to kick the cpu out of guest context.  Next time
7135                  * guest context is entered kvmclock will be updated,
7136                  * so the guest will not see stale values.
7137                  */
7138                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
7139         }
7140 }
7141
7142 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
7143                                      void *data)
7144 {
7145         struct cpufreq_freqs *freq = data;
7146         int cpu;
7147
7148         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
7149                 return 0;
7150         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
7151                 return 0;
7152
7153         for_each_cpu(cpu, freq->policy->cpus)
7154                 __kvmclock_cpufreq_notifier(freq, cpu);
7155
7156         return 0;
7157 }
7158
7159 static struct notifier_block kvmclock_cpufreq_notifier_block = {
7160         .notifier_call  = kvmclock_cpufreq_notifier
7161 };
7162
7163 static int kvmclock_cpu_online(unsigned int cpu)
7164 {
7165         tsc_khz_changed(NULL);
7166         return 0;
7167 }
7168
7169 static void kvm_timer_init(void)
7170 {
7171         max_tsc_khz = tsc_khz;
7172
7173         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
7174 #ifdef CONFIG_CPU_FREQ
7175                 struct cpufreq_policy policy;
7176                 int cpu;
7177
7178                 memset(&policy, 0, sizeof(policy));
7179                 cpu = get_cpu();
7180                 cpufreq_get_policy(&policy, cpu);
7181                 if (policy.cpuinfo.max_freq)
7182                         max_tsc_khz = policy.cpuinfo.max_freq;
7183                 put_cpu();
7184 #endif
7185                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
7186                                           CPUFREQ_TRANSITION_NOTIFIER);
7187         }
7188
7189         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
7190                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
7191 }
7192
7193 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
7194 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
7195
7196 int kvm_is_in_guest(void)
7197 {
7198         return __this_cpu_read(current_vcpu) != NULL;
7199 }
7200
7201 static int kvm_is_user_mode(void)
7202 {
7203         int user_mode = 3;
7204
7205         if (__this_cpu_read(current_vcpu))
7206                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
7207
7208         return user_mode != 0;
7209 }
7210
7211 static unsigned long kvm_get_guest_ip(void)
7212 {
7213         unsigned long ip = 0;
7214
7215         if (__this_cpu_read(current_vcpu))
7216                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
7217
7218         return ip;
7219 }
7220
7221 static void kvm_handle_intel_pt_intr(void)
7222 {
7223         struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
7224
7225         kvm_make_request(KVM_REQ_PMI, vcpu);
7226         __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
7227                         (unsigned long *)&vcpu->arch.pmu.global_status);
7228 }
7229
7230 static struct perf_guest_info_callbacks kvm_guest_cbs = {
7231         .is_in_guest            = kvm_is_in_guest,
7232         .is_user_mode           = kvm_is_user_mode,
7233         .get_guest_ip           = kvm_get_guest_ip,
7234         .handle_intel_pt_intr   = kvm_handle_intel_pt_intr,
7235 };
7236
7237 #ifdef CONFIG_X86_64
7238 static void pvclock_gtod_update_fn(struct work_struct *work)
7239 {
7240         struct kvm *kvm;
7241
7242         struct kvm_vcpu *vcpu;
7243         int i;
7244
7245         mutex_lock(&kvm_lock);
7246         list_for_each_entry(kvm, &vm_list, vm_list)
7247                 kvm_for_each_vcpu(i, vcpu, kvm)
7248                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7249         atomic_set(&kvm_guest_has_master_clock, 0);
7250         mutex_unlock(&kvm_lock);
7251 }
7252
7253 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
7254
7255 /*
7256  * Notification about pvclock gtod data update.
7257  */
7258 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
7259                                void *priv)
7260 {
7261         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
7262         struct timekeeper *tk = priv;
7263
7264         update_pvclock_gtod(tk);
7265
7266         /* disable master clock if host does not trust, or does not
7267          * use, TSC based clocksource.
7268          */
7269         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
7270             atomic_read(&kvm_guest_has_master_clock) != 0)
7271                 queue_work(system_long_wq, &pvclock_gtod_work);
7272
7273         return 0;
7274 }
7275
7276 static struct notifier_block pvclock_gtod_notifier = {
7277         .notifier_call = pvclock_gtod_notify,
7278 };
7279 #endif
7280
7281 int kvm_arch_init(void *opaque)
7282 {
7283         int r;
7284         struct kvm_x86_ops *ops = opaque;
7285
7286         if (kvm_x86_ops) {
7287                 printk(KERN_ERR "kvm: already loaded the other module\n");
7288                 r = -EEXIST;
7289                 goto out;
7290         }
7291
7292         if (!ops->cpu_has_kvm_support()) {
7293                 printk(KERN_ERR "kvm: no hardware support\n");
7294                 r = -EOPNOTSUPP;
7295                 goto out;
7296         }
7297         if (ops->disabled_by_bios()) {
7298                 printk(KERN_ERR "kvm: disabled by bios\n");
7299                 r = -EOPNOTSUPP;
7300                 goto out;
7301         }
7302
7303         /*
7304          * KVM explicitly assumes that the guest has an FPU and
7305          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
7306          * vCPU's FPU state as a fxregs_state struct.
7307          */
7308         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
7309                 printk(KERN_ERR "kvm: inadequate fpu\n");
7310                 r = -EOPNOTSUPP;
7311                 goto out;
7312         }
7313
7314         r = -ENOMEM;
7315         x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
7316                                           __alignof__(struct fpu), SLAB_ACCOUNT,
7317                                           NULL);
7318         if (!x86_fpu_cache) {
7319                 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
7320                 goto out;
7321         }
7322
7323         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
7324         if (!shared_msrs) {
7325                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
7326                 goto out_free_x86_fpu_cache;
7327         }
7328
7329         r = kvm_mmu_module_init();
7330         if (r)
7331                 goto out_free_percpu;
7332
7333         kvm_x86_ops = ops;
7334
7335         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
7336                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
7337                         PT_PRESENT_MASK, 0, sme_me_mask);
7338         kvm_timer_init();
7339
7340         perf_register_guest_info_callbacks(&kvm_guest_cbs);
7341
7342         if (boot_cpu_has(X86_FEATURE_XSAVE))
7343                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
7344
7345         kvm_lapic_init();
7346         if (pi_inject_timer == -1)
7347                 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
7348 #ifdef CONFIG_X86_64
7349         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
7350
7351         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
7352                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
7353 #endif
7354
7355         return 0;
7356
7357 out_free_percpu:
7358         free_percpu(shared_msrs);
7359 out_free_x86_fpu_cache:
7360         kmem_cache_destroy(x86_fpu_cache);
7361 out:
7362         return r;
7363 }
7364
7365 void kvm_arch_exit(void)
7366 {
7367 #ifdef CONFIG_X86_64
7368         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
7369                 clear_hv_tscchange_cb();
7370 #endif
7371         kvm_lapic_exit();
7372         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
7373
7374         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
7375                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
7376                                             CPUFREQ_TRANSITION_NOTIFIER);
7377         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
7378 #ifdef CONFIG_X86_64
7379         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
7380 #endif
7381         kvm_x86_ops = NULL;
7382         kvm_mmu_module_exit();
7383         free_percpu(shared_msrs);
7384         kmem_cache_destroy(x86_fpu_cache);
7385 }
7386
7387 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
7388 {
7389         ++vcpu->stat.halt_exits;
7390         if (lapic_in_kernel(vcpu)) {
7391                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
7392                 return 1;
7393         } else {
7394                 vcpu->run->exit_reason = KVM_EXIT_HLT;
7395                 return 0;
7396         }
7397 }
7398 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
7399
7400 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
7401 {
7402         int ret = kvm_skip_emulated_instruction(vcpu);
7403         /*
7404          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
7405          * KVM_EXIT_DEBUG here.
7406          */
7407         return kvm_vcpu_halt(vcpu) && ret;
7408 }
7409 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
7410
7411 #ifdef CONFIG_X86_64
7412 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
7413                                 unsigned long clock_type)
7414 {
7415         struct kvm_clock_pairing clock_pairing;
7416         struct timespec64 ts;
7417         u64 cycle;
7418         int ret;
7419
7420         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
7421                 return -KVM_EOPNOTSUPP;
7422
7423         if (kvm_get_walltime_and_clockread(&ts, &cycle) == false)
7424                 return -KVM_EOPNOTSUPP;
7425
7426         clock_pairing.sec = ts.tv_sec;
7427         clock_pairing.nsec = ts.tv_nsec;
7428         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
7429         clock_pairing.flags = 0;
7430         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
7431
7432         ret = 0;
7433         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
7434                             sizeof(struct kvm_clock_pairing)))
7435                 ret = -KVM_EFAULT;
7436
7437         return ret;
7438 }
7439 #endif
7440
7441 /*
7442  * kvm_pv_kick_cpu_op:  Kick a vcpu.
7443  *
7444  * @apicid - apicid of vcpu to be kicked.
7445  */
7446 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
7447 {
7448         struct kvm_lapic_irq lapic_irq;
7449
7450         lapic_irq.shorthand = APIC_DEST_NOSHORT;
7451         lapic_irq.dest_mode = APIC_DEST_PHYSICAL;
7452         lapic_irq.level = 0;
7453         lapic_irq.dest_id = apicid;
7454         lapic_irq.msi_redir_hint = false;
7455
7456         lapic_irq.delivery_mode = APIC_DM_REMRD;
7457         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
7458 }
7459
7460 bool kvm_apicv_activated(struct kvm *kvm)
7461 {
7462         return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
7463 }
7464 EXPORT_SYMBOL_GPL(kvm_apicv_activated);
7465
7466 void kvm_apicv_init(struct kvm *kvm, bool enable)
7467 {
7468         if (enable)
7469                 clear_bit(APICV_INHIBIT_REASON_DISABLE,
7470                           &kvm->arch.apicv_inhibit_reasons);
7471         else
7472                 set_bit(APICV_INHIBIT_REASON_DISABLE,
7473                         &kvm->arch.apicv_inhibit_reasons);
7474 }
7475 EXPORT_SYMBOL_GPL(kvm_apicv_init);
7476
7477 static void kvm_sched_yield(struct kvm *kvm, unsigned long dest_id)
7478 {
7479         struct kvm_vcpu *target = NULL;
7480         struct kvm_apic_map *map;
7481
7482         rcu_read_lock();
7483         map = rcu_dereference(kvm->arch.apic_map);
7484
7485         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
7486                 target = map->phys_map[dest_id]->vcpu;
7487
7488         rcu_read_unlock();
7489
7490         if (target && READ_ONCE(target->ready))
7491                 kvm_vcpu_yield_to(target);
7492 }
7493
7494 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
7495 {
7496         unsigned long nr, a0, a1, a2, a3, ret;
7497         int op_64_bit;
7498
7499         if (kvm_hv_hypercall_enabled(vcpu->kvm))
7500                 return kvm_hv_hypercall(vcpu);
7501
7502         nr = kvm_rax_read(vcpu);
7503         a0 = kvm_rbx_read(vcpu);
7504         a1 = kvm_rcx_read(vcpu);
7505         a2 = kvm_rdx_read(vcpu);
7506         a3 = kvm_rsi_read(vcpu);
7507
7508         trace_kvm_hypercall(nr, a0, a1, a2, a3);
7509
7510         op_64_bit = is_64_bit_mode(vcpu);
7511         if (!op_64_bit) {
7512                 nr &= 0xFFFFFFFF;
7513                 a0 &= 0xFFFFFFFF;
7514                 a1 &= 0xFFFFFFFF;
7515                 a2 &= 0xFFFFFFFF;
7516                 a3 &= 0xFFFFFFFF;
7517         }
7518
7519         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
7520                 ret = -KVM_EPERM;
7521                 goto out;
7522         }
7523
7524         switch (nr) {
7525         case KVM_HC_VAPIC_POLL_IRQ:
7526                 ret = 0;
7527                 break;
7528         case KVM_HC_KICK_CPU:
7529                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
7530                 kvm_sched_yield(vcpu->kvm, a1);
7531                 ret = 0;
7532                 break;
7533 #ifdef CONFIG_X86_64
7534         case KVM_HC_CLOCK_PAIRING:
7535                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
7536                 break;
7537 #endif
7538         case KVM_HC_SEND_IPI:
7539                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
7540                 break;
7541         case KVM_HC_SCHED_YIELD:
7542                 kvm_sched_yield(vcpu->kvm, a0);
7543                 ret = 0;
7544                 break;
7545         default:
7546                 ret = -KVM_ENOSYS;
7547                 break;
7548         }
7549 out:
7550         if (!op_64_bit)
7551                 ret = (u32)ret;
7552         kvm_rax_write(vcpu, ret);
7553
7554         ++vcpu->stat.hypercalls;
7555         return kvm_skip_emulated_instruction(vcpu);
7556 }
7557 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
7558
7559 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
7560 {
7561         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7562         char instruction[3];
7563         unsigned long rip = kvm_rip_read(vcpu);
7564
7565         kvm_x86_ops->patch_hypercall(vcpu, instruction);
7566
7567         return emulator_write_emulated(ctxt, rip, instruction, 3,
7568                 &ctxt->exception);
7569 }
7570
7571 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
7572 {
7573         return vcpu->run->request_interrupt_window &&
7574                 likely(!pic_in_kernel(vcpu->kvm));
7575 }
7576
7577 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
7578 {
7579         struct kvm_run *kvm_run = vcpu->run;
7580
7581         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
7582         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
7583         kvm_run->cr8 = kvm_get_cr8(vcpu);
7584         kvm_run->apic_base = kvm_get_apic_base(vcpu);
7585         kvm_run->ready_for_interrupt_injection =
7586                 pic_in_kernel(vcpu->kvm) ||
7587                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
7588 }
7589
7590 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
7591 {
7592         int max_irr, tpr;
7593
7594         if (!kvm_x86_ops->update_cr8_intercept)
7595                 return;
7596
7597         if (!lapic_in_kernel(vcpu))
7598                 return;
7599
7600         if (vcpu->arch.apicv_active)
7601                 return;
7602
7603         if (!vcpu->arch.apic->vapic_addr)
7604                 max_irr = kvm_lapic_find_highest_irr(vcpu);
7605         else
7606                 max_irr = -1;
7607
7608         if (max_irr != -1)
7609                 max_irr >>= 4;
7610
7611         tpr = kvm_lapic_get_cr8(vcpu);
7612
7613         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
7614 }
7615
7616 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
7617 {
7618         int r;
7619
7620         /* try to reinject previous events if any */
7621
7622         if (vcpu->arch.exception.injected)
7623                 kvm_x86_ops->queue_exception(vcpu);
7624         /*
7625          * Do not inject an NMI or interrupt if there is a pending
7626          * exception.  Exceptions and interrupts are recognized at
7627          * instruction boundaries, i.e. the start of an instruction.
7628          * Trap-like exceptions, e.g. #DB, have higher priority than
7629          * NMIs and interrupts, i.e. traps are recognized before an
7630          * NMI/interrupt that's pending on the same instruction.
7631          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
7632          * priority, but are only generated (pended) during instruction
7633          * execution, i.e. a pending fault-like exception means the
7634          * fault occurred on the *previous* instruction and must be
7635          * serviced prior to recognizing any new events in order to
7636          * fully complete the previous instruction.
7637          */
7638         else if (!vcpu->arch.exception.pending) {
7639                 if (vcpu->arch.nmi_injected)
7640                         kvm_x86_ops->set_nmi(vcpu);
7641                 else if (vcpu->arch.interrupt.injected)
7642                         kvm_x86_ops->set_irq(vcpu);
7643         }
7644
7645         /*
7646          * Call check_nested_events() even if we reinjected a previous event
7647          * in order for caller to determine if it should require immediate-exit
7648          * from L2 to L1 due to pending L1 events which require exit
7649          * from L2 to L1.
7650          */
7651         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
7652                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
7653                 if (r != 0)
7654                         return r;
7655         }
7656
7657         /* try to inject new event if pending */
7658         if (vcpu->arch.exception.pending) {
7659                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
7660                                         vcpu->arch.exception.has_error_code,
7661                                         vcpu->arch.exception.error_code);
7662
7663                 WARN_ON_ONCE(vcpu->arch.exception.injected);
7664                 vcpu->arch.exception.pending = false;
7665                 vcpu->arch.exception.injected = true;
7666
7667                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
7668                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
7669                                              X86_EFLAGS_RF);
7670
7671                 if (vcpu->arch.exception.nr == DB_VECTOR) {
7672                         /*
7673                          * This code assumes that nSVM doesn't use
7674                          * check_nested_events(). If it does, the
7675                          * DR6/DR7 changes should happen before L1
7676                          * gets a #VMEXIT for an intercepted #DB in
7677                          * L2.  (Under VMX, on the other hand, the
7678                          * DR6/DR7 changes should not happen in the
7679                          * event of a VM-exit to L1 for an intercepted
7680                          * #DB in L2.)
7681                          */
7682                         kvm_deliver_exception_payload(vcpu);
7683                         if (vcpu->arch.dr7 & DR7_GD) {
7684                                 vcpu->arch.dr7 &= ~DR7_GD;
7685                                 kvm_update_dr7(vcpu);
7686                         }
7687                 }
7688
7689                 kvm_x86_ops->queue_exception(vcpu);
7690         }
7691
7692         /* Don't consider new event if we re-injected an event */
7693         if (kvm_event_needs_reinjection(vcpu))
7694                 return 0;
7695
7696         if (vcpu->arch.smi_pending && !is_smm(vcpu) &&
7697             kvm_x86_ops->smi_allowed(vcpu)) {
7698                 vcpu->arch.smi_pending = false;
7699                 ++vcpu->arch.smi_count;
7700                 enter_smm(vcpu);
7701         } else if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
7702                 --vcpu->arch.nmi_pending;
7703                 vcpu->arch.nmi_injected = true;
7704                 kvm_x86_ops->set_nmi(vcpu);
7705         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
7706                 /*
7707                  * Because interrupts can be injected asynchronously, we are
7708                  * calling check_nested_events again here to avoid a race condition.
7709                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
7710                  * proposal and current concerns.  Perhaps we should be setting
7711                  * KVM_REQ_EVENT only on certain events and not unconditionally?
7712                  */
7713                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
7714                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
7715                         if (r != 0)
7716                                 return r;
7717                 }
7718                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
7719                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
7720                                             false);
7721                         kvm_x86_ops->set_irq(vcpu);
7722                 }
7723         }
7724
7725         return 0;
7726 }
7727
7728 static void process_nmi(struct kvm_vcpu *vcpu)
7729 {
7730         unsigned limit = 2;
7731
7732         /*
7733          * x86 is limited to one NMI running, and one NMI pending after it.
7734          * If an NMI is already in progress, limit further NMIs to just one.
7735          * Otherwise, allow two (and we'll inject the first one immediately).
7736          */
7737         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
7738                 limit = 1;
7739
7740         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
7741         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
7742         kvm_make_request(KVM_REQ_EVENT, vcpu);
7743 }
7744
7745 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
7746 {
7747         u32 flags = 0;
7748         flags |= seg->g       << 23;
7749         flags |= seg->db      << 22;
7750         flags |= seg->l       << 21;
7751         flags |= seg->avl     << 20;
7752         flags |= seg->present << 15;
7753         flags |= seg->dpl     << 13;
7754         flags |= seg->s       << 12;
7755         flags |= seg->type    << 8;
7756         return flags;
7757 }
7758
7759 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
7760 {
7761         struct kvm_segment seg;
7762         int offset;
7763
7764         kvm_get_segment(vcpu, &seg, n);
7765         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
7766
7767         if (n < 3)
7768                 offset = 0x7f84 + n * 12;
7769         else
7770                 offset = 0x7f2c + (n - 3) * 12;
7771
7772         put_smstate(u32, buf, offset + 8, seg.base);
7773         put_smstate(u32, buf, offset + 4, seg.limit);
7774         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
7775 }
7776
7777 #ifdef CONFIG_X86_64
7778 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
7779 {
7780         struct kvm_segment seg;
7781         int offset;
7782         u16 flags;
7783
7784         kvm_get_segment(vcpu, &seg, n);
7785         offset = 0x7e00 + n * 16;
7786
7787         flags = enter_smm_get_segment_flags(&seg) >> 8;
7788         put_smstate(u16, buf, offset, seg.selector);
7789         put_smstate(u16, buf, offset + 2, flags);
7790         put_smstate(u32, buf, offset + 4, seg.limit);
7791         put_smstate(u64, buf, offset + 8, seg.base);
7792 }
7793 #endif
7794
7795 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
7796 {
7797         struct desc_ptr dt;
7798         struct kvm_segment seg;
7799         unsigned long val;
7800         int i;
7801
7802         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
7803         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
7804         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
7805         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
7806
7807         for (i = 0; i < 8; i++)
7808                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
7809
7810         kvm_get_dr(vcpu, 6, &val);
7811         put_smstate(u32, buf, 0x7fcc, (u32)val);
7812         kvm_get_dr(vcpu, 7, &val);
7813         put_smstate(u32, buf, 0x7fc8, (u32)val);
7814
7815         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
7816         put_smstate(u32, buf, 0x7fc4, seg.selector);
7817         put_smstate(u32, buf, 0x7f64, seg.base);
7818         put_smstate(u32, buf, 0x7f60, seg.limit);
7819         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
7820
7821         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
7822         put_smstate(u32, buf, 0x7fc0, seg.selector);
7823         put_smstate(u32, buf, 0x7f80, seg.base);
7824         put_smstate(u32, buf, 0x7f7c, seg.limit);
7825         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
7826
7827         kvm_x86_ops->get_gdt(vcpu, &dt);
7828         put_smstate(u32, buf, 0x7f74, dt.address);
7829         put_smstate(u32, buf, 0x7f70, dt.size);
7830
7831         kvm_x86_ops->get_idt(vcpu, &dt);
7832         put_smstate(u32, buf, 0x7f58, dt.address);
7833         put_smstate(u32, buf, 0x7f54, dt.size);
7834
7835         for (i = 0; i < 6; i++)
7836                 enter_smm_save_seg_32(vcpu, buf, i);
7837
7838         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
7839
7840         /* revision id */
7841         put_smstate(u32, buf, 0x7efc, 0x00020000);
7842         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
7843 }
7844
7845 #ifdef CONFIG_X86_64
7846 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
7847 {
7848         struct desc_ptr dt;
7849         struct kvm_segment seg;
7850         unsigned long val;
7851         int i;
7852
7853         for (i = 0; i < 16; i++)
7854                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
7855
7856         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
7857         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
7858
7859         kvm_get_dr(vcpu, 6, &val);
7860         put_smstate(u64, buf, 0x7f68, val);
7861         kvm_get_dr(vcpu, 7, &val);
7862         put_smstate(u64, buf, 0x7f60, val);
7863
7864         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
7865         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
7866         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
7867
7868         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
7869
7870         /* revision id */
7871         put_smstate(u32, buf, 0x7efc, 0x00020064);
7872
7873         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
7874
7875         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
7876         put_smstate(u16, buf, 0x7e90, seg.selector);
7877         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
7878         put_smstate(u32, buf, 0x7e94, seg.limit);
7879         put_smstate(u64, buf, 0x7e98, seg.base);
7880
7881         kvm_x86_ops->get_idt(vcpu, &dt);
7882         put_smstate(u32, buf, 0x7e84, dt.size);
7883         put_smstate(u64, buf, 0x7e88, dt.address);
7884
7885         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
7886         put_smstate(u16, buf, 0x7e70, seg.selector);
7887         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
7888         put_smstate(u32, buf, 0x7e74, seg.limit);
7889         put_smstate(u64, buf, 0x7e78, seg.base);
7890
7891         kvm_x86_ops->get_gdt(vcpu, &dt);
7892         put_smstate(u32, buf, 0x7e64, dt.size);
7893         put_smstate(u64, buf, 0x7e68, dt.address);
7894
7895         for (i = 0; i < 6; i++)
7896                 enter_smm_save_seg_64(vcpu, buf, i);
7897 }
7898 #endif
7899
7900 static void enter_smm(struct kvm_vcpu *vcpu)
7901 {
7902         struct kvm_segment cs, ds;
7903         struct desc_ptr dt;
7904         char buf[512];
7905         u32 cr0;
7906
7907         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
7908         memset(buf, 0, 512);
7909 #ifdef CONFIG_X86_64
7910         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7911                 enter_smm_save_state_64(vcpu, buf);
7912         else
7913 #endif
7914                 enter_smm_save_state_32(vcpu, buf);
7915
7916         /*
7917          * Give pre_enter_smm() a chance to make ISA-specific changes to the
7918          * vCPU state (e.g. leave guest mode) after we've saved the state into
7919          * the SMM state-save area.
7920          */
7921         kvm_x86_ops->pre_enter_smm(vcpu, buf);
7922
7923         vcpu->arch.hflags |= HF_SMM_MASK;
7924         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
7925
7926         if (kvm_x86_ops->get_nmi_mask(vcpu))
7927                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
7928         else
7929                 kvm_x86_ops->set_nmi_mask(vcpu, true);
7930
7931         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
7932         kvm_rip_write(vcpu, 0x8000);
7933
7934         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
7935         kvm_x86_ops->set_cr0(vcpu, cr0);
7936         vcpu->arch.cr0 = cr0;
7937
7938         kvm_x86_ops->set_cr4(vcpu, 0);
7939
7940         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
7941         dt.address = dt.size = 0;
7942         kvm_x86_ops->set_idt(vcpu, &dt);
7943
7944         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
7945
7946         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
7947         cs.base = vcpu->arch.smbase;
7948
7949         ds.selector = 0;
7950         ds.base = 0;
7951
7952         cs.limit    = ds.limit = 0xffffffff;
7953         cs.type     = ds.type = 0x3;
7954         cs.dpl      = ds.dpl = 0;
7955         cs.db       = ds.db = 0;
7956         cs.s        = ds.s = 1;
7957         cs.l        = ds.l = 0;
7958         cs.g        = ds.g = 1;
7959         cs.avl      = ds.avl = 0;
7960         cs.present  = ds.present = 1;
7961         cs.unusable = ds.unusable = 0;
7962         cs.padding  = ds.padding = 0;
7963
7964         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7965         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
7966         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
7967         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
7968         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
7969         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
7970
7971 #ifdef CONFIG_X86_64
7972         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7973                 kvm_x86_ops->set_efer(vcpu, 0);
7974 #endif
7975
7976         kvm_update_cpuid(vcpu);
7977         kvm_mmu_reset_context(vcpu);
7978 }
7979
7980 static void process_smi(struct kvm_vcpu *vcpu)
7981 {
7982         vcpu->arch.smi_pending = true;
7983         kvm_make_request(KVM_REQ_EVENT, vcpu);
7984 }
7985
7986 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
7987                                        unsigned long *vcpu_bitmap)
7988 {
7989         cpumask_var_t cpus;
7990
7991         zalloc_cpumask_var(&cpus, GFP_ATOMIC);
7992
7993         kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC,
7994                                     vcpu_bitmap, cpus);
7995
7996         free_cpumask_var(cpus);
7997 }
7998
7999 void kvm_make_scan_ioapic_request(struct kvm *kvm)
8000 {
8001         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
8002 }
8003
8004 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
8005 {
8006         if (!lapic_in_kernel(vcpu))
8007                 return;
8008
8009         vcpu->arch.apicv_active = kvm_apicv_activated(vcpu->kvm);
8010         kvm_apic_update_apicv(vcpu);
8011         kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
8012 }
8013 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv);
8014
8015 /*
8016  * NOTE: Do not hold any lock prior to calling this.
8017  *
8018  * In particular, kvm_request_apicv_update() expects kvm->srcu not to be
8019  * locked, because it calls __x86_set_memory_region() which does
8020  * synchronize_srcu(&kvm->srcu).
8021  */
8022 void kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
8023 {
8024         if (!kvm_x86_ops->check_apicv_inhibit_reasons ||
8025             !kvm_x86_ops->check_apicv_inhibit_reasons(bit))
8026                 return;
8027
8028         if (activate) {
8029                 if (!test_and_clear_bit(bit, &kvm->arch.apicv_inhibit_reasons) ||
8030                     !kvm_apicv_activated(kvm))
8031                         return;
8032         } else {
8033                 if (test_and_set_bit(bit, &kvm->arch.apicv_inhibit_reasons) ||
8034                     kvm_apicv_activated(kvm))
8035                         return;
8036         }
8037
8038         trace_kvm_apicv_update_request(activate, bit);
8039         if (kvm_x86_ops->pre_update_apicv_exec_ctrl)
8040                 kvm_x86_ops->pre_update_apicv_exec_ctrl(kvm, activate);
8041         kvm_make_all_cpus_request(kvm, KVM_REQ_APICV_UPDATE);
8042 }
8043 EXPORT_SYMBOL_GPL(kvm_request_apicv_update);
8044
8045 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
8046 {
8047         if (!kvm_apic_present(vcpu))
8048                 return;
8049
8050         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
8051
8052         if (irqchip_split(vcpu->kvm))
8053                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
8054         else {
8055                 if (vcpu->arch.apicv_active)
8056                         kvm_x86_ops->sync_pir_to_irr(vcpu);
8057                 if (ioapic_in_kernel(vcpu->kvm))
8058                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
8059         }
8060
8061         if (is_guest_mode(vcpu))
8062                 vcpu->arch.load_eoi_exitmap_pending = true;
8063         else
8064                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
8065 }
8066
8067 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
8068 {
8069         u64 eoi_exit_bitmap[4];
8070
8071         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
8072                 return;
8073
8074         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
8075                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
8076         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
8077 }
8078
8079 int kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
8080                 unsigned long start, unsigned long end,
8081                 bool blockable)
8082 {
8083         unsigned long apic_address;
8084
8085         /*
8086          * The physical address of apic access page is stored in the VMCS.
8087          * Update it when it becomes invalid.
8088          */
8089         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
8090         if (start <= apic_address && apic_address < end)
8091                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
8092
8093         return 0;
8094 }
8095
8096 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
8097 {
8098         struct page *page = NULL;
8099
8100         if (!lapic_in_kernel(vcpu))
8101                 return;
8102
8103         if (!kvm_x86_ops->set_apic_access_page_addr)
8104                 return;
8105
8106         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
8107         if (is_error_page(page))
8108                 return;
8109         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
8110
8111         /*
8112          * Do not pin apic access page in memory, the MMU notifier
8113          * will call us again if it is migrated or swapped out.
8114          */
8115         put_page(page);
8116 }
8117
8118 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
8119 {
8120         smp_send_reschedule(vcpu->cpu);
8121 }
8122 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
8123
8124 /*
8125  * Returns 1 to let vcpu_run() continue the guest execution loop without
8126  * exiting to the userspace.  Otherwise, the value will be returned to the
8127  * userspace.
8128  */
8129 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
8130 {
8131         int r;
8132         bool req_int_win =
8133                 dm_request_for_irq_injection(vcpu) &&
8134                 kvm_cpu_accept_dm_intr(vcpu);
8135         enum exit_fastpath_completion exit_fastpath = EXIT_FASTPATH_NONE;
8136
8137         bool req_immediate_exit = false;
8138
8139         if (kvm_request_pending(vcpu)) {
8140                 if (kvm_check_request(KVM_REQ_GET_VMCS12_PAGES, vcpu)) {
8141                         if (unlikely(!kvm_x86_ops->get_vmcs12_pages(vcpu))) {
8142                                 r = 0;
8143                                 goto out;
8144                         }
8145                 }
8146                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
8147                         kvm_mmu_unload(vcpu);
8148                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
8149                         __kvm_migrate_timers(vcpu);
8150                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
8151                         kvm_gen_update_masterclock(vcpu->kvm);
8152                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
8153                         kvm_gen_kvmclock_update(vcpu);
8154                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
8155                         r = kvm_guest_time_update(vcpu);
8156                         if (unlikely(r))
8157                                 goto out;
8158                 }
8159                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
8160                         kvm_mmu_sync_roots(vcpu);
8161                 if (kvm_check_request(KVM_REQ_LOAD_CR3, vcpu))
8162                         kvm_mmu_load_cr3(vcpu);
8163                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
8164                         kvm_vcpu_flush_tlb(vcpu, true);
8165                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
8166                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
8167                         r = 0;
8168                         goto out;
8169                 }
8170                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
8171                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
8172                         vcpu->mmio_needed = 0;
8173                         r = 0;
8174                         goto out;
8175                 }
8176                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
8177                         /* Page is swapped out. Do synthetic halt */
8178                         vcpu->arch.apf.halted = true;
8179                         r = 1;
8180                         goto out;
8181                 }
8182                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
8183                         record_steal_time(vcpu);
8184                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
8185                         process_smi(vcpu);
8186                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
8187                         process_nmi(vcpu);
8188                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
8189                         kvm_pmu_handle_event(vcpu);
8190                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
8191                         kvm_pmu_deliver_pmi(vcpu);
8192                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
8193                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
8194                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
8195                                      vcpu->arch.ioapic_handled_vectors)) {
8196                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
8197                                 vcpu->run->eoi.vector =
8198                                                 vcpu->arch.pending_ioapic_eoi;
8199                                 r = 0;
8200                                 goto out;
8201                         }
8202                 }
8203                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
8204                         vcpu_scan_ioapic(vcpu);
8205                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
8206                         vcpu_load_eoi_exitmap(vcpu);
8207                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
8208                         kvm_vcpu_reload_apic_access_page(vcpu);
8209                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
8210                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
8211                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
8212                         r = 0;
8213                         goto out;
8214                 }
8215                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
8216                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
8217                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
8218                         r = 0;
8219                         goto out;
8220                 }
8221                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
8222                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
8223                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
8224                         r = 0;
8225                         goto out;
8226                 }
8227
8228                 /*
8229                  * KVM_REQ_HV_STIMER has to be processed after
8230                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
8231                  * depend on the guest clock being up-to-date
8232                  */
8233                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
8234                         kvm_hv_process_stimers(vcpu);
8235                 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
8236                         kvm_vcpu_update_apicv(vcpu);
8237         }
8238
8239         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
8240                 ++vcpu->stat.req_event;
8241                 kvm_apic_accept_events(vcpu);
8242                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
8243                         r = 1;
8244                         goto out;
8245                 }
8246
8247                 if (inject_pending_event(vcpu, req_int_win) != 0)
8248                         req_immediate_exit = true;
8249                 else {
8250                         /* Enable SMI/NMI/IRQ window open exits if needed.
8251                          *
8252                          * SMIs have three cases:
8253                          * 1) They can be nested, and then there is nothing to
8254                          *    do here because RSM will cause a vmexit anyway.
8255                          * 2) There is an ISA-specific reason why SMI cannot be
8256                          *    injected, and the moment when this changes can be
8257                          *    intercepted.
8258                          * 3) Or the SMI can be pending because
8259                          *    inject_pending_event has completed the injection
8260                          *    of an IRQ or NMI from the previous vmexit, and
8261                          *    then we request an immediate exit to inject the
8262                          *    SMI.
8263                          */
8264                         if (vcpu->arch.smi_pending && !is_smm(vcpu))
8265                                 if (!kvm_x86_ops->enable_smi_window(vcpu))
8266                                         req_immediate_exit = true;
8267                         if (vcpu->arch.nmi_pending)
8268                                 kvm_x86_ops->enable_nmi_window(vcpu);
8269                         if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
8270                                 kvm_x86_ops->enable_irq_window(vcpu);
8271                         WARN_ON(vcpu->arch.exception.pending);
8272                 }
8273
8274                 if (kvm_lapic_enabled(vcpu)) {
8275                         update_cr8_intercept(vcpu);
8276                         kvm_lapic_sync_to_vapic(vcpu);
8277                 }
8278         }
8279
8280         r = kvm_mmu_reload(vcpu);
8281         if (unlikely(r)) {
8282                 goto cancel_injection;
8283         }
8284
8285         preempt_disable();
8286
8287         kvm_x86_ops->prepare_guest_switch(vcpu);
8288
8289         /*
8290          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
8291          * IPI are then delayed after guest entry, which ensures that they
8292          * result in virtual interrupt delivery.
8293          */
8294         local_irq_disable();
8295         vcpu->mode = IN_GUEST_MODE;
8296
8297         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
8298
8299         /*
8300          * 1) We should set ->mode before checking ->requests.  Please see
8301          * the comment in kvm_vcpu_exiting_guest_mode().
8302          *
8303          * 2) For APICv, we should set ->mode before checking PID.ON. This
8304          * pairs with the memory barrier implicit in pi_test_and_set_on
8305          * (see vmx_deliver_posted_interrupt).
8306          *
8307          * 3) This also orders the write to mode from any reads to the page
8308          * tables done while the VCPU is running.  Please see the comment
8309          * in kvm_flush_remote_tlbs.
8310          */
8311         smp_mb__after_srcu_read_unlock();
8312
8313         /*
8314          * This handles the case where a posted interrupt was
8315          * notified with kvm_vcpu_kick.
8316          */
8317         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
8318                 kvm_x86_ops->sync_pir_to_irr(vcpu);
8319
8320         if (vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu)
8321             || need_resched() || signal_pending(current)) {
8322                 vcpu->mode = OUTSIDE_GUEST_MODE;
8323                 smp_wmb();
8324                 local_irq_enable();
8325                 preempt_enable();
8326                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8327                 r = 1;
8328                 goto cancel_injection;
8329         }
8330
8331         if (req_immediate_exit) {
8332                 kvm_make_request(KVM_REQ_EVENT, vcpu);
8333                 kvm_x86_ops->request_immediate_exit(vcpu);
8334         }
8335
8336         trace_kvm_entry(vcpu->vcpu_id);
8337         guest_enter_irqoff();
8338
8339         fpregs_assert_state_consistent();
8340         if (test_thread_flag(TIF_NEED_FPU_LOAD))
8341                 switch_fpu_return();
8342
8343         if (unlikely(vcpu->arch.switch_db_regs)) {
8344                 set_debugreg(0, 7);
8345                 set_debugreg(vcpu->arch.eff_db[0], 0);
8346                 set_debugreg(vcpu->arch.eff_db[1], 1);
8347                 set_debugreg(vcpu->arch.eff_db[2], 2);
8348                 set_debugreg(vcpu->arch.eff_db[3], 3);
8349                 set_debugreg(vcpu->arch.dr6, 6);
8350                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
8351         }
8352
8353         kvm_x86_ops->run(vcpu);
8354
8355         /*
8356          * Do this here before restoring debug registers on the host.  And
8357          * since we do this before handling the vmexit, a DR access vmexit
8358          * can (a) read the correct value of the debug registers, (b) set
8359          * KVM_DEBUGREG_WONT_EXIT again.
8360          */
8361         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
8362                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
8363                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
8364                 kvm_update_dr0123(vcpu);
8365                 kvm_update_dr6(vcpu);
8366                 kvm_update_dr7(vcpu);
8367                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
8368         }
8369
8370         /*
8371          * If the guest has used debug registers, at least dr7
8372          * will be disabled while returning to the host.
8373          * If we don't have active breakpoints in the host, we don't
8374          * care about the messed up debug address registers. But if
8375          * we have some of them active, restore the old state.
8376          */
8377         if (hw_breakpoint_active())
8378                 hw_breakpoint_restore();
8379
8380         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
8381
8382         vcpu->mode = OUTSIDE_GUEST_MODE;
8383         smp_wmb();
8384
8385         kvm_x86_ops->handle_exit_irqoff(vcpu, &exit_fastpath);
8386
8387         /*
8388          * Consume any pending interrupts, including the possible source of
8389          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
8390          * An instruction is required after local_irq_enable() to fully unblock
8391          * interrupts on processors that implement an interrupt shadow, the
8392          * stat.exits increment will do nicely.
8393          */
8394         kvm_before_interrupt(vcpu);
8395         local_irq_enable();
8396         ++vcpu->stat.exits;
8397         local_irq_disable();
8398         kvm_after_interrupt(vcpu);
8399
8400         guest_exit_irqoff();
8401         if (lapic_in_kernel(vcpu)) {
8402                 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
8403                 if (delta != S64_MIN) {
8404                         trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
8405                         vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
8406                 }
8407         }
8408
8409         local_irq_enable();
8410         preempt_enable();
8411
8412         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8413
8414         /*
8415          * Profile KVM exit RIPs:
8416          */
8417         if (unlikely(prof_on == KVM_PROFILING)) {
8418                 unsigned long rip = kvm_rip_read(vcpu);
8419                 profile_hit(KVM_PROFILING, (void *)rip);
8420         }
8421
8422         if (unlikely(vcpu->arch.tsc_always_catchup))
8423                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8424
8425         if (vcpu->arch.apic_attention)
8426                 kvm_lapic_sync_from_vapic(vcpu);
8427
8428         vcpu->arch.gpa_available = false;
8429         r = kvm_x86_ops->handle_exit(vcpu, exit_fastpath);
8430         return r;
8431
8432 cancel_injection:
8433         kvm_x86_ops->cancel_injection(vcpu);
8434         if (unlikely(vcpu->arch.apic_attention))
8435                 kvm_lapic_sync_from_vapic(vcpu);
8436 out:
8437         return r;
8438 }
8439
8440 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
8441 {
8442         if (!kvm_arch_vcpu_runnable(vcpu) &&
8443             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
8444                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
8445                 kvm_vcpu_block(vcpu);
8446                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
8447
8448                 if (kvm_x86_ops->post_block)
8449                         kvm_x86_ops->post_block(vcpu);
8450
8451                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
8452                         return 1;
8453         }
8454
8455         kvm_apic_accept_events(vcpu);
8456         switch(vcpu->arch.mp_state) {
8457         case KVM_MP_STATE_HALTED:
8458                 vcpu->arch.pv.pv_unhalted = false;
8459                 vcpu->arch.mp_state =
8460                         KVM_MP_STATE_RUNNABLE;
8461                 /* fall through */
8462         case KVM_MP_STATE_RUNNABLE:
8463                 vcpu->arch.apf.halted = false;
8464                 break;
8465         case KVM_MP_STATE_INIT_RECEIVED:
8466                 break;
8467         default:
8468                 return -EINTR;
8469                 break;
8470         }
8471         return 1;
8472 }
8473
8474 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
8475 {
8476         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
8477                 kvm_x86_ops->check_nested_events(vcpu, false);
8478
8479         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
8480                 !vcpu->arch.apf.halted);
8481 }
8482
8483 static int vcpu_run(struct kvm_vcpu *vcpu)
8484 {
8485         int r;
8486         struct kvm *kvm = vcpu->kvm;
8487
8488         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
8489         vcpu->arch.l1tf_flush_l1d = true;
8490
8491         for (;;) {
8492                 if (kvm_vcpu_running(vcpu)) {
8493                         r = vcpu_enter_guest(vcpu);
8494                 } else {
8495                         r = vcpu_block(kvm, vcpu);
8496                 }
8497
8498                 if (r <= 0)
8499                         break;
8500
8501                 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
8502                 if (kvm_cpu_has_pending_timer(vcpu))
8503                         kvm_inject_pending_timer_irqs(vcpu);
8504
8505                 if (dm_request_for_irq_injection(vcpu) &&
8506                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
8507                         r = 0;
8508                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
8509                         ++vcpu->stat.request_irq_exits;
8510                         break;
8511                 }
8512
8513                 kvm_check_async_pf_completion(vcpu);
8514
8515                 if (signal_pending(current)) {
8516                         r = -EINTR;
8517                         vcpu->run->exit_reason = KVM_EXIT_INTR;
8518                         ++vcpu->stat.signal_exits;
8519                         break;
8520                 }
8521                 if (need_resched()) {
8522                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
8523                         cond_resched();
8524                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
8525                 }
8526         }
8527
8528         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
8529
8530         return r;
8531 }
8532
8533 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
8534 {
8535         int r;
8536
8537         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8538         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
8539         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
8540         return r;
8541 }
8542
8543 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
8544 {
8545         BUG_ON(!vcpu->arch.pio.count);
8546
8547         return complete_emulated_io(vcpu);
8548 }
8549
8550 /*
8551  * Implements the following, as a state machine:
8552  *
8553  * read:
8554  *   for each fragment
8555  *     for each mmio piece in the fragment
8556  *       write gpa, len
8557  *       exit
8558  *       copy data
8559  *   execute insn
8560  *
8561  * write:
8562  *   for each fragment
8563  *     for each mmio piece in the fragment
8564  *       write gpa, len
8565  *       copy data
8566  *       exit
8567  */
8568 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
8569 {
8570         struct kvm_run *run = vcpu->run;
8571         struct kvm_mmio_fragment *frag;
8572         unsigned len;
8573
8574         BUG_ON(!vcpu->mmio_needed);
8575
8576         /* Complete previous fragment */
8577         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
8578         len = min(8u, frag->len);
8579         if (!vcpu->mmio_is_write)
8580                 memcpy(frag->data, run->mmio.data, len);
8581
8582         if (frag->len <= 8) {
8583                 /* Switch to the next fragment. */
8584                 frag++;
8585                 vcpu->mmio_cur_fragment++;
8586         } else {
8587                 /* Go forward to the next mmio piece. */
8588                 frag->data += len;
8589                 frag->gpa += len;
8590                 frag->len -= len;
8591         }
8592
8593         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
8594                 vcpu->mmio_needed = 0;
8595
8596                 /* FIXME: return into emulator if single-stepping.  */
8597                 if (vcpu->mmio_is_write)
8598                         return 1;
8599                 vcpu->mmio_read_completed = 1;
8600                 return complete_emulated_io(vcpu);
8601         }
8602
8603         run->exit_reason = KVM_EXIT_MMIO;
8604         run->mmio.phys_addr = frag->gpa;
8605         if (vcpu->mmio_is_write)
8606                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
8607         run->mmio.len = min(8u, frag->len);
8608         run->mmio.is_write = vcpu->mmio_is_write;
8609         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
8610         return 0;
8611 }
8612
8613 static void kvm_save_current_fpu(struct fpu *fpu)
8614 {
8615         /*
8616          * If the target FPU state is not resident in the CPU registers, just
8617          * memcpy() from current, else save CPU state directly to the target.
8618          */
8619         if (test_thread_flag(TIF_NEED_FPU_LOAD))
8620                 memcpy(&fpu->state, &current->thread.fpu.state,
8621                        fpu_kernel_xstate_size);
8622         else
8623                 copy_fpregs_to_fpstate(fpu);
8624 }
8625
8626 /* Swap (qemu) user FPU context for the guest FPU context. */
8627 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
8628 {
8629         fpregs_lock();
8630
8631         kvm_save_current_fpu(vcpu->arch.user_fpu);
8632
8633         /* PKRU is separately restored in kvm_x86_ops->run.  */
8634         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu->state,
8635                                 ~XFEATURE_MASK_PKRU);
8636
8637         fpregs_mark_activate();
8638         fpregs_unlock();
8639
8640         trace_kvm_fpu(1);
8641 }
8642
8643 /* When vcpu_run ends, restore user space FPU context. */
8644 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
8645 {
8646         fpregs_lock();
8647
8648         kvm_save_current_fpu(vcpu->arch.guest_fpu);
8649
8650         copy_kernel_to_fpregs(&vcpu->arch.user_fpu->state);
8651
8652         fpregs_mark_activate();
8653         fpregs_unlock();
8654
8655         ++vcpu->stat.fpu_reload;
8656         trace_kvm_fpu(0);
8657 }
8658
8659 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
8660 {
8661         int r;
8662
8663         vcpu_load(vcpu);
8664         kvm_sigset_activate(vcpu);
8665         kvm_load_guest_fpu(vcpu);
8666
8667         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
8668                 if (kvm_run->immediate_exit) {
8669                         r = -EINTR;
8670                         goto out;
8671                 }
8672                 kvm_vcpu_block(vcpu);
8673                 kvm_apic_accept_events(vcpu);
8674                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
8675                 r = -EAGAIN;
8676                 if (signal_pending(current)) {
8677                         r = -EINTR;
8678                         vcpu->run->exit_reason = KVM_EXIT_INTR;
8679                         ++vcpu->stat.signal_exits;
8680                 }
8681                 goto out;
8682         }
8683
8684         if (vcpu->run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
8685                 r = -EINVAL;
8686                 goto out;
8687         }
8688
8689         if (vcpu->run->kvm_dirty_regs) {
8690                 r = sync_regs(vcpu);
8691                 if (r != 0)
8692                         goto out;
8693         }
8694
8695         /* re-sync apic's tpr */
8696         if (!lapic_in_kernel(vcpu)) {
8697                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
8698                         r = -EINVAL;
8699                         goto out;
8700                 }
8701         }
8702
8703         if (unlikely(vcpu->arch.complete_userspace_io)) {
8704                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
8705                 vcpu->arch.complete_userspace_io = NULL;
8706                 r = cui(vcpu);
8707                 if (r <= 0)
8708                         goto out;
8709         } else
8710                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
8711
8712         if (kvm_run->immediate_exit)
8713                 r = -EINTR;
8714         else
8715                 r = vcpu_run(vcpu);
8716
8717 out:
8718         kvm_put_guest_fpu(vcpu);
8719         if (vcpu->run->kvm_valid_regs)
8720                 store_regs(vcpu);
8721         post_kvm_run_save(vcpu);
8722         kvm_sigset_deactivate(vcpu);
8723
8724         vcpu_put(vcpu);
8725         return r;
8726 }
8727
8728 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8729 {
8730         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
8731                 /*
8732                  * We are here if userspace calls get_regs() in the middle of
8733                  * instruction emulation. Registers state needs to be copied
8734                  * back from emulation context to vcpu. Userspace shouldn't do
8735                  * that usually, but some bad designed PV devices (vmware
8736                  * backdoor interface) need this to work
8737                  */
8738                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
8739                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8740         }
8741         regs->rax = kvm_rax_read(vcpu);
8742         regs->rbx = kvm_rbx_read(vcpu);
8743         regs->rcx = kvm_rcx_read(vcpu);
8744         regs->rdx = kvm_rdx_read(vcpu);
8745         regs->rsi = kvm_rsi_read(vcpu);
8746         regs->rdi = kvm_rdi_read(vcpu);
8747         regs->rsp = kvm_rsp_read(vcpu);
8748         regs->rbp = kvm_rbp_read(vcpu);
8749 #ifdef CONFIG_X86_64
8750         regs->r8 = kvm_r8_read(vcpu);
8751         regs->r9 = kvm_r9_read(vcpu);
8752         regs->r10 = kvm_r10_read(vcpu);
8753         regs->r11 = kvm_r11_read(vcpu);
8754         regs->r12 = kvm_r12_read(vcpu);
8755         regs->r13 = kvm_r13_read(vcpu);
8756         regs->r14 = kvm_r14_read(vcpu);
8757         regs->r15 = kvm_r15_read(vcpu);
8758 #endif
8759
8760         regs->rip = kvm_rip_read(vcpu);
8761         regs->rflags = kvm_get_rflags(vcpu);
8762 }
8763
8764 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8765 {
8766         vcpu_load(vcpu);
8767         __get_regs(vcpu, regs);
8768         vcpu_put(vcpu);
8769         return 0;
8770 }
8771
8772 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8773 {
8774         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
8775         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8776
8777         kvm_rax_write(vcpu, regs->rax);
8778         kvm_rbx_write(vcpu, regs->rbx);
8779         kvm_rcx_write(vcpu, regs->rcx);
8780         kvm_rdx_write(vcpu, regs->rdx);
8781         kvm_rsi_write(vcpu, regs->rsi);
8782         kvm_rdi_write(vcpu, regs->rdi);
8783         kvm_rsp_write(vcpu, regs->rsp);
8784         kvm_rbp_write(vcpu, regs->rbp);
8785 #ifdef CONFIG_X86_64
8786         kvm_r8_write(vcpu, regs->r8);
8787         kvm_r9_write(vcpu, regs->r9);
8788         kvm_r10_write(vcpu, regs->r10);
8789         kvm_r11_write(vcpu, regs->r11);
8790         kvm_r12_write(vcpu, regs->r12);
8791         kvm_r13_write(vcpu, regs->r13);
8792         kvm_r14_write(vcpu, regs->r14);
8793         kvm_r15_write(vcpu, regs->r15);
8794 #endif
8795
8796         kvm_rip_write(vcpu, regs->rip);
8797         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
8798
8799         vcpu->arch.exception.pending = false;
8800
8801         kvm_make_request(KVM_REQ_EVENT, vcpu);
8802 }
8803
8804 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8805 {
8806         vcpu_load(vcpu);
8807         __set_regs(vcpu, regs);
8808         vcpu_put(vcpu);
8809         return 0;
8810 }
8811
8812 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
8813 {
8814         struct kvm_segment cs;
8815
8816         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
8817         *db = cs.db;
8818         *l = cs.l;
8819 }
8820 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
8821
8822 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8823 {
8824         struct desc_ptr dt;
8825
8826         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
8827         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
8828         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
8829         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
8830         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
8831         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
8832
8833         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
8834         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
8835
8836         kvm_x86_ops->get_idt(vcpu, &dt);
8837         sregs->idt.limit = dt.size;
8838         sregs->idt.base = dt.address;
8839         kvm_x86_ops->get_gdt(vcpu, &dt);
8840         sregs->gdt.limit = dt.size;
8841         sregs->gdt.base = dt.address;
8842
8843         sregs->cr0 = kvm_read_cr0(vcpu);
8844         sregs->cr2 = vcpu->arch.cr2;
8845         sregs->cr3 = kvm_read_cr3(vcpu);
8846         sregs->cr4 = kvm_read_cr4(vcpu);
8847         sregs->cr8 = kvm_get_cr8(vcpu);
8848         sregs->efer = vcpu->arch.efer;
8849         sregs->apic_base = kvm_get_apic_base(vcpu);
8850
8851         memset(sregs->interrupt_bitmap, 0, sizeof(sregs->interrupt_bitmap));
8852
8853         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
8854                 set_bit(vcpu->arch.interrupt.nr,
8855                         (unsigned long *)sregs->interrupt_bitmap);
8856 }
8857
8858 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
8859                                   struct kvm_sregs *sregs)
8860 {
8861         vcpu_load(vcpu);
8862         __get_sregs(vcpu, sregs);
8863         vcpu_put(vcpu);
8864         return 0;
8865 }
8866
8867 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
8868                                     struct kvm_mp_state *mp_state)
8869 {
8870         vcpu_load(vcpu);
8871         if (kvm_mpx_supported())
8872                 kvm_load_guest_fpu(vcpu);
8873
8874         kvm_apic_accept_events(vcpu);
8875         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
8876                                         vcpu->arch.pv.pv_unhalted)
8877                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
8878         else
8879                 mp_state->mp_state = vcpu->arch.mp_state;
8880
8881         if (kvm_mpx_supported())
8882                 kvm_put_guest_fpu(vcpu);
8883         vcpu_put(vcpu);
8884         return 0;
8885 }
8886
8887 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
8888                                     struct kvm_mp_state *mp_state)
8889 {
8890         int ret = -EINVAL;
8891
8892         vcpu_load(vcpu);
8893
8894         if (!lapic_in_kernel(vcpu) &&
8895             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
8896                 goto out;
8897
8898         /*
8899          * KVM_MP_STATE_INIT_RECEIVED means the processor is in
8900          * INIT state; latched init should be reported using
8901          * KVM_SET_VCPU_EVENTS, so reject it here.
8902          */
8903         if ((kvm_vcpu_latch_init(vcpu) || vcpu->arch.smi_pending) &&
8904             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
8905              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
8906                 goto out;
8907
8908         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
8909                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
8910                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
8911         } else
8912                 vcpu->arch.mp_state = mp_state->mp_state;
8913         kvm_make_request(KVM_REQ_EVENT, vcpu);
8914
8915         ret = 0;
8916 out:
8917         vcpu_put(vcpu);
8918         return ret;
8919 }
8920
8921 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
8922                     int reason, bool has_error_code, u32 error_code)
8923 {
8924         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
8925         int ret;
8926
8927         init_emulate_ctxt(vcpu);
8928
8929         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
8930                                    has_error_code, error_code);
8931         if (ret) {
8932                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
8933                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
8934                 vcpu->run->internal.ndata = 0;
8935                 return 0;
8936         }
8937
8938         kvm_rip_write(vcpu, ctxt->eip);
8939         kvm_set_rflags(vcpu, ctxt->eflags);
8940         kvm_make_request(KVM_REQ_EVENT, vcpu);
8941         return 1;
8942 }
8943 EXPORT_SYMBOL_GPL(kvm_task_switch);
8944
8945 static int kvm_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8946 {
8947         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
8948                 /*
8949                  * When EFER.LME and CR0.PG are set, the processor is in
8950                  * 64-bit mode (though maybe in a 32-bit code segment).
8951                  * CR4.PAE and EFER.LMA must be set.
8952                  */
8953                 if (!(sregs->cr4 & X86_CR4_PAE)
8954                     || !(sregs->efer & EFER_LMA))
8955                         return -EINVAL;
8956         } else {
8957                 /*
8958                  * Not in 64-bit mode: EFER.LMA is clear and the code
8959                  * segment cannot be 64-bit.
8960                  */
8961                 if (sregs->efer & EFER_LMA || sregs->cs.l)
8962                         return -EINVAL;
8963         }
8964
8965         return kvm_valid_cr4(vcpu, sregs->cr4);
8966 }
8967
8968 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8969 {
8970         struct msr_data apic_base_msr;
8971         int mmu_reset_needed = 0;
8972         int cpuid_update_needed = 0;
8973         int pending_vec, max_bits, idx;
8974         struct desc_ptr dt;
8975         int ret = -EINVAL;
8976
8977         if (kvm_valid_sregs(vcpu, sregs))
8978                 goto out;
8979
8980         apic_base_msr.data = sregs->apic_base;
8981         apic_base_msr.host_initiated = true;
8982         if (kvm_set_apic_base(vcpu, &apic_base_msr))
8983                 goto out;
8984
8985         dt.size = sregs->idt.limit;
8986         dt.address = sregs->idt.base;
8987         kvm_x86_ops->set_idt(vcpu, &dt);
8988         dt.size = sregs->gdt.limit;
8989         dt.address = sregs->gdt.base;
8990         kvm_x86_ops->set_gdt(vcpu, &dt);
8991
8992         vcpu->arch.cr2 = sregs->cr2;
8993         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
8994         vcpu->arch.cr3 = sregs->cr3;
8995         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
8996
8997         kvm_set_cr8(vcpu, sregs->cr8);
8998
8999         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
9000         kvm_x86_ops->set_efer(vcpu, sregs->efer);
9001
9002         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
9003         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
9004         vcpu->arch.cr0 = sregs->cr0;
9005
9006         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
9007         cpuid_update_needed |= ((kvm_read_cr4(vcpu) ^ sregs->cr4) &
9008                                 (X86_CR4_OSXSAVE | X86_CR4_PKE));
9009         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
9010         if (cpuid_update_needed)
9011                 kvm_update_cpuid(vcpu);
9012
9013         idx = srcu_read_lock(&vcpu->kvm->srcu);
9014         if (is_pae_paging(vcpu)) {
9015                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
9016                 mmu_reset_needed = 1;
9017         }
9018         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9019
9020         if (mmu_reset_needed)
9021                 kvm_mmu_reset_context(vcpu);
9022
9023         max_bits = KVM_NR_INTERRUPTS;
9024         pending_vec = find_first_bit(
9025                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
9026         if (pending_vec < max_bits) {
9027                 kvm_queue_interrupt(vcpu, pending_vec, false);
9028                 pr_debug("Set back pending irq %d\n", pending_vec);
9029         }
9030
9031         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
9032         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
9033         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
9034         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
9035         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
9036         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
9037
9038         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
9039         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
9040
9041         update_cr8_intercept(vcpu);
9042
9043         /* Older userspace won't unhalt the vcpu on reset. */
9044         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
9045             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
9046             !is_protmode(vcpu))
9047                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9048
9049         kvm_make_request(KVM_REQ_EVENT, vcpu);
9050
9051         ret = 0;
9052 out:
9053         return ret;
9054 }
9055
9056 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
9057                                   struct kvm_sregs *sregs)
9058 {
9059         int ret;
9060
9061         vcpu_load(vcpu);
9062         ret = __set_sregs(vcpu, sregs);
9063         vcpu_put(vcpu);
9064         return ret;
9065 }
9066
9067 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
9068                                         struct kvm_guest_debug *dbg)
9069 {
9070         unsigned long rflags;
9071         int i, r;
9072
9073         vcpu_load(vcpu);
9074
9075         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
9076                 r = -EBUSY;
9077                 if (vcpu->arch.exception.pending)
9078                         goto out;
9079                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
9080                         kvm_queue_exception(vcpu, DB_VECTOR);
9081                 else
9082                         kvm_queue_exception(vcpu, BP_VECTOR);
9083         }
9084
9085         /*
9086          * Read rflags as long as potentially injected trace flags are still
9087          * filtered out.
9088          */
9089         rflags = kvm_get_rflags(vcpu);
9090
9091         vcpu->guest_debug = dbg->control;
9092         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
9093                 vcpu->guest_debug = 0;
9094
9095         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
9096                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
9097                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
9098                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
9099         } else {
9100                 for (i = 0; i < KVM_NR_DB_REGS; i++)
9101                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
9102         }
9103         kvm_update_dr7(vcpu);
9104
9105         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
9106                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
9107                         get_segment_base(vcpu, VCPU_SREG_CS);
9108
9109         /*
9110          * Trigger an rflags update that will inject or remove the trace
9111          * flags.
9112          */
9113         kvm_set_rflags(vcpu, rflags);
9114
9115         kvm_x86_ops->update_bp_intercept(vcpu);
9116
9117         r = 0;
9118
9119 out:
9120         vcpu_put(vcpu);
9121         return r;
9122 }
9123
9124 /*
9125  * Translate a guest virtual address to a guest physical address.
9126  */
9127 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
9128                                     struct kvm_translation *tr)
9129 {
9130         unsigned long vaddr = tr->linear_address;
9131         gpa_t gpa;
9132         int idx;
9133
9134         vcpu_load(vcpu);
9135
9136         idx = srcu_read_lock(&vcpu->kvm->srcu);
9137         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
9138         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9139         tr->physical_address = gpa;
9140         tr->valid = gpa != UNMAPPED_GVA;
9141         tr->writeable = 1;
9142         tr->usermode = 0;
9143
9144         vcpu_put(vcpu);
9145         return 0;
9146 }
9147
9148 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
9149 {
9150         struct fxregs_state *fxsave;
9151
9152         vcpu_load(vcpu);
9153
9154         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
9155         memcpy(fpu->fpr, fxsave->st_space, 128);
9156         fpu->fcw = fxsave->cwd;
9157         fpu->fsw = fxsave->swd;
9158         fpu->ftwx = fxsave->twd;
9159         fpu->last_opcode = fxsave->fop;
9160         fpu->last_ip = fxsave->rip;
9161         fpu->last_dp = fxsave->rdp;
9162         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
9163
9164         vcpu_put(vcpu);
9165         return 0;
9166 }
9167
9168 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
9169 {
9170         struct fxregs_state *fxsave;
9171
9172         vcpu_load(vcpu);
9173
9174         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
9175
9176         memcpy(fxsave->st_space, fpu->fpr, 128);
9177         fxsave->cwd = fpu->fcw;
9178         fxsave->swd = fpu->fsw;
9179         fxsave->twd = fpu->ftwx;
9180         fxsave->fop = fpu->last_opcode;
9181         fxsave->rip = fpu->last_ip;
9182         fxsave->rdp = fpu->last_dp;
9183         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
9184
9185         vcpu_put(vcpu);
9186         return 0;
9187 }
9188
9189 static void store_regs(struct kvm_vcpu *vcpu)
9190 {
9191         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
9192
9193         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
9194                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
9195
9196         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
9197                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
9198
9199         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
9200                 kvm_vcpu_ioctl_x86_get_vcpu_events(
9201                                 vcpu, &vcpu->run->s.regs.events);
9202 }
9203
9204 static int sync_regs(struct kvm_vcpu *vcpu)
9205 {
9206         if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
9207                 return -EINVAL;
9208
9209         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
9210                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
9211                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
9212         }
9213         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
9214                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
9215                         return -EINVAL;
9216                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
9217         }
9218         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
9219                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
9220                                 vcpu, &vcpu->run->s.regs.events))
9221                         return -EINVAL;
9222                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
9223         }
9224
9225         return 0;
9226 }
9227
9228 static void fx_init(struct kvm_vcpu *vcpu)
9229 {
9230         fpstate_init(&vcpu->arch.guest_fpu->state);
9231         if (boot_cpu_has(X86_FEATURE_XSAVES))
9232                 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
9233                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
9234
9235         /*
9236          * Ensure guest xcr0 is valid for loading
9237          */
9238         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
9239
9240         vcpu->arch.cr0 |= X86_CR0_ET;
9241 }
9242
9243 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
9244 {
9245         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
9246                 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
9247                              "guest TSC will not be reliable\n");
9248
9249         return 0;
9250 }
9251
9252 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
9253 {
9254         struct page *page;
9255         int r;
9256
9257         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
9258         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
9259                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9260         else
9261                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
9262
9263         kvm_set_tsc_khz(vcpu, max_tsc_khz);
9264
9265         r = kvm_mmu_create(vcpu);
9266         if (r < 0)
9267                 return r;
9268
9269         if (irqchip_in_kernel(vcpu->kvm)) {
9270                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
9271                 if (r < 0)
9272                         goto fail_mmu_destroy;
9273                 if (kvm_apicv_activated(vcpu->kvm))
9274                         vcpu->arch.apicv_active = true;
9275         } else
9276                 static_key_slow_inc(&kvm_no_apic_vcpu);
9277
9278         r = -ENOMEM;
9279
9280         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
9281         if (!page)
9282                 goto fail_free_lapic;
9283         vcpu->arch.pio_data = page_address(page);
9284
9285         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
9286                                        GFP_KERNEL_ACCOUNT);
9287         if (!vcpu->arch.mce_banks)
9288                 goto fail_free_pio_data;
9289         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
9290
9291         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
9292                                 GFP_KERNEL_ACCOUNT))
9293                 goto fail_free_mce_banks;
9294
9295         vcpu->arch.user_fpu = kmem_cache_zalloc(x86_fpu_cache,
9296                                                 GFP_KERNEL_ACCOUNT);
9297         if (!vcpu->arch.user_fpu) {
9298                 pr_err("kvm: failed to allocate userspace's fpu\n");
9299                 goto free_wbinvd_dirty_mask;
9300         }
9301
9302         vcpu->arch.guest_fpu = kmem_cache_zalloc(x86_fpu_cache,
9303                                                  GFP_KERNEL_ACCOUNT);
9304         if (!vcpu->arch.guest_fpu) {
9305                 pr_err("kvm: failed to allocate vcpu's fpu\n");
9306                 goto free_user_fpu;
9307         }
9308         fx_init(vcpu);
9309
9310         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
9311
9312         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
9313
9314         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
9315
9316         kvm_async_pf_hash_reset(vcpu);
9317         kvm_pmu_init(vcpu);
9318
9319         vcpu->arch.pending_external_vector = -1;
9320         vcpu->arch.preempted_in_kernel = false;
9321
9322         kvm_hv_vcpu_init(vcpu);
9323
9324         r = kvm_x86_ops->vcpu_create(vcpu);
9325         if (r)
9326                 goto free_guest_fpu;
9327
9328         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
9329         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
9330         kvm_vcpu_mtrr_init(vcpu);
9331         vcpu_load(vcpu);
9332         kvm_vcpu_reset(vcpu, false);
9333         kvm_init_mmu(vcpu, false);
9334         vcpu_put(vcpu);
9335         return 0;
9336
9337 free_guest_fpu:
9338         kmem_cache_free(x86_fpu_cache, vcpu->arch.guest_fpu);
9339 free_user_fpu:
9340         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
9341 free_wbinvd_dirty_mask:
9342         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
9343 fail_free_mce_banks:
9344         kfree(vcpu->arch.mce_banks);
9345 fail_free_pio_data:
9346         free_page((unsigned long)vcpu->arch.pio_data);
9347 fail_free_lapic:
9348         kvm_free_lapic(vcpu);
9349 fail_mmu_destroy:
9350         kvm_mmu_destroy(vcpu);
9351         return r;
9352 }
9353
9354 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
9355 {
9356         struct msr_data msr;
9357         struct kvm *kvm = vcpu->kvm;
9358
9359         kvm_hv_vcpu_postcreate(vcpu);
9360
9361         if (mutex_lock_killable(&vcpu->mutex))
9362                 return;
9363         vcpu_load(vcpu);
9364         msr.data = 0x0;
9365         msr.index = MSR_IA32_TSC;
9366         msr.host_initiated = true;
9367         kvm_write_tsc(vcpu, &msr);
9368         vcpu_put(vcpu);
9369
9370         /* poll control enabled by default */
9371         vcpu->arch.msr_kvm_poll_control = 1;
9372
9373         mutex_unlock(&vcpu->mutex);
9374
9375         if (!kvmclock_periodic_sync)
9376                 return;
9377
9378         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
9379                                         KVMCLOCK_SYNC_PERIOD);
9380 }
9381
9382 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
9383 {
9384         struct gfn_to_pfn_cache *cache = &vcpu->arch.st.cache;
9385         int idx;
9386
9387         kvm_release_pfn(cache->pfn, cache->dirty, cache);
9388
9389         kvmclock_reset(vcpu);
9390
9391         kvm_x86_ops->vcpu_free(vcpu);
9392
9393         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
9394         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
9395         kmem_cache_free(x86_fpu_cache, vcpu->arch.guest_fpu);
9396
9397         kvm_hv_vcpu_uninit(vcpu);
9398         kvm_pmu_destroy(vcpu);
9399         kfree(vcpu->arch.mce_banks);
9400         kvm_free_lapic(vcpu);
9401         idx = srcu_read_lock(&vcpu->kvm->srcu);
9402         kvm_mmu_destroy(vcpu);
9403         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9404         free_page((unsigned long)vcpu->arch.pio_data);
9405         if (!lapic_in_kernel(vcpu))
9406                 static_key_slow_dec(&kvm_no_apic_vcpu);
9407 }
9408
9409 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
9410 {
9411         kvm_lapic_reset(vcpu, init_event);
9412
9413         vcpu->arch.hflags = 0;
9414
9415         vcpu->arch.smi_pending = 0;
9416         vcpu->arch.smi_count = 0;
9417         atomic_set(&vcpu->arch.nmi_queued, 0);
9418         vcpu->arch.nmi_pending = 0;
9419         vcpu->arch.nmi_injected = false;
9420         kvm_clear_interrupt_queue(vcpu);
9421         kvm_clear_exception_queue(vcpu);
9422
9423         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
9424         kvm_update_dr0123(vcpu);
9425         vcpu->arch.dr6 = DR6_INIT;
9426         kvm_update_dr6(vcpu);
9427         vcpu->arch.dr7 = DR7_FIXED_1;
9428         kvm_update_dr7(vcpu);
9429
9430         vcpu->arch.cr2 = 0;
9431
9432         kvm_make_request(KVM_REQ_EVENT, vcpu);
9433         vcpu->arch.apf.msr_val = 0;
9434         vcpu->arch.st.msr_val = 0;
9435
9436         kvmclock_reset(vcpu);
9437
9438         kvm_clear_async_pf_completion_queue(vcpu);
9439         kvm_async_pf_hash_reset(vcpu);
9440         vcpu->arch.apf.halted = false;
9441
9442         if (kvm_mpx_supported()) {
9443                 void *mpx_state_buffer;
9444
9445                 /*
9446                  * To avoid have the INIT path from kvm_apic_has_events() that be
9447                  * called with loaded FPU and does not let userspace fix the state.
9448                  */
9449                 if (init_event)
9450                         kvm_put_guest_fpu(vcpu);
9451                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
9452                                         XFEATURE_BNDREGS);
9453                 if (mpx_state_buffer)
9454                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
9455                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
9456                                         XFEATURE_BNDCSR);
9457                 if (mpx_state_buffer)
9458                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
9459                 if (init_event)
9460                         kvm_load_guest_fpu(vcpu);
9461         }
9462
9463         if (!init_event) {
9464                 kvm_pmu_reset(vcpu);
9465                 vcpu->arch.smbase = 0x30000;
9466
9467                 vcpu->arch.msr_misc_features_enables = 0;
9468
9469                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
9470         }
9471
9472         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
9473         vcpu->arch.regs_avail = ~0;
9474         vcpu->arch.regs_dirty = ~0;
9475
9476         vcpu->arch.ia32_xss = 0;
9477
9478         kvm_x86_ops->vcpu_reset(vcpu, init_event);
9479 }
9480
9481 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
9482 {
9483         struct kvm_segment cs;
9484
9485         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
9486         cs.selector = vector << 8;
9487         cs.base = vector << 12;
9488         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
9489         kvm_rip_write(vcpu, 0);
9490 }
9491
9492 int kvm_arch_hardware_enable(void)
9493 {
9494         struct kvm *kvm;
9495         struct kvm_vcpu *vcpu;
9496         int i;
9497         int ret;
9498         u64 local_tsc;
9499         u64 max_tsc = 0;
9500         bool stable, backwards_tsc = false;
9501
9502         kvm_shared_msr_cpu_online();
9503         ret = kvm_x86_ops->hardware_enable();
9504         if (ret != 0)
9505                 return ret;
9506
9507         local_tsc = rdtsc();
9508         stable = !kvm_check_tsc_unstable();
9509         list_for_each_entry(kvm, &vm_list, vm_list) {
9510                 kvm_for_each_vcpu(i, vcpu, kvm) {
9511                         if (!stable && vcpu->cpu == smp_processor_id())
9512                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
9513                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
9514                                 backwards_tsc = true;
9515                                 if (vcpu->arch.last_host_tsc > max_tsc)
9516                                         max_tsc = vcpu->arch.last_host_tsc;
9517                         }
9518                 }
9519         }
9520
9521         /*
9522          * Sometimes, even reliable TSCs go backwards.  This happens on
9523          * platforms that reset TSC during suspend or hibernate actions, but
9524          * maintain synchronization.  We must compensate.  Fortunately, we can
9525          * detect that condition here, which happens early in CPU bringup,
9526          * before any KVM threads can be running.  Unfortunately, we can't
9527          * bring the TSCs fully up to date with real time, as we aren't yet far
9528          * enough into CPU bringup that we know how much real time has actually
9529          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
9530          * variables that haven't been updated yet.
9531          *
9532          * So we simply find the maximum observed TSC above, then record the
9533          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
9534          * the adjustment will be applied.  Note that we accumulate
9535          * adjustments, in case multiple suspend cycles happen before some VCPU
9536          * gets a chance to run again.  In the event that no KVM threads get a
9537          * chance to run, we will miss the entire elapsed period, as we'll have
9538          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
9539          * loose cycle time.  This isn't too big a deal, since the loss will be
9540          * uniform across all VCPUs (not to mention the scenario is extremely
9541          * unlikely). It is possible that a second hibernate recovery happens
9542          * much faster than a first, causing the observed TSC here to be
9543          * smaller; this would require additional padding adjustment, which is
9544          * why we set last_host_tsc to the local tsc observed here.
9545          *
9546          * N.B. - this code below runs only on platforms with reliable TSC,
9547          * as that is the only way backwards_tsc is set above.  Also note
9548          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
9549          * have the same delta_cyc adjustment applied if backwards_tsc
9550          * is detected.  Note further, this adjustment is only done once,
9551          * as we reset last_host_tsc on all VCPUs to stop this from being
9552          * called multiple times (one for each physical CPU bringup).
9553          *
9554          * Platforms with unreliable TSCs don't have to deal with this, they
9555          * will be compensated by the logic in vcpu_load, which sets the TSC to
9556          * catchup mode.  This will catchup all VCPUs to real time, but cannot
9557          * guarantee that they stay in perfect synchronization.
9558          */
9559         if (backwards_tsc) {
9560                 u64 delta_cyc = max_tsc - local_tsc;
9561                 list_for_each_entry(kvm, &vm_list, vm_list) {
9562                         kvm->arch.backwards_tsc_observed = true;
9563                         kvm_for_each_vcpu(i, vcpu, kvm) {
9564                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
9565                                 vcpu->arch.last_host_tsc = local_tsc;
9566                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
9567                         }
9568
9569                         /*
9570                          * We have to disable TSC offset matching.. if you were
9571                          * booting a VM while issuing an S4 host suspend....
9572                          * you may have some problem.  Solving this issue is
9573                          * left as an exercise to the reader.
9574                          */
9575                         kvm->arch.last_tsc_nsec = 0;
9576                         kvm->arch.last_tsc_write = 0;
9577                 }
9578
9579         }
9580         return 0;
9581 }
9582
9583 void kvm_arch_hardware_disable(void)
9584 {
9585         kvm_x86_ops->hardware_disable();
9586         drop_user_return_notifiers();
9587 }
9588
9589 int kvm_arch_hardware_setup(void)
9590 {
9591         int r;
9592
9593         r = kvm_x86_ops->hardware_setup();
9594         if (r != 0)
9595                 return r;
9596
9597         cr4_reserved_bits = kvm_host_cr4_reserved_bits(&boot_cpu_data);
9598
9599         if (kvm_has_tsc_control) {
9600                 /*
9601                  * Make sure the user can only configure tsc_khz values that
9602                  * fit into a signed integer.
9603                  * A min value is not calculated because it will always
9604                  * be 1 on all machines.
9605                  */
9606                 u64 max = min(0x7fffffffULL,
9607                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
9608                 kvm_max_guest_tsc_khz = max;
9609
9610                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
9611         }
9612
9613         if (boot_cpu_has(X86_FEATURE_XSAVES))
9614                 rdmsrl(MSR_IA32_XSS, host_xss);
9615
9616         kvm_init_msr_list();
9617         return 0;
9618 }
9619
9620 void kvm_arch_hardware_unsetup(void)
9621 {
9622         kvm_x86_ops->hardware_unsetup();
9623 }
9624
9625 int kvm_arch_check_processor_compat(void)
9626 {
9627         struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
9628
9629         WARN_ON(!irqs_disabled());
9630
9631         if (kvm_host_cr4_reserved_bits(c) != cr4_reserved_bits)
9632                 return -EIO;
9633
9634         return kvm_x86_ops->check_processor_compatibility();
9635 }
9636
9637 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
9638 {
9639         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
9640 }
9641 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
9642
9643 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
9644 {
9645         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
9646 }
9647
9648 struct static_key kvm_no_apic_vcpu __read_mostly;
9649 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
9650
9651 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
9652 {
9653         struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
9654
9655         vcpu->arch.l1tf_flush_l1d = true;
9656         if (pmu->version && unlikely(pmu->event_count)) {
9657                 pmu->need_cleanup = true;
9658                 kvm_make_request(KVM_REQ_PMU, vcpu);
9659         }
9660         kvm_x86_ops->sched_in(vcpu, cpu);
9661 }
9662
9663 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
9664 {
9665         if (type)
9666                 return -EINVAL;
9667
9668         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
9669         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
9670         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
9671         INIT_LIST_HEAD(&kvm->arch.lpage_disallowed_mmu_pages);
9672         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
9673         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
9674
9675         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
9676         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
9677         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
9678         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
9679                 &kvm->arch.irq_sources_bitmap);
9680
9681         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
9682         mutex_init(&kvm->arch.apic_map_lock);
9683         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
9684
9685         kvm->arch.kvmclock_offset = -ktime_get_boottime_ns();
9686         pvclock_update_vm_gtod_copy(kvm);
9687
9688         kvm->arch.guest_can_read_msr_platform_info = true;
9689
9690         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
9691         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
9692
9693         kvm_hv_init_vm(kvm);
9694         kvm_page_track_init(kvm);
9695         kvm_mmu_init_vm(kvm);
9696
9697         return kvm_x86_ops->vm_init(kvm);
9698 }
9699
9700 int kvm_arch_post_init_vm(struct kvm *kvm)
9701 {
9702         return kvm_mmu_post_init_vm(kvm);
9703 }
9704
9705 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
9706 {
9707         vcpu_load(vcpu);
9708         kvm_mmu_unload(vcpu);
9709         vcpu_put(vcpu);
9710 }
9711
9712 static void kvm_free_vcpus(struct kvm *kvm)
9713 {
9714         unsigned int i;
9715         struct kvm_vcpu *vcpu;
9716
9717         /*
9718          * Unpin any mmu pages first.
9719          */
9720         kvm_for_each_vcpu(i, vcpu, kvm) {
9721                 kvm_clear_async_pf_completion_queue(vcpu);
9722                 kvm_unload_vcpu_mmu(vcpu);
9723         }
9724         kvm_for_each_vcpu(i, vcpu, kvm)
9725                 kvm_vcpu_destroy(vcpu);
9726
9727         mutex_lock(&kvm->lock);
9728         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
9729                 kvm->vcpus[i] = NULL;
9730
9731         atomic_set(&kvm->online_vcpus, 0);
9732         mutex_unlock(&kvm->lock);
9733 }
9734
9735 void kvm_arch_sync_events(struct kvm *kvm)
9736 {
9737         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
9738         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
9739         kvm_free_pit(kvm);
9740 }
9741
9742 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
9743 {
9744         int i, r;
9745         unsigned long hva;
9746         struct kvm_memslots *slots = kvm_memslots(kvm);
9747         struct kvm_memory_slot *slot, old;
9748
9749         /* Called with kvm->slots_lock held.  */
9750         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
9751                 return -EINVAL;
9752
9753         slot = id_to_memslot(slots, id);
9754         if (size) {
9755                 if (slot->npages)
9756                         return -EEXIST;
9757
9758                 /*
9759                  * MAP_SHARED to prevent internal slot pages from being moved
9760                  * by fork()/COW.
9761                  */
9762                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
9763                               MAP_SHARED | MAP_ANONYMOUS, 0);
9764                 if (IS_ERR((void *)hva))
9765                         return PTR_ERR((void *)hva);
9766         } else {
9767                 if (!slot->npages)
9768                         return 0;
9769
9770                 hva = 0;
9771         }
9772
9773         old = *slot;
9774         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
9775                 struct kvm_userspace_memory_region m;
9776
9777                 m.slot = id | (i << 16);
9778                 m.flags = 0;
9779                 m.guest_phys_addr = gpa;
9780                 m.userspace_addr = hva;
9781                 m.memory_size = size;
9782                 r = __kvm_set_memory_region(kvm, &m);
9783                 if (r < 0)
9784                         return r;
9785         }
9786
9787         if (!size)
9788                 vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
9789
9790         return 0;
9791 }
9792 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
9793
9794 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
9795 {
9796         kvm_mmu_pre_destroy_vm(kvm);
9797 }
9798
9799 void kvm_arch_destroy_vm(struct kvm *kvm)
9800 {
9801         if (current->mm == kvm->mm) {
9802                 /*
9803                  * Free memory regions allocated on behalf of userspace,
9804                  * unless the the memory map has changed due to process exit
9805                  * or fd copying.
9806                  */
9807                 mutex_lock(&kvm->slots_lock);
9808                 __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
9809                                         0, 0);
9810                 __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
9811                                         0, 0);
9812                 __x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
9813                 mutex_unlock(&kvm->slots_lock);
9814         }
9815         if (kvm_x86_ops->vm_destroy)
9816                 kvm_x86_ops->vm_destroy(kvm);
9817         kvm_pic_destroy(kvm);
9818         kvm_ioapic_destroy(kvm);
9819         kvm_free_vcpus(kvm);
9820         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
9821         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
9822         kvm_mmu_uninit_vm(kvm);
9823         kvm_page_track_cleanup(kvm);
9824         kvm_hv_destroy_vm(kvm);
9825 }
9826
9827 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
9828                            struct kvm_memory_slot *dont)
9829 {
9830         int i;
9831
9832         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9833                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
9834                         kvfree(free->arch.rmap[i]);
9835                         free->arch.rmap[i] = NULL;
9836                 }
9837                 if (i == 0)
9838                         continue;
9839
9840                 if (!dont || free->arch.lpage_info[i - 1] !=
9841                              dont->arch.lpage_info[i - 1]) {
9842                         kvfree(free->arch.lpage_info[i - 1]);
9843                         free->arch.lpage_info[i - 1] = NULL;
9844                 }
9845         }
9846
9847         kvm_page_track_free_memslot(free, dont);
9848 }
9849
9850 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
9851                             unsigned long npages)
9852 {
9853         int i;
9854
9855         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9856                 struct kvm_lpage_info *linfo;
9857                 unsigned long ugfn;
9858                 int lpages;
9859                 int level = i + 1;
9860
9861                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
9862                                       slot->base_gfn, level) + 1;
9863
9864                 slot->arch.rmap[i] =
9865                         kvcalloc(lpages, sizeof(*slot->arch.rmap[i]),
9866                                  GFP_KERNEL_ACCOUNT);
9867                 if (!slot->arch.rmap[i])
9868                         goto out_free;
9869                 if (i == 0)
9870                         continue;
9871
9872                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
9873                 if (!linfo)
9874                         goto out_free;
9875
9876                 slot->arch.lpage_info[i - 1] = linfo;
9877
9878                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
9879                         linfo[0].disallow_lpage = 1;
9880                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
9881                         linfo[lpages - 1].disallow_lpage = 1;
9882                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
9883                 /*
9884                  * If the gfn and userspace address are not aligned wrt each
9885                  * other, or if explicitly asked to, disable large page
9886                  * support for this slot
9887                  */
9888                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
9889                     !kvm_largepages_enabled()) {
9890                         unsigned long j;
9891
9892                         for (j = 0; j < lpages; ++j)
9893                                 linfo[j].disallow_lpage = 1;
9894                 }
9895         }
9896
9897         if (kvm_page_track_create_memslot(slot, npages))
9898                 goto out_free;
9899
9900         return 0;
9901
9902 out_free:
9903         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9904                 kvfree(slot->arch.rmap[i]);
9905                 slot->arch.rmap[i] = NULL;
9906                 if (i == 0)
9907                         continue;
9908
9909                 kvfree(slot->arch.lpage_info[i - 1]);
9910                 slot->arch.lpage_info[i - 1] = NULL;
9911         }
9912         return -ENOMEM;
9913 }
9914
9915 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
9916 {
9917         struct kvm_vcpu *vcpu;
9918         int i;
9919
9920         /*
9921          * memslots->generation has been incremented.
9922          * mmio generation may have reached its maximum value.
9923          */
9924         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
9925
9926         /* Force re-initialization of steal_time cache */
9927         kvm_for_each_vcpu(i, vcpu, kvm)
9928                 kvm_vcpu_kick(vcpu);
9929 }
9930
9931 int kvm_arch_prepare_memory_region(struct kvm *kvm,
9932                                 struct kvm_memory_slot *memslot,
9933                                 const struct kvm_userspace_memory_region *mem,
9934                                 enum kvm_mr_change change)
9935 {
9936         return 0;
9937 }
9938
9939 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
9940                                      struct kvm_memory_slot *new)
9941 {
9942         /* Still write protect RO slot */
9943         if (new->flags & KVM_MEM_READONLY) {
9944                 kvm_mmu_slot_remove_write_access(kvm, new);
9945                 return;
9946         }
9947
9948         /*
9949          * Call kvm_x86_ops dirty logging hooks when they are valid.
9950          *
9951          * kvm_x86_ops->slot_disable_log_dirty is called when:
9952          *
9953          *  - KVM_MR_CREATE with dirty logging is disabled
9954          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
9955          *
9956          * The reason is, in case of PML, we need to set D-bit for any slots
9957          * with dirty logging disabled in order to eliminate unnecessary GPA
9958          * logging in PML buffer (and potential PML buffer full VMEXIT). This
9959          * guarantees leaving PML enabled during guest's lifetime won't have
9960          * any additional overhead from PML when guest is running with dirty
9961          * logging disabled for memory slots.
9962          *
9963          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
9964          * to dirty logging mode.
9965          *
9966          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
9967          *
9968          * In case of write protect:
9969          *
9970          * Write protect all pages for dirty logging.
9971          *
9972          * All the sptes including the large sptes which point to this
9973          * slot are set to readonly. We can not create any new large
9974          * spte on this slot until the end of the logging.
9975          *
9976          * See the comments in fast_page_fault().
9977          */
9978         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
9979                 if (kvm_x86_ops->slot_enable_log_dirty)
9980                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
9981                 else
9982                         kvm_mmu_slot_remove_write_access(kvm, new);
9983         } else {
9984                 if (kvm_x86_ops->slot_disable_log_dirty)
9985                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
9986         }
9987 }
9988
9989 void kvm_arch_commit_memory_region(struct kvm *kvm,
9990                                 const struct kvm_userspace_memory_region *mem,
9991                                 const struct kvm_memory_slot *old,
9992                                 const struct kvm_memory_slot *new,
9993                                 enum kvm_mr_change change)
9994 {
9995         if (!kvm->arch.n_requested_mmu_pages)
9996                 kvm_mmu_change_mmu_pages(kvm,
9997                                 kvm_mmu_calculate_default_mmu_pages(kvm));
9998
9999         /*
10000          * Dirty logging tracks sptes in 4k granularity, meaning that large
10001          * sptes have to be split.  If live migration is successful, the guest
10002          * in the source machine will be destroyed and large sptes will be
10003          * created in the destination. However, if the guest continues to run
10004          * in the source machine (for example if live migration fails), small
10005          * sptes will remain around and cause bad performance.
10006          *
10007          * Scan sptes if dirty logging has been stopped, dropping those
10008          * which can be collapsed into a single large-page spte.  Later
10009          * page faults will create the large-page sptes.
10010          *
10011          * There is no need to do this in any of the following cases:
10012          * CREATE:      No dirty mappings will already exist.
10013          * MOVE/DELETE: The old mappings will already have been cleaned up by
10014          *              kvm_arch_flush_shadow_memslot()
10015          */
10016         if (change == KVM_MR_FLAGS_ONLY &&
10017                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
10018                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
10019                 kvm_mmu_zap_collapsible_sptes(kvm, new);
10020
10021         /*
10022          * Set up write protection and/or dirty logging for the new slot.
10023          *
10024          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
10025          * been zapped so no dirty logging staff is needed for old slot. For
10026          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
10027          * new and it's also covered when dealing with the new slot.
10028          *
10029          * FIXME: const-ify all uses of struct kvm_memory_slot.
10030          */
10031         if (change != KVM_MR_DELETE)
10032                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
10033 }
10034
10035 void kvm_arch_flush_shadow_all(struct kvm *kvm)
10036 {
10037         kvm_mmu_zap_all(kvm);
10038 }
10039
10040 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
10041                                    struct kvm_memory_slot *slot)
10042 {
10043         kvm_page_track_flush_slot(kvm, slot);
10044 }
10045
10046 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
10047 {
10048         return (is_guest_mode(vcpu) &&
10049                         kvm_x86_ops->guest_apic_has_interrupt &&
10050                         kvm_x86_ops->guest_apic_has_interrupt(vcpu));
10051 }
10052
10053 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
10054 {
10055         if (!list_empty_careful(&vcpu->async_pf.done))
10056                 return true;
10057
10058         if (kvm_apic_has_events(vcpu))
10059                 return true;
10060
10061         if (vcpu->arch.pv.pv_unhalted)
10062                 return true;
10063
10064         if (vcpu->arch.exception.pending)
10065                 return true;
10066
10067         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
10068             (vcpu->arch.nmi_pending &&
10069              kvm_x86_ops->nmi_allowed(vcpu)))
10070                 return true;
10071
10072         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
10073             (vcpu->arch.smi_pending && !is_smm(vcpu)))
10074                 return true;
10075
10076         if (kvm_arch_interrupt_allowed(vcpu) &&
10077             (kvm_cpu_has_interrupt(vcpu) ||
10078             kvm_guest_apic_has_interrupt(vcpu)))
10079                 return true;
10080
10081         if (kvm_hv_has_stimer_pending(vcpu))
10082                 return true;
10083
10084         return false;
10085 }
10086
10087 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
10088 {
10089         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
10090 }
10091
10092 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
10093 {
10094         if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
10095                 return true;
10096
10097         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
10098                 kvm_test_request(KVM_REQ_SMI, vcpu) ||
10099                  kvm_test_request(KVM_REQ_EVENT, vcpu))
10100                 return true;
10101
10102         if (vcpu->arch.apicv_active && kvm_x86_ops->dy_apicv_has_pending_interrupt(vcpu))
10103                 return true;
10104
10105         return false;
10106 }
10107
10108 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
10109 {
10110         return vcpu->arch.preempted_in_kernel;
10111 }
10112
10113 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
10114 {
10115         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
10116 }
10117
10118 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
10119 {
10120         return kvm_x86_ops->interrupt_allowed(vcpu);
10121 }
10122
10123 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
10124 {
10125         if (is_64_bit_mode(vcpu))
10126                 return kvm_rip_read(vcpu);
10127         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
10128                      kvm_rip_read(vcpu));
10129 }
10130 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
10131
10132 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
10133 {
10134         return kvm_get_linear_rip(vcpu) == linear_rip;
10135 }
10136 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
10137
10138 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
10139 {
10140         unsigned long rflags;
10141
10142         rflags = kvm_x86_ops->get_rflags(vcpu);
10143         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
10144                 rflags &= ~X86_EFLAGS_TF;
10145         return rflags;
10146 }
10147 EXPORT_SYMBOL_GPL(kvm_get_rflags);
10148
10149 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
10150 {
10151         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
10152             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
10153                 rflags |= X86_EFLAGS_TF;
10154         kvm_x86_ops->set_rflags(vcpu, rflags);
10155 }
10156
10157 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
10158 {
10159         __kvm_set_rflags(vcpu, rflags);
10160         kvm_make_request(KVM_REQ_EVENT, vcpu);
10161 }
10162 EXPORT_SYMBOL_GPL(kvm_set_rflags);
10163
10164 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
10165 {
10166         int r;
10167
10168         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
10169               work->wakeup_all)
10170                 return;
10171
10172         r = kvm_mmu_reload(vcpu);
10173         if (unlikely(r))
10174                 return;
10175
10176         if (!vcpu->arch.mmu->direct_map &&
10177               work->arch.cr3 != vcpu->arch.mmu->get_cr3(vcpu))
10178                 return;
10179
10180         vcpu->arch.mmu->page_fault(vcpu, work->cr2_or_gpa, 0, true);
10181 }
10182
10183 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
10184 {
10185         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
10186 }
10187
10188 static inline u32 kvm_async_pf_next_probe(u32 key)
10189 {
10190         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
10191 }
10192
10193 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
10194 {
10195         u32 key = kvm_async_pf_hash_fn(gfn);
10196
10197         while (vcpu->arch.apf.gfns[key] != ~0)
10198                 key = kvm_async_pf_next_probe(key);
10199
10200         vcpu->arch.apf.gfns[key] = gfn;
10201 }
10202
10203 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
10204 {
10205         int i;
10206         u32 key = kvm_async_pf_hash_fn(gfn);
10207
10208         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
10209                      (vcpu->arch.apf.gfns[key] != gfn &&
10210                       vcpu->arch.apf.gfns[key] != ~0); i++)
10211                 key = kvm_async_pf_next_probe(key);
10212
10213         return key;
10214 }
10215
10216 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
10217 {
10218         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
10219 }
10220
10221 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
10222 {
10223         u32 i, j, k;
10224
10225         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
10226         while (true) {
10227                 vcpu->arch.apf.gfns[i] = ~0;
10228                 do {
10229                         j = kvm_async_pf_next_probe(j);
10230                         if (vcpu->arch.apf.gfns[j] == ~0)
10231                                 return;
10232                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
10233                         /*
10234                          * k lies cyclically in ]i,j]
10235                          * |    i.k.j |
10236                          * |....j i.k.| or  |.k..j i...|
10237                          */
10238                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
10239                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
10240                 i = j;
10241         }
10242 }
10243
10244 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
10245 {
10246
10247         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
10248                                       sizeof(val));
10249 }
10250
10251 static int apf_get_user(struct kvm_vcpu *vcpu, u32 *val)
10252 {
10253
10254         return kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, val,
10255                                       sizeof(u32));
10256 }
10257
10258 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
10259 {
10260         if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
10261                 return false;
10262
10263         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
10264             (vcpu->arch.apf.send_user_only &&
10265              kvm_x86_ops->get_cpl(vcpu) == 0))
10266                 return false;
10267
10268         return true;
10269 }
10270
10271 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
10272 {
10273         if (unlikely(!lapic_in_kernel(vcpu) ||
10274                      kvm_event_needs_reinjection(vcpu) ||
10275                      vcpu->arch.exception.pending))
10276                 return false;
10277
10278         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
10279                 return false;
10280
10281         /*
10282          * If interrupts are off we cannot even use an artificial
10283          * halt state.
10284          */
10285         return kvm_x86_ops->interrupt_allowed(vcpu);
10286 }
10287
10288 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
10289                                      struct kvm_async_pf *work)
10290 {
10291         struct x86_exception fault;
10292
10293         trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
10294         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
10295
10296         if (kvm_can_deliver_async_pf(vcpu) &&
10297             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
10298                 fault.vector = PF_VECTOR;
10299                 fault.error_code_valid = true;
10300                 fault.error_code = 0;
10301                 fault.nested_page_fault = false;
10302                 fault.address = work->arch.token;
10303                 fault.async_page_fault = true;
10304                 kvm_inject_page_fault(vcpu, &fault);
10305         } else {
10306                 /*
10307                  * It is not possible to deliver a paravirtualized asynchronous
10308                  * page fault, but putting the guest in an artificial halt state
10309                  * can be beneficial nevertheless: if an interrupt arrives, we
10310                  * can deliver it timely and perhaps the guest will schedule
10311                  * another process.  When the instruction that triggered a page
10312                  * fault is retried, hopefully the page will be ready in the host.
10313                  */
10314                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
10315         }
10316 }
10317
10318 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
10319                                  struct kvm_async_pf *work)
10320 {
10321         struct x86_exception fault;
10322         u32 val;
10323
10324         if (work->wakeup_all)
10325                 work->arch.token = ~0; /* broadcast wakeup */
10326         else
10327                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
10328         trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
10329
10330         if (vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED &&
10331             !apf_get_user(vcpu, &val)) {
10332                 if (val == KVM_PV_REASON_PAGE_NOT_PRESENT &&
10333                     vcpu->arch.exception.pending &&
10334                     vcpu->arch.exception.nr == PF_VECTOR &&
10335                     !apf_put_user(vcpu, 0)) {
10336                         vcpu->arch.exception.injected = false;
10337                         vcpu->arch.exception.pending = false;
10338                         vcpu->arch.exception.nr = 0;
10339                         vcpu->arch.exception.has_error_code = false;
10340                         vcpu->arch.exception.error_code = 0;
10341                         vcpu->arch.exception.has_payload = false;
10342                         vcpu->arch.exception.payload = 0;
10343                 } else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
10344                         fault.vector = PF_VECTOR;
10345                         fault.error_code_valid = true;
10346                         fault.error_code = 0;
10347                         fault.nested_page_fault = false;
10348                         fault.address = work->arch.token;
10349                         fault.async_page_fault = true;
10350                         kvm_inject_page_fault(vcpu, &fault);
10351                 }
10352         }
10353         vcpu->arch.apf.halted = false;
10354         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10355 }
10356
10357 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
10358 {
10359         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
10360                 return true;
10361         else
10362                 return kvm_can_do_async_pf(vcpu);
10363 }
10364
10365 void kvm_arch_start_assignment(struct kvm *kvm)
10366 {
10367         atomic_inc(&kvm->arch.assigned_device_count);
10368 }
10369 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
10370
10371 void kvm_arch_end_assignment(struct kvm *kvm)
10372 {
10373         atomic_dec(&kvm->arch.assigned_device_count);
10374 }
10375 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
10376
10377 bool kvm_arch_has_assigned_device(struct kvm *kvm)
10378 {
10379         return atomic_read(&kvm->arch.assigned_device_count);
10380 }
10381 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
10382
10383 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
10384 {
10385         atomic_inc(&kvm->arch.noncoherent_dma_count);
10386 }
10387 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
10388
10389 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
10390 {
10391         atomic_dec(&kvm->arch.noncoherent_dma_count);
10392 }
10393 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
10394
10395 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
10396 {
10397         return atomic_read(&kvm->arch.noncoherent_dma_count);
10398 }
10399 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
10400
10401 bool kvm_arch_has_irq_bypass(void)
10402 {
10403         return true;
10404 }
10405
10406 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
10407                                       struct irq_bypass_producer *prod)
10408 {
10409         struct kvm_kernel_irqfd *irqfd =
10410                 container_of(cons, struct kvm_kernel_irqfd, consumer);
10411
10412         irqfd->producer = prod;
10413
10414         return kvm_x86_ops->update_pi_irte(irqfd->kvm,
10415                                            prod->irq, irqfd->gsi, 1);
10416 }
10417
10418 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
10419                                       struct irq_bypass_producer *prod)
10420 {
10421         int ret;
10422         struct kvm_kernel_irqfd *irqfd =
10423                 container_of(cons, struct kvm_kernel_irqfd, consumer);
10424
10425         WARN_ON(irqfd->producer != prod);
10426         irqfd->producer = NULL;
10427
10428         /*
10429          * When producer of consumer is unregistered, we change back to
10430          * remapped mode, so we can re-use the current implementation
10431          * when the irq is masked/disabled or the consumer side (KVM
10432          * int this case doesn't want to receive the interrupts.
10433         */
10434         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
10435         if (ret)
10436                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
10437                        " fails: %d\n", irqfd->consumer.token, ret);
10438 }
10439
10440 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
10441                                    uint32_t guest_irq, bool set)
10442 {
10443         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
10444 }
10445
10446 bool kvm_vector_hashing_enabled(void)
10447 {
10448         return vector_hashing;
10449 }
10450
10451 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
10452 {
10453         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
10454 }
10455 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
10456
10457 u64 kvm_spec_ctrl_valid_bits(struct kvm_vcpu *vcpu)
10458 {
10459         uint64_t bits = SPEC_CTRL_IBRS | SPEC_CTRL_STIBP | SPEC_CTRL_SSBD;
10460
10461         /* The STIBP bit doesn't fault even if it's not advertised */
10462         if (!guest_cpuid_has(vcpu, X86_FEATURE_SPEC_CTRL) &&
10463             !guest_cpuid_has(vcpu, X86_FEATURE_AMD_IBRS))
10464                 bits &= ~(SPEC_CTRL_IBRS | SPEC_CTRL_STIBP);
10465         if (!boot_cpu_has(X86_FEATURE_SPEC_CTRL) &&
10466             !boot_cpu_has(X86_FEATURE_AMD_IBRS))
10467                 bits &= ~(SPEC_CTRL_IBRS | SPEC_CTRL_STIBP);
10468
10469         if (!guest_cpuid_has(vcpu, X86_FEATURE_SPEC_CTRL_SSBD) &&
10470             !guest_cpuid_has(vcpu, X86_FEATURE_AMD_SSBD))
10471                 bits &= ~SPEC_CTRL_SSBD;
10472         if (!boot_cpu_has(X86_FEATURE_SPEC_CTRL_SSBD) &&
10473             !boot_cpu_has(X86_FEATURE_AMD_SSBD))
10474                 bits &= ~SPEC_CTRL_SSBD;
10475
10476         return bits;
10477 }
10478 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_valid_bits);
10479
10480 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
10481 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
10482 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
10483 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
10484 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
10485 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
10486 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
10487 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
10488 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
10489 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
10490 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
10491 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
10492 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
10493 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
10494 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
10495 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
10496 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
10497 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
10498 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
10499 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
10500 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request);