arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *   Yaniv Kamay  <yaniv@qumranet.com>
  15  *   Amit Shah    <amit.shah@qumranet.com>
  16  *   Ben-Ami Yassour <benami@il.ibm.com>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "ioapic.h"
  22 #include "mmu.h"
  23 #include "i8254.h"
  24 #include "tss.h"
  25 #include "kvm_cache_regs.h"
  26 #include "kvm_emulate.h"
  27 #include "x86.h"
  28 #include "cpuid.h"
  29 #include "pmu.h"
  30 #include "hyperv.h"
  31 #include "lapic.h"
  32 #include "xen.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/export.h>
  40 #include <linux/moduleparam.h>
  41 #include <linux/mman.h>
  42 #include <linux/highmem.h>
  43 #include <linux/iommu.h>
  44 #include <linux/intel-iommu.h>
  45 #include <linux/cpufreq.h>
  46 #include <linux/user-return-notifier.h>
  47 #include <linux/srcu.h>
  48 #include <linux/slab.h>
  49 #include <linux/perf_event.h>
  50 #include <linux/uaccess.h>
  51 #include <linux/hash.h>
  52 #include <linux/pci.h>
  53 #include <linux/timekeeper_internal.h>
  54 #include <linux/pvclock_gtod.h>
  55 #include <linux/kvm_irqfd.h>
  56 #include <linux/irqbypass.h>
  57 #include <linux/sched/stat.h>
  58 #include <linux/sched/isolation.h>
  59 #include <linux/mem_encrypt.h>
  60 #include <linux/entry-kvm.h>
  61
  62 #include <trace/events/kvm.h>
  63
  64 #include <asm/debugreg.h>
  65 #include <asm/msr.h>
  66 #include <asm/desc.h>
  67 #include <asm/mce.h>
  68 #include <linux/kernel_stat.h>
  69 #include <asm/fpu/internal.h> /* Ugh! */
  70 #include <asm/pvclock.h>
  71 #include <asm/div64.h>
  72 #include <asm/irq_remapping.h>
  73 #include <asm/mshyperv.h>
  74 #include <asm/hypervisor.h>
  75 #include <asm/tlbflush.h>
  76 #include <asm/intel_pt.h>
  77 #include <asm/emulate_prefix.h>
  78 #include <clocksource/hyperv_timer.h>
  79
  80 #define CREATE_TRACE_POINTS
  81 #include "trace.h"
  82
  83 #define MAX_IO_MSRS 256
  84 #define KVM_MAX_MCE_BANKS 32
  85 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  86 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  87
  88 #define emul_to_vcpu(ctxt) \
  89         ((struct kvm_vcpu *)(ctxt)->vcpu)
  90
  91 /* EFER defaults:
  92  * - enable syscall per default because its emulated by KVM
  93  * - enable LME and LMA per default on 64 bit KVM
  94  */
  95 #ifdef CONFIG_X86_64
  96 static
  97 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  98 #else
  99 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
 100 #endif
 101
 102 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
 103
 104 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
 105                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 106
 107 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 108 static void process_nmi(struct kvm_vcpu *vcpu);
 109 static void process_smi(struct kvm_vcpu *vcpu);
 110 static void enter_smm(struct kvm_vcpu *vcpu);
 111 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 112 static void store_regs(struct kvm_vcpu *vcpu);
 113 static int sync_regs(struct kvm_vcpu *vcpu);
 114
 115 struct kvm_x86_ops kvm_x86_ops __read_mostly;
 116 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 117
 118 #define KVM_X86_OP(func)                                             \
 119         DEFINE_STATIC_CALL_NULL(kvm_x86_##func,                      \
 120                                 *(((struct kvm_x86_ops *)0)->func));
 121 #define KVM_X86_OP_NULL KVM_X86_OP
 122 #include <asm/kvm-x86-ops.h>
 123 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits);
 124 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg);
 125 EXPORT_STATIC_CALL_GPL(kvm_x86_tlb_flush_current);
 126
 127 static bool __read_mostly ignore_msrs = 0;
 128 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 129
 130 bool __read_mostly report_ignored_msrs = true;
 131 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 132 EXPORT_SYMBOL_GPL(report_ignored_msrs);
 133
 134 unsigned int min_timer_period_us = 200;
 135 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 136
 137 static bool __read_mostly kvmclock_periodic_sync = true;
 138 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 139
 140 bool __read_mostly kvm_has_tsc_control;
 141 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 142 u32  __read_mostly kvm_max_guest_tsc_khz;
 143 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 144 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 145 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 146 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 147 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 148 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 149 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 150 bool __read_mostly kvm_has_bus_lock_exit;
 151 EXPORT_SYMBOL_GPL(kvm_has_bus_lock_exit);
 152
 153 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 154 static u32 __read_mostly tsc_tolerance_ppm = 250;
 155 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 156
 157 /*
 158  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 159  * adaptive tuning starting from default advancment of 1000ns.  '0' disables
 160  * advancement entirely.  Any other value is used as-is and disables adaptive
 161  * tuning, i.e. allows priveleged userspace to set an exact advancement time.
 162  */
 163 static int __read_mostly lapic_timer_advance_ns = -1;
 164 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 165
 166 static bool __read_mostly vector_hashing = true;
 167 module_param(vector_hashing, bool, S_IRUGO);
 168
 169 bool __read_mostly enable_vmware_backdoor = false;
 170 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 171 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 172
 173 static bool __read_mostly force_emulation_prefix = false;
 174 module_param(force_emulation_prefix, bool, S_IRUGO);
 175
 176 int __read_mostly pi_inject_timer = -1;
 177 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
 178
 179 /*
 180  * Restoring the host value for MSRs that are only consumed when running in
 181  * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
 182  * returns to userspace, i.e. the kernel can run with the guest's value.
 183  */
 184 #define KVM_MAX_NR_USER_RETURN_MSRS 16
 185
 186 struct kvm_user_return_msrs_global {
 187         int nr;
 188         u32 msrs[KVM_MAX_NR_USER_RETURN_MSRS];
 189 };
 190
 191 struct kvm_user_return_msrs {
 192         struct user_return_notifier urn;
 193         bool registered;
 194         struct kvm_user_return_msr_values {
 195                 u64 host;
 196                 u64 curr;
 197         } values[KVM_MAX_NR_USER_RETURN_MSRS];
 198 };
 199
 200 static struct kvm_user_return_msrs_global __read_mostly user_return_msrs_global;
 201 static struct kvm_user_return_msrs __percpu *user_return_msrs;
 202
 203 #define KVM_SUPPORTED_XCR0     (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
 204                                 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
 205                                 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
 206                                 | XFEATURE_MASK_PKRU)
 207
 208 u64 __read_mostly host_efer;
 209 EXPORT_SYMBOL_GPL(host_efer);
 210
 211 bool __read_mostly allow_smaller_maxphyaddr = 0;
 212 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr);
 213
 214 u64 __read_mostly host_xss;
 215 EXPORT_SYMBOL_GPL(host_xss);
 216 u64 __read_mostly supported_xss;
 217 EXPORT_SYMBOL_GPL(supported_xss);
 218
 219 struct kvm_stats_debugfs_item debugfs_entries[] = {
 220         VCPU_STAT("pf_fixed", pf_fixed),
 221         VCPU_STAT("pf_guest", pf_guest),
 222         VCPU_STAT("tlb_flush", tlb_flush),
 223         VCPU_STAT("invlpg", invlpg),
 224         VCPU_STAT("exits", exits),
 225         VCPU_STAT("io_exits", io_exits),
 226         VCPU_STAT("mmio_exits", mmio_exits),
 227         VCPU_STAT("signal_exits", signal_exits),
 228         VCPU_STAT("irq_window", irq_window_exits),
 229         VCPU_STAT("nmi_window", nmi_window_exits),
 230         VCPU_STAT("halt_exits", halt_exits),
 231         VCPU_STAT("halt_successful_poll", halt_successful_poll),
 232         VCPU_STAT("halt_attempted_poll", halt_attempted_poll),
 233         VCPU_STAT("halt_poll_invalid", halt_poll_invalid),
 234         VCPU_STAT("halt_wakeup", halt_wakeup),
 235         VCPU_STAT("hypercalls", hypercalls),
 236         VCPU_STAT("request_irq", request_irq_exits),
 237         VCPU_STAT("irq_exits", irq_exits),
 238         VCPU_STAT("host_state_reload", host_state_reload),
 239         VCPU_STAT("fpu_reload", fpu_reload),
 240         VCPU_STAT("insn_emulation", insn_emulation),
 241         VCPU_STAT("insn_emulation_fail", insn_emulation_fail),
 242         VCPU_STAT("irq_injections", irq_injections),
 243         VCPU_STAT("nmi_injections", nmi_injections),
 244         VCPU_STAT("req_event", req_event),
 245         VCPU_STAT("l1d_flush", l1d_flush),
 246         VCPU_STAT("halt_poll_success_ns", halt_poll_success_ns),
 247         VCPU_STAT("halt_poll_fail_ns", halt_poll_fail_ns),
 248         VM_STAT("mmu_shadow_zapped", mmu_shadow_zapped),
 249         VM_STAT("mmu_pte_write", mmu_pte_write),
 250         VM_STAT("mmu_pde_zapped", mmu_pde_zapped),
 251         VM_STAT("mmu_flooded", mmu_flooded),
 252         VM_STAT("mmu_recycled", mmu_recycled),
 253         VM_STAT("mmu_cache_miss", mmu_cache_miss),
 254         VM_STAT("mmu_unsync", mmu_unsync),
 255         VM_STAT("remote_tlb_flush", remote_tlb_flush),
 256         VM_STAT("largepages", lpages, .mode = 0444),
 257         VM_STAT("nx_largepages_splitted", nx_lpage_splits, .mode = 0444),
 258         VM_STAT("max_mmu_page_hash_collisions", max_mmu_page_hash_collisions),
 259         { NULL }
 260 };
 261
 262 u64 __read_mostly host_xcr0;
 263 u64 __read_mostly supported_xcr0;
 264 EXPORT_SYMBOL_GPL(supported_xcr0);
 265
 266 static struct kmem_cache *x86_fpu_cache;
 267
 268 static struct kmem_cache *x86_emulator_cache;
 269
 270 /*
 271  * When called, it means the previous get/set msr reached an invalid msr.
 272  * Return true if we want to ignore/silent this failed msr access.
 273  */
 274 static bool kvm_msr_ignored_check(u32 msr, u64 data, bool write)
 275 {
 276         const char *op = write ? "wrmsr" : "rdmsr";
 277
 278         if (ignore_msrs) {
 279                 if (report_ignored_msrs)
 280                         kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
 281                                       op, msr, data);
 282                 /* Mask the error */
 283                 return true;
 284         } else {
 285                 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
 286                                       op, msr, data);
 287                 return false;
 288         }
 289 }
 290
 291 static struct kmem_cache *kvm_alloc_emulator_cache(void)
 292 {
 293         unsigned int useroffset = offsetof(struct x86_emulate_ctxt, src);
 294         unsigned int size = sizeof(struct x86_emulate_ctxt);
 295
 296         return kmem_cache_create_usercopy("x86_emulator", size,
 297                                           __alignof__(struct x86_emulate_ctxt),
 298                                           SLAB_ACCOUNT, useroffset,
 299                                           size - useroffset, NULL);
 300 }
 301
 302 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 303
 304 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 305 {
 306         int i;
 307         for (i = 0; i < ASYNC_PF_PER_VCPU; i++)
 308                 vcpu->arch.apf.gfns[i] = ~0;
 309 }
 310
 311 static void kvm_on_user_return(struct user_return_notifier *urn)
 312 {
 313         unsigned slot;
 314         struct kvm_user_return_msrs *msrs
 315                 = container_of(urn, struct kvm_user_return_msrs, urn);
 316         struct kvm_user_return_msr_values *values;
 317         unsigned long flags;
 318
 319         /*
 320          * Disabling irqs at this point since the following code could be
 321          * interrupted and executed through kvm_arch_hardware_disable()
 322          */
 323         local_irq_save(flags);
 324         if (msrs->registered) {
 325                 msrs->registered = false;
 326                 user_return_notifier_unregister(urn);
 327         }
 328         local_irq_restore(flags);
 329         for (slot = 0; slot < user_return_msrs_global.nr; ++slot) {
 330                 values = &msrs->values[slot];
 331                 if (values->host != values->curr) {
 332                         wrmsrl(user_return_msrs_global.msrs[slot], values->host);
 333                         values->curr = values->host;
 334                 }
 335         }
 336 }
 337
 338 void kvm_define_user_return_msr(unsigned slot, u32 msr)
 339 {
 340         BUG_ON(slot >= KVM_MAX_NR_USER_RETURN_MSRS);
 341         user_return_msrs_global.msrs[slot] = msr;
 342         if (slot >= user_return_msrs_global.nr)
 343                 user_return_msrs_global.nr = slot + 1;
 344 }
 345 EXPORT_SYMBOL_GPL(kvm_define_user_return_msr);
 346
 347 static void kvm_user_return_msr_cpu_online(void)
 348 {
 349         unsigned int cpu = smp_processor_id();
 350         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 351         u64 value;
 352         int i;
 353
 354         for (i = 0; i < user_return_msrs_global.nr; ++i) {
 355                 rdmsrl_safe(user_return_msrs_global.msrs[i], &value);
 356                 msrs->values[i].host = value;
 357                 msrs->values[i].curr = value;
 358         }
 359 }
 360
 361 int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)
 362 {
 363         unsigned int cpu = smp_processor_id();
 364         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 365         int err;
 366
 367         value = (value & mask) | (msrs->values[slot].host & ~mask);
 368         if (value == msrs->values[slot].curr)
 369                 return 0;
 370         err = wrmsrl_safe(user_return_msrs_global.msrs[slot], value);
 371         if (err)
 372                 return 1;
 373
 374         msrs->values[slot].curr = value;
 375         if (!msrs->registered) {
 376                 msrs->urn.on_user_return = kvm_on_user_return;
 377                 user_return_notifier_register(&msrs->urn);
 378                 msrs->registered = true;
 379         }
 380         return 0;
 381 }
 382 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr);
 383
 384 static void drop_user_return_notifiers(void)
 385 {
 386         unsigned int cpu = smp_processor_id();
 387         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 388
 389         if (msrs->registered)
 390                 kvm_on_user_return(&msrs->urn);
 391 }
 392
 393 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 394 {
 395         return vcpu->arch.apic_base;
 396 }
 397 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 398
 399 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 400 {
 401         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 402 }
 403 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 404
 405 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 406 {
 407         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 408         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 409         u64 reserved_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu) | 0x2ff |
 410                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 411
 412         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 413                 return 1;
 414         if (!msr_info->host_initiated) {
 415                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 416                         return 1;
 417                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 418                         return 1;
 419         }
 420
 421         kvm_lapic_set_base(vcpu, msr_info->data);
 422         kvm_recalculate_apic_map(vcpu->kvm);
 423         return 0;
 424 }
 425 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 426
 427 asmlinkage __visible noinstr void kvm_spurious_fault(void)
 428 {
 429         /* Fault while not rebooting.  We want the trace. */
 430         BUG_ON(!kvm_rebooting);
 431 }
 432 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 433
 434 #define EXCPT_BENIGN            0
 435 #define EXCPT_CONTRIBUTORY      1
 436 #define EXCPT_PF                2
 437
 438 static int exception_class(int vector)
 439 {
 440         switch (vector) {
 441         case PF_VECTOR:
 442                 return EXCPT_PF;
 443         case DE_VECTOR:
 444         case TS_VECTOR:
 445         case NP_VECTOR:
 446         case SS_VECTOR:
 447         case GP_VECTOR:
 448                 return EXCPT_CONTRIBUTORY;
 449         default:
 450                 break;
 451         }
 452         return EXCPT_BENIGN;
 453 }
 454
 455 #define EXCPT_FAULT             0
 456 #define EXCPT_TRAP              1
 457 #define EXCPT_ABORT             2
 458 #define EXCPT_INTERRUPT         3
 459
 460 static int exception_type(int vector)
 461 {
 462         unsigned int mask;
 463
 464         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 465                 return EXCPT_INTERRUPT;
 466
 467         mask = 1 << vector;
 468
 469         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 470         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 471                 return EXCPT_TRAP;
 472
 473         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 474                 return EXCPT_ABORT;
 475
 476         /* Reserved exceptions will result in fault */
 477         return EXCPT_FAULT;
 478 }
 479
 480 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 481 {
 482         unsigned nr = vcpu->arch.exception.nr;
 483         bool has_payload = vcpu->arch.exception.has_payload;
 484         unsigned long payload = vcpu->arch.exception.payload;
 485
 486         if (!has_payload)
 487                 return;
 488
 489         switch (nr) {
 490         case DB_VECTOR:
 491                 /*
 492                  * "Certain debug exceptions may clear bit 0-3.  The
 493                  * remaining contents of the DR6 register are never
 494                  * cleared by the processor".
 495                  */
 496                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 497                 /*
 498                  * In order to reflect the #DB exception payload in guest
 499                  * dr6, three components need to be considered: active low
 500                  * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
 501                  * DR6_BS and DR6_BT)
 502                  * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
 503                  * In the target guest dr6:
 504                  * FIXED_1 bits should always be set.
 505                  * Active low bits should be cleared if 1-setting in payload.
 506                  * Active high bits should be set if 1-setting in payload.
 507                  *
 508                  * Note, the payload is compatible with the pending debug
 509                  * exceptions/exit qualification under VMX, that active_low bits
 510                  * are active high in payload.
 511                  * So they need to be flipped for DR6.
 512                  */
 513                 vcpu->arch.dr6 |= DR6_ACTIVE_LOW;
 514                 vcpu->arch.dr6 |= payload;
 515                 vcpu->arch.dr6 ^= payload & DR6_ACTIVE_LOW;
 516
 517                 /*
 518                  * The #DB payload is defined as compatible with the 'pending
 519                  * debug exceptions' field under VMX, not DR6. While bit 12 is
 520                  * defined in the 'pending debug exceptions' field (enabled
 521                  * breakpoint), it is reserved and must be zero in DR6.
 522                  */
 523                 vcpu->arch.dr6 &= ~BIT(12);
 524                 break;
 525         case PF_VECTOR:
 526                 vcpu->arch.cr2 = payload;
 527                 break;
 528         }
 529
 530         vcpu->arch.exception.has_payload = false;
 531         vcpu->arch.exception.payload = 0;
 532 }
 533 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 534
 535 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 536                 unsigned nr, bool has_error, u32 error_code,
 537                 bool has_payload, unsigned long payload, bool reinject)
 538 {
 539         u32 prev_nr;
 540         int class1, class2;
 541
 542         kvm_make_request(KVM_REQ_EVENT, vcpu);
 543
 544         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 545         queue:
 546                 if (has_error && !is_protmode(vcpu))
 547                         has_error = false;
 548                 if (reinject) {
 549                         /*
 550                          * On vmentry, vcpu->arch.exception.pending is only
 551                          * true if an event injection was blocked by
 552                          * nested_run_pending.  In that case, however,
 553                          * vcpu_enter_guest requests an immediate exit,
 554                          * and the guest shouldn't proceed far enough to
 555                          * need reinjection.
 556                          */
 557                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 558                         vcpu->arch.exception.injected = true;
 559                         if (WARN_ON_ONCE(has_payload)) {
 560                                 /*
 561                                  * A reinjected event has already
 562                                  * delivered its payload.
 563                                  */
 564                                 has_payload = false;
 565                                 payload = 0;
 566                         }
 567                 } else {
 568                         vcpu->arch.exception.pending = true;
 569                         vcpu->arch.exception.injected = false;
 570                 }
 571                 vcpu->arch.exception.has_error_code = has_error;
 572                 vcpu->arch.exception.nr = nr;
 573                 vcpu->arch.exception.error_code = error_code;
 574                 vcpu->arch.exception.has_payload = has_payload;
 575                 vcpu->arch.exception.payload = payload;
 576                 if (!is_guest_mode(vcpu))
 577                         kvm_deliver_exception_payload(vcpu);
 578                 return;
 579         }
 580
 581         /* to check exception */
 582         prev_nr = vcpu->arch.exception.nr;
 583         if (prev_nr == DF_VECTOR) {
 584                 /* triple fault -> shutdown */
 585                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 586                 return;
 587         }
 588         class1 = exception_class(prev_nr);
 589         class2 = exception_class(nr);
 590         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 591                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 592                 /*
 593                  * Generate double fault per SDM Table 5-5.  Set
 594                  * exception.pending = true so that the double fault
 595                  * can trigger a nested vmexit.
 596                  */
 597                 vcpu->arch.exception.pending = true;
 598                 vcpu->arch.exception.injected = false;
 599                 vcpu->arch.exception.has_error_code = true;
 600                 vcpu->arch.exception.nr = DF_VECTOR;
 601                 vcpu->arch.exception.error_code = 0;
 602                 vcpu->arch.exception.has_payload = false;
 603                 vcpu->arch.exception.payload = 0;
 604         } else
 605                 /* replace previous exception with a new one in a hope
 606                    that instruction re-execution will regenerate lost
 607                    exception */
 608                 goto queue;
 609 }
 610
 611 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 612 {
 613         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 614 }
 615 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 616
 617 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 618 {
 619         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 620 }
 621 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 622
 623 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 624                            unsigned long payload)
 625 {
 626         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 627 }
 628 EXPORT_SYMBOL_GPL(kvm_queue_exception_p);
 629
 630 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 631                                     u32 error_code, unsigned long payload)
 632 {
 633         kvm_multiple_exception(vcpu, nr, true, error_code,
 634                                true, payload, false);
 635 }
 636
 637 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 638 {
 639         if (err)
 640                 kvm_inject_gp(vcpu, 0);
 641         else
 642                 return kvm_skip_emulated_instruction(vcpu);
 643
 644         return 1;
 645 }
 646 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 647
 648 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 649 {
 650         ++vcpu->stat.pf_guest;
 651         vcpu->arch.exception.nested_apf =
 652                 is_guest_mode(vcpu) && fault->async_page_fault;
 653         if (vcpu->arch.exception.nested_apf) {
 654                 vcpu->arch.apf.nested_apf_token = fault->address;
 655                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 656         } else {
 657                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 658                                         fault->address);
 659         }
 660 }
 661 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 662
 663 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
 664                                     struct x86_exception *fault)
 665 {
 666         struct kvm_mmu *fault_mmu;
 667         WARN_ON_ONCE(fault->vector != PF_VECTOR);
 668
 669         fault_mmu = fault->nested_page_fault ? vcpu->arch.mmu :
 670                                                vcpu->arch.walk_mmu;
 671
 672         /*
 673          * Invalidate the TLB entry for the faulting address, if it exists,
 674          * else the access will fault indefinitely (and to emulate hardware).
 675          */
 676         if ((fault->error_code & PFERR_PRESENT_MASK) &&
 677             !(fault->error_code & PFERR_RSVD_MASK))
 678                 kvm_mmu_invalidate_gva(vcpu, fault_mmu, fault->address,
 679                                        fault_mmu->root_hpa);
 680
 681         fault_mmu->inject_page_fault(vcpu, fault);
 682         return fault->nested_page_fault;
 683 }
 684 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault);
 685
 686 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 687 {
 688         atomic_inc(&vcpu->arch.nmi_queued);
 689         kvm_make_request(KVM_REQ_NMI, vcpu);
 690 }
 691 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 692
 693 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 694 {
 695         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 696 }
 697 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 698
 699 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 700 {
 701         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 702 }
 703 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 704
 705 /*
 706  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 707  * a #GP and return false.
 708  */
 709 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 710 {
 711         if (static_call(kvm_x86_get_cpl)(vcpu) <= required_cpl)
 712                 return true;
 713         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 714         return false;
 715 }
 716 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 717
 718 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 719 {
 720         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 721                 return true;
 722
 723         kvm_queue_exception(vcpu, UD_VECTOR);
 724         return false;
 725 }
 726 EXPORT_SYMBOL_GPL(kvm_require_dr);
 727
 728 /*
 729  * This function will be used to read from the physical memory of the currently
 730  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 731  * can read from guest physical or from the guest's guest physical memory.
 732  */
 733 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 734                             gfn_t ngfn, void *data, int offset, int len,
 735                             u32 access)
 736 {
 737         struct x86_exception exception;
 738         gfn_t real_gfn;
 739         gpa_t ngpa;
 740
 741         ngpa     = gfn_to_gpa(ngfn);
 742         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 743         if (real_gfn == UNMAPPED_GVA)
 744                 return -EFAULT;
 745
 746         real_gfn = gpa_to_gfn(real_gfn);
 747
 748         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 749 }
 750 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 751
 752 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 753                                void *data, int offset, int len, u32 access)
 754 {
 755         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 756                                        data, offset, len, access);
 757 }
 758
 759 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
 760 {
 761         return vcpu->arch.reserved_gpa_bits | rsvd_bits(5, 8) | rsvd_bits(1, 2);
 762 }
 763
 764 /*
 765  * Load the pae pdptrs.  Return 1 if they are all valid, 0 otherwise.
 766  */
 767 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 768 {
 769         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 770         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 771         int i;
 772         int ret;
 773         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 774
 775         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 776                                       offset * sizeof(u64), sizeof(pdpte),
 777                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 778         if (ret < 0) {
 779                 ret = 0;
 780                 goto out;
 781         }
 782         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 783                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 784                     (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
 785                         ret = 0;
 786                         goto out;
 787                 }
 788         }
 789         ret = 1;
 790
 791         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 792         kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
 793
 794 out:
 795
 796         return ret;
 797 }
 798 EXPORT_SYMBOL_GPL(load_pdptrs);
 799
 800 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 801 {
 802         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 803         int offset;
 804         gfn_t gfn;
 805         int r;
 806
 807         if (!is_pae_paging(vcpu))
 808                 return false;
 809
 810         if (!kvm_register_is_available(vcpu, VCPU_EXREG_PDPTR))
 811                 return true;
 812
 813         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 814         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 815         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 816                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 817         if (r < 0)
 818                 return true;
 819
 820         return memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 821 }
 822 EXPORT_SYMBOL_GPL(pdptrs_changed);
 823
 824 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0)
 825 {
 826         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 827
 828         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 829                 kvm_clear_async_pf_completion_queue(vcpu);
 830                 kvm_async_pf_hash_reset(vcpu);
 831         }
 832
 833         if ((cr0 ^ old_cr0) & update_bits)
 834                 kvm_mmu_reset_context(vcpu);
 835
 836         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 837             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 838             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 839                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 840 }
 841 EXPORT_SYMBOL_GPL(kvm_post_set_cr0);
 842
 843 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 844 {
 845         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 846         unsigned long pdptr_bits = X86_CR0_CD | X86_CR0_NW | X86_CR0_PG;
 847
 848         cr0 |= X86_CR0_ET;
 849
 850 #ifdef CONFIG_X86_64
 851         if (cr0 & 0xffffffff00000000UL)
 852                 return 1;
 853 #endif
 854
 855         cr0 &= ~CR0_RESERVED_BITS;
 856
 857         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 858                 return 1;
 859
 860         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 861                 return 1;
 862
 863 #ifdef CONFIG_X86_64
 864         if ((vcpu->arch.efer & EFER_LME) && !is_paging(vcpu) &&
 865             (cr0 & X86_CR0_PG)) {
 866                 int cs_db, cs_l;
 867
 868                 if (!is_pae(vcpu))
 869                         return 1;
 870                 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
 871                 if (cs_l)
 872                         return 1;
 873         }
 874 #endif
 875         if (!(vcpu->arch.efer & EFER_LME) && (cr0 & X86_CR0_PG) &&
 876             is_pae(vcpu) && ((cr0 ^ old_cr0) & pdptr_bits) &&
 877             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu)))
 878                 return 1;
 879
 880         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 881                 return 1;
 882
 883         static_call(kvm_x86_set_cr0)(vcpu, cr0);
 884
 885         kvm_post_set_cr0(vcpu, old_cr0, cr0);
 886
 887         return 0;
 888 }
 889 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 890
 891 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 892 {
 893         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 894 }
 895 EXPORT_SYMBOL_GPL(kvm_lmsw);
 896
 897 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
 898 {
 899         if (vcpu->arch.guest_state_protected)
 900                 return;
 901
 902         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 903
 904                 if (vcpu->arch.xcr0 != host_xcr0)
 905                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 906
 907                 if (vcpu->arch.xsaves_enabled &&
 908                     vcpu->arch.ia32_xss != host_xss)
 909                         wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
 910         }
 911
 912         if (static_cpu_has(X86_FEATURE_PKU) &&
 913             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 914              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU)) &&
 915             vcpu->arch.pkru != vcpu->arch.host_pkru)
 916                 __write_pkru(vcpu->arch.pkru);
 917 }
 918 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
 919
 920 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
 921 {
 922         if (vcpu->arch.guest_state_protected)
 923                 return;
 924
 925         if (static_cpu_has(X86_FEATURE_PKU) &&
 926             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 927              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU))) {
 928                 vcpu->arch.pkru = rdpkru();
 929                 if (vcpu->arch.pkru != vcpu->arch.host_pkru)
 930                         __write_pkru(vcpu->arch.host_pkru);
 931         }
 932
 933         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 934
 935                 if (vcpu->arch.xcr0 != host_xcr0)
 936                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 937
 938                 if (vcpu->arch.xsaves_enabled &&
 939                     vcpu->arch.ia32_xss != host_xss)
 940                         wrmsrl(MSR_IA32_XSS, host_xss);
 941         }
 942
 943 }
 944 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
 945
 946 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 947 {
 948         u64 xcr0 = xcr;
 949         u64 old_xcr0 = vcpu->arch.xcr0;
 950         u64 valid_bits;
 951
 952         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 953         if (index != XCR_XFEATURE_ENABLED_MASK)
 954                 return 1;
 955         if (!(xcr0 & XFEATURE_MASK_FP))
 956                 return 1;
 957         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 958                 return 1;
 959
 960         /*
 961          * Do not allow the guest to set bits that we do not support
 962          * saving.  However, xcr0 bit 0 is always set, even if the
 963          * emulated CPU does not support XSAVE (see fx_init).
 964          */
 965         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 966         if (xcr0 & ~valid_bits)
 967                 return 1;
 968
 969         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 970             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 971                 return 1;
 972
 973         if (xcr0 & XFEATURE_MASK_AVX512) {
 974                 if (!(xcr0 & XFEATURE_MASK_YMM))
 975                         return 1;
 976                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 977                         return 1;
 978         }
 979         vcpu->arch.xcr0 = xcr0;
 980
 981         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 982                 kvm_update_cpuid_runtime(vcpu);
 983         return 0;
 984 }
 985
 986 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 987 {
 988         if (static_call(kvm_x86_get_cpl)(vcpu) == 0)
 989                 return __kvm_set_xcr(vcpu, index, xcr);
 990
 991         return 1;
 992 }
 993 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 994
 995 bool kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 996 {
 997         if (cr4 & cr4_reserved_bits)
 998                 return false;
 999
1000         if (cr4 & vcpu->arch.cr4_guest_rsvd_bits)
1001                 return false;
1002
1003         return static_call(kvm_x86_is_valid_cr4)(vcpu, cr4);
1004 }
1005 EXPORT_SYMBOL_GPL(kvm_is_valid_cr4);
1006
1007 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4)
1008 {
1009         unsigned long mmu_role_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
1010                                       X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
1011
1012         if (((cr4 ^ old_cr4) & mmu_role_bits) ||
1013             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
1014                 kvm_mmu_reset_context(vcpu);
1015 }
1016 EXPORT_SYMBOL_GPL(kvm_post_set_cr4);
1017
1018 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1019 {
1020         unsigned long old_cr4 = kvm_read_cr4(vcpu);
1021         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
1022                                    X86_CR4_SMEP;
1023
1024         if (!kvm_is_valid_cr4(vcpu, cr4))
1025                 return 1;
1026
1027         if (is_long_mode(vcpu)) {
1028                 if (!(cr4 & X86_CR4_PAE))
1029                         return 1;
1030                 if ((cr4 ^ old_cr4) & X86_CR4_LA57)
1031                         return 1;
1032         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
1033                    && ((cr4 ^ old_cr4) & pdptr_bits)
1034                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
1035                                    kvm_read_cr3(vcpu)))
1036                 return 1;
1037
1038         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
1039                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
1040                         return 1;
1041
1042                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1043                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
1044                         return 1;
1045         }
1046
1047         static_call(kvm_x86_set_cr4)(vcpu, cr4);
1048
1049         kvm_post_set_cr4(vcpu, old_cr4, cr4);
1050
1051         return 0;
1052 }
1053 EXPORT_SYMBOL_GPL(kvm_set_cr4);
1054
1055 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1056 {
1057         bool skip_tlb_flush = false;
1058 #ifdef CONFIG_X86_64
1059         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
1060
1061         if (pcid_enabled) {
1062                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
1063                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
1064         }
1065 #endif
1066
1067         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
1068                 if (!skip_tlb_flush) {
1069                         kvm_mmu_sync_roots(vcpu);
1070                         kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1071                 }
1072                 return 0;
1073         }
1074
1075         if (is_long_mode(vcpu) && kvm_vcpu_is_illegal_gpa(vcpu, cr3))
1076                 return 1;
1077         else if (is_pae_paging(vcpu) &&
1078                  !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
1079                 return 1;
1080
1081         kvm_mmu_new_pgd(vcpu, cr3, skip_tlb_flush, skip_tlb_flush);
1082         vcpu->arch.cr3 = cr3;
1083         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
1084
1085         return 0;
1086 }
1087 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1088
1089 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1090 {
1091         if (cr8 & CR8_RESERVED_BITS)
1092                 return 1;
1093         if (lapic_in_kernel(vcpu))
1094                 kvm_lapic_set_tpr(vcpu, cr8);
1095         else
1096                 vcpu->arch.cr8 = cr8;
1097         return 0;
1098 }
1099 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1100
1101 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1102 {
1103         if (lapic_in_kernel(vcpu))
1104                 return kvm_lapic_get_cr8(vcpu);
1105         else
1106                 return vcpu->arch.cr8;
1107 }
1108 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1109
1110 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1111 {
1112         int i;
1113
1114         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1115                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1116                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1117                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
1118         }
1119 }
1120
1121 void kvm_update_dr7(struct kvm_vcpu *vcpu)
1122 {
1123         unsigned long dr7;
1124
1125         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1126                 dr7 = vcpu->arch.guest_debug_dr7;
1127         else
1128                 dr7 = vcpu->arch.dr7;
1129         static_call(kvm_x86_set_dr7)(vcpu, dr7);
1130         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1131         if (dr7 & DR7_BP_EN_MASK)
1132                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1133 }
1134 EXPORT_SYMBOL_GPL(kvm_update_dr7);
1135
1136 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1137 {
1138         u64 fixed = DR6_FIXED_1;
1139
1140         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1141                 fixed |= DR6_RTM;
1142         return fixed;
1143 }
1144
1145 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1146 {
1147         size_t size = ARRAY_SIZE(vcpu->arch.db);
1148
1149         switch (dr) {
1150         case 0 ... 3:
1151                 vcpu->arch.db[array_index_nospec(dr, size)] = val;
1152                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1153                         vcpu->arch.eff_db[dr] = val;
1154                 break;
1155         case 4:
1156         case 6:
1157                 if (!kvm_dr6_valid(val))
1158                         return 1; /* #GP */
1159                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1160                 break;
1161         case 5:
1162         default: /* 7 */
1163                 if (!kvm_dr7_valid(val))
1164                         return 1; /* #GP */
1165                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1166                 kvm_update_dr7(vcpu);
1167                 break;
1168         }
1169
1170         return 0;
1171 }
1172 EXPORT_SYMBOL_GPL(kvm_set_dr);
1173
1174 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1175 {
1176         size_t size = ARRAY_SIZE(vcpu->arch.db);
1177
1178         switch (dr) {
1179         case 0 ... 3:
1180                 *val = vcpu->arch.db[array_index_nospec(dr, size)];
1181                 break;
1182         case 4:
1183         case 6:
1184                 *val = vcpu->arch.dr6;
1185                 break;
1186         case 5:
1187         default: /* 7 */
1188                 *val = vcpu->arch.dr7;
1189                 break;
1190         }
1191 }
1192 EXPORT_SYMBOL_GPL(kvm_get_dr);
1193
1194 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
1195 {
1196         u32 ecx = kvm_rcx_read(vcpu);
1197         u64 data;
1198         int err;
1199
1200         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
1201         if (err)
1202                 return err;
1203         kvm_rax_write(vcpu, (u32)data);
1204         kvm_rdx_write(vcpu, data >> 32);
1205         return err;
1206 }
1207 EXPORT_SYMBOL_GPL(kvm_rdpmc);
1208
1209 /*
1210  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1211  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1212  *
1213  * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1214  * extract the supported MSRs from the related const lists.
1215  * msrs_to_save is selected from the msrs_to_save_all to reflect the
1216  * capabilities of the host cpu. This capabilities test skips MSRs that are
1217  * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1218  * may depend on host virtualization features rather than host cpu features.
1219  */
1220
1221 static const u32 msrs_to_save_all[] = {
1222         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1223         MSR_STAR,
1224 #ifdef CONFIG_X86_64
1225         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1226 #endif
1227         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1228         MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1229         MSR_IA32_SPEC_CTRL,
1230         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1231         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1232         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1233         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1234         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1235         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1236         MSR_IA32_UMWAIT_CONTROL,
1237
1238         MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1239         MSR_ARCH_PERFMON_FIXED_CTR0 + 2, MSR_ARCH_PERFMON_FIXED_CTR0 + 3,
1240         MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1241         MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1242         MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1243         MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1244         MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1245         MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1246         MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1247         MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1248         MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1249         MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1250         MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1251         MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1252         MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1253         MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1254         MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1255         MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1256         MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1257         MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1258         MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1259         MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1260 };
1261
1262 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
1263 static unsigned num_msrs_to_save;
1264
1265 static const u32 emulated_msrs_all[] = {
1266         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1267         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1268         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1269         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1270         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1271         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1272         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1273         HV_X64_MSR_RESET,
1274         HV_X64_MSR_VP_INDEX,
1275         HV_X64_MSR_VP_RUNTIME,
1276         HV_X64_MSR_SCONTROL,
1277         HV_X64_MSR_STIMER0_CONFIG,
1278         HV_X64_MSR_VP_ASSIST_PAGE,
1279         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1280         HV_X64_MSR_TSC_EMULATION_STATUS,
1281         HV_X64_MSR_SYNDBG_OPTIONS,
1282         HV_X64_MSR_SYNDBG_CONTROL, HV_X64_MSR_SYNDBG_STATUS,
1283         HV_X64_MSR_SYNDBG_SEND_BUFFER, HV_X64_MSR_SYNDBG_RECV_BUFFER,
1284         HV_X64_MSR_SYNDBG_PENDING_BUFFER,
1285
1286         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1287         MSR_KVM_PV_EOI_EN, MSR_KVM_ASYNC_PF_INT, MSR_KVM_ASYNC_PF_ACK,
1288
1289         MSR_IA32_TSC_ADJUST,
1290         MSR_IA32_TSCDEADLINE,
1291         MSR_IA32_ARCH_CAPABILITIES,
1292         MSR_IA32_PERF_CAPABILITIES,
1293         MSR_IA32_MISC_ENABLE,
1294         MSR_IA32_MCG_STATUS,
1295         MSR_IA32_MCG_CTL,
1296         MSR_IA32_MCG_EXT_CTL,
1297         MSR_IA32_SMBASE,
1298         MSR_SMI_COUNT,
1299         MSR_PLATFORM_INFO,
1300         MSR_MISC_FEATURES_ENABLES,
1301         MSR_AMD64_VIRT_SPEC_CTRL,
1302         MSR_IA32_POWER_CTL,
1303         MSR_IA32_UCODE_REV,
1304
1305         /*
1306          * The following list leaves out MSRs whose values are determined
1307          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1308          * We always support the "true" VMX control MSRs, even if the host
1309          * processor does not, so I am putting these registers here rather
1310          * than in msrs_to_save_all.
1311          */
1312         MSR_IA32_VMX_BASIC,
1313         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1314         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1315         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1316         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1317         MSR_IA32_VMX_MISC,
1318         MSR_IA32_VMX_CR0_FIXED0,
1319         MSR_IA32_VMX_CR4_FIXED0,
1320         MSR_IA32_VMX_VMCS_ENUM,
1321         MSR_IA32_VMX_PROCBASED_CTLS2,
1322         MSR_IA32_VMX_EPT_VPID_CAP,
1323         MSR_IA32_VMX_VMFUNC,
1324
1325         MSR_K7_HWCR,
1326         MSR_KVM_POLL_CONTROL,
1327 };
1328
1329 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1330 static unsigned num_emulated_msrs;
1331
1332 /*
1333  * List of msr numbers which are used to expose MSR-based features that
1334  * can be used by a hypervisor to validate requested CPU features.
1335  */
1336 static const u32 msr_based_features_all[] = {
1337         MSR_IA32_VMX_BASIC,
1338         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1339         MSR_IA32_VMX_PINBASED_CTLS,
1340         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1341         MSR_IA32_VMX_PROCBASED_CTLS,
1342         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1343         MSR_IA32_VMX_EXIT_CTLS,
1344         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1345         MSR_IA32_VMX_ENTRY_CTLS,
1346         MSR_IA32_VMX_MISC,
1347         MSR_IA32_VMX_CR0_FIXED0,
1348         MSR_IA32_VMX_CR0_FIXED1,
1349         MSR_IA32_VMX_CR4_FIXED0,
1350         MSR_IA32_VMX_CR4_FIXED1,
1351         MSR_IA32_VMX_VMCS_ENUM,
1352         MSR_IA32_VMX_PROCBASED_CTLS2,
1353         MSR_IA32_VMX_EPT_VPID_CAP,
1354         MSR_IA32_VMX_VMFUNC,
1355
1356         MSR_F10H_DECFG,
1357         MSR_IA32_UCODE_REV,
1358         MSR_IA32_ARCH_CAPABILITIES,
1359         MSR_IA32_PERF_CAPABILITIES,
1360 };
1361
1362 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
1363 static unsigned int num_msr_based_features;
1364
1365 static u64 kvm_get_arch_capabilities(void)
1366 {
1367         u64 data = 0;
1368
1369         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1370                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1371
1372         /*
1373          * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1374          * the nested hypervisor runs with NX huge pages.  If it is not,
1375          * L1 is anyway vulnerable to ITLB_MULTIHIT explots from other
1376          * L1 guests, so it need not worry about its own (L2) guests.
1377          */
1378         data |= ARCH_CAP_PSCHANGE_MC_NO;
1379
1380         /*
1381          * If we're doing cache flushes (either "always" or "cond")
1382          * we will do one whenever the guest does a vmlaunch/vmresume.
1383          * If an outer hypervisor is doing the cache flush for us
1384          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1385          * capability to the guest too, and if EPT is disabled we're not
1386          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1387          * require a nested hypervisor to do a flush of its own.
1388          */
1389         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1390                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1391
1392         if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1393                 data |= ARCH_CAP_RDCL_NO;
1394         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1395                 data |= ARCH_CAP_SSB_NO;
1396         if (!boot_cpu_has_bug(X86_BUG_MDS))
1397                 data |= ARCH_CAP_MDS_NO;
1398
1399         if (!boot_cpu_has(X86_FEATURE_RTM)) {
1400                 /*
1401                  * If RTM=0 because the kernel has disabled TSX, the host might
1402                  * have TAA_NO or TSX_CTRL.  Clear TAA_NO (the guest sees RTM=0
1403                  * and therefore knows that there cannot be TAA) but keep
1404                  * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1405                  * and we want to allow migrating those guests to tsx=off hosts.
1406                  */
1407                 data &= ~ARCH_CAP_TAA_NO;
1408         } else if (!boot_cpu_has_bug(X86_BUG_TAA)) {
1409                 data |= ARCH_CAP_TAA_NO;
1410         } else {
1411                 /*
1412                  * Nothing to do here; we emulate TSX_CTRL if present on the
1413                  * host so the guest can choose between disabling TSX or
1414                  * using VERW to clear CPU buffers.
1415                  */
1416         }
1417
1418         return data;
1419 }
1420
1421 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1422 {
1423         switch (msr->index) {
1424         case MSR_IA32_ARCH_CAPABILITIES:
1425                 msr->data = kvm_get_arch_capabilities();
1426                 break;
1427         case MSR_IA32_UCODE_REV:
1428                 rdmsrl_safe(msr->index, &msr->data);
1429                 break;
1430         default:
1431                 return static_call(kvm_x86_get_msr_feature)(msr);
1432         }
1433         return 0;
1434 }
1435
1436 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1437 {
1438         struct kvm_msr_entry msr;
1439         int r;
1440
1441         msr.index = index;
1442         r = kvm_get_msr_feature(&msr);
1443
1444         if (r == KVM_MSR_RET_INVALID) {
1445                 /* Unconditionally clear the output for simplicity */
1446                 *data = 0;
1447                 if (kvm_msr_ignored_check(index, 0, false))
1448                         r = 0;
1449         }
1450
1451         if (r)
1452                 return r;
1453
1454         *data = msr.data;
1455
1456         return 0;
1457 }
1458
1459 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1460 {
1461         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1462                 return false;
1463
1464         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1465                 return false;
1466
1467         if (efer & (EFER_LME | EFER_LMA) &&
1468             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1469                 return false;
1470
1471         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1472                 return false;
1473
1474         return true;
1475
1476 }
1477 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1478 {
1479         if (efer & efer_reserved_bits)
1480                 return false;
1481
1482         return __kvm_valid_efer(vcpu, efer);
1483 }
1484 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1485
1486 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1487 {
1488         u64 old_efer = vcpu->arch.efer;
1489         u64 efer = msr_info->data;
1490         int r;
1491
1492         if (efer & efer_reserved_bits)
1493                 return 1;
1494
1495         if (!msr_info->host_initiated) {
1496                 if (!__kvm_valid_efer(vcpu, efer))
1497                         return 1;
1498
1499                 if (is_paging(vcpu) &&
1500                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1501                         return 1;
1502         }
1503
1504         efer &= ~EFER_LMA;
1505         efer |= vcpu->arch.efer & EFER_LMA;
1506
1507         r = static_call(kvm_x86_set_efer)(vcpu, efer);
1508         if (r) {
1509                 WARN_ON(r > 0);
1510                 return r;
1511         }
1512
1513         /* Update reserved bits */
1514         if ((efer ^ old_efer) & EFER_NX)
1515                 kvm_mmu_reset_context(vcpu);
1516
1517         return 0;
1518 }
1519
1520 void kvm_enable_efer_bits(u64 mask)
1521 {
1522        efer_reserved_bits &= ~mask;
1523 }
1524 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1525
1526 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type)
1527 {
1528         struct kvm_x86_msr_filter *msr_filter;
1529         struct msr_bitmap_range *ranges;
1530         struct kvm *kvm = vcpu->kvm;
1531         bool allowed;
1532         int idx;
1533         u32 i;
1534
1535         /* x2APIC MSRs do not support filtering. */
1536         if (index >= 0x800 && index <= 0x8ff)
1537                 return true;
1538
1539         idx = srcu_read_lock(&kvm->srcu);
1540
1541         msr_filter = srcu_dereference(kvm->arch.msr_filter, &kvm->srcu);
1542         if (!msr_filter) {
1543                 allowed = true;
1544                 goto out;
1545         }
1546
1547         allowed = msr_filter->default_allow;
1548         ranges = msr_filter->ranges;
1549
1550         for (i = 0; i < msr_filter->count; i++) {
1551                 u32 start = ranges[i].base;
1552                 u32 end = start + ranges[i].nmsrs;
1553                 u32 flags = ranges[i].flags;
1554                 unsigned long *bitmap = ranges[i].bitmap;
1555
1556                 if ((index >= start) && (index < end) && (flags & type)) {
1557                         allowed = !!test_bit(index - start, bitmap);
1558                         break;
1559                 }
1560         }
1561
1562 out:
1563         srcu_read_unlock(&kvm->srcu, idx);
1564
1565         return allowed;
1566 }
1567 EXPORT_SYMBOL_GPL(kvm_msr_allowed);
1568
1569 /*
1570  * Write @data into the MSR specified by @index.  Select MSR specific fault
1571  * checks are bypassed if @host_initiated is %true.
1572  * Returns 0 on success, non-0 otherwise.
1573  * Assumes vcpu_load() was already called.
1574  */
1575 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1576                          bool host_initiated)
1577 {
1578         struct msr_data msr;
1579
1580         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_WRITE))
1581                 return KVM_MSR_RET_FILTERED;
1582
1583         switch (index) {
1584         case MSR_FS_BASE:
1585         case MSR_GS_BASE:
1586         case MSR_KERNEL_GS_BASE:
1587         case MSR_CSTAR:
1588         case MSR_LSTAR:
1589                 if (is_noncanonical_address(data, vcpu))
1590                         return 1;
1591                 break;
1592         case MSR_IA32_SYSENTER_EIP:
1593         case MSR_IA32_SYSENTER_ESP:
1594                 /*
1595                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1596                  * non-canonical address is written on Intel but not on
1597                  * AMD (which ignores the top 32-bits, because it does
1598                  * not implement 64-bit SYSENTER).
1599                  *
1600                  * 64-bit code should hence be able to write a non-canonical
1601                  * value on AMD.  Making the address canonical ensures that
1602                  * vmentry does not fail on Intel after writing a non-canonical
1603                  * value, and that something deterministic happens if the guest
1604                  * invokes 64-bit SYSENTER.
1605                  */
1606                 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1607         }
1608
1609         msr.data = data;
1610         msr.index = index;
1611         msr.host_initiated = host_initiated;
1612
1613         return static_call(kvm_x86_set_msr)(vcpu, &msr);
1614 }
1615
1616 static int kvm_set_msr_ignored_check(struct kvm_vcpu *vcpu,
1617                                      u32 index, u64 data, bool host_initiated)
1618 {
1619         int ret = __kvm_set_msr(vcpu, index, data, host_initiated);
1620
1621         if (ret == KVM_MSR_RET_INVALID)
1622                 if (kvm_msr_ignored_check(index, data, true))
1623                         ret = 0;
1624
1625         return ret;
1626 }
1627
1628 /*
1629  * Read the MSR specified by @index into @data.  Select MSR specific fault
1630  * checks are bypassed if @host_initiated is %true.
1631  * Returns 0 on success, non-0 otherwise.
1632  * Assumes vcpu_load() was already called.
1633  */
1634 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1635                   bool host_initiated)
1636 {
1637         struct msr_data msr;
1638         int ret;
1639
1640         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_READ))
1641                 return KVM_MSR_RET_FILTERED;
1642
1643         msr.index = index;
1644         msr.host_initiated = host_initiated;
1645
1646         ret = static_call(kvm_x86_get_msr)(vcpu, &msr);
1647         if (!ret)
1648                 *data = msr.data;
1649         return ret;
1650 }
1651
1652 static int kvm_get_msr_ignored_check(struct kvm_vcpu *vcpu,
1653                                      u32 index, u64 *data, bool host_initiated)
1654 {
1655         int ret = __kvm_get_msr(vcpu, index, data, host_initiated);
1656
1657         if (ret == KVM_MSR_RET_INVALID) {
1658                 /* Unconditionally clear *data for simplicity */
1659                 *data = 0;
1660                 if (kvm_msr_ignored_check(index, 0, false))
1661                         ret = 0;
1662         }
1663
1664         return ret;
1665 }
1666
1667 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1668 {
1669         return kvm_get_msr_ignored_check(vcpu, index, data, false);
1670 }
1671 EXPORT_SYMBOL_GPL(kvm_get_msr);
1672
1673 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1674 {
1675         return kvm_set_msr_ignored_check(vcpu, index, data, false);
1676 }
1677 EXPORT_SYMBOL_GPL(kvm_set_msr);
1678
1679 static int complete_emulated_rdmsr(struct kvm_vcpu *vcpu)
1680 {
1681         int err = vcpu->run->msr.error;
1682         if (!err) {
1683                 kvm_rax_write(vcpu, (u32)vcpu->run->msr.data);
1684                 kvm_rdx_write(vcpu, vcpu->run->msr.data >> 32);
1685         }
1686
1687         return static_call(kvm_x86_complete_emulated_msr)(vcpu, err);
1688 }
1689
1690 static int complete_emulated_wrmsr(struct kvm_vcpu *vcpu)
1691 {
1692         return static_call(kvm_x86_complete_emulated_msr)(vcpu, vcpu->run->msr.error);
1693 }
1694
1695 static u64 kvm_msr_reason(int r)
1696 {
1697         switch (r) {
1698         case KVM_MSR_RET_INVALID:
1699                 return KVM_MSR_EXIT_REASON_UNKNOWN;
1700         case KVM_MSR_RET_FILTERED:
1701                 return KVM_MSR_EXIT_REASON_FILTER;
1702         default:
1703                 return KVM_MSR_EXIT_REASON_INVAL;
1704         }
1705 }
1706
1707 static int kvm_msr_user_space(struct kvm_vcpu *vcpu, u32 index,
1708                               u32 exit_reason, u64 data,
1709                               int (*completion)(struct kvm_vcpu *vcpu),
1710                               int r)
1711 {
1712         u64 msr_reason = kvm_msr_reason(r);
1713
1714         /* Check if the user wanted to know about this MSR fault */
1715         if (!(vcpu->kvm->arch.user_space_msr_mask & msr_reason))
1716                 return 0;
1717
1718         vcpu->run->exit_reason = exit_reason;
1719         vcpu->run->msr.error = 0;
1720         memset(vcpu->run->msr.pad, 0, sizeof(vcpu->run->msr.pad));
1721         vcpu->run->msr.reason = msr_reason;
1722         vcpu->run->msr.index = index;
1723         vcpu->run->msr.data = data;
1724         vcpu->arch.complete_userspace_io = completion;
1725
1726         return 1;
1727 }
1728
1729 static int kvm_get_msr_user_space(struct kvm_vcpu *vcpu, u32 index, int r)
1730 {
1731         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_RDMSR, 0,
1732                                    complete_emulated_rdmsr, r);
1733 }
1734
1735 static int kvm_set_msr_user_space(struct kvm_vcpu *vcpu, u32 index, u64 data, int r)
1736 {
1737         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_WRMSR, data,
1738                                    complete_emulated_wrmsr, r);
1739 }
1740
1741 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1742 {
1743         u32 ecx = kvm_rcx_read(vcpu);
1744         u64 data;
1745         int r;
1746
1747         r = kvm_get_msr(vcpu, ecx, &data);
1748
1749         /* MSR read failed? See if we should ask user space */
1750         if (r && kvm_get_msr_user_space(vcpu, ecx, r)) {
1751                 /* Bounce to user space */
1752                 return 0;
1753         }
1754
1755         if (!r) {
1756                 trace_kvm_msr_read(ecx, data);
1757
1758                 kvm_rax_write(vcpu, data & -1u);
1759                 kvm_rdx_write(vcpu, (data >> 32) & -1u);
1760         } else {
1761                 trace_kvm_msr_read_ex(ecx);
1762         }
1763
1764         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1765 }
1766 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1767
1768 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1769 {
1770         u32 ecx = kvm_rcx_read(vcpu);
1771         u64 data = kvm_read_edx_eax(vcpu);
1772         int r;
1773
1774         r = kvm_set_msr(vcpu, ecx, data);
1775
1776         /* MSR write failed? See if we should ask user space */
1777         if (r && kvm_set_msr_user_space(vcpu, ecx, data, r))
1778                 /* Bounce to user space */
1779                 return 0;
1780
1781         /* Signal all other negative errors to userspace */
1782         if (r < 0)
1783                 return r;
1784
1785         if (!r)
1786                 trace_kvm_msr_write(ecx, data);
1787         else
1788                 trace_kvm_msr_write_ex(ecx, data);
1789
1790         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1791 }
1792 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1793
1794 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu)
1795 {
1796         xfer_to_guest_mode_prepare();
1797         return vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu) ||
1798                 xfer_to_guest_mode_work_pending();
1799 }
1800
1801 /*
1802  * The fast path for frequent and performance sensitive wrmsr emulation,
1803  * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
1804  * the latency of virtual IPI by avoiding the expensive bits of transitioning
1805  * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
1806  * other cases which must be called after interrupts are enabled on the host.
1807  */
1808 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
1809 {
1810         if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic))
1811                 return 1;
1812
1813         if (((data & APIC_SHORT_MASK) == APIC_DEST_NOSHORT) &&
1814                 ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
1815                 ((data & APIC_MODE_MASK) == APIC_DM_FIXED) &&
1816                 ((u32)(data >> 32) != X2APIC_BROADCAST)) {
1817
1818                 data &= ~(1 << 12);
1819                 kvm_apic_send_ipi(vcpu->arch.apic, (u32)data, (u32)(data >> 32));
1820                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR2, (u32)(data >> 32));
1821                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR, (u32)data);
1822                 trace_kvm_apic_write(APIC_ICR, (u32)data);
1823                 return 0;
1824         }
1825
1826         return 1;
1827 }
1828
1829 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
1830 {
1831         if (!kvm_can_use_hv_timer(vcpu))
1832                 return 1;
1833
1834         kvm_set_lapic_tscdeadline_msr(vcpu, data);
1835         return 0;
1836 }
1837
1838 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
1839 {
1840         u32 msr = kvm_rcx_read(vcpu);
1841         u64 data;
1842         fastpath_t ret = EXIT_FASTPATH_NONE;
1843
1844         switch (msr) {
1845         case APIC_BASE_MSR + (APIC_ICR >> 4):
1846                 data = kvm_read_edx_eax(vcpu);
1847                 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu, data)) {
1848                         kvm_skip_emulated_instruction(vcpu);
1849                         ret = EXIT_FASTPATH_EXIT_HANDLED;
1850                 }
1851                 break;
1852         case MSR_IA32_TSCDEADLINE:
1853                 data = kvm_read_edx_eax(vcpu);
1854                 if (!handle_fastpath_set_tscdeadline(vcpu, data)) {
1855                         kvm_skip_emulated_instruction(vcpu);
1856                         ret = EXIT_FASTPATH_REENTER_GUEST;
1857                 }
1858                 break;
1859         default:
1860                 break;
1861         }
1862
1863         if (ret != EXIT_FASTPATH_NONE)
1864                 trace_kvm_msr_write(msr, data);
1865
1866         return ret;
1867 }
1868 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
1869
1870 /*
1871  * Adapt set_msr() to msr_io()'s calling convention
1872  */
1873 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1874 {
1875         return kvm_get_msr_ignored_check(vcpu, index, data, true);
1876 }
1877
1878 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1879 {
1880         return kvm_set_msr_ignored_check(vcpu, index, *data, true);
1881 }
1882
1883 #ifdef CONFIG_X86_64
1884 struct pvclock_clock {
1885         int vclock_mode;
1886         u64 cycle_last;
1887         u64 mask;
1888         u32 mult;
1889         u32 shift;
1890         u64 base_cycles;
1891         u64 offset;
1892 };
1893
1894 struct pvclock_gtod_data {
1895         seqcount_t      seq;
1896
1897         struct pvclock_clock clock; /* extract of a clocksource struct */
1898         struct pvclock_clock raw_clock; /* extract of a clocksource struct */
1899
1900         ktime_t         offs_boot;
1901         u64             wall_time_sec;
1902 };
1903
1904 static struct pvclock_gtod_data pvclock_gtod_data;
1905
1906 static void update_pvclock_gtod(struct timekeeper *tk)
1907 {
1908         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1909
1910         write_seqcount_begin(&vdata->seq);
1911
1912         /* copy pvclock gtod data */
1913         vdata->clock.vclock_mode        = tk->tkr_mono.clock->vdso_clock_mode;
1914         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1915         vdata->clock.mask               = tk->tkr_mono.mask;
1916         vdata->clock.mult               = tk->tkr_mono.mult;
1917         vdata->clock.shift              = tk->tkr_mono.shift;
1918         vdata->clock.base_cycles        = tk->tkr_mono.xtime_nsec;
1919         vdata->clock.offset             = tk->tkr_mono.base;
1920
1921         vdata->raw_clock.vclock_mode    = tk->tkr_raw.clock->vdso_clock_mode;
1922         vdata->raw_clock.cycle_last     = tk->tkr_raw.cycle_last;
1923         vdata->raw_clock.mask           = tk->tkr_raw.mask;
1924         vdata->raw_clock.mult           = tk->tkr_raw.mult;
1925         vdata->raw_clock.shift          = tk->tkr_raw.shift;
1926         vdata->raw_clock.base_cycles    = tk->tkr_raw.xtime_nsec;
1927         vdata->raw_clock.offset         = tk->tkr_raw.base;
1928
1929         vdata->wall_time_sec            = tk->xtime_sec;
1930
1931         vdata->offs_boot                = tk->offs_boot;
1932
1933         write_seqcount_end(&vdata->seq);
1934 }
1935
1936 static s64 get_kvmclock_base_ns(void)
1937 {
1938         /* Count up from boot time, but with the frequency of the raw clock.  */
1939         return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot));
1940 }
1941 #else
1942 static s64 get_kvmclock_base_ns(void)
1943 {
1944         /* Master clock not used, so we can just use CLOCK_BOOTTIME.  */
1945         return ktime_get_boottime_ns();
1946 }
1947 #endif
1948
1949 void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock, int sec_hi_ofs)
1950 {
1951         int version;
1952         int r;
1953         struct pvclock_wall_clock wc;
1954         u32 wc_sec_hi;
1955         u64 wall_nsec;
1956
1957         if (!wall_clock)
1958                 return;
1959
1960         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1961         if (r)
1962                 return;
1963
1964         if (version & 1)
1965                 ++version;  /* first time write, random junk */
1966
1967         ++version;
1968
1969         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1970                 return;
1971
1972         /*
1973          * The guest calculates current wall clock time by adding
1974          * system time (updated by kvm_guest_time_update below) to the
1975          * wall clock specified here.  We do the reverse here.
1976          */
1977         wall_nsec = ktime_get_real_ns() - get_kvmclock_ns(kvm);
1978
1979         wc.nsec = do_div(wall_nsec, 1000000000);
1980         wc.sec = (u32)wall_nsec; /* overflow in 2106 guest time */
1981         wc.version = version;
1982
1983         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1984
1985         if (sec_hi_ofs) {
1986                 wc_sec_hi = wall_nsec >> 32;
1987                 kvm_write_guest(kvm, wall_clock + sec_hi_ofs,
1988                                 &wc_sec_hi, sizeof(wc_sec_hi));
1989         }
1990
1991         version++;
1992         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1993 }
1994
1995 static void kvm_write_system_time(struct kvm_vcpu *vcpu, gpa_t system_time,
1996                                   bool old_msr, bool host_initiated)
1997 {
1998         struct kvm_arch *ka = &vcpu->kvm->arch;
1999
2000         if (vcpu->vcpu_id == 0 && !host_initiated) {
2001                 if (ka->boot_vcpu_runs_old_kvmclock != old_msr)
2002                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2003
2004                 ka->boot_vcpu_runs_old_kvmclock = old_msr;
2005         }
2006
2007         vcpu->arch.time = system_time;
2008         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2009
2010         /* we verify if the enable bit is set... */
2011         vcpu->arch.pv_time_enabled = false;
2012         if (!(system_time & 1))
2013                 return;
2014
2015         if (!kvm_gfn_to_hva_cache_init(vcpu->kvm,
2016                                        &vcpu->arch.pv_time, system_time & ~1ULL,
2017                                        sizeof(struct pvclock_vcpu_time_info)))
2018                 vcpu->arch.pv_time_enabled = true;
2019
2020         return;
2021 }
2022
2023 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
2024 {
2025         do_shl32_div32(dividend, divisor);
2026         return dividend;
2027 }
2028
2029 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
2030                                s8 *pshift, u32 *pmultiplier)
2031 {
2032         uint64_t scaled64;
2033         int32_t  shift = 0;
2034         uint64_t tps64;
2035         uint32_t tps32;
2036
2037         tps64 = base_hz;
2038         scaled64 = scaled_hz;
2039         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
2040                 tps64 >>= 1;
2041                 shift--;
2042         }
2043
2044         tps32 = (uint32_t)tps64;
2045         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
2046                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
2047                         scaled64 >>= 1;
2048                 else
2049                         tps32 <<= 1;
2050                 shift++;
2051         }
2052
2053         *pshift = shift;
2054         *pmultiplier = div_frac(scaled64, tps32);
2055 }
2056
2057 #ifdef CONFIG_X86_64
2058 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
2059 #endif
2060
2061 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
2062 static unsigned long max_tsc_khz;
2063
2064 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
2065 {
2066         u64 v = (u64)khz * (1000000 + ppm);
2067         do_div(v, 1000000);
2068         return v;
2069 }
2070
2071 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
2072 {
2073         u64 ratio;
2074
2075         /* Guest TSC same frequency as host TSC? */
2076         if (!scale) {
2077                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
2078                 return 0;
2079         }
2080
2081         /* TSC scaling supported? */
2082         if (!kvm_has_tsc_control) {
2083                 if (user_tsc_khz > tsc_khz) {
2084                         vcpu->arch.tsc_catchup = 1;
2085                         vcpu->arch.tsc_always_catchup = 1;
2086                         return 0;
2087                 } else {
2088                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2089                         return -1;
2090                 }
2091         }
2092
2093         /* TSC scaling required  - calculate ratio */
2094         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
2095                                 user_tsc_khz, tsc_khz);
2096
2097         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
2098                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2099                                     user_tsc_khz);
2100                 return -1;
2101         }
2102
2103         vcpu->arch.tsc_scaling_ratio = ratio;
2104         return 0;
2105 }
2106
2107 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
2108 {
2109         u32 thresh_lo, thresh_hi;
2110         int use_scaling = 0;
2111
2112         /* tsc_khz can be zero if TSC calibration fails */
2113         if (user_tsc_khz == 0) {
2114                 /* set tsc_scaling_ratio to a safe value */
2115                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
2116                 return -1;
2117         }
2118
2119         /* Compute a scale to convert nanoseconds in TSC cycles */
2120         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
2121                            &vcpu->arch.virtual_tsc_shift,
2122                            &vcpu->arch.virtual_tsc_mult);
2123         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
2124
2125         /*
2126          * Compute the variation in TSC rate which is acceptable
2127          * within the range of tolerance and decide if the
2128          * rate being applied is within that bounds of the hardware
2129          * rate.  If so, no scaling or compensation need be done.
2130          */
2131         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
2132         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
2133         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
2134                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
2135                 use_scaling = 1;
2136         }
2137         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
2138 }
2139
2140 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
2141 {
2142         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
2143                                       vcpu->arch.virtual_tsc_mult,
2144                                       vcpu->arch.virtual_tsc_shift);
2145         tsc += vcpu->arch.this_tsc_write;
2146         return tsc;
2147 }
2148
2149 static inline int gtod_is_based_on_tsc(int mode)
2150 {
2151         return mode == VDSO_CLOCKMODE_TSC || mode == VDSO_CLOCKMODE_HVCLOCK;
2152 }
2153
2154 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
2155 {
2156 #ifdef CONFIG_X86_64
2157         bool vcpus_matched;
2158         struct kvm_arch *ka = &vcpu->kvm->arch;
2159         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2160
2161         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2162                          atomic_read(&vcpu->kvm->online_vcpus));
2163
2164         /*
2165          * Once the masterclock is enabled, always perform request in
2166          * order to update it.
2167          *
2168          * In order to enable masterclock, the host clocksource must be TSC
2169          * and the vcpus need to have matched TSCs.  When that happens,
2170          * perform request to enable masterclock.
2171          */
2172         if (ka->use_master_clock ||
2173             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
2174                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2175
2176         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
2177                             atomic_read(&vcpu->kvm->online_vcpus),
2178                             ka->use_master_clock, gtod->clock.vclock_mode);
2179 #endif
2180 }
2181
2182 /*
2183  * Multiply tsc by a fixed point number represented by ratio.
2184  *
2185  * The most significant 64-N bits (mult) of ratio represent the
2186  * integral part of the fixed point number; the remaining N bits
2187  * (frac) represent the fractional part, ie. ratio represents a fixed
2188  * point number (mult + frac * 2^(-N)).
2189  *
2190  * N equals to kvm_tsc_scaling_ratio_frac_bits.
2191  */
2192 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
2193 {
2194         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
2195 }
2196
2197 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
2198 {
2199         u64 _tsc = tsc;
2200         u64 ratio = vcpu->arch.tsc_scaling_ratio;
2201
2202         if (ratio != kvm_default_tsc_scaling_ratio)
2203                 _tsc = __scale_tsc(ratio, tsc);
2204
2205         return _tsc;
2206 }
2207 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
2208
2209 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
2210 {
2211         u64 tsc;
2212
2213         tsc = kvm_scale_tsc(vcpu, rdtsc());
2214
2215         return target_tsc - tsc;
2216 }
2217
2218 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
2219 {
2220         return vcpu->arch.l1_tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
2221 }
2222 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
2223
2224 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
2225 {
2226         vcpu->arch.l1_tsc_offset = offset;
2227         vcpu->arch.tsc_offset = static_call(kvm_x86_write_l1_tsc_offset)(vcpu, offset);
2228 }
2229
2230 static inline bool kvm_check_tsc_unstable(void)
2231 {
2232 #ifdef CONFIG_X86_64
2233         /*
2234          * TSC is marked unstable when we're running on Hyper-V,
2235          * 'TSC page' clocksource is good.
2236          */
2237         if (pvclock_gtod_data.clock.vclock_mode == VDSO_CLOCKMODE_HVCLOCK)
2238                 return false;
2239 #endif
2240         return check_tsc_unstable();
2241 }
2242
2243 static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 data)
2244 {
2245         struct kvm *kvm = vcpu->kvm;
2246         u64 offset, ns, elapsed;
2247         unsigned long flags;
2248         bool matched;
2249         bool already_matched;
2250         bool synchronizing = false;
2251
2252         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
2253         offset = kvm_compute_tsc_offset(vcpu, data);
2254         ns = get_kvmclock_base_ns();
2255         elapsed = ns - kvm->arch.last_tsc_nsec;
2256
2257         if (vcpu->arch.virtual_tsc_khz) {
2258                 if (data == 0) {
2259                         /*
2260                          * detection of vcpu initialization -- need to sync
2261                          * with other vCPUs. This particularly helps to keep
2262                          * kvm_clock stable after CPU hotplug
2263                          */
2264                         synchronizing = true;
2265                 } else {
2266                         u64 tsc_exp = kvm->arch.last_tsc_write +
2267                                                 nsec_to_cycles(vcpu, elapsed);
2268                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
2269                         /*
2270                          * Special case: TSC write with a small delta (1 second)
2271                          * of virtual cycle time against real time is
2272                          * interpreted as an attempt to synchronize the CPU.
2273                          */
2274                         synchronizing = data < tsc_exp + tsc_hz &&
2275                                         data + tsc_hz > tsc_exp;
2276                 }
2277         }
2278
2279         /*
2280          * For a reliable TSC, we can match TSC offsets, and for an unstable
2281          * TSC, we add elapsed time in this computation.  We could let the
2282          * compensation code attempt to catch up if we fall behind, but
2283          * it's better to try to match offsets from the beginning.
2284          */
2285         if (synchronizing &&
2286             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
2287                 if (!kvm_check_tsc_unstable()) {
2288                         offset = kvm->arch.cur_tsc_offset;
2289                 } else {
2290                         u64 delta = nsec_to_cycles(vcpu, elapsed);
2291                         data += delta;
2292                         offset = kvm_compute_tsc_offset(vcpu, data);
2293                 }
2294                 matched = true;
2295                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
2296         } else {
2297                 /*
2298                  * We split periods of matched TSC writes into generations.
2299                  * For each generation, we track the original measured
2300                  * nanosecond time, offset, and write, so if TSCs are in
2301                  * sync, we can match exact offset, and if not, we can match
2302                  * exact software computation in compute_guest_tsc()
2303                  *
2304                  * These values are tracked in kvm->arch.cur_xxx variables.
2305                  */
2306                 kvm->arch.cur_tsc_generation++;
2307                 kvm->arch.cur_tsc_nsec = ns;
2308                 kvm->arch.cur_tsc_write = data;
2309                 kvm->arch.cur_tsc_offset = offset;
2310                 matched = false;
2311         }
2312
2313         /*
2314          * We also track th most recent recorded KHZ, write and time to
2315          * allow the matching interval to be extended at each write.
2316          */
2317         kvm->arch.last_tsc_nsec = ns;
2318         kvm->arch.last_tsc_write = data;
2319         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2320
2321         vcpu->arch.last_guest_tsc = data;
2322
2323         /* Keep track of which generation this VCPU has synchronized to */
2324         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2325         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2326         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2327
2328         kvm_vcpu_write_tsc_offset(vcpu, offset);
2329         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2330
2331         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
2332         if (!matched) {
2333                 kvm->arch.nr_vcpus_matched_tsc = 0;
2334         } else if (!already_matched) {
2335                 kvm->arch.nr_vcpus_matched_tsc++;
2336         }
2337
2338         kvm_track_tsc_matching(vcpu);
2339         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
2340 }
2341
2342 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2343                                            s64 adjustment)
2344 {
2345         u64 tsc_offset = vcpu->arch.l1_tsc_offset;
2346         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2347 }
2348
2349 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2350 {
2351         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
2352                 WARN_ON(adjustment < 0);
2353         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
2354         adjust_tsc_offset_guest(vcpu, adjustment);
2355 }
2356
2357 #ifdef CONFIG_X86_64
2358
2359 static u64 read_tsc(void)
2360 {
2361         u64 ret = (u64)rdtsc_ordered();
2362         u64 last = pvclock_gtod_data.clock.cycle_last;
2363
2364         if (likely(ret >= last))
2365                 return ret;
2366
2367         /*
2368          * GCC likes to generate cmov here, but this branch is extremely
2369          * predictable (it's just a function of time and the likely is
2370          * very likely) and there's a data dependence, so force GCC
2371          * to generate a branch instead.  I don't barrier() because
2372          * we don't actually need a barrier, and if this function
2373          * ever gets inlined it will generate worse code.
2374          */
2375         asm volatile ("");
2376         return last;
2377 }
2378
2379 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2380                           int *mode)
2381 {
2382         long v;
2383         u64 tsc_pg_val;
2384
2385         switch (clock->vclock_mode) {
2386         case VDSO_CLOCKMODE_HVCLOCK:
2387                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2388                                                   tsc_timestamp);
2389                 if (tsc_pg_val != U64_MAX) {
2390                         /* TSC page valid */
2391                         *mode = VDSO_CLOCKMODE_HVCLOCK;
2392                         v = (tsc_pg_val - clock->cycle_last) &
2393                                 clock->mask;
2394                 } else {
2395                         /* TSC page invalid */
2396                         *mode = VDSO_CLOCKMODE_NONE;
2397                 }
2398                 break;
2399         case VDSO_CLOCKMODE_TSC:
2400                 *mode = VDSO_CLOCKMODE_TSC;
2401                 *tsc_timestamp = read_tsc();
2402                 v = (*tsc_timestamp - clock->cycle_last) &
2403                         clock->mask;
2404                 break;
2405         default:
2406                 *mode = VDSO_CLOCKMODE_NONE;
2407         }
2408
2409         if (*mode == VDSO_CLOCKMODE_NONE)
2410                 *tsc_timestamp = v = 0;
2411
2412         return v * clock->mult;
2413 }
2414
2415 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2416 {
2417         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2418         unsigned long seq;
2419         int mode;
2420         u64 ns;
2421
2422         do {
2423                 seq = read_seqcount_begin(&gtod->seq);
2424                 ns = gtod->raw_clock.base_cycles;
2425                 ns += vgettsc(&gtod->raw_clock, tsc_timestamp, &mode);
2426                 ns >>= gtod->raw_clock.shift;
2427                 ns += ktime_to_ns(ktime_add(gtod->raw_clock.offset, gtod->offs_boot));
2428         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2429         *t = ns;
2430
2431         return mode;
2432 }
2433
2434 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2435 {
2436         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2437         unsigned long seq;
2438         int mode;
2439         u64 ns;
2440
2441         do {
2442                 seq = read_seqcount_begin(&gtod->seq);
2443                 ts->tv_sec = gtod->wall_time_sec;
2444                 ns = gtod->clock.base_cycles;
2445                 ns += vgettsc(&gtod->clock, tsc_timestamp, &mode);
2446                 ns >>= gtod->clock.shift;
2447         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2448
2449         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2450         ts->tv_nsec = ns;
2451
2452         return mode;
2453 }
2454
2455 /* returns true if host is using TSC based clocksource */
2456 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2457 {
2458         /* checked again under seqlock below */
2459         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2460                 return false;
2461
2462         return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2463                                                       tsc_timestamp));
2464 }
2465
2466 /* returns true if host is using TSC based clocksource */
2467 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2468                                            u64 *tsc_timestamp)
2469 {
2470         /* checked again under seqlock below */
2471         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2472                 return false;
2473
2474         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2475 }
2476 #endif
2477
2478 /*
2479  *
2480  * Assuming a stable TSC across physical CPUS, and a stable TSC
2481  * across virtual CPUs, the following condition is possible.
2482  * Each numbered line represents an event visible to both
2483  * CPUs at the next numbered event.
2484  *
2485  * "timespecX" represents host monotonic time. "tscX" represents
2486  * RDTSC value.
2487  *
2488  *              VCPU0 on CPU0           |       VCPU1 on CPU1
2489  *
2490  * 1.  read timespec0,tsc0
2491  * 2.                                   | timespec1 = timespec0 + N
2492  *                                      | tsc1 = tsc0 + M
2493  * 3. transition to guest               | transition to guest
2494  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2495  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2496  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2497  *
2498  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2499  *
2500  *      - ret0 < ret1
2501  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2502  *              ...
2503  *      - 0 < N - M => M < N
2504  *
2505  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2506  * always the case (the difference between two distinct xtime instances
2507  * might be smaller then the difference between corresponding TSC reads,
2508  * when updating guest vcpus pvclock areas).
2509  *
2510  * To avoid that problem, do not allow visibility of distinct
2511  * system_timestamp/tsc_timestamp values simultaneously: use a master
2512  * copy of host monotonic time values. Update that master copy
2513  * in lockstep.
2514  *
2515  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2516  *
2517  */
2518
2519 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2520 {
2521 #ifdef CONFIG_X86_64
2522         struct kvm_arch *ka = &kvm->arch;
2523         int vclock_mode;
2524         bool host_tsc_clocksource, vcpus_matched;
2525
2526         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2527                         atomic_read(&kvm->online_vcpus));
2528
2529         /*
2530          * If the host uses TSC clock, then passthrough TSC as stable
2531          * to the guest.
2532          */
2533         host_tsc_clocksource = kvm_get_time_and_clockread(
2534                                         &ka->master_kernel_ns,
2535                                         &ka->master_cycle_now);
2536
2537         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2538                                 && !ka->backwards_tsc_observed
2539                                 && !ka->boot_vcpu_runs_old_kvmclock;
2540
2541         if (ka->use_master_clock)
2542                 atomic_set(&kvm_guest_has_master_clock, 1);
2543
2544         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2545         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2546                                         vcpus_matched);
2547 #endif
2548 }
2549
2550 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2551 {
2552         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2553 }
2554
2555 static void kvm_gen_update_masterclock(struct kvm *kvm)
2556 {
2557 #ifdef CONFIG_X86_64
2558         int i;
2559         struct kvm_vcpu *vcpu;
2560         struct kvm_arch *ka = &kvm->arch;
2561
2562         kvm_hv_invalidate_tsc_page(kvm);
2563
2564         kvm_make_mclock_inprogress_request(kvm);
2565
2566         /* no guest entries from this point */
2567         spin_lock(&ka->pvclock_gtod_sync_lock);
2568         pvclock_update_vm_gtod_copy(kvm);
2569         spin_unlock(&ka->pvclock_gtod_sync_lock);
2570
2571         kvm_for_each_vcpu(i, vcpu, kvm)
2572                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2573
2574         /* guest entries allowed */
2575         kvm_for_each_vcpu(i, vcpu, kvm)
2576                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2577 #endif
2578 }
2579
2580 u64 get_kvmclock_ns(struct kvm *kvm)
2581 {
2582         struct kvm_arch *ka = &kvm->arch;
2583         struct pvclock_vcpu_time_info hv_clock;
2584         u64 ret;
2585
2586         spin_lock(&ka->pvclock_gtod_sync_lock);
2587         if (!ka->use_master_clock) {
2588                 spin_unlock(&ka->pvclock_gtod_sync_lock);
2589                 return get_kvmclock_base_ns() + ka->kvmclock_offset;
2590         }
2591
2592         hv_clock.tsc_timestamp = ka->master_cycle_now;
2593         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2594         spin_unlock(&ka->pvclock_gtod_sync_lock);
2595
2596         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2597         get_cpu();
2598
2599         if (__this_cpu_read(cpu_tsc_khz)) {
2600                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2601                                    &hv_clock.tsc_shift,
2602                                    &hv_clock.tsc_to_system_mul);
2603                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2604         } else
2605                 ret = get_kvmclock_base_ns() + ka->kvmclock_offset;
2606
2607         put_cpu();
2608
2609         return ret;
2610 }
2611
2612 static void kvm_setup_pvclock_page(struct kvm_vcpu *v,
2613                                    struct gfn_to_hva_cache *cache,
2614                                    unsigned int offset)
2615 {
2616         struct kvm_vcpu_arch *vcpu = &v->arch;
2617         struct pvclock_vcpu_time_info guest_hv_clock;
2618
2619         if (unlikely(kvm_read_guest_offset_cached(v->kvm, cache,
2620                 &guest_hv_clock, offset, sizeof(guest_hv_clock))))
2621                 return;
2622
2623         /* This VCPU is paused, but it's legal for a guest to read another
2624          * VCPU's kvmclock, so we really have to follow the specification where
2625          * it says that version is odd if data is being modified, and even after
2626          * it is consistent.
2627          *
2628          * Version field updates must be kept separate.  This is because
2629          * kvm_write_guest_cached might use a "rep movs" instruction, and
2630          * writes within a string instruction are weakly ordered.  So there
2631          * are three writes overall.
2632          *
2633          * As a small optimization, only write the version field in the first
2634          * and third write.  The vcpu->pv_time cache is still valid, because the
2635          * version field is the first in the struct.
2636          */
2637         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2638
2639         if (guest_hv_clock.version & 1)
2640                 ++guest_hv_clock.version;  /* first time write, random junk */
2641
2642         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2643         kvm_write_guest_offset_cached(v->kvm, cache,
2644                                       &vcpu->hv_clock, offset,
2645                                       sizeof(vcpu->hv_clock.version));
2646
2647         smp_wmb();
2648
2649         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2650         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2651
2652         if (vcpu->pvclock_set_guest_stopped_request) {
2653                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2654                 vcpu->pvclock_set_guest_stopped_request = false;
2655         }
2656
2657         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2658
2659         kvm_write_guest_offset_cached(v->kvm, cache,
2660                                       &vcpu->hv_clock, offset,
2661                                       sizeof(vcpu->hv_clock));
2662
2663         smp_wmb();
2664
2665         vcpu->hv_clock.version++;
2666         kvm_write_guest_offset_cached(v->kvm, cache,
2667                                      &vcpu->hv_clock, offset,
2668                                      sizeof(vcpu->hv_clock.version));
2669 }
2670
2671 static int kvm_guest_time_update(struct kvm_vcpu *v)
2672 {
2673         unsigned long flags, tgt_tsc_khz;
2674         struct kvm_vcpu_arch *vcpu = &v->arch;
2675         struct kvm_arch *ka = &v->kvm->arch;
2676         s64 kernel_ns;
2677         u64 tsc_timestamp, host_tsc;
2678         u8 pvclock_flags;
2679         bool use_master_clock;
2680
2681         kernel_ns = 0;
2682         host_tsc = 0;
2683
2684         /*
2685          * If the host uses TSC clock, then passthrough TSC as stable
2686          * to the guest.
2687          */
2688         spin_lock(&ka->pvclock_gtod_sync_lock);
2689         use_master_clock = ka->use_master_clock;
2690         if (use_master_clock) {
2691                 host_tsc = ka->master_cycle_now;
2692                 kernel_ns = ka->master_kernel_ns;
2693         }
2694         spin_unlock(&ka->pvclock_gtod_sync_lock);
2695
2696         /* Keep irq disabled to prevent changes to the clock */
2697         local_irq_save(flags);
2698         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2699         if (unlikely(tgt_tsc_khz == 0)) {
2700                 local_irq_restore(flags);
2701                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2702                 return 1;
2703         }
2704         if (!use_master_clock) {
2705                 host_tsc = rdtsc();
2706                 kernel_ns = get_kvmclock_base_ns();
2707         }
2708
2709         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2710
2711         /*
2712          * We may have to catch up the TSC to match elapsed wall clock
2713          * time for two reasons, even if kvmclock is used.
2714          *   1) CPU could have been running below the maximum TSC rate
2715          *   2) Broken TSC compensation resets the base at each VCPU
2716          *      entry to avoid unknown leaps of TSC even when running
2717          *      again on the same CPU.  This may cause apparent elapsed
2718          *      time to disappear, and the guest to stand still or run
2719          *      very slowly.
2720          */
2721         if (vcpu->tsc_catchup) {
2722                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2723                 if (tsc > tsc_timestamp) {
2724                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2725                         tsc_timestamp = tsc;
2726                 }
2727         }
2728
2729         local_irq_restore(flags);
2730
2731         /* With all the info we got, fill in the values */
2732
2733         if (kvm_has_tsc_control)
2734                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
2735
2736         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2737                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2738                                    &vcpu->hv_clock.tsc_shift,
2739                                    &vcpu->hv_clock.tsc_to_system_mul);
2740                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2741         }
2742
2743         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2744         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2745         vcpu->last_guest_tsc = tsc_timestamp;
2746
2747         /* If the host uses TSC clocksource, then it is stable */
2748         pvclock_flags = 0;
2749         if (use_master_clock)
2750                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2751
2752         vcpu->hv_clock.flags = pvclock_flags;
2753
2754         if (vcpu->pv_time_enabled)
2755                 kvm_setup_pvclock_page(v, &vcpu->pv_time, 0);
2756         if (vcpu->xen.vcpu_info_set)
2757                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_info_cache,
2758                                        offsetof(struct compat_vcpu_info, time));
2759         if (vcpu->xen.vcpu_time_info_set)
2760                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_time_info_cache, 0);
2761         if (v == kvm_get_vcpu(v->kvm, 0))
2762                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2763         return 0;
2764 }
2765
2766 /*
2767  * kvmclock updates which are isolated to a given vcpu, such as
2768  * vcpu->cpu migration, should not allow system_timestamp from
2769  * the rest of the vcpus to remain static. Otherwise ntp frequency
2770  * correction applies to one vcpu's system_timestamp but not
2771  * the others.
2772  *
2773  * So in those cases, request a kvmclock update for all vcpus.
2774  * We need to rate-limit these requests though, as they can
2775  * considerably slow guests that have a large number of vcpus.
2776  * The time for a remote vcpu to update its kvmclock is bound
2777  * by the delay we use to rate-limit the updates.
2778  */
2779
2780 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2781
2782 static void kvmclock_update_fn(struct work_struct *work)
2783 {
2784         int i;
2785         struct delayed_work *dwork = to_delayed_work(work);
2786         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2787                                            kvmclock_update_work);
2788         struct kvm *kvm = container_of(ka, struct kvm, arch);
2789         struct kvm_vcpu *vcpu;
2790
2791         kvm_for_each_vcpu(i, vcpu, kvm) {
2792                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2793                 kvm_vcpu_kick(vcpu);
2794         }
2795 }
2796
2797 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2798 {
2799         struct kvm *kvm = v->kvm;
2800
2801         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2802         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2803                                         KVMCLOCK_UPDATE_DELAY);
2804 }
2805
2806 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2807
2808 static void kvmclock_sync_fn(struct work_struct *work)
2809 {
2810         struct delayed_work *dwork = to_delayed_work(work);
2811         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2812                                            kvmclock_sync_work);
2813         struct kvm *kvm = container_of(ka, struct kvm, arch);
2814
2815         if (!kvmclock_periodic_sync)
2816                 return;
2817
2818         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2819         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2820                                         KVMCLOCK_SYNC_PERIOD);
2821 }
2822
2823 /*
2824  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
2825  */
2826 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
2827 {
2828         /* McStatusWrEn enabled? */
2829         if (guest_cpuid_is_amd_or_hygon(vcpu))
2830                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
2831
2832         return false;
2833 }
2834
2835 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2836 {
2837         u64 mcg_cap = vcpu->arch.mcg_cap;
2838         unsigned bank_num = mcg_cap & 0xff;
2839         u32 msr = msr_info->index;
2840         u64 data = msr_info->data;
2841
2842         switch (msr) {
2843         case MSR_IA32_MCG_STATUS:
2844                 vcpu->arch.mcg_status = data;
2845                 break;
2846         case MSR_IA32_MCG_CTL:
2847                 if (!(mcg_cap & MCG_CTL_P) &&
2848                     (data || !msr_info->host_initiated))
2849                         return 1;
2850                 if (data != 0 && data != ~(u64)0)
2851                         return 1;
2852                 vcpu->arch.mcg_ctl = data;
2853                 break;
2854         default:
2855                 if (msr >= MSR_IA32_MC0_CTL &&
2856                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2857                         u32 offset = array_index_nospec(
2858                                 msr - MSR_IA32_MC0_CTL,
2859                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
2860
2861                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2862                          * some Linux kernels though clear bit 10 in bank 4 to
2863                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2864                          * this to avoid an uncatched #GP in the guest
2865                          */
2866                         if ((offset & 0x3) == 0 &&
2867                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2868                                 return -1;
2869
2870                         /* MCi_STATUS */
2871                         if (!msr_info->host_initiated &&
2872                             (offset & 0x3) == 1 && data != 0) {
2873                                 if (!can_set_mci_status(vcpu))
2874                                         return -1;
2875                         }
2876
2877                         vcpu->arch.mce_banks[offset] = data;
2878                         break;
2879                 }
2880                 return 1;
2881         }
2882         return 0;
2883 }
2884
2885 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu)
2886 {
2887         u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT;
2888
2889         return (vcpu->arch.apf.msr_en_val & mask) == mask;
2890 }
2891
2892 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2893 {
2894         gpa_t gpa = data & ~0x3f;
2895
2896         /* Bits 4:5 are reserved, Should be zero */
2897         if (data & 0x30)
2898                 return 1;
2899
2900         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_VMEXIT) &&
2901             (data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT))
2902                 return 1;
2903
2904         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT) &&
2905             (data & KVM_ASYNC_PF_DELIVERY_AS_INT))
2906                 return 1;
2907
2908         if (!lapic_in_kernel(vcpu))
2909                 return data ? 1 : 0;
2910
2911         vcpu->arch.apf.msr_en_val = data;
2912
2913         if (!kvm_pv_async_pf_enabled(vcpu)) {
2914                 kvm_clear_async_pf_completion_queue(vcpu);
2915                 kvm_async_pf_hash_reset(vcpu);
2916                 return 0;
2917         }
2918
2919         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2920                                         sizeof(u64)))
2921                 return 1;
2922
2923         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2924         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
2925
2926         kvm_async_pf_wakeup_all(vcpu);
2927
2928         return 0;
2929 }
2930
2931 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu *vcpu, u64 data)
2932 {
2933         /* Bits 8-63 are reserved */
2934         if (data >> 8)
2935                 return 1;
2936
2937         if (!lapic_in_kernel(vcpu))
2938                 return 1;
2939
2940         vcpu->arch.apf.msr_int_val = data;
2941
2942         vcpu->arch.apf.vec = data & KVM_ASYNC_PF_VEC_MASK;
2943
2944         return 0;
2945 }
2946
2947 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2948 {
2949         vcpu->arch.pv_time_enabled = false;
2950         vcpu->arch.time = 0;
2951 }
2952
2953 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu *vcpu)
2954 {
2955         ++vcpu->stat.tlb_flush;
2956         static_call(kvm_x86_tlb_flush_all)(vcpu);
2957 }
2958
2959 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu)
2960 {
2961         ++vcpu->stat.tlb_flush;
2962         static_call(kvm_x86_tlb_flush_guest)(vcpu);
2963 }
2964
2965 static void record_steal_time(struct kvm_vcpu *vcpu)
2966 {
2967         struct kvm_host_map map;
2968         struct kvm_steal_time *st;
2969
2970         if (kvm_xen_msr_enabled(vcpu->kvm)) {
2971                 kvm_xen_runstate_set_running(vcpu);
2972                 return;
2973         }
2974
2975         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2976                 return;
2977
2978         /* -EAGAIN is returned in atomic context so we can just return. */
2979         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT,
2980                         &map, &vcpu->arch.st.cache, false))
2981                 return;
2982
2983         st = map.hva +
2984                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
2985
2986         /*
2987          * Doing a TLB flush here, on the guest's behalf, can avoid
2988          * expensive IPIs.
2989          */
2990         if (guest_pv_has(vcpu, KVM_FEATURE_PV_TLB_FLUSH)) {
2991                 trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
2992                                        st->preempted & KVM_VCPU_FLUSH_TLB);
2993                 if (xchg(&st->preempted, 0) & KVM_VCPU_FLUSH_TLB)
2994                         kvm_vcpu_flush_tlb_guest(vcpu);
2995         }
2996
2997         vcpu->arch.st.preempted = 0;
2998
2999         if (st->version & 1)
3000                 st->version += 1;  /* first time write, random junk */
3001
3002         st->version += 1;
3003
3004         smp_wmb();
3005
3006         st->steal += current->sched_info.run_delay -
3007                 vcpu->arch.st.last_steal;
3008         vcpu->arch.st.last_steal = current->sched_info.run_delay;
3009
3010         smp_wmb();
3011
3012         st->version += 1;
3013
3014         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, false);
3015 }
3016
3017 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3018 {
3019         bool pr = false;
3020         u32 msr = msr_info->index;
3021         u64 data = msr_info->data;
3022
3023         if (msr && msr == vcpu->kvm->arch.xen_hvm_config.msr)
3024                 return kvm_xen_write_hypercall_page(vcpu, data);
3025
3026         switch (msr) {
3027         case MSR_AMD64_NB_CFG:
3028         case MSR_IA32_UCODE_WRITE:
3029         case MSR_VM_HSAVE_PA:
3030         case MSR_AMD64_PATCH_LOADER:
3031         case MSR_AMD64_BU_CFG2:
3032         case MSR_AMD64_DC_CFG:
3033         case MSR_F15H_EX_CFG:
3034                 break;
3035
3036         case MSR_IA32_UCODE_REV:
3037                 if (msr_info->host_initiated)
3038                         vcpu->arch.microcode_version = data;
3039                 break;
3040         case MSR_IA32_ARCH_CAPABILITIES:
3041                 if (!msr_info->host_initiated)
3042                         return 1;
3043                 vcpu->arch.arch_capabilities = data;
3044                 break;
3045         case MSR_IA32_PERF_CAPABILITIES: {
3046                 struct kvm_msr_entry msr_ent = {.index = msr, .data = 0};
3047
3048                 if (!msr_info->host_initiated)
3049                         return 1;
3050                 if (guest_cpuid_has(vcpu, X86_FEATURE_PDCM) && kvm_get_msr_feature(&msr_ent))
3051                         return 1;
3052                 if (data & ~msr_ent.data)
3053                         return 1;
3054
3055                 vcpu->arch.perf_capabilities = data;
3056
3057                 return 0;
3058                 }
3059         case MSR_EFER:
3060                 return set_efer(vcpu, msr_info);
3061         case MSR_K7_HWCR:
3062                 data &= ~(u64)0x40;     /* ignore flush filter disable */
3063                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
3064                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
3065
3066                 /* Handle McStatusWrEn */
3067                 if (data == BIT_ULL(18)) {
3068                         vcpu->arch.msr_hwcr = data;
3069                 } else if (data != 0) {
3070                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
3071                                     data);
3072                         return 1;
3073                 }
3074                 break;
3075         case MSR_FAM10H_MMIO_CONF_BASE:
3076                 if (data != 0) {
3077                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
3078                                     "0x%llx\n", data);
3079                         return 1;
3080                 }
3081                 break;
3082         case 0x200 ... 0x2ff:
3083                 return kvm_mtrr_set_msr(vcpu, msr, data);
3084         case MSR_IA32_APICBASE:
3085                 return kvm_set_apic_base(vcpu, msr_info);
3086         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3087                 return kvm_x2apic_msr_write(vcpu, msr, data);
3088         case MSR_IA32_TSCDEADLINE:
3089                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
3090                 break;
3091         case MSR_IA32_TSC_ADJUST:
3092                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
3093                         if (!msr_info->host_initiated) {
3094                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
3095                                 adjust_tsc_offset_guest(vcpu, adj);
3096                         }
3097                         vcpu->arch.ia32_tsc_adjust_msr = data;
3098                 }
3099                 break;
3100         case MSR_IA32_MISC_ENABLE:
3101                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
3102                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
3103                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
3104                                 return 1;
3105                         vcpu->arch.ia32_misc_enable_msr = data;
3106                         kvm_update_cpuid_runtime(vcpu);
3107                 } else {
3108                         vcpu->arch.ia32_misc_enable_msr = data;
3109                 }
3110                 break;
3111         case MSR_IA32_SMBASE:
3112                 if (!msr_info->host_initiated)
3113                         return 1;
3114                 vcpu->arch.smbase = data;
3115                 break;
3116         case MSR_IA32_POWER_CTL:
3117                 vcpu->arch.msr_ia32_power_ctl = data;
3118                 break;
3119         case MSR_IA32_TSC:
3120                 if (msr_info->host_initiated) {
3121                         kvm_synchronize_tsc(vcpu, data);
3122                 } else {
3123                         u64 adj = kvm_compute_tsc_offset(vcpu, data) - vcpu->arch.l1_tsc_offset;
3124                         adjust_tsc_offset_guest(vcpu, adj);
3125                         vcpu->arch.ia32_tsc_adjust_msr += adj;
3126                 }
3127                 break;
3128         case MSR_IA32_XSS:
3129                 if (!msr_info->host_initiated &&
3130                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3131                         return 1;
3132                 /*
3133                  * KVM supports exposing PT to the guest, but does not support
3134                  * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3135                  * XSAVES/XRSTORS to save/restore PT MSRs.
3136                  */
3137                 if (data & ~supported_xss)
3138                         return 1;
3139                 vcpu->arch.ia32_xss = data;
3140                 break;
3141         case MSR_SMI_COUNT:
3142                 if (!msr_info->host_initiated)
3143                         return 1;
3144                 vcpu->arch.smi_count = data;
3145                 break;
3146         case MSR_KVM_WALL_CLOCK_NEW:
3147                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3148                         return 1;
3149
3150                 vcpu->kvm->arch.wall_clock = data;
3151                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3152                 break;
3153         case MSR_KVM_WALL_CLOCK:
3154                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3155                         return 1;
3156
3157                 vcpu->kvm->arch.wall_clock = data;
3158                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3159                 break;
3160         case MSR_KVM_SYSTEM_TIME_NEW:
3161                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3162                         return 1;
3163
3164                 kvm_write_system_time(vcpu, data, false, msr_info->host_initiated);
3165                 break;
3166         case MSR_KVM_SYSTEM_TIME:
3167                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3168                         return 1;
3169
3170                 kvm_write_system_time(vcpu, data, true,  msr_info->host_initiated);
3171                 break;
3172         case MSR_KVM_ASYNC_PF_EN:
3173                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3174                         return 1;
3175
3176                 if (kvm_pv_enable_async_pf(vcpu, data))
3177                         return 1;
3178                 break;
3179         case MSR_KVM_ASYNC_PF_INT:
3180                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3181                         return 1;
3182
3183                 if (kvm_pv_enable_async_pf_int(vcpu, data))
3184                         return 1;
3185                 break;
3186         case MSR_KVM_ASYNC_PF_ACK:
3187                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3188                         return 1;
3189                 if (data & 0x1) {
3190                         vcpu->arch.apf.pageready_pending = false;
3191                         kvm_check_async_pf_completion(vcpu);
3192                 }
3193                 break;
3194         case MSR_KVM_STEAL_TIME:
3195                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3196                         return 1;
3197
3198                 if (unlikely(!sched_info_on()))
3199                         return 1;
3200
3201                 if (data & KVM_STEAL_RESERVED_MASK)
3202                         return 1;
3203
3204                 vcpu->arch.st.msr_val = data;
3205
3206                 if (!(data & KVM_MSR_ENABLED))
3207                         break;
3208
3209                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3210
3211                 break;
3212         case MSR_KVM_PV_EOI_EN:
3213                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3214                         return 1;
3215
3216                 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
3217                         return 1;
3218                 break;
3219
3220         case MSR_KVM_POLL_CONTROL:
3221                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3222                         return 1;
3223
3224                 /* only enable bit supported */
3225                 if (data & (-1ULL << 1))
3226                         return 1;
3227
3228                 vcpu->arch.msr_kvm_poll_control = data;
3229                 break;
3230
3231         case MSR_IA32_MCG_CTL:
3232         case MSR_IA32_MCG_STATUS:
3233         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3234                 return set_msr_mce(vcpu, msr_info);
3235
3236         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3237         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3238                 pr = true;
3239                 fallthrough;
3240         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3241         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3242                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3243                         return kvm_pmu_set_msr(vcpu, msr_info);
3244
3245                 if (pr || data != 0)
3246                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
3247                                     "0x%x data 0x%llx\n", msr, data);
3248                 break;
3249         case MSR_K7_CLK_CTL:
3250                 /*
3251                  * Ignore all writes to this no longer documented MSR.
3252                  * Writes are only relevant for old K7 processors,
3253                  * all pre-dating SVM, but a recommended workaround from
3254                  * AMD for these chips. It is possible to specify the
3255                  * affected processor models on the command line, hence
3256                  * the need to ignore the workaround.
3257                  */
3258                 break;
3259         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3260         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3261         case HV_X64_MSR_SYNDBG_OPTIONS:
3262         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3263         case HV_X64_MSR_CRASH_CTL:
3264         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3265         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3266         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3267         case HV_X64_MSR_TSC_EMULATION_STATUS:
3268                 return kvm_hv_set_msr_common(vcpu, msr, data,
3269                                              msr_info->host_initiated);
3270         case MSR_IA32_BBL_CR_CTL3:
3271                 /* Drop writes to this legacy MSR -- see rdmsr
3272                  * counterpart for further detail.
3273                  */
3274                 if (report_ignored_msrs)
3275                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
3276                                 msr, data);
3277                 break;
3278         case MSR_AMD64_OSVW_ID_LENGTH:
3279                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3280                         return 1;
3281                 vcpu->arch.osvw.length = data;
3282                 break;
3283         case MSR_AMD64_OSVW_STATUS:
3284                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3285                         return 1;
3286                 vcpu->arch.osvw.status = data;
3287                 break;
3288         case MSR_PLATFORM_INFO:
3289                 if (!msr_info->host_initiated ||
3290                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
3291                      cpuid_fault_enabled(vcpu)))
3292                         return 1;
3293                 vcpu->arch.msr_platform_info = data;
3294                 break;
3295         case MSR_MISC_FEATURES_ENABLES:
3296                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
3297                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
3298                      !supports_cpuid_fault(vcpu)))
3299                         return 1;
3300                 vcpu->arch.msr_misc_features_enables = data;
3301                 break;
3302         default:
3303                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3304                         return kvm_pmu_set_msr(vcpu, msr_info);
3305                 return KVM_MSR_RET_INVALID;
3306         }
3307         return 0;
3308 }
3309 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
3310
3311 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
3312 {
3313         u64 data;
3314         u64 mcg_cap = vcpu->arch.mcg_cap;
3315         unsigned bank_num = mcg_cap & 0xff;
3316
3317         switch (msr) {
3318         case MSR_IA32_P5_MC_ADDR:
3319         case MSR_IA32_P5_MC_TYPE:
3320                 data = 0;
3321                 break;
3322         case MSR_IA32_MCG_CAP:
3323                 data = vcpu->arch.mcg_cap;
3324                 break;
3325         case MSR_IA32_MCG_CTL:
3326                 if (!(mcg_cap & MCG_CTL_P) && !host)
3327                         return 1;
3328                 data = vcpu->arch.mcg_ctl;
3329                 break;
3330         case MSR_IA32_MCG_STATUS:
3331                 data = vcpu->arch.mcg_status;
3332                 break;
3333         default:
3334                 if (msr >= MSR_IA32_MC0_CTL &&
3335                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3336                         u32 offset = array_index_nospec(
3337                                 msr - MSR_IA32_MC0_CTL,
3338                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3339
3340                         data = vcpu->arch.mce_banks[offset];
3341                         break;
3342                 }
3343                 return 1;
3344         }
3345         *pdata = data;
3346         return 0;
3347 }
3348
3349 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3350 {
3351         switch (msr_info->index) {
3352         case MSR_IA32_PLATFORM_ID:
3353         case MSR_IA32_EBL_CR_POWERON:
3354         case MSR_IA32_LASTBRANCHFROMIP:
3355         case MSR_IA32_LASTBRANCHTOIP:
3356         case MSR_IA32_LASTINTFROMIP:
3357         case MSR_IA32_LASTINTTOIP:
3358         case MSR_K8_SYSCFG:
3359         case MSR_K8_TSEG_ADDR:
3360         case MSR_K8_TSEG_MASK:
3361         case MSR_VM_HSAVE_PA:
3362         case MSR_K8_INT_PENDING_MSG:
3363         case MSR_AMD64_NB_CFG:
3364         case MSR_FAM10H_MMIO_CONF_BASE:
3365         case MSR_AMD64_BU_CFG2:
3366         case MSR_IA32_PERF_CTL:
3367         case MSR_AMD64_DC_CFG:
3368         case MSR_F15H_EX_CFG:
3369         /*
3370          * Intel Sandy Bridge CPUs must support the RAPL (running average power
3371          * limit) MSRs. Just return 0, as we do not want to expose the host
3372          * data here. Do not conditionalize this on CPUID, as KVM does not do
3373          * so for existing CPU-specific MSRs.
3374          */
3375         case MSR_RAPL_POWER_UNIT:
3376         case MSR_PP0_ENERGY_STATUS:     /* Power plane 0 (core) */
3377         case MSR_PP1_ENERGY_STATUS:     /* Power plane 1 (graphics uncore) */
3378         case MSR_PKG_ENERGY_STATUS:     /* Total package */
3379         case MSR_DRAM_ENERGY_STATUS:    /* DRAM controller */
3380                 msr_info->data = 0;
3381                 break;
3382         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3383         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3384         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3385         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3386         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3387                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3388                         return kvm_pmu_get_msr(vcpu, msr_info);
3389                 msr_info->data = 0;
3390                 break;
3391         case MSR_IA32_UCODE_REV:
3392                 msr_info->data = vcpu->arch.microcode_version;
3393                 break;
3394         case MSR_IA32_ARCH_CAPABILITIES:
3395                 if (!msr_info->host_initiated &&
3396                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
3397                         return 1;
3398                 msr_info->data = vcpu->arch.arch_capabilities;
3399                 break;
3400         case MSR_IA32_PERF_CAPABILITIES:
3401                 if (!msr_info->host_initiated &&
3402                     !guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
3403                         return 1;
3404                 msr_info->data = vcpu->arch.perf_capabilities;
3405                 break;
3406         case MSR_IA32_POWER_CTL:
3407                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
3408                 break;
3409         case MSR_IA32_TSC: {
3410                 /*
3411                  * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3412                  * even when not intercepted. AMD manual doesn't explicitly
3413                  * state this but appears to behave the same.
3414                  *
3415                  * On userspace reads and writes, however, we unconditionally
3416                  * return L1's TSC value to ensure backwards-compatible
3417                  * behavior for migration.
3418                  */
3419                 u64 tsc_offset = msr_info->host_initiated ? vcpu->arch.l1_tsc_offset :
3420                                                             vcpu->arch.tsc_offset;
3421
3422                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc()) + tsc_offset;
3423                 break;
3424         }
3425         case MSR_MTRRcap:
3426         case 0x200 ... 0x2ff:
3427                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
3428         case 0xcd: /* fsb frequency */
3429                 msr_info->data = 3;
3430                 break;
3431                 /*
3432                  * MSR_EBC_FREQUENCY_ID
3433                  * Conservative value valid for even the basic CPU models.
3434                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3435                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3436                  * and 266MHz for model 3, or 4. Set Core Clock
3437                  * Frequency to System Bus Frequency Ratio to 1 (bits
3438                  * 31:24) even though these are only valid for CPU
3439                  * models > 2, however guests may end up dividing or
3440                  * multiplying by zero otherwise.
3441                  */
3442         case MSR_EBC_FREQUENCY_ID:
3443                 msr_info->data = 1 << 24;
3444                 break;
3445         case MSR_IA32_APICBASE:
3446                 msr_info->data = kvm_get_apic_base(vcpu);
3447                 break;
3448         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3449                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
3450         case MSR_IA32_TSCDEADLINE:
3451                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
3452                 break;
3453         case MSR_IA32_TSC_ADJUST:
3454                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
3455                 break;
3456         case MSR_IA32_MISC_ENABLE:
3457                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
3458                 break;
3459         case MSR_IA32_SMBASE:
3460                 if (!msr_info->host_initiated)
3461                         return 1;
3462                 msr_info->data = vcpu->arch.smbase;
3463                 break;
3464         case MSR_SMI_COUNT:
3465                 msr_info->data = vcpu->arch.smi_count;
3466                 break;
3467         case MSR_IA32_PERF_STATUS:
3468                 /* TSC increment by tick */
3469                 msr_info->data = 1000ULL;
3470                 /* CPU multiplier */
3471                 msr_info->data |= (((uint64_t)4ULL) << 40);
3472                 break;
3473         case MSR_EFER:
3474                 msr_info->data = vcpu->arch.efer;
3475                 break;
3476         case MSR_KVM_WALL_CLOCK:
3477                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3478                         return 1;
3479
3480                 msr_info->data = vcpu->kvm->arch.wall_clock;
3481                 break;
3482         case MSR_KVM_WALL_CLOCK_NEW:
3483                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3484                         return 1;
3485
3486                 msr_info->data = vcpu->kvm->arch.wall_clock;
3487                 break;
3488         case MSR_KVM_SYSTEM_TIME:
3489                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3490                         return 1;
3491
3492                 msr_info->data = vcpu->arch.time;
3493                 break;
3494         case MSR_KVM_SYSTEM_TIME_NEW:
3495                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3496                         return 1;
3497
3498                 msr_info->data = vcpu->arch.time;
3499                 break;
3500         case MSR_KVM_ASYNC_PF_EN:
3501                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3502                         return 1;
3503
3504                 msr_info->data = vcpu->arch.apf.msr_en_val;
3505                 break;
3506         case MSR_KVM_ASYNC_PF_INT:
3507                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3508                         return 1;
3509
3510                 msr_info->data = vcpu->arch.apf.msr_int_val;
3511                 break;
3512         case MSR_KVM_ASYNC_PF_ACK:
3513                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3514                         return 1;
3515
3516                 msr_info->data = 0;
3517                 break;
3518         case MSR_KVM_STEAL_TIME:
3519                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3520                         return 1;
3521
3522                 msr_info->data = vcpu->arch.st.msr_val;
3523                 break;
3524         case MSR_KVM_PV_EOI_EN:
3525                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3526                         return 1;
3527
3528                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3529                 break;
3530         case MSR_KVM_POLL_CONTROL:
3531                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3532                         return 1;
3533
3534                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3535                 break;
3536         case MSR_IA32_P5_MC_ADDR:
3537         case MSR_IA32_P5_MC_TYPE:
3538         case MSR_IA32_MCG_CAP:
3539         case MSR_IA32_MCG_CTL:
3540         case MSR_IA32_MCG_STATUS:
3541         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3542                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3543                                    msr_info->host_initiated);
3544         case MSR_IA32_XSS:
3545                 if (!msr_info->host_initiated &&
3546                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3547                         return 1;
3548                 msr_info->data = vcpu->arch.ia32_xss;
3549                 break;
3550         case MSR_K7_CLK_CTL:
3551                 /*
3552                  * Provide expected ramp-up count for K7. All other
3553                  * are set to zero, indicating minimum divisors for
3554                  * every field.
3555                  *
3556                  * This prevents guest kernels on AMD host with CPU
3557                  * type 6, model 8 and higher from exploding due to
3558                  * the rdmsr failing.
3559                  */
3560                 msr_info->data = 0x20000000;
3561                 break;
3562         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3563         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3564         case HV_X64_MSR_SYNDBG_OPTIONS:
3565         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3566         case HV_X64_MSR_CRASH_CTL:
3567         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3568         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3569         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3570         case HV_X64_MSR_TSC_EMULATION_STATUS:
3571                 return kvm_hv_get_msr_common(vcpu,
3572                                              msr_info->index, &msr_info->data,
3573                                              msr_info->host_initiated);
3574         case MSR_IA32_BBL_CR_CTL3:
3575                 /* This legacy MSR exists but isn't fully documented in current
3576                  * silicon.  It is however accessed by winxp in very narrow
3577                  * scenarios where it sets bit #19, itself documented as
3578                  * a "reserved" bit.  Best effort attempt to source coherent
3579                  * read data here should the balance of the register be
3580                  * interpreted by the guest:
3581                  *
3582                  * L2 cache control register 3: 64GB range, 256KB size,
3583                  * enabled, latency 0x1, configured
3584                  */
3585                 msr_info->data = 0xbe702111;
3586                 break;
3587         case MSR_AMD64_OSVW_ID_LENGTH:
3588                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3589                         return 1;
3590                 msr_info->data = vcpu->arch.osvw.length;
3591                 break;
3592         case MSR_AMD64_OSVW_STATUS:
3593                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3594                         return 1;
3595                 msr_info->data = vcpu->arch.osvw.status;
3596                 break;
3597         case MSR_PLATFORM_INFO:
3598                 if (!msr_info->host_initiated &&
3599                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
3600                         return 1;
3601                 msr_info->data = vcpu->arch.msr_platform_info;
3602                 break;
3603         case MSR_MISC_FEATURES_ENABLES:
3604                 msr_info->data = vcpu->arch.msr_misc_features_enables;
3605                 break;
3606         case MSR_K7_HWCR:
3607                 msr_info->data = vcpu->arch.msr_hwcr;
3608                 break;
3609         default:
3610                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3611                         return kvm_pmu_get_msr(vcpu, msr_info);
3612                 return KVM_MSR_RET_INVALID;
3613         }
3614         return 0;
3615 }
3616 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
3617
3618 /*
3619  * Read or write a bunch of msrs. All parameters are kernel addresses.
3620  *
3621  * @return number of msrs set successfully.
3622  */
3623 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
3624                     struct kvm_msr_entry *entries,
3625                     int (*do_msr)(struct kvm_vcpu *vcpu,
3626                                   unsigned index, u64 *data))
3627 {
3628         int i;
3629
3630         for (i = 0; i < msrs->nmsrs; ++i)
3631                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
3632                         break;
3633
3634         return i;
3635 }
3636
3637 /*
3638  * Read or write a bunch of msrs. Parameters are user addresses.
3639  *
3640  * @return number of msrs set successfully.
3641  */
3642 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
3643                   int (*do_msr)(struct kvm_vcpu *vcpu,
3644                                 unsigned index, u64 *data),
3645                   int writeback)
3646 {
3647         struct kvm_msrs msrs;
3648         struct kvm_msr_entry *entries;
3649         int r, n;
3650         unsigned size;
3651
3652         r = -EFAULT;
3653         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
3654                 goto out;
3655
3656         r = -E2BIG;
3657         if (msrs.nmsrs >= MAX_IO_MSRS)
3658                 goto out;
3659
3660         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
3661         entries = memdup_user(user_msrs->entries, size);
3662         if (IS_ERR(entries)) {
3663                 r = PTR_ERR(entries);
3664                 goto out;
3665         }
3666
3667         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
3668         if (r < 0)
3669                 goto out_free;
3670
3671         r = -EFAULT;
3672         if (writeback && copy_to_user(user_msrs->entries, entries, size))
3673                 goto out_free;
3674
3675         r = n;
3676
3677 out_free:
3678         kfree(entries);
3679 out:
3680         return r;
3681 }
3682
3683 static inline bool kvm_can_mwait_in_guest(void)
3684 {
3685         return boot_cpu_has(X86_FEATURE_MWAIT) &&
3686                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
3687                 boot_cpu_has(X86_FEATURE_ARAT);
3688 }
3689
3690 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu *vcpu,
3691                                             struct kvm_cpuid2 __user *cpuid_arg)
3692 {
3693         struct kvm_cpuid2 cpuid;
3694         int r;
3695
3696         r = -EFAULT;
3697         if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3698                 return r;
3699
3700         r = kvm_get_hv_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3701         if (r)
3702                 return r;
3703
3704         r = -EFAULT;
3705         if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3706                 return r;
3707
3708         return 0;
3709 }
3710
3711 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
3712 {
3713         int r = 0;
3714
3715         switch (ext) {
3716         case KVM_CAP_IRQCHIP:
3717         case KVM_CAP_HLT:
3718         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
3719         case KVM_CAP_SET_TSS_ADDR:
3720         case KVM_CAP_EXT_CPUID:
3721         case KVM_CAP_EXT_EMUL_CPUID:
3722         case KVM_CAP_CLOCKSOURCE:
3723         case KVM_CAP_PIT:
3724         case KVM_CAP_NOP_IO_DELAY:
3725         case KVM_CAP_MP_STATE:
3726         case KVM_CAP_SYNC_MMU:
3727         case KVM_CAP_USER_NMI:
3728         case KVM_CAP_REINJECT_CONTROL:
3729         case KVM_CAP_IRQ_INJECT_STATUS:
3730         case KVM_CAP_IOEVENTFD:
3731         case KVM_CAP_IOEVENTFD_NO_LENGTH:
3732         case KVM_CAP_PIT2:
3733         case KVM_CAP_PIT_STATE2:
3734         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
3735         case KVM_CAP_VCPU_EVENTS:
3736         case KVM_CAP_HYPERV:
3737         case KVM_CAP_HYPERV_VAPIC:
3738         case KVM_CAP_HYPERV_SPIN:
3739         case KVM_CAP_HYPERV_SYNIC:
3740         case KVM_CAP_HYPERV_SYNIC2:
3741         case KVM_CAP_HYPERV_VP_INDEX:
3742         case KVM_CAP_HYPERV_EVENTFD:
3743         case KVM_CAP_HYPERV_TLBFLUSH:
3744         case KVM_CAP_HYPERV_SEND_IPI:
3745         case KVM_CAP_HYPERV_CPUID:
3746         case KVM_CAP_SYS_HYPERV_CPUID:
3747         case KVM_CAP_PCI_SEGMENT:
3748         case KVM_CAP_DEBUGREGS:
3749         case KVM_CAP_X86_ROBUST_SINGLESTEP:
3750         case KVM_CAP_XSAVE:
3751         case KVM_CAP_ASYNC_PF:
3752         case KVM_CAP_ASYNC_PF_INT:
3753         case KVM_CAP_GET_TSC_KHZ:
3754         case KVM_CAP_KVMCLOCK_CTRL:
3755         case KVM_CAP_READONLY_MEM:
3756         case KVM_CAP_HYPERV_TIME:
3757         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
3758         case KVM_CAP_TSC_DEADLINE_TIMER:
3759         case KVM_CAP_DISABLE_QUIRKS:
3760         case KVM_CAP_SET_BOOT_CPU_ID:
3761         case KVM_CAP_SPLIT_IRQCHIP:
3762         case KVM_CAP_IMMEDIATE_EXIT:
3763         case KVM_CAP_PMU_EVENT_FILTER:
3764         case KVM_CAP_GET_MSR_FEATURES:
3765         case KVM_CAP_MSR_PLATFORM_INFO:
3766         case KVM_CAP_EXCEPTION_PAYLOAD:
3767         case KVM_CAP_SET_GUEST_DEBUG:
3768         case KVM_CAP_LAST_CPU:
3769         case KVM_CAP_X86_USER_SPACE_MSR:
3770         case KVM_CAP_X86_MSR_FILTER:
3771         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
3772                 r = 1;
3773                 break;
3774 #ifdef CONFIG_KVM_XEN
3775         case KVM_CAP_XEN_HVM:
3776                 r = KVM_XEN_HVM_CONFIG_HYPERCALL_MSR |
3777                     KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL |
3778                     KVM_XEN_HVM_CONFIG_SHARED_INFO;
3779                 if (sched_info_on())
3780                         r |= KVM_XEN_HVM_CONFIG_RUNSTATE;
3781                 break;
3782 #endif
3783         case KVM_CAP_SYNC_REGS:
3784                 r = KVM_SYNC_X86_VALID_FIELDS;
3785                 break;
3786         case KVM_CAP_ADJUST_CLOCK:
3787                 r = KVM_CLOCK_TSC_STABLE;
3788                 break;
3789         case KVM_CAP_X86_DISABLE_EXITS:
3790                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
3791                       KVM_X86_DISABLE_EXITS_CSTATE;
3792                 if(kvm_can_mwait_in_guest())
3793                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
3794                 break;
3795         case KVM_CAP_X86_SMM:
3796                 /* SMBASE is usually relocated above 1M on modern chipsets,
3797                  * and SMM handlers might indeed rely on 4G segment limits,
3798                  * so do not report SMM to be available if real mode is
3799                  * emulated via vm86 mode.  Still, do not go to great lengths
3800                  * to avoid userspace's usage of the feature, because it is a
3801                  * fringe case that is not enabled except via specific settings
3802                  * of the module parameters.
3803                  */
3804                 r = static_call(kvm_x86_has_emulated_msr)(kvm, MSR_IA32_SMBASE);
3805                 break;
3806         case KVM_CAP_VAPIC:
3807                 r = !static_call(kvm_x86_cpu_has_accelerated_tpr)();
3808                 break;
3809         case KVM_CAP_NR_VCPUS:
3810                 r = KVM_SOFT_MAX_VCPUS;
3811                 break;
3812         case KVM_CAP_MAX_VCPUS:
3813                 r = KVM_MAX_VCPUS;
3814                 break;
3815         case KVM_CAP_MAX_VCPU_ID:
3816                 r = KVM_MAX_VCPU_ID;
3817                 break;
3818         case KVM_CAP_PV_MMU:    /* obsolete */
3819                 r = 0;
3820                 break;
3821         case KVM_CAP_MCE:
3822                 r = KVM_MAX_MCE_BANKS;
3823                 break;
3824         case KVM_CAP_XCRS:
3825                 r = boot_cpu_has(X86_FEATURE_XSAVE);
3826                 break;
3827         case KVM_CAP_TSC_CONTROL:
3828                 r = kvm_has_tsc_control;
3829                 break;
3830         case KVM_CAP_X2APIC_API:
3831                 r = KVM_X2APIC_API_VALID_FLAGS;
3832                 break;
3833         case KVM_CAP_NESTED_STATE:
3834                 r = kvm_x86_ops.nested_ops->get_state ?
3835                         kvm_x86_ops.nested_ops->get_state(NULL, NULL, 0) : 0;
3836                 break;
3837         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
3838                 r = kvm_x86_ops.enable_direct_tlbflush != NULL;
3839                 break;
3840         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
3841                 r = kvm_x86_ops.nested_ops->enable_evmcs != NULL;
3842                 break;
3843         case KVM_CAP_SMALLER_MAXPHYADDR:
3844                 r = (int) allow_smaller_maxphyaddr;
3845                 break;
3846         case KVM_CAP_STEAL_TIME:
3847                 r = sched_info_on();
3848                 break;
3849         case KVM_CAP_X86_BUS_LOCK_EXIT:
3850                 if (kvm_has_bus_lock_exit)
3851                         r = KVM_BUS_LOCK_DETECTION_OFF |
3852                             KVM_BUS_LOCK_DETECTION_EXIT;
3853                 else
3854                         r = 0;
3855                 break;
3856         default:
3857                 break;
3858         }
3859         return r;
3860
3861 }
3862
3863 long kvm_arch_dev_ioctl(struct file *filp,
3864                         unsigned int ioctl, unsigned long arg)
3865 {
3866         void __user *argp = (void __user *)arg;
3867         long r;
3868
3869         switch (ioctl) {
3870         case KVM_GET_MSR_INDEX_LIST: {
3871                 struct kvm_msr_list __user *user_msr_list = argp;
3872                 struct kvm_msr_list msr_list;
3873                 unsigned n;
3874
3875                 r = -EFAULT;
3876                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3877                         goto out;
3878                 n = msr_list.nmsrs;
3879                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
3880                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3881                         goto out;
3882                 r = -E2BIG;
3883                 if (n < msr_list.nmsrs)
3884                         goto out;
3885                 r = -EFAULT;
3886                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
3887                                  num_msrs_to_save * sizeof(u32)))
3888                         goto out;
3889                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
3890                                  &emulated_msrs,
3891                                  num_emulated_msrs * sizeof(u32)))
3892                         goto out;
3893                 r = 0;
3894                 break;
3895         }
3896         case KVM_GET_SUPPORTED_CPUID:
3897         case KVM_GET_EMULATED_CPUID: {
3898                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3899                 struct kvm_cpuid2 cpuid;
3900
3901                 r = -EFAULT;
3902                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3903                         goto out;
3904
3905                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
3906                                             ioctl);
3907                 if (r)
3908                         goto out;
3909
3910                 r = -EFAULT;
3911                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3912                         goto out;
3913                 r = 0;
3914                 break;
3915         }
3916         case KVM_X86_GET_MCE_CAP_SUPPORTED:
3917                 r = -EFAULT;
3918                 if (copy_to_user(argp, &kvm_mce_cap_supported,
3919                                  sizeof(kvm_mce_cap_supported)))
3920                         goto out;
3921                 r = 0;
3922                 break;
3923         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
3924                 struct kvm_msr_list __user *user_msr_list = argp;
3925                 struct kvm_msr_list msr_list;
3926                 unsigned int n;
3927
3928                 r = -EFAULT;
3929                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3930                         goto out;
3931                 n = msr_list.nmsrs;
3932                 msr_list.nmsrs = num_msr_based_features;
3933                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3934                         goto out;
3935                 r = -E2BIG;
3936                 if (n < msr_list.nmsrs)
3937                         goto out;
3938                 r = -EFAULT;
3939                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
3940                                  num_msr_based_features * sizeof(u32)))
3941                         goto out;
3942                 r = 0;
3943                 break;
3944         }
3945         case KVM_GET_MSRS:
3946                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
3947                 break;
3948         case KVM_GET_SUPPORTED_HV_CPUID:
3949                 r = kvm_ioctl_get_supported_hv_cpuid(NULL, argp);
3950                 break;
3951         default:
3952                 r = -EINVAL;
3953                 break;
3954         }
3955 out:
3956         return r;
3957 }
3958
3959 static void wbinvd_ipi(void *garbage)
3960 {
3961         wbinvd();
3962 }
3963
3964 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
3965 {
3966         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
3967 }
3968
3969 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
3970 {
3971         /* Address WBINVD may be executed by guest */
3972         if (need_emulate_wbinvd(vcpu)) {
3973                 if (static_call(kvm_x86_has_wbinvd_exit)())
3974                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
3975                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
3976                         smp_call_function_single(vcpu->cpu,
3977                                         wbinvd_ipi, NULL, 1);
3978         }
3979
3980         static_call(kvm_x86_vcpu_load)(vcpu, cpu);
3981
3982         /* Save host pkru register if supported */
3983         vcpu->arch.host_pkru = read_pkru();
3984
3985         /* Apply any externally detected TSC adjustments (due to suspend) */
3986         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
3987                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
3988                 vcpu->arch.tsc_offset_adjustment = 0;
3989                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3990         }
3991
3992         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
3993                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
3994                                 rdtsc() - vcpu->arch.last_host_tsc;
3995                 if (tsc_delta < 0)
3996                         mark_tsc_unstable("KVM discovered backwards TSC");
3997
3998                 if (kvm_check_tsc_unstable()) {
3999                         u64 offset = kvm_compute_tsc_offset(vcpu,
4000                                                 vcpu->arch.last_guest_tsc);
4001                         kvm_vcpu_write_tsc_offset(vcpu, offset);
4002                         vcpu->arch.tsc_catchup = 1;
4003                 }
4004
4005                 if (kvm_lapic_hv_timer_in_use(vcpu))
4006                         kvm_lapic_restart_hv_timer(vcpu);
4007
4008                 /*
4009                  * On a host with synchronized TSC, there is no need to update
4010                  * kvmclock on vcpu->cpu migration
4011                  */
4012                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
4013                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
4014                 if (vcpu->cpu != cpu)
4015                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
4016                 vcpu->cpu = cpu;
4017         }
4018
4019         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
4020 }
4021
4022 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
4023 {
4024         struct kvm_host_map map;
4025         struct kvm_steal_time *st;
4026         int idx;
4027
4028         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
4029                 return;
4030
4031         if (vcpu->arch.st.preempted)
4032                 return;
4033
4034         /*
4035          * Take the srcu lock as memslots will be accessed to check the gfn
4036          * cache generation against the memslots generation.
4037          */
4038         idx = srcu_read_lock(&vcpu->kvm->srcu);
4039
4040         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT, &map,
4041                         &vcpu->arch.st.cache, true))
4042                 goto out;
4043
4044         st = map.hva +
4045                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
4046
4047         st->preempted = vcpu->arch.st.preempted = KVM_VCPU_PREEMPTED;
4048
4049         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, true);
4050
4051 out:
4052         srcu_read_unlock(&vcpu->kvm->srcu, idx);
4053 }
4054
4055 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
4056 {
4057         if (vcpu->preempted && !vcpu->arch.guest_state_protected)
4058                 vcpu->arch.preempted_in_kernel = !static_call(kvm_x86_get_cpl)(vcpu);
4059
4060         if (kvm_xen_msr_enabled(vcpu->kvm))
4061                 kvm_xen_runstate_set_preempted(vcpu);
4062         else
4063                 kvm_steal_time_set_preempted(vcpu);
4064
4065         static_call(kvm_x86_vcpu_put)(vcpu);
4066         vcpu->arch.last_host_tsc = rdtsc();
4067         /*
4068          * If userspace has set any breakpoints or watchpoints, dr6 is restored
4069          * on every vmexit, but if not, we might have a stale dr6 from the
4070          * guest. do_debug expects dr6 to be cleared after it runs, do the same.
4071          */
4072         set_debugreg(0, 6);
4073 }
4074
4075 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
4076                                     struct kvm_lapic_state *s)
4077 {
4078         if (vcpu->arch.apicv_active)
4079                 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
4080
4081         return kvm_apic_get_state(vcpu, s);
4082 }
4083
4084 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
4085                                     struct kvm_lapic_state *s)
4086 {
4087         int r;
4088
4089         r = kvm_apic_set_state(vcpu, s);
4090         if (r)
4091                 return r;
4092         update_cr8_intercept(vcpu);
4093
4094         return 0;
4095 }
4096
4097 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
4098 {
4099         /*
4100          * We can accept userspace's request for interrupt injection
4101          * as long as we have a place to store the interrupt number.
4102          * The actual injection will happen when the CPU is able to
4103          * deliver the interrupt.
4104          */
4105         if (kvm_cpu_has_extint(vcpu))
4106                 return false;
4107
4108         /* Acknowledging ExtINT does not happen if LINT0 is masked.  */
4109         return (!lapic_in_kernel(vcpu) ||
4110                 kvm_apic_accept_pic_intr(vcpu));
4111 }
4112
4113 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
4114 {
4115         return kvm_arch_interrupt_allowed(vcpu) &&
4116                 kvm_cpu_accept_dm_intr(vcpu);
4117 }
4118
4119 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
4120                                     struct kvm_interrupt *irq)
4121 {
4122         if (irq->irq >= KVM_NR_INTERRUPTS)
4123                 return -EINVAL;
4124
4125         if (!irqchip_in_kernel(vcpu->kvm)) {
4126                 kvm_queue_interrupt(vcpu, irq->irq, false);
4127                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4128                 return 0;
4129         }
4130
4131         /*
4132          * With in-kernel LAPIC, we only use this to inject EXTINT, so
4133          * fail for in-kernel 8259.
4134          */
4135         if (pic_in_kernel(vcpu->kvm))
4136                 return -ENXIO;
4137
4138         if (vcpu->arch.pending_external_vector != -1)
4139                 return -EEXIST;
4140
4141         vcpu->arch.pending_external_vector = irq->irq;
4142         kvm_make_request(KVM_REQ_EVENT, vcpu);
4143         return 0;
4144 }
4145
4146 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
4147 {
4148         kvm_inject_nmi(vcpu);
4149
4150         return 0;
4151 }
4152
4153 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
4154 {
4155         kvm_make_request(KVM_REQ_SMI, vcpu);
4156
4157         return 0;
4158 }
4159
4160 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
4161                                            struct kvm_tpr_access_ctl *tac)
4162 {
4163         if (tac->flags)
4164                 return -EINVAL;
4165         vcpu->arch.tpr_access_reporting = !!tac->enabled;
4166         return 0;
4167 }
4168
4169 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
4170                                         u64 mcg_cap)
4171 {
4172         int r;
4173         unsigned bank_num = mcg_cap & 0xff, bank;
4174
4175         r = -EINVAL;
4176         if (!bank_num || bank_num > KVM_MAX_MCE_BANKS)
4177                 goto out;
4178         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
4179                 goto out;
4180         r = 0;
4181         vcpu->arch.mcg_cap = mcg_cap;
4182         /* Init IA32_MCG_CTL to all 1s */
4183         if (mcg_cap & MCG_CTL_P)
4184                 vcpu->arch.mcg_ctl = ~(u64)0;
4185         /* Init IA32_MCi_CTL to all 1s */
4186         for (bank = 0; bank < bank_num; bank++)
4187                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
4188
4189         static_call(kvm_x86_setup_mce)(vcpu);
4190 out:
4191         return r;
4192 }
4193
4194 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
4195                                       struct kvm_x86_mce *mce)
4196 {
4197         u64 mcg_cap = vcpu->arch.mcg_cap;
4198         unsigned bank_num = mcg_cap & 0xff;
4199         u64 *banks = vcpu->arch.mce_banks;
4200
4201         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
4202                 return -EINVAL;
4203         /*
4204          * if IA32_MCG_CTL is not all 1s, the uncorrected error
4205          * reporting is disabled
4206          */
4207         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
4208             vcpu->arch.mcg_ctl != ~(u64)0)
4209                 return 0;
4210         banks += 4 * mce->bank;
4211         /*
4212          * if IA32_MCi_CTL is not all 1s, the uncorrected error
4213          * reporting is disabled for the bank
4214          */
4215         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
4216                 return 0;
4217         if (mce->status & MCI_STATUS_UC) {
4218                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
4219                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
4220                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
4221                         return 0;
4222                 }
4223                 if (banks[1] & MCI_STATUS_VAL)
4224                         mce->status |= MCI_STATUS_OVER;
4225                 banks[2] = mce->addr;
4226                 banks[3] = mce->misc;
4227                 vcpu->arch.mcg_status = mce->mcg_status;
4228                 banks[1] = mce->status;
4229                 kvm_queue_exception(vcpu, MC_VECTOR);
4230         } else if (!(banks[1] & MCI_STATUS_VAL)
4231                    || !(banks[1] & MCI_STATUS_UC)) {
4232                 if (banks[1] & MCI_STATUS_VAL)
4233                         mce->status |= MCI_STATUS_OVER;
4234                 banks[2] = mce->addr;
4235                 banks[3] = mce->misc;
4236                 banks[1] = mce->status;
4237         } else
4238                 banks[1] |= MCI_STATUS_OVER;
4239         return 0;
4240 }
4241
4242 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
4243                                                struct kvm_vcpu_events *events)
4244 {
4245         process_nmi(vcpu);
4246
4247         if (kvm_check_request(KVM_REQ_SMI, vcpu))
4248                 process_smi(vcpu);
4249
4250         /*
4251          * In guest mode, payload delivery should be deferred,
4252          * so that the L1 hypervisor can intercept #PF before
4253          * CR2 is modified (or intercept #DB before DR6 is
4254          * modified under nVMX). Unless the per-VM capability,
4255          * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4256          * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4257          * opportunistically defer the exception payload, deliver it if the
4258          * capability hasn't been requested before processing a
4259          * KVM_GET_VCPU_EVENTS.
4260          */
4261         if (!vcpu->kvm->arch.exception_payload_enabled &&
4262             vcpu->arch.exception.pending && vcpu->arch.exception.has_payload)
4263                 kvm_deliver_exception_payload(vcpu);
4264
4265         /*
4266          * The API doesn't provide the instruction length for software
4267          * exceptions, so don't report them. As long as the guest RIP
4268          * isn't advanced, we should expect to encounter the exception
4269          * again.
4270          */
4271         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
4272                 events->exception.injected = 0;
4273                 events->exception.pending = 0;
4274         } else {
4275                 events->exception.injected = vcpu->arch.exception.injected;
4276                 events->exception.pending = vcpu->arch.exception.pending;
4277                 /*
4278                  * For ABI compatibility, deliberately conflate
4279                  * pending and injected exceptions when
4280                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4281                  */
4282                 if (!vcpu->kvm->arch.exception_payload_enabled)
4283                         events->exception.injected |=
4284                                 vcpu->arch.exception.pending;
4285         }
4286         events->exception.nr = vcpu->arch.exception.nr;
4287         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
4288         events->exception.error_code = vcpu->arch.exception.error_code;
4289         events->exception_has_payload = vcpu->arch.exception.has_payload;
4290         events->exception_payload = vcpu->arch.exception.payload;
4291
4292         events->interrupt.injected =
4293                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
4294         events->interrupt.nr = vcpu->arch.interrupt.nr;
4295         events->interrupt.soft = 0;
4296         events->interrupt.shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
4297
4298         events->nmi.injected = vcpu->arch.nmi_injected;
4299         events->nmi.pending = vcpu->arch.nmi_pending != 0;
4300         events->nmi.masked = static_call(kvm_x86_get_nmi_mask)(vcpu);
4301         events->nmi.pad = 0;
4302
4303         events->sipi_vector = 0; /* never valid when reporting to user space */
4304
4305         events->smi.smm = is_smm(vcpu);
4306         events->smi.pending = vcpu->arch.smi_pending;
4307         events->smi.smm_inside_nmi =
4308                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
4309         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
4310
4311         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
4312                          | KVM_VCPUEVENT_VALID_SHADOW
4313                          | KVM_VCPUEVENT_VALID_SMM);
4314         if (vcpu->kvm->arch.exception_payload_enabled)
4315                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
4316
4317         memset(&events->reserved, 0, sizeof(events->reserved));
4318 }
4319
4320 static void kvm_smm_changed(struct kvm_vcpu *vcpu);
4321
4322 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
4323                                               struct kvm_vcpu_events *events)
4324 {
4325         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4326                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4327                               | KVM_VCPUEVENT_VALID_SHADOW
4328                               | KVM_VCPUEVENT_VALID_SMM
4329                               | KVM_VCPUEVENT_VALID_PAYLOAD))
4330                 return -EINVAL;
4331
4332         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
4333                 if (!vcpu->kvm->arch.exception_payload_enabled)
4334                         return -EINVAL;
4335                 if (events->exception.pending)
4336                         events->exception.injected = 0;
4337                 else
4338                         events->exception_has_payload = 0;
4339         } else {
4340                 events->exception.pending = 0;
4341                 events->exception_has_payload = 0;
4342         }
4343
4344         if ((events->exception.injected || events->exception.pending) &&
4345             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
4346                 return -EINVAL;
4347
4348         /* INITs are latched while in SMM */
4349         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
4350             (events->smi.smm || events->smi.pending) &&
4351             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
4352                 return -EINVAL;
4353
4354         process_nmi(vcpu);
4355         vcpu->arch.exception.injected = events->exception.injected;
4356         vcpu->arch.exception.pending = events->exception.pending;
4357         vcpu->arch.exception.nr = events->exception.nr;
4358         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
4359         vcpu->arch.exception.error_code = events->exception.error_code;
4360         vcpu->arch.exception.has_payload = events->exception_has_payload;
4361         vcpu->arch.exception.payload = events->exception_payload;
4362
4363         vcpu->arch.interrupt.injected = events->interrupt.injected;
4364         vcpu->arch.interrupt.nr = events->interrupt.nr;
4365         vcpu->arch.interrupt.soft = events->interrupt.soft;
4366         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
4367                 static_call(kvm_x86_set_interrupt_shadow)(vcpu,
4368                                                 events->interrupt.shadow);
4369
4370         vcpu->arch.nmi_injected = events->nmi.injected;
4371         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
4372                 vcpu->arch.nmi_pending = events->nmi.pending;
4373         static_call(kvm_x86_set_nmi_mask)(vcpu, events->nmi.masked);
4374
4375         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
4376             lapic_in_kernel(vcpu))
4377                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
4378
4379         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
4380                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
4381                         if (events->smi.smm)
4382                                 vcpu->arch.hflags |= HF_SMM_MASK;
4383                         else
4384                                 vcpu->arch.hflags &= ~HF_SMM_MASK;
4385                         kvm_smm_changed(vcpu);
4386                 }
4387
4388                 vcpu->arch.smi_pending = events->smi.pending;
4389
4390                 if (events->smi.smm) {
4391                         if (events->smi.smm_inside_nmi)
4392                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
4393                         else
4394                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
4395                 }
4396
4397                 if (lapic_in_kernel(vcpu)) {
4398                         if (events->smi.latched_init)
4399                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4400                         else
4401                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4402                 }
4403         }
4404
4405         kvm_make_request(KVM_REQ_EVENT, vcpu);
4406
4407         return 0;
4408 }
4409
4410 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
4411                                              struct kvm_debugregs *dbgregs)
4412 {
4413         unsigned long val;
4414
4415         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
4416         kvm_get_dr(vcpu, 6, &val);
4417         dbgregs->dr6 = val;
4418         dbgregs->dr7 = vcpu->arch.dr7;
4419         dbgregs->flags = 0;
4420         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
4421 }
4422
4423 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
4424                                             struct kvm_debugregs *dbgregs)
4425 {
4426         if (dbgregs->flags)
4427                 return -EINVAL;
4428
4429         if (!kvm_dr6_valid(dbgregs->dr6))
4430                 return -EINVAL;
4431         if (!kvm_dr7_valid(dbgregs->dr7))
4432                 return -EINVAL;
4433
4434         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
4435         kvm_update_dr0123(vcpu);
4436         vcpu->arch.dr6 = dbgregs->dr6;
4437         vcpu->arch.dr7 = dbgregs->dr7;
4438         kvm_update_dr7(vcpu);
4439
4440         return 0;
4441 }
4442
4443 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
4444
4445 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
4446 {
4447         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4448         u64 xstate_bv = xsave->header.xfeatures;
4449         u64 valid;
4450
4451         /*
4452          * Copy legacy XSAVE area, to avoid complications with CPUID
4453          * leaves 0 and 1 in the loop below.
4454          */
4455         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
4456
4457         /* Set XSTATE_BV */
4458         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
4459         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
4460
4461         /*
4462          * Copy each region from the possibly compacted offset to the
4463          * non-compacted offset.
4464          */
4465         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4466         while (valid) {
4467                 u64 xfeature_mask = valid & -valid;
4468                 int xfeature_nr = fls64(xfeature_mask) - 1;
4469                 void *src = get_xsave_addr(xsave, xfeature_nr);
4470
4471                 if (src) {
4472                         u32 size, offset, ecx, edx;
4473                         cpuid_count(XSTATE_CPUID, xfeature_nr,
4474                                     &size, &offset, &ecx, &edx);
4475                         if (xfeature_nr == XFEATURE_PKRU)
4476                                 memcpy(dest + offset, &vcpu->arch.pkru,
4477                                        sizeof(vcpu->arch.pkru));
4478                         else
4479                                 memcpy(dest + offset, src, size);
4480
4481                 }
4482
4483                 valid -= xfeature_mask;
4484         }
4485 }
4486
4487 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
4488 {
4489         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4490         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
4491         u64 valid;
4492
4493         /*
4494          * Copy legacy XSAVE area, to avoid complications with CPUID
4495          * leaves 0 and 1 in the loop below.
4496          */
4497         memcpy(xsave, src, XSAVE_HDR_OFFSET);
4498
4499         /* Set XSTATE_BV and possibly XCOMP_BV.  */
4500         xsave->header.xfeatures = xstate_bv;
4501         if (boot_cpu_has(X86_FEATURE_XSAVES))
4502                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
4503
4504         /*
4505          * Copy each region from the non-compacted offset to the
4506          * possibly compacted offset.
4507          */
4508         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4509         while (valid) {
4510                 u64 xfeature_mask = valid & -valid;
4511                 int xfeature_nr = fls64(xfeature_mask) - 1;
4512                 void *dest = get_xsave_addr(xsave, xfeature_nr);
4513
4514                 if (dest) {
4515                         u32 size, offset, ecx, edx;
4516                         cpuid_count(XSTATE_CPUID, xfeature_nr,
4517                                     &size, &offset, &ecx, &edx);
4518                         if (xfeature_nr == XFEATURE_PKRU)
4519                                 memcpy(&vcpu->arch.pkru, src + offset,
4520                                        sizeof(vcpu->arch.pkru));
4521                         else
4522                                 memcpy(dest, src + offset, size);
4523                 }
4524
4525                 valid -= xfeature_mask;
4526         }
4527 }
4528
4529 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
4530                                          struct kvm_xsave *guest_xsave)
4531 {
4532         if (!vcpu->arch.guest_fpu)
4533                 return;
4534
4535         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4536                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
4537                 fill_xsave((u8 *) guest_xsave->region, vcpu);
4538         } else {
4539                 memcpy(guest_xsave->region,
4540                         &vcpu->arch.guest_fpu->state.fxsave,
4541                         sizeof(struct fxregs_state));
4542                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
4543                         XFEATURE_MASK_FPSSE;
4544         }
4545 }
4546
4547 #define XSAVE_MXCSR_OFFSET 24
4548
4549 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
4550                                         struct kvm_xsave *guest_xsave)
4551 {
4552         u64 xstate_bv;
4553         u32 mxcsr;
4554
4555         if (!vcpu->arch.guest_fpu)
4556                 return 0;
4557
4558         xstate_bv = *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
4559         mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
4560
4561         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4562                 /*
4563                  * Here we allow setting states that are not present in
4564                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
4565                  * with old userspace.
4566                  */
4567                 if (xstate_bv & ~supported_xcr0 || mxcsr & ~mxcsr_feature_mask)
4568                         return -EINVAL;
4569                 load_xsave(vcpu, (u8 *)guest_xsave->region);
4570         } else {
4571                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
4572                         mxcsr & ~mxcsr_feature_mask)
4573                         return -EINVAL;
4574                 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
4575                         guest_xsave->region, sizeof(struct fxregs_state));
4576         }
4577         return 0;
4578 }
4579
4580 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
4581                                         struct kvm_xcrs *guest_xcrs)
4582 {
4583         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
4584                 guest_xcrs->nr_xcrs = 0;
4585                 return;
4586         }
4587
4588         guest_xcrs->nr_xcrs = 1;
4589         guest_xcrs->flags = 0;
4590         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
4591         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
4592 }
4593
4594 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
4595                                        struct kvm_xcrs *guest_xcrs)
4596 {
4597         int i, r = 0;
4598
4599         if (!boot_cpu_has(X86_FEATURE_XSAVE))
4600                 return -EINVAL;
4601
4602         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
4603                 return -EINVAL;
4604
4605         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
4606                 /* Only support XCR0 currently */
4607                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
4608                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
4609                                 guest_xcrs->xcrs[i].value);
4610                         break;
4611                 }
4612         if (r)
4613                 r = -EINVAL;
4614         return r;
4615 }
4616
4617 /*
4618  * kvm_set_guest_paused() indicates to the guest kernel that it has been
4619  * stopped by the hypervisor.  This function will be called from the host only.
4620  * EINVAL is returned when the host attempts to set the flag for a guest that
4621  * does not support pv clocks.
4622  */
4623 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
4624 {
4625         if (!vcpu->arch.pv_time_enabled)
4626                 return -EINVAL;
4627         vcpu->arch.pvclock_set_guest_stopped_request = true;
4628         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4629         return 0;
4630 }
4631
4632 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
4633                                      struct kvm_enable_cap *cap)
4634 {
4635         int r;
4636         uint16_t vmcs_version;
4637         void __user *user_ptr;
4638
4639         if (cap->flags)
4640                 return -EINVAL;
4641
4642         switch (cap->cap) {
4643         case KVM_CAP_HYPERV_SYNIC2:
4644                 if (cap->args[0])
4645                         return -EINVAL;
4646                 fallthrough;
4647
4648         case KVM_CAP_HYPERV_SYNIC:
4649                 if (!irqchip_in_kernel(vcpu->kvm))
4650                         return -EINVAL;
4651                 return kvm_hv_activate_synic(vcpu, cap->cap ==
4652                                              KVM_CAP_HYPERV_SYNIC2);
4653         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4654                 if (!kvm_x86_ops.nested_ops->enable_evmcs)
4655                         return -ENOTTY;
4656                 r = kvm_x86_ops.nested_ops->enable_evmcs(vcpu, &vmcs_version);
4657                 if (!r) {
4658                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
4659                         if (copy_to_user(user_ptr, &vmcs_version,
4660                                          sizeof(vmcs_version)))
4661                                 r = -EFAULT;
4662                 }
4663                 return r;
4664         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4665                 if (!kvm_x86_ops.enable_direct_tlbflush)
4666                         return -ENOTTY;
4667
4668                 return static_call(kvm_x86_enable_direct_tlbflush)(vcpu);
4669
4670         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4671                 vcpu->arch.pv_cpuid.enforce = cap->args[0];
4672                 if (vcpu->arch.pv_cpuid.enforce)
4673                         kvm_update_pv_runtime(vcpu);
4674
4675                 return 0;
4676
4677         default:
4678                 return -EINVAL;
4679         }
4680 }
4681
4682 long kvm_arch_vcpu_ioctl(struct file *filp,
4683                          unsigned int ioctl, unsigned long arg)
4684 {
4685         struct kvm_vcpu *vcpu = filp->private_data;
4686         void __user *argp = (void __user *)arg;
4687         int r;
4688         union {
4689                 struct kvm_lapic_state *lapic;
4690                 struct kvm_xsave *xsave;
4691                 struct kvm_xcrs *xcrs;
4692                 void *buffer;
4693         } u;
4694
4695         vcpu_load(vcpu);
4696
4697         u.buffer = NULL;
4698         switch (ioctl) {
4699         case KVM_GET_LAPIC: {
4700                 r = -EINVAL;
4701                 if (!lapic_in_kernel(vcpu))
4702                         goto out;
4703                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
4704                                 GFP_KERNEL_ACCOUNT);
4705
4706                 r = -ENOMEM;
4707                 if (!u.lapic)
4708                         goto out;
4709                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
4710                 if (r)
4711                         goto out;
4712                 r = -EFAULT;
4713                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
4714                         goto out;
4715                 r = 0;
4716                 break;
4717         }
4718         case KVM_SET_LAPIC: {
4719                 r = -EINVAL;
4720                 if (!lapic_in_kernel(vcpu))
4721                         goto out;
4722                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
4723                 if (IS_ERR(u.lapic)) {
4724                         r = PTR_ERR(u.lapic);
4725                         goto out_nofree;
4726                 }
4727
4728                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
4729                 break;
4730         }
4731         case KVM_INTERRUPT: {
4732                 struct kvm_interrupt irq;
4733
4734                 r = -EFAULT;
4735                 if (copy_from_user(&irq, argp, sizeof(irq)))
4736                         goto out;
4737                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
4738                 break;
4739         }
4740         case KVM_NMI: {
4741                 r = kvm_vcpu_ioctl_nmi(vcpu);
4742                 break;
4743         }
4744         case KVM_SMI: {
4745                 r = kvm_vcpu_ioctl_smi(vcpu);
4746                 break;
4747         }
4748         case KVM_SET_CPUID: {
4749                 struct kvm_cpuid __user *cpuid_arg = argp;
4750                 struct kvm_cpuid cpuid;
4751
4752                 r = -EFAULT;
4753                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4754                         goto out;
4755                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4756                 break;
4757         }
4758         case KVM_SET_CPUID2: {
4759                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4760                 struct kvm_cpuid2 cpuid;
4761
4762                 r = -EFAULT;
4763                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4764                         goto out;
4765                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
4766                                               cpuid_arg->entries);
4767                 break;
4768         }
4769         case KVM_GET_CPUID2: {
4770                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4771                 struct kvm_cpuid2 cpuid;
4772
4773                 r = -EFAULT;
4774                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4775                         goto out;
4776                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
4777                                               cpuid_arg->entries);
4778                 if (r)
4779                         goto out;
4780                 r = -EFAULT;
4781                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4782                         goto out;
4783                 r = 0;
4784                 break;
4785         }
4786         case KVM_GET_MSRS: {
4787                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4788                 r = msr_io(vcpu, argp, do_get_msr, 1);
4789                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4790                 break;
4791         }
4792         case KVM_SET_MSRS: {
4793                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4794                 r = msr_io(vcpu, argp, do_set_msr, 0);
4795                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4796                 break;
4797         }
4798         case KVM_TPR_ACCESS_REPORTING: {
4799                 struct kvm_tpr_access_ctl tac;
4800
4801                 r = -EFAULT;
4802                 if (copy_from_user(&tac, argp, sizeof(tac)))
4803                         goto out;
4804                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
4805                 if (r)
4806                         goto out;
4807                 r = -EFAULT;
4808                 if (copy_to_user(argp, &tac, sizeof(tac)))
4809                         goto out;
4810                 r = 0;
4811                 break;
4812         };
4813         case KVM_SET_VAPIC_ADDR: {
4814                 struct kvm_vapic_addr va;
4815                 int idx;
4816
4817                 r = -EINVAL;
4818                 if (!lapic_in_kernel(vcpu))
4819                         goto out;
4820                 r = -EFAULT;
4821                 if (copy_from_user(&va, argp, sizeof(va)))
4822                         goto out;
4823                 idx = srcu_read_lock(&vcpu->kvm->srcu);
4824                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
4825                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4826                 break;
4827         }
4828         case KVM_X86_SETUP_MCE: {
4829                 u64 mcg_cap;
4830
4831                 r = -EFAULT;
4832                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
4833                         goto out;
4834                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
4835                 break;
4836         }
4837         case KVM_X86_SET_MCE: {
4838                 struct kvm_x86_mce mce;
4839
4840                 r = -EFAULT;
4841                 if (copy_from_user(&mce, argp, sizeof(mce)))
4842                         goto out;
4843                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
4844                 break;
4845         }
4846         case KVM_GET_VCPU_EVENTS: {
4847                 struct kvm_vcpu_events events;
4848
4849                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
4850
4851                 r = -EFAULT;
4852                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
4853                         break;
4854                 r = 0;
4855                 break;
4856         }
4857         case KVM_SET_VCPU_EVENTS: {
4858                 struct kvm_vcpu_events events;
4859
4860                 r = -EFAULT;
4861                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
4862                         break;
4863
4864                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
4865                 break;
4866         }
4867         case KVM_GET_DEBUGREGS: {
4868                 struct kvm_debugregs dbgregs;
4869
4870                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
4871
4872                 r = -EFAULT;
4873                 if (copy_to_user(argp, &dbgregs,
4874                                  sizeof(struct kvm_debugregs)))
4875                         break;
4876                 r = 0;
4877                 break;
4878         }
4879         case KVM_SET_DEBUGREGS: {
4880                 struct kvm_debugregs dbgregs;
4881
4882                 r = -EFAULT;
4883                 if (copy_from_user(&dbgregs, argp,
4884                                    sizeof(struct kvm_debugregs)))
4885                         break;
4886
4887                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
4888                 break;
4889         }
4890         case KVM_GET_XSAVE: {
4891                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
4892                 r = -ENOMEM;
4893                 if (!u.xsave)
4894                         break;
4895
4896                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
4897
4898                 r = -EFAULT;
4899                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
4900                         break;
4901                 r = 0;
4902                 break;
4903         }
4904         case KVM_SET_XSAVE: {
4905                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
4906                 if (IS_ERR(u.xsave)) {
4907                         r = PTR_ERR(u.xsave);
4908                         goto out_nofree;
4909                 }
4910
4911                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
4912                 break;
4913         }
4914         case KVM_GET_XCRS: {
4915                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
4916                 r = -ENOMEM;
4917                 if (!u.xcrs)
4918                         break;
4919
4920                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
4921
4922                 r = -EFAULT;
4923                 if (copy_to_user(argp, u.xcrs,
4924                                  sizeof(struct kvm_xcrs)))
4925                         break;
4926                 r = 0;
4927                 break;
4928         }
4929         case KVM_SET_XCRS: {
4930                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
4931                 if (IS_ERR(u.xcrs)) {
4932                         r = PTR_ERR(u.xcrs);
4933                         goto out_nofree;
4934                 }
4935
4936                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
4937                 break;
4938         }
4939         case KVM_SET_TSC_KHZ: {
4940                 u32 user_tsc_khz;
4941
4942                 r = -EINVAL;
4943                 user_tsc_khz = (u32)arg;
4944
4945                 if (kvm_has_tsc_control &&
4946                     user_tsc_khz >= kvm_max_guest_tsc_khz)
4947                         goto out;
4948
4949                 if (user_tsc_khz == 0)
4950                         user_tsc_khz = tsc_khz;
4951
4952                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
4953                         r = 0;
4954
4955                 goto out;
4956         }
4957         case KVM_GET_TSC_KHZ: {
4958                 r = vcpu->arch.virtual_tsc_khz;
4959                 goto out;
4960         }
4961         case KVM_KVMCLOCK_CTRL: {
4962                 r = kvm_set_guest_paused(vcpu);
4963                 goto out;
4964         }
4965         case KVM_ENABLE_CAP: {
4966                 struct kvm_enable_cap cap;
4967
4968                 r = -EFAULT;
4969                 if (copy_from_user(&cap, argp, sizeof(cap)))
4970                         goto out;
4971                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
4972                 break;
4973         }
4974         case KVM_GET_NESTED_STATE: {
4975                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4976                 u32 user_data_size;
4977
4978                 r = -EINVAL;
4979                 if (!kvm_x86_ops.nested_ops->get_state)
4980                         break;
4981
4982                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
4983                 r = -EFAULT;
4984                 if (get_user(user_data_size, &user_kvm_nested_state->size))
4985                         break;
4986
4987                 r = kvm_x86_ops.nested_ops->get_state(vcpu, user_kvm_nested_state,
4988                                                      user_data_size);
4989                 if (r < 0)
4990                         break;
4991
4992                 if (r > user_data_size) {
4993                         if (put_user(r, &user_kvm_nested_state->size))
4994                                 r = -EFAULT;
4995                         else
4996                                 r = -E2BIG;
4997                         break;
4998                 }
4999
5000                 r = 0;
5001                 break;
5002         }
5003         case KVM_SET_NESTED_STATE: {
5004                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5005                 struct kvm_nested_state kvm_state;
5006                 int idx;
5007
5008                 r = -EINVAL;
5009                 if (!kvm_x86_ops.nested_ops->set_state)
5010                         break;
5011
5012                 r = -EFAULT;
5013                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
5014                         break;
5015
5016                 r = -EINVAL;
5017                 if (kvm_state.size < sizeof(kvm_state))
5018                         break;
5019
5020                 if (kvm_state.flags &
5021                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
5022                       | KVM_STATE_NESTED_EVMCS | KVM_STATE_NESTED_MTF_PENDING
5023                       | KVM_STATE_NESTED_GIF_SET))
5024                         break;
5025
5026                 /* nested_run_pending implies guest_mode.  */
5027                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
5028                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
5029                         break;
5030
5031                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5032                 r = kvm_x86_ops.nested_ops->set_state(vcpu, user_kvm_nested_state, &kvm_state);
5033                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5034                 break;
5035         }
5036         case KVM_GET_SUPPORTED_HV_CPUID:
5037                 r = kvm_ioctl_get_supported_hv_cpuid(vcpu, argp);
5038                 break;
5039 #ifdef CONFIG_KVM_XEN
5040         case KVM_XEN_VCPU_GET_ATTR: {
5041                 struct kvm_xen_vcpu_attr xva;
5042
5043                 r = -EFAULT;
5044                 if (copy_from_user(&xva, argp, sizeof(xva)))
5045                         goto out;
5046                 r = kvm_xen_vcpu_get_attr(vcpu, &xva);
5047                 if (!r && copy_to_user(argp, &xva, sizeof(xva)))
5048                         r = -EFAULT;
5049                 break;
5050         }
5051         case KVM_XEN_VCPU_SET_ATTR: {
5052                 struct kvm_xen_vcpu_attr xva;
5053
5054                 r = -EFAULT;
5055                 if (copy_from_user(&xva, argp, sizeof(xva)))
5056                         goto out;
5057                 r = kvm_xen_vcpu_set_attr(vcpu, &xva);
5058                 break;
5059         }
5060 #endif
5061         default:
5062                 r = -EINVAL;
5063         }
5064 out:
5065         kfree(u.buffer);
5066 out_nofree:
5067         vcpu_put(vcpu);
5068         return r;
5069 }
5070
5071 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
5072 {
5073         return VM_FAULT_SIGBUS;
5074 }
5075
5076 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
5077 {
5078         int ret;
5079
5080         if (addr > (unsigned int)(-3 * PAGE_SIZE))
5081                 return -EINVAL;
5082         ret = static_call(kvm_x86_set_tss_addr)(kvm, addr);
5083         return ret;
5084 }
5085
5086 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
5087                                               u64 ident_addr)
5088 {
5089         return static_call(kvm_x86_set_identity_map_addr)(kvm, ident_addr);
5090 }
5091
5092 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
5093                                          unsigned long kvm_nr_mmu_pages)
5094 {
5095         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
5096                 return -EINVAL;
5097
5098         mutex_lock(&kvm->slots_lock);
5099
5100         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
5101         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
5102
5103         mutex_unlock(&kvm->slots_lock);
5104         return 0;
5105 }
5106
5107 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
5108 {
5109         return kvm->arch.n_max_mmu_pages;
5110 }
5111
5112 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5113 {
5114         struct kvm_pic *pic = kvm->arch.vpic;
5115         int r;
5116
5117         r = 0;
5118         switch (chip->chip_id) {
5119         case KVM_IRQCHIP_PIC_MASTER:
5120                 memcpy(&chip->chip.pic, &pic->pics[0],
5121                         sizeof(struct kvm_pic_state));
5122                 break;
5123         case KVM_IRQCHIP_PIC_SLAVE:
5124                 memcpy(&chip->chip.pic, &pic->pics[1],
5125                         sizeof(struct kvm_pic_state));
5126                 break;
5127         case KVM_IRQCHIP_IOAPIC:
5128                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
5129                 break;
5130         default:
5131                 r = -EINVAL;
5132                 break;
5133         }
5134         return r;
5135 }
5136
5137 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5138 {
5139         struct kvm_pic *pic = kvm->arch.vpic;
5140         int r;
5141
5142         r = 0;
5143         switch (chip->chip_id) {
5144         case KVM_IRQCHIP_PIC_MASTER:
5145                 spin_lock(&pic->lock);
5146                 memcpy(&pic->pics[0], &chip->chip.pic,
5147                         sizeof(struct kvm_pic_state));
5148                 spin_unlock(&pic->lock);
5149                 break;
5150         case KVM_IRQCHIP_PIC_SLAVE:
5151                 spin_lock(&pic->lock);
5152                 memcpy(&pic->pics[1], &chip->chip.pic,
5153                         sizeof(struct kvm_pic_state));
5154                 spin_unlock(&pic->lock);
5155                 break;
5156         case KVM_IRQCHIP_IOAPIC:
5157                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
5158                 break;
5159         default:
5160                 r = -EINVAL;
5161                 break;
5162         }
5163         kvm_pic_update_irq(pic);
5164         return r;
5165 }
5166
5167 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5168 {
5169         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
5170
5171         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
5172
5173         mutex_lock(&kps->lock);
5174         memcpy(ps, &kps->channels, sizeof(*ps));
5175         mutex_unlock(&kps->lock);
5176         return 0;
5177 }
5178
5179 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5180 {
5181         int i;
5182         struct kvm_pit *pit = kvm->arch.vpit;
5183
5184         mutex_lock(&pit->pit_state.lock);
5185         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
5186         for (i = 0; i < 3; i++)
5187                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
5188         mutex_unlock(&pit->pit_state.lock);
5189         return 0;
5190 }
5191
5192 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5193 {
5194         mutex_lock(&kvm->arch.vpit->pit_state.lock);
5195         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
5196                 sizeof(ps->channels));
5197         ps->flags = kvm->arch.vpit->pit_state.flags;
5198         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
5199         memset(&ps->reserved, 0, sizeof(ps->reserved));
5200         return 0;
5201 }
5202
5203 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5204 {
5205         int start = 0;
5206         int i;
5207         u32 prev_legacy, cur_legacy;
5208         struct kvm_pit *pit = kvm->arch.vpit;
5209
5210         mutex_lock(&pit->pit_state.lock);
5211         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
5212         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
5213         if (!prev_legacy && cur_legacy)
5214                 start = 1;
5215         memcpy(&pit->pit_state.channels, &ps->channels,
5216                sizeof(pit->pit_state.channels));
5217         pit->pit_state.flags = ps->flags;
5218         for (i = 0; i < 3; i++)
5219                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
5220                                    start && i == 0);
5221         mutex_unlock(&pit->pit_state.lock);
5222         return 0;
5223 }
5224
5225 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
5226                                  struct kvm_reinject_control *control)
5227 {
5228         struct kvm_pit *pit = kvm->arch.vpit;
5229
5230         /* pit->pit_state.lock was overloaded to prevent userspace from getting
5231          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5232          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
5233          */
5234         mutex_lock(&pit->pit_state.lock);
5235         kvm_pit_set_reinject(pit, control->pit_reinject);
5236         mutex_unlock(&pit->pit_state.lock);
5237
5238         return 0;
5239 }
5240
5241 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
5242 {
5243
5244         /*
5245          * Flush all CPUs' dirty log buffers to the  dirty_bitmap.  Called
5246          * before reporting dirty_bitmap to userspace.  KVM flushes the buffers
5247          * on all VM-Exits, thus we only need to kick running vCPUs to force a
5248          * VM-Exit.
5249          */
5250         struct kvm_vcpu *vcpu;
5251         int i;
5252
5253         kvm_for_each_vcpu(i, vcpu, kvm)
5254                 kvm_vcpu_kick(vcpu);
5255 }
5256
5257 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
5258                         bool line_status)
5259 {
5260         if (!irqchip_in_kernel(kvm))
5261                 return -ENXIO;
5262
5263         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
5264                                         irq_event->irq, irq_event->level,
5265                                         line_status);
5266         return 0;
5267 }
5268
5269 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
5270                             struct kvm_enable_cap *cap)
5271 {
5272         int r;
5273
5274         if (cap->flags)
5275                 return -EINVAL;
5276
5277         switch (cap->cap) {
5278         case KVM_CAP_DISABLE_QUIRKS:
5279                 kvm->arch.disabled_quirks = cap->args[0];
5280                 r = 0;
5281                 break;
5282         case KVM_CAP_SPLIT_IRQCHIP: {
5283                 mutex_lock(&kvm->lock);
5284                 r = -EINVAL;
5285                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
5286                         goto split_irqchip_unlock;
5287                 r = -EEXIST;
5288                 if (irqchip_in_kernel(kvm))
5289                         goto split_irqchip_unlock;
5290                 if (kvm->created_vcpus)
5291                         goto split_irqchip_unlock;
5292                 r = kvm_setup_empty_irq_routing(kvm);
5293                 if (r)
5294                         goto split_irqchip_unlock;
5295                 /* Pairs with irqchip_in_kernel. */
5296                 smp_wmb();
5297                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
5298                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
5299                 r = 0;
5300 split_irqchip_unlock:
5301                 mutex_unlock(&kvm->lock);
5302                 break;
5303         }
5304         case KVM_CAP_X2APIC_API:
5305                 r = -EINVAL;
5306                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
5307                         break;
5308
5309                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
5310                         kvm->arch.x2apic_format = true;
5311                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
5312                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
5313
5314                 r = 0;
5315                 break;
5316         case KVM_CAP_X86_DISABLE_EXITS:
5317                 r = -EINVAL;
5318                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
5319                         break;
5320
5321                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
5322                         kvm_can_mwait_in_guest())
5323                         kvm->arch.mwait_in_guest = true;
5324                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
5325                         kvm->arch.hlt_in_guest = true;
5326                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
5327                         kvm->arch.pause_in_guest = true;
5328                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
5329                         kvm->arch.cstate_in_guest = true;
5330                 r = 0;
5331                 break;
5332         case KVM_CAP_MSR_PLATFORM_INFO:
5333                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
5334                 r = 0;
5335                 break;
5336         case KVM_CAP_EXCEPTION_PAYLOAD:
5337                 kvm->arch.exception_payload_enabled = cap->args[0];
5338                 r = 0;
5339                 break;
5340         case KVM_CAP_X86_USER_SPACE_MSR:
5341                 kvm->arch.user_space_msr_mask = cap->args[0];
5342                 r = 0;
5343                 break;
5344         case KVM_CAP_X86_BUS_LOCK_EXIT:
5345                 r = -EINVAL;
5346                 if (cap->args[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE)
5347                         break;
5348
5349                 if ((cap->args[0] & KVM_BUS_LOCK_DETECTION_OFF) &&
5350                     (cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT))
5351                         break;
5352
5353                 if (kvm_has_bus_lock_exit &&
5354                     cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT)
5355                         kvm->arch.bus_lock_detection_enabled = true;
5356                 r = 0;
5357                 break;
5358         default:
5359                 r = -EINVAL;
5360                 break;
5361         }
5362         return r;
5363 }
5364
5365 static struct kvm_x86_msr_filter *kvm_alloc_msr_filter(bool default_allow)
5366 {
5367         struct kvm_x86_msr_filter *msr_filter;
5368
5369         msr_filter = kzalloc(sizeof(*msr_filter), GFP_KERNEL_ACCOUNT);
5370         if (!msr_filter)
5371                 return NULL;
5372
5373         msr_filter->default_allow = default_allow;
5374         return msr_filter;
5375 }
5376
5377 static void kvm_free_msr_filter(struct kvm_x86_msr_filter *msr_filter)
5378 {
5379         u32 i;
5380
5381         if (!msr_filter)
5382                 return;
5383
5384         for (i = 0; i < msr_filter->count; i++)
5385                 kfree(msr_filter->ranges[i].bitmap);
5386
5387         kfree(msr_filter);
5388 }
5389
5390 static int kvm_add_msr_filter(struct kvm_x86_msr_filter *msr_filter,
5391                               struct kvm_msr_filter_range *user_range)
5392 {
5393         struct msr_bitmap_range range;
5394         unsigned long *bitmap = NULL;
5395         size_t bitmap_size;
5396         int r;
5397
5398         if (!user_range->nmsrs)
5399                 return 0;
5400
5401         bitmap_size = BITS_TO_LONGS(user_range->nmsrs) * sizeof(long);
5402         if (!bitmap_size || bitmap_size > KVM_MSR_FILTER_MAX_BITMAP_SIZE)
5403                 return -EINVAL;
5404
5405         bitmap = memdup_user((__user u8*)user_range->bitmap, bitmap_size);
5406         if (IS_ERR(bitmap))
5407                 return PTR_ERR(bitmap);
5408
5409         range = (struct msr_bitmap_range) {
5410                 .flags = user_range->flags,
5411                 .base = user_range->base,
5412                 .nmsrs = user_range->nmsrs,
5413                 .bitmap = bitmap,
5414         };
5415
5416         if (range.flags & ~(KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE)) {
5417                 r = -EINVAL;
5418                 goto err;
5419         }
5420
5421         if (!range.flags) {
5422                 r = -EINVAL;
5423                 goto err;
5424         }
5425
5426         /* Everything ok, add this range identifier. */
5427         msr_filter->ranges[msr_filter->count] = range;
5428         msr_filter->count++;
5429
5430         return 0;
5431 err:
5432         kfree(bitmap);
5433         return r;
5434 }
5435
5436 static int kvm_vm_ioctl_set_msr_filter(struct kvm *kvm, void __user *argp)
5437 {
5438         struct kvm_msr_filter __user *user_msr_filter = argp;
5439         struct kvm_x86_msr_filter *new_filter, *old_filter;
5440         struct kvm_msr_filter filter;
5441         bool default_allow;
5442         bool empty = true;
5443         int r = 0;
5444         u32 i;
5445
5446         if (copy_from_user(&filter, user_msr_filter, sizeof(filter)))
5447                 return -EFAULT;
5448
5449         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++)
5450                 empty &= !filter.ranges[i].nmsrs;
5451
5452         default_allow = !(filter.flags & KVM_MSR_FILTER_DEFAULT_DENY);
5453         if (empty && !default_allow)
5454                 return -EINVAL;
5455
5456         new_filter = kvm_alloc_msr_filter(default_allow);
5457         if (!new_filter)
5458                 return -ENOMEM;
5459
5460         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++) {
5461                 r = kvm_add_msr_filter(new_filter, &filter.ranges[i]);
5462                 if (r) {
5463                         kvm_free_msr_filter(new_filter);
5464                         return r;
5465                 }
5466         }
5467
5468         mutex_lock(&kvm->lock);
5469
5470         /* The per-VM filter is protected by kvm->lock... */
5471         old_filter = srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1);
5472
5473         rcu_assign_pointer(kvm->arch.msr_filter, new_filter);
5474         synchronize_srcu(&kvm->srcu);
5475
5476         kvm_free_msr_filter(old_filter);
5477
5478         kvm_make_all_cpus_request(kvm, KVM_REQ_MSR_FILTER_CHANGED);
5479         mutex_unlock(&kvm->lock);
5480
5481         return 0;
5482 }
5483
5484 long kvm_arch_vm_ioctl(struct file *filp,
5485                        unsigned int ioctl, unsigned long arg)
5486 {
5487         struct kvm *kvm = filp->private_data;
5488         void __user *argp = (void __user *)arg;
5489         int r = -ENOTTY;
5490         /*
5491          * This union makes it completely explicit to gcc-3.x
5492          * that these two variables' stack usage should be
5493          * combined, not added together.
5494          */
5495         union {
5496                 struct kvm_pit_state ps;
5497                 struct kvm_pit_state2 ps2;
5498                 struct kvm_pit_config pit_config;
5499         } u;
5500
5501         switch (ioctl) {
5502         case KVM_SET_TSS_ADDR:
5503                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
5504                 break;
5505         case KVM_SET_IDENTITY_MAP_ADDR: {
5506                 u64 ident_addr;
5507
5508                 mutex_lock(&kvm->lock);
5509                 r = -EINVAL;
5510                 if (kvm->created_vcpus)
5511                         goto set_identity_unlock;
5512                 r = -EFAULT;
5513                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
5514                         goto set_identity_unlock;
5515                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
5516 set_identity_unlock:
5517                 mutex_unlock(&kvm->lock);
5518                 break;
5519         }
5520         case KVM_SET_NR_MMU_PAGES:
5521                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
5522                 break;
5523         case KVM_GET_NR_MMU_PAGES:
5524                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
5525                 break;
5526         case KVM_CREATE_IRQCHIP: {
5527                 mutex_lock(&kvm->lock);
5528
5529                 r = -EEXIST;
5530                 if (irqchip_in_kernel(kvm))
5531                         goto create_irqchip_unlock;
5532
5533                 r = -EINVAL;
5534                 if (kvm->created_vcpus)
5535                         goto create_irqchip_unlock;
5536
5537                 r = kvm_pic_init(kvm);
5538                 if (r)
5539                         goto create_irqchip_unlock;
5540
5541                 r = kvm_ioapic_init(kvm);
5542                 if (r) {
5543                         kvm_pic_destroy(kvm);
5544                         goto create_irqchip_unlock;
5545                 }
5546
5547                 r = kvm_setup_default_irq_routing(kvm);
5548                 if (r) {
5549                         kvm_ioapic_destroy(kvm);
5550                         kvm_pic_destroy(kvm);
5551                         goto create_irqchip_unlock;
5552                 }
5553                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
5554                 smp_wmb();
5555                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
5556         create_irqchip_unlock:
5557                 mutex_unlock(&kvm->lock);
5558                 break;
5559         }
5560         case KVM_CREATE_PIT:
5561                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
5562                 goto create_pit;
5563         case KVM_CREATE_PIT2:
5564                 r = -EFAULT;
5565                 if (copy_from_user(&u.pit_config, argp,
5566                                    sizeof(struct kvm_pit_config)))
5567                         goto out;
5568         create_pit:
5569                 mutex_lock(&kvm->lock);
5570                 r = -EEXIST;
5571                 if (kvm->arch.vpit)
5572                         goto create_pit_unlock;
5573                 r = -ENOMEM;
5574                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
5575                 if (kvm->arch.vpit)
5576                         r = 0;
5577         create_pit_unlock:
5578                 mutex_unlock(&kvm->lock);
5579                 break;
5580         case KVM_GET_IRQCHIP: {
5581                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5582                 struct kvm_irqchip *chip;
5583
5584                 chip = memdup_user(argp, sizeof(*chip));
5585                 if (IS_ERR(chip)) {
5586                         r = PTR_ERR(chip);
5587                         goto out;
5588                 }
5589
5590                 r = -ENXIO;
5591                 if (!irqchip_kernel(kvm))
5592                         goto get_irqchip_out;
5593                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
5594                 if (r)
5595                         goto get_irqchip_out;
5596                 r = -EFAULT;
5597                 if (copy_to_user(argp, chip, sizeof(*chip)))
5598                         goto get_irqchip_out;
5599                 r = 0;
5600         get_irqchip_out:
5601                 kfree(chip);
5602                 break;
5603         }
5604         case KVM_SET_IRQCHIP: {
5605                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5606                 struct kvm_irqchip *chip;
5607
5608                 chip = memdup_user(argp, sizeof(*chip));
5609                 if (IS_ERR(chip)) {
5610                         r = PTR_ERR(chip);
5611                         goto out;
5612                 }
5613
5614                 r = -ENXIO;
5615                 if (!irqchip_kernel(kvm))
5616                         goto set_irqchip_out;
5617                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
5618         set_irqchip_out:
5619                 kfree(chip);
5620                 break;
5621         }
5622         case KVM_GET_PIT: {
5623                 r = -EFAULT;
5624                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
5625                         goto out;
5626                 r = -ENXIO;
5627                 if (!kvm->arch.vpit)
5628                         goto out;
5629                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
5630                 if (r)
5631                         goto out;
5632                 r = -EFAULT;
5633                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
5634                         goto out;
5635                 r = 0;
5636                 break;
5637         }
5638         case KVM_SET_PIT: {
5639                 r = -EFAULT;
5640                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
5641                         goto out;
5642                 mutex_lock(&kvm->lock);
5643                 r = -ENXIO;
5644                 if (!kvm->arch.vpit)
5645                         goto set_pit_out;
5646                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
5647 set_pit_out:
5648                 mutex_unlock(&kvm->lock);
5649                 break;
5650         }
5651         case KVM_GET_PIT2: {
5652                 r = -ENXIO;
5653                 if (!kvm->arch.vpit)
5654                         goto out;
5655                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
5656                 if (r)
5657                         goto out;
5658                 r = -EFAULT;
5659                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
5660                         goto out;
5661                 r = 0;
5662                 break;
5663         }
5664         case KVM_SET_PIT2: {
5665                 r = -EFAULT;
5666                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
5667                         goto out;
5668                 mutex_lock(&kvm->lock);
5669                 r = -ENXIO;
5670                 if (!kvm->arch.vpit)
5671                         goto set_pit2_out;
5672                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
5673 set_pit2_out:
5674                 mutex_unlock(&kvm->lock);
5675                 break;
5676         }
5677         case KVM_REINJECT_CONTROL: {
5678                 struct kvm_reinject_control control;
5679                 r =  -EFAULT;
5680                 if (copy_from_user(&control, argp, sizeof(control)))
5681                         goto out;
5682                 r = -ENXIO;
5683                 if (!kvm->arch.vpit)
5684                         goto out;
5685                 r = kvm_vm_ioctl_reinject(kvm, &control);
5686                 break;
5687         }
5688         case KVM_SET_BOOT_CPU_ID:
5689                 r = 0;
5690                 mutex_lock(&kvm->lock);
5691                 if (kvm->created_vcpus)
5692                         r = -EBUSY;
5693                 else
5694                         kvm->arch.bsp_vcpu_id = arg;
5695                 mutex_unlock(&kvm->lock);
5696                 break;
5697 #ifdef CONFIG_KVM_XEN
5698         case KVM_XEN_HVM_CONFIG: {
5699                 struct kvm_xen_hvm_config xhc;
5700                 r = -EFAULT;
5701                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
5702                         goto out;
5703                 r = kvm_xen_hvm_config(kvm, &xhc);
5704                 break;
5705         }
5706         case KVM_XEN_HVM_GET_ATTR: {
5707                 struct kvm_xen_hvm_attr xha;
5708
5709                 r = -EFAULT;
5710                 if (copy_from_user(&xha, argp, sizeof(xha)))
5711                         goto out;
5712                 r = kvm_xen_hvm_get_attr(kvm, &xha);
5713                 if (!r && copy_to_user(argp, &xha, sizeof(xha)))
5714                         r = -EFAULT;
5715                 break;
5716         }
5717         case KVM_XEN_HVM_SET_ATTR: {
5718                 struct kvm_xen_hvm_attr xha;
5719
5720                 r = -EFAULT;
5721                 if (copy_from_user(&xha, argp, sizeof(xha)))
5722                         goto out;
5723                 r = kvm_xen_hvm_set_attr(kvm, &xha);
5724                 break;
5725         }
5726 #endif
5727         case KVM_SET_CLOCK: {
5728                 struct kvm_clock_data user_ns;
5729                 u64 now_ns;
5730
5731                 r = -EFAULT;
5732                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
5733                         goto out;
5734
5735                 r = -EINVAL;
5736                 if (user_ns.flags)
5737                         goto out;
5738
5739                 r = 0;
5740                 /*
5741                  * TODO: userspace has to take care of races with VCPU_RUN, so
5742                  * kvm_gen_update_masterclock() can be cut down to locked
5743                  * pvclock_update_vm_gtod_copy().
5744                  */
5745                 kvm_gen_update_masterclock(kvm);
5746                 now_ns = get_kvmclock_ns(kvm);
5747                 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
5748                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
5749                 break;
5750         }
5751         case KVM_GET_CLOCK: {
5752                 struct kvm_clock_data user_ns;
5753                 u64 now_ns;
5754
5755                 now_ns = get_kvmclock_ns(kvm);
5756                 user_ns.clock = now_ns;
5757                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
5758                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
5759
5760                 r = -EFAULT;
5761                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
5762                         goto out;
5763                 r = 0;
5764                 break;
5765         }
5766         case KVM_MEMORY_ENCRYPT_OP: {
5767                 r = -ENOTTY;
5768                 if (kvm_x86_ops.mem_enc_op)
5769                         r = static_call(kvm_x86_mem_enc_op)(kvm, argp);
5770                 break;
5771         }
5772         case KVM_MEMORY_ENCRYPT_REG_REGION: {
5773                 struct kvm_enc_region region;
5774
5775                 r = -EFAULT;
5776                 if (copy_from_user(&region, argp, sizeof(region)))
5777                         goto out;
5778
5779                 r = -ENOTTY;
5780                 if (kvm_x86_ops.mem_enc_reg_region)
5781                         r = static_call(kvm_x86_mem_enc_reg_region)(kvm, &region);
5782                 break;
5783         }
5784         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
5785                 struct kvm_enc_region region;
5786
5787                 r = -EFAULT;
5788                 if (copy_from_user(&region, argp, sizeof(region)))
5789                         goto out;
5790
5791                 r = -ENOTTY;
5792                 if (kvm_x86_ops.mem_enc_unreg_region)
5793                         r = static_call(kvm_x86_mem_enc_unreg_region)(kvm, &region);
5794                 break;
5795         }
5796         case KVM_HYPERV_EVENTFD: {
5797                 struct kvm_hyperv_eventfd hvevfd;
5798
5799                 r = -EFAULT;
5800                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
5801                         goto out;
5802                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
5803                 break;
5804         }
5805         case KVM_SET_PMU_EVENT_FILTER:
5806                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
5807                 break;
5808         case KVM_X86_SET_MSR_FILTER:
5809                 r = kvm_vm_ioctl_set_msr_filter(kvm, argp);
5810                 break;
5811         default:
5812                 r = -ENOTTY;
5813         }
5814 out:
5815         return r;
5816 }
5817
5818 static void kvm_init_msr_list(void)
5819 {
5820         struct x86_pmu_capability x86_pmu;
5821         u32 dummy[2];
5822         unsigned i;
5823
5824         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
5825                          "Please update the fixed PMCs in msrs_to_saved_all[]");
5826
5827         perf_get_x86_pmu_capability(&x86_pmu);
5828
5829         num_msrs_to_save = 0;
5830         num_emulated_msrs = 0;
5831         num_msr_based_features = 0;
5832
5833         for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
5834                 if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
5835                         continue;
5836
5837                 /*
5838                  * Even MSRs that are valid in the host may not be exposed
5839                  * to the guests in some cases.
5840                  */
5841                 switch (msrs_to_save_all[i]) {
5842                 case MSR_IA32_BNDCFGS:
5843                         if (!kvm_mpx_supported())
5844                                 continue;
5845                         break;
5846                 case MSR_TSC_AUX:
5847                         if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP))
5848                                 continue;
5849                         break;
5850                 case MSR_IA32_UMWAIT_CONTROL:
5851                         if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG))
5852                                 continue;
5853                         break;
5854                 case MSR_IA32_RTIT_CTL:
5855                 case MSR_IA32_RTIT_STATUS:
5856                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT))
5857                                 continue;
5858                         break;
5859                 case MSR_IA32_RTIT_CR3_MATCH:
5860                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
5861                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
5862                                 continue;
5863                         break;
5864                 case MSR_IA32_RTIT_OUTPUT_BASE:
5865                 case MSR_IA32_RTIT_OUTPUT_MASK:
5866                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
5867                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
5868                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
5869                                 continue;
5870                         break;
5871                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
5872                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
5873                                 msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
5874                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
5875                                 continue;
5876                         break;
5877                 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
5878                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
5879                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
5880                                 continue;
5881                         break;
5882                 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
5883                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
5884                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
5885                                 continue;
5886                         break;
5887                 default:
5888                         break;
5889                 }
5890
5891                 msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
5892         }
5893
5894         for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
5895                 if (!static_call(kvm_x86_has_emulated_msr)(NULL, emulated_msrs_all[i]))
5896                         continue;
5897
5898                 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
5899         }
5900
5901         for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
5902                 struct kvm_msr_entry msr;
5903
5904                 msr.index = msr_based_features_all[i];
5905                 if (kvm_get_msr_feature(&msr))
5906                         continue;
5907
5908                 msr_based_features[num_msr_based_features++] = msr_based_features_all[i];
5909         }
5910 }
5911
5912 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
5913                            const void *v)
5914 {
5915         int handled = 0;
5916         int n;
5917
5918         do {
5919                 n = min(len, 8);
5920                 if (!(lapic_in_kernel(vcpu) &&
5921                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
5922                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
5923                         break;
5924                 handled += n;
5925                 addr += n;
5926                 len -= n;
5927                 v += n;
5928         } while (len);
5929
5930         return handled;
5931 }
5932
5933 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
5934 {
5935         int handled = 0;
5936         int n;
5937
5938         do {
5939                 n = min(len, 8);
5940                 if (!(lapic_in_kernel(vcpu) &&
5941                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
5942                                          addr, n, v))
5943                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
5944                         break;
5945                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
5946                 handled += n;
5947                 addr += n;
5948                 len -= n;
5949                 v += n;
5950         } while (len);
5951
5952         return handled;
5953 }
5954
5955 static void kvm_set_segment(struct kvm_vcpu *vcpu,
5956                         struct kvm_segment *var, int seg)
5957 {
5958         static_call(kvm_x86_set_segment)(vcpu, var, seg);
5959 }
5960
5961 void kvm_get_segment(struct kvm_vcpu *vcpu,
5962                      struct kvm_segment *var, int seg)
5963 {
5964         static_call(kvm_x86_get_segment)(vcpu, var, seg);
5965 }
5966
5967 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
5968                            struct x86_exception *exception)
5969 {
5970         gpa_t t_gpa;
5971
5972         BUG_ON(!mmu_is_nested(vcpu));
5973
5974         /* NPT walks are always user-walks */
5975         access |= PFERR_USER_MASK;
5976         t_gpa  = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
5977
5978         return t_gpa;
5979 }
5980
5981 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
5982                               struct x86_exception *exception)
5983 {
5984         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
5985         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5986 }
5987
5988  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
5989                                 struct x86_exception *exception)
5990 {
5991         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
5992         access |= PFERR_FETCH_MASK;
5993         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5994 }
5995
5996 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
5997                                struct x86_exception *exception)
5998 {
5999         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6000         access |= PFERR_WRITE_MASK;
6001         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6002 }
6003
6004 /* uses this to access any guest's mapped memory without checking CPL */
6005 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
6006                                 struct x86_exception *exception)
6007 {
6008         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
6009 }
6010
6011 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6012                                       struct kvm_vcpu *vcpu, u32 access,
6013                                       struct x86_exception *exception)
6014 {
6015         void *data = val;
6016         int r = X86EMUL_CONTINUE;
6017
6018         while (bytes) {
6019                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
6020                                                             exception);
6021                 unsigned offset = addr & (PAGE_SIZE-1);
6022                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
6023                 int ret;
6024
6025                 if (gpa == UNMAPPED_GVA)
6026                         return X86EMUL_PROPAGATE_FAULT;
6027                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
6028                                                offset, toread);
6029                 if (ret < 0) {
6030                         r = X86EMUL_IO_NEEDED;
6031                         goto out;
6032                 }
6033
6034                 bytes -= toread;
6035                 data += toread;
6036                 addr += toread;
6037         }
6038 out:
6039         return r;
6040 }
6041
6042 /* used for instruction fetching */
6043 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
6044                                 gva_t addr, void *val, unsigned int bytes,
6045                                 struct x86_exception *exception)
6046 {
6047         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6048         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6049         unsigned offset;
6050         int ret;
6051
6052         /* Inline kvm_read_guest_virt_helper for speed.  */
6053         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
6054                                                     exception);
6055         if (unlikely(gpa == UNMAPPED_GVA))
6056                 return X86EMUL_PROPAGATE_FAULT;
6057
6058         offset = addr & (PAGE_SIZE-1);
6059         if (WARN_ON(offset + bytes > PAGE_SIZE))
6060                 bytes = (unsigned)PAGE_SIZE - offset;
6061         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
6062                                        offset, bytes);
6063         if (unlikely(ret < 0))
6064                 return X86EMUL_IO_NEEDED;
6065
6066         return X86EMUL_CONTINUE;
6067 }
6068
6069 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
6070                                gva_t addr, void *val, unsigned int bytes,
6071                                struct x86_exception *exception)
6072 {
6073         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6074
6075         /*
6076          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
6077          * is returned, but our callers are not ready for that and they blindly
6078          * call kvm_inject_page_fault.  Ensure that they at least do not leak
6079          * uninitialized kernel stack memory into cr2 and error code.
6080          */
6081         memset(exception, 0, sizeof(*exception));
6082         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
6083                                           exception);
6084 }
6085 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
6086
6087 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
6088                              gva_t addr, void *val, unsigned int bytes,
6089                              struct x86_exception *exception, bool system)
6090 {
6091         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6092         u32 access = 0;
6093
6094         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6095                 access |= PFERR_USER_MASK;
6096
6097         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
6098 }
6099
6100 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
6101                 unsigned long addr, void *val, unsigned int bytes)
6102 {
6103         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6104         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
6105
6106         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
6107 }
6108
6109 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6110                                       struct kvm_vcpu *vcpu, u32 access,
6111                                       struct x86_exception *exception)
6112 {
6113         void *data = val;
6114         int r = X86EMUL_CONTINUE;
6115
6116         while (bytes) {
6117                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
6118                                                              access,
6119                                                              exception);
6120                 unsigned offset = addr & (PAGE_SIZE-1);
6121                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
6122                 int ret;
6123
6124                 if (gpa == UNMAPPED_GVA)
6125                         return X86EMUL_PROPAGATE_FAULT;
6126                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
6127                 if (ret < 0) {
6128                         r = X86EMUL_IO_NEEDED;
6129                         goto out;
6130                 }
6131
6132                 bytes -= towrite;
6133                 data += towrite;
6134                 addr += towrite;
6135         }
6136 out:
6137         return r;
6138 }
6139
6140 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
6141                               unsigned int bytes, struct x86_exception *exception,
6142                               bool system)
6143 {
6144         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6145         u32 access = PFERR_WRITE_MASK;
6146
6147         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6148                 access |= PFERR_USER_MASK;
6149
6150         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6151                                            access, exception);
6152 }
6153
6154 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
6155                                 unsigned int bytes, struct x86_exception *exception)
6156 {
6157         /* kvm_write_guest_virt_system can pull in tons of pages. */
6158         vcpu->arch.l1tf_flush_l1d = true;
6159
6160         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6161                                            PFERR_WRITE_MASK, exception);
6162 }
6163 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
6164
6165 int handle_ud(struct kvm_vcpu *vcpu)
6166 {
6167         static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
6168         int emul_type = EMULTYPE_TRAP_UD;
6169         char sig[5]; /* ud2; .ascii "kvm" */
6170         struct x86_exception e;
6171
6172         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, NULL, 0)))
6173                 return 1;
6174
6175         if (force_emulation_prefix &&
6176             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
6177                                 sig, sizeof(sig), &e) == 0 &&
6178             memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
6179                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
6180                 emul_type = EMULTYPE_TRAP_UD_FORCED;
6181         }
6182
6183         return kvm_emulate_instruction(vcpu, emul_type);
6184 }
6185 EXPORT_SYMBOL_GPL(handle_ud);
6186
6187 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6188                             gpa_t gpa, bool write)
6189 {
6190         /* For APIC access vmexit */
6191         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6192                 return 1;
6193
6194         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
6195                 trace_vcpu_match_mmio(gva, gpa, write, true);
6196                 return 1;
6197         }
6198
6199         return 0;
6200 }
6201
6202 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6203                                 gpa_t *gpa, struct x86_exception *exception,
6204                                 bool write)
6205 {
6206         u32 access = ((static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0)
6207                 | (write ? PFERR_WRITE_MASK : 0);
6208
6209         /*
6210          * currently PKRU is only applied to ept enabled guest so
6211          * there is no pkey in EPT page table for L1 guest or EPT
6212          * shadow page table for L2 guest.
6213          */
6214         if (vcpu_match_mmio_gva(vcpu, gva)
6215             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
6216                                  vcpu->arch.mmio_access, 0, access)) {
6217                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
6218                                         (gva & (PAGE_SIZE - 1));
6219                 trace_vcpu_match_mmio(gva, *gpa, write, false);
6220                 return 1;
6221         }
6222
6223         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6224
6225         if (*gpa == UNMAPPED_GVA)
6226                 return -1;
6227
6228         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
6229 }
6230
6231 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
6232                         const void *val, int bytes)
6233 {
6234         int ret;
6235
6236         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
6237         if (ret < 0)
6238                 return 0;
6239         kvm_page_track_write(vcpu, gpa, val, bytes);
6240         return 1;
6241 }
6242
6243 struct read_write_emulator_ops {
6244         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
6245                                   int bytes);
6246         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
6247                                   void *val, int bytes);
6248         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6249                                int bytes, void *val);
6250         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6251                                     void *val, int bytes);
6252         bool write;
6253 };
6254
6255 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
6256 {
6257         if (vcpu->mmio_read_completed) {
6258                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
6259                                vcpu->mmio_fragments[0].gpa, val);
6260                 vcpu->mmio_read_completed = 0;
6261                 return 1;
6262         }
6263
6264         return 0;
6265 }
6266
6267 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6268                         void *val, int bytes)
6269 {
6270         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
6271 }
6272
6273 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6274                          void *val, int bytes)
6275 {
6276         return emulator_write_phys(vcpu, gpa, val, bytes);
6277 }
6278
6279 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
6280 {
6281         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
6282         return vcpu_mmio_write(vcpu, gpa, bytes, val);
6283 }
6284
6285 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6286                           void *val, int bytes)
6287 {
6288         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
6289         return X86EMUL_IO_NEEDED;
6290 }
6291
6292 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6293                            void *val, int bytes)
6294 {
6295         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
6296
6297         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
6298         return X86EMUL_CONTINUE;
6299 }
6300
6301 static const struct read_write_emulator_ops read_emultor = {
6302         .read_write_prepare = read_prepare,
6303         .read_write_emulate = read_emulate,
6304         .read_write_mmio = vcpu_mmio_read,
6305         .read_write_exit_mmio = read_exit_mmio,
6306 };
6307
6308 static const struct read_write_emulator_ops write_emultor = {
6309         .read_write_emulate = write_emulate,
6310         .read_write_mmio = write_mmio,
6311         .read_write_exit_mmio = write_exit_mmio,
6312         .write = true,
6313 };
6314
6315 static int emulator_read_write_onepage(unsigned long addr, void *val,
6316                                        unsigned int bytes,
6317                                        struct x86_exception *exception,
6318                                        struct kvm_vcpu *vcpu,
6319                                        const struct read_write_emulator_ops *ops)
6320 {
6321         gpa_t gpa;
6322         int handled, ret;
6323         bool write = ops->write;
6324         struct kvm_mmio_fragment *frag;
6325         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6326
6327         /*
6328          * If the exit was due to a NPF we may already have a GPA.
6329          * If the GPA is present, use it to avoid the GVA to GPA table walk.
6330          * Note, this cannot be used on string operations since string
6331          * operation using rep will only have the initial GPA from the NPF
6332          * occurred.
6333          */
6334         if (ctxt->gpa_available && emulator_can_use_gpa(ctxt) &&
6335             (addr & ~PAGE_MASK) == (ctxt->gpa_val & ~PAGE_MASK)) {
6336                 gpa = ctxt->gpa_val;
6337                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
6338         } else {
6339                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
6340                 if (ret < 0)
6341                         return X86EMUL_PROPAGATE_FAULT;
6342         }
6343
6344         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
6345                 return X86EMUL_CONTINUE;
6346
6347         /*
6348          * Is this MMIO handled locally?
6349          */
6350         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
6351         if (handled == bytes)
6352                 return X86EMUL_CONTINUE;
6353
6354         gpa += handled;
6355         bytes -= handled;
6356         val += handled;
6357
6358         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
6359         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
6360         frag->gpa = gpa;
6361         frag->data = val;
6362         frag->len = bytes;
6363         return X86EMUL_CONTINUE;
6364 }
6365
6366 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
6367                         unsigned long addr,
6368                         void *val, unsigned int bytes,
6369                         struct x86_exception *exception,
6370                         const struct read_write_emulator_ops *ops)
6371 {
6372         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6373         gpa_t gpa;
6374         int rc;
6375
6376         if (ops->read_write_prepare &&
6377                   ops->read_write_prepare(vcpu, val, bytes))
6378                 return X86EMUL_CONTINUE;
6379
6380         vcpu->mmio_nr_fragments = 0;
6381
6382         /* Crossing a page boundary? */
6383         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
6384                 int now;
6385
6386                 now = -addr & ~PAGE_MASK;
6387                 rc = emulator_read_write_onepage(addr, val, now, exception,
6388                                                  vcpu, ops);
6389
6390                 if (rc != X86EMUL_CONTINUE)
6391                         return rc;
6392                 addr += now;
6393                 if (ctxt->mode != X86EMUL_MODE_PROT64)
6394                         addr = (u32)addr;
6395                 val += now;
6396                 bytes -= now;
6397         }
6398
6399         rc = emulator_read_write_onepage(addr, val, bytes, exception,
6400                                          vcpu, ops);
6401         if (rc != X86EMUL_CONTINUE)
6402                 return rc;
6403
6404         if (!vcpu->mmio_nr_fragments)
6405                 return rc;
6406
6407         gpa = vcpu->mmio_fragments[0].gpa;
6408
6409         vcpu->mmio_needed = 1;
6410         vcpu->mmio_cur_fragment = 0;
6411
6412         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
6413         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
6414         vcpu->run->exit_reason = KVM_EXIT_MMIO;
6415         vcpu->run->mmio.phys_addr = gpa;
6416
6417         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
6418 }
6419
6420 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
6421                                   unsigned long addr,
6422                                   void *val,
6423                                   unsigned int bytes,
6424                                   struct x86_exception *exception)
6425 {
6426         return emulator_read_write(ctxt, addr, val, bytes,
6427                                    exception, &read_emultor);
6428 }
6429
6430 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
6431                             unsigned long addr,
6432                             const void *val,
6433                             unsigned int bytes,
6434                             struct x86_exception *exception)
6435 {
6436         return emulator_read_write(ctxt, addr, (void *)val, bytes,
6437                                    exception, &write_emultor);
6438 }
6439
6440 #define CMPXCHG_TYPE(t, ptr, old, new) \
6441         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
6442
6443 #ifdef CONFIG_X86_64
6444 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
6445 #else
6446 #  define CMPXCHG64(ptr, old, new) \
6447         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
6448 #endif
6449
6450 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
6451                                      unsigned long addr,
6452                                      const void *old,
6453                                      const void *new,
6454                                      unsigned int bytes,
6455                                      struct x86_exception *exception)
6456 {
6457         struct kvm_host_map map;
6458         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6459         u64 page_line_mask;
6460         gpa_t gpa;
6461         char *kaddr;
6462         bool exchanged;
6463
6464         /* guests cmpxchg8b have to be emulated atomically */
6465         if (bytes > 8 || (bytes & (bytes - 1)))
6466                 goto emul_write;
6467
6468         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
6469
6470         if (gpa == UNMAPPED_GVA ||
6471             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6472                 goto emul_write;
6473
6474         /*
6475          * Emulate the atomic as a straight write to avoid #AC if SLD is
6476          * enabled in the host and the access splits a cache line.
6477          */
6478         if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))
6479                 page_line_mask = ~(cache_line_size() - 1);
6480         else
6481                 page_line_mask = PAGE_MASK;
6482
6483         if (((gpa + bytes - 1) & page_line_mask) != (gpa & page_line_mask))
6484                 goto emul_write;
6485
6486         if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
6487                 goto emul_write;
6488
6489         kaddr = map.hva + offset_in_page(gpa);
6490
6491         switch (bytes) {
6492         case 1:
6493                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
6494                 break;
6495         case 2:
6496                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
6497                 break;
6498         case 4:
6499                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
6500                 break;
6501         case 8:
6502                 exchanged = CMPXCHG64(kaddr, old, new);
6503                 break;
6504         default:
6505                 BUG();
6506         }
6507
6508         kvm_vcpu_unmap(vcpu, &map, true);
6509
6510         if (!exchanged)
6511                 return X86EMUL_CMPXCHG_FAILED;
6512
6513         kvm_page_track_write(vcpu, gpa, new, bytes);
6514
6515         return X86EMUL_CONTINUE;
6516
6517 emul_write:
6518         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
6519
6520         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
6521 }
6522
6523 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
6524 {
6525         int r = 0, i;
6526
6527         for (i = 0; i < vcpu->arch.pio.count; i++) {
6528                 if (vcpu->arch.pio.in)
6529                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
6530                                             vcpu->arch.pio.size, pd);
6531                 else
6532                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
6533                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
6534                                              pd);
6535                 if (r)
6536                         break;
6537                 pd += vcpu->arch.pio.size;
6538         }
6539         return r;
6540 }
6541
6542 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
6543                                unsigned short port, void *val,
6544                                unsigned int count, bool in)
6545 {
6546         vcpu->arch.pio.port = port;
6547         vcpu->arch.pio.in = in;
6548         vcpu->arch.pio.count  = count;
6549         vcpu->arch.pio.size = size;
6550
6551         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
6552                 vcpu->arch.pio.count = 0;
6553                 return 1;
6554         }
6555
6556         vcpu->run->exit_reason = KVM_EXIT_IO;
6557         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
6558         vcpu->run->io.size = size;
6559         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
6560         vcpu->run->io.count = count;
6561         vcpu->run->io.port = port;
6562
6563         return 0;
6564 }
6565
6566 static int emulator_pio_in(struct kvm_vcpu *vcpu, int size,
6567                            unsigned short port, void *val, unsigned int count)
6568 {
6569         int ret;
6570
6571         if (vcpu->arch.pio.count)
6572                 goto data_avail;
6573
6574         memset(vcpu->arch.pio_data, 0, size * count);
6575
6576         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
6577         if (ret) {
6578 data_avail:
6579                 memcpy(val, vcpu->arch.pio_data, size * count);
6580                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
6581                 vcpu->arch.pio.count = 0;
6582                 return 1;
6583         }
6584
6585         return 0;
6586 }
6587
6588 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
6589                                     int size, unsigned short port, void *val,
6590                                     unsigned int count)
6591 {
6592         return emulator_pio_in(emul_to_vcpu(ctxt), size, port, val, count);
6593
6594 }
6595
6596 static int emulator_pio_out(struct kvm_vcpu *vcpu, int size,
6597                             unsigned short port, const void *val,
6598                             unsigned int count)
6599 {
6600         memcpy(vcpu->arch.pio_data, val, size * count);
6601         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
6602         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
6603 }
6604
6605 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
6606                                      int size, unsigned short port,
6607                                      const void *val, unsigned int count)
6608 {
6609         return emulator_pio_out(emul_to_vcpu(ctxt), size, port, val, count);
6610 }
6611
6612 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
6613 {
6614         return static_call(kvm_x86_get_segment_base)(vcpu, seg);
6615 }
6616
6617 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
6618 {
6619         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
6620 }
6621
6622 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
6623 {
6624         if (!need_emulate_wbinvd(vcpu))
6625                 return X86EMUL_CONTINUE;
6626
6627         if (static_call(kvm_x86_has_wbinvd_exit)()) {
6628                 int cpu = get_cpu();
6629
6630                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
6631                 on_each_cpu_mask(vcpu->arch.wbinvd_dirty_mask,
6632                                 wbinvd_ipi, NULL, 1);
6633                 put_cpu();
6634                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
6635         } else
6636                 wbinvd();
6637         return X86EMUL_CONTINUE;
6638 }
6639
6640 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
6641 {
6642         kvm_emulate_wbinvd_noskip(vcpu);
6643         return kvm_skip_emulated_instruction(vcpu);
6644 }
6645 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
6646
6647
6648
6649 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
6650 {
6651         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
6652 }
6653
6654 static void emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
6655                             unsigned long *dest)
6656 {
6657         kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
6658 }
6659
6660 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
6661                            unsigned long value)
6662 {
6663
6664         return kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
6665 }
6666
6667 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
6668 {
6669         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
6670 }
6671
6672 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
6673 {
6674         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6675         unsigned long value;
6676
6677         switch (cr) {
6678         case 0:
6679                 value = kvm_read_cr0(vcpu);
6680                 break;
6681         case 2:
6682                 value = vcpu->arch.cr2;
6683                 break;
6684         case 3:
6685                 value = kvm_read_cr3(vcpu);
6686                 break;
6687         case 4:
6688                 value = kvm_read_cr4(vcpu);
6689                 break;
6690         case 8:
6691                 value = kvm_get_cr8(vcpu);
6692                 break;
6693         default:
6694                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
6695                 return 0;
6696         }
6697
6698         return value;
6699 }
6700
6701 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
6702 {
6703         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6704         int res = 0;
6705
6706         switch (cr) {
6707         case 0:
6708                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
6709                 break;
6710         case 2:
6711                 vcpu->arch.cr2 = val;
6712                 break;
6713         case 3:
6714                 res = kvm_set_cr3(vcpu, val);
6715                 break;
6716         case 4:
6717                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
6718                 break;
6719         case 8:
6720                 res = kvm_set_cr8(vcpu, val);
6721                 break;
6722         default:
6723                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
6724                 res = -1;
6725         }
6726
6727         return res;
6728 }
6729
6730 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
6731 {
6732         return static_call(kvm_x86_get_cpl)(emul_to_vcpu(ctxt));
6733 }
6734
6735 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6736 {
6737         static_call(kvm_x86_get_gdt)(emul_to_vcpu(ctxt), dt);
6738 }
6739
6740 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6741 {
6742         static_call(kvm_x86_get_idt)(emul_to_vcpu(ctxt), dt);
6743 }
6744
6745 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6746 {
6747         static_call(kvm_x86_set_gdt)(emul_to_vcpu(ctxt), dt);
6748 }
6749
6750 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6751 {
6752         static_call(kvm_x86_set_idt)(emul_to_vcpu(ctxt), dt);
6753 }
6754
6755 static unsigned long emulator_get_cached_segment_base(
6756         struct x86_emulate_ctxt *ctxt, int seg)
6757 {
6758         return get_segment_base(emul_to_vcpu(ctxt), seg);
6759 }
6760
6761 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
6762                                  struct desc_struct *desc, u32 *base3,
6763                                  int seg)
6764 {
6765         struct kvm_segment var;
6766
6767         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
6768         *selector = var.selector;
6769
6770         if (var.unusable) {
6771                 memset(desc, 0, sizeof(*desc));
6772                 if (base3)
6773                         *base3 = 0;
6774                 return false;
6775         }
6776
6777         if (var.g)
6778                 var.limit >>= 12;
6779         set_desc_limit(desc, var.limit);
6780         set_desc_base(desc, (unsigned long)var.base);
6781 #ifdef CONFIG_X86_64
6782         if (base3)
6783                 *base3 = var.base >> 32;
6784 #endif
6785         desc->type = var.type;
6786         desc->s = var.s;
6787         desc->dpl = var.dpl;
6788         desc->p = var.present;
6789         desc->avl = var.avl;
6790         desc->l = var.l;
6791         desc->d = var.db;
6792         desc->g = var.g;
6793
6794         return true;
6795 }
6796
6797 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
6798                                  struct desc_struct *desc, u32 base3,
6799                                  int seg)
6800 {
6801         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6802         struct kvm_segment var;
6803
6804         var.selector = selector;
6805         var.base = get_desc_base(desc);
6806 #ifdef CONFIG_X86_64
6807         var.base |= ((u64)base3) << 32;
6808 #endif
6809         var.limit = get_desc_limit(desc);
6810         if (desc->g)
6811                 var.limit = (var.limit << 12) | 0xfff;
6812         var.type = desc->type;
6813         var.dpl = desc->dpl;
6814         var.db = desc->d;
6815         var.s = desc->s;
6816         var.l = desc->l;
6817         var.g = desc->g;
6818         var.avl = desc->avl;
6819         var.present = desc->p;
6820         var.unusable = !var.present;
6821         var.padding = 0;
6822
6823         kvm_set_segment(vcpu, &var, seg);
6824         return;
6825 }
6826
6827 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
6828                             u32 msr_index, u64 *pdata)
6829 {
6830         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6831         int r;
6832
6833         r = kvm_get_msr(vcpu, msr_index, pdata);
6834
6835         if (r && kvm_get_msr_user_space(vcpu, msr_index, r)) {
6836                 /* Bounce to user space */
6837                 return X86EMUL_IO_NEEDED;
6838         }
6839
6840         return r;
6841 }
6842
6843 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
6844                             u32 msr_index, u64 data)
6845 {
6846         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6847         int r;
6848
6849         r = kvm_set_msr(vcpu, msr_index, data);
6850
6851         if (r && kvm_set_msr_user_space(vcpu, msr_index, data, r)) {
6852                 /* Bounce to user space */
6853                 return X86EMUL_IO_NEEDED;
6854         }
6855
6856         return r;
6857 }
6858
6859 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
6860 {
6861         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6862
6863         return vcpu->arch.smbase;
6864 }
6865
6866 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
6867 {
6868         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6869
6870         vcpu->arch.smbase = smbase;
6871 }
6872
6873 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
6874                               u32 pmc)
6875 {
6876         return kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc);
6877 }
6878
6879 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
6880                              u32 pmc, u64 *pdata)
6881 {
6882         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
6883 }
6884
6885 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
6886 {
6887         emul_to_vcpu(ctxt)->arch.halt_request = 1;
6888 }
6889
6890 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
6891                               struct x86_instruction_info *info,
6892                               enum x86_intercept_stage stage)
6893 {
6894         return static_call(kvm_x86_check_intercept)(emul_to_vcpu(ctxt), info, stage,
6895                                             &ctxt->exception);
6896 }
6897
6898 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
6899                               u32 *eax, u32 *ebx, u32 *ecx, u32 *edx,
6900                               bool exact_only)
6901 {
6902         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, exact_only);
6903 }
6904
6905 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
6906 {
6907         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
6908 }
6909
6910 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
6911 {
6912         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
6913 }
6914
6915 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
6916 {
6917         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
6918 }
6919
6920 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
6921 {
6922         return kvm_register_read(emul_to_vcpu(ctxt), reg);
6923 }
6924
6925 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
6926 {
6927         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
6928 }
6929
6930 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
6931 {
6932         static_call(kvm_x86_set_nmi_mask)(emul_to_vcpu(ctxt), masked);
6933 }
6934
6935 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
6936 {
6937         return emul_to_vcpu(ctxt)->arch.hflags;
6938 }
6939
6940 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
6941 {
6942         emul_to_vcpu(ctxt)->arch.hflags = emul_flags;
6943 }
6944
6945 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt,
6946                                   const char *smstate)
6947 {
6948         return static_call(kvm_x86_pre_leave_smm)(emul_to_vcpu(ctxt), smstate);
6949 }
6950
6951 static void emulator_post_leave_smm(struct x86_emulate_ctxt *ctxt)
6952 {
6953         kvm_smm_changed(emul_to_vcpu(ctxt));
6954 }
6955
6956 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
6957 {
6958         return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
6959 }
6960
6961 static const struct x86_emulate_ops emulate_ops = {
6962         .read_gpr            = emulator_read_gpr,
6963         .write_gpr           = emulator_write_gpr,
6964         .read_std            = emulator_read_std,
6965         .write_std           = emulator_write_std,
6966         .read_phys           = kvm_read_guest_phys_system,
6967         .fetch               = kvm_fetch_guest_virt,
6968         .read_emulated       = emulator_read_emulated,
6969         .write_emulated      = emulator_write_emulated,
6970         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
6971         .invlpg              = emulator_invlpg,
6972         .pio_in_emulated     = emulator_pio_in_emulated,
6973         .pio_out_emulated    = emulator_pio_out_emulated,
6974         .get_segment         = emulator_get_segment,
6975         .set_segment         = emulator_set_segment,
6976         .get_cached_segment_base = emulator_get_cached_segment_base,
6977         .get_gdt             = emulator_get_gdt,
6978         .get_idt             = emulator_get_idt,
6979         .set_gdt             = emulator_set_gdt,
6980         .set_idt             = emulator_set_idt,
6981         .get_cr              = emulator_get_cr,
6982         .set_cr              = emulator_set_cr,
6983         .cpl                 = emulator_get_cpl,
6984         .get_dr              = emulator_get_dr,
6985         .set_dr              = emulator_set_dr,
6986         .get_smbase          = emulator_get_smbase,
6987         .set_smbase          = emulator_set_smbase,
6988         .set_msr             = emulator_set_msr,
6989         .get_msr             = emulator_get_msr,
6990         .check_pmc           = emulator_check_pmc,
6991         .read_pmc            = emulator_read_pmc,
6992         .halt                = emulator_halt,
6993         .wbinvd              = emulator_wbinvd,
6994         .fix_hypercall       = emulator_fix_hypercall,
6995         .intercept           = emulator_intercept,
6996         .get_cpuid           = emulator_get_cpuid,
6997         .guest_has_long_mode = emulator_guest_has_long_mode,
6998         .guest_has_movbe     = emulator_guest_has_movbe,
6999         .guest_has_fxsr      = emulator_guest_has_fxsr,
7000         .set_nmi_mask        = emulator_set_nmi_mask,
7001         .get_hflags          = emulator_get_hflags,
7002         .set_hflags          = emulator_set_hflags,
7003         .pre_leave_smm       = emulator_pre_leave_smm,
7004         .post_leave_smm      = emulator_post_leave_smm,
7005         .set_xcr             = emulator_set_xcr,
7006 };
7007
7008 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
7009 {
7010         u32 int_shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
7011         /*
7012          * an sti; sti; sequence only disable interrupts for the first
7013          * instruction. So, if the last instruction, be it emulated or
7014          * not, left the system with the INT_STI flag enabled, it
7015          * means that the last instruction is an sti. We should not
7016          * leave the flag on in this case. The same goes for mov ss
7017          */
7018         if (int_shadow & mask)
7019                 mask = 0;
7020         if (unlikely(int_shadow || mask)) {
7021                 static_call(kvm_x86_set_interrupt_shadow)(vcpu, mask);
7022                 if (!mask)
7023                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7024         }
7025 }
7026
7027 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
7028 {
7029         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7030         if (ctxt->exception.vector == PF_VECTOR)
7031                 return kvm_inject_emulated_page_fault(vcpu, &ctxt->exception);
7032
7033         if (ctxt->exception.error_code_valid)
7034                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
7035                                       ctxt->exception.error_code);
7036         else
7037                 kvm_queue_exception(vcpu, ctxt->exception.vector);
7038         return false;
7039 }
7040
7041 static struct x86_emulate_ctxt *alloc_emulate_ctxt(struct kvm_vcpu *vcpu)
7042 {
7043         struct x86_emulate_ctxt *ctxt;
7044
7045         ctxt = kmem_cache_zalloc(x86_emulator_cache, GFP_KERNEL_ACCOUNT);
7046         if (!ctxt) {
7047                 pr_err("kvm: failed to allocate vcpu's emulator\n");
7048                 return NULL;
7049         }
7050
7051         ctxt->vcpu = vcpu;
7052         ctxt->ops = &emulate_ops;
7053         vcpu->arch.emulate_ctxt = ctxt;
7054
7055         return ctxt;
7056 }
7057
7058 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
7059 {
7060         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7061         int cs_db, cs_l;
7062
7063         static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
7064
7065         ctxt->gpa_available = false;
7066         ctxt->eflags = kvm_get_rflags(vcpu);
7067         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
7068
7069         ctxt->eip = kvm_rip_read(vcpu);
7070         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
7071                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
7072                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
7073                      cs_db                              ? X86EMUL_MODE_PROT32 :
7074                                                           X86EMUL_MODE_PROT16;
7075         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
7076         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
7077         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
7078
7079         init_decode_cache(ctxt);
7080         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7081 }
7082
7083 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
7084 {
7085         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7086         int ret;
7087
7088         init_emulate_ctxt(vcpu);
7089
7090         ctxt->op_bytes = 2;
7091         ctxt->ad_bytes = 2;
7092         ctxt->_eip = ctxt->eip + inc_eip;
7093         ret = emulate_int_real(ctxt, irq);
7094
7095         if (ret != X86EMUL_CONTINUE) {
7096                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
7097         } else {
7098                 ctxt->eip = ctxt->_eip;
7099                 kvm_rip_write(vcpu, ctxt->eip);
7100                 kvm_set_rflags(vcpu, ctxt->eflags);
7101         }
7102 }
7103 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
7104
7105 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
7106 {
7107         ++vcpu->stat.insn_emulation_fail;
7108         trace_kvm_emulate_insn_failed(vcpu);
7109
7110         if (emulation_type & EMULTYPE_VMWARE_GP) {
7111                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7112                 return 1;
7113         }
7114
7115         if (emulation_type & EMULTYPE_SKIP) {
7116                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7117                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
7118                 vcpu->run->internal.ndata = 0;
7119                 return 0;
7120         }
7121
7122         kvm_queue_exception(vcpu, UD_VECTOR);
7123
7124         if (!is_guest_mode(vcpu) && static_call(kvm_x86_get_cpl)(vcpu) == 0) {
7125                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7126                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
7127                 vcpu->run->internal.ndata = 0;
7128                 return 0;
7129         }
7130
7131         return 1;
7132 }
7133
7134 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7135                                   bool write_fault_to_shadow_pgtable,
7136                                   int emulation_type)
7137 {
7138         gpa_t gpa = cr2_or_gpa;
7139         kvm_pfn_t pfn;
7140
7141         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7142                 return false;
7143
7144         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7145             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7146                 return false;
7147
7148         if (!vcpu->arch.mmu->direct_map) {
7149                 /*
7150                  * Write permission should be allowed since only
7151                  * write access need to be emulated.
7152                  */
7153                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7154
7155                 /*
7156                  * If the mapping is invalid in guest, let cpu retry
7157                  * it to generate fault.
7158                  */
7159                 if (gpa == UNMAPPED_GVA)
7160                         return true;
7161         }
7162
7163         /*
7164          * Do not retry the unhandleable instruction if it faults on the
7165          * readonly host memory, otherwise it will goto a infinite loop:
7166          * retry instruction -> write #PF -> emulation fail -> retry
7167          * instruction -> ...
7168          */
7169         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
7170
7171         /*
7172          * If the instruction failed on the error pfn, it can not be fixed,
7173          * report the error to userspace.
7174          */
7175         if (is_error_noslot_pfn(pfn))
7176                 return false;
7177
7178         kvm_release_pfn_clean(pfn);
7179
7180         /* The instructions are well-emulated on direct mmu. */
7181         if (vcpu->arch.mmu->direct_map) {
7182                 unsigned int indirect_shadow_pages;
7183
7184                 write_lock(&vcpu->kvm->mmu_lock);
7185                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
7186                 write_unlock(&vcpu->kvm->mmu_lock);
7187
7188                 if (indirect_shadow_pages)
7189                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7190
7191                 return true;
7192         }
7193
7194         /*
7195          * if emulation was due to access to shadowed page table
7196          * and it failed try to unshadow page and re-enter the
7197          * guest to let CPU execute the instruction.
7198          */
7199         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7200
7201         /*
7202          * If the access faults on its page table, it can not
7203          * be fixed by unprotecting shadow page and it should
7204          * be reported to userspace.
7205          */
7206         return !write_fault_to_shadow_pgtable;
7207 }
7208
7209 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
7210                               gpa_t cr2_or_gpa,  int emulation_type)
7211 {
7212         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7213         unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
7214
7215         last_retry_eip = vcpu->arch.last_retry_eip;
7216         last_retry_addr = vcpu->arch.last_retry_addr;
7217
7218         /*
7219          * If the emulation is caused by #PF and it is non-page_table
7220          * writing instruction, it means the VM-EXIT is caused by shadow
7221          * page protected, we can zap the shadow page and retry this
7222          * instruction directly.
7223          *
7224          * Note: if the guest uses a non-page-table modifying instruction
7225          * on the PDE that points to the instruction, then we will unmap
7226          * the instruction and go to an infinite loop. So, we cache the
7227          * last retried eip and the last fault address, if we meet the eip
7228          * and the address again, we can break out of the potential infinite
7229          * loop.
7230          */
7231         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
7232
7233         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7234                 return false;
7235
7236         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7237             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7238                 return false;
7239
7240         if (x86_page_table_writing_insn(ctxt))
7241                 return false;
7242
7243         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
7244                 return false;
7245
7246         vcpu->arch.last_retry_eip = ctxt->eip;
7247         vcpu->arch.last_retry_addr = cr2_or_gpa;
7248
7249         if (!vcpu->arch.mmu->direct_map)
7250                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7251
7252         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7253
7254         return true;
7255 }
7256
7257 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
7258 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
7259
7260 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
7261 {
7262         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
7263                 /* This is a good place to trace that we are exiting SMM.  */
7264                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
7265
7266                 /* Process a latched INIT or SMI, if any.  */
7267                 kvm_make_request(KVM_REQ_EVENT, vcpu);
7268         }
7269
7270         kvm_mmu_reset_context(vcpu);
7271 }
7272
7273 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
7274                                 unsigned long *db)
7275 {
7276         u32 dr6 = 0;
7277         int i;
7278         u32 enable, rwlen;
7279
7280         enable = dr7;
7281         rwlen = dr7 >> 16;
7282         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
7283                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
7284                         dr6 |= (1 << i);
7285         return dr6;
7286 }
7287
7288 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
7289 {
7290         struct kvm_run *kvm_run = vcpu->run;
7291
7292         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
7293                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_ACTIVE_LOW;
7294                 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu);
7295                 kvm_run->debug.arch.exception = DB_VECTOR;
7296                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
7297                 return 0;
7298         }
7299         kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
7300         return 1;
7301 }
7302
7303 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
7304 {
7305         unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7306         int r;
7307
7308         r = static_call(kvm_x86_skip_emulated_instruction)(vcpu);
7309         if (unlikely(!r))
7310                 return 0;
7311
7312         /*
7313          * rflags is the old, "raw" value of the flags.  The new value has
7314          * not been saved yet.
7315          *
7316          * This is correct even for TF set by the guest, because "the
7317          * processor will not generate this exception after the instruction
7318          * that sets the TF flag".
7319          */
7320         if (unlikely(rflags & X86_EFLAGS_TF))
7321                 r = kvm_vcpu_do_singlestep(vcpu);
7322         return r;
7323 }
7324 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
7325
7326 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
7327 {
7328         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
7329             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
7330                 struct kvm_run *kvm_run = vcpu->run;
7331                 unsigned long eip = kvm_get_linear_rip(vcpu);
7332                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7333                                            vcpu->arch.guest_debug_dr7,
7334                                            vcpu->arch.eff_db);
7335
7336                 if (dr6 != 0) {
7337                         kvm_run->debug.arch.dr6 = dr6 | DR6_ACTIVE_LOW;
7338                         kvm_run->debug.arch.pc = eip;
7339                         kvm_run->debug.arch.exception = DB_VECTOR;
7340                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
7341                         *r = 0;
7342                         return true;
7343                 }
7344         }
7345
7346         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
7347             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
7348                 unsigned long eip = kvm_get_linear_rip(vcpu);
7349                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7350                                            vcpu->arch.dr7,
7351                                            vcpu->arch.db);
7352
7353                 if (dr6 != 0) {
7354                         kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
7355                         *r = 1;
7356                         return true;
7357                 }
7358         }
7359
7360         return false;
7361 }
7362
7363 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
7364 {
7365         switch (ctxt->opcode_len) {
7366         case 1:
7367                 switch (ctxt->b) {
7368                 case 0xe4:      /* IN */
7369                 case 0xe5:
7370                 case 0xec:
7371                 case 0xed:
7372                 case 0xe6:      /* OUT */
7373                 case 0xe7:
7374                 case 0xee:
7375                 case 0xef:
7376                 case 0x6c:      /* INS */
7377                 case 0x6d:
7378                 case 0x6e:      /* OUTS */
7379                 case 0x6f:
7380                         return true;
7381                 }
7382                 break;
7383         case 2:
7384                 switch (ctxt->b) {
7385                 case 0x33:      /* RDPMC */
7386                         return true;
7387                 }
7388                 break;
7389         }
7390
7391         return false;
7392 }
7393
7394 /*
7395  * Decode to be emulated instruction. Return EMULATION_OK if success.
7396  */
7397 int x86_decode_emulated_instruction(struct kvm_vcpu *vcpu, int emulation_type,
7398                                     void *insn, int insn_len)
7399 {
7400         int r = EMULATION_OK;
7401         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7402
7403         init_emulate_ctxt(vcpu);
7404
7405         /*
7406          * We will reenter on the same instruction since we do not set
7407          * complete_userspace_io. This does not handle watchpoints yet,
7408          * those would be handled in the emulate_ops.
7409          */
7410         if (!(emulation_type & EMULTYPE_SKIP) &&
7411             kvm_vcpu_check_breakpoint(vcpu, &r))
7412                 return r;
7413
7414         ctxt->interruptibility = 0;
7415         ctxt->have_exception = false;
7416         ctxt->exception.vector = -1;
7417         ctxt->perm_ok = false;
7418
7419         ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
7420
7421         r = x86_decode_insn(ctxt, insn, insn_len);
7422
7423         trace_kvm_emulate_insn_start(vcpu);
7424         ++vcpu->stat.insn_emulation;
7425
7426         return r;
7427 }
7428 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction);
7429
7430 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7431                             int emulation_type, void *insn, int insn_len)
7432 {
7433         int r;
7434         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7435         bool writeback = true;
7436         bool write_fault_to_spt;
7437
7438         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, insn, insn_len)))
7439                 return 1;
7440
7441         vcpu->arch.l1tf_flush_l1d = true;
7442
7443         /*
7444          * Clear write_fault_to_shadow_pgtable here to ensure it is
7445          * never reused.
7446          */
7447         write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
7448         vcpu->arch.write_fault_to_shadow_pgtable = false;
7449
7450         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
7451                 kvm_clear_exception_queue(vcpu);
7452
7453                 r = x86_decode_emulated_instruction(vcpu, emulation_type,
7454                                                     insn, insn_len);
7455                 if (r != EMULATION_OK)  {
7456                         if ((emulation_type & EMULTYPE_TRAP_UD) ||
7457                             (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
7458                                 kvm_queue_exception(vcpu, UD_VECTOR);
7459                                 return 1;
7460                         }
7461                         if (reexecute_instruction(vcpu, cr2_or_gpa,
7462                                                   write_fault_to_spt,
7463                                                   emulation_type))
7464                                 return 1;
7465                         if (ctxt->have_exception) {
7466                                 /*
7467                                  * #UD should result in just EMULATION_FAILED, and trap-like
7468                                  * exception should not be encountered during decode.
7469                                  */
7470                                 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
7471                                              exception_type(ctxt->exception.vector) == EXCPT_TRAP);
7472                                 inject_emulated_exception(vcpu);
7473                                 return 1;
7474                         }
7475                         return handle_emulation_failure(vcpu, emulation_type);
7476                 }
7477         }
7478
7479         if ((emulation_type & EMULTYPE_VMWARE_GP) &&
7480             !is_vmware_backdoor_opcode(ctxt)) {
7481                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7482                 return 1;
7483         }
7484
7485         /*
7486          * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
7487          * for kvm_skip_emulated_instruction().  The caller is responsible for
7488          * updating interruptibility state and injecting single-step #DBs.
7489          */
7490         if (emulation_type & EMULTYPE_SKIP) {
7491                 kvm_rip_write(vcpu, ctxt->_eip);
7492                 if (ctxt->eflags & X86_EFLAGS_RF)
7493                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
7494                 return 1;
7495         }
7496
7497         if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
7498                 return 1;
7499
7500         /* this is needed for vmware backdoor interface to work since it
7501            changes registers values  during IO operation */
7502         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
7503                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7504                 emulator_invalidate_register_cache(ctxt);
7505         }
7506
7507 restart:
7508         if (emulation_type & EMULTYPE_PF) {
7509                 /* Save the faulting GPA (cr2) in the address field */
7510                 ctxt->exception.address = cr2_or_gpa;
7511
7512                 /* With shadow page tables, cr2 contains a GVA or nGPA. */
7513                 if (vcpu->arch.mmu->direct_map) {
7514                         ctxt->gpa_available = true;
7515                         ctxt->gpa_val = cr2_or_gpa;
7516                 }
7517         } else {
7518                 /* Sanitize the address out of an abundance of paranoia. */
7519                 ctxt->exception.address = 0;
7520         }
7521
7522         r = x86_emulate_insn(ctxt);
7523
7524         if (r == EMULATION_INTERCEPTED)
7525                 return 1;
7526
7527         if (r == EMULATION_FAILED) {
7528                 if (reexecute_instruction(vcpu, cr2_or_gpa, write_fault_to_spt,
7529                                         emulation_type))
7530                         return 1;
7531
7532                 return handle_emulation_failure(vcpu, emulation_type);
7533         }
7534
7535         if (ctxt->have_exception) {
7536                 r = 1;
7537                 if (inject_emulated_exception(vcpu))
7538                         return r;
7539         } else if (vcpu->arch.pio.count) {
7540                 if (!vcpu->arch.pio.in) {
7541                         /* FIXME: return into emulator if single-stepping.  */
7542                         vcpu->arch.pio.count = 0;
7543                 } else {
7544                         writeback = false;
7545                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
7546                 }
7547                 r = 0;
7548         } else if (vcpu->mmio_needed) {
7549                 ++vcpu->stat.mmio_exits;
7550
7551                 if (!vcpu->mmio_is_write)
7552                         writeback = false;
7553                 r = 0;
7554                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7555         } else if (r == EMULATION_RESTART)
7556                 goto restart;
7557         else
7558                 r = 1;
7559
7560         if (writeback) {
7561                 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7562                 toggle_interruptibility(vcpu, ctxt->interruptibility);
7563                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7564                 if (!ctxt->have_exception ||
7565                     exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
7566                         kvm_rip_write(vcpu, ctxt->eip);
7567                         if (r && (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
7568                                 r = kvm_vcpu_do_singlestep(vcpu);
7569                         if (kvm_x86_ops.update_emulated_instruction)
7570                                 static_call(kvm_x86_update_emulated_instruction)(vcpu);
7571                         __kvm_set_rflags(vcpu, ctxt->eflags);
7572                 }
7573
7574                 /*
7575                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
7576                  * do nothing, and it will be requested again as soon as
7577                  * the shadow expires.  But we still need to check here,
7578                  * because POPF has no interrupt shadow.
7579                  */
7580                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
7581                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7582         } else
7583                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
7584
7585         return r;
7586 }
7587
7588 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
7589 {
7590         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
7591 }
7592 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
7593
7594 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
7595                                         void *insn, int insn_len)
7596 {
7597         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
7598 }
7599 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
7600
7601 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
7602 {
7603         vcpu->arch.pio.count = 0;
7604         return 1;
7605 }
7606
7607 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
7608 {
7609         vcpu->arch.pio.count = 0;
7610
7611         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
7612                 return 1;
7613
7614         return kvm_skip_emulated_instruction(vcpu);
7615 }
7616
7617 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
7618                             unsigned short port)
7619 {
7620         unsigned long val = kvm_rax_read(vcpu);
7621         int ret = emulator_pio_out(vcpu, size, port, &val, 1);
7622
7623         if (ret)
7624                 return ret;
7625
7626         /*
7627          * Workaround userspace that relies on old KVM behavior of %rip being
7628          * incremented prior to exiting to userspace to handle "OUT 0x7e".
7629          */
7630         if (port == 0x7e &&
7631             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
7632                 vcpu->arch.complete_userspace_io =
7633                         complete_fast_pio_out_port_0x7e;
7634                 kvm_skip_emulated_instruction(vcpu);
7635         } else {
7636                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
7637                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
7638         }
7639         return 0;
7640 }
7641
7642 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
7643 {
7644         unsigned long val;
7645
7646         /* We should only ever be called with arch.pio.count equal to 1 */
7647         BUG_ON(vcpu->arch.pio.count != 1);
7648
7649         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
7650                 vcpu->arch.pio.count = 0;
7651                 return 1;
7652         }
7653
7654         /* For size less than 4 we merge, else we zero extend */
7655         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
7656
7657         /*
7658          * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
7659          * the copy and tracing
7660          */
7661         emulator_pio_in(vcpu, vcpu->arch.pio.size, vcpu->arch.pio.port, &val, 1);
7662         kvm_rax_write(vcpu, val);
7663
7664         return kvm_skip_emulated_instruction(vcpu);
7665 }
7666
7667 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
7668                            unsigned short port)
7669 {
7670         unsigned long val;
7671         int ret;
7672
7673         /* For size less than 4 we merge, else we zero extend */
7674         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
7675
7676         ret = emulator_pio_in(vcpu, size, port, &val, 1);
7677         if (ret) {
7678                 kvm_rax_write(vcpu, val);
7679                 return ret;
7680         }
7681
7682         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
7683         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
7684
7685         return 0;
7686 }
7687
7688 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
7689 {
7690         int ret;
7691
7692         if (in)
7693                 ret = kvm_fast_pio_in(vcpu, size, port);
7694         else
7695                 ret = kvm_fast_pio_out(vcpu, size, port);
7696         return ret && kvm_skip_emulated_instruction(vcpu);
7697 }
7698 EXPORT_SYMBOL_GPL(kvm_fast_pio);
7699
7700 static int kvmclock_cpu_down_prep(unsigned int cpu)
7701 {
7702         __this_cpu_write(cpu_tsc_khz, 0);
7703         return 0;
7704 }
7705
7706 static void tsc_khz_changed(void *data)
7707 {
7708         struct cpufreq_freqs *freq = data;
7709         unsigned long khz = 0;
7710
7711         if (data)
7712                 khz = freq->new;
7713         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
7714                 khz = cpufreq_quick_get(raw_smp_processor_id());
7715         if (!khz)
7716                 khz = tsc_khz;
7717         __this_cpu_write(cpu_tsc_khz, khz);
7718 }
7719
7720 #ifdef CONFIG_X86_64
7721 static void kvm_hyperv_tsc_notifier(void)
7722 {
7723         struct kvm *kvm;
7724         struct kvm_vcpu *vcpu;
7725         int cpu;
7726
7727         mutex_lock(&kvm_lock);
7728         list_for_each_entry(kvm, &vm_list, vm_list)
7729                 kvm_make_mclock_inprogress_request(kvm);
7730
7731         hyperv_stop_tsc_emulation();
7732
7733         /* TSC frequency always matches when on Hyper-V */
7734         for_each_present_cpu(cpu)
7735                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
7736         kvm_max_guest_tsc_khz = tsc_khz;
7737
7738         list_for_each_entry(kvm, &vm_list, vm_list) {
7739                 struct kvm_arch *ka = &kvm->arch;
7740
7741                 spin_lock(&ka->pvclock_gtod_sync_lock);
7742                 pvclock_update_vm_gtod_copy(kvm);
7743                 spin_unlock(&ka->pvclock_gtod_sync_lock);
7744
7745                 kvm_for_each_vcpu(cpu, vcpu, kvm)
7746                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7747
7748                 kvm_for_each_vcpu(cpu, vcpu, kvm)
7749                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
7750         }
7751         mutex_unlock(&kvm_lock);
7752 }
7753 #endif
7754
7755 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
7756 {
7757         struct kvm *kvm;
7758         struct kvm_vcpu *vcpu;
7759         int i, send_ipi = 0;
7760
7761         /*
7762          * We allow guests to temporarily run on slowing clocks,
7763          * provided we notify them after, or to run on accelerating
7764          * clocks, provided we notify them before.  Thus time never
7765          * goes backwards.
7766          *
7767          * However, we have a problem.  We can't atomically update
7768          * the frequency of a given CPU from this function; it is
7769          * merely a notifier, which can be called from any CPU.
7770          * Changing the TSC frequency at arbitrary points in time
7771          * requires a recomputation of local variables related to
7772          * the TSC for each VCPU.  We must flag these local variables
7773          * to be updated and be sure the update takes place with the
7774          * new frequency before any guests proceed.
7775          *
7776          * Unfortunately, the combination of hotplug CPU and frequency
7777          * change creates an intractable locking scenario; the order
7778          * of when these callouts happen is undefined with respect to
7779          * CPU hotplug, and they can race with each other.  As such,
7780          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
7781          * undefined; you can actually have a CPU frequency change take
7782          * place in between the computation of X and the setting of the
7783          * variable.  To protect against this problem, all updates of
7784          * the per_cpu tsc_khz variable are done in an interrupt
7785          * protected IPI, and all callers wishing to update the value
7786          * must wait for a synchronous IPI to complete (which is trivial
7787          * if the caller is on the CPU already).  This establishes the
7788          * necessary total order on variable updates.
7789          *
7790          * Note that because a guest time update may take place
7791          * anytime after the setting of the VCPU's request bit, the
7792          * correct TSC value must be set before the request.  However,
7793          * to ensure the update actually makes it to any guest which
7794          * starts running in hardware virtualization between the set
7795          * and the acquisition of the spinlock, we must also ping the
7796          * CPU after setting the request bit.
7797          *
7798          */
7799
7800         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
7801
7802         mutex_lock(&kvm_lock);
7803         list_for_each_entry(kvm, &vm_list, vm_list) {
7804                 kvm_for_each_vcpu(i, vcpu, kvm) {
7805                         if (vcpu->cpu != cpu)
7806                                 continue;
7807                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7808                         if (vcpu->cpu != raw_smp_processor_id())
7809                                 send_ipi = 1;
7810                 }
7811         }
7812         mutex_unlock(&kvm_lock);
7813
7814         if (freq->old < freq->new && send_ipi) {
7815                 /*
7816                  * We upscale the frequency.  Must make the guest
7817                  * doesn't see old kvmclock values while running with
7818                  * the new frequency, otherwise we risk the guest sees
7819                  * time go backwards.
7820                  *
7821                  * In case we update the frequency for another cpu
7822                  * (which might be in guest context) send an interrupt
7823                  * to kick the cpu out of guest context.  Next time
7824                  * guest context is entered kvmclock will be updated,
7825                  * so the guest will not see stale values.
7826                  */
7827                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
7828         }
7829 }
7830
7831 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
7832                                      void *data)
7833 {
7834         struct cpufreq_freqs *freq = data;
7835         int cpu;
7836
7837         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
7838                 return 0;
7839         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
7840                 return 0;
7841
7842         for_each_cpu(cpu, freq->policy->cpus)
7843                 __kvmclock_cpufreq_notifier(freq, cpu);
7844
7845         return 0;
7846 }
7847
7848 static struct notifier_block kvmclock_cpufreq_notifier_block = {
7849         .notifier_call  = kvmclock_cpufreq_notifier
7850 };
7851
7852 static int kvmclock_cpu_online(unsigned int cpu)
7853 {
7854         tsc_khz_changed(NULL);
7855         return 0;
7856 }
7857
7858 static void kvm_timer_init(void)
7859 {
7860         max_tsc_khz = tsc_khz;
7861
7862         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
7863 #ifdef CONFIG_CPU_FREQ
7864                 struct cpufreq_policy *policy;
7865                 int cpu;
7866
7867                 cpu = get_cpu();
7868                 policy = cpufreq_cpu_get(cpu);
7869                 if (policy) {
7870                         if (policy->cpuinfo.max_freq)
7871                                 max_tsc_khz = policy->cpuinfo.max_freq;
7872                         cpufreq_cpu_put(policy);
7873                 }
7874                 put_cpu();
7875 #endif
7876                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
7877                                           CPUFREQ_TRANSITION_NOTIFIER);
7878         }
7879
7880         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
7881                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
7882 }
7883
7884 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
7885 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
7886
7887 int kvm_is_in_guest(void)
7888 {
7889         return __this_cpu_read(current_vcpu) != NULL;
7890 }
7891
7892 static int kvm_is_user_mode(void)
7893 {
7894         int user_mode = 3;
7895
7896         if (__this_cpu_read(current_vcpu))
7897                 user_mode = static_call(kvm_x86_get_cpl)(__this_cpu_read(current_vcpu));
7898
7899         return user_mode != 0;
7900 }
7901
7902 static unsigned long kvm_get_guest_ip(void)
7903 {
7904         unsigned long ip = 0;
7905
7906         if (__this_cpu_read(current_vcpu))
7907                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
7908
7909         return ip;
7910 }
7911
7912 static void kvm_handle_intel_pt_intr(void)
7913 {
7914         struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
7915
7916         kvm_make_request(KVM_REQ_PMI, vcpu);
7917         __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
7918                         (unsigned long *)&vcpu->arch.pmu.global_status);
7919 }
7920
7921 static struct perf_guest_info_callbacks kvm_guest_cbs = {
7922         .is_in_guest            = kvm_is_in_guest,
7923         .is_user_mode           = kvm_is_user_mode,
7924         .get_guest_ip           = kvm_get_guest_ip,
7925         .handle_intel_pt_intr   = kvm_handle_intel_pt_intr,
7926 };
7927
7928 #ifdef CONFIG_X86_64
7929 static void pvclock_gtod_update_fn(struct work_struct *work)
7930 {
7931         struct kvm *kvm;
7932
7933         struct kvm_vcpu *vcpu;
7934         int i;
7935
7936         mutex_lock(&kvm_lock);
7937         list_for_each_entry(kvm, &vm_list, vm_list)
7938                 kvm_for_each_vcpu(i, vcpu, kvm)
7939                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7940         atomic_set(&kvm_guest_has_master_clock, 0);
7941         mutex_unlock(&kvm_lock);
7942 }
7943
7944 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
7945
7946 /*
7947  * Notification about pvclock gtod data update.
7948  */
7949 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
7950                                void *priv)
7951 {
7952         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
7953         struct timekeeper *tk = priv;
7954
7955         update_pvclock_gtod(tk);
7956
7957         /* disable master clock if host does not trust, or does not
7958          * use, TSC based clocksource.
7959          */
7960         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
7961             atomic_read(&kvm_guest_has_master_clock) != 0)
7962                 queue_work(system_long_wq, &pvclock_gtod_work);
7963
7964         return 0;
7965 }
7966
7967 static struct notifier_block pvclock_gtod_notifier = {
7968         .notifier_call = pvclock_gtod_notify,
7969 };
7970 #endif
7971
7972 int kvm_arch_init(void *opaque)
7973 {
7974         struct kvm_x86_init_ops *ops = opaque;
7975         int r;
7976
7977         if (kvm_x86_ops.hardware_enable) {
7978                 printk(KERN_ERR "kvm: already loaded the other module\n");
7979                 r = -EEXIST;
7980                 goto out;
7981         }
7982
7983         if (!ops->cpu_has_kvm_support()) {
7984                 pr_err_ratelimited("kvm: no hardware support\n");
7985                 r = -EOPNOTSUPP;
7986                 goto out;
7987         }
7988         if (ops->disabled_by_bios()) {
7989                 pr_err_ratelimited("kvm: disabled by bios\n");
7990                 r = -EOPNOTSUPP;
7991                 goto out;
7992         }
7993
7994         /*
7995          * KVM explicitly assumes that the guest has an FPU and
7996          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
7997          * vCPU's FPU state as a fxregs_state struct.
7998          */
7999         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
8000                 printk(KERN_ERR "kvm: inadequate fpu\n");
8001                 r = -EOPNOTSUPP;
8002                 goto out;
8003         }
8004
8005         r = -ENOMEM;
8006         x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
8007                                           __alignof__(struct fpu), SLAB_ACCOUNT,
8008                                           NULL);
8009         if (!x86_fpu_cache) {
8010                 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
8011                 goto out;
8012         }
8013
8014         x86_emulator_cache = kvm_alloc_emulator_cache();
8015         if (!x86_emulator_cache) {
8016                 pr_err("kvm: failed to allocate cache for x86 emulator\n");
8017                 goto out_free_x86_fpu_cache;
8018         }
8019
8020         user_return_msrs = alloc_percpu(struct kvm_user_return_msrs);
8021         if (!user_return_msrs) {
8022                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_user_return_msrs\n");
8023                 goto out_free_x86_emulator_cache;
8024         }
8025
8026         r = kvm_mmu_module_init();
8027         if (r)
8028                 goto out_free_percpu;
8029
8030         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
8031                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
8032                         PT_PRESENT_MASK, 0, sme_me_mask);
8033         kvm_timer_init();
8034
8035         perf_register_guest_info_callbacks(&kvm_guest_cbs);
8036
8037         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
8038                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
8039                 supported_xcr0 = host_xcr0 & KVM_SUPPORTED_XCR0;
8040         }
8041
8042         if (pi_inject_timer == -1)
8043                 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
8044 #ifdef CONFIG_X86_64
8045         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
8046
8047         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8048                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
8049 #endif
8050
8051         return 0;
8052
8053 out_free_percpu:
8054         free_percpu(user_return_msrs);
8055 out_free_x86_emulator_cache:
8056         kmem_cache_destroy(x86_emulator_cache);
8057 out_free_x86_fpu_cache:
8058         kmem_cache_destroy(x86_fpu_cache);
8059 out:
8060         return r;
8061 }
8062
8063 void kvm_arch_exit(void)
8064 {
8065 #ifdef CONFIG_X86_64
8066         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8067                 clear_hv_tscchange_cb();
8068 #endif
8069         kvm_lapic_exit();
8070         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
8071
8072         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8073                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
8074                                             CPUFREQ_TRANSITION_NOTIFIER);
8075         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
8076 #ifdef CONFIG_X86_64
8077         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
8078 #endif
8079         kvm_x86_ops.hardware_enable = NULL;
8080         kvm_mmu_module_exit();
8081         free_percpu(user_return_msrs);
8082         kmem_cache_destroy(x86_fpu_cache);
8083 #ifdef CONFIG_KVM_XEN
8084         static_key_deferred_flush(&kvm_xen_enabled);
8085         WARN_ON(static_branch_unlikely(&kvm_xen_enabled.key));
8086 #endif
8087 }
8088
8089 static int __kvm_vcpu_halt(struct kvm_vcpu *vcpu, int state, int reason)
8090 {
8091         ++vcpu->stat.halt_exits;
8092         if (lapic_in_kernel(vcpu)) {
8093                 vcpu->arch.mp_state = state;
8094                 return 1;
8095         } else {
8096                 vcpu->run->exit_reason = reason;
8097                 return 0;
8098         }
8099 }
8100
8101 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
8102 {
8103         return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_HALTED, KVM_EXIT_HLT);
8104 }
8105 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
8106
8107 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
8108 {
8109         int ret = kvm_skip_emulated_instruction(vcpu);
8110         /*
8111          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
8112          * KVM_EXIT_DEBUG here.
8113          */
8114         return kvm_vcpu_halt(vcpu) && ret;
8115 }
8116 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
8117
8118 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu)
8119 {
8120         int ret = kvm_skip_emulated_instruction(vcpu);
8121
8122         return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_AP_RESET_HOLD, KVM_EXIT_AP_RESET_HOLD) && ret;
8123 }
8124 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold);
8125
8126 #ifdef CONFIG_X86_64
8127 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
8128                                 unsigned long clock_type)
8129 {
8130         struct kvm_clock_pairing clock_pairing;
8131         struct timespec64 ts;
8132         u64 cycle;
8133         int ret;
8134
8135         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
8136                 return -KVM_EOPNOTSUPP;
8137
8138         if (!kvm_get_walltime_and_clockread(&ts, &cycle))
8139                 return -KVM_EOPNOTSUPP;
8140
8141         clock_pairing.sec = ts.tv_sec;
8142         clock_pairing.nsec = ts.tv_nsec;
8143         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
8144         clock_pairing.flags = 0;
8145         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
8146
8147         ret = 0;
8148         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
8149                             sizeof(struct kvm_clock_pairing)))
8150                 ret = -KVM_EFAULT;
8151
8152         return ret;
8153 }
8154 #endif
8155
8156 /*
8157  * kvm_pv_kick_cpu_op:  Kick a vcpu.
8158  *
8159  * @apicid - apicid of vcpu to be kicked.
8160  */
8161 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
8162 {
8163         struct kvm_lapic_irq lapic_irq;
8164
8165         lapic_irq.shorthand = APIC_DEST_NOSHORT;
8166         lapic_irq.dest_mode = APIC_DEST_PHYSICAL;
8167         lapic_irq.level = 0;
8168         lapic_irq.dest_id = apicid;
8169         lapic_irq.msi_redir_hint = false;
8170
8171         lapic_irq.delivery_mode = APIC_DM_REMRD;
8172         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
8173 }
8174
8175 bool kvm_apicv_activated(struct kvm *kvm)
8176 {
8177         return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
8178 }
8179 EXPORT_SYMBOL_GPL(kvm_apicv_activated);
8180
8181 void kvm_apicv_init(struct kvm *kvm, bool enable)
8182 {
8183         if (enable)
8184                 clear_bit(APICV_INHIBIT_REASON_DISABLE,
8185                           &kvm->arch.apicv_inhibit_reasons);
8186         else
8187                 set_bit(APICV_INHIBIT_REASON_DISABLE,
8188                         &kvm->arch.apicv_inhibit_reasons);
8189 }
8190 EXPORT_SYMBOL_GPL(kvm_apicv_init);
8191
8192 static void kvm_sched_yield(struct kvm *kvm, unsigned long dest_id)
8193 {
8194         struct kvm_vcpu *target = NULL;
8195         struct kvm_apic_map *map;
8196
8197         rcu_read_lock();
8198         map = rcu_dereference(kvm->arch.apic_map);
8199
8200         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
8201                 target = map->phys_map[dest_id]->vcpu;
8202
8203         rcu_read_unlock();
8204
8205         if (target && READ_ONCE(target->ready))
8206                 kvm_vcpu_yield_to(target);
8207 }
8208
8209 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
8210 {
8211         unsigned long nr, a0, a1, a2, a3, ret;
8212         int op_64_bit;
8213
8214         if (kvm_xen_hypercall_enabled(vcpu->kvm))
8215                 return kvm_xen_hypercall(vcpu);
8216
8217         if (kvm_hv_hypercall_enabled(vcpu))
8218                 return kvm_hv_hypercall(vcpu);
8219
8220         nr = kvm_rax_read(vcpu);
8221         a0 = kvm_rbx_read(vcpu);
8222         a1 = kvm_rcx_read(vcpu);
8223         a2 = kvm_rdx_read(vcpu);
8224         a3 = kvm_rsi_read(vcpu);
8225
8226         trace_kvm_hypercall(nr, a0, a1, a2, a3);
8227
8228         op_64_bit = is_64_bit_mode(vcpu);
8229         if (!op_64_bit) {
8230                 nr &= 0xFFFFFFFF;
8231                 a0 &= 0xFFFFFFFF;
8232                 a1 &= 0xFFFFFFFF;
8233                 a2 &= 0xFFFFFFFF;
8234                 a3 &= 0xFFFFFFFF;
8235         }
8236
8237         if (static_call(kvm_x86_get_cpl)(vcpu) != 0) {
8238                 ret = -KVM_EPERM;
8239                 goto out;
8240         }
8241
8242         ret = -KVM_ENOSYS;
8243
8244         switch (nr) {
8245         case KVM_HC_VAPIC_POLL_IRQ:
8246                 ret = 0;
8247                 break;
8248         case KVM_HC_KICK_CPU:
8249                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_UNHALT))
8250                         break;
8251
8252                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
8253                 kvm_sched_yield(vcpu->kvm, a1);
8254                 ret = 0;
8255                 break;
8256 #ifdef CONFIG_X86_64
8257         case KVM_HC_CLOCK_PAIRING:
8258                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
8259                 break;
8260 #endif
8261         case KVM_HC_SEND_IPI:
8262                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SEND_IPI))
8263                         break;
8264
8265                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
8266                 break;
8267         case KVM_HC_SCHED_YIELD:
8268                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SCHED_YIELD))
8269                         break;
8270
8271                 kvm_sched_yield(vcpu->kvm, a0);
8272                 ret = 0;
8273                 break;
8274         default:
8275                 ret = -KVM_ENOSYS;
8276                 break;
8277         }
8278 out:
8279         if (!op_64_bit)
8280                 ret = (u32)ret;
8281         kvm_rax_write(vcpu, ret);
8282
8283         ++vcpu->stat.hypercalls;
8284         return kvm_skip_emulated_instruction(vcpu);
8285 }
8286 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
8287
8288 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
8289 {
8290         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8291         char instruction[3];
8292         unsigned long rip = kvm_rip_read(vcpu);
8293
8294         static_call(kvm_x86_patch_hypercall)(vcpu, instruction);
8295
8296         return emulator_write_emulated(ctxt, rip, instruction, 3,
8297                 &ctxt->exception);
8298 }
8299
8300 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
8301 {
8302         return vcpu->run->request_interrupt_window &&
8303                 likely(!pic_in_kernel(vcpu->kvm));
8304 }
8305
8306 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
8307 {
8308         struct kvm_run *kvm_run = vcpu->run;
8309
8310         /*
8311          * if_flag is obsolete and useless, so do not bother
8312          * setting it for SEV-ES guests.  Userspace can just
8313          * use kvm_run->ready_for_interrupt_injection.
8314          */
8315         kvm_run->if_flag = !vcpu->arch.guest_state_protected
8316                 && (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
8317
8318         kvm_run->cr8 = kvm_get_cr8(vcpu);
8319         kvm_run->apic_base = kvm_get_apic_base(vcpu);
8320         kvm_run->ready_for_interrupt_injection =
8321                 pic_in_kernel(vcpu->kvm) ||
8322                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
8323
8324         if (is_smm(vcpu))
8325                 kvm_run->flags |= KVM_RUN_X86_SMM;
8326 }
8327
8328 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
8329 {
8330         int max_irr, tpr;
8331
8332         if (!kvm_x86_ops.update_cr8_intercept)
8333                 return;
8334
8335         if (!lapic_in_kernel(vcpu))
8336                 return;
8337
8338         if (vcpu->arch.apicv_active)
8339                 return;
8340
8341         if (!vcpu->arch.apic->vapic_addr)
8342                 max_irr = kvm_lapic_find_highest_irr(vcpu);
8343         else
8344                 max_irr = -1;
8345
8346         if (max_irr != -1)
8347                 max_irr >>= 4;
8348
8349         tpr = kvm_lapic_get_cr8(vcpu);
8350
8351         static_call(kvm_x86_update_cr8_intercept)(vcpu, tpr, max_irr);
8352 }
8353
8354 static void inject_pending_event(struct kvm_vcpu *vcpu, bool *req_immediate_exit)
8355 {
8356         int r;
8357         bool can_inject = true;
8358
8359         /* try to reinject previous events if any */
8360
8361         if (vcpu->arch.exception.injected) {
8362                 static_call(kvm_x86_queue_exception)(vcpu);
8363                 can_inject = false;
8364         }
8365         /*
8366          * Do not inject an NMI or interrupt if there is a pending
8367          * exception.  Exceptions and interrupts are recognized at
8368          * instruction boundaries, i.e. the start of an instruction.
8369          * Trap-like exceptions, e.g. #DB, have higher priority than
8370          * NMIs and interrupts, i.e. traps are recognized before an
8371          * NMI/interrupt that's pending on the same instruction.
8372          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
8373          * priority, but are only generated (pended) during instruction
8374          * execution, i.e. a pending fault-like exception means the
8375          * fault occurred on the *previous* instruction and must be
8376          * serviced prior to recognizing any new events in order to
8377          * fully complete the previous instruction.
8378          */
8379         else if (!vcpu->arch.exception.pending) {
8380                 if (vcpu->arch.nmi_injected) {
8381                         static_call(kvm_x86_set_nmi)(vcpu);
8382                         can_inject = false;
8383                 } else if (vcpu->arch.interrupt.injected) {
8384                         static_call(kvm_x86_set_irq)(vcpu);
8385                         can_inject = false;
8386                 }
8387         }
8388
8389         WARN_ON_ONCE(vcpu->arch.exception.injected &&
8390                      vcpu->arch.exception.pending);
8391
8392         /*
8393          * Call check_nested_events() even if we reinjected a previous event
8394          * in order for caller to determine if it should require immediate-exit
8395          * from L2 to L1 due to pending L1 events which require exit
8396          * from L2 to L1.
8397          */
8398         if (is_guest_mode(vcpu)) {
8399                 r = kvm_x86_ops.nested_ops->check_events(vcpu);
8400                 if (r < 0)
8401                         goto busy;
8402         }
8403
8404         /* try to inject new event if pending */
8405         if (vcpu->arch.exception.pending) {
8406                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
8407                                         vcpu->arch.exception.has_error_code,
8408                                         vcpu->arch.exception.error_code);
8409
8410                 vcpu->arch.exception.pending = false;
8411                 vcpu->arch.exception.injected = true;
8412
8413                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
8414                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
8415                                              X86_EFLAGS_RF);
8416
8417                 if (vcpu->arch.exception.nr == DB_VECTOR) {
8418                         kvm_deliver_exception_payload(vcpu);
8419                         if (vcpu->arch.dr7 & DR7_GD) {
8420                                 vcpu->arch.dr7 &= ~DR7_GD;
8421                                 kvm_update_dr7(vcpu);
8422                         }
8423                 }
8424
8425                 static_call(kvm_x86_queue_exception)(vcpu);
8426                 can_inject = false;
8427         }
8428
8429         /*
8430          * Finally, inject interrupt events.  If an event cannot be injected
8431          * due to architectural conditions (e.g. IF=0) a window-open exit
8432          * will re-request KVM_REQ_EVENT.  Sometimes however an event is pending
8433          * and can architecturally be injected, but we cannot do it right now:
8434          * an interrupt could have arrived just now and we have to inject it
8435          * as a vmexit, or there could already an event in the queue, which is
8436          * indicated by can_inject.  In that case we request an immediate exit
8437          * in order to make progress and get back here for another iteration.
8438          * The kvm_x86_ops hooks communicate this by returning -EBUSY.
8439          */
8440         if (vcpu->arch.smi_pending) {
8441                 r = can_inject ? static_call(kvm_x86_smi_allowed)(vcpu, true) : -EBUSY;
8442                 if (r < 0)
8443                         goto busy;
8444                 if (r) {
8445                         vcpu->arch.smi_pending = false;
8446                         ++vcpu->arch.smi_count;
8447                         enter_smm(vcpu);
8448                         can_inject = false;
8449                 } else
8450                         static_call(kvm_x86_enable_smi_window)(vcpu);
8451         }
8452
8453         if (vcpu->arch.nmi_pending) {
8454                 r = can_inject ? static_call(kvm_x86_nmi_allowed)(vcpu, true) : -EBUSY;
8455                 if (r < 0)
8456                         goto busy;
8457                 if (r) {
8458                         --vcpu->arch.nmi_pending;
8459                         vcpu->arch.nmi_injected = true;
8460                         static_call(kvm_x86_set_nmi)(vcpu);
8461                         can_inject = false;
8462                         WARN_ON(static_call(kvm_x86_nmi_allowed)(vcpu, true) < 0);
8463                 }
8464                 if (vcpu->arch.nmi_pending)
8465                         static_call(kvm_x86_enable_nmi_window)(vcpu);
8466         }
8467
8468         if (kvm_cpu_has_injectable_intr(vcpu)) {
8469                 r = can_inject ? static_call(kvm_x86_interrupt_allowed)(vcpu, true) : -EBUSY;
8470                 if (r < 0)
8471                         goto busy;
8472                 if (r) {
8473                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu), false);
8474                         static_call(kvm_x86_set_irq)(vcpu);
8475                         WARN_ON(static_call(kvm_x86_interrupt_allowed)(vcpu, true) < 0);
8476                 }
8477                 if (kvm_cpu_has_injectable_intr(vcpu))
8478                         static_call(kvm_x86_enable_irq_window)(vcpu);
8479         }
8480
8481         if (is_guest_mode(vcpu) &&
8482             kvm_x86_ops.nested_ops->hv_timer_pending &&
8483             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
8484                 *req_immediate_exit = true;
8485
8486         WARN_ON(vcpu->arch.exception.pending);
8487         return;
8488
8489 busy:
8490         *req_immediate_exit = true;
8491         return;
8492 }
8493
8494 static void process_nmi(struct kvm_vcpu *vcpu)
8495 {
8496         unsigned limit = 2;
8497
8498         /*
8499          * x86 is limited to one NMI running, and one NMI pending after it.
8500          * If an NMI is already in progress, limit further NMIs to just one.
8501          * Otherwise, allow two (and we'll inject the first one immediately).
8502          */
8503         if (static_call(kvm_x86_get_nmi_mask)(vcpu) || vcpu->arch.nmi_injected)
8504                 limit = 1;
8505
8506         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
8507         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
8508         kvm_make_request(KVM_REQ_EVENT, vcpu);
8509 }
8510
8511 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
8512 {
8513         u32 flags = 0;
8514         flags |= seg->g       << 23;
8515         flags |= seg->db      << 22;
8516         flags |= seg->l       << 21;
8517         flags |= seg->avl     << 20;
8518         flags |= seg->present << 15;
8519         flags |= seg->dpl     << 13;
8520         flags |= seg->s       << 12;
8521         flags |= seg->type    << 8;
8522         return flags;
8523 }
8524
8525 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
8526 {
8527         struct kvm_segment seg;
8528         int offset;
8529
8530         kvm_get_segment(vcpu, &seg, n);
8531         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
8532
8533         if (n < 3)
8534                 offset = 0x7f84 + n * 12;
8535         else
8536                 offset = 0x7f2c + (n - 3) * 12;
8537
8538         put_smstate(u32, buf, offset + 8, seg.base);
8539         put_smstate(u32, buf, offset + 4, seg.limit);
8540         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
8541 }
8542
8543 #ifdef CONFIG_X86_64
8544 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
8545 {
8546         struct kvm_segment seg;
8547         int offset;
8548         u16 flags;
8549
8550         kvm_get_segment(vcpu, &seg, n);
8551         offset = 0x7e00 + n * 16;
8552
8553         flags = enter_smm_get_segment_flags(&seg) >> 8;
8554         put_smstate(u16, buf, offset, seg.selector);
8555         put_smstate(u16, buf, offset + 2, flags);
8556         put_smstate(u32, buf, offset + 4, seg.limit);
8557         put_smstate(u64, buf, offset + 8, seg.base);
8558 }
8559 #endif
8560
8561 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
8562 {
8563         struct desc_ptr dt;
8564         struct kvm_segment seg;
8565         unsigned long val;
8566         int i;
8567
8568         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
8569         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
8570         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
8571         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
8572
8573         for (i = 0; i < 8; i++)
8574                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
8575
8576         kvm_get_dr(vcpu, 6, &val);
8577         put_smstate(u32, buf, 0x7fcc, (u32)val);
8578         kvm_get_dr(vcpu, 7, &val);
8579         put_smstate(u32, buf, 0x7fc8, (u32)val);
8580
8581         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
8582         put_smstate(u32, buf, 0x7fc4, seg.selector);
8583         put_smstate(u32, buf, 0x7f64, seg.base);
8584         put_smstate(u32, buf, 0x7f60, seg.limit);
8585         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
8586
8587         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
8588         put_smstate(u32, buf, 0x7fc0, seg.selector);
8589         put_smstate(u32, buf, 0x7f80, seg.base);
8590         put_smstate(u32, buf, 0x7f7c, seg.limit);
8591         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
8592
8593         static_call(kvm_x86_get_gdt)(vcpu, &dt);
8594         put_smstate(u32, buf, 0x7f74, dt.address);
8595         put_smstate(u32, buf, 0x7f70, dt.size);
8596
8597         static_call(kvm_x86_get_idt)(vcpu, &dt);
8598         put_smstate(u32, buf, 0x7f58, dt.address);
8599         put_smstate(u32, buf, 0x7f54, dt.size);
8600
8601         for (i = 0; i < 6; i++)
8602                 enter_smm_save_seg_32(vcpu, buf, i);
8603
8604         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
8605
8606         /* revision id */
8607         put_smstate(u32, buf, 0x7efc, 0x00020000);
8608         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
8609 }
8610
8611 #ifdef CONFIG_X86_64
8612 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
8613 {
8614         struct desc_ptr dt;
8615         struct kvm_segment seg;
8616         unsigned long val;
8617         int i;
8618
8619         for (i = 0; i < 16; i++)
8620                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
8621
8622         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
8623         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
8624
8625         kvm_get_dr(vcpu, 6, &val);
8626         put_smstate(u64, buf, 0x7f68, val);
8627         kvm_get_dr(vcpu, 7, &val);
8628         put_smstate(u64, buf, 0x7f60, val);
8629
8630         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
8631         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
8632         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
8633
8634         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
8635
8636         /* revision id */
8637         put_smstate(u32, buf, 0x7efc, 0x00020064);
8638
8639         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
8640
8641         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
8642         put_smstate(u16, buf, 0x7e90, seg.selector);
8643         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
8644         put_smstate(u32, buf, 0x7e94, seg.limit);
8645         put_smstate(u64, buf, 0x7e98, seg.base);
8646
8647         static_call(kvm_x86_get_idt)(vcpu, &dt);
8648         put_smstate(u32, buf, 0x7e84, dt.size);
8649         put_smstate(u64, buf, 0x7e88, dt.address);
8650
8651         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
8652         put_smstate(u16, buf, 0x7e70, seg.selector);
8653         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
8654         put_smstate(u32, buf, 0x7e74, seg.limit);
8655         put_smstate(u64, buf, 0x7e78, seg.base);
8656
8657         static_call(kvm_x86_get_gdt)(vcpu, &dt);
8658         put_smstate(u32, buf, 0x7e64, dt.size);
8659         put_smstate(u64, buf, 0x7e68, dt.address);
8660
8661         for (i = 0; i < 6; i++)
8662                 enter_smm_save_seg_64(vcpu, buf, i);
8663 }
8664 #endif
8665
8666 static void enter_smm(struct kvm_vcpu *vcpu)
8667 {
8668         struct kvm_segment cs, ds;
8669         struct desc_ptr dt;
8670         char buf[512];
8671         u32 cr0;
8672
8673         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
8674         memset(buf, 0, 512);
8675 #ifdef CONFIG_X86_64
8676         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
8677                 enter_smm_save_state_64(vcpu, buf);
8678         else
8679 #endif
8680                 enter_smm_save_state_32(vcpu, buf);
8681
8682         /*
8683          * Give pre_enter_smm() a chance to make ISA-specific changes to the
8684          * vCPU state (e.g. leave guest mode) after we've saved the state into
8685          * the SMM state-save area.
8686          */
8687         static_call(kvm_x86_pre_enter_smm)(vcpu, buf);
8688
8689         vcpu->arch.hflags |= HF_SMM_MASK;
8690         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
8691
8692         if (static_call(kvm_x86_get_nmi_mask)(vcpu))
8693                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
8694         else
8695                 static_call(kvm_x86_set_nmi_mask)(vcpu, true);
8696
8697         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
8698         kvm_rip_write(vcpu, 0x8000);
8699
8700         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
8701         static_call(kvm_x86_set_cr0)(vcpu, cr0);
8702         vcpu->arch.cr0 = cr0;
8703
8704         static_call(kvm_x86_set_cr4)(vcpu, 0);
8705
8706         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
8707         dt.address = dt.size = 0;
8708         static_call(kvm_x86_set_idt)(vcpu, &dt);
8709
8710         kvm_set_dr(vcpu, 7, DR7_FIXED_1);
8711
8712         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
8713         cs.base = vcpu->arch.smbase;
8714
8715         ds.selector = 0;
8716         ds.base = 0;
8717
8718         cs.limit    = ds.limit = 0xffffffff;
8719         cs.type     = ds.type = 0x3;
8720         cs.dpl      = ds.dpl = 0;
8721         cs.db       = ds.db = 0;
8722         cs.s        = ds.s = 1;
8723         cs.l        = ds.l = 0;
8724         cs.g        = ds.g = 1;
8725         cs.avl      = ds.avl = 0;
8726         cs.present  = ds.present = 1;
8727         cs.unusable = ds.unusable = 0;
8728         cs.padding  = ds.padding = 0;
8729
8730         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
8731         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
8732         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
8733         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
8734         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
8735         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
8736
8737 #ifdef CONFIG_X86_64
8738         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
8739                 static_call(kvm_x86_set_efer)(vcpu, 0);
8740 #endif
8741
8742         kvm_update_cpuid_runtime(vcpu);
8743         kvm_mmu_reset_context(vcpu);
8744 }
8745
8746 static void process_smi(struct kvm_vcpu *vcpu)
8747 {
8748         vcpu->arch.smi_pending = true;
8749         kvm_make_request(KVM_REQ_EVENT, vcpu);
8750 }
8751
8752 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
8753                                        unsigned long *vcpu_bitmap)
8754 {
8755         cpumask_var_t cpus;
8756
8757         zalloc_cpumask_var(&cpus, GFP_ATOMIC);
8758
8759         kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC,
8760                                     NULL, vcpu_bitmap, cpus);
8761
8762         free_cpumask_var(cpus);
8763 }
8764
8765 void kvm_make_scan_ioapic_request(struct kvm *kvm)
8766 {
8767         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
8768 }
8769
8770 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
8771 {
8772         if (!lapic_in_kernel(vcpu))
8773                 return;
8774
8775         vcpu->arch.apicv_active = kvm_apicv_activated(vcpu->kvm);
8776         kvm_apic_update_apicv(vcpu);
8777         static_call(kvm_x86_refresh_apicv_exec_ctrl)(vcpu);
8778 }
8779 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv);
8780
8781 /*
8782  * NOTE: Do not hold any lock prior to calling this.
8783  *
8784  * In particular, kvm_request_apicv_update() expects kvm->srcu not to be
8785  * locked, because it calls __x86_set_memory_region() which does
8786  * synchronize_srcu(&kvm->srcu).
8787  */
8788 void kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
8789 {
8790         struct kvm_vcpu *except;
8791         unsigned long old, new, expected;
8792
8793         if (!kvm_x86_ops.check_apicv_inhibit_reasons ||
8794             !static_call(kvm_x86_check_apicv_inhibit_reasons)(bit))
8795                 return;
8796
8797         old = READ_ONCE(kvm->arch.apicv_inhibit_reasons);
8798         do {
8799                 expected = new = old;
8800                 if (activate)
8801                         __clear_bit(bit, &new);
8802                 else
8803                         __set_bit(bit, &new);
8804                 if (new == old)
8805                         break;
8806                 old = cmpxchg(&kvm->arch.apicv_inhibit_reasons, expected, new);
8807         } while (old != expected);
8808
8809         if (!!old == !!new)
8810                 return;
8811
8812         trace_kvm_apicv_update_request(activate, bit);
8813         if (kvm_x86_ops.pre_update_apicv_exec_ctrl)
8814                 static_call(kvm_x86_pre_update_apicv_exec_ctrl)(kvm, activate);
8815
8816         /*
8817          * Sending request to update APICV for all other vcpus,
8818          * while update the calling vcpu immediately instead of
8819          * waiting for another #VMEXIT to handle the request.
8820          */
8821         except = kvm_get_running_vcpu();
8822         kvm_make_all_cpus_request_except(kvm, KVM_REQ_APICV_UPDATE,
8823                                          except);
8824         if (except)
8825                 kvm_vcpu_update_apicv(except);
8826 }
8827 EXPORT_SYMBOL_GPL(kvm_request_apicv_update);
8828
8829 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
8830 {
8831         if (!kvm_apic_present(vcpu))
8832                 return;
8833
8834         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
8835
8836         if (irqchip_split(vcpu->kvm))
8837                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
8838         else {
8839                 if (vcpu->arch.apicv_active)
8840                         static_call(kvm_x86_sync_pir_to_irr)(vcpu);
8841                 if (ioapic_in_kernel(vcpu->kvm))
8842                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
8843         }
8844
8845         if (is_guest_mode(vcpu))
8846                 vcpu->arch.load_eoi_exitmap_pending = true;
8847         else
8848                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
8849 }
8850
8851 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
8852 {
8853         u64 eoi_exit_bitmap[4];
8854
8855         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
8856                 return;
8857
8858         if (to_hv_vcpu(vcpu))
8859                 bitmap_or((ulong *)eoi_exit_bitmap,
8860                           vcpu->arch.ioapic_handled_vectors,
8861                           to_hv_synic(vcpu)->vec_bitmap, 256);
8862
8863         static_call(kvm_x86_load_eoi_exitmap)(vcpu, eoi_exit_bitmap);
8864 }
8865
8866 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
8867                                             unsigned long start, unsigned long end)
8868 {
8869         unsigned long apic_address;
8870
8871         /*
8872          * The physical address of apic access page is stored in the VMCS.
8873          * Update it when it becomes invalid.
8874          */
8875         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
8876         if (start <= apic_address && apic_address < end)
8877                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
8878 }
8879
8880 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
8881 {
8882         if (!lapic_in_kernel(vcpu))
8883                 return;
8884
8885         if (!kvm_x86_ops.set_apic_access_page_addr)
8886                 return;
8887
8888         static_call(kvm_x86_set_apic_access_page_addr)(vcpu);
8889 }
8890
8891 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
8892 {
8893         smp_send_reschedule(vcpu->cpu);
8894 }
8895 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
8896
8897 /*
8898  * Returns 1 to let vcpu_run() continue the guest execution loop without
8899  * exiting to the userspace.  Otherwise, the value will be returned to the
8900  * userspace.
8901  */
8902 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
8903 {
8904         int r;
8905         bool req_int_win =
8906                 dm_request_for_irq_injection(vcpu) &&
8907                 kvm_cpu_accept_dm_intr(vcpu);
8908         fastpath_t exit_fastpath;
8909
8910         bool req_immediate_exit = false;
8911
8912         /* Forbid vmenter if vcpu dirty ring is soft-full */
8913         if (unlikely(vcpu->kvm->dirty_ring_size &&
8914                      kvm_dirty_ring_soft_full(&vcpu->dirty_ring))) {
8915                 vcpu->run->exit_reason = KVM_EXIT_DIRTY_RING_FULL;
8916                 trace_kvm_dirty_ring_exit(vcpu);
8917                 r = 0;
8918                 goto out;
8919         }
8920
8921         if (kvm_request_pending(vcpu)) {
8922                 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu)) {
8923                         if (unlikely(!kvm_x86_ops.nested_ops->get_nested_state_pages(vcpu))) {
8924                                 r = 0;
8925                                 goto out;
8926                         }
8927                 }
8928                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
8929                         kvm_mmu_unload(vcpu);
8930                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
8931                         __kvm_migrate_timers(vcpu);
8932                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
8933                         kvm_gen_update_masterclock(vcpu->kvm);
8934                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
8935                         kvm_gen_kvmclock_update(vcpu);
8936                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
8937                         r = kvm_guest_time_update(vcpu);
8938                         if (unlikely(r))
8939                                 goto out;
8940                 }
8941                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
8942                         kvm_mmu_sync_roots(vcpu);
8943                 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD, vcpu))
8944                         kvm_mmu_load_pgd(vcpu);
8945                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) {
8946                         kvm_vcpu_flush_tlb_all(vcpu);
8947
8948                         /* Flushing all ASIDs flushes the current ASID... */
8949                         kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
8950                 }
8951                 if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu))
8952                         kvm_vcpu_flush_tlb_current(vcpu);
8953                 if (kvm_check_request(KVM_REQ_HV_TLB_FLUSH, vcpu))
8954                         kvm_vcpu_flush_tlb_guest(vcpu);
8955
8956                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
8957                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
8958                         r = 0;
8959                         goto out;
8960                 }
8961                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
8962                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
8963                         vcpu->mmio_needed = 0;
8964                         r = 0;
8965                         goto out;
8966                 }
8967                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
8968                         /* Page is swapped out. Do synthetic halt */
8969                         vcpu->arch.apf.halted = true;
8970                         r = 1;
8971                         goto out;
8972                 }
8973                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
8974                         record_steal_time(vcpu);
8975                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
8976                         process_smi(vcpu);
8977                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
8978                         process_nmi(vcpu);
8979                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
8980                         kvm_pmu_handle_event(vcpu);
8981                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
8982                         kvm_pmu_deliver_pmi(vcpu);
8983                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
8984                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
8985                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
8986                                      vcpu->arch.ioapic_handled_vectors)) {
8987                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
8988                                 vcpu->run->eoi.vector =
8989                                                 vcpu->arch.pending_ioapic_eoi;
8990                                 r = 0;
8991                                 goto out;
8992                         }
8993                 }
8994                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
8995                         vcpu_scan_ioapic(vcpu);
8996                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
8997                         vcpu_load_eoi_exitmap(vcpu);
8998                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
8999                         kvm_vcpu_reload_apic_access_page(vcpu);
9000                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
9001                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9002                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
9003                         r = 0;
9004                         goto out;
9005                 }
9006                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
9007                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9008                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
9009                         r = 0;
9010                         goto out;
9011                 }
9012                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
9013                         struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
9014
9015                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
9016                         vcpu->run->hyperv = hv_vcpu->exit;
9017                         r = 0;
9018                         goto out;
9019                 }
9020
9021                 /*
9022                  * KVM_REQ_HV_STIMER has to be processed after
9023                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
9024                  * depend on the guest clock being up-to-date
9025                  */
9026                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
9027                         kvm_hv_process_stimers(vcpu);
9028                 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
9029                         kvm_vcpu_update_apicv(vcpu);
9030                 if (kvm_check_request(KVM_REQ_APF_READY, vcpu))
9031                         kvm_check_async_pf_completion(vcpu);
9032                 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED, vcpu))
9033                         static_call(kvm_x86_msr_filter_changed)(vcpu);
9034
9035                 if (kvm_check_request(KVM_REQ_UPDATE_CPU_DIRTY_LOGGING, vcpu))
9036                         static_call(kvm_x86_update_cpu_dirty_logging)(vcpu);
9037         }
9038
9039         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win ||
9040             kvm_xen_has_interrupt(vcpu)) {
9041                 ++vcpu->stat.req_event;
9042                 kvm_apic_accept_events(vcpu);
9043                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
9044                         r = 1;
9045                         goto out;
9046                 }
9047
9048                 inject_pending_event(vcpu, &req_immediate_exit);
9049                 if (req_int_win)
9050                         static_call(kvm_x86_enable_irq_window)(vcpu);
9051
9052                 if (kvm_lapic_enabled(vcpu)) {
9053                         update_cr8_intercept(vcpu);
9054                         kvm_lapic_sync_to_vapic(vcpu);
9055                 }
9056         }
9057
9058         r = kvm_mmu_reload(vcpu);
9059         if (unlikely(r)) {
9060                 goto cancel_injection;
9061         }
9062
9063         preempt_disable();
9064
9065         static_call(kvm_x86_prepare_guest_switch)(vcpu);
9066
9067         /*
9068          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
9069          * IPI are then delayed after guest entry, which ensures that they
9070          * result in virtual interrupt delivery.
9071          */
9072         local_irq_disable();
9073         vcpu->mode = IN_GUEST_MODE;
9074
9075         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9076
9077         /*
9078          * 1) We should set ->mode before checking ->requests.  Please see
9079          * the comment in kvm_vcpu_exiting_guest_mode().
9080          *
9081          * 2) For APICv, we should set ->mode before checking PID.ON. This
9082          * pairs with the memory barrier implicit in pi_test_and_set_on
9083          * (see vmx_deliver_posted_interrupt).
9084          *
9085          * 3) This also orders the write to mode from any reads to the page
9086          * tables done while the VCPU is running.  Please see the comment
9087          * in kvm_flush_remote_tlbs.
9088          */
9089         smp_mb__after_srcu_read_unlock();
9090
9091         /*
9092          * This handles the case where a posted interrupt was
9093          * notified with kvm_vcpu_kick.
9094          */
9095         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
9096                 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9097
9098         if (kvm_vcpu_exit_request(vcpu)) {
9099                 vcpu->mode = OUTSIDE_GUEST_MODE;
9100                 smp_wmb();
9101                 local_irq_enable();
9102                 preempt_enable();
9103                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9104                 r = 1;
9105                 goto cancel_injection;
9106         }
9107
9108         if (req_immediate_exit) {
9109                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9110                 static_call(kvm_x86_request_immediate_exit)(vcpu);
9111         }
9112
9113         fpregs_assert_state_consistent();
9114         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9115                 switch_fpu_return();
9116
9117         if (unlikely(vcpu->arch.switch_db_regs)) {
9118                 set_debugreg(0, 7);
9119                 set_debugreg(vcpu->arch.eff_db[0], 0);
9120                 set_debugreg(vcpu->arch.eff_db[1], 1);
9121                 set_debugreg(vcpu->arch.eff_db[2], 2);
9122                 set_debugreg(vcpu->arch.eff_db[3], 3);
9123                 set_debugreg(vcpu->arch.dr6, 6);
9124                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
9125         }
9126
9127         for (;;) {
9128                 exit_fastpath = static_call(kvm_x86_run)(vcpu);
9129                 if (likely(exit_fastpath != EXIT_FASTPATH_REENTER_GUEST))
9130                         break;
9131
9132                 if (unlikely(kvm_vcpu_exit_request(vcpu))) {
9133                         exit_fastpath = EXIT_FASTPATH_EXIT_HANDLED;
9134                         break;
9135                 }
9136
9137                 if (vcpu->arch.apicv_active)
9138                         static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9139         }
9140
9141         /*
9142          * Do this here before restoring debug registers on the host.  And
9143          * since we do this before handling the vmexit, a DR access vmexit
9144          * can (a) read the correct value of the debug registers, (b) set
9145          * KVM_DEBUGREG_WONT_EXIT again.
9146          */
9147         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
9148                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
9149                 static_call(kvm_x86_sync_dirty_debug_regs)(vcpu);
9150                 kvm_update_dr0123(vcpu);
9151                 kvm_update_dr7(vcpu);
9152                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
9153         }
9154
9155         /*
9156          * If the guest has used debug registers, at least dr7
9157          * will be disabled while returning to the host.
9158          * If we don't have active breakpoints in the host, we don't
9159          * care about the messed up debug address registers. But if
9160          * we have some of them active, restore the old state.
9161          */
9162         if (hw_breakpoint_active())
9163                 hw_breakpoint_restore();
9164
9165         vcpu->arch.last_vmentry_cpu = vcpu->cpu;
9166         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
9167
9168         vcpu->mode = OUTSIDE_GUEST_MODE;
9169         smp_wmb();
9170
9171         static_call(kvm_x86_handle_exit_irqoff)(vcpu);
9172
9173         /*
9174          * Consume any pending interrupts, including the possible source of
9175          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
9176          * An instruction is required after local_irq_enable() to fully unblock
9177          * interrupts on processors that implement an interrupt shadow, the
9178          * stat.exits increment will do nicely.
9179          */
9180         kvm_before_interrupt(vcpu);
9181         local_irq_enable();
9182         ++vcpu->stat.exits;
9183         local_irq_disable();
9184         kvm_after_interrupt(vcpu);
9185
9186         if (lapic_in_kernel(vcpu)) {
9187                 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
9188                 if (delta != S64_MIN) {
9189                         trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
9190                         vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
9191                 }
9192         }
9193
9194         local_irq_enable();
9195         preempt_enable();
9196
9197         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9198
9199         /*
9200          * Profile KVM exit RIPs:
9201          */
9202         if (unlikely(prof_on == KVM_PROFILING)) {
9203                 unsigned long rip = kvm_rip_read(vcpu);
9204                 profile_hit(KVM_PROFILING, (void *)rip);
9205         }
9206
9207         if (unlikely(vcpu->arch.tsc_always_catchup))
9208                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
9209
9210         if (vcpu->arch.apic_attention)
9211                 kvm_lapic_sync_from_vapic(vcpu);
9212
9213         r = static_call(kvm_x86_handle_exit)(vcpu, exit_fastpath);
9214         return r;
9215
9216 cancel_injection:
9217         if (req_immediate_exit)
9218                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9219         static_call(kvm_x86_cancel_injection)(vcpu);
9220         if (unlikely(vcpu->arch.apic_attention))
9221                 kvm_lapic_sync_from_vapic(vcpu);
9222 out:
9223         return r;
9224 }
9225
9226 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
9227 {
9228         if (!kvm_arch_vcpu_runnable(vcpu) &&
9229             (!kvm_x86_ops.pre_block || static_call(kvm_x86_pre_block)(vcpu) == 0)) {
9230                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9231                 kvm_vcpu_block(vcpu);
9232                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9233
9234                 if (kvm_x86_ops.post_block)
9235                         static_call(kvm_x86_post_block)(vcpu);
9236
9237                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
9238                         return 1;
9239         }
9240
9241         kvm_apic_accept_events(vcpu);
9242         switch(vcpu->arch.mp_state) {
9243         case KVM_MP_STATE_HALTED:
9244         case KVM_MP_STATE_AP_RESET_HOLD:
9245                 vcpu->arch.pv.pv_unhalted = false;
9246                 vcpu->arch.mp_state =
9247                         KVM_MP_STATE_RUNNABLE;
9248                 fallthrough;
9249         case KVM_MP_STATE_RUNNABLE:
9250                 vcpu->arch.apf.halted = false;
9251                 break;
9252         case KVM_MP_STATE_INIT_RECEIVED:
9253                 break;
9254         default:
9255                 return -EINTR;
9256         }
9257         return 1;
9258 }
9259
9260 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
9261 {
9262         if (is_guest_mode(vcpu))
9263                 kvm_x86_ops.nested_ops->check_events(vcpu);
9264
9265         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
9266                 !vcpu->arch.apf.halted);
9267 }
9268
9269 static int vcpu_run(struct kvm_vcpu *vcpu)
9270 {
9271         int r;
9272         struct kvm *kvm = vcpu->kvm;
9273
9274         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9275         vcpu->arch.l1tf_flush_l1d = true;
9276
9277         for (;;) {
9278                 if (kvm_vcpu_running(vcpu)) {
9279                         r = vcpu_enter_guest(vcpu);
9280                 } else {
9281                         r = vcpu_block(kvm, vcpu);
9282                 }
9283
9284                 if (r <= 0)
9285                         break;
9286
9287                 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
9288                 if (kvm_cpu_has_pending_timer(vcpu))
9289                         kvm_inject_pending_timer_irqs(vcpu);
9290
9291                 if (dm_request_for_irq_injection(vcpu) &&
9292                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
9293                         r = 0;
9294                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
9295                         ++vcpu->stat.request_irq_exits;
9296                         break;
9297                 }
9298
9299                 if (__xfer_to_guest_mode_work_pending()) {
9300                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9301                         r = xfer_to_guest_mode_handle_work(vcpu);
9302                         if (r)
9303                                 return r;
9304                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9305                 }
9306         }
9307
9308         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9309
9310         return r;
9311 }
9312
9313 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
9314 {
9315         int r;
9316
9317         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9318         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
9319         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9320         return r;
9321 }
9322
9323 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
9324 {
9325         BUG_ON(!vcpu->arch.pio.count);
9326
9327         return complete_emulated_io(vcpu);
9328 }
9329
9330 /*
9331  * Implements the following, as a state machine:
9332  *
9333  * read:
9334  *   for each fragment
9335  *     for each mmio piece in the fragment
9336  *       write gpa, len
9337  *       exit
9338  *       copy data
9339  *   execute insn
9340  *
9341  * write:
9342  *   for each fragment
9343  *     for each mmio piece in the fragment
9344  *       write gpa, len
9345  *       copy data
9346  *       exit
9347  */
9348 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
9349 {
9350         struct kvm_run *run = vcpu->run;
9351         struct kvm_mmio_fragment *frag;
9352         unsigned len;
9353
9354         BUG_ON(!vcpu->mmio_needed);
9355
9356         /* Complete previous fragment */
9357         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
9358         len = min(8u, frag->len);
9359         if (!vcpu->mmio_is_write)
9360                 memcpy(frag->data, run->mmio.data, len);
9361
9362         if (frag->len <= 8) {
9363                 /* Switch to the next fragment. */
9364                 frag++;
9365                 vcpu->mmio_cur_fragment++;
9366         } else {
9367                 /* Go forward to the next mmio piece. */
9368                 frag->data += len;
9369                 frag->gpa += len;
9370                 frag->len -= len;
9371         }
9372
9373         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
9374                 vcpu->mmio_needed = 0;
9375
9376                 /* FIXME: return into emulator if single-stepping.  */
9377                 if (vcpu->mmio_is_write)
9378                         return 1;
9379                 vcpu->mmio_read_completed = 1;
9380                 return complete_emulated_io(vcpu);
9381         }
9382
9383         run->exit_reason = KVM_EXIT_MMIO;
9384         run->mmio.phys_addr = frag->gpa;
9385         if (vcpu->mmio_is_write)
9386                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
9387         run->mmio.len = min(8u, frag->len);
9388         run->mmio.is_write = vcpu->mmio_is_write;
9389         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
9390         return 0;
9391 }
9392
9393 static void kvm_save_current_fpu(struct fpu *fpu)
9394 {
9395         /*
9396          * If the target FPU state is not resident in the CPU registers, just
9397          * memcpy() from current, else save CPU state directly to the target.
9398          */
9399         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9400                 memcpy(&fpu->state, &current->thread.fpu.state,
9401                        fpu_kernel_xstate_size);
9402         else
9403                 copy_fpregs_to_fpstate(fpu);
9404 }
9405
9406 /* Swap (qemu) user FPU context for the guest FPU context. */
9407 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
9408 {
9409         fpregs_lock();
9410
9411         kvm_save_current_fpu(vcpu->arch.user_fpu);
9412
9413         /*
9414          * Guests with protected state can't have it set by the hypervisor,
9415          * so skip trying to set it.
9416          */
9417         if (vcpu->arch.guest_fpu)
9418                 /* PKRU is separately restored in kvm_x86_ops.run. */
9419                 __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu->state,
9420                                         ~XFEATURE_MASK_PKRU);
9421
9422         fpregs_mark_activate();
9423         fpregs_unlock();
9424
9425         trace_kvm_fpu(1);
9426 }
9427
9428 /* When vcpu_run ends, restore user space FPU context. */
9429 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
9430 {
9431         fpregs_lock();
9432
9433         /*
9434          * Guests with protected state can't have it read by the hypervisor,
9435          * so skip trying to save it.
9436          */
9437         if (vcpu->arch.guest_fpu)
9438                 kvm_save_current_fpu(vcpu->arch.guest_fpu);
9439
9440         copy_kernel_to_fpregs(&vcpu->arch.user_fpu->state);
9441
9442         fpregs_mark_activate();
9443         fpregs_unlock();
9444
9445         ++vcpu->stat.fpu_reload;
9446         trace_kvm_fpu(0);
9447 }
9448
9449 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
9450 {
9451         struct kvm_run *kvm_run = vcpu->run;
9452         int r;
9453
9454         vcpu_load(vcpu);
9455         kvm_sigset_activate(vcpu);
9456         kvm_run->flags = 0;
9457         kvm_load_guest_fpu(vcpu);
9458
9459         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
9460                 if (kvm_run->immediate_exit) {
9461                         r = -EINTR;
9462                         goto out;
9463                 }
9464                 kvm_vcpu_block(vcpu);
9465                 kvm_apic_accept_events(vcpu);
9466                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
9467                 r = -EAGAIN;
9468                 if (signal_pending(current)) {
9469                         r = -EINTR;
9470                         kvm_run->exit_reason = KVM_EXIT_INTR;
9471                         ++vcpu->stat.signal_exits;
9472                 }
9473                 goto out;
9474         }
9475
9476         if (kvm_run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
9477                 r = -EINVAL;
9478                 goto out;
9479         }
9480
9481         if (kvm_run->kvm_dirty_regs) {
9482                 r = sync_regs(vcpu);
9483                 if (r != 0)
9484                         goto out;
9485         }
9486
9487         /* re-sync apic's tpr */
9488         if (!lapic_in_kernel(vcpu)) {
9489                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
9490                         r = -EINVAL;
9491                         goto out;
9492                 }
9493         }
9494
9495         if (unlikely(vcpu->arch.complete_userspace_io)) {
9496                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
9497                 vcpu->arch.complete_userspace_io = NULL;
9498                 r = cui(vcpu);
9499                 if (r <= 0)
9500                         goto out;
9501         } else
9502                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
9503
9504         if (kvm_run->immediate_exit)
9505                 r = -EINTR;
9506         else
9507                 r = vcpu_run(vcpu);
9508
9509 out:
9510         kvm_put_guest_fpu(vcpu);
9511         if (kvm_run->kvm_valid_regs)
9512                 store_regs(vcpu);
9513         post_kvm_run_save(vcpu);
9514         kvm_sigset_deactivate(vcpu);
9515
9516         vcpu_put(vcpu);
9517         return r;
9518 }
9519
9520 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9521 {
9522         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
9523                 /*
9524                  * We are here if userspace calls get_regs() in the middle of
9525                  * instruction emulation. Registers state needs to be copied
9526                  * back from emulation context to vcpu. Userspace shouldn't do
9527                  * that usually, but some bad designed PV devices (vmware
9528                  * backdoor interface) need this to work
9529                  */
9530                 emulator_writeback_register_cache(vcpu->arch.emulate_ctxt);
9531                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
9532         }
9533         regs->rax = kvm_rax_read(vcpu);
9534         regs->rbx = kvm_rbx_read(vcpu);
9535         regs->rcx = kvm_rcx_read(vcpu);
9536         regs->rdx = kvm_rdx_read(vcpu);
9537         regs->rsi = kvm_rsi_read(vcpu);
9538         regs->rdi = kvm_rdi_read(vcpu);
9539         regs->rsp = kvm_rsp_read(vcpu);
9540         regs->rbp = kvm_rbp_read(vcpu);
9541 #ifdef CONFIG_X86_64
9542         regs->r8 = kvm_r8_read(vcpu);
9543         regs->r9 = kvm_r9_read(vcpu);
9544         regs->r10 = kvm_r10_read(vcpu);
9545         regs->r11 = kvm_r11_read(vcpu);
9546         regs->r12 = kvm_r12_read(vcpu);
9547         regs->r13 = kvm_r13_read(vcpu);
9548         regs->r14 = kvm_r14_read(vcpu);
9549         regs->r15 = kvm_r15_read(vcpu);
9550 #endif
9551
9552         regs->rip = kvm_rip_read(vcpu);
9553         regs->rflags = kvm_get_rflags(vcpu);
9554 }
9555
9556 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9557 {
9558         vcpu_load(vcpu);
9559         __get_regs(vcpu, regs);
9560         vcpu_put(vcpu);
9561         return 0;
9562 }
9563
9564 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9565 {
9566         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
9567         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
9568
9569         kvm_rax_write(vcpu, regs->rax);
9570         kvm_rbx_write(vcpu, regs->rbx);
9571         kvm_rcx_write(vcpu, regs->rcx);
9572         kvm_rdx_write(vcpu, regs->rdx);
9573         kvm_rsi_write(vcpu, regs->rsi);
9574         kvm_rdi_write(vcpu, regs->rdi);
9575         kvm_rsp_write(vcpu, regs->rsp);
9576         kvm_rbp_write(vcpu, regs->rbp);
9577 #ifdef CONFIG_X86_64
9578         kvm_r8_write(vcpu, regs->r8);
9579         kvm_r9_write(vcpu, regs->r9);
9580         kvm_r10_write(vcpu, regs->r10);
9581         kvm_r11_write(vcpu, regs->r11);
9582         kvm_r12_write(vcpu, regs->r12);
9583         kvm_r13_write(vcpu, regs->r13);
9584         kvm_r14_write(vcpu, regs->r14);
9585         kvm_r15_write(vcpu, regs->r15);
9586 #endif
9587
9588         kvm_rip_write(vcpu, regs->rip);
9589         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
9590
9591         vcpu->arch.exception.pending = false;
9592
9593         kvm_make_request(KVM_REQ_EVENT, vcpu);
9594 }
9595
9596 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9597 {
9598         vcpu_load(vcpu);
9599         __set_regs(vcpu, regs);
9600         vcpu_put(vcpu);
9601         return 0;
9602 }
9603
9604 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
9605 {
9606         struct kvm_segment cs;
9607
9608         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
9609         *db = cs.db;
9610         *l = cs.l;
9611 }
9612 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
9613
9614 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9615 {
9616         struct desc_ptr dt;
9617
9618         if (vcpu->arch.guest_state_protected)
9619                 goto skip_protected_regs;
9620
9621         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
9622         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
9623         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
9624         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
9625         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
9626         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
9627
9628         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
9629         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
9630
9631         static_call(kvm_x86_get_idt)(vcpu, &dt);
9632         sregs->idt.limit = dt.size;
9633         sregs->idt.base = dt.address;
9634         static_call(kvm_x86_get_gdt)(vcpu, &dt);
9635         sregs->gdt.limit = dt.size;
9636         sregs->gdt.base = dt.address;
9637
9638         sregs->cr2 = vcpu->arch.cr2;
9639         sregs->cr3 = kvm_read_cr3(vcpu);
9640
9641 skip_protected_regs:
9642         sregs->cr0 = kvm_read_cr0(vcpu);
9643         sregs->cr4 = kvm_read_cr4(vcpu);
9644         sregs->cr8 = kvm_get_cr8(vcpu);
9645         sregs->efer = vcpu->arch.efer;
9646         sregs->apic_base = kvm_get_apic_base(vcpu);
9647
9648         memset(sregs->interrupt_bitmap, 0, sizeof(sregs->interrupt_bitmap));
9649
9650         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
9651                 set_bit(vcpu->arch.interrupt.nr,
9652                         (unsigned long *)sregs->interrupt_bitmap);
9653 }
9654
9655 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
9656                                   struct kvm_sregs *sregs)
9657 {
9658         vcpu_load(vcpu);
9659         __get_sregs(vcpu, sregs);
9660         vcpu_put(vcpu);
9661         return 0;
9662 }
9663
9664 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
9665                                     struct kvm_mp_state *mp_state)
9666 {
9667         vcpu_load(vcpu);
9668         if (kvm_mpx_supported())
9669                 kvm_load_guest_fpu(vcpu);
9670
9671         kvm_apic_accept_events(vcpu);
9672         if ((vcpu->arch.mp_state == KVM_MP_STATE_HALTED ||
9673              vcpu->arch.mp_state == KVM_MP_STATE_AP_RESET_HOLD) &&
9674             vcpu->arch.pv.pv_unhalted)
9675                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
9676         else
9677                 mp_state->mp_state = vcpu->arch.mp_state;
9678
9679         if (kvm_mpx_supported())
9680                 kvm_put_guest_fpu(vcpu);
9681         vcpu_put(vcpu);
9682         return 0;
9683 }
9684
9685 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
9686                                     struct kvm_mp_state *mp_state)
9687 {
9688         int ret = -EINVAL;
9689
9690         vcpu_load(vcpu);
9691
9692         if (!lapic_in_kernel(vcpu) &&
9693             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
9694                 goto out;
9695
9696         /*
9697          * KVM_MP_STATE_INIT_RECEIVED means the processor is in
9698          * INIT state; latched init should be reported using
9699          * KVM_SET_VCPU_EVENTS, so reject it here.
9700          */
9701         if ((kvm_vcpu_latch_init(vcpu) || vcpu->arch.smi_pending) &&
9702             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
9703              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
9704                 goto out;
9705
9706         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
9707                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
9708                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
9709         } else
9710                 vcpu->arch.mp_state = mp_state->mp_state;
9711         kvm_make_request(KVM_REQ_EVENT, vcpu);
9712
9713         ret = 0;
9714 out:
9715         vcpu_put(vcpu);
9716         return ret;
9717 }
9718
9719 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
9720                     int reason, bool has_error_code, u32 error_code)
9721 {
9722         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
9723         int ret;
9724
9725         init_emulate_ctxt(vcpu);
9726
9727         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
9728                                    has_error_code, error_code);
9729         if (ret) {
9730                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
9731                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
9732                 vcpu->run->internal.ndata = 0;
9733                 return 0;
9734         }
9735
9736         kvm_rip_write(vcpu, ctxt->eip);
9737         kvm_set_rflags(vcpu, ctxt->eflags);
9738         return 1;
9739 }
9740 EXPORT_SYMBOL_GPL(kvm_task_switch);
9741
9742 static bool kvm_is_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9743 {
9744         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
9745                 /*
9746                  * When EFER.LME and CR0.PG are set, the processor is in
9747                  * 64-bit mode (though maybe in a 32-bit code segment).
9748                  * CR4.PAE and EFER.LMA must be set.
9749                  */
9750                 if (!(sregs->cr4 & X86_CR4_PAE) || !(sregs->efer & EFER_LMA))
9751                         return false;
9752                 if (kvm_vcpu_is_illegal_gpa(vcpu, sregs->cr3))
9753                         return false;
9754         } else {
9755                 /*
9756                  * Not in 64-bit mode: EFER.LMA is clear and the code
9757                  * segment cannot be 64-bit.
9758                  */
9759                 if (sregs->efer & EFER_LMA || sregs->cs.l)
9760                         return false;
9761         }
9762
9763         return kvm_is_valid_cr4(vcpu, sregs->cr4);
9764 }
9765
9766 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9767 {
9768         struct msr_data apic_base_msr;
9769         int mmu_reset_needed = 0;
9770         int pending_vec, max_bits, idx;
9771         struct desc_ptr dt;
9772         int ret = -EINVAL;
9773
9774         if (!kvm_is_valid_sregs(vcpu, sregs))
9775                 goto out;
9776
9777         apic_base_msr.data = sregs->apic_base;
9778         apic_base_msr.host_initiated = true;
9779         if (kvm_set_apic_base(vcpu, &apic_base_msr))
9780                 goto out;
9781
9782         if (vcpu->arch.guest_state_protected)
9783                 goto skip_protected_regs;
9784
9785         dt.size = sregs->idt.limit;
9786         dt.address = sregs->idt.base;
9787         static_call(kvm_x86_set_idt)(vcpu, &dt);
9788         dt.size = sregs->gdt.limit;
9789         dt.address = sregs->gdt.base;
9790         static_call(kvm_x86_set_gdt)(vcpu, &dt);
9791
9792         vcpu->arch.cr2 = sregs->cr2;
9793         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
9794         vcpu->arch.cr3 = sregs->cr3;
9795         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
9796
9797         kvm_set_cr8(vcpu, sregs->cr8);
9798
9799         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
9800         static_call(kvm_x86_set_efer)(vcpu, sregs->efer);
9801
9802         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
9803         static_call(kvm_x86_set_cr0)(vcpu, sregs->cr0);
9804         vcpu->arch.cr0 = sregs->cr0;
9805
9806         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
9807         static_call(kvm_x86_set_cr4)(vcpu, sregs->cr4);
9808
9809         idx = srcu_read_lock(&vcpu->kvm->srcu);
9810         if (is_pae_paging(vcpu)) {
9811                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
9812                 mmu_reset_needed = 1;
9813         }
9814         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9815
9816         if (mmu_reset_needed)
9817                 kvm_mmu_reset_context(vcpu);
9818
9819         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
9820         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
9821         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
9822         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
9823         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
9824         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
9825
9826         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
9827         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
9828
9829         update_cr8_intercept(vcpu);
9830
9831         /* Older userspace won't unhalt the vcpu on reset. */
9832         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
9833             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
9834             !is_protmode(vcpu))
9835                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9836
9837 skip_protected_regs:
9838         max_bits = KVM_NR_INTERRUPTS;
9839         pending_vec = find_first_bit(
9840                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
9841         if (pending_vec < max_bits) {
9842                 kvm_queue_interrupt(vcpu, pending_vec, false);
9843                 pr_debug("Set back pending irq %d\n", pending_vec);
9844         }
9845
9846         kvm_make_request(KVM_REQ_EVENT, vcpu);
9847
9848         ret = 0;
9849 out:
9850         return ret;
9851 }
9852
9853 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
9854                                   struct kvm_sregs *sregs)
9855 {
9856         int ret;
9857
9858         vcpu_load(vcpu);
9859         ret = __set_sregs(vcpu, sregs);
9860         vcpu_put(vcpu);
9861         return ret;
9862 }
9863
9864 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
9865                                         struct kvm_guest_debug *dbg)
9866 {
9867         unsigned long rflags;
9868         int i, r;
9869
9870         if (vcpu->arch.guest_state_protected)
9871                 return -EINVAL;
9872
9873         vcpu_load(vcpu);
9874
9875         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
9876                 r = -EBUSY;
9877                 if (vcpu->arch.exception.pending)
9878                         goto out;
9879                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
9880                         kvm_queue_exception(vcpu, DB_VECTOR);
9881                 else
9882                         kvm_queue_exception(vcpu, BP_VECTOR);
9883         }
9884
9885         /*
9886          * Read rflags as long as potentially injected trace flags are still
9887          * filtered out.
9888          */
9889         rflags = kvm_get_rflags(vcpu);
9890
9891         vcpu->guest_debug = dbg->control;
9892         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
9893                 vcpu->guest_debug = 0;
9894
9895         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
9896                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
9897                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
9898                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
9899         } else {
9900                 for (i = 0; i < KVM_NR_DB_REGS; i++)
9901                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
9902         }
9903         kvm_update_dr7(vcpu);
9904
9905         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
9906                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
9907                         get_segment_base(vcpu, VCPU_SREG_CS);
9908
9909         /*
9910          * Trigger an rflags update that will inject or remove the trace
9911          * flags.
9912          */
9913         kvm_set_rflags(vcpu, rflags);
9914
9915         static_call(kvm_x86_update_exception_bitmap)(vcpu);
9916
9917         r = 0;
9918
9919 out:
9920         vcpu_put(vcpu);
9921         return r;
9922 }
9923
9924 /*
9925  * Translate a guest virtual address to a guest physical address.
9926  */
9927 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
9928                                     struct kvm_translation *tr)
9929 {
9930         unsigned long vaddr = tr->linear_address;
9931         gpa_t gpa;
9932         int idx;
9933
9934         vcpu_load(vcpu);
9935
9936         idx = srcu_read_lock(&vcpu->kvm->srcu);
9937         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
9938         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9939         tr->physical_address = gpa;
9940         tr->valid = gpa != UNMAPPED_GVA;
9941         tr->writeable = 1;
9942         tr->usermode = 0;
9943
9944         vcpu_put(vcpu);
9945         return 0;
9946 }
9947
9948 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
9949 {
9950         struct fxregs_state *fxsave;
9951
9952         if (!vcpu->arch.guest_fpu)
9953                 return 0;
9954
9955         vcpu_load(vcpu);
9956
9957         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
9958         memcpy(fpu->fpr, fxsave->st_space, 128);
9959         fpu->fcw = fxsave->cwd;
9960         fpu->fsw = fxsave->swd;
9961         fpu->ftwx = fxsave->twd;
9962         fpu->last_opcode = fxsave->fop;
9963         fpu->last_ip = fxsave->rip;
9964         fpu->last_dp = fxsave->rdp;
9965         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
9966
9967         vcpu_put(vcpu);
9968         return 0;
9969 }
9970
9971 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
9972 {
9973         struct fxregs_state *fxsave;
9974
9975         if (!vcpu->arch.guest_fpu)
9976                 return 0;
9977
9978         vcpu_load(vcpu);
9979
9980         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
9981
9982         memcpy(fxsave->st_space, fpu->fpr, 128);
9983         fxsave->cwd = fpu->fcw;
9984         fxsave->swd = fpu->fsw;
9985         fxsave->twd = fpu->ftwx;
9986         fxsave->fop = fpu->last_opcode;
9987         fxsave->rip = fpu->last_ip;
9988         fxsave->rdp = fpu->last_dp;
9989         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
9990
9991         vcpu_put(vcpu);
9992         return 0;
9993 }
9994
9995 static void store_regs(struct kvm_vcpu *vcpu)
9996 {
9997         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
9998
9999         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
10000                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
10001
10002         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
10003                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
10004
10005         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
10006                 kvm_vcpu_ioctl_x86_get_vcpu_events(
10007                                 vcpu, &vcpu->run->s.regs.events);
10008 }
10009
10010 static int sync_regs(struct kvm_vcpu *vcpu)
10011 {
10012         if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
10013                 return -EINVAL;
10014
10015         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
10016                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
10017                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
10018         }
10019         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
10020                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
10021                         return -EINVAL;
10022                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
10023         }
10024         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
10025                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
10026                                 vcpu, &vcpu->run->s.regs.events))
10027                         return -EINVAL;
10028                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
10029         }
10030
10031         return 0;
10032 }
10033
10034 static void fx_init(struct kvm_vcpu *vcpu)
10035 {
10036         if (!vcpu->arch.guest_fpu)
10037                 return;
10038
10039         fpstate_init(&vcpu->arch.guest_fpu->state);
10040         if (boot_cpu_has(X86_FEATURE_XSAVES))
10041                 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
10042                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
10043
10044         /*
10045          * Ensure guest xcr0 is valid for loading
10046          */
10047         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10048
10049         vcpu->arch.cr0 |= X86_CR0_ET;
10050 }
10051
10052 void kvm_free_guest_fpu(struct kvm_vcpu *vcpu)
10053 {
10054         if (vcpu->arch.guest_fpu) {
10055                 kmem_cache_free(x86_fpu_cache, vcpu->arch.guest_fpu);
10056                 vcpu->arch.guest_fpu = NULL;
10057         }
10058 }
10059 EXPORT_SYMBOL_GPL(kvm_free_guest_fpu);
10060
10061 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
10062 {
10063         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
10064                 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
10065                              "guest TSC will not be reliable\n");
10066
10067         return 0;
10068 }
10069
10070 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
10071 {
10072         struct page *page;
10073         int r;
10074
10075         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
10076                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10077         else
10078                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
10079
10080         kvm_set_tsc_khz(vcpu, max_tsc_khz);
10081
10082         r = kvm_mmu_create(vcpu);
10083         if (r < 0)
10084                 return r;
10085
10086         if (irqchip_in_kernel(vcpu->kvm)) {
10087                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
10088                 if (r < 0)
10089                         goto fail_mmu_destroy;
10090                 if (kvm_apicv_activated(vcpu->kvm))
10091                         vcpu->arch.apicv_active = true;
10092         } else
10093                 static_branch_inc(&kvm_has_noapic_vcpu);
10094
10095         r = -ENOMEM;
10096
10097         page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO);
10098         if (!page)
10099                 goto fail_free_lapic;
10100         vcpu->arch.pio_data = page_address(page);
10101
10102         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
10103                                        GFP_KERNEL_ACCOUNT);
10104         if (!vcpu->arch.mce_banks)
10105                 goto fail_free_pio_data;
10106         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
10107
10108         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
10109                                 GFP_KERNEL_ACCOUNT))
10110                 goto fail_free_mce_banks;
10111
10112         if (!alloc_emulate_ctxt(vcpu))
10113                 goto free_wbinvd_dirty_mask;
10114
10115         vcpu->arch.user_fpu = kmem_cache_zalloc(x86_fpu_cache,
10116                                                 GFP_KERNEL_ACCOUNT);
10117         if (!vcpu->arch.user_fpu) {
10118                 pr_err("kvm: failed to allocate userspace's fpu\n");
10119                 goto free_emulate_ctxt;
10120         }
10121
10122         vcpu->arch.guest_fpu = kmem_cache_zalloc(x86_fpu_cache,
10123                                                  GFP_KERNEL_ACCOUNT);
10124         if (!vcpu->arch.guest_fpu) {
10125                 pr_err("kvm: failed to allocate vcpu's fpu\n");
10126                 goto free_user_fpu;
10127         }
10128         fx_init(vcpu);
10129
10130         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
10131         vcpu->arch.reserved_gpa_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu);
10132
10133         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
10134
10135         kvm_async_pf_hash_reset(vcpu);
10136         kvm_pmu_init(vcpu);
10137
10138         vcpu->arch.pending_external_vector = -1;
10139         vcpu->arch.preempted_in_kernel = false;
10140
10141         r = static_call(kvm_x86_vcpu_create)(vcpu);
10142         if (r)
10143                 goto free_guest_fpu;
10144
10145         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
10146         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
10147         kvm_vcpu_mtrr_init(vcpu);
10148         vcpu_load(vcpu);
10149         kvm_vcpu_reset(vcpu, false);
10150         kvm_init_mmu(vcpu, false);
10151         vcpu_put(vcpu);
10152         return 0;
10153
10154 free_guest_fpu:
10155         kvm_free_guest_fpu(vcpu);
10156 free_user_fpu:
10157         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
10158 free_emulate_ctxt:
10159         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10160 free_wbinvd_dirty_mask:
10161         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10162 fail_free_mce_banks:
10163         kfree(vcpu->arch.mce_banks);
10164 fail_free_pio_data:
10165         free_page((unsigned long)vcpu->arch.pio_data);
10166 fail_free_lapic:
10167         kvm_free_lapic(vcpu);
10168 fail_mmu_destroy:
10169         kvm_mmu_destroy(vcpu);
10170         return r;
10171 }
10172
10173 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
10174 {
10175         struct kvm *kvm = vcpu->kvm;
10176
10177         if (mutex_lock_killable(&vcpu->mutex))
10178                 return;
10179         vcpu_load(vcpu);
10180         kvm_synchronize_tsc(vcpu, 0);
10181         vcpu_put(vcpu);
10182
10183         /* poll control enabled by default */
10184         vcpu->arch.msr_kvm_poll_control = 1;
10185
10186         mutex_unlock(&vcpu->mutex);
10187
10188         if (kvmclock_periodic_sync && vcpu->vcpu_idx == 0)
10189                 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
10190                                                 KVMCLOCK_SYNC_PERIOD);
10191 }
10192
10193 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
10194 {
10195         struct gfn_to_pfn_cache *cache = &vcpu->arch.st.cache;
10196         int idx;
10197
10198         kvm_release_pfn(cache->pfn, cache->dirty, cache);
10199
10200         kvmclock_reset(vcpu);
10201
10202         static_call(kvm_x86_vcpu_free)(vcpu);
10203
10204         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10205         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10206         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
10207         kvm_free_guest_fpu(vcpu);
10208
10209         kvm_hv_vcpu_uninit(vcpu);
10210         kvm_pmu_destroy(vcpu);
10211         kfree(vcpu->arch.mce_banks);
10212         kvm_free_lapic(vcpu);
10213         idx = srcu_read_lock(&vcpu->kvm->srcu);
10214         kvm_mmu_destroy(vcpu);
10215         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10216         free_page((unsigned long)vcpu->arch.pio_data);
10217         kvfree(vcpu->arch.cpuid_entries);
10218         if (!lapic_in_kernel(vcpu))
10219                 static_branch_dec(&kvm_has_noapic_vcpu);
10220 }
10221
10222 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
10223 {
10224         kvm_lapic_reset(vcpu, init_event);
10225
10226         vcpu->arch.hflags = 0;
10227
10228         vcpu->arch.smi_pending = 0;
10229         vcpu->arch.smi_count = 0;
10230         atomic_set(&vcpu->arch.nmi_queued, 0);
10231         vcpu->arch.nmi_pending = 0;
10232         vcpu->arch.nmi_injected = false;
10233         kvm_clear_interrupt_queue(vcpu);
10234         kvm_clear_exception_queue(vcpu);
10235
10236         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
10237         kvm_update_dr0123(vcpu);
10238         vcpu->arch.dr6 = DR6_ACTIVE_LOW;
10239         vcpu->arch.dr7 = DR7_FIXED_1;
10240         kvm_update_dr7(vcpu);
10241
10242         vcpu->arch.cr2 = 0;
10243
10244         kvm_make_request(KVM_REQ_EVENT, vcpu);
10245         vcpu->arch.apf.msr_en_val = 0;
10246         vcpu->arch.apf.msr_int_val = 0;
10247         vcpu->arch.st.msr_val = 0;
10248
10249         kvmclock_reset(vcpu);
10250
10251         kvm_clear_async_pf_completion_queue(vcpu);
10252         kvm_async_pf_hash_reset(vcpu);
10253         vcpu->arch.apf.halted = false;
10254
10255         if (vcpu->arch.guest_fpu && kvm_mpx_supported()) {
10256                 void *mpx_state_buffer;
10257
10258                 /*
10259                  * To avoid have the INIT path from kvm_apic_has_events() that be
10260                  * called with loaded FPU and does not let userspace fix the state.
10261                  */
10262                 if (init_event)
10263                         kvm_put_guest_fpu(vcpu);
10264                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10265                                         XFEATURE_BNDREGS);
10266                 if (mpx_state_buffer)
10267                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
10268                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10269                                         XFEATURE_BNDCSR);
10270                 if (mpx_state_buffer)
10271                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
10272                 if (init_event)
10273                         kvm_load_guest_fpu(vcpu);
10274         }
10275
10276         if (!init_event) {
10277                 kvm_pmu_reset(vcpu);
10278                 vcpu->arch.smbase = 0x30000;
10279
10280                 vcpu->arch.msr_misc_features_enables = 0;
10281
10282                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10283         }
10284
10285         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
10286         vcpu->arch.regs_avail = ~0;
10287         vcpu->arch.regs_dirty = ~0;
10288
10289         vcpu->arch.ia32_xss = 0;
10290
10291         static_call(kvm_x86_vcpu_reset)(vcpu, init_event);
10292 }
10293
10294 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
10295 {
10296         struct kvm_segment cs;
10297
10298         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
10299         cs.selector = vector << 8;
10300         cs.base = vector << 12;
10301         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
10302         kvm_rip_write(vcpu, 0);
10303 }
10304 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector);
10305
10306 int kvm_arch_hardware_enable(void)
10307 {
10308         struct kvm *kvm;
10309         struct kvm_vcpu *vcpu;
10310         int i;
10311         int ret;
10312         u64 local_tsc;
10313         u64 max_tsc = 0;
10314         bool stable, backwards_tsc = false;
10315
10316         kvm_user_return_msr_cpu_online();
10317         ret = static_call(kvm_x86_hardware_enable)();
10318         if (ret != 0)
10319                 return ret;
10320
10321         local_tsc = rdtsc();
10322         stable = !kvm_check_tsc_unstable();
10323         list_for_each_entry(kvm, &vm_list, vm_list) {
10324                 kvm_for_each_vcpu(i, vcpu, kvm) {
10325                         if (!stable && vcpu->cpu == smp_processor_id())
10326                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
10327                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
10328                                 backwards_tsc = true;
10329                                 if (vcpu->arch.last_host_tsc > max_tsc)
10330                                         max_tsc = vcpu->arch.last_host_tsc;
10331                         }
10332                 }
10333         }
10334
10335         /*
10336          * Sometimes, even reliable TSCs go backwards.  This happens on
10337          * platforms that reset TSC during suspend or hibernate actions, but
10338          * maintain synchronization.  We must compensate.  Fortunately, we can
10339          * detect that condition here, which happens early in CPU bringup,
10340          * before any KVM threads can be running.  Unfortunately, we can't
10341          * bring the TSCs fully up to date with real time, as we aren't yet far
10342          * enough into CPU bringup that we know how much real time has actually
10343          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
10344          * variables that haven't been updated yet.
10345          *
10346          * So we simply find the maximum observed TSC above, then record the
10347          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
10348          * the adjustment will be applied.  Note that we accumulate
10349          * adjustments, in case multiple suspend cycles happen before some VCPU
10350          * gets a chance to run again.  In the event that no KVM threads get a
10351          * chance to run, we will miss the entire elapsed period, as we'll have
10352          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
10353          * loose cycle time.  This isn't too big a deal, since the loss will be
10354          * uniform across all VCPUs (not to mention the scenario is extremely
10355          * unlikely). It is possible that a second hibernate recovery happens
10356          * much faster than a first, causing the observed TSC here to be
10357          * smaller; this would require additional padding adjustment, which is
10358          * why we set last_host_tsc to the local tsc observed here.
10359          *
10360          * N.B. - this code below runs only on platforms with reliable TSC,
10361          * as that is the only way backwards_tsc is set above.  Also note
10362          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
10363          * have the same delta_cyc adjustment applied if backwards_tsc
10364          * is detected.  Note further, this adjustment is only done once,
10365          * as we reset last_host_tsc on all VCPUs to stop this from being
10366          * called multiple times (one for each physical CPU bringup).
10367          *
10368          * Platforms with unreliable TSCs don't have to deal with this, they
10369          * will be compensated by the logic in vcpu_load, which sets the TSC to
10370          * catchup mode.  This will catchup all VCPUs to real time, but cannot
10371          * guarantee that they stay in perfect synchronization.
10372          */
10373         if (backwards_tsc) {
10374                 u64 delta_cyc = max_tsc - local_tsc;
10375                 list_for_each_entry(kvm, &vm_list, vm_list) {
10376                         kvm->arch.backwards_tsc_observed = true;
10377                         kvm_for_each_vcpu(i, vcpu, kvm) {
10378                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
10379                                 vcpu->arch.last_host_tsc = local_tsc;
10380                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
10381                         }
10382
10383                         /*
10384                          * We have to disable TSC offset matching.. if you were
10385                          * booting a VM while issuing an S4 host suspend....
10386                          * you may have some problem.  Solving this issue is
10387                          * left as an exercise to the reader.
10388                          */
10389                         kvm->arch.last_tsc_nsec = 0;
10390                         kvm->arch.last_tsc_write = 0;
10391                 }
10392
10393         }
10394         return 0;
10395 }
10396
10397 void kvm_arch_hardware_disable(void)
10398 {
10399         static_call(kvm_x86_hardware_disable)();
10400         drop_user_return_notifiers();
10401 }
10402
10403 int kvm_arch_hardware_setup(void *opaque)
10404 {
10405         struct kvm_x86_init_ops *ops = opaque;
10406         int r;
10407
10408         rdmsrl_safe(MSR_EFER, &host_efer);
10409
10410         if (boot_cpu_has(X86_FEATURE_XSAVES))
10411                 rdmsrl(MSR_IA32_XSS, host_xss);
10412
10413         r = ops->hardware_setup();
10414         if (r != 0)
10415                 return r;
10416
10417         memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops));
10418         kvm_ops_static_call_update();
10419
10420         if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
10421                 supported_xss = 0;
10422
10423 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
10424         cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
10425 #undef __kvm_cpu_cap_has
10426
10427         if (kvm_has_tsc_control) {
10428                 /*
10429                  * Make sure the user can only configure tsc_khz values that
10430                  * fit into a signed integer.
10431                  * A min value is not calculated because it will always
10432                  * be 1 on all machines.
10433                  */
10434                 u64 max = min(0x7fffffffULL,
10435                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
10436                 kvm_max_guest_tsc_khz = max;
10437
10438                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
10439         }
10440
10441         kvm_init_msr_list();
10442         return 0;
10443 }
10444
10445 void kvm_arch_hardware_unsetup(void)
10446 {
10447         static_call(kvm_x86_hardware_unsetup)();
10448 }
10449
10450 int kvm_arch_check_processor_compat(void *opaque)
10451 {
10452         struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
10453         struct kvm_x86_init_ops *ops = opaque;
10454
10455         WARN_ON(!irqs_disabled());
10456
10457         if (__cr4_reserved_bits(cpu_has, c) !=
10458             __cr4_reserved_bits(cpu_has, &boot_cpu_data))
10459                 return -EIO;
10460
10461         return ops->check_processor_compatibility();
10462 }
10463
10464 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
10465 {
10466         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
10467 }
10468 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
10469
10470 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
10471 {
10472         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
10473 }
10474
10475 __read_mostly DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu);
10476 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu);
10477
10478 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
10479 {
10480         struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
10481
10482         vcpu->arch.l1tf_flush_l1d = true;
10483         if (pmu->version && unlikely(pmu->event_count)) {
10484                 pmu->need_cleanup = true;
10485                 kvm_make_request(KVM_REQ_PMU, vcpu);
10486         }
10487         static_call(kvm_x86_sched_in)(vcpu, cpu);
10488 }
10489
10490 void kvm_arch_free_vm(struct kvm *kvm)
10491 {
10492         kfree(to_kvm_hv(kvm)->hv_pa_pg);
10493         vfree(kvm);
10494 }
10495
10496
10497 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
10498 {
10499         if (type)
10500                 return -EINVAL;
10501
10502         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
10503         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
10504         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
10505         INIT_LIST_HEAD(&kvm->arch.lpage_disallowed_mmu_pages);
10506         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
10507         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
10508
10509         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
10510         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
10511         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
10512         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
10513                 &kvm->arch.irq_sources_bitmap);
10514
10515         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
10516         mutex_init(&kvm->arch.apic_map_lock);
10517         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
10518
10519         kvm->arch.kvmclock_offset = -get_kvmclock_base_ns();
10520         pvclock_update_vm_gtod_copy(kvm);
10521
10522         kvm->arch.guest_can_read_msr_platform_info = true;
10523
10524         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
10525         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
10526
10527         kvm_hv_init_vm(kvm);
10528         kvm_page_track_init(kvm);
10529         kvm_mmu_init_vm(kvm);
10530
10531         return static_call(kvm_x86_vm_init)(kvm);
10532 }
10533
10534 int kvm_arch_post_init_vm(struct kvm *kvm)
10535 {
10536         return kvm_mmu_post_init_vm(kvm);
10537 }
10538
10539 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
10540 {
10541         vcpu_load(vcpu);
10542         kvm_mmu_unload(vcpu);
10543         vcpu_put(vcpu);
10544 }
10545
10546 static void kvm_free_vcpus(struct kvm *kvm)
10547 {
10548         unsigned int i;
10549         struct kvm_vcpu *vcpu;
10550
10551         /*
10552          * Unpin any mmu pages first.
10553          */
10554         kvm_for_each_vcpu(i, vcpu, kvm) {
10555                 kvm_clear_async_pf_completion_queue(vcpu);
10556                 kvm_unload_vcpu_mmu(vcpu);
10557         }
10558         kvm_for_each_vcpu(i, vcpu, kvm)
10559                 kvm_vcpu_destroy(vcpu);
10560
10561         mutex_lock(&kvm->lock);
10562         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
10563                 kvm->vcpus[i] = NULL;
10564
10565         atomic_set(&kvm->online_vcpus, 0);
10566         mutex_unlock(&kvm->lock);
10567 }
10568
10569 void kvm_arch_sync_events(struct kvm *kvm)
10570 {
10571         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
10572         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
10573         kvm_free_pit(kvm);
10574 }
10575
10576 #define  ERR_PTR_USR(e)  ((void __user *)ERR_PTR(e))
10577
10578 /**
10579  * __x86_set_memory_region: Setup KVM internal memory slot
10580  *
10581  * @kvm: the kvm pointer to the VM.
10582  * @id: the slot ID to setup.
10583  * @gpa: the GPA to install the slot (unused when @size == 0).
10584  * @size: the size of the slot. Set to zero to uninstall a slot.
10585  *
10586  * This function helps to setup a KVM internal memory slot.  Specify
10587  * @size > 0 to install a new slot, while @size == 0 to uninstall a
10588  * slot.  The return code can be one of the following:
10589  *
10590  *   HVA:           on success (uninstall will return a bogus HVA)
10591  *   -errno:        on error
10592  *
10593  * The caller should always use IS_ERR() to check the return value
10594  * before use.  Note, the KVM internal memory slots are guaranteed to
10595  * remain valid and unchanged until the VM is destroyed, i.e., the
10596  * GPA->HVA translation will not change.  However, the HVA is a user
10597  * address, i.e. its accessibility is not guaranteed, and must be
10598  * accessed via __copy_{to,from}_user().
10599  */
10600 void __user * __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
10601                                       u32 size)
10602 {
10603         int i, r;
10604         unsigned long hva, old_npages;
10605         struct kvm_memslots *slots = kvm_memslots(kvm);
10606         struct kvm_memory_slot *slot;
10607
10608         /* Called with kvm->slots_lock held.  */
10609         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
10610                 return ERR_PTR_USR(-EINVAL);
10611
10612         slot = id_to_memslot(slots, id);
10613         if (size) {
10614                 if (slot && slot->npages)
10615                         return ERR_PTR_USR(-EEXIST);
10616
10617                 /*
10618                  * MAP_SHARED to prevent internal slot pages from being moved
10619                  * by fork()/COW.
10620                  */
10621                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
10622                               MAP_SHARED | MAP_ANONYMOUS, 0);
10623                 if (IS_ERR((void *)hva))
10624                         return (void __user *)hva;
10625         } else {
10626                 if (!slot || !slot->npages)
10627                         return NULL;
10628
10629                 old_npages = slot->npages;
10630                 hva = slot->userspace_addr;
10631         }
10632
10633         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
10634                 struct kvm_userspace_memory_region m;
10635
10636                 m.slot = id | (i << 16);
10637                 m.flags = 0;
10638                 m.guest_phys_addr = gpa;
10639                 m.userspace_addr = hva;
10640                 m.memory_size = size;
10641                 r = __kvm_set_memory_region(kvm, &m);
10642                 if (r < 0)
10643                         return ERR_PTR_USR(r);
10644         }
10645
10646         if (!size)
10647                 vm_munmap(hva, old_npages * PAGE_SIZE);
10648
10649         return (void __user *)hva;
10650 }
10651 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
10652
10653 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
10654 {
10655         kvm_mmu_pre_destroy_vm(kvm);
10656 }
10657
10658 void kvm_arch_destroy_vm(struct kvm *kvm)
10659 {
10660         if (current->mm == kvm->mm) {
10661                 /*
10662                  * Free memory regions allocated on behalf of userspace,
10663                  * unless the the memory map has changed due to process exit
10664                  * or fd copying.
10665                  */
10666                 mutex_lock(&kvm->slots_lock);
10667                 __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
10668                                         0, 0);
10669                 __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
10670                                         0, 0);
10671                 __x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
10672                 mutex_unlock(&kvm->slots_lock);
10673         }
10674         static_call_cond(kvm_x86_vm_destroy)(kvm);
10675         kvm_free_msr_filter(srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1));
10676         kvm_pic_destroy(kvm);
10677         kvm_ioapic_destroy(kvm);
10678         kvm_free_vcpus(kvm);
10679         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
10680         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
10681         kvm_mmu_uninit_vm(kvm);
10682         kvm_page_track_cleanup(kvm);
10683         kvm_xen_destroy_vm(kvm);
10684         kvm_hv_destroy_vm(kvm);
10685 }
10686
10687 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
10688 {
10689         int i;
10690
10691         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10692                 kvfree(slot->arch.rmap[i]);
10693                 slot->arch.rmap[i] = NULL;
10694
10695                 if (i == 0)
10696                         continue;
10697
10698                 kvfree(slot->arch.lpage_info[i - 1]);
10699                 slot->arch.lpage_info[i - 1] = NULL;
10700         }
10701
10702         kvm_page_track_free_memslot(slot);
10703 }
10704
10705 static int kvm_alloc_memslot_metadata(struct kvm_memory_slot *slot,
10706                                       unsigned long npages)
10707 {
10708         int i;
10709
10710         /*
10711          * Clear out the previous array pointers for the KVM_MR_MOVE case.  The
10712          * old arrays will be freed by __kvm_set_memory_region() if installing
10713          * the new memslot is successful.
10714          */
10715         memset(&slot->arch, 0, sizeof(slot->arch));
10716
10717         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10718                 struct kvm_lpage_info *linfo;
10719                 unsigned long ugfn;
10720                 int lpages;
10721                 int level = i + 1;
10722
10723                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
10724                                       slot->base_gfn, level) + 1;
10725
10726                 slot->arch.rmap[i] =
10727                         kvcalloc(lpages, sizeof(*slot->arch.rmap[i]),
10728                                  GFP_KERNEL_ACCOUNT);
10729                 if (!slot->arch.rmap[i])
10730                         goto out_free;
10731                 if (i == 0)
10732                         continue;
10733
10734                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
10735                 if (!linfo)
10736                         goto out_free;
10737
10738                 slot->arch.lpage_info[i - 1] = linfo;
10739
10740                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
10741                         linfo[0].disallow_lpage = 1;
10742                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
10743                         linfo[lpages - 1].disallow_lpage = 1;
10744                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
10745                 /*
10746                  * If the gfn and userspace address are not aligned wrt each
10747                  * other, disable large page support for this slot.
10748                  */
10749                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1)) {
10750                         unsigned long j;
10751
10752                         for (j = 0; j < lpages; ++j)
10753                                 linfo[j].disallow_lpage = 1;
10754                 }
10755         }
10756
10757         if (kvm_page_track_create_memslot(slot, npages))
10758                 goto out_free;
10759
10760         return 0;
10761
10762 out_free:
10763         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10764                 kvfree(slot->arch.rmap[i]);
10765                 slot->arch.rmap[i] = NULL;
10766                 if (i == 0)
10767                         continue;
10768
10769                 kvfree(slot->arch.lpage_info[i - 1]);
10770                 slot->arch.lpage_info[i - 1] = NULL;
10771         }
10772         return -ENOMEM;
10773 }
10774
10775 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
10776 {
10777         struct kvm_vcpu *vcpu;
10778         int i;
10779
10780         /*
10781          * memslots->generation has been incremented.
10782          * mmio generation may have reached its maximum value.
10783          */
10784         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
10785
10786         /* Force re-initialization of steal_time cache */
10787         kvm_for_each_vcpu(i, vcpu, kvm)
10788                 kvm_vcpu_kick(vcpu);
10789 }
10790
10791 int kvm_arch_prepare_memory_region(struct kvm *kvm,
10792                                 struct kvm_memory_slot *memslot,
10793                                 const struct kvm_userspace_memory_region *mem,
10794                                 enum kvm_mr_change change)
10795 {
10796         if (change == KVM_MR_CREATE || change == KVM_MR_MOVE)
10797                 return kvm_alloc_memslot_metadata(memslot,
10798                                                   mem->memory_size >> PAGE_SHIFT);
10799         return 0;
10800 }
10801
10802
10803 static void kvm_mmu_update_cpu_dirty_logging(struct kvm *kvm, bool enable)
10804 {
10805         struct kvm_arch *ka = &kvm->arch;
10806
10807         if (!kvm_x86_ops.cpu_dirty_log_size)
10808                 return;
10809
10810         if ((enable && ++ka->cpu_dirty_logging_count == 1) ||
10811             (!enable && --ka->cpu_dirty_logging_count == 0))
10812                 kvm_make_all_cpus_request(kvm, KVM_REQ_UPDATE_CPU_DIRTY_LOGGING);
10813
10814         WARN_ON_ONCE(ka->cpu_dirty_logging_count < 0);
10815 }
10816
10817 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
10818                                      struct kvm_memory_slot *old,
10819                                      struct kvm_memory_slot *new,
10820                                      enum kvm_mr_change change)
10821 {
10822         bool log_dirty_pages = new->flags & KVM_MEM_LOG_DIRTY_PAGES;
10823
10824         /*
10825          * Update CPU dirty logging if dirty logging is being toggled.  This
10826          * applies to all operations.
10827          */
10828         if ((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)
10829                 kvm_mmu_update_cpu_dirty_logging(kvm, log_dirty_pages);
10830
10831         /*
10832          * Nothing more to do for RO slots (which can't be dirtied and can't be
10833          * made writable) or CREATE/MOVE/DELETE of a slot.
10834          *
10835          * For a memslot with dirty logging disabled:
10836          * CREATE:      No dirty mappings will already exist.
10837          * MOVE/DELETE: The old mappings will already have been cleaned up by
10838          *              kvm_arch_flush_shadow_memslot()
10839          *
10840          * For a memslot with dirty logging enabled:
10841          * CREATE:      No shadow pages exist, thus nothing to write-protect
10842          *              and no dirty bits to clear.
10843          * MOVE/DELETE: The old mappings will already have been cleaned up by
10844          *              kvm_arch_flush_shadow_memslot().
10845          */
10846         if ((change != KVM_MR_FLAGS_ONLY) || (new->flags & KVM_MEM_READONLY))
10847                 return;
10848
10849         /*
10850          * READONLY and non-flags changes were filtered out above, and the only
10851          * other flag is LOG_DIRTY_PAGES, i.e. something is wrong if dirty
10852          * logging isn't being toggled on or off.
10853          */
10854         if (WARN_ON_ONCE(!((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)))
10855                 return;
10856
10857         if (!log_dirty_pages) {
10858                 /*
10859                  * Dirty logging tracks sptes in 4k granularity, meaning that
10860                  * large sptes have to be split.  If live migration succeeds,
10861                  * the guest in the source machine will be destroyed and large
10862                  * sptes will be created in the destination.  However, if the
10863                  * guest continues to run in the source machine (for example if
10864                  * live migration fails), small sptes will remain around and
10865                  * cause bad performance.
10866                  *
10867                  * Scan sptes if dirty logging has been stopped, dropping those
10868                  * which can be collapsed into a single large-page spte.  Later
10869                  * page faults will create the large-page sptes.
10870                  */
10871                 kvm_mmu_zap_collapsible_sptes(kvm, new);
10872         } else {
10873                 /* By default, write-protect everything to log writes. */
10874                 int level = PG_LEVEL_4K;
10875
10876                 if (kvm_x86_ops.cpu_dirty_log_size) {
10877                         /*
10878                          * Clear all dirty bits, unless pages are treated as
10879                          * dirty from the get-go.
10880                          */
10881                         if (!kvm_dirty_log_manual_protect_and_init_set(kvm))
10882                                 kvm_mmu_slot_leaf_clear_dirty(kvm, new);
10883
10884                         /*
10885                          * Write-protect large pages on write so that dirty
10886                          * logging happens at 4k granularity.  No need to
10887                          * write-protect small SPTEs since write accesses are
10888                          * logged by the CPU via dirty bits.
10889                          */
10890                         level = PG_LEVEL_2M;
10891                 } else if (kvm_dirty_log_manual_protect_and_init_set(kvm)) {
10892                         /*
10893                          * If we're with initial-all-set, we don't need
10894                          * to write protect any small page because
10895                          * they're reported as dirty already.  However
10896                          * we still need to write-protect huge pages
10897                          * so that the page split can happen lazily on
10898                          * the first write to the huge page.
10899                          */
10900                         level = PG_LEVEL_2M;
10901                 }
10902                 kvm_mmu_slot_remove_write_access(kvm, new, level);
10903         }
10904 }
10905
10906 void kvm_arch_commit_memory_region(struct kvm *kvm,
10907                                 const struct kvm_userspace_memory_region *mem,
10908                                 struct kvm_memory_slot *old,
10909                                 const struct kvm_memory_slot *new,
10910                                 enum kvm_mr_change change)
10911 {
10912         if (!kvm->arch.n_requested_mmu_pages)
10913                 kvm_mmu_change_mmu_pages(kvm,
10914                                 kvm_mmu_calculate_default_mmu_pages(kvm));
10915
10916         /*
10917          * FIXME: const-ify all uses of struct kvm_memory_slot.
10918          */
10919         kvm_mmu_slot_apply_flags(kvm, old, (struct kvm_memory_slot *) new, change);
10920
10921         /* Free the arrays associated with the old memslot. */
10922         if (change == KVM_MR_MOVE)
10923                 kvm_arch_free_memslot(kvm, old);
10924 }
10925
10926 void kvm_arch_flush_shadow_all(struct kvm *kvm)
10927 {
10928         kvm_mmu_zap_all(kvm);
10929 }
10930
10931 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
10932                                    struct kvm_memory_slot *slot)
10933 {
10934         kvm_page_track_flush_slot(kvm, slot);
10935 }
10936
10937 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
10938 {
10939         return (is_guest_mode(vcpu) &&
10940                         kvm_x86_ops.guest_apic_has_interrupt &&
10941                         static_call(kvm_x86_guest_apic_has_interrupt)(vcpu));
10942 }
10943
10944 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
10945 {
10946         if (!list_empty_careful(&vcpu->async_pf.done))
10947                 return true;
10948
10949         if (kvm_apic_has_events(vcpu))
10950                 return true;
10951
10952         if (vcpu->arch.pv.pv_unhalted)
10953                 return true;
10954
10955         if (vcpu->arch.exception.pending)
10956                 return true;
10957
10958         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
10959             (vcpu->arch.nmi_pending &&
10960              static_call(kvm_x86_nmi_allowed)(vcpu, false)))
10961                 return true;
10962
10963         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
10964             (vcpu->arch.smi_pending &&
10965              static_call(kvm_x86_smi_allowed)(vcpu, false)))
10966                 return true;
10967
10968         if (kvm_arch_interrupt_allowed(vcpu) &&
10969             (kvm_cpu_has_interrupt(vcpu) ||
10970             kvm_guest_apic_has_interrupt(vcpu)))
10971                 return true;
10972
10973         if (kvm_hv_has_stimer_pending(vcpu))
10974                 return true;
10975
10976         if (is_guest_mode(vcpu) &&
10977             kvm_x86_ops.nested_ops->hv_timer_pending &&
10978             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
10979                 return true;
10980
10981         return false;
10982 }
10983
10984 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
10985 {
10986         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
10987 }
10988
10989 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
10990 {
10991         if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
10992                 return true;
10993
10994         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
10995                 kvm_test_request(KVM_REQ_SMI, vcpu) ||
10996                  kvm_test_request(KVM_REQ_EVENT, vcpu))
10997                 return true;
10998
10999         if (vcpu->arch.apicv_active && static_call(kvm_x86_dy_apicv_has_pending_interrupt)(vcpu))
11000                 return true;
11001
11002         return false;
11003 }
11004
11005 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
11006 {
11007         return vcpu->arch.preempted_in_kernel;
11008 }
11009
11010 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
11011 {
11012         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
11013 }
11014
11015 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
11016 {
11017         return static_call(kvm_x86_interrupt_allowed)(vcpu, false);
11018 }
11019
11020 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
11021 {
11022         /* Can't read the RIP when guest state is protected, just return 0 */
11023         if (vcpu->arch.guest_state_protected)
11024                 return 0;
11025
11026         if (is_64_bit_mode(vcpu))
11027                 return kvm_rip_read(vcpu);
11028         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
11029                      kvm_rip_read(vcpu));
11030 }
11031 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
11032
11033 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
11034 {
11035         return kvm_get_linear_rip(vcpu) == linear_rip;
11036 }
11037 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
11038
11039 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
11040 {
11041         unsigned long rflags;
11042
11043         rflags = static_call(kvm_x86_get_rflags)(vcpu);
11044         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
11045                 rflags &= ~X86_EFLAGS_TF;
11046         return rflags;
11047 }
11048 EXPORT_SYMBOL_GPL(kvm_get_rflags);
11049
11050 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
11051 {
11052         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
11053             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
11054                 rflags |= X86_EFLAGS_TF;
11055         static_call(kvm_x86_set_rflags)(vcpu, rflags);
11056 }
11057
11058 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
11059 {
11060         __kvm_set_rflags(vcpu, rflags);
11061         kvm_make_request(KVM_REQ_EVENT, vcpu);
11062 }
11063 EXPORT_SYMBOL_GPL(kvm_set_rflags);
11064
11065 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
11066 {
11067         int r;
11068
11069         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
11070               work->wakeup_all)
11071                 return;
11072
11073         r = kvm_mmu_reload(vcpu);
11074         if (unlikely(r))
11075                 return;
11076
11077         if (!vcpu->arch.mmu->direct_map &&
11078               work->arch.cr3 != vcpu->arch.mmu->get_guest_pgd(vcpu))
11079                 return;
11080
11081         kvm_mmu_do_page_fault(vcpu, work->cr2_or_gpa, 0, true);
11082 }
11083
11084 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
11085 {
11086         BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU));
11087
11088         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
11089 }
11090
11091 static inline u32 kvm_async_pf_next_probe(u32 key)
11092 {
11093         return (key + 1) & (ASYNC_PF_PER_VCPU - 1);
11094 }
11095
11096 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11097 {
11098         u32 key = kvm_async_pf_hash_fn(gfn);
11099
11100         while (vcpu->arch.apf.gfns[key] != ~0)
11101                 key = kvm_async_pf_next_probe(key);
11102
11103         vcpu->arch.apf.gfns[key] = gfn;
11104 }
11105
11106 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
11107 {
11108         int i;
11109         u32 key = kvm_async_pf_hash_fn(gfn);
11110
11111         for (i = 0; i < ASYNC_PF_PER_VCPU &&
11112                      (vcpu->arch.apf.gfns[key] != gfn &&
11113                       vcpu->arch.apf.gfns[key] != ~0); i++)
11114                 key = kvm_async_pf_next_probe(key);
11115
11116         return key;
11117 }
11118
11119 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11120 {
11121         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
11122 }
11123
11124 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11125 {
11126         u32 i, j, k;
11127
11128         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
11129
11130         if (WARN_ON_ONCE(vcpu->arch.apf.gfns[i] != gfn))
11131                 return;
11132
11133         while (true) {
11134                 vcpu->arch.apf.gfns[i] = ~0;
11135                 do {
11136                         j = kvm_async_pf_next_probe(j);
11137                         if (vcpu->arch.apf.gfns[j] == ~0)
11138                                 return;
11139                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
11140                         /*
11141                          * k lies cyclically in ]i,j]
11142                          * |    i.k.j |
11143                          * |....j i.k.| or  |.k..j i...|
11144                          */
11145                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
11146                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
11147                 i = j;
11148         }
11149 }
11150
11151 static inline int apf_put_user_notpresent(struct kvm_vcpu *vcpu)
11152 {
11153         u32 reason = KVM_PV_REASON_PAGE_NOT_PRESENT;
11154
11155         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &reason,
11156                                       sizeof(reason));
11157 }
11158
11159 static inline int apf_put_user_ready(struct kvm_vcpu *vcpu, u32 token)
11160 {
11161         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
11162
11163         return kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
11164                                              &token, offset, sizeof(token));
11165 }
11166
11167 static inline bool apf_pageready_slot_free(struct kvm_vcpu *vcpu)
11168 {
11169         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
11170         u32 val;
11171
11172         if (kvm_read_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
11173                                          &val, offset, sizeof(val)))
11174                 return false;
11175
11176         return !val;
11177 }
11178
11179 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
11180 {
11181         if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
11182                 return false;
11183
11184         if (!kvm_pv_async_pf_enabled(vcpu) ||
11185             (vcpu->arch.apf.send_user_only && static_call(kvm_x86_get_cpl)(vcpu) == 0))
11186                 return false;
11187
11188         return true;
11189 }
11190
11191 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
11192 {
11193         if (unlikely(!lapic_in_kernel(vcpu) ||
11194                      kvm_event_needs_reinjection(vcpu) ||
11195                      vcpu->arch.exception.pending))
11196                 return false;
11197
11198         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
11199                 return false;
11200
11201         /*
11202          * If interrupts are off we cannot even use an artificial
11203          * halt state.
11204          */
11205         return kvm_arch_interrupt_allowed(vcpu);
11206 }
11207
11208 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
11209                                      struct kvm_async_pf *work)
11210 {
11211         struct x86_exception fault;
11212
11213         trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
11214         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
11215
11216         if (kvm_can_deliver_async_pf(vcpu) &&
11217             !apf_put_user_notpresent(vcpu)) {
11218                 fault.vector = PF_VECTOR;
11219                 fault.error_code_valid = true;
11220                 fault.error_code = 0;
11221                 fault.nested_page_fault = false;
11222                 fault.address = work->arch.token;
11223                 fault.async_page_fault = true;
11224                 kvm_inject_page_fault(vcpu, &fault);
11225                 return true;
11226         } else {
11227                 /*
11228                  * It is not possible to deliver a paravirtualized asynchronous
11229                  * page fault, but putting the guest in an artificial halt state
11230                  * can be beneficial nevertheless: if an interrupt arrives, we
11231                  * can deliver it timely and perhaps the guest will schedule
11232                  * another process.  When the instruction that triggered a page
11233                  * fault is retried, hopefully the page will be ready in the host.
11234                  */
11235                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
11236                 return false;
11237         }
11238 }
11239
11240 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
11241                                  struct kvm_async_pf *work)
11242 {
11243         struct kvm_lapic_irq irq = {
11244                 .delivery_mode = APIC_DM_FIXED,
11245                 .vector = vcpu->arch.apf.vec
11246         };
11247
11248         if (work->wakeup_all)
11249                 work->arch.token = ~0; /* broadcast wakeup */
11250         else
11251                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
11252         trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
11253
11254         if ((work->wakeup_all || work->notpresent_injected) &&
11255             kvm_pv_async_pf_enabled(vcpu) &&
11256             !apf_put_user_ready(vcpu, work->arch.token)) {
11257                 vcpu->arch.apf.pageready_pending = true;
11258                 kvm_apic_set_irq(vcpu, &irq, NULL);
11259         }
11260
11261         vcpu->arch.apf.halted = false;
11262         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
11263 }
11264
11265 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu)
11266 {
11267         kvm_make_request(KVM_REQ_APF_READY, vcpu);
11268         if (!vcpu->arch.apf.pageready_pending)
11269                 kvm_vcpu_kick(vcpu);
11270 }
11271
11272 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu)
11273 {
11274         if (!kvm_pv_async_pf_enabled(vcpu))
11275                 return true;
11276         else
11277                 return apf_pageready_slot_free(vcpu);
11278 }
11279
11280 void kvm_arch_start_assignment(struct kvm *kvm)
11281 {
11282         atomic_inc(&kvm->arch.assigned_device_count);
11283 }
11284 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
11285
11286 void kvm_arch_end_assignment(struct kvm *kvm)
11287 {
11288         atomic_dec(&kvm->arch.assigned_device_count);
11289 }
11290 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
11291
11292 bool kvm_arch_has_assigned_device(struct kvm *kvm)
11293 {
11294         return atomic_read(&kvm->arch.assigned_device_count);
11295 }
11296 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
11297
11298 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
11299 {
11300         atomic_inc(&kvm->arch.noncoherent_dma_count);
11301 }
11302 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
11303
11304 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
11305 {
11306         atomic_dec(&kvm->arch.noncoherent_dma_count);
11307 }
11308 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
11309
11310 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
11311 {
11312         return atomic_read(&kvm->arch.noncoherent_dma_count);
11313 }
11314 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
11315
11316 bool kvm_arch_has_irq_bypass(void)
11317 {
11318         return true;
11319 }
11320
11321 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
11322                                       struct irq_bypass_producer *prod)
11323 {
11324         struct kvm_kernel_irqfd *irqfd =
11325                 container_of(cons, struct kvm_kernel_irqfd, consumer);
11326         int ret;
11327
11328         irqfd->producer = prod;
11329         kvm_arch_start_assignment(irqfd->kvm);
11330         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm,
11331                                          prod->irq, irqfd->gsi, 1);
11332
11333         if (ret)
11334                 kvm_arch_end_assignment(irqfd->kvm);
11335
11336         return ret;
11337 }
11338
11339 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
11340                                       struct irq_bypass_producer *prod)
11341 {
11342         int ret;
11343         struct kvm_kernel_irqfd *irqfd =
11344                 container_of(cons, struct kvm_kernel_irqfd, consumer);
11345
11346         WARN_ON(irqfd->producer != prod);
11347         irqfd->producer = NULL;
11348
11349         /*
11350          * When producer of consumer is unregistered, we change back to
11351          * remapped mode, so we can re-use the current implementation
11352          * when the irq is masked/disabled or the consumer side (KVM
11353          * int this case doesn't want to receive the interrupts.
11354         */
11355         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm, prod->irq, irqfd->gsi, 0);
11356         if (ret)
11357                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
11358                        " fails: %d\n", irqfd->consumer.token, ret);
11359
11360         kvm_arch_end_assignment(irqfd->kvm);
11361 }
11362
11363 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
11364                                    uint32_t guest_irq, bool set)
11365 {
11366         return static_call(kvm_x86_update_pi_irte)(kvm, host_irq, guest_irq, set);
11367 }
11368
11369 bool kvm_vector_hashing_enabled(void)
11370 {
11371         return vector_hashing;
11372 }
11373
11374 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
11375 {
11376         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
11377 }
11378 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
11379
11380
11381 int kvm_spec_ctrl_test_value(u64 value)
11382 {
11383         /*
11384          * test that setting IA32_SPEC_CTRL to given value
11385          * is allowed by the host processor
11386          */
11387
11388         u64 saved_value;
11389         unsigned long flags;
11390         int ret = 0;
11391
11392         local_irq_save(flags);
11393
11394         if (rdmsrl_safe(MSR_IA32_SPEC_CTRL, &saved_value))
11395                 ret = 1;
11396         else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value))
11397                 ret = 1;
11398         else
11399                 wrmsrl(MSR_IA32_SPEC_CTRL, saved_value);
11400
11401         local_irq_restore(flags);
11402
11403         return ret;
11404 }
11405 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value);
11406
11407 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code)
11408 {
11409         struct x86_exception fault;
11410         u32 access = error_code &
11411                 (PFERR_WRITE_MASK | PFERR_FETCH_MASK | PFERR_USER_MASK);
11412
11413         if (!(error_code & PFERR_PRESENT_MASK) ||
11414             vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, &fault) != UNMAPPED_GVA) {
11415                 /*
11416                  * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
11417                  * tables probably do not match the TLB.  Just proceed
11418                  * with the error code that the processor gave.
11419                  */
11420                 fault.vector = PF_VECTOR;
11421                 fault.error_code_valid = true;
11422                 fault.error_code = error_code;
11423                 fault.nested_page_fault = false;
11424                 fault.address = gva;
11425         }
11426         vcpu->arch.walk_mmu->inject_page_fault(vcpu, &fault);
11427 }
11428 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error);
11429
11430 /*
11431  * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
11432  * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
11433  * indicates whether exit to userspace is needed.
11434  */
11435 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
11436                               struct x86_exception *e)
11437 {
11438         if (r == X86EMUL_PROPAGATE_FAULT) {
11439                 kvm_inject_emulated_page_fault(vcpu, e);
11440                 return 1;
11441         }
11442
11443         /*
11444          * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
11445          * while handling a VMX instruction KVM could've handled the request
11446          * correctly by exiting to userspace and performing I/O but there
11447          * doesn't seem to be a real use-case behind such requests, just return
11448          * KVM_EXIT_INTERNAL_ERROR for now.
11449          */
11450         vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
11451         vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
11452         vcpu->run->internal.ndata = 0;
11453
11454         return 0;
11455 }
11456 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure);
11457
11458 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva)
11459 {
11460         bool pcid_enabled;
11461         struct x86_exception e;
11462         unsigned i;
11463         unsigned long roots_to_free = 0;
11464         struct {
11465                 u64 pcid;
11466                 u64 gla;
11467         } operand;
11468         int r;
11469
11470         r = kvm_read_guest_virt(vcpu, gva, &operand, sizeof(operand), &e);
11471         if (r != X86EMUL_CONTINUE)
11472                 return kvm_handle_memory_failure(vcpu, r, &e);
11473
11474         if (operand.pcid >> 12 != 0) {
11475                 kvm_inject_gp(vcpu, 0);
11476                 return 1;
11477         }
11478
11479         pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
11480
11481         switch (type) {
11482         case INVPCID_TYPE_INDIV_ADDR:
11483                 if ((!pcid_enabled && (operand.pcid != 0)) ||
11484                     is_noncanonical_address(operand.gla, vcpu)) {
11485                         kvm_inject_gp(vcpu, 0);
11486                         return 1;
11487                 }
11488                 kvm_mmu_invpcid_gva(vcpu, operand.gla, operand.pcid);
11489                 return kvm_skip_emulated_instruction(vcpu);
11490
11491         case INVPCID_TYPE_SINGLE_CTXT:
11492                 if (!pcid_enabled && (operand.pcid != 0)) {
11493                         kvm_inject_gp(vcpu, 0);
11494                         return 1;
11495                 }
11496
11497                 if (kvm_get_active_pcid(vcpu) == operand.pcid) {
11498                         kvm_mmu_sync_roots(vcpu);
11499                         kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
11500                 }
11501
11502                 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
11503                         if (kvm_get_pcid(vcpu, vcpu->arch.mmu->prev_roots[i].pgd)
11504                             == operand.pcid)
11505                                 roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
11506
11507                 kvm_mmu_free_roots(vcpu, vcpu->arch.mmu, roots_to_free);
11508                 /*
11509                  * If neither the current cr3 nor any of the prev_roots use the
11510                  * given PCID, then nothing needs to be done here because a
11511                  * resync will happen anyway before switching to any other CR3.
11512                  */
11513
11514                 return kvm_skip_emulated_instruction(vcpu);
11515
11516         case INVPCID_TYPE_ALL_NON_GLOBAL:
11517                 /*
11518                  * Currently, KVM doesn't mark global entries in the shadow
11519                  * page tables, so a non-global flush just degenerates to a
11520                  * global flush. If needed, we could optimize this later by
11521                  * keeping track of global entries in shadow page tables.
11522                  */
11523
11524                 fallthrough;
11525         case INVPCID_TYPE_ALL_INCL_GLOBAL:
11526                 kvm_mmu_unload(vcpu);
11527                 return kvm_skip_emulated_instruction(vcpu);
11528
11529         default:
11530                 BUG(); /* We have already checked above that type <= 3 */
11531         }
11532 }
11533 EXPORT_SYMBOL_GPL(kvm_handle_invpcid);
11534
11535 static int complete_sev_es_emulated_mmio(struct kvm_vcpu *vcpu)
11536 {
11537         struct kvm_run *run = vcpu->run;
11538         struct kvm_mmio_fragment *frag;
11539         unsigned int len;
11540
11541         BUG_ON(!vcpu->mmio_needed);
11542
11543         /* Complete previous fragment */
11544         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
11545         len = min(8u, frag->len);
11546         if (!vcpu->mmio_is_write)
11547                 memcpy(frag->data, run->mmio.data, len);
11548
11549         if (frag->len <= 8) {
11550                 /* Switch to the next fragment. */
11551                 frag++;
11552                 vcpu->mmio_cur_fragment++;
11553         } else {
11554                 /* Go forward to the next mmio piece. */
11555                 frag->data += len;
11556                 frag->gpa += len;
11557                 frag->len -= len;
11558         }
11559
11560         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
11561                 vcpu->mmio_needed = 0;
11562
11563                 // VMG change, at this point, we're always done
11564                 // RIP has already been advanced
11565                 return 1;
11566         }
11567
11568         // More MMIO is needed
11569         run->mmio.phys_addr = frag->gpa;
11570         run->mmio.len = min(8u, frag->len);
11571         run->mmio.is_write = vcpu->mmio_is_write;
11572         if (run->mmio.is_write)
11573                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
11574         run->exit_reason = KVM_EXIT_MMIO;
11575
11576         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
11577
11578         return 0;
11579 }
11580
11581 int kvm_sev_es_mmio_write(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
11582                           void *data)
11583 {
11584         int handled;
11585         struct kvm_mmio_fragment *frag;
11586
11587         if (!data)
11588                 return -EINVAL;
11589
11590         handled = write_emultor.read_write_mmio(vcpu, gpa, bytes, data);
11591         if (handled == bytes)
11592                 return 1;
11593
11594         bytes -= handled;
11595         gpa += handled;
11596         data += handled;
11597
11598         /*TODO: Check if need to increment number of frags */
11599         frag = vcpu->mmio_fragments;
11600         vcpu->mmio_nr_fragments = 1;
11601         frag->len = bytes;
11602         frag->gpa = gpa;
11603         frag->data = data;
11604
11605         vcpu->mmio_needed = 1;
11606         vcpu->mmio_cur_fragment = 0;
11607
11608         vcpu->run->mmio.phys_addr = gpa;
11609         vcpu->run->mmio.len = min(8u, frag->len);
11610         vcpu->run->mmio.is_write = 1;
11611         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
11612         vcpu->run->exit_reason = KVM_EXIT_MMIO;
11613
11614         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
11615
11616         return 0;
11617 }
11618 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write);
11619
11620 int kvm_sev_es_mmio_read(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
11621                          void *data)
11622 {
11623         int handled;
11624         struct kvm_mmio_fragment *frag;
11625
11626         if (!data)
11627                 return -EINVAL;
11628
11629         handled = read_emultor.read_write_mmio(vcpu, gpa, bytes, data);
11630         if (handled == bytes)
11631                 return 1;
11632
11633         bytes -= handled;
11634         gpa += handled;
11635         data += handled;
11636
11637         /*TODO: Check if need to increment number of frags */
11638         frag = vcpu->mmio_fragments;
11639         vcpu->mmio_nr_fragments = 1;
11640         frag->len = bytes;
11641         frag->gpa = gpa;
11642         frag->data = data;
11643
11644         vcpu->mmio_needed = 1;
11645         vcpu->mmio_cur_fragment = 0;
11646
11647         vcpu->run->mmio.phys_addr = gpa;
11648         vcpu->run->mmio.len = min(8u, frag->len);
11649         vcpu->run->mmio.is_write = 0;
11650         vcpu->run->exit_reason = KVM_EXIT_MMIO;
11651
11652         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
11653
11654         return 0;
11655 }
11656 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read);
11657
11658 static int complete_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
11659 {
11660         memcpy(vcpu->arch.guest_ins_data, vcpu->arch.pio_data,
11661                vcpu->arch.pio.count * vcpu->arch.pio.size);
11662         vcpu->arch.pio.count = 0;
11663
11664         return 1;
11665 }
11666
11667 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
11668                            unsigned int port, void *data,  unsigned int count)
11669 {
11670         int ret;
11671
11672         ret = emulator_pio_out_emulated(vcpu->arch.emulate_ctxt, size, port,
11673                                         data, count);
11674         if (ret)
11675                 return ret;
11676
11677         vcpu->arch.pio.count = 0;
11678
11679         return 0;
11680 }
11681
11682 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
11683                           unsigned int port, void *data, unsigned int count)
11684 {
11685         int ret;
11686
11687         ret = emulator_pio_in_emulated(vcpu->arch.emulate_ctxt, size, port,
11688                                        data, count);
11689         if (ret) {
11690                 vcpu->arch.pio.count = 0;
11691         } else {
11692                 vcpu->arch.guest_ins_data = data;
11693                 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_ins;
11694         }
11695
11696         return 0;
11697 }
11698
11699 int kvm_sev_es_string_io(struct kvm_vcpu *vcpu, unsigned int size,
11700                          unsigned int port, void *data,  unsigned int count,
11701                          int in)
11702 {
11703         return in ? kvm_sev_es_ins(vcpu, size, port, data, count)
11704                   : kvm_sev_es_outs(vcpu, size, port, data, count);
11705 }
11706 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io);
11707
11708 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry);
11709 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
11710 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
11711 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
11712 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
11713 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
11714 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
11715 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
11716 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
11717 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
11718 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
11719 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
11720 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
11721 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
11722 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
11723 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
11724 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
11725 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
11726 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
11727 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
11728 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
11729 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log);
11730 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request);
11731 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter);
11732 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit);
11733 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter);
11734 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit);