arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "pmu.h"
  31 #include "hyperv.h"
  32
  33 #include <linux/clocksource.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/kvm.h>
  36 #include <linux/fs.h>
  37 #include <linux/vmalloc.h>
  38 #include <linux/export.h>
  39 #include <linux/moduleparam.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <linux/kvm_irqfd.h>
  55 #include <linux/irqbypass.h>
  56 #include <linux/sched/stat.h>
  57 #include <linux/mem_encrypt.h>
  58
  59 #include <trace/events/kvm.h>
  60
  61 #include <asm/debugreg.h>
  62 #include <asm/msr.h>
  63 #include <asm/desc.h>
  64 #include <asm/mce.h>
  65 #include <linux/kernel_stat.h>
  66 #include <asm/fpu/internal.h> /* Ugh! */
  67 #include <asm/pvclock.h>
  68 #include <asm/div64.h>
  69 #include <asm/irq_remapping.h>
  70 #include <asm/mshyperv.h>
  71 #include <asm/hypervisor.h>
  72
  73 #define CREATE_TRACE_POINTS
  74 #include "trace.h"
  75
  76 #define MAX_IO_MSRS 256
  77 #define KVM_MAX_MCE_BANKS 32
  78 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  79 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  80
  81 #define emul_to_vcpu(ctxt) \
  82         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  83
  84 /* EFER defaults:
  85  * - enable syscall per default because its emulated by KVM
  86  * - enable LME and LMA per default on 64 bit KVM
  87  */
  88 #ifdef CONFIG_X86_64
  89 static
  90 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  91 #else
  92 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  93 #endif
  94
  95 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  96 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  97
  98 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
  99                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 100
 101 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 102 static void process_nmi(struct kvm_vcpu *vcpu);
 103 static void enter_smm(struct kvm_vcpu *vcpu);
 104 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 105 static void store_regs(struct kvm_vcpu *vcpu);
 106 static int sync_regs(struct kvm_vcpu *vcpu);
 107
 108 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
 109 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 110
 111 static bool __read_mostly ignore_msrs = 0;
 112 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 113
 114 static bool __read_mostly report_ignored_msrs = true;
 115 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 116
 117 unsigned int min_timer_period_us = 200;
 118 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 119
 120 static bool __read_mostly kvmclock_periodic_sync = true;
 121 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 122
 123 bool __read_mostly kvm_has_tsc_control;
 124 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 125 u32  __read_mostly kvm_max_guest_tsc_khz;
 126 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 127 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 128 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 129 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 130 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 131 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 132 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 133
 134 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 135 static u32 __read_mostly tsc_tolerance_ppm = 250;
 136 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 137
 138 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
 139 unsigned int __read_mostly lapic_timer_advance_ns = 0;
 140 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
 141 EXPORT_SYMBOL_GPL(lapic_timer_advance_ns);
 142
 143 static bool __read_mostly vector_hashing = true;
 144 module_param(vector_hashing, bool, S_IRUGO);
 145
 146 bool __read_mostly enable_vmware_backdoor = false;
 147 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 148 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 149
 150 static bool __read_mostly force_emulation_prefix = false;
 151 module_param(force_emulation_prefix, bool, S_IRUGO);
 152
 153 #define KVM_NR_SHARED_MSRS 16
 154
 155 struct kvm_shared_msrs_global {
 156         int nr;
 157         u32 msrs[KVM_NR_SHARED_MSRS];
 158 };
 159
 160 struct kvm_shared_msrs {
 161         struct user_return_notifier urn;
 162         bool registered;
 163         struct kvm_shared_msr_values {
 164                 u64 host;
 165                 u64 curr;
 166         } values[KVM_NR_SHARED_MSRS];
 167 };
 168
 169 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 170 static struct kvm_shared_msrs __percpu *shared_msrs;
 171
 172 struct kvm_stats_debugfs_item debugfs_entries[] = {
 173         { "pf_fixed", VCPU_STAT(pf_fixed) },
 174         { "pf_guest", VCPU_STAT(pf_guest) },
 175         { "tlb_flush", VCPU_STAT(tlb_flush) },
 176         { "invlpg", VCPU_STAT(invlpg) },
 177         { "exits", VCPU_STAT(exits) },
 178         { "io_exits", VCPU_STAT(io_exits) },
 179         { "mmio_exits", VCPU_STAT(mmio_exits) },
 180         { "signal_exits", VCPU_STAT(signal_exits) },
 181         { "irq_window", VCPU_STAT(irq_window_exits) },
 182         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 183         { "halt_exits", VCPU_STAT(halt_exits) },
 184         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 185         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 186         { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
 187         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 188         { "hypercalls", VCPU_STAT(hypercalls) },
 189         { "request_irq", VCPU_STAT(request_irq_exits) },
 190         { "irq_exits", VCPU_STAT(irq_exits) },
 191         { "host_state_reload", VCPU_STAT(host_state_reload) },
 192         { "fpu_reload", VCPU_STAT(fpu_reload) },
 193         { "insn_emulation", VCPU_STAT(insn_emulation) },
 194         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 195         { "irq_injections", VCPU_STAT(irq_injections) },
 196         { "nmi_injections", VCPU_STAT(nmi_injections) },
 197         { "req_event", VCPU_STAT(req_event) },
 198         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 199         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 200         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 201         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 202         { "mmu_flooded", VM_STAT(mmu_flooded) },
 203         { "mmu_recycled", VM_STAT(mmu_recycled) },
 204         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 205         { "mmu_unsync", VM_STAT(mmu_unsync) },
 206         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 207         { "largepages", VM_STAT(lpages) },
 208         { "max_mmu_page_hash_collisions",
 209                 VM_STAT(max_mmu_page_hash_collisions) },
 210         { NULL }
 211 };
 212
 213 u64 __read_mostly host_xcr0;
 214
 215 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 216
 217 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 218 {
 219         int i;
 220         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 221                 vcpu->arch.apf.gfns[i] = ~0;
 222 }
 223
 224 static void kvm_on_user_return(struct user_return_notifier *urn)
 225 {
 226         unsigned slot;
 227         struct kvm_shared_msrs *locals
 228                 = container_of(urn, struct kvm_shared_msrs, urn);
 229         struct kvm_shared_msr_values *values;
 230         unsigned long flags;
 231
 232         /*
 233          * Disabling irqs at this point since the following code could be
 234          * interrupted and executed through kvm_arch_hardware_disable()
 235          */
 236         local_irq_save(flags);
 237         if (locals->registered) {
 238                 locals->registered = false;
 239                 user_return_notifier_unregister(urn);
 240         }
 241         local_irq_restore(flags);
 242         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 243                 values = &locals->values[slot];
 244                 if (values->host != values->curr) {
 245                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 246                         values->curr = values->host;
 247                 }
 248         }
 249 }
 250
 251 static void shared_msr_update(unsigned slot, u32 msr)
 252 {
 253         u64 value;
 254         unsigned int cpu = smp_processor_id();
 255         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 256
 257         /* only read, and nobody should modify it at this time,
 258          * so don't need lock */
 259         if (slot >= shared_msrs_global.nr) {
 260                 printk(KERN_ERR "kvm: invalid MSR slot!");
 261                 return;
 262         }
 263         rdmsrl_safe(msr, &value);
 264         smsr->values[slot].host = value;
 265         smsr->values[slot].curr = value;
 266 }
 267
 268 void kvm_define_shared_msr(unsigned slot, u32 msr)
 269 {
 270         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 271         shared_msrs_global.msrs[slot] = msr;
 272         if (slot >= shared_msrs_global.nr)
 273                 shared_msrs_global.nr = slot + 1;
 274 }
 275 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 276
 277 static void kvm_shared_msr_cpu_online(void)
 278 {
 279         unsigned i;
 280
 281         for (i = 0; i < shared_msrs_global.nr; ++i)
 282                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 283 }
 284
 285 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 286 {
 287         unsigned int cpu = smp_processor_id();
 288         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 289         int err;
 290
 291         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 292                 return 0;
 293         smsr->values[slot].curr = value;
 294         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 295         if (err)
 296                 return 1;
 297
 298         if (!smsr->registered) {
 299                 smsr->urn.on_user_return = kvm_on_user_return;
 300                 user_return_notifier_register(&smsr->urn);
 301                 smsr->registered = true;
 302         }
 303         return 0;
 304 }
 305 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 306
 307 static void drop_user_return_notifiers(void)
 308 {
 309         unsigned int cpu = smp_processor_id();
 310         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 311
 312         if (smsr->registered)
 313                 kvm_on_user_return(&smsr->urn);
 314 }
 315
 316 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 317 {
 318         return vcpu->arch.apic_base;
 319 }
 320 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 321
 322 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 323 {
 324         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 325 }
 326 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 327
 328 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 329 {
 330         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 331         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 332         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) | 0x2ff |
 333                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 334
 335         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 336                 return 1;
 337         if (!msr_info->host_initiated) {
 338                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 339                         return 1;
 340                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 341                         return 1;
 342         }
 343
 344         kvm_lapic_set_base(vcpu, msr_info->data);
 345         return 0;
 346 }
 347 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 348
 349 asmlinkage __visible void kvm_spurious_fault(void)
 350 {
 351         /* Fault while not rebooting.  We want the trace. */
 352         BUG();
 353 }
 354 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 355
 356 #define EXCPT_BENIGN            0
 357 #define EXCPT_CONTRIBUTORY      1
 358 #define EXCPT_PF                2
 359
 360 static int exception_class(int vector)
 361 {
 362         switch (vector) {
 363         case PF_VECTOR:
 364                 return EXCPT_PF;
 365         case DE_VECTOR:
 366         case TS_VECTOR:
 367         case NP_VECTOR:
 368         case SS_VECTOR:
 369         case GP_VECTOR:
 370                 return EXCPT_CONTRIBUTORY;
 371         default:
 372                 break;
 373         }
 374         return EXCPT_BENIGN;
 375 }
 376
 377 #define EXCPT_FAULT             0
 378 #define EXCPT_TRAP              1
 379 #define EXCPT_ABORT             2
 380 #define EXCPT_INTERRUPT         3
 381
 382 static int exception_type(int vector)
 383 {
 384         unsigned int mask;
 385
 386         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 387                 return EXCPT_INTERRUPT;
 388
 389         mask = 1 << vector;
 390
 391         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 392         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 393                 return EXCPT_TRAP;
 394
 395         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 396                 return EXCPT_ABORT;
 397
 398         /* Reserved exceptions will result in fault */
 399         return EXCPT_FAULT;
 400 }
 401
 402 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 403                 unsigned nr, bool has_error, u32 error_code,
 404                 bool reinject)
 405 {
 406         u32 prev_nr;
 407         int class1, class2;
 408
 409         kvm_make_request(KVM_REQ_EVENT, vcpu);
 410
 411         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 412         queue:
 413                 if (has_error && !is_protmode(vcpu))
 414                         has_error = false;
 415                 if (reinject) {
 416                         /*
 417                          * On vmentry, vcpu->arch.exception.pending is only
 418                          * true if an event injection was blocked by
 419                          * nested_run_pending.  In that case, however,
 420                          * vcpu_enter_guest requests an immediate exit,
 421                          * and the guest shouldn't proceed far enough to
 422                          * need reinjection.
 423                          */
 424                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 425                         vcpu->arch.exception.injected = true;
 426                 } else {
 427                         vcpu->arch.exception.pending = true;
 428                         vcpu->arch.exception.injected = false;
 429                 }
 430                 vcpu->arch.exception.has_error_code = has_error;
 431                 vcpu->arch.exception.nr = nr;
 432                 vcpu->arch.exception.error_code = error_code;
 433                 return;
 434         }
 435
 436         /* to check exception */
 437         prev_nr = vcpu->arch.exception.nr;
 438         if (prev_nr == DF_VECTOR) {
 439                 /* triple fault -> shutdown */
 440                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 441                 return;
 442         }
 443         class1 = exception_class(prev_nr);
 444         class2 = exception_class(nr);
 445         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 446                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 447                 /*
 448                  * Generate double fault per SDM Table 5-5.  Set
 449                  * exception.pending = true so that the double fault
 450                  * can trigger a nested vmexit.
 451                  */
 452                 vcpu->arch.exception.pending = true;
 453                 vcpu->arch.exception.injected = false;
 454                 vcpu->arch.exception.has_error_code = true;
 455                 vcpu->arch.exception.nr = DF_VECTOR;
 456                 vcpu->arch.exception.error_code = 0;
 457         } else
 458                 /* replace previous exception with a new one in a hope
 459                    that instruction re-execution will regenerate lost
 460                    exception */
 461                 goto queue;
 462 }
 463
 464 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 465 {
 466         kvm_multiple_exception(vcpu, nr, false, 0, false);
 467 }
 468 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 469
 470 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 471 {
 472         kvm_multiple_exception(vcpu, nr, false, 0, true);
 473 }
 474 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 475
 476 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 477 {
 478         if (err)
 479                 kvm_inject_gp(vcpu, 0);
 480         else
 481                 return kvm_skip_emulated_instruction(vcpu);
 482
 483         return 1;
 484 }
 485 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 486
 487 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 488 {
 489         ++vcpu->stat.pf_guest;
 490         vcpu->arch.exception.nested_apf =
 491                 is_guest_mode(vcpu) && fault->async_page_fault;
 492         if (vcpu->arch.exception.nested_apf)
 493                 vcpu->arch.apf.nested_apf_token = fault->address;
 494         else
 495                 vcpu->arch.cr2 = fault->address;
 496         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 497 }
 498 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 499
 500 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 501 {
 502         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 503                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 504         else
 505                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 506
 507         return fault->nested_page_fault;
 508 }
 509
 510 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 511 {
 512         atomic_inc(&vcpu->arch.nmi_queued);
 513         kvm_make_request(KVM_REQ_NMI, vcpu);
 514 }
 515 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 516
 517 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 518 {
 519         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 520 }
 521 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 522
 523 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 524 {
 525         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 526 }
 527 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 528
 529 /*
 530  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 531  * a #GP and return false.
 532  */
 533 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 534 {
 535         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 536                 return true;
 537         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 538         return false;
 539 }
 540 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 541
 542 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 543 {
 544         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 545                 return true;
 546
 547         kvm_queue_exception(vcpu, UD_VECTOR);
 548         return false;
 549 }
 550 EXPORT_SYMBOL_GPL(kvm_require_dr);
 551
 552 /*
 553  * This function will be used to read from the physical memory of the currently
 554  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 555  * can read from guest physical or from the guest's guest physical memory.
 556  */
 557 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 558                             gfn_t ngfn, void *data, int offset, int len,
 559                             u32 access)
 560 {
 561         struct x86_exception exception;
 562         gfn_t real_gfn;
 563         gpa_t ngpa;
 564
 565         ngpa     = gfn_to_gpa(ngfn);
 566         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 567         if (real_gfn == UNMAPPED_GVA)
 568                 return -EFAULT;
 569
 570         real_gfn = gpa_to_gfn(real_gfn);
 571
 572         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 573 }
 574 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 575
 576 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 577                                void *data, int offset, int len, u32 access)
 578 {
 579         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 580                                        data, offset, len, access);
 581 }
 582
 583 /*
 584  * Load the pae pdptrs.  Return true is they are all valid.
 585  */
 586 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 587 {
 588         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 589         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 590         int i;
 591         int ret;
 592         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 593
 594         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 595                                       offset * sizeof(u64), sizeof(pdpte),
 596                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 597         if (ret < 0) {
 598                 ret = 0;
 599                 goto out;
 600         }
 601         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 602                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 603                     (pdpte[i] &
 604                      vcpu->arch.mmu.guest_rsvd_check.rsvd_bits_mask[0][2])) {
 605                         ret = 0;
 606                         goto out;
 607                 }
 608         }
 609         ret = 1;
 610
 611         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 612         __set_bit(VCPU_EXREG_PDPTR,
 613                   (unsigned long *)&vcpu->arch.regs_avail);
 614         __set_bit(VCPU_EXREG_PDPTR,
 615                   (unsigned long *)&vcpu->arch.regs_dirty);
 616 out:
 617
 618         return ret;
 619 }
 620 EXPORT_SYMBOL_GPL(load_pdptrs);
 621
 622 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 623 {
 624         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 625         bool changed = true;
 626         int offset;
 627         gfn_t gfn;
 628         int r;
 629
 630         if (is_long_mode(vcpu) || !is_pae(vcpu))
 631                 return false;
 632
 633         if (!test_bit(VCPU_EXREG_PDPTR,
 634                       (unsigned long *)&vcpu->arch.regs_avail))
 635                 return true;
 636
 637         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 638         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 639         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 640                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 641         if (r < 0)
 642                 goto out;
 643         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 644 out:
 645
 646         return changed;
 647 }
 648 EXPORT_SYMBOL_GPL(pdptrs_changed);
 649
 650 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 651 {
 652         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 653         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 654
 655         cr0 |= X86_CR0_ET;
 656
 657 #ifdef CONFIG_X86_64
 658         if (cr0 & 0xffffffff00000000UL)
 659                 return 1;
 660 #endif
 661
 662         cr0 &= ~CR0_RESERVED_BITS;
 663
 664         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 665                 return 1;
 666
 667         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 668                 return 1;
 669
 670         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 671 #ifdef CONFIG_X86_64
 672                 if ((vcpu->arch.efer & EFER_LME)) {
 673                         int cs_db, cs_l;
 674
 675                         if (!is_pae(vcpu))
 676                                 return 1;
 677                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 678                         if (cs_l)
 679                                 return 1;
 680                 } else
 681 #endif
 682                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 683                                                  kvm_read_cr3(vcpu)))
 684                         return 1;
 685         }
 686
 687         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 688                 return 1;
 689
 690         kvm_x86_ops->set_cr0(vcpu, cr0);
 691
 692         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 693                 kvm_clear_async_pf_completion_queue(vcpu);
 694                 kvm_async_pf_hash_reset(vcpu);
 695         }
 696
 697         if ((cr0 ^ old_cr0) & update_bits)
 698                 kvm_mmu_reset_context(vcpu);
 699
 700         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 701             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 702             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 703                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 704
 705         return 0;
 706 }
 707 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 708
 709 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 710 {
 711         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 712 }
 713 EXPORT_SYMBOL_GPL(kvm_lmsw);
 714
 715 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 716 {
 717         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 718                         !vcpu->guest_xcr0_loaded) {
 719                 /* kvm_set_xcr() also depends on this */
 720                 if (vcpu->arch.xcr0 != host_xcr0)
 721                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 722                 vcpu->guest_xcr0_loaded = 1;
 723         }
 724 }
 725
 726 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 727 {
 728         if (vcpu->guest_xcr0_loaded) {
 729                 if (vcpu->arch.xcr0 != host_xcr0)
 730                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 731                 vcpu->guest_xcr0_loaded = 0;
 732         }
 733 }
 734
 735 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 736 {
 737         u64 xcr0 = xcr;
 738         u64 old_xcr0 = vcpu->arch.xcr0;
 739         u64 valid_bits;
 740
 741         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 742         if (index != XCR_XFEATURE_ENABLED_MASK)
 743                 return 1;
 744         if (!(xcr0 & XFEATURE_MASK_FP))
 745                 return 1;
 746         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 747                 return 1;
 748
 749         /*
 750          * Do not allow the guest to set bits that we do not support
 751          * saving.  However, xcr0 bit 0 is always set, even if the
 752          * emulated CPU does not support XSAVE (see fx_init).
 753          */
 754         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 755         if (xcr0 & ~valid_bits)
 756                 return 1;
 757
 758         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 759             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 760                 return 1;
 761
 762         if (xcr0 & XFEATURE_MASK_AVX512) {
 763                 if (!(xcr0 & XFEATURE_MASK_YMM))
 764                         return 1;
 765                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 766                         return 1;
 767         }
 768         vcpu->arch.xcr0 = xcr0;
 769
 770         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 771                 kvm_update_cpuid(vcpu);
 772         return 0;
 773 }
 774
 775 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 776 {
 777         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 778             __kvm_set_xcr(vcpu, index, xcr)) {
 779                 kvm_inject_gp(vcpu, 0);
 780                 return 1;
 781         }
 782         return 0;
 783 }
 784 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 785
 786 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 787 {
 788         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 789         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 790                                    X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
 791
 792         if (cr4 & CR4_RESERVED_BITS)
 793                 return 1;
 794
 795         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) && (cr4 & X86_CR4_OSXSAVE))
 796                 return 1;
 797
 798         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMEP) && (cr4 & X86_CR4_SMEP))
 799                 return 1;
 800
 801         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMAP) && (cr4 & X86_CR4_SMAP))
 802                 return 1;
 803
 804         if (!guest_cpuid_has(vcpu, X86_FEATURE_FSGSBASE) && (cr4 & X86_CR4_FSGSBASE))
 805                 return 1;
 806
 807         if (!guest_cpuid_has(vcpu, X86_FEATURE_PKU) && (cr4 & X86_CR4_PKE))
 808                 return 1;
 809
 810         if (!guest_cpuid_has(vcpu, X86_FEATURE_LA57) && (cr4 & X86_CR4_LA57))
 811                 return 1;
 812
 813         if (!guest_cpuid_has(vcpu, X86_FEATURE_UMIP) && (cr4 & X86_CR4_UMIP))
 814                 return 1;
 815
 816         if (is_long_mode(vcpu)) {
 817                 if (!(cr4 & X86_CR4_PAE))
 818                         return 1;
 819         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 820                    && ((cr4 ^ old_cr4) & pdptr_bits)
 821                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 822                                    kvm_read_cr3(vcpu)))
 823                 return 1;
 824
 825         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 826                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
 827                         return 1;
 828
 829                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 830                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 831                         return 1;
 832         }
 833
 834         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 835                 return 1;
 836
 837         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 838             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 839                 kvm_mmu_reset_context(vcpu);
 840
 841         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
 842                 kvm_update_cpuid(vcpu);
 843
 844         return 0;
 845 }
 846 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 847
 848 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 849 {
 850 #ifdef CONFIG_X86_64
 851         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
 852
 853         if (pcid_enabled)
 854                 cr3 &= ~CR3_PCID_INVD;
 855 #endif
 856
 857         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 858                 kvm_mmu_sync_roots(vcpu);
 859                 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 860                 return 0;
 861         }
 862
 863         if (is_long_mode(vcpu) &&
 864             (cr3 & rsvd_bits(cpuid_maxphyaddr(vcpu), 63)))
 865                 return 1;
 866         else if (is_pae(vcpu) && is_paging(vcpu) &&
 867                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 868                 return 1;
 869
 870         vcpu->arch.cr3 = cr3;
 871         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 872         kvm_mmu_new_cr3(vcpu);
 873         return 0;
 874 }
 875 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 876
 877 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 878 {
 879         if (cr8 & CR8_RESERVED_BITS)
 880                 return 1;
 881         if (lapic_in_kernel(vcpu))
 882                 kvm_lapic_set_tpr(vcpu, cr8);
 883         else
 884                 vcpu->arch.cr8 = cr8;
 885         return 0;
 886 }
 887 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 888
 889 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 890 {
 891         if (lapic_in_kernel(vcpu))
 892                 return kvm_lapic_get_cr8(vcpu);
 893         else
 894                 return vcpu->arch.cr8;
 895 }
 896 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 897
 898 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 899 {
 900         int i;
 901
 902         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 903                 for (i = 0; i < KVM_NR_DB_REGS; i++)
 904                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
 905                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
 906         }
 907 }
 908
 909 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 910 {
 911         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 912                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 913 }
 914
 915 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 916 {
 917         unsigned long dr7;
 918
 919         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 920                 dr7 = vcpu->arch.guest_debug_dr7;
 921         else
 922                 dr7 = vcpu->arch.dr7;
 923         kvm_x86_ops->set_dr7(vcpu, dr7);
 924         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 925         if (dr7 & DR7_BP_EN_MASK)
 926                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 927 }
 928
 929 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
 930 {
 931         u64 fixed = DR6_FIXED_1;
 932
 933         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
 934                 fixed |= DR6_RTM;
 935         return fixed;
 936 }
 937
 938 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 939 {
 940         switch (dr) {
 941         case 0 ... 3:
 942                 vcpu->arch.db[dr] = val;
 943                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 944                         vcpu->arch.eff_db[dr] = val;
 945                 break;
 946         case 4:
 947                 /* fall through */
 948         case 6:
 949                 if (val & 0xffffffff00000000ULL)
 950                         return -1; /* #GP */
 951                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
 952                 kvm_update_dr6(vcpu);
 953                 break;
 954         case 5:
 955                 /* fall through */
 956         default: /* 7 */
 957                 if (val & 0xffffffff00000000ULL)
 958                         return -1; /* #GP */
 959                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 960                 kvm_update_dr7(vcpu);
 961                 break;
 962         }
 963
 964         return 0;
 965 }
 966
 967 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 968 {
 969         if (__kvm_set_dr(vcpu, dr, val)) {
 970                 kvm_inject_gp(vcpu, 0);
 971                 return 1;
 972         }
 973         return 0;
 974 }
 975 EXPORT_SYMBOL_GPL(kvm_set_dr);
 976
 977 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 978 {
 979         switch (dr) {
 980         case 0 ... 3:
 981                 *val = vcpu->arch.db[dr];
 982                 break;
 983         case 4:
 984                 /* fall through */
 985         case 6:
 986                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 987                         *val = vcpu->arch.dr6;
 988                 else
 989                         *val = kvm_x86_ops->get_dr6(vcpu);
 990                 break;
 991         case 5:
 992                 /* fall through */
 993         default: /* 7 */
 994                 *val = vcpu->arch.dr7;
 995                 break;
 996         }
 997         return 0;
 998 }
 999 EXPORT_SYMBOL_GPL(kvm_get_dr);
1000
1001 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
1002 {
1003         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
1004         u64 data;
1005         int err;
1006
1007         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
1008         if (err)
1009                 return err;
1010         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
1011         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
1012         return err;
1013 }
1014 EXPORT_SYMBOL_GPL(kvm_rdpmc);
1015
1016 /*
1017  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1018  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1019  *
1020  * This list is modified at module load time to reflect the
1021  * capabilities of the host cpu. This capabilities test skips MSRs that are
1022  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
1023  * may depend on host virtualization features rather than host cpu features.
1024  */
1025
1026 static u32 msrs_to_save[] = {
1027         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1028         MSR_STAR,
1029 #ifdef CONFIG_X86_64
1030         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1031 #endif
1032         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1033         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1034         MSR_IA32_SPEC_CTRL, MSR_IA32_ARCH_CAPABILITIES
1035 };
1036
1037 static unsigned num_msrs_to_save;
1038
1039 static u32 emulated_msrs[] = {
1040         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1041         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1042         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1043         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1044         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1045         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1046         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1047         HV_X64_MSR_RESET,
1048         HV_X64_MSR_VP_INDEX,
1049         HV_X64_MSR_VP_RUNTIME,
1050         HV_X64_MSR_SCONTROL,
1051         HV_X64_MSR_STIMER0_CONFIG,
1052         HV_X64_MSR_VP_ASSIST_PAGE,
1053         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1054         HV_X64_MSR_TSC_EMULATION_STATUS,
1055
1056         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1057         MSR_KVM_PV_EOI_EN,
1058
1059         MSR_IA32_TSC_ADJUST,
1060         MSR_IA32_TSCDEADLINE,
1061         MSR_IA32_MISC_ENABLE,
1062         MSR_IA32_MCG_STATUS,
1063         MSR_IA32_MCG_CTL,
1064         MSR_IA32_MCG_EXT_CTL,
1065         MSR_IA32_SMBASE,
1066         MSR_SMI_COUNT,
1067         MSR_PLATFORM_INFO,
1068         MSR_MISC_FEATURES_ENABLES,
1069         MSR_AMD64_VIRT_SPEC_CTRL,
1070 };
1071
1072 static unsigned num_emulated_msrs;
1073
1074 /*
1075  * List of msr numbers which are used to expose MSR-based features that
1076  * can be used by a hypervisor to validate requested CPU features.
1077  */
1078 static u32 msr_based_features[] = {
1079         MSR_IA32_VMX_BASIC,
1080         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1081         MSR_IA32_VMX_PINBASED_CTLS,
1082         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1083         MSR_IA32_VMX_PROCBASED_CTLS,
1084         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1085         MSR_IA32_VMX_EXIT_CTLS,
1086         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1087         MSR_IA32_VMX_ENTRY_CTLS,
1088         MSR_IA32_VMX_MISC,
1089         MSR_IA32_VMX_CR0_FIXED0,
1090         MSR_IA32_VMX_CR0_FIXED1,
1091         MSR_IA32_VMX_CR4_FIXED0,
1092         MSR_IA32_VMX_CR4_FIXED1,
1093         MSR_IA32_VMX_VMCS_ENUM,
1094         MSR_IA32_VMX_PROCBASED_CTLS2,
1095         MSR_IA32_VMX_EPT_VPID_CAP,
1096         MSR_IA32_VMX_VMFUNC,
1097
1098         MSR_F10H_DECFG,
1099         MSR_IA32_UCODE_REV,
1100         MSR_IA32_ARCH_CAPABILITIES,
1101 };
1102
1103 static unsigned int num_msr_based_features;
1104
1105 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1106 {
1107         switch (msr->index) {
1108         case MSR_IA32_UCODE_REV:
1109         case MSR_IA32_ARCH_CAPABILITIES:
1110                 rdmsrl_safe(msr->index, &msr->data);
1111                 break;
1112         default:
1113                 if (kvm_x86_ops->get_msr_feature(msr))
1114                         return 1;
1115         }
1116         return 0;
1117 }
1118
1119 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1120 {
1121         struct kvm_msr_entry msr;
1122         int r;
1123
1124         msr.index = index;
1125         r = kvm_get_msr_feature(&msr);
1126         if (r)
1127                 return r;
1128
1129         *data = msr.data;
1130
1131         return 0;
1132 }
1133
1134 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1135 {
1136         if (efer & efer_reserved_bits)
1137                 return false;
1138
1139         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1140                         return false;
1141
1142         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1143                         return false;
1144
1145         return true;
1146 }
1147 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1148
1149 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
1150 {
1151         u64 old_efer = vcpu->arch.efer;
1152
1153         if (!kvm_valid_efer(vcpu, efer))
1154                 return 1;
1155
1156         if (is_paging(vcpu)
1157             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1158                 return 1;
1159
1160         efer &= ~EFER_LMA;
1161         efer |= vcpu->arch.efer & EFER_LMA;
1162
1163         kvm_x86_ops->set_efer(vcpu, efer);
1164
1165         /* Update reserved bits */
1166         if ((efer ^ old_efer) & EFER_NX)
1167                 kvm_mmu_reset_context(vcpu);
1168
1169         return 0;
1170 }
1171
1172 void kvm_enable_efer_bits(u64 mask)
1173 {
1174        efer_reserved_bits &= ~mask;
1175 }
1176 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1177
1178 /*
1179  * Writes msr value into into the appropriate "register".
1180  * Returns 0 on success, non-0 otherwise.
1181  * Assumes vcpu_load() was already called.
1182  */
1183 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1184 {
1185         switch (msr->index) {
1186         case MSR_FS_BASE:
1187         case MSR_GS_BASE:
1188         case MSR_KERNEL_GS_BASE:
1189         case MSR_CSTAR:
1190         case MSR_LSTAR:
1191                 if (is_noncanonical_address(msr->data, vcpu))
1192                         return 1;
1193                 break;
1194         case MSR_IA32_SYSENTER_EIP:
1195         case MSR_IA32_SYSENTER_ESP:
1196                 /*
1197                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1198                  * non-canonical address is written on Intel but not on
1199                  * AMD (which ignores the top 32-bits, because it does
1200                  * not implement 64-bit SYSENTER).
1201                  *
1202                  * 64-bit code should hence be able to write a non-canonical
1203                  * value on AMD.  Making the address canonical ensures that
1204                  * vmentry does not fail on Intel after writing a non-canonical
1205                  * value, and that something deterministic happens if the guest
1206                  * invokes 64-bit SYSENTER.
1207                  */
1208                 msr->data = get_canonical(msr->data, vcpu_virt_addr_bits(vcpu));
1209         }
1210         return kvm_x86_ops->set_msr(vcpu, msr);
1211 }
1212 EXPORT_SYMBOL_GPL(kvm_set_msr);
1213
1214 /*
1215  * Adapt set_msr() to msr_io()'s calling convention
1216  */
1217 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1218 {
1219         struct msr_data msr;
1220         int r;
1221
1222         msr.index = index;
1223         msr.host_initiated = true;
1224         r = kvm_get_msr(vcpu, &msr);
1225         if (r)
1226                 return r;
1227
1228         *data = msr.data;
1229         return 0;
1230 }
1231
1232 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1233 {
1234         struct msr_data msr;
1235
1236         msr.data = *data;
1237         msr.index = index;
1238         msr.host_initiated = true;
1239         return kvm_set_msr(vcpu, &msr);
1240 }
1241
1242 #ifdef CONFIG_X86_64
1243 struct pvclock_gtod_data {
1244         seqcount_t      seq;
1245
1246         struct { /* extract of a clocksource struct */
1247                 int vclock_mode;
1248                 u64     cycle_last;
1249                 u64     mask;
1250                 u32     mult;
1251                 u32     shift;
1252         } clock;
1253
1254         u64             boot_ns;
1255         u64             nsec_base;
1256         u64             wall_time_sec;
1257 };
1258
1259 static struct pvclock_gtod_data pvclock_gtod_data;
1260
1261 static void update_pvclock_gtod(struct timekeeper *tk)
1262 {
1263         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1264         u64 boot_ns;
1265
1266         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1267
1268         write_seqcount_begin(&vdata->seq);
1269
1270         /* copy pvclock gtod data */
1271         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1272         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1273         vdata->clock.mask               = tk->tkr_mono.mask;
1274         vdata->clock.mult               = tk->tkr_mono.mult;
1275         vdata->clock.shift              = tk->tkr_mono.shift;
1276
1277         vdata->boot_ns                  = boot_ns;
1278         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1279
1280         vdata->wall_time_sec            = tk->xtime_sec;
1281
1282         write_seqcount_end(&vdata->seq);
1283 }
1284 #endif
1285
1286 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1287 {
1288         /*
1289          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1290          * vcpu_enter_guest.  This function is only called from
1291          * the physical CPU that is running vcpu.
1292          */
1293         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1294 }
1295
1296 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1297 {
1298         int version;
1299         int r;
1300         struct pvclock_wall_clock wc;
1301         struct timespec64 boot;
1302
1303         if (!wall_clock)
1304                 return;
1305
1306         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1307         if (r)
1308                 return;
1309
1310         if (version & 1)
1311                 ++version;  /* first time write, random junk */
1312
1313         ++version;
1314
1315         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1316                 return;
1317
1318         /*
1319          * The guest calculates current wall clock time by adding
1320          * system time (updated by kvm_guest_time_update below) to the
1321          * wall clock specified here.  guest system time equals host
1322          * system time for us, thus we must fill in host boot time here.
1323          */
1324         getboottime64(&boot);
1325
1326         if (kvm->arch.kvmclock_offset) {
1327                 struct timespec64 ts = ns_to_timespec64(kvm->arch.kvmclock_offset);
1328                 boot = timespec64_sub(boot, ts);
1329         }
1330         wc.sec = (u32)boot.tv_sec; /* overflow in 2106 guest time */
1331         wc.nsec = boot.tv_nsec;
1332         wc.version = version;
1333
1334         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1335
1336         version++;
1337         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1338 }
1339
1340 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1341 {
1342         do_shl32_div32(dividend, divisor);
1343         return dividend;
1344 }
1345
1346 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1347                                s8 *pshift, u32 *pmultiplier)
1348 {
1349         uint64_t scaled64;
1350         int32_t  shift = 0;
1351         uint64_t tps64;
1352         uint32_t tps32;
1353
1354         tps64 = base_hz;
1355         scaled64 = scaled_hz;
1356         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1357                 tps64 >>= 1;
1358                 shift--;
1359         }
1360
1361         tps32 = (uint32_t)tps64;
1362         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1363                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1364                         scaled64 >>= 1;
1365                 else
1366                         tps32 <<= 1;
1367                 shift++;
1368         }
1369
1370         *pshift = shift;
1371         *pmultiplier = div_frac(scaled64, tps32);
1372
1373         pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1374                  __func__, base_hz, scaled_hz, shift, *pmultiplier);
1375 }
1376
1377 #ifdef CONFIG_X86_64
1378 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1379 #endif
1380
1381 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1382 static unsigned long max_tsc_khz;
1383
1384 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1385 {
1386         u64 v = (u64)khz * (1000000 + ppm);
1387         do_div(v, 1000000);
1388         return v;
1389 }
1390
1391 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1392 {
1393         u64 ratio;
1394
1395         /* Guest TSC same frequency as host TSC? */
1396         if (!scale) {
1397                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1398                 return 0;
1399         }
1400
1401         /* TSC scaling supported? */
1402         if (!kvm_has_tsc_control) {
1403                 if (user_tsc_khz > tsc_khz) {
1404                         vcpu->arch.tsc_catchup = 1;
1405                         vcpu->arch.tsc_always_catchup = 1;
1406                         return 0;
1407                 } else {
1408                         WARN(1, "user requested TSC rate below hardware speed\n");
1409                         return -1;
1410                 }
1411         }
1412
1413         /* TSC scaling required  - calculate ratio */
1414         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1415                                 user_tsc_khz, tsc_khz);
1416
1417         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1418                 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1419                           user_tsc_khz);
1420                 return -1;
1421         }
1422
1423         vcpu->arch.tsc_scaling_ratio = ratio;
1424         return 0;
1425 }
1426
1427 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1428 {
1429         u32 thresh_lo, thresh_hi;
1430         int use_scaling = 0;
1431
1432         /* tsc_khz can be zero if TSC calibration fails */
1433         if (user_tsc_khz == 0) {
1434                 /* set tsc_scaling_ratio to a safe value */
1435                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1436                 return -1;
1437         }
1438
1439         /* Compute a scale to convert nanoseconds in TSC cycles */
1440         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
1441                            &vcpu->arch.virtual_tsc_shift,
1442                            &vcpu->arch.virtual_tsc_mult);
1443         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
1444
1445         /*
1446          * Compute the variation in TSC rate which is acceptable
1447          * within the range of tolerance and decide if the
1448          * rate being applied is within that bounds of the hardware
1449          * rate.  If so, no scaling or compensation need be done.
1450          */
1451         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1452         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1453         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
1454                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
1455                 use_scaling = 1;
1456         }
1457         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
1458 }
1459
1460 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1461 {
1462         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1463                                       vcpu->arch.virtual_tsc_mult,
1464                                       vcpu->arch.virtual_tsc_shift);
1465         tsc += vcpu->arch.this_tsc_write;
1466         return tsc;
1467 }
1468
1469 static inline int gtod_is_based_on_tsc(int mode)
1470 {
1471         return mode == VCLOCK_TSC || mode == VCLOCK_HVCLOCK;
1472 }
1473
1474 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1475 {
1476 #ifdef CONFIG_X86_64
1477         bool vcpus_matched;
1478         struct kvm_arch *ka = &vcpu->kvm->arch;
1479         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1480
1481         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1482                          atomic_read(&vcpu->kvm->online_vcpus));
1483
1484         /*
1485          * Once the masterclock is enabled, always perform request in
1486          * order to update it.
1487          *
1488          * In order to enable masterclock, the host clocksource must be TSC
1489          * and the vcpus need to have matched TSCs.  When that happens,
1490          * perform request to enable masterclock.
1491          */
1492         if (ka->use_master_clock ||
1493             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
1494                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1495
1496         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1497                             atomic_read(&vcpu->kvm->online_vcpus),
1498                             ka->use_master_clock, gtod->clock.vclock_mode);
1499 #endif
1500 }
1501
1502 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1503 {
1504         u64 curr_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1505         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1506 }
1507
1508 /*
1509  * Multiply tsc by a fixed point number represented by ratio.
1510  *
1511  * The most significant 64-N bits (mult) of ratio represent the
1512  * integral part of the fixed point number; the remaining N bits
1513  * (frac) represent the fractional part, ie. ratio represents a fixed
1514  * point number (mult + frac * 2^(-N)).
1515  *
1516  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1517  */
1518 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1519 {
1520         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1521 }
1522
1523 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1524 {
1525         u64 _tsc = tsc;
1526         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1527
1528         if (ratio != kvm_default_tsc_scaling_ratio)
1529                 _tsc = __scale_tsc(ratio, tsc);
1530
1531         return _tsc;
1532 }
1533 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1534
1535 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1536 {
1537         u64 tsc;
1538
1539         tsc = kvm_scale_tsc(vcpu, rdtsc());
1540
1541         return target_tsc - tsc;
1542 }
1543
1544 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1545 {
1546         u64 tsc_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1547
1548         return tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
1549 }
1550 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1551
1552 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
1553 {
1554         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1555         vcpu->arch.tsc_offset = offset;
1556 }
1557
1558 static inline bool kvm_check_tsc_unstable(void)
1559 {
1560 #ifdef CONFIG_X86_64
1561         /*
1562          * TSC is marked unstable when we're running on Hyper-V,
1563          * 'TSC page' clocksource is good.
1564          */
1565         if (pvclock_gtod_data.clock.vclock_mode == VCLOCK_HVCLOCK)
1566                 return false;
1567 #endif
1568         return check_tsc_unstable();
1569 }
1570
1571 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1572 {
1573         struct kvm *kvm = vcpu->kvm;
1574         u64 offset, ns, elapsed;
1575         unsigned long flags;
1576         bool matched;
1577         bool already_matched;
1578         u64 data = msr->data;
1579         bool synchronizing = false;
1580
1581         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1582         offset = kvm_compute_tsc_offset(vcpu, data);
1583         ns = ktime_get_boot_ns();
1584         elapsed = ns - kvm->arch.last_tsc_nsec;
1585
1586         if (vcpu->arch.virtual_tsc_khz) {
1587                 if (data == 0 && msr->host_initiated) {
1588                         /*
1589                          * detection of vcpu initialization -- need to sync
1590                          * with other vCPUs. This particularly helps to keep
1591                          * kvm_clock stable after CPU hotplug
1592                          */
1593                         synchronizing = true;
1594                 } else {
1595                         u64 tsc_exp = kvm->arch.last_tsc_write +
1596                                                 nsec_to_cycles(vcpu, elapsed);
1597                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
1598                         /*
1599                          * Special case: TSC write with a small delta (1 second)
1600                          * of virtual cycle time against real time is
1601                          * interpreted as an attempt to synchronize the CPU.
1602                          */
1603                         synchronizing = data < tsc_exp + tsc_hz &&
1604                                         data + tsc_hz > tsc_exp;
1605                 }
1606         }
1607
1608         /*
1609          * For a reliable TSC, we can match TSC offsets, and for an unstable
1610          * TSC, we add elapsed time in this computation.  We could let the
1611          * compensation code attempt to catch up if we fall behind, but
1612          * it's better to try to match offsets from the beginning.
1613          */
1614         if (synchronizing &&
1615             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1616                 if (!kvm_check_tsc_unstable()) {
1617                         offset = kvm->arch.cur_tsc_offset;
1618                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1619                 } else {
1620                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1621                         data += delta;
1622                         offset = kvm_compute_tsc_offset(vcpu, data);
1623                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1624                 }
1625                 matched = true;
1626                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1627         } else {
1628                 /*
1629                  * We split periods of matched TSC writes into generations.
1630                  * For each generation, we track the original measured
1631                  * nanosecond time, offset, and write, so if TSCs are in
1632                  * sync, we can match exact offset, and if not, we can match
1633                  * exact software computation in compute_guest_tsc()
1634                  *
1635                  * These values are tracked in kvm->arch.cur_xxx variables.
1636                  */
1637                 kvm->arch.cur_tsc_generation++;
1638                 kvm->arch.cur_tsc_nsec = ns;
1639                 kvm->arch.cur_tsc_write = data;
1640                 kvm->arch.cur_tsc_offset = offset;
1641                 matched = false;
1642                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1643                          kvm->arch.cur_tsc_generation, data);
1644         }
1645
1646         /*
1647          * We also track th most recent recorded KHZ, write and time to
1648          * allow the matching interval to be extended at each write.
1649          */
1650         kvm->arch.last_tsc_nsec = ns;
1651         kvm->arch.last_tsc_write = data;
1652         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1653
1654         vcpu->arch.last_guest_tsc = data;
1655
1656         /* Keep track of which generation this VCPU has synchronized to */
1657         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1658         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1659         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1660
1661         if (!msr->host_initiated && guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST))
1662                 update_ia32_tsc_adjust_msr(vcpu, offset);
1663
1664         kvm_vcpu_write_tsc_offset(vcpu, offset);
1665         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1666
1667         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1668         if (!matched) {
1669                 kvm->arch.nr_vcpus_matched_tsc = 0;
1670         } else if (!already_matched) {
1671                 kvm->arch.nr_vcpus_matched_tsc++;
1672         }
1673
1674         kvm_track_tsc_matching(vcpu);
1675         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1676 }
1677
1678 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1679
1680 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1681                                            s64 adjustment)
1682 {
1683         kvm_vcpu_write_tsc_offset(vcpu, vcpu->arch.tsc_offset + adjustment);
1684 }
1685
1686 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1687 {
1688         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1689                 WARN_ON(adjustment < 0);
1690         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1691         adjust_tsc_offset_guest(vcpu, adjustment);
1692 }
1693
1694 #ifdef CONFIG_X86_64
1695
1696 static u64 read_tsc(void)
1697 {
1698         u64 ret = (u64)rdtsc_ordered();
1699         u64 last = pvclock_gtod_data.clock.cycle_last;
1700
1701         if (likely(ret >= last))
1702                 return ret;
1703
1704         /*
1705          * GCC likes to generate cmov here, but this branch is extremely
1706          * predictable (it's just a function of time and the likely is
1707          * very likely) and there's a data dependence, so force GCC
1708          * to generate a branch instead.  I don't barrier() because
1709          * we don't actually need a barrier, and if this function
1710          * ever gets inlined it will generate worse code.
1711          */
1712         asm volatile ("");
1713         return last;
1714 }
1715
1716 static inline u64 vgettsc(u64 *tsc_timestamp, int *mode)
1717 {
1718         long v;
1719         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1720         u64 tsc_pg_val;
1721
1722         switch (gtod->clock.vclock_mode) {
1723         case VCLOCK_HVCLOCK:
1724                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
1725                                                   tsc_timestamp);
1726                 if (tsc_pg_val != U64_MAX) {
1727                         /* TSC page valid */
1728                         *mode = VCLOCK_HVCLOCK;
1729                         v = (tsc_pg_val - gtod->clock.cycle_last) &
1730                                 gtod->clock.mask;
1731                 } else {
1732                         /* TSC page invalid */
1733                         *mode = VCLOCK_NONE;
1734                 }
1735                 break;
1736         case VCLOCK_TSC:
1737                 *mode = VCLOCK_TSC;
1738                 *tsc_timestamp = read_tsc();
1739                 v = (*tsc_timestamp - gtod->clock.cycle_last) &
1740                         gtod->clock.mask;
1741                 break;
1742         default:
1743                 *mode = VCLOCK_NONE;
1744         }
1745
1746         if (*mode == VCLOCK_NONE)
1747                 *tsc_timestamp = v = 0;
1748
1749         return v * gtod->clock.mult;
1750 }
1751
1752 static int do_monotonic_boot(s64 *t, u64 *tsc_timestamp)
1753 {
1754         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1755         unsigned long seq;
1756         int mode;
1757         u64 ns;
1758
1759         do {
1760                 seq = read_seqcount_begin(&gtod->seq);
1761                 ns = gtod->nsec_base;
1762                 ns += vgettsc(tsc_timestamp, &mode);
1763                 ns >>= gtod->clock.shift;
1764                 ns += gtod->boot_ns;
1765         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1766         *t = ns;
1767
1768         return mode;
1769 }
1770
1771 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
1772 {
1773         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1774         unsigned long seq;
1775         int mode;
1776         u64 ns;
1777
1778         do {
1779                 seq = read_seqcount_begin(&gtod->seq);
1780                 ts->tv_sec = gtod->wall_time_sec;
1781                 ns = gtod->nsec_base;
1782                 ns += vgettsc(tsc_timestamp, &mode);
1783                 ns >>= gtod->clock.shift;
1784         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1785
1786         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
1787         ts->tv_nsec = ns;
1788
1789         return mode;
1790 }
1791
1792 /* returns true if host is using TSC based clocksource */
1793 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
1794 {
1795         /* checked again under seqlock below */
1796         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
1797                 return false;
1798
1799         return gtod_is_based_on_tsc(do_monotonic_boot(kernel_ns,
1800                                                       tsc_timestamp));
1801 }
1802
1803 /* returns true if host is using TSC based clocksource */
1804 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
1805                                            u64 *tsc_timestamp)
1806 {
1807         /* checked again under seqlock below */
1808         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
1809                 return false;
1810
1811         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
1812 }
1813 #endif
1814
1815 /*
1816  *
1817  * Assuming a stable TSC across physical CPUS, and a stable TSC
1818  * across virtual CPUs, the following condition is possible.
1819  * Each numbered line represents an event visible to both
1820  * CPUs at the next numbered event.
1821  *
1822  * "timespecX" represents host monotonic time. "tscX" represents
1823  * RDTSC value.
1824  *
1825  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1826  *
1827  * 1.  read timespec0,tsc0
1828  * 2.                                   | timespec1 = timespec0 + N
1829  *                                      | tsc1 = tsc0 + M
1830  * 3. transition to guest               | transition to guest
1831  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1832  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1833  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1834  *
1835  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1836  *
1837  *      - ret0 < ret1
1838  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1839  *              ...
1840  *      - 0 < N - M => M < N
1841  *
1842  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1843  * always the case (the difference between two distinct xtime instances
1844  * might be smaller then the difference between corresponding TSC reads,
1845  * when updating guest vcpus pvclock areas).
1846  *
1847  * To avoid that problem, do not allow visibility of distinct
1848  * system_timestamp/tsc_timestamp values simultaneously: use a master
1849  * copy of host monotonic time values. Update that master copy
1850  * in lockstep.
1851  *
1852  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1853  *
1854  */
1855
1856 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1857 {
1858 #ifdef CONFIG_X86_64
1859         struct kvm_arch *ka = &kvm->arch;
1860         int vclock_mode;
1861         bool host_tsc_clocksource, vcpus_matched;
1862
1863         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1864                         atomic_read(&kvm->online_vcpus));
1865
1866         /*
1867          * If the host uses TSC clock, then passthrough TSC as stable
1868          * to the guest.
1869          */
1870         host_tsc_clocksource = kvm_get_time_and_clockread(
1871                                         &ka->master_kernel_ns,
1872                                         &ka->master_cycle_now);
1873
1874         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1875                                 && !ka->backwards_tsc_observed
1876                                 && !ka->boot_vcpu_runs_old_kvmclock;
1877
1878         if (ka->use_master_clock)
1879                 atomic_set(&kvm_guest_has_master_clock, 1);
1880
1881         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1882         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1883                                         vcpus_matched);
1884 #endif
1885 }
1886
1887 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
1888 {
1889         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
1890 }
1891
1892 static void kvm_gen_update_masterclock(struct kvm *kvm)
1893 {
1894 #ifdef CONFIG_X86_64
1895         int i;
1896         struct kvm_vcpu *vcpu;
1897         struct kvm_arch *ka = &kvm->arch;
1898
1899         spin_lock(&ka->pvclock_gtod_sync_lock);
1900         kvm_make_mclock_inprogress_request(kvm);
1901         /* no guest entries from this point */
1902         pvclock_update_vm_gtod_copy(kvm);
1903
1904         kvm_for_each_vcpu(i, vcpu, kvm)
1905                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1906
1907         /* guest entries allowed */
1908         kvm_for_each_vcpu(i, vcpu, kvm)
1909                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
1910
1911         spin_unlock(&ka->pvclock_gtod_sync_lock);
1912 #endif
1913 }
1914
1915 u64 get_kvmclock_ns(struct kvm *kvm)
1916 {
1917         struct kvm_arch *ka = &kvm->arch;
1918         struct pvclock_vcpu_time_info hv_clock;
1919         u64 ret;
1920
1921         spin_lock(&ka->pvclock_gtod_sync_lock);
1922         if (!ka->use_master_clock) {
1923                 spin_unlock(&ka->pvclock_gtod_sync_lock);
1924                 return ktime_get_boot_ns() + ka->kvmclock_offset;
1925         }
1926
1927         hv_clock.tsc_timestamp = ka->master_cycle_now;
1928         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
1929         spin_unlock(&ka->pvclock_gtod_sync_lock);
1930
1931         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
1932         get_cpu();
1933
1934         if (__this_cpu_read(cpu_tsc_khz)) {
1935                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
1936                                    &hv_clock.tsc_shift,
1937                                    &hv_clock.tsc_to_system_mul);
1938                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
1939         } else
1940                 ret = ktime_get_boot_ns() + ka->kvmclock_offset;
1941
1942         put_cpu();
1943
1944         return ret;
1945 }
1946
1947 static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
1948 {
1949         struct kvm_vcpu_arch *vcpu = &v->arch;
1950         struct pvclock_vcpu_time_info guest_hv_clock;
1951
1952         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1953                 &guest_hv_clock, sizeof(guest_hv_clock))))
1954                 return;
1955
1956         /* This VCPU is paused, but it's legal for a guest to read another
1957          * VCPU's kvmclock, so we really have to follow the specification where
1958          * it says that version is odd if data is being modified, and even after
1959          * it is consistent.
1960          *
1961          * Version field updates must be kept separate.  This is because
1962          * kvm_write_guest_cached might use a "rep movs" instruction, and
1963          * writes within a string instruction are weakly ordered.  So there
1964          * are three writes overall.
1965          *
1966          * As a small optimization, only write the version field in the first
1967          * and third write.  The vcpu->pv_time cache is still valid, because the
1968          * version field is the first in the struct.
1969          */
1970         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1971
1972         if (guest_hv_clock.version & 1)
1973                 ++guest_hv_clock.version;  /* first time write, random junk */
1974
1975         vcpu->hv_clock.version = guest_hv_clock.version + 1;
1976         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1977                                 &vcpu->hv_clock,
1978                                 sizeof(vcpu->hv_clock.version));
1979
1980         smp_wmb();
1981
1982         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1983         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1984
1985         if (vcpu->pvclock_set_guest_stopped_request) {
1986                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
1987                 vcpu->pvclock_set_guest_stopped_request = false;
1988         }
1989
1990         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1991
1992         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1993                                 &vcpu->hv_clock,
1994                                 sizeof(vcpu->hv_clock));
1995
1996         smp_wmb();
1997
1998         vcpu->hv_clock.version++;
1999         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2000                                 &vcpu->hv_clock,
2001                                 sizeof(vcpu->hv_clock.version));
2002 }
2003
2004 static int kvm_guest_time_update(struct kvm_vcpu *v)
2005 {
2006         unsigned long flags, tgt_tsc_khz;
2007         struct kvm_vcpu_arch *vcpu = &v->arch;
2008         struct kvm_arch *ka = &v->kvm->arch;
2009         s64 kernel_ns;
2010         u64 tsc_timestamp, host_tsc;
2011         u8 pvclock_flags;
2012         bool use_master_clock;
2013
2014         kernel_ns = 0;
2015         host_tsc = 0;
2016
2017         /*
2018          * If the host uses TSC clock, then passthrough TSC as stable
2019          * to the guest.
2020          */
2021         spin_lock(&ka->pvclock_gtod_sync_lock);
2022         use_master_clock = ka->use_master_clock;
2023         if (use_master_clock) {
2024                 host_tsc = ka->master_cycle_now;
2025                 kernel_ns = ka->master_kernel_ns;
2026         }
2027         spin_unlock(&ka->pvclock_gtod_sync_lock);
2028
2029         /* Keep irq disabled to prevent changes to the clock */
2030         local_irq_save(flags);
2031         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2032         if (unlikely(tgt_tsc_khz == 0)) {
2033                 local_irq_restore(flags);
2034                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2035                 return 1;
2036         }
2037         if (!use_master_clock) {
2038                 host_tsc = rdtsc();
2039                 kernel_ns = ktime_get_boot_ns();
2040         }
2041
2042         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2043
2044         /*
2045          * We may have to catch up the TSC to match elapsed wall clock
2046          * time for two reasons, even if kvmclock is used.
2047          *   1) CPU could have been running below the maximum TSC rate
2048          *   2) Broken TSC compensation resets the base at each VCPU
2049          *      entry to avoid unknown leaps of TSC even when running
2050          *      again on the same CPU.  This may cause apparent elapsed
2051          *      time to disappear, and the guest to stand still or run
2052          *      very slowly.
2053          */
2054         if (vcpu->tsc_catchup) {
2055                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2056                 if (tsc > tsc_timestamp) {
2057                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2058                         tsc_timestamp = tsc;
2059                 }
2060         }
2061
2062         local_irq_restore(flags);
2063
2064         /* With all the info we got, fill in the values */
2065
2066         if (kvm_has_tsc_control)
2067                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
2068
2069         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2070                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2071                                    &vcpu->hv_clock.tsc_shift,
2072                                    &vcpu->hv_clock.tsc_to_system_mul);
2073                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2074         }
2075
2076         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2077         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2078         vcpu->last_guest_tsc = tsc_timestamp;
2079
2080         /* If the host uses TSC clocksource, then it is stable */
2081         pvclock_flags = 0;
2082         if (use_master_clock)
2083                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2084
2085         vcpu->hv_clock.flags = pvclock_flags;
2086
2087         if (vcpu->pv_time_enabled)
2088                 kvm_setup_pvclock_page(v);
2089         if (v == kvm_get_vcpu(v->kvm, 0))
2090                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2091         return 0;
2092 }
2093
2094 /*
2095  * kvmclock updates which are isolated to a given vcpu, such as
2096  * vcpu->cpu migration, should not allow system_timestamp from
2097  * the rest of the vcpus to remain static. Otherwise ntp frequency
2098  * correction applies to one vcpu's system_timestamp but not
2099  * the others.
2100  *
2101  * So in those cases, request a kvmclock update for all vcpus.
2102  * We need to rate-limit these requests though, as they can
2103  * considerably slow guests that have a large number of vcpus.
2104  * The time for a remote vcpu to update its kvmclock is bound
2105  * by the delay we use to rate-limit the updates.
2106  */
2107
2108 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2109
2110 static void kvmclock_update_fn(struct work_struct *work)
2111 {
2112         int i;
2113         struct delayed_work *dwork = to_delayed_work(work);
2114         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2115                                            kvmclock_update_work);
2116         struct kvm *kvm = container_of(ka, struct kvm, arch);
2117         struct kvm_vcpu *vcpu;
2118
2119         kvm_for_each_vcpu(i, vcpu, kvm) {
2120                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2121                 kvm_vcpu_kick(vcpu);
2122         }
2123 }
2124
2125 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2126 {
2127         struct kvm *kvm = v->kvm;
2128
2129         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2130         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2131                                         KVMCLOCK_UPDATE_DELAY);
2132 }
2133
2134 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2135
2136 static void kvmclock_sync_fn(struct work_struct *work)
2137 {
2138         struct delayed_work *dwork = to_delayed_work(work);
2139         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2140                                            kvmclock_sync_work);
2141         struct kvm *kvm = container_of(ka, struct kvm, arch);
2142
2143         if (!kvmclock_periodic_sync)
2144                 return;
2145
2146         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2147         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2148                                         KVMCLOCK_SYNC_PERIOD);
2149 }
2150
2151 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2152 {
2153         u64 mcg_cap = vcpu->arch.mcg_cap;
2154         unsigned bank_num = mcg_cap & 0xff;
2155         u32 msr = msr_info->index;
2156         u64 data = msr_info->data;
2157
2158         switch (msr) {
2159         case MSR_IA32_MCG_STATUS:
2160                 vcpu->arch.mcg_status = data;
2161                 break;
2162         case MSR_IA32_MCG_CTL:
2163                 if (!(mcg_cap & MCG_CTL_P) &&
2164                     (data || !msr_info->host_initiated))
2165                         return 1;
2166                 if (data != 0 && data != ~(u64)0)
2167                         return 1;
2168                 vcpu->arch.mcg_ctl = data;
2169                 break;
2170         default:
2171                 if (msr >= MSR_IA32_MC0_CTL &&
2172                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2173                         u32 offset = msr - MSR_IA32_MC0_CTL;
2174                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2175                          * some Linux kernels though clear bit 10 in bank 4 to
2176                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2177                          * this to avoid an uncatched #GP in the guest
2178                          */
2179                         if ((offset & 0x3) == 0 &&
2180                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2181                                 return -1;
2182                         if (!msr_info->host_initiated &&
2183                                 (offset & 0x3) == 1 && data != 0)
2184                                 return -1;
2185                         vcpu->arch.mce_banks[offset] = data;
2186                         break;
2187                 }
2188                 return 1;
2189         }
2190         return 0;
2191 }
2192
2193 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2194 {
2195         struct kvm *kvm = vcpu->kvm;
2196         int lm = is_long_mode(vcpu);
2197         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2198                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2199         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2200                 : kvm->arch.xen_hvm_config.blob_size_32;
2201         u32 page_num = data & ~PAGE_MASK;
2202         u64 page_addr = data & PAGE_MASK;
2203         u8 *page;
2204         int r;
2205
2206         r = -E2BIG;
2207         if (page_num >= blob_size)
2208                 goto out;
2209         r = -ENOMEM;
2210         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2211         if (IS_ERR(page)) {
2212                 r = PTR_ERR(page);
2213                 goto out;
2214         }
2215         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
2216                 goto out_free;
2217         r = 0;
2218 out_free:
2219         kfree(page);
2220 out:
2221         return r;
2222 }
2223
2224 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2225 {
2226         gpa_t gpa = data & ~0x3f;
2227
2228         /* Bits 3:5 are reserved, Should be zero */
2229         if (data & 0x38)
2230                 return 1;
2231
2232         vcpu->arch.apf.msr_val = data;
2233
2234         if (!(data & KVM_ASYNC_PF_ENABLED)) {
2235                 kvm_clear_async_pf_completion_queue(vcpu);
2236                 kvm_async_pf_hash_reset(vcpu);
2237                 return 0;
2238         }
2239
2240         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2241                                         sizeof(u32)))
2242                 return 1;
2243
2244         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2245         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
2246         kvm_async_pf_wakeup_all(vcpu);
2247         return 0;
2248 }
2249
2250 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2251 {
2252         vcpu->arch.pv_time_enabled = false;
2253 }
2254
2255 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu, bool invalidate_gpa)
2256 {
2257         ++vcpu->stat.tlb_flush;
2258         kvm_x86_ops->tlb_flush(vcpu, invalidate_gpa);
2259 }
2260
2261 static void record_steal_time(struct kvm_vcpu *vcpu)
2262 {
2263         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2264                 return;
2265
2266         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2267                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2268                 return;
2269
2270         /*
2271          * Doing a TLB flush here, on the guest's behalf, can avoid
2272          * expensive IPIs.
2273          */
2274         if (xchg(&vcpu->arch.st.steal.preempted, 0) & KVM_VCPU_FLUSH_TLB)
2275                 kvm_vcpu_flush_tlb(vcpu, false);
2276
2277         if (vcpu->arch.st.steal.version & 1)
2278                 vcpu->arch.st.steal.version += 1;  /* first time write, random junk */
2279
2280         vcpu->arch.st.steal.version += 1;
2281
2282         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2283                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2284
2285         smp_wmb();
2286
2287         vcpu->arch.st.steal.steal += current->sched_info.run_delay -
2288                 vcpu->arch.st.last_steal;
2289         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2290
2291         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2292                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2293
2294         smp_wmb();
2295
2296         vcpu->arch.st.steal.version += 1;
2297
2298         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2299                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2300 }
2301
2302 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2303 {
2304         bool pr = false;
2305         u32 msr = msr_info->index;
2306         u64 data = msr_info->data;
2307
2308         switch (msr) {
2309         case MSR_AMD64_NB_CFG:
2310         case MSR_IA32_UCODE_WRITE:
2311         case MSR_VM_HSAVE_PA:
2312         case MSR_AMD64_PATCH_LOADER:
2313         case MSR_AMD64_BU_CFG2:
2314         case MSR_AMD64_DC_CFG:
2315                 break;
2316
2317         case MSR_IA32_UCODE_REV:
2318                 if (msr_info->host_initiated)
2319                         vcpu->arch.microcode_version = data;
2320                 break;
2321         case MSR_EFER:
2322                 return set_efer(vcpu, data);
2323         case MSR_K7_HWCR:
2324                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2325                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2326                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2327                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
2328                 if (data != 0) {
2329                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2330                                     data);
2331                         return 1;
2332                 }
2333                 break;
2334         case MSR_FAM10H_MMIO_CONF_BASE:
2335                 if (data != 0) {
2336                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2337                                     "0x%llx\n", data);
2338                         return 1;
2339                 }
2340                 break;
2341         case MSR_IA32_DEBUGCTLMSR:
2342                 if (!data) {
2343                         /* We support the non-activated case already */
2344                         break;
2345                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2346                         /* Values other than LBR and BTF are vendor-specific,
2347                            thus reserved and should throw a #GP */
2348                         return 1;
2349                 }
2350                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2351                             __func__, data);
2352                 break;
2353         case 0x200 ... 0x2ff:
2354                 return kvm_mtrr_set_msr(vcpu, msr, data);
2355         case MSR_IA32_APICBASE:
2356                 return kvm_set_apic_base(vcpu, msr_info);
2357         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2358                 return kvm_x2apic_msr_write(vcpu, msr, data);
2359         case MSR_IA32_TSCDEADLINE:
2360                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2361                 break;
2362         case MSR_IA32_TSC_ADJUST:
2363                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
2364                         if (!msr_info->host_initiated) {
2365                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2366                                 adjust_tsc_offset_guest(vcpu, adj);
2367                         }
2368                         vcpu->arch.ia32_tsc_adjust_msr = data;
2369                 }
2370                 break;
2371         case MSR_IA32_MISC_ENABLE:
2372                 vcpu->arch.ia32_misc_enable_msr = data;
2373                 break;
2374         case MSR_IA32_SMBASE:
2375                 if (!msr_info->host_initiated)
2376                         return 1;
2377                 vcpu->arch.smbase = data;
2378                 break;
2379         case MSR_IA32_TSC:
2380                 kvm_write_tsc(vcpu, msr_info);
2381                 break;
2382         case MSR_SMI_COUNT:
2383                 if (!msr_info->host_initiated)
2384                         return 1;
2385                 vcpu->arch.smi_count = data;
2386                 break;
2387         case MSR_KVM_WALL_CLOCK_NEW:
2388         case MSR_KVM_WALL_CLOCK:
2389                 vcpu->kvm->arch.wall_clock = data;
2390                 kvm_write_wall_clock(vcpu->kvm, data);
2391                 break;
2392         case MSR_KVM_SYSTEM_TIME_NEW:
2393         case MSR_KVM_SYSTEM_TIME: {
2394                 struct kvm_arch *ka = &vcpu->kvm->arch;
2395
2396                 kvmclock_reset(vcpu);
2397
2398                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2399                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2400
2401                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2402                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2403
2404                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2405                 }
2406
2407                 vcpu->arch.time = data;
2408                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2409
2410                 /* we verify if the enable bit is set... */
2411                 if (!(data & 1))
2412                         break;
2413
2414                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2415                      &vcpu->arch.pv_time, data & ~1ULL,
2416                      sizeof(struct pvclock_vcpu_time_info)))
2417                         vcpu->arch.pv_time_enabled = false;
2418                 else
2419                         vcpu->arch.pv_time_enabled = true;
2420
2421                 break;
2422         }
2423         case MSR_KVM_ASYNC_PF_EN:
2424                 if (kvm_pv_enable_async_pf(vcpu, data))
2425                         return 1;
2426                 break;
2427         case MSR_KVM_STEAL_TIME:
2428
2429                 if (unlikely(!sched_info_on()))
2430                         return 1;
2431
2432                 if (data & KVM_STEAL_RESERVED_MASK)
2433                         return 1;
2434
2435                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2436                                                 data & KVM_STEAL_VALID_BITS,
2437                                                 sizeof(struct kvm_steal_time)))
2438                         return 1;
2439
2440                 vcpu->arch.st.msr_val = data;
2441
2442                 if (!(data & KVM_MSR_ENABLED))
2443                         break;
2444
2445                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2446
2447                 break;
2448         case MSR_KVM_PV_EOI_EN:
2449                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2450                         return 1;
2451                 break;
2452
2453         case MSR_IA32_MCG_CTL:
2454         case MSR_IA32_MCG_STATUS:
2455         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2456                 return set_msr_mce(vcpu, msr_info);
2457
2458         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2459         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2460                 pr = true; /* fall through */
2461         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2462         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2463                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2464                         return kvm_pmu_set_msr(vcpu, msr_info);
2465
2466                 if (pr || data != 0)
2467                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2468                                     "0x%x data 0x%llx\n", msr, data);
2469                 break;
2470         case MSR_K7_CLK_CTL:
2471                 /*
2472                  * Ignore all writes to this no longer documented MSR.
2473                  * Writes are only relevant for old K7 processors,
2474                  * all pre-dating SVM, but a recommended workaround from
2475                  * AMD for these chips. It is possible to specify the
2476                  * affected processor models on the command line, hence
2477                  * the need to ignore the workaround.
2478                  */
2479                 break;
2480         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2481         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2482         case HV_X64_MSR_CRASH_CTL:
2483         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2484         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
2485         case HV_X64_MSR_TSC_EMULATION_CONTROL:
2486         case HV_X64_MSR_TSC_EMULATION_STATUS:
2487                 return kvm_hv_set_msr_common(vcpu, msr, data,
2488                                              msr_info->host_initiated);
2489         case MSR_IA32_BBL_CR_CTL3:
2490                 /* Drop writes to this legacy MSR -- see rdmsr
2491                  * counterpart for further detail.
2492                  */
2493                 if (report_ignored_msrs)
2494                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
2495                                 msr, data);
2496                 break;
2497         case MSR_AMD64_OSVW_ID_LENGTH:
2498                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2499                         return 1;
2500                 vcpu->arch.osvw.length = data;
2501                 break;
2502         case MSR_AMD64_OSVW_STATUS:
2503                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2504                         return 1;
2505                 vcpu->arch.osvw.status = data;
2506                 break;
2507         case MSR_PLATFORM_INFO:
2508                 if (!msr_info->host_initiated ||
2509                     data & ~MSR_PLATFORM_INFO_CPUID_FAULT ||
2510                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
2511                      cpuid_fault_enabled(vcpu)))
2512                         return 1;
2513                 vcpu->arch.msr_platform_info = data;
2514                 break;
2515         case MSR_MISC_FEATURES_ENABLES:
2516                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
2517                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
2518                      !supports_cpuid_fault(vcpu)))
2519                         return 1;
2520                 vcpu->arch.msr_misc_features_enables = data;
2521                 break;
2522         default:
2523                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2524                         return xen_hvm_config(vcpu, data);
2525                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2526                         return kvm_pmu_set_msr(vcpu, msr_info);
2527                 if (!ignore_msrs) {
2528                         vcpu_debug_ratelimited(vcpu, "unhandled wrmsr: 0x%x data 0x%llx\n",
2529                                     msr, data);
2530                         return 1;
2531                 } else {
2532                         if (report_ignored_msrs)
2533                                 vcpu_unimpl(vcpu,
2534                                         "ignored wrmsr: 0x%x data 0x%llx\n",
2535                                         msr, data);
2536                         break;
2537                 }
2538         }
2539         return 0;
2540 }
2541 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2542
2543
2544 /*
2545  * Reads an msr value (of 'msr_index') into 'pdata'.
2546  * Returns 0 on success, non-0 otherwise.
2547  * Assumes vcpu_load() was already called.
2548  */
2549 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2550 {
2551         return kvm_x86_ops->get_msr(vcpu, msr);
2552 }
2553 EXPORT_SYMBOL_GPL(kvm_get_msr);
2554
2555 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
2556 {
2557         u64 data;
2558         u64 mcg_cap = vcpu->arch.mcg_cap;
2559         unsigned bank_num = mcg_cap & 0xff;
2560
2561         switch (msr) {
2562         case MSR_IA32_P5_MC_ADDR:
2563         case MSR_IA32_P5_MC_TYPE:
2564                 data = 0;
2565                 break;
2566         case MSR_IA32_MCG_CAP:
2567                 data = vcpu->arch.mcg_cap;
2568                 break;
2569         case MSR_IA32_MCG_CTL:
2570                 if (!(mcg_cap & MCG_CTL_P) && !host)
2571                         return 1;
2572                 data = vcpu->arch.mcg_ctl;
2573                 break;
2574         case MSR_IA32_MCG_STATUS:
2575                 data = vcpu->arch.mcg_status;
2576                 break;
2577         default:
2578                 if (msr >= MSR_IA32_MC0_CTL &&
2579                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2580                         u32 offset = msr - MSR_IA32_MC0_CTL;
2581                         data = vcpu->arch.mce_banks[offset];
2582                         break;
2583                 }
2584                 return 1;
2585         }
2586         *pdata = data;
2587         return 0;
2588 }
2589
2590 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2591 {
2592         switch (msr_info->index) {
2593         case MSR_IA32_PLATFORM_ID:
2594         case MSR_IA32_EBL_CR_POWERON:
2595         case MSR_IA32_DEBUGCTLMSR:
2596         case MSR_IA32_LASTBRANCHFROMIP:
2597         case MSR_IA32_LASTBRANCHTOIP:
2598         case MSR_IA32_LASTINTFROMIP:
2599         case MSR_IA32_LASTINTTOIP:
2600         case MSR_K8_SYSCFG:
2601         case MSR_K8_TSEG_ADDR:
2602         case MSR_K8_TSEG_MASK:
2603         case MSR_K7_HWCR:
2604         case MSR_VM_HSAVE_PA:
2605         case MSR_K8_INT_PENDING_MSG:
2606         case MSR_AMD64_NB_CFG:
2607         case MSR_FAM10H_MMIO_CONF_BASE:
2608         case MSR_AMD64_BU_CFG2:
2609         case MSR_IA32_PERF_CTL:
2610         case MSR_AMD64_DC_CFG:
2611                 msr_info->data = 0;
2612                 break;
2613         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
2614         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2615         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2616         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2617         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2618                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2619                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2620                 msr_info->data = 0;
2621                 break;
2622         case MSR_IA32_UCODE_REV:
2623                 msr_info->data = vcpu->arch.microcode_version;
2624                 break;
2625         case MSR_IA32_TSC:
2626                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc()) + vcpu->arch.tsc_offset;
2627                 break;
2628         case MSR_MTRRcap:
2629         case 0x200 ... 0x2ff:
2630                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2631         case 0xcd: /* fsb frequency */
2632                 msr_info->data = 3;
2633                 break;
2634                 /*
2635                  * MSR_EBC_FREQUENCY_ID
2636                  * Conservative value valid for even the basic CPU models.
2637                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2638                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2639                  * and 266MHz for model 3, or 4. Set Core Clock
2640                  * Frequency to System Bus Frequency Ratio to 1 (bits
2641                  * 31:24) even though these are only valid for CPU
2642                  * models > 2, however guests may end up dividing or
2643                  * multiplying by zero otherwise.
2644                  */
2645         case MSR_EBC_FREQUENCY_ID:
2646                 msr_info->data = 1 << 24;
2647                 break;
2648         case MSR_IA32_APICBASE:
2649                 msr_info->data = kvm_get_apic_base(vcpu);
2650                 break;
2651         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2652                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2653                 break;
2654         case MSR_IA32_TSCDEADLINE:
2655                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2656                 break;
2657         case MSR_IA32_TSC_ADJUST:
2658                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2659                 break;
2660         case MSR_IA32_MISC_ENABLE:
2661                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2662                 break;
2663         case MSR_IA32_SMBASE:
2664                 if (!msr_info->host_initiated)
2665                         return 1;
2666                 msr_info->data = vcpu->arch.smbase;
2667                 break;
2668         case MSR_SMI_COUNT:
2669                 msr_info->data = vcpu->arch.smi_count;
2670                 break;
2671         case MSR_IA32_PERF_STATUS:
2672                 /* TSC increment by tick */
2673                 msr_info->data = 1000ULL;
2674                 /* CPU multiplier */
2675                 msr_info->data |= (((uint64_t)4ULL) << 40);
2676                 break;
2677         case MSR_EFER:
2678                 msr_info->data = vcpu->arch.efer;
2679                 break;
2680         case MSR_KVM_WALL_CLOCK:
2681         case MSR_KVM_WALL_CLOCK_NEW:
2682                 msr_info->data = vcpu->kvm->arch.wall_clock;
2683                 break;
2684         case MSR_KVM_SYSTEM_TIME:
2685         case MSR_KVM_SYSTEM_TIME_NEW:
2686                 msr_info->data = vcpu->arch.time;
2687                 break;
2688         case MSR_KVM_ASYNC_PF_EN:
2689                 msr_info->data = vcpu->arch.apf.msr_val;
2690                 break;
2691         case MSR_KVM_STEAL_TIME:
2692                 msr_info->data = vcpu->arch.st.msr_val;
2693                 break;
2694         case MSR_KVM_PV_EOI_EN:
2695                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2696                 break;
2697         case MSR_IA32_P5_MC_ADDR:
2698         case MSR_IA32_P5_MC_TYPE:
2699         case MSR_IA32_MCG_CAP:
2700         case MSR_IA32_MCG_CTL:
2701         case MSR_IA32_MCG_STATUS:
2702         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2703                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
2704                                    msr_info->host_initiated);
2705         case MSR_K7_CLK_CTL:
2706                 /*
2707                  * Provide expected ramp-up count for K7. All other
2708                  * are set to zero, indicating minimum divisors for
2709                  * every field.
2710                  *
2711                  * This prevents guest kernels on AMD host with CPU
2712                  * type 6, model 8 and higher from exploding due to
2713                  * the rdmsr failing.
2714                  */
2715                 msr_info->data = 0x20000000;
2716                 break;
2717         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2718         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2719         case HV_X64_MSR_CRASH_CTL:
2720         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2721         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
2722         case HV_X64_MSR_TSC_EMULATION_CONTROL:
2723         case HV_X64_MSR_TSC_EMULATION_STATUS:
2724                 return kvm_hv_get_msr_common(vcpu,
2725                                              msr_info->index, &msr_info->data,
2726                                              msr_info->host_initiated);
2727                 break;
2728         case MSR_IA32_BBL_CR_CTL3:
2729                 /* This legacy MSR exists but isn't fully documented in current
2730                  * silicon.  It is however accessed by winxp in very narrow
2731                  * scenarios where it sets bit #19, itself documented as
2732                  * a "reserved" bit.  Best effort attempt to source coherent
2733                  * read data here should the balance of the register be
2734                  * interpreted by the guest:
2735                  *
2736                  * L2 cache control register 3: 64GB range, 256KB size,
2737                  * enabled, latency 0x1, configured
2738                  */
2739                 msr_info->data = 0xbe702111;
2740                 break;
2741         case MSR_AMD64_OSVW_ID_LENGTH:
2742                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2743                         return 1;
2744                 msr_info->data = vcpu->arch.osvw.length;
2745                 break;
2746         case MSR_AMD64_OSVW_STATUS:
2747                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2748                         return 1;
2749                 msr_info->data = vcpu->arch.osvw.status;
2750                 break;
2751         case MSR_PLATFORM_INFO:
2752                 msr_info->data = vcpu->arch.msr_platform_info;
2753                 break;
2754         case MSR_MISC_FEATURES_ENABLES:
2755                 msr_info->data = vcpu->arch.msr_misc_features_enables;
2756                 break;
2757         default:
2758                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2759                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2760                 if (!ignore_msrs) {
2761                         vcpu_debug_ratelimited(vcpu, "unhandled rdmsr: 0x%x\n",
2762                                                msr_info->index);
2763                         return 1;
2764                 } else {
2765                         if (report_ignored_msrs)
2766                                 vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n",
2767                                         msr_info->index);
2768                         msr_info->data = 0;
2769                 }
2770                 break;
2771         }
2772         return 0;
2773 }
2774 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2775
2776 /*
2777  * Read or write a bunch of msrs. All parameters are kernel addresses.
2778  *
2779  * @return number of msrs set successfully.
2780  */
2781 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2782                     struct kvm_msr_entry *entries,
2783                     int (*do_msr)(struct kvm_vcpu *vcpu,
2784                                   unsigned index, u64 *data))
2785 {
2786         int i;
2787
2788         for (i = 0; i < msrs->nmsrs; ++i)
2789                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2790                         break;
2791
2792         return i;
2793 }
2794
2795 /*
2796  * Read or write a bunch of msrs. Parameters are user addresses.
2797  *
2798  * @return number of msrs set successfully.
2799  */
2800 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2801                   int (*do_msr)(struct kvm_vcpu *vcpu,
2802                                 unsigned index, u64 *data),
2803                   int writeback)
2804 {
2805         struct kvm_msrs msrs;
2806         struct kvm_msr_entry *entries;
2807         int r, n;
2808         unsigned size;
2809
2810         r = -EFAULT;
2811         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2812                 goto out;
2813
2814         r = -E2BIG;
2815         if (msrs.nmsrs >= MAX_IO_MSRS)
2816                 goto out;
2817
2818         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2819         entries = memdup_user(user_msrs->entries, size);
2820         if (IS_ERR(entries)) {
2821                 r = PTR_ERR(entries);
2822                 goto out;
2823         }
2824
2825         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2826         if (r < 0)
2827                 goto out_free;
2828
2829         r = -EFAULT;
2830         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2831                 goto out_free;
2832
2833         r = n;
2834
2835 out_free:
2836         kfree(entries);
2837 out:
2838         return r;
2839 }
2840
2841 static inline bool kvm_can_mwait_in_guest(void)
2842 {
2843         return boot_cpu_has(X86_FEATURE_MWAIT) &&
2844                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
2845                 boot_cpu_has(X86_FEATURE_ARAT);
2846 }
2847
2848 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2849 {
2850         int r = 0;
2851
2852         switch (ext) {
2853         case KVM_CAP_IRQCHIP:
2854         case KVM_CAP_HLT:
2855         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2856         case KVM_CAP_SET_TSS_ADDR:
2857         case KVM_CAP_EXT_CPUID:
2858         case KVM_CAP_EXT_EMUL_CPUID:
2859         case KVM_CAP_CLOCKSOURCE:
2860         case KVM_CAP_PIT:
2861         case KVM_CAP_NOP_IO_DELAY:
2862         case KVM_CAP_MP_STATE:
2863         case KVM_CAP_SYNC_MMU:
2864         case KVM_CAP_USER_NMI:
2865         case KVM_CAP_REINJECT_CONTROL:
2866         case KVM_CAP_IRQ_INJECT_STATUS:
2867         case KVM_CAP_IOEVENTFD:
2868         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2869         case KVM_CAP_PIT2:
2870         case KVM_CAP_PIT_STATE2:
2871         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2872         case KVM_CAP_XEN_HVM:
2873         case KVM_CAP_VCPU_EVENTS:
2874         case KVM_CAP_HYPERV:
2875         case KVM_CAP_HYPERV_VAPIC:
2876         case KVM_CAP_HYPERV_SPIN:
2877         case KVM_CAP_HYPERV_SYNIC:
2878         case KVM_CAP_HYPERV_SYNIC2:
2879         case KVM_CAP_HYPERV_VP_INDEX:
2880         case KVM_CAP_HYPERV_EVENTFD:
2881         case KVM_CAP_HYPERV_TLBFLUSH:
2882         case KVM_CAP_PCI_SEGMENT:
2883         case KVM_CAP_DEBUGREGS:
2884         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2885         case KVM_CAP_XSAVE:
2886         case KVM_CAP_ASYNC_PF:
2887         case KVM_CAP_GET_TSC_KHZ:
2888         case KVM_CAP_KVMCLOCK_CTRL:
2889         case KVM_CAP_READONLY_MEM:
2890         case KVM_CAP_HYPERV_TIME:
2891         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2892         case KVM_CAP_TSC_DEADLINE_TIMER:
2893         case KVM_CAP_ENABLE_CAP_VM:
2894         case KVM_CAP_DISABLE_QUIRKS:
2895         case KVM_CAP_SET_BOOT_CPU_ID:
2896         case KVM_CAP_SPLIT_IRQCHIP:
2897         case KVM_CAP_IMMEDIATE_EXIT:
2898         case KVM_CAP_GET_MSR_FEATURES:
2899                 r = 1;
2900                 break;
2901         case KVM_CAP_SYNC_REGS:
2902                 r = KVM_SYNC_X86_VALID_FIELDS;
2903                 break;
2904         case KVM_CAP_ADJUST_CLOCK:
2905                 r = KVM_CLOCK_TSC_STABLE;
2906                 break;
2907         case KVM_CAP_X86_DISABLE_EXITS:
2908                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE;
2909                 if(kvm_can_mwait_in_guest())
2910                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
2911                 break;
2912         case KVM_CAP_X86_SMM:
2913                 /* SMBASE is usually relocated above 1M on modern chipsets,
2914                  * and SMM handlers might indeed rely on 4G segment limits,
2915                  * so do not report SMM to be available if real mode is
2916                  * emulated via vm86 mode.  Still, do not go to great lengths
2917                  * to avoid userspace's usage of the feature, because it is a
2918                  * fringe case that is not enabled except via specific settings
2919                  * of the module parameters.
2920                  */
2921                 r = kvm_x86_ops->has_emulated_msr(MSR_IA32_SMBASE);
2922                 break;
2923         case KVM_CAP_VAPIC:
2924                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2925                 break;
2926         case KVM_CAP_NR_VCPUS:
2927                 r = KVM_SOFT_MAX_VCPUS;
2928                 break;
2929         case KVM_CAP_MAX_VCPUS:
2930                 r = KVM_MAX_VCPUS;
2931                 break;
2932         case KVM_CAP_NR_MEMSLOTS:
2933                 r = KVM_USER_MEM_SLOTS;
2934                 break;
2935         case KVM_CAP_PV_MMU:    /* obsolete */
2936                 r = 0;
2937                 break;
2938         case KVM_CAP_MCE:
2939                 r = KVM_MAX_MCE_BANKS;
2940                 break;
2941         case KVM_CAP_XCRS:
2942                 r = boot_cpu_has(X86_FEATURE_XSAVE);
2943                 break;
2944         case KVM_CAP_TSC_CONTROL:
2945                 r = kvm_has_tsc_control;
2946                 break;
2947         case KVM_CAP_X2APIC_API:
2948                 r = KVM_X2APIC_API_VALID_FLAGS;
2949                 break;
2950         case KVM_CAP_NESTED_STATE:
2951                 r = kvm_x86_ops->get_nested_state ?
2952                         kvm_x86_ops->get_nested_state(NULL, 0, 0) : 0;
2953                 break;
2954         default:
2955                 break;
2956         }
2957         return r;
2958
2959 }
2960
2961 long kvm_arch_dev_ioctl(struct file *filp,
2962                         unsigned int ioctl, unsigned long arg)
2963 {
2964         void __user *argp = (void __user *)arg;
2965         long r;
2966
2967         switch (ioctl) {
2968         case KVM_GET_MSR_INDEX_LIST: {
2969                 struct kvm_msr_list __user *user_msr_list = argp;
2970                 struct kvm_msr_list msr_list;
2971                 unsigned n;
2972
2973                 r = -EFAULT;
2974                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2975                         goto out;
2976                 n = msr_list.nmsrs;
2977                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2978                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2979                         goto out;
2980                 r = -E2BIG;
2981                 if (n < msr_list.nmsrs)
2982                         goto out;
2983                 r = -EFAULT;
2984                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2985                                  num_msrs_to_save * sizeof(u32)))
2986                         goto out;
2987                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2988                                  &emulated_msrs,
2989                                  num_emulated_msrs * sizeof(u32)))
2990                         goto out;
2991                 r = 0;
2992                 break;
2993         }
2994         case KVM_GET_SUPPORTED_CPUID:
2995         case KVM_GET_EMULATED_CPUID: {
2996                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2997                 struct kvm_cpuid2 cpuid;
2998
2999                 r = -EFAULT;
3000                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3001                         goto out;
3002
3003                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
3004                                             ioctl);
3005                 if (r)
3006                         goto out;
3007
3008                 r = -EFAULT;
3009                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3010                         goto out;
3011                 r = 0;
3012                 break;
3013         }
3014         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
3015                 r = -EFAULT;
3016                 if (copy_to_user(argp, &kvm_mce_cap_supported,
3017                                  sizeof(kvm_mce_cap_supported)))
3018                         goto out;
3019                 r = 0;
3020                 break;
3021         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
3022                 struct kvm_msr_list __user *user_msr_list = argp;
3023                 struct kvm_msr_list msr_list;
3024                 unsigned int n;
3025
3026                 r = -EFAULT;
3027                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3028                         goto out;
3029                 n = msr_list.nmsrs;
3030                 msr_list.nmsrs = num_msr_based_features;
3031                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3032                         goto out;
3033                 r = -E2BIG;
3034                 if (n < msr_list.nmsrs)
3035                         goto out;
3036                 r = -EFAULT;
3037                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
3038                                  num_msr_based_features * sizeof(u32)))
3039                         goto out;
3040                 r = 0;
3041                 break;
3042         }
3043         case KVM_GET_MSRS:
3044                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
3045                 break;
3046         }
3047         default:
3048                 r = -EINVAL;
3049         }
3050 out:
3051         return r;
3052 }
3053
3054 static void wbinvd_ipi(void *garbage)
3055 {
3056         wbinvd();
3057 }
3058
3059 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
3060 {
3061         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
3062 }
3063
3064 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
3065 {
3066         /* Address WBINVD may be executed by guest */
3067         if (need_emulate_wbinvd(vcpu)) {
3068                 if (kvm_x86_ops->has_wbinvd_exit())
3069                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
3070                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
3071                         smp_call_function_single(vcpu->cpu,
3072                                         wbinvd_ipi, NULL, 1);
3073         }
3074
3075         kvm_x86_ops->vcpu_load(vcpu, cpu);
3076
3077         /* Apply any externally detected TSC adjustments (due to suspend) */
3078         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
3079                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
3080                 vcpu->arch.tsc_offset_adjustment = 0;
3081                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3082         }
3083
3084         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
3085                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
3086                                 rdtsc() - vcpu->arch.last_host_tsc;
3087                 if (tsc_delta < 0)
3088                         mark_tsc_unstable("KVM discovered backwards TSC");
3089
3090                 if (kvm_check_tsc_unstable()) {
3091                         u64 offset = kvm_compute_tsc_offset(vcpu,
3092                                                 vcpu->arch.last_guest_tsc);
3093                         kvm_vcpu_write_tsc_offset(vcpu, offset);
3094                         vcpu->arch.tsc_catchup = 1;
3095                 }
3096
3097                 if (kvm_lapic_hv_timer_in_use(vcpu))
3098                         kvm_lapic_restart_hv_timer(vcpu);
3099
3100                 /*
3101                  * On a host with synchronized TSC, there is no need to update
3102                  * kvmclock on vcpu->cpu migration
3103                  */
3104                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
3105                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
3106                 if (vcpu->cpu != cpu)
3107                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
3108                 vcpu->cpu = cpu;
3109         }
3110
3111         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3112 }
3113
3114 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
3115 {
3116         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3117                 return;
3118
3119         vcpu->arch.st.steal.preempted = KVM_VCPU_PREEMPTED;
3120
3121         kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.st.stime,
3122                         &vcpu->arch.st.steal.preempted,
3123                         offsetof(struct kvm_steal_time, preempted),
3124                         sizeof(vcpu->arch.st.steal.preempted));
3125 }
3126
3127 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
3128 {
3129         int idx;
3130
3131         if (vcpu->preempted)
3132                 vcpu->arch.preempted_in_kernel = !kvm_x86_ops->get_cpl(vcpu);
3133
3134         /*
3135          * Disable page faults because we're in atomic context here.
3136          * kvm_write_guest_offset_cached() would call might_fault()
3137          * that relies on pagefault_disable() to tell if there's a
3138          * bug. NOTE: the write to guest memory may not go through if
3139          * during postcopy live migration or if there's heavy guest
3140          * paging.
3141          */
3142         pagefault_disable();
3143         /*
3144          * kvm_memslots() will be called by
3145          * kvm_write_guest_offset_cached() so take the srcu lock.
3146          */
3147         idx = srcu_read_lock(&vcpu->kvm->srcu);
3148         kvm_steal_time_set_preempted(vcpu);
3149         srcu_read_unlock(&vcpu->kvm->srcu, idx);
3150         pagefault_enable();
3151         kvm_x86_ops->vcpu_put(vcpu);
3152         vcpu->arch.last_host_tsc = rdtsc();
3153         /*
3154          * If userspace has set any breakpoints or watchpoints, dr6 is restored
3155          * on every vmexit, but if not, we might have a stale dr6 from the
3156          * guest. do_debug expects dr6 to be cleared after it runs, do the same.
3157          */
3158         set_debugreg(0, 6);
3159 }
3160
3161 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
3162                                     struct kvm_lapic_state *s)
3163 {
3164         if (vcpu->arch.apicv_active)
3165                 kvm_x86_ops->sync_pir_to_irr(vcpu);
3166
3167         return kvm_apic_get_state(vcpu, s);
3168 }
3169
3170 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
3171                                     struct kvm_lapic_state *s)
3172 {
3173         int r;
3174
3175         r = kvm_apic_set_state(vcpu, s);
3176         if (r)
3177                 return r;
3178         update_cr8_intercept(vcpu);
3179
3180         return 0;
3181 }
3182
3183 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
3184 {
3185         return (!lapic_in_kernel(vcpu) ||
3186                 kvm_apic_accept_pic_intr(vcpu));
3187 }
3188
3189 /*
3190  * if userspace requested an interrupt window, check that the
3191  * interrupt window is open.
3192  *
3193  * No need to exit to userspace if we already have an interrupt queued.
3194  */
3195 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
3196 {
3197         return kvm_arch_interrupt_allowed(vcpu) &&
3198                 !kvm_cpu_has_interrupt(vcpu) &&
3199                 !kvm_event_needs_reinjection(vcpu) &&
3200                 kvm_cpu_accept_dm_intr(vcpu);
3201 }
3202
3203 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
3204                                     struct kvm_interrupt *irq)
3205 {
3206         if (irq->irq >= KVM_NR_INTERRUPTS)
3207                 return -EINVAL;
3208
3209         if (!irqchip_in_kernel(vcpu->kvm)) {
3210                 kvm_queue_interrupt(vcpu, irq->irq, false);
3211                 kvm_make_request(KVM_REQ_EVENT, vcpu);
3212                 return 0;
3213         }
3214
3215         /*
3216          * With in-kernel LAPIC, we only use this to inject EXTINT, so
3217          * fail for in-kernel 8259.
3218          */
3219         if (pic_in_kernel(vcpu->kvm))
3220                 return -ENXIO;
3221
3222         if (vcpu->arch.pending_external_vector != -1)
3223                 return -EEXIST;
3224
3225         vcpu->arch.pending_external_vector = irq->irq;
3226         kvm_make_request(KVM_REQ_EVENT, vcpu);
3227         return 0;
3228 }
3229
3230 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
3231 {
3232         kvm_inject_nmi(vcpu);
3233
3234         return 0;
3235 }
3236
3237 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
3238 {
3239         kvm_make_request(KVM_REQ_SMI, vcpu);
3240
3241         return 0;
3242 }
3243
3244 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
3245                                            struct kvm_tpr_access_ctl *tac)
3246 {
3247         if (tac->flags)
3248                 return -EINVAL;
3249         vcpu->arch.tpr_access_reporting = !!tac->enabled;
3250         return 0;
3251 }
3252
3253 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
3254                                         u64 mcg_cap)
3255 {
3256         int r;
3257         unsigned bank_num = mcg_cap & 0xff, bank;
3258
3259         r = -EINVAL;
3260         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
3261                 goto out;
3262         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
3263                 goto out;
3264         r = 0;
3265         vcpu->arch.mcg_cap = mcg_cap;
3266         /* Init IA32_MCG_CTL to all 1s */
3267         if (mcg_cap & MCG_CTL_P)
3268                 vcpu->arch.mcg_ctl = ~(u64)0;
3269         /* Init IA32_MCi_CTL to all 1s */
3270         for (bank = 0; bank < bank_num; bank++)
3271                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
3272
3273         if (kvm_x86_ops->setup_mce)
3274                 kvm_x86_ops->setup_mce(vcpu);
3275 out:
3276         return r;
3277 }
3278
3279 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
3280                                       struct kvm_x86_mce *mce)
3281 {
3282         u64 mcg_cap = vcpu->arch.mcg_cap;
3283         unsigned bank_num = mcg_cap & 0xff;
3284         u64 *banks = vcpu->arch.mce_banks;
3285
3286         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
3287                 return -EINVAL;
3288         /*
3289          * if IA32_MCG_CTL is not all 1s, the uncorrected error
3290          * reporting is disabled
3291          */
3292         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
3293             vcpu->arch.mcg_ctl != ~(u64)0)
3294                 return 0;
3295         banks += 4 * mce->bank;
3296         /*
3297          * if IA32_MCi_CTL is not all 1s, the uncorrected error
3298          * reporting is disabled for the bank
3299          */
3300         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
3301                 return 0;
3302         if (mce->status & MCI_STATUS_UC) {
3303                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
3304                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
3305                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3306                         return 0;
3307                 }
3308                 if (banks[1] & MCI_STATUS_VAL)
3309                         mce->status |= MCI_STATUS_OVER;
3310                 banks[2] = mce->addr;
3311                 banks[3] = mce->misc;
3312                 vcpu->arch.mcg_status = mce->mcg_status;
3313                 banks[1] = mce->status;
3314                 kvm_queue_exception(vcpu, MC_VECTOR);
3315         } else if (!(banks[1] & MCI_STATUS_VAL)
3316                    || !(banks[1] & MCI_STATUS_UC)) {
3317                 if (banks[1] & MCI_STATUS_VAL)
3318                         mce->status |= MCI_STATUS_OVER;
3319                 banks[2] = mce->addr;
3320                 banks[3] = mce->misc;
3321                 banks[1] = mce->status;
3322         } else
3323                 banks[1] |= MCI_STATUS_OVER;
3324         return 0;
3325 }
3326
3327 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
3328                                                struct kvm_vcpu_events *events)
3329 {
3330         process_nmi(vcpu);
3331         /*
3332          * FIXME: pass injected and pending separately.  This is only
3333          * needed for nested virtualization, whose state cannot be
3334          * migrated yet.  For now we can combine them.
3335          */
3336         events->exception.injected =
3337                 (vcpu->arch.exception.pending ||
3338                  vcpu->arch.exception.injected) &&
3339                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
3340         events->exception.nr = vcpu->arch.exception.nr;
3341         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
3342         events->exception.pad = 0;
3343         events->exception.error_code = vcpu->arch.exception.error_code;
3344
3345         events->interrupt.injected =
3346                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
3347         events->interrupt.nr = vcpu->arch.interrupt.nr;
3348         events->interrupt.soft = 0;
3349         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
3350
3351         events->nmi.injected = vcpu->arch.nmi_injected;
3352         events->nmi.pending = vcpu->arch.nmi_pending != 0;
3353         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
3354         events->nmi.pad = 0;
3355
3356         events->sipi_vector = 0; /* never valid when reporting to user space */
3357
3358         events->smi.smm = is_smm(vcpu);
3359         events->smi.pending = vcpu->arch.smi_pending;
3360         events->smi.smm_inside_nmi =
3361                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
3362         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
3363
3364         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
3365                          | KVM_VCPUEVENT_VALID_SHADOW
3366                          | KVM_VCPUEVENT_VALID_SMM);
3367         memset(&events->reserved, 0, sizeof(events->reserved));
3368 }
3369
3370 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags);
3371
3372 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
3373                                               struct kvm_vcpu_events *events)
3374 {
3375         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3376                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3377                               | KVM_VCPUEVENT_VALID_SHADOW
3378                               | KVM_VCPUEVENT_VALID_SMM))
3379                 return -EINVAL;
3380
3381         if (events->exception.injected &&
3382             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR ||
3383              is_guest_mode(vcpu)))
3384                 return -EINVAL;
3385
3386         /* INITs are latched while in SMM */
3387         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
3388             (events->smi.smm || events->smi.pending) &&
3389             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
3390                 return -EINVAL;
3391
3392         process_nmi(vcpu);
3393         vcpu->arch.exception.injected = false;
3394         vcpu->arch.exception.pending = events->exception.injected;
3395         vcpu->arch.exception.nr = events->exception.nr;
3396         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3397         vcpu->arch.exception.error_code = events->exception.error_code;
3398
3399         vcpu->arch.interrupt.injected = events->interrupt.injected;
3400         vcpu->arch.interrupt.nr = events->interrupt.nr;
3401         vcpu->arch.interrupt.soft = events->interrupt.soft;
3402         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3403                 kvm_x86_ops->set_interrupt_shadow(vcpu,
3404                                                   events->interrupt.shadow);
3405
3406         vcpu->arch.nmi_injected = events->nmi.injected;
3407         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3408                 vcpu->arch.nmi_pending = events->nmi.pending;
3409         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3410
3411         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3412             lapic_in_kernel(vcpu))
3413                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3414
3415         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
3416                 u32 hflags = vcpu->arch.hflags;
3417                 if (events->smi.smm)
3418                         hflags |= HF_SMM_MASK;
3419                 else
3420                         hflags &= ~HF_SMM_MASK;
3421                 kvm_set_hflags(vcpu, hflags);
3422
3423                 vcpu->arch.smi_pending = events->smi.pending;
3424
3425                 if (events->smi.smm) {
3426                         if (events->smi.smm_inside_nmi)
3427                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3428                         else
3429                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3430                         if (lapic_in_kernel(vcpu)) {
3431                                 if (events->smi.latched_init)
3432                                         set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3433                                 else
3434                                         clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3435                         }
3436                 }
3437         }
3438
3439         kvm_make_request(KVM_REQ_EVENT, vcpu);
3440
3441         return 0;
3442 }
3443
3444 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3445                                              struct kvm_debugregs *dbgregs)
3446 {
3447         unsigned long val;
3448
3449         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3450         kvm_get_dr(vcpu, 6, &val);
3451         dbgregs->dr6 = val;
3452         dbgregs->dr7 = vcpu->arch.dr7;
3453         dbgregs->flags = 0;
3454         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3455 }
3456
3457 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3458                                             struct kvm_debugregs *dbgregs)
3459 {
3460         if (dbgregs->flags)
3461                 return -EINVAL;
3462
3463         if (dbgregs->dr6 & ~0xffffffffull)
3464                 return -EINVAL;
3465         if (dbgregs->dr7 & ~0xffffffffull)
3466                 return -EINVAL;
3467
3468         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3469         kvm_update_dr0123(vcpu);
3470         vcpu->arch.dr6 = dbgregs->dr6;
3471         kvm_update_dr6(vcpu);
3472         vcpu->arch.dr7 = dbgregs->dr7;
3473         kvm_update_dr7(vcpu);
3474
3475         return 0;
3476 }
3477
3478 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3479
3480 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3481 {
3482         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3483         u64 xstate_bv = xsave->header.xfeatures;
3484         u64 valid;
3485
3486         /*
3487          * Copy legacy XSAVE area, to avoid complications with CPUID
3488          * leaves 0 and 1 in the loop below.
3489          */
3490         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3491
3492         /* Set XSTATE_BV */
3493         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
3494         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3495
3496         /*
3497          * Copy each region from the possibly compacted offset to the
3498          * non-compacted offset.
3499          */
3500         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3501         while (valid) {
3502                 u64 feature = valid & -valid;
3503                 int index = fls64(feature) - 1;
3504                 void *src = get_xsave_addr(xsave, feature);
3505
3506                 if (src) {
3507                         u32 size, offset, ecx, edx;
3508                         cpuid_count(XSTATE_CPUID, index,
3509                                     &size, &offset, &ecx, &edx);
3510                         if (feature == XFEATURE_MASK_PKRU)
3511                                 memcpy(dest + offset, &vcpu->arch.pkru,
3512                                        sizeof(vcpu->arch.pkru));
3513                         else
3514                                 memcpy(dest + offset, src, size);
3515
3516                 }
3517
3518                 valid -= feature;
3519         }
3520 }
3521
3522 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3523 {
3524         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3525         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3526         u64 valid;
3527
3528         /*
3529          * Copy legacy XSAVE area, to avoid complications with CPUID
3530          * leaves 0 and 1 in the loop below.
3531          */
3532         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3533
3534         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3535         xsave->header.xfeatures = xstate_bv;
3536         if (boot_cpu_has(X86_FEATURE_XSAVES))
3537                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3538
3539         /*
3540          * Copy each region from the non-compacted offset to the
3541          * possibly compacted offset.
3542          */
3543         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3544         while (valid) {
3545                 u64 feature = valid & -valid;
3546                 int index = fls64(feature) - 1;
3547                 void *dest = get_xsave_addr(xsave, feature);
3548
3549                 if (dest) {
3550                         u32 size, offset, ecx, edx;
3551                         cpuid_count(XSTATE_CPUID, index,
3552                                     &size, &offset, &ecx, &edx);
3553                         if (feature == XFEATURE_MASK_PKRU)
3554                                 memcpy(&vcpu->arch.pkru, src + offset,
3555                                        sizeof(vcpu->arch.pkru));
3556                         else
3557                                 memcpy(dest, src + offset, size);
3558                 }
3559
3560                 valid -= feature;
3561         }
3562 }
3563
3564 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3565                                          struct kvm_xsave *guest_xsave)
3566 {
3567         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3568                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3569                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3570         } else {
3571                 memcpy(guest_xsave->region,
3572                         &vcpu->arch.guest_fpu.state.fxsave,
3573                         sizeof(struct fxregs_state));
3574                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3575                         XFEATURE_MASK_FPSSE;
3576         }
3577 }
3578
3579 #define XSAVE_MXCSR_OFFSET 24
3580
3581 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3582                                         struct kvm_xsave *guest_xsave)
3583 {
3584         u64 xstate_bv =
3585                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3586         u32 mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
3587
3588         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3589                 /*
3590                  * Here we allow setting states that are not present in
3591                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3592                  * with old userspace.
3593                  */
3594                 if (xstate_bv & ~kvm_supported_xcr0() ||
3595                         mxcsr & ~mxcsr_feature_mask)
3596                         return -EINVAL;
3597                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3598         } else {
3599                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
3600                         mxcsr & ~mxcsr_feature_mask)
3601                         return -EINVAL;
3602                 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3603                         guest_xsave->region, sizeof(struct fxregs_state));
3604         }
3605         return 0;
3606 }
3607
3608 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3609                                         struct kvm_xcrs *guest_xcrs)
3610 {
3611         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
3612                 guest_xcrs->nr_xcrs = 0;
3613                 return;
3614         }
3615
3616         guest_xcrs->nr_xcrs = 1;
3617         guest_xcrs->flags = 0;
3618         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3619         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3620 }
3621
3622 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3623                                        struct kvm_xcrs *guest_xcrs)
3624 {
3625         int i, r = 0;
3626
3627         if (!boot_cpu_has(X86_FEATURE_XSAVE))
3628                 return -EINVAL;
3629
3630         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3631                 return -EINVAL;
3632
3633         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3634                 /* Only support XCR0 currently */
3635                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3636                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3637                                 guest_xcrs->xcrs[i].value);
3638                         break;
3639                 }
3640         if (r)
3641                 r = -EINVAL;
3642         return r;
3643 }
3644
3645 /*
3646  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3647  * stopped by the hypervisor.  This function will be called from the host only.
3648  * EINVAL is returned when the host attempts to set the flag for a guest that
3649  * does not support pv clocks.
3650  */
3651 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3652 {
3653         if (!vcpu->arch.pv_time_enabled)
3654                 return -EINVAL;
3655         vcpu->arch.pvclock_set_guest_stopped_request = true;
3656         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3657         return 0;
3658 }
3659
3660 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
3661                                      struct kvm_enable_cap *cap)
3662 {
3663         if (cap->flags)
3664                 return -EINVAL;
3665
3666         switch (cap->cap) {
3667         case KVM_CAP_HYPERV_SYNIC2:
3668                 if (cap->args[0])
3669                         return -EINVAL;
3670         case KVM_CAP_HYPERV_SYNIC:
3671                 if (!irqchip_in_kernel(vcpu->kvm))
3672                         return -EINVAL;
3673                 return kvm_hv_activate_synic(vcpu, cap->cap ==
3674                                              KVM_CAP_HYPERV_SYNIC2);
3675         default:
3676                 return -EINVAL;
3677         }
3678 }
3679
3680 long kvm_arch_vcpu_ioctl(struct file *filp,
3681                          unsigned int ioctl, unsigned long arg)
3682 {
3683         struct kvm_vcpu *vcpu = filp->private_data;
3684         void __user *argp = (void __user *)arg;
3685         int r;
3686         union {
3687                 struct kvm_lapic_state *lapic;
3688                 struct kvm_xsave *xsave;
3689                 struct kvm_xcrs *xcrs;
3690                 void *buffer;
3691         } u;
3692
3693         vcpu_load(vcpu);
3694
3695         u.buffer = NULL;
3696         switch (ioctl) {
3697         case KVM_GET_LAPIC: {
3698                 r = -EINVAL;
3699                 if (!lapic_in_kernel(vcpu))
3700                         goto out;
3701                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3702
3703                 r = -ENOMEM;
3704                 if (!u.lapic)
3705                         goto out;
3706                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3707                 if (r)
3708                         goto out;
3709                 r = -EFAULT;
3710                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3711                         goto out;
3712                 r = 0;
3713                 break;
3714         }
3715         case KVM_SET_LAPIC: {
3716                 r = -EINVAL;
3717                 if (!lapic_in_kernel(vcpu))
3718                         goto out;
3719                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3720                 if (IS_ERR(u.lapic)) {
3721                         r = PTR_ERR(u.lapic);
3722                         goto out_nofree;
3723                 }
3724
3725                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3726                 break;
3727         }
3728         case KVM_INTERRUPT: {
3729                 struct kvm_interrupt irq;
3730
3731                 r = -EFAULT;
3732                 if (copy_from_user(&irq, argp, sizeof irq))
3733                         goto out;
3734                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3735                 break;
3736         }
3737         case KVM_NMI: {
3738                 r = kvm_vcpu_ioctl_nmi(vcpu);
3739                 break;
3740         }
3741         case KVM_SMI: {
3742                 r = kvm_vcpu_ioctl_smi(vcpu);
3743                 break;
3744         }
3745         case KVM_SET_CPUID: {
3746                 struct kvm_cpuid __user *cpuid_arg = argp;
3747                 struct kvm_cpuid cpuid;
3748
3749                 r = -EFAULT;
3750                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3751                         goto out;
3752                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3753                 break;
3754         }
3755         case KVM_SET_CPUID2: {
3756                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3757                 struct kvm_cpuid2 cpuid;
3758
3759                 r = -EFAULT;
3760                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3761                         goto out;
3762                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3763                                               cpuid_arg->entries);
3764                 break;
3765         }
3766         case KVM_GET_CPUID2: {
3767                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3768                 struct kvm_cpuid2 cpuid;
3769
3770                 r = -EFAULT;
3771                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3772                         goto out;
3773                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3774                                               cpuid_arg->entries);
3775                 if (r)
3776                         goto out;
3777                 r = -EFAULT;
3778                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3779                         goto out;
3780                 r = 0;
3781                 break;
3782         }
3783         case KVM_GET_MSRS: {
3784                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
3785                 r = msr_io(vcpu, argp, do_get_msr, 1);
3786                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3787                 break;
3788         }
3789         case KVM_SET_MSRS: {
3790                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
3791                 r = msr_io(vcpu, argp, do_set_msr, 0);
3792                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3793                 break;
3794         }
3795         case KVM_TPR_ACCESS_REPORTING: {
3796                 struct kvm_tpr_access_ctl tac;
3797
3798                 r = -EFAULT;
3799                 if (copy_from_user(&tac, argp, sizeof tac))
3800                         goto out;
3801                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3802                 if (r)
3803                         goto out;
3804                 r = -EFAULT;
3805                 if (copy_to_user(argp, &tac, sizeof tac))
3806                         goto out;
3807                 r = 0;
3808                 break;
3809         };
3810         case KVM_SET_VAPIC_ADDR: {
3811                 struct kvm_vapic_addr va;
3812                 int idx;
3813
3814                 r = -EINVAL;
3815                 if (!lapic_in_kernel(vcpu))
3816                         goto out;
3817                 r = -EFAULT;
3818                 if (copy_from_user(&va, argp, sizeof va))
3819                         goto out;
3820                 idx = srcu_read_lock(&vcpu->kvm->srcu);
3821                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3822                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3823                 break;
3824         }
3825         case KVM_X86_SETUP_MCE: {
3826                 u64 mcg_cap;
3827
3828                 r = -EFAULT;
3829                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3830                         goto out;
3831                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3832                 break;
3833         }
3834         case KVM_X86_SET_MCE: {
3835                 struct kvm_x86_mce mce;
3836
3837                 r = -EFAULT;
3838                 if (copy_from_user(&mce, argp, sizeof mce))
3839                         goto out;
3840                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3841                 break;
3842         }
3843         case KVM_GET_VCPU_EVENTS: {
3844                 struct kvm_vcpu_events events;
3845
3846                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3847
3848                 r = -EFAULT;
3849                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3850                         break;
3851                 r = 0;
3852                 break;
3853         }
3854         case KVM_SET_VCPU_EVENTS: {
3855                 struct kvm_vcpu_events events;
3856
3857                 r = -EFAULT;
3858                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3859                         break;
3860
3861                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3862                 break;
3863         }
3864         case KVM_GET_DEBUGREGS: {
3865                 struct kvm_debugregs dbgregs;
3866
3867                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3868
3869                 r = -EFAULT;
3870                 if (copy_to_user(argp, &dbgregs,
3871                                  sizeof(struct kvm_debugregs)))
3872                         break;
3873                 r = 0;
3874                 break;
3875         }
3876         case KVM_SET_DEBUGREGS: {
3877                 struct kvm_debugregs dbgregs;
3878
3879                 r = -EFAULT;
3880                 if (copy_from_user(&dbgregs, argp,
3881                                    sizeof(struct kvm_debugregs)))
3882                         break;
3883
3884                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3885                 break;
3886         }
3887         case KVM_GET_XSAVE: {
3888                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3889                 r = -ENOMEM;
3890                 if (!u.xsave)
3891                         break;
3892
3893                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3894
3895                 r = -EFAULT;
3896                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3897                         break;
3898                 r = 0;
3899                 break;
3900         }
3901         case KVM_SET_XSAVE: {
3902                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3903                 if (IS_ERR(u.xsave)) {
3904                         r = PTR_ERR(u.xsave);
3905                         goto out_nofree;
3906                 }
3907
3908                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3909                 break;
3910         }
3911         case KVM_GET_XCRS: {
3912                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3913                 r = -ENOMEM;
3914                 if (!u.xcrs)
3915                         break;
3916
3917                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3918
3919                 r = -EFAULT;
3920                 if (copy_to_user(argp, u.xcrs,
3921                                  sizeof(struct kvm_xcrs)))
3922                         break;
3923                 r = 0;
3924                 break;
3925         }
3926         case KVM_SET_XCRS: {
3927                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3928                 if (IS_ERR(u.xcrs)) {
3929                         r = PTR_ERR(u.xcrs);
3930                         goto out_nofree;
3931                 }
3932
3933                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3934                 break;
3935         }
3936         case KVM_SET_TSC_KHZ: {
3937                 u32 user_tsc_khz;
3938
3939                 r = -EINVAL;
3940                 user_tsc_khz = (u32)arg;
3941
3942                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3943                         goto out;
3944
3945                 if (user_tsc_khz == 0)
3946                         user_tsc_khz = tsc_khz;
3947
3948                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
3949                         r = 0;
3950
3951                 goto out;
3952         }
3953         case KVM_GET_TSC_KHZ: {
3954                 r = vcpu->arch.virtual_tsc_khz;
3955                 goto out;
3956         }
3957         case KVM_KVMCLOCK_CTRL: {
3958                 r = kvm_set_guest_paused(vcpu);
3959                 goto out;
3960         }
3961         case KVM_ENABLE_CAP: {
3962                 struct kvm_enable_cap cap;
3963
3964                 r = -EFAULT;
3965                 if (copy_from_user(&cap, argp, sizeof(cap)))
3966                         goto out;
3967                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
3968                 break;
3969         }
3970         case KVM_GET_NESTED_STATE: {
3971                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
3972                 u32 user_data_size;
3973
3974                 r = -EINVAL;
3975                 if (!kvm_x86_ops->get_nested_state)
3976                         break;
3977
3978                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
3979                 if (get_user(user_data_size, &user_kvm_nested_state->size))
3980                         return -EFAULT;
3981
3982                 r = kvm_x86_ops->get_nested_state(vcpu, user_kvm_nested_state,
3983                                                   user_data_size);
3984                 if (r < 0)
3985                         return r;
3986
3987                 if (r > user_data_size) {
3988                         if (put_user(r, &user_kvm_nested_state->size))
3989                                 return -EFAULT;
3990                         return -E2BIG;
3991                 }
3992                 r = 0;
3993                 break;
3994         }
3995         case KVM_SET_NESTED_STATE: {
3996                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
3997                 struct kvm_nested_state kvm_state;
3998
3999                 r = -EINVAL;
4000                 if (!kvm_x86_ops->set_nested_state)
4001                         break;
4002
4003                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
4004                         return -EFAULT;
4005
4006                 if (kvm_state.size < sizeof(kvm_state))
4007                         return -EINVAL;
4008
4009                 if (kvm_state.flags &
4010                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE))
4011                         return -EINVAL;
4012
4013                 /* nested_run_pending implies guest_mode.  */
4014                 if (kvm_state.flags == KVM_STATE_NESTED_RUN_PENDING)
4015                         return -EINVAL;
4016
4017                 r = kvm_x86_ops->set_nested_state(vcpu, user_kvm_nested_state, &kvm_state);
4018                 break;
4019         }
4020         default:
4021                 r = -EINVAL;
4022         }
4023 out:
4024         kfree(u.buffer);
4025 out_nofree:
4026         vcpu_put(vcpu);
4027         return r;
4028 }
4029
4030 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
4031 {
4032         return VM_FAULT_SIGBUS;
4033 }
4034
4035 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
4036 {
4037         int ret;
4038
4039         if (addr > (unsigned int)(-3 * PAGE_SIZE))
4040                 return -EINVAL;
4041         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
4042         return ret;
4043 }
4044
4045 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
4046                                               u64 ident_addr)
4047 {
4048         return kvm_x86_ops->set_identity_map_addr(kvm, ident_addr);
4049 }
4050
4051 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
4052                                           u32 kvm_nr_mmu_pages)
4053 {
4054         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
4055                 return -EINVAL;
4056
4057         mutex_lock(&kvm->slots_lock);
4058
4059         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
4060         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
4061
4062         mutex_unlock(&kvm->slots_lock);
4063         return 0;
4064 }
4065
4066 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
4067 {
4068         return kvm->arch.n_max_mmu_pages;
4069 }
4070
4071 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
4072 {
4073         struct kvm_pic *pic = kvm->arch.vpic;
4074         int r;
4075
4076         r = 0;
4077         switch (chip->chip_id) {
4078         case KVM_IRQCHIP_PIC_MASTER:
4079                 memcpy(&chip->chip.pic, &pic->pics[0],
4080                         sizeof(struct kvm_pic_state));
4081                 break;
4082         case KVM_IRQCHIP_PIC_SLAVE:
4083                 memcpy(&chip->chip.pic, &pic->pics[1],
4084                         sizeof(struct kvm_pic_state));
4085                 break;
4086         case KVM_IRQCHIP_IOAPIC:
4087                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
4088                 break;
4089         default:
4090                 r = -EINVAL;
4091                 break;
4092         }
4093         return r;
4094 }
4095
4096 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
4097 {
4098         struct kvm_pic *pic = kvm->arch.vpic;
4099         int r;
4100
4101         r = 0;
4102         switch (chip->chip_id) {
4103         case KVM_IRQCHIP_PIC_MASTER:
4104                 spin_lock(&pic->lock);
4105                 memcpy(&pic->pics[0], &chip->chip.pic,
4106                         sizeof(struct kvm_pic_state));
4107                 spin_unlock(&pic->lock);
4108                 break;
4109         case KVM_IRQCHIP_PIC_SLAVE:
4110                 spin_lock(&pic->lock);
4111                 memcpy(&pic->pics[1], &chip->chip.pic,
4112                         sizeof(struct kvm_pic_state));
4113                 spin_unlock(&pic->lock);
4114                 break;
4115         case KVM_IRQCHIP_IOAPIC:
4116                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
4117                 break;
4118         default:
4119                 r = -EINVAL;
4120                 break;
4121         }
4122         kvm_pic_update_irq(pic);
4123         return r;
4124 }
4125
4126 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4127 {
4128         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
4129
4130         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
4131
4132         mutex_lock(&kps->lock);
4133         memcpy(ps, &kps->channels, sizeof(*ps));
4134         mutex_unlock(&kps->lock);
4135         return 0;
4136 }
4137
4138 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4139 {
4140         int i;
4141         struct kvm_pit *pit = kvm->arch.vpit;
4142
4143         mutex_lock(&pit->pit_state.lock);
4144         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
4145         for (i = 0; i < 3; i++)
4146                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
4147         mutex_unlock(&pit->pit_state.lock);
4148         return 0;
4149 }
4150
4151 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4152 {
4153         mutex_lock(&kvm->arch.vpit->pit_state.lock);
4154         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
4155                 sizeof(ps->channels));
4156         ps->flags = kvm->arch.vpit->pit_state.flags;
4157         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
4158         memset(&ps->reserved, 0, sizeof(ps->reserved));
4159         return 0;
4160 }
4161
4162 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4163 {
4164         int start = 0;
4165         int i;
4166         u32 prev_legacy, cur_legacy;
4167         struct kvm_pit *pit = kvm->arch.vpit;
4168
4169         mutex_lock(&pit->pit_state.lock);
4170         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
4171         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
4172         if (!prev_legacy && cur_legacy)
4173                 start = 1;
4174         memcpy(&pit->pit_state.channels, &ps->channels,
4175                sizeof(pit->pit_state.channels));
4176         pit->pit_state.flags = ps->flags;
4177         for (i = 0; i < 3; i++)
4178                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
4179                                    start && i == 0);
4180         mutex_unlock(&pit->pit_state.lock);
4181         return 0;
4182 }
4183
4184 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
4185                                  struct kvm_reinject_control *control)
4186 {
4187         struct kvm_pit *pit = kvm->arch.vpit;
4188
4189         if (!pit)
4190                 return -ENXIO;
4191
4192         /* pit->pit_state.lock was overloaded to prevent userspace from getting
4193          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
4194          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
4195          */
4196         mutex_lock(&pit->pit_state.lock);
4197         kvm_pit_set_reinject(pit, control->pit_reinject);
4198         mutex_unlock(&pit->pit_state.lock);
4199
4200         return 0;
4201 }
4202
4203 /**
4204  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
4205  * @kvm: kvm instance
4206  * @log: slot id and address to which we copy the log
4207  *
4208  * Steps 1-4 below provide general overview of dirty page logging. See
4209  * kvm_get_dirty_log_protect() function description for additional details.
4210  *
4211  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
4212  * always flush the TLB (step 4) even if previous step failed  and the dirty
4213  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
4214  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
4215  * writes will be marked dirty for next log read.
4216  *
4217  *   1. Take a snapshot of the bit and clear it if needed.
4218  *   2. Write protect the corresponding page.
4219  *   3. Copy the snapshot to the userspace.
4220  *   4. Flush TLB's if needed.
4221  */
4222 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
4223 {
4224         bool is_dirty = false;
4225         int r;
4226
4227         mutex_lock(&kvm->slots_lock);
4228
4229         /*
4230          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4231          */
4232         if (kvm_x86_ops->flush_log_dirty)
4233                 kvm_x86_ops->flush_log_dirty(kvm);
4234
4235         r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
4236
4237         /*
4238          * All the TLBs can be flushed out of mmu lock, see the comments in
4239          * kvm_mmu_slot_remove_write_access().
4240          */
4241         lockdep_assert_held(&kvm->slots_lock);
4242         if (is_dirty)
4243                 kvm_flush_remote_tlbs(kvm);
4244
4245         mutex_unlock(&kvm->slots_lock);
4246         return r;
4247 }
4248
4249 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
4250                         bool line_status)
4251 {
4252         if (!irqchip_in_kernel(kvm))
4253                 return -ENXIO;
4254
4255         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
4256                                         irq_event->irq, irq_event->level,
4257                                         line_status);
4258         return 0;
4259 }
4260
4261 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
4262                                    struct kvm_enable_cap *cap)
4263 {
4264         int r;
4265
4266         if (cap->flags)
4267                 return -EINVAL;
4268
4269         switch (cap->cap) {
4270         case KVM_CAP_DISABLE_QUIRKS:
4271                 kvm->arch.disabled_quirks = cap->args[0];
4272                 r = 0;
4273                 break;
4274         case KVM_CAP_SPLIT_IRQCHIP: {
4275                 mutex_lock(&kvm->lock);
4276                 r = -EINVAL;
4277                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
4278                         goto split_irqchip_unlock;
4279                 r = -EEXIST;
4280                 if (irqchip_in_kernel(kvm))
4281                         goto split_irqchip_unlock;
4282                 if (kvm->created_vcpus)
4283                         goto split_irqchip_unlock;
4284                 r = kvm_setup_empty_irq_routing(kvm);
4285                 if (r)
4286                         goto split_irqchip_unlock;
4287                 /* Pairs with irqchip_in_kernel. */
4288                 smp_wmb();
4289                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
4290                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
4291                 r = 0;
4292 split_irqchip_unlock:
4293                 mutex_unlock(&kvm->lock);
4294                 break;
4295         }
4296         case KVM_CAP_X2APIC_API:
4297                 r = -EINVAL;
4298                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
4299                         break;
4300
4301                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
4302                         kvm->arch.x2apic_format = true;
4303                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
4304                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
4305
4306                 r = 0;
4307                 break;
4308         case KVM_CAP_X86_DISABLE_EXITS:
4309                 r = -EINVAL;
4310                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
4311                         break;
4312
4313                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
4314                         kvm_can_mwait_in_guest())
4315                         kvm->arch.mwait_in_guest = true;
4316                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
4317                         kvm->arch.hlt_in_guest = true;
4318                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
4319                         kvm->arch.pause_in_guest = true;
4320                 r = 0;
4321                 break;
4322         default:
4323                 r = -EINVAL;
4324                 break;
4325         }
4326         return r;
4327 }
4328
4329 long kvm_arch_vm_ioctl(struct file *filp,
4330                        unsigned int ioctl, unsigned long arg)
4331 {
4332         struct kvm *kvm = filp->private_data;
4333         void __user *argp = (void __user *)arg;
4334         int r = -ENOTTY;
4335         /*
4336          * This union makes it completely explicit to gcc-3.x
4337          * that these two variables' stack usage should be
4338          * combined, not added together.
4339          */
4340         union {
4341                 struct kvm_pit_state ps;
4342                 struct kvm_pit_state2 ps2;
4343                 struct kvm_pit_config pit_config;
4344         } u;
4345
4346         switch (ioctl) {
4347         case KVM_SET_TSS_ADDR:
4348                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
4349                 break;
4350         case KVM_SET_IDENTITY_MAP_ADDR: {
4351                 u64 ident_addr;
4352
4353                 mutex_lock(&kvm->lock);
4354                 r = -EINVAL;
4355                 if (kvm->created_vcpus)
4356                         goto set_identity_unlock;
4357                 r = -EFAULT;
4358                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
4359                         goto set_identity_unlock;
4360                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
4361 set_identity_unlock:
4362                 mutex_unlock(&kvm->lock);
4363                 break;
4364         }
4365         case KVM_SET_NR_MMU_PAGES:
4366                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
4367                 break;
4368         case KVM_GET_NR_MMU_PAGES:
4369                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
4370                 break;
4371         case KVM_CREATE_IRQCHIP: {
4372                 mutex_lock(&kvm->lock);
4373
4374                 r = -EEXIST;
4375                 if (irqchip_in_kernel(kvm))
4376                         goto create_irqchip_unlock;
4377
4378                 r = -EINVAL;
4379                 if (kvm->created_vcpus)
4380                         goto create_irqchip_unlock;
4381
4382                 r = kvm_pic_init(kvm);
4383                 if (r)
4384                         goto create_irqchip_unlock;
4385
4386                 r = kvm_ioapic_init(kvm);
4387                 if (r) {
4388                         kvm_pic_destroy(kvm);
4389                         goto create_irqchip_unlock;
4390                 }
4391
4392                 r = kvm_setup_default_irq_routing(kvm);
4393                 if (r) {
4394                         kvm_ioapic_destroy(kvm);
4395                         kvm_pic_destroy(kvm);
4396                         goto create_irqchip_unlock;
4397                 }
4398                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4399                 smp_wmb();
4400                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
4401         create_irqchip_unlock:
4402                 mutex_unlock(&kvm->lock);
4403                 break;
4404         }
4405         case KVM_CREATE_PIT:
4406                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
4407                 goto create_pit;
4408         case KVM_CREATE_PIT2:
4409                 r = -EFAULT;
4410                 if (copy_from_user(&u.pit_config, argp,
4411                                    sizeof(struct kvm_pit_config)))
4412                         goto out;
4413         create_pit:
4414                 mutex_lock(&kvm->lock);
4415                 r = -EEXIST;
4416                 if (kvm->arch.vpit)
4417                         goto create_pit_unlock;
4418                 r = -ENOMEM;
4419                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
4420                 if (kvm->arch.vpit)
4421                         r = 0;
4422         create_pit_unlock:
4423                 mutex_unlock(&kvm->lock);
4424                 break;
4425         case KVM_GET_IRQCHIP: {
4426                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4427                 struct kvm_irqchip *chip;
4428
4429                 chip = memdup_user(argp, sizeof(*chip));
4430                 if (IS_ERR(chip)) {
4431                         r = PTR_ERR(chip);
4432                         goto out;
4433                 }
4434
4435                 r = -ENXIO;
4436                 if (!irqchip_kernel(kvm))
4437                         goto get_irqchip_out;
4438                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
4439                 if (r)
4440                         goto get_irqchip_out;
4441                 r = -EFAULT;
4442                 if (copy_to_user(argp, chip, sizeof *chip))
4443                         goto get_irqchip_out;
4444                 r = 0;
4445         get_irqchip_out:
4446                 kfree(chip);
4447                 break;
4448         }
4449         case KVM_SET_IRQCHIP: {
4450                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4451                 struct kvm_irqchip *chip;
4452
4453                 chip = memdup_user(argp, sizeof(*chip));
4454                 if (IS_ERR(chip)) {
4455                         r = PTR_ERR(chip);
4456                         goto out;
4457                 }
4458
4459                 r = -ENXIO;
4460                 if (!irqchip_kernel(kvm))
4461                         goto set_irqchip_out;
4462                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
4463                 if (r)
4464                         goto set_irqchip_out;
4465                 r = 0;
4466         set_irqchip_out:
4467                 kfree(chip);
4468                 break;
4469         }
4470         case KVM_GET_PIT: {
4471                 r = -EFAULT;
4472                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
4473                         goto out;
4474                 r = -ENXIO;
4475                 if (!kvm->arch.vpit)
4476                         goto out;
4477                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
4478                 if (r)
4479                         goto out;
4480                 r = -EFAULT;
4481                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
4482                         goto out;
4483                 r = 0;
4484                 break;
4485         }
4486         case KVM_SET_PIT: {
4487                 r = -EFAULT;
4488                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
4489                         goto out;
4490                 r = -ENXIO;
4491                 if (!kvm->arch.vpit)
4492                         goto out;
4493                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
4494                 break;
4495         }
4496         case KVM_GET_PIT2: {
4497                 r = -ENXIO;
4498                 if (!kvm->arch.vpit)
4499                         goto out;
4500                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
4501                 if (r)
4502                         goto out;
4503                 r = -EFAULT;
4504                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
4505                         goto out;
4506                 r = 0;
4507                 break;
4508         }
4509         case KVM_SET_PIT2: {
4510                 r = -EFAULT;
4511                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
4512                         goto out;
4513                 r = -ENXIO;
4514                 if (!kvm->arch.vpit)
4515                         goto out;
4516                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
4517                 break;
4518         }
4519         case KVM_REINJECT_CONTROL: {
4520                 struct kvm_reinject_control control;
4521                 r =  -EFAULT;
4522                 if (copy_from_user(&control, argp, sizeof(control)))
4523                         goto out;
4524                 r = kvm_vm_ioctl_reinject(kvm, &control);
4525                 break;
4526         }
4527         case KVM_SET_BOOT_CPU_ID:
4528                 r = 0;
4529                 mutex_lock(&kvm->lock);
4530                 if (kvm->created_vcpus)
4531                         r = -EBUSY;
4532                 else
4533                         kvm->arch.bsp_vcpu_id = arg;
4534                 mutex_unlock(&kvm->lock);
4535                 break;
4536         case KVM_XEN_HVM_CONFIG: {
4537                 struct kvm_xen_hvm_config xhc;
4538                 r = -EFAULT;
4539                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
4540                         goto out;
4541                 r = -EINVAL;
4542                 if (xhc.flags)
4543                         goto out;
4544                 memcpy(&kvm->arch.xen_hvm_config, &xhc, sizeof(xhc));
4545                 r = 0;
4546                 break;
4547         }
4548         case KVM_SET_CLOCK: {
4549                 struct kvm_clock_data user_ns;
4550                 u64 now_ns;
4551
4552                 r = -EFAULT;
4553                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
4554                         goto out;
4555
4556                 r = -EINVAL;
4557                 if (user_ns.flags)
4558                         goto out;
4559
4560                 r = 0;
4561                 /*
4562                  * TODO: userspace has to take care of races with VCPU_RUN, so
4563                  * kvm_gen_update_masterclock() can be cut down to locked
4564                  * pvclock_update_vm_gtod_copy().
4565                  */
4566                 kvm_gen_update_masterclock(kvm);
4567                 now_ns = get_kvmclock_ns(kvm);
4568                 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
4569                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
4570                 break;
4571         }
4572         case KVM_GET_CLOCK: {
4573                 struct kvm_clock_data user_ns;
4574                 u64 now_ns;
4575
4576                 now_ns = get_kvmclock_ns(kvm);
4577                 user_ns.clock = now_ns;
4578                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
4579                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4580
4581                 r = -EFAULT;
4582                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
4583                         goto out;
4584                 r = 0;
4585                 break;
4586         }
4587         case KVM_ENABLE_CAP: {
4588                 struct kvm_enable_cap cap;
4589
4590                 r = -EFAULT;
4591                 if (copy_from_user(&cap, argp, sizeof(cap)))
4592                         goto out;
4593                 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
4594                 break;
4595         }
4596         case KVM_MEMORY_ENCRYPT_OP: {
4597                 r = -ENOTTY;
4598                 if (kvm_x86_ops->mem_enc_op)
4599                         r = kvm_x86_ops->mem_enc_op(kvm, argp);
4600                 break;
4601         }
4602         case KVM_MEMORY_ENCRYPT_REG_REGION: {
4603                 struct kvm_enc_region region;
4604
4605                 r = -EFAULT;
4606                 if (copy_from_user(&region, argp, sizeof(region)))
4607                         goto out;
4608
4609                 r = -ENOTTY;
4610                 if (kvm_x86_ops->mem_enc_reg_region)
4611                         r = kvm_x86_ops->mem_enc_reg_region(kvm, &region);
4612                 break;
4613         }
4614         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
4615                 struct kvm_enc_region region;
4616
4617                 r = -EFAULT;
4618                 if (copy_from_user(&region, argp, sizeof(region)))
4619                         goto out;
4620
4621                 r = -ENOTTY;
4622                 if (kvm_x86_ops->mem_enc_unreg_region)
4623                         r = kvm_x86_ops->mem_enc_unreg_region(kvm, &region);
4624                 break;
4625         }
4626         case KVM_HYPERV_EVENTFD: {
4627                 struct kvm_hyperv_eventfd hvevfd;
4628
4629                 r = -EFAULT;
4630                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
4631                         goto out;
4632                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
4633                 break;
4634         }
4635         default:
4636                 r = -ENOTTY;
4637         }
4638 out:
4639         return r;
4640 }
4641
4642 static void kvm_init_msr_list(void)
4643 {
4644         u32 dummy[2];
4645         unsigned i, j;
4646
4647         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4648                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4649                         continue;
4650
4651                 /*
4652                  * Even MSRs that are valid in the host may not be exposed
4653                  * to the guests in some cases.
4654                  */
4655                 switch (msrs_to_save[i]) {
4656                 case MSR_IA32_BNDCFGS:
4657                         if (!kvm_x86_ops->mpx_supported())
4658                                 continue;
4659                         break;
4660                 case MSR_TSC_AUX:
4661                         if (!kvm_x86_ops->rdtscp_supported())
4662                                 continue;
4663                         break;
4664                 default:
4665                         break;
4666                 }
4667
4668                 if (j < i)
4669                         msrs_to_save[j] = msrs_to_save[i];
4670                 j++;
4671         }
4672         num_msrs_to_save = j;
4673
4674         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
4675                 if (!kvm_x86_ops->has_emulated_msr(emulated_msrs[i]))
4676                         continue;
4677
4678                 if (j < i)
4679                         emulated_msrs[j] = emulated_msrs[i];
4680                 j++;
4681         }
4682         num_emulated_msrs = j;
4683
4684         for (i = j = 0; i < ARRAY_SIZE(msr_based_features); i++) {
4685                 struct kvm_msr_entry msr;
4686
4687                 msr.index = msr_based_features[i];
4688                 if (kvm_get_msr_feature(&msr))
4689                         continue;
4690
4691                 if (j < i)
4692                         msr_based_features[j] = msr_based_features[i];
4693                 j++;
4694         }
4695         num_msr_based_features = j;
4696 }
4697
4698 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4699                            const void *v)
4700 {
4701         int handled = 0;
4702         int n;
4703
4704         do {
4705                 n = min(len, 8);
4706                 if (!(lapic_in_kernel(vcpu) &&
4707                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4708                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4709                         break;
4710                 handled += n;
4711                 addr += n;
4712                 len -= n;
4713                 v += n;
4714         } while (len);
4715
4716         return handled;
4717 }
4718
4719 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4720 {
4721         int handled = 0;
4722         int n;
4723
4724         do {
4725                 n = min(len, 8);
4726                 if (!(lapic_in_kernel(vcpu) &&
4727                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
4728                                          addr, n, v))
4729                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4730                         break;
4731                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
4732                 handled += n;
4733                 addr += n;
4734                 len -= n;
4735                 v += n;
4736         } while (len);
4737
4738         return handled;
4739 }
4740
4741 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4742                         struct kvm_segment *var, int seg)
4743 {
4744         kvm_x86_ops->set_segment(vcpu, var, seg);
4745 }
4746
4747 void kvm_get_segment(struct kvm_vcpu *vcpu,
4748                      struct kvm_segment *var, int seg)
4749 {
4750         kvm_x86_ops->get_segment(vcpu, var, seg);
4751 }
4752
4753 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
4754                            struct x86_exception *exception)
4755 {
4756         gpa_t t_gpa;
4757
4758         BUG_ON(!mmu_is_nested(vcpu));
4759
4760         /* NPT walks are always user-walks */
4761         access |= PFERR_USER_MASK;
4762         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
4763
4764         return t_gpa;
4765 }
4766
4767 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4768                               struct x86_exception *exception)
4769 {
4770         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4771         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4772 }
4773
4774  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4775                                 struct x86_exception *exception)
4776 {
4777         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4778         access |= PFERR_FETCH_MASK;
4779         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4780 }
4781
4782 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4783                                struct x86_exception *exception)
4784 {
4785         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4786         access |= PFERR_WRITE_MASK;
4787         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4788 }
4789
4790 /* uses this to access any guest's mapped memory without checking CPL */
4791 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4792                                 struct x86_exception *exception)
4793 {
4794         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4795 }
4796
4797 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4798                                       struct kvm_vcpu *vcpu, u32 access,
4799                                       struct x86_exception *exception)
4800 {
4801         void *data = val;
4802         int r = X86EMUL_CONTINUE;
4803
4804         while (bytes) {
4805                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4806                                                             exception);
4807                 unsigned offset = addr & (PAGE_SIZE-1);
4808                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4809                 int ret;
4810
4811                 if (gpa == UNMAPPED_GVA)
4812                         return X86EMUL_PROPAGATE_FAULT;
4813                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4814                                                offset, toread);
4815                 if (ret < 0) {
4816                         r = X86EMUL_IO_NEEDED;
4817                         goto out;
4818                 }
4819
4820                 bytes -= toread;
4821                 data += toread;
4822                 addr += toread;
4823         }
4824 out:
4825         return r;
4826 }
4827
4828 /* used for instruction fetching */
4829 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4830                                 gva_t addr, void *val, unsigned int bytes,
4831                                 struct x86_exception *exception)
4832 {
4833         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4834         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4835         unsigned offset;
4836         int ret;
4837
4838         /* Inline kvm_read_guest_virt_helper for speed.  */
4839         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4840                                                     exception);
4841         if (unlikely(gpa == UNMAPPED_GVA))
4842                 return X86EMUL_PROPAGATE_FAULT;
4843
4844         offset = addr & (PAGE_SIZE-1);
4845         if (WARN_ON(offset + bytes > PAGE_SIZE))
4846                 bytes = (unsigned)PAGE_SIZE - offset;
4847         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4848                                        offset, bytes);
4849         if (unlikely(ret < 0))
4850                 return X86EMUL_IO_NEEDED;
4851
4852         return X86EMUL_CONTINUE;
4853 }
4854
4855 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
4856                                gva_t addr, void *val, unsigned int bytes,
4857                                struct x86_exception *exception)
4858 {
4859         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4860
4861         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4862                                           exception);
4863 }
4864 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4865
4866 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
4867                              gva_t addr, void *val, unsigned int bytes,
4868                              struct x86_exception *exception, bool system)
4869 {
4870         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4871         u32 access = 0;
4872
4873         if (!system && kvm_x86_ops->get_cpl(vcpu) == 3)
4874                 access |= PFERR_USER_MASK;
4875
4876         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
4877 }
4878
4879 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
4880                 unsigned long addr, void *val, unsigned int bytes)
4881 {
4882         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4883         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
4884
4885         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
4886 }
4887
4888 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4889                                       struct kvm_vcpu *vcpu, u32 access,
4890                                       struct x86_exception *exception)
4891 {
4892         void *data = val;
4893         int r = X86EMUL_CONTINUE;
4894
4895         while (bytes) {
4896                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4897                                                              access,
4898                                                              exception);
4899                 unsigned offset = addr & (PAGE_SIZE-1);
4900                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4901                 int ret;
4902
4903                 if (gpa == UNMAPPED_GVA)
4904                         return X86EMUL_PROPAGATE_FAULT;
4905                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4906                 if (ret < 0) {
4907                         r = X86EMUL_IO_NEEDED;
4908                         goto out;
4909                 }
4910
4911                 bytes -= towrite;
4912                 data += towrite;
4913                 addr += towrite;
4914         }
4915 out:
4916         return r;
4917 }
4918
4919 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
4920                               unsigned int bytes, struct x86_exception *exception,
4921                               bool system)
4922 {
4923         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4924         u32 access = PFERR_WRITE_MASK;
4925
4926         if (!system && kvm_x86_ops->get_cpl(vcpu) == 3)
4927                 access |= PFERR_USER_MASK;
4928
4929         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
4930                                            access, exception);
4931 }
4932
4933 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
4934                                 unsigned int bytes, struct x86_exception *exception)
4935 {
4936         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
4937                                            PFERR_WRITE_MASK, exception);
4938 }
4939 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4940
4941 int handle_ud(struct kvm_vcpu *vcpu)
4942 {
4943         int emul_type = EMULTYPE_TRAP_UD;
4944         enum emulation_result er;
4945         char sig[5]; /* ud2; .ascii "kvm" */
4946         struct x86_exception e;
4947
4948         if (force_emulation_prefix &&
4949             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
4950                                 sig, sizeof(sig), &e) == 0 &&
4951             memcmp(sig, "\xf\xbkvm", sizeof(sig)) == 0) {
4952                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
4953                 emul_type = 0;
4954         }
4955
4956         er = emulate_instruction(vcpu, emul_type);
4957         if (er == EMULATE_USER_EXIT)
4958                 return 0;
4959         if (er != EMULATE_DONE)
4960                 kvm_queue_exception(vcpu, UD_VECTOR);
4961         return 1;
4962 }
4963 EXPORT_SYMBOL_GPL(handle_ud);
4964
4965 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4966                             gpa_t gpa, bool write)
4967 {
4968         /* For APIC access vmexit */
4969         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4970                 return 1;
4971
4972         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
4973                 trace_vcpu_match_mmio(gva, gpa, write, true);
4974                 return 1;
4975         }
4976
4977         return 0;
4978 }
4979
4980 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4981                                 gpa_t *gpa, struct x86_exception *exception,
4982                                 bool write)
4983 {
4984         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4985                 | (write ? PFERR_WRITE_MASK : 0);
4986
4987         /*
4988          * currently PKRU is only applied to ept enabled guest so
4989          * there is no pkey in EPT page table for L1 guest or EPT
4990          * shadow page table for L2 guest.
4991          */
4992         if (vcpu_match_mmio_gva(vcpu, gva)
4993             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4994                                  vcpu->arch.access, 0, access)) {
4995                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4996                                         (gva & (PAGE_SIZE - 1));
4997                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4998                 return 1;
4999         }
5000
5001         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5002
5003         if (*gpa == UNMAPPED_GVA)
5004                 return -1;
5005
5006         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
5007 }
5008
5009 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
5010                         const void *val, int bytes)
5011 {
5012         int ret;
5013
5014         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
5015         if (ret < 0)
5016                 return 0;
5017         kvm_page_track_write(vcpu, gpa, val, bytes);
5018         return 1;
5019 }
5020
5021 struct read_write_emulator_ops {
5022         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
5023                                   int bytes);
5024         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
5025                                   void *val, int bytes);
5026         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
5027                                int bytes, void *val);
5028         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
5029                                     void *val, int bytes);
5030         bool write;
5031 };
5032
5033 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
5034 {
5035         if (vcpu->mmio_read_completed) {
5036                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
5037                                vcpu->mmio_fragments[0].gpa, val);
5038                 vcpu->mmio_read_completed = 0;
5039                 return 1;
5040         }
5041
5042         return 0;
5043 }
5044
5045 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
5046                         void *val, int bytes)
5047 {
5048         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
5049 }
5050
5051 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
5052                          void *val, int bytes)
5053 {
5054         return emulator_write_phys(vcpu, gpa, val, bytes);
5055 }
5056
5057 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
5058 {
5059         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
5060         return vcpu_mmio_write(vcpu, gpa, bytes, val);
5061 }
5062
5063 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
5064                           void *val, int bytes)
5065 {
5066         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
5067         return X86EMUL_IO_NEEDED;
5068 }
5069
5070 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
5071                            void *val, int bytes)
5072 {
5073         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
5074
5075         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
5076         return X86EMUL_CONTINUE;
5077 }
5078
5079 static const struct read_write_emulator_ops read_emultor = {
5080         .read_write_prepare = read_prepare,
5081         .read_write_emulate = read_emulate,
5082         .read_write_mmio = vcpu_mmio_read,
5083         .read_write_exit_mmio = read_exit_mmio,
5084 };
5085
5086 static const struct read_write_emulator_ops write_emultor = {
5087         .read_write_emulate = write_emulate,
5088         .read_write_mmio = write_mmio,
5089         .read_write_exit_mmio = write_exit_mmio,
5090         .write = true,
5091 };
5092
5093 static int emulator_read_write_onepage(unsigned long addr, void *val,
5094                                        unsigned int bytes,
5095                                        struct x86_exception *exception,
5096                                        struct kvm_vcpu *vcpu,
5097                                        const struct read_write_emulator_ops *ops)
5098 {
5099         gpa_t gpa;
5100         int handled, ret;
5101         bool write = ops->write;
5102         struct kvm_mmio_fragment *frag;
5103         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5104
5105         /*
5106          * If the exit was due to a NPF we may already have a GPA.
5107          * If the GPA is present, use it to avoid the GVA to GPA table walk.
5108          * Note, this cannot be used on string operations since string
5109          * operation using rep will only have the initial GPA from the NPF
5110          * occurred.
5111          */
5112         if (vcpu->arch.gpa_available &&
5113             emulator_can_use_gpa(ctxt) &&
5114             (addr & ~PAGE_MASK) == (vcpu->arch.gpa_val & ~PAGE_MASK)) {
5115                 gpa = vcpu->arch.gpa_val;
5116                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
5117         } else {
5118                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
5119                 if (ret < 0)
5120                         return X86EMUL_PROPAGATE_FAULT;
5121         }
5122
5123         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
5124                 return X86EMUL_CONTINUE;
5125
5126         /*
5127          * Is this MMIO handled locally?
5128          */
5129         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
5130         if (handled == bytes)
5131                 return X86EMUL_CONTINUE;
5132
5133         gpa += handled;
5134         bytes -= handled;
5135         val += handled;
5136
5137         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
5138         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
5139         frag->gpa = gpa;
5140         frag->data = val;
5141         frag->len = bytes;
5142         return X86EMUL_CONTINUE;
5143 }
5144
5145 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
5146                         unsigned long addr,
5147                         void *val, unsigned int bytes,
5148                         struct x86_exception *exception,
5149                         const struct read_write_emulator_ops *ops)
5150 {
5151         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5152         gpa_t gpa;
5153         int rc;
5154
5155         if (ops->read_write_prepare &&
5156                   ops->read_write_prepare(vcpu, val, bytes))
5157                 return X86EMUL_CONTINUE;
5158
5159         vcpu->mmio_nr_fragments = 0;
5160
5161         /* Crossing a page boundary? */
5162         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
5163                 int now;
5164
5165                 now = -addr & ~PAGE_MASK;
5166                 rc = emulator_read_write_onepage(addr, val, now, exception,
5167                                                  vcpu, ops);
5168
5169                 if (rc != X86EMUL_CONTINUE)
5170                         return rc;
5171                 addr += now;
5172                 if (ctxt->mode != X86EMUL_MODE_PROT64)
5173                         addr = (u32)addr;
5174                 val += now;
5175                 bytes -= now;
5176         }
5177
5178         rc = emulator_read_write_onepage(addr, val, bytes, exception,
5179                                          vcpu, ops);
5180         if (rc != X86EMUL_CONTINUE)
5181                 return rc;
5182
5183         if (!vcpu->mmio_nr_fragments)
5184                 return rc;
5185
5186         gpa = vcpu->mmio_fragments[0].gpa;
5187
5188         vcpu->mmio_needed = 1;
5189         vcpu->mmio_cur_fragment = 0;
5190
5191         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
5192         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
5193         vcpu->run->exit_reason = KVM_EXIT_MMIO;
5194         vcpu->run->mmio.phys_addr = gpa;
5195
5196         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
5197 }
5198
5199 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
5200                                   unsigned long addr,
5201                                   void *val,
5202                                   unsigned int bytes,
5203                                   struct x86_exception *exception)
5204 {
5205         return emulator_read_write(ctxt, addr, val, bytes,
5206                                    exception, &read_emultor);
5207 }
5208
5209 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
5210                             unsigned long addr,
5211                             const void *val,
5212                             unsigned int bytes,
5213                             struct x86_exception *exception)
5214 {
5215         return emulator_read_write(ctxt, addr, (void *)val, bytes,
5216                                    exception, &write_emultor);
5217 }
5218
5219 #define CMPXCHG_TYPE(t, ptr, old, new) \
5220         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
5221
5222 #ifdef CONFIG_X86_64
5223 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
5224 #else
5225 #  define CMPXCHG64(ptr, old, new) \
5226         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
5227 #endif
5228
5229 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
5230                                      unsigned long addr,
5231                                      const void *old,
5232                                      const void *new,
5233                                      unsigned int bytes,
5234                                      struct x86_exception *exception)
5235 {
5236         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5237         gpa_t gpa;
5238         struct page *page;
5239         char *kaddr;
5240         bool exchanged;
5241
5242         /* guests cmpxchg8b have to be emulated atomically */
5243         if (bytes > 8 || (bytes & (bytes - 1)))
5244                 goto emul_write;
5245
5246         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
5247
5248         if (gpa == UNMAPPED_GVA ||
5249             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
5250                 goto emul_write;
5251
5252         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
5253                 goto emul_write;
5254
5255         page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
5256         if (is_error_page(page))
5257                 goto emul_write;
5258
5259         kaddr = kmap_atomic(page);
5260         kaddr += offset_in_page(gpa);
5261         switch (bytes) {
5262         case 1:
5263                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
5264                 break;
5265         case 2:
5266                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
5267                 break;
5268         case 4:
5269                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
5270                 break;
5271         case 8:
5272                 exchanged = CMPXCHG64(kaddr, old, new);
5273                 break;
5274         default:
5275                 BUG();
5276         }
5277         kunmap_atomic(kaddr);
5278         kvm_release_page_dirty(page);
5279
5280         if (!exchanged)
5281                 return X86EMUL_CMPXCHG_FAILED;
5282
5283         kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
5284         kvm_page_track_write(vcpu, gpa, new, bytes);
5285
5286         return X86EMUL_CONTINUE;
5287
5288 emul_write:
5289         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
5290
5291         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
5292 }
5293
5294 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
5295 {
5296         int r = 0, i;
5297
5298         for (i = 0; i < vcpu->arch.pio.count; i++) {
5299                 if (vcpu->arch.pio.in)
5300                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
5301                                             vcpu->arch.pio.size, pd);
5302                 else
5303                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
5304                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
5305                                              pd);
5306                 if (r)
5307                         break;
5308                 pd += vcpu->arch.pio.size;
5309         }
5310         return r;
5311 }
5312
5313 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
5314                                unsigned short port, void *val,
5315                                unsigned int count, bool in)
5316 {
5317         vcpu->arch.pio.port = port;
5318         vcpu->arch.pio.in = in;
5319         vcpu->arch.pio.count  = count;
5320         vcpu->arch.pio.size = size;
5321
5322         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
5323                 vcpu->arch.pio.count = 0;
5324                 return 1;
5325         }
5326
5327         vcpu->run->exit_reason = KVM_EXIT_IO;
5328         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
5329         vcpu->run->io.size = size;
5330         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
5331         vcpu->run->io.count = count;
5332         vcpu->run->io.port = port;
5333
5334         return 0;
5335 }
5336
5337 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
5338                                     int size, unsigned short port, void *val,
5339                                     unsigned int count)
5340 {
5341         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5342         int ret;
5343
5344         if (vcpu->arch.pio.count)
5345                 goto data_avail;
5346
5347         memset(vcpu->arch.pio_data, 0, size * count);
5348
5349         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
5350         if (ret) {
5351 data_avail:
5352                 memcpy(val, vcpu->arch.pio_data, size * count);
5353                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
5354                 vcpu->arch.pio.count = 0;
5355                 return 1;
5356         }
5357
5358         return 0;
5359 }
5360
5361 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
5362                                      int size, unsigned short port,
5363                                      const void *val, unsigned int count)
5364 {
5365         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5366
5367         memcpy(vcpu->arch.pio_data, val, size * count);
5368         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
5369         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
5370 }
5371
5372 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
5373 {
5374         return kvm_x86_ops->get_segment_base(vcpu, seg);
5375 }
5376
5377 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
5378 {
5379         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
5380 }
5381
5382 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
5383 {
5384         if (!need_emulate_wbinvd(vcpu))
5385                 return X86EMUL_CONTINUE;
5386
5387         if (kvm_x86_ops->has_wbinvd_exit()) {
5388                 int cpu = get_cpu();
5389
5390                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
5391                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
5392                                 wbinvd_ipi, NULL, 1);
5393                 put_cpu();
5394                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
5395         } else
5396                 wbinvd();
5397         return X86EMUL_CONTINUE;
5398 }
5399
5400 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
5401 {
5402         kvm_emulate_wbinvd_noskip(vcpu);
5403         return kvm_skip_emulated_instruction(vcpu);
5404 }
5405 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
5406
5407
5408
5409 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
5410 {
5411         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
5412 }
5413
5414 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
5415                            unsigned long *dest)
5416 {
5417         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
5418 }
5419
5420 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
5421                            unsigned long value)
5422 {
5423
5424         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
5425 }
5426
5427 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
5428 {
5429         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
5430 }
5431
5432 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
5433 {
5434         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5435         unsigned long value;
5436
5437         switch (cr) {
5438         case 0:
5439                 value = kvm_read_cr0(vcpu);
5440                 break;
5441         case 2:
5442                 value = vcpu->arch.cr2;
5443                 break;
5444         case 3:
5445                 value = kvm_read_cr3(vcpu);
5446                 break;
5447         case 4:
5448                 value = kvm_read_cr4(vcpu);
5449                 break;
5450         case 8:
5451                 value = kvm_get_cr8(vcpu);
5452                 break;
5453         default:
5454                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5455                 return 0;
5456         }
5457
5458         return value;
5459 }
5460
5461 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
5462 {
5463         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5464         int res = 0;
5465
5466         switch (cr) {
5467         case 0:
5468                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
5469                 break;
5470         case 2:
5471                 vcpu->arch.cr2 = val;
5472                 break;
5473         case 3:
5474                 res = kvm_set_cr3(vcpu, val);
5475                 break;
5476         case 4:
5477                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
5478                 break;
5479         case 8:
5480                 res = kvm_set_cr8(vcpu, val);
5481                 break;
5482         default:
5483                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5484                 res = -1;
5485         }
5486
5487         return res;
5488 }
5489
5490 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
5491 {
5492         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
5493 }
5494
5495 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5496 {
5497         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
5498 }
5499
5500 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5501 {
5502         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
5503 }
5504
5505 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5506 {
5507         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
5508 }
5509
5510 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5511 {
5512         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
5513 }
5514
5515 static unsigned long emulator_get_cached_segment_base(
5516         struct x86_emulate_ctxt *ctxt, int seg)
5517 {
5518         return get_segment_base(emul_to_vcpu(ctxt), seg);
5519 }
5520
5521 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
5522                                  struct desc_struct *desc, u32 *base3,
5523                                  int seg)
5524 {
5525         struct kvm_segment var;
5526
5527         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
5528         *selector = var.selector;
5529
5530         if (var.unusable) {
5531                 memset(desc, 0, sizeof(*desc));
5532                 if (base3)
5533                         *base3 = 0;
5534                 return false;
5535         }
5536
5537         if (var.g)
5538                 var.limit >>= 12;
5539         set_desc_limit(desc, var.limit);
5540         set_desc_base(desc, (unsigned long)var.base);
5541 #ifdef CONFIG_X86_64
5542         if (base3)
5543                 *base3 = var.base >> 32;
5544 #endif
5545         desc->type = var.type;
5546         desc->s = var.s;
5547         desc->dpl = var.dpl;
5548         desc->p = var.present;
5549         desc->avl = var.avl;
5550         desc->l = var.l;
5551         desc->d = var.db;
5552         desc->g = var.g;
5553
5554         return true;
5555 }
5556
5557 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
5558                                  struct desc_struct *desc, u32 base3,
5559                                  int seg)
5560 {
5561         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5562         struct kvm_segment var;
5563
5564         var.selector = selector;
5565         var.base = get_desc_base(desc);
5566 #ifdef CONFIG_X86_64
5567         var.base |= ((u64)base3) << 32;
5568 #endif
5569         var.limit = get_desc_limit(desc);
5570         if (desc->g)
5571                 var.limit = (var.limit << 12) | 0xfff;
5572         var.type = desc->type;
5573         var.dpl = desc->dpl;
5574         var.db = desc->d;
5575         var.s = desc->s;
5576         var.l = desc->l;
5577         var.g = desc->g;
5578         var.avl = desc->avl;
5579         var.present = desc->p;
5580         var.unusable = !var.present;
5581         var.padding = 0;
5582
5583         kvm_set_segment(vcpu, &var, seg);
5584         return;
5585 }
5586
5587 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
5588                             u32 msr_index, u64 *pdata)
5589 {
5590         struct msr_data msr;
5591         int r;
5592
5593         msr.index = msr_index;
5594         msr.host_initiated = false;
5595         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
5596         if (r)
5597                 return r;
5598
5599         *pdata = msr.data;
5600         return 0;
5601 }
5602
5603 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
5604                             u32 msr_index, u64 data)
5605 {
5606         struct msr_data msr;
5607
5608         msr.data = data;
5609         msr.index = msr_index;
5610         msr.host_initiated = false;
5611         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
5612 }
5613
5614 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
5615 {
5616         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5617
5618         return vcpu->arch.smbase;
5619 }
5620
5621 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
5622 {
5623         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5624
5625         vcpu->arch.smbase = smbase;
5626 }
5627
5628 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
5629                               u32 pmc)
5630 {
5631         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
5632 }
5633
5634 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
5635                              u32 pmc, u64 *pdata)
5636 {
5637         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
5638 }
5639
5640 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
5641 {
5642         emul_to_vcpu(ctxt)->arch.halt_request = 1;
5643 }
5644
5645 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
5646                               struct x86_instruction_info *info,
5647                               enum x86_intercept_stage stage)
5648 {
5649         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
5650 }
5651
5652 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
5653                         u32 *eax, u32 *ebx, u32 *ecx, u32 *edx, bool check_limit)
5654 {
5655         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, check_limit);
5656 }
5657
5658 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
5659 {
5660         return kvm_register_read(emul_to_vcpu(ctxt), reg);
5661 }
5662
5663 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
5664 {
5665         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
5666 }
5667
5668 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
5669 {
5670         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
5671 }
5672
5673 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
5674 {
5675         return emul_to_vcpu(ctxt)->arch.hflags;
5676 }
5677
5678 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
5679 {
5680         kvm_set_hflags(emul_to_vcpu(ctxt), emul_flags);
5681 }
5682
5683 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt, u64 smbase)
5684 {
5685         return kvm_x86_ops->pre_leave_smm(emul_to_vcpu(ctxt), smbase);
5686 }
5687
5688 static const struct x86_emulate_ops emulate_ops = {
5689         .read_gpr            = emulator_read_gpr,
5690         .write_gpr           = emulator_write_gpr,
5691         .read_std            = emulator_read_std,
5692         .write_std           = emulator_write_std,
5693         .read_phys           = kvm_read_guest_phys_system,
5694         .fetch               = kvm_fetch_guest_virt,
5695         .read_emulated       = emulator_read_emulated,
5696         .write_emulated      = emulator_write_emulated,
5697         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
5698         .invlpg              = emulator_invlpg,
5699         .pio_in_emulated     = emulator_pio_in_emulated,
5700         .pio_out_emulated    = emulator_pio_out_emulated,
5701         .get_segment         = emulator_get_segment,
5702         .set_segment         = emulator_set_segment,
5703         .get_cached_segment_base = emulator_get_cached_segment_base,
5704         .get_gdt             = emulator_get_gdt,
5705         .get_idt             = emulator_get_idt,
5706         .set_gdt             = emulator_set_gdt,
5707         .set_idt             = emulator_set_idt,
5708         .get_cr              = emulator_get_cr,
5709         .set_cr              = emulator_set_cr,
5710         .cpl                 = emulator_get_cpl,
5711         .get_dr              = emulator_get_dr,
5712         .set_dr              = emulator_set_dr,
5713         .get_smbase          = emulator_get_smbase,
5714         .set_smbase          = emulator_set_smbase,
5715         .set_msr             = emulator_set_msr,
5716         .get_msr             = emulator_get_msr,
5717         .check_pmc           = emulator_check_pmc,
5718         .read_pmc            = emulator_read_pmc,
5719         .halt                = emulator_halt,
5720         .wbinvd              = emulator_wbinvd,
5721         .fix_hypercall       = emulator_fix_hypercall,
5722         .intercept           = emulator_intercept,
5723         .get_cpuid           = emulator_get_cpuid,
5724         .set_nmi_mask        = emulator_set_nmi_mask,
5725         .get_hflags          = emulator_get_hflags,
5726         .set_hflags          = emulator_set_hflags,
5727         .pre_leave_smm       = emulator_pre_leave_smm,
5728 };
5729
5730 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
5731 {
5732         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
5733         /*
5734          * an sti; sti; sequence only disable interrupts for the first
5735          * instruction. So, if the last instruction, be it emulated or
5736          * not, left the system with the INT_STI flag enabled, it
5737          * means that the last instruction is an sti. We should not
5738          * leave the flag on in this case. The same goes for mov ss
5739          */
5740         if (int_shadow & mask)
5741                 mask = 0;
5742         if (unlikely(int_shadow || mask)) {
5743                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
5744                 if (!mask)
5745                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5746         }
5747 }
5748
5749 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
5750 {
5751         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5752         if (ctxt->exception.vector == PF_VECTOR)
5753                 return kvm_propagate_fault(vcpu, &ctxt->exception);
5754
5755         if (ctxt->exception.error_code_valid)
5756                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
5757                                       ctxt->exception.error_code);
5758         else
5759                 kvm_queue_exception(vcpu, ctxt->exception.vector);
5760         return false;
5761 }
5762
5763 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
5764 {
5765         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5766         int cs_db, cs_l;
5767
5768         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5769
5770         ctxt->eflags = kvm_get_rflags(vcpu);
5771         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
5772
5773         ctxt->eip = kvm_rip_read(vcpu);
5774         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
5775                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
5776                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
5777                      cs_db                              ? X86EMUL_MODE_PROT32 :
5778                                                           X86EMUL_MODE_PROT16;
5779         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
5780         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
5781         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
5782
5783         init_decode_cache(ctxt);
5784         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5785 }
5786
5787 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5788 {
5789         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5790         int ret;
5791
5792         init_emulate_ctxt(vcpu);
5793
5794         ctxt->op_bytes = 2;
5795         ctxt->ad_bytes = 2;
5796         ctxt->_eip = ctxt->eip + inc_eip;
5797         ret = emulate_int_real(ctxt, irq);
5798
5799         if (ret != X86EMUL_CONTINUE)
5800                 return EMULATE_FAIL;
5801
5802         ctxt->eip = ctxt->_eip;
5803         kvm_rip_write(vcpu, ctxt->eip);
5804         kvm_set_rflags(vcpu, ctxt->eflags);
5805
5806         return EMULATE_DONE;
5807 }
5808 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
5809
5810 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
5811 {
5812         int r = EMULATE_DONE;
5813
5814         ++vcpu->stat.insn_emulation_fail;
5815         trace_kvm_emulate_insn_failed(vcpu);
5816
5817         if (emulation_type & EMULTYPE_NO_UD_ON_FAIL)
5818                 return EMULATE_FAIL;
5819
5820         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
5821                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
5822                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
5823                 vcpu->run->internal.ndata = 0;
5824                 r = EMULATE_USER_EXIT;
5825         }
5826
5827         kvm_queue_exception(vcpu, UD_VECTOR);
5828
5829         return r;
5830 }
5831
5832 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
5833                                   bool write_fault_to_shadow_pgtable,
5834                                   int emulation_type)
5835 {
5836         gpa_t gpa = cr2;
5837         kvm_pfn_t pfn;
5838
5839         if (emulation_type & EMULTYPE_NO_REEXECUTE)
5840                 return false;
5841
5842         if (!vcpu->arch.mmu.direct_map) {
5843                 /*
5844                  * Write permission should be allowed since only
5845                  * write access need to be emulated.
5846                  */
5847                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5848
5849                 /*
5850                  * If the mapping is invalid in guest, let cpu retry
5851                  * it to generate fault.
5852                  */
5853                 if (gpa == UNMAPPED_GVA)
5854                         return true;
5855         }
5856
5857         /*
5858          * Do not retry the unhandleable instruction if it faults on the
5859          * readonly host memory, otherwise it will goto a infinite loop:
5860          * retry instruction -> write #PF -> emulation fail -> retry
5861          * instruction -> ...
5862          */
5863         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5864
5865         /*
5866          * If the instruction failed on the error pfn, it can not be fixed,
5867          * report the error to userspace.
5868          */
5869         if (is_error_noslot_pfn(pfn))
5870                 return false;
5871
5872         kvm_release_pfn_clean(pfn);
5873
5874         /* The instructions are well-emulated on direct mmu. */
5875         if (vcpu->arch.mmu.direct_map) {
5876                 unsigned int indirect_shadow_pages;
5877
5878                 spin_lock(&vcpu->kvm->mmu_lock);
5879                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5880                 spin_unlock(&vcpu->kvm->mmu_lock);
5881
5882                 if (indirect_shadow_pages)
5883                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5884
5885                 return true;
5886         }
5887
5888         /*
5889          * if emulation was due to access to shadowed page table
5890          * and it failed try to unshadow page and re-enter the
5891          * guest to let CPU execute the instruction.
5892          */
5893         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5894
5895         /*
5896          * If the access faults on its page table, it can not
5897          * be fixed by unprotecting shadow page and it should
5898          * be reported to userspace.
5899          */
5900         return !write_fault_to_shadow_pgtable;
5901 }
5902
5903 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5904                               unsigned long cr2,  int emulation_type)
5905 {
5906         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5907         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5908
5909         last_retry_eip = vcpu->arch.last_retry_eip;
5910         last_retry_addr = vcpu->arch.last_retry_addr;
5911
5912         /*
5913          * If the emulation is caused by #PF and it is non-page_table
5914          * writing instruction, it means the VM-EXIT is caused by shadow
5915          * page protected, we can zap the shadow page and retry this
5916          * instruction directly.
5917          *
5918          * Note: if the guest uses a non-page-table modifying instruction
5919          * on the PDE that points to the instruction, then we will unmap
5920          * the instruction and go to an infinite loop. So, we cache the
5921          * last retried eip and the last fault address, if we meet the eip
5922          * and the address again, we can break out of the potential infinite
5923          * loop.
5924          */
5925         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5926
5927         if (!(emulation_type & EMULTYPE_RETRY))
5928                 return false;
5929
5930         if (x86_page_table_writing_insn(ctxt))
5931                 return false;
5932
5933         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5934                 return false;
5935
5936         vcpu->arch.last_retry_eip = ctxt->eip;
5937         vcpu->arch.last_retry_addr = cr2;
5938
5939         if (!vcpu->arch.mmu.direct_map)
5940                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5941
5942         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5943
5944         return true;
5945 }
5946
5947 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5948 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5949
5950 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5951 {
5952         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5953                 /* This is a good place to trace that we are exiting SMM.  */
5954                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5955
5956                 /* Process a latched INIT or SMI, if any.  */
5957                 kvm_make_request(KVM_REQ_EVENT, vcpu);
5958         }
5959
5960         kvm_mmu_reset_context(vcpu);
5961 }
5962
5963 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5964 {
5965         unsigned changed = vcpu->arch.hflags ^ emul_flags;
5966
5967         vcpu->arch.hflags = emul_flags;
5968
5969         if (changed & HF_SMM_MASK)
5970                 kvm_smm_changed(vcpu);
5971 }
5972
5973 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5974                                 unsigned long *db)
5975 {
5976         u32 dr6 = 0;
5977         int i;
5978         u32 enable, rwlen;
5979
5980         enable = dr7;
5981         rwlen = dr7 >> 16;
5982         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5983                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5984                         dr6 |= (1 << i);
5985         return dr6;
5986 }
5987
5988 static void kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu, int *r)
5989 {
5990         struct kvm_run *kvm_run = vcpu->run;
5991
5992         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5993                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 | DR6_RTM;
5994                 kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5995                 kvm_run->debug.arch.exception = DB_VECTOR;
5996                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
5997                 *r = EMULATE_USER_EXIT;
5998         } else {
5999                 /*
6000                  * "Certain debug exceptions may clear bit 0-3.  The
6001                  * remaining contents of the DR6 register are never
6002                  * cleared by the processor".
6003                  */
6004                 vcpu->arch.dr6 &= ~15;
6005                 vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
6006                 kvm_queue_exception(vcpu, DB_VECTOR);
6007         }
6008 }
6009
6010 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
6011 {
6012         unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
6013         int r = EMULATE_DONE;
6014
6015         kvm_x86_ops->skip_emulated_instruction(vcpu);
6016
6017         /*
6018          * rflags is the old, "raw" value of the flags.  The new value has
6019          * not been saved yet.
6020          *
6021          * This is correct even for TF set by the guest, because "the
6022          * processor will not generate this exception after the instruction
6023          * that sets the TF flag".
6024          */
6025         if (unlikely(rflags & X86_EFLAGS_TF))
6026                 kvm_vcpu_do_singlestep(vcpu, &r);
6027         return r == EMULATE_DONE;
6028 }
6029 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
6030
6031 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
6032 {
6033         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
6034             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
6035                 struct kvm_run *kvm_run = vcpu->run;
6036                 unsigned long eip = kvm_get_linear_rip(vcpu);
6037                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
6038                                            vcpu->arch.guest_debug_dr7,
6039                                            vcpu->arch.eff_db);
6040
6041                 if (dr6 != 0) {
6042                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
6043                         kvm_run->debug.arch.pc = eip;
6044                         kvm_run->debug.arch.exception = DB_VECTOR;
6045                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
6046                         *r = EMULATE_USER_EXIT;
6047                         return true;
6048                 }
6049         }
6050
6051         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
6052             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
6053                 unsigned long eip = kvm_get_linear_rip(vcpu);
6054                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
6055                                            vcpu->arch.dr7,
6056                                            vcpu->arch.db);
6057
6058                 if (dr6 != 0) {
6059                         vcpu->arch.dr6 &= ~15;
6060                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
6061                         kvm_queue_exception(vcpu, DB_VECTOR);
6062                         *r = EMULATE_DONE;
6063                         return true;
6064                 }
6065         }
6066
6067         return false;
6068 }
6069
6070 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
6071 {
6072         switch (ctxt->opcode_len) {
6073         case 1:
6074                 switch (ctxt->b) {
6075                 case 0xe4:      /* IN */
6076                 case 0xe5:
6077                 case 0xec:
6078                 case 0xed:
6079                 case 0xe6:      /* OUT */
6080                 case 0xe7:
6081                 case 0xee:
6082                 case 0xef:
6083                 case 0x6c:      /* INS */
6084                 case 0x6d:
6085                 case 0x6e:      /* OUTS */
6086                 case 0x6f:
6087                         return true;
6088                 }
6089                 break;
6090         case 2:
6091                 switch (ctxt->b) {
6092                 case 0x33:      /* RDPMC */
6093                         return true;
6094                 }
6095                 break;
6096         }
6097
6098         return false;
6099 }
6100
6101 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
6102                             unsigned long cr2,
6103                             int emulation_type,
6104                             void *insn,
6105                             int insn_len)
6106 {
6107         int r;
6108         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6109         bool writeback = true;
6110         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
6111
6112         /*
6113          * Clear write_fault_to_shadow_pgtable here to ensure it is
6114          * never reused.
6115          */
6116         vcpu->arch.write_fault_to_shadow_pgtable = false;
6117         kvm_clear_exception_queue(vcpu);
6118
6119         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
6120                 init_emulate_ctxt(vcpu);
6121
6122                 /*
6123                  * We will reenter on the same instruction since
6124                  * we do not set complete_userspace_io.  This does not
6125                  * handle watchpoints yet, those would be handled in
6126                  * the emulate_ops.
6127                  */
6128                 if (!(emulation_type & EMULTYPE_SKIP) &&
6129                     kvm_vcpu_check_breakpoint(vcpu, &r))
6130                         return r;
6131
6132                 ctxt->interruptibility = 0;
6133                 ctxt->have_exception = false;
6134                 ctxt->exception.vector = -1;
6135                 ctxt->perm_ok = false;
6136
6137                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
6138
6139                 r = x86_decode_insn(ctxt, insn, insn_len);
6140
6141                 trace_kvm_emulate_insn_start(vcpu);
6142                 ++vcpu->stat.insn_emulation;
6143                 if (r != EMULATION_OK)  {
6144                         if (emulation_type & EMULTYPE_TRAP_UD)
6145                                 return EMULATE_FAIL;
6146                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
6147                                                 emulation_type))
6148                                 return EMULATE_DONE;
6149                         if (ctxt->have_exception && inject_emulated_exception(vcpu))
6150                                 return EMULATE_DONE;
6151                         if (emulation_type & EMULTYPE_SKIP)
6152                                 return EMULATE_FAIL;
6153                         return handle_emulation_failure(vcpu, emulation_type);
6154                 }
6155         }
6156
6157         if ((emulation_type & EMULTYPE_VMWARE) &&
6158             !is_vmware_backdoor_opcode(ctxt))
6159                 return EMULATE_FAIL;
6160
6161         if (emulation_type & EMULTYPE_SKIP) {
6162                 kvm_rip_write(vcpu, ctxt->_eip);
6163                 if (ctxt->eflags & X86_EFLAGS_RF)
6164                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
6165                 return EMULATE_DONE;
6166         }
6167
6168         if (retry_instruction(ctxt, cr2, emulation_type))
6169                 return EMULATE_DONE;
6170
6171         /* this is needed for vmware backdoor interface to work since it
6172            changes registers values  during IO operation */
6173         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
6174                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
6175                 emulator_invalidate_register_cache(ctxt);
6176         }
6177
6178 restart:
6179         /* Save the faulting GPA (cr2) in the address field */
6180         ctxt->exception.address = cr2;
6181
6182         r = x86_emulate_insn(ctxt);
6183
6184         if (r == EMULATION_INTERCEPTED)
6185                 return EMULATE_DONE;
6186
6187         if (r == EMULATION_FAILED) {
6188                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
6189                                         emulation_type))
6190                         return EMULATE_DONE;
6191
6192                 return handle_emulation_failure(vcpu, emulation_type);
6193         }
6194
6195         if (ctxt->have_exception) {
6196                 r = EMULATE_DONE;
6197                 if (inject_emulated_exception(vcpu))
6198                         return r;
6199         } else if (vcpu->arch.pio.count) {
6200                 if (!vcpu->arch.pio.in) {
6201                         /* FIXME: return into emulator if single-stepping.  */
6202                         vcpu->arch.pio.count = 0;
6203                 } else {
6204                         writeback = false;
6205                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
6206                 }
6207                 r = EMULATE_USER_EXIT;
6208         } else if (vcpu->mmio_needed) {
6209                 if (!vcpu->mmio_is_write)
6210                         writeback = false;
6211                 r = EMULATE_USER_EXIT;
6212                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6213         } else if (r == EMULATION_RESTART)
6214                 goto restart;
6215         else
6216                 r = EMULATE_DONE;
6217
6218         if (writeback) {
6219                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
6220                 toggle_interruptibility(vcpu, ctxt->interruptibility);
6221                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6222                 kvm_rip_write(vcpu, ctxt->eip);
6223                 if (r == EMULATE_DONE &&
6224                     (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
6225                         kvm_vcpu_do_singlestep(vcpu, &r);
6226                 if (!ctxt->have_exception ||
6227                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
6228                         __kvm_set_rflags(vcpu, ctxt->eflags);
6229
6230                 /*
6231                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
6232                  * do nothing, and it will be requested again as soon as
6233                  * the shadow expires.  But we still need to check here,
6234                  * because POPF has no interrupt shadow.
6235                  */
6236                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
6237                         kvm_make_request(KVM_REQ_EVENT, vcpu);
6238         } else
6239                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
6240
6241         return r;
6242 }
6243 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
6244
6245 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
6246                             unsigned short port)
6247 {
6248         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
6249         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
6250                                             size, port, &val, 1);
6251         /* do not return to emulator after return from userspace */
6252         vcpu->arch.pio.count = 0;
6253         return ret;
6254 }
6255
6256 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
6257 {
6258         unsigned long val;
6259
6260         /* We should only ever be called with arch.pio.count equal to 1 */
6261         BUG_ON(vcpu->arch.pio.count != 1);
6262
6263         /* For size less than 4 we merge, else we zero extend */
6264         val = (vcpu->arch.pio.size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX)
6265                                         : 0;
6266
6267         /*
6268          * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
6269          * the copy and tracing
6270          */
6271         emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, vcpu->arch.pio.size,
6272                                  vcpu->arch.pio.port, &val, 1);
6273         kvm_register_write(vcpu, VCPU_REGS_RAX, val);
6274
6275         return 1;
6276 }
6277
6278 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
6279                            unsigned short port)
6280 {
6281         unsigned long val;
6282         int ret;
6283
6284         /* For size less than 4 we merge, else we zero extend */
6285         val = (size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX) : 0;
6286
6287         ret = emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, size, port,
6288                                        &val, 1);
6289         if (ret) {
6290                 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
6291                 return ret;
6292         }
6293
6294         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
6295
6296         return 0;
6297 }
6298
6299 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
6300 {
6301         int ret = kvm_skip_emulated_instruction(vcpu);
6302
6303         /*
6304          * TODO: we might be squashing a KVM_GUESTDBG_SINGLESTEP-triggered
6305          * KVM_EXIT_DEBUG here.
6306          */
6307         if (in)
6308                 return kvm_fast_pio_in(vcpu, size, port) && ret;
6309         else
6310                 return kvm_fast_pio_out(vcpu, size, port) && ret;
6311 }
6312 EXPORT_SYMBOL_GPL(kvm_fast_pio);
6313
6314 static int kvmclock_cpu_down_prep(unsigned int cpu)
6315 {
6316         __this_cpu_write(cpu_tsc_khz, 0);
6317         return 0;
6318 }
6319
6320 static void tsc_khz_changed(void *data)
6321 {
6322         struct cpufreq_freqs *freq = data;
6323         unsigned long khz = 0;
6324
6325         if (data)
6326                 khz = freq->new;
6327         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6328                 khz = cpufreq_quick_get(raw_smp_processor_id());
6329         if (!khz)
6330                 khz = tsc_khz;
6331         __this_cpu_write(cpu_tsc_khz, khz);
6332 }
6333
6334 #ifdef CONFIG_X86_64
6335 static void kvm_hyperv_tsc_notifier(void)
6336 {
6337         struct kvm *kvm;
6338         struct kvm_vcpu *vcpu;
6339         int cpu;
6340
6341         spin_lock(&kvm_lock);
6342         list_for_each_entry(kvm, &vm_list, vm_list)
6343                 kvm_make_mclock_inprogress_request(kvm);
6344
6345         hyperv_stop_tsc_emulation();
6346
6347         /* TSC frequency always matches when on Hyper-V */
6348         for_each_present_cpu(cpu)
6349                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
6350         kvm_max_guest_tsc_khz = tsc_khz;
6351
6352         list_for_each_entry(kvm, &vm_list, vm_list) {
6353                 struct kvm_arch *ka = &kvm->arch;
6354
6355                 spin_lock(&ka->pvclock_gtod_sync_lock);
6356
6357                 pvclock_update_vm_gtod_copy(kvm);
6358
6359                 kvm_for_each_vcpu(cpu, vcpu, kvm)
6360                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6361
6362                 kvm_for_each_vcpu(cpu, vcpu, kvm)
6363                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
6364
6365                 spin_unlock(&ka->pvclock_gtod_sync_lock);
6366         }
6367         spin_unlock(&kvm_lock);
6368 }
6369 #endif
6370
6371 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
6372                                      void *data)
6373 {
6374         struct cpufreq_freqs *freq = data;
6375         struct kvm *kvm;
6376         struct kvm_vcpu *vcpu;
6377         int i, send_ipi = 0;
6378
6379         /*
6380          * We allow guests to temporarily run on slowing clocks,
6381          * provided we notify them after, or to run on accelerating
6382          * clocks, provided we notify them before.  Thus time never
6383          * goes backwards.
6384          *
6385          * However, we have a problem.  We can't atomically update
6386          * the frequency of a given CPU from this function; it is
6387          * merely a notifier, which can be called from any CPU.
6388          * Changing the TSC frequency at arbitrary points in time
6389          * requires a recomputation of local variables related to
6390          * the TSC for each VCPU.  We must flag these local variables
6391          * to be updated and be sure the update takes place with the
6392          * new frequency before any guests proceed.
6393          *
6394          * Unfortunately, the combination of hotplug CPU and frequency
6395          * change creates an intractable locking scenario; the order
6396          * of when these callouts happen is undefined with respect to
6397          * CPU hotplug, and they can race with each other.  As such,
6398          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
6399          * undefined; you can actually have a CPU frequency change take
6400          * place in between the computation of X and the setting of the
6401          * variable.  To protect against this problem, all updates of
6402          * the per_cpu tsc_khz variable are done in an interrupt
6403          * protected IPI, and all callers wishing to update the value
6404          * must wait for a synchronous IPI to complete (which is trivial
6405          * if the caller is on the CPU already).  This establishes the
6406          * necessary total order on variable updates.
6407          *
6408          * Note that because a guest time update may take place
6409          * anytime after the setting of the VCPU's request bit, the
6410          * correct TSC value must be set before the request.  However,
6411          * to ensure the update actually makes it to any guest which
6412          * starts running in hardware virtualization between the set
6413          * and the acquisition of the spinlock, we must also ping the
6414          * CPU after setting the request bit.
6415          *
6416          */
6417
6418         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
6419                 return 0;
6420         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
6421                 return 0;
6422
6423         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
6424
6425         spin_lock(&kvm_lock);
6426         list_for_each_entry(kvm, &vm_list, vm_list) {
6427                 kvm_for_each_vcpu(i, vcpu, kvm) {
6428                         if (vcpu->cpu != freq->cpu)
6429                                 continue;
6430                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6431                         if (vcpu->cpu != smp_processor_id())
6432                                 send_ipi = 1;
6433                 }
6434         }
6435         spin_unlock(&kvm_lock);
6436
6437         if (freq->old < freq->new && send_ipi) {
6438                 /*
6439                  * We upscale the frequency.  Must make the guest
6440                  * doesn't see old kvmclock values while running with
6441                  * the new frequency, otherwise we risk the guest sees
6442                  * time go backwards.
6443                  *
6444                  * In case we update the frequency for another cpu
6445                  * (which might be in guest context) send an interrupt
6446                  * to kick the cpu out of guest context.  Next time
6447                  * guest context is entered kvmclock will be updated,
6448                  * so the guest will not see stale values.
6449                  */
6450                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
6451         }
6452         return 0;
6453 }
6454
6455 static struct notifier_block kvmclock_cpufreq_notifier_block = {
6456         .notifier_call  = kvmclock_cpufreq_notifier
6457 };
6458
6459 static int kvmclock_cpu_online(unsigned int cpu)
6460 {
6461         tsc_khz_changed(NULL);
6462         return 0;
6463 }
6464
6465 static void kvm_timer_init(void)
6466 {
6467         max_tsc_khz = tsc_khz;
6468
6469         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
6470 #ifdef CONFIG_CPU_FREQ
6471                 struct cpufreq_policy policy;
6472                 int cpu;
6473
6474                 memset(&policy, 0, sizeof(policy));
6475                 cpu = get_cpu();
6476                 cpufreq_get_policy(&policy, cpu);
6477                 if (policy.cpuinfo.max_freq)
6478                         max_tsc_khz = policy.cpuinfo.max_freq;
6479                 put_cpu();
6480 #endif
6481                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
6482                                           CPUFREQ_TRANSITION_NOTIFIER);
6483         }
6484         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
6485
6486         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
6487                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
6488 }
6489
6490 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
6491 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
6492
6493 int kvm_is_in_guest(void)
6494 {
6495         return __this_cpu_read(current_vcpu) != NULL;
6496 }
6497
6498 static int kvm_is_user_mode(void)
6499 {
6500         int user_mode = 3;
6501
6502         if (__this_cpu_read(current_vcpu))
6503                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
6504
6505         return user_mode != 0;
6506 }
6507
6508 static unsigned long kvm_get_guest_ip(void)
6509 {
6510         unsigned long ip = 0;
6511
6512         if (__this_cpu_read(current_vcpu))
6513                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
6514
6515         return ip;
6516 }
6517
6518 static struct perf_guest_info_callbacks kvm_guest_cbs = {
6519         .is_in_guest            = kvm_is_in_guest,
6520         .is_user_mode           = kvm_is_user_mode,
6521         .get_guest_ip           = kvm_get_guest_ip,
6522 };
6523
6524 static void kvm_set_mmio_spte_mask(void)
6525 {
6526         u64 mask;
6527         int maxphyaddr = boot_cpu_data.x86_phys_bits;
6528
6529         /*
6530          * Set the reserved bits and the present bit of an paging-structure
6531          * entry to generate page fault with PFER.RSV = 1.
6532          */
6533          /* Mask the reserved physical address bits. */
6534         mask = rsvd_bits(maxphyaddr, 51);
6535
6536         /* Set the present bit. */
6537         mask |= 1ull;
6538
6539 #ifdef CONFIG_X86_64
6540         /*
6541          * If reserved bit is not supported, clear the present bit to disable
6542          * mmio page fault.
6543          */
6544         if (maxphyaddr == 52)
6545                 mask &= ~1ull;
6546 #endif
6547
6548         kvm_mmu_set_mmio_spte_mask(mask, mask);
6549 }
6550
6551 #ifdef CONFIG_X86_64
6552 static void pvclock_gtod_update_fn(struct work_struct *work)
6553 {
6554         struct kvm *kvm;
6555
6556         struct kvm_vcpu *vcpu;
6557         int i;
6558
6559         spin_lock(&kvm_lock);
6560         list_for_each_entry(kvm, &vm_list, vm_list)
6561                 kvm_for_each_vcpu(i, vcpu, kvm)
6562                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
6563         atomic_set(&kvm_guest_has_master_clock, 0);
6564         spin_unlock(&kvm_lock);
6565 }
6566
6567 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
6568
6569 /*
6570  * Notification about pvclock gtod data update.
6571  */
6572 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
6573                                void *priv)
6574 {
6575         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
6576         struct timekeeper *tk = priv;
6577
6578         update_pvclock_gtod(tk);
6579
6580         /* disable master clock if host does not trust, or does not
6581          * use, TSC based clocksource.
6582          */
6583         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
6584             atomic_read(&kvm_guest_has_master_clock) != 0)
6585                 queue_work(system_long_wq, &pvclock_gtod_work);
6586
6587         return 0;
6588 }
6589
6590 static struct notifier_block pvclock_gtod_notifier = {
6591         .notifier_call = pvclock_gtod_notify,
6592 };
6593 #endif
6594
6595 int kvm_arch_init(void *opaque)
6596 {
6597         int r;
6598         struct kvm_x86_ops *ops = opaque;
6599
6600         if (kvm_x86_ops) {
6601                 printk(KERN_ERR "kvm: already loaded the other module\n");
6602                 r = -EEXIST;
6603                 goto out;
6604         }
6605
6606         if (!ops->cpu_has_kvm_support()) {
6607                 printk(KERN_ERR "kvm: no hardware support\n");
6608                 r = -EOPNOTSUPP;
6609                 goto out;
6610         }
6611         if (ops->disabled_by_bios()) {
6612                 printk(KERN_ERR "kvm: disabled by bios\n");
6613                 r = -EOPNOTSUPP;
6614                 goto out;
6615         }
6616
6617         r = -ENOMEM;
6618         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
6619         if (!shared_msrs) {
6620                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
6621                 goto out;
6622         }
6623
6624         r = kvm_mmu_module_init();
6625         if (r)
6626                 goto out_free_percpu;
6627
6628         kvm_set_mmio_spte_mask();
6629
6630         kvm_x86_ops = ops;
6631
6632         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
6633                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
6634                         PT_PRESENT_MASK, 0, sme_me_mask);
6635         kvm_timer_init();
6636
6637         perf_register_guest_info_callbacks(&kvm_guest_cbs);
6638
6639         if (boot_cpu_has(X86_FEATURE_XSAVE))
6640                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
6641
6642         kvm_lapic_init();
6643 #ifdef CONFIG_X86_64
6644         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
6645
6646         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
6647                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
6648 #endif
6649
6650         return 0;
6651
6652 out_free_percpu:
6653         free_percpu(shared_msrs);
6654 out:
6655         return r;
6656 }
6657
6658 void kvm_arch_exit(void)
6659 {
6660 #ifdef CONFIG_X86_64
6661         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
6662                 clear_hv_tscchange_cb();
6663 #endif
6664         kvm_lapic_exit();
6665         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
6666
6667         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6668                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
6669                                             CPUFREQ_TRANSITION_NOTIFIER);
6670         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
6671 #ifdef CONFIG_X86_64
6672         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
6673 #endif
6674         kvm_x86_ops = NULL;
6675         kvm_mmu_module_exit();
6676         free_percpu(shared_msrs);
6677 }
6678
6679 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
6680 {
6681         ++vcpu->stat.halt_exits;
6682         if (lapic_in_kernel(vcpu)) {
6683                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
6684                 return 1;
6685         } else {
6686                 vcpu->run->exit_reason = KVM_EXIT_HLT;
6687                 return 0;
6688         }
6689 }
6690 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
6691
6692 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
6693 {
6694         int ret = kvm_skip_emulated_instruction(vcpu);
6695         /*
6696          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
6697          * KVM_EXIT_DEBUG here.
6698          */
6699         return kvm_vcpu_halt(vcpu) && ret;
6700 }
6701 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
6702
6703 #ifdef CONFIG_X86_64
6704 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
6705                                 unsigned long clock_type)
6706 {
6707         struct kvm_clock_pairing clock_pairing;
6708         struct timespec64 ts;
6709         u64 cycle;
6710         int ret;
6711
6712         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
6713                 return -KVM_EOPNOTSUPP;
6714
6715         if (kvm_get_walltime_and_clockread(&ts, &cycle) == false)
6716                 return -KVM_EOPNOTSUPP;
6717
6718         clock_pairing.sec = ts.tv_sec;
6719         clock_pairing.nsec = ts.tv_nsec;
6720         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
6721         clock_pairing.flags = 0;
6722
6723         ret = 0;
6724         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
6725                             sizeof(struct kvm_clock_pairing)))
6726                 ret = -KVM_EFAULT;
6727
6728         return ret;
6729 }
6730 #endif
6731
6732 /*
6733  * kvm_pv_kick_cpu_op:  Kick a vcpu.
6734  *
6735  * @apicid - apicid of vcpu to be kicked.
6736  */
6737 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
6738 {
6739         struct kvm_lapic_irq lapic_irq;
6740
6741         lapic_irq.shorthand = 0;
6742         lapic_irq.dest_mode = 0;
6743         lapic_irq.level = 0;
6744         lapic_irq.dest_id = apicid;
6745         lapic_irq.msi_redir_hint = false;
6746
6747         lapic_irq.delivery_mode = APIC_DM_REMRD;
6748         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
6749 }
6750
6751 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
6752 {
6753         vcpu->arch.apicv_active = false;
6754         kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
6755 }
6756
6757 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
6758 {
6759         unsigned long nr, a0, a1, a2, a3, ret;
6760         int op_64_bit;
6761
6762         if (kvm_hv_hypercall_enabled(vcpu->kvm))
6763                 return kvm_hv_hypercall(vcpu);
6764
6765         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
6766         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
6767         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
6768         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
6769         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
6770
6771         trace_kvm_hypercall(nr, a0, a1, a2, a3);
6772
6773         op_64_bit = is_64_bit_mode(vcpu);
6774         if (!op_64_bit) {
6775                 nr &= 0xFFFFFFFF;
6776                 a0 &= 0xFFFFFFFF;
6777                 a1 &= 0xFFFFFFFF;
6778                 a2 &= 0xFFFFFFFF;
6779                 a3 &= 0xFFFFFFFF;
6780         }
6781
6782         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
6783                 ret = -KVM_EPERM;
6784                 goto out;
6785         }
6786
6787         switch (nr) {
6788         case KVM_HC_VAPIC_POLL_IRQ:
6789                 ret = 0;
6790                 break;
6791         case KVM_HC_KICK_CPU:
6792                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
6793                 ret = 0;
6794                 break;
6795 #ifdef CONFIG_X86_64
6796         case KVM_HC_CLOCK_PAIRING:
6797                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
6798                 break;
6799 #endif
6800         default:
6801                 ret = -KVM_ENOSYS;
6802                 break;
6803         }
6804 out:
6805         if (!op_64_bit)
6806                 ret = (u32)ret;
6807         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
6808
6809         ++vcpu->stat.hypercalls;
6810         return kvm_skip_emulated_instruction(vcpu);
6811 }
6812 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
6813
6814 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
6815 {
6816         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6817         char instruction[3];
6818         unsigned long rip = kvm_rip_read(vcpu);
6819
6820         kvm_x86_ops->patch_hypercall(vcpu, instruction);
6821
6822         return emulator_write_emulated(ctxt, rip, instruction, 3,
6823                 &ctxt->exception);
6824 }
6825
6826 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
6827 {
6828         return vcpu->run->request_interrupt_window &&
6829                 likely(!pic_in_kernel(vcpu->kvm));
6830 }
6831
6832 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
6833 {
6834         struct kvm_run *kvm_run = vcpu->run;
6835
6836         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
6837         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
6838         kvm_run->cr8 = kvm_get_cr8(vcpu);
6839         kvm_run->apic_base = kvm_get_apic_base(vcpu);
6840         kvm_run->ready_for_interrupt_injection =
6841                 pic_in_kernel(vcpu->kvm) ||
6842                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
6843 }
6844
6845 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
6846 {
6847         int max_irr, tpr;
6848
6849         if (!kvm_x86_ops->update_cr8_intercept)
6850                 return;
6851
6852         if (!lapic_in_kernel(vcpu))
6853                 return;
6854
6855         if (vcpu->arch.apicv_active)
6856                 return;
6857
6858         if (!vcpu->arch.apic->vapic_addr)
6859                 max_irr = kvm_lapic_find_highest_irr(vcpu);
6860         else
6861                 max_irr = -1;
6862
6863         if (max_irr != -1)
6864                 max_irr >>= 4;
6865
6866         tpr = kvm_lapic_get_cr8(vcpu);
6867
6868         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
6869 }
6870
6871 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
6872 {
6873         int r;
6874
6875         /* try to reinject previous events if any */
6876
6877         if (vcpu->arch.exception.injected)
6878                 kvm_x86_ops->queue_exception(vcpu);
6879         /*
6880          * Do not inject an NMI or interrupt if there is a pending
6881          * exception.  Exceptions and interrupts are recognized at
6882          * instruction boundaries, i.e. the start of an instruction.
6883          * Trap-like exceptions, e.g. #DB, have higher priority than
6884          * NMIs and interrupts, i.e. traps are recognized before an
6885          * NMI/interrupt that's pending on the same instruction.
6886          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
6887          * priority, but are only generated (pended) during instruction
6888          * execution, i.e. a pending fault-like exception means the
6889          * fault occurred on the *previous* instruction and must be
6890          * serviced prior to recognizing any new events in order to
6891          * fully complete the previous instruction.
6892          */
6893         else if (!vcpu->arch.exception.pending) {
6894                 if (vcpu->arch.nmi_injected)
6895                         kvm_x86_ops->set_nmi(vcpu);
6896                 else if (vcpu->arch.interrupt.injected)
6897                         kvm_x86_ops->set_irq(vcpu);
6898         }
6899
6900         /*
6901          * Call check_nested_events() even if we reinjected a previous event
6902          * in order for caller to determine if it should require immediate-exit
6903          * from L2 to L1 due to pending L1 events which require exit
6904          * from L2 to L1.
6905          */
6906         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6907                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6908                 if (r != 0)
6909                         return r;
6910         }
6911
6912         /* try to inject new event if pending */
6913         if (vcpu->arch.exception.pending) {
6914                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
6915                                         vcpu->arch.exception.has_error_code,
6916                                         vcpu->arch.exception.error_code);
6917
6918                 WARN_ON_ONCE(vcpu->arch.exception.injected);
6919                 vcpu->arch.exception.pending = false;
6920                 vcpu->arch.exception.injected = true;
6921
6922                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
6923                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
6924                                              X86_EFLAGS_RF);
6925
6926                 if (vcpu->arch.exception.nr == DB_VECTOR &&
6927                     (vcpu->arch.dr7 & DR7_GD)) {
6928                         vcpu->arch.dr7 &= ~DR7_GD;
6929                         kvm_update_dr7(vcpu);
6930                 }
6931
6932                 kvm_x86_ops->queue_exception(vcpu);
6933         }
6934
6935         /* Don't consider new event if we re-injected an event */
6936         if (kvm_event_needs_reinjection(vcpu))
6937                 return 0;
6938
6939         if (vcpu->arch.smi_pending && !is_smm(vcpu) &&
6940             kvm_x86_ops->smi_allowed(vcpu)) {
6941                 vcpu->arch.smi_pending = false;
6942                 ++vcpu->arch.smi_count;
6943                 enter_smm(vcpu);
6944         } else if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
6945                 --vcpu->arch.nmi_pending;
6946                 vcpu->arch.nmi_injected = true;
6947                 kvm_x86_ops->set_nmi(vcpu);
6948         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
6949                 /*
6950                  * Because interrupts can be injected asynchronously, we are
6951                  * calling check_nested_events again here to avoid a race condition.
6952                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6953                  * proposal and current concerns.  Perhaps we should be setting
6954                  * KVM_REQ_EVENT only on certain events and not unconditionally?
6955                  */
6956                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6957                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6958                         if (r != 0)
6959                                 return r;
6960                 }
6961                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
6962                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
6963                                             false);
6964                         kvm_x86_ops->set_irq(vcpu);
6965                 }
6966         }
6967
6968         return 0;
6969 }
6970
6971 static void process_nmi(struct kvm_vcpu *vcpu)
6972 {
6973         unsigned limit = 2;
6974
6975         /*
6976          * x86 is limited to one NMI running, and one NMI pending after it.
6977          * If an NMI is already in progress, limit further NMIs to just one.
6978          * Otherwise, allow two (and we'll inject the first one immediately).
6979          */
6980         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
6981                 limit = 1;
6982
6983         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
6984         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
6985         kvm_make_request(KVM_REQ_EVENT, vcpu);
6986 }
6987
6988 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
6989 {
6990         u32 flags = 0;
6991         flags |= seg->g       << 23;
6992         flags |= seg->db      << 22;
6993         flags |= seg->l       << 21;
6994         flags |= seg->avl     << 20;
6995         flags |= seg->present << 15;
6996         flags |= seg->dpl     << 13;
6997         flags |= seg->s       << 12;
6998         flags |= seg->type    << 8;
6999         return flags;
7000 }
7001
7002 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
7003 {
7004         struct kvm_segment seg;
7005         int offset;
7006
7007         kvm_get_segment(vcpu, &seg, n);
7008         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
7009
7010         if (n < 3)
7011                 offset = 0x7f84 + n * 12;
7012         else
7013                 offset = 0x7f2c + (n - 3) * 12;
7014
7015         put_smstate(u32, buf, offset + 8, seg.base);
7016         put_smstate(u32, buf, offset + 4, seg.limit);
7017         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
7018 }
7019
7020 #ifdef CONFIG_X86_64
7021 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
7022 {
7023         struct kvm_segment seg;
7024         int offset;
7025         u16 flags;
7026
7027         kvm_get_segment(vcpu, &seg, n);
7028         offset = 0x7e00 + n * 16;
7029
7030         flags = enter_smm_get_segment_flags(&seg) >> 8;
7031         put_smstate(u16, buf, offset, seg.selector);
7032         put_smstate(u16, buf, offset + 2, flags);
7033         put_smstate(u32, buf, offset + 4, seg.limit);
7034         put_smstate(u64, buf, offset + 8, seg.base);
7035 }
7036 #endif
7037
7038 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
7039 {
7040         struct desc_ptr dt;
7041         struct kvm_segment seg;
7042         unsigned long val;
7043         int i;
7044
7045         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
7046         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
7047         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
7048         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
7049
7050         for (i = 0; i < 8; i++)
7051                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
7052
7053         kvm_get_dr(vcpu, 6, &val);
7054         put_smstate(u32, buf, 0x7fcc, (u32)val);
7055         kvm_get_dr(vcpu, 7, &val);
7056         put_smstate(u32, buf, 0x7fc8, (u32)val);
7057
7058         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
7059         put_smstate(u32, buf, 0x7fc4, seg.selector);
7060         put_smstate(u32, buf, 0x7f64, seg.base);
7061         put_smstate(u32, buf, 0x7f60, seg.limit);
7062         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
7063
7064         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
7065         put_smstate(u32, buf, 0x7fc0, seg.selector);
7066         put_smstate(u32, buf, 0x7f80, seg.base);
7067         put_smstate(u32, buf, 0x7f7c, seg.limit);
7068         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
7069
7070         kvm_x86_ops->get_gdt(vcpu, &dt);
7071         put_smstate(u32, buf, 0x7f74, dt.address);
7072         put_smstate(u32, buf, 0x7f70, dt.size);
7073
7074         kvm_x86_ops->get_idt(vcpu, &dt);
7075         put_smstate(u32, buf, 0x7f58, dt.address);
7076         put_smstate(u32, buf, 0x7f54, dt.size);
7077
7078         for (i = 0; i < 6; i++)
7079                 enter_smm_save_seg_32(vcpu, buf, i);
7080
7081         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
7082
7083         /* revision id */
7084         put_smstate(u32, buf, 0x7efc, 0x00020000);
7085         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
7086 }
7087
7088 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
7089 {
7090 #ifdef CONFIG_X86_64
7091         struct desc_ptr dt;
7092         struct kvm_segment seg;
7093         unsigned long val;
7094         int i;
7095
7096         for (i = 0; i < 16; i++)
7097                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
7098
7099         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
7100         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
7101
7102         kvm_get_dr(vcpu, 6, &val);
7103         put_smstate(u64, buf, 0x7f68, val);
7104         kvm_get_dr(vcpu, 7, &val);
7105         put_smstate(u64, buf, 0x7f60, val);
7106
7107         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
7108         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
7109         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
7110
7111         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
7112
7113         /* revision id */
7114         put_smstate(u32, buf, 0x7efc, 0x00020064);
7115
7116         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
7117
7118         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
7119         put_smstate(u16, buf, 0x7e90, seg.selector);
7120         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
7121         put_smstate(u32, buf, 0x7e94, seg.limit);
7122         put_smstate(u64, buf, 0x7e98, seg.base);
7123
7124         kvm_x86_ops->get_idt(vcpu, &dt);
7125         put_smstate(u32, buf, 0x7e84, dt.size);
7126         put_smstate(u64, buf, 0x7e88, dt.address);
7127
7128         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
7129         put_smstate(u16, buf, 0x7e70, seg.selector);
7130         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
7131         put_smstate(u32, buf, 0x7e74, seg.limit);
7132         put_smstate(u64, buf, 0x7e78, seg.base);
7133
7134         kvm_x86_ops->get_gdt(vcpu, &dt);
7135         put_smstate(u32, buf, 0x7e64, dt.size);
7136         put_smstate(u64, buf, 0x7e68, dt.address);
7137
7138         for (i = 0; i < 6; i++)
7139                 enter_smm_save_seg_64(vcpu, buf, i);
7140 #else
7141         WARN_ON_ONCE(1);
7142 #endif
7143 }
7144
7145 static void enter_smm(struct kvm_vcpu *vcpu)
7146 {
7147         struct kvm_segment cs, ds;
7148         struct desc_ptr dt;
7149         char buf[512];
7150         u32 cr0;
7151
7152         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
7153         memset(buf, 0, 512);
7154         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7155                 enter_smm_save_state_64(vcpu, buf);
7156         else
7157                 enter_smm_save_state_32(vcpu, buf);
7158
7159         /*
7160          * Give pre_enter_smm() a chance to make ISA-specific changes to the
7161          * vCPU state (e.g. leave guest mode) after we've saved the state into
7162          * the SMM state-save area.
7163          */
7164         kvm_x86_ops->pre_enter_smm(vcpu, buf);
7165
7166         vcpu->arch.hflags |= HF_SMM_MASK;
7167         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
7168
7169         if (kvm_x86_ops->get_nmi_mask(vcpu))
7170                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
7171         else
7172                 kvm_x86_ops->set_nmi_mask(vcpu, true);
7173
7174         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
7175         kvm_rip_write(vcpu, 0x8000);
7176
7177         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
7178         kvm_x86_ops->set_cr0(vcpu, cr0);
7179         vcpu->arch.cr0 = cr0;
7180
7181         kvm_x86_ops->set_cr4(vcpu, 0);
7182
7183         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
7184         dt.address = dt.size = 0;
7185         kvm_x86_ops->set_idt(vcpu, &dt);
7186
7187         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
7188
7189         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
7190         cs.base = vcpu->arch.smbase;
7191
7192         ds.selector = 0;
7193         ds.base = 0;
7194
7195         cs.limit    = ds.limit = 0xffffffff;
7196         cs.type     = ds.type = 0x3;
7197         cs.dpl      = ds.dpl = 0;
7198         cs.db       = ds.db = 0;
7199         cs.s        = ds.s = 1;
7200         cs.l        = ds.l = 0;
7201         cs.g        = ds.g = 1;
7202         cs.avl      = ds.avl = 0;
7203         cs.present  = ds.present = 1;
7204         cs.unusable = ds.unusable = 0;
7205         cs.padding  = ds.padding = 0;
7206
7207         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7208         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
7209         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
7210         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
7211         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
7212         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
7213
7214         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7215                 kvm_x86_ops->set_efer(vcpu, 0);
7216
7217         kvm_update_cpuid(vcpu);
7218         kvm_mmu_reset_context(vcpu);
7219 }
7220
7221 static void process_smi(struct kvm_vcpu *vcpu)
7222 {
7223         vcpu->arch.smi_pending = true;
7224         kvm_make_request(KVM_REQ_EVENT, vcpu);
7225 }
7226
7227 void kvm_make_scan_ioapic_request(struct kvm *kvm)
7228 {
7229         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
7230 }
7231
7232 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
7233 {
7234         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
7235                 return;
7236
7237         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
7238
7239         if (irqchip_split(vcpu->kvm))
7240                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
7241         else {
7242                 if (vcpu->arch.apicv_active)
7243                         kvm_x86_ops->sync_pir_to_irr(vcpu);
7244                 kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
7245         }
7246
7247         if (is_guest_mode(vcpu))
7248                 vcpu->arch.load_eoi_exitmap_pending = true;
7249         else
7250                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
7251 }
7252
7253 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
7254 {
7255         u64 eoi_exit_bitmap[4];
7256
7257         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
7258                 return;
7259
7260         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
7261                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
7262         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
7263 }
7264
7265 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
7266                 unsigned long start, unsigned long end)
7267 {
7268         unsigned long apic_address;
7269
7270         /*
7271          * The physical address of apic access page is stored in the VMCS.
7272          * Update it when it becomes invalid.
7273          */
7274         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7275         if (start <= apic_address && apic_address < end)
7276                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
7277 }
7278
7279 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
7280 {
7281         struct page *page = NULL;
7282
7283         if (!lapic_in_kernel(vcpu))
7284                 return;
7285
7286         if (!kvm_x86_ops->set_apic_access_page_addr)
7287                 return;
7288
7289         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7290         if (is_error_page(page))
7291                 return;
7292         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
7293
7294         /*
7295          * Do not pin apic access page in memory, the MMU notifier
7296          * will call us again if it is migrated or swapped out.
7297          */
7298         put_page(page);
7299 }
7300 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
7301
7302 /*
7303  * Returns 1 to let vcpu_run() continue the guest execution loop without
7304  * exiting to the userspace.  Otherwise, the value will be returned to the
7305  * userspace.
7306  */
7307 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
7308 {
7309         int r;
7310         bool req_int_win =
7311                 dm_request_for_irq_injection(vcpu) &&
7312                 kvm_cpu_accept_dm_intr(vcpu);
7313
7314         bool req_immediate_exit = false;
7315
7316         if (kvm_request_pending(vcpu)) {
7317                 if (kvm_check_request(KVM_REQ_GET_VMCS12_PAGES, vcpu))
7318                         kvm_x86_ops->get_vmcs12_pages(vcpu);
7319                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
7320                         kvm_mmu_unload(vcpu);
7321                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
7322                         __kvm_migrate_timers(vcpu);
7323                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
7324                         kvm_gen_update_masterclock(vcpu->kvm);
7325                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
7326                         kvm_gen_kvmclock_update(vcpu);
7327                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
7328                         r = kvm_guest_time_update(vcpu);
7329                         if (unlikely(r))
7330                                 goto out;
7331                 }
7332                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
7333                         kvm_mmu_sync_roots(vcpu);
7334                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
7335                         kvm_vcpu_flush_tlb(vcpu, true);
7336                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
7337                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
7338                         r = 0;
7339                         goto out;
7340                 }
7341                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
7342                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
7343                         vcpu->mmio_needed = 0;
7344                         r = 0;
7345                         goto out;
7346                 }
7347                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
7348                         /* Page is swapped out. Do synthetic halt */
7349                         vcpu->arch.apf.halted = true;
7350                         r = 1;
7351                         goto out;
7352                 }
7353                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
7354                         record_steal_time(vcpu);
7355                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
7356                         process_smi(vcpu);
7357                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
7358                         process_nmi(vcpu);
7359                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
7360                         kvm_pmu_handle_event(vcpu);
7361                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
7362                         kvm_pmu_deliver_pmi(vcpu);
7363                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
7364                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
7365                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
7366                                      vcpu->arch.ioapic_handled_vectors)) {
7367                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
7368                                 vcpu->run->eoi.vector =
7369                                                 vcpu->arch.pending_ioapic_eoi;
7370                                 r = 0;
7371                                 goto out;
7372                         }
7373                 }
7374                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
7375                         vcpu_scan_ioapic(vcpu);
7376                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
7377                         vcpu_load_eoi_exitmap(vcpu);
7378                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
7379                         kvm_vcpu_reload_apic_access_page(vcpu);
7380                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
7381                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
7382                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
7383                         r = 0;
7384                         goto out;
7385                 }
7386                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
7387                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
7388                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
7389                         r = 0;
7390                         goto out;
7391                 }
7392                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
7393                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
7394                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
7395                         r = 0;
7396                         goto out;
7397                 }
7398
7399                 /*
7400                  * KVM_REQ_HV_STIMER has to be processed after
7401                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
7402                  * depend on the guest clock being up-to-date
7403                  */
7404                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
7405                         kvm_hv_process_stimers(vcpu);
7406         }
7407
7408         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
7409                 ++vcpu->stat.req_event;
7410                 kvm_apic_accept_events(vcpu);
7411                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
7412                         r = 1;
7413                         goto out;
7414                 }
7415
7416                 if (inject_pending_event(vcpu, req_int_win) != 0)
7417                         req_immediate_exit = true;
7418                 else {
7419                         /* Enable SMI/NMI/IRQ window open exits if needed.
7420                          *
7421                          * SMIs have three cases:
7422                          * 1) They can be nested, and then there is nothing to
7423                          *    do here because RSM will cause a vmexit anyway.
7424                          * 2) There is an ISA-specific reason why SMI cannot be
7425                          *    injected, and the moment when this changes can be
7426                          *    intercepted.
7427                          * 3) Or the SMI can be pending because
7428                          *    inject_pending_event has completed the injection
7429                          *    of an IRQ or NMI from the previous vmexit, and
7430                          *    then we request an immediate exit to inject the
7431                          *    SMI.
7432                          */
7433                         if (vcpu->arch.smi_pending && !is_smm(vcpu))
7434                                 if (!kvm_x86_ops->enable_smi_window(vcpu))
7435                                         req_immediate_exit = true;
7436                         if (vcpu->arch.nmi_pending)
7437                                 kvm_x86_ops->enable_nmi_window(vcpu);
7438                         if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
7439                                 kvm_x86_ops->enable_irq_window(vcpu);
7440                         WARN_ON(vcpu->arch.exception.pending);
7441                 }
7442
7443                 if (kvm_lapic_enabled(vcpu)) {
7444                         update_cr8_intercept(vcpu);
7445                         kvm_lapic_sync_to_vapic(vcpu);
7446                 }
7447         }
7448
7449         r = kvm_mmu_reload(vcpu);
7450         if (unlikely(r)) {
7451                 goto cancel_injection;
7452         }
7453
7454         preempt_disable();
7455
7456         kvm_x86_ops->prepare_guest_switch(vcpu);
7457
7458         /*
7459          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
7460          * IPI are then delayed after guest entry, which ensures that they
7461          * result in virtual interrupt delivery.
7462          */
7463         local_irq_disable();
7464         vcpu->mode = IN_GUEST_MODE;
7465
7466         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
7467
7468         /*
7469          * 1) We should set ->mode before checking ->requests.  Please see
7470          * the comment in kvm_vcpu_exiting_guest_mode().
7471          *
7472          * 2) For APICv, we should set ->mode before checking PIR.ON.  This
7473          * pairs with the memory barrier implicit in pi_test_and_set_on
7474          * (see vmx_deliver_posted_interrupt).
7475          *
7476          * 3) This also orders the write to mode from any reads to the page
7477          * tables done while the VCPU is running.  Please see the comment
7478          * in kvm_flush_remote_tlbs.
7479          */
7480         smp_mb__after_srcu_read_unlock();
7481
7482         /*
7483          * This handles the case where a posted interrupt was
7484          * notified with kvm_vcpu_kick.
7485          */
7486         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
7487                 kvm_x86_ops->sync_pir_to_irr(vcpu);
7488
7489         if (vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu)
7490             || need_resched() || signal_pending(current)) {
7491                 vcpu->mode = OUTSIDE_GUEST_MODE;
7492                 smp_wmb();
7493                 local_irq_enable();
7494                 preempt_enable();
7495                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7496                 r = 1;
7497                 goto cancel_injection;
7498         }
7499
7500         kvm_load_guest_xcr0(vcpu);
7501
7502         if (req_immediate_exit) {
7503                 kvm_make_request(KVM_REQ_EVENT, vcpu);
7504                 smp_send_reschedule(vcpu->cpu);
7505         }
7506
7507         trace_kvm_entry(vcpu->vcpu_id);
7508         if (lapic_timer_advance_ns)
7509                 wait_lapic_expire(vcpu);
7510         guest_enter_irqoff();
7511
7512         if (unlikely(vcpu->arch.switch_db_regs)) {
7513                 set_debugreg(0, 7);
7514                 set_debugreg(vcpu->arch.eff_db[0], 0);
7515                 set_debugreg(vcpu->arch.eff_db[1], 1);
7516                 set_debugreg(vcpu->arch.eff_db[2], 2);
7517                 set_debugreg(vcpu->arch.eff_db[3], 3);
7518                 set_debugreg(vcpu->arch.dr6, 6);
7519                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
7520         }
7521
7522         kvm_x86_ops->run(vcpu);
7523
7524         /*
7525          * Do this here before restoring debug registers on the host.  And
7526          * since we do this before handling the vmexit, a DR access vmexit
7527          * can (a) read the correct value of the debug registers, (b) set
7528          * KVM_DEBUGREG_WONT_EXIT again.
7529          */
7530         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
7531                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
7532                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
7533                 kvm_update_dr0123(vcpu);
7534                 kvm_update_dr6(vcpu);
7535                 kvm_update_dr7(vcpu);
7536                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
7537         }
7538
7539         /*
7540          * If the guest has used debug registers, at least dr7
7541          * will be disabled while returning to the host.
7542          * If we don't have active breakpoints in the host, we don't
7543          * care about the messed up debug address registers. But if
7544          * we have some of them active, restore the old state.
7545          */
7546         if (hw_breakpoint_active())
7547                 hw_breakpoint_restore();
7548
7549         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
7550
7551         vcpu->mode = OUTSIDE_GUEST_MODE;
7552         smp_wmb();
7553
7554         kvm_put_guest_xcr0(vcpu);
7555
7556         kvm_before_interrupt(vcpu);
7557         kvm_x86_ops->handle_external_intr(vcpu);
7558         kvm_after_interrupt(vcpu);
7559
7560         ++vcpu->stat.exits;
7561
7562         guest_exit_irqoff();
7563
7564         local_irq_enable();
7565         preempt_enable();
7566
7567         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7568
7569         /*
7570          * Profile KVM exit RIPs:
7571          */
7572         if (unlikely(prof_on == KVM_PROFILING)) {
7573                 unsigned long rip = kvm_rip_read(vcpu);
7574                 profile_hit(KVM_PROFILING, (void *)rip);
7575         }
7576
7577         if (unlikely(vcpu->arch.tsc_always_catchup))
7578                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7579
7580         if (vcpu->arch.apic_attention)
7581                 kvm_lapic_sync_from_vapic(vcpu);
7582
7583         vcpu->arch.gpa_available = false;
7584         r = kvm_x86_ops->handle_exit(vcpu);
7585         return r;
7586
7587 cancel_injection:
7588         kvm_x86_ops->cancel_injection(vcpu);
7589         if (unlikely(vcpu->arch.apic_attention))
7590                 kvm_lapic_sync_from_vapic(vcpu);
7591 out:
7592         return r;
7593 }
7594
7595 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
7596 {
7597         if (!kvm_arch_vcpu_runnable(vcpu) &&
7598             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
7599                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7600                 kvm_vcpu_block(vcpu);
7601                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7602
7603                 if (kvm_x86_ops->post_block)
7604                         kvm_x86_ops->post_block(vcpu);
7605
7606                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
7607                         return 1;
7608         }
7609
7610         kvm_apic_accept_events(vcpu);
7611         switch(vcpu->arch.mp_state) {
7612         case KVM_MP_STATE_HALTED:
7613                 vcpu->arch.pv.pv_unhalted = false;
7614                 vcpu->arch.mp_state =
7615                         KVM_MP_STATE_RUNNABLE;
7616         case KVM_MP_STATE_RUNNABLE:
7617                 vcpu->arch.apf.halted = false;
7618                 break;
7619         case KVM_MP_STATE_INIT_RECEIVED:
7620                 break;
7621         default:
7622                 return -EINTR;
7623                 break;
7624         }
7625         return 1;
7626 }
7627
7628 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
7629 {
7630         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
7631                 kvm_x86_ops->check_nested_events(vcpu, false);
7632
7633         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
7634                 !vcpu->arch.apf.halted);
7635 }
7636
7637 static int vcpu_run(struct kvm_vcpu *vcpu)
7638 {
7639         int r;
7640         struct kvm *kvm = vcpu->kvm;
7641
7642         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7643
7644         for (;;) {
7645                 if (kvm_vcpu_running(vcpu)) {
7646                         r = vcpu_enter_guest(vcpu);
7647                 } else {
7648                         r = vcpu_block(kvm, vcpu);
7649                 }
7650
7651                 if (r <= 0)
7652                         break;
7653
7654                 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
7655                 if (kvm_cpu_has_pending_timer(vcpu))
7656                         kvm_inject_pending_timer_irqs(vcpu);
7657
7658                 if (dm_request_for_irq_injection(vcpu) &&
7659                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
7660                         r = 0;
7661                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
7662                         ++vcpu->stat.request_irq_exits;
7663                         break;
7664                 }
7665
7666                 kvm_check_async_pf_completion(vcpu);
7667
7668                 if (signal_pending(current)) {
7669                         r = -EINTR;
7670                         vcpu->run->exit_reason = KVM_EXIT_INTR;
7671                         ++vcpu->stat.signal_exits;
7672                         break;
7673                 }
7674                 if (need_resched()) {
7675                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7676                         cond_resched();
7677                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7678                 }
7679         }
7680
7681         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7682
7683         return r;
7684 }
7685
7686 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
7687 {
7688         int r;
7689         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7690         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
7691         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
7692         if (r != EMULATE_DONE)
7693                 return 0;
7694         return 1;
7695 }
7696
7697 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
7698 {
7699         BUG_ON(!vcpu->arch.pio.count);
7700
7701         return complete_emulated_io(vcpu);
7702 }
7703
7704 /*
7705  * Implements the following, as a state machine:
7706  *
7707  * read:
7708  *   for each fragment
7709  *     for each mmio piece in the fragment
7710  *       write gpa, len
7711  *       exit
7712  *       copy data
7713  *   execute insn
7714  *
7715  * write:
7716  *   for each fragment
7717  *     for each mmio piece in the fragment
7718  *       write gpa, len
7719  *       copy data
7720  *       exit
7721  */
7722 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
7723 {
7724         struct kvm_run *run = vcpu->run;
7725         struct kvm_mmio_fragment *frag;
7726         unsigned len;
7727
7728         BUG_ON(!vcpu->mmio_needed);
7729
7730         /* Complete previous fragment */
7731         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
7732         len = min(8u, frag->len);
7733         if (!vcpu->mmio_is_write)
7734                 memcpy(frag->data, run->mmio.data, len);
7735
7736         if (frag->len <= 8) {
7737                 /* Switch to the next fragment. */
7738                 frag++;
7739                 vcpu->mmio_cur_fragment++;
7740         } else {
7741                 /* Go forward to the next mmio piece. */
7742                 frag->data += len;
7743                 frag->gpa += len;
7744                 frag->len -= len;
7745         }
7746
7747         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
7748                 vcpu->mmio_needed = 0;
7749
7750                 /* FIXME: return into emulator if single-stepping.  */
7751                 if (vcpu->mmio_is_write)
7752                         return 1;
7753                 vcpu->mmio_read_completed = 1;
7754                 return complete_emulated_io(vcpu);
7755         }
7756
7757         run->exit_reason = KVM_EXIT_MMIO;
7758         run->mmio.phys_addr = frag->gpa;
7759         if (vcpu->mmio_is_write)
7760                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
7761         run->mmio.len = min(8u, frag->len);
7762         run->mmio.is_write = vcpu->mmio_is_write;
7763         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7764         return 0;
7765 }
7766
7767 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
7768 {
7769         int r;
7770
7771         vcpu_load(vcpu);
7772         kvm_sigset_activate(vcpu);
7773         kvm_load_guest_fpu(vcpu);
7774
7775         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
7776                 if (kvm_run->immediate_exit) {
7777                         r = -EINTR;
7778                         goto out;
7779                 }
7780                 kvm_vcpu_block(vcpu);
7781                 kvm_apic_accept_events(vcpu);
7782                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
7783                 r = -EAGAIN;
7784                 if (signal_pending(current)) {
7785                         r = -EINTR;
7786                         vcpu->run->exit_reason = KVM_EXIT_INTR;
7787                         ++vcpu->stat.signal_exits;
7788                 }
7789                 goto out;
7790         }
7791
7792         if (vcpu->run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
7793                 r = -EINVAL;
7794                 goto out;
7795         }
7796
7797         if (vcpu->run->kvm_dirty_regs) {
7798                 r = sync_regs(vcpu);
7799                 if (r != 0)
7800                         goto out;
7801         }
7802
7803         /* re-sync apic's tpr */
7804         if (!lapic_in_kernel(vcpu)) {
7805                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
7806                         r = -EINVAL;
7807                         goto out;
7808                 }
7809         }
7810
7811         if (unlikely(vcpu->arch.complete_userspace_io)) {
7812                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
7813                 vcpu->arch.complete_userspace_io = NULL;
7814                 r = cui(vcpu);
7815                 if (r <= 0)
7816                         goto out;
7817         } else
7818                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
7819
7820         if (kvm_run->immediate_exit)
7821                 r = -EINTR;
7822         else
7823                 r = vcpu_run(vcpu);
7824
7825 out:
7826         kvm_put_guest_fpu(vcpu);
7827         if (vcpu->run->kvm_valid_regs)
7828                 store_regs(vcpu);
7829         post_kvm_run_save(vcpu);
7830         kvm_sigset_deactivate(vcpu);
7831
7832         vcpu_put(vcpu);
7833         return r;
7834 }
7835
7836 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7837 {
7838         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
7839                 /*
7840                  * We are here if userspace calls get_regs() in the middle of
7841                  * instruction emulation. Registers state needs to be copied
7842                  * back from emulation context to vcpu. Userspace shouldn't do
7843                  * that usually, but some bad designed PV devices (vmware
7844                  * backdoor interface) need this to work
7845                  */
7846                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
7847                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7848         }
7849         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
7850         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
7851         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
7852         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
7853         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
7854         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
7855         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
7856         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
7857 #ifdef CONFIG_X86_64
7858         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
7859         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
7860         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
7861         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
7862         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
7863         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
7864         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
7865         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
7866 #endif
7867
7868         regs->rip = kvm_rip_read(vcpu);
7869         regs->rflags = kvm_get_rflags(vcpu);
7870 }
7871
7872 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7873 {
7874         vcpu_load(vcpu);
7875         __get_regs(vcpu, regs);
7876         vcpu_put(vcpu);
7877         return 0;
7878 }
7879
7880 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7881 {
7882         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
7883         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7884
7885         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
7886         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
7887         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
7888         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
7889         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
7890         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
7891         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
7892         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
7893 #ifdef CONFIG_X86_64
7894         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
7895         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
7896         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
7897         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
7898         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
7899         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
7900         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
7901         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
7902 #endif
7903
7904         kvm_rip_write(vcpu, regs->rip);
7905         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
7906
7907         vcpu->arch.exception.pending = false;
7908
7909         kvm_make_request(KVM_REQ_EVENT, vcpu);
7910 }
7911
7912 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7913 {
7914         vcpu_load(vcpu);
7915         __set_regs(vcpu, regs);
7916         vcpu_put(vcpu);
7917         return 0;
7918 }
7919
7920 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
7921 {
7922         struct kvm_segment cs;
7923
7924         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7925         *db = cs.db;
7926         *l = cs.l;
7927 }
7928 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
7929
7930 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
7931 {
7932         struct desc_ptr dt;
7933
7934         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7935         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7936         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7937         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7938         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7939         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7940
7941         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7942         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7943
7944         kvm_x86_ops->get_idt(vcpu, &dt);
7945         sregs->idt.limit = dt.size;
7946         sregs->idt.base = dt.address;
7947         kvm_x86_ops->get_gdt(vcpu, &dt);
7948         sregs->gdt.limit = dt.size;
7949         sregs->gdt.base = dt.address;
7950
7951         sregs->cr0 = kvm_read_cr0(vcpu);
7952         sregs->cr2 = vcpu->arch.cr2;
7953         sregs->cr3 = kvm_read_cr3(vcpu);
7954         sregs->cr4 = kvm_read_cr4(vcpu);
7955         sregs->cr8 = kvm_get_cr8(vcpu);
7956         sregs->efer = vcpu->arch.efer;
7957         sregs->apic_base = kvm_get_apic_base(vcpu);
7958
7959         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
7960
7961         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
7962                 set_bit(vcpu->arch.interrupt.nr,
7963                         (unsigned long *)sregs->interrupt_bitmap);
7964 }
7965
7966 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
7967                                   struct kvm_sregs *sregs)
7968 {
7969         vcpu_load(vcpu);
7970         __get_sregs(vcpu, sregs);
7971         vcpu_put(vcpu);
7972         return 0;
7973 }
7974
7975 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
7976                                     struct kvm_mp_state *mp_state)
7977 {
7978         vcpu_load(vcpu);
7979
7980         kvm_apic_accept_events(vcpu);
7981         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
7982                                         vcpu->arch.pv.pv_unhalted)
7983                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
7984         else
7985                 mp_state->mp_state = vcpu->arch.mp_state;
7986
7987         vcpu_put(vcpu);
7988         return 0;
7989 }
7990
7991 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
7992                                     struct kvm_mp_state *mp_state)
7993 {
7994         int ret = -EINVAL;
7995
7996         vcpu_load(vcpu);
7997
7998         if (!lapic_in_kernel(vcpu) &&
7999             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
8000                 goto out;
8001
8002         /* INITs are latched while in SMM */
8003         if ((is_smm(vcpu) || vcpu->arch.smi_pending) &&
8004             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
8005              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
8006                 goto out;
8007
8008         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
8009                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
8010                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
8011         } else
8012                 vcpu->arch.mp_state = mp_state->mp_state;
8013         kvm_make_request(KVM_REQ_EVENT, vcpu);
8014
8015         ret = 0;
8016 out:
8017         vcpu_put(vcpu);
8018         return ret;
8019 }
8020
8021 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
8022                     int reason, bool has_error_code, u32 error_code)
8023 {
8024         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
8025         int ret;
8026
8027         init_emulate_ctxt(vcpu);
8028
8029         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
8030                                    has_error_code, error_code);
8031
8032         if (ret)
8033                 return EMULATE_FAIL;
8034
8035         kvm_rip_write(vcpu, ctxt->eip);
8036         kvm_set_rflags(vcpu, ctxt->eflags);
8037         kvm_make_request(KVM_REQ_EVENT, vcpu);
8038         return EMULATE_DONE;
8039 }
8040 EXPORT_SYMBOL_GPL(kvm_task_switch);
8041
8042 static int kvm_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8043 {
8044         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
8045                 /*
8046                  * When EFER.LME and CR0.PG are set, the processor is in
8047                  * 64-bit mode (though maybe in a 32-bit code segment).
8048                  * CR4.PAE and EFER.LMA must be set.
8049                  */
8050                 if (!(sregs->cr4 & X86_CR4_PAE)
8051                     || !(sregs->efer & EFER_LMA))
8052                         return -EINVAL;
8053         } else {
8054                 /*
8055                  * Not in 64-bit mode: EFER.LMA is clear and the code
8056                  * segment cannot be 64-bit.
8057                  */
8058                 if (sregs->efer & EFER_LMA || sregs->cs.l)
8059                         return -EINVAL;
8060         }
8061
8062         return 0;
8063 }
8064
8065 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8066 {
8067         struct msr_data apic_base_msr;
8068         int mmu_reset_needed = 0;
8069         int cpuid_update_needed = 0;
8070         int pending_vec, max_bits, idx;
8071         struct desc_ptr dt;
8072         int ret = -EINVAL;
8073
8074         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) &&
8075                         (sregs->cr4 & X86_CR4_OSXSAVE))
8076                 goto out;
8077
8078         if (kvm_valid_sregs(vcpu, sregs))
8079                 goto out;
8080
8081         apic_base_msr.data = sregs->apic_base;
8082         apic_base_msr.host_initiated = true;
8083         if (kvm_set_apic_base(vcpu, &apic_base_msr))
8084                 goto out;
8085
8086         dt.size = sregs->idt.limit;
8087         dt.address = sregs->idt.base;
8088         kvm_x86_ops->set_idt(vcpu, &dt);
8089         dt.size = sregs->gdt.limit;
8090         dt.address = sregs->gdt.base;
8091         kvm_x86_ops->set_gdt(vcpu, &dt);
8092
8093         vcpu->arch.cr2 = sregs->cr2;
8094         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
8095         vcpu->arch.cr3 = sregs->cr3;
8096         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
8097
8098         kvm_set_cr8(vcpu, sregs->cr8);
8099
8100         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
8101         kvm_x86_ops->set_efer(vcpu, sregs->efer);
8102
8103         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
8104         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
8105         vcpu->arch.cr0 = sregs->cr0;
8106
8107         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
8108         cpuid_update_needed |= ((kvm_read_cr4(vcpu) ^ sregs->cr4) &
8109                                 (X86_CR4_OSXSAVE | X86_CR4_PKE));
8110         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
8111         if (cpuid_update_needed)
8112                 kvm_update_cpuid(vcpu);
8113
8114         idx = srcu_read_lock(&vcpu->kvm->srcu);
8115         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
8116                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
8117                 mmu_reset_needed = 1;
8118         }
8119         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8120
8121         if (mmu_reset_needed)
8122                 kvm_mmu_reset_context(vcpu);
8123
8124         max_bits = KVM_NR_INTERRUPTS;
8125         pending_vec = find_first_bit(
8126                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
8127         if (pending_vec < max_bits) {
8128                 kvm_queue_interrupt(vcpu, pending_vec, false);
8129                 pr_debug("Set back pending irq %d\n", pending_vec);
8130         }
8131
8132         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
8133         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
8134         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
8135         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
8136         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
8137         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
8138
8139         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
8140         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
8141
8142         update_cr8_intercept(vcpu);
8143
8144         /* Older userspace won't unhalt the vcpu on reset. */
8145         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
8146             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
8147             !is_protmode(vcpu))
8148                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8149
8150         kvm_make_request(KVM_REQ_EVENT, vcpu);
8151
8152         ret = 0;
8153 out:
8154         return ret;
8155 }
8156
8157 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
8158                                   struct kvm_sregs *sregs)
8159 {
8160         int ret;
8161
8162         vcpu_load(vcpu);
8163         ret = __set_sregs(vcpu, sregs);
8164         vcpu_put(vcpu);
8165         return ret;
8166 }
8167
8168 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
8169                                         struct kvm_guest_debug *dbg)
8170 {
8171         unsigned long rflags;
8172         int i, r;
8173
8174         vcpu_load(vcpu);
8175
8176         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
8177                 r = -EBUSY;
8178                 if (vcpu->arch.exception.pending)
8179                         goto out;
8180                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
8181                         kvm_queue_exception(vcpu, DB_VECTOR);
8182                 else
8183                         kvm_queue_exception(vcpu, BP_VECTOR);
8184         }
8185
8186         /*
8187          * Read rflags as long as potentially injected trace flags are still
8188          * filtered out.
8189          */
8190         rflags = kvm_get_rflags(vcpu);
8191
8192         vcpu->guest_debug = dbg->control;
8193         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
8194                 vcpu->guest_debug = 0;
8195
8196         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
8197                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
8198                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
8199                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
8200         } else {
8201                 for (i = 0; i < KVM_NR_DB_REGS; i++)
8202                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
8203         }
8204         kvm_update_dr7(vcpu);
8205
8206         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8207                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
8208                         get_segment_base(vcpu, VCPU_SREG_CS);
8209
8210         /*
8211          * Trigger an rflags update that will inject or remove the trace
8212          * flags.
8213          */
8214         kvm_set_rflags(vcpu, rflags);
8215
8216         kvm_x86_ops->update_bp_intercept(vcpu);
8217
8218         r = 0;
8219
8220 out:
8221         vcpu_put(vcpu);
8222         return r;
8223 }
8224
8225 /*
8226  * Translate a guest virtual address to a guest physical address.
8227  */
8228 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
8229                                     struct kvm_translation *tr)
8230 {
8231         unsigned long vaddr = tr->linear_address;
8232         gpa_t gpa;
8233         int idx;
8234
8235         vcpu_load(vcpu);
8236
8237         idx = srcu_read_lock(&vcpu->kvm->srcu);
8238         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
8239         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8240         tr->physical_address = gpa;
8241         tr->valid = gpa != UNMAPPED_GVA;
8242         tr->writeable = 1;
8243         tr->usermode = 0;
8244
8245         vcpu_put(vcpu);
8246         return 0;
8247 }
8248
8249 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
8250 {
8251         struct fxregs_state *fxsave;
8252
8253         vcpu_load(vcpu);
8254
8255         fxsave = &vcpu->arch.guest_fpu.state.fxsave;
8256         memcpy(fpu->fpr, fxsave->st_space, 128);
8257         fpu->fcw = fxsave->cwd;
8258         fpu->fsw = fxsave->swd;
8259         fpu->ftwx = fxsave->twd;
8260         fpu->last_opcode = fxsave->fop;
8261         fpu->last_ip = fxsave->rip;
8262         fpu->last_dp = fxsave->rdp;
8263         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
8264
8265         vcpu_put(vcpu);
8266         return 0;
8267 }
8268
8269 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
8270 {
8271         struct fxregs_state *fxsave;
8272
8273         vcpu_load(vcpu);
8274
8275         fxsave = &vcpu->arch.guest_fpu.state.fxsave;
8276
8277         memcpy(fxsave->st_space, fpu->fpr, 128);
8278         fxsave->cwd = fpu->fcw;
8279         fxsave->swd = fpu->fsw;
8280         fxsave->twd = fpu->ftwx;
8281         fxsave->fop = fpu->last_opcode;
8282         fxsave->rip = fpu->last_ip;
8283         fxsave->rdp = fpu->last_dp;
8284         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
8285
8286         vcpu_put(vcpu);
8287         return 0;
8288 }
8289
8290 static void store_regs(struct kvm_vcpu *vcpu)
8291 {
8292         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
8293
8294         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
8295                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
8296
8297         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
8298                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
8299
8300         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
8301                 kvm_vcpu_ioctl_x86_get_vcpu_events(
8302                                 vcpu, &vcpu->run->s.regs.events);
8303 }
8304
8305 static int sync_regs(struct kvm_vcpu *vcpu)
8306 {
8307         if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
8308                 return -EINVAL;
8309
8310         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
8311                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
8312                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
8313         }
8314         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
8315                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
8316                         return -EINVAL;
8317                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
8318         }
8319         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
8320                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
8321                                 vcpu, &vcpu->run->s.regs.events))
8322                         return -EINVAL;
8323                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
8324         }
8325
8326         return 0;
8327 }
8328
8329 static void fx_init(struct kvm_vcpu *vcpu)
8330 {
8331         fpstate_init(&vcpu->arch.guest_fpu.state);
8332         if (boot_cpu_has(X86_FEATURE_XSAVES))
8333                 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
8334                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
8335
8336         /*
8337          * Ensure guest xcr0 is valid for loading
8338          */
8339         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
8340
8341         vcpu->arch.cr0 |= X86_CR0_ET;
8342 }
8343
8344 /* Swap (qemu) user FPU context for the guest FPU context. */
8345 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
8346 {
8347         preempt_disable();
8348         copy_fpregs_to_fpstate(&vcpu->arch.user_fpu);
8349         /* PKRU is separately restored in kvm_x86_ops->run.  */
8350         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state,
8351                                 ~XFEATURE_MASK_PKRU);
8352         preempt_enable();
8353         trace_kvm_fpu(1);
8354 }
8355
8356 /* When vcpu_run ends, restore user space FPU context. */
8357 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
8358 {
8359         preempt_disable();
8360         copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
8361         copy_kernel_to_fpregs(&vcpu->arch.user_fpu.state);
8362         preempt_enable();
8363         ++vcpu->stat.fpu_reload;
8364         trace_kvm_fpu(0);
8365 }
8366
8367 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
8368 {
8369         void *wbinvd_dirty_mask = vcpu->arch.wbinvd_dirty_mask;
8370
8371         kvmclock_reset(vcpu);
8372
8373         kvm_x86_ops->vcpu_free(vcpu);
8374         free_cpumask_var(wbinvd_dirty_mask);
8375 }
8376
8377 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
8378                                                 unsigned int id)
8379 {
8380         struct kvm_vcpu *vcpu;
8381
8382         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
8383                 printk_once(KERN_WARNING
8384                 "kvm: SMP vm created on host with unstable TSC; "
8385                 "guest TSC will not be reliable\n");
8386
8387         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
8388
8389         return vcpu;
8390 }
8391
8392 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
8393 {
8394         kvm_vcpu_mtrr_init(vcpu);
8395         vcpu_load(vcpu);
8396         kvm_vcpu_reset(vcpu, false);
8397         kvm_mmu_setup(vcpu);
8398         vcpu_put(vcpu);
8399         return 0;
8400 }
8401
8402 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
8403 {
8404         struct msr_data msr;
8405         struct kvm *kvm = vcpu->kvm;
8406
8407         kvm_hv_vcpu_postcreate(vcpu);
8408
8409         if (mutex_lock_killable(&vcpu->mutex))
8410                 return;
8411         vcpu_load(vcpu);
8412         msr.data = 0x0;
8413         msr.index = MSR_IA32_TSC;
8414         msr.host_initiated = true;
8415         kvm_write_tsc(vcpu, &msr);
8416         vcpu_put(vcpu);
8417         mutex_unlock(&vcpu->mutex);
8418
8419         if (!kvmclock_periodic_sync)
8420                 return;
8421
8422         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
8423                                         KVMCLOCK_SYNC_PERIOD);
8424 }
8425
8426 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
8427 {
8428         vcpu->arch.apf.msr_val = 0;
8429
8430         vcpu_load(vcpu);
8431         kvm_mmu_unload(vcpu);
8432         vcpu_put(vcpu);
8433
8434         kvm_x86_ops->vcpu_free(vcpu);
8435 }
8436
8437 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
8438 {
8439         kvm_lapic_reset(vcpu, init_event);
8440
8441         vcpu->arch.hflags = 0;
8442
8443         vcpu->arch.smi_pending = 0;
8444         vcpu->arch.smi_count = 0;
8445         atomic_set(&vcpu->arch.nmi_queued, 0);
8446         vcpu->arch.nmi_pending = 0;
8447         vcpu->arch.nmi_injected = false;
8448         kvm_clear_interrupt_queue(vcpu);
8449         kvm_clear_exception_queue(vcpu);
8450         vcpu->arch.exception.pending = false;
8451
8452         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
8453         kvm_update_dr0123(vcpu);
8454         vcpu->arch.dr6 = DR6_INIT;
8455         kvm_update_dr6(vcpu);
8456         vcpu->arch.dr7 = DR7_FIXED_1;
8457         kvm_update_dr7(vcpu);
8458
8459         vcpu->arch.cr2 = 0;
8460
8461         kvm_make_request(KVM_REQ_EVENT, vcpu);
8462         vcpu->arch.apf.msr_val = 0;
8463         vcpu->arch.st.msr_val = 0;
8464
8465         kvmclock_reset(vcpu);
8466
8467         kvm_clear_async_pf_completion_queue(vcpu);
8468         kvm_async_pf_hash_reset(vcpu);
8469         vcpu->arch.apf.halted = false;
8470
8471         if (kvm_mpx_supported()) {
8472                 void *mpx_state_buffer;
8473
8474                 /*
8475                  * To avoid have the INIT path from kvm_apic_has_events() that be
8476                  * called with loaded FPU and does not let userspace fix the state.
8477                  */
8478                 if (init_event)
8479                         kvm_put_guest_fpu(vcpu);
8480                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu.state.xsave,
8481                                         XFEATURE_MASK_BNDREGS);
8482                 if (mpx_state_buffer)
8483                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
8484                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu.state.xsave,
8485                                         XFEATURE_MASK_BNDCSR);
8486                 if (mpx_state_buffer)
8487                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
8488                 if (init_event)
8489                         kvm_load_guest_fpu(vcpu);
8490         }
8491
8492         if (!init_event) {
8493                 kvm_pmu_reset(vcpu);
8494                 vcpu->arch.smbase = 0x30000;
8495
8496                 vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
8497                 vcpu->arch.msr_misc_features_enables = 0;
8498
8499                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
8500         }
8501
8502         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
8503         vcpu->arch.regs_avail = ~0;
8504         vcpu->arch.regs_dirty = ~0;
8505
8506         vcpu->arch.ia32_xss = 0;
8507
8508         kvm_x86_ops->vcpu_reset(vcpu, init_event);
8509 }
8510
8511 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
8512 {
8513         struct kvm_segment cs;
8514
8515         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
8516         cs.selector = vector << 8;
8517         cs.base = vector << 12;
8518         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
8519         kvm_rip_write(vcpu, 0);
8520 }
8521
8522 int kvm_arch_hardware_enable(void)
8523 {
8524         struct kvm *kvm;
8525         struct kvm_vcpu *vcpu;
8526         int i;
8527         int ret;
8528         u64 local_tsc;
8529         u64 max_tsc = 0;
8530         bool stable, backwards_tsc = false;
8531
8532         kvm_shared_msr_cpu_online();
8533         ret = kvm_x86_ops->hardware_enable();
8534         if (ret != 0)
8535                 return ret;
8536
8537         local_tsc = rdtsc();
8538         stable = !kvm_check_tsc_unstable();
8539         list_for_each_entry(kvm, &vm_list, vm_list) {
8540                 kvm_for_each_vcpu(i, vcpu, kvm) {
8541                         if (!stable && vcpu->cpu == smp_processor_id())
8542                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8543                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
8544                                 backwards_tsc = true;
8545                                 if (vcpu->arch.last_host_tsc > max_tsc)
8546                                         max_tsc = vcpu->arch.last_host_tsc;
8547                         }
8548                 }
8549         }
8550
8551         /*
8552          * Sometimes, even reliable TSCs go backwards.  This happens on
8553          * platforms that reset TSC during suspend or hibernate actions, but
8554          * maintain synchronization.  We must compensate.  Fortunately, we can
8555          * detect that condition here, which happens early in CPU bringup,
8556          * before any KVM threads can be running.  Unfortunately, we can't
8557          * bring the TSCs fully up to date with real time, as we aren't yet far
8558          * enough into CPU bringup that we know how much real time has actually
8559          * elapsed; our helper function, ktime_get_boot_ns() will be using boot
8560          * variables that haven't been updated yet.
8561          *
8562          * So we simply find the maximum observed TSC above, then record the
8563          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
8564          * the adjustment will be applied.  Note that we accumulate
8565          * adjustments, in case multiple suspend cycles happen before some VCPU
8566          * gets a chance to run again.  In the event that no KVM threads get a
8567          * chance to run, we will miss the entire elapsed period, as we'll have
8568          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
8569          * loose cycle time.  This isn't too big a deal, since the loss will be
8570          * uniform across all VCPUs (not to mention the scenario is extremely
8571          * unlikely). It is possible that a second hibernate recovery happens
8572          * much faster than a first, causing the observed TSC here to be
8573          * smaller; this would require additional padding adjustment, which is
8574          * why we set last_host_tsc to the local tsc observed here.
8575          *
8576          * N.B. - this code below runs only on platforms with reliable TSC,
8577          * as that is the only way backwards_tsc is set above.  Also note
8578          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
8579          * have the same delta_cyc adjustment applied if backwards_tsc
8580          * is detected.  Note further, this adjustment is only done once,
8581          * as we reset last_host_tsc on all VCPUs to stop this from being
8582          * called multiple times (one for each physical CPU bringup).
8583          *
8584          * Platforms with unreliable TSCs don't have to deal with this, they
8585          * will be compensated by the logic in vcpu_load, which sets the TSC to
8586          * catchup mode.  This will catchup all VCPUs to real time, but cannot
8587          * guarantee that they stay in perfect synchronization.
8588          */
8589         if (backwards_tsc) {
8590                 u64 delta_cyc = max_tsc - local_tsc;
8591                 list_for_each_entry(kvm, &vm_list, vm_list) {
8592                         kvm->arch.backwards_tsc_observed = true;
8593                         kvm_for_each_vcpu(i, vcpu, kvm) {
8594                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
8595                                 vcpu->arch.last_host_tsc = local_tsc;
8596                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
8597                         }
8598
8599                         /*
8600                          * We have to disable TSC offset matching.. if you were
8601                          * booting a VM while issuing an S4 host suspend....
8602                          * you may have some problem.  Solving this issue is
8603                          * left as an exercise to the reader.
8604                          */
8605                         kvm->arch.last_tsc_nsec = 0;
8606                         kvm->arch.last_tsc_write = 0;
8607                 }
8608
8609         }
8610         return 0;
8611 }
8612
8613 void kvm_arch_hardware_disable(void)
8614 {
8615         kvm_x86_ops->hardware_disable();
8616         drop_user_return_notifiers();
8617 }
8618
8619 int kvm_arch_hardware_setup(void)
8620 {
8621         int r;
8622
8623         r = kvm_x86_ops->hardware_setup();
8624         if (r != 0)
8625                 return r;
8626
8627         if (kvm_has_tsc_control) {
8628                 /*
8629                  * Make sure the user can only configure tsc_khz values that
8630                  * fit into a signed integer.
8631                  * A min value is not calculated because it will always
8632                  * be 1 on all machines.
8633                  */
8634                 u64 max = min(0x7fffffffULL,
8635                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
8636                 kvm_max_guest_tsc_khz = max;
8637
8638                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
8639         }
8640
8641         kvm_init_msr_list();
8642         return 0;
8643 }
8644
8645 void kvm_arch_hardware_unsetup(void)
8646 {
8647         kvm_x86_ops->hardware_unsetup();
8648 }
8649
8650 void kvm_arch_check_processor_compat(void *rtn)
8651 {
8652         kvm_x86_ops->check_processor_compatibility(rtn);
8653 }
8654
8655 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
8656 {
8657         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
8658 }
8659 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
8660
8661 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
8662 {
8663         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
8664 }
8665
8666 struct static_key kvm_no_apic_vcpu __read_mostly;
8667 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
8668
8669 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
8670 {
8671         struct page *page;
8672         int r;
8673
8674         vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv(vcpu);
8675         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
8676         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
8677                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8678         else
8679                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
8680
8681         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
8682         if (!page) {
8683                 r = -ENOMEM;
8684                 goto fail;
8685         }
8686         vcpu->arch.pio_data = page_address(page);
8687
8688         kvm_set_tsc_khz(vcpu, max_tsc_khz);
8689
8690         r = kvm_mmu_create(vcpu);
8691         if (r < 0)
8692                 goto fail_free_pio_data;
8693
8694         if (irqchip_in_kernel(vcpu->kvm)) {
8695                 r = kvm_create_lapic(vcpu);
8696                 if (r < 0)
8697                         goto fail_mmu_destroy;
8698         } else
8699                 static_key_slow_inc(&kvm_no_apic_vcpu);
8700
8701         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
8702                                        GFP_KERNEL);
8703         if (!vcpu->arch.mce_banks) {
8704                 r = -ENOMEM;
8705                 goto fail_free_lapic;
8706         }
8707         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
8708
8709         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
8710                 r = -ENOMEM;
8711                 goto fail_free_mce_banks;
8712         }
8713
8714         fx_init(vcpu);
8715
8716         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
8717
8718         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
8719
8720         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
8721
8722         kvm_async_pf_hash_reset(vcpu);
8723         kvm_pmu_init(vcpu);
8724
8725         vcpu->arch.pending_external_vector = -1;
8726         vcpu->arch.preempted_in_kernel = false;
8727
8728         kvm_hv_vcpu_init(vcpu);
8729
8730         return 0;
8731
8732 fail_free_mce_banks:
8733         kfree(vcpu->arch.mce_banks);
8734 fail_free_lapic:
8735         kvm_free_lapic(vcpu);
8736 fail_mmu_destroy:
8737         kvm_mmu_destroy(vcpu);
8738 fail_free_pio_data:
8739         free_page((unsigned long)vcpu->arch.pio_data);
8740 fail:
8741         return r;
8742 }
8743
8744 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
8745 {
8746         int idx;
8747
8748         kvm_hv_vcpu_uninit(vcpu);
8749         kvm_pmu_destroy(vcpu);
8750         kfree(vcpu->arch.mce_banks);
8751         kvm_free_lapic(vcpu);
8752         idx = srcu_read_lock(&vcpu->kvm->srcu);
8753         kvm_mmu_destroy(vcpu);
8754         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8755         free_page((unsigned long)vcpu->arch.pio_data);
8756         if (!lapic_in_kernel(vcpu))
8757                 static_key_slow_dec(&kvm_no_apic_vcpu);
8758 }
8759
8760 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
8761 {
8762         kvm_x86_ops->sched_in(vcpu, cpu);
8763 }
8764
8765 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
8766 {
8767         if (type)
8768                 return -EINVAL;
8769
8770         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
8771         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
8772         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
8773         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
8774         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
8775
8776         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
8777         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
8778         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
8779         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
8780                 &kvm->arch.irq_sources_bitmap);
8781
8782         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
8783         mutex_init(&kvm->arch.apic_map_lock);
8784         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
8785
8786         kvm->arch.kvmclock_offset = -ktime_get_boot_ns();
8787         pvclock_update_vm_gtod_copy(kvm);
8788
8789         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
8790         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
8791
8792         kvm_hv_init_vm(kvm);
8793         kvm_page_track_init(kvm);
8794         kvm_mmu_init_vm(kvm);
8795
8796         if (kvm_x86_ops->vm_init)
8797                 return kvm_x86_ops->vm_init(kvm);
8798
8799         return 0;
8800 }
8801
8802 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
8803 {
8804         vcpu_load(vcpu);
8805         kvm_mmu_unload(vcpu);
8806         vcpu_put(vcpu);
8807 }
8808
8809 static void kvm_free_vcpus(struct kvm *kvm)
8810 {
8811         unsigned int i;
8812         struct kvm_vcpu *vcpu;
8813
8814         /*
8815          * Unpin any mmu pages first.
8816          */
8817         kvm_for_each_vcpu(i, vcpu, kvm) {
8818                 kvm_clear_async_pf_completion_queue(vcpu);
8819                 kvm_unload_vcpu_mmu(vcpu);
8820         }
8821         kvm_for_each_vcpu(i, vcpu, kvm)
8822                 kvm_arch_vcpu_free(vcpu);
8823
8824         mutex_lock(&kvm->lock);
8825         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
8826                 kvm->vcpus[i] = NULL;
8827
8828         atomic_set(&kvm->online_vcpus, 0);
8829         mutex_unlock(&kvm->lock);
8830 }
8831
8832 void kvm_arch_sync_events(struct kvm *kvm)
8833 {
8834         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
8835         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
8836         kvm_free_pit(kvm);
8837 }
8838
8839 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
8840 {
8841         int i, r;
8842         unsigned long hva;
8843         struct kvm_memslots *slots = kvm_memslots(kvm);
8844         struct kvm_memory_slot *slot, old;
8845
8846         /* Called with kvm->slots_lock held.  */
8847         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
8848                 return -EINVAL;
8849
8850         slot = id_to_memslot(slots, id);
8851         if (size) {
8852                 if (slot->npages)
8853                         return -EEXIST;
8854
8855                 /*
8856                  * MAP_SHARED to prevent internal slot pages from being moved
8857                  * by fork()/COW.
8858                  */
8859                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
8860                               MAP_SHARED | MAP_ANONYMOUS, 0);
8861                 if (IS_ERR((void *)hva))
8862                         return PTR_ERR((void *)hva);
8863         } else {
8864                 if (!slot->npages)
8865                         return 0;
8866
8867                 hva = 0;
8868         }
8869
8870         old = *slot;
8871         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
8872                 struct kvm_userspace_memory_region m;
8873
8874                 m.slot = id | (i << 16);
8875                 m.flags = 0;
8876                 m.guest_phys_addr = gpa;
8877                 m.userspace_addr = hva;
8878                 m.memory_size = size;
8879                 r = __kvm_set_memory_region(kvm, &m);
8880                 if (r < 0)
8881                         return r;
8882         }
8883
8884         if (!size)
8885                 vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
8886
8887         return 0;
8888 }
8889 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
8890
8891 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
8892 {
8893         int r;
8894
8895         mutex_lock(&kvm->slots_lock);
8896         r = __x86_set_memory_region(kvm, id, gpa, size);
8897         mutex_unlock(&kvm->slots_lock);
8898
8899         return r;
8900 }
8901 EXPORT_SYMBOL_GPL(x86_set_memory_region);
8902
8903 void kvm_arch_destroy_vm(struct kvm *kvm)
8904 {
8905         if (current->mm == kvm->mm) {
8906                 /*
8907                  * Free memory regions allocated on behalf of userspace,
8908                  * unless the the memory map has changed due to process exit
8909                  * or fd copying.
8910                  */
8911                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
8912                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
8913                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
8914         }
8915         if (kvm_x86_ops->vm_destroy)
8916                 kvm_x86_ops->vm_destroy(kvm);
8917         kvm_pic_destroy(kvm);
8918         kvm_ioapic_destroy(kvm);
8919         kvm_free_vcpus(kvm);
8920         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
8921         kvm_mmu_uninit_vm(kvm);
8922         kvm_page_track_cleanup(kvm);
8923         kvm_hv_destroy_vm(kvm);
8924 }
8925
8926 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
8927                            struct kvm_memory_slot *dont)
8928 {
8929         int i;
8930
8931         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8932                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
8933                         kvfree(free->arch.rmap[i]);
8934                         free->arch.rmap[i] = NULL;
8935                 }
8936                 if (i == 0)
8937                         continue;
8938
8939                 if (!dont || free->arch.lpage_info[i - 1] !=
8940                              dont->arch.lpage_info[i - 1]) {
8941                         kvfree(free->arch.lpage_info[i - 1]);
8942                         free->arch.lpage_info[i - 1] = NULL;
8943                 }
8944         }
8945
8946         kvm_page_track_free_memslot(free, dont);
8947 }
8948
8949 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
8950                             unsigned long npages)
8951 {
8952         int i;
8953
8954         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8955                 struct kvm_lpage_info *linfo;
8956                 unsigned long ugfn;
8957                 int lpages;
8958                 int level = i + 1;
8959
8960                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
8961                                       slot->base_gfn, level) + 1;
8962
8963                 slot->arch.rmap[i] =
8964                         kvcalloc(lpages, sizeof(*slot->arch.rmap[i]),
8965                                  GFP_KERNEL);
8966                 if (!slot->arch.rmap[i])
8967                         goto out_free;
8968                 if (i == 0)
8969                         continue;
8970
8971                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL);
8972                 if (!linfo)
8973                         goto out_free;
8974
8975                 slot->arch.lpage_info[i - 1] = linfo;
8976
8977                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
8978                         linfo[0].disallow_lpage = 1;
8979                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
8980                         linfo[lpages - 1].disallow_lpage = 1;
8981                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
8982                 /*
8983                  * If the gfn and userspace address are not aligned wrt each
8984                  * other, or if explicitly asked to, disable large page
8985                  * support for this slot
8986                  */
8987                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
8988                     !kvm_largepages_enabled()) {
8989                         unsigned long j;
8990
8991                         for (j = 0; j < lpages; ++j)
8992                                 linfo[j].disallow_lpage = 1;
8993                 }
8994         }
8995
8996         if (kvm_page_track_create_memslot(slot, npages))
8997                 goto out_free;
8998
8999         return 0;
9000
9001 out_free:
9002         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9003                 kvfree(slot->arch.rmap[i]);
9004                 slot->arch.rmap[i] = NULL;
9005                 if (i == 0)
9006                         continue;
9007
9008                 kvfree(slot->arch.lpage_info[i - 1]);
9009                 slot->arch.lpage_info[i - 1] = NULL;
9010         }
9011         return -ENOMEM;
9012 }
9013
9014 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
9015 {
9016         /*
9017          * memslots->generation has been incremented.
9018          * mmio generation may have reached its maximum value.
9019          */
9020         kvm_mmu_invalidate_mmio_sptes(kvm, slots);
9021 }
9022
9023 int kvm_arch_prepare_memory_region(struct kvm *kvm,
9024                                 struct kvm_memory_slot *memslot,
9025                                 const struct kvm_userspace_memory_region *mem,
9026                                 enum kvm_mr_change change)
9027 {
9028         return 0;
9029 }
9030
9031 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
9032                                      struct kvm_memory_slot *new)
9033 {
9034         /* Still write protect RO slot */
9035         if (new->flags & KVM_MEM_READONLY) {
9036                 kvm_mmu_slot_remove_write_access(kvm, new);
9037                 return;
9038         }
9039
9040         /*
9041          * Call kvm_x86_ops dirty logging hooks when they are valid.
9042          *
9043          * kvm_x86_ops->slot_disable_log_dirty is called when:
9044          *
9045          *  - KVM_MR_CREATE with dirty logging is disabled
9046          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
9047          *
9048          * The reason is, in case of PML, we need to set D-bit for any slots
9049          * with dirty logging disabled in order to eliminate unnecessary GPA
9050          * logging in PML buffer (and potential PML buffer full VMEXT). This
9051          * guarantees leaving PML enabled during guest's lifetime won't have
9052          * any additonal overhead from PML when guest is running with dirty
9053          * logging disabled for memory slots.
9054          *
9055          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
9056          * to dirty logging mode.
9057          *
9058          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
9059          *
9060          * In case of write protect:
9061          *
9062          * Write protect all pages for dirty logging.
9063          *
9064          * All the sptes including the large sptes which point to this
9065          * slot are set to readonly. We can not create any new large
9066          * spte on this slot until the end of the logging.
9067          *
9068          * See the comments in fast_page_fault().
9069          */
9070         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
9071                 if (kvm_x86_ops->slot_enable_log_dirty)
9072                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
9073                 else
9074                         kvm_mmu_slot_remove_write_access(kvm, new);
9075         } else {
9076                 if (kvm_x86_ops->slot_disable_log_dirty)
9077                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
9078         }
9079 }
9080
9081 void kvm_arch_commit_memory_region(struct kvm *kvm,
9082                                 const struct kvm_userspace_memory_region *mem,
9083                                 const struct kvm_memory_slot *old,
9084                                 const struct kvm_memory_slot *new,
9085                                 enum kvm_mr_change change)
9086 {
9087         int nr_mmu_pages = 0;
9088
9089         if (!kvm->arch.n_requested_mmu_pages)
9090                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
9091
9092         if (nr_mmu_pages)
9093                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
9094
9095         /*
9096          * Dirty logging tracks sptes in 4k granularity, meaning that large
9097          * sptes have to be split.  If live migration is successful, the guest
9098          * in the source machine will be destroyed and large sptes will be
9099          * created in the destination. However, if the guest continues to run
9100          * in the source machine (for example if live migration fails), small
9101          * sptes will remain around and cause bad performance.
9102          *
9103          * Scan sptes if dirty logging has been stopped, dropping those
9104          * which can be collapsed into a single large-page spte.  Later
9105          * page faults will create the large-page sptes.
9106          */
9107         if ((change != KVM_MR_DELETE) &&
9108                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
9109                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
9110                 kvm_mmu_zap_collapsible_sptes(kvm, new);
9111
9112         /*
9113          * Set up write protection and/or dirty logging for the new slot.
9114          *
9115          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
9116          * been zapped so no dirty logging staff is needed for old slot. For
9117          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
9118          * new and it's also covered when dealing with the new slot.
9119          *
9120          * FIXME: const-ify all uses of struct kvm_memory_slot.
9121          */
9122         if (change != KVM_MR_DELETE)
9123                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
9124 }
9125
9126 void kvm_arch_flush_shadow_all(struct kvm *kvm)
9127 {
9128         kvm_mmu_invalidate_zap_all_pages(kvm);
9129 }
9130
9131 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
9132                                    struct kvm_memory_slot *slot)
9133 {
9134         kvm_page_track_flush_slot(kvm, slot);
9135 }
9136
9137 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
9138 {
9139         if (!list_empty_careful(&vcpu->async_pf.done))
9140                 return true;
9141
9142         if (kvm_apic_has_events(vcpu))
9143                 return true;
9144
9145         if (vcpu->arch.pv.pv_unhalted)
9146                 return true;
9147
9148         if (vcpu->arch.exception.pending)
9149                 return true;
9150
9151         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
9152             (vcpu->arch.nmi_pending &&
9153              kvm_x86_ops->nmi_allowed(vcpu)))
9154                 return true;
9155
9156         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
9157             (vcpu->arch.smi_pending && !is_smm(vcpu)))
9158                 return true;
9159
9160         if (kvm_arch_interrupt_allowed(vcpu) &&
9161             kvm_cpu_has_interrupt(vcpu))
9162                 return true;
9163
9164         if (kvm_hv_has_stimer_pending(vcpu))
9165                 return true;
9166
9167         return false;
9168 }
9169
9170 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
9171 {
9172         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
9173 }
9174
9175 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
9176 {
9177         return vcpu->arch.preempted_in_kernel;
9178 }
9179
9180 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
9181 {
9182         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
9183 }
9184
9185 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
9186 {
9187         return kvm_x86_ops->interrupt_allowed(vcpu);
9188 }
9189
9190 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
9191 {
9192         if (is_64_bit_mode(vcpu))
9193                 return kvm_rip_read(vcpu);
9194         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
9195                      kvm_rip_read(vcpu));
9196 }
9197 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
9198
9199 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
9200 {
9201         return kvm_get_linear_rip(vcpu) == linear_rip;
9202 }
9203 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
9204
9205 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
9206 {
9207         unsigned long rflags;
9208
9209         rflags = kvm_x86_ops->get_rflags(vcpu);
9210         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
9211                 rflags &= ~X86_EFLAGS_TF;
9212         return rflags;
9213 }
9214 EXPORT_SYMBOL_GPL(kvm_get_rflags);
9215
9216 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
9217 {
9218         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
9219             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
9220                 rflags |= X86_EFLAGS_TF;
9221         kvm_x86_ops->set_rflags(vcpu, rflags);
9222 }
9223
9224 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
9225 {
9226         __kvm_set_rflags(vcpu, rflags);
9227         kvm_make_request(KVM_REQ_EVENT, vcpu);
9228 }
9229 EXPORT_SYMBOL_GPL(kvm_set_rflags);
9230
9231 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
9232 {
9233         int r;
9234
9235         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
9236               work->wakeup_all)
9237                 return;
9238
9239         r = kvm_mmu_reload(vcpu);
9240         if (unlikely(r))
9241                 return;
9242
9243         if (!vcpu->arch.mmu.direct_map &&
9244               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
9245                 return;
9246
9247         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
9248 }
9249
9250 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
9251 {
9252         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
9253 }
9254
9255 static inline u32 kvm_async_pf_next_probe(u32 key)
9256 {
9257         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
9258 }
9259
9260 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9261 {
9262         u32 key = kvm_async_pf_hash_fn(gfn);
9263
9264         while (vcpu->arch.apf.gfns[key] != ~0)
9265                 key = kvm_async_pf_next_probe(key);
9266
9267         vcpu->arch.apf.gfns[key] = gfn;
9268 }
9269
9270 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
9271 {
9272         int i;
9273         u32 key = kvm_async_pf_hash_fn(gfn);
9274
9275         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
9276                      (vcpu->arch.apf.gfns[key] != gfn &&
9277                       vcpu->arch.apf.gfns[key] != ~0); i++)
9278                 key = kvm_async_pf_next_probe(key);
9279
9280         return key;
9281 }
9282
9283 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9284 {
9285         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
9286 }
9287
9288 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9289 {
9290         u32 i, j, k;
9291
9292         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
9293         while (true) {
9294                 vcpu->arch.apf.gfns[i] = ~0;
9295                 do {
9296                         j = kvm_async_pf_next_probe(j);
9297                         if (vcpu->arch.apf.gfns[j] == ~0)
9298                                 return;
9299                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
9300                         /*
9301                          * k lies cyclically in ]i,j]
9302                          * |    i.k.j |
9303                          * |....j i.k.| or  |.k..j i...|
9304                          */
9305                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
9306                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
9307                 i = j;
9308         }
9309 }
9310
9311 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
9312 {
9313
9314         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
9315                                       sizeof(val));
9316 }
9317
9318 static int apf_get_user(struct kvm_vcpu *vcpu, u32 *val)
9319 {
9320
9321         return kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, val,
9322                                       sizeof(u32));
9323 }
9324
9325 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
9326                                      struct kvm_async_pf *work)
9327 {
9328         struct x86_exception fault;
9329
9330         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
9331         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
9332
9333         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
9334             (vcpu->arch.apf.send_user_only &&
9335              kvm_x86_ops->get_cpl(vcpu) == 0))
9336                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
9337         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
9338                 fault.vector = PF_VECTOR;
9339                 fault.error_code_valid = true;
9340                 fault.error_code = 0;
9341                 fault.nested_page_fault = false;
9342                 fault.address = work->arch.token;
9343                 fault.async_page_fault = true;
9344                 kvm_inject_page_fault(vcpu, &fault);
9345         }
9346 }
9347
9348 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
9349                                  struct kvm_async_pf *work)
9350 {
9351         struct x86_exception fault;
9352         u32 val;
9353
9354         if (work->wakeup_all)
9355                 work->arch.token = ~0; /* broadcast wakeup */
9356         else
9357                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
9358         trace_kvm_async_pf_ready(work->arch.token, work->gva);
9359
9360         if (vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED &&
9361             !apf_get_user(vcpu, &val)) {
9362                 if (val == KVM_PV_REASON_PAGE_NOT_PRESENT &&
9363                     vcpu->arch.exception.pending &&
9364                     vcpu->arch.exception.nr == PF_VECTOR &&
9365                     !apf_put_user(vcpu, 0)) {
9366                         vcpu->arch.exception.injected = false;
9367                         vcpu->arch.exception.pending = false;
9368                         vcpu->arch.exception.nr = 0;
9369                         vcpu->arch.exception.has_error_code = false;
9370                         vcpu->arch.exception.error_code = 0;
9371                 } else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
9372                         fault.vector = PF_VECTOR;
9373                         fault.error_code_valid = true;
9374                         fault.error_code = 0;
9375                         fault.nested_page_fault = false;
9376                         fault.address = work->arch.token;
9377                         fault.async_page_fault = true;
9378                         kvm_inject_page_fault(vcpu, &fault);
9379                 }
9380         }
9381         vcpu->arch.apf.halted = false;
9382         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9383 }
9384
9385 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
9386 {
9387         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
9388                 return true;
9389         else
9390                 return kvm_can_do_async_pf(vcpu);
9391 }
9392
9393 void kvm_arch_start_assignment(struct kvm *kvm)
9394 {
9395         atomic_inc(&kvm->arch.assigned_device_count);
9396 }
9397 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
9398
9399 void kvm_arch_end_assignment(struct kvm *kvm)
9400 {
9401         atomic_dec(&kvm->arch.assigned_device_count);
9402 }
9403 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
9404
9405 bool kvm_arch_has_assigned_device(struct kvm *kvm)
9406 {
9407         return atomic_read(&kvm->arch.assigned_device_count);
9408 }
9409 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
9410
9411 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
9412 {
9413         atomic_inc(&kvm->arch.noncoherent_dma_count);
9414 }
9415 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
9416
9417 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
9418 {
9419         atomic_dec(&kvm->arch.noncoherent_dma_count);
9420 }
9421 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
9422
9423 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
9424 {
9425         return atomic_read(&kvm->arch.noncoherent_dma_count);
9426 }
9427 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
9428
9429 bool kvm_arch_has_irq_bypass(void)
9430 {
9431         return kvm_x86_ops->update_pi_irte != NULL;
9432 }
9433
9434 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
9435                                       struct irq_bypass_producer *prod)
9436 {
9437         struct kvm_kernel_irqfd *irqfd =
9438                 container_of(cons, struct kvm_kernel_irqfd, consumer);
9439
9440         irqfd->producer = prod;
9441
9442         return kvm_x86_ops->update_pi_irte(irqfd->kvm,
9443                                            prod->irq, irqfd->gsi, 1);
9444 }
9445
9446 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
9447                                       struct irq_bypass_producer *prod)
9448 {
9449         int ret;
9450         struct kvm_kernel_irqfd *irqfd =
9451                 container_of(cons, struct kvm_kernel_irqfd, consumer);
9452
9453         WARN_ON(irqfd->producer != prod);
9454         irqfd->producer = NULL;
9455
9456         /*
9457          * When producer of consumer is unregistered, we change back to
9458          * remapped mode, so we can re-use the current implementation
9459          * when the irq is masked/disabled or the consumer side (KVM
9460          * int this case doesn't want to receive the interrupts.
9461         */
9462         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
9463         if (ret)
9464                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
9465                        " fails: %d\n", irqfd->consumer.token, ret);
9466 }
9467
9468 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
9469                                    uint32_t guest_irq, bool set)
9470 {
9471         if (!kvm_x86_ops->update_pi_irte)
9472                 return -EINVAL;
9473
9474         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
9475 }
9476
9477 bool kvm_vector_hashing_enabled(void)
9478 {
9479         return vector_hashing;
9480 }
9481 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
9482
9483 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
9484 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
9485 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
9486 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
9487 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
9488 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
9489 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
9490 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
9491 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
9492 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
9493 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
9494 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
9495 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
9496 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
9497 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
9498 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
9499 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
9500 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
9501 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);