arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *   Yaniv Kamay  <yaniv@qumranet.com>
  15  *   Amit Shah    <amit.shah@qumranet.com>
  16  *   Ben-Ami Yassour <benami@il.ibm.com>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "ioapic.h"
  22 #include "mmu.h"
  23 #include "i8254.h"
  24 #include "tss.h"
  25 #include "kvm_cache_regs.h"
  26 #include "kvm_emulate.h"
  27 #include "x86.h"
  28 #include "cpuid.h"
  29 #include "pmu.h"
  30 #include "hyperv.h"
  31 #include "lapic.h"
  32 #include "xen.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/export.h>
  40 #include <linux/moduleparam.h>
  41 #include <linux/mman.h>
  42 #include <linux/highmem.h>
  43 #include <linux/iommu.h>
  44 #include <linux/intel-iommu.h>
  45 #include <linux/cpufreq.h>
  46 #include <linux/user-return-notifier.h>
  47 #include <linux/srcu.h>
  48 #include <linux/slab.h>
  49 #include <linux/perf_event.h>
  50 #include <linux/uaccess.h>
  51 #include <linux/hash.h>
  52 #include <linux/pci.h>
  53 #include <linux/timekeeper_internal.h>
  54 #include <linux/pvclock_gtod.h>
  55 #include <linux/kvm_irqfd.h>
  56 #include <linux/irqbypass.h>
  57 #include <linux/sched/stat.h>
  58 #include <linux/sched/isolation.h>
  59 #include <linux/mem_encrypt.h>
  60 #include <linux/entry-kvm.h>
  61
  62 #include <trace/events/kvm.h>
  63
  64 #include <asm/debugreg.h>
  65 #include <asm/msr.h>
  66 #include <asm/desc.h>
  67 #include <asm/mce.h>
  68 #include <linux/kernel_stat.h>
  69 #include <asm/fpu/internal.h> /* Ugh! */
  70 #include <asm/pvclock.h>
  71 #include <asm/div64.h>
  72 #include <asm/irq_remapping.h>
  73 #include <asm/mshyperv.h>
  74 #include <asm/hypervisor.h>
  75 #include <asm/tlbflush.h>
  76 #include <asm/intel_pt.h>
  77 #include <asm/emulate_prefix.h>
  78 #include <asm/sgx.h>
  79 #include <clocksource/hyperv_timer.h>
  80
  81 #define CREATE_TRACE_POINTS
  82 #include "trace.h"
  83
  84 #define MAX_IO_MSRS 256
  85 #define KVM_MAX_MCE_BANKS 32
  86 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  87 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  88
  89 #define emul_to_vcpu(ctxt) \
  90         ((struct kvm_vcpu *)(ctxt)->vcpu)
  91
  92 /* EFER defaults:
  93  * - enable syscall per default because its emulated by KVM
  94  * - enable LME and LMA per default on 64 bit KVM
  95  */
  96 #ifdef CONFIG_X86_64
  97 static
  98 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  99 #else
 100 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
 101 #endif
 102
 103 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
 104
 105 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
 106                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 107
 108 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 109 static void process_nmi(struct kvm_vcpu *vcpu);
 110 static void process_smi(struct kvm_vcpu *vcpu);
 111 static void enter_smm(struct kvm_vcpu *vcpu);
 112 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 113 static void store_regs(struct kvm_vcpu *vcpu);
 114 static int sync_regs(struct kvm_vcpu *vcpu);
 115
 116 struct kvm_x86_ops kvm_x86_ops __read_mostly;
 117 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 118
 119 #define KVM_X86_OP(func)                                             \
 120         DEFINE_STATIC_CALL_NULL(kvm_x86_##func,                      \
 121                                 *(((struct kvm_x86_ops *)0)->func));
 122 #define KVM_X86_OP_NULL KVM_X86_OP
 123 #include <asm/kvm-x86-ops.h>
 124 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits);
 125 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg);
 126 EXPORT_STATIC_CALL_GPL(kvm_x86_tlb_flush_current);
 127
 128 static bool __read_mostly ignore_msrs = 0;
 129 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 130
 131 bool __read_mostly report_ignored_msrs = true;
 132 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 133 EXPORT_SYMBOL_GPL(report_ignored_msrs);
 134
 135 unsigned int min_timer_period_us = 200;
 136 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 137
 138 static bool __read_mostly kvmclock_periodic_sync = true;
 139 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 140
 141 bool __read_mostly kvm_has_tsc_control;
 142 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 143 u32  __read_mostly kvm_max_guest_tsc_khz;
 144 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 145 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 146 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 147 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 148 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 149 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 150 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 151 bool __read_mostly kvm_has_bus_lock_exit;
 152 EXPORT_SYMBOL_GPL(kvm_has_bus_lock_exit);
 153
 154 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 155 static u32 __read_mostly tsc_tolerance_ppm = 250;
 156 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 157
 158 /*
 159  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 160  * adaptive tuning starting from default advancement of 1000ns.  '0' disables
 161  * advancement entirely.  Any other value is used as-is and disables adaptive
 162  * tuning, i.e. allows privileged userspace to set an exact advancement time.
 163  */
 164 static int __read_mostly lapic_timer_advance_ns = -1;
 165 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 166
 167 static bool __read_mostly vector_hashing = true;
 168 module_param(vector_hashing, bool, S_IRUGO);
 169
 170 bool __read_mostly enable_vmware_backdoor = false;
 171 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 172 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 173
 174 static bool __read_mostly force_emulation_prefix = false;
 175 module_param(force_emulation_prefix, bool, S_IRUGO);
 176
 177 int __read_mostly pi_inject_timer = -1;
 178 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
 179
 180 /*
 181  * Restoring the host value for MSRs that are only consumed when running in
 182  * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
 183  * returns to userspace, i.e. the kernel can run with the guest's value.
 184  */
 185 #define KVM_MAX_NR_USER_RETURN_MSRS 16
 186
 187 struct kvm_user_return_msrs {
 188         struct user_return_notifier urn;
 189         bool registered;
 190         struct kvm_user_return_msr_values {
 191                 u64 host;
 192                 u64 curr;
 193         } values[KVM_MAX_NR_USER_RETURN_MSRS];
 194 };
 195
 196 u32 __read_mostly kvm_nr_uret_msrs;
 197 EXPORT_SYMBOL_GPL(kvm_nr_uret_msrs);
 198 static u32 __read_mostly kvm_uret_msrs_list[KVM_MAX_NR_USER_RETURN_MSRS];
 199 static struct kvm_user_return_msrs __percpu *user_return_msrs;
 200
 201 #define KVM_SUPPORTED_XCR0     (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
 202                                 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
 203                                 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
 204                                 | XFEATURE_MASK_PKRU)
 205
 206 u64 __read_mostly host_efer;
 207 EXPORT_SYMBOL_GPL(host_efer);
 208
 209 bool __read_mostly allow_smaller_maxphyaddr = 0;
 210 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr);
 211
 212 u64 __read_mostly host_xss;
 213 EXPORT_SYMBOL_GPL(host_xss);
 214 u64 __read_mostly supported_xss;
 215 EXPORT_SYMBOL_GPL(supported_xss);
 216
 217 struct kvm_stats_debugfs_item debugfs_entries[] = {
 218         VCPU_STAT("pf_fixed", pf_fixed),
 219         VCPU_STAT("pf_guest", pf_guest),
 220         VCPU_STAT("tlb_flush", tlb_flush),
 221         VCPU_STAT("invlpg", invlpg),
 222         VCPU_STAT("exits", exits),
 223         VCPU_STAT("io_exits", io_exits),
 224         VCPU_STAT("mmio_exits", mmio_exits),
 225         VCPU_STAT("signal_exits", signal_exits),
 226         VCPU_STAT("irq_window", irq_window_exits),
 227         VCPU_STAT("nmi_window", nmi_window_exits),
 228         VCPU_STAT("halt_exits", halt_exits),
 229         VCPU_STAT("halt_successful_poll", halt_successful_poll),
 230         VCPU_STAT("halt_attempted_poll", halt_attempted_poll),
 231         VCPU_STAT("halt_poll_invalid", halt_poll_invalid),
 232         VCPU_STAT("halt_wakeup", halt_wakeup),
 233         VCPU_STAT("hypercalls", hypercalls),
 234         VCPU_STAT("request_irq", request_irq_exits),
 235         VCPU_STAT("irq_exits", irq_exits),
 236         VCPU_STAT("host_state_reload", host_state_reload),
 237         VCPU_STAT("fpu_reload", fpu_reload),
 238         VCPU_STAT("insn_emulation", insn_emulation),
 239         VCPU_STAT("insn_emulation_fail", insn_emulation_fail),
 240         VCPU_STAT("irq_injections", irq_injections),
 241         VCPU_STAT("nmi_injections", nmi_injections),
 242         VCPU_STAT("req_event", req_event),
 243         VCPU_STAT("l1d_flush", l1d_flush),
 244         VCPU_STAT("halt_poll_success_ns", halt_poll_success_ns),
 245         VCPU_STAT("halt_poll_fail_ns", halt_poll_fail_ns),
 246         VCPU_STAT("nested_run", nested_run),
 247         VCPU_STAT("directed_yield_attempted", directed_yield_attempted),
 248         VCPU_STAT("directed_yield_successful", directed_yield_successful),
 249         VM_STAT("mmu_shadow_zapped", mmu_shadow_zapped),
 250         VM_STAT("mmu_pte_write", mmu_pte_write),
 251         VM_STAT("mmu_pde_zapped", mmu_pde_zapped),
 252         VM_STAT("mmu_flooded", mmu_flooded),
 253         VM_STAT("mmu_recycled", mmu_recycled),
 254         VM_STAT("mmu_cache_miss", mmu_cache_miss),
 255         VM_STAT("mmu_unsync", mmu_unsync),
 256         VM_STAT("remote_tlb_flush", remote_tlb_flush),
 257         VM_STAT("largepages", lpages, .mode = 0444),
 258         VM_STAT("nx_largepages_splitted", nx_lpage_splits, .mode = 0444),
 259         VM_STAT("max_mmu_page_hash_collisions", max_mmu_page_hash_collisions),
 260         { NULL }
 261 };
 262
 263 u64 __read_mostly host_xcr0;
 264 u64 __read_mostly supported_xcr0;
 265 EXPORT_SYMBOL_GPL(supported_xcr0);
 266
 267 static struct kmem_cache *x86_fpu_cache;
 268
 269 static struct kmem_cache *x86_emulator_cache;
 270
 271 /*
 272  * When called, it means the previous get/set msr reached an invalid msr.
 273  * Return true if we want to ignore/silent this failed msr access.
 274  */
 275 static bool kvm_msr_ignored_check(u32 msr, u64 data, bool write)
 276 {
 277         const char *op = write ? "wrmsr" : "rdmsr";
 278
 279         if (ignore_msrs) {
 280                 if (report_ignored_msrs)
 281                         kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
 282                                       op, msr, data);
 283                 /* Mask the error */
 284                 return true;
 285         } else {
 286                 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
 287                                       op, msr, data);
 288                 return false;
 289         }
 290 }
 291
 292 static struct kmem_cache *kvm_alloc_emulator_cache(void)
 293 {
 294         unsigned int useroffset = offsetof(struct x86_emulate_ctxt, src);
 295         unsigned int size = sizeof(struct x86_emulate_ctxt);
 296
 297         return kmem_cache_create_usercopy("x86_emulator", size,
 298                                           __alignof__(struct x86_emulate_ctxt),
 299                                           SLAB_ACCOUNT, useroffset,
 300                                           size - useroffset, NULL);
 301 }
 302
 303 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 304
 305 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 306 {
 307         int i;
 308         for (i = 0; i < ASYNC_PF_PER_VCPU; i++)
 309                 vcpu->arch.apf.gfns[i] = ~0;
 310 }
 311
 312 static void kvm_on_user_return(struct user_return_notifier *urn)
 313 {
 314         unsigned slot;
 315         struct kvm_user_return_msrs *msrs
 316                 = container_of(urn, struct kvm_user_return_msrs, urn);
 317         struct kvm_user_return_msr_values *values;
 318         unsigned long flags;
 319
 320         /*
 321          * Disabling irqs at this point since the following code could be
 322          * interrupted and executed through kvm_arch_hardware_disable()
 323          */
 324         local_irq_save(flags);
 325         if (msrs->registered) {
 326                 msrs->registered = false;
 327                 user_return_notifier_unregister(urn);
 328         }
 329         local_irq_restore(flags);
 330         for (slot = 0; slot < kvm_nr_uret_msrs; ++slot) {
 331                 values = &msrs->values[slot];
 332                 if (values->host != values->curr) {
 333                         wrmsrl(kvm_uret_msrs_list[slot], values->host);
 334                         values->curr = values->host;
 335                 }
 336         }
 337 }
 338
 339 static int kvm_probe_user_return_msr(u32 msr)
 340 {
 341         u64 val;
 342         int ret;
 343
 344         preempt_disable();
 345         ret = rdmsrl_safe(msr, &val);
 346         if (ret)
 347                 goto out;
 348         ret = wrmsrl_safe(msr, val);
 349 out:
 350         preempt_enable();
 351         return ret;
 352 }
 353
 354 int kvm_add_user_return_msr(u32 msr)
 355 {
 356         BUG_ON(kvm_nr_uret_msrs >= KVM_MAX_NR_USER_RETURN_MSRS);
 357
 358         if (kvm_probe_user_return_msr(msr))
 359                 return -1;
 360
 361         kvm_uret_msrs_list[kvm_nr_uret_msrs] = msr;
 362         return kvm_nr_uret_msrs++;
 363 }
 364 EXPORT_SYMBOL_GPL(kvm_add_user_return_msr);
 365
 366 int kvm_find_user_return_msr(u32 msr)
 367 {
 368         int i;
 369
 370         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 371                 if (kvm_uret_msrs_list[i] == msr)
 372                         return i;
 373         }
 374         return -1;
 375 }
 376 EXPORT_SYMBOL_GPL(kvm_find_user_return_msr);
 377
 378 static void kvm_user_return_msr_cpu_online(void)
 379 {
 380         unsigned int cpu = smp_processor_id();
 381         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 382         u64 value;
 383         int i;
 384
 385         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 386                 rdmsrl_safe(kvm_uret_msrs_list[i], &value);
 387                 msrs->values[i].host = value;
 388                 msrs->values[i].curr = value;
 389         }
 390 }
 391
 392 int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)
 393 {
 394         unsigned int cpu = smp_processor_id();
 395         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 396         int err;
 397
 398         value = (value & mask) | (msrs->values[slot].host & ~mask);
 399         if (value == msrs->values[slot].curr)
 400                 return 0;
 401         err = wrmsrl_safe(kvm_uret_msrs_list[slot], value);
 402         if (err)
 403                 return 1;
 404
 405         msrs->values[slot].curr = value;
 406         if (!msrs->registered) {
 407                 msrs->urn.on_user_return = kvm_on_user_return;
 408                 user_return_notifier_register(&msrs->urn);
 409                 msrs->registered = true;
 410         }
 411         return 0;
 412 }
 413 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr);
 414
 415 static void drop_user_return_notifiers(void)
 416 {
 417         unsigned int cpu = smp_processor_id();
 418         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 419
 420         if (msrs->registered)
 421                 kvm_on_user_return(&msrs->urn);
 422 }
 423
 424 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 425 {
 426         return vcpu->arch.apic_base;
 427 }
 428 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 429
 430 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 431 {
 432         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 433 }
 434 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 435
 436 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 437 {
 438         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 439         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 440         u64 reserved_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu) | 0x2ff |
 441                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 442
 443         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 444                 return 1;
 445         if (!msr_info->host_initiated) {
 446                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 447                         return 1;
 448                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 449                         return 1;
 450         }
 451
 452         kvm_lapic_set_base(vcpu, msr_info->data);
 453         kvm_recalculate_apic_map(vcpu->kvm);
 454         return 0;
 455 }
 456 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 457
 458 asmlinkage __visible noinstr void kvm_spurious_fault(void)
 459 {
 460         /* Fault while not rebooting.  We want the trace. */
 461         BUG_ON(!kvm_rebooting);
 462 }
 463 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 464
 465 #define EXCPT_BENIGN            0
 466 #define EXCPT_CONTRIBUTORY      1
 467 #define EXCPT_PF                2
 468
 469 static int exception_class(int vector)
 470 {
 471         switch (vector) {
 472         case PF_VECTOR:
 473                 return EXCPT_PF;
 474         case DE_VECTOR:
 475         case TS_VECTOR:
 476         case NP_VECTOR:
 477         case SS_VECTOR:
 478         case GP_VECTOR:
 479                 return EXCPT_CONTRIBUTORY;
 480         default:
 481                 break;
 482         }
 483         return EXCPT_BENIGN;
 484 }
 485
 486 #define EXCPT_FAULT             0
 487 #define EXCPT_TRAP              1
 488 #define EXCPT_ABORT             2
 489 #define EXCPT_INTERRUPT         3
 490
 491 static int exception_type(int vector)
 492 {
 493         unsigned int mask;
 494
 495         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 496                 return EXCPT_INTERRUPT;
 497
 498         mask = 1 << vector;
 499
 500         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 501         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 502                 return EXCPT_TRAP;
 503
 504         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 505                 return EXCPT_ABORT;
 506
 507         /* Reserved exceptions will result in fault */
 508         return EXCPT_FAULT;
 509 }
 510
 511 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 512 {
 513         unsigned nr = vcpu->arch.exception.nr;
 514         bool has_payload = vcpu->arch.exception.has_payload;
 515         unsigned long payload = vcpu->arch.exception.payload;
 516
 517         if (!has_payload)
 518                 return;
 519
 520         switch (nr) {
 521         case DB_VECTOR:
 522                 /*
 523                  * "Certain debug exceptions may clear bit 0-3.  The
 524                  * remaining contents of the DR6 register are never
 525                  * cleared by the processor".
 526                  */
 527                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 528                 /*
 529                  * In order to reflect the #DB exception payload in guest
 530                  * dr6, three components need to be considered: active low
 531                  * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
 532                  * DR6_BS and DR6_BT)
 533                  * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
 534                  * In the target guest dr6:
 535                  * FIXED_1 bits should always be set.
 536                  * Active low bits should be cleared if 1-setting in payload.
 537                  * Active high bits should be set if 1-setting in payload.
 538                  *
 539                  * Note, the payload is compatible with the pending debug
 540                  * exceptions/exit qualification under VMX, that active_low bits
 541                  * are active high in payload.
 542                  * So they need to be flipped for DR6.
 543                  */
 544                 vcpu->arch.dr6 |= DR6_ACTIVE_LOW;
 545                 vcpu->arch.dr6 |= payload;
 546                 vcpu->arch.dr6 ^= payload & DR6_ACTIVE_LOW;
 547
 548                 /*
 549                  * The #DB payload is defined as compatible with the 'pending
 550                  * debug exceptions' field under VMX, not DR6. While bit 12 is
 551                  * defined in the 'pending debug exceptions' field (enabled
 552                  * breakpoint), it is reserved and must be zero in DR6.
 553                  */
 554                 vcpu->arch.dr6 &= ~BIT(12);
 555                 break;
 556         case PF_VECTOR:
 557                 vcpu->arch.cr2 = payload;
 558                 break;
 559         }
 560
 561         vcpu->arch.exception.has_payload = false;
 562         vcpu->arch.exception.payload = 0;
 563 }
 564 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 565
 566 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 567                 unsigned nr, bool has_error, u32 error_code,
 568                 bool has_payload, unsigned long payload, bool reinject)
 569 {
 570         u32 prev_nr;
 571         int class1, class2;
 572
 573         kvm_make_request(KVM_REQ_EVENT, vcpu);
 574
 575         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 576         queue:
 577                 if (reinject) {
 578                         /*
 579                          * On vmentry, vcpu->arch.exception.pending is only
 580                          * true if an event injection was blocked by
 581                          * nested_run_pending.  In that case, however,
 582                          * vcpu_enter_guest requests an immediate exit,
 583                          * and the guest shouldn't proceed far enough to
 584                          * need reinjection.
 585                          */
 586                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 587                         vcpu->arch.exception.injected = true;
 588                         if (WARN_ON_ONCE(has_payload)) {
 589                                 /*
 590                                  * A reinjected event has already
 591                                  * delivered its payload.
 592                                  */
 593                                 has_payload = false;
 594                                 payload = 0;
 595                         }
 596                 } else {
 597                         vcpu->arch.exception.pending = true;
 598                         vcpu->arch.exception.injected = false;
 599                 }
 600                 vcpu->arch.exception.has_error_code = has_error;
 601                 vcpu->arch.exception.nr = nr;
 602                 vcpu->arch.exception.error_code = error_code;
 603                 vcpu->arch.exception.has_payload = has_payload;
 604                 vcpu->arch.exception.payload = payload;
 605                 if (!is_guest_mode(vcpu))
 606                         kvm_deliver_exception_payload(vcpu);
 607                 return;
 608         }
 609
 610         /* to check exception */
 611         prev_nr = vcpu->arch.exception.nr;
 612         if (prev_nr == DF_VECTOR) {
 613                 /* triple fault -> shutdown */
 614                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 615                 return;
 616         }
 617         class1 = exception_class(prev_nr);
 618         class2 = exception_class(nr);
 619         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 620                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 621                 /*
 622                  * Generate double fault per SDM Table 5-5.  Set
 623                  * exception.pending = true so that the double fault
 624                  * can trigger a nested vmexit.
 625                  */
 626                 vcpu->arch.exception.pending = true;
 627                 vcpu->arch.exception.injected = false;
 628                 vcpu->arch.exception.has_error_code = true;
 629                 vcpu->arch.exception.nr = DF_VECTOR;
 630                 vcpu->arch.exception.error_code = 0;
 631                 vcpu->arch.exception.has_payload = false;
 632                 vcpu->arch.exception.payload = 0;
 633         } else
 634                 /* replace previous exception with a new one in a hope
 635                    that instruction re-execution will regenerate lost
 636                    exception */
 637                 goto queue;
 638 }
 639
 640 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 641 {
 642         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 643 }
 644 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 645
 646 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 647 {
 648         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 649 }
 650 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 651
 652 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 653                            unsigned long payload)
 654 {
 655         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 656 }
 657 EXPORT_SYMBOL_GPL(kvm_queue_exception_p);
 658
 659 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 660                                     u32 error_code, unsigned long payload)
 661 {
 662         kvm_multiple_exception(vcpu, nr, true, error_code,
 663                                true, payload, false);
 664 }
 665
 666 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 667 {
 668         if (err)
 669                 kvm_inject_gp(vcpu, 0);
 670         else
 671                 return kvm_skip_emulated_instruction(vcpu);
 672
 673         return 1;
 674 }
 675 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 676
 677 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 678 {
 679         ++vcpu->stat.pf_guest;
 680         vcpu->arch.exception.nested_apf =
 681                 is_guest_mode(vcpu) && fault->async_page_fault;
 682         if (vcpu->arch.exception.nested_apf) {
 683                 vcpu->arch.apf.nested_apf_token = fault->address;
 684                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 685         } else {
 686                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 687                                         fault->address);
 688         }
 689 }
 690 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 691
 692 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
 693                                     struct x86_exception *fault)
 694 {
 695         struct kvm_mmu *fault_mmu;
 696         WARN_ON_ONCE(fault->vector != PF_VECTOR);
 697
 698         fault_mmu = fault->nested_page_fault ? vcpu->arch.mmu :
 699                                                vcpu->arch.walk_mmu;
 700
 701         /*
 702          * Invalidate the TLB entry for the faulting address, if it exists,
 703          * else the access will fault indefinitely (and to emulate hardware).
 704          */
 705         if ((fault->error_code & PFERR_PRESENT_MASK) &&
 706             !(fault->error_code & PFERR_RSVD_MASK))
 707                 kvm_mmu_invalidate_gva(vcpu, fault_mmu, fault->address,
 708                                        fault_mmu->root_hpa);
 709
 710         fault_mmu->inject_page_fault(vcpu, fault);
 711         return fault->nested_page_fault;
 712 }
 713 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault);
 714
 715 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 716 {
 717         atomic_inc(&vcpu->arch.nmi_queued);
 718         kvm_make_request(KVM_REQ_NMI, vcpu);
 719 }
 720 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 721
 722 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 723 {
 724         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 725 }
 726 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 727
 728 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 729 {
 730         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 731 }
 732 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 733
 734 /*
 735  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 736  * a #GP and return false.
 737  */
 738 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 739 {
 740         if (static_call(kvm_x86_get_cpl)(vcpu) <= required_cpl)
 741                 return true;
 742         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 743         return false;
 744 }
 745 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 746
 747 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 748 {
 749         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 750                 return true;
 751
 752         kvm_queue_exception(vcpu, UD_VECTOR);
 753         return false;
 754 }
 755 EXPORT_SYMBOL_GPL(kvm_require_dr);
 756
 757 /*
 758  * This function will be used to read from the physical memory of the currently
 759  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 760  * can read from guest physical or from the guest's guest physical memory.
 761  */
 762 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 763                             gfn_t ngfn, void *data, int offset, int len,
 764                             u32 access)
 765 {
 766         struct x86_exception exception;
 767         gfn_t real_gfn;
 768         gpa_t ngpa;
 769
 770         ngpa     = gfn_to_gpa(ngfn);
 771         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 772         if (real_gfn == UNMAPPED_GVA)
 773                 return -EFAULT;
 774
 775         real_gfn = gpa_to_gfn(real_gfn);
 776
 777         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 778 }
 779 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 780
 781 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 782                                void *data, int offset, int len, u32 access)
 783 {
 784         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 785                                        data, offset, len, access);
 786 }
 787
 788 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
 789 {
 790         return vcpu->arch.reserved_gpa_bits | rsvd_bits(5, 8) | rsvd_bits(1, 2);
 791 }
 792
 793 /*
 794  * Load the pae pdptrs.  Return 1 if they are all valid, 0 otherwise.
 795  */
 796 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 797 {
 798         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 799         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 800         int i;
 801         int ret;
 802         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 803
 804         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 805                                       offset * sizeof(u64), sizeof(pdpte),
 806                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 807         if (ret < 0) {
 808                 ret = 0;
 809                 goto out;
 810         }
 811         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 812                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 813                     (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
 814                         ret = 0;
 815                         goto out;
 816                 }
 817         }
 818         ret = 1;
 819
 820         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 821         kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
 822
 823 out:
 824
 825         return ret;
 826 }
 827 EXPORT_SYMBOL_GPL(load_pdptrs);
 828
 829 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 830 {
 831         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 832         int offset;
 833         gfn_t gfn;
 834         int r;
 835
 836         if (!is_pae_paging(vcpu))
 837                 return false;
 838
 839         if (!kvm_register_is_available(vcpu, VCPU_EXREG_PDPTR))
 840                 return true;
 841
 842         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 843         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 844         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 845                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 846         if (r < 0)
 847                 return true;
 848
 849         return memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 850 }
 851 EXPORT_SYMBOL_GPL(pdptrs_changed);
 852
 853 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0)
 854 {
 855         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 856
 857         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 858                 kvm_clear_async_pf_completion_queue(vcpu);
 859                 kvm_async_pf_hash_reset(vcpu);
 860         }
 861
 862         if ((cr0 ^ old_cr0) & update_bits)
 863                 kvm_mmu_reset_context(vcpu);
 864
 865         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 866             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 867             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 868                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 869 }
 870 EXPORT_SYMBOL_GPL(kvm_post_set_cr0);
 871
 872 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 873 {
 874         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 875         unsigned long pdptr_bits = X86_CR0_CD | X86_CR0_NW | X86_CR0_PG;
 876
 877         cr0 |= X86_CR0_ET;
 878
 879 #ifdef CONFIG_X86_64
 880         if (cr0 & 0xffffffff00000000UL)
 881                 return 1;
 882 #endif
 883
 884         cr0 &= ~CR0_RESERVED_BITS;
 885
 886         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 887                 return 1;
 888
 889         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 890                 return 1;
 891
 892 #ifdef CONFIG_X86_64
 893         if ((vcpu->arch.efer & EFER_LME) && !is_paging(vcpu) &&
 894             (cr0 & X86_CR0_PG)) {
 895                 int cs_db, cs_l;
 896
 897                 if (!is_pae(vcpu))
 898                         return 1;
 899                 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
 900                 if (cs_l)
 901                         return 1;
 902         }
 903 #endif
 904         if (!(vcpu->arch.efer & EFER_LME) && (cr0 & X86_CR0_PG) &&
 905             is_pae(vcpu) && ((cr0 ^ old_cr0) & pdptr_bits) &&
 906             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu)))
 907                 return 1;
 908
 909         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 910                 return 1;
 911
 912         static_call(kvm_x86_set_cr0)(vcpu, cr0);
 913
 914         kvm_post_set_cr0(vcpu, old_cr0, cr0);
 915
 916         return 0;
 917 }
 918 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 919
 920 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 921 {
 922         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 923 }
 924 EXPORT_SYMBOL_GPL(kvm_lmsw);
 925
 926 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
 927 {
 928         if (vcpu->arch.guest_state_protected)
 929                 return;
 930
 931         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 932
 933                 if (vcpu->arch.xcr0 != host_xcr0)
 934                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 935
 936                 if (vcpu->arch.xsaves_enabled &&
 937                     vcpu->arch.ia32_xss != host_xss)
 938                         wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
 939         }
 940
 941         if (static_cpu_has(X86_FEATURE_PKU) &&
 942             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 943              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU)) &&
 944             vcpu->arch.pkru != vcpu->arch.host_pkru)
 945                 __write_pkru(vcpu->arch.pkru);
 946 }
 947 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
 948
 949 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
 950 {
 951         if (vcpu->arch.guest_state_protected)
 952                 return;
 953
 954         if (static_cpu_has(X86_FEATURE_PKU) &&
 955             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 956              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU))) {
 957                 vcpu->arch.pkru = rdpkru();
 958                 if (vcpu->arch.pkru != vcpu->arch.host_pkru)
 959                         __write_pkru(vcpu->arch.host_pkru);
 960         }
 961
 962         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 963
 964                 if (vcpu->arch.xcr0 != host_xcr0)
 965                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 966
 967                 if (vcpu->arch.xsaves_enabled &&
 968                     vcpu->arch.ia32_xss != host_xss)
 969                         wrmsrl(MSR_IA32_XSS, host_xss);
 970         }
 971
 972 }
 973 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
 974
 975 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 976 {
 977         u64 xcr0 = xcr;
 978         u64 old_xcr0 = vcpu->arch.xcr0;
 979         u64 valid_bits;
 980
 981         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 982         if (index != XCR_XFEATURE_ENABLED_MASK)
 983                 return 1;
 984         if (!(xcr0 & XFEATURE_MASK_FP))
 985                 return 1;
 986         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 987                 return 1;
 988
 989         /*
 990          * Do not allow the guest to set bits that we do not support
 991          * saving.  However, xcr0 bit 0 is always set, even if the
 992          * emulated CPU does not support XSAVE (see fx_init).
 993          */
 994         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 995         if (xcr0 & ~valid_bits)
 996                 return 1;
 997
 998         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 999             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
1000                 return 1;
1001
1002         if (xcr0 & XFEATURE_MASK_AVX512) {
1003                 if (!(xcr0 & XFEATURE_MASK_YMM))
1004                         return 1;
1005                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
1006                         return 1;
1007         }
1008         vcpu->arch.xcr0 = xcr0;
1009
1010         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
1011                 kvm_update_cpuid_runtime(vcpu);
1012         return 0;
1013 }
1014
1015 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu)
1016 {
1017         if (static_call(kvm_x86_get_cpl)(vcpu) != 0 ||
1018             __kvm_set_xcr(vcpu, kvm_rcx_read(vcpu), kvm_read_edx_eax(vcpu))) {
1019                 kvm_inject_gp(vcpu, 0);
1020                 return 1;
1021         }
1022
1023         return kvm_skip_emulated_instruction(vcpu);
1024 }
1025 EXPORT_SYMBOL_GPL(kvm_emulate_xsetbv);
1026
1027 bool kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1028 {
1029         if (cr4 & cr4_reserved_bits)
1030                 return false;
1031
1032         if (cr4 & vcpu->arch.cr4_guest_rsvd_bits)
1033                 return false;
1034
1035         return static_call(kvm_x86_is_valid_cr4)(vcpu, cr4);
1036 }
1037 EXPORT_SYMBOL_GPL(kvm_is_valid_cr4);
1038
1039 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4)
1040 {
1041         unsigned long mmu_role_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
1042                                       X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
1043
1044         if (((cr4 ^ old_cr4) & mmu_role_bits) ||
1045             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
1046                 kvm_mmu_reset_context(vcpu);
1047 }
1048 EXPORT_SYMBOL_GPL(kvm_post_set_cr4);
1049
1050 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1051 {
1052         unsigned long old_cr4 = kvm_read_cr4(vcpu);
1053         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
1054                                    X86_CR4_SMEP;
1055
1056         if (!kvm_is_valid_cr4(vcpu, cr4))
1057                 return 1;
1058
1059         if (is_long_mode(vcpu)) {
1060                 if (!(cr4 & X86_CR4_PAE))
1061                         return 1;
1062                 if ((cr4 ^ old_cr4) & X86_CR4_LA57)
1063                         return 1;
1064         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
1065                    && ((cr4 ^ old_cr4) & pdptr_bits)
1066                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
1067                                    kvm_read_cr3(vcpu)))
1068                 return 1;
1069
1070         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
1071                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
1072                         return 1;
1073
1074                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1075                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
1076                         return 1;
1077         }
1078
1079         static_call(kvm_x86_set_cr4)(vcpu, cr4);
1080
1081         kvm_post_set_cr4(vcpu, old_cr4, cr4);
1082
1083         return 0;
1084 }
1085 EXPORT_SYMBOL_GPL(kvm_set_cr4);
1086
1087 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1088 {
1089         bool skip_tlb_flush = false;
1090 #ifdef CONFIG_X86_64
1091         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
1092
1093         if (pcid_enabled) {
1094                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
1095                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
1096         }
1097 #endif
1098
1099         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
1100                 if (!skip_tlb_flush) {
1101                         kvm_mmu_sync_roots(vcpu);
1102                         kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1103                 }
1104                 return 0;
1105         }
1106
1107         /*
1108          * Do not condition the GPA check on long mode, this helper is used to
1109          * stuff CR3, e.g. for RSM emulation, and there is no guarantee that
1110          * the current vCPU mode is accurate.
1111          */
1112         if (kvm_vcpu_is_illegal_gpa(vcpu, cr3))
1113                 return 1;
1114
1115         if (is_pae_paging(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
1116                 return 1;
1117
1118         kvm_mmu_new_pgd(vcpu, cr3, skip_tlb_flush, skip_tlb_flush);
1119         vcpu->arch.cr3 = cr3;
1120         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
1121
1122         return 0;
1123 }
1124 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1125
1126 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1127 {
1128         if (cr8 & CR8_RESERVED_BITS)
1129                 return 1;
1130         if (lapic_in_kernel(vcpu))
1131                 kvm_lapic_set_tpr(vcpu, cr8);
1132         else
1133                 vcpu->arch.cr8 = cr8;
1134         return 0;
1135 }
1136 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1137
1138 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1139 {
1140         if (lapic_in_kernel(vcpu))
1141                 return kvm_lapic_get_cr8(vcpu);
1142         else
1143                 return vcpu->arch.cr8;
1144 }
1145 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1146
1147 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1148 {
1149         int i;
1150
1151         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1152                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1153                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1154                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
1155         }
1156 }
1157
1158 void kvm_update_dr7(struct kvm_vcpu *vcpu)
1159 {
1160         unsigned long dr7;
1161
1162         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1163                 dr7 = vcpu->arch.guest_debug_dr7;
1164         else
1165                 dr7 = vcpu->arch.dr7;
1166         static_call(kvm_x86_set_dr7)(vcpu, dr7);
1167         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1168         if (dr7 & DR7_BP_EN_MASK)
1169                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1170 }
1171 EXPORT_SYMBOL_GPL(kvm_update_dr7);
1172
1173 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1174 {
1175         u64 fixed = DR6_FIXED_1;
1176
1177         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1178                 fixed |= DR6_RTM;
1179
1180         if (!guest_cpuid_has(vcpu, X86_FEATURE_BUS_LOCK_DETECT))
1181                 fixed |= DR6_BUS_LOCK;
1182         return fixed;
1183 }
1184
1185 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1186 {
1187         size_t size = ARRAY_SIZE(vcpu->arch.db);
1188
1189         switch (dr) {
1190         case 0 ... 3:
1191                 vcpu->arch.db[array_index_nospec(dr, size)] = val;
1192                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1193                         vcpu->arch.eff_db[dr] = val;
1194                 break;
1195         case 4:
1196         case 6:
1197                 if (!kvm_dr6_valid(val))
1198                         return 1; /* #GP */
1199                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1200                 break;
1201         case 5:
1202         default: /* 7 */
1203                 if (!kvm_dr7_valid(val))
1204                         return 1; /* #GP */
1205                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1206                 kvm_update_dr7(vcpu);
1207                 break;
1208         }
1209
1210         return 0;
1211 }
1212 EXPORT_SYMBOL_GPL(kvm_set_dr);
1213
1214 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1215 {
1216         size_t size = ARRAY_SIZE(vcpu->arch.db);
1217
1218         switch (dr) {
1219         case 0 ... 3:
1220                 *val = vcpu->arch.db[array_index_nospec(dr, size)];
1221                 break;
1222         case 4:
1223         case 6:
1224                 *val = vcpu->arch.dr6;
1225                 break;
1226         case 5:
1227         default: /* 7 */
1228                 *val = vcpu->arch.dr7;
1229                 break;
1230         }
1231 }
1232 EXPORT_SYMBOL_GPL(kvm_get_dr);
1233
1234 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu)
1235 {
1236         u32 ecx = kvm_rcx_read(vcpu);
1237         u64 data;
1238
1239         if (kvm_pmu_rdpmc(vcpu, ecx, &data)) {
1240                 kvm_inject_gp(vcpu, 0);
1241                 return 1;
1242         }
1243
1244         kvm_rax_write(vcpu, (u32)data);
1245         kvm_rdx_write(vcpu, data >> 32);
1246         return kvm_skip_emulated_instruction(vcpu);
1247 }
1248 EXPORT_SYMBOL_GPL(kvm_emulate_rdpmc);
1249
1250 /*
1251  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1252  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1253  *
1254  * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1255  * extract the supported MSRs from the related const lists.
1256  * msrs_to_save is selected from the msrs_to_save_all to reflect the
1257  * capabilities of the host cpu. This capabilities test skips MSRs that are
1258  * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1259  * may depend on host virtualization features rather than host cpu features.
1260  */
1261
1262 static const u32 msrs_to_save_all[] = {
1263         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1264         MSR_STAR,
1265 #ifdef CONFIG_X86_64
1266         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1267 #endif
1268         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1269         MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1270         MSR_IA32_SPEC_CTRL,
1271         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1272         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1273         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1274         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1275         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1276         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1277         MSR_IA32_UMWAIT_CONTROL,
1278
1279         MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1280         MSR_ARCH_PERFMON_FIXED_CTR0 + 2, MSR_ARCH_PERFMON_FIXED_CTR0 + 3,
1281         MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1282         MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1283         MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1284         MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1285         MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1286         MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1287         MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1288         MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1289         MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1290         MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1291         MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1292         MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1293         MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1294         MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1295         MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1296         MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1297         MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1298         MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1299         MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1300         MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1301 };
1302
1303 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
1304 static unsigned num_msrs_to_save;
1305
1306 static const u32 emulated_msrs_all[] = {
1307         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1308         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1309         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1310         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1311         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1312         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1313         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1314         HV_X64_MSR_RESET,
1315         HV_X64_MSR_VP_INDEX,
1316         HV_X64_MSR_VP_RUNTIME,
1317         HV_X64_MSR_SCONTROL,
1318         HV_X64_MSR_STIMER0_CONFIG,
1319         HV_X64_MSR_VP_ASSIST_PAGE,
1320         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1321         HV_X64_MSR_TSC_EMULATION_STATUS,
1322         HV_X64_MSR_SYNDBG_OPTIONS,
1323         HV_X64_MSR_SYNDBG_CONTROL, HV_X64_MSR_SYNDBG_STATUS,
1324         HV_X64_MSR_SYNDBG_SEND_BUFFER, HV_X64_MSR_SYNDBG_RECV_BUFFER,
1325         HV_X64_MSR_SYNDBG_PENDING_BUFFER,
1326
1327         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1328         MSR_KVM_PV_EOI_EN, MSR_KVM_ASYNC_PF_INT, MSR_KVM_ASYNC_PF_ACK,
1329
1330         MSR_IA32_TSC_ADJUST,
1331         MSR_IA32_TSC_DEADLINE,
1332         MSR_IA32_ARCH_CAPABILITIES,
1333         MSR_IA32_PERF_CAPABILITIES,
1334         MSR_IA32_MISC_ENABLE,
1335         MSR_IA32_MCG_STATUS,
1336         MSR_IA32_MCG_CTL,
1337         MSR_IA32_MCG_EXT_CTL,
1338         MSR_IA32_SMBASE,
1339         MSR_SMI_COUNT,
1340         MSR_PLATFORM_INFO,
1341         MSR_MISC_FEATURES_ENABLES,
1342         MSR_AMD64_VIRT_SPEC_CTRL,
1343         MSR_IA32_POWER_CTL,
1344         MSR_IA32_UCODE_REV,
1345
1346         /*
1347          * The following list leaves out MSRs whose values are determined
1348          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1349          * We always support the "true" VMX control MSRs, even if the host
1350          * processor does not, so I am putting these registers here rather
1351          * than in msrs_to_save_all.
1352          */
1353         MSR_IA32_VMX_BASIC,
1354         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1355         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1356         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1357         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1358         MSR_IA32_VMX_MISC,
1359         MSR_IA32_VMX_CR0_FIXED0,
1360         MSR_IA32_VMX_CR4_FIXED0,
1361         MSR_IA32_VMX_VMCS_ENUM,
1362         MSR_IA32_VMX_PROCBASED_CTLS2,
1363         MSR_IA32_VMX_EPT_VPID_CAP,
1364         MSR_IA32_VMX_VMFUNC,
1365
1366         MSR_K7_HWCR,
1367         MSR_KVM_POLL_CONTROL,
1368 };
1369
1370 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1371 static unsigned num_emulated_msrs;
1372
1373 /*
1374  * List of msr numbers which are used to expose MSR-based features that
1375  * can be used by a hypervisor to validate requested CPU features.
1376  */
1377 static const u32 msr_based_features_all[] = {
1378         MSR_IA32_VMX_BASIC,
1379         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1380         MSR_IA32_VMX_PINBASED_CTLS,
1381         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1382         MSR_IA32_VMX_PROCBASED_CTLS,
1383         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1384         MSR_IA32_VMX_EXIT_CTLS,
1385         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1386         MSR_IA32_VMX_ENTRY_CTLS,
1387         MSR_IA32_VMX_MISC,
1388         MSR_IA32_VMX_CR0_FIXED0,
1389         MSR_IA32_VMX_CR0_FIXED1,
1390         MSR_IA32_VMX_CR4_FIXED0,
1391         MSR_IA32_VMX_CR4_FIXED1,
1392         MSR_IA32_VMX_VMCS_ENUM,
1393         MSR_IA32_VMX_PROCBASED_CTLS2,
1394         MSR_IA32_VMX_EPT_VPID_CAP,
1395         MSR_IA32_VMX_VMFUNC,
1396
1397         MSR_F10H_DECFG,
1398         MSR_IA32_UCODE_REV,
1399         MSR_IA32_ARCH_CAPABILITIES,
1400         MSR_IA32_PERF_CAPABILITIES,
1401 };
1402
1403 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
1404 static unsigned int num_msr_based_features;
1405
1406 static u64 kvm_get_arch_capabilities(void)
1407 {
1408         u64 data = 0;
1409
1410         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1411                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1412
1413         /*
1414          * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1415          * the nested hypervisor runs with NX huge pages.  If it is not,
1416          * L1 is anyway vulnerable to ITLB_MULTIHIT exploits from other
1417          * L1 guests, so it need not worry about its own (L2) guests.
1418          */
1419         data |= ARCH_CAP_PSCHANGE_MC_NO;
1420
1421         /*
1422          * If we're doing cache flushes (either "always" or "cond")
1423          * we will do one whenever the guest does a vmlaunch/vmresume.
1424          * If an outer hypervisor is doing the cache flush for us
1425          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1426          * capability to the guest too, and if EPT is disabled we're not
1427          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1428          * require a nested hypervisor to do a flush of its own.
1429          */
1430         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1431                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1432
1433         if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1434                 data |= ARCH_CAP_RDCL_NO;
1435         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1436                 data |= ARCH_CAP_SSB_NO;
1437         if (!boot_cpu_has_bug(X86_BUG_MDS))
1438                 data |= ARCH_CAP_MDS_NO;
1439
1440         if (!boot_cpu_has(X86_FEATURE_RTM)) {
1441                 /*
1442                  * If RTM=0 because the kernel has disabled TSX, the host might
1443                  * have TAA_NO or TSX_CTRL.  Clear TAA_NO (the guest sees RTM=0
1444                  * and therefore knows that there cannot be TAA) but keep
1445                  * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1446                  * and we want to allow migrating those guests to tsx=off hosts.
1447                  */
1448                 data &= ~ARCH_CAP_TAA_NO;
1449         } else if (!boot_cpu_has_bug(X86_BUG_TAA)) {
1450                 data |= ARCH_CAP_TAA_NO;
1451         } else {
1452                 /*
1453                  * Nothing to do here; we emulate TSX_CTRL if present on the
1454                  * host so the guest can choose between disabling TSX or
1455                  * using VERW to clear CPU buffers.
1456                  */
1457         }
1458
1459         return data;
1460 }
1461
1462 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1463 {
1464         switch (msr->index) {
1465         case MSR_IA32_ARCH_CAPABILITIES:
1466                 msr->data = kvm_get_arch_capabilities();
1467                 break;
1468         case MSR_IA32_UCODE_REV:
1469                 rdmsrl_safe(msr->index, &msr->data);
1470                 break;
1471         default:
1472                 return static_call(kvm_x86_get_msr_feature)(msr);
1473         }
1474         return 0;
1475 }
1476
1477 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1478 {
1479         struct kvm_msr_entry msr;
1480         int r;
1481
1482         msr.index = index;
1483         r = kvm_get_msr_feature(&msr);
1484
1485         if (r == KVM_MSR_RET_INVALID) {
1486                 /* Unconditionally clear the output for simplicity */
1487                 *data = 0;
1488                 if (kvm_msr_ignored_check(index, 0, false))
1489                         r = 0;
1490         }
1491
1492         if (r)
1493                 return r;
1494
1495         *data = msr.data;
1496
1497         return 0;
1498 }
1499
1500 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1501 {
1502         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1503                 return false;
1504
1505         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1506                 return false;
1507
1508         if (efer & (EFER_LME | EFER_LMA) &&
1509             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1510                 return false;
1511
1512         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1513                 return false;
1514
1515         return true;
1516
1517 }
1518 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1519 {
1520         if (efer & efer_reserved_bits)
1521                 return false;
1522
1523         return __kvm_valid_efer(vcpu, efer);
1524 }
1525 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1526
1527 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1528 {
1529         u64 old_efer = vcpu->arch.efer;
1530         u64 efer = msr_info->data;
1531         int r;
1532
1533         if (efer & efer_reserved_bits)
1534                 return 1;
1535
1536         if (!msr_info->host_initiated) {
1537                 if (!__kvm_valid_efer(vcpu, efer))
1538                         return 1;
1539
1540                 if (is_paging(vcpu) &&
1541                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1542                         return 1;
1543         }
1544
1545         efer &= ~EFER_LMA;
1546         efer |= vcpu->arch.efer & EFER_LMA;
1547
1548         r = static_call(kvm_x86_set_efer)(vcpu, efer);
1549         if (r) {
1550                 WARN_ON(r > 0);
1551                 return r;
1552         }
1553
1554         /* Update reserved bits */
1555         if ((efer ^ old_efer) & EFER_NX)
1556                 kvm_mmu_reset_context(vcpu);
1557
1558         return 0;
1559 }
1560
1561 void kvm_enable_efer_bits(u64 mask)
1562 {
1563        efer_reserved_bits &= ~mask;
1564 }
1565 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1566
1567 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type)
1568 {
1569         struct kvm_x86_msr_filter *msr_filter;
1570         struct msr_bitmap_range *ranges;
1571         struct kvm *kvm = vcpu->kvm;
1572         bool allowed;
1573         int idx;
1574         u32 i;
1575
1576         /* x2APIC MSRs do not support filtering. */
1577         if (index >= 0x800 && index <= 0x8ff)
1578                 return true;
1579
1580         idx = srcu_read_lock(&kvm->srcu);
1581
1582         msr_filter = srcu_dereference(kvm->arch.msr_filter, &kvm->srcu);
1583         if (!msr_filter) {
1584                 allowed = true;
1585                 goto out;
1586         }
1587
1588         allowed = msr_filter->default_allow;
1589         ranges = msr_filter->ranges;
1590
1591         for (i = 0; i < msr_filter->count; i++) {
1592                 u32 start = ranges[i].base;
1593                 u32 end = start + ranges[i].nmsrs;
1594                 u32 flags = ranges[i].flags;
1595                 unsigned long *bitmap = ranges[i].bitmap;
1596
1597                 if ((index >= start) && (index < end) && (flags & type)) {
1598                         allowed = !!test_bit(index - start, bitmap);
1599                         break;
1600                 }
1601         }
1602
1603 out:
1604         srcu_read_unlock(&kvm->srcu, idx);
1605
1606         return allowed;
1607 }
1608 EXPORT_SYMBOL_GPL(kvm_msr_allowed);
1609
1610 /*
1611  * Write @data into the MSR specified by @index.  Select MSR specific fault
1612  * checks are bypassed if @host_initiated is %true.
1613  * Returns 0 on success, non-0 otherwise.
1614  * Assumes vcpu_load() was already called.
1615  */
1616 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1617                          bool host_initiated)
1618 {
1619         struct msr_data msr;
1620
1621         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_WRITE))
1622                 return KVM_MSR_RET_FILTERED;
1623
1624         switch (index) {
1625         case MSR_FS_BASE:
1626         case MSR_GS_BASE:
1627         case MSR_KERNEL_GS_BASE:
1628         case MSR_CSTAR:
1629         case MSR_LSTAR:
1630                 if (is_noncanonical_address(data, vcpu))
1631                         return 1;
1632                 break;
1633         case MSR_IA32_SYSENTER_EIP:
1634         case MSR_IA32_SYSENTER_ESP:
1635                 /*
1636                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1637                  * non-canonical address is written on Intel but not on
1638                  * AMD (which ignores the top 32-bits, because it does
1639                  * not implement 64-bit SYSENTER).
1640                  *
1641                  * 64-bit code should hence be able to write a non-canonical
1642                  * value on AMD.  Making the address canonical ensures that
1643                  * vmentry does not fail on Intel after writing a non-canonical
1644                  * value, and that something deterministic happens if the guest
1645                  * invokes 64-bit SYSENTER.
1646                  */
1647                 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1648                 break;
1649         case MSR_TSC_AUX:
1650                 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1651                         return 1;
1652
1653                 if (!host_initiated &&
1654                     !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1655                     !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1656                         return 1;
1657
1658                 /*
1659                  * Per Intel's SDM, bits 63:32 are reserved, but AMD's APM has
1660                  * incomplete and conflicting architectural behavior.  Current
1661                  * AMD CPUs completely ignore bits 63:32, i.e. they aren't
1662                  * reserved and always read as zeros.  Enforce Intel's reserved
1663                  * bits check if and only if the guest CPU is Intel, and clear
1664                  * the bits in all other cases.  This ensures cross-vendor
1665                  * migration will provide consistent behavior for the guest.
1666                  */
1667                 if (guest_cpuid_is_intel(vcpu) && (data >> 32) != 0)
1668                         return 1;
1669
1670                 data = (u32)data;
1671                 break;
1672         }
1673
1674         msr.data = data;
1675         msr.index = index;
1676         msr.host_initiated = host_initiated;
1677
1678         return static_call(kvm_x86_set_msr)(vcpu, &msr);
1679 }
1680
1681 static int kvm_set_msr_ignored_check(struct kvm_vcpu *vcpu,
1682                                      u32 index, u64 data, bool host_initiated)
1683 {
1684         int ret = __kvm_set_msr(vcpu, index, data, host_initiated);
1685
1686         if (ret == KVM_MSR_RET_INVALID)
1687                 if (kvm_msr_ignored_check(index, data, true))
1688                         ret = 0;
1689
1690         return ret;
1691 }
1692
1693 /*
1694  * Read the MSR specified by @index into @data.  Select MSR specific fault
1695  * checks are bypassed if @host_initiated is %true.
1696  * Returns 0 on success, non-0 otherwise.
1697  * Assumes vcpu_load() was already called.
1698  */
1699 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1700                   bool host_initiated)
1701 {
1702         struct msr_data msr;
1703         int ret;
1704
1705         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_READ))
1706                 return KVM_MSR_RET_FILTERED;
1707
1708         switch (index) {
1709         case MSR_TSC_AUX:
1710                 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1711                         return 1;
1712
1713                 if (!host_initiated &&
1714                     !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1715                     !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1716                         return 1;
1717                 break;
1718         }
1719
1720         msr.index = index;
1721         msr.host_initiated = host_initiated;
1722
1723         ret = static_call(kvm_x86_get_msr)(vcpu, &msr);
1724         if (!ret)
1725                 *data = msr.data;
1726         return ret;
1727 }
1728
1729 static int kvm_get_msr_ignored_check(struct kvm_vcpu *vcpu,
1730                                      u32 index, u64 *data, bool host_initiated)
1731 {
1732         int ret = __kvm_get_msr(vcpu, index, data, host_initiated);
1733
1734         if (ret == KVM_MSR_RET_INVALID) {
1735                 /* Unconditionally clear *data for simplicity */
1736                 *data = 0;
1737                 if (kvm_msr_ignored_check(index, 0, false))
1738                         ret = 0;
1739         }
1740
1741         return ret;
1742 }
1743
1744 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1745 {
1746         return kvm_get_msr_ignored_check(vcpu, index, data, false);
1747 }
1748 EXPORT_SYMBOL_GPL(kvm_get_msr);
1749
1750 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1751 {
1752         return kvm_set_msr_ignored_check(vcpu, index, data, false);
1753 }
1754 EXPORT_SYMBOL_GPL(kvm_set_msr);
1755
1756 static int complete_emulated_rdmsr(struct kvm_vcpu *vcpu)
1757 {
1758         int err = vcpu->run->msr.error;
1759         if (!err) {
1760                 kvm_rax_write(vcpu, (u32)vcpu->run->msr.data);
1761                 kvm_rdx_write(vcpu, vcpu->run->msr.data >> 32);
1762         }
1763
1764         return static_call(kvm_x86_complete_emulated_msr)(vcpu, err);
1765 }
1766
1767 static int complete_emulated_wrmsr(struct kvm_vcpu *vcpu)
1768 {
1769         return static_call(kvm_x86_complete_emulated_msr)(vcpu, vcpu->run->msr.error);
1770 }
1771
1772 static u64 kvm_msr_reason(int r)
1773 {
1774         switch (r) {
1775         case KVM_MSR_RET_INVALID:
1776                 return KVM_MSR_EXIT_REASON_UNKNOWN;
1777         case KVM_MSR_RET_FILTERED:
1778                 return KVM_MSR_EXIT_REASON_FILTER;
1779         default:
1780                 return KVM_MSR_EXIT_REASON_INVAL;
1781         }
1782 }
1783
1784 static int kvm_msr_user_space(struct kvm_vcpu *vcpu, u32 index,
1785                               u32 exit_reason, u64 data,
1786                               int (*completion)(struct kvm_vcpu *vcpu),
1787                               int r)
1788 {
1789         u64 msr_reason = kvm_msr_reason(r);
1790
1791         /* Check if the user wanted to know about this MSR fault */
1792         if (!(vcpu->kvm->arch.user_space_msr_mask & msr_reason))
1793                 return 0;
1794
1795         vcpu->run->exit_reason = exit_reason;
1796         vcpu->run->msr.error = 0;
1797         memset(vcpu->run->msr.pad, 0, sizeof(vcpu->run->msr.pad));
1798         vcpu->run->msr.reason = msr_reason;
1799         vcpu->run->msr.index = index;
1800         vcpu->run->msr.data = data;
1801         vcpu->arch.complete_userspace_io = completion;
1802
1803         return 1;
1804 }
1805
1806 static int kvm_get_msr_user_space(struct kvm_vcpu *vcpu, u32 index, int r)
1807 {
1808         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_RDMSR, 0,
1809                                    complete_emulated_rdmsr, r);
1810 }
1811
1812 static int kvm_set_msr_user_space(struct kvm_vcpu *vcpu, u32 index, u64 data, int r)
1813 {
1814         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_WRMSR, data,
1815                                    complete_emulated_wrmsr, r);
1816 }
1817
1818 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1819 {
1820         u32 ecx = kvm_rcx_read(vcpu);
1821         u64 data;
1822         int r;
1823
1824         r = kvm_get_msr(vcpu, ecx, &data);
1825
1826         /* MSR read failed? See if we should ask user space */
1827         if (r && kvm_get_msr_user_space(vcpu, ecx, r)) {
1828                 /* Bounce to user space */
1829                 return 0;
1830         }
1831
1832         if (!r) {
1833                 trace_kvm_msr_read(ecx, data);
1834
1835                 kvm_rax_write(vcpu, data & -1u);
1836                 kvm_rdx_write(vcpu, (data >> 32) & -1u);
1837         } else {
1838                 trace_kvm_msr_read_ex(ecx);
1839         }
1840
1841         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1842 }
1843 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1844
1845 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1846 {
1847         u32 ecx = kvm_rcx_read(vcpu);
1848         u64 data = kvm_read_edx_eax(vcpu);
1849         int r;
1850
1851         r = kvm_set_msr(vcpu, ecx, data);
1852
1853         /* MSR write failed? See if we should ask user space */
1854         if (r && kvm_set_msr_user_space(vcpu, ecx, data, r))
1855                 /* Bounce to user space */
1856                 return 0;
1857
1858         /* Signal all other negative errors to userspace */
1859         if (r < 0)
1860                 return r;
1861
1862         if (!r)
1863                 trace_kvm_msr_write(ecx, data);
1864         else
1865                 trace_kvm_msr_write_ex(ecx, data);
1866
1867         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1868 }
1869 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1870
1871 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu)
1872 {
1873         return kvm_skip_emulated_instruction(vcpu);
1874 }
1875 EXPORT_SYMBOL_GPL(kvm_emulate_as_nop);
1876
1877 int kvm_emulate_invd(struct kvm_vcpu *vcpu)
1878 {
1879         /* Treat an INVD instruction as a NOP and just skip it. */
1880         return kvm_emulate_as_nop(vcpu);
1881 }
1882 EXPORT_SYMBOL_GPL(kvm_emulate_invd);
1883
1884 int kvm_emulate_mwait(struct kvm_vcpu *vcpu)
1885 {
1886         pr_warn_once("kvm: MWAIT instruction emulated as NOP!\n");
1887         return kvm_emulate_as_nop(vcpu);
1888 }
1889 EXPORT_SYMBOL_GPL(kvm_emulate_mwait);
1890
1891 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu)
1892 {
1893         kvm_queue_exception(vcpu, UD_VECTOR);
1894         return 1;
1895 }
1896 EXPORT_SYMBOL_GPL(kvm_handle_invalid_op);
1897
1898 int kvm_emulate_monitor(struct kvm_vcpu *vcpu)
1899 {
1900         pr_warn_once("kvm: MONITOR instruction emulated as NOP!\n");
1901         return kvm_emulate_as_nop(vcpu);
1902 }
1903 EXPORT_SYMBOL_GPL(kvm_emulate_monitor);
1904
1905 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu)
1906 {
1907         xfer_to_guest_mode_prepare();
1908         return vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu) ||
1909                 xfer_to_guest_mode_work_pending();
1910 }
1911
1912 /*
1913  * The fast path for frequent and performance sensitive wrmsr emulation,
1914  * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
1915  * the latency of virtual IPI by avoiding the expensive bits of transitioning
1916  * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
1917  * other cases which must be called after interrupts are enabled on the host.
1918  */
1919 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
1920 {
1921         if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic))
1922                 return 1;
1923
1924         if (((data & APIC_SHORT_MASK) == APIC_DEST_NOSHORT) &&
1925                 ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
1926                 ((data & APIC_MODE_MASK) == APIC_DM_FIXED) &&
1927                 ((u32)(data >> 32) != X2APIC_BROADCAST)) {
1928
1929                 data &= ~(1 << 12);
1930                 kvm_apic_send_ipi(vcpu->arch.apic, (u32)data, (u32)(data >> 32));
1931                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR2, (u32)(data >> 32));
1932                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR, (u32)data);
1933                 trace_kvm_apic_write(APIC_ICR, (u32)data);
1934                 return 0;
1935         }
1936
1937         return 1;
1938 }
1939
1940 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
1941 {
1942         if (!kvm_can_use_hv_timer(vcpu))
1943                 return 1;
1944
1945         kvm_set_lapic_tscdeadline_msr(vcpu, data);
1946         return 0;
1947 }
1948
1949 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
1950 {
1951         u32 msr = kvm_rcx_read(vcpu);
1952         u64 data;
1953         fastpath_t ret = EXIT_FASTPATH_NONE;
1954
1955         switch (msr) {
1956         case APIC_BASE_MSR + (APIC_ICR >> 4):
1957                 data = kvm_read_edx_eax(vcpu);
1958                 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu, data)) {
1959                         kvm_skip_emulated_instruction(vcpu);
1960                         ret = EXIT_FASTPATH_EXIT_HANDLED;
1961                 }
1962                 break;
1963         case MSR_IA32_TSC_DEADLINE:
1964                 data = kvm_read_edx_eax(vcpu);
1965                 if (!handle_fastpath_set_tscdeadline(vcpu, data)) {
1966                         kvm_skip_emulated_instruction(vcpu);
1967                         ret = EXIT_FASTPATH_REENTER_GUEST;
1968                 }
1969                 break;
1970         default:
1971                 break;
1972         }
1973
1974         if (ret != EXIT_FASTPATH_NONE)
1975                 trace_kvm_msr_write(msr, data);
1976
1977         return ret;
1978 }
1979 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
1980
1981 /*
1982  * Adapt set_msr() to msr_io()'s calling convention
1983  */
1984 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1985 {
1986         return kvm_get_msr_ignored_check(vcpu, index, data, true);
1987 }
1988
1989 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1990 {
1991         return kvm_set_msr_ignored_check(vcpu, index, *data, true);
1992 }
1993
1994 #ifdef CONFIG_X86_64
1995 struct pvclock_clock {
1996         int vclock_mode;
1997         u64 cycle_last;
1998         u64 mask;
1999         u32 mult;
2000         u32 shift;
2001         u64 base_cycles;
2002         u64 offset;
2003 };
2004
2005 struct pvclock_gtod_data {
2006         seqcount_t      seq;
2007
2008         struct pvclock_clock clock; /* extract of a clocksource struct */
2009         struct pvclock_clock raw_clock; /* extract of a clocksource struct */
2010
2011         ktime_t         offs_boot;
2012         u64             wall_time_sec;
2013 };
2014
2015 static struct pvclock_gtod_data pvclock_gtod_data;
2016
2017 static void update_pvclock_gtod(struct timekeeper *tk)
2018 {
2019         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
2020
2021         write_seqcount_begin(&vdata->seq);
2022
2023         /* copy pvclock gtod data */
2024         vdata->clock.vclock_mode        = tk->tkr_mono.clock->vdso_clock_mode;
2025         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
2026         vdata->clock.mask               = tk->tkr_mono.mask;
2027         vdata->clock.mult               = tk->tkr_mono.mult;
2028         vdata->clock.shift              = tk->tkr_mono.shift;
2029         vdata->clock.base_cycles        = tk->tkr_mono.xtime_nsec;
2030         vdata->clock.offset             = tk->tkr_mono.base;
2031
2032         vdata->raw_clock.vclock_mode    = tk->tkr_raw.clock->vdso_clock_mode;
2033         vdata->raw_clock.cycle_last     = tk->tkr_raw.cycle_last;
2034         vdata->raw_clock.mask           = tk->tkr_raw.mask;
2035         vdata->raw_clock.mult           = tk->tkr_raw.mult;
2036         vdata->raw_clock.shift          = tk->tkr_raw.shift;
2037         vdata->raw_clock.base_cycles    = tk->tkr_raw.xtime_nsec;
2038         vdata->raw_clock.offset         = tk->tkr_raw.base;
2039
2040         vdata->wall_time_sec            = tk->xtime_sec;
2041
2042         vdata->offs_boot                = tk->offs_boot;
2043
2044         write_seqcount_end(&vdata->seq);
2045 }
2046
2047 static s64 get_kvmclock_base_ns(void)
2048 {
2049         /* Count up from boot time, but with the frequency of the raw clock.  */
2050         return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot));
2051 }
2052 #else
2053 static s64 get_kvmclock_base_ns(void)
2054 {
2055         /* Master clock not used, so we can just use CLOCK_BOOTTIME.  */
2056         return ktime_get_boottime_ns();
2057 }
2058 #endif
2059
2060 void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock, int sec_hi_ofs)
2061 {
2062         int version;
2063         int r;
2064         struct pvclock_wall_clock wc;
2065         u32 wc_sec_hi;
2066         u64 wall_nsec;
2067
2068         if (!wall_clock)
2069                 return;
2070
2071         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
2072         if (r)
2073                 return;
2074
2075         if (version & 1)
2076                 ++version;  /* first time write, random junk */
2077
2078         ++version;
2079
2080         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
2081                 return;
2082
2083         /*
2084          * The guest calculates current wall clock time by adding
2085          * system time (updated by kvm_guest_time_update below) to the
2086          * wall clock specified here.  We do the reverse here.
2087          */
2088         wall_nsec = ktime_get_real_ns() - get_kvmclock_ns(kvm);
2089
2090         wc.nsec = do_div(wall_nsec, 1000000000);
2091         wc.sec = (u32)wall_nsec; /* overflow in 2106 guest time */
2092         wc.version = version;
2093
2094         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
2095
2096         if (sec_hi_ofs) {
2097                 wc_sec_hi = wall_nsec >> 32;
2098                 kvm_write_guest(kvm, wall_clock + sec_hi_ofs,
2099                                 &wc_sec_hi, sizeof(wc_sec_hi));
2100         }
2101
2102         version++;
2103         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
2104 }
2105
2106 static void kvm_write_system_time(struct kvm_vcpu *vcpu, gpa_t system_time,
2107                                   bool old_msr, bool host_initiated)
2108 {
2109         struct kvm_arch *ka = &vcpu->kvm->arch;
2110
2111         if (vcpu->vcpu_id == 0 && !host_initiated) {
2112                 if (ka->boot_vcpu_runs_old_kvmclock != old_msr)
2113                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2114
2115                 ka->boot_vcpu_runs_old_kvmclock = old_msr;
2116         }
2117
2118         vcpu->arch.time = system_time;
2119         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2120
2121         /* we verify if the enable bit is set... */
2122         vcpu->arch.pv_time_enabled = false;
2123         if (!(system_time & 1))
2124                 return;
2125
2126         if (!kvm_gfn_to_hva_cache_init(vcpu->kvm,
2127                                        &vcpu->arch.pv_time, system_time & ~1ULL,
2128                                        sizeof(struct pvclock_vcpu_time_info)))
2129                 vcpu->arch.pv_time_enabled = true;
2130
2131         return;
2132 }
2133
2134 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
2135 {
2136         do_shl32_div32(dividend, divisor);
2137         return dividend;
2138 }
2139
2140 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
2141                                s8 *pshift, u32 *pmultiplier)
2142 {
2143         uint64_t scaled64;
2144         int32_t  shift = 0;
2145         uint64_t tps64;
2146         uint32_t tps32;
2147
2148         tps64 = base_hz;
2149         scaled64 = scaled_hz;
2150         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
2151                 tps64 >>= 1;
2152                 shift--;
2153         }
2154
2155         tps32 = (uint32_t)tps64;
2156         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
2157                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
2158                         scaled64 >>= 1;
2159                 else
2160                         tps32 <<= 1;
2161                 shift++;
2162         }
2163
2164         *pshift = shift;
2165         *pmultiplier = div_frac(scaled64, tps32);
2166 }
2167
2168 #ifdef CONFIG_X86_64
2169 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
2170 #endif
2171
2172 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
2173 static unsigned long max_tsc_khz;
2174
2175 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
2176 {
2177         u64 v = (u64)khz * (1000000 + ppm);
2178         do_div(v, 1000000);
2179         return v;
2180 }
2181
2182 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier);
2183
2184 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
2185 {
2186         u64 ratio;
2187
2188         /* Guest TSC same frequency as host TSC? */
2189         if (!scale) {
2190                 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2191                 return 0;
2192         }
2193
2194         /* TSC scaling supported? */
2195         if (!kvm_has_tsc_control) {
2196                 if (user_tsc_khz > tsc_khz) {
2197                         vcpu->arch.tsc_catchup = 1;
2198                         vcpu->arch.tsc_always_catchup = 1;
2199                         return 0;
2200                 } else {
2201                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2202                         return -1;
2203                 }
2204         }
2205
2206         /* TSC scaling required  - calculate ratio */
2207         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
2208                                 user_tsc_khz, tsc_khz);
2209
2210         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
2211                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2212                                     user_tsc_khz);
2213                 return -1;
2214         }
2215
2216         kvm_vcpu_write_tsc_multiplier(vcpu, ratio);
2217         return 0;
2218 }
2219
2220 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
2221 {
2222         u32 thresh_lo, thresh_hi;
2223         int use_scaling = 0;
2224
2225         /* tsc_khz can be zero if TSC calibration fails */
2226         if (user_tsc_khz == 0) {
2227                 /* set tsc_scaling_ratio to a safe value */
2228                 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2229                 return -1;
2230         }
2231
2232         /* Compute a scale to convert nanoseconds in TSC cycles */
2233         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
2234                            &vcpu->arch.virtual_tsc_shift,
2235                            &vcpu->arch.virtual_tsc_mult);
2236         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
2237
2238         /*
2239          * Compute the variation in TSC rate which is acceptable
2240          * within the range of tolerance and decide if the
2241          * rate being applied is within that bounds of the hardware
2242          * rate.  If so, no scaling or compensation need be done.
2243          */
2244         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
2245         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
2246         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
2247                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
2248                 use_scaling = 1;
2249         }
2250         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
2251 }
2252
2253 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
2254 {
2255         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
2256                                       vcpu->arch.virtual_tsc_mult,
2257                                       vcpu->arch.virtual_tsc_shift);
2258         tsc += vcpu->arch.this_tsc_write;
2259         return tsc;
2260 }
2261
2262 static inline int gtod_is_based_on_tsc(int mode)
2263 {
2264         return mode == VDSO_CLOCKMODE_TSC || mode == VDSO_CLOCKMODE_HVCLOCK;
2265 }
2266
2267 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
2268 {
2269 #ifdef CONFIG_X86_64
2270         bool vcpus_matched;
2271         struct kvm_arch *ka = &vcpu->kvm->arch;
2272         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2273
2274         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2275                          atomic_read(&vcpu->kvm->online_vcpus));
2276
2277         /*
2278          * Once the masterclock is enabled, always perform request in
2279          * order to update it.
2280          *
2281          * In order to enable masterclock, the host clocksource must be TSC
2282          * and the vcpus need to have matched TSCs.  When that happens,
2283          * perform request to enable masterclock.
2284          */
2285         if (ka->use_master_clock ||
2286             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
2287                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2288
2289         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
2290                             atomic_read(&vcpu->kvm->online_vcpus),
2291                             ka->use_master_clock, gtod->clock.vclock_mode);
2292 #endif
2293 }
2294
2295 /*
2296  * Multiply tsc by a fixed point number represented by ratio.
2297  *
2298  * The most significant 64-N bits (mult) of ratio represent the
2299  * integral part of the fixed point number; the remaining N bits
2300  * (frac) represent the fractional part, ie. ratio represents a fixed
2301  * point number (mult + frac * 2^(-N)).
2302  *
2303  * N equals to kvm_tsc_scaling_ratio_frac_bits.
2304  */
2305 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
2306 {
2307         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
2308 }
2309
2310 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc, u64 ratio)
2311 {
2312         u64 _tsc = tsc;
2313
2314         if (ratio != kvm_default_tsc_scaling_ratio)
2315                 _tsc = __scale_tsc(ratio, tsc);
2316
2317         return _tsc;
2318 }
2319 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
2320
2321 static u64 kvm_compute_l1_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
2322 {
2323         u64 tsc;
2324
2325         tsc = kvm_scale_tsc(vcpu, rdtsc(), vcpu->arch.l1_tsc_scaling_ratio);
2326
2327         return target_tsc - tsc;
2328 }
2329
2330 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
2331 {
2332         return vcpu->arch.l1_tsc_offset +
2333                 kvm_scale_tsc(vcpu, host_tsc, vcpu->arch.l1_tsc_scaling_ratio);
2334 }
2335 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
2336
2337 u64 kvm_calc_nested_tsc_offset(u64 l1_offset, u64 l2_offset, u64 l2_multiplier)
2338 {
2339         u64 nested_offset;
2340
2341         if (l2_multiplier == kvm_default_tsc_scaling_ratio)
2342                 nested_offset = l1_offset;
2343         else
2344                 nested_offset = mul_s64_u64_shr((s64) l1_offset, l2_multiplier,
2345                                                 kvm_tsc_scaling_ratio_frac_bits);
2346
2347         nested_offset += l2_offset;
2348         return nested_offset;
2349 }
2350 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_offset);
2351
2352 u64 kvm_calc_nested_tsc_multiplier(u64 l1_multiplier, u64 l2_multiplier)
2353 {
2354         if (l2_multiplier != kvm_default_tsc_scaling_ratio)
2355                 return mul_u64_u64_shr(l1_multiplier, l2_multiplier,
2356                                        kvm_tsc_scaling_ratio_frac_bits);
2357
2358         return l1_multiplier;
2359 }
2360 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_multiplier);
2361
2362 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 l1_offset)
2363 {
2364         trace_kvm_write_tsc_offset(vcpu->vcpu_id,
2365                                    vcpu->arch.l1_tsc_offset,
2366                                    l1_offset);
2367
2368         vcpu->arch.l1_tsc_offset = l1_offset;
2369
2370         /*
2371          * If we are here because L1 chose not to trap WRMSR to TSC then
2372          * according to the spec this should set L1's TSC (as opposed to
2373          * setting L1's offset for L2).
2374          */
2375         if (is_guest_mode(vcpu))
2376                 vcpu->arch.tsc_offset = kvm_calc_nested_tsc_offset(
2377                         l1_offset,
2378                         static_call(kvm_x86_get_l2_tsc_offset)(vcpu),
2379                         static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2380         else
2381                 vcpu->arch.tsc_offset = l1_offset;
2382
2383         static_call(kvm_x86_write_tsc_offset)(vcpu, vcpu->arch.tsc_offset);
2384 }
2385
2386 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier)
2387 {
2388         vcpu->arch.l1_tsc_scaling_ratio = l1_multiplier;
2389
2390         /* Userspace is changing the multiplier while L2 is active */
2391         if (is_guest_mode(vcpu))
2392                 vcpu->arch.tsc_scaling_ratio = kvm_calc_nested_tsc_multiplier(
2393                         l1_multiplier,
2394                         static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2395         else
2396                 vcpu->arch.tsc_scaling_ratio = l1_multiplier;
2397
2398         if (kvm_has_tsc_control)
2399                 static_call(kvm_x86_write_tsc_multiplier)(
2400                         vcpu, vcpu->arch.tsc_scaling_ratio);
2401 }
2402
2403 static inline bool kvm_check_tsc_unstable(void)
2404 {
2405 #ifdef CONFIG_X86_64
2406         /*
2407          * TSC is marked unstable when we're running on Hyper-V,
2408          * 'TSC page' clocksource is good.
2409          */
2410         if (pvclock_gtod_data.clock.vclock_mode == VDSO_CLOCKMODE_HVCLOCK)
2411                 return false;
2412 #endif
2413         return check_tsc_unstable();
2414 }
2415
2416 static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 data)
2417 {
2418         struct kvm *kvm = vcpu->kvm;
2419         u64 offset, ns, elapsed;
2420         unsigned long flags;
2421         bool matched;
2422         bool already_matched;
2423         bool synchronizing = false;
2424
2425         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
2426         offset = kvm_compute_l1_tsc_offset(vcpu, data);
2427         ns = get_kvmclock_base_ns();
2428         elapsed = ns - kvm->arch.last_tsc_nsec;
2429
2430         if (vcpu->arch.virtual_tsc_khz) {
2431                 if (data == 0) {
2432                         /*
2433                          * detection of vcpu initialization -- need to sync
2434                          * with other vCPUs. This particularly helps to keep
2435                          * kvm_clock stable after CPU hotplug
2436                          */
2437                         synchronizing = true;
2438                 } else {
2439                         u64 tsc_exp = kvm->arch.last_tsc_write +
2440                                                 nsec_to_cycles(vcpu, elapsed);
2441                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
2442                         /*
2443                          * Special case: TSC write with a small delta (1 second)
2444                          * of virtual cycle time against real time is
2445                          * interpreted as an attempt to synchronize the CPU.
2446                          */
2447                         synchronizing = data < tsc_exp + tsc_hz &&
2448                                         data + tsc_hz > tsc_exp;
2449                 }
2450         }
2451
2452         /*
2453          * For a reliable TSC, we can match TSC offsets, and for an unstable
2454          * TSC, we add elapsed time in this computation.  We could let the
2455          * compensation code attempt to catch up if we fall behind, but
2456          * it's better to try to match offsets from the beginning.
2457          */
2458         if (synchronizing &&
2459             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
2460                 if (!kvm_check_tsc_unstable()) {
2461                         offset = kvm->arch.cur_tsc_offset;
2462                 } else {
2463                         u64 delta = nsec_to_cycles(vcpu, elapsed);
2464                         data += delta;
2465                         offset = kvm_compute_l1_tsc_offset(vcpu, data);
2466                 }
2467                 matched = true;
2468                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
2469         } else {
2470                 /*
2471                  * We split periods of matched TSC writes into generations.
2472                  * For each generation, we track the original measured
2473                  * nanosecond time, offset, and write, so if TSCs are in
2474                  * sync, we can match exact offset, and if not, we can match
2475                  * exact software computation in compute_guest_tsc()
2476                  *
2477                  * These values are tracked in kvm->arch.cur_xxx variables.
2478                  */
2479                 kvm->arch.cur_tsc_generation++;
2480                 kvm->arch.cur_tsc_nsec = ns;
2481                 kvm->arch.cur_tsc_write = data;
2482                 kvm->arch.cur_tsc_offset = offset;
2483                 matched = false;
2484         }
2485
2486         /*
2487          * We also track th most recent recorded KHZ, write and time to
2488          * allow the matching interval to be extended at each write.
2489          */
2490         kvm->arch.last_tsc_nsec = ns;
2491         kvm->arch.last_tsc_write = data;
2492         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2493
2494         vcpu->arch.last_guest_tsc = data;
2495
2496         /* Keep track of which generation this VCPU has synchronized to */
2497         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2498         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2499         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2500
2501         kvm_vcpu_write_tsc_offset(vcpu, offset);
2502         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2503
2504         spin_lock_irqsave(&kvm->arch.pvclock_gtod_sync_lock, flags);
2505         if (!matched) {
2506                 kvm->arch.nr_vcpus_matched_tsc = 0;
2507         } else if (!already_matched) {
2508                 kvm->arch.nr_vcpus_matched_tsc++;
2509         }
2510
2511         kvm_track_tsc_matching(vcpu);
2512         spin_unlock_irqrestore(&kvm->arch.pvclock_gtod_sync_lock, flags);
2513 }
2514
2515 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2516                                            s64 adjustment)
2517 {
2518         u64 tsc_offset = vcpu->arch.l1_tsc_offset;
2519         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2520 }
2521
2522 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2523 {
2524         if (vcpu->arch.l1_tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
2525                 WARN_ON(adjustment < 0);
2526         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment,
2527                                    vcpu->arch.l1_tsc_scaling_ratio);
2528         adjust_tsc_offset_guest(vcpu, adjustment);
2529 }
2530
2531 #ifdef CONFIG_X86_64
2532
2533 static u64 read_tsc(void)
2534 {
2535         u64 ret = (u64)rdtsc_ordered();
2536         u64 last = pvclock_gtod_data.clock.cycle_last;
2537
2538         if (likely(ret >= last))
2539                 return ret;
2540
2541         /*
2542          * GCC likes to generate cmov here, but this branch is extremely
2543          * predictable (it's just a function of time and the likely is
2544          * very likely) and there's a data dependence, so force GCC
2545          * to generate a branch instead.  I don't barrier() because
2546          * we don't actually need a barrier, and if this function
2547          * ever gets inlined it will generate worse code.
2548          */
2549         asm volatile ("");
2550         return last;
2551 }
2552
2553 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2554                           int *mode)
2555 {
2556         long v;
2557         u64 tsc_pg_val;
2558
2559         switch (clock->vclock_mode) {
2560         case VDSO_CLOCKMODE_HVCLOCK:
2561                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2562                                                   tsc_timestamp);
2563                 if (tsc_pg_val != U64_MAX) {
2564                         /* TSC page valid */
2565                         *mode = VDSO_CLOCKMODE_HVCLOCK;
2566                         v = (tsc_pg_val - clock->cycle_last) &
2567                                 clock->mask;
2568                 } else {
2569                         /* TSC page invalid */
2570                         *mode = VDSO_CLOCKMODE_NONE;
2571                 }
2572                 break;
2573         case VDSO_CLOCKMODE_TSC:
2574                 *mode = VDSO_CLOCKMODE_TSC;
2575                 *tsc_timestamp = read_tsc();
2576                 v = (*tsc_timestamp - clock->cycle_last) &
2577                         clock->mask;
2578                 break;
2579         default:
2580                 *mode = VDSO_CLOCKMODE_NONE;
2581         }
2582
2583         if (*mode == VDSO_CLOCKMODE_NONE)
2584                 *tsc_timestamp = v = 0;
2585
2586         return v * clock->mult;
2587 }
2588
2589 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2590 {
2591         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2592         unsigned long seq;
2593         int mode;
2594         u64 ns;
2595
2596         do {
2597                 seq = read_seqcount_begin(&gtod->seq);
2598                 ns = gtod->raw_clock.base_cycles;
2599                 ns += vgettsc(&gtod->raw_clock, tsc_timestamp, &mode);
2600                 ns >>= gtod->raw_clock.shift;
2601                 ns += ktime_to_ns(ktime_add(gtod->raw_clock.offset, gtod->offs_boot));
2602         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2603         *t = ns;
2604
2605         return mode;
2606 }
2607
2608 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2609 {
2610         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2611         unsigned long seq;
2612         int mode;
2613         u64 ns;
2614
2615         do {
2616                 seq = read_seqcount_begin(&gtod->seq);
2617                 ts->tv_sec = gtod->wall_time_sec;
2618                 ns = gtod->clock.base_cycles;
2619                 ns += vgettsc(&gtod->clock, tsc_timestamp, &mode);
2620                 ns >>= gtod->clock.shift;
2621         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2622
2623         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2624         ts->tv_nsec = ns;
2625
2626         return mode;
2627 }
2628
2629 /* returns true if host is using TSC based clocksource */
2630 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2631 {
2632         /* checked again under seqlock below */
2633         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2634                 return false;
2635
2636         return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2637                                                       tsc_timestamp));
2638 }
2639
2640 /* returns true if host is using TSC based clocksource */
2641 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2642                                            u64 *tsc_timestamp)
2643 {
2644         /* checked again under seqlock below */
2645         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2646                 return false;
2647
2648         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2649 }
2650 #endif
2651
2652 /*
2653  *
2654  * Assuming a stable TSC across physical CPUS, and a stable TSC
2655  * across virtual CPUs, the following condition is possible.
2656  * Each numbered line represents an event visible to both
2657  * CPUs at the next numbered event.
2658  *
2659  * "timespecX" represents host monotonic time. "tscX" represents
2660  * RDTSC value.
2661  *
2662  *              VCPU0 on CPU0           |       VCPU1 on CPU1
2663  *
2664  * 1.  read timespec0,tsc0
2665  * 2.                                   | timespec1 = timespec0 + N
2666  *                                      | tsc1 = tsc0 + M
2667  * 3. transition to guest               | transition to guest
2668  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2669  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2670  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2671  *
2672  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2673  *
2674  *      - ret0 < ret1
2675  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2676  *              ...
2677  *      - 0 < N - M => M < N
2678  *
2679  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2680  * always the case (the difference between two distinct xtime instances
2681  * might be smaller then the difference between corresponding TSC reads,
2682  * when updating guest vcpus pvclock areas).
2683  *
2684  * To avoid that problem, do not allow visibility of distinct
2685  * system_timestamp/tsc_timestamp values simultaneously: use a master
2686  * copy of host monotonic time values. Update that master copy
2687  * in lockstep.
2688  *
2689  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2690  *
2691  */
2692
2693 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2694 {
2695 #ifdef CONFIG_X86_64
2696         struct kvm_arch *ka = &kvm->arch;
2697         int vclock_mode;
2698         bool host_tsc_clocksource, vcpus_matched;
2699
2700         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2701                         atomic_read(&kvm->online_vcpus));
2702
2703         /*
2704          * If the host uses TSC clock, then passthrough TSC as stable
2705          * to the guest.
2706          */
2707         host_tsc_clocksource = kvm_get_time_and_clockread(
2708                                         &ka->master_kernel_ns,
2709                                         &ka->master_cycle_now);
2710
2711         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2712                                 && !ka->backwards_tsc_observed
2713                                 && !ka->boot_vcpu_runs_old_kvmclock;
2714
2715         if (ka->use_master_clock)
2716                 atomic_set(&kvm_guest_has_master_clock, 1);
2717
2718         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2719         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2720                                         vcpus_matched);
2721 #endif
2722 }
2723
2724 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2725 {
2726         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2727 }
2728
2729 static void kvm_gen_update_masterclock(struct kvm *kvm)
2730 {
2731 #ifdef CONFIG_X86_64
2732         int i;
2733         struct kvm_vcpu *vcpu;
2734         struct kvm_arch *ka = &kvm->arch;
2735         unsigned long flags;
2736
2737         kvm_hv_invalidate_tsc_page(kvm);
2738
2739         kvm_make_mclock_inprogress_request(kvm);
2740
2741         /* no guest entries from this point */
2742         spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2743         pvclock_update_vm_gtod_copy(kvm);
2744         spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2745
2746         kvm_for_each_vcpu(i, vcpu, kvm)
2747                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2748
2749         /* guest entries allowed */
2750         kvm_for_each_vcpu(i, vcpu, kvm)
2751                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2752 #endif
2753 }
2754
2755 u64 get_kvmclock_ns(struct kvm *kvm)
2756 {
2757         struct kvm_arch *ka = &kvm->arch;
2758         struct pvclock_vcpu_time_info hv_clock;
2759         unsigned long flags;
2760         u64 ret;
2761
2762         spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2763         if (!ka->use_master_clock) {
2764                 spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2765                 return get_kvmclock_base_ns() + ka->kvmclock_offset;
2766         }
2767
2768         hv_clock.tsc_timestamp = ka->master_cycle_now;
2769         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2770         spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2771
2772         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2773         get_cpu();
2774
2775         if (__this_cpu_read(cpu_tsc_khz)) {
2776                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2777                                    &hv_clock.tsc_shift,
2778                                    &hv_clock.tsc_to_system_mul);
2779                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2780         } else
2781                 ret = get_kvmclock_base_ns() + ka->kvmclock_offset;
2782
2783         put_cpu();
2784
2785         return ret;
2786 }
2787
2788 static void kvm_setup_pvclock_page(struct kvm_vcpu *v,
2789                                    struct gfn_to_hva_cache *cache,
2790                                    unsigned int offset)
2791 {
2792         struct kvm_vcpu_arch *vcpu = &v->arch;
2793         struct pvclock_vcpu_time_info guest_hv_clock;
2794
2795         if (unlikely(kvm_read_guest_offset_cached(v->kvm, cache,
2796                 &guest_hv_clock, offset, sizeof(guest_hv_clock))))
2797                 return;
2798
2799         /* This VCPU is paused, but it's legal for a guest to read another
2800          * VCPU's kvmclock, so we really have to follow the specification where
2801          * it says that version is odd if data is being modified, and even after
2802          * it is consistent.
2803          *
2804          * Version field updates must be kept separate.  This is because
2805          * kvm_write_guest_cached might use a "rep movs" instruction, and
2806          * writes within a string instruction are weakly ordered.  So there
2807          * are three writes overall.
2808          *
2809          * As a small optimization, only write the version field in the first
2810          * and third write.  The vcpu->pv_time cache is still valid, because the
2811          * version field is the first in the struct.
2812          */
2813         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2814
2815         if (guest_hv_clock.version & 1)
2816                 ++guest_hv_clock.version;  /* first time write, random junk */
2817
2818         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2819         kvm_write_guest_offset_cached(v->kvm, cache,
2820                                       &vcpu->hv_clock, offset,
2821                                       sizeof(vcpu->hv_clock.version));
2822
2823         smp_wmb();
2824
2825         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2826         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2827
2828         if (vcpu->pvclock_set_guest_stopped_request) {
2829                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2830                 vcpu->pvclock_set_guest_stopped_request = false;
2831         }
2832
2833         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2834
2835         kvm_write_guest_offset_cached(v->kvm, cache,
2836                                       &vcpu->hv_clock, offset,
2837                                       sizeof(vcpu->hv_clock));
2838
2839         smp_wmb();
2840
2841         vcpu->hv_clock.version++;
2842         kvm_write_guest_offset_cached(v->kvm, cache,
2843                                      &vcpu->hv_clock, offset,
2844                                      sizeof(vcpu->hv_clock.version));
2845 }
2846
2847 static int kvm_guest_time_update(struct kvm_vcpu *v)
2848 {
2849         unsigned long flags, tgt_tsc_khz;
2850         struct kvm_vcpu_arch *vcpu = &v->arch;
2851         struct kvm_arch *ka = &v->kvm->arch;
2852         s64 kernel_ns;
2853         u64 tsc_timestamp, host_tsc;
2854         u8 pvclock_flags;
2855         bool use_master_clock;
2856
2857         kernel_ns = 0;
2858         host_tsc = 0;
2859
2860         /*
2861          * If the host uses TSC clock, then passthrough TSC as stable
2862          * to the guest.
2863          */
2864         spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2865         use_master_clock = ka->use_master_clock;
2866         if (use_master_clock) {
2867                 host_tsc = ka->master_cycle_now;
2868                 kernel_ns = ka->master_kernel_ns;
2869         }
2870         spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2871
2872         /* Keep irq disabled to prevent changes to the clock */
2873         local_irq_save(flags);
2874         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2875         if (unlikely(tgt_tsc_khz == 0)) {
2876                 local_irq_restore(flags);
2877                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2878                 return 1;
2879         }
2880         if (!use_master_clock) {
2881                 host_tsc = rdtsc();
2882                 kernel_ns = get_kvmclock_base_ns();
2883         }
2884
2885         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2886
2887         /*
2888          * We may have to catch up the TSC to match elapsed wall clock
2889          * time for two reasons, even if kvmclock is used.
2890          *   1) CPU could have been running below the maximum TSC rate
2891          *   2) Broken TSC compensation resets the base at each VCPU
2892          *      entry to avoid unknown leaps of TSC even when running
2893          *      again on the same CPU.  This may cause apparent elapsed
2894          *      time to disappear, and the guest to stand still or run
2895          *      very slowly.
2896          */
2897         if (vcpu->tsc_catchup) {
2898                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2899                 if (tsc > tsc_timestamp) {
2900                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2901                         tsc_timestamp = tsc;
2902                 }
2903         }
2904
2905         local_irq_restore(flags);
2906
2907         /* With all the info we got, fill in the values */
2908
2909         if (kvm_has_tsc_control)
2910                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz,
2911                                             v->arch.l1_tsc_scaling_ratio);
2912
2913         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2914                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2915                                    &vcpu->hv_clock.tsc_shift,
2916                                    &vcpu->hv_clock.tsc_to_system_mul);
2917                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2918         }
2919
2920         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2921         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2922         vcpu->last_guest_tsc = tsc_timestamp;
2923
2924         /* If the host uses TSC clocksource, then it is stable */
2925         pvclock_flags = 0;
2926         if (use_master_clock)
2927                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2928
2929         vcpu->hv_clock.flags = pvclock_flags;
2930
2931         if (vcpu->pv_time_enabled)
2932                 kvm_setup_pvclock_page(v, &vcpu->pv_time, 0);
2933         if (vcpu->xen.vcpu_info_set)
2934                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_info_cache,
2935                                        offsetof(struct compat_vcpu_info, time));
2936         if (vcpu->xen.vcpu_time_info_set)
2937                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_time_info_cache, 0);
2938         if (v == kvm_get_vcpu(v->kvm, 0))
2939                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2940         return 0;
2941 }
2942
2943 /*
2944  * kvmclock updates which are isolated to a given vcpu, such as
2945  * vcpu->cpu migration, should not allow system_timestamp from
2946  * the rest of the vcpus to remain static. Otherwise ntp frequency
2947  * correction applies to one vcpu's system_timestamp but not
2948  * the others.
2949  *
2950  * So in those cases, request a kvmclock update for all vcpus.
2951  * We need to rate-limit these requests though, as they can
2952  * considerably slow guests that have a large number of vcpus.
2953  * The time for a remote vcpu to update its kvmclock is bound
2954  * by the delay we use to rate-limit the updates.
2955  */
2956
2957 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2958
2959 static void kvmclock_update_fn(struct work_struct *work)
2960 {
2961         int i;
2962         struct delayed_work *dwork = to_delayed_work(work);
2963         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2964                                            kvmclock_update_work);
2965         struct kvm *kvm = container_of(ka, struct kvm, arch);
2966         struct kvm_vcpu *vcpu;
2967
2968         kvm_for_each_vcpu(i, vcpu, kvm) {
2969                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2970                 kvm_vcpu_kick(vcpu);
2971         }
2972 }
2973
2974 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2975 {
2976         struct kvm *kvm = v->kvm;
2977
2978         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2979         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2980                                         KVMCLOCK_UPDATE_DELAY);
2981 }
2982
2983 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2984
2985 static void kvmclock_sync_fn(struct work_struct *work)
2986 {
2987         struct delayed_work *dwork = to_delayed_work(work);
2988         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2989                                            kvmclock_sync_work);
2990         struct kvm *kvm = container_of(ka, struct kvm, arch);
2991
2992         if (!kvmclock_periodic_sync)
2993                 return;
2994
2995         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2996         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2997                                         KVMCLOCK_SYNC_PERIOD);
2998 }
2999
3000 /*
3001  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
3002  */
3003 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
3004 {
3005         /* McStatusWrEn enabled? */
3006         if (guest_cpuid_is_amd_or_hygon(vcpu))
3007                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
3008
3009         return false;
3010 }
3011
3012 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3013 {
3014         u64 mcg_cap = vcpu->arch.mcg_cap;
3015         unsigned bank_num = mcg_cap & 0xff;
3016         u32 msr = msr_info->index;
3017         u64 data = msr_info->data;
3018
3019         switch (msr) {
3020         case MSR_IA32_MCG_STATUS:
3021                 vcpu->arch.mcg_status = data;
3022                 break;
3023         case MSR_IA32_MCG_CTL:
3024                 if (!(mcg_cap & MCG_CTL_P) &&
3025                     (data || !msr_info->host_initiated))
3026                         return 1;
3027                 if (data != 0 && data != ~(u64)0)
3028                         return 1;
3029                 vcpu->arch.mcg_ctl = data;
3030                 break;
3031         default:
3032                 if (msr >= MSR_IA32_MC0_CTL &&
3033                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3034                         u32 offset = array_index_nospec(
3035                                 msr - MSR_IA32_MC0_CTL,
3036                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3037
3038                         /* only 0 or all 1s can be written to IA32_MCi_CTL
3039                          * some Linux kernels though clear bit 10 in bank 4 to
3040                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
3041                          * this to avoid an uncatched #GP in the guest
3042                          */
3043                         if ((offset & 0x3) == 0 &&
3044                             data != 0 && (data | (1 << 10)) != ~(u64)0)
3045                                 return -1;
3046
3047                         /* MCi_STATUS */
3048                         if (!msr_info->host_initiated &&
3049                             (offset & 0x3) == 1 && data != 0) {
3050                                 if (!can_set_mci_status(vcpu))
3051                                         return -1;
3052                         }
3053
3054                         vcpu->arch.mce_banks[offset] = data;
3055                         break;
3056                 }
3057                 return 1;
3058         }
3059         return 0;
3060 }
3061
3062 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu)
3063 {
3064         u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT;
3065
3066         return (vcpu->arch.apf.msr_en_val & mask) == mask;
3067 }
3068
3069 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
3070 {
3071         gpa_t gpa = data & ~0x3f;
3072
3073         /* Bits 4:5 are reserved, Should be zero */
3074         if (data & 0x30)
3075                 return 1;
3076
3077         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_VMEXIT) &&
3078             (data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT))
3079                 return 1;
3080
3081         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT) &&
3082             (data & KVM_ASYNC_PF_DELIVERY_AS_INT))
3083                 return 1;
3084
3085         if (!lapic_in_kernel(vcpu))
3086                 return data ? 1 : 0;
3087
3088         vcpu->arch.apf.msr_en_val = data;
3089
3090         if (!kvm_pv_async_pf_enabled(vcpu)) {
3091                 kvm_clear_async_pf_completion_queue(vcpu);
3092                 kvm_async_pf_hash_reset(vcpu);
3093                 return 0;
3094         }
3095
3096         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
3097                                         sizeof(u64)))
3098                 return 1;
3099
3100         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
3101         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
3102
3103         kvm_async_pf_wakeup_all(vcpu);
3104
3105         return 0;
3106 }
3107
3108 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu *vcpu, u64 data)
3109 {
3110         /* Bits 8-63 are reserved */
3111         if (data >> 8)
3112                 return 1;
3113
3114         if (!lapic_in_kernel(vcpu))
3115                 return 1;
3116
3117         vcpu->arch.apf.msr_int_val = data;
3118
3119         vcpu->arch.apf.vec = data & KVM_ASYNC_PF_VEC_MASK;
3120
3121         return 0;
3122 }
3123
3124 static void kvmclock_reset(struct kvm_vcpu *vcpu)
3125 {
3126         vcpu->arch.pv_time_enabled = false;
3127         vcpu->arch.time = 0;
3128 }
3129
3130 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu *vcpu)
3131 {
3132         ++vcpu->stat.tlb_flush;
3133         static_call(kvm_x86_tlb_flush_all)(vcpu);
3134 }
3135
3136 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu)
3137 {
3138         ++vcpu->stat.tlb_flush;
3139
3140         if (!tdp_enabled) {
3141                /*
3142                  * A TLB flush on behalf of the guest is equivalent to
3143                  * INVPCID(all), toggling CR4.PGE, etc., which requires
3144                  * a forced sync of the shadow page tables.  Unload the
3145                  * entire MMU here and the subsequent load will sync the
3146                  * shadow page tables, and also flush the TLB.
3147                  */
3148                 kvm_mmu_unload(vcpu);
3149                 return;
3150         }
3151
3152         static_call(kvm_x86_tlb_flush_guest)(vcpu);
3153 }
3154
3155 static void record_steal_time(struct kvm_vcpu *vcpu)
3156 {
3157         struct kvm_host_map map;
3158         struct kvm_steal_time *st;
3159
3160         if (kvm_xen_msr_enabled(vcpu->kvm)) {
3161                 kvm_xen_runstate_set_running(vcpu);
3162                 return;
3163         }
3164
3165         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3166                 return;
3167
3168         /* -EAGAIN is returned in atomic context so we can just return. */
3169         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT,
3170                         &map, &vcpu->arch.st.cache, false))
3171                 return;
3172
3173         st = map.hva +
3174                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
3175
3176         /*
3177          * Doing a TLB flush here, on the guest's behalf, can avoid
3178          * expensive IPIs.
3179          */
3180         if (guest_pv_has(vcpu, KVM_FEATURE_PV_TLB_FLUSH)) {
3181                 u8 st_preempted = xchg(&st->preempted, 0);
3182
3183                 trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
3184                                        st_preempted & KVM_VCPU_FLUSH_TLB);
3185                 if (st_preempted & KVM_VCPU_FLUSH_TLB)
3186                         kvm_vcpu_flush_tlb_guest(vcpu);
3187         } else {
3188                 st->preempted = 0;
3189         }
3190
3191         vcpu->arch.st.preempted = 0;
3192
3193         if (st->version & 1)
3194                 st->version += 1;  /* first time write, random junk */
3195
3196         st->version += 1;
3197
3198         smp_wmb();
3199
3200         st->steal += current->sched_info.run_delay -
3201                 vcpu->arch.st.last_steal;
3202         vcpu->arch.st.last_steal = current->sched_info.run_delay;
3203
3204         smp_wmb();
3205
3206         st->version += 1;
3207
3208         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, false);
3209 }
3210
3211 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3212 {
3213         bool pr = false;
3214         u32 msr = msr_info->index;
3215         u64 data = msr_info->data;
3216
3217         if (msr && msr == vcpu->kvm->arch.xen_hvm_config.msr)
3218                 return kvm_xen_write_hypercall_page(vcpu, data);
3219
3220         switch (msr) {
3221         case MSR_AMD64_NB_CFG:
3222         case MSR_IA32_UCODE_WRITE:
3223         case MSR_VM_HSAVE_PA:
3224         case MSR_AMD64_PATCH_LOADER:
3225         case MSR_AMD64_BU_CFG2:
3226         case MSR_AMD64_DC_CFG:
3227         case MSR_F15H_EX_CFG:
3228                 break;
3229
3230         case MSR_IA32_UCODE_REV:
3231                 if (msr_info->host_initiated)
3232                         vcpu->arch.microcode_version = data;
3233                 break;
3234         case MSR_IA32_ARCH_CAPABILITIES:
3235                 if (!msr_info->host_initiated)
3236                         return 1;
3237                 vcpu->arch.arch_capabilities = data;
3238                 break;
3239         case MSR_IA32_PERF_CAPABILITIES: {
3240                 struct kvm_msr_entry msr_ent = {.index = msr, .data = 0};
3241
3242                 if (!msr_info->host_initiated)
3243                         return 1;
3244                 if (guest_cpuid_has(vcpu, X86_FEATURE_PDCM) && kvm_get_msr_feature(&msr_ent))
3245                         return 1;
3246                 if (data & ~msr_ent.data)
3247                         return 1;
3248
3249                 vcpu->arch.perf_capabilities = data;
3250
3251                 return 0;
3252                 }
3253         case MSR_EFER:
3254                 return set_efer(vcpu, msr_info);
3255         case MSR_K7_HWCR:
3256                 data &= ~(u64)0x40;     /* ignore flush filter disable */
3257                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
3258                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
3259
3260                 /* Handle McStatusWrEn */
3261                 if (data == BIT_ULL(18)) {
3262                         vcpu->arch.msr_hwcr = data;
3263                 } else if (data != 0) {
3264                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
3265                                     data);
3266                         return 1;
3267                 }
3268                 break;
3269         case MSR_FAM10H_MMIO_CONF_BASE:
3270                 if (data != 0) {
3271                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
3272                                     "0x%llx\n", data);
3273                         return 1;
3274                 }
3275                 break;
3276         case 0x200 ... 0x2ff:
3277                 return kvm_mtrr_set_msr(vcpu, msr, data);
3278         case MSR_IA32_APICBASE:
3279                 return kvm_set_apic_base(vcpu, msr_info);
3280         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3281                 return kvm_x2apic_msr_write(vcpu, msr, data);
3282         case MSR_IA32_TSC_DEADLINE:
3283                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
3284                 break;
3285         case MSR_IA32_TSC_ADJUST:
3286                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
3287                         if (!msr_info->host_initiated) {
3288                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
3289                                 adjust_tsc_offset_guest(vcpu, adj);
3290                         }
3291                         vcpu->arch.ia32_tsc_adjust_msr = data;
3292                 }
3293                 break;
3294         case MSR_IA32_MISC_ENABLE:
3295                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
3296                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
3297                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
3298                                 return 1;
3299                         vcpu->arch.ia32_misc_enable_msr = data;
3300                         kvm_update_cpuid_runtime(vcpu);
3301                 } else {
3302                         vcpu->arch.ia32_misc_enable_msr = data;
3303                 }
3304                 break;
3305         case MSR_IA32_SMBASE:
3306                 if (!msr_info->host_initiated)
3307                         return 1;
3308                 vcpu->arch.smbase = data;
3309                 break;
3310         case MSR_IA32_POWER_CTL:
3311                 vcpu->arch.msr_ia32_power_ctl = data;
3312                 break;
3313         case MSR_IA32_TSC:
3314                 if (msr_info->host_initiated) {
3315                         kvm_synchronize_tsc(vcpu, data);
3316                 } else {
3317                         u64 adj = kvm_compute_l1_tsc_offset(vcpu, data) - vcpu->arch.l1_tsc_offset;
3318                         adjust_tsc_offset_guest(vcpu, adj);
3319                         vcpu->arch.ia32_tsc_adjust_msr += adj;
3320                 }
3321                 break;
3322         case MSR_IA32_XSS:
3323                 if (!msr_info->host_initiated &&
3324                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3325                         return 1;
3326                 /*
3327                  * KVM supports exposing PT to the guest, but does not support
3328                  * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3329                  * XSAVES/XRSTORS to save/restore PT MSRs.
3330                  */
3331                 if (data & ~supported_xss)
3332                         return 1;
3333                 vcpu->arch.ia32_xss = data;
3334                 break;
3335         case MSR_SMI_COUNT:
3336                 if (!msr_info->host_initiated)
3337                         return 1;
3338                 vcpu->arch.smi_count = data;
3339                 break;
3340         case MSR_KVM_WALL_CLOCK_NEW:
3341                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3342                         return 1;
3343
3344                 vcpu->kvm->arch.wall_clock = data;
3345                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3346                 break;
3347         case MSR_KVM_WALL_CLOCK:
3348                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3349                         return 1;
3350
3351                 vcpu->kvm->arch.wall_clock = data;
3352                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3353                 break;
3354         case MSR_KVM_SYSTEM_TIME_NEW:
3355                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3356                         return 1;
3357
3358                 kvm_write_system_time(vcpu, data, false, msr_info->host_initiated);
3359                 break;
3360         case MSR_KVM_SYSTEM_TIME:
3361                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3362                         return 1;
3363
3364                 kvm_write_system_time(vcpu, data, true,  msr_info->host_initiated);
3365                 break;
3366         case MSR_KVM_ASYNC_PF_EN:
3367                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3368                         return 1;
3369
3370                 if (kvm_pv_enable_async_pf(vcpu, data))
3371                         return 1;
3372                 break;
3373         case MSR_KVM_ASYNC_PF_INT:
3374                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3375                         return 1;
3376
3377                 if (kvm_pv_enable_async_pf_int(vcpu, data))
3378                         return 1;
3379                 break;
3380         case MSR_KVM_ASYNC_PF_ACK:
3381                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3382                         return 1;
3383                 if (data & 0x1) {
3384                         vcpu->arch.apf.pageready_pending = false;
3385                         kvm_check_async_pf_completion(vcpu);
3386                 }
3387                 break;
3388         case MSR_KVM_STEAL_TIME:
3389                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3390                         return 1;
3391
3392                 if (unlikely(!sched_info_on()))
3393                         return 1;
3394
3395                 if (data & KVM_STEAL_RESERVED_MASK)
3396                         return 1;
3397
3398                 vcpu->arch.st.msr_val = data;
3399
3400                 if (!(data & KVM_MSR_ENABLED))
3401                         break;
3402
3403                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3404
3405                 break;
3406         case MSR_KVM_PV_EOI_EN:
3407                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3408                         return 1;
3409
3410                 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
3411                         return 1;
3412                 break;
3413
3414         case MSR_KVM_POLL_CONTROL:
3415                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3416                         return 1;
3417
3418                 /* only enable bit supported */
3419                 if (data & (-1ULL << 1))
3420                         return 1;
3421
3422                 vcpu->arch.msr_kvm_poll_control = data;
3423                 break;
3424
3425         case MSR_IA32_MCG_CTL:
3426         case MSR_IA32_MCG_STATUS:
3427         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3428                 return set_msr_mce(vcpu, msr_info);
3429
3430         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3431         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3432                 pr = true;
3433                 fallthrough;
3434         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3435         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3436                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3437                         return kvm_pmu_set_msr(vcpu, msr_info);
3438
3439                 if (pr || data != 0)
3440                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
3441                                     "0x%x data 0x%llx\n", msr, data);
3442                 break;
3443         case MSR_K7_CLK_CTL:
3444                 /*
3445                  * Ignore all writes to this no longer documented MSR.
3446                  * Writes are only relevant for old K7 processors,
3447                  * all pre-dating SVM, but a recommended workaround from
3448                  * AMD for these chips. It is possible to specify the
3449                  * affected processor models on the command line, hence
3450                  * the need to ignore the workaround.
3451                  */
3452                 break;
3453         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3454         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3455         case HV_X64_MSR_SYNDBG_OPTIONS:
3456         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3457         case HV_X64_MSR_CRASH_CTL:
3458         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3459         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3460         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3461         case HV_X64_MSR_TSC_EMULATION_STATUS:
3462                 return kvm_hv_set_msr_common(vcpu, msr, data,
3463                                              msr_info->host_initiated);
3464         case MSR_IA32_BBL_CR_CTL3:
3465                 /* Drop writes to this legacy MSR -- see rdmsr
3466                  * counterpart for further detail.
3467                  */
3468                 if (report_ignored_msrs)
3469                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
3470                                 msr, data);
3471                 break;
3472         case MSR_AMD64_OSVW_ID_LENGTH:
3473                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3474                         return 1;
3475                 vcpu->arch.osvw.length = data;
3476                 break;
3477         case MSR_AMD64_OSVW_STATUS:
3478                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3479                         return 1;
3480                 vcpu->arch.osvw.status = data;
3481                 break;
3482         case MSR_PLATFORM_INFO:
3483                 if (!msr_info->host_initiated ||
3484                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
3485                      cpuid_fault_enabled(vcpu)))
3486                         return 1;
3487                 vcpu->arch.msr_platform_info = data;
3488                 break;
3489         case MSR_MISC_FEATURES_ENABLES:
3490                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
3491                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
3492                      !supports_cpuid_fault(vcpu)))
3493                         return 1;
3494                 vcpu->arch.msr_misc_features_enables = data;
3495                 break;
3496         default:
3497                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3498                         return kvm_pmu_set_msr(vcpu, msr_info);
3499                 return KVM_MSR_RET_INVALID;
3500         }
3501         return 0;
3502 }
3503 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
3504
3505 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
3506 {
3507         u64 data;
3508         u64 mcg_cap = vcpu->arch.mcg_cap;
3509         unsigned bank_num = mcg_cap & 0xff;
3510
3511         switch (msr) {
3512         case MSR_IA32_P5_MC_ADDR:
3513         case MSR_IA32_P5_MC_TYPE:
3514                 data = 0;
3515                 break;
3516         case MSR_IA32_MCG_CAP:
3517                 data = vcpu->arch.mcg_cap;
3518                 break;
3519         case MSR_IA32_MCG_CTL:
3520                 if (!(mcg_cap & MCG_CTL_P) && !host)
3521                         return 1;
3522                 data = vcpu->arch.mcg_ctl;
3523                 break;
3524         case MSR_IA32_MCG_STATUS:
3525                 data = vcpu->arch.mcg_status;
3526                 break;
3527         default:
3528                 if (msr >= MSR_IA32_MC0_CTL &&
3529                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3530                         u32 offset = array_index_nospec(
3531                                 msr - MSR_IA32_MC0_CTL,
3532                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3533
3534                         data = vcpu->arch.mce_banks[offset];
3535                         break;
3536                 }
3537                 return 1;
3538         }
3539         *pdata = data;
3540         return 0;
3541 }
3542
3543 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3544 {
3545         switch (msr_info->index) {
3546         case MSR_IA32_PLATFORM_ID:
3547         case MSR_IA32_EBL_CR_POWERON:
3548         case MSR_IA32_LASTBRANCHFROMIP:
3549         case MSR_IA32_LASTBRANCHTOIP:
3550         case MSR_IA32_LASTINTFROMIP:
3551         case MSR_IA32_LASTINTTOIP:
3552         case MSR_K8_SYSCFG:
3553         case MSR_K8_TSEG_ADDR:
3554         case MSR_K8_TSEG_MASK:
3555         case MSR_VM_HSAVE_PA:
3556         case MSR_K8_INT_PENDING_MSG:
3557         case MSR_AMD64_NB_CFG:
3558         case MSR_FAM10H_MMIO_CONF_BASE:
3559         case MSR_AMD64_BU_CFG2:
3560         case MSR_IA32_PERF_CTL:
3561         case MSR_AMD64_DC_CFG:
3562         case MSR_F15H_EX_CFG:
3563         /*
3564          * Intel Sandy Bridge CPUs must support the RAPL (running average power
3565          * limit) MSRs. Just return 0, as we do not want to expose the host
3566          * data here. Do not conditionalize this on CPUID, as KVM does not do
3567          * so for existing CPU-specific MSRs.
3568          */
3569         case MSR_RAPL_POWER_UNIT:
3570         case MSR_PP0_ENERGY_STATUS:     /* Power plane 0 (core) */
3571         case MSR_PP1_ENERGY_STATUS:     /* Power plane 1 (graphics uncore) */
3572         case MSR_PKG_ENERGY_STATUS:     /* Total package */
3573         case MSR_DRAM_ENERGY_STATUS:    /* DRAM controller */
3574                 msr_info->data = 0;
3575                 break;
3576         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3577                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3578                         return kvm_pmu_get_msr(vcpu, msr_info);
3579                 if (!msr_info->host_initiated)
3580                         return 1;
3581                 msr_info->data = 0;
3582                 break;
3583         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3584         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3585         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3586         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3587                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3588                         return kvm_pmu_get_msr(vcpu, msr_info);
3589                 msr_info->data = 0;
3590                 break;
3591         case MSR_IA32_UCODE_REV:
3592                 msr_info->data = vcpu->arch.microcode_version;
3593                 break;
3594         case MSR_IA32_ARCH_CAPABILITIES:
3595                 if (!msr_info->host_initiated &&
3596                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
3597                         return 1;
3598                 msr_info->data = vcpu->arch.arch_capabilities;
3599                 break;
3600         case MSR_IA32_PERF_CAPABILITIES:
3601                 if (!msr_info->host_initiated &&
3602                     !guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
3603                         return 1;
3604                 msr_info->data = vcpu->arch.perf_capabilities;
3605                 break;
3606         case MSR_IA32_POWER_CTL:
3607                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
3608                 break;
3609         case MSR_IA32_TSC: {
3610                 /*
3611                  * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3612                  * even when not intercepted. AMD manual doesn't explicitly
3613                  * state this but appears to behave the same.
3614                  *
3615                  * On userspace reads and writes, however, we unconditionally
3616                  * return L1's TSC value to ensure backwards-compatible
3617                  * behavior for migration.
3618                  */
3619                 u64 offset, ratio;
3620
3621                 if (msr_info->host_initiated) {
3622                         offset = vcpu->arch.l1_tsc_offset;
3623                         ratio = vcpu->arch.l1_tsc_scaling_ratio;
3624                 } else {
3625                         offset = vcpu->arch.tsc_offset;
3626                         ratio = vcpu->arch.tsc_scaling_ratio;
3627                 }
3628
3629                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc(), ratio) + offset;
3630                 break;
3631         }
3632         case MSR_MTRRcap:
3633         case 0x200 ... 0x2ff:
3634                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
3635         case 0xcd: /* fsb frequency */
3636                 msr_info->data = 3;
3637                 break;
3638                 /*
3639                  * MSR_EBC_FREQUENCY_ID
3640                  * Conservative value valid for even the basic CPU models.
3641                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3642                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3643                  * and 266MHz for model 3, or 4. Set Core Clock
3644                  * Frequency to System Bus Frequency Ratio to 1 (bits
3645                  * 31:24) even though these are only valid for CPU
3646                  * models > 2, however guests may end up dividing or
3647                  * multiplying by zero otherwise.
3648                  */
3649         case MSR_EBC_FREQUENCY_ID:
3650                 msr_info->data = 1 << 24;
3651                 break;
3652         case MSR_IA32_APICBASE:
3653                 msr_info->data = kvm_get_apic_base(vcpu);
3654                 break;
3655         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3656                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
3657         case MSR_IA32_TSC_DEADLINE:
3658                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
3659                 break;
3660         case MSR_IA32_TSC_ADJUST:
3661                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
3662                 break;
3663         case MSR_IA32_MISC_ENABLE:
3664                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
3665                 break;
3666         case MSR_IA32_SMBASE:
3667                 if (!msr_info->host_initiated)
3668                         return 1;
3669                 msr_info->data = vcpu->arch.smbase;
3670                 break;
3671         case MSR_SMI_COUNT:
3672                 msr_info->data = vcpu->arch.smi_count;
3673                 break;
3674         case MSR_IA32_PERF_STATUS:
3675                 /* TSC increment by tick */
3676                 msr_info->data = 1000ULL;
3677                 /* CPU multiplier */
3678                 msr_info->data |= (((uint64_t)4ULL) << 40);
3679                 break;
3680         case MSR_EFER:
3681                 msr_info->data = vcpu->arch.efer;
3682                 break;
3683         case MSR_KVM_WALL_CLOCK:
3684                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3685                         return 1;
3686
3687                 msr_info->data = vcpu->kvm->arch.wall_clock;
3688                 break;
3689         case MSR_KVM_WALL_CLOCK_NEW:
3690                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3691                         return 1;
3692
3693                 msr_info->data = vcpu->kvm->arch.wall_clock;
3694                 break;
3695         case MSR_KVM_SYSTEM_TIME:
3696                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3697                         return 1;
3698
3699                 msr_info->data = vcpu->arch.time;
3700                 break;
3701         case MSR_KVM_SYSTEM_TIME_NEW:
3702                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3703                         return 1;
3704
3705                 msr_info->data = vcpu->arch.time;
3706                 break;
3707         case MSR_KVM_ASYNC_PF_EN:
3708                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3709                         return 1;
3710
3711                 msr_info->data = vcpu->arch.apf.msr_en_val;
3712                 break;
3713         case MSR_KVM_ASYNC_PF_INT:
3714                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3715                         return 1;
3716
3717                 msr_info->data = vcpu->arch.apf.msr_int_val;
3718                 break;
3719         case MSR_KVM_ASYNC_PF_ACK:
3720                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3721                         return 1;
3722
3723                 msr_info->data = 0;
3724                 break;
3725         case MSR_KVM_STEAL_TIME:
3726                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3727                         return 1;
3728
3729                 msr_info->data = vcpu->arch.st.msr_val;
3730                 break;
3731         case MSR_KVM_PV_EOI_EN:
3732                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3733                         return 1;
3734
3735                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3736                 break;
3737         case MSR_KVM_POLL_CONTROL:
3738                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3739                         return 1;
3740
3741                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3742                 break;
3743         case MSR_IA32_P5_MC_ADDR:
3744         case MSR_IA32_P5_MC_TYPE:
3745         case MSR_IA32_MCG_CAP:
3746         case MSR_IA32_MCG_CTL:
3747         case MSR_IA32_MCG_STATUS:
3748         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3749                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3750                                    msr_info->host_initiated);
3751         case MSR_IA32_XSS:
3752                 if (!msr_info->host_initiated &&
3753                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3754                         return 1;
3755                 msr_info->data = vcpu->arch.ia32_xss;
3756                 break;
3757         case MSR_K7_CLK_CTL:
3758                 /*
3759                  * Provide expected ramp-up count for K7. All other
3760                  * are set to zero, indicating minimum divisors for
3761                  * every field.
3762                  *
3763                  * This prevents guest kernels on AMD host with CPU
3764                  * type 6, model 8 and higher from exploding due to
3765                  * the rdmsr failing.
3766                  */
3767                 msr_info->data = 0x20000000;
3768                 break;
3769         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3770         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3771         case HV_X64_MSR_SYNDBG_OPTIONS:
3772         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3773         case HV_X64_MSR_CRASH_CTL:
3774         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3775         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3776         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3777         case HV_X64_MSR_TSC_EMULATION_STATUS:
3778                 return kvm_hv_get_msr_common(vcpu,
3779                                              msr_info->index, &msr_info->data,
3780                                              msr_info->host_initiated);
3781         case MSR_IA32_BBL_CR_CTL3:
3782                 /* This legacy MSR exists but isn't fully documented in current
3783                  * silicon.  It is however accessed by winxp in very narrow
3784                  * scenarios where it sets bit #19, itself documented as
3785                  * a "reserved" bit.  Best effort attempt to source coherent
3786                  * read data here should the balance of the register be
3787                  * interpreted by the guest:
3788                  *
3789                  * L2 cache control register 3: 64GB range, 256KB size,
3790                  * enabled, latency 0x1, configured
3791                  */
3792                 msr_info->data = 0xbe702111;
3793                 break;
3794         case MSR_AMD64_OSVW_ID_LENGTH:
3795                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3796                         return 1;
3797                 msr_info->data = vcpu->arch.osvw.length;
3798                 break;
3799         case MSR_AMD64_OSVW_STATUS:
3800                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3801                         return 1;
3802                 msr_info->data = vcpu->arch.osvw.status;
3803                 break;
3804         case MSR_PLATFORM_INFO:
3805                 if (!msr_info->host_initiated &&
3806                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
3807                         return 1;
3808                 msr_info->data = vcpu->arch.msr_platform_info;
3809                 break;
3810         case MSR_MISC_FEATURES_ENABLES:
3811                 msr_info->data = vcpu->arch.msr_misc_features_enables;
3812                 break;
3813         case MSR_K7_HWCR:
3814                 msr_info->data = vcpu->arch.msr_hwcr;
3815                 break;
3816         default:
3817                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3818                         return kvm_pmu_get_msr(vcpu, msr_info);
3819                 return KVM_MSR_RET_INVALID;
3820         }
3821         return 0;
3822 }
3823 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
3824
3825 /*
3826  * Read or write a bunch of msrs. All parameters are kernel addresses.
3827  *
3828  * @return number of msrs set successfully.
3829  */
3830 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
3831                     struct kvm_msr_entry *entries,
3832                     int (*do_msr)(struct kvm_vcpu *vcpu,
3833                                   unsigned index, u64 *data))
3834 {
3835         int i;
3836
3837         for (i = 0; i < msrs->nmsrs; ++i)
3838                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
3839                         break;
3840
3841         return i;
3842 }
3843
3844 /*
3845  * Read or write a bunch of msrs. Parameters are user addresses.
3846  *
3847  * @return number of msrs set successfully.
3848  */
3849 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
3850                   int (*do_msr)(struct kvm_vcpu *vcpu,
3851                                 unsigned index, u64 *data),
3852                   int writeback)
3853 {
3854         struct kvm_msrs msrs;
3855         struct kvm_msr_entry *entries;
3856         int r, n;
3857         unsigned size;
3858
3859         r = -EFAULT;
3860         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
3861                 goto out;
3862
3863         r = -E2BIG;
3864         if (msrs.nmsrs >= MAX_IO_MSRS)
3865                 goto out;
3866
3867         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
3868         entries = memdup_user(user_msrs->entries, size);
3869         if (IS_ERR(entries)) {
3870                 r = PTR_ERR(entries);
3871                 goto out;
3872         }
3873
3874         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
3875         if (r < 0)
3876                 goto out_free;
3877
3878         r = -EFAULT;
3879         if (writeback && copy_to_user(user_msrs->entries, entries, size))
3880                 goto out_free;
3881
3882         r = n;
3883
3884 out_free:
3885         kfree(entries);
3886 out:
3887         return r;
3888 }
3889
3890 static inline bool kvm_can_mwait_in_guest(void)
3891 {
3892         return boot_cpu_has(X86_FEATURE_MWAIT) &&
3893                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
3894                 boot_cpu_has(X86_FEATURE_ARAT);
3895 }
3896
3897 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu *vcpu,
3898                                             struct kvm_cpuid2 __user *cpuid_arg)
3899 {
3900         struct kvm_cpuid2 cpuid;
3901         int r;
3902
3903         r = -EFAULT;
3904         if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3905                 return r;
3906
3907         r = kvm_get_hv_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3908         if (r)
3909                 return r;
3910
3911         r = -EFAULT;
3912         if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3913                 return r;
3914
3915         return 0;
3916 }
3917
3918 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
3919 {
3920         int r = 0;
3921
3922         switch (ext) {
3923         case KVM_CAP_IRQCHIP:
3924         case KVM_CAP_HLT:
3925         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
3926         case KVM_CAP_SET_TSS_ADDR:
3927         case KVM_CAP_EXT_CPUID:
3928         case KVM_CAP_EXT_EMUL_CPUID:
3929         case KVM_CAP_CLOCKSOURCE:
3930         case KVM_CAP_PIT:
3931         case KVM_CAP_NOP_IO_DELAY:
3932         case KVM_CAP_MP_STATE:
3933         case KVM_CAP_SYNC_MMU:
3934         case KVM_CAP_USER_NMI:
3935         case KVM_CAP_REINJECT_CONTROL:
3936         case KVM_CAP_IRQ_INJECT_STATUS:
3937         case KVM_CAP_IOEVENTFD:
3938         case KVM_CAP_IOEVENTFD_NO_LENGTH:
3939         case KVM_CAP_PIT2:
3940         case KVM_CAP_PIT_STATE2:
3941         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
3942         case KVM_CAP_VCPU_EVENTS:
3943         case KVM_CAP_HYPERV:
3944         case KVM_CAP_HYPERV_VAPIC:
3945         case KVM_CAP_HYPERV_SPIN:
3946         case KVM_CAP_HYPERV_SYNIC:
3947         case KVM_CAP_HYPERV_SYNIC2:
3948         case KVM_CAP_HYPERV_VP_INDEX:
3949         case KVM_CAP_HYPERV_EVENTFD:
3950         case KVM_CAP_HYPERV_TLBFLUSH:
3951         case KVM_CAP_HYPERV_SEND_IPI:
3952         case KVM_CAP_HYPERV_CPUID:
3953         case KVM_CAP_SYS_HYPERV_CPUID:
3954         case KVM_CAP_PCI_SEGMENT:
3955         case KVM_CAP_DEBUGREGS:
3956         case KVM_CAP_X86_ROBUST_SINGLESTEP:
3957         case KVM_CAP_XSAVE:
3958         case KVM_CAP_ASYNC_PF:
3959         case KVM_CAP_ASYNC_PF_INT:
3960         case KVM_CAP_GET_TSC_KHZ:
3961         case KVM_CAP_KVMCLOCK_CTRL:
3962         case KVM_CAP_READONLY_MEM:
3963         case KVM_CAP_HYPERV_TIME:
3964         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
3965         case KVM_CAP_TSC_DEADLINE_TIMER:
3966         case KVM_CAP_DISABLE_QUIRKS:
3967         case KVM_CAP_SET_BOOT_CPU_ID:
3968         case KVM_CAP_SPLIT_IRQCHIP:
3969         case KVM_CAP_IMMEDIATE_EXIT:
3970         case KVM_CAP_PMU_EVENT_FILTER:
3971         case KVM_CAP_GET_MSR_FEATURES:
3972         case KVM_CAP_MSR_PLATFORM_INFO:
3973         case KVM_CAP_EXCEPTION_PAYLOAD:
3974         case KVM_CAP_SET_GUEST_DEBUG:
3975         case KVM_CAP_LAST_CPU:
3976         case KVM_CAP_X86_USER_SPACE_MSR:
3977         case KVM_CAP_X86_MSR_FILTER:
3978         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
3979 #ifdef CONFIG_X86_SGX_KVM
3980         case KVM_CAP_SGX_ATTRIBUTE:
3981 #endif
3982         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
3983                 r = 1;
3984                 break;
3985         case KVM_CAP_SET_GUEST_DEBUG2:
3986                 return KVM_GUESTDBG_VALID_MASK;
3987 #ifdef CONFIG_KVM_XEN
3988         case KVM_CAP_XEN_HVM:
3989                 r = KVM_XEN_HVM_CONFIG_HYPERCALL_MSR |
3990                     KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL |
3991                     KVM_XEN_HVM_CONFIG_SHARED_INFO;
3992                 if (sched_info_on())
3993                         r |= KVM_XEN_HVM_CONFIG_RUNSTATE;
3994                 break;
3995 #endif
3996         case KVM_CAP_SYNC_REGS:
3997                 r = KVM_SYNC_X86_VALID_FIELDS;
3998                 break;
3999         case KVM_CAP_ADJUST_CLOCK:
4000                 r = KVM_CLOCK_TSC_STABLE;
4001                 break;
4002         case KVM_CAP_X86_DISABLE_EXITS:
4003                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
4004                       KVM_X86_DISABLE_EXITS_CSTATE;
4005                 if(kvm_can_mwait_in_guest())
4006                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
4007                 break;
4008         case KVM_CAP_X86_SMM:
4009                 /* SMBASE is usually relocated above 1M on modern chipsets,
4010                  * and SMM handlers might indeed rely on 4G segment limits,
4011                  * so do not report SMM to be available if real mode is
4012                  * emulated via vm86 mode.  Still, do not go to great lengths
4013                  * to avoid userspace's usage of the feature, because it is a
4014                  * fringe case that is not enabled except via specific settings
4015                  * of the module parameters.
4016                  */
4017                 r = static_call(kvm_x86_has_emulated_msr)(kvm, MSR_IA32_SMBASE);
4018                 break;
4019         case KVM_CAP_VAPIC:
4020                 r = !static_call(kvm_x86_cpu_has_accelerated_tpr)();
4021                 break;
4022         case KVM_CAP_NR_VCPUS:
4023                 r = KVM_SOFT_MAX_VCPUS;
4024                 break;
4025         case KVM_CAP_MAX_VCPUS:
4026                 r = KVM_MAX_VCPUS;
4027                 break;
4028         case KVM_CAP_MAX_VCPU_ID:
4029                 r = KVM_MAX_VCPU_ID;
4030                 break;
4031         case KVM_CAP_PV_MMU:    /* obsolete */
4032                 r = 0;
4033                 break;
4034         case KVM_CAP_MCE:
4035                 r = KVM_MAX_MCE_BANKS;
4036                 break;
4037         case KVM_CAP_XCRS:
4038                 r = boot_cpu_has(X86_FEATURE_XSAVE);
4039                 break;
4040         case KVM_CAP_TSC_CONTROL:
4041                 r = kvm_has_tsc_control;
4042                 break;
4043         case KVM_CAP_X2APIC_API:
4044                 r = KVM_X2APIC_API_VALID_FLAGS;
4045                 break;
4046         case KVM_CAP_NESTED_STATE:
4047                 r = kvm_x86_ops.nested_ops->get_state ?
4048                         kvm_x86_ops.nested_ops->get_state(NULL, NULL, 0) : 0;
4049                 break;
4050         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4051                 r = kvm_x86_ops.enable_direct_tlbflush != NULL;
4052                 break;
4053         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4054                 r = kvm_x86_ops.nested_ops->enable_evmcs != NULL;
4055                 break;
4056         case KVM_CAP_SMALLER_MAXPHYADDR:
4057                 r = (int) allow_smaller_maxphyaddr;
4058                 break;
4059         case KVM_CAP_STEAL_TIME:
4060                 r = sched_info_on();
4061                 break;
4062         case KVM_CAP_X86_BUS_LOCK_EXIT:
4063                 if (kvm_has_bus_lock_exit)
4064                         r = KVM_BUS_LOCK_DETECTION_OFF |
4065                             KVM_BUS_LOCK_DETECTION_EXIT;
4066                 else
4067                         r = 0;
4068                 break;
4069         default:
4070                 break;
4071         }
4072         return r;
4073
4074 }
4075
4076 long kvm_arch_dev_ioctl(struct file *filp,
4077                         unsigned int ioctl, unsigned long arg)
4078 {
4079         void __user *argp = (void __user *)arg;
4080         long r;
4081
4082         switch (ioctl) {
4083         case KVM_GET_MSR_INDEX_LIST: {
4084                 struct kvm_msr_list __user *user_msr_list = argp;
4085                 struct kvm_msr_list msr_list;
4086                 unsigned n;
4087
4088                 r = -EFAULT;
4089                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4090                         goto out;
4091                 n = msr_list.nmsrs;
4092                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
4093                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4094                         goto out;
4095                 r = -E2BIG;
4096                 if (n < msr_list.nmsrs)
4097                         goto out;
4098                 r = -EFAULT;
4099                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
4100                                  num_msrs_to_save * sizeof(u32)))
4101                         goto out;
4102                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
4103                                  &emulated_msrs,
4104                                  num_emulated_msrs * sizeof(u32)))
4105                         goto out;
4106                 r = 0;
4107                 break;
4108         }
4109         case KVM_GET_SUPPORTED_CPUID:
4110         case KVM_GET_EMULATED_CPUID: {
4111                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4112                 struct kvm_cpuid2 cpuid;
4113
4114                 r = -EFAULT;
4115                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4116                         goto out;
4117
4118                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
4119                                             ioctl);
4120                 if (r)
4121                         goto out;
4122
4123                 r = -EFAULT;
4124                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4125                         goto out;
4126                 r = 0;
4127                 break;
4128         }
4129         case KVM_X86_GET_MCE_CAP_SUPPORTED:
4130                 r = -EFAULT;
4131                 if (copy_to_user(argp, &kvm_mce_cap_supported,
4132                                  sizeof(kvm_mce_cap_supported)))
4133                         goto out;
4134                 r = 0;
4135                 break;
4136         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
4137                 struct kvm_msr_list __user *user_msr_list = argp;
4138                 struct kvm_msr_list msr_list;
4139                 unsigned int n;
4140
4141                 r = -EFAULT;
4142                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4143                         goto out;
4144                 n = msr_list.nmsrs;
4145                 msr_list.nmsrs = num_msr_based_features;
4146                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4147                         goto out;
4148                 r = -E2BIG;
4149                 if (n < msr_list.nmsrs)
4150                         goto out;
4151                 r = -EFAULT;
4152                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
4153                                  num_msr_based_features * sizeof(u32)))
4154                         goto out;
4155                 r = 0;
4156                 break;
4157         }
4158         case KVM_GET_MSRS:
4159                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
4160                 break;
4161         case KVM_GET_SUPPORTED_HV_CPUID:
4162                 r = kvm_ioctl_get_supported_hv_cpuid(NULL, argp);
4163                 break;
4164         default:
4165                 r = -EINVAL;
4166                 break;
4167         }
4168 out:
4169         return r;
4170 }
4171
4172 static void wbinvd_ipi(void *garbage)
4173 {
4174         wbinvd();
4175 }
4176
4177 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
4178 {
4179         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
4180 }
4181
4182 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
4183 {
4184         /* Address WBINVD may be executed by guest */
4185         if (need_emulate_wbinvd(vcpu)) {
4186                 if (static_call(kvm_x86_has_wbinvd_exit)())
4187                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4188                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
4189                         smp_call_function_single(vcpu->cpu,
4190                                         wbinvd_ipi, NULL, 1);
4191         }
4192
4193         static_call(kvm_x86_vcpu_load)(vcpu, cpu);
4194
4195         /* Save host pkru register if supported */
4196         vcpu->arch.host_pkru = read_pkru();
4197
4198         /* Apply any externally detected TSC adjustments (due to suspend) */
4199         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
4200                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
4201                 vcpu->arch.tsc_offset_adjustment = 0;
4202                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4203         }
4204
4205         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
4206                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
4207                                 rdtsc() - vcpu->arch.last_host_tsc;
4208                 if (tsc_delta < 0)
4209                         mark_tsc_unstable("KVM discovered backwards TSC");
4210
4211                 if (kvm_check_tsc_unstable()) {
4212                         u64 offset = kvm_compute_l1_tsc_offset(vcpu,
4213                                                 vcpu->arch.last_guest_tsc);
4214                         kvm_vcpu_write_tsc_offset(vcpu, offset);
4215                         vcpu->arch.tsc_catchup = 1;
4216                 }
4217
4218                 if (kvm_lapic_hv_timer_in_use(vcpu))
4219                         kvm_lapic_restart_hv_timer(vcpu);
4220
4221                 /*
4222                  * On a host with synchronized TSC, there is no need to update
4223                  * kvmclock on vcpu->cpu migration
4224                  */
4225                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
4226                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
4227                 if (vcpu->cpu != cpu)
4228                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
4229                 vcpu->cpu = cpu;
4230         }
4231
4232         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
4233 }
4234
4235 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
4236 {
4237         struct kvm_host_map map;
4238         struct kvm_steal_time *st;
4239
4240         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
4241                 return;
4242
4243         if (vcpu->arch.st.preempted)
4244                 return;
4245
4246         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT, &map,
4247                         &vcpu->arch.st.cache, true))
4248                 return;
4249
4250         st = map.hva +
4251                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
4252
4253         st->preempted = vcpu->arch.st.preempted = KVM_VCPU_PREEMPTED;
4254
4255         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, true);
4256 }
4257
4258 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
4259 {
4260         int idx;
4261
4262         if (vcpu->preempted && !vcpu->arch.guest_state_protected)
4263                 vcpu->arch.preempted_in_kernel = !static_call(kvm_x86_get_cpl)(vcpu);
4264
4265         /*
4266          * Take the srcu lock as memslots will be accessed to check the gfn
4267          * cache generation against the memslots generation.
4268          */
4269         idx = srcu_read_lock(&vcpu->kvm->srcu);
4270         if (kvm_xen_msr_enabled(vcpu->kvm))
4271                 kvm_xen_runstate_set_preempted(vcpu);
4272         else
4273                 kvm_steal_time_set_preempted(vcpu);
4274         srcu_read_unlock(&vcpu->kvm->srcu, idx);
4275
4276         static_call(kvm_x86_vcpu_put)(vcpu);
4277         vcpu->arch.last_host_tsc = rdtsc();
4278         /*
4279          * If userspace has set any breakpoints or watchpoints, dr6 is restored
4280          * on every vmexit, but if not, we might have a stale dr6 from the
4281          * guest. do_debug expects dr6 to be cleared after it runs, do the same.
4282          */
4283         set_debugreg(0, 6);
4284 }
4285
4286 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
4287                                     struct kvm_lapic_state *s)
4288 {
4289         if (vcpu->arch.apicv_active)
4290                 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
4291
4292         return kvm_apic_get_state(vcpu, s);
4293 }
4294
4295 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
4296                                     struct kvm_lapic_state *s)
4297 {
4298         int r;
4299
4300         r = kvm_apic_set_state(vcpu, s);
4301         if (r)
4302                 return r;
4303         update_cr8_intercept(vcpu);
4304
4305         return 0;
4306 }
4307
4308 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
4309 {
4310         /*
4311          * We can accept userspace's request for interrupt injection
4312          * as long as we have a place to store the interrupt number.
4313          * The actual injection will happen when the CPU is able to
4314          * deliver the interrupt.
4315          */
4316         if (kvm_cpu_has_extint(vcpu))
4317                 return false;
4318
4319         /* Acknowledging ExtINT does not happen if LINT0 is masked.  */
4320         return (!lapic_in_kernel(vcpu) ||
4321                 kvm_apic_accept_pic_intr(vcpu));
4322 }
4323
4324 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
4325 {
4326         return kvm_arch_interrupt_allowed(vcpu) &&
4327                 kvm_cpu_accept_dm_intr(vcpu);
4328 }
4329
4330 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
4331                                     struct kvm_interrupt *irq)
4332 {
4333         if (irq->irq >= KVM_NR_INTERRUPTS)
4334                 return -EINVAL;
4335
4336         if (!irqchip_in_kernel(vcpu->kvm)) {
4337                 kvm_queue_interrupt(vcpu, irq->irq, false);
4338                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4339                 return 0;
4340         }
4341
4342         /*
4343          * With in-kernel LAPIC, we only use this to inject EXTINT, so
4344          * fail for in-kernel 8259.
4345          */
4346         if (pic_in_kernel(vcpu->kvm))
4347                 return -ENXIO;
4348
4349         if (vcpu->arch.pending_external_vector != -1)
4350                 return -EEXIST;
4351
4352         vcpu->arch.pending_external_vector = irq->irq;
4353         kvm_make_request(KVM_REQ_EVENT, vcpu);
4354         return 0;
4355 }
4356
4357 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
4358 {
4359         kvm_inject_nmi(vcpu);
4360
4361         return 0;
4362 }
4363
4364 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
4365 {
4366         kvm_make_request(KVM_REQ_SMI, vcpu);
4367
4368         return 0;
4369 }
4370
4371 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
4372                                            struct kvm_tpr_access_ctl *tac)
4373 {
4374         if (tac->flags)
4375                 return -EINVAL;
4376         vcpu->arch.tpr_access_reporting = !!tac->enabled;
4377         return 0;
4378 }
4379
4380 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
4381                                         u64 mcg_cap)
4382 {
4383         int r;
4384         unsigned bank_num = mcg_cap & 0xff, bank;
4385
4386         r = -EINVAL;
4387         if (!bank_num || bank_num > KVM_MAX_MCE_BANKS)
4388                 goto out;
4389         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
4390                 goto out;
4391         r = 0;
4392         vcpu->arch.mcg_cap = mcg_cap;
4393         /* Init IA32_MCG_CTL to all 1s */
4394         if (mcg_cap & MCG_CTL_P)
4395                 vcpu->arch.mcg_ctl = ~(u64)0;
4396         /* Init IA32_MCi_CTL to all 1s */
4397         for (bank = 0; bank < bank_num; bank++)
4398                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
4399
4400         static_call(kvm_x86_setup_mce)(vcpu);
4401 out:
4402         return r;
4403 }
4404
4405 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
4406                                       struct kvm_x86_mce *mce)
4407 {
4408         u64 mcg_cap = vcpu->arch.mcg_cap;
4409         unsigned bank_num = mcg_cap & 0xff;
4410         u64 *banks = vcpu->arch.mce_banks;
4411
4412         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
4413                 return -EINVAL;
4414         /*
4415          * if IA32_MCG_CTL is not all 1s, the uncorrected error
4416          * reporting is disabled
4417          */
4418         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
4419             vcpu->arch.mcg_ctl != ~(u64)0)
4420                 return 0;
4421         banks += 4 * mce->bank;
4422         /*
4423          * if IA32_MCi_CTL is not all 1s, the uncorrected error
4424          * reporting is disabled for the bank
4425          */
4426         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
4427                 return 0;
4428         if (mce->status & MCI_STATUS_UC) {
4429                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
4430                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
4431                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
4432                         return 0;
4433                 }
4434                 if (banks[1] & MCI_STATUS_VAL)
4435                         mce->status |= MCI_STATUS_OVER;
4436                 banks[2] = mce->addr;
4437                 banks[3] = mce->misc;
4438                 vcpu->arch.mcg_status = mce->mcg_status;
4439                 banks[1] = mce->status;
4440                 kvm_queue_exception(vcpu, MC_VECTOR);
4441         } else if (!(banks[1] & MCI_STATUS_VAL)
4442                    || !(banks[1] & MCI_STATUS_UC)) {
4443                 if (banks[1] & MCI_STATUS_VAL)
4444                         mce->status |= MCI_STATUS_OVER;
4445                 banks[2] = mce->addr;
4446                 banks[3] = mce->misc;
4447                 banks[1] = mce->status;
4448         } else
4449                 banks[1] |= MCI_STATUS_OVER;
4450         return 0;
4451 }
4452
4453 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
4454                                                struct kvm_vcpu_events *events)
4455 {
4456         process_nmi(vcpu);
4457
4458         if (kvm_check_request(KVM_REQ_SMI, vcpu))
4459                 process_smi(vcpu);
4460
4461         /*
4462          * In guest mode, payload delivery should be deferred,
4463          * so that the L1 hypervisor can intercept #PF before
4464          * CR2 is modified (or intercept #DB before DR6 is
4465          * modified under nVMX). Unless the per-VM capability,
4466          * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4467          * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4468          * opportunistically defer the exception payload, deliver it if the
4469          * capability hasn't been requested before processing a
4470          * KVM_GET_VCPU_EVENTS.
4471          */
4472         if (!vcpu->kvm->arch.exception_payload_enabled &&
4473             vcpu->arch.exception.pending && vcpu->arch.exception.has_payload)
4474                 kvm_deliver_exception_payload(vcpu);
4475
4476         /*
4477          * The API doesn't provide the instruction length for software
4478          * exceptions, so don't report them. As long as the guest RIP
4479          * isn't advanced, we should expect to encounter the exception
4480          * again.
4481          */
4482         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
4483                 events->exception.injected = 0;
4484                 events->exception.pending = 0;
4485         } else {
4486                 events->exception.injected = vcpu->arch.exception.injected;
4487                 events->exception.pending = vcpu->arch.exception.pending;
4488                 /*
4489                  * For ABI compatibility, deliberately conflate
4490                  * pending and injected exceptions when
4491                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4492                  */
4493                 if (!vcpu->kvm->arch.exception_payload_enabled)
4494                         events->exception.injected |=
4495                                 vcpu->arch.exception.pending;
4496         }
4497         events->exception.nr = vcpu->arch.exception.nr;
4498         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
4499         events->exception.error_code = vcpu->arch.exception.error_code;
4500         events->exception_has_payload = vcpu->arch.exception.has_payload;
4501         events->exception_payload = vcpu->arch.exception.payload;
4502
4503         events->interrupt.injected =
4504                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
4505         events->interrupt.nr = vcpu->arch.interrupt.nr;
4506         events->interrupt.soft = 0;
4507         events->interrupt.shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
4508
4509         events->nmi.injected = vcpu->arch.nmi_injected;
4510         events->nmi.pending = vcpu->arch.nmi_pending != 0;
4511         events->nmi.masked = static_call(kvm_x86_get_nmi_mask)(vcpu);
4512         events->nmi.pad = 0;
4513
4514         events->sipi_vector = 0; /* never valid when reporting to user space */
4515
4516         events->smi.smm = is_smm(vcpu);
4517         events->smi.pending = vcpu->arch.smi_pending;
4518         events->smi.smm_inside_nmi =
4519                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
4520         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
4521
4522         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
4523                          | KVM_VCPUEVENT_VALID_SHADOW
4524                          | KVM_VCPUEVENT_VALID_SMM);
4525         if (vcpu->kvm->arch.exception_payload_enabled)
4526                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
4527
4528         memset(&events->reserved, 0, sizeof(events->reserved));
4529 }
4530
4531 static void kvm_smm_changed(struct kvm_vcpu *vcpu);
4532
4533 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
4534                                               struct kvm_vcpu_events *events)
4535 {
4536         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4537                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4538                               | KVM_VCPUEVENT_VALID_SHADOW
4539                               | KVM_VCPUEVENT_VALID_SMM
4540                               | KVM_VCPUEVENT_VALID_PAYLOAD))
4541                 return -EINVAL;
4542
4543         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
4544                 if (!vcpu->kvm->arch.exception_payload_enabled)
4545                         return -EINVAL;
4546                 if (events->exception.pending)
4547                         events->exception.injected = 0;
4548                 else
4549                         events->exception_has_payload = 0;
4550         } else {
4551                 events->exception.pending = 0;
4552                 events->exception_has_payload = 0;
4553         }
4554
4555         if ((events->exception.injected || events->exception.pending) &&
4556             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
4557                 return -EINVAL;
4558
4559         /* INITs are latched while in SMM */
4560         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
4561             (events->smi.smm || events->smi.pending) &&
4562             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
4563                 return -EINVAL;
4564
4565         process_nmi(vcpu);
4566         vcpu->arch.exception.injected = events->exception.injected;
4567         vcpu->arch.exception.pending = events->exception.pending;
4568         vcpu->arch.exception.nr = events->exception.nr;
4569         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
4570         vcpu->arch.exception.error_code = events->exception.error_code;
4571         vcpu->arch.exception.has_payload = events->exception_has_payload;
4572         vcpu->arch.exception.payload = events->exception_payload;
4573
4574         vcpu->arch.interrupt.injected = events->interrupt.injected;
4575         vcpu->arch.interrupt.nr = events->interrupt.nr;
4576         vcpu->arch.interrupt.soft = events->interrupt.soft;
4577         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
4578                 static_call(kvm_x86_set_interrupt_shadow)(vcpu,
4579                                                 events->interrupt.shadow);
4580
4581         vcpu->arch.nmi_injected = events->nmi.injected;
4582         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
4583                 vcpu->arch.nmi_pending = events->nmi.pending;
4584         static_call(kvm_x86_set_nmi_mask)(vcpu, events->nmi.masked);
4585
4586         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
4587             lapic_in_kernel(vcpu))
4588                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
4589
4590         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
4591                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
4592                         if (events->smi.smm)
4593                                 vcpu->arch.hflags |= HF_SMM_MASK;
4594                         else
4595                                 vcpu->arch.hflags &= ~HF_SMM_MASK;
4596                         kvm_smm_changed(vcpu);
4597                 }
4598
4599                 vcpu->arch.smi_pending = events->smi.pending;
4600
4601                 if (events->smi.smm) {
4602                         if (events->smi.smm_inside_nmi)
4603                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
4604                         else
4605                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
4606                 }
4607
4608                 if (lapic_in_kernel(vcpu)) {
4609                         if (events->smi.latched_init)
4610                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4611                         else
4612                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4613                 }
4614         }
4615
4616         kvm_make_request(KVM_REQ_EVENT, vcpu);
4617
4618         return 0;
4619 }
4620
4621 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
4622                                              struct kvm_debugregs *dbgregs)
4623 {
4624         unsigned long val;
4625
4626         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
4627         kvm_get_dr(vcpu, 6, &val);
4628         dbgregs->dr6 = val;
4629         dbgregs->dr7 = vcpu->arch.dr7;
4630         dbgregs->flags = 0;
4631         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
4632 }
4633
4634 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
4635                                             struct kvm_debugregs *dbgregs)
4636 {
4637         if (dbgregs->flags)
4638                 return -EINVAL;
4639
4640         if (!kvm_dr6_valid(dbgregs->dr6))
4641                 return -EINVAL;
4642         if (!kvm_dr7_valid(dbgregs->dr7))
4643                 return -EINVAL;
4644
4645         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
4646         kvm_update_dr0123(vcpu);
4647         vcpu->arch.dr6 = dbgregs->dr6;
4648         vcpu->arch.dr7 = dbgregs->dr7;
4649         kvm_update_dr7(vcpu);
4650
4651         return 0;
4652 }
4653
4654 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
4655
4656 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
4657 {
4658         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4659         u64 xstate_bv = xsave->header.xfeatures;
4660         u64 valid;
4661
4662         /*
4663          * Copy legacy XSAVE area, to avoid complications with CPUID
4664          * leaves 0 and 1 in the loop below.
4665          */
4666         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
4667
4668         /* Set XSTATE_BV */
4669         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
4670         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
4671
4672         /*
4673          * Copy each region from the possibly compacted offset to the
4674          * non-compacted offset.
4675          */
4676         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4677         while (valid) {
4678                 u64 xfeature_mask = valid & -valid;
4679                 int xfeature_nr = fls64(xfeature_mask) - 1;
4680                 void *src = get_xsave_addr(xsave, xfeature_nr);
4681
4682                 if (src) {
4683                         u32 size, offset, ecx, edx;
4684                         cpuid_count(XSTATE_CPUID, xfeature_nr,
4685                                     &size, &offset, &ecx, &edx);
4686                         if (xfeature_nr == XFEATURE_PKRU)
4687                                 memcpy(dest + offset, &vcpu->arch.pkru,
4688                                        sizeof(vcpu->arch.pkru));
4689                         else
4690                                 memcpy(dest + offset, src, size);
4691
4692                 }
4693
4694                 valid -= xfeature_mask;
4695         }
4696 }
4697
4698 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
4699 {
4700         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4701         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
4702         u64 valid;
4703
4704         /*
4705          * Copy legacy XSAVE area, to avoid complications with CPUID
4706          * leaves 0 and 1 in the loop below.
4707          */
4708         memcpy(xsave, src, XSAVE_HDR_OFFSET);
4709
4710         /* Set XSTATE_BV and possibly XCOMP_BV.  */
4711         xsave->header.xfeatures = xstate_bv;
4712         if (boot_cpu_has(X86_FEATURE_XSAVES))
4713                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
4714
4715         /*
4716          * Copy each region from the non-compacted offset to the
4717          * possibly compacted offset.
4718          */
4719         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4720         while (valid) {
4721                 u64 xfeature_mask = valid & -valid;
4722                 int xfeature_nr = fls64(xfeature_mask) - 1;
4723                 void *dest = get_xsave_addr(xsave, xfeature_nr);
4724
4725                 if (dest) {
4726                         u32 size, offset, ecx, edx;
4727                         cpuid_count(XSTATE_CPUID, xfeature_nr,
4728                                     &size, &offset, &ecx, &edx);
4729                         if (xfeature_nr == XFEATURE_PKRU)
4730                                 memcpy(&vcpu->arch.pkru, src + offset,
4731                                        sizeof(vcpu->arch.pkru));
4732                         else
4733                                 memcpy(dest, src + offset, size);
4734                 }
4735
4736                 valid -= xfeature_mask;
4737         }
4738 }
4739
4740 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
4741                                          struct kvm_xsave *guest_xsave)
4742 {
4743         if (!vcpu->arch.guest_fpu)
4744                 return;
4745
4746         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4747                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
4748                 fill_xsave((u8 *) guest_xsave->region, vcpu);
4749         } else {
4750                 memcpy(guest_xsave->region,
4751                         &vcpu->arch.guest_fpu->state.fxsave,
4752                         sizeof(struct fxregs_state));
4753                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
4754                         XFEATURE_MASK_FPSSE;
4755         }
4756 }
4757
4758 #define XSAVE_MXCSR_OFFSET 24
4759
4760 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
4761                                         struct kvm_xsave *guest_xsave)
4762 {
4763         u64 xstate_bv;
4764         u32 mxcsr;
4765
4766         if (!vcpu->arch.guest_fpu)
4767                 return 0;
4768
4769         xstate_bv = *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
4770         mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
4771
4772         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4773                 /*
4774                  * Here we allow setting states that are not present in
4775                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
4776                  * with old userspace.
4777                  */
4778                 if (xstate_bv & ~supported_xcr0 || mxcsr & ~mxcsr_feature_mask)
4779                         return -EINVAL;
4780                 load_xsave(vcpu, (u8 *)guest_xsave->region);
4781         } else {
4782                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
4783                         mxcsr & ~mxcsr_feature_mask)
4784                         return -EINVAL;
4785                 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
4786                         guest_xsave->region, sizeof(struct fxregs_state));
4787         }
4788         return 0;
4789 }
4790
4791 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
4792                                         struct kvm_xcrs *guest_xcrs)
4793 {
4794         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
4795                 guest_xcrs->nr_xcrs = 0;
4796                 return;
4797         }
4798
4799         guest_xcrs->nr_xcrs = 1;
4800         guest_xcrs->flags = 0;
4801         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
4802         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
4803 }
4804
4805 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
4806                                        struct kvm_xcrs *guest_xcrs)
4807 {
4808         int i, r = 0;
4809
4810         if (!boot_cpu_has(X86_FEATURE_XSAVE))
4811                 return -EINVAL;
4812
4813         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
4814                 return -EINVAL;
4815
4816         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
4817                 /* Only support XCR0 currently */
4818                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
4819                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
4820                                 guest_xcrs->xcrs[i].value);
4821                         break;
4822                 }
4823         if (r)
4824                 r = -EINVAL;
4825         return r;
4826 }
4827
4828 /*
4829  * kvm_set_guest_paused() indicates to the guest kernel that it has been
4830  * stopped by the hypervisor.  This function will be called from the host only.
4831  * EINVAL is returned when the host attempts to set the flag for a guest that
4832  * does not support pv clocks.
4833  */
4834 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
4835 {
4836         if (!vcpu->arch.pv_time_enabled)
4837                 return -EINVAL;
4838         vcpu->arch.pvclock_set_guest_stopped_request = true;
4839         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4840         return 0;
4841 }
4842
4843 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
4844                                      struct kvm_enable_cap *cap)
4845 {
4846         int r;
4847         uint16_t vmcs_version;
4848         void __user *user_ptr;
4849
4850         if (cap->flags)
4851                 return -EINVAL;
4852
4853         switch (cap->cap) {
4854         case KVM_CAP_HYPERV_SYNIC2:
4855                 if (cap->args[0])
4856                         return -EINVAL;
4857                 fallthrough;
4858
4859         case KVM_CAP_HYPERV_SYNIC:
4860                 if (!irqchip_in_kernel(vcpu->kvm))
4861                         return -EINVAL;
4862                 return kvm_hv_activate_synic(vcpu, cap->cap ==
4863                                              KVM_CAP_HYPERV_SYNIC2);
4864         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4865                 if (!kvm_x86_ops.nested_ops->enable_evmcs)
4866                         return -ENOTTY;
4867                 r = kvm_x86_ops.nested_ops->enable_evmcs(vcpu, &vmcs_version);
4868                 if (!r) {
4869                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
4870                         if (copy_to_user(user_ptr, &vmcs_version,
4871                                          sizeof(vmcs_version)))
4872                                 r = -EFAULT;
4873                 }
4874                 return r;
4875         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4876                 if (!kvm_x86_ops.enable_direct_tlbflush)
4877                         return -ENOTTY;
4878
4879                 return static_call(kvm_x86_enable_direct_tlbflush)(vcpu);
4880
4881         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4882                 vcpu->arch.pv_cpuid.enforce = cap->args[0];
4883                 if (vcpu->arch.pv_cpuid.enforce)
4884                         kvm_update_pv_runtime(vcpu);
4885
4886                 return 0;
4887         default:
4888                 return -EINVAL;
4889         }
4890 }
4891
4892 long kvm_arch_vcpu_ioctl(struct file *filp,
4893                          unsigned int ioctl, unsigned long arg)
4894 {
4895         struct kvm_vcpu *vcpu = filp->private_data;
4896         void __user *argp = (void __user *)arg;
4897         int r;
4898         union {
4899                 struct kvm_lapic_state *lapic;
4900                 struct kvm_xsave *xsave;
4901                 struct kvm_xcrs *xcrs;
4902                 void *buffer;
4903         } u;
4904
4905         vcpu_load(vcpu);
4906
4907         u.buffer = NULL;
4908         switch (ioctl) {
4909         case KVM_GET_LAPIC: {
4910                 r = -EINVAL;
4911                 if (!lapic_in_kernel(vcpu))
4912                         goto out;
4913                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
4914                                 GFP_KERNEL_ACCOUNT);
4915
4916                 r = -ENOMEM;
4917                 if (!u.lapic)
4918                         goto out;
4919                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
4920                 if (r)
4921                         goto out;
4922                 r = -EFAULT;
4923                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
4924                         goto out;
4925                 r = 0;
4926                 break;
4927         }
4928         case KVM_SET_LAPIC: {
4929                 r = -EINVAL;
4930                 if (!lapic_in_kernel(vcpu))
4931                         goto out;
4932                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
4933                 if (IS_ERR(u.lapic)) {
4934                         r = PTR_ERR(u.lapic);
4935                         goto out_nofree;
4936                 }
4937
4938                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
4939                 break;
4940         }
4941         case KVM_INTERRUPT: {
4942                 struct kvm_interrupt irq;
4943
4944                 r = -EFAULT;
4945                 if (copy_from_user(&irq, argp, sizeof(irq)))
4946                         goto out;
4947                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
4948                 break;
4949         }
4950         case KVM_NMI: {
4951                 r = kvm_vcpu_ioctl_nmi(vcpu);
4952                 break;
4953         }
4954         case KVM_SMI: {
4955                 r = kvm_vcpu_ioctl_smi(vcpu);
4956                 break;
4957         }
4958         case KVM_SET_CPUID: {
4959                 struct kvm_cpuid __user *cpuid_arg = argp;
4960                 struct kvm_cpuid cpuid;
4961
4962                 r = -EFAULT;
4963                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4964                         goto out;
4965                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4966                 break;
4967         }
4968         case KVM_SET_CPUID2: {
4969                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4970                 struct kvm_cpuid2 cpuid;
4971
4972                 r = -EFAULT;
4973                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4974                         goto out;
4975                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
4976                                               cpuid_arg->entries);
4977                 break;
4978         }
4979         case KVM_GET_CPUID2: {
4980                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4981                 struct kvm_cpuid2 cpuid;
4982
4983                 r = -EFAULT;
4984                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4985                         goto out;
4986                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
4987                                               cpuid_arg->entries);
4988                 if (r)
4989                         goto out;
4990                 r = -EFAULT;
4991                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4992                         goto out;
4993                 r = 0;
4994                 break;
4995         }
4996         case KVM_GET_MSRS: {
4997                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4998                 r = msr_io(vcpu, argp, do_get_msr, 1);
4999                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5000                 break;
5001         }
5002         case KVM_SET_MSRS: {
5003                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5004                 r = msr_io(vcpu, argp, do_set_msr, 0);
5005                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5006                 break;
5007         }
5008         case KVM_TPR_ACCESS_REPORTING: {
5009                 struct kvm_tpr_access_ctl tac;
5010
5011                 r = -EFAULT;
5012                 if (copy_from_user(&tac, argp, sizeof(tac)))
5013                         goto out;
5014                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
5015                 if (r)
5016                         goto out;
5017                 r = -EFAULT;
5018                 if (copy_to_user(argp, &tac, sizeof(tac)))
5019                         goto out;
5020                 r = 0;
5021                 break;
5022         };
5023         case KVM_SET_VAPIC_ADDR: {
5024                 struct kvm_vapic_addr va;
5025                 int idx;
5026
5027                 r = -EINVAL;
5028                 if (!lapic_in_kernel(vcpu))
5029                         goto out;
5030                 r = -EFAULT;
5031                 if (copy_from_user(&va, argp, sizeof(va)))
5032                         goto out;
5033                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5034                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
5035                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5036                 break;
5037         }
5038         case KVM_X86_SETUP_MCE: {
5039                 u64 mcg_cap;
5040
5041                 r = -EFAULT;
5042                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
5043                         goto out;
5044                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
5045                 break;
5046         }
5047         case KVM_X86_SET_MCE: {
5048                 struct kvm_x86_mce mce;
5049
5050                 r = -EFAULT;
5051                 if (copy_from_user(&mce, argp, sizeof(mce)))
5052                         goto out;
5053                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
5054                 break;
5055         }
5056         case KVM_GET_VCPU_EVENTS: {
5057                 struct kvm_vcpu_events events;
5058
5059                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
5060
5061                 r = -EFAULT;
5062                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
5063                         break;
5064                 r = 0;
5065                 break;
5066         }
5067         case KVM_SET_VCPU_EVENTS: {
5068                 struct kvm_vcpu_events events;
5069
5070                 r = -EFAULT;
5071                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
5072                         break;
5073
5074                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
5075                 break;
5076         }
5077         case KVM_GET_DEBUGREGS: {
5078                 struct kvm_debugregs dbgregs;
5079
5080                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
5081
5082                 r = -EFAULT;
5083                 if (copy_to_user(argp, &dbgregs,
5084                                  sizeof(struct kvm_debugregs)))
5085                         break;
5086                 r = 0;
5087                 break;
5088         }
5089         case KVM_SET_DEBUGREGS: {
5090                 struct kvm_debugregs dbgregs;
5091
5092                 r = -EFAULT;
5093                 if (copy_from_user(&dbgregs, argp,
5094                                    sizeof(struct kvm_debugregs)))
5095                         break;
5096
5097                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
5098                 break;
5099         }
5100         case KVM_GET_XSAVE: {
5101                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
5102                 r = -ENOMEM;
5103                 if (!u.xsave)
5104                         break;
5105
5106                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
5107
5108                 r = -EFAULT;
5109                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
5110                         break;
5111                 r = 0;
5112                 break;
5113         }
5114         case KVM_SET_XSAVE: {
5115                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
5116                 if (IS_ERR(u.xsave)) {
5117                         r = PTR_ERR(u.xsave);
5118                         goto out_nofree;
5119                 }
5120
5121                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
5122                 break;
5123         }
5124         case KVM_GET_XCRS: {
5125                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
5126                 r = -ENOMEM;
5127                 if (!u.xcrs)
5128                         break;
5129
5130                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
5131
5132                 r = -EFAULT;
5133                 if (copy_to_user(argp, u.xcrs,
5134                                  sizeof(struct kvm_xcrs)))
5135                         break;
5136                 r = 0;
5137                 break;
5138         }
5139         case KVM_SET_XCRS: {
5140                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
5141                 if (IS_ERR(u.xcrs)) {
5142                         r = PTR_ERR(u.xcrs);
5143                         goto out_nofree;
5144                 }
5145
5146                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
5147                 break;
5148         }
5149         case KVM_SET_TSC_KHZ: {
5150                 u32 user_tsc_khz;
5151
5152                 r = -EINVAL;
5153                 user_tsc_khz = (u32)arg;
5154
5155                 if (kvm_has_tsc_control &&
5156                     user_tsc_khz >= kvm_max_guest_tsc_khz)
5157                         goto out;
5158
5159                 if (user_tsc_khz == 0)
5160                         user_tsc_khz = tsc_khz;
5161
5162                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
5163                         r = 0;
5164
5165                 goto out;
5166         }
5167         case KVM_GET_TSC_KHZ: {
5168                 r = vcpu->arch.virtual_tsc_khz;
5169                 goto out;
5170         }
5171         case KVM_KVMCLOCK_CTRL: {
5172                 r = kvm_set_guest_paused(vcpu);
5173                 goto out;
5174         }
5175         case KVM_ENABLE_CAP: {
5176                 struct kvm_enable_cap cap;
5177
5178                 r = -EFAULT;
5179                 if (copy_from_user(&cap, argp, sizeof(cap)))
5180                         goto out;
5181                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
5182                 break;
5183         }
5184         case KVM_GET_NESTED_STATE: {
5185                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5186                 u32 user_data_size;
5187
5188                 r = -EINVAL;
5189                 if (!kvm_x86_ops.nested_ops->get_state)
5190                         break;
5191
5192                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
5193                 r = -EFAULT;
5194                 if (get_user(user_data_size, &user_kvm_nested_state->size))
5195                         break;
5196
5197                 r = kvm_x86_ops.nested_ops->get_state(vcpu, user_kvm_nested_state,
5198                                                      user_data_size);
5199                 if (r < 0)
5200                         break;
5201
5202                 if (r > user_data_size) {
5203                         if (put_user(r, &user_kvm_nested_state->size))
5204                                 r = -EFAULT;
5205                         else
5206                                 r = -E2BIG;
5207                         break;
5208                 }
5209
5210                 r = 0;
5211                 break;
5212         }
5213         case KVM_SET_NESTED_STATE: {
5214                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5215                 struct kvm_nested_state kvm_state;
5216                 int idx;
5217
5218                 r = -EINVAL;
5219                 if (!kvm_x86_ops.nested_ops->set_state)
5220                         break;
5221
5222                 r = -EFAULT;
5223                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
5224                         break;
5225
5226                 r = -EINVAL;
5227                 if (kvm_state.size < sizeof(kvm_state))
5228                         break;
5229
5230                 if (kvm_state.flags &
5231                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
5232                       | KVM_STATE_NESTED_EVMCS | KVM_STATE_NESTED_MTF_PENDING
5233                       | KVM_STATE_NESTED_GIF_SET))
5234                         break;
5235
5236                 /* nested_run_pending implies guest_mode.  */
5237                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
5238                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
5239                         break;
5240
5241                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5242                 r = kvm_x86_ops.nested_ops->set_state(vcpu, user_kvm_nested_state, &kvm_state);
5243                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5244                 break;
5245         }
5246         case KVM_GET_SUPPORTED_HV_CPUID:
5247                 r = kvm_ioctl_get_supported_hv_cpuid(vcpu, argp);
5248                 break;
5249 #ifdef CONFIG_KVM_XEN
5250         case KVM_XEN_VCPU_GET_ATTR: {
5251                 struct kvm_xen_vcpu_attr xva;
5252
5253                 r = -EFAULT;
5254                 if (copy_from_user(&xva, argp, sizeof(xva)))
5255                         goto out;
5256                 r = kvm_xen_vcpu_get_attr(vcpu, &xva);
5257                 if (!r && copy_to_user(argp, &xva, sizeof(xva)))
5258                         r = -EFAULT;
5259                 break;
5260         }
5261         case KVM_XEN_VCPU_SET_ATTR: {
5262                 struct kvm_xen_vcpu_attr xva;
5263
5264                 r = -EFAULT;
5265                 if (copy_from_user(&xva, argp, sizeof(xva)))
5266                         goto out;
5267                 r = kvm_xen_vcpu_set_attr(vcpu, &xva);
5268                 break;
5269         }
5270 #endif
5271         default:
5272                 r = -EINVAL;
5273         }
5274 out:
5275         kfree(u.buffer);
5276 out_nofree:
5277         vcpu_put(vcpu);
5278         return r;
5279 }
5280
5281 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
5282 {
5283         return VM_FAULT_SIGBUS;
5284 }
5285
5286 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
5287 {
5288         int ret;
5289
5290         if (addr > (unsigned int)(-3 * PAGE_SIZE))
5291                 return -EINVAL;
5292         ret = static_call(kvm_x86_set_tss_addr)(kvm, addr);
5293         return ret;
5294 }
5295
5296 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
5297                                               u64 ident_addr)
5298 {
5299         return static_call(kvm_x86_set_identity_map_addr)(kvm, ident_addr);
5300 }
5301
5302 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
5303                                          unsigned long kvm_nr_mmu_pages)
5304 {
5305         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
5306                 return -EINVAL;
5307
5308         mutex_lock(&kvm->slots_lock);
5309
5310         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
5311         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
5312
5313         mutex_unlock(&kvm->slots_lock);
5314         return 0;
5315 }
5316
5317 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
5318 {
5319         return kvm->arch.n_max_mmu_pages;
5320 }
5321
5322 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5323 {
5324         struct kvm_pic *pic = kvm->arch.vpic;
5325         int r;
5326
5327         r = 0;
5328         switch (chip->chip_id) {
5329         case KVM_IRQCHIP_PIC_MASTER:
5330                 memcpy(&chip->chip.pic, &pic->pics[0],
5331                         sizeof(struct kvm_pic_state));
5332                 break;
5333         case KVM_IRQCHIP_PIC_SLAVE:
5334                 memcpy(&chip->chip.pic, &pic->pics[1],
5335                         sizeof(struct kvm_pic_state));
5336                 break;
5337         case KVM_IRQCHIP_IOAPIC:
5338                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
5339                 break;
5340         default:
5341                 r = -EINVAL;
5342                 break;
5343         }
5344         return r;
5345 }
5346
5347 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5348 {
5349         struct kvm_pic *pic = kvm->arch.vpic;
5350         int r;
5351
5352         r = 0;
5353         switch (chip->chip_id) {
5354         case KVM_IRQCHIP_PIC_MASTER:
5355                 spin_lock(&pic->lock);
5356                 memcpy(&pic->pics[0], &chip->chip.pic,
5357                         sizeof(struct kvm_pic_state));
5358                 spin_unlock(&pic->lock);
5359                 break;
5360         case KVM_IRQCHIP_PIC_SLAVE:
5361                 spin_lock(&pic->lock);
5362                 memcpy(&pic->pics[1], &chip->chip.pic,
5363                         sizeof(struct kvm_pic_state));
5364                 spin_unlock(&pic->lock);
5365                 break;
5366         case KVM_IRQCHIP_IOAPIC:
5367                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
5368                 break;
5369         default:
5370                 r = -EINVAL;
5371                 break;
5372         }
5373         kvm_pic_update_irq(pic);
5374         return r;
5375 }
5376
5377 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5378 {
5379         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
5380
5381         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
5382
5383         mutex_lock(&kps->lock);
5384         memcpy(ps, &kps->channels, sizeof(*ps));
5385         mutex_unlock(&kps->lock);
5386         return 0;
5387 }
5388
5389 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5390 {
5391         int i;
5392         struct kvm_pit *pit = kvm->arch.vpit;
5393
5394         mutex_lock(&pit->pit_state.lock);
5395         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
5396         for (i = 0; i < 3; i++)
5397                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
5398         mutex_unlock(&pit->pit_state.lock);
5399         return 0;
5400 }
5401
5402 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5403 {
5404         mutex_lock(&kvm->arch.vpit->pit_state.lock);
5405         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
5406                 sizeof(ps->channels));
5407         ps->flags = kvm->arch.vpit->pit_state.flags;
5408         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
5409         memset(&ps->reserved, 0, sizeof(ps->reserved));
5410         return 0;
5411 }
5412
5413 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5414 {
5415         int start = 0;
5416         int i;
5417         u32 prev_legacy, cur_legacy;
5418         struct kvm_pit *pit = kvm->arch.vpit;
5419
5420         mutex_lock(&pit->pit_state.lock);
5421         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
5422         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
5423         if (!prev_legacy && cur_legacy)
5424                 start = 1;
5425         memcpy(&pit->pit_state.channels, &ps->channels,
5426                sizeof(pit->pit_state.channels));
5427         pit->pit_state.flags = ps->flags;
5428         for (i = 0; i < 3; i++)
5429                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
5430                                    start && i == 0);
5431         mutex_unlock(&pit->pit_state.lock);
5432         return 0;
5433 }
5434
5435 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
5436                                  struct kvm_reinject_control *control)
5437 {
5438         struct kvm_pit *pit = kvm->arch.vpit;
5439
5440         /* pit->pit_state.lock was overloaded to prevent userspace from getting
5441          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5442          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
5443          */
5444         mutex_lock(&pit->pit_state.lock);
5445         kvm_pit_set_reinject(pit, control->pit_reinject);
5446         mutex_unlock(&pit->pit_state.lock);
5447
5448         return 0;
5449 }
5450
5451 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
5452 {
5453
5454         /*
5455          * Flush all CPUs' dirty log buffers to the  dirty_bitmap.  Called
5456          * before reporting dirty_bitmap to userspace.  KVM flushes the buffers
5457          * on all VM-Exits, thus we only need to kick running vCPUs to force a
5458          * VM-Exit.
5459          */
5460         struct kvm_vcpu *vcpu;
5461         int i;
5462
5463         kvm_for_each_vcpu(i, vcpu, kvm)
5464                 kvm_vcpu_kick(vcpu);
5465 }
5466
5467 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
5468                         bool line_status)
5469 {
5470         if (!irqchip_in_kernel(kvm))
5471                 return -ENXIO;
5472
5473         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
5474                                         irq_event->irq, irq_event->level,
5475                                         line_status);
5476         return 0;
5477 }
5478
5479 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
5480                             struct kvm_enable_cap *cap)
5481 {
5482         int r;
5483
5484         if (cap->flags)
5485                 return -EINVAL;
5486
5487         switch (cap->cap) {
5488         case KVM_CAP_DISABLE_QUIRKS:
5489                 kvm->arch.disabled_quirks = cap->args[0];
5490                 r = 0;
5491                 break;
5492         case KVM_CAP_SPLIT_IRQCHIP: {
5493                 mutex_lock(&kvm->lock);
5494                 r = -EINVAL;
5495                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
5496                         goto split_irqchip_unlock;
5497                 r = -EEXIST;
5498                 if (irqchip_in_kernel(kvm))
5499                         goto split_irqchip_unlock;
5500                 if (kvm->created_vcpus)
5501                         goto split_irqchip_unlock;
5502                 r = kvm_setup_empty_irq_routing(kvm);
5503                 if (r)
5504                         goto split_irqchip_unlock;
5505                 /* Pairs with irqchip_in_kernel. */
5506                 smp_wmb();
5507                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
5508                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
5509                 r = 0;
5510 split_irqchip_unlock:
5511                 mutex_unlock(&kvm->lock);
5512                 break;
5513         }
5514         case KVM_CAP_X2APIC_API:
5515                 r = -EINVAL;
5516                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
5517                         break;
5518
5519                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
5520                         kvm->arch.x2apic_format = true;
5521                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
5522                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
5523
5524                 r = 0;
5525                 break;
5526         case KVM_CAP_X86_DISABLE_EXITS:
5527                 r = -EINVAL;
5528                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
5529                         break;
5530
5531                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
5532                         kvm_can_mwait_in_guest())
5533                         kvm->arch.mwait_in_guest = true;
5534                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
5535                         kvm->arch.hlt_in_guest = true;
5536                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
5537                         kvm->arch.pause_in_guest = true;
5538                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
5539                         kvm->arch.cstate_in_guest = true;
5540                 r = 0;
5541                 break;
5542         case KVM_CAP_MSR_PLATFORM_INFO:
5543                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
5544                 r = 0;
5545                 break;
5546         case KVM_CAP_EXCEPTION_PAYLOAD:
5547                 kvm->arch.exception_payload_enabled = cap->args[0];
5548                 r = 0;
5549                 break;
5550         case KVM_CAP_X86_USER_SPACE_MSR:
5551                 kvm->arch.user_space_msr_mask = cap->args[0];
5552                 r = 0;
5553                 break;
5554         case KVM_CAP_X86_BUS_LOCK_EXIT:
5555                 r = -EINVAL;
5556                 if (cap->args[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE)
5557                         break;
5558
5559                 if ((cap->args[0] & KVM_BUS_LOCK_DETECTION_OFF) &&
5560                     (cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT))
5561                         break;
5562
5563                 if (kvm_has_bus_lock_exit &&
5564                     cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT)
5565                         kvm->arch.bus_lock_detection_enabled = true;
5566                 r = 0;
5567                 break;
5568 #ifdef CONFIG_X86_SGX_KVM
5569         case KVM_CAP_SGX_ATTRIBUTE: {
5570                 unsigned long allowed_attributes = 0;
5571
5572                 r = sgx_set_attribute(&allowed_attributes, cap->args[0]);
5573                 if (r)
5574                         break;
5575
5576                 /* KVM only supports the PROVISIONKEY privileged attribute. */
5577                 if ((allowed_attributes & SGX_ATTR_PROVISIONKEY) &&
5578                     !(allowed_attributes & ~SGX_ATTR_PROVISIONKEY))
5579                         kvm->arch.sgx_provisioning_allowed = true;
5580                 else
5581                         r = -EINVAL;
5582                 break;
5583         }
5584 #endif
5585         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
5586                 r = -EINVAL;
5587                 if (kvm_x86_ops.vm_copy_enc_context_from)
5588                         r = kvm_x86_ops.vm_copy_enc_context_from(kvm, cap->args[0]);
5589                 return r;
5590         default:
5591                 r = -EINVAL;
5592                 break;
5593         }
5594         return r;
5595 }
5596
5597 static struct kvm_x86_msr_filter *kvm_alloc_msr_filter(bool default_allow)
5598 {
5599         struct kvm_x86_msr_filter *msr_filter;
5600
5601         msr_filter = kzalloc(sizeof(*msr_filter), GFP_KERNEL_ACCOUNT);
5602         if (!msr_filter)
5603                 return NULL;
5604
5605         msr_filter->default_allow = default_allow;
5606         return msr_filter;
5607 }
5608
5609 static void kvm_free_msr_filter(struct kvm_x86_msr_filter *msr_filter)
5610 {
5611         u32 i;
5612
5613         if (!msr_filter)
5614                 return;
5615
5616         for (i = 0; i < msr_filter->count; i++)
5617                 kfree(msr_filter->ranges[i].bitmap);
5618
5619         kfree(msr_filter);
5620 }
5621
5622 static int kvm_add_msr_filter(struct kvm_x86_msr_filter *msr_filter,
5623                               struct kvm_msr_filter_range *user_range)
5624 {
5625         unsigned long *bitmap = NULL;
5626         size_t bitmap_size;
5627
5628         if (!user_range->nmsrs)
5629                 return 0;
5630
5631         if (user_range->flags & ~(KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE))
5632                 return -EINVAL;
5633
5634         if (!user_range->flags)
5635                 return -EINVAL;
5636
5637         bitmap_size = BITS_TO_LONGS(user_range->nmsrs) * sizeof(long);
5638         if (!bitmap_size || bitmap_size > KVM_MSR_FILTER_MAX_BITMAP_SIZE)
5639                 return -EINVAL;
5640
5641         bitmap = memdup_user((__user u8*)user_range->bitmap, bitmap_size);
5642         if (IS_ERR(bitmap))
5643                 return PTR_ERR(bitmap);
5644
5645         msr_filter->ranges[msr_filter->count] = (struct msr_bitmap_range) {
5646                 .flags = user_range->flags,
5647                 .base = user_range->base,
5648                 .nmsrs = user_range->nmsrs,
5649                 .bitmap = bitmap,
5650         };
5651
5652         msr_filter->count++;
5653         return 0;
5654 }
5655
5656 static int kvm_vm_ioctl_set_msr_filter(struct kvm *kvm, void __user *argp)
5657 {
5658         struct kvm_msr_filter __user *user_msr_filter = argp;
5659         struct kvm_x86_msr_filter *new_filter, *old_filter;
5660         struct kvm_msr_filter filter;
5661         bool default_allow;
5662         bool empty = true;
5663         int r = 0;
5664         u32 i;
5665
5666         if (copy_from_user(&filter, user_msr_filter, sizeof(filter)))
5667                 return -EFAULT;
5668
5669         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++)
5670                 empty &= !filter.ranges[i].nmsrs;
5671
5672         default_allow = !(filter.flags & KVM_MSR_FILTER_DEFAULT_DENY);
5673         if (empty && !default_allow)
5674                 return -EINVAL;
5675
5676         new_filter = kvm_alloc_msr_filter(default_allow);
5677         if (!new_filter)
5678                 return -ENOMEM;
5679
5680         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++) {
5681                 r = kvm_add_msr_filter(new_filter, &filter.ranges[i]);
5682                 if (r) {
5683                         kvm_free_msr_filter(new_filter);
5684                         return r;
5685                 }
5686         }
5687
5688         mutex_lock(&kvm->lock);
5689
5690         /* The per-VM filter is protected by kvm->lock... */
5691         old_filter = srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1);
5692
5693         rcu_assign_pointer(kvm->arch.msr_filter, new_filter);
5694         synchronize_srcu(&kvm->srcu);
5695
5696         kvm_free_msr_filter(old_filter);
5697
5698         kvm_make_all_cpus_request(kvm, KVM_REQ_MSR_FILTER_CHANGED);
5699         mutex_unlock(&kvm->lock);
5700
5701         return 0;
5702 }
5703
5704 long kvm_arch_vm_ioctl(struct file *filp,
5705                        unsigned int ioctl, unsigned long arg)
5706 {
5707         struct kvm *kvm = filp->private_data;
5708         void __user *argp = (void __user *)arg;
5709         int r = -ENOTTY;
5710         /*
5711          * This union makes it completely explicit to gcc-3.x
5712          * that these two variables' stack usage should be
5713          * combined, not added together.
5714          */
5715         union {
5716                 struct kvm_pit_state ps;
5717                 struct kvm_pit_state2 ps2;
5718                 struct kvm_pit_config pit_config;
5719         } u;
5720
5721         switch (ioctl) {
5722         case KVM_SET_TSS_ADDR:
5723                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
5724                 break;
5725         case KVM_SET_IDENTITY_MAP_ADDR: {
5726                 u64 ident_addr;
5727
5728                 mutex_lock(&kvm->lock);
5729                 r = -EINVAL;
5730                 if (kvm->created_vcpus)
5731                         goto set_identity_unlock;
5732                 r = -EFAULT;
5733                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
5734                         goto set_identity_unlock;
5735                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
5736 set_identity_unlock:
5737                 mutex_unlock(&kvm->lock);
5738                 break;
5739         }
5740         case KVM_SET_NR_MMU_PAGES:
5741                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
5742                 break;
5743         case KVM_GET_NR_MMU_PAGES:
5744                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
5745                 break;
5746         case KVM_CREATE_IRQCHIP: {
5747                 mutex_lock(&kvm->lock);
5748
5749                 r = -EEXIST;
5750                 if (irqchip_in_kernel(kvm))
5751                         goto create_irqchip_unlock;
5752
5753                 r = -EINVAL;
5754                 if (kvm->created_vcpus)
5755                         goto create_irqchip_unlock;
5756
5757                 r = kvm_pic_init(kvm);
5758                 if (r)
5759                         goto create_irqchip_unlock;
5760
5761                 r = kvm_ioapic_init(kvm);
5762                 if (r) {
5763                         kvm_pic_destroy(kvm);
5764                         goto create_irqchip_unlock;
5765                 }
5766
5767                 r = kvm_setup_default_irq_routing(kvm);
5768                 if (r) {
5769                         kvm_ioapic_destroy(kvm);
5770                         kvm_pic_destroy(kvm);
5771                         goto create_irqchip_unlock;
5772                 }
5773                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
5774                 smp_wmb();
5775                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
5776         create_irqchip_unlock:
5777                 mutex_unlock(&kvm->lock);
5778                 break;
5779         }
5780         case KVM_CREATE_PIT:
5781                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
5782                 goto create_pit;
5783         case KVM_CREATE_PIT2:
5784                 r = -EFAULT;
5785                 if (copy_from_user(&u.pit_config, argp,
5786                                    sizeof(struct kvm_pit_config)))
5787                         goto out;
5788         create_pit:
5789                 mutex_lock(&kvm->lock);
5790                 r = -EEXIST;
5791                 if (kvm->arch.vpit)
5792                         goto create_pit_unlock;
5793                 r = -ENOMEM;
5794                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
5795                 if (kvm->arch.vpit)
5796                         r = 0;
5797         create_pit_unlock:
5798                 mutex_unlock(&kvm->lock);
5799                 break;
5800         case KVM_GET_IRQCHIP: {
5801                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5802                 struct kvm_irqchip *chip;
5803
5804                 chip = memdup_user(argp, sizeof(*chip));
5805                 if (IS_ERR(chip)) {
5806                         r = PTR_ERR(chip);
5807                         goto out;
5808                 }
5809
5810                 r = -ENXIO;
5811                 if (!irqchip_kernel(kvm))
5812                         goto get_irqchip_out;
5813                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
5814                 if (r)
5815                         goto get_irqchip_out;
5816                 r = -EFAULT;
5817                 if (copy_to_user(argp, chip, sizeof(*chip)))
5818                         goto get_irqchip_out;
5819                 r = 0;
5820         get_irqchip_out:
5821                 kfree(chip);
5822                 break;
5823         }
5824         case KVM_SET_IRQCHIP: {
5825                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5826                 struct kvm_irqchip *chip;
5827
5828                 chip = memdup_user(argp, sizeof(*chip));
5829                 if (IS_ERR(chip)) {
5830                         r = PTR_ERR(chip);
5831                         goto out;
5832                 }
5833
5834                 r = -ENXIO;
5835                 if (!irqchip_kernel(kvm))
5836                         goto set_irqchip_out;
5837                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
5838         set_irqchip_out:
5839                 kfree(chip);
5840                 break;
5841         }
5842         case KVM_GET_PIT: {
5843                 r = -EFAULT;
5844                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
5845                         goto out;
5846                 r = -ENXIO;
5847                 if (!kvm->arch.vpit)
5848                         goto out;
5849                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
5850                 if (r)
5851                         goto out;
5852                 r = -EFAULT;
5853                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
5854                         goto out;
5855                 r = 0;
5856                 break;
5857         }
5858         case KVM_SET_PIT: {
5859                 r = -EFAULT;
5860                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
5861                         goto out;
5862                 mutex_lock(&kvm->lock);
5863                 r = -ENXIO;
5864                 if (!kvm->arch.vpit)
5865                         goto set_pit_out;
5866                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
5867 set_pit_out:
5868                 mutex_unlock(&kvm->lock);
5869                 break;
5870         }
5871         case KVM_GET_PIT2: {
5872                 r = -ENXIO;
5873                 if (!kvm->arch.vpit)
5874                         goto out;
5875                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
5876                 if (r)
5877                         goto out;
5878                 r = -EFAULT;
5879                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
5880                         goto out;
5881                 r = 0;
5882                 break;
5883         }
5884         case KVM_SET_PIT2: {
5885                 r = -EFAULT;
5886                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
5887                         goto out;
5888                 mutex_lock(&kvm->lock);
5889                 r = -ENXIO;
5890                 if (!kvm->arch.vpit)
5891                         goto set_pit2_out;
5892                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
5893 set_pit2_out:
5894                 mutex_unlock(&kvm->lock);
5895                 break;
5896         }
5897         case KVM_REINJECT_CONTROL: {
5898                 struct kvm_reinject_control control;
5899                 r =  -EFAULT;
5900                 if (copy_from_user(&control, argp, sizeof(control)))
5901                         goto out;
5902                 r = -ENXIO;
5903                 if (!kvm->arch.vpit)
5904                         goto out;
5905                 r = kvm_vm_ioctl_reinject(kvm, &control);
5906                 break;
5907         }
5908         case KVM_SET_BOOT_CPU_ID:
5909                 r = 0;
5910                 mutex_lock(&kvm->lock);
5911                 if (kvm->created_vcpus)
5912                         r = -EBUSY;
5913                 else
5914                         kvm->arch.bsp_vcpu_id = arg;
5915                 mutex_unlock(&kvm->lock);
5916                 break;
5917 #ifdef CONFIG_KVM_XEN
5918         case KVM_XEN_HVM_CONFIG: {
5919                 struct kvm_xen_hvm_config xhc;
5920                 r = -EFAULT;
5921                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
5922                         goto out;
5923                 r = kvm_xen_hvm_config(kvm, &xhc);
5924                 break;
5925         }
5926         case KVM_XEN_HVM_GET_ATTR: {
5927                 struct kvm_xen_hvm_attr xha;
5928
5929                 r = -EFAULT;
5930                 if (copy_from_user(&xha, argp, sizeof(xha)))
5931                         goto out;
5932                 r = kvm_xen_hvm_get_attr(kvm, &xha);
5933                 if (!r && copy_to_user(argp, &xha, sizeof(xha)))
5934                         r = -EFAULT;
5935                 break;
5936         }
5937         case KVM_XEN_HVM_SET_ATTR: {
5938                 struct kvm_xen_hvm_attr xha;
5939
5940                 r = -EFAULT;
5941                 if (copy_from_user(&xha, argp, sizeof(xha)))
5942                         goto out;
5943                 r = kvm_xen_hvm_set_attr(kvm, &xha);
5944                 break;
5945         }
5946 #endif
5947         case KVM_SET_CLOCK: {
5948                 struct kvm_arch *ka = &kvm->arch;
5949                 struct kvm_clock_data user_ns;
5950                 u64 now_ns;
5951
5952                 r = -EFAULT;
5953                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
5954                         goto out;
5955
5956                 r = -EINVAL;
5957                 if (user_ns.flags)
5958                         goto out;
5959
5960                 r = 0;
5961                 /*
5962                  * TODO: userspace has to take care of races with VCPU_RUN, so
5963                  * kvm_gen_update_masterclock() can be cut down to locked
5964                  * pvclock_update_vm_gtod_copy().
5965                  */
5966                 kvm_gen_update_masterclock(kvm);
5967
5968                 /*
5969                  * This pairs with kvm_guest_time_update(): when masterclock is
5970                  * in use, we use master_kernel_ns + kvmclock_offset to set
5971                  * unsigned 'system_time' so if we use get_kvmclock_ns() (which
5972                  * is slightly ahead) here we risk going negative on unsigned
5973                  * 'system_time' when 'user_ns.clock' is very small.
5974                  */
5975                 spin_lock_irq(&ka->pvclock_gtod_sync_lock);
5976                 if (kvm->arch.use_master_clock)
5977                         now_ns = ka->master_kernel_ns;
5978                 else
5979                         now_ns = get_kvmclock_base_ns();
5980                 ka->kvmclock_offset = user_ns.clock - now_ns;
5981                 spin_unlock_irq(&ka->pvclock_gtod_sync_lock);
5982
5983                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
5984                 break;
5985         }
5986         case KVM_GET_CLOCK: {
5987                 struct kvm_clock_data user_ns;
5988                 u64 now_ns;
5989
5990                 now_ns = get_kvmclock_ns(kvm);
5991                 user_ns.clock = now_ns;
5992                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
5993                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
5994
5995                 r = -EFAULT;
5996                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
5997                         goto out;
5998                 r = 0;
5999                 break;
6000         }
6001         case KVM_MEMORY_ENCRYPT_OP: {
6002                 r = -ENOTTY;
6003                 if (kvm_x86_ops.mem_enc_op)
6004                         r = static_call(kvm_x86_mem_enc_op)(kvm, argp);
6005                 break;
6006         }
6007         case KVM_MEMORY_ENCRYPT_REG_REGION: {
6008                 struct kvm_enc_region region;
6009
6010                 r = -EFAULT;
6011                 if (copy_from_user(&region, argp, sizeof(region)))
6012                         goto out;
6013
6014                 r = -ENOTTY;
6015                 if (kvm_x86_ops.mem_enc_reg_region)
6016                         r = static_call(kvm_x86_mem_enc_reg_region)(kvm, &region);
6017                 break;
6018         }
6019         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
6020                 struct kvm_enc_region region;
6021
6022                 r = -EFAULT;
6023                 if (copy_from_user(&region, argp, sizeof(region)))
6024                         goto out;
6025
6026                 r = -ENOTTY;
6027                 if (kvm_x86_ops.mem_enc_unreg_region)
6028                         r = static_call(kvm_x86_mem_enc_unreg_region)(kvm, &region);
6029                 break;
6030         }
6031         case KVM_HYPERV_EVENTFD: {
6032                 struct kvm_hyperv_eventfd hvevfd;
6033
6034                 r = -EFAULT;
6035                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
6036                         goto out;
6037                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
6038                 break;
6039         }
6040         case KVM_SET_PMU_EVENT_FILTER:
6041                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
6042                 break;
6043         case KVM_X86_SET_MSR_FILTER:
6044                 r = kvm_vm_ioctl_set_msr_filter(kvm, argp);
6045                 break;
6046         default:
6047                 r = -ENOTTY;
6048         }
6049 out:
6050         return r;
6051 }
6052
6053 static void kvm_init_msr_list(void)
6054 {
6055         struct x86_pmu_capability x86_pmu;
6056         u32 dummy[2];
6057         unsigned i;
6058
6059         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
6060                          "Please update the fixed PMCs in msrs_to_saved_all[]");
6061
6062         perf_get_x86_pmu_capability(&x86_pmu);
6063
6064         num_msrs_to_save = 0;
6065         num_emulated_msrs = 0;
6066         num_msr_based_features = 0;
6067
6068         for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
6069                 if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
6070                         continue;
6071
6072                 /*
6073                  * Even MSRs that are valid in the host may not be exposed
6074                  * to the guests in some cases.
6075                  */
6076                 switch (msrs_to_save_all[i]) {
6077                 case MSR_IA32_BNDCFGS:
6078                         if (!kvm_mpx_supported())
6079                                 continue;
6080                         break;
6081                 case MSR_TSC_AUX:
6082                         if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP) &&
6083                             !kvm_cpu_cap_has(X86_FEATURE_RDPID))
6084                                 continue;
6085                         break;
6086                 case MSR_IA32_UMWAIT_CONTROL:
6087                         if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG))
6088                                 continue;
6089                         break;
6090                 case MSR_IA32_RTIT_CTL:
6091                 case MSR_IA32_RTIT_STATUS:
6092                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT))
6093                                 continue;
6094                         break;
6095                 case MSR_IA32_RTIT_CR3_MATCH:
6096                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6097                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
6098                                 continue;
6099                         break;
6100                 case MSR_IA32_RTIT_OUTPUT_BASE:
6101                 case MSR_IA32_RTIT_OUTPUT_MASK:
6102                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6103                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
6104                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
6105                                 continue;
6106                         break;
6107                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
6108                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6109                                 msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
6110                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
6111                                 continue;
6112                         break;
6113                 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
6114                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
6115                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6116                                 continue;
6117                         break;
6118                 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
6119                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
6120                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6121                                 continue;
6122                         break;
6123                 default:
6124                         break;
6125                 }
6126
6127                 msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
6128         }
6129
6130         for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
6131                 if (!static_call(kvm_x86_has_emulated_msr)(NULL, emulated_msrs_all[i]))
6132                         continue;
6133
6134                 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
6135         }
6136
6137         for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
6138                 struct kvm_msr_entry msr;
6139
6140                 msr.index = msr_based_features_all[i];
6141                 if (kvm_get_msr_feature(&msr))
6142                         continue;
6143
6144                 msr_based_features[num_msr_based_features++] = msr_based_features_all[i];
6145         }
6146 }
6147
6148 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
6149                            const void *v)
6150 {
6151         int handled = 0;
6152         int n;
6153
6154         do {
6155                 n = min(len, 8);
6156                 if (!(lapic_in_kernel(vcpu) &&
6157                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
6158                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
6159                         break;
6160                 handled += n;
6161                 addr += n;
6162                 len -= n;
6163                 v += n;
6164         } while (len);
6165
6166         return handled;
6167 }
6168
6169 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
6170 {
6171         int handled = 0;
6172         int n;
6173
6174         do {
6175                 n = min(len, 8);
6176                 if (!(lapic_in_kernel(vcpu) &&
6177                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
6178                                          addr, n, v))
6179                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
6180                         break;
6181                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
6182                 handled += n;
6183                 addr += n;
6184                 len -= n;
6185                 v += n;
6186         } while (len);
6187
6188         return handled;
6189 }
6190
6191 static void kvm_set_segment(struct kvm_vcpu *vcpu,
6192                         struct kvm_segment *var, int seg)
6193 {
6194         static_call(kvm_x86_set_segment)(vcpu, var, seg);
6195 }
6196
6197 void kvm_get_segment(struct kvm_vcpu *vcpu,
6198                      struct kvm_segment *var, int seg)
6199 {
6200         static_call(kvm_x86_get_segment)(vcpu, var, seg);
6201 }
6202
6203 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
6204                            struct x86_exception *exception)
6205 {
6206         gpa_t t_gpa;
6207
6208         BUG_ON(!mmu_is_nested(vcpu));
6209
6210         /* NPT walks are always user-walks */
6211         access |= PFERR_USER_MASK;
6212         t_gpa  = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
6213
6214         return t_gpa;
6215 }
6216
6217 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
6218                               struct x86_exception *exception)
6219 {
6220         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6221         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6222 }
6223 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_read);
6224
6225  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
6226                                 struct x86_exception *exception)
6227 {
6228         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6229         access |= PFERR_FETCH_MASK;
6230         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6231 }
6232
6233 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
6234                                struct x86_exception *exception)
6235 {
6236         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6237         access |= PFERR_WRITE_MASK;
6238         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6239 }
6240 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_write);
6241
6242 /* uses this to access any guest's mapped memory without checking CPL */
6243 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
6244                                 struct x86_exception *exception)
6245 {
6246         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
6247 }
6248
6249 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6250                                       struct kvm_vcpu *vcpu, u32 access,
6251                                       struct x86_exception *exception)
6252 {
6253         void *data = val;
6254         int r = X86EMUL_CONTINUE;
6255
6256         while (bytes) {
6257                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
6258                                                             exception);
6259                 unsigned offset = addr & (PAGE_SIZE-1);
6260                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
6261                 int ret;
6262
6263                 if (gpa == UNMAPPED_GVA)
6264                         return X86EMUL_PROPAGATE_FAULT;
6265                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
6266                                                offset, toread);
6267                 if (ret < 0) {
6268                         r = X86EMUL_IO_NEEDED;
6269                         goto out;
6270                 }
6271
6272                 bytes -= toread;
6273                 data += toread;
6274                 addr += toread;
6275         }
6276 out:
6277         return r;
6278 }
6279
6280 /* used for instruction fetching */
6281 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
6282                                 gva_t addr, void *val, unsigned int bytes,
6283                                 struct x86_exception *exception)
6284 {
6285         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6286         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6287         unsigned offset;
6288         int ret;
6289
6290         /* Inline kvm_read_guest_virt_helper for speed.  */
6291         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
6292                                                     exception);
6293         if (unlikely(gpa == UNMAPPED_GVA))
6294                 return X86EMUL_PROPAGATE_FAULT;
6295
6296         offset = addr & (PAGE_SIZE-1);
6297         if (WARN_ON(offset + bytes > PAGE_SIZE))
6298                 bytes = (unsigned)PAGE_SIZE - offset;
6299         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
6300                                        offset, bytes);
6301         if (unlikely(ret < 0))
6302                 return X86EMUL_IO_NEEDED;
6303
6304         return X86EMUL_CONTINUE;
6305 }
6306
6307 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
6308                                gva_t addr, void *val, unsigned int bytes,
6309                                struct x86_exception *exception)
6310 {
6311         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6312
6313         /*
6314          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
6315          * is returned, but our callers are not ready for that and they blindly
6316          * call kvm_inject_page_fault.  Ensure that they at least do not leak
6317          * uninitialized kernel stack memory into cr2 and error code.
6318          */
6319         memset(exception, 0, sizeof(*exception));
6320         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
6321                                           exception);
6322 }
6323 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
6324
6325 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
6326                              gva_t addr, void *val, unsigned int bytes,
6327                              struct x86_exception *exception, bool system)
6328 {
6329         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6330         u32 access = 0;
6331
6332         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6333                 access |= PFERR_USER_MASK;
6334
6335         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
6336 }
6337
6338 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
6339                 unsigned long addr, void *val, unsigned int bytes)
6340 {
6341         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6342         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
6343
6344         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
6345 }
6346
6347 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6348                                       struct kvm_vcpu *vcpu, u32 access,
6349                                       struct x86_exception *exception)
6350 {
6351         void *data = val;
6352         int r = X86EMUL_CONTINUE;
6353
6354         while (bytes) {
6355                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
6356                                                              access,
6357                                                              exception);
6358                 unsigned offset = addr & (PAGE_SIZE-1);
6359                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
6360                 int ret;
6361
6362                 if (gpa == UNMAPPED_GVA)
6363                         return X86EMUL_PROPAGATE_FAULT;
6364                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
6365                 if (ret < 0) {
6366                         r = X86EMUL_IO_NEEDED;
6367                         goto out;
6368                 }
6369
6370                 bytes -= towrite;
6371                 data += towrite;
6372                 addr += towrite;
6373         }
6374 out:
6375         return r;
6376 }
6377
6378 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
6379                               unsigned int bytes, struct x86_exception *exception,
6380                               bool system)
6381 {
6382         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6383         u32 access = PFERR_WRITE_MASK;
6384
6385         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6386                 access |= PFERR_USER_MASK;
6387
6388         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6389                                            access, exception);
6390 }
6391
6392 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
6393                                 unsigned int bytes, struct x86_exception *exception)
6394 {
6395         /* kvm_write_guest_virt_system can pull in tons of pages. */
6396         vcpu->arch.l1tf_flush_l1d = true;
6397
6398         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6399                                            PFERR_WRITE_MASK, exception);
6400 }
6401 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
6402
6403 int handle_ud(struct kvm_vcpu *vcpu)
6404 {
6405         static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
6406         int emul_type = EMULTYPE_TRAP_UD;
6407         char sig[5]; /* ud2; .ascii "kvm" */
6408         struct x86_exception e;
6409
6410         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, NULL, 0)))
6411                 return 1;
6412
6413         if (force_emulation_prefix &&
6414             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
6415                                 sig, sizeof(sig), &e) == 0 &&
6416             memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
6417                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
6418                 emul_type = EMULTYPE_TRAP_UD_FORCED;
6419         }
6420
6421         return kvm_emulate_instruction(vcpu, emul_type);
6422 }
6423 EXPORT_SYMBOL_GPL(handle_ud);
6424
6425 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6426                             gpa_t gpa, bool write)
6427 {
6428         /* For APIC access vmexit */
6429         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6430                 return 1;
6431
6432         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
6433                 trace_vcpu_match_mmio(gva, gpa, write, true);
6434                 return 1;
6435         }
6436
6437         return 0;
6438 }
6439
6440 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6441                                 gpa_t *gpa, struct x86_exception *exception,
6442                                 bool write)
6443 {
6444         u32 access = ((static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0)
6445                 | (write ? PFERR_WRITE_MASK : 0);
6446
6447         /*
6448          * currently PKRU is only applied to ept enabled guest so
6449          * there is no pkey in EPT page table for L1 guest or EPT
6450          * shadow page table for L2 guest.
6451          */
6452         if (vcpu_match_mmio_gva(vcpu, gva)
6453             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
6454                                  vcpu->arch.mmio_access, 0, access)) {
6455                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
6456                                         (gva & (PAGE_SIZE - 1));
6457                 trace_vcpu_match_mmio(gva, *gpa, write, false);
6458                 return 1;
6459         }
6460
6461         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6462
6463         if (*gpa == UNMAPPED_GVA)
6464                 return -1;
6465
6466         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
6467 }
6468
6469 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
6470                         const void *val, int bytes)
6471 {
6472         int ret;
6473
6474         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
6475         if (ret < 0)
6476                 return 0;
6477         kvm_page_track_write(vcpu, gpa, val, bytes);
6478         return 1;
6479 }
6480
6481 struct read_write_emulator_ops {
6482         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
6483                                   int bytes);
6484         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
6485                                   void *val, int bytes);
6486         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6487                                int bytes, void *val);
6488         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6489                                     void *val, int bytes);
6490         bool write;
6491 };
6492
6493 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
6494 {
6495         if (vcpu->mmio_read_completed) {
6496                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
6497                                vcpu->mmio_fragments[0].gpa, val);
6498                 vcpu->mmio_read_completed = 0;
6499                 return 1;
6500         }
6501
6502         return 0;
6503 }
6504
6505 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6506                         void *val, int bytes)
6507 {
6508         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
6509 }
6510
6511 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6512                          void *val, int bytes)
6513 {
6514         return emulator_write_phys(vcpu, gpa, val, bytes);
6515 }
6516
6517 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
6518 {
6519         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
6520         return vcpu_mmio_write(vcpu, gpa, bytes, val);
6521 }
6522
6523 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6524                           void *val, int bytes)
6525 {
6526         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
6527         return X86EMUL_IO_NEEDED;
6528 }
6529
6530 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6531                            void *val, int bytes)
6532 {
6533         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
6534
6535         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
6536         return X86EMUL_CONTINUE;
6537 }
6538
6539 static const struct read_write_emulator_ops read_emultor = {
6540         .read_write_prepare = read_prepare,
6541         .read_write_emulate = read_emulate,
6542         .read_write_mmio = vcpu_mmio_read,
6543         .read_write_exit_mmio = read_exit_mmio,
6544 };
6545
6546 static const struct read_write_emulator_ops write_emultor = {
6547         .read_write_emulate = write_emulate,
6548         .read_write_mmio = write_mmio,
6549         .read_write_exit_mmio = write_exit_mmio,
6550         .write = true,
6551 };
6552
6553 static int emulator_read_write_onepage(unsigned long addr, void *val,
6554                                        unsigned int bytes,
6555                                        struct x86_exception *exception,
6556                                        struct kvm_vcpu *vcpu,
6557                                        const struct read_write_emulator_ops *ops)
6558 {
6559         gpa_t gpa;
6560         int handled, ret;
6561         bool write = ops->write;
6562         struct kvm_mmio_fragment *frag;
6563         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6564
6565         /*
6566          * If the exit was due to a NPF we may already have a GPA.
6567          * If the GPA is present, use it to avoid the GVA to GPA table walk.
6568          * Note, this cannot be used on string operations since string
6569          * operation using rep will only have the initial GPA from the NPF
6570          * occurred.
6571          */
6572         if (ctxt->gpa_available && emulator_can_use_gpa(ctxt) &&
6573             (addr & ~PAGE_MASK) == (ctxt->gpa_val & ~PAGE_MASK)) {
6574                 gpa = ctxt->gpa_val;
6575                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
6576         } else {
6577                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
6578                 if (ret < 0)
6579                         return X86EMUL_PROPAGATE_FAULT;
6580         }
6581
6582         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
6583                 return X86EMUL_CONTINUE;
6584
6585         /*
6586          * Is this MMIO handled locally?
6587          */
6588         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
6589         if (handled == bytes)
6590                 return X86EMUL_CONTINUE;
6591
6592         gpa += handled;
6593         bytes -= handled;
6594         val += handled;
6595
6596         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
6597         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
6598         frag->gpa = gpa;
6599         frag->data = val;
6600         frag->len = bytes;
6601         return X86EMUL_CONTINUE;
6602 }
6603
6604 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
6605                         unsigned long addr,
6606                         void *val, unsigned int bytes,
6607                         struct x86_exception *exception,
6608                         const struct read_write_emulator_ops *ops)
6609 {
6610         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6611         gpa_t gpa;
6612         int rc;
6613
6614         if (ops->read_write_prepare &&
6615                   ops->read_write_prepare(vcpu, val, bytes))
6616                 return X86EMUL_CONTINUE;
6617
6618         vcpu->mmio_nr_fragments = 0;
6619
6620         /* Crossing a page boundary? */
6621         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
6622                 int now;
6623
6624                 now = -addr & ~PAGE_MASK;
6625                 rc = emulator_read_write_onepage(addr, val, now, exception,
6626                                                  vcpu, ops);
6627
6628                 if (rc != X86EMUL_CONTINUE)
6629                         return rc;
6630                 addr += now;
6631                 if (ctxt->mode != X86EMUL_MODE_PROT64)
6632                         addr = (u32)addr;
6633                 val += now;
6634                 bytes -= now;
6635         }
6636
6637         rc = emulator_read_write_onepage(addr, val, bytes, exception,
6638                                          vcpu, ops);
6639         if (rc != X86EMUL_CONTINUE)
6640                 return rc;
6641
6642         if (!vcpu->mmio_nr_fragments)
6643                 return rc;
6644
6645         gpa = vcpu->mmio_fragments[0].gpa;
6646
6647         vcpu->mmio_needed = 1;
6648         vcpu->mmio_cur_fragment = 0;
6649
6650         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
6651         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
6652         vcpu->run->exit_reason = KVM_EXIT_MMIO;
6653         vcpu->run->mmio.phys_addr = gpa;
6654
6655         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
6656 }
6657
6658 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
6659                                   unsigned long addr,
6660                                   void *val,
6661                                   unsigned int bytes,
6662                                   struct x86_exception *exception)
6663 {
6664         return emulator_read_write(ctxt, addr, val, bytes,
6665                                    exception, &read_emultor);
6666 }
6667
6668 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
6669                             unsigned long addr,
6670                             const void *val,
6671                             unsigned int bytes,
6672                             struct x86_exception *exception)
6673 {
6674         return emulator_read_write(ctxt, addr, (void *)val, bytes,
6675                                    exception, &write_emultor);
6676 }
6677
6678 #define CMPXCHG_TYPE(t, ptr, old, new) \
6679         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
6680
6681 #ifdef CONFIG_X86_64
6682 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
6683 #else
6684 #  define CMPXCHG64(ptr, old, new) \
6685         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
6686 #endif
6687
6688 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
6689                                      unsigned long addr,
6690                                      const void *old,
6691                                      const void *new,
6692                                      unsigned int bytes,
6693                                      struct x86_exception *exception)
6694 {
6695         struct kvm_host_map map;
6696         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6697         u64 page_line_mask;
6698         gpa_t gpa;
6699         char *kaddr;
6700         bool exchanged;
6701
6702         /* guests cmpxchg8b have to be emulated atomically */
6703         if (bytes > 8 || (bytes & (bytes - 1)))
6704                 goto emul_write;
6705
6706         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
6707
6708         if (gpa == UNMAPPED_GVA ||
6709             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6710                 goto emul_write;
6711
6712         /*
6713          * Emulate the atomic as a straight write to avoid #AC if SLD is
6714          * enabled in the host and the access splits a cache line.
6715          */
6716         if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))
6717                 page_line_mask = ~(cache_line_size() - 1);
6718         else
6719                 page_line_mask = PAGE_MASK;
6720
6721         if (((gpa + bytes - 1) & page_line_mask) != (gpa & page_line_mask))
6722                 goto emul_write;
6723
6724         if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
6725                 goto emul_write;
6726
6727         kaddr = map.hva + offset_in_page(gpa);
6728
6729         switch (bytes) {
6730         case 1:
6731                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
6732                 break;
6733         case 2:
6734                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
6735                 break;
6736         case 4:
6737                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
6738                 break;
6739         case 8:
6740                 exchanged = CMPXCHG64(kaddr, old, new);
6741                 break;
6742         default:
6743                 BUG();
6744         }
6745
6746         kvm_vcpu_unmap(vcpu, &map, true);
6747
6748         if (!exchanged)
6749                 return X86EMUL_CMPXCHG_FAILED;
6750
6751         kvm_page_track_write(vcpu, gpa, new, bytes);
6752
6753         return X86EMUL_CONTINUE;
6754
6755 emul_write:
6756         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
6757
6758         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
6759 }
6760
6761 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
6762 {
6763         int r = 0, i;
6764
6765         for (i = 0; i < vcpu->arch.pio.count; i++) {
6766                 if (vcpu->arch.pio.in)
6767                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
6768                                             vcpu->arch.pio.size, pd);
6769                 else
6770                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
6771                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
6772                                              pd);
6773                 if (r)
6774                         break;
6775                 pd += vcpu->arch.pio.size;
6776         }
6777         return r;
6778 }
6779
6780 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
6781                                unsigned short port, void *val,
6782                                unsigned int count, bool in)
6783 {
6784         vcpu->arch.pio.port = port;
6785         vcpu->arch.pio.in = in;
6786         vcpu->arch.pio.count  = count;
6787         vcpu->arch.pio.size = size;
6788
6789         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
6790                 vcpu->arch.pio.count = 0;
6791                 return 1;
6792         }
6793
6794         vcpu->run->exit_reason = KVM_EXIT_IO;
6795         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
6796         vcpu->run->io.size = size;
6797         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
6798         vcpu->run->io.count = count;
6799         vcpu->run->io.port = port;
6800
6801         return 0;
6802 }
6803
6804 static int emulator_pio_in(struct kvm_vcpu *vcpu, int size,
6805                            unsigned short port, void *val, unsigned int count)
6806 {
6807         int ret;
6808
6809         if (vcpu->arch.pio.count)
6810                 goto data_avail;
6811
6812         memset(vcpu->arch.pio_data, 0, size * count);
6813
6814         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
6815         if (ret) {
6816 data_avail:
6817                 memcpy(val, vcpu->arch.pio_data, size * count);
6818                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
6819                 vcpu->arch.pio.count = 0;
6820                 return 1;
6821         }
6822
6823         return 0;
6824 }
6825
6826 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
6827                                     int size, unsigned short port, void *val,
6828                                     unsigned int count)
6829 {
6830         return emulator_pio_in(emul_to_vcpu(ctxt), size, port, val, count);
6831
6832 }
6833
6834 static int emulator_pio_out(struct kvm_vcpu *vcpu, int size,
6835                             unsigned short port, const void *val,
6836                             unsigned int count)
6837 {
6838         memcpy(vcpu->arch.pio_data, val, size * count);
6839         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
6840         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
6841 }
6842
6843 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
6844                                      int size, unsigned short port,
6845                                      const void *val, unsigned int count)
6846 {
6847         return emulator_pio_out(emul_to_vcpu(ctxt), size, port, val, count);
6848 }
6849
6850 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
6851 {
6852         return static_call(kvm_x86_get_segment_base)(vcpu, seg);
6853 }
6854
6855 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
6856 {
6857         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
6858 }
6859
6860 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
6861 {
6862         if (!need_emulate_wbinvd(vcpu))
6863                 return X86EMUL_CONTINUE;
6864
6865         if (static_call(kvm_x86_has_wbinvd_exit)()) {
6866                 int cpu = get_cpu();
6867
6868                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
6869                 on_each_cpu_mask(vcpu->arch.wbinvd_dirty_mask,
6870                                 wbinvd_ipi, NULL, 1);
6871                 put_cpu();
6872                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
6873         } else
6874                 wbinvd();
6875         return X86EMUL_CONTINUE;
6876 }
6877
6878 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
6879 {
6880         kvm_emulate_wbinvd_noskip(vcpu);
6881         return kvm_skip_emulated_instruction(vcpu);
6882 }
6883 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
6884
6885
6886
6887 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
6888 {
6889         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
6890 }
6891
6892 static void emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
6893                             unsigned long *dest)
6894 {
6895         kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
6896 }
6897
6898 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
6899                            unsigned long value)
6900 {
6901
6902         return kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
6903 }
6904
6905 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
6906 {
6907         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
6908 }
6909
6910 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
6911 {
6912         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6913         unsigned long value;
6914
6915         switch (cr) {
6916         case 0:
6917                 value = kvm_read_cr0(vcpu);
6918                 break;
6919         case 2:
6920                 value = vcpu->arch.cr2;
6921                 break;
6922         case 3:
6923                 value = kvm_read_cr3(vcpu);
6924                 break;
6925         case 4:
6926                 value = kvm_read_cr4(vcpu);
6927                 break;
6928         case 8:
6929                 value = kvm_get_cr8(vcpu);
6930                 break;
6931         default:
6932                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
6933                 return 0;
6934         }
6935
6936         return value;
6937 }
6938
6939 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
6940 {
6941         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6942         int res = 0;
6943
6944         switch (cr) {
6945         case 0:
6946                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
6947                 break;
6948         case 2:
6949                 vcpu->arch.cr2 = val;
6950                 break;
6951         case 3:
6952                 res = kvm_set_cr3(vcpu, val);
6953                 break;
6954         case 4:
6955                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
6956                 break;
6957         case 8:
6958                 res = kvm_set_cr8(vcpu, val);
6959                 break;
6960         default:
6961                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
6962                 res = -1;
6963         }
6964
6965         return res;
6966 }
6967
6968 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
6969 {
6970         return static_call(kvm_x86_get_cpl)(emul_to_vcpu(ctxt));
6971 }
6972
6973 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6974 {
6975         static_call(kvm_x86_get_gdt)(emul_to_vcpu(ctxt), dt);
6976 }
6977
6978 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6979 {
6980         static_call(kvm_x86_get_idt)(emul_to_vcpu(ctxt), dt);
6981 }
6982
6983 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6984 {
6985         static_call(kvm_x86_set_gdt)(emul_to_vcpu(ctxt), dt);
6986 }
6987
6988 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6989 {
6990         static_call(kvm_x86_set_idt)(emul_to_vcpu(ctxt), dt);
6991 }
6992
6993 static unsigned long emulator_get_cached_segment_base(
6994         struct x86_emulate_ctxt *ctxt, int seg)
6995 {
6996         return get_segment_base(emul_to_vcpu(ctxt), seg);
6997 }
6998
6999 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
7000                                  struct desc_struct *desc, u32 *base3,
7001                                  int seg)
7002 {
7003         struct kvm_segment var;
7004
7005         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
7006         *selector = var.selector;
7007
7008         if (var.unusable) {
7009                 memset(desc, 0, sizeof(*desc));
7010                 if (base3)
7011                         *base3 = 0;
7012                 return false;
7013         }
7014
7015         if (var.g)
7016                 var.limit >>= 12;
7017         set_desc_limit(desc, var.limit);
7018         set_desc_base(desc, (unsigned long)var.base);
7019 #ifdef CONFIG_X86_64
7020         if (base3)
7021                 *base3 = var.base >> 32;
7022 #endif
7023         desc->type = var.type;
7024         desc->s = var.s;
7025         desc->dpl = var.dpl;
7026         desc->p = var.present;
7027         desc->avl = var.avl;
7028         desc->l = var.l;
7029         desc->d = var.db;
7030         desc->g = var.g;
7031
7032         return true;
7033 }
7034
7035 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
7036                                  struct desc_struct *desc, u32 base3,
7037                                  int seg)
7038 {
7039         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7040         struct kvm_segment var;
7041
7042         var.selector = selector;
7043         var.base = get_desc_base(desc);
7044 #ifdef CONFIG_X86_64
7045         var.base |= ((u64)base3) << 32;
7046 #endif
7047         var.limit = get_desc_limit(desc);
7048         if (desc->g)
7049                 var.limit = (var.limit << 12) | 0xfff;
7050         var.type = desc->type;
7051         var.dpl = desc->dpl;
7052         var.db = desc->d;
7053         var.s = desc->s;
7054         var.l = desc->l;
7055         var.g = desc->g;
7056         var.avl = desc->avl;
7057         var.present = desc->p;
7058         var.unusable = !var.present;
7059         var.padding = 0;
7060
7061         kvm_set_segment(vcpu, &var, seg);
7062         return;
7063 }
7064
7065 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
7066                             u32 msr_index, u64 *pdata)
7067 {
7068         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7069         int r;
7070
7071         r = kvm_get_msr(vcpu, msr_index, pdata);
7072
7073         if (r && kvm_get_msr_user_space(vcpu, msr_index, r)) {
7074                 /* Bounce to user space */
7075                 return X86EMUL_IO_NEEDED;
7076         }
7077
7078         return r;
7079 }
7080
7081 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
7082                             u32 msr_index, u64 data)
7083 {
7084         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7085         int r;
7086
7087         r = kvm_set_msr(vcpu, msr_index, data);
7088
7089         if (r && kvm_set_msr_user_space(vcpu, msr_index, data, r)) {
7090                 /* Bounce to user space */
7091                 return X86EMUL_IO_NEEDED;
7092         }
7093
7094         return r;
7095 }
7096
7097 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
7098 {
7099         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7100
7101         return vcpu->arch.smbase;
7102 }
7103
7104 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
7105 {
7106         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7107
7108         vcpu->arch.smbase = smbase;
7109 }
7110
7111 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
7112                               u32 pmc)
7113 {
7114         return kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc);
7115 }
7116
7117 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
7118                              u32 pmc, u64 *pdata)
7119 {
7120         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
7121 }
7122
7123 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
7124 {
7125         emul_to_vcpu(ctxt)->arch.halt_request = 1;
7126 }
7127
7128 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
7129                               struct x86_instruction_info *info,
7130                               enum x86_intercept_stage stage)
7131 {
7132         return static_call(kvm_x86_check_intercept)(emul_to_vcpu(ctxt), info, stage,
7133                                             &ctxt->exception);
7134 }
7135
7136 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
7137                               u32 *eax, u32 *ebx, u32 *ecx, u32 *edx,
7138                               bool exact_only)
7139 {
7140         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, exact_only);
7141 }
7142
7143 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
7144 {
7145         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
7146 }
7147
7148 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
7149 {
7150         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
7151 }
7152
7153 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
7154 {
7155         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
7156 }
7157
7158 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
7159 {
7160         return kvm_register_read_raw(emul_to_vcpu(ctxt), reg);
7161 }
7162
7163 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
7164 {
7165         kvm_register_write_raw(emul_to_vcpu(ctxt), reg, val);
7166 }
7167
7168 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
7169 {
7170         static_call(kvm_x86_set_nmi_mask)(emul_to_vcpu(ctxt), masked);
7171 }
7172
7173 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
7174 {
7175         return emul_to_vcpu(ctxt)->arch.hflags;
7176 }
7177
7178 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
7179 {
7180         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7181
7182         vcpu->arch.hflags = emul_flags;
7183         kvm_mmu_reset_context(vcpu);
7184 }
7185
7186 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt,
7187                                   const char *smstate)
7188 {
7189         return static_call(kvm_x86_pre_leave_smm)(emul_to_vcpu(ctxt), smstate);
7190 }
7191
7192 static void emulator_post_leave_smm(struct x86_emulate_ctxt *ctxt)
7193 {
7194         kvm_smm_changed(emul_to_vcpu(ctxt));
7195 }
7196
7197 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
7198 {
7199         return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
7200 }
7201
7202 static const struct x86_emulate_ops emulate_ops = {
7203         .read_gpr            = emulator_read_gpr,
7204         .write_gpr           = emulator_write_gpr,
7205         .read_std            = emulator_read_std,
7206         .write_std           = emulator_write_std,
7207         .read_phys           = kvm_read_guest_phys_system,
7208         .fetch               = kvm_fetch_guest_virt,
7209         .read_emulated       = emulator_read_emulated,
7210         .write_emulated      = emulator_write_emulated,
7211         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
7212         .invlpg              = emulator_invlpg,
7213         .pio_in_emulated     = emulator_pio_in_emulated,
7214         .pio_out_emulated    = emulator_pio_out_emulated,
7215         .get_segment         = emulator_get_segment,
7216         .set_segment         = emulator_set_segment,
7217         .get_cached_segment_base = emulator_get_cached_segment_base,
7218         .get_gdt             = emulator_get_gdt,
7219         .get_idt             = emulator_get_idt,
7220         .set_gdt             = emulator_set_gdt,
7221         .set_idt             = emulator_set_idt,
7222         .get_cr              = emulator_get_cr,
7223         .set_cr              = emulator_set_cr,
7224         .cpl                 = emulator_get_cpl,
7225         .get_dr              = emulator_get_dr,
7226         .set_dr              = emulator_set_dr,
7227         .get_smbase          = emulator_get_smbase,
7228         .set_smbase          = emulator_set_smbase,
7229         .set_msr             = emulator_set_msr,
7230         .get_msr             = emulator_get_msr,
7231         .check_pmc           = emulator_check_pmc,
7232         .read_pmc            = emulator_read_pmc,
7233         .halt                = emulator_halt,
7234         .wbinvd              = emulator_wbinvd,
7235         .fix_hypercall       = emulator_fix_hypercall,
7236         .intercept           = emulator_intercept,
7237         .get_cpuid           = emulator_get_cpuid,
7238         .guest_has_long_mode = emulator_guest_has_long_mode,
7239         .guest_has_movbe     = emulator_guest_has_movbe,
7240         .guest_has_fxsr      = emulator_guest_has_fxsr,
7241         .set_nmi_mask        = emulator_set_nmi_mask,
7242         .get_hflags          = emulator_get_hflags,
7243         .set_hflags          = emulator_set_hflags,
7244         .pre_leave_smm       = emulator_pre_leave_smm,
7245         .post_leave_smm      = emulator_post_leave_smm,
7246         .set_xcr             = emulator_set_xcr,
7247 };
7248
7249 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
7250 {
7251         u32 int_shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
7252         /*
7253          * an sti; sti; sequence only disable interrupts for the first
7254          * instruction. So, if the last instruction, be it emulated or
7255          * not, left the system with the INT_STI flag enabled, it
7256          * means that the last instruction is an sti. We should not
7257          * leave the flag on in this case. The same goes for mov ss
7258          */
7259         if (int_shadow & mask)
7260                 mask = 0;
7261         if (unlikely(int_shadow || mask)) {
7262                 static_call(kvm_x86_set_interrupt_shadow)(vcpu, mask);
7263                 if (!mask)
7264                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7265         }
7266 }
7267
7268 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
7269 {
7270         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7271         if (ctxt->exception.vector == PF_VECTOR)
7272                 return kvm_inject_emulated_page_fault(vcpu, &ctxt->exception);
7273
7274         if (ctxt->exception.error_code_valid)
7275                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
7276                                       ctxt->exception.error_code);
7277         else
7278                 kvm_queue_exception(vcpu, ctxt->exception.vector);
7279         return false;
7280 }
7281
7282 static struct x86_emulate_ctxt *alloc_emulate_ctxt(struct kvm_vcpu *vcpu)
7283 {
7284         struct x86_emulate_ctxt *ctxt;
7285
7286         ctxt = kmem_cache_zalloc(x86_emulator_cache, GFP_KERNEL_ACCOUNT);
7287         if (!ctxt) {
7288                 pr_err("kvm: failed to allocate vcpu's emulator\n");
7289                 return NULL;
7290         }
7291
7292         ctxt->vcpu = vcpu;
7293         ctxt->ops = &emulate_ops;
7294         vcpu->arch.emulate_ctxt = ctxt;
7295
7296         return ctxt;
7297 }
7298
7299 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
7300 {
7301         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7302         int cs_db, cs_l;
7303
7304         static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
7305
7306         ctxt->gpa_available = false;
7307         ctxt->eflags = kvm_get_rflags(vcpu);
7308         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
7309
7310         ctxt->eip = kvm_rip_read(vcpu);
7311         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
7312                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
7313                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
7314                      cs_db                              ? X86EMUL_MODE_PROT32 :
7315                                                           X86EMUL_MODE_PROT16;
7316         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
7317         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
7318         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
7319
7320         ctxt->interruptibility = 0;
7321         ctxt->have_exception = false;
7322         ctxt->exception.vector = -1;
7323         ctxt->perm_ok = false;
7324
7325         init_decode_cache(ctxt);
7326         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7327 }
7328
7329 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
7330 {
7331         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7332         int ret;
7333
7334         init_emulate_ctxt(vcpu);
7335
7336         ctxt->op_bytes = 2;
7337         ctxt->ad_bytes = 2;
7338         ctxt->_eip = ctxt->eip + inc_eip;
7339         ret = emulate_int_real(ctxt, irq);
7340
7341         if (ret != X86EMUL_CONTINUE) {
7342                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
7343         } else {
7344                 ctxt->eip = ctxt->_eip;
7345                 kvm_rip_write(vcpu, ctxt->eip);
7346                 kvm_set_rflags(vcpu, ctxt->eflags);
7347         }
7348 }
7349 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
7350
7351 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
7352 {
7353         ++vcpu->stat.insn_emulation_fail;
7354         trace_kvm_emulate_insn_failed(vcpu);
7355
7356         if (emulation_type & EMULTYPE_VMWARE_GP) {
7357                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7358                 return 1;
7359         }
7360
7361         if (emulation_type & EMULTYPE_SKIP) {
7362                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7363                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
7364                 vcpu->run->internal.ndata = 0;
7365                 return 0;
7366         }
7367
7368         kvm_queue_exception(vcpu, UD_VECTOR);
7369
7370         if (!is_guest_mode(vcpu) && static_call(kvm_x86_get_cpl)(vcpu) == 0) {
7371                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7372                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
7373                 vcpu->run->internal.ndata = 0;
7374                 return 0;
7375         }
7376
7377         return 1;
7378 }
7379
7380 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7381                                   bool write_fault_to_shadow_pgtable,
7382                                   int emulation_type)
7383 {
7384         gpa_t gpa = cr2_or_gpa;
7385         kvm_pfn_t pfn;
7386
7387         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7388                 return false;
7389
7390         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7391             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7392                 return false;
7393
7394         if (!vcpu->arch.mmu->direct_map) {
7395                 /*
7396                  * Write permission should be allowed since only
7397                  * write access need to be emulated.
7398                  */
7399                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7400
7401                 /*
7402                  * If the mapping is invalid in guest, let cpu retry
7403                  * it to generate fault.
7404                  */
7405                 if (gpa == UNMAPPED_GVA)
7406                         return true;
7407         }
7408
7409         /*
7410          * Do not retry the unhandleable instruction if it faults on the
7411          * readonly host memory, otherwise it will goto a infinite loop:
7412          * retry instruction -> write #PF -> emulation fail -> retry
7413          * instruction -> ...
7414          */
7415         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
7416
7417         /*
7418          * If the instruction failed on the error pfn, it can not be fixed,
7419          * report the error to userspace.
7420          */
7421         if (is_error_noslot_pfn(pfn))
7422                 return false;
7423
7424         kvm_release_pfn_clean(pfn);
7425
7426         /* The instructions are well-emulated on direct mmu. */
7427         if (vcpu->arch.mmu->direct_map) {
7428                 unsigned int indirect_shadow_pages;
7429
7430                 write_lock(&vcpu->kvm->mmu_lock);
7431                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
7432                 write_unlock(&vcpu->kvm->mmu_lock);
7433
7434                 if (indirect_shadow_pages)
7435                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7436
7437                 return true;
7438         }
7439
7440         /*
7441          * if emulation was due to access to shadowed page table
7442          * and it failed try to unshadow page and re-enter the
7443          * guest to let CPU execute the instruction.
7444          */
7445         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7446
7447         /*
7448          * If the access faults on its page table, it can not
7449          * be fixed by unprotecting shadow page and it should
7450          * be reported to userspace.
7451          */
7452         return !write_fault_to_shadow_pgtable;
7453 }
7454
7455 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
7456                               gpa_t cr2_or_gpa,  int emulation_type)
7457 {
7458         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7459         unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
7460
7461         last_retry_eip = vcpu->arch.last_retry_eip;
7462         last_retry_addr = vcpu->arch.last_retry_addr;
7463
7464         /*
7465          * If the emulation is caused by #PF and it is non-page_table
7466          * writing instruction, it means the VM-EXIT is caused by shadow
7467          * page protected, we can zap the shadow page and retry this
7468          * instruction directly.
7469          *
7470          * Note: if the guest uses a non-page-table modifying instruction
7471          * on the PDE that points to the instruction, then we will unmap
7472          * the instruction and go to an infinite loop. So, we cache the
7473          * last retried eip and the last fault address, if we meet the eip
7474          * and the address again, we can break out of the potential infinite
7475          * loop.
7476          */
7477         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
7478
7479         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7480                 return false;
7481
7482         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7483             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7484                 return false;
7485
7486         if (x86_page_table_writing_insn(ctxt))
7487                 return false;
7488
7489         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
7490                 return false;
7491
7492         vcpu->arch.last_retry_eip = ctxt->eip;
7493         vcpu->arch.last_retry_addr = cr2_or_gpa;
7494
7495         if (!vcpu->arch.mmu->direct_map)
7496                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7497
7498         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7499
7500         return true;
7501 }
7502
7503 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
7504 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
7505
7506 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
7507 {
7508         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
7509                 /* This is a good place to trace that we are exiting SMM.  */
7510                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
7511
7512                 /* Process a latched INIT or SMI, if any.  */
7513                 kvm_make_request(KVM_REQ_EVENT, vcpu);
7514         }
7515
7516         kvm_mmu_reset_context(vcpu);
7517 }
7518
7519 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
7520                                 unsigned long *db)
7521 {
7522         u32 dr6 = 0;
7523         int i;
7524         u32 enable, rwlen;
7525
7526         enable = dr7;
7527         rwlen = dr7 >> 16;
7528         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
7529                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
7530                         dr6 |= (1 << i);
7531         return dr6;
7532 }
7533
7534 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
7535 {
7536         struct kvm_run *kvm_run = vcpu->run;
7537
7538         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
7539                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_ACTIVE_LOW;
7540                 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu);
7541                 kvm_run->debug.arch.exception = DB_VECTOR;
7542                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
7543                 return 0;
7544         }
7545         kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
7546         return 1;
7547 }
7548
7549 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
7550 {
7551         unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7552         int r;
7553
7554         r = static_call(kvm_x86_skip_emulated_instruction)(vcpu);
7555         if (unlikely(!r))
7556                 return 0;
7557
7558         /*
7559          * rflags is the old, "raw" value of the flags.  The new value has
7560          * not been saved yet.
7561          *
7562          * This is correct even for TF set by the guest, because "the
7563          * processor will not generate this exception after the instruction
7564          * that sets the TF flag".
7565          */
7566         if (unlikely(rflags & X86_EFLAGS_TF))
7567                 r = kvm_vcpu_do_singlestep(vcpu);
7568         return r;
7569 }
7570 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
7571
7572 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
7573 {
7574         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
7575             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
7576                 struct kvm_run *kvm_run = vcpu->run;
7577                 unsigned long eip = kvm_get_linear_rip(vcpu);
7578                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7579                                            vcpu->arch.guest_debug_dr7,
7580                                            vcpu->arch.eff_db);
7581
7582                 if (dr6 != 0) {
7583                         kvm_run->debug.arch.dr6 = dr6 | DR6_ACTIVE_LOW;
7584                         kvm_run->debug.arch.pc = eip;
7585                         kvm_run->debug.arch.exception = DB_VECTOR;
7586                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
7587                         *r = 0;
7588                         return true;
7589                 }
7590         }
7591
7592         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
7593             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
7594                 unsigned long eip = kvm_get_linear_rip(vcpu);
7595                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7596                                            vcpu->arch.dr7,
7597                                            vcpu->arch.db);
7598
7599                 if (dr6 != 0) {
7600                         kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
7601                         *r = 1;
7602                         return true;
7603                 }
7604         }
7605
7606         return false;
7607 }
7608
7609 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
7610 {
7611         switch (ctxt->opcode_len) {
7612         case 1:
7613                 switch (ctxt->b) {
7614                 case 0xe4:      /* IN */
7615                 case 0xe5:
7616                 case 0xec:
7617                 case 0xed:
7618                 case 0xe6:      /* OUT */
7619                 case 0xe7:
7620                 case 0xee:
7621                 case 0xef:
7622                 case 0x6c:      /* INS */
7623                 case 0x6d:
7624                 case 0x6e:      /* OUTS */
7625                 case 0x6f:
7626                         return true;
7627                 }
7628                 break;
7629         case 2:
7630                 switch (ctxt->b) {
7631                 case 0x33:      /* RDPMC */
7632                         return true;
7633                 }
7634                 break;
7635         }
7636
7637         return false;
7638 }
7639
7640 /*
7641  * Decode to be emulated instruction. Return EMULATION_OK if success.
7642  */
7643 int x86_decode_emulated_instruction(struct kvm_vcpu *vcpu, int emulation_type,
7644                                     void *insn, int insn_len)
7645 {
7646         int r = EMULATION_OK;
7647         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7648
7649         init_emulate_ctxt(vcpu);
7650
7651         /*
7652          * We will reenter on the same instruction since we do not set
7653          * complete_userspace_io. This does not handle watchpoints yet,
7654          * those would be handled in the emulate_ops.
7655          */
7656         if (!(emulation_type & EMULTYPE_SKIP) &&
7657             kvm_vcpu_check_breakpoint(vcpu, &r))
7658                 return r;
7659
7660         r = x86_decode_insn(ctxt, insn, insn_len, emulation_type);
7661
7662         trace_kvm_emulate_insn_start(vcpu);
7663         ++vcpu->stat.insn_emulation;
7664
7665         return r;
7666 }
7667 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction);
7668
7669 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7670                             int emulation_type, void *insn, int insn_len)
7671 {
7672         int r;
7673         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7674         bool writeback = true;
7675         bool write_fault_to_spt;
7676
7677         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, insn, insn_len)))
7678                 return 1;
7679
7680         vcpu->arch.l1tf_flush_l1d = true;
7681
7682         /*
7683          * Clear write_fault_to_shadow_pgtable here to ensure it is
7684          * never reused.
7685          */
7686         write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
7687         vcpu->arch.write_fault_to_shadow_pgtable = false;
7688
7689         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
7690                 kvm_clear_exception_queue(vcpu);
7691
7692                 r = x86_decode_emulated_instruction(vcpu, emulation_type,
7693                                                     insn, insn_len);
7694                 if (r != EMULATION_OK)  {
7695                         if ((emulation_type & EMULTYPE_TRAP_UD) ||
7696                             (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
7697                                 kvm_queue_exception(vcpu, UD_VECTOR);
7698                                 return 1;
7699                         }
7700                         if (reexecute_instruction(vcpu, cr2_or_gpa,
7701                                                   write_fault_to_spt,
7702                                                   emulation_type))
7703                                 return 1;
7704                         if (ctxt->have_exception) {
7705                                 /*
7706                                  * #UD should result in just EMULATION_FAILED, and trap-like
7707                                  * exception should not be encountered during decode.
7708                                  */
7709                                 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
7710                                              exception_type(ctxt->exception.vector) == EXCPT_TRAP);
7711                                 inject_emulated_exception(vcpu);
7712                                 return 1;
7713                         }
7714                         return handle_emulation_failure(vcpu, emulation_type);
7715                 }
7716         }
7717
7718         if ((emulation_type & EMULTYPE_VMWARE_GP) &&
7719             !is_vmware_backdoor_opcode(ctxt)) {
7720                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7721                 return 1;
7722         }
7723
7724         /*
7725          * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
7726          * for kvm_skip_emulated_instruction().  The caller is responsible for
7727          * updating interruptibility state and injecting single-step #DBs.
7728          */
7729         if (emulation_type & EMULTYPE_SKIP) {
7730                 kvm_rip_write(vcpu, ctxt->_eip);
7731                 if (ctxt->eflags & X86_EFLAGS_RF)
7732                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
7733                 return 1;
7734         }
7735
7736         if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
7737                 return 1;
7738
7739         /* this is needed for vmware backdoor interface to work since it
7740            changes registers values  during IO operation */
7741         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
7742                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7743                 emulator_invalidate_register_cache(ctxt);
7744         }
7745
7746 restart:
7747         if (emulation_type & EMULTYPE_PF) {
7748                 /* Save the faulting GPA (cr2) in the address field */
7749                 ctxt->exception.address = cr2_or_gpa;
7750
7751                 /* With shadow page tables, cr2 contains a GVA or nGPA. */
7752                 if (vcpu->arch.mmu->direct_map) {
7753                         ctxt->gpa_available = true;
7754                         ctxt->gpa_val = cr2_or_gpa;
7755                 }
7756         } else {
7757                 /* Sanitize the address out of an abundance of paranoia. */
7758                 ctxt->exception.address = 0;
7759         }
7760
7761         r = x86_emulate_insn(ctxt);
7762
7763         if (r == EMULATION_INTERCEPTED)
7764                 return 1;
7765
7766         if (r == EMULATION_FAILED) {
7767                 if (reexecute_instruction(vcpu, cr2_or_gpa, write_fault_to_spt,
7768                                         emulation_type))
7769                         return 1;
7770
7771                 return handle_emulation_failure(vcpu, emulation_type);
7772         }
7773
7774         if (ctxt->have_exception) {
7775                 r = 1;
7776                 if (inject_emulated_exception(vcpu))
7777                         return r;
7778         } else if (vcpu->arch.pio.count) {
7779                 if (!vcpu->arch.pio.in) {
7780                         /* FIXME: return into emulator if single-stepping.  */
7781                         vcpu->arch.pio.count = 0;
7782                 } else {
7783                         writeback = false;
7784                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
7785                 }
7786                 r = 0;
7787         } else if (vcpu->mmio_needed) {
7788                 ++vcpu->stat.mmio_exits;
7789
7790                 if (!vcpu->mmio_is_write)
7791                         writeback = false;
7792                 r = 0;
7793                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7794         } else if (r == EMULATION_RESTART)
7795                 goto restart;
7796         else
7797                 r = 1;
7798
7799         if (writeback) {
7800                 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7801                 toggle_interruptibility(vcpu, ctxt->interruptibility);
7802                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7803                 if (!ctxt->have_exception ||
7804                     exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
7805                         kvm_rip_write(vcpu, ctxt->eip);
7806                         if (r && (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
7807                                 r = kvm_vcpu_do_singlestep(vcpu);
7808                         if (kvm_x86_ops.update_emulated_instruction)
7809                                 static_call(kvm_x86_update_emulated_instruction)(vcpu);
7810                         __kvm_set_rflags(vcpu, ctxt->eflags);
7811                 }
7812
7813                 /*
7814                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
7815                  * do nothing, and it will be requested again as soon as
7816                  * the shadow expires.  But we still need to check here,
7817                  * because POPF has no interrupt shadow.
7818                  */
7819                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
7820                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7821         } else
7822                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
7823
7824         return r;
7825 }
7826
7827 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
7828 {
7829         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
7830 }
7831 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
7832
7833 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
7834                                         void *insn, int insn_len)
7835 {
7836         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
7837 }
7838 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
7839
7840 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
7841 {
7842         vcpu->arch.pio.count = 0;
7843         return 1;
7844 }
7845
7846 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
7847 {
7848         vcpu->arch.pio.count = 0;
7849
7850         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
7851                 return 1;
7852
7853         return kvm_skip_emulated_instruction(vcpu);
7854 }
7855
7856 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
7857                             unsigned short port)
7858 {
7859         unsigned long val = kvm_rax_read(vcpu);
7860         int ret = emulator_pio_out(vcpu, size, port, &val, 1);
7861
7862         if (ret)
7863                 return ret;
7864
7865         /*
7866          * Workaround userspace that relies on old KVM behavior of %rip being
7867          * incremented prior to exiting to userspace to handle "OUT 0x7e".
7868          */
7869         if (port == 0x7e &&
7870             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
7871                 vcpu->arch.complete_userspace_io =
7872                         complete_fast_pio_out_port_0x7e;
7873                 kvm_skip_emulated_instruction(vcpu);
7874         } else {
7875                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
7876                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
7877         }
7878         return 0;
7879 }
7880
7881 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
7882 {
7883         unsigned long val;
7884
7885         /* We should only ever be called with arch.pio.count equal to 1 */
7886         BUG_ON(vcpu->arch.pio.count != 1);
7887
7888         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
7889                 vcpu->arch.pio.count = 0;
7890                 return 1;
7891         }
7892
7893         /* For size less than 4 we merge, else we zero extend */
7894         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
7895
7896         /*
7897          * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
7898          * the copy and tracing
7899          */
7900         emulator_pio_in(vcpu, vcpu->arch.pio.size, vcpu->arch.pio.port, &val, 1);
7901         kvm_rax_write(vcpu, val);
7902
7903         return kvm_skip_emulated_instruction(vcpu);
7904 }
7905
7906 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
7907                            unsigned short port)
7908 {
7909         unsigned long val;
7910         int ret;
7911
7912         /* For size less than 4 we merge, else we zero extend */
7913         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
7914
7915         ret = emulator_pio_in(vcpu, size, port, &val, 1);
7916         if (ret) {
7917                 kvm_rax_write(vcpu, val);
7918                 return ret;
7919         }
7920
7921         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
7922         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
7923
7924         return 0;
7925 }
7926
7927 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
7928 {
7929         int ret;
7930
7931         if (in)
7932                 ret = kvm_fast_pio_in(vcpu, size, port);
7933         else
7934                 ret = kvm_fast_pio_out(vcpu, size, port);
7935         return ret && kvm_skip_emulated_instruction(vcpu);
7936 }
7937 EXPORT_SYMBOL_GPL(kvm_fast_pio);
7938
7939 static int kvmclock_cpu_down_prep(unsigned int cpu)
7940 {
7941         __this_cpu_write(cpu_tsc_khz, 0);
7942         return 0;
7943 }
7944
7945 static void tsc_khz_changed(void *data)
7946 {
7947         struct cpufreq_freqs *freq = data;
7948         unsigned long khz = 0;
7949
7950         if (data)
7951                 khz = freq->new;
7952         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
7953                 khz = cpufreq_quick_get(raw_smp_processor_id());
7954         if (!khz)
7955                 khz = tsc_khz;
7956         __this_cpu_write(cpu_tsc_khz, khz);
7957 }
7958
7959 #ifdef CONFIG_X86_64
7960 static void kvm_hyperv_tsc_notifier(void)
7961 {
7962         struct kvm *kvm;
7963         struct kvm_vcpu *vcpu;
7964         int cpu;
7965         unsigned long flags;
7966
7967         mutex_lock(&kvm_lock);
7968         list_for_each_entry(kvm, &vm_list, vm_list)
7969                 kvm_make_mclock_inprogress_request(kvm);
7970
7971         hyperv_stop_tsc_emulation();
7972
7973         /* TSC frequency always matches when on Hyper-V */
7974         for_each_present_cpu(cpu)
7975                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
7976         kvm_max_guest_tsc_khz = tsc_khz;
7977
7978         list_for_each_entry(kvm, &vm_list, vm_list) {
7979                 struct kvm_arch *ka = &kvm->arch;
7980
7981                 spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
7982                 pvclock_update_vm_gtod_copy(kvm);
7983                 spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
7984
7985                 kvm_for_each_vcpu(cpu, vcpu, kvm)
7986                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7987
7988                 kvm_for_each_vcpu(cpu, vcpu, kvm)
7989                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
7990         }
7991         mutex_unlock(&kvm_lock);
7992 }
7993 #endif
7994
7995 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
7996 {
7997         struct kvm *kvm;
7998         struct kvm_vcpu *vcpu;
7999         int i, send_ipi = 0;
8000
8001         /*
8002          * We allow guests to temporarily run on slowing clocks,
8003          * provided we notify them after, or to run on accelerating
8004          * clocks, provided we notify them before.  Thus time never
8005          * goes backwards.
8006          *
8007          * However, we have a problem.  We can't atomically update
8008          * the frequency of a given CPU from this function; it is
8009          * merely a notifier, which can be called from any CPU.
8010          * Changing the TSC frequency at arbitrary points in time
8011          * requires a recomputation of local variables related to
8012          * the TSC for each VCPU.  We must flag these local variables
8013          * to be updated and be sure the update takes place with the
8014          * new frequency before any guests proceed.
8015          *
8016          * Unfortunately, the combination of hotplug CPU and frequency
8017          * change creates an intractable locking scenario; the order
8018          * of when these callouts happen is undefined with respect to
8019          * CPU hotplug, and they can race with each other.  As such,
8020          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
8021          * undefined; you can actually have a CPU frequency change take
8022          * place in between the computation of X and the setting of the
8023          * variable.  To protect against this problem, all updates of
8024          * the per_cpu tsc_khz variable are done in an interrupt
8025          * protected IPI, and all callers wishing to update the value
8026          * must wait for a synchronous IPI to complete (which is trivial
8027          * if the caller is on the CPU already).  This establishes the
8028          * necessary total order on variable updates.
8029          *
8030          * Note that because a guest time update may take place
8031          * anytime after the setting of the VCPU's request bit, the
8032          * correct TSC value must be set before the request.  However,
8033          * to ensure the update actually makes it to any guest which
8034          * starts running in hardware virtualization between the set
8035          * and the acquisition of the spinlock, we must also ping the
8036          * CPU after setting the request bit.
8037          *
8038          */
8039
8040         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8041
8042         mutex_lock(&kvm_lock);
8043         list_for_each_entry(kvm, &vm_list, vm_list) {
8044                 kvm_for_each_vcpu(i, vcpu, kvm) {
8045                         if (vcpu->cpu != cpu)
8046                                 continue;
8047                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8048                         if (vcpu->cpu != raw_smp_processor_id())
8049                                 send_ipi = 1;
8050                 }
8051         }
8052         mutex_unlock(&kvm_lock);
8053
8054         if (freq->old < freq->new && send_ipi) {
8055                 /*
8056                  * We upscale the frequency.  Must make the guest
8057                  * doesn't see old kvmclock values while running with
8058                  * the new frequency, otherwise we risk the guest sees
8059                  * time go backwards.
8060                  *
8061                  * In case we update the frequency for another cpu
8062                  * (which might be in guest context) send an interrupt
8063                  * to kick the cpu out of guest context.  Next time
8064                  * guest context is entered kvmclock will be updated,
8065                  * so the guest will not see stale values.
8066                  */
8067                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8068         }
8069 }
8070
8071 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
8072                                      void *data)
8073 {
8074         struct cpufreq_freqs *freq = data;
8075         int cpu;
8076
8077         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
8078                 return 0;
8079         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
8080                 return 0;
8081
8082         for_each_cpu(cpu, freq->policy->cpus)
8083                 __kvmclock_cpufreq_notifier(freq, cpu);
8084
8085         return 0;
8086 }
8087
8088 static struct notifier_block kvmclock_cpufreq_notifier_block = {
8089         .notifier_call  = kvmclock_cpufreq_notifier
8090 };
8091
8092 static int kvmclock_cpu_online(unsigned int cpu)
8093 {
8094         tsc_khz_changed(NULL);
8095         return 0;
8096 }
8097
8098 static void kvm_timer_init(void)
8099 {
8100         max_tsc_khz = tsc_khz;
8101
8102         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
8103 #ifdef CONFIG_CPU_FREQ
8104                 struct cpufreq_policy *policy;
8105                 int cpu;
8106
8107                 cpu = get_cpu();
8108                 policy = cpufreq_cpu_get(cpu);
8109                 if (policy) {
8110                         if (policy->cpuinfo.max_freq)
8111                                 max_tsc_khz = policy->cpuinfo.max_freq;
8112                         cpufreq_cpu_put(policy);
8113                 }
8114                 put_cpu();
8115 #endif
8116                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
8117                                           CPUFREQ_TRANSITION_NOTIFIER);
8118         }
8119
8120         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
8121                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
8122 }
8123
8124 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
8125 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
8126
8127 int kvm_is_in_guest(void)
8128 {
8129         return __this_cpu_read(current_vcpu) != NULL;
8130 }
8131
8132 static int kvm_is_user_mode(void)
8133 {
8134         int user_mode = 3;
8135
8136         if (__this_cpu_read(current_vcpu))
8137                 user_mode = static_call(kvm_x86_get_cpl)(__this_cpu_read(current_vcpu));
8138
8139         return user_mode != 0;
8140 }
8141
8142 static unsigned long kvm_get_guest_ip(void)
8143 {
8144         unsigned long ip = 0;
8145
8146         if (__this_cpu_read(current_vcpu))
8147                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
8148
8149         return ip;
8150 }
8151
8152 static void kvm_handle_intel_pt_intr(void)
8153 {
8154         struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
8155
8156         kvm_make_request(KVM_REQ_PMI, vcpu);
8157         __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
8158                         (unsigned long *)&vcpu->arch.pmu.global_status);
8159 }
8160
8161 static struct perf_guest_info_callbacks kvm_guest_cbs = {
8162         .is_in_guest            = kvm_is_in_guest,
8163         .is_user_mode           = kvm_is_user_mode,
8164         .get_guest_ip           = kvm_get_guest_ip,
8165         .handle_intel_pt_intr   = kvm_handle_intel_pt_intr,
8166 };
8167
8168 #ifdef CONFIG_X86_64
8169 static void pvclock_gtod_update_fn(struct work_struct *work)
8170 {
8171         struct kvm *kvm;
8172
8173         struct kvm_vcpu *vcpu;
8174         int i;
8175
8176         mutex_lock(&kvm_lock);
8177         list_for_each_entry(kvm, &vm_list, vm_list)
8178                 kvm_for_each_vcpu(i, vcpu, kvm)
8179                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
8180         atomic_set(&kvm_guest_has_master_clock, 0);
8181         mutex_unlock(&kvm_lock);
8182 }
8183
8184 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
8185
8186 /*
8187  * Indirection to move queue_work() out of the tk_core.seq write held
8188  * region to prevent possible deadlocks against time accessors which
8189  * are invoked with work related locks held.
8190  */
8191 static void pvclock_irq_work_fn(struct irq_work *w)
8192 {
8193         queue_work(system_long_wq, &pvclock_gtod_work);
8194 }
8195
8196 static DEFINE_IRQ_WORK(pvclock_irq_work, pvclock_irq_work_fn);
8197
8198 /*
8199  * Notification about pvclock gtod data update.
8200  */
8201 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
8202                                void *priv)
8203 {
8204         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
8205         struct timekeeper *tk = priv;
8206
8207         update_pvclock_gtod(tk);
8208
8209         /*
8210          * Disable master clock if host does not trust, or does not use,
8211          * TSC based clocksource. Delegate queue_work() to irq_work as
8212          * this is invoked with tk_core.seq write held.
8213          */
8214         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
8215             atomic_read(&kvm_guest_has_master_clock) != 0)
8216                 irq_work_queue(&pvclock_irq_work);
8217         return 0;
8218 }
8219
8220 static struct notifier_block pvclock_gtod_notifier = {
8221         .notifier_call = pvclock_gtod_notify,
8222 };
8223 #endif
8224
8225 int kvm_arch_init(void *opaque)
8226 {
8227         struct kvm_x86_init_ops *ops = opaque;
8228         int r;
8229
8230         if (kvm_x86_ops.hardware_enable) {
8231                 printk(KERN_ERR "kvm: already loaded the other module\n");
8232                 r = -EEXIST;
8233                 goto out;
8234         }
8235
8236         if (!ops->cpu_has_kvm_support()) {
8237                 pr_err_ratelimited("kvm: no hardware support\n");
8238                 r = -EOPNOTSUPP;
8239                 goto out;
8240         }
8241         if (ops->disabled_by_bios()) {
8242                 pr_err_ratelimited("kvm: disabled by bios\n");
8243                 r = -EOPNOTSUPP;
8244                 goto out;
8245         }
8246
8247         /*
8248          * KVM explicitly assumes that the guest has an FPU and
8249          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
8250          * vCPU's FPU state as a fxregs_state struct.
8251          */
8252         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
8253                 printk(KERN_ERR "kvm: inadequate fpu\n");
8254                 r = -EOPNOTSUPP;
8255                 goto out;
8256         }
8257
8258         r = -ENOMEM;
8259         x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
8260                                           __alignof__(struct fpu), SLAB_ACCOUNT,
8261                                           NULL);
8262         if (!x86_fpu_cache) {
8263                 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
8264                 goto out;
8265         }
8266
8267         x86_emulator_cache = kvm_alloc_emulator_cache();
8268         if (!x86_emulator_cache) {
8269                 pr_err("kvm: failed to allocate cache for x86 emulator\n");
8270                 goto out_free_x86_fpu_cache;
8271         }
8272
8273         user_return_msrs = alloc_percpu(struct kvm_user_return_msrs);
8274         if (!user_return_msrs) {
8275                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_user_return_msrs\n");
8276                 goto out_free_x86_emulator_cache;
8277         }
8278         kvm_nr_uret_msrs = 0;
8279
8280         r = kvm_mmu_module_init();
8281         if (r)
8282                 goto out_free_percpu;
8283
8284         kvm_timer_init();
8285
8286         perf_register_guest_info_callbacks(&kvm_guest_cbs);
8287
8288         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
8289                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
8290                 supported_xcr0 = host_xcr0 & KVM_SUPPORTED_XCR0;
8291         }
8292
8293         if (pi_inject_timer == -1)
8294                 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
8295 #ifdef CONFIG_X86_64
8296         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
8297
8298         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8299                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
8300 #endif
8301
8302         return 0;
8303
8304 out_free_percpu:
8305         free_percpu(user_return_msrs);
8306 out_free_x86_emulator_cache:
8307         kmem_cache_destroy(x86_emulator_cache);
8308 out_free_x86_fpu_cache:
8309         kmem_cache_destroy(x86_fpu_cache);
8310 out:
8311         return r;
8312 }
8313
8314 void kvm_arch_exit(void)
8315 {
8316 #ifdef CONFIG_X86_64
8317         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8318                 clear_hv_tscchange_cb();
8319 #endif
8320         kvm_lapic_exit();
8321         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
8322
8323         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8324                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
8325                                             CPUFREQ_TRANSITION_NOTIFIER);
8326         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
8327 #ifdef CONFIG_X86_64
8328         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
8329         irq_work_sync(&pvclock_irq_work);
8330         cancel_work_sync(&pvclock_gtod_work);
8331 #endif
8332         kvm_x86_ops.hardware_enable = NULL;
8333         kvm_mmu_module_exit();
8334         free_percpu(user_return_msrs);
8335         kmem_cache_destroy(x86_emulator_cache);
8336         kmem_cache_destroy(x86_fpu_cache);
8337 #ifdef CONFIG_KVM_XEN
8338         static_key_deferred_flush(&kvm_xen_enabled);
8339         WARN_ON(static_branch_unlikely(&kvm_xen_enabled.key));
8340 #endif
8341 }
8342
8343 static int __kvm_vcpu_halt(struct kvm_vcpu *vcpu, int state, int reason)
8344 {
8345         ++vcpu->stat.halt_exits;
8346         if (lapic_in_kernel(vcpu)) {
8347                 vcpu->arch.mp_state = state;
8348                 return 1;
8349         } else {
8350                 vcpu->run->exit_reason = reason;
8351                 return 0;
8352         }
8353 }
8354
8355 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
8356 {
8357         return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_HALTED, KVM_EXIT_HLT);
8358 }
8359 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
8360
8361 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
8362 {
8363         int ret = kvm_skip_emulated_instruction(vcpu);
8364         /*
8365          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
8366          * KVM_EXIT_DEBUG here.
8367          */
8368         return kvm_vcpu_halt(vcpu) && ret;
8369 }
8370 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
8371
8372 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu)
8373 {
8374         int ret = kvm_skip_emulated_instruction(vcpu);
8375
8376         return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_AP_RESET_HOLD, KVM_EXIT_AP_RESET_HOLD) && ret;
8377 }
8378 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold);
8379
8380 #ifdef CONFIG_X86_64
8381 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
8382                                 unsigned long clock_type)
8383 {
8384         struct kvm_clock_pairing clock_pairing;
8385         struct timespec64 ts;
8386         u64 cycle;
8387         int ret;
8388
8389         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
8390                 return -KVM_EOPNOTSUPP;
8391
8392         if (!kvm_get_walltime_and_clockread(&ts, &cycle))
8393                 return -KVM_EOPNOTSUPP;
8394
8395         clock_pairing.sec = ts.tv_sec;
8396         clock_pairing.nsec = ts.tv_nsec;
8397         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
8398         clock_pairing.flags = 0;
8399         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
8400
8401         ret = 0;
8402         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
8403                             sizeof(struct kvm_clock_pairing)))
8404                 ret = -KVM_EFAULT;
8405
8406         return ret;
8407 }
8408 #endif
8409
8410 /*
8411  * kvm_pv_kick_cpu_op:  Kick a vcpu.
8412  *
8413  * @apicid - apicid of vcpu to be kicked.
8414  */
8415 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
8416 {
8417         struct kvm_lapic_irq lapic_irq;
8418
8419         lapic_irq.shorthand = APIC_DEST_NOSHORT;
8420         lapic_irq.dest_mode = APIC_DEST_PHYSICAL;
8421         lapic_irq.level = 0;
8422         lapic_irq.dest_id = apicid;
8423         lapic_irq.msi_redir_hint = false;
8424
8425         lapic_irq.delivery_mode = APIC_DM_REMRD;
8426         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
8427 }
8428
8429 bool kvm_apicv_activated(struct kvm *kvm)
8430 {
8431         return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
8432 }
8433 EXPORT_SYMBOL_GPL(kvm_apicv_activated);
8434
8435 void kvm_apicv_init(struct kvm *kvm, bool enable)
8436 {
8437         if (enable)
8438                 clear_bit(APICV_INHIBIT_REASON_DISABLE,
8439                           &kvm->arch.apicv_inhibit_reasons);
8440         else
8441                 set_bit(APICV_INHIBIT_REASON_DISABLE,
8442                         &kvm->arch.apicv_inhibit_reasons);
8443 }
8444 EXPORT_SYMBOL_GPL(kvm_apicv_init);
8445
8446 static void kvm_sched_yield(struct kvm_vcpu *vcpu, unsigned long dest_id)
8447 {
8448         struct kvm_vcpu *target = NULL;
8449         struct kvm_apic_map *map;
8450
8451         vcpu->stat.directed_yield_attempted++;
8452
8453         if (single_task_running())
8454                 goto no_yield;
8455
8456         rcu_read_lock();
8457         map = rcu_dereference(vcpu->kvm->arch.apic_map);
8458
8459         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
8460                 target = map->phys_map[dest_id]->vcpu;
8461
8462         rcu_read_unlock();
8463
8464         if (!target || !READ_ONCE(target->ready))
8465                 goto no_yield;
8466
8467         /* Ignore requests to yield to self */
8468         if (vcpu == target)
8469                 goto no_yield;
8470
8471         if (kvm_vcpu_yield_to(target) <= 0)
8472                 goto no_yield;
8473
8474         vcpu->stat.directed_yield_successful++;
8475
8476 no_yield:
8477         return;
8478 }
8479
8480 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
8481 {
8482         unsigned long nr, a0, a1, a2, a3, ret;
8483         int op_64_bit;
8484
8485         if (kvm_xen_hypercall_enabled(vcpu->kvm))
8486                 return kvm_xen_hypercall(vcpu);
8487
8488         if (kvm_hv_hypercall_enabled(vcpu))
8489                 return kvm_hv_hypercall(vcpu);
8490
8491         nr = kvm_rax_read(vcpu);
8492         a0 = kvm_rbx_read(vcpu);
8493         a1 = kvm_rcx_read(vcpu);
8494         a2 = kvm_rdx_read(vcpu);
8495         a3 = kvm_rsi_read(vcpu);
8496
8497         trace_kvm_hypercall(nr, a0, a1, a2, a3);
8498
8499         op_64_bit = is_64_bit_mode(vcpu);
8500         if (!op_64_bit) {
8501                 nr &= 0xFFFFFFFF;
8502                 a0 &= 0xFFFFFFFF;
8503                 a1 &= 0xFFFFFFFF;
8504                 a2 &= 0xFFFFFFFF;
8505                 a3 &= 0xFFFFFFFF;
8506         }
8507
8508         if (static_call(kvm_x86_get_cpl)(vcpu) != 0) {
8509                 ret = -KVM_EPERM;
8510                 goto out;
8511         }
8512
8513         ret = -KVM_ENOSYS;
8514
8515         switch (nr) {
8516         case KVM_HC_VAPIC_POLL_IRQ:
8517                 ret = 0;
8518                 break;
8519         case KVM_HC_KICK_CPU:
8520                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_UNHALT))
8521                         break;
8522
8523                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
8524                 kvm_sched_yield(vcpu, a1);
8525                 ret = 0;
8526                 break;
8527 #ifdef CONFIG_X86_64
8528         case KVM_HC_CLOCK_PAIRING:
8529                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
8530                 break;
8531 #endif
8532         case KVM_HC_SEND_IPI:
8533                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SEND_IPI))
8534                         break;
8535
8536                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
8537                 break;
8538         case KVM_HC_SCHED_YIELD:
8539                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SCHED_YIELD))
8540                         break;
8541
8542                 kvm_sched_yield(vcpu, a0);
8543                 ret = 0;
8544                 break;
8545         default:
8546                 ret = -KVM_ENOSYS;
8547                 break;
8548         }
8549 out:
8550         if (!op_64_bit)
8551                 ret = (u32)ret;
8552         kvm_rax_write(vcpu, ret);
8553
8554         ++vcpu->stat.hypercalls;
8555         return kvm_skip_emulated_instruction(vcpu);
8556 }
8557 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
8558
8559 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
8560 {
8561         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8562         char instruction[3];
8563         unsigned long rip = kvm_rip_read(vcpu);
8564
8565         static_call(kvm_x86_patch_hypercall)(vcpu, instruction);
8566
8567         return emulator_write_emulated(ctxt, rip, instruction, 3,
8568                 &ctxt->exception);
8569 }
8570
8571 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
8572 {
8573         return vcpu->run->request_interrupt_window &&
8574                 likely(!pic_in_kernel(vcpu->kvm));
8575 }
8576
8577 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
8578 {
8579         struct kvm_run *kvm_run = vcpu->run;
8580
8581         /*
8582          * if_flag is obsolete and useless, so do not bother
8583          * setting it for SEV-ES guests.  Userspace can just
8584          * use kvm_run->ready_for_interrupt_injection.
8585          */
8586         kvm_run->if_flag = !vcpu->arch.guest_state_protected
8587                 && (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
8588
8589         kvm_run->cr8 = kvm_get_cr8(vcpu);
8590         kvm_run->apic_base = kvm_get_apic_base(vcpu);
8591         kvm_run->ready_for_interrupt_injection =
8592                 pic_in_kernel(vcpu->kvm) ||
8593                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
8594
8595         if (is_smm(vcpu))
8596                 kvm_run->flags |= KVM_RUN_X86_SMM;
8597 }
8598
8599 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
8600 {
8601         int max_irr, tpr;
8602
8603         if (!kvm_x86_ops.update_cr8_intercept)
8604                 return;
8605
8606         if (!lapic_in_kernel(vcpu))
8607                 return;
8608
8609         if (vcpu->arch.apicv_active)
8610                 return;
8611
8612         if (!vcpu->arch.apic->vapic_addr)
8613                 max_irr = kvm_lapic_find_highest_irr(vcpu);
8614         else
8615                 max_irr = -1;
8616
8617         if (max_irr != -1)
8618                 max_irr >>= 4;
8619
8620         tpr = kvm_lapic_get_cr8(vcpu);
8621
8622         static_call(kvm_x86_update_cr8_intercept)(vcpu, tpr, max_irr);
8623 }
8624
8625
8626 int kvm_check_nested_events(struct kvm_vcpu *vcpu)
8627 {
8628         if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
8629                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
8630                 return 1;
8631         }
8632
8633         return kvm_x86_ops.nested_ops->check_events(vcpu);
8634 }
8635
8636 static void kvm_inject_exception(struct kvm_vcpu *vcpu)
8637 {
8638         if (vcpu->arch.exception.error_code && !is_protmode(vcpu))
8639                 vcpu->arch.exception.error_code = false;
8640         static_call(kvm_x86_queue_exception)(vcpu);
8641 }
8642
8643 static int inject_pending_event(struct kvm_vcpu *vcpu, bool *req_immediate_exit)
8644 {
8645         int r;
8646         bool can_inject = true;
8647
8648         /* try to reinject previous events if any */
8649
8650         if (vcpu->arch.exception.injected) {
8651                 kvm_inject_exception(vcpu);
8652                 can_inject = false;
8653         }
8654         /*
8655          * Do not inject an NMI or interrupt if there is a pending
8656          * exception.  Exceptions and interrupts are recognized at
8657          * instruction boundaries, i.e. the start of an instruction.
8658          * Trap-like exceptions, e.g. #DB, have higher priority than
8659          * NMIs and interrupts, i.e. traps are recognized before an
8660          * NMI/interrupt that's pending on the same instruction.
8661          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
8662          * priority, but are only generated (pended) during instruction
8663          * execution, i.e. a pending fault-like exception means the
8664          * fault occurred on the *previous* instruction and must be
8665          * serviced prior to recognizing any new events in order to
8666          * fully complete the previous instruction.
8667          */
8668         else if (!vcpu->arch.exception.pending) {
8669                 if (vcpu->arch.nmi_injected) {
8670                         static_call(kvm_x86_set_nmi)(vcpu);
8671                         can_inject = false;
8672                 } else if (vcpu->arch.interrupt.injected) {
8673                         static_call(kvm_x86_set_irq)(vcpu);
8674                         can_inject = false;
8675                 }
8676         }
8677
8678         WARN_ON_ONCE(vcpu->arch.exception.injected &&
8679                      vcpu->arch.exception.pending);
8680
8681         /*
8682          * Call check_nested_events() even if we reinjected a previous event
8683          * in order for caller to determine if it should require immediate-exit
8684          * from L2 to L1 due to pending L1 events which require exit
8685          * from L2 to L1.
8686          */
8687         if (is_guest_mode(vcpu)) {
8688                 r = kvm_check_nested_events(vcpu);
8689                 if (r < 0)
8690                         goto out;
8691         }
8692
8693         /* try to inject new event if pending */
8694         if (vcpu->arch.exception.pending) {
8695                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
8696                                         vcpu->arch.exception.has_error_code,
8697                                         vcpu->arch.exception.error_code);
8698
8699                 vcpu->arch.exception.pending = false;
8700                 vcpu->arch.exception.injected = true;
8701
8702                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
8703                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
8704                                              X86_EFLAGS_RF);
8705
8706                 if (vcpu->arch.exception.nr == DB_VECTOR) {
8707                         kvm_deliver_exception_payload(vcpu);
8708                         if (vcpu->arch.dr7 & DR7_GD) {
8709                                 vcpu->arch.dr7 &= ~DR7_GD;
8710                                 kvm_update_dr7(vcpu);
8711                         }
8712                 }
8713
8714                 kvm_inject_exception(vcpu);
8715                 can_inject = false;
8716         }
8717
8718         /*
8719          * Finally, inject interrupt events.  If an event cannot be injected
8720          * due to architectural conditions (e.g. IF=0) a window-open exit
8721          * will re-request KVM_REQ_EVENT.  Sometimes however an event is pending
8722          * and can architecturally be injected, but we cannot do it right now:
8723          * an interrupt could have arrived just now and we have to inject it
8724          * as a vmexit, or there could already an event in the queue, which is
8725          * indicated by can_inject.  In that case we request an immediate exit
8726          * in order to make progress and get back here for another iteration.
8727          * The kvm_x86_ops hooks communicate this by returning -EBUSY.
8728          */
8729         if (vcpu->arch.smi_pending) {
8730                 r = can_inject ? static_call(kvm_x86_smi_allowed)(vcpu, true) : -EBUSY;
8731                 if (r < 0)
8732                         goto out;
8733                 if (r) {
8734                         vcpu->arch.smi_pending = false;
8735                         ++vcpu->arch.smi_count;
8736                         enter_smm(vcpu);
8737                         can_inject = false;
8738                 } else
8739                         static_call(kvm_x86_enable_smi_window)(vcpu);
8740         }
8741
8742         if (vcpu->arch.nmi_pending) {
8743                 r = can_inject ? static_call(kvm_x86_nmi_allowed)(vcpu, true) : -EBUSY;
8744                 if (r < 0)
8745                         goto out;
8746                 if (r) {
8747                         --vcpu->arch.nmi_pending;
8748                         vcpu->arch.nmi_injected = true;
8749                         static_call(kvm_x86_set_nmi)(vcpu);
8750                         can_inject = false;
8751                         WARN_ON(static_call(kvm_x86_nmi_allowed)(vcpu, true) < 0);
8752                 }
8753                 if (vcpu->arch.nmi_pending)
8754                         static_call(kvm_x86_enable_nmi_window)(vcpu);
8755         }
8756
8757         if (kvm_cpu_has_injectable_intr(vcpu)) {
8758                 r = can_inject ? static_call(kvm_x86_interrupt_allowed)(vcpu, true) : -EBUSY;
8759                 if (r < 0)
8760                         goto out;
8761                 if (r) {
8762                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu), false);
8763                         static_call(kvm_x86_set_irq)(vcpu);
8764                         WARN_ON(static_call(kvm_x86_interrupt_allowed)(vcpu, true) < 0);
8765                 }
8766                 if (kvm_cpu_has_injectable_intr(vcpu))
8767                         static_call(kvm_x86_enable_irq_window)(vcpu);
8768         }
8769
8770         if (is_guest_mode(vcpu) &&
8771             kvm_x86_ops.nested_ops->hv_timer_pending &&
8772             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
8773                 *req_immediate_exit = true;
8774
8775         WARN_ON(vcpu->arch.exception.pending);
8776         return 0;
8777
8778 out:
8779         if (r == -EBUSY) {
8780                 *req_immediate_exit = true;
8781                 r = 0;
8782         }
8783         return r;
8784 }
8785
8786 static void process_nmi(struct kvm_vcpu *vcpu)
8787 {
8788         unsigned limit = 2;
8789
8790         /*
8791          * x86 is limited to one NMI running, and one NMI pending after it.
8792          * If an NMI is already in progress, limit further NMIs to just one.
8793          * Otherwise, allow two (and we'll inject the first one immediately).
8794          */
8795         if (static_call(kvm_x86_get_nmi_mask)(vcpu) || vcpu->arch.nmi_injected)
8796                 limit = 1;
8797
8798         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
8799         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
8800         kvm_make_request(KVM_REQ_EVENT, vcpu);
8801 }
8802
8803 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
8804 {
8805         u32 flags = 0;
8806         flags |= seg->g       << 23;
8807         flags |= seg->db      << 22;
8808         flags |= seg->l       << 21;
8809         flags |= seg->avl     << 20;
8810         flags |= seg->present << 15;
8811         flags |= seg->dpl     << 13;
8812         flags |= seg->s       << 12;
8813         flags |= seg->type    << 8;
8814         return flags;
8815 }
8816
8817 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
8818 {
8819         struct kvm_segment seg;
8820         int offset;
8821
8822         kvm_get_segment(vcpu, &seg, n);
8823         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
8824
8825         if (n < 3)
8826                 offset = 0x7f84 + n * 12;
8827         else
8828                 offset = 0x7f2c + (n - 3) * 12;
8829
8830         put_smstate(u32, buf, offset + 8, seg.base);
8831         put_smstate(u32, buf, offset + 4, seg.limit);
8832         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
8833 }
8834
8835 #ifdef CONFIG_X86_64
8836 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
8837 {
8838         struct kvm_segment seg;
8839         int offset;
8840         u16 flags;
8841
8842         kvm_get_segment(vcpu, &seg, n);
8843         offset = 0x7e00 + n * 16;
8844
8845         flags = enter_smm_get_segment_flags(&seg) >> 8;
8846         put_smstate(u16, buf, offset, seg.selector);
8847         put_smstate(u16, buf, offset + 2, flags);
8848         put_smstate(u32, buf, offset + 4, seg.limit);
8849         put_smstate(u64, buf, offset + 8, seg.base);
8850 }
8851 #endif
8852
8853 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
8854 {
8855         struct desc_ptr dt;
8856         struct kvm_segment seg;
8857         unsigned long val;
8858         int i;
8859
8860         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
8861         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
8862         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
8863         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
8864
8865         for (i = 0; i < 8; i++)
8866                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read_raw(vcpu, i));
8867
8868         kvm_get_dr(vcpu, 6, &val);
8869         put_smstate(u32, buf, 0x7fcc, (u32)val);
8870         kvm_get_dr(vcpu, 7, &val);
8871         put_smstate(u32, buf, 0x7fc8, (u32)val);
8872
8873         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
8874         put_smstate(u32, buf, 0x7fc4, seg.selector);
8875         put_smstate(u32, buf, 0x7f64, seg.base);
8876         put_smstate(u32, buf, 0x7f60, seg.limit);
8877         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
8878
8879         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
8880         put_smstate(u32, buf, 0x7fc0, seg.selector);
8881         put_smstate(u32, buf, 0x7f80, seg.base);
8882         put_smstate(u32, buf, 0x7f7c, seg.limit);
8883         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
8884
8885         static_call(kvm_x86_get_gdt)(vcpu, &dt);
8886         put_smstate(u32, buf, 0x7f74, dt.address);
8887         put_smstate(u32, buf, 0x7f70, dt.size);
8888
8889         static_call(kvm_x86_get_idt)(vcpu, &dt);
8890         put_smstate(u32, buf, 0x7f58, dt.address);
8891         put_smstate(u32, buf, 0x7f54, dt.size);
8892
8893         for (i = 0; i < 6; i++)
8894                 enter_smm_save_seg_32(vcpu, buf, i);
8895
8896         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
8897
8898         /* revision id */
8899         put_smstate(u32, buf, 0x7efc, 0x00020000);
8900         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
8901 }
8902
8903 #ifdef CONFIG_X86_64
8904 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
8905 {
8906         struct desc_ptr dt;
8907         struct kvm_segment seg;
8908         unsigned long val;
8909         int i;
8910
8911         for (i = 0; i < 16; i++)
8912                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read_raw(vcpu, i));
8913
8914         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
8915         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
8916
8917         kvm_get_dr(vcpu, 6, &val);
8918         put_smstate(u64, buf, 0x7f68, val);
8919         kvm_get_dr(vcpu, 7, &val);
8920         put_smstate(u64, buf, 0x7f60, val);
8921
8922         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
8923         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
8924         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
8925
8926         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
8927
8928         /* revision id */
8929         put_smstate(u32, buf, 0x7efc, 0x00020064);
8930
8931         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
8932
8933         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
8934         put_smstate(u16, buf, 0x7e90, seg.selector);
8935         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
8936         put_smstate(u32, buf, 0x7e94, seg.limit);
8937         put_smstate(u64, buf, 0x7e98, seg.base);
8938
8939         static_call(kvm_x86_get_idt)(vcpu, &dt);
8940         put_smstate(u32, buf, 0x7e84, dt.size);
8941         put_smstate(u64, buf, 0x7e88, dt.address);
8942
8943         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
8944         put_smstate(u16, buf, 0x7e70, seg.selector);
8945         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
8946         put_smstate(u32, buf, 0x7e74, seg.limit);
8947         put_smstate(u64, buf, 0x7e78, seg.base);
8948
8949         static_call(kvm_x86_get_gdt)(vcpu, &dt);
8950         put_smstate(u32, buf, 0x7e64, dt.size);
8951         put_smstate(u64, buf, 0x7e68, dt.address);
8952
8953         for (i = 0; i < 6; i++)
8954                 enter_smm_save_seg_64(vcpu, buf, i);
8955 }
8956 #endif
8957
8958 static void enter_smm(struct kvm_vcpu *vcpu)
8959 {
8960         struct kvm_segment cs, ds;
8961         struct desc_ptr dt;
8962         char buf[512];
8963         u32 cr0;
8964
8965         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
8966         memset(buf, 0, 512);
8967 #ifdef CONFIG_X86_64
8968         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
8969                 enter_smm_save_state_64(vcpu, buf);
8970         else
8971 #endif
8972                 enter_smm_save_state_32(vcpu, buf);
8973
8974         /*
8975          * Give pre_enter_smm() a chance to make ISA-specific changes to the
8976          * vCPU state (e.g. leave guest mode) after we've saved the state into
8977          * the SMM state-save area.
8978          */
8979         static_call(kvm_x86_pre_enter_smm)(vcpu, buf);
8980
8981         vcpu->arch.hflags |= HF_SMM_MASK;
8982         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
8983
8984         if (static_call(kvm_x86_get_nmi_mask)(vcpu))
8985                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
8986         else
8987                 static_call(kvm_x86_set_nmi_mask)(vcpu, true);
8988
8989         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
8990         kvm_rip_write(vcpu, 0x8000);
8991
8992         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
8993         static_call(kvm_x86_set_cr0)(vcpu, cr0);
8994         vcpu->arch.cr0 = cr0;
8995
8996         static_call(kvm_x86_set_cr4)(vcpu, 0);
8997
8998         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
8999         dt.address = dt.size = 0;
9000         static_call(kvm_x86_set_idt)(vcpu, &dt);
9001
9002         kvm_set_dr(vcpu, 7, DR7_FIXED_1);
9003
9004         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
9005         cs.base = vcpu->arch.smbase;
9006
9007         ds.selector = 0;
9008         ds.base = 0;
9009
9010         cs.limit    = ds.limit = 0xffffffff;
9011         cs.type     = ds.type = 0x3;
9012         cs.dpl      = ds.dpl = 0;
9013         cs.db       = ds.db = 0;
9014         cs.s        = ds.s = 1;
9015         cs.l        = ds.l = 0;
9016         cs.g        = ds.g = 1;
9017         cs.avl      = ds.avl = 0;
9018         cs.present  = ds.present = 1;
9019         cs.unusable = ds.unusable = 0;
9020         cs.padding  = ds.padding = 0;
9021
9022         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
9023         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
9024         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
9025         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
9026         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
9027         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
9028
9029 #ifdef CONFIG_X86_64
9030         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9031                 static_call(kvm_x86_set_efer)(vcpu, 0);
9032 #endif
9033
9034         kvm_update_cpuid_runtime(vcpu);
9035         kvm_mmu_reset_context(vcpu);
9036 }
9037
9038 static void process_smi(struct kvm_vcpu *vcpu)
9039 {
9040         vcpu->arch.smi_pending = true;
9041         kvm_make_request(KVM_REQ_EVENT, vcpu);
9042 }
9043
9044 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
9045                                        unsigned long *vcpu_bitmap)
9046 {
9047         cpumask_var_t cpus;
9048
9049         zalloc_cpumask_var(&cpus, GFP_ATOMIC);
9050
9051         kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC,
9052                                     NULL, vcpu_bitmap, cpus);
9053
9054         free_cpumask_var(cpus);
9055 }
9056
9057 void kvm_make_scan_ioapic_request(struct kvm *kvm)
9058 {
9059         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
9060 }
9061
9062 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
9063 {
9064         if (!lapic_in_kernel(vcpu))
9065                 return;
9066
9067         vcpu->arch.apicv_active = kvm_apicv_activated(vcpu->kvm);
9068         kvm_apic_update_apicv(vcpu);
9069         static_call(kvm_x86_refresh_apicv_exec_ctrl)(vcpu);
9070 }
9071 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv);
9072
9073 /*
9074  * NOTE: Do not hold any lock prior to calling this.
9075  *
9076  * In particular, kvm_request_apicv_update() expects kvm->srcu not to be
9077  * locked, because it calls __x86_set_memory_region() which does
9078  * synchronize_srcu(&kvm->srcu).
9079  */
9080 void kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
9081 {
9082         struct kvm_vcpu *except;
9083         unsigned long old, new, expected;
9084
9085         if (!kvm_x86_ops.check_apicv_inhibit_reasons ||
9086             !static_call(kvm_x86_check_apicv_inhibit_reasons)(bit))
9087                 return;
9088
9089         old = READ_ONCE(kvm->arch.apicv_inhibit_reasons);
9090         do {
9091                 expected = new = old;
9092                 if (activate)
9093                         __clear_bit(bit, &new);
9094                 else
9095                         __set_bit(bit, &new);
9096                 if (new == old)
9097                         break;
9098                 old = cmpxchg(&kvm->arch.apicv_inhibit_reasons, expected, new);
9099         } while (old != expected);
9100
9101         if (!!old == !!new)
9102                 return;
9103
9104         trace_kvm_apicv_update_request(activate, bit);
9105         if (kvm_x86_ops.pre_update_apicv_exec_ctrl)
9106                 static_call(kvm_x86_pre_update_apicv_exec_ctrl)(kvm, activate);
9107
9108         /*
9109          * Sending request to update APICV for all other vcpus,
9110          * while update the calling vcpu immediately instead of
9111          * waiting for another #VMEXIT to handle the request.
9112          */
9113         except = kvm_get_running_vcpu();
9114         kvm_make_all_cpus_request_except(kvm, KVM_REQ_APICV_UPDATE,
9115                                          except);
9116         if (except)
9117                 kvm_vcpu_update_apicv(except);
9118 }
9119 EXPORT_SYMBOL_GPL(kvm_request_apicv_update);
9120
9121 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
9122 {
9123         if (!kvm_apic_present(vcpu))
9124                 return;
9125
9126         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
9127
9128         if (irqchip_split(vcpu->kvm))
9129                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
9130         else {
9131                 if (vcpu->arch.apicv_active)
9132                         static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9133                 if (ioapic_in_kernel(vcpu->kvm))
9134                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
9135         }
9136
9137         if (is_guest_mode(vcpu))
9138                 vcpu->arch.load_eoi_exitmap_pending = true;
9139         else
9140                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
9141 }
9142
9143 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
9144 {
9145         u64 eoi_exit_bitmap[4];
9146
9147         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
9148                 return;
9149
9150         if (to_hv_vcpu(vcpu))
9151                 bitmap_or((ulong *)eoi_exit_bitmap,
9152                           vcpu->arch.ioapic_handled_vectors,
9153                           to_hv_synic(vcpu)->vec_bitmap, 256);
9154
9155         static_call(kvm_x86_load_eoi_exitmap)(vcpu, eoi_exit_bitmap);
9156 }
9157
9158 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
9159                                             unsigned long start, unsigned long end)
9160 {
9161         unsigned long apic_address;
9162
9163         /*
9164          * The physical address of apic access page is stored in the VMCS.
9165          * Update it when it becomes invalid.
9166          */
9167         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
9168         if (start <= apic_address && apic_address < end)
9169                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
9170 }
9171
9172 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
9173 {
9174         if (!lapic_in_kernel(vcpu))
9175                 return;
9176
9177         if (!kvm_x86_ops.set_apic_access_page_addr)
9178                 return;
9179
9180         static_call(kvm_x86_set_apic_access_page_addr)(vcpu);
9181 }
9182
9183 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
9184 {
9185         smp_send_reschedule(vcpu->cpu);
9186 }
9187 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
9188
9189 /*
9190  * Returns 1 to let vcpu_run() continue the guest execution loop without
9191  * exiting to the userspace.  Otherwise, the value will be returned to the
9192  * userspace.
9193  */
9194 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
9195 {
9196         int r;
9197         bool req_int_win =
9198                 dm_request_for_irq_injection(vcpu) &&
9199                 kvm_cpu_accept_dm_intr(vcpu);
9200         fastpath_t exit_fastpath;
9201
9202         bool req_immediate_exit = false;
9203
9204         /* Forbid vmenter if vcpu dirty ring is soft-full */
9205         if (unlikely(vcpu->kvm->dirty_ring_size &&
9206                      kvm_dirty_ring_soft_full(&vcpu->dirty_ring))) {
9207                 vcpu->run->exit_reason = KVM_EXIT_DIRTY_RING_FULL;
9208                 trace_kvm_dirty_ring_exit(vcpu);
9209                 r = 0;
9210                 goto out;
9211         }
9212
9213         if (kvm_request_pending(vcpu)) {
9214                 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu)) {
9215                         if (unlikely(!kvm_x86_ops.nested_ops->get_nested_state_pages(vcpu))) {
9216                                 r = 0;
9217                                 goto out;
9218                         }
9219                 }
9220                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
9221                         kvm_mmu_unload(vcpu);
9222                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
9223                         __kvm_migrate_timers(vcpu);
9224                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
9225                         kvm_gen_update_masterclock(vcpu->kvm);
9226                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
9227                         kvm_gen_kvmclock_update(vcpu);
9228                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
9229                         r = kvm_guest_time_update(vcpu);
9230                         if (unlikely(r))
9231                                 goto out;
9232                 }
9233                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
9234                         kvm_mmu_sync_roots(vcpu);
9235                 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD, vcpu))
9236                         kvm_mmu_load_pgd(vcpu);
9237                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) {
9238                         kvm_vcpu_flush_tlb_all(vcpu);
9239
9240                         /* Flushing all ASIDs flushes the current ASID... */
9241                         kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
9242                 }
9243                 if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu))
9244                         kvm_vcpu_flush_tlb_current(vcpu);
9245                 if (kvm_check_request(KVM_REQ_HV_TLB_FLUSH, vcpu))
9246                         kvm_vcpu_flush_tlb_guest(vcpu);
9247
9248                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
9249                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
9250                         r = 0;
9251                         goto out;
9252                 }
9253                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
9254                         if (is_guest_mode(vcpu)) {
9255                                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
9256                         } else {
9257                                 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
9258                                 vcpu->mmio_needed = 0;
9259                                 r = 0;
9260                                 goto out;
9261                         }
9262                 }
9263                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
9264                         /* Page is swapped out. Do synthetic halt */
9265                         vcpu->arch.apf.halted = true;
9266                         r = 1;
9267                         goto out;
9268                 }
9269                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
9270                         record_steal_time(vcpu);
9271                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
9272                         process_smi(vcpu);
9273                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
9274                         process_nmi(vcpu);
9275                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
9276                         kvm_pmu_handle_event(vcpu);
9277                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
9278                         kvm_pmu_deliver_pmi(vcpu);
9279                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
9280                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
9281                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
9282                                      vcpu->arch.ioapic_handled_vectors)) {
9283                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
9284                                 vcpu->run->eoi.vector =
9285                                                 vcpu->arch.pending_ioapic_eoi;
9286                                 r = 0;
9287                                 goto out;
9288                         }
9289                 }
9290                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
9291                         vcpu_scan_ioapic(vcpu);
9292                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
9293                         vcpu_load_eoi_exitmap(vcpu);
9294                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
9295                         kvm_vcpu_reload_apic_access_page(vcpu);
9296                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
9297                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9298                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
9299                         r = 0;
9300                         goto out;
9301                 }
9302                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
9303                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9304                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
9305                         r = 0;
9306                         goto out;
9307                 }
9308                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
9309                         struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
9310
9311                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
9312                         vcpu->run->hyperv = hv_vcpu->exit;
9313                         r = 0;
9314                         goto out;
9315                 }
9316
9317                 /*
9318                  * KVM_REQ_HV_STIMER has to be processed after
9319                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
9320                  * depend on the guest clock being up-to-date
9321                  */
9322                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
9323                         kvm_hv_process_stimers(vcpu);
9324                 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
9325                         kvm_vcpu_update_apicv(vcpu);
9326                 if (kvm_check_request(KVM_REQ_APF_READY, vcpu))
9327                         kvm_check_async_pf_completion(vcpu);
9328                 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED, vcpu))
9329                         static_call(kvm_x86_msr_filter_changed)(vcpu);
9330
9331                 if (kvm_check_request(KVM_REQ_UPDATE_CPU_DIRTY_LOGGING, vcpu))
9332                         static_call(kvm_x86_update_cpu_dirty_logging)(vcpu);
9333         }
9334
9335         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win ||
9336             kvm_xen_has_interrupt(vcpu)) {
9337                 ++vcpu->stat.req_event;
9338                 kvm_apic_accept_events(vcpu);
9339                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
9340                         r = 1;
9341                         goto out;
9342                 }
9343
9344                 r = inject_pending_event(vcpu, &req_immediate_exit);
9345                 if (r < 0) {
9346                         r = 0;
9347                         goto out;
9348                 }
9349                 if (req_int_win)
9350                         static_call(kvm_x86_enable_irq_window)(vcpu);
9351
9352                 if (kvm_lapic_enabled(vcpu)) {
9353                         update_cr8_intercept(vcpu);
9354                         kvm_lapic_sync_to_vapic(vcpu);
9355                 }
9356         }
9357
9358         r = kvm_mmu_reload(vcpu);
9359         if (unlikely(r)) {
9360                 goto cancel_injection;
9361         }
9362
9363         preempt_disable();
9364
9365         static_call(kvm_x86_prepare_guest_switch)(vcpu);
9366
9367         /*
9368          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
9369          * IPI are then delayed after guest entry, which ensures that they
9370          * result in virtual interrupt delivery.
9371          */
9372         local_irq_disable();
9373         vcpu->mode = IN_GUEST_MODE;
9374
9375         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9376
9377         /*
9378          * 1) We should set ->mode before checking ->requests.  Please see
9379          * the comment in kvm_vcpu_exiting_guest_mode().
9380          *
9381          * 2) For APICv, we should set ->mode before checking PID.ON. This
9382          * pairs with the memory barrier implicit in pi_test_and_set_on
9383          * (see vmx_deliver_posted_interrupt).
9384          *
9385          * 3) This also orders the write to mode from any reads to the page
9386          * tables done while the VCPU is running.  Please see the comment
9387          * in kvm_flush_remote_tlbs.
9388          */
9389         smp_mb__after_srcu_read_unlock();
9390
9391         /*
9392          * This handles the case where a posted interrupt was
9393          * notified with kvm_vcpu_kick.
9394          */
9395         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
9396                 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9397
9398         if (kvm_vcpu_exit_request(vcpu)) {
9399                 vcpu->mode = OUTSIDE_GUEST_MODE;
9400                 smp_wmb();
9401                 local_irq_enable();
9402                 preempt_enable();
9403                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9404                 r = 1;
9405                 goto cancel_injection;
9406         }
9407
9408         if (req_immediate_exit) {
9409                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9410                 static_call(kvm_x86_request_immediate_exit)(vcpu);
9411         }
9412
9413         fpregs_assert_state_consistent();
9414         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9415                 switch_fpu_return();
9416
9417         if (unlikely(vcpu->arch.switch_db_regs)) {
9418                 set_debugreg(0, 7);
9419                 set_debugreg(vcpu->arch.eff_db[0], 0);
9420                 set_debugreg(vcpu->arch.eff_db[1], 1);
9421                 set_debugreg(vcpu->arch.eff_db[2], 2);
9422                 set_debugreg(vcpu->arch.eff_db[3], 3);
9423                 set_debugreg(vcpu->arch.dr6, 6);
9424                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
9425         }
9426
9427         for (;;) {
9428                 exit_fastpath = static_call(kvm_x86_run)(vcpu);
9429                 if (likely(exit_fastpath != EXIT_FASTPATH_REENTER_GUEST))
9430                         break;
9431
9432                 if (unlikely(kvm_vcpu_exit_request(vcpu))) {
9433                         exit_fastpath = EXIT_FASTPATH_EXIT_HANDLED;
9434                         break;
9435                 }
9436
9437                 if (vcpu->arch.apicv_active)
9438                         static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9439         }
9440
9441         /*
9442          * Do this here before restoring debug registers on the host.  And
9443          * since we do this before handling the vmexit, a DR access vmexit
9444          * can (a) read the correct value of the debug registers, (b) set
9445          * KVM_DEBUGREG_WONT_EXIT again.
9446          */
9447         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
9448                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
9449                 static_call(kvm_x86_sync_dirty_debug_regs)(vcpu);
9450                 kvm_update_dr0123(vcpu);
9451                 kvm_update_dr7(vcpu);
9452                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
9453         }
9454
9455         /*
9456          * If the guest has used debug registers, at least dr7
9457          * will be disabled while returning to the host.
9458          * If we don't have active breakpoints in the host, we don't
9459          * care about the messed up debug address registers. But if
9460          * we have some of them active, restore the old state.
9461          */
9462         if (hw_breakpoint_active())
9463                 hw_breakpoint_restore();
9464
9465         vcpu->arch.last_vmentry_cpu = vcpu->cpu;
9466         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
9467
9468         vcpu->mode = OUTSIDE_GUEST_MODE;
9469         smp_wmb();
9470
9471         static_call(kvm_x86_handle_exit_irqoff)(vcpu);
9472
9473         /*
9474          * Consume any pending interrupts, including the possible source of
9475          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
9476          * An instruction is required after local_irq_enable() to fully unblock
9477          * interrupts on processors that implement an interrupt shadow, the
9478          * stat.exits increment will do nicely.
9479          */
9480         kvm_before_interrupt(vcpu);
9481         local_irq_enable();
9482         ++vcpu->stat.exits;
9483         local_irq_disable();
9484         kvm_after_interrupt(vcpu);
9485
9486         /*
9487          * Wait until after servicing IRQs to account guest time so that any
9488          * ticks that occurred while running the guest are properly accounted
9489          * to the guest.  Waiting until IRQs are enabled degrades the accuracy
9490          * of accounting via context tracking, but the loss of accuracy is
9491          * acceptable for all known use cases.
9492          */
9493         vtime_account_guest_exit();
9494
9495         if (lapic_in_kernel(vcpu)) {
9496                 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
9497                 if (delta != S64_MIN) {
9498                         trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
9499                         vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
9500                 }
9501         }
9502
9503         local_irq_enable();
9504         preempt_enable();
9505
9506         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9507
9508         /*
9509          * Profile KVM exit RIPs:
9510          */
9511         if (unlikely(prof_on == KVM_PROFILING)) {
9512                 unsigned long rip = kvm_rip_read(vcpu);
9513                 profile_hit(KVM_PROFILING, (void *)rip);
9514         }
9515
9516         if (unlikely(vcpu->arch.tsc_always_catchup))
9517                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
9518
9519         if (vcpu->arch.apic_attention)
9520                 kvm_lapic_sync_from_vapic(vcpu);
9521
9522         r = static_call(kvm_x86_handle_exit)(vcpu, exit_fastpath);
9523         return r;
9524
9525 cancel_injection:
9526         if (req_immediate_exit)
9527                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9528         static_call(kvm_x86_cancel_injection)(vcpu);
9529         if (unlikely(vcpu->arch.apic_attention))
9530                 kvm_lapic_sync_from_vapic(vcpu);
9531 out:
9532         return r;
9533 }
9534
9535 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
9536 {
9537         if (!kvm_arch_vcpu_runnable(vcpu) &&
9538             (!kvm_x86_ops.pre_block || static_call(kvm_x86_pre_block)(vcpu) == 0)) {
9539                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9540                 kvm_vcpu_block(vcpu);
9541                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9542
9543                 if (kvm_x86_ops.post_block)
9544                         static_call(kvm_x86_post_block)(vcpu);
9545
9546                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
9547                         return 1;
9548         }
9549
9550         kvm_apic_accept_events(vcpu);
9551         switch(vcpu->arch.mp_state) {
9552         case KVM_MP_STATE_HALTED:
9553         case KVM_MP_STATE_AP_RESET_HOLD:
9554                 vcpu->arch.pv.pv_unhalted = false;
9555                 vcpu->arch.mp_state =
9556                         KVM_MP_STATE_RUNNABLE;
9557                 fallthrough;
9558         case KVM_MP_STATE_RUNNABLE:
9559                 vcpu->arch.apf.halted = false;
9560                 break;
9561         case KVM_MP_STATE_INIT_RECEIVED:
9562                 break;
9563         default:
9564                 return -EINTR;
9565         }
9566         return 1;
9567 }
9568
9569 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
9570 {
9571         if (is_guest_mode(vcpu))
9572                 kvm_check_nested_events(vcpu);
9573
9574         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
9575                 !vcpu->arch.apf.halted);
9576 }
9577
9578 static int vcpu_run(struct kvm_vcpu *vcpu)
9579 {
9580         int r;
9581         struct kvm *kvm = vcpu->kvm;
9582
9583         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9584         vcpu->arch.l1tf_flush_l1d = true;
9585
9586         for (;;) {
9587                 if (kvm_vcpu_running(vcpu)) {
9588                         r = vcpu_enter_guest(vcpu);
9589                 } else {
9590                         r = vcpu_block(kvm, vcpu);
9591                 }
9592
9593                 if (r <= 0)
9594                         break;
9595
9596                 kvm_clear_request(KVM_REQ_UNBLOCK, vcpu);
9597                 if (kvm_cpu_has_pending_timer(vcpu))
9598                         kvm_inject_pending_timer_irqs(vcpu);
9599
9600                 if (dm_request_for_irq_injection(vcpu) &&
9601                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
9602                         r = 0;
9603                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
9604                         ++vcpu->stat.request_irq_exits;
9605                         break;
9606                 }
9607
9608                 if (__xfer_to_guest_mode_work_pending()) {
9609                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9610                         r = xfer_to_guest_mode_handle_work(vcpu);
9611                         if (r)
9612                                 return r;
9613                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9614                 }
9615         }
9616
9617         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9618
9619         return r;
9620 }
9621
9622 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
9623 {
9624         int r;
9625
9626         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9627         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
9628         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9629         return r;
9630 }
9631
9632 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
9633 {
9634         BUG_ON(!vcpu->arch.pio.count);
9635
9636         return complete_emulated_io(vcpu);
9637 }
9638
9639 /*
9640  * Implements the following, as a state machine:
9641  *
9642  * read:
9643  *   for each fragment
9644  *     for each mmio piece in the fragment
9645  *       write gpa, len
9646  *       exit
9647  *       copy data
9648  *   execute insn
9649  *
9650  * write:
9651  *   for each fragment
9652  *     for each mmio piece in the fragment
9653  *       write gpa, len
9654  *       copy data
9655  *       exit
9656  */
9657 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
9658 {
9659         struct kvm_run *run = vcpu->run;
9660         struct kvm_mmio_fragment *frag;
9661         unsigned len;
9662
9663         BUG_ON(!vcpu->mmio_needed);
9664
9665         /* Complete previous fragment */
9666         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
9667         len = min(8u, frag->len);
9668         if (!vcpu->mmio_is_write)
9669                 memcpy(frag->data, run->mmio.data, len);
9670
9671         if (frag->len <= 8) {
9672                 /* Switch to the next fragment. */
9673                 frag++;
9674                 vcpu->mmio_cur_fragment++;
9675         } else {
9676                 /* Go forward to the next mmio piece. */
9677                 frag->data += len;
9678                 frag->gpa += len;
9679                 frag->len -= len;
9680         }
9681
9682         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
9683                 vcpu->mmio_needed = 0;
9684
9685                 /* FIXME: return into emulator if single-stepping.  */
9686                 if (vcpu->mmio_is_write)
9687                         return 1;
9688                 vcpu->mmio_read_completed = 1;
9689                 return complete_emulated_io(vcpu);
9690         }
9691
9692         run->exit_reason = KVM_EXIT_MMIO;
9693         run->mmio.phys_addr = frag->gpa;
9694         if (vcpu->mmio_is_write)
9695                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
9696         run->mmio.len = min(8u, frag->len);
9697         run->mmio.is_write = vcpu->mmio_is_write;
9698         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
9699         return 0;
9700 }
9701
9702 static void kvm_save_current_fpu(struct fpu *fpu)
9703 {
9704         /*
9705          * If the target FPU state is not resident in the CPU registers, just
9706          * memcpy() from current, else save CPU state directly to the target.
9707          */
9708         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9709                 memcpy(&fpu->state, &current->thread.fpu.state,
9710                        fpu_kernel_xstate_size);
9711         else
9712                 copy_fpregs_to_fpstate(fpu);
9713 }
9714
9715 /* Swap (qemu) user FPU context for the guest FPU context. */
9716 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
9717 {
9718         fpregs_lock();
9719
9720         kvm_save_current_fpu(vcpu->arch.user_fpu);
9721
9722         /*
9723          * Guests with protected state can't have it set by the hypervisor,
9724          * so skip trying to set it.
9725          */
9726         if (vcpu->arch.guest_fpu)
9727                 /* PKRU is separately restored in kvm_x86_ops.run. */
9728                 __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu->state,
9729                                         ~XFEATURE_MASK_PKRU);
9730
9731         fpregs_mark_activate();
9732         fpregs_unlock();
9733
9734         trace_kvm_fpu(1);
9735 }
9736
9737 /* When vcpu_run ends, restore user space FPU context. */
9738 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
9739 {
9740         fpregs_lock();
9741
9742         /*
9743          * Guests with protected state can't have it read by the hypervisor,
9744          * so skip trying to save it.
9745          */
9746         if (vcpu->arch.guest_fpu)
9747                 kvm_save_current_fpu(vcpu->arch.guest_fpu);
9748
9749         copy_kernel_to_fpregs(&vcpu->arch.user_fpu->state);
9750
9751         fpregs_mark_activate();
9752         fpregs_unlock();
9753
9754         ++vcpu->stat.fpu_reload;
9755         trace_kvm_fpu(0);
9756 }
9757
9758 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
9759 {
9760         struct kvm_run *kvm_run = vcpu->run;
9761         int r;
9762
9763         vcpu_load(vcpu);
9764         kvm_sigset_activate(vcpu);
9765         kvm_run->flags = 0;
9766         kvm_load_guest_fpu(vcpu);
9767
9768         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
9769                 if (kvm_run->immediate_exit) {
9770                         r = -EINTR;
9771                         goto out;
9772                 }
9773                 kvm_vcpu_block(vcpu);
9774                 kvm_apic_accept_events(vcpu);
9775                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
9776                 r = -EAGAIN;
9777                 if (signal_pending(current)) {
9778                         r = -EINTR;
9779                         kvm_run->exit_reason = KVM_EXIT_INTR;
9780                         ++vcpu->stat.signal_exits;
9781                 }
9782                 goto out;
9783         }
9784
9785         if (kvm_run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
9786                 r = -EINVAL;
9787                 goto out;
9788         }
9789
9790         if (kvm_run->kvm_dirty_regs) {
9791                 r = sync_regs(vcpu);
9792                 if (r != 0)
9793                         goto out;
9794         }
9795
9796         /* re-sync apic's tpr */
9797         if (!lapic_in_kernel(vcpu)) {
9798                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
9799                         r = -EINVAL;
9800                         goto out;
9801                 }
9802         }
9803
9804         if (unlikely(vcpu->arch.complete_userspace_io)) {
9805                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
9806                 vcpu->arch.complete_userspace_io = NULL;
9807                 r = cui(vcpu);
9808                 if (r <= 0)
9809                         goto out;
9810         } else
9811                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
9812
9813         if (kvm_run->immediate_exit)
9814                 r = -EINTR;
9815         else
9816                 r = vcpu_run(vcpu);
9817
9818 out:
9819         kvm_put_guest_fpu(vcpu);
9820         if (kvm_run->kvm_valid_regs)
9821                 store_regs(vcpu);
9822         post_kvm_run_save(vcpu);
9823         kvm_sigset_deactivate(vcpu);
9824
9825         vcpu_put(vcpu);
9826         return r;
9827 }
9828
9829 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9830 {
9831         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
9832                 /*
9833                  * We are here if userspace calls get_regs() in the middle of
9834                  * instruction emulation. Registers state needs to be copied
9835                  * back from emulation context to vcpu. Userspace shouldn't do
9836                  * that usually, but some bad designed PV devices (vmware
9837                  * backdoor interface) need this to work
9838                  */
9839                 emulator_writeback_register_cache(vcpu->arch.emulate_ctxt);
9840                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
9841         }
9842         regs->rax = kvm_rax_read(vcpu);
9843         regs->rbx = kvm_rbx_read(vcpu);
9844         regs->rcx = kvm_rcx_read(vcpu);
9845         regs->rdx = kvm_rdx_read(vcpu);
9846         regs->rsi = kvm_rsi_read(vcpu);
9847         regs->rdi = kvm_rdi_read(vcpu);
9848         regs->rsp = kvm_rsp_read(vcpu);
9849         regs->rbp = kvm_rbp_read(vcpu);
9850 #ifdef CONFIG_X86_64
9851         regs->r8 = kvm_r8_read(vcpu);
9852         regs->r9 = kvm_r9_read(vcpu);
9853         regs->r10 = kvm_r10_read(vcpu);
9854         regs->r11 = kvm_r11_read(vcpu);
9855         regs->r12 = kvm_r12_read(vcpu);
9856         regs->r13 = kvm_r13_read(vcpu);
9857         regs->r14 = kvm_r14_read(vcpu);
9858         regs->r15 = kvm_r15_read(vcpu);
9859 #endif
9860
9861         regs->rip = kvm_rip_read(vcpu);
9862         regs->rflags = kvm_get_rflags(vcpu);
9863 }
9864
9865 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9866 {
9867         vcpu_load(vcpu);
9868         __get_regs(vcpu, regs);
9869         vcpu_put(vcpu);
9870         return 0;
9871 }
9872
9873 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9874 {
9875         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
9876         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
9877
9878         kvm_rax_write(vcpu, regs->rax);
9879         kvm_rbx_write(vcpu, regs->rbx);
9880         kvm_rcx_write(vcpu, regs->rcx);
9881         kvm_rdx_write(vcpu, regs->rdx);
9882         kvm_rsi_write(vcpu, regs->rsi);
9883         kvm_rdi_write(vcpu, regs->rdi);
9884         kvm_rsp_write(vcpu, regs->rsp);
9885         kvm_rbp_write(vcpu, regs->rbp);
9886 #ifdef CONFIG_X86_64
9887         kvm_r8_write(vcpu, regs->r8);
9888         kvm_r9_write(vcpu, regs->r9);
9889         kvm_r10_write(vcpu, regs->r10);
9890         kvm_r11_write(vcpu, regs->r11);
9891         kvm_r12_write(vcpu, regs->r12);
9892         kvm_r13_write(vcpu, regs->r13);
9893         kvm_r14_write(vcpu, regs->r14);
9894         kvm_r15_write(vcpu, regs->r15);
9895 #endif
9896
9897         kvm_rip_write(vcpu, regs->rip);
9898         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
9899
9900         vcpu->arch.exception.pending = false;
9901
9902         kvm_make_request(KVM_REQ_EVENT, vcpu);
9903 }
9904
9905 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9906 {
9907         vcpu_load(vcpu);
9908         __set_regs(vcpu, regs);
9909         vcpu_put(vcpu);
9910         return 0;
9911 }
9912
9913 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
9914 {
9915         struct kvm_segment cs;
9916
9917         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
9918         *db = cs.db;
9919         *l = cs.l;
9920 }
9921 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
9922
9923 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9924 {
9925         struct desc_ptr dt;
9926
9927         if (vcpu->arch.guest_state_protected)
9928                 goto skip_protected_regs;
9929
9930         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
9931         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
9932         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
9933         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
9934         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
9935         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
9936
9937         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
9938         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
9939
9940         static_call(kvm_x86_get_idt)(vcpu, &dt);
9941         sregs->idt.limit = dt.size;
9942         sregs->idt.base = dt.address;
9943         static_call(kvm_x86_get_gdt)(vcpu, &dt);
9944         sregs->gdt.limit = dt.size;
9945         sregs->gdt.base = dt.address;
9946
9947         sregs->cr2 = vcpu->arch.cr2;
9948         sregs->cr3 = kvm_read_cr3(vcpu);
9949
9950 skip_protected_regs:
9951         sregs->cr0 = kvm_read_cr0(vcpu);
9952         sregs->cr4 = kvm_read_cr4(vcpu);
9953         sregs->cr8 = kvm_get_cr8(vcpu);
9954         sregs->efer = vcpu->arch.efer;
9955         sregs->apic_base = kvm_get_apic_base(vcpu);
9956
9957         memset(sregs->interrupt_bitmap, 0, sizeof(sregs->interrupt_bitmap));
9958
9959         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
9960                 set_bit(vcpu->arch.interrupt.nr,
9961                         (unsigned long *)sregs->interrupt_bitmap);
9962 }
9963
9964 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
9965                                   struct kvm_sregs *sregs)
9966 {
9967         vcpu_load(vcpu);
9968         __get_sregs(vcpu, sregs);
9969         vcpu_put(vcpu);
9970         return 0;
9971 }
9972
9973 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
9974                                     struct kvm_mp_state *mp_state)
9975 {
9976         vcpu_load(vcpu);
9977         if (kvm_mpx_supported())
9978                 kvm_load_guest_fpu(vcpu);
9979
9980         kvm_apic_accept_events(vcpu);
9981         if ((vcpu->arch.mp_state == KVM_MP_STATE_HALTED ||
9982              vcpu->arch.mp_state == KVM_MP_STATE_AP_RESET_HOLD) &&
9983             vcpu->arch.pv.pv_unhalted)
9984                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
9985         else
9986                 mp_state->mp_state = vcpu->arch.mp_state;
9987
9988         if (kvm_mpx_supported())
9989                 kvm_put_guest_fpu(vcpu);
9990         vcpu_put(vcpu);
9991         return 0;
9992 }
9993
9994 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
9995                                     struct kvm_mp_state *mp_state)
9996 {
9997         int ret = -EINVAL;
9998
9999         vcpu_load(vcpu);
10000
10001         if (!lapic_in_kernel(vcpu) &&
10002             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
10003                 goto out;
10004
10005         /*
10006          * KVM_MP_STATE_INIT_RECEIVED means the processor is in
10007          * INIT state; latched init should be reported using
10008          * KVM_SET_VCPU_EVENTS, so reject it here.
10009          */
10010         if ((kvm_vcpu_latch_init(vcpu) || vcpu->arch.smi_pending) &&
10011             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
10012              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
10013                 goto out;
10014
10015         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
10016                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
10017                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
10018         } else
10019                 vcpu->arch.mp_state = mp_state->mp_state;
10020         kvm_make_request(KVM_REQ_EVENT, vcpu);
10021
10022         ret = 0;
10023 out:
10024         vcpu_put(vcpu);
10025         return ret;
10026 }
10027
10028 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
10029                     int reason, bool has_error_code, u32 error_code)
10030 {
10031         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
10032         int ret;
10033
10034         init_emulate_ctxt(vcpu);
10035
10036         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
10037                                    has_error_code, error_code);
10038         if (ret) {
10039                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
10040                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
10041                 vcpu->run->internal.ndata = 0;
10042                 return 0;
10043         }
10044
10045         kvm_rip_write(vcpu, ctxt->eip);
10046         kvm_set_rflags(vcpu, ctxt->eflags);
10047         return 1;
10048 }
10049 EXPORT_SYMBOL_GPL(kvm_task_switch);
10050
10051 static bool kvm_is_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10052 {
10053         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
10054                 /*
10055                  * When EFER.LME and CR0.PG are set, the processor is in
10056                  * 64-bit mode (though maybe in a 32-bit code segment).
10057                  * CR4.PAE and EFER.LMA must be set.
10058                  */
10059                 if (!(sregs->cr4 & X86_CR4_PAE) || !(sregs->efer & EFER_LMA))
10060                         return false;
10061                 if (kvm_vcpu_is_illegal_gpa(vcpu, sregs->cr3))
10062                         return false;
10063         } else {
10064                 /*
10065                  * Not in 64-bit mode: EFER.LMA is clear and the code
10066                  * segment cannot be 64-bit.
10067                  */
10068                 if (sregs->efer & EFER_LMA || sregs->cs.l)
10069                         return false;
10070         }
10071
10072         return kvm_is_valid_cr4(vcpu, sregs->cr4);
10073 }
10074
10075 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10076 {
10077         struct msr_data apic_base_msr;
10078         int mmu_reset_needed = 0;
10079         int pending_vec, max_bits, idx;
10080         struct desc_ptr dt;
10081         int ret = -EINVAL;
10082
10083         if (!kvm_is_valid_sregs(vcpu, sregs))
10084                 goto out;
10085
10086         apic_base_msr.data = sregs->apic_base;
10087         apic_base_msr.host_initiated = true;
10088         if (kvm_set_apic_base(vcpu, &apic_base_msr))
10089                 goto out;
10090
10091         if (vcpu->arch.guest_state_protected)
10092                 goto skip_protected_regs;
10093
10094         dt.size = sregs->idt.limit;
10095         dt.address = sregs->idt.base;
10096         static_call(kvm_x86_set_idt)(vcpu, &dt);
10097         dt.size = sregs->gdt.limit;
10098         dt.address = sregs->gdt.base;
10099         static_call(kvm_x86_set_gdt)(vcpu, &dt);
10100
10101         vcpu->arch.cr2 = sregs->cr2;
10102         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
10103         vcpu->arch.cr3 = sregs->cr3;
10104         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
10105
10106         kvm_set_cr8(vcpu, sregs->cr8);
10107
10108         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
10109         static_call(kvm_x86_set_efer)(vcpu, sregs->efer);
10110
10111         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
10112         static_call(kvm_x86_set_cr0)(vcpu, sregs->cr0);
10113         vcpu->arch.cr0 = sregs->cr0;
10114
10115         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
10116         static_call(kvm_x86_set_cr4)(vcpu, sregs->cr4);
10117
10118         idx = srcu_read_lock(&vcpu->kvm->srcu);
10119         if (is_pae_paging(vcpu)) {
10120                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
10121                 mmu_reset_needed = 1;
10122         }
10123         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10124
10125         if (mmu_reset_needed)
10126                 kvm_mmu_reset_context(vcpu);
10127
10128         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10129         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10130         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10131         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10132         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10133         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10134
10135         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10136         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10137
10138         update_cr8_intercept(vcpu);
10139
10140         /* Older userspace won't unhalt the vcpu on reset. */
10141         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
10142             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
10143             !is_protmode(vcpu))
10144                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10145
10146 skip_protected_regs:
10147         max_bits = KVM_NR_INTERRUPTS;
10148         pending_vec = find_first_bit(
10149                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
10150         if (pending_vec < max_bits) {
10151                 kvm_queue_interrupt(vcpu, pending_vec, false);
10152                 pr_debug("Set back pending irq %d\n", pending_vec);
10153         }
10154
10155         kvm_make_request(KVM_REQ_EVENT, vcpu);
10156
10157         ret = 0;
10158 out:
10159         return ret;
10160 }
10161
10162 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
10163                                   struct kvm_sregs *sregs)
10164 {
10165         int ret;
10166
10167         vcpu_load(vcpu);
10168         ret = __set_sregs(vcpu, sregs);
10169         vcpu_put(vcpu);
10170         return ret;
10171 }
10172
10173 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
10174                                         struct kvm_guest_debug *dbg)
10175 {
10176         unsigned long rflags;
10177         int i, r;
10178
10179         if (vcpu->arch.guest_state_protected)
10180                 return -EINVAL;
10181
10182         vcpu_load(vcpu);
10183
10184         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
10185                 r = -EBUSY;
10186                 if (vcpu->arch.exception.pending)
10187                         goto out;
10188                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
10189                         kvm_queue_exception(vcpu, DB_VECTOR);
10190                 else
10191                         kvm_queue_exception(vcpu, BP_VECTOR);
10192         }
10193
10194         /*
10195          * Read rflags as long as potentially injected trace flags are still
10196          * filtered out.
10197          */
10198         rflags = kvm_get_rflags(vcpu);
10199
10200         vcpu->guest_debug = dbg->control;
10201         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
10202                 vcpu->guest_debug = 0;
10203
10204         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
10205                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
10206                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
10207                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
10208         } else {
10209                 for (i = 0; i < KVM_NR_DB_REGS; i++)
10210                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
10211         }
10212         kvm_update_dr7(vcpu);
10213
10214         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
10215                 vcpu->arch.singlestep_rip = kvm_get_linear_rip(vcpu);
10216
10217         /*
10218          * Trigger an rflags update that will inject or remove the trace
10219          * flags.
10220          */
10221         kvm_set_rflags(vcpu, rflags);
10222
10223         static_call(kvm_x86_update_exception_bitmap)(vcpu);
10224
10225         r = 0;
10226
10227 out:
10228         vcpu_put(vcpu);
10229         return r;
10230 }
10231
10232 /*
10233  * Translate a guest virtual address to a guest physical address.
10234  */
10235 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
10236                                     struct kvm_translation *tr)
10237 {
10238         unsigned long vaddr = tr->linear_address;
10239         gpa_t gpa;
10240         int idx;
10241
10242         vcpu_load(vcpu);
10243
10244         idx = srcu_read_lock(&vcpu->kvm->srcu);
10245         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
10246         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10247         tr->physical_address = gpa;
10248         tr->valid = gpa != UNMAPPED_GVA;
10249         tr->writeable = 1;
10250         tr->usermode = 0;
10251
10252         vcpu_put(vcpu);
10253         return 0;
10254 }
10255
10256 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10257 {
10258         struct fxregs_state *fxsave;
10259
10260         if (!vcpu->arch.guest_fpu)
10261                 return 0;
10262
10263         vcpu_load(vcpu);
10264
10265         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
10266         memcpy(fpu->fpr, fxsave->st_space, 128);
10267         fpu->fcw = fxsave->cwd;
10268         fpu->fsw = fxsave->swd;
10269         fpu->ftwx = fxsave->twd;
10270         fpu->last_opcode = fxsave->fop;
10271         fpu->last_ip = fxsave->rip;
10272         fpu->last_dp = fxsave->rdp;
10273         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
10274
10275         vcpu_put(vcpu);
10276         return 0;
10277 }
10278
10279 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10280 {
10281         struct fxregs_state *fxsave;
10282
10283         if (!vcpu->arch.guest_fpu)
10284                 return 0;
10285
10286         vcpu_load(vcpu);
10287
10288         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
10289
10290         memcpy(fxsave->st_space, fpu->fpr, 128);
10291         fxsave->cwd = fpu->fcw;
10292         fxsave->swd = fpu->fsw;
10293         fxsave->twd = fpu->ftwx;
10294         fxsave->fop = fpu->last_opcode;
10295         fxsave->rip = fpu->last_ip;
10296         fxsave->rdp = fpu->last_dp;
10297         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
10298
10299         vcpu_put(vcpu);
10300         return 0;
10301 }
10302
10303 static void store_regs(struct kvm_vcpu *vcpu)
10304 {
10305         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
10306
10307         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
10308                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
10309
10310         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
10311                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
10312
10313         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
10314                 kvm_vcpu_ioctl_x86_get_vcpu_events(
10315                                 vcpu, &vcpu->run->s.regs.events);
10316 }
10317
10318 static int sync_regs(struct kvm_vcpu *vcpu)
10319 {
10320         if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
10321                 return -EINVAL;
10322
10323         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
10324                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
10325                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
10326         }
10327         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
10328                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
10329                         return -EINVAL;
10330                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
10331         }
10332         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
10333                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
10334                                 vcpu, &vcpu->run->s.regs.events))
10335                         return -EINVAL;
10336                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
10337         }
10338
10339         return 0;
10340 }
10341
10342 static void fx_init(struct kvm_vcpu *vcpu)
10343 {
10344         if (!vcpu->arch.guest_fpu)
10345                 return;
10346
10347         fpstate_init(&vcpu->arch.guest_fpu->state);
10348         if (boot_cpu_has(X86_FEATURE_XSAVES))
10349                 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
10350                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
10351
10352         /*
10353          * Ensure guest xcr0 is valid for loading
10354          */
10355         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10356
10357         vcpu->arch.cr0 |= X86_CR0_ET;
10358 }
10359
10360 void kvm_free_guest_fpu(struct kvm_vcpu *vcpu)
10361 {
10362         if (vcpu->arch.guest_fpu) {
10363                 kmem_cache_free(x86_fpu_cache, vcpu->arch.guest_fpu);
10364                 vcpu->arch.guest_fpu = NULL;
10365         }
10366 }
10367 EXPORT_SYMBOL_GPL(kvm_free_guest_fpu);
10368
10369 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
10370 {
10371         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
10372                 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
10373                              "guest TSC will not be reliable\n");
10374
10375         return 0;
10376 }
10377
10378 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
10379 {
10380         struct page *page;
10381         int r;
10382
10383         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
10384                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10385         else
10386                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
10387
10388         r = kvm_mmu_create(vcpu);
10389         if (r < 0)
10390                 return r;
10391
10392         if (irqchip_in_kernel(vcpu->kvm)) {
10393                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
10394                 if (r < 0)
10395                         goto fail_mmu_destroy;
10396                 if (kvm_apicv_activated(vcpu->kvm))
10397                         vcpu->arch.apicv_active = true;
10398         } else
10399                 static_branch_inc(&kvm_has_noapic_vcpu);
10400
10401         r = -ENOMEM;
10402
10403         page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO);
10404         if (!page)
10405                 goto fail_free_lapic;
10406         vcpu->arch.pio_data = page_address(page);
10407
10408         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
10409                                        GFP_KERNEL_ACCOUNT);
10410         if (!vcpu->arch.mce_banks)
10411                 goto fail_free_pio_data;
10412         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
10413
10414         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
10415                                 GFP_KERNEL_ACCOUNT))
10416                 goto fail_free_mce_banks;
10417
10418         if (!alloc_emulate_ctxt(vcpu))
10419                 goto free_wbinvd_dirty_mask;
10420
10421         vcpu->arch.user_fpu = kmem_cache_zalloc(x86_fpu_cache,
10422                                                 GFP_KERNEL_ACCOUNT);
10423         if (!vcpu->arch.user_fpu) {
10424                 pr_err("kvm: failed to allocate userspace's fpu\n");
10425                 goto free_emulate_ctxt;
10426         }
10427
10428         vcpu->arch.guest_fpu = kmem_cache_zalloc(x86_fpu_cache,
10429                                                  GFP_KERNEL_ACCOUNT);
10430         if (!vcpu->arch.guest_fpu) {
10431                 pr_err("kvm: failed to allocate vcpu's fpu\n");
10432                 goto free_user_fpu;
10433         }
10434         fx_init(vcpu);
10435
10436         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
10437         vcpu->arch.reserved_gpa_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu);
10438
10439         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
10440
10441         kvm_async_pf_hash_reset(vcpu);
10442         kvm_pmu_init(vcpu);
10443
10444         vcpu->arch.pending_external_vector = -1;
10445         vcpu->arch.preempted_in_kernel = false;
10446
10447         r = static_call(kvm_x86_vcpu_create)(vcpu);
10448         if (r)
10449                 goto free_guest_fpu;
10450
10451         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
10452         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
10453         kvm_vcpu_mtrr_init(vcpu);
10454         vcpu_load(vcpu);
10455         kvm_set_tsc_khz(vcpu, max_tsc_khz);
10456         kvm_vcpu_reset(vcpu, false);
10457         kvm_init_mmu(vcpu, false);
10458         vcpu_put(vcpu);
10459         return 0;
10460
10461 free_guest_fpu:
10462         kvm_free_guest_fpu(vcpu);
10463 free_user_fpu:
10464         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
10465 free_emulate_ctxt:
10466         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10467 free_wbinvd_dirty_mask:
10468         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10469 fail_free_mce_banks:
10470         kfree(vcpu->arch.mce_banks);
10471 fail_free_pio_data:
10472         free_page((unsigned long)vcpu->arch.pio_data);
10473 fail_free_lapic:
10474         kvm_free_lapic(vcpu);
10475 fail_mmu_destroy:
10476         kvm_mmu_destroy(vcpu);
10477         return r;
10478 }
10479
10480 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
10481 {
10482         struct kvm *kvm = vcpu->kvm;
10483
10484         if (mutex_lock_killable(&vcpu->mutex))
10485                 return;
10486         vcpu_load(vcpu);
10487         kvm_synchronize_tsc(vcpu, 0);
10488         vcpu_put(vcpu);
10489
10490         /* poll control enabled by default */
10491         vcpu->arch.msr_kvm_poll_control = 1;
10492
10493         mutex_unlock(&vcpu->mutex);
10494
10495         if (kvmclock_periodic_sync && vcpu->vcpu_idx == 0)
10496                 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
10497                                                 KVMCLOCK_SYNC_PERIOD);
10498 }
10499
10500 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
10501 {
10502         struct gfn_to_pfn_cache *cache = &vcpu->arch.st.cache;
10503         int idx;
10504
10505         kvm_release_pfn(cache->pfn, cache->dirty, cache);
10506
10507         kvmclock_reset(vcpu);
10508
10509         static_call(kvm_x86_vcpu_free)(vcpu);
10510
10511         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10512         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10513         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
10514         kvm_free_guest_fpu(vcpu);
10515
10516         kvm_hv_vcpu_uninit(vcpu);
10517         kvm_pmu_destroy(vcpu);
10518         kfree(vcpu->arch.mce_banks);
10519         kvm_free_lapic(vcpu);
10520         idx = srcu_read_lock(&vcpu->kvm->srcu);
10521         kvm_mmu_destroy(vcpu);
10522         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10523         free_page((unsigned long)vcpu->arch.pio_data);
10524         kvfree(vcpu->arch.cpuid_entries);
10525         if (!lapic_in_kernel(vcpu))
10526                 static_branch_dec(&kvm_has_noapic_vcpu);
10527 }
10528
10529 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
10530 {
10531         kvm_lapic_reset(vcpu, init_event);
10532
10533         vcpu->arch.hflags = 0;
10534
10535         vcpu->arch.smi_pending = 0;
10536         vcpu->arch.smi_count = 0;
10537         atomic_set(&vcpu->arch.nmi_queued, 0);
10538         vcpu->arch.nmi_pending = 0;
10539         vcpu->arch.nmi_injected = false;
10540         kvm_clear_interrupt_queue(vcpu);
10541         kvm_clear_exception_queue(vcpu);
10542
10543         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
10544         kvm_update_dr0123(vcpu);
10545         vcpu->arch.dr6 = DR6_ACTIVE_LOW;
10546         vcpu->arch.dr7 = DR7_FIXED_1;
10547         kvm_update_dr7(vcpu);
10548
10549         vcpu->arch.cr2 = 0;
10550
10551         kvm_make_request(KVM_REQ_EVENT, vcpu);
10552         vcpu->arch.apf.msr_en_val = 0;
10553         vcpu->arch.apf.msr_int_val = 0;
10554         vcpu->arch.st.msr_val = 0;
10555
10556         kvmclock_reset(vcpu);
10557
10558         kvm_clear_async_pf_completion_queue(vcpu);
10559         kvm_async_pf_hash_reset(vcpu);
10560         vcpu->arch.apf.halted = false;
10561
10562         if (vcpu->arch.guest_fpu && kvm_mpx_supported()) {
10563                 void *mpx_state_buffer;
10564
10565                 /*
10566                  * To avoid have the INIT path from kvm_apic_has_events() that be
10567                  * called with loaded FPU and does not let userspace fix the state.
10568                  */
10569                 if (init_event)
10570                         kvm_put_guest_fpu(vcpu);
10571                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10572                                         XFEATURE_BNDREGS);
10573                 if (mpx_state_buffer)
10574                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
10575                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10576                                         XFEATURE_BNDCSR);
10577                 if (mpx_state_buffer)
10578                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
10579                 if (init_event)
10580                         kvm_load_guest_fpu(vcpu);
10581         }
10582
10583         if (!init_event) {
10584                 kvm_pmu_reset(vcpu);
10585                 vcpu->arch.smbase = 0x30000;
10586
10587                 vcpu->arch.msr_misc_features_enables = 0;
10588
10589                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10590         }
10591
10592         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
10593         vcpu->arch.regs_avail = ~0;
10594         vcpu->arch.regs_dirty = ~0;
10595
10596         vcpu->arch.ia32_xss = 0;
10597
10598         static_call(kvm_x86_vcpu_reset)(vcpu, init_event);
10599 }
10600
10601 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
10602 {
10603         struct kvm_segment cs;
10604
10605         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
10606         cs.selector = vector << 8;
10607         cs.base = vector << 12;
10608         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
10609         kvm_rip_write(vcpu, 0);
10610 }
10611 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector);
10612
10613 int kvm_arch_hardware_enable(void)
10614 {
10615         struct kvm *kvm;
10616         struct kvm_vcpu *vcpu;
10617         int i;
10618         int ret;
10619         u64 local_tsc;
10620         u64 max_tsc = 0;
10621         bool stable, backwards_tsc = false;
10622
10623         kvm_user_return_msr_cpu_online();
10624         ret = static_call(kvm_x86_hardware_enable)();
10625         if (ret != 0)
10626                 return ret;
10627
10628         local_tsc = rdtsc();
10629         stable = !kvm_check_tsc_unstable();
10630         list_for_each_entry(kvm, &vm_list, vm_list) {
10631                 kvm_for_each_vcpu(i, vcpu, kvm) {
10632                         if (!stable && vcpu->cpu == smp_processor_id())
10633                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
10634                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
10635                                 backwards_tsc = true;
10636                                 if (vcpu->arch.last_host_tsc > max_tsc)
10637                                         max_tsc = vcpu->arch.last_host_tsc;
10638                         }
10639                 }
10640         }
10641
10642         /*
10643          * Sometimes, even reliable TSCs go backwards.  This happens on
10644          * platforms that reset TSC during suspend or hibernate actions, but
10645          * maintain synchronization.  We must compensate.  Fortunately, we can
10646          * detect that condition here, which happens early in CPU bringup,
10647          * before any KVM threads can be running.  Unfortunately, we can't
10648          * bring the TSCs fully up to date with real time, as we aren't yet far
10649          * enough into CPU bringup that we know how much real time has actually
10650          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
10651          * variables that haven't been updated yet.
10652          *
10653          * So we simply find the maximum observed TSC above, then record the
10654          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
10655          * the adjustment will be applied.  Note that we accumulate
10656          * adjustments, in case multiple suspend cycles happen before some VCPU
10657          * gets a chance to run again.  In the event that no KVM threads get a
10658          * chance to run, we will miss the entire elapsed period, as we'll have
10659          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
10660          * loose cycle time.  This isn't too big a deal, since the loss will be
10661          * uniform across all VCPUs (not to mention the scenario is extremely
10662          * unlikely). It is possible that a second hibernate recovery happens
10663          * much faster than a first, causing the observed TSC here to be
10664          * smaller; this would require additional padding adjustment, which is
10665          * why we set last_host_tsc to the local tsc observed here.
10666          *
10667          * N.B. - this code below runs only on platforms with reliable TSC,
10668          * as that is the only way backwards_tsc is set above.  Also note
10669          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
10670          * have the same delta_cyc adjustment applied if backwards_tsc
10671          * is detected.  Note further, this adjustment is only done once,
10672          * as we reset last_host_tsc on all VCPUs to stop this from being
10673          * called multiple times (one for each physical CPU bringup).
10674          *
10675          * Platforms with unreliable TSCs don't have to deal with this, they
10676          * will be compensated by the logic in vcpu_load, which sets the TSC to
10677          * catchup mode.  This will catchup all VCPUs to real time, but cannot
10678          * guarantee that they stay in perfect synchronization.
10679          */
10680         if (backwards_tsc) {
10681                 u64 delta_cyc = max_tsc - local_tsc;
10682                 list_for_each_entry(kvm, &vm_list, vm_list) {
10683                         kvm->arch.backwards_tsc_observed = true;
10684                         kvm_for_each_vcpu(i, vcpu, kvm) {
10685                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
10686                                 vcpu->arch.last_host_tsc = local_tsc;
10687                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
10688                         }
10689
10690                         /*
10691                          * We have to disable TSC offset matching.. if you were
10692                          * booting a VM while issuing an S4 host suspend....
10693                          * you may have some problem.  Solving this issue is
10694                          * left as an exercise to the reader.
10695                          */
10696                         kvm->arch.last_tsc_nsec = 0;
10697                         kvm->arch.last_tsc_write = 0;
10698                 }
10699
10700         }
10701         return 0;
10702 }
10703
10704 void kvm_arch_hardware_disable(void)
10705 {
10706         static_call(kvm_x86_hardware_disable)();
10707         drop_user_return_notifiers();
10708 }
10709
10710 int kvm_arch_hardware_setup(void *opaque)
10711 {
10712         struct kvm_x86_init_ops *ops = opaque;
10713         int r;
10714
10715         rdmsrl_safe(MSR_EFER, &host_efer);
10716
10717         if (boot_cpu_has(X86_FEATURE_XSAVES))
10718                 rdmsrl(MSR_IA32_XSS, host_xss);
10719
10720         r = ops->hardware_setup();
10721         if (r != 0)
10722                 return r;
10723
10724         memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops));
10725         kvm_ops_static_call_update();
10726
10727         if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
10728                 supported_xss = 0;
10729
10730 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
10731         cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
10732 #undef __kvm_cpu_cap_has
10733
10734         if (kvm_has_tsc_control) {
10735                 /*
10736                  * Make sure the user can only configure tsc_khz values that
10737                  * fit into a signed integer.
10738                  * A min value is not calculated because it will always
10739                  * be 1 on all machines.
10740                  */
10741                 u64 max = min(0x7fffffffULL,
10742                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
10743                 kvm_max_guest_tsc_khz = max;
10744
10745                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
10746         }
10747
10748         kvm_init_msr_list();
10749         return 0;
10750 }
10751
10752 void kvm_arch_hardware_unsetup(void)
10753 {
10754         static_call(kvm_x86_hardware_unsetup)();
10755 }
10756
10757 int kvm_arch_check_processor_compat(void *opaque)
10758 {
10759         struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
10760         struct kvm_x86_init_ops *ops = opaque;
10761
10762         WARN_ON(!irqs_disabled());
10763
10764         if (__cr4_reserved_bits(cpu_has, c) !=
10765             __cr4_reserved_bits(cpu_has, &boot_cpu_data))
10766                 return -EIO;
10767
10768         return ops->check_processor_compatibility();
10769 }
10770
10771 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
10772 {
10773         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
10774 }
10775 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
10776
10777 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
10778 {
10779         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
10780 }
10781
10782 __read_mostly DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu);
10783 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu);
10784
10785 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
10786 {
10787         struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
10788
10789         vcpu->arch.l1tf_flush_l1d = true;
10790         if (pmu->version && unlikely(pmu->event_count)) {
10791                 pmu->need_cleanup = true;
10792                 kvm_make_request(KVM_REQ_PMU, vcpu);
10793         }
10794         static_call(kvm_x86_sched_in)(vcpu, cpu);
10795 }
10796
10797 void kvm_arch_free_vm(struct kvm *kvm)
10798 {
10799         kfree(to_kvm_hv(kvm)->hv_pa_pg);
10800         vfree(kvm);
10801 }
10802
10803
10804 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
10805 {
10806         if (type)
10807                 return -EINVAL;
10808
10809         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
10810         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
10811         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
10812         INIT_LIST_HEAD(&kvm->arch.lpage_disallowed_mmu_pages);
10813         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
10814         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
10815
10816         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
10817         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
10818         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
10819         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
10820                 &kvm->arch.irq_sources_bitmap);
10821
10822         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
10823         mutex_init(&kvm->arch.apic_map_lock);
10824         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
10825
10826         kvm->arch.kvmclock_offset = -get_kvmclock_base_ns();
10827         pvclock_update_vm_gtod_copy(kvm);
10828
10829         kvm->arch.guest_can_read_msr_platform_info = true;
10830
10831         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
10832         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
10833
10834         kvm_hv_init_vm(kvm);
10835         kvm_page_track_init(kvm);
10836         kvm_mmu_init_vm(kvm);
10837
10838         return static_call(kvm_x86_vm_init)(kvm);
10839 }
10840
10841 int kvm_arch_post_init_vm(struct kvm *kvm)
10842 {
10843         return kvm_mmu_post_init_vm(kvm);
10844 }
10845
10846 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
10847 {
10848         vcpu_load(vcpu);
10849         kvm_mmu_unload(vcpu);
10850         vcpu_put(vcpu);
10851 }
10852
10853 static void kvm_free_vcpus(struct kvm *kvm)
10854 {
10855         unsigned int i;
10856         struct kvm_vcpu *vcpu;
10857
10858         /*
10859          * Unpin any mmu pages first.
10860          */
10861         kvm_for_each_vcpu(i, vcpu, kvm) {
10862                 kvm_clear_async_pf_completion_queue(vcpu);
10863                 kvm_unload_vcpu_mmu(vcpu);
10864         }
10865         kvm_for_each_vcpu(i, vcpu, kvm)
10866                 kvm_vcpu_destroy(vcpu);
10867
10868         mutex_lock(&kvm->lock);
10869         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
10870                 kvm->vcpus[i] = NULL;
10871
10872         atomic_set(&kvm->online_vcpus, 0);
10873         mutex_unlock(&kvm->lock);
10874 }
10875
10876 void kvm_arch_sync_events(struct kvm *kvm)
10877 {
10878         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
10879         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
10880         kvm_free_pit(kvm);
10881 }
10882
10883 #define  ERR_PTR_USR(e)  ((void __user *)ERR_PTR(e))
10884
10885 /**
10886  * __x86_set_memory_region: Setup KVM internal memory slot
10887  *
10888  * @kvm: the kvm pointer to the VM.
10889  * @id: the slot ID to setup.
10890  * @gpa: the GPA to install the slot (unused when @size == 0).
10891  * @size: the size of the slot. Set to zero to uninstall a slot.
10892  *
10893  * This function helps to setup a KVM internal memory slot.  Specify
10894  * @size > 0 to install a new slot, while @size == 0 to uninstall a
10895  * slot.  The return code can be one of the following:
10896  *
10897  *   HVA:           on success (uninstall will return a bogus HVA)
10898  *   -errno:        on error
10899  *
10900  * The caller should always use IS_ERR() to check the return value
10901  * before use.  Note, the KVM internal memory slots are guaranteed to
10902  * remain valid and unchanged until the VM is destroyed, i.e., the
10903  * GPA->HVA translation will not change.  However, the HVA is a user
10904  * address, i.e. its accessibility is not guaranteed, and must be
10905  * accessed via __copy_{to,from}_user().
10906  */
10907 void __user * __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
10908                                       u32 size)
10909 {
10910         int i, r;
10911         unsigned long hva, old_npages;
10912         struct kvm_memslots *slots = kvm_memslots(kvm);
10913         struct kvm_memory_slot *slot;
10914
10915         /* Called with kvm->slots_lock held.  */
10916         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
10917                 return ERR_PTR_USR(-EINVAL);
10918
10919         slot = id_to_memslot(slots, id);
10920         if (size) {
10921                 if (slot && slot->npages)
10922                         return ERR_PTR_USR(-EEXIST);
10923
10924                 /*
10925                  * MAP_SHARED to prevent internal slot pages from being moved
10926                  * by fork()/COW.
10927                  */
10928                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
10929                               MAP_SHARED | MAP_ANONYMOUS, 0);
10930                 if (IS_ERR((void *)hva))
10931                         return (void __user *)hva;
10932         } else {
10933                 if (!slot || !slot->npages)
10934                         return NULL;
10935
10936                 old_npages = slot->npages;
10937                 hva = slot->userspace_addr;
10938         }
10939
10940         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
10941                 struct kvm_userspace_memory_region m;
10942
10943                 m.slot = id | (i << 16);
10944                 m.flags = 0;
10945                 m.guest_phys_addr = gpa;
10946                 m.userspace_addr = hva;
10947                 m.memory_size = size;
10948                 r = __kvm_set_memory_region(kvm, &m);
10949                 if (r < 0)
10950                         return ERR_PTR_USR(r);
10951         }
10952
10953         if (!size)
10954                 vm_munmap(hva, old_npages * PAGE_SIZE);
10955
10956         return (void __user *)hva;
10957 }
10958 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
10959
10960 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
10961 {
10962         kvm_mmu_pre_destroy_vm(kvm);
10963 }
10964
10965 void kvm_arch_destroy_vm(struct kvm *kvm)
10966 {
10967         if (current->mm == kvm->mm) {
10968                 /*
10969                  * Free memory regions allocated on behalf of userspace,
10970                  * unless the the memory map has changed due to process exit
10971                  * or fd copying.
10972                  */
10973                 mutex_lock(&kvm->slots_lock);
10974                 __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
10975                                         0, 0);
10976                 __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
10977                                         0, 0);
10978                 __x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
10979                 mutex_unlock(&kvm->slots_lock);
10980         }
10981         static_call_cond(kvm_x86_vm_destroy)(kvm);
10982         kvm_free_msr_filter(srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1));
10983         kvm_pic_destroy(kvm);
10984         kvm_ioapic_destroy(kvm);
10985         kvm_free_vcpus(kvm);
10986         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
10987         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
10988         kvm_mmu_uninit_vm(kvm);
10989         kvm_page_track_cleanup(kvm);
10990         kvm_xen_destroy_vm(kvm);
10991         kvm_hv_destroy_vm(kvm);
10992 }
10993
10994 static void memslot_rmap_free(struct kvm_memory_slot *slot)
10995 {
10996         int i;
10997
10998         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10999                 kvfree(slot->arch.rmap[i]);
11000                 slot->arch.rmap[i] = NULL;
11001         }
11002 }
11003
11004 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
11005 {
11006         int i;
11007
11008         memslot_rmap_free(slot);
11009
11010         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11011                 kvfree(slot->arch.lpage_info[i - 1]);
11012                 slot->arch.lpage_info[i - 1] = NULL;
11013         }
11014
11015         kvm_page_track_free_memslot(slot);
11016 }
11017
11018 static int memslot_rmap_alloc(struct kvm_memory_slot *slot,
11019                               unsigned long npages)
11020 {
11021         const int sz = sizeof(*slot->arch.rmap[0]);
11022         int i;
11023
11024         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11025                 int level = i + 1;
11026                 int lpages = gfn_to_index(slot->base_gfn + npages - 1,
11027                                           slot->base_gfn, level) + 1;
11028
11029                 WARN_ON(slot->arch.rmap[i]);
11030
11031                 slot->arch.rmap[i] = kvcalloc(lpages, sz, GFP_KERNEL_ACCOUNT);
11032                 if (!slot->arch.rmap[i]) {
11033                         memslot_rmap_free(slot);
11034                         return -ENOMEM;
11035                 }
11036         }
11037
11038         return 0;
11039 }
11040
11041 int alloc_all_memslots_rmaps(struct kvm *kvm)
11042 {
11043         struct kvm_memslots *slots;
11044         struct kvm_memory_slot *slot;
11045         int r, i;
11046
11047         /*
11048          * Check if memslots alreday have rmaps early before acquiring
11049          * the slots_arch_lock below.
11050          */
11051         if (kvm_memslots_have_rmaps(kvm))
11052                 return 0;
11053
11054         mutex_lock(&kvm->slots_arch_lock);
11055
11056         /*
11057          * Read memslots_have_rmaps again, under the slots arch lock,
11058          * before allocating the rmaps
11059          */
11060         if (kvm_memslots_have_rmaps(kvm)) {
11061                 mutex_unlock(&kvm->slots_arch_lock);
11062                 return 0;
11063         }
11064
11065         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
11066                 slots = __kvm_memslots(kvm, i);
11067                 kvm_for_each_memslot(slot, slots) {
11068                         r = memslot_rmap_alloc(slot, slot->npages);
11069                         if (r) {
11070                                 mutex_unlock(&kvm->slots_arch_lock);
11071                                 return r;
11072                         }
11073                 }
11074         }
11075
11076         /*
11077          * Ensure that memslots_have_rmaps becomes true strictly after
11078          * all the rmap pointers are set.
11079          */
11080         smp_store_release(&kvm->arch.memslots_have_rmaps, true);
11081         mutex_unlock(&kvm->slots_arch_lock);
11082         return 0;
11083 }
11084
11085 static int kvm_alloc_memslot_metadata(struct kvm *kvm,
11086                                       struct kvm_memory_slot *slot,
11087                                       unsigned long npages)
11088 {
11089         int i, r;
11090
11091         /*
11092          * Clear out the previous array pointers for the KVM_MR_MOVE case.  The
11093          * old arrays will be freed by __kvm_set_memory_region() if installing
11094          * the new memslot is successful.
11095          */
11096         memset(&slot->arch, 0, sizeof(slot->arch));
11097
11098         if (kvm_memslots_have_rmaps(kvm)) {
11099                 r = memslot_rmap_alloc(slot, npages);
11100                 if (r)
11101                         return r;
11102         }
11103
11104         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11105                 struct kvm_lpage_info *linfo;
11106                 unsigned long ugfn;
11107                 int lpages;
11108                 int level = i + 1;
11109
11110                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
11111                                       slot->base_gfn, level) + 1;
11112
11113                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
11114                 if (!linfo)
11115                         goto out_free;
11116
11117                 slot->arch.lpage_info[i - 1] = linfo;
11118
11119                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
11120                         linfo[0].disallow_lpage = 1;
11121                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
11122                         linfo[lpages - 1].disallow_lpage = 1;
11123                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
11124                 /*
11125                  * If the gfn and userspace address are not aligned wrt each
11126                  * other, disable large page support for this slot.
11127                  */
11128                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1)) {
11129                         unsigned long j;
11130
11131                         for (j = 0; j < lpages; ++j)
11132                                 linfo[j].disallow_lpage = 1;
11133                 }
11134         }
11135
11136         if (kvm_page_track_create_memslot(slot, npages))
11137                 goto out_free;
11138
11139         return 0;
11140
11141 out_free:
11142         memslot_rmap_free(slot);
11143
11144         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11145                 kvfree(slot->arch.lpage_info[i - 1]);
11146                 slot->arch.lpage_info[i - 1] = NULL;
11147         }
11148         return -ENOMEM;
11149 }
11150
11151 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
11152 {
11153         struct kvm_vcpu *vcpu;
11154         int i;
11155
11156         /*
11157          * memslots->generation has been incremented.
11158          * mmio generation may have reached its maximum value.
11159          */
11160         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
11161
11162         /* Force re-initialization of steal_time cache */
11163         kvm_for_each_vcpu(i, vcpu, kvm)
11164                 kvm_vcpu_kick(vcpu);
11165 }
11166
11167 int kvm_arch_prepare_memory_region(struct kvm *kvm,
11168                                 struct kvm_memory_slot *memslot,
11169                                 const struct kvm_userspace_memory_region *mem,
11170                                 enum kvm_mr_change change)
11171 {
11172         if (change == KVM_MR_CREATE || change == KVM_MR_MOVE)
11173                 return kvm_alloc_memslot_metadata(kvm, memslot,
11174                                                   mem->memory_size >> PAGE_SHIFT);
11175         return 0;
11176 }
11177
11178
11179 static void kvm_mmu_update_cpu_dirty_logging(struct kvm *kvm, bool enable)
11180 {
11181         struct kvm_arch *ka = &kvm->arch;
11182
11183         if (!kvm_x86_ops.cpu_dirty_log_size)
11184                 return;
11185
11186         if ((enable && ++ka->cpu_dirty_logging_count == 1) ||
11187             (!enable && --ka->cpu_dirty_logging_count == 0))
11188                 kvm_make_all_cpus_request(kvm, KVM_REQ_UPDATE_CPU_DIRTY_LOGGING);
11189
11190         WARN_ON_ONCE(ka->cpu_dirty_logging_count < 0);
11191 }
11192
11193 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
11194                                      struct kvm_memory_slot *old,
11195                                      struct kvm_memory_slot *new,
11196                                      enum kvm_mr_change change)
11197 {
11198         bool log_dirty_pages = new->flags & KVM_MEM_LOG_DIRTY_PAGES;
11199
11200         /*
11201          * Update CPU dirty logging if dirty logging is being toggled.  This
11202          * applies to all operations.
11203          */
11204         if ((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)
11205                 kvm_mmu_update_cpu_dirty_logging(kvm, log_dirty_pages);
11206
11207         /*
11208          * Nothing more to do for RO slots (which can't be dirtied and can't be
11209          * made writable) or CREATE/MOVE/DELETE of a slot.
11210          *
11211          * For a memslot with dirty logging disabled:
11212          * CREATE:      No dirty mappings will already exist.
11213          * MOVE/DELETE: The old mappings will already have been cleaned up by
11214          *              kvm_arch_flush_shadow_memslot()
11215          *
11216          * For a memslot with dirty logging enabled:
11217          * CREATE:      No shadow pages exist, thus nothing to write-protect
11218          *              and no dirty bits to clear.
11219          * MOVE/DELETE: The old mappings will already have been cleaned up by
11220          *              kvm_arch_flush_shadow_memslot().
11221          */
11222         if ((change != KVM_MR_FLAGS_ONLY) || (new->flags & KVM_MEM_READONLY))
11223                 return;
11224
11225         /*
11226          * READONLY and non-flags changes were filtered out above, and the only
11227          * other flag is LOG_DIRTY_PAGES, i.e. something is wrong if dirty
11228          * logging isn't being toggled on or off.
11229          */
11230         if (WARN_ON_ONCE(!((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)))
11231                 return;
11232
11233         if (!log_dirty_pages) {
11234                 /*
11235                  * Dirty logging tracks sptes in 4k granularity, meaning that
11236                  * large sptes have to be split.  If live migration succeeds,
11237                  * the guest in the source machine will be destroyed and large
11238                  * sptes will be created in the destination.  However, if the
11239                  * guest continues to run in the source machine (for example if
11240                  * live migration fails), small sptes will remain around and
11241                  * cause bad performance.
11242                  *
11243                  * Scan sptes if dirty logging has been stopped, dropping those
11244                  * which can be collapsed into a single large-page spte.  Later
11245                  * page faults will create the large-page sptes.
11246                  */
11247                 kvm_mmu_zap_collapsible_sptes(kvm, new);
11248         } else {
11249                 /*
11250                  * Initially-all-set does not require write protecting any page,
11251                  * because they're all assumed to be dirty.
11252                  */
11253                 if (kvm_dirty_log_manual_protect_and_init_set(kvm))
11254                         return;
11255
11256                 if (kvm_x86_ops.cpu_dirty_log_size) {
11257                         kvm_mmu_slot_leaf_clear_dirty(kvm, new);
11258                         kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_2M);
11259                 } else {
11260                         kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_4K);
11261                 }
11262         }
11263 }
11264
11265 void kvm_arch_commit_memory_region(struct kvm *kvm,
11266                                 const struct kvm_userspace_memory_region *mem,
11267                                 struct kvm_memory_slot *old,
11268                                 const struct kvm_memory_slot *new,
11269                                 enum kvm_mr_change change)
11270 {
11271         if (!kvm->arch.n_requested_mmu_pages)
11272                 kvm_mmu_change_mmu_pages(kvm,
11273                                 kvm_mmu_calculate_default_mmu_pages(kvm));
11274
11275         /*
11276          * FIXME: const-ify all uses of struct kvm_memory_slot.
11277          */
11278         kvm_mmu_slot_apply_flags(kvm, old, (struct kvm_memory_slot *) new, change);
11279
11280         /* Free the arrays associated with the old memslot. */
11281         if (change == KVM_MR_MOVE)
11282                 kvm_arch_free_memslot(kvm, old);
11283 }
11284
11285 void kvm_arch_flush_shadow_all(struct kvm *kvm)
11286 {
11287         kvm_mmu_zap_all(kvm);
11288 }
11289
11290 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
11291                                    struct kvm_memory_slot *slot)
11292 {
11293         kvm_page_track_flush_slot(kvm, slot);
11294 }
11295
11296 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
11297 {
11298         return (is_guest_mode(vcpu) &&
11299                         kvm_x86_ops.guest_apic_has_interrupt &&
11300                         static_call(kvm_x86_guest_apic_has_interrupt)(vcpu));
11301 }
11302
11303 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
11304 {
11305         if (!list_empty_careful(&vcpu->async_pf.done))
11306                 return true;
11307
11308         if (kvm_apic_has_events(vcpu))
11309                 return true;
11310
11311         if (vcpu->arch.pv.pv_unhalted)
11312                 return true;
11313
11314         if (vcpu->arch.exception.pending)
11315                 return true;
11316
11317         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
11318             (vcpu->arch.nmi_pending &&
11319              static_call(kvm_x86_nmi_allowed)(vcpu, false)))
11320                 return true;
11321
11322         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
11323             (vcpu->arch.smi_pending &&
11324              static_call(kvm_x86_smi_allowed)(vcpu, false)))
11325                 return true;
11326
11327         if (kvm_arch_interrupt_allowed(vcpu) &&
11328             (kvm_cpu_has_interrupt(vcpu) ||
11329             kvm_guest_apic_has_interrupt(vcpu)))
11330                 return true;
11331
11332         if (kvm_hv_has_stimer_pending(vcpu))
11333                 return true;
11334
11335         if (is_guest_mode(vcpu) &&
11336             kvm_x86_ops.nested_ops->hv_timer_pending &&
11337             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
11338                 return true;
11339
11340         return false;
11341 }
11342
11343 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
11344 {
11345         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
11346 }
11347
11348 bool kvm_arch_dy_has_pending_interrupt(struct kvm_vcpu *vcpu)
11349 {
11350         if (vcpu->arch.apicv_active && static_call(kvm_x86_dy_apicv_has_pending_interrupt)(vcpu))
11351                 return true;
11352
11353         return false;
11354 }
11355
11356 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
11357 {
11358         if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
11359                 return true;
11360
11361         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
11362                 kvm_test_request(KVM_REQ_SMI, vcpu) ||
11363                  kvm_test_request(KVM_REQ_EVENT, vcpu))
11364                 return true;
11365
11366         return kvm_arch_dy_has_pending_interrupt(vcpu);
11367 }
11368
11369 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
11370 {
11371         if (vcpu->arch.guest_state_protected)
11372                 return true;
11373
11374         return vcpu->arch.preempted_in_kernel;
11375 }
11376
11377 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
11378 {
11379         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
11380 }
11381
11382 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
11383 {
11384         return static_call(kvm_x86_interrupt_allowed)(vcpu, false);
11385 }
11386
11387 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
11388 {
11389         /* Can't read the RIP when guest state is protected, just return 0 */
11390         if (vcpu->arch.guest_state_protected)
11391                 return 0;
11392
11393         if (is_64_bit_mode(vcpu))
11394                 return kvm_rip_read(vcpu);
11395         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
11396                      kvm_rip_read(vcpu));
11397 }
11398 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
11399
11400 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
11401 {
11402         return kvm_get_linear_rip(vcpu) == linear_rip;
11403 }
11404 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
11405
11406 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
11407 {
11408         unsigned long rflags;
11409
11410         rflags = static_call(kvm_x86_get_rflags)(vcpu);
11411         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
11412                 rflags &= ~X86_EFLAGS_TF;
11413         return rflags;
11414 }
11415 EXPORT_SYMBOL_GPL(kvm_get_rflags);
11416
11417 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
11418 {
11419         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
11420             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
11421                 rflags |= X86_EFLAGS_TF;
11422         static_call(kvm_x86_set_rflags)(vcpu, rflags);
11423 }
11424
11425 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
11426 {
11427         __kvm_set_rflags(vcpu, rflags);
11428         kvm_make_request(KVM_REQ_EVENT, vcpu);
11429 }
11430 EXPORT_SYMBOL_GPL(kvm_set_rflags);
11431
11432 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
11433 {
11434         int r;
11435
11436         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
11437               work->wakeup_all)
11438                 return;
11439
11440         r = kvm_mmu_reload(vcpu);
11441         if (unlikely(r))
11442                 return;
11443
11444         if (!vcpu->arch.mmu->direct_map &&
11445               work->arch.cr3 != vcpu->arch.mmu->get_guest_pgd(vcpu))
11446                 return;
11447
11448         kvm_mmu_do_page_fault(vcpu, work->cr2_or_gpa, 0, true);
11449 }
11450
11451 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
11452 {
11453         BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU));
11454
11455         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
11456 }
11457
11458 static inline u32 kvm_async_pf_next_probe(u32 key)
11459 {
11460         return (key + 1) & (ASYNC_PF_PER_VCPU - 1);
11461 }
11462
11463 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11464 {
11465         u32 key = kvm_async_pf_hash_fn(gfn);
11466
11467         while (vcpu->arch.apf.gfns[key] != ~0)
11468                 key = kvm_async_pf_next_probe(key);
11469
11470         vcpu->arch.apf.gfns[key] = gfn;
11471 }
11472
11473 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
11474 {
11475         int i;
11476         u32 key = kvm_async_pf_hash_fn(gfn);
11477
11478         for (i = 0; i < ASYNC_PF_PER_VCPU &&
11479                      (vcpu->arch.apf.gfns[key] != gfn &&
11480                       vcpu->arch.apf.gfns[key] != ~0); i++)
11481                 key = kvm_async_pf_next_probe(key);
11482
11483         return key;
11484 }
11485
11486 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11487 {
11488         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
11489 }
11490
11491 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11492 {
11493         u32 i, j, k;
11494
11495         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
11496
11497         if (WARN_ON_ONCE(vcpu->arch.apf.gfns[i] != gfn))
11498                 return;
11499
11500         while (true) {
11501                 vcpu->arch.apf.gfns[i] = ~0;
11502                 do {
11503                         j = kvm_async_pf_next_probe(j);
11504                         if (vcpu->arch.apf.gfns[j] == ~0)
11505                                 return;
11506                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
11507                         /*
11508                          * k lies cyclically in ]i,j]
11509                          * |    i.k.j |
11510                          * |....j i.k.| or  |.k..j i...|
11511                          */
11512                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
11513                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
11514                 i = j;
11515         }
11516 }
11517
11518 static inline int apf_put_user_notpresent(struct kvm_vcpu *vcpu)
11519 {
11520         u32 reason = KVM_PV_REASON_PAGE_NOT_PRESENT;
11521
11522         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &reason,
11523                                       sizeof(reason));
11524 }
11525
11526 static inline int apf_put_user_ready(struct kvm_vcpu *vcpu, u32 token)
11527 {
11528         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
11529
11530         return kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
11531                                              &token, offset, sizeof(token));
11532 }
11533
11534 static inline bool apf_pageready_slot_free(struct kvm_vcpu *vcpu)
11535 {
11536         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
11537         u32 val;
11538
11539         if (kvm_read_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
11540                                          &val, offset, sizeof(val)))
11541                 return false;
11542
11543         return !val;
11544 }
11545
11546 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
11547 {
11548         if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
11549                 return false;
11550
11551         if (!kvm_pv_async_pf_enabled(vcpu) ||
11552             (vcpu->arch.apf.send_user_only && static_call(kvm_x86_get_cpl)(vcpu) == 0))
11553                 return false;
11554
11555         return true;
11556 }
11557
11558 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
11559 {
11560         if (unlikely(!lapic_in_kernel(vcpu) ||
11561                      kvm_event_needs_reinjection(vcpu) ||
11562                      vcpu->arch.exception.pending))
11563                 return false;
11564
11565         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
11566                 return false;
11567
11568         /*
11569          * If interrupts are off we cannot even use an artificial
11570          * halt state.
11571          */
11572         return kvm_arch_interrupt_allowed(vcpu);
11573 }
11574
11575 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
11576                                      struct kvm_async_pf *work)
11577 {
11578         struct x86_exception fault;
11579
11580         trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
11581         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
11582
11583         if (kvm_can_deliver_async_pf(vcpu) &&
11584             !apf_put_user_notpresent(vcpu)) {
11585                 fault.vector = PF_VECTOR;
11586                 fault.error_code_valid = true;
11587                 fault.error_code = 0;
11588                 fault.nested_page_fault = false;
11589                 fault.address = work->arch.token;
11590                 fault.async_page_fault = true;
11591                 kvm_inject_page_fault(vcpu, &fault);
11592                 return true;
11593         } else {
11594                 /*
11595                  * It is not possible to deliver a paravirtualized asynchronous
11596                  * page fault, but putting the guest in an artificial halt state
11597                  * can be beneficial nevertheless: if an interrupt arrives, we
11598                  * can deliver it timely and perhaps the guest will schedule
11599                  * another process.  When the instruction that triggered a page
11600                  * fault is retried, hopefully the page will be ready in the host.
11601                  */
11602                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
11603                 return false;
11604         }
11605 }
11606
11607 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
11608                                  struct kvm_async_pf *work)
11609 {
11610         struct kvm_lapic_irq irq = {
11611                 .delivery_mode = APIC_DM_FIXED,
11612                 .vector = vcpu->arch.apf.vec
11613         };
11614
11615         if (work->wakeup_all)
11616                 work->arch.token = ~0; /* broadcast wakeup */
11617         else
11618                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
11619         trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
11620
11621         if ((work->wakeup_all || work->notpresent_injected) &&
11622             kvm_pv_async_pf_enabled(vcpu) &&
11623             !apf_put_user_ready(vcpu, work->arch.token)) {
11624                 vcpu->arch.apf.pageready_pending = true;
11625                 kvm_apic_set_irq(vcpu, &irq, NULL);
11626         }
11627
11628         vcpu->arch.apf.halted = false;
11629         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
11630 }
11631
11632 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu)
11633 {
11634         kvm_make_request(KVM_REQ_APF_READY, vcpu);
11635         if (!vcpu->arch.apf.pageready_pending)
11636                 kvm_vcpu_kick(vcpu);
11637 }
11638
11639 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu)
11640 {
11641         if (!kvm_pv_async_pf_enabled(vcpu))
11642                 return true;
11643         else
11644                 return kvm_lapic_enabled(vcpu) && apf_pageready_slot_free(vcpu);
11645 }
11646
11647 void kvm_arch_start_assignment(struct kvm *kvm)
11648 {
11649         if (atomic_inc_return(&kvm->arch.assigned_device_count) == 1)
11650                 static_call_cond(kvm_x86_start_assignment)(kvm);
11651 }
11652 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
11653
11654 void kvm_arch_end_assignment(struct kvm *kvm)
11655 {
11656         atomic_dec(&kvm->arch.assigned_device_count);
11657 }
11658 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
11659
11660 bool kvm_arch_has_assigned_device(struct kvm *kvm)
11661 {
11662         return atomic_read(&kvm->arch.assigned_device_count);
11663 }
11664 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
11665
11666 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
11667 {
11668         atomic_inc(&kvm->arch.noncoherent_dma_count);
11669 }
11670 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
11671
11672 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
11673 {
11674         atomic_dec(&kvm->arch.noncoherent_dma_count);
11675 }
11676 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
11677
11678 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
11679 {
11680         return atomic_read(&kvm->arch.noncoherent_dma_count);
11681 }
11682 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
11683
11684 bool kvm_arch_has_irq_bypass(void)
11685 {
11686         return true;
11687 }
11688
11689 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
11690                                       struct irq_bypass_producer *prod)
11691 {
11692         struct kvm_kernel_irqfd *irqfd =
11693                 container_of(cons, struct kvm_kernel_irqfd, consumer);
11694         int ret;
11695
11696         irqfd->producer = prod;
11697         kvm_arch_start_assignment(irqfd->kvm);
11698         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm,
11699                                          prod->irq, irqfd->gsi, 1);
11700
11701         if (ret)
11702                 kvm_arch_end_assignment(irqfd->kvm);
11703
11704         return ret;
11705 }
11706
11707 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
11708                                       struct irq_bypass_producer *prod)
11709 {
11710         int ret;
11711         struct kvm_kernel_irqfd *irqfd =
11712                 container_of(cons, struct kvm_kernel_irqfd, consumer);
11713
11714         WARN_ON(irqfd->producer != prod);
11715         irqfd->producer = NULL;
11716
11717         /*
11718          * When producer of consumer is unregistered, we change back to
11719          * remapped mode, so we can re-use the current implementation
11720          * when the irq is masked/disabled or the consumer side (KVM
11721          * int this case doesn't want to receive the interrupts.
11722         */
11723         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm, prod->irq, irqfd->gsi, 0);
11724         if (ret)
11725                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
11726                        " fails: %d\n", irqfd->consumer.token, ret);
11727
11728         kvm_arch_end_assignment(irqfd->kvm);
11729 }
11730
11731 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
11732                                    uint32_t guest_irq, bool set)
11733 {
11734         return static_call(kvm_x86_update_pi_irte)(kvm, host_irq, guest_irq, set);
11735 }
11736
11737 bool kvm_vector_hashing_enabled(void)
11738 {
11739         return vector_hashing;
11740 }
11741
11742 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
11743 {
11744         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
11745 }
11746 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
11747
11748
11749 int kvm_spec_ctrl_test_value(u64 value)
11750 {
11751         /*
11752          * test that setting IA32_SPEC_CTRL to given value
11753          * is allowed by the host processor
11754          */
11755
11756         u64 saved_value;
11757         unsigned long flags;
11758         int ret = 0;
11759
11760         local_irq_save(flags);
11761
11762         if (rdmsrl_safe(MSR_IA32_SPEC_CTRL, &saved_value))
11763                 ret = 1;
11764         else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value))
11765                 ret = 1;
11766         else
11767                 wrmsrl(MSR_IA32_SPEC_CTRL, saved_value);
11768
11769         local_irq_restore(flags);
11770
11771         return ret;
11772 }
11773 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value);
11774
11775 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code)
11776 {
11777         struct x86_exception fault;
11778         u32 access = error_code &
11779                 (PFERR_WRITE_MASK | PFERR_FETCH_MASK | PFERR_USER_MASK);
11780
11781         if (!(error_code & PFERR_PRESENT_MASK) ||
11782             vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, &fault) != UNMAPPED_GVA) {
11783                 /*
11784                  * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
11785                  * tables probably do not match the TLB.  Just proceed
11786                  * with the error code that the processor gave.
11787                  */
11788                 fault.vector = PF_VECTOR;
11789                 fault.error_code_valid = true;
11790                 fault.error_code = error_code;
11791                 fault.nested_page_fault = false;
11792                 fault.address = gva;
11793         }
11794         vcpu->arch.walk_mmu->inject_page_fault(vcpu, &fault);
11795 }
11796 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error);
11797
11798 /*
11799  * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
11800  * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
11801  * indicates whether exit to userspace is needed.
11802  */
11803 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
11804                               struct x86_exception *e)
11805 {
11806         if (r == X86EMUL_PROPAGATE_FAULT) {
11807                 kvm_inject_emulated_page_fault(vcpu, e);
11808                 return 1;
11809         }
11810
11811         /*
11812          * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
11813          * while handling a VMX instruction KVM could've handled the request
11814          * correctly by exiting to userspace and performing I/O but there
11815          * doesn't seem to be a real use-case behind such requests, just return
11816          * KVM_EXIT_INTERNAL_ERROR for now.
11817          */
11818         vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
11819         vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
11820         vcpu->run->internal.ndata = 0;
11821
11822         return 0;
11823 }
11824 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure);
11825
11826 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva)
11827 {
11828         bool pcid_enabled;
11829         struct x86_exception e;
11830         unsigned i;
11831         unsigned long roots_to_free = 0;
11832         struct {
11833                 u64 pcid;
11834                 u64 gla;
11835         } operand;
11836         int r;
11837
11838         r = kvm_read_guest_virt(vcpu, gva, &operand, sizeof(operand), &e);
11839         if (r != X86EMUL_CONTINUE)
11840                 return kvm_handle_memory_failure(vcpu, r, &e);
11841
11842         if (operand.pcid >> 12 != 0) {
11843                 kvm_inject_gp(vcpu, 0);
11844                 return 1;
11845         }
11846
11847         pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
11848
11849         switch (type) {
11850         case INVPCID_TYPE_INDIV_ADDR:
11851                 if ((!pcid_enabled && (operand.pcid != 0)) ||
11852                     is_noncanonical_address(operand.gla, vcpu)) {
11853                         kvm_inject_gp(vcpu, 0);
11854                         return 1;
11855                 }
11856                 kvm_mmu_invpcid_gva(vcpu, operand.gla, operand.pcid);
11857                 return kvm_skip_emulated_instruction(vcpu);
11858
11859         case INVPCID_TYPE_SINGLE_CTXT:
11860                 if (!pcid_enabled && (operand.pcid != 0)) {
11861                         kvm_inject_gp(vcpu, 0);
11862                         return 1;
11863                 }
11864
11865                 if (kvm_get_active_pcid(vcpu) == operand.pcid) {
11866                         kvm_mmu_sync_roots(vcpu);
11867                         kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
11868                 }
11869
11870                 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
11871                         if (kvm_get_pcid(vcpu, vcpu->arch.mmu->prev_roots[i].pgd)
11872                             == operand.pcid)
11873                                 roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
11874
11875                 kvm_mmu_free_roots(vcpu, vcpu->arch.mmu, roots_to_free);
11876                 /*
11877                  * If neither the current cr3 nor any of the prev_roots use the
11878                  * given PCID, then nothing needs to be done here because a
11879                  * resync will happen anyway before switching to any other CR3.
11880                  */
11881
11882                 return kvm_skip_emulated_instruction(vcpu);
11883
11884         case INVPCID_TYPE_ALL_NON_GLOBAL:
11885                 /*
11886                  * Currently, KVM doesn't mark global entries in the shadow
11887                  * page tables, so a non-global flush just degenerates to a
11888                  * global flush. If needed, we could optimize this later by
11889                  * keeping track of global entries in shadow page tables.
11890                  */
11891
11892                 fallthrough;
11893         case INVPCID_TYPE_ALL_INCL_GLOBAL:
11894                 kvm_make_request(KVM_REQ_MMU_RELOAD, vcpu);
11895                 return kvm_skip_emulated_instruction(vcpu);
11896
11897         default:
11898                 BUG(); /* We have already checked above that type <= 3 */
11899         }
11900 }
11901 EXPORT_SYMBOL_GPL(kvm_handle_invpcid);
11902
11903 static int complete_sev_es_emulated_mmio(struct kvm_vcpu *vcpu)
11904 {
11905         struct kvm_run *run = vcpu->run;
11906         struct kvm_mmio_fragment *frag;
11907         unsigned int len;
11908
11909         BUG_ON(!vcpu->mmio_needed);
11910
11911         /* Complete previous fragment */
11912         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
11913         len = min(8u, frag->len);
11914         if (!vcpu->mmio_is_write)
11915                 memcpy(frag->data, run->mmio.data, len);
11916
11917         if (frag->len <= 8) {
11918                 /* Switch to the next fragment. */
11919                 frag++;
11920                 vcpu->mmio_cur_fragment++;
11921         } else {
11922                 /* Go forward to the next mmio piece. */
11923                 frag->data += len;
11924                 frag->gpa += len;
11925                 frag->len -= len;
11926         }
11927
11928         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
11929                 vcpu->mmio_needed = 0;
11930
11931                 // VMG change, at this point, we're always done
11932                 // RIP has already been advanced
11933                 return 1;
11934         }
11935
11936         // More MMIO is needed
11937         run->mmio.phys_addr = frag->gpa;
11938         run->mmio.len = min(8u, frag->len);
11939         run->mmio.is_write = vcpu->mmio_is_write;
11940         if (run->mmio.is_write)
11941                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
11942         run->exit_reason = KVM_EXIT_MMIO;
11943
11944         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
11945
11946         return 0;
11947 }
11948
11949 int kvm_sev_es_mmio_write(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
11950                           void *data)
11951 {
11952         int handled;
11953         struct kvm_mmio_fragment *frag;
11954
11955         if (!data)
11956                 return -EINVAL;
11957
11958         handled = write_emultor.read_write_mmio(vcpu, gpa, bytes, data);
11959         if (handled == bytes)
11960                 return 1;
11961
11962         bytes -= handled;
11963         gpa += handled;
11964         data += handled;
11965
11966         /*TODO: Check if need to increment number of frags */
11967         frag = vcpu->mmio_fragments;
11968         vcpu->mmio_nr_fragments = 1;
11969         frag->len = bytes;
11970         frag->gpa = gpa;
11971         frag->data = data;
11972
11973         vcpu->mmio_needed = 1;
11974         vcpu->mmio_cur_fragment = 0;
11975
11976         vcpu->run->mmio.phys_addr = gpa;
11977         vcpu->run->mmio.len = min(8u, frag->len);
11978         vcpu->run->mmio.is_write = 1;
11979         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
11980         vcpu->run->exit_reason = KVM_EXIT_MMIO;
11981
11982         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
11983
11984         return 0;
11985 }
11986 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write);
11987
11988 int kvm_sev_es_mmio_read(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
11989                          void *data)
11990 {
11991         int handled;
11992         struct kvm_mmio_fragment *frag;
11993
11994         if (!data)
11995                 return -EINVAL;
11996
11997         handled = read_emultor.read_write_mmio(vcpu, gpa, bytes, data);
11998         if (handled == bytes)
11999                 return 1;
12000
12001         bytes -= handled;
12002         gpa += handled;
12003         data += handled;
12004
12005         /*TODO: Check if need to increment number of frags */
12006         frag = vcpu->mmio_fragments;
12007         vcpu->mmio_nr_fragments = 1;
12008         frag->len = bytes;
12009         frag->gpa = gpa;
12010         frag->data = data;
12011
12012         vcpu->mmio_needed = 1;
12013         vcpu->mmio_cur_fragment = 0;
12014
12015         vcpu->run->mmio.phys_addr = gpa;
12016         vcpu->run->mmio.len = min(8u, frag->len);
12017         vcpu->run->mmio.is_write = 0;
12018         vcpu->run->exit_reason = KVM_EXIT_MMIO;
12019
12020         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12021
12022         return 0;
12023 }
12024 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read);
12025
12026 static int complete_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
12027 {
12028         memcpy(vcpu->arch.guest_ins_data, vcpu->arch.pio_data,
12029                vcpu->arch.pio.count * vcpu->arch.pio.size);
12030         vcpu->arch.pio.count = 0;
12031
12032         return 1;
12033 }
12034
12035 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
12036                            unsigned int port, void *data,  unsigned int count)
12037 {
12038         int ret;
12039
12040         ret = emulator_pio_out_emulated(vcpu->arch.emulate_ctxt, size, port,
12041                                         data, count);
12042         if (ret)
12043                 return ret;
12044
12045         vcpu->arch.pio.count = 0;
12046
12047         return 0;
12048 }
12049
12050 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
12051                           unsigned int port, void *data, unsigned int count)
12052 {
12053         int ret;
12054
12055         ret = emulator_pio_in_emulated(vcpu->arch.emulate_ctxt, size, port,
12056                                        data, count);
12057         if (ret) {
12058                 vcpu->arch.pio.count = 0;
12059         } else {
12060                 vcpu->arch.guest_ins_data = data;
12061                 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_ins;
12062         }
12063
12064         return 0;
12065 }
12066
12067 int kvm_sev_es_string_io(struct kvm_vcpu *vcpu, unsigned int size,
12068                          unsigned int port, void *data,  unsigned int count,
12069                          int in)
12070 {
12071         return in ? kvm_sev_es_ins(vcpu, size, port, data, count)
12072                   : kvm_sev_es_outs(vcpu, size, port, data, count);
12073 }
12074 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io);
12075
12076 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry);
12077 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
12078 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
12079 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
12080 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
12081 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
12082 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
12083 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
12084 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
12085 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
12086 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
12087 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
12088 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
12089 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
12090 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
12091 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
12092 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
12093 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
12094 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
12095 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
12096 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
12097 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log);
12098 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request);
12099 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter);
12100 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit);
12101 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter);
12102 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit);