1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __KVM_X86_VMX_CAPS_H
3 #define __KVM_X86_VMX_CAPS_H
9 extern bool __read_mostly enable_vpid;
10 extern bool __read_mostly flexpriority_enabled;
11 extern bool __read_mostly enable_ept;
12 extern bool __read_mostly enable_unrestricted_guest;
13 extern bool __read_mostly enable_ept_ad_bits;
14 extern bool __read_mostly enable_pml;
15 extern bool __read_mostly enable_apicv;
16 extern int __read_mostly pt_mode;
18 #define PT_MODE_SYSTEM 0
19 #define PT_MODE_HOST_GUEST 1
21 #define PMU_CAP_FW_WRITES (1ULL << 13)
22 #define PMU_CAP_LBR_FMT 0x3f
24 #define DEBUGCTLMSR_LBR_MASK (DEBUGCTLMSR_LBR | DEBUGCTLMSR_FREEZE_LBRS_ON_PMI)
26 struct nested_vmx_msrs {
28 * We only store the "true" versions of the VMX capability MSRs. We
29 * generate the "non-true" versions by setting the must-be-1 bits
30 * according to the SDM.
32 u32 procbased_ctls_low;
33 u32 procbased_ctls_high;
34 u32 secondary_ctls_low;
35 u32 secondary_ctls_high;
36 u32 pinbased_ctls_low;
37 u32 pinbased_ctls_high;
60 u32 pin_based_exec_ctrl;
61 u32 cpu_based_exec_ctrl;
62 u32 cpu_based_2nd_exec_ctrl;
65 struct nested_vmx_msrs nested;
67 extern struct vmcs_config vmcs_config;
69 struct vmx_capability {
73 extern struct vmx_capability vmx_capability;
75 static inline bool cpu_has_vmx_basic_inout(void)
77 return (((u64)vmcs_config.basic_cap << 32) & VMX_BASIC_INOUT);
80 static inline bool cpu_has_virtual_nmis(void)
82 return vmcs_config.pin_based_exec_ctrl & PIN_BASED_VIRTUAL_NMIS;
85 static inline bool cpu_has_vmx_preemption_timer(void)
87 return vmcs_config.pin_based_exec_ctrl &
88 PIN_BASED_VMX_PREEMPTION_TIMER;
91 static inline bool cpu_has_vmx_posted_intr(void)
93 return IS_ENABLED(CONFIG_X86_LOCAL_APIC) &&
94 vmcs_config.pin_based_exec_ctrl & PIN_BASED_POSTED_INTR;
97 static inline bool cpu_has_load_ia32_efer(void)
99 return (vmcs_config.vmentry_ctrl & VM_ENTRY_LOAD_IA32_EFER) &&
100 (vmcs_config.vmexit_ctrl & VM_EXIT_LOAD_IA32_EFER);
103 static inline bool cpu_has_load_perf_global_ctrl(void)
105 return (vmcs_config.vmentry_ctrl & VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL) &&
106 (vmcs_config.vmexit_ctrl & VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL);
109 static inline bool cpu_has_vmx_mpx(void)
111 return (vmcs_config.vmexit_ctrl & VM_EXIT_CLEAR_BNDCFGS) &&
112 (vmcs_config.vmentry_ctrl & VM_ENTRY_LOAD_BNDCFGS);
115 static inline bool cpu_has_vmx_tpr_shadow(void)
117 return vmcs_config.cpu_based_exec_ctrl & CPU_BASED_TPR_SHADOW;
120 static inline bool cpu_need_tpr_shadow(struct kvm_vcpu *vcpu)
122 return cpu_has_vmx_tpr_shadow() && lapic_in_kernel(vcpu);
125 static inline bool cpu_has_vmx_msr_bitmap(void)
127 return vmcs_config.cpu_based_exec_ctrl & CPU_BASED_USE_MSR_BITMAPS;
130 static inline bool cpu_has_secondary_exec_ctrls(void)
132 return vmcs_config.cpu_based_exec_ctrl &
133 CPU_BASED_ACTIVATE_SECONDARY_CONTROLS;
136 static inline bool cpu_has_vmx_virtualize_apic_accesses(void)
138 return vmcs_config.cpu_based_2nd_exec_ctrl &
139 SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES;
142 static inline bool cpu_has_vmx_ept(void)
144 return vmcs_config.cpu_based_2nd_exec_ctrl &
145 SECONDARY_EXEC_ENABLE_EPT;
148 static inline bool vmx_umip_emulated(void)
150 return vmcs_config.cpu_based_2nd_exec_ctrl &
154 static inline bool cpu_has_vmx_rdtscp(void)
156 return vmcs_config.cpu_based_2nd_exec_ctrl &
157 SECONDARY_EXEC_ENABLE_RDTSCP;
160 static inline bool cpu_has_vmx_virtualize_x2apic_mode(void)
162 return vmcs_config.cpu_based_2nd_exec_ctrl &
163 SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE;
166 static inline bool cpu_has_vmx_vpid(void)
168 return vmcs_config.cpu_based_2nd_exec_ctrl &
169 SECONDARY_EXEC_ENABLE_VPID;
172 static inline bool cpu_has_vmx_wbinvd_exit(void)
174 return vmcs_config.cpu_based_2nd_exec_ctrl &
175 SECONDARY_EXEC_WBINVD_EXITING;
178 static inline bool cpu_has_vmx_unrestricted_guest(void)
180 return vmcs_config.cpu_based_2nd_exec_ctrl &
181 SECONDARY_EXEC_UNRESTRICTED_GUEST;
184 static inline bool cpu_has_vmx_apic_register_virt(void)
186 return vmcs_config.cpu_based_2nd_exec_ctrl &
187 SECONDARY_EXEC_APIC_REGISTER_VIRT;
190 static inline bool cpu_has_vmx_virtual_intr_delivery(void)
192 return vmcs_config.cpu_based_2nd_exec_ctrl &
193 SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY;
196 static inline bool cpu_has_vmx_ple(void)
198 return vmcs_config.cpu_based_2nd_exec_ctrl &
199 SECONDARY_EXEC_PAUSE_LOOP_EXITING;
202 static inline bool cpu_has_vmx_rdrand(void)
204 return vmcs_config.cpu_based_2nd_exec_ctrl &
205 SECONDARY_EXEC_RDRAND_EXITING;
208 static inline bool cpu_has_vmx_invpcid(void)
210 return vmcs_config.cpu_based_2nd_exec_ctrl &
211 SECONDARY_EXEC_ENABLE_INVPCID;
214 static inline bool cpu_has_vmx_vmfunc(void)
216 return vmcs_config.cpu_based_2nd_exec_ctrl &
217 SECONDARY_EXEC_ENABLE_VMFUNC;
220 static inline bool cpu_has_vmx_shadow_vmcs(void)
224 /* check if the cpu supports writing r/o exit information fields */
225 rdmsrl(MSR_IA32_VMX_MISC, vmx_msr);
226 if (!(vmx_msr & MSR_IA32_VMX_MISC_VMWRITE_SHADOW_RO_FIELDS))
229 return vmcs_config.cpu_based_2nd_exec_ctrl &
230 SECONDARY_EXEC_SHADOW_VMCS;
233 static inline bool cpu_has_vmx_encls_vmexit(void)
235 return vmcs_config.cpu_based_2nd_exec_ctrl &
236 SECONDARY_EXEC_ENCLS_EXITING;
239 static inline bool cpu_has_vmx_rdseed(void)
241 return vmcs_config.cpu_based_2nd_exec_ctrl &
242 SECONDARY_EXEC_RDSEED_EXITING;
245 static inline bool cpu_has_vmx_pml(void)
247 return vmcs_config.cpu_based_2nd_exec_ctrl & SECONDARY_EXEC_ENABLE_PML;
250 static inline bool cpu_has_vmx_xsaves(void)
252 return vmcs_config.cpu_based_2nd_exec_ctrl &
253 SECONDARY_EXEC_XSAVES;
256 static inline bool cpu_has_vmx_waitpkg(void)
258 return vmcs_config.cpu_based_2nd_exec_ctrl &
259 SECONDARY_EXEC_ENABLE_USR_WAIT_PAUSE;
262 static inline bool cpu_has_vmx_tsc_scaling(void)
264 return vmcs_config.cpu_based_2nd_exec_ctrl &
265 SECONDARY_EXEC_TSC_SCALING;
268 static inline bool cpu_has_vmx_bus_lock_detection(void)
270 return vmcs_config.cpu_based_2nd_exec_ctrl &
271 SECONDARY_EXEC_BUS_LOCK_DETECTION;
274 static inline bool cpu_has_vmx_apicv(void)
276 return cpu_has_vmx_apic_register_virt() &&
277 cpu_has_vmx_virtual_intr_delivery() &&
278 cpu_has_vmx_posted_intr();
281 static inline bool cpu_has_vmx_flexpriority(void)
283 return cpu_has_vmx_tpr_shadow() &&
284 cpu_has_vmx_virtualize_apic_accesses();
287 static inline bool cpu_has_vmx_ept_execute_only(void)
289 return vmx_capability.ept & VMX_EPT_EXECUTE_ONLY_BIT;
292 static inline bool cpu_has_vmx_ept_4levels(void)
294 return vmx_capability.ept & VMX_EPT_PAGE_WALK_4_BIT;
297 static inline bool cpu_has_vmx_ept_5levels(void)
299 return vmx_capability.ept & VMX_EPT_PAGE_WALK_5_BIT;
302 static inline bool cpu_has_vmx_ept_mt_wb(void)
304 return vmx_capability.ept & VMX_EPTP_WB_BIT;
307 static inline bool cpu_has_vmx_ept_2m_page(void)
309 return vmx_capability.ept & VMX_EPT_2MB_PAGE_BIT;
312 static inline bool cpu_has_vmx_ept_1g_page(void)
314 return vmx_capability.ept & VMX_EPT_1GB_PAGE_BIT;
317 static inline bool cpu_has_vmx_ept_ad_bits(void)
319 return vmx_capability.ept & VMX_EPT_AD_BIT;
322 static inline bool cpu_has_vmx_invept_context(void)
324 return vmx_capability.ept & VMX_EPT_EXTENT_CONTEXT_BIT;
327 static inline bool cpu_has_vmx_invept_global(void)
329 return vmx_capability.ept & VMX_EPT_EXTENT_GLOBAL_BIT;
332 static inline bool cpu_has_vmx_invvpid(void)
334 return vmx_capability.vpid & VMX_VPID_INVVPID_BIT;
337 static inline bool cpu_has_vmx_invvpid_individual_addr(void)
339 return vmx_capability.vpid & VMX_VPID_EXTENT_INDIVIDUAL_ADDR_BIT;
342 static inline bool cpu_has_vmx_invvpid_single(void)
344 return vmx_capability.vpid & VMX_VPID_EXTENT_SINGLE_CONTEXT_BIT;
347 static inline bool cpu_has_vmx_invvpid_global(void)
349 return vmx_capability.vpid & VMX_VPID_EXTENT_GLOBAL_CONTEXT_BIT;
352 static inline bool cpu_has_vmx_intel_pt(void)
356 rdmsrl(MSR_IA32_VMX_MISC, vmx_msr);
357 return (vmx_msr & MSR_IA32_VMX_MISC_INTEL_PT) &&
358 (vmcs_config.cpu_based_2nd_exec_ctrl & SECONDARY_EXEC_PT_USE_GPA) &&
359 (vmcs_config.vmexit_ctrl & VM_EXIT_CLEAR_IA32_RTIT_CTL) &&
360 (vmcs_config.vmentry_ctrl & VM_ENTRY_LOAD_IA32_RTIT_CTL);
364 * Processor Trace can operate in one of three modes:
365 * a. system-wide: trace both host/guest and output to host buffer
366 * b. host-only: only trace host and output to host buffer
367 * c. host-guest: trace host and guest simultaneously and output to their
370 * KVM currently only supports (a) and (c).
372 static inline bool vmx_pt_mode_is_system(void)
374 return pt_mode == PT_MODE_SYSTEM;
376 static inline bool vmx_pt_mode_is_host_guest(void)
378 return pt_mode == PT_MODE_HOST_GUEST;
381 static inline u64 vmx_get_perf_capabilities(void)
385 if (boot_cpu_has(X86_FEATURE_PDCM))
386 rdmsrl(MSR_IA32_PERF_CAPABILITIES, perf_cap);
388 perf_cap &= PMU_CAP_LBR_FMT;
391 * Since counters are virtualized, KVM would support full
392 * width counting unconditionally, even if the host lacks it.
394 return PMU_CAP_FW_WRITES | perf_cap;
397 static inline u64 vmx_supported_debugctl(void)
401 if (vmx_get_perf_capabilities() & PMU_CAP_LBR_FMT)
402 debugctl |= DEBUGCTLMSR_LBR_MASK;
407 #endif /* __KVM_X86_VMX_CAPS_H */