arch/x86/kvm/vmx/capabilities.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 #ifndef __KVM_X86_VMX_CAPS_H
   3 #define __KVM_X86_VMX_CAPS_H
   4
   5 #include <asm/vmx.h>
   6
   7 #include "lapic.h"
   8
   9 extern bool __read_mostly enable_vpid;
  10 extern bool __read_mostly flexpriority_enabled;
  11 extern bool __read_mostly enable_ept;
  12 extern bool __read_mostly enable_unrestricted_guest;
  13 extern bool __read_mostly enable_ept_ad_bits;
  14 extern bool __read_mostly enable_pml;
  15 extern int __read_mostly pt_mode;
  16
  17 #define PT_MODE_SYSTEM          0
  18 #define PT_MODE_HOST_GUEST      1
  19
  20 struct nested_vmx_msrs {
  21         /*
  22          * We only store the "true" versions of the VMX capability MSRs. We
  23          * generate the "non-true" versions by setting the must-be-1 bits
  24          * according to the SDM.
  25          */
  26         u32 procbased_ctls_low;
  27         u32 procbased_ctls_high;
  28         u32 secondary_ctls_low;
  29         u32 secondary_ctls_high;
  30         u32 pinbased_ctls_low;
  31         u32 pinbased_ctls_high;
  32         u32 exit_ctls_low;
  33         u32 exit_ctls_high;
  34         u32 entry_ctls_low;
  35         u32 entry_ctls_high;
  36         u32 misc_low;
  37         u32 misc_high;
  38         u32 ept_caps;
  39         u32 vpid_caps;
  40         u64 basic;
  41         u64 cr0_fixed0;
  42         u64 cr0_fixed1;
  43         u64 cr4_fixed0;
  44         u64 cr4_fixed1;
  45         u64 vmcs_enum;
  46         u64 vmfunc_controls;
  47 };
  48
  49 struct vmcs_config {
  50         int size;
  51         int order;
  52         u32 basic_cap;
  53         u32 revision_id;
  54         u32 pin_based_exec_ctrl;
  55         u32 cpu_based_exec_ctrl;
  56         u32 cpu_based_2nd_exec_ctrl;
  57         u32 vmexit_ctrl;
  58         u32 vmentry_ctrl;
  59         struct nested_vmx_msrs nested;
  60 };
  61 extern struct vmcs_config vmcs_config;
  62
  63 struct vmx_capability {
  64         u32 ept;
  65         u32 vpid;
  66 };
  67 extern struct vmx_capability vmx_capability;
  68
  69 static inline bool cpu_has_vmx_basic_inout(void)
  70 {
  71         return  (((u64)vmcs_config.basic_cap << 32) & VMX_BASIC_INOUT);
  72 }
  73
  74 static inline bool cpu_has_virtual_nmis(void)
  75 {
  76         return vmcs_config.pin_based_exec_ctrl & PIN_BASED_VIRTUAL_NMIS;
  77 }
  78
  79 static inline bool cpu_has_vmx_preemption_timer(void)
  80 {
  81         return vmcs_config.pin_based_exec_ctrl &
  82                 PIN_BASED_VMX_PREEMPTION_TIMER;
  83 }
  84
  85 static inline bool cpu_has_vmx_posted_intr(void)
  86 {
  87         return IS_ENABLED(CONFIG_X86_LOCAL_APIC) &&
  88                 vmcs_config.pin_based_exec_ctrl & PIN_BASED_POSTED_INTR;
  89 }
  90
  91 static inline bool cpu_has_load_ia32_efer(void)
  92 {
  93         return (vmcs_config.vmentry_ctrl & VM_ENTRY_LOAD_IA32_EFER) &&
  94                (vmcs_config.vmexit_ctrl & VM_EXIT_LOAD_IA32_EFER);
  95 }
  96
  97 static inline bool cpu_has_load_perf_global_ctrl(void)
  98 {
  99         return (vmcs_config.vmentry_ctrl & VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL) &&
 100                (vmcs_config.vmexit_ctrl & VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL);
 101 }
 102
 103 static inline bool vmx_mpx_supported(void)
 104 {
 105         return (vmcs_config.vmexit_ctrl & VM_EXIT_CLEAR_BNDCFGS) &&
 106                 (vmcs_config.vmentry_ctrl & VM_ENTRY_LOAD_BNDCFGS);
 107 }
 108
 109 static inline bool cpu_has_vmx_tpr_shadow(void)
 110 {
 111         return vmcs_config.cpu_based_exec_ctrl & CPU_BASED_TPR_SHADOW;
 112 }
 113
 114 static inline bool cpu_need_tpr_shadow(struct kvm_vcpu *vcpu)
 115 {
 116         return cpu_has_vmx_tpr_shadow() && lapic_in_kernel(vcpu);
 117 }
 118
 119 static inline bool cpu_has_vmx_msr_bitmap(void)
 120 {
 121         return vmcs_config.cpu_based_exec_ctrl & CPU_BASED_USE_MSR_BITMAPS;
 122 }
 123
 124 static inline bool cpu_has_secondary_exec_ctrls(void)
 125 {
 126         return vmcs_config.cpu_based_exec_ctrl &
 127                 CPU_BASED_ACTIVATE_SECONDARY_CONTROLS;
 128 }
 129
 130 static inline bool cpu_has_vmx_virtualize_apic_accesses(void)
 131 {
 132         return vmcs_config.cpu_based_2nd_exec_ctrl &
 133                 SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES;
 134 }
 135
 136 static inline bool cpu_has_vmx_ept(void)
 137 {
 138         return vmcs_config.cpu_based_2nd_exec_ctrl &
 139                 SECONDARY_EXEC_ENABLE_EPT;
 140 }
 141
 142 static inline bool vmx_umip_emulated(void)
 143 {
 144         return vmcs_config.cpu_based_2nd_exec_ctrl &
 145                 SECONDARY_EXEC_DESC;
 146 }
 147
 148 static inline bool vmx_pku_supported(void)
 149 {
 150         return boot_cpu_has(X86_FEATURE_PKU);
 151 }
 152
 153 static inline bool cpu_has_vmx_rdtscp(void)
 154 {
 155         return vmcs_config.cpu_based_2nd_exec_ctrl &
 156                 SECONDARY_EXEC_RDTSCP;
 157 }
 158
 159 static inline bool cpu_has_vmx_virtualize_x2apic_mode(void)
 160 {
 161         return vmcs_config.cpu_based_2nd_exec_ctrl &
 162                 SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE;
 163 }
 164
 165 static inline bool cpu_has_vmx_vpid(void)
 166 {
 167         return vmcs_config.cpu_based_2nd_exec_ctrl &
 168                 SECONDARY_EXEC_ENABLE_VPID;
 169 }
 170
 171 static inline bool cpu_has_vmx_wbinvd_exit(void)
 172 {
 173         return vmcs_config.cpu_based_2nd_exec_ctrl &
 174                 SECONDARY_EXEC_WBINVD_EXITING;
 175 }
 176
 177 static inline bool cpu_has_vmx_unrestricted_guest(void)
 178 {
 179         return vmcs_config.cpu_based_2nd_exec_ctrl &
 180                 SECONDARY_EXEC_UNRESTRICTED_GUEST;
 181 }
 182
 183 static inline bool cpu_has_vmx_apic_register_virt(void)
 184 {
 185         return vmcs_config.cpu_based_2nd_exec_ctrl &
 186                 SECONDARY_EXEC_APIC_REGISTER_VIRT;
 187 }
 188
 189 static inline bool cpu_has_vmx_virtual_intr_delivery(void)
 190 {
 191         return vmcs_config.cpu_based_2nd_exec_ctrl &
 192                 SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY;
 193 }
 194
 195 static inline bool cpu_has_vmx_ple(void)
 196 {
 197         return vmcs_config.cpu_based_2nd_exec_ctrl &
 198                 SECONDARY_EXEC_PAUSE_LOOP_EXITING;
 199 }
 200
 201 static inline bool vmx_rdrand_supported(void)
 202 {
 203         return vmcs_config.cpu_based_2nd_exec_ctrl &
 204                 SECONDARY_EXEC_RDRAND_EXITING;
 205 }
 206
 207 static inline bool cpu_has_vmx_invpcid(void)
 208 {
 209         return vmcs_config.cpu_based_2nd_exec_ctrl &
 210                 SECONDARY_EXEC_ENABLE_INVPCID;
 211 }
 212
 213 static inline bool cpu_has_vmx_vmfunc(void)
 214 {
 215         return vmcs_config.cpu_based_2nd_exec_ctrl &
 216                 SECONDARY_EXEC_ENABLE_VMFUNC;
 217 }
 218
 219 static inline bool cpu_has_vmx_shadow_vmcs(void)
 220 {
 221         u64 vmx_msr;
 222
 223         /* check if the cpu supports writing r/o exit information fields */
 224         rdmsrl(MSR_IA32_VMX_MISC, vmx_msr);
 225         if (!(vmx_msr & MSR_IA32_VMX_MISC_VMWRITE_SHADOW_RO_FIELDS))
 226                 return false;
 227
 228         return vmcs_config.cpu_based_2nd_exec_ctrl &
 229                 SECONDARY_EXEC_SHADOW_VMCS;
 230 }
 231
 232 static inline bool cpu_has_vmx_encls_vmexit(void)
 233 {
 234         return vmcs_config.cpu_based_2nd_exec_ctrl &
 235                 SECONDARY_EXEC_ENCLS_EXITING;
 236 }
 237
 238 static inline bool vmx_rdseed_supported(void)
 239 {
 240         return vmcs_config.cpu_based_2nd_exec_ctrl &
 241                 SECONDARY_EXEC_RDSEED_EXITING;
 242 }
 243
 244 static inline bool cpu_has_vmx_pml(void)
 245 {
 246         return vmcs_config.cpu_based_2nd_exec_ctrl & SECONDARY_EXEC_ENABLE_PML;
 247 }
 248
 249 static inline bool vmx_xsaves_supported(void)
 250 {
 251         return vmcs_config.cpu_based_2nd_exec_ctrl &
 252                 SECONDARY_EXEC_XSAVES;
 253 }
 254
 255 static inline bool vmx_waitpkg_supported(void)
 256 {
 257         return vmcs_config.cpu_based_2nd_exec_ctrl &
 258                 SECONDARY_EXEC_ENABLE_USR_WAIT_PAUSE;
 259 }
 260
 261 static inline bool cpu_has_vmx_tsc_scaling(void)
 262 {
 263         return vmcs_config.cpu_based_2nd_exec_ctrl &
 264                 SECONDARY_EXEC_TSC_SCALING;
 265 }
 266
 267 static inline bool cpu_has_vmx_apicv(void)
 268 {
 269         return cpu_has_vmx_apic_register_virt() &&
 270                 cpu_has_vmx_virtual_intr_delivery() &&
 271                 cpu_has_vmx_posted_intr();
 272 }
 273
 274 static inline bool cpu_has_vmx_flexpriority(void)
 275 {
 276         return cpu_has_vmx_tpr_shadow() &&
 277                 cpu_has_vmx_virtualize_apic_accesses();
 278 }
 279
 280 static inline bool cpu_has_vmx_ept_execute_only(void)
 281 {
 282         return vmx_capability.ept & VMX_EPT_EXECUTE_ONLY_BIT;
 283 }
 284
 285 static inline bool cpu_has_vmx_ept_4levels(void)
 286 {
 287         return vmx_capability.ept & VMX_EPT_PAGE_WALK_4_BIT;
 288 }
 289
 290 static inline bool cpu_has_vmx_ept_5levels(void)
 291 {
 292         return vmx_capability.ept & VMX_EPT_PAGE_WALK_5_BIT;
 293 }
 294
 295 static inline bool cpu_has_vmx_ept_mt_wb(void)
 296 {
 297         return vmx_capability.ept & VMX_EPTP_WB_BIT;
 298 }
 299
 300 static inline bool cpu_has_vmx_ept_2m_page(void)
 301 {
 302         return vmx_capability.ept & VMX_EPT_2MB_PAGE_BIT;
 303 }
 304
 305 static inline bool cpu_has_vmx_ept_1g_page(void)
 306 {
 307         return vmx_capability.ept & VMX_EPT_1GB_PAGE_BIT;
 308 }
 309
 310 static inline bool cpu_has_vmx_ept_ad_bits(void)
 311 {
 312         return vmx_capability.ept & VMX_EPT_AD_BIT;
 313 }
 314
 315 static inline bool cpu_has_vmx_invept_context(void)
 316 {
 317         return vmx_capability.ept & VMX_EPT_EXTENT_CONTEXT_BIT;
 318 }
 319
 320 static inline bool cpu_has_vmx_invept_global(void)
 321 {
 322         return vmx_capability.ept & VMX_EPT_EXTENT_GLOBAL_BIT;
 323 }
 324
 325 static inline bool cpu_has_vmx_invvpid(void)
 326 {
 327         return vmx_capability.vpid & VMX_VPID_INVVPID_BIT;
 328 }
 329
 330 static inline bool cpu_has_vmx_invvpid_individual_addr(void)
 331 {
 332         return vmx_capability.vpid & VMX_VPID_EXTENT_INDIVIDUAL_ADDR_BIT;
 333 }
 334
 335 static inline bool cpu_has_vmx_invvpid_single(void)
 336 {
 337         return vmx_capability.vpid & VMX_VPID_EXTENT_SINGLE_CONTEXT_BIT;
 338 }
 339
 340 static inline bool cpu_has_vmx_invvpid_global(void)
 341 {
 342         return vmx_capability.vpid & VMX_VPID_EXTENT_GLOBAL_CONTEXT_BIT;
 343 }
 344
 345 static inline bool cpu_has_vmx_intel_pt(void)
 346 {
 347         u64 vmx_msr;
 348
 349         rdmsrl(MSR_IA32_VMX_MISC, vmx_msr);
 350         return (vmx_msr & MSR_IA32_VMX_MISC_INTEL_PT) &&
 351                 (vmcs_config.cpu_based_2nd_exec_ctrl & SECONDARY_EXEC_PT_USE_GPA) &&
 352                 (vmcs_config.vmexit_ctrl & VM_EXIT_CLEAR_IA32_RTIT_CTL) &&
 353                 (vmcs_config.vmentry_ctrl & VM_ENTRY_LOAD_IA32_RTIT_CTL);
 354 }
 355
 356 #endif /* __KVM_X86_VMX_CAPS_H */