1 // SPDX-License-Identifier: GPL-2.0-only
3 * Kernel-based Virtual Machine driver for Linux
7 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
10 #include <linux/kvm_types.h>
11 #include <linux/kvm_host.h>
12 #include <linux/kernel.h>
13 #include <linux/highmem.h>
14 #include <linux/psp-sev.h>
15 #include <linux/pagemap.h>
16 #include <linux/swap.h>
17 #include <linux/processor.h>
18 #include <linux/trace_events.h>
19 #include <asm/fpu/internal.h>
21 #include <asm/trapnr.h>
28 #define __ex(x) __kvm_handle_fault_on_reboot(x)
30 static u8 sev_enc_bit;
31 static int sev_flush_asids(void);
32 static DECLARE_RWSEM(sev_deactivate_lock);
33 static DEFINE_MUTEX(sev_bitmap_lock);
34 unsigned int max_sev_asid;
35 static unsigned int min_sev_asid;
36 static unsigned long *sev_asid_bitmap;
37 static unsigned long *sev_reclaim_asid_bitmap;
40 struct list_head list;
47 static int sev_flush_asids(void)
52 * DEACTIVATE will clear the WBINVD indicator causing DF_FLUSH to fail,
53 * so it must be guarded.
55 down_write(&sev_deactivate_lock);
58 ret = sev_guest_df_flush(&error);
60 up_write(&sev_deactivate_lock);
63 pr_err("SEV: DF_FLUSH failed, ret=%d, error=%#x\n", ret, error);
68 /* Must be called with the sev_bitmap_lock held */
69 static bool __sev_recycle_asids(int min_asid, int max_asid)
73 /* Check if there are any ASIDs to reclaim before performing a flush */
74 pos = find_next_bit(sev_reclaim_asid_bitmap, max_sev_asid, min_asid);
78 if (sev_flush_asids())
81 /* The flush process will flush all reclaimable SEV and SEV-ES ASIDs */
82 bitmap_xor(sev_asid_bitmap, sev_asid_bitmap, sev_reclaim_asid_bitmap,
84 bitmap_zero(sev_reclaim_asid_bitmap, max_sev_asid);
89 static int sev_asid_new(struct kvm_sev_info *sev)
91 int pos, min_asid, max_asid;
94 mutex_lock(&sev_bitmap_lock);
97 * SEV-enabled guests must use asid from min_sev_asid to max_sev_asid.
98 * SEV-ES-enabled guest can use from 1 to min_sev_asid - 1.
100 min_asid = sev->es_active ? 0 : min_sev_asid - 1;
101 max_asid = sev->es_active ? min_sev_asid - 1 : max_sev_asid;
103 pos = find_next_zero_bit(sev_asid_bitmap, max_sev_asid, min_asid);
104 if (pos >= max_asid) {
105 if (retry && __sev_recycle_asids(min_asid, max_asid)) {
109 mutex_unlock(&sev_bitmap_lock);
113 __set_bit(pos, sev_asid_bitmap);
115 mutex_unlock(&sev_bitmap_lock);
120 static int sev_get_asid(struct kvm *kvm)
122 struct kvm_sev_info *sev = &to_kvm_svm(kvm)->sev_info;
127 static void sev_asid_free(int asid)
129 struct svm_cpu_data *sd;
132 mutex_lock(&sev_bitmap_lock);
135 __set_bit(pos, sev_reclaim_asid_bitmap);
137 for_each_possible_cpu(cpu) {
138 sd = per_cpu(svm_data, cpu);
139 sd->sev_vmcbs[pos] = NULL;
142 mutex_unlock(&sev_bitmap_lock);
145 static void sev_unbind_asid(struct kvm *kvm, unsigned int handle)
147 struct sev_data_decommission *decommission;
148 struct sev_data_deactivate *data;
153 data = kzalloc(sizeof(*data), GFP_KERNEL);
157 /* deactivate handle */
158 data->handle = handle;
160 /* Guard DEACTIVATE against WBINVD/DF_FLUSH used in ASID recycling */
161 down_read(&sev_deactivate_lock);
162 sev_guest_deactivate(data, NULL);
163 up_read(&sev_deactivate_lock);
167 decommission = kzalloc(sizeof(*decommission), GFP_KERNEL);
171 /* decommission handle */
172 decommission->handle = handle;
173 sev_guest_decommission(decommission, NULL);
178 static int sev_guest_init(struct kvm *kvm, struct kvm_sev_cmd *argp)
180 struct kvm_sev_info *sev = &to_kvm_svm(kvm)->sev_info;
184 if (unlikely(sev->active))
187 asid = sev_asid_new(sev);
191 ret = sev_platform_init(&argp->error);
197 INIT_LIST_HEAD(&sev->regions_list);
206 static int sev_es_guest_init(struct kvm *kvm, struct kvm_sev_cmd *argp)
211 to_kvm_svm(kvm)->sev_info.es_active = true;
213 return sev_guest_init(kvm, argp);
216 static int sev_bind_asid(struct kvm *kvm, unsigned int handle, int *error)
218 struct sev_data_activate *data;
219 int asid = sev_get_asid(kvm);
222 data = kzalloc(sizeof(*data), GFP_KERNEL_ACCOUNT);
226 /* activate ASID on the given handle */
227 data->handle = handle;
229 ret = sev_guest_activate(data, error);
235 static int __sev_issue_cmd(int fd, int id, void *data, int *error)
244 ret = sev_issue_cmd_external_user(f.file, id, data, error);
250 static int sev_issue_cmd(struct kvm *kvm, int id, void *data, int *error)
252 struct kvm_sev_info *sev = &to_kvm_svm(kvm)->sev_info;
254 return __sev_issue_cmd(sev->fd, id, data, error);
257 static int sev_launch_start(struct kvm *kvm, struct kvm_sev_cmd *argp)
259 struct kvm_sev_info *sev = &to_kvm_svm(kvm)->sev_info;
260 struct sev_data_launch_start *start;
261 struct kvm_sev_launch_start params;
262 void *dh_blob, *session_blob;
263 int *error = &argp->error;
269 if (copy_from_user(¶ms, (void __user *)(uintptr_t)argp->data, sizeof(params)))
272 start = kzalloc(sizeof(*start), GFP_KERNEL_ACCOUNT);
277 if (params.dh_uaddr) {
278 dh_blob = psp_copy_user_blob(params.dh_uaddr, params.dh_len);
279 if (IS_ERR(dh_blob)) {
280 ret = PTR_ERR(dh_blob);
284 start->dh_cert_address = __sme_set(__pa(dh_blob));
285 start->dh_cert_len = params.dh_len;
289 if (params.session_uaddr) {
290 session_blob = psp_copy_user_blob(params.session_uaddr, params.session_len);
291 if (IS_ERR(session_blob)) {
292 ret = PTR_ERR(session_blob);
296 start->session_address = __sme_set(__pa(session_blob));
297 start->session_len = params.session_len;
300 start->handle = params.handle;
301 start->policy = params.policy;
303 /* create memory encryption context */
304 ret = __sev_issue_cmd(argp->sev_fd, SEV_CMD_LAUNCH_START, start, error);
308 /* Bind ASID to this guest */
309 ret = sev_bind_asid(kvm, start->handle, error);
313 /* return handle to userspace */
314 params.handle = start->handle;
315 if (copy_to_user((void __user *)(uintptr_t)argp->data, ¶ms, sizeof(params))) {
316 sev_unbind_asid(kvm, start->handle);
321 sev->handle = start->handle;
322 sev->fd = argp->sev_fd;
333 static struct page **sev_pin_memory(struct kvm *kvm, unsigned long uaddr,
334 unsigned long ulen, unsigned long *n,
337 struct kvm_sev_info *sev = &to_kvm_svm(kvm)->sev_info;
338 unsigned long npages, size;
340 unsigned long locked, lock_limit;
342 unsigned long first, last;
345 if (ulen == 0 || uaddr + ulen < uaddr)
346 return ERR_PTR(-EINVAL);
348 /* Calculate number of pages. */
349 first = (uaddr & PAGE_MASK) >> PAGE_SHIFT;
350 last = ((uaddr + ulen - 1) & PAGE_MASK) >> PAGE_SHIFT;
351 npages = (last - first + 1);
353 locked = sev->pages_locked + npages;
354 lock_limit = rlimit(RLIMIT_MEMLOCK) >> PAGE_SHIFT;
355 if (locked > lock_limit && !capable(CAP_IPC_LOCK)) {
356 pr_err("SEV: %lu locked pages exceed the lock limit of %lu.\n", locked, lock_limit);
357 return ERR_PTR(-ENOMEM);
360 if (WARN_ON_ONCE(npages > INT_MAX))
361 return ERR_PTR(-EINVAL);
363 /* Avoid using vmalloc for smaller buffers. */
364 size = npages * sizeof(struct page *);
365 if (size > PAGE_SIZE)
366 pages = __vmalloc(size, GFP_KERNEL_ACCOUNT | __GFP_ZERO);
368 pages = kmalloc(size, GFP_KERNEL_ACCOUNT);
371 return ERR_PTR(-ENOMEM);
373 /* Pin the user virtual address. */
374 npinned = pin_user_pages_fast(uaddr, npages, write ? FOLL_WRITE : 0, pages);
375 if (npinned != npages) {
376 pr_err("SEV: Failure locking %lu pages.\n", npages);
382 sev->pages_locked = locked;
388 unpin_user_pages(pages, npinned);
394 static void sev_unpin_memory(struct kvm *kvm, struct page **pages,
395 unsigned long npages)
397 struct kvm_sev_info *sev = &to_kvm_svm(kvm)->sev_info;
399 unpin_user_pages(pages, npages);
401 sev->pages_locked -= npages;
404 static void sev_clflush_pages(struct page *pages[], unsigned long npages)
406 uint8_t *page_virtual;
409 if (this_cpu_has(X86_FEATURE_SME_COHERENT) || npages == 0 ||
413 for (i = 0; i < npages; i++) {
414 page_virtual = kmap_atomic(pages[i]);
415 clflush_cache_range(page_virtual, PAGE_SIZE);
416 kunmap_atomic(page_virtual);
420 static unsigned long get_num_contig_pages(unsigned long idx,
421 struct page **inpages, unsigned long npages)
423 unsigned long paddr, next_paddr;
424 unsigned long i = idx + 1, pages = 1;
426 /* find the number of contiguous pages starting from idx */
427 paddr = __sme_page_pa(inpages[idx]);
429 next_paddr = __sme_page_pa(inpages[i++]);
430 if ((paddr + PAGE_SIZE) == next_paddr) {
441 static int sev_launch_update_data(struct kvm *kvm, struct kvm_sev_cmd *argp)
443 unsigned long vaddr, vaddr_end, next_vaddr, npages, pages, size, i;
444 struct kvm_sev_info *sev = &to_kvm_svm(kvm)->sev_info;
445 struct kvm_sev_launch_update_data params;
446 struct sev_data_launch_update_data *data;
447 struct page **inpages;
453 if (copy_from_user(¶ms, (void __user *)(uintptr_t)argp->data, sizeof(params)))
456 data = kzalloc(sizeof(*data), GFP_KERNEL_ACCOUNT);
460 vaddr = params.uaddr;
462 vaddr_end = vaddr + size;
464 /* Lock the user memory. */
465 inpages = sev_pin_memory(kvm, vaddr, size, &npages, 1);
466 if (IS_ERR(inpages)) {
467 ret = PTR_ERR(inpages);
472 * Flush (on non-coherent CPUs) before LAUNCH_UPDATE encrypts pages in
473 * place; the cache may contain the data that was written unencrypted.
475 sev_clflush_pages(inpages, npages);
477 for (i = 0; vaddr < vaddr_end; vaddr = next_vaddr, i += pages) {
481 * If the user buffer is not page-aligned, calculate the offset
484 offset = vaddr & (PAGE_SIZE - 1);
486 /* Calculate the number of pages that can be encrypted in one go. */
487 pages = get_num_contig_pages(i, inpages, npages);
489 len = min_t(size_t, ((pages * PAGE_SIZE) - offset), size);
491 data->handle = sev->handle;
493 data->address = __sme_page_pa(inpages[i]) + offset;
494 ret = sev_issue_cmd(kvm, SEV_CMD_LAUNCH_UPDATE_DATA, data, &argp->error);
499 next_vaddr = vaddr + len;
503 /* content of memory is updated, mark pages dirty */
504 for (i = 0; i < npages; i++) {
505 set_page_dirty_lock(inpages[i]);
506 mark_page_accessed(inpages[i]);
508 /* unlock the user pages */
509 sev_unpin_memory(kvm, inpages, npages);
515 static int sev_es_sync_vmsa(struct vcpu_svm *svm)
517 struct vmcb_save_area *save = &svm->vmcb->save;
519 /* Check some debug related fields before encrypting the VMSA */
520 if (svm->vcpu.guest_debug || (save->dr7 & ~DR7_FIXED_1))
523 /* Sync registgers */
524 save->rax = svm->vcpu.arch.regs[VCPU_REGS_RAX];
525 save->rbx = svm->vcpu.arch.regs[VCPU_REGS_RBX];
526 save->rcx = svm->vcpu.arch.regs[VCPU_REGS_RCX];
527 save->rdx = svm->vcpu.arch.regs[VCPU_REGS_RDX];
528 save->rsp = svm->vcpu.arch.regs[VCPU_REGS_RSP];
529 save->rbp = svm->vcpu.arch.regs[VCPU_REGS_RBP];
530 save->rsi = svm->vcpu.arch.regs[VCPU_REGS_RSI];
531 save->rdi = svm->vcpu.arch.regs[VCPU_REGS_RDI];
533 save->r8 = svm->vcpu.arch.regs[VCPU_REGS_R8];
534 save->r9 = svm->vcpu.arch.regs[VCPU_REGS_R9];
535 save->r10 = svm->vcpu.arch.regs[VCPU_REGS_R10];
536 save->r11 = svm->vcpu.arch.regs[VCPU_REGS_R11];
537 save->r12 = svm->vcpu.arch.regs[VCPU_REGS_R12];
538 save->r13 = svm->vcpu.arch.regs[VCPU_REGS_R13];
539 save->r14 = svm->vcpu.arch.regs[VCPU_REGS_R14];
540 save->r15 = svm->vcpu.arch.regs[VCPU_REGS_R15];
542 save->rip = svm->vcpu.arch.regs[VCPU_REGS_RIP];
544 /* Sync some non-GPR registers before encrypting */
545 save->xcr0 = svm->vcpu.arch.xcr0;
546 save->pkru = svm->vcpu.arch.pkru;
547 save->xss = svm->vcpu.arch.ia32_xss;
550 * SEV-ES will use a VMSA that is pointed to by the VMCB, not
551 * the traditional VMSA that is part of the VMCB. Copy the
552 * traditional VMSA as it has been built so far (in prep
553 * for LAUNCH_UPDATE_VMSA) to be the initial SEV-ES state.
555 memcpy(svm->vmsa, save, sizeof(*save));
560 static int sev_launch_update_vmsa(struct kvm *kvm, struct kvm_sev_cmd *argp)
562 struct kvm_sev_info *sev = &to_kvm_svm(kvm)->sev_info;
563 struct sev_data_launch_update_vmsa *vmsa;
566 if (!sev_es_guest(kvm))
569 vmsa = kzalloc(sizeof(*vmsa), GFP_KERNEL);
573 for (i = 0; i < kvm->created_vcpus; i++) {
574 struct vcpu_svm *svm = to_svm(kvm->vcpus[i]);
576 /* Perform some pre-encryption checks against the VMSA */
577 ret = sev_es_sync_vmsa(svm);
582 * The LAUNCH_UPDATE_VMSA command will perform in-place
583 * encryption of the VMSA memory content (i.e it will write
584 * the same memory region with the guest's key), so invalidate
587 clflush_cache_range(svm->vmsa, PAGE_SIZE);
589 vmsa->handle = sev->handle;
590 vmsa->address = __sme_pa(svm->vmsa);
591 vmsa->len = PAGE_SIZE;
592 ret = sev_issue_cmd(kvm, SEV_CMD_LAUNCH_UPDATE_VMSA, vmsa,
597 svm->vcpu.arch.guest_state_protected = true;
605 static int sev_launch_measure(struct kvm *kvm, struct kvm_sev_cmd *argp)
607 void __user *measure = (void __user *)(uintptr_t)argp->data;
608 struct kvm_sev_info *sev = &to_kvm_svm(kvm)->sev_info;
609 struct sev_data_launch_measure *data;
610 struct kvm_sev_launch_measure params;
611 void __user *p = NULL;
618 if (copy_from_user(¶ms, measure, sizeof(params)))
621 data = kzalloc(sizeof(*data), GFP_KERNEL_ACCOUNT);
625 /* User wants to query the blob length */
629 p = (void __user *)(uintptr_t)params.uaddr;
631 if (params.len > SEV_FW_BLOB_MAX_SIZE) {
637 blob = kmalloc(params.len, GFP_KERNEL);
641 data->address = __psp_pa(blob);
642 data->len = params.len;
646 data->handle = sev->handle;
647 ret = sev_issue_cmd(kvm, SEV_CMD_LAUNCH_MEASURE, data, &argp->error);
650 * If we query the session length, FW responded with expected data.
659 if (copy_to_user(p, blob, params.len))
664 params.len = data->len;
665 if (copy_to_user(measure, ¶ms, sizeof(params)))
674 static int sev_launch_finish(struct kvm *kvm, struct kvm_sev_cmd *argp)
676 struct kvm_sev_info *sev = &to_kvm_svm(kvm)->sev_info;
677 struct sev_data_launch_finish *data;
683 data = kzalloc(sizeof(*data), GFP_KERNEL_ACCOUNT);
687 data->handle = sev->handle;
688 ret = sev_issue_cmd(kvm, SEV_CMD_LAUNCH_FINISH, data, &argp->error);
694 static int sev_guest_status(struct kvm *kvm, struct kvm_sev_cmd *argp)
696 struct kvm_sev_info *sev = &to_kvm_svm(kvm)->sev_info;
697 struct kvm_sev_guest_status params;
698 struct sev_data_guest_status *data;
704 data = kzalloc(sizeof(*data), GFP_KERNEL_ACCOUNT);
708 data->handle = sev->handle;
709 ret = sev_issue_cmd(kvm, SEV_CMD_GUEST_STATUS, data, &argp->error);
713 params.policy = data->policy;
714 params.state = data->state;
715 params.handle = data->handle;
717 if (copy_to_user((void __user *)(uintptr_t)argp->data, ¶ms, sizeof(params)))
724 static int __sev_issue_dbg_cmd(struct kvm *kvm, unsigned long src,
725 unsigned long dst, int size,
726 int *error, bool enc)
728 struct kvm_sev_info *sev = &to_kvm_svm(kvm)->sev_info;
729 struct sev_data_dbg *data;
732 data = kzalloc(sizeof(*data), GFP_KERNEL_ACCOUNT);
736 data->handle = sev->handle;
737 data->dst_addr = dst;
738 data->src_addr = src;
741 ret = sev_issue_cmd(kvm,
742 enc ? SEV_CMD_DBG_ENCRYPT : SEV_CMD_DBG_DECRYPT,
748 static int __sev_dbg_decrypt(struct kvm *kvm, unsigned long src_paddr,
749 unsigned long dst_paddr, int sz, int *err)
754 * Its safe to read more than we are asked, caller should ensure that
755 * destination has enough space.
757 offset = src_paddr & 15;
758 src_paddr = round_down(src_paddr, 16);
759 sz = round_up(sz + offset, 16);
761 return __sev_issue_dbg_cmd(kvm, src_paddr, dst_paddr, sz, err, false);
764 static int __sev_dbg_decrypt_user(struct kvm *kvm, unsigned long paddr,
765 unsigned long __user dst_uaddr,
766 unsigned long dst_paddr,
769 struct page *tpage = NULL;
772 /* if inputs are not 16-byte then use intermediate buffer */
773 if (!IS_ALIGNED(dst_paddr, 16) ||
774 !IS_ALIGNED(paddr, 16) ||
775 !IS_ALIGNED(size, 16)) {
776 tpage = (void *)alloc_page(GFP_KERNEL);
780 dst_paddr = __sme_page_pa(tpage);
783 ret = __sev_dbg_decrypt(kvm, paddr, dst_paddr, size, err);
789 if (copy_to_user((void __user *)(uintptr_t)dst_uaddr,
790 page_address(tpage) + offset, size))
801 static int __sev_dbg_encrypt_user(struct kvm *kvm, unsigned long paddr,
802 unsigned long __user vaddr,
803 unsigned long dst_paddr,
804 unsigned long __user dst_vaddr,
805 int size, int *error)
807 struct page *src_tpage = NULL;
808 struct page *dst_tpage = NULL;
811 /* If source buffer is not aligned then use an intermediate buffer */
812 if (!IS_ALIGNED(vaddr, 16)) {
813 src_tpage = alloc_page(GFP_KERNEL);
817 if (copy_from_user(page_address(src_tpage),
818 (void __user *)(uintptr_t)vaddr, size)) {
819 __free_page(src_tpage);
823 paddr = __sme_page_pa(src_tpage);
827 * If destination buffer or length is not aligned then do read-modify-write:
828 * - decrypt destination in an intermediate buffer
829 * - copy the source buffer in an intermediate buffer
830 * - use the intermediate buffer as source buffer
832 if (!IS_ALIGNED(dst_vaddr, 16) || !IS_ALIGNED(size, 16)) {
835 dst_tpage = alloc_page(GFP_KERNEL);
841 ret = __sev_dbg_decrypt(kvm, dst_paddr,
842 __sme_page_pa(dst_tpage), size, error);
847 * If source is kernel buffer then use memcpy() otherwise
850 dst_offset = dst_paddr & 15;
853 memcpy(page_address(dst_tpage) + dst_offset,
854 page_address(src_tpage), size);
856 if (copy_from_user(page_address(dst_tpage) + dst_offset,
857 (void __user *)(uintptr_t)vaddr, size)) {
863 paddr = __sme_page_pa(dst_tpage);
864 dst_paddr = round_down(dst_paddr, 16);
865 len = round_up(size, 16);
868 ret = __sev_issue_dbg_cmd(kvm, paddr, dst_paddr, len, error, true);
872 __free_page(src_tpage);
874 __free_page(dst_tpage);
878 static int sev_dbg_crypt(struct kvm *kvm, struct kvm_sev_cmd *argp, bool dec)
880 unsigned long vaddr, vaddr_end, next_vaddr;
881 unsigned long dst_vaddr;
882 struct page **src_p, **dst_p;
883 struct kvm_sev_dbg debug;
891 if (copy_from_user(&debug, (void __user *)(uintptr_t)argp->data, sizeof(debug)))
894 if (!debug.len || debug.src_uaddr + debug.len < debug.src_uaddr)
896 if (!debug.dst_uaddr)
899 vaddr = debug.src_uaddr;
901 vaddr_end = vaddr + size;
902 dst_vaddr = debug.dst_uaddr;
904 for (; vaddr < vaddr_end; vaddr = next_vaddr) {
905 int len, s_off, d_off;
907 /* lock userspace source and destination page */
908 src_p = sev_pin_memory(kvm, vaddr & PAGE_MASK, PAGE_SIZE, &n, 0);
910 return PTR_ERR(src_p);
912 dst_p = sev_pin_memory(kvm, dst_vaddr & PAGE_MASK, PAGE_SIZE, &n, 1);
914 sev_unpin_memory(kvm, src_p, n);
915 return PTR_ERR(dst_p);
919 * Flush (on non-coherent CPUs) before DBG_{DE,EN}CRYPT read or modify
920 * the pages; flush the destination too so that future accesses do not
923 sev_clflush_pages(src_p, 1);
924 sev_clflush_pages(dst_p, 1);
927 * Since user buffer may not be page aligned, calculate the
928 * offset within the page.
930 s_off = vaddr & ~PAGE_MASK;
931 d_off = dst_vaddr & ~PAGE_MASK;
932 len = min_t(size_t, (PAGE_SIZE - s_off), size);
935 ret = __sev_dbg_decrypt_user(kvm,
936 __sme_page_pa(src_p[0]) + s_off,
938 __sme_page_pa(dst_p[0]) + d_off,
941 ret = __sev_dbg_encrypt_user(kvm,
942 __sme_page_pa(src_p[0]) + s_off,
944 __sme_page_pa(dst_p[0]) + d_off,
948 sev_unpin_memory(kvm, src_p, n);
949 sev_unpin_memory(kvm, dst_p, n);
954 next_vaddr = vaddr + len;
955 dst_vaddr = dst_vaddr + len;
962 static int sev_launch_secret(struct kvm *kvm, struct kvm_sev_cmd *argp)
964 struct kvm_sev_info *sev = &to_kvm_svm(kvm)->sev_info;
965 struct sev_data_launch_secret *data;
966 struct kvm_sev_launch_secret params;
975 if (copy_from_user(¶ms, (void __user *)(uintptr_t)argp->data, sizeof(params)))
978 pages = sev_pin_memory(kvm, params.guest_uaddr, params.guest_len, &n, 1);
980 return PTR_ERR(pages);
983 * Flush (on non-coherent CPUs) before LAUNCH_SECRET encrypts pages in
984 * place; the cache may contain the data that was written unencrypted.
986 sev_clflush_pages(pages, n);
989 * The secret must be copied into contiguous memory region, lets verify
990 * that userspace memory pages are contiguous before we issue command.
992 if (get_num_contig_pages(0, pages, n) != n) {
998 data = kzalloc(sizeof(*data), GFP_KERNEL_ACCOUNT);
1000 goto e_unpin_memory;
1002 offset = params.guest_uaddr & (PAGE_SIZE - 1);
1003 data->guest_address = __sme_page_pa(pages[0]) + offset;
1004 data->guest_len = params.guest_len;
1006 blob = psp_copy_user_blob(params.trans_uaddr, params.trans_len);
1008 ret = PTR_ERR(blob);
1012 data->trans_address = __psp_pa(blob);
1013 data->trans_len = params.trans_len;
1015 hdr = psp_copy_user_blob(params.hdr_uaddr, params.hdr_len);
1020 data->hdr_address = __psp_pa(hdr);
1021 data->hdr_len = params.hdr_len;
1023 data->handle = sev->handle;
1024 ret = sev_issue_cmd(kvm, SEV_CMD_LAUNCH_UPDATE_SECRET, data, &argp->error);
1033 /* content of memory is updated, mark pages dirty */
1034 for (i = 0; i < n; i++) {
1035 set_page_dirty_lock(pages[i]);
1036 mark_page_accessed(pages[i]);
1038 sev_unpin_memory(kvm, pages, n);
1042 int svm_mem_enc_op(struct kvm *kvm, void __user *argp)
1044 struct kvm_sev_cmd sev_cmd;
1047 if (!svm_sev_enabled() || !sev)
1053 if (copy_from_user(&sev_cmd, argp, sizeof(struct kvm_sev_cmd)))
1056 mutex_lock(&kvm->lock);
1058 switch (sev_cmd.id) {
1060 r = sev_guest_init(kvm, &sev_cmd);
1062 case KVM_SEV_ES_INIT:
1063 r = sev_es_guest_init(kvm, &sev_cmd);
1065 case KVM_SEV_LAUNCH_START:
1066 r = sev_launch_start(kvm, &sev_cmd);
1068 case KVM_SEV_LAUNCH_UPDATE_DATA:
1069 r = sev_launch_update_data(kvm, &sev_cmd);
1071 case KVM_SEV_LAUNCH_UPDATE_VMSA:
1072 r = sev_launch_update_vmsa(kvm, &sev_cmd);
1074 case KVM_SEV_LAUNCH_MEASURE:
1075 r = sev_launch_measure(kvm, &sev_cmd);
1077 case KVM_SEV_LAUNCH_FINISH:
1078 r = sev_launch_finish(kvm, &sev_cmd);
1080 case KVM_SEV_GUEST_STATUS:
1081 r = sev_guest_status(kvm, &sev_cmd);
1083 case KVM_SEV_DBG_DECRYPT:
1084 r = sev_dbg_crypt(kvm, &sev_cmd, true);
1086 case KVM_SEV_DBG_ENCRYPT:
1087 r = sev_dbg_crypt(kvm, &sev_cmd, false);
1089 case KVM_SEV_LAUNCH_SECRET:
1090 r = sev_launch_secret(kvm, &sev_cmd);
1097 if (copy_to_user(argp, &sev_cmd, sizeof(struct kvm_sev_cmd)))
1101 mutex_unlock(&kvm->lock);
1105 int svm_register_enc_region(struct kvm *kvm,
1106 struct kvm_enc_region *range)
1108 struct kvm_sev_info *sev = &to_kvm_svm(kvm)->sev_info;
1109 struct enc_region *region;
1112 if (!sev_guest(kvm))
1115 if (range->addr > ULONG_MAX || range->size > ULONG_MAX)
1118 region = kzalloc(sizeof(*region), GFP_KERNEL_ACCOUNT);
1122 region->pages = sev_pin_memory(kvm, range->addr, range->size, ®ion->npages, 1);
1123 if (IS_ERR(region->pages)) {
1124 ret = PTR_ERR(region->pages);
1129 * The guest may change the memory encryption attribute from C=0 -> C=1
1130 * or vice versa for this memory range. Lets make sure caches are
1131 * flushed to ensure that guest data gets written into memory with
1134 sev_clflush_pages(region->pages, region->npages);
1136 region->uaddr = range->addr;
1137 region->size = range->size;
1139 mutex_lock(&kvm->lock);
1140 list_add_tail(®ion->list, &sev->regions_list);
1141 mutex_unlock(&kvm->lock);
1150 static struct enc_region *
1151 find_enc_region(struct kvm *kvm, struct kvm_enc_region *range)
1153 struct kvm_sev_info *sev = &to_kvm_svm(kvm)->sev_info;
1154 struct list_head *head = &sev->regions_list;
1155 struct enc_region *i;
1157 list_for_each_entry(i, head, list) {
1158 if (i->uaddr == range->addr &&
1159 i->size == range->size)
1166 static void __unregister_enc_region_locked(struct kvm *kvm,
1167 struct enc_region *region)
1169 sev_unpin_memory(kvm, region->pages, region->npages);
1170 list_del(®ion->list);
1174 int svm_unregister_enc_region(struct kvm *kvm,
1175 struct kvm_enc_region *range)
1177 struct enc_region *region;
1180 mutex_lock(&kvm->lock);
1182 if (!sev_guest(kvm)) {
1187 region = find_enc_region(kvm, range);
1194 * Ensure that all guest tagged cache entries are flushed before
1195 * releasing the pages back to the system for use. CLFLUSH will
1196 * not do this, so issue a WBINVD.
1198 wbinvd_on_all_cpus();
1200 __unregister_enc_region_locked(kvm, region);
1202 mutex_unlock(&kvm->lock);
1206 mutex_unlock(&kvm->lock);
1210 void sev_vm_destroy(struct kvm *kvm)
1212 struct kvm_sev_info *sev = &to_kvm_svm(kvm)->sev_info;
1213 struct list_head *head = &sev->regions_list;
1214 struct list_head *pos, *q;
1216 if (!sev_guest(kvm))
1219 mutex_lock(&kvm->lock);
1222 * Ensure that all guest tagged cache entries are flushed before
1223 * releasing the pages back to the system for use. CLFLUSH will
1224 * not do this, so issue a WBINVD.
1226 wbinvd_on_all_cpus();
1229 * if userspace was terminated before unregistering the memory regions
1230 * then lets unpin all the registered memory.
1232 if (!list_empty(head)) {
1233 list_for_each_safe(pos, q, head) {
1234 __unregister_enc_region_locked(kvm,
1235 list_entry(pos, struct enc_region, list));
1240 mutex_unlock(&kvm->lock);
1242 sev_unbind_asid(kvm, sev->handle);
1243 sev_asid_free(sev->asid);
1246 void __init sev_hardware_setup(void)
1248 unsigned int eax, ebx, ecx, edx;
1249 bool sev_es_supported = false;
1250 bool sev_supported = false;
1252 /* Does the CPU support SEV? */
1253 if (!boot_cpu_has(X86_FEATURE_SEV))
1256 /* Retrieve SEV CPUID information */
1257 cpuid(0x8000001f, &eax, &ebx, &ecx, &edx);
1259 /* Set encryption bit location for SEV-ES guests */
1260 sev_enc_bit = ebx & 0x3f;
1262 /* Maximum number of encrypted guests supported simultaneously */
1265 if (!svm_sev_enabled())
1268 /* Minimum ASID value that should be used for SEV guest */
1271 /* Initialize SEV ASID bitmaps */
1272 sev_asid_bitmap = bitmap_zalloc(max_sev_asid, GFP_KERNEL);
1273 if (!sev_asid_bitmap)
1276 sev_reclaim_asid_bitmap = bitmap_zalloc(max_sev_asid, GFP_KERNEL);
1277 if (!sev_reclaim_asid_bitmap)
1280 pr_info("SEV supported: %u ASIDs\n", max_sev_asid - min_sev_asid + 1);
1281 sev_supported = true;
1283 /* SEV-ES support requested? */
1287 /* Does the CPU support SEV-ES? */
1288 if (!boot_cpu_has(X86_FEATURE_SEV_ES))
1291 /* Has the system been allocated ASIDs for SEV-ES? */
1292 if (min_sev_asid == 1)
1295 pr_info("SEV-ES supported: %u ASIDs\n", min_sev_asid - 1);
1296 sev_es_supported = true;
1299 sev = sev_supported;
1300 sev_es = sev_es_supported;
1303 void sev_hardware_teardown(void)
1305 if (!svm_sev_enabled())
1308 bitmap_free(sev_asid_bitmap);
1309 bitmap_free(sev_reclaim_asid_bitmap);
1315 * Pages used by hardware to hold guest encrypted state must be flushed before
1316 * returning them to the system.
1318 static void sev_flush_guest_memory(struct vcpu_svm *svm, void *va,
1322 * If hardware enforced cache coherency for encrypted mappings of the
1323 * same physical page is supported, nothing to do.
1325 if (boot_cpu_has(X86_FEATURE_SME_COHERENT))
1329 * If the VM Page Flush MSR is supported, use it to flush the page
1330 * (using the page virtual address and the guest ASID).
1332 if (boot_cpu_has(X86_FEATURE_VM_PAGE_FLUSH)) {
1333 struct kvm_sev_info *sev;
1334 unsigned long va_start;
1337 /* Align start and stop to page boundaries. */
1338 va_start = (unsigned long)va;
1339 start = (u64)va_start & PAGE_MASK;
1340 stop = PAGE_ALIGN((u64)va_start + len);
1343 sev = &to_kvm_svm(svm->vcpu.kvm)->sev_info;
1345 while (start < stop) {
1346 wrmsrl(MSR_AMD64_VM_PAGE_FLUSH,
1355 WARN(1, "Address overflow, using WBINVD\n");
1359 * Hardware should always have one of the above features,
1360 * but if not, use WBINVD and issue a warning.
1362 WARN_ONCE(1, "Using WBINVD to flush guest memory\n");
1363 wbinvd_on_all_cpus();
1366 void sev_free_vcpu(struct kvm_vcpu *vcpu)
1368 struct vcpu_svm *svm;
1370 if (!sev_es_guest(vcpu->kvm))
1375 if (vcpu->arch.guest_state_protected)
1376 sev_flush_guest_memory(svm, svm->vmsa, PAGE_SIZE);
1377 __free_page(virt_to_page(svm->vmsa));
1379 if (svm->ghcb_sa_free)
1380 kfree(svm->ghcb_sa);
1383 static void dump_ghcb(struct vcpu_svm *svm)
1385 struct ghcb *ghcb = svm->ghcb;
1388 /* Re-use the dump_invalid_vmcb module parameter */
1389 if (!dump_invalid_vmcb) {
1390 pr_warn_ratelimited("set kvm_amd.dump_invalid_vmcb=1 to dump internal KVM state.\n");
1394 nbits = sizeof(ghcb->save.valid_bitmap) * 8;
1396 pr_err("GHCB (GPA=%016llx):\n", svm->vmcb->control.ghcb_gpa);
1397 pr_err("%-20s%016llx is_valid: %u\n", "sw_exit_code",
1398 ghcb->save.sw_exit_code, ghcb_sw_exit_code_is_valid(ghcb));
1399 pr_err("%-20s%016llx is_valid: %u\n", "sw_exit_info_1",
1400 ghcb->save.sw_exit_info_1, ghcb_sw_exit_info_1_is_valid(ghcb));
1401 pr_err("%-20s%016llx is_valid: %u\n", "sw_exit_info_2",
1402 ghcb->save.sw_exit_info_2, ghcb_sw_exit_info_2_is_valid(ghcb));
1403 pr_err("%-20s%016llx is_valid: %u\n", "sw_scratch",
1404 ghcb->save.sw_scratch, ghcb_sw_scratch_is_valid(ghcb));
1405 pr_err("%-20s%*pb\n", "valid_bitmap", nbits, ghcb->save.valid_bitmap);
1408 static void sev_es_sync_to_ghcb(struct vcpu_svm *svm)
1410 struct kvm_vcpu *vcpu = &svm->vcpu;
1411 struct ghcb *ghcb = svm->ghcb;
1414 * The GHCB protocol so far allows for the following data
1416 * GPRs RAX, RBX, RCX, RDX
1418 * Copy their values to the GHCB if they are dirty.
1420 if (kvm_register_is_dirty(vcpu, VCPU_REGS_RAX))
1421 ghcb_set_rax(ghcb, vcpu->arch.regs[VCPU_REGS_RAX]);
1422 if (kvm_register_is_dirty(vcpu, VCPU_REGS_RBX))
1423 ghcb_set_rbx(ghcb, vcpu->arch.regs[VCPU_REGS_RBX]);
1424 if (kvm_register_is_dirty(vcpu, VCPU_REGS_RCX))
1425 ghcb_set_rcx(ghcb, vcpu->arch.regs[VCPU_REGS_RCX]);
1426 if (kvm_register_is_dirty(vcpu, VCPU_REGS_RDX))
1427 ghcb_set_rdx(ghcb, vcpu->arch.regs[VCPU_REGS_RDX]);
1430 static void sev_es_sync_from_ghcb(struct vcpu_svm *svm)
1432 struct vmcb_control_area *control = &svm->vmcb->control;
1433 struct kvm_vcpu *vcpu = &svm->vcpu;
1434 struct ghcb *ghcb = svm->ghcb;
1438 * The GHCB protocol so far allows for the following data
1440 * GPRs RAX, RBX, RCX, RDX
1444 * VMMCALL allows the guest to provide extra registers. KVM also
1445 * expects RSI for hypercalls, so include that, too.
1447 * Copy their values to the appropriate location if supplied.
1449 memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
1451 vcpu->arch.regs[VCPU_REGS_RAX] = ghcb_get_rax_if_valid(ghcb);
1452 vcpu->arch.regs[VCPU_REGS_RBX] = ghcb_get_rbx_if_valid(ghcb);
1453 vcpu->arch.regs[VCPU_REGS_RCX] = ghcb_get_rcx_if_valid(ghcb);
1454 vcpu->arch.regs[VCPU_REGS_RDX] = ghcb_get_rdx_if_valid(ghcb);
1455 vcpu->arch.regs[VCPU_REGS_RSI] = ghcb_get_rsi_if_valid(ghcb);
1457 svm->vmcb->save.cpl = ghcb_get_cpl_if_valid(ghcb);
1459 if (ghcb_xcr0_is_valid(ghcb)) {
1460 vcpu->arch.xcr0 = ghcb_get_xcr0(ghcb);
1461 kvm_update_cpuid_runtime(vcpu);
1464 /* Copy the GHCB exit information into the VMCB fields */
1465 exit_code = ghcb_get_sw_exit_code(ghcb);
1466 control->exit_code = lower_32_bits(exit_code);
1467 control->exit_code_hi = upper_32_bits(exit_code);
1468 control->exit_info_1 = ghcb_get_sw_exit_info_1(ghcb);
1469 control->exit_info_2 = ghcb_get_sw_exit_info_2(ghcb);
1471 /* Clear the valid entries fields */
1472 memset(ghcb->save.valid_bitmap, 0, sizeof(ghcb->save.valid_bitmap));
1475 static int sev_es_validate_vmgexit(struct vcpu_svm *svm)
1477 struct kvm_vcpu *vcpu;
1483 /* Only GHCB Usage code 0 is supported */
1484 if (ghcb->ghcb_usage)
1488 * Retrieve the exit code now even though is may not be marked valid
1489 * as it could help with debugging.
1491 exit_code = ghcb_get_sw_exit_code(ghcb);
1493 if (!ghcb_sw_exit_code_is_valid(ghcb) ||
1494 !ghcb_sw_exit_info_1_is_valid(ghcb) ||
1495 !ghcb_sw_exit_info_2_is_valid(ghcb))
1498 switch (ghcb_get_sw_exit_code(ghcb)) {
1499 case SVM_EXIT_READ_DR7:
1501 case SVM_EXIT_WRITE_DR7:
1502 if (!ghcb_rax_is_valid(ghcb))
1505 case SVM_EXIT_RDTSC:
1507 case SVM_EXIT_RDPMC:
1508 if (!ghcb_rcx_is_valid(ghcb))
1511 case SVM_EXIT_CPUID:
1512 if (!ghcb_rax_is_valid(ghcb) ||
1513 !ghcb_rcx_is_valid(ghcb))
1515 if (ghcb_get_rax(ghcb) == 0xd)
1516 if (!ghcb_xcr0_is_valid(ghcb))
1522 if (ghcb_get_sw_exit_info_1(ghcb) & SVM_IOIO_STR_MASK) {
1523 if (!ghcb_sw_scratch_is_valid(ghcb))
1526 if (!(ghcb_get_sw_exit_info_1(ghcb) & SVM_IOIO_TYPE_MASK))
1527 if (!ghcb_rax_is_valid(ghcb))
1532 if (!ghcb_rcx_is_valid(ghcb))
1534 if (ghcb_get_sw_exit_info_1(ghcb)) {
1535 if (!ghcb_rax_is_valid(ghcb) ||
1536 !ghcb_rdx_is_valid(ghcb))
1540 case SVM_EXIT_VMMCALL:
1541 if (!ghcb_rax_is_valid(ghcb) ||
1542 !ghcb_cpl_is_valid(ghcb))
1545 case SVM_EXIT_RDTSCP:
1547 case SVM_EXIT_WBINVD:
1549 case SVM_EXIT_MONITOR:
1550 if (!ghcb_rax_is_valid(ghcb) ||
1551 !ghcb_rcx_is_valid(ghcb) ||
1552 !ghcb_rdx_is_valid(ghcb))
1555 case SVM_EXIT_MWAIT:
1556 if (!ghcb_rax_is_valid(ghcb) ||
1557 !ghcb_rcx_is_valid(ghcb))
1560 case SVM_VMGEXIT_MMIO_READ:
1561 case SVM_VMGEXIT_MMIO_WRITE:
1562 if (!ghcb_sw_scratch_is_valid(ghcb))
1565 case SVM_VMGEXIT_NMI_COMPLETE:
1566 case SVM_VMGEXIT_AP_JUMP_TABLE:
1567 case SVM_VMGEXIT_UNSUPPORTED_EVENT:
1578 if (ghcb->ghcb_usage) {
1579 vcpu_unimpl(vcpu, "vmgexit: ghcb usage %#x is not valid\n",
1582 vcpu_unimpl(vcpu, "vmgexit: exit reason %#llx is not valid\n",
1587 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
1588 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_UNEXPECTED_EXIT_REASON;
1589 vcpu->run->internal.ndata = 2;
1590 vcpu->run->internal.data[0] = exit_code;
1591 vcpu->run->internal.data[1] = vcpu->arch.last_vmentry_cpu;
1596 static void pre_sev_es_run(struct vcpu_svm *svm)
1601 if (svm->ghcb_sa_free) {
1603 * The scratch area lives outside the GHCB, so there is a
1604 * buffer that, depending on the operation performed, may
1605 * need to be synced, then freed.
1607 if (svm->ghcb_sa_sync) {
1608 kvm_write_guest(svm->vcpu.kvm,
1609 ghcb_get_sw_scratch(svm->ghcb),
1610 svm->ghcb_sa, svm->ghcb_sa_len);
1611 svm->ghcb_sa_sync = false;
1614 kfree(svm->ghcb_sa);
1615 svm->ghcb_sa = NULL;
1616 svm->ghcb_sa_free = false;
1619 trace_kvm_vmgexit_exit(svm->vcpu.vcpu_id, svm->ghcb);
1621 sev_es_sync_to_ghcb(svm);
1623 kvm_vcpu_unmap(&svm->vcpu, &svm->ghcb_map, true);
1627 void pre_sev_run(struct vcpu_svm *svm, int cpu)
1629 struct svm_cpu_data *sd = per_cpu(svm_data, cpu);
1630 int asid = sev_get_asid(svm->vcpu.kvm);
1632 /* Perform any SEV-ES pre-run actions */
1633 pre_sev_es_run(svm);
1635 /* Assign the asid allocated with this SEV guest */
1641 * 1) when different VMCB for the same ASID is to be run on the same host CPU.
1642 * 2) or this VMCB was executed on different host CPU in previous VMRUNs.
1644 if (sd->sev_vmcbs[asid] == svm->vmcb &&
1645 svm->vcpu.arch.last_vmentry_cpu == cpu)
1648 sd->sev_vmcbs[asid] = svm->vmcb;
1649 svm->vmcb->control.tlb_ctl = TLB_CONTROL_FLUSH_ASID;
1650 vmcb_mark_dirty(svm->vmcb, VMCB_ASID);
1653 #define GHCB_SCRATCH_AREA_LIMIT (16ULL * PAGE_SIZE)
1654 static bool setup_vmgexit_scratch(struct vcpu_svm *svm, bool sync, u64 len)
1656 struct vmcb_control_area *control = &svm->vmcb->control;
1657 struct ghcb *ghcb = svm->ghcb;
1658 u64 ghcb_scratch_beg, ghcb_scratch_end;
1659 u64 scratch_gpa_beg, scratch_gpa_end;
1662 scratch_gpa_beg = ghcb_get_sw_scratch(ghcb);
1663 if (!scratch_gpa_beg) {
1664 pr_err("vmgexit: scratch gpa not provided\n");
1668 scratch_gpa_end = scratch_gpa_beg + len;
1669 if (scratch_gpa_end < scratch_gpa_beg) {
1670 pr_err("vmgexit: scratch length (%#llx) not valid for scratch address (%#llx)\n",
1671 len, scratch_gpa_beg);
1675 if ((scratch_gpa_beg & PAGE_MASK) == control->ghcb_gpa) {
1676 /* Scratch area begins within GHCB */
1677 ghcb_scratch_beg = control->ghcb_gpa +
1678 offsetof(struct ghcb, shared_buffer);
1679 ghcb_scratch_end = control->ghcb_gpa +
1680 offsetof(struct ghcb, reserved_1);
1683 * If the scratch area begins within the GHCB, it must be
1684 * completely contained in the GHCB shared buffer area.
1686 if (scratch_gpa_beg < ghcb_scratch_beg ||
1687 scratch_gpa_end > ghcb_scratch_end) {
1688 pr_err("vmgexit: scratch area is outside of GHCB shared buffer area (%#llx - %#llx)\n",
1689 scratch_gpa_beg, scratch_gpa_end);
1693 scratch_va = (void *)svm->ghcb;
1694 scratch_va += (scratch_gpa_beg - control->ghcb_gpa);
1697 * The guest memory must be read into a kernel buffer, so
1700 if (len > GHCB_SCRATCH_AREA_LIMIT) {
1701 pr_err("vmgexit: scratch area exceeds KVM limits (%#llx requested, %#llx limit)\n",
1702 len, GHCB_SCRATCH_AREA_LIMIT);
1705 scratch_va = kzalloc(len, GFP_KERNEL);
1709 if (kvm_read_guest(svm->vcpu.kvm, scratch_gpa_beg, scratch_va, len)) {
1710 /* Unable to copy scratch area from guest */
1711 pr_err("vmgexit: kvm_read_guest for scratch area failed\n");
1718 * The scratch area is outside the GHCB. The operation will
1719 * dictate whether the buffer needs to be synced before running
1720 * the vCPU next time (i.e. a read was requested so the data
1721 * must be written back to the guest memory).
1723 svm->ghcb_sa_sync = sync;
1724 svm->ghcb_sa_free = true;
1727 svm->ghcb_sa = scratch_va;
1728 svm->ghcb_sa_len = len;
1733 static void set_ghcb_msr_bits(struct vcpu_svm *svm, u64 value, u64 mask,
1736 svm->vmcb->control.ghcb_gpa &= ~(mask << pos);
1737 svm->vmcb->control.ghcb_gpa |= (value & mask) << pos;
1740 static u64 get_ghcb_msr_bits(struct vcpu_svm *svm, u64 mask, unsigned int pos)
1742 return (svm->vmcb->control.ghcb_gpa >> pos) & mask;
1745 static void set_ghcb_msr(struct vcpu_svm *svm, u64 value)
1747 svm->vmcb->control.ghcb_gpa = value;
1750 static int sev_handle_vmgexit_msr_protocol(struct vcpu_svm *svm)
1752 struct vmcb_control_area *control = &svm->vmcb->control;
1753 struct kvm_vcpu *vcpu = &svm->vcpu;
1757 ghcb_info = control->ghcb_gpa & GHCB_MSR_INFO_MASK;
1759 trace_kvm_vmgexit_msr_protocol_enter(svm->vcpu.vcpu_id,
1762 switch (ghcb_info) {
1763 case GHCB_MSR_SEV_INFO_REQ:
1764 set_ghcb_msr(svm, GHCB_MSR_SEV_INFO(GHCB_VERSION_MAX,
1768 case GHCB_MSR_CPUID_REQ: {
1769 u64 cpuid_fn, cpuid_reg, cpuid_value;
1771 cpuid_fn = get_ghcb_msr_bits(svm,
1772 GHCB_MSR_CPUID_FUNC_MASK,
1773 GHCB_MSR_CPUID_FUNC_POS);
1775 /* Initialize the registers needed by the CPUID intercept */
1776 vcpu->arch.regs[VCPU_REGS_RAX] = cpuid_fn;
1777 vcpu->arch.regs[VCPU_REGS_RCX] = 0;
1779 ret = svm_invoke_exit_handler(svm, SVM_EXIT_CPUID);
1785 cpuid_reg = get_ghcb_msr_bits(svm,
1786 GHCB_MSR_CPUID_REG_MASK,
1787 GHCB_MSR_CPUID_REG_POS);
1789 cpuid_value = vcpu->arch.regs[VCPU_REGS_RAX];
1790 else if (cpuid_reg == 1)
1791 cpuid_value = vcpu->arch.regs[VCPU_REGS_RBX];
1792 else if (cpuid_reg == 2)
1793 cpuid_value = vcpu->arch.regs[VCPU_REGS_RCX];
1795 cpuid_value = vcpu->arch.regs[VCPU_REGS_RDX];
1797 set_ghcb_msr_bits(svm, cpuid_value,
1798 GHCB_MSR_CPUID_VALUE_MASK,
1799 GHCB_MSR_CPUID_VALUE_POS);
1801 set_ghcb_msr_bits(svm, GHCB_MSR_CPUID_RESP,
1806 case GHCB_MSR_TERM_REQ: {
1807 u64 reason_set, reason_code;
1809 reason_set = get_ghcb_msr_bits(svm,
1810 GHCB_MSR_TERM_REASON_SET_MASK,
1811 GHCB_MSR_TERM_REASON_SET_POS);
1812 reason_code = get_ghcb_msr_bits(svm,
1813 GHCB_MSR_TERM_REASON_MASK,
1814 GHCB_MSR_TERM_REASON_POS);
1815 pr_info("SEV-ES guest requested termination: %#llx:%#llx\n",
1816 reason_set, reason_code);
1823 trace_kvm_vmgexit_msr_protocol_exit(svm->vcpu.vcpu_id,
1824 control->ghcb_gpa, ret);
1829 int sev_handle_vmgexit(struct vcpu_svm *svm)
1831 struct vmcb_control_area *control = &svm->vmcb->control;
1832 u64 ghcb_gpa, exit_code;
1836 /* Validate the GHCB */
1837 ghcb_gpa = control->ghcb_gpa;
1838 if (ghcb_gpa & GHCB_MSR_INFO_MASK)
1839 return sev_handle_vmgexit_msr_protocol(svm);
1842 vcpu_unimpl(&svm->vcpu, "vmgexit: GHCB gpa is not set\n");
1846 if (kvm_vcpu_map(&svm->vcpu, ghcb_gpa >> PAGE_SHIFT, &svm->ghcb_map)) {
1847 /* Unable to map GHCB from guest */
1848 vcpu_unimpl(&svm->vcpu, "vmgexit: error mapping GHCB [%#llx] from guest\n",
1853 svm->ghcb = svm->ghcb_map.hva;
1854 ghcb = svm->ghcb_map.hva;
1856 trace_kvm_vmgexit_enter(svm->vcpu.vcpu_id, ghcb);
1858 exit_code = ghcb_get_sw_exit_code(ghcb);
1860 ret = sev_es_validate_vmgexit(svm);
1864 sev_es_sync_from_ghcb(svm);
1865 ghcb_set_sw_exit_info_1(ghcb, 0);
1866 ghcb_set_sw_exit_info_2(ghcb, 0);
1869 switch (exit_code) {
1870 case SVM_VMGEXIT_MMIO_READ:
1871 if (!setup_vmgexit_scratch(svm, true, control->exit_info_2))
1874 ret = kvm_sev_es_mmio_read(&svm->vcpu,
1875 control->exit_info_1,
1876 control->exit_info_2,
1879 case SVM_VMGEXIT_MMIO_WRITE:
1880 if (!setup_vmgexit_scratch(svm, false, control->exit_info_2))
1883 ret = kvm_sev_es_mmio_write(&svm->vcpu,
1884 control->exit_info_1,
1885 control->exit_info_2,
1888 case SVM_VMGEXIT_NMI_COMPLETE:
1889 ret = svm_invoke_exit_handler(svm, SVM_EXIT_IRET);
1891 case SVM_VMGEXIT_AP_JUMP_TABLE: {
1892 struct kvm_sev_info *sev = &to_kvm_svm(svm->vcpu.kvm)->sev_info;
1894 switch (control->exit_info_1) {
1896 /* Set AP jump table address */
1897 sev->ap_jump_table = control->exit_info_2;
1900 /* Get AP jump table address */
1901 ghcb_set_sw_exit_info_2(ghcb, sev->ap_jump_table);
1904 pr_err("svm: vmgexit: unsupported AP jump table request - exit_info_1=%#llx\n",
1905 control->exit_info_1);
1906 ghcb_set_sw_exit_info_1(ghcb, 1);
1907 ghcb_set_sw_exit_info_2(ghcb,
1909 SVM_EVTINJ_TYPE_EXEPT |
1916 case SVM_VMGEXIT_UNSUPPORTED_EVENT:
1917 vcpu_unimpl(&svm->vcpu,
1918 "vmgexit: unsupported event - exit_info_1=%#llx, exit_info_2=%#llx\n",
1919 control->exit_info_1, control->exit_info_2);
1922 ret = svm_invoke_exit_handler(svm, exit_code);
1928 int sev_es_string_io(struct vcpu_svm *svm, int size, unsigned int port, int in)
1930 if (!setup_vmgexit_scratch(svm, in, svm->vmcb->control.exit_info_2))
1933 return kvm_sev_es_string_io(&svm->vcpu, size, port,
1934 svm->ghcb_sa, svm->ghcb_sa_len, in);
1937 void sev_es_init_vmcb(struct vcpu_svm *svm)
1939 struct kvm_vcpu *vcpu = &svm->vcpu;
1941 svm->vmcb->control.nested_ctl |= SVM_NESTED_CTL_SEV_ES_ENABLE;
1942 svm->vmcb->control.virt_ext |= LBR_CTL_ENABLE_MASK;
1945 * An SEV-ES guest requires a VMSA area that is a separate from the
1946 * VMCB page. Do not include the encryption mask on the VMSA physical
1947 * address since hardware will access it using the guest key.
1949 svm->vmcb->control.vmsa_pa = __pa(svm->vmsa);
1951 /* Can't intercept CR register access, HV can't modify CR registers */
1952 svm_clr_intercept(svm, INTERCEPT_CR0_READ);
1953 svm_clr_intercept(svm, INTERCEPT_CR4_READ);
1954 svm_clr_intercept(svm, INTERCEPT_CR8_READ);
1955 svm_clr_intercept(svm, INTERCEPT_CR0_WRITE);
1956 svm_clr_intercept(svm, INTERCEPT_CR4_WRITE);
1957 svm_clr_intercept(svm, INTERCEPT_CR8_WRITE);
1959 svm_clr_intercept(svm, INTERCEPT_SELECTIVE_CR0);
1961 /* Track EFER/CR register changes */
1962 svm_set_intercept(svm, TRAP_EFER_WRITE);
1963 svm_set_intercept(svm, TRAP_CR0_WRITE);
1964 svm_set_intercept(svm, TRAP_CR4_WRITE);
1965 svm_set_intercept(svm, TRAP_CR8_WRITE);
1967 /* No support for enable_vmware_backdoor */
1968 clr_exception_intercept(svm, GP_VECTOR);
1970 /* Can't intercept XSETBV, HV can't modify XCR0 directly */
1971 svm_clr_intercept(svm, INTERCEPT_XSETBV);
1973 /* Clear intercepts on selected MSRs */
1974 set_msr_interception(vcpu, svm->msrpm, MSR_EFER, 1, 1);
1975 set_msr_interception(vcpu, svm->msrpm, MSR_IA32_CR_PAT, 1, 1);
1976 set_msr_interception(vcpu, svm->msrpm, MSR_IA32_LASTBRANCHFROMIP, 1, 1);
1977 set_msr_interception(vcpu, svm->msrpm, MSR_IA32_LASTBRANCHTOIP, 1, 1);
1978 set_msr_interception(vcpu, svm->msrpm, MSR_IA32_LASTINTFROMIP, 1, 1);
1979 set_msr_interception(vcpu, svm->msrpm, MSR_IA32_LASTINTTOIP, 1, 1);
1982 void sev_es_create_vcpu(struct vcpu_svm *svm)
1985 * Set the GHCB MSR value as per the GHCB specification when creating
1986 * a vCPU for an SEV-ES guest.
1988 set_ghcb_msr(svm, GHCB_MSR_SEV_INFO(GHCB_VERSION_MAX,
1993 void sev_es_vcpu_load(struct vcpu_svm *svm, int cpu)
1995 struct svm_cpu_data *sd = per_cpu(svm_data, cpu);
1996 struct vmcb_save_area *hostsa;
2000 * As an SEV-ES guest, hardware will restore the host state on VMEXIT,
2001 * of which one step is to perform a VMLOAD. Since hardware does not
2002 * perform a VMSAVE on VMRUN, the host savearea must be updated.
2004 asm volatile(__ex("vmsave") : : "a" (__sme_page_pa(sd->save_area)) : "memory");
2007 * Certain MSRs are restored on VMEXIT, only save ones that aren't
2010 for (i = 0; i < NR_HOST_SAVE_USER_MSRS; i++) {
2011 if (host_save_user_msrs[i].sev_es_restored)
2014 rdmsrl(host_save_user_msrs[i].index, svm->host_user_msrs[i]);
2017 /* XCR0 is restored on VMEXIT, save the current host value */
2018 hostsa = (struct vmcb_save_area *)(page_address(sd->save_area) + 0x400);
2019 hostsa->xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
2021 /* PKRU is restored on VMEXIT, save the curent host value */
2022 hostsa->pkru = read_pkru();
2024 /* MSR_IA32_XSS is restored on VMEXIT, save the currnet host value */
2025 hostsa->xss = host_xss;
2028 void sev_es_vcpu_put(struct vcpu_svm *svm)
2033 * Certain MSRs are restored on VMEXIT and were saved with vmsave in
2034 * sev_es_vcpu_load() above. Only restore ones that weren't.
2036 for (i = 0; i < NR_HOST_SAVE_USER_MSRS; i++) {
2037 if (host_save_user_msrs[i].sev_es_restored)
2040 wrmsrl(host_save_user_msrs[i].index, svm->host_user_msrs[i]);