KVM: abstract kvm x86 mmu->n_free_mmu_pages
[linux-2.6-microblaze.git] / arch / x86 / kvm / mmu.c
1 /*
2  * Kernel-based Virtual Machine driver for Linux
3  *
4  * This module enables machines with Intel VT-x extensions to run virtual
5  * machines without emulation or binary translation.
6  *
7  * MMU support
8  *
9  * Copyright (C) 2006 Qumranet, Inc.
10  * Copyright 2010 Red Hat, Inc. and/or its affilates.
11  *
12  * Authors:
13  *   Yaniv Kamay  <yaniv@qumranet.com>
14  *   Avi Kivity   <avi@qumranet.com>
15  *
16  * This work is licensed under the terms of the GNU GPL, version 2.  See
17  * the COPYING file in the top-level directory.
18  *
19  */
20
21 #include "mmu.h"
22 #include "x86.h"
23 #include "kvm_cache_regs.h"
24
25 #include <linux/kvm_host.h>
26 #include <linux/types.h>
27 #include <linux/string.h>
28 #include <linux/mm.h>
29 #include <linux/highmem.h>
30 #include <linux/module.h>
31 #include <linux/swap.h>
32 #include <linux/hugetlb.h>
33 #include <linux/compiler.h>
34 #include <linux/srcu.h>
35 #include <linux/slab.h>
36 #include <linux/uaccess.h>
37
38 #include <asm/page.h>
39 #include <asm/cmpxchg.h>
40 #include <asm/io.h>
41 #include <asm/vmx.h>
42
43 /*
44  * When setting this variable to true it enables Two-Dimensional-Paging
45  * where the hardware walks 2 page tables:
46  * 1. the guest-virtual to guest-physical
47  * 2. while doing 1. it walks guest-physical to host-physical
48  * If the hardware supports that we don't need to do shadow paging.
49  */
50 bool tdp_enabled = false;
51
52 #undef MMU_DEBUG
53
54 #undef AUDIT
55
56 #ifdef AUDIT
57 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
58 #else
59 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
60 #endif
61
62 #ifdef MMU_DEBUG
63
64 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
65 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
66
67 #else
68
69 #define pgprintk(x...) do { } while (0)
70 #define rmap_printk(x...) do { } while (0)
71
72 #endif
73
74 #if defined(MMU_DEBUG) || defined(AUDIT)
75 static int dbg = 0;
76 module_param(dbg, bool, 0644);
77 #endif
78
79 static int oos_shadow = 1;
80 module_param(oos_shadow, bool, 0644);
81
82 #ifndef MMU_DEBUG
83 #define ASSERT(x) do { } while (0)
84 #else
85 #define ASSERT(x)                                                       \
86         if (!(x)) {                                                     \
87                 printk(KERN_WARNING "assertion failed %s:%d: %s\n",     \
88                        __FILE__, __LINE__, #x);                         \
89         }
90 #endif
91
92 #define PT_FIRST_AVAIL_BITS_SHIFT 9
93 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
94
95 #define PT64_LEVEL_BITS 9
96
97 #define PT64_LEVEL_SHIFT(level) \
98                 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
99
100 #define PT64_LEVEL_MASK(level) \
101                 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
102
103 #define PT64_INDEX(address, level)\
104         (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
105
106
107 #define PT32_LEVEL_BITS 10
108
109 #define PT32_LEVEL_SHIFT(level) \
110                 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
111
112 #define PT32_LEVEL_MASK(level) \
113                 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
114 #define PT32_LVL_OFFSET_MASK(level) \
115         (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
116                                                 * PT32_LEVEL_BITS))) - 1))
117
118 #define PT32_INDEX(address, level)\
119         (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
120
121
122 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
123 #define PT64_DIR_BASE_ADDR_MASK \
124         (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
125 #define PT64_LVL_ADDR_MASK(level) \
126         (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
127                                                 * PT64_LEVEL_BITS))) - 1))
128 #define PT64_LVL_OFFSET_MASK(level) \
129         (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
130                                                 * PT64_LEVEL_BITS))) - 1))
131
132 #define PT32_BASE_ADDR_MASK PAGE_MASK
133 #define PT32_DIR_BASE_ADDR_MASK \
134         (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
135 #define PT32_LVL_ADDR_MASK(level) \
136         (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
137                                             * PT32_LEVEL_BITS))) - 1))
138
139 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
140                         | PT64_NX_MASK)
141
142 #define RMAP_EXT 4
143
144 #define ACC_EXEC_MASK    1
145 #define ACC_WRITE_MASK   PT_WRITABLE_MASK
146 #define ACC_USER_MASK    PT_USER_MASK
147 #define ACC_ALL          (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
148
149 #include <trace/events/kvm.h>
150
151 #define CREATE_TRACE_POINTS
152 #include "mmutrace.h"
153
154 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
155
156 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
157
158 struct kvm_rmap_desc {
159         u64 *sptes[RMAP_EXT];
160         struct kvm_rmap_desc *more;
161 };
162
163 struct kvm_shadow_walk_iterator {
164         u64 addr;
165         hpa_t shadow_addr;
166         int level;
167         u64 *sptep;
168         unsigned index;
169 };
170
171 #define for_each_shadow_entry(_vcpu, _addr, _walker)    \
172         for (shadow_walk_init(&(_walker), _vcpu, _addr);        \
173              shadow_walk_okay(&(_walker));                      \
174              shadow_walk_next(&(_walker)))
175
176 typedef void (*mmu_parent_walk_fn) (struct kvm_mmu_page *sp, u64 *spte);
177
178 static struct kmem_cache *pte_chain_cache;
179 static struct kmem_cache *rmap_desc_cache;
180 static struct kmem_cache *mmu_page_header_cache;
181
182 static u64 __read_mostly shadow_trap_nonpresent_pte;
183 static u64 __read_mostly shadow_notrap_nonpresent_pte;
184 static u64 __read_mostly shadow_base_present_pte;
185 static u64 __read_mostly shadow_nx_mask;
186 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
187 static u64 __read_mostly shadow_user_mask;
188 static u64 __read_mostly shadow_accessed_mask;
189 static u64 __read_mostly shadow_dirty_mask;
190
191 static inline u64 rsvd_bits(int s, int e)
192 {
193         return ((1ULL << (e - s + 1)) - 1) << s;
194 }
195
196 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
197 {
198         shadow_trap_nonpresent_pte = trap_pte;
199         shadow_notrap_nonpresent_pte = notrap_pte;
200 }
201 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
202
203 void kvm_mmu_set_base_ptes(u64 base_pte)
204 {
205         shadow_base_present_pte = base_pte;
206 }
207 EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
208
209 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
210                 u64 dirty_mask, u64 nx_mask, u64 x_mask)
211 {
212         shadow_user_mask = user_mask;
213         shadow_accessed_mask = accessed_mask;
214         shadow_dirty_mask = dirty_mask;
215         shadow_nx_mask = nx_mask;
216         shadow_x_mask = x_mask;
217 }
218 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
219
220 static bool is_write_protection(struct kvm_vcpu *vcpu)
221 {
222         return kvm_read_cr0_bits(vcpu, X86_CR0_WP);
223 }
224
225 static int is_cpuid_PSE36(void)
226 {
227         return 1;
228 }
229
230 static int is_nx(struct kvm_vcpu *vcpu)
231 {
232         return vcpu->arch.efer & EFER_NX;
233 }
234
235 static int is_shadow_present_pte(u64 pte)
236 {
237         return pte != shadow_trap_nonpresent_pte
238                 && pte != shadow_notrap_nonpresent_pte;
239 }
240
241 static int is_large_pte(u64 pte)
242 {
243         return pte & PT_PAGE_SIZE_MASK;
244 }
245
246 static int is_writable_pte(unsigned long pte)
247 {
248         return pte & PT_WRITABLE_MASK;
249 }
250
251 static int is_dirty_gpte(unsigned long pte)
252 {
253         return pte & PT_DIRTY_MASK;
254 }
255
256 static int is_rmap_spte(u64 pte)
257 {
258         return is_shadow_present_pte(pte);
259 }
260
261 static int is_last_spte(u64 pte, int level)
262 {
263         if (level == PT_PAGE_TABLE_LEVEL)
264                 return 1;
265         if (is_large_pte(pte))
266                 return 1;
267         return 0;
268 }
269
270 static pfn_t spte_to_pfn(u64 pte)
271 {
272         return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
273 }
274
275 static gfn_t pse36_gfn_delta(u32 gpte)
276 {
277         int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
278
279         return (gpte & PT32_DIR_PSE36_MASK) << shift;
280 }
281
282 static void __set_spte(u64 *sptep, u64 spte)
283 {
284         set_64bit(sptep, spte);
285 }
286
287 static u64 __xchg_spte(u64 *sptep, u64 new_spte)
288 {
289 #ifdef CONFIG_X86_64
290         return xchg(sptep, new_spte);
291 #else
292         u64 old_spte;
293
294         do {
295                 old_spte = *sptep;
296         } while (cmpxchg64(sptep, old_spte, new_spte) != old_spte);
297
298         return old_spte;
299 #endif
300 }
301
302 static bool spte_has_volatile_bits(u64 spte)
303 {
304         if (!shadow_accessed_mask)
305                 return false;
306
307         if (!is_shadow_present_pte(spte))
308                 return false;
309
310         if ((spte & shadow_accessed_mask) &&
311               (!is_writable_pte(spte) || (spte & shadow_dirty_mask)))
312                 return false;
313
314         return true;
315 }
316
317 static bool spte_is_bit_cleared(u64 old_spte, u64 new_spte, u64 bit_mask)
318 {
319         return (old_spte & bit_mask) && !(new_spte & bit_mask);
320 }
321
322 static void update_spte(u64 *sptep, u64 new_spte)
323 {
324         u64 mask, old_spte = *sptep;
325
326         WARN_ON(!is_rmap_spte(new_spte));
327
328         new_spte |= old_spte & shadow_dirty_mask;
329
330         mask = shadow_accessed_mask;
331         if (is_writable_pte(old_spte))
332                 mask |= shadow_dirty_mask;
333
334         if (!spte_has_volatile_bits(old_spte) || (new_spte & mask) == mask)
335                 __set_spte(sptep, new_spte);
336         else
337                 old_spte = __xchg_spte(sptep, new_spte);
338
339         if (!shadow_accessed_mask)
340                 return;
341
342         if (spte_is_bit_cleared(old_spte, new_spte, shadow_accessed_mask))
343                 kvm_set_pfn_accessed(spte_to_pfn(old_spte));
344         if (spte_is_bit_cleared(old_spte, new_spte, shadow_dirty_mask))
345                 kvm_set_pfn_dirty(spte_to_pfn(old_spte));
346 }
347
348 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
349                                   struct kmem_cache *base_cache, int min)
350 {
351         void *obj;
352
353         if (cache->nobjs >= min)
354                 return 0;
355         while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
356                 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
357                 if (!obj)
358                         return -ENOMEM;
359                 cache->objects[cache->nobjs++] = obj;
360         }
361         return 0;
362 }
363
364 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc,
365                                   struct kmem_cache *cache)
366 {
367         while (mc->nobjs)
368                 kmem_cache_free(cache, mc->objects[--mc->nobjs]);
369 }
370
371 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
372                                        int min)
373 {
374         struct page *page;
375
376         if (cache->nobjs >= min)
377                 return 0;
378         while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
379                 page = alloc_page(GFP_KERNEL);
380                 if (!page)
381                         return -ENOMEM;
382                 cache->objects[cache->nobjs++] = page_address(page);
383         }
384         return 0;
385 }
386
387 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
388 {
389         while (mc->nobjs)
390                 free_page((unsigned long)mc->objects[--mc->nobjs]);
391 }
392
393 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
394 {
395         int r;
396
397         r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
398                                    pte_chain_cache, 4);
399         if (r)
400                 goto out;
401         r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
402                                    rmap_desc_cache, 4);
403         if (r)
404                 goto out;
405         r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
406         if (r)
407                 goto out;
408         r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
409                                    mmu_page_header_cache, 4);
410 out:
411         return r;
412 }
413
414 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
415 {
416         mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache, pte_chain_cache);
417         mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache, rmap_desc_cache);
418         mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
419         mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache,
420                                 mmu_page_header_cache);
421 }
422
423 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
424                                     size_t size)
425 {
426         void *p;
427
428         BUG_ON(!mc->nobjs);
429         p = mc->objects[--mc->nobjs];
430         return p;
431 }
432
433 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
434 {
435         return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
436                                       sizeof(struct kvm_pte_chain));
437 }
438
439 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
440 {
441         kmem_cache_free(pte_chain_cache, pc);
442 }
443
444 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
445 {
446         return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
447                                       sizeof(struct kvm_rmap_desc));
448 }
449
450 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
451 {
452         kmem_cache_free(rmap_desc_cache, rd);
453 }
454
455 static gfn_t kvm_mmu_page_get_gfn(struct kvm_mmu_page *sp, int index)
456 {
457         if (!sp->role.direct)
458                 return sp->gfns[index];
459
460         return sp->gfn + (index << ((sp->role.level - 1) * PT64_LEVEL_BITS));
461 }
462
463 static void kvm_mmu_page_set_gfn(struct kvm_mmu_page *sp, int index, gfn_t gfn)
464 {
465         if (sp->role.direct)
466                 BUG_ON(gfn != kvm_mmu_page_get_gfn(sp, index));
467         else
468                 sp->gfns[index] = gfn;
469 }
470
471 /*
472  * Return the pointer to the largepage write count for a given
473  * gfn, handling slots that are not large page aligned.
474  */
475 static int *slot_largepage_idx(gfn_t gfn,
476                                struct kvm_memory_slot *slot,
477                                int level)
478 {
479         unsigned long idx;
480
481         idx = (gfn >> KVM_HPAGE_GFN_SHIFT(level)) -
482               (slot->base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
483         return &slot->lpage_info[level - 2][idx].write_count;
484 }
485
486 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
487 {
488         struct kvm_memory_slot *slot;
489         int *write_count;
490         int i;
491
492         slot = gfn_to_memslot(kvm, gfn);
493         for (i = PT_DIRECTORY_LEVEL;
494              i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
495                 write_count   = slot_largepage_idx(gfn, slot, i);
496                 *write_count += 1;
497         }
498 }
499
500 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
501 {
502         struct kvm_memory_slot *slot;
503         int *write_count;
504         int i;
505
506         slot = gfn_to_memslot(kvm, gfn);
507         for (i = PT_DIRECTORY_LEVEL;
508              i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
509                 write_count   = slot_largepage_idx(gfn, slot, i);
510                 *write_count -= 1;
511                 WARN_ON(*write_count < 0);
512         }
513 }
514
515 static int has_wrprotected_page(struct kvm *kvm,
516                                 gfn_t gfn,
517                                 int level)
518 {
519         struct kvm_memory_slot *slot;
520         int *largepage_idx;
521
522         slot = gfn_to_memslot(kvm, gfn);
523         if (slot) {
524                 largepage_idx = slot_largepage_idx(gfn, slot, level);
525                 return *largepage_idx;
526         }
527
528         return 1;
529 }
530
531 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
532 {
533         unsigned long page_size;
534         int i, ret = 0;
535
536         page_size = kvm_host_page_size(kvm, gfn);
537
538         for (i = PT_PAGE_TABLE_LEVEL;
539              i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
540                 if (page_size >= KVM_HPAGE_SIZE(i))
541                         ret = i;
542                 else
543                         break;
544         }
545
546         return ret;
547 }
548
549 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
550 {
551         struct kvm_memory_slot *slot;
552         int host_level, level, max_level;
553
554         slot = gfn_to_memslot(vcpu->kvm, large_gfn);
555         if (slot && slot->dirty_bitmap)
556                 return PT_PAGE_TABLE_LEVEL;
557
558         host_level = host_mapping_level(vcpu->kvm, large_gfn);
559
560         if (host_level == PT_PAGE_TABLE_LEVEL)
561                 return host_level;
562
563         max_level = kvm_x86_ops->get_lpage_level() < host_level ?
564                 kvm_x86_ops->get_lpage_level() : host_level;
565
566         for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level)
567                 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
568                         break;
569
570         return level - 1;
571 }
572
573 /*
574  * Take gfn and return the reverse mapping to it.
575  */
576
577 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
578 {
579         struct kvm_memory_slot *slot;
580         unsigned long idx;
581
582         slot = gfn_to_memslot(kvm, gfn);
583         if (likely(level == PT_PAGE_TABLE_LEVEL))
584                 return &slot->rmap[gfn - slot->base_gfn];
585
586         idx = (gfn >> KVM_HPAGE_GFN_SHIFT(level)) -
587                 (slot->base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
588
589         return &slot->lpage_info[level - 2][idx].rmap_pde;
590 }
591
592 /*
593  * Reverse mapping data structures:
594  *
595  * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
596  * that points to page_address(page).
597  *
598  * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
599  * containing more mappings.
600  *
601  * Returns the number of rmap entries before the spte was added or zero if
602  * the spte was not added.
603  *
604  */
605 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
606 {
607         struct kvm_mmu_page *sp;
608         struct kvm_rmap_desc *desc;
609         unsigned long *rmapp;
610         int i, count = 0;
611
612         if (!is_rmap_spte(*spte))
613                 return count;
614         sp = page_header(__pa(spte));
615         kvm_mmu_page_set_gfn(sp, spte - sp->spt, gfn);
616         rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
617         if (!*rmapp) {
618                 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
619                 *rmapp = (unsigned long)spte;
620         } else if (!(*rmapp & 1)) {
621                 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
622                 desc = mmu_alloc_rmap_desc(vcpu);
623                 desc->sptes[0] = (u64 *)*rmapp;
624                 desc->sptes[1] = spte;
625                 *rmapp = (unsigned long)desc | 1;
626         } else {
627                 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
628                 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
629                 while (desc->sptes[RMAP_EXT-1] && desc->more) {
630                         desc = desc->more;
631                         count += RMAP_EXT;
632                 }
633                 if (desc->sptes[RMAP_EXT-1]) {
634                         desc->more = mmu_alloc_rmap_desc(vcpu);
635                         desc = desc->more;
636                 }
637                 for (i = 0; desc->sptes[i]; ++i)
638                         ;
639                 desc->sptes[i] = spte;
640         }
641         return count;
642 }
643
644 static void rmap_desc_remove_entry(unsigned long *rmapp,
645                                    struct kvm_rmap_desc *desc,
646                                    int i,
647                                    struct kvm_rmap_desc *prev_desc)
648 {
649         int j;
650
651         for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
652                 ;
653         desc->sptes[i] = desc->sptes[j];
654         desc->sptes[j] = NULL;
655         if (j != 0)
656                 return;
657         if (!prev_desc && !desc->more)
658                 *rmapp = (unsigned long)desc->sptes[0];
659         else
660                 if (prev_desc)
661                         prev_desc->more = desc->more;
662                 else
663                         *rmapp = (unsigned long)desc->more | 1;
664         mmu_free_rmap_desc(desc);
665 }
666
667 static void rmap_remove(struct kvm *kvm, u64 *spte)
668 {
669         struct kvm_rmap_desc *desc;
670         struct kvm_rmap_desc *prev_desc;
671         struct kvm_mmu_page *sp;
672         gfn_t gfn;
673         unsigned long *rmapp;
674         int i;
675
676         sp = page_header(__pa(spte));
677         gfn = kvm_mmu_page_get_gfn(sp, spte - sp->spt);
678         rmapp = gfn_to_rmap(kvm, gfn, sp->role.level);
679         if (!*rmapp) {
680                 printk(KERN_ERR "rmap_remove: %p 0->BUG\n", spte);
681                 BUG();
682         } else if (!(*rmapp & 1)) {
683                 rmap_printk("rmap_remove:  %p 1->0\n", spte);
684                 if ((u64 *)*rmapp != spte) {
685                         printk(KERN_ERR "rmap_remove:  %p 1->BUG\n", spte);
686                         BUG();
687                 }
688                 *rmapp = 0;
689         } else {
690                 rmap_printk("rmap_remove:  %p many->many\n", spte);
691                 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
692                 prev_desc = NULL;
693                 while (desc) {
694                         for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
695                                 if (desc->sptes[i] == spte) {
696                                         rmap_desc_remove_entry(rmapp,
697                                                                desc, i,
698                                                                prev_desc);
699                                         return;
700                                 }
701                         prev_desc = desc;
702                         desc = desc->more;
703                 }
704                 pr_err("rmap_remove: %p many->many\n", spte);
705                 BUG();
706         }
707 }
708
709 static void set_spte_track_bits(u64 *sptep, u64 new_spte)
710 {
711         pfn_t pfn;
712         u64 old_spte = *sptep;
713
714         if (!spte_has_volatile_bits(old_spte))
715                 __set_spte(sptep, new_spte);
716         else
717                 old_spte = __xchg_spte(sptep, new_spte);
718
719         if (!is_rmap_spte(old_spte))
720                 return;
721
722         pfn = spte_to_pfn(old_spte);
723         if (!shadow_accessed_mask || old_spte & shadow_accessed_mask)
724                 kvm_set_pfn_accessed(pfn);
725         if (!shadow_dirty_mask || (old_spte & shadow_dirty_mask))
726                 kvm_set_pfn_dirty(pfn);
727 }
728
729 static void drop_spte(struct kvm *kvm, u64 *sptep, u64 new_spte)
730 {
731         set_spte_track_bits(sptep, new_spte);
732         rmap_remove(kvm, sptep);
733 }
734
735 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
736 {
737         struct kvm_rmap_desc *desc;
738         u64 *prev_spte;
739         int i;
740
741         if (!*rmapp)
742                 return NULL;
743         else if (!(*rmapp & 1)) {
744                 if (!spte)
745                         return (u64 *)*rmapp;
746                 return NULL;
747         }
748         desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
749         prev_spte = NULL;
750         while (desc) {
751                 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
752                         if (prev_spte == spte)
753                                 return desc->sptes[i];
754                         prev_spte = desc->sptes[i];
755                 }
756                 desc = desc->more;
757         }
758         return NULL;
759 }
760
761 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
762 {
763         unsigned long *rmapp;
764         u64 *spte;
765         int i, write_protected = 0;
766
767         rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
768
769         spte = rmap_next(kvm, rmapp, NULL);
770         while (spte) {
771                 BUG_ON(!spte);
772                 BUG_ON(!(*spte & PT_PRESENT_MASK));
773                 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
774                 if (is_writable_pte(*spte)) {
775                         update_spte(spte, *spte & ~PT_WRITABLE_MASK);
776                         write_protected = 1;
777                 }
778                 spte = rmap_next(kvm, rmapp, spte);
779         }
780
781         /* check for huge page mappings */
782         for (i = PT_DIRECTORY_LEVEL;
783              i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
784                 rmapp = gfn_to_rmap(kvm, gfn, i);
785                 spte = rmap_next(kvm, rmapp, NULL);
786                 while (spte) {
787                         BUG_ON(!spte);
788                         BUG_ON(!(*spte & PT_PRESENT_MASK));
789                         BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
790                         pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
791                         if (is_writable_pte(*spte)) {
792                                 drop_spte(kvm, spte,
793                                           shadow_trap_nonpresent_pte);
794                                 --kvm->stat.lpages;
795                                 spte = NULL;
796                                 write_protected = 1;
797                         }
798                         spte = rmap_next(kvm, rmapp, spte);
799                 }
800         }
801
802         return write_protected;
803 }
804
805 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
806                            unsigned long data)
807 {
808         u64 *spte;
809         int need_tlb_flush = 0;
810
811         while ((spte = rmap_next(kvm, rmapp, NULL))) {
812                 BUG_ON(!(*spte & PT_PRESENT_MASK));
813                 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
814                 drop_spte(kvm, spte, shadow_trap_nonpresent_pte);
815                 need_tlb_flush = 1;
816         }
817         return need_tlb_flush;
818 }
819
820 static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
821                              unsigned long data)
822 {
823         int need_flush = 0;
824         u64 *spte, new_spte;
825         pte_t *ptep = (pte_t *)data;
826         pfn_t new_pfn;
827
828         WARN_ON(pte_huge(*ptep));
829         new_pfn = pte_pfn(*ptep);
830         spte = rmap_next(kvm, rmapp, NULL);
831         while (spte) {
832                 BUG_ON(!is_shadow_present_pte(*spte));
833                 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte, *spte);
834                 need_flush = 1;
835                 if (pte_write(*ptep)) {
836                         drop_spte(kvm, spte, shadow_trap_nonpresent_pte);
837                         spte = rmap_next(kvm, rmapp, NULL);
838                 } else {
839                         new_spte = *spte &~ (PT64_BASE_ADDR_MASK);
840                         new_spte |= (u64)new_pfn << PAGE_SHIFT;
841
842                         new_spte &= ~PT_WRITABLE_MASK;
843                         new_spte &= ~SPTE_HOST_WRITEABLE;
844                         new_spte &= ~shadow_accessed_mask;
845                         set_spte_track_bits(spte, new_spte);
846                         spte = rmap_next(kvm, rmapp, spte);
847                 }
848         }
849         if (need_flush)
850                 kvm_flush_remote_tlbs(kvm);
851
852         return 0;
853 }
854
855 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
856                           unsigned long data,
857                           int (*handler)(struct kvm *kvm, unsigned long *rmapp,
858                                          unsigned long data))
859 {
860         int i, j;
861         int ret;
862         int retval = 0;
863         struct kvm_memslots *slots;
864
865         slots = kvm_memslots(kvm);
866
867         for (i = 0; i < slots->nmemslots; i++) {
868                 struct kvm_memory_slot *memslot = &slots->memslots[i];
869                 unsigned long start = memslot->userspace_addr;
870                 unsigned long end;
871
872                 end = start + (memslot->npages << PAGE_SHIFT);
873                 if (hva >= start && hva < end) {
874                         gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
875
876                         ret = handler(kvm, &memslot->rmap[gfn_offset], data);
877
878                         for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
879                                 unsigned long idx;
880                                 int sh;
881
882                                 sh = KVM_HPAGE_GFN_SHIFT(PT_DIRECTORY_LEVEL+j);
883                                 idx = ((memslot->base_gfn+gfn_offset) >> sh) -
884                                         (memslot->base_gfn >> sh);
885                                 ret |= handler(kvm,
886                                         &memslot->lpage_info[j][idx].rmap_pde,
887                                         data);
888                         }
889                         trace_kvm_age_page(hva, memslot, ret);
890                         retval |= ret;
891                 }
892         }
893
894         return retval;
895 }
896
897 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
898 {
899         return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
900 }
901
902 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
903 {
904         kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
905 }
906
907 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
908                          unsigned long data)
909 {
910         u64 *spte;
911         int young = 0;
912
913         /*
914          * Emulate the accessed bit for EPT, by checking if this page has
915          * an EPT mapping, and clearing it if it does. On the next access,
916          * a new EPT mapping will be established.
917          * This has some overhead, but not as much as the cost of swapping
918          * out actively used pages or breaking up actively used hugepages.
919          */
920         if (!shadow_accessed_mask)
921                 return kvm_unmap_rmapp(kvm, rmapp, data);
922
923         spte = rmap_next(kvm, rmapp, NULL);
924         while (spte) {
925                 int _young;
926                 u64 _spte = *spte;
927                 BUG_ON(!(_spte & PT_PRESENT_MASK));
928                 _young = _spte & PT_ACCESSED_MASK;
929                 if (_young) {
930                         young = 1;
931                         clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
932                 }
933                 spte = rmap_next(kvm, rmapp, spte);
934         }
935         return young;
936 }
937
938 #define RMAP_RECYCLE_THRESHOLD 1000
939
940 static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
941 {
942         unsigned long *rmapp;
943         struct kvm_mmu_page *sp;
944
945         sp = page_header(__pa(spte));
946
947         rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
948
949         kvm_unmap_rmapp(vcpu->kvm, rmapp, 0);
950         kvm_flush_remote_tlbs(vcpu->kvm);
951 }
952
953 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
954 {
955         return kvm_handle_hva(kvm, hva, 0, kvm_age_rmapp);
956 }
957
958 #ifdef MMU_DEBUG
959 static int is_empty_shadow_page(u64 *spt)
960 {
961         u64 *pos;
962         u64 *end;
963
964         for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
965                 if (is_shadow_present_pte(*pos)) {
966                         printk(KERN_ERR "%s: %p %llx\n", __func__,
967                                pos, *pos);
968                         return 0;
969                 }
970         return 1;
971 }
972 #endif
973
974 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
975 {
976         ASSERT(is_empty_shadow_page(sp->spt));
977         hlist_del(&sp->hash_link);
978         list_del(&sp->link);
979         __free_page(virt_to_page(sp->spt));
980         if (!sp->role.direct)
981                 __free_page(virt_to_page(sp->gfns));
982         kmem_cache_free(mmu_page_header_cache, sp);
983         ++kvm->arch.n_free_mmu_pages;
984 }
985
986 static unsigned kvm_page_table_hashfn(gfn_t gfn)
987 {
988         return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
989 }
990
991 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
992                                                u64 *parent_pte, int direct)
993 {
994         struct kvm_mmu_page *sp;
995
996         sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
997         sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
998         if (!direct)
999                 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache,
1000                                                   PAGE_SIZE);
1001         set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
1002         list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
1003         bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
1004         sp->multimapped = 0;
1005         sp->parent_pte = parent_pte;
1006         --vcpu->kvm->arch.n_free_mmu_pages;
1007         return sp;
1008 }
1009
1010 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
1011                                     struct kvm_mmu_page *sp, u64 *parent_pte)
1012 {
1013         struct kvm_pte_chain *pte_chain;
1014         struct hlist_node *node;
1015         int i;
1016
1017         if (!parent_pte)
1018                 return;
1019         if (!sp->multimapped) {
1020                 u64 *old = sp->parent_pte;
1021
1022                 if (!old) {
1023                         sp->parent_pte = parent_pte;
1024                         return;
1025                 }
1026                 sp->multimapped = 1;
1027                 pte_chain = mmu_alloc_pte_chain(vcpu);
1028                 INIT_HLIST_HEAD(&sp->parent_ptes);
1029                 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
1030                 pte_chain->parent_ptes[0] = old;
1031         }
1032         hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
1033                 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
1034                         continue;
1035                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
1036                         if (!pte_chain->parent_ptes[i]) {
1037                                 pte_chain->parent_ptes[i] = parent_pte;
1038                                 return;
1039                         }
1040         }
1041         pte_chain = mmu_alloc_pte_chain(vcpu);
1042         BUG_ON(!pte_chain);
1043         hlist_add_head(&pte_chain->link, &sp->parent_ptes);
1044         pte_chain->parent_ptes[0] = parent_pte;
1045 }
1046
1047 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
1048                                        u64 *parent_pte)
1049 {
1050         struct kvm_pte_chain *pte_chain;
1051         struct hlist_node *node;
1052         int i;
1053
1054         if (!sp->multimapped) {
1055                 BUG_ON(sp->parent_pte != parent_pte);
1056                 sp->parent_pte = NULL;
1057                 return;
1058         }
1059         hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1060                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1061                         if (!pte_chain->parent_ptes[i])
1062                                 break;
1063                         if (pte_chain->parent_ptes[i] != parent_pte)
1064                                 continue;
1065                         while (i + 1 < NR_PTE_CHAIN_ENTRIES
1066                                 && pte_chain->parent_ptes[i + 1]) {
1067                                 pte_chain->parent_ptes[i]
1068                                         = pte_chain->parent_ptes[i + 1];
1069                                 ++i;
1070                         }
1071                         pte_chain->parent_ptes[i] = NULL;
1072                         if (i == 0) {
1073                                 hlist_del(&pte_chain->link);
1074                                 mmu_free_pte_chain(pte_chain);
1075                                 if (hlist_empty(&sp->parent_ptes)) {
1076                                         sp->multimapped = 0;
1077                                         sp->parent_pte = NULL;
1078                                 }
1079                         }
1080                         return;
1081                 }
1082         BUG();
1083 }
1084
1085 static void mmu_parent_walk(struct kvm_mmu_page *sp, mmu_parent_walk_fn fn)
1086 {
1087         struct kvm_pte_chain *pte_chain;
1088         struct hlist_node *node;
1089         struct kvm_mmu_page *parent_sp;
1090         int i;
1091
1092         if (!sp->multimapped && sp->parent_pte) {
1093                 parent_sp = page_header(__pa(sp->parent_pte));
1094                 fn(parent_sp, sp->parent_pte);
1095                 return;
1096         }
1097
1098         hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1099                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1100                         u64 *spte = pte_chain->parent_ptes[i];
1101
1102                         if (!spte)
1103                                 break;
1104                         parent_sp = page_header(__pa(spte));
1105                         fn(parent_sp, spte);
1106                 }
1107 }
1108
1109 static void mark_unsync(struct kvm_mmu_page *sp, u64 *spte);
1110 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp)
1111 {
1112         mmu_parent_walk(sp, mark_unsync);
1113 }
1114
1115 static void mark_unsync(struct kvm_mmu_page *sp, u64 *spte)
1116 {
1117         unsigned int index;
1118
1119         index = spte - sp->spt;
1120         if (__test_and_set_bit(index, sp->unsync_child_bitmap))
1121                 return;
1122         if (sp->unsync_children++)
1123                 return;
1124         kvm_mmu_mark_parents_unsync(sp);
1125 }
1126
1127 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1128                                     struct kvm_mmu_page *sp)
1129 {
1130         int i;
1131
1132         for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1133                 sp->spt[i] = shadow_trap_nonpresent_pte;
1134 }
1135
1136 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1137                                struct kvm_mmu_page *sp, bool clear_unsync)
1138 {
1139         return 1;
1140 }
1141
1142 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1143 {
1144 }
1145
1146 #define KVM_PAGE_ARRAY_NR 16
1147
1148 struct kvm_mmu_pages {
1149         struct mmu_page_and_offset {
1150                 struct kvm_mmu_page *sp;
1151                 unsigned int idx;
1152         } page[KVM_PAGE_ARRAY_NR];
1153         unsigned int nr;
1154 };
1155
1156 #define for_each_unsync_children(bitmap, idx)           \
1157         for (idx = find_first_bit(bitmap, 512);         \
1158              idx < 512;                                 \
1159              idx = find_next_bit(bitmap, 512, idx+1))
1160
1161 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1162                          int idx)
1163 {
1164         int i;
1165
1166         if (sp->unsync)
1167                 for (i=0; i < pvec->nr; i++)
1168                         if (pvec->page[i].sp == sp)
1169                                 return 0;
1170
1171         pvec->page[pvec->nr].sp = sp;
1172         pvec->page[pvec->nr].idx = idx;
1173         pvec->nr++;
1174         return (pvec->nr == KVM_PAGE_ARRAY_NR);
1175 }
1176
1177 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1178                            struct kvm_mmu_pages *pvec)
1179 {
1180         int i, ret, nr_unsync_leaf = 0;
1181
1182         for_each_unsync_children(sp->unsync_child_bitmap, i) {
1183                 struct kvm_mmu_page *child;
1184                 u64 ent = sp->spt[i];
1185
1186                 if (!is_shadow_present_pte(ent) || is_large_pte(ent))
1187                         goto clear_child_bitmap;
1188
1189                 child = page_header(ent & PT64_BASE_ADDR_MASK);
1190
1191                 if (child->unsync_children) {
1192                         if (mmu_pages_add(pvec, child, i))
1193                                 return -ENOSPC;
1194
1195                         ret = __mmu_unsync_walk(child, pvec);
1196                         if (!ret)
1197                                 goto clear_child_bitmap;
1198                         else if (ret > 0)
1199                                 nr_unsync_leaf += ret;
1200                         else
1201                                 return ret;
1202                 } else if (child->unsync) {
1203                         nr_unsync_leaf++;
1204                         if (mmu_pages_add(pvec, child, i))
1205                                 return -ENOSPC;
1206                 } else
1207                          goto clear_child_bitmap;
1208
1209                 continue;
1210
1211 clear_child_bitmap:
1212                 __clear_bit(i, sp->unsync_child_bitmap);
1213                 sp->unsync_children--;
1214                 WARN_ON((int)sp->unsync_children < 0);
1215         }
1216
1217
1218         return nr_unsync_leaf;
1219 }
1220
1221 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1222                            struct kvm_mmu_pages *pvec)
1223 {
1224         if (!sp->unsync_children)
1225                 return 0;
1226
1227         mmu_pages_add(pvec, sp, 0);
1228         return __mmu_unsync_walk(sp, pvec);
1229 }
1230
1231 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1232 {
1233         WARN_ON(!sp->unsync);
1234         trace_kvm_mmu_sync_page(sp);
1235         sp->unsync = 0;
1236         --kvm->stat.mmu_unsync;
1237 }
1238
1239 static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
1240                                     struct list_head *invalid_list);
1241 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
1242                                     struct list_head *invalid_list);
1243
1244 #define for_each_gfn_sp(kvm, sp, gfn, pos)                              \
1245   hlist_for_each_entry(sp, pos,                                         \
1246    &(kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)], hash_link)   \
1247         if ((sp)->gfn != (gfn)) {} else
1248
1249 #define for_each_gfn_indirect_valid_sp(kvm, sp, gfn, pos)               \
1250   hlist_for_each_entry(sp, pos,                                         \
1251    &(kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)], hash_link)   \
1252                 if ((sp)->gfn != (gfn) || (sp)->role.direct ||          \
1253                         (sp)->role.invalid) {} else
1254
1255 /* @sp->gfn should be write-protected at the call site */
1256 static int __kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1257                            struct list_head *invalid_list, bool clear_unsync)
1258 {
1259         if (sp->role.cr4_pae != !!is_pae(vcpu)) {
1260                 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1261                 return 1;
1262         }
1263
1264         if (clear_unsync)
1265                 kvm_unlink_unsync_page(vcpu->kvm, sp);
1266
1267         if (vcpu->arch.mmu.sync_page(vcpu, sp, clear_unsync)) {
1268                 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1269                 return 1;
1270         }
1271
1272         kvm_mmu_flush_tlb(vcpu);
1273         return 0;
1274 }
1275
1276 static int kvm_sync_page_transient(struct kvm_vcpu *vcpu,
1277                                    struct kvm_mmu_page *sp)
1278 {
1279         LIST_HEAD(invalid_list);
1280         int ret;
1281
1282         ret = __kvm_sync_page(vcpu, sp, &invalid_list, false);
1283         if (ret)
1284                 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1285
1286         return ret;
1287 }
1288
1289 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1290                          struct list_head *invalid_list)
1291 {
1292         return __kvm_sync_page(vcpu, sp, invalid_list, true);
1293 }
1294
1295 /* @gfn should be write-protected at the call site */
1296 static void kvm_sync_pages(struct kvm_vcpu *vcpu,  gfn_t gfn)
1297 {
1298         struct kvm_mmu_page *s;
1299         struct hlist_node *node;
1300         LIST_HEAD(invalid_list);
1301         bool flush = false;
1302
1303         for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1304                 if (!s->unsync)
1305                         continue;
1306
1307                 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
1308                 if ((s->role.cr4_pae != !!is_pae(vcpu)) ||
1309                         (vcpu->arch.mmu.sync_page(vcpu, s, true))) {
1310                         kvm_mmu_prepare_zap_page(vcpu->kvm, s, &invalid_list);
1311                         continue;
1312                 }
1313                 kvm_unlink_unsync_page(vcpu->kvm, s);
1314                 flush = true;
1315         }
1316
1317         kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1318         if (flush)
1319                 kvm_mmu_flush_tlb(vcpu);
1320 }
1321
1322 struct mmu_page_path {
1323         struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1324         unsigned int idx[PT64_ROOT_LEVEL-1];
1325 };
1326
1327 #define for_each_sp(pvec, sp, parents, i)                       \
1328                 for (i = mmu_pages_next(&pvec, &parents, -1),   \
1329                         sp = pvec.page[i].sp;                   \
1330                         i < pvec.nr && ({ sp = pvec.page[i].sp; 1;});   \
1331                         i = mmu_pages_next(&pvec, &parents, i))
1332
1333 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1334                           struct mmu_page_path *parents,
1335                           int i)
1336 {
1337         int n;
1338
1339         for (n = i+1; n < pvec->nr; n++) {
1340                 struct kvm_mmu_page *sp = pvec->page[n].sp;
1341
1342                 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1343                         parents->idx[0] = pvec->page[n].idx;
1344                         return n;
1345                 }
1346
1347                 parents->parent[sp->role.level-2] = sp;
1348                 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1349         }
1350
1351         return n;
1352 }
1353
1354 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1355 {
1356         struct kvm_mmu_page *sp;
1357         unsigned int level = 0;
1358
1359         do {
1360                 unsigned int idx = parents->idx[level];
1361
1362                 sp = parents->parent[level];
1363                 if (!sp)
1364                         return;
1365
1366                 --sp->unsync_children;
1367                 WARN_ON((int)sp->unsync_children < 0);
1368                 __clear_bit(idx, sp->unsync_child_bitmap);
1369                 level++;
1370         } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1371 }
1372
1373 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1374                                struct mmu_page_path *parents,
1375                                struct kvm_mmu_pages *pvec)
1376 {
1377         parents->parent[parent->role.level-1] = NULL;
1378         pvec->nr = 0;
1379 }
1380
1381 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1382                               struct kvm_mmu_page *parent)
1383 {
1384         int i;
1385         struct kvm_mmu_page *sp;
1386         struct mmu_page_path parents;
1387         struct kvm_mmu_pages pages;
1388         LIST_HEAD(invalid_list);
1389
1390         kvm_mmu_pages_init(parent, &parents, &pages);
1391         while (mmu_unsync_walk(parent, &pages)) {
1392                 int protected = 0;
1393
1394                 for_each_sp(pages, sp, parents, i)
1395                         protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1396
1397                 if (protected)
1398                         kvm_flush_remote_tlbs(vcpu->kvm);
1399
1400                 for_each_sp(pages, sp, parents, i) {
1401                         kvm_sync_page(vcpu, sp, &invalid_list);
1402                         mmu_pages_clear_parents(&parents);
1403                 }
1404                 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1405                 cond_resched_lock(&vcpu->kvm->mmu_lock);
1406                 kvm_mmu_pages_init(parent, &parents, &pages);
1407         }
1408 }
1409
1410 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1411                                              gfn_t gfn,
1412                                              gva_t gaddr,
1413                                              unsigned level,
1414                                              int direct,
1415                                              unsigned access,
1416                                              u64 *parent_pte)
1417 {
1418         union kvm_mmu_page_role role;
1419         unsigned quadrant;
1420         struct kvm_mmu_page *sp;
1421         struct hlist_node *node;
1422         bool need_sync = false;
1423
1424         role = vcpu->arch.mmu.base_role;
1425         role.level = level;
1426         role.direct = direct;
1427         if (role.direct)
1428                 role.cr4_pae = 0;
1429         role.access = access;
1430         if (!tdp_enabled && vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1431                 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1432                 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1433                 role.quadrant = quadrant;
1434         }
1435         for_each_gfn_sp(vcpu->kvm, sp, gfn, node) {
1436                 if (!need_sync && sp->unsync)
1437                         need_sync = true;
1438
1439                 if (sp->role.word != role.word)
1440                         continue;
1441
1442                 if (sp->unsync && kvm_sync_page_transient(vcpu, sp))
1443                         break;
1444
1445                 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1446                 if (sp->unsync_children) {
1447                         kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
1448                         kvm_mmu_mark_parents_unsync(sp);
1449                 } else if (sp->unsync)
1450                         kvm_mmu_mark_parents_unsync(sp);
1451
1452                 trace_kvm_mmu_get_page(sp, false);
1453                 return sp;
1454         }
1455         ++vcpu->kvm->stat.mmu_cache_miss;
1456         sp = kvm_mmu_alloc_page(vcpu, parent_pte, direct);
1457         if (!sp)
1458                 return sp;
1459         sp->gfn = gfn;
1460         sp->role = role;
1461         hlist_add_head(&sp->hash_link,
1462                 &vcpu->kvm->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)]);
1463         if (!direct) {
1464                 if (rmap_write_protect(vcpu->kvm, gfn))
1465                         kvm_flush_remote_tlbs(vcpu->kvm);
1466                 if (level > PT_PAGE_TABLE_LEVEL && need_sync)
1467                         kvm_sync_pages(vcpu, gfn);
1468
1469                 account_shadowed(vcpu->kvm, gfn);
1470         }
1471         if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1472                 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1473         else
1474                 nonpaging_prefetch_page(vcpu, sp);
1475         trace_kvm_mmu_get_page(sp, true);
1476         return sp;
1477 }
1478
1479 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1480                              struct kvm_vcpu *vcpu, u64 addr)
1481 {
1482         iterator->addr = addr;
1483         iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1484         iterator->level = vcpu->arch.mmu.shadow_root_level;
1485         if (iterator->level == PT32E_ROOT_LEVEL) {
1486                 iterator->shadow_addr
1487                         = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1488                 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1489                 --iterator->level;
1490                 if (!iterator->shadow_addr)
1491                         iterator->level = 0;
1492         }
1493 }
1494
1495 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1496 {
1497         if (iterator->level < PT_PAGE_TABLE_LEVEL)
1498                 return false;
1499
1500         if (iterator->level == PT_PAGE_TABLE_LEVEL)
1501                 if (is_large_pte(*iterator->sptep))
1502                         return false;
1503
1504         iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1505         iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1506         return true;
1507 }
1508
1509 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1510 {
1511         iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1512         --iterator->level;
1513 }
1514
1515 static void link_shadow_page(u64 *sptep, struct kvm_mmu_page *sp)
1516 {
1517         u64 spte;
1518
1519         spte = __pa(sp->spt)
1520                 | PT_PRESENT_MASK | PT_ACCESSED_MASK
1521                 | PT_WRITABLE_MASK | PT_USER_MASK;
1522         __set_spte(sptep, spte);
1523 }
1524
1525 static void drop_large_spte(struct kvm_vcpu *vcpu, u64 *sptep)
1526 {
1527         if (is_large_pte(*sptep)) {
1528                 drop_spte(vcpu->kvm, sptep, shadow_trap_nonpresent_pte);
1529                 kvm_flush_remote_tlbs(vcpu->kvm);
1530         }
1531 }
1532
1533 static void validate_direct_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1534                                    unsigned direct_access)
1535 {
1536         if (is_shadow_present_pte(*sptep) && !is_large_pte(*sptep)) {
1537                 struct kvm_mmu_page *child;
1538
1539                 /*
1540                  * For the direct sp, if the guest pte's dirty bit
1541                  * changed form clean to dirty, it will corrupt the
1542                  * sp's access: allow writable in the read-only sp,
1543                  * so we should update the spte at this point to get
1544                  * a new sp with the correct access.
1545                  */
1546                 child = page_header(*sptep & PT64_BASE_ADDR_MASK);
1547                 if (child->role.access == direct_access)
1548                         return;
1549
1550                 mmu_page_remove_parent_pte(child, sptep);
1551                 __set_spte(sptep, shadow_trap_nonpresent_pte);
1552                 kvm_flush_remote_tlbs(vcpu->kvm);
1553         }
1554 }
1555
1556 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1557                                          struct kvm_mmu_page *sp)
1558 {
1559         unsigned i;
1560         u64 *pt;
1561         u64 ent;
1562
1563         pt = sp->spt;
1564
1565         for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1566                 ent = pt[i];
1567
1568                 if (is_shadow_present_pte(ent)) {
1569                         if (!is_last_spte(ent, sp->role.level)) {
1570                                 ent &= PT64_BASE_ADDR_MASK;
1571                                 mmu_page_remove_parent_pte(page_header(ent),
1572                                                            &pt[i]);
1573                         } else {
1574                                 if (is_large_pte(ent))
1575                                         --kvm->stat.lpages;
1576                                 drop_spte(kvm, &pt[i],
1577                                           shadow_trap_nonpresent_pte);
1578                         }
1579                 }
1580                 pt[i] = shadow_trap_nonpresent_pte;
1581         }
1582 }
1583
1584 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1585 {
1586         mmu_page_remove_parent_pte(sp, parent_pte);
1587 }
1588
1589 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1590 {
1591         int i;
1592         struct kvm_vcpu *vcpu;
1593
1594         kvm_for_each_vcpu(i, vcpu, kvm)
1595                 vcpu->arch.last_pte_updated = NULL;
1596 }
1597
1598 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1599 {
1600         u64 *parent_pte;
1601
1602         while (sp->multimapped || sp->parent_pte) {
1603                 if (!sp->multimapped)
1604                         parent_pte = sp->parent_pte;
1605                 else {
1606                         struct kvm_pte_chain *chain;
1607
1608                         chain = container_of(sp->parent_ptes.first,
1609                                              struct kvm_pte_chain, link);
1610                         parent_pte = chain->parent_ptes[0];
1611                 }
1612                 BUG_ON(!parent_pte);
1613                 kvm_mmu_put_page(sp, parent_pte);
1614                 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
1615         }
1616 }
1617
1618 static int mmu_zap_unsync_children(struct kvm *kvm,
1619                                    struct kvm_mmu_page *parent,
1620                                    struct list_head *invalid_list)
1621 {
1622         int i, zapped = 0;
1623         struct mmu_page_path parents;
1624         struct kvm_mmu_pages pages;
1625
1626         if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1627                 return 0;
1628
1629         kvm_mmu_pages_init(parent, &parents, &pages);
1630         while (mmu_unsync_walk(parent, &pages)) {
1631                 struct kvm_mmu_page *sp;
1632
1633                 for_each_sp(pages, sp, parents, i) {
1634                         kvm_mmu_prepare_zap_page(kvm, sp, invalid_list);
1635                         mmu_pages_clear_parents(&parents);
1636                         zapped++;
1637                 }
1638                 kvm_mmu_pages_init(parent, &parents, &pages);
1639         }
1640
1641         return zapped;
1642 }
1643
1644 static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
1645                                     struct list_head *invalid_list)
1646 {
1647         int ret;
1648
1649         trace_kvm_mmu_prepare_zap_page(sp);
1650         ++kvm->stat.mmu_shadow_zapped;
1651         ret = mmu_zap_unsync_children(kvm, sp, invalid_list);
1652         kvm_mmu_page_unlink_children(kvm, sp);
1653         kvm_mmu_unlink_parents(kvm, sp);
1654         if (!sp->role.invalid && !sp->role.direct)
1655                 unaccount_shadowed(kvm, sp->gfn);
1656         if (sp->unsync)
1657                 kvm_unlink_unsync_page(kvm, sp);
1658         if (!sp->root_count) {
1659                 /* Count self */
1660                 ret++;
1661                 list_move(&sp->link, invalid_list);
1662         } else {
1663                 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1664                 kvm_reload_remote_mmus(kvm);
1665         }
1666
1667         sp->role.invalid = 1;
1668         kvm_mmu_reset_last_pte_updated(kvm);
1669         return ret;
1670 }
1671
1672 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
1673                                     struct list_head *invalid_list)
1674 {
1675         struct kvm_mmu_page *sp;
1676
1677         if (list_empty(invalid_list))
1678                 return;
1679
1680         kvm_flush_remote_tlbs(kvm);
1681
1682         do {
1683                 sp = list_first_entry(invalid_list, struct kvm_mmu_page, link);
1684                 WARN_ON(!sp->role.invalid || sp->root_count);
1685                 kvm_mmu_free_page(kvm, sp);
1686         } while (!list_empty(invalid_list));
1687
1688 }
1689
1690 /*
1691  * Changing the number of mmu pages allocated to the vm
1692  * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1693  */
1694 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1695 {
1696         int used_pages;
1697         LIST_HEAD(invalid_list);
1698
1699         used_pages = kvm->arch.n_alloc_mmu_pages - kvm_mmu_available_pages(kvm);
1700         used_pages = max(0, used_pages);
1701
1702         /*
1703          * If we set the number of mmu pages to be smaller be than the
1704          * number of actived pages , we must to free some mmu pages before we
1705          * change the value
1706          */
1707
1708         if (used_pages > kvm_nr_mmu_pages) {
1709                 while (used_pages > kvm_nr_mmu_pages &&
1710                         !list_empty(&kvm->arch.active_mmu_pages)) {
1711                         struct kvm_mmu_page *page;
1712
1713                         page = container_of(kvm->arch.active_mmu_pages.prev,
1714                                             struct kvm_mmu_page, link);
1715                         used_pages -= kvm_mmu_prepare_zap_page(kvm, page,
1716                                                                &invalid_list);
1717                 }
1718                 kvm_mmu_commit_zap_page(kvm, &invalid_list);
1719                 kvm_nr_mmu_pages = used_pages;
1720                 kvm->arch.n_free_mmu_pages = 0;
1721         }
1722         else
1723                 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1724                                          - kvm->arch.n_alloc_mmu_pages;
1725
1726         kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
1727 }
1728
1729 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1730 {
1731         struct kvm_mmu_page *sp;
1732         struct hlist_node *node;
1733         LIST_HEAD(invalid_list);
1734         int r;
1735
1736         pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1737         r = 0;
1738
1739         for_each_gfn_indirect_valid_sp(kvm, sp, gfn, node) {
1740                 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
1741                          sp->role.word);
1742                 r = 1;
1743                 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
1744         }
1745         kvm_mmu_commit_zap_page(kvm, &invalid_list);
1746         return r;
1747 }
1748
1749 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1750 {
1751         struct kvm_mmu_page *sp;
1752         struct hlist_node *node;
1753         LIST_HEAD(invalid_list);
1754
1755         for_each_gfn_indirect_valid_sp(kvm, sp, gfn, node) {
1756                 pgprintk("%s: zap %lx %x\n",
1757                          __func__, gfn, sp->role.word);
1758                 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
1759         }
1760         kvm_mmu_commit_zap_page(kvm, &invalid_list);
1761 }
1762
1763 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1764 {
1765         int slot = memslot_id(kvm, gfn);
1766         struct kvm_mmu_page *sp = page_header(__pa(pte));
1767
1768         __set_bit(slot, sp->slot_bitmap);
1769 }
1770
1771 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1772 {
1773         int i;
1774         u64 *pt = sp->spt;
1775
1776         if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1777                 return;
1778
1779         for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1780                 if (pt[i] == shadow_notrap_nonpresent_pte)
1781                         __set_spte(&pt[i], shadow_trap_nonpresent_pte);
1782         }
1783 }
1784
1785 /*
1786  * The function is based on mtrr_type_lookup() in
1787  * arch/x86/kernel/cpu/mtrr/generic.c
1788  */
1789 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1790                          u64 start, u64 end)
1791 {
1792         int i;
1793         u64 base, mask;
1794         u8 prev_match, curr_match;
1795         int num_var_ranges = KVM_NR_VAR_MTRR;
1796
1797         if (!mtrr_state->enabled)
1798                 return 0xFF;
1799
1800         /* Make end inclusive end, instead of exclusive */
1801         end--;
1802
1803         /* Look in fixed ranges. Just return the type as per start */
1804         if (mtrr_state->have_fixed && (start < 0x100000)) {
1805                 int idx;
1806
1807                 if (start < 0x80000) {
1808                         idx = 0;
1809                         idx += (start >> 16);
1810                         return mtrr_state->fixed_ranges[idx];
1811                 } else if (start < 0xC0000) {
1812                         idx = 1 * 8;
1813                         idx += ((start - 0x80000) >> 14);
1814                         return mtrr_state->fixed_ranges[idx];
1815                 } else if (start < 0x1000000) {
1816                         idx = 3 * 8;
1817                         idx += ((start - 0xC0000) >> 12);
1818                         return mtrr_state->fixed_ranges[idx];
1819                 }
1820         }
1821
1822         /*
1823          * Look in variable ranges
1824          * Look of multiple ranges matching this address and pick type
1825          * as per MTRR precedence
1826          */
1827         if (!(mtrr_state->enabled & 2))
1828                 return mtrr_state->def_type;
1829
1830         prev_match = 0xFF;
1831         for (i = 0; i < num_var_ranges; ++i) {
1832                 unsigned short start_state, end_state;
1833
1834                 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1835                         continue;
1836
1837                 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1838                        (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1839                 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1840                        (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1841
1842                 start_state = ((start & mask) == (base & mask));
1843                 end_state = ((end & mask) == (base & mask));
1844                 if (start_state != end_state)
1845                         return 0xFE;
1846
1847                 if ((start & mask) != (base & mask))
1848                         continue;
1849
1850                 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1851                 if (prev_match == 0xFF) {
1852                         prev_match = curr_match;
1853                         continue;
1854                 }
1855
1856                 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1857                     curr_match == MTRR_TYPE_UNCACHABLE)
1858                         return MTRR_TYPE_UNCACHABLE;
1859
1860                 if ((prev_match == MTRR_TYPE_WRBACK &&
1861                      curr_match == MTRR_TYPE_WRTHROUGH) ||
1862                     (prev_match == MTRR_TYPE_WRTHROUGH &&
1863                      curr_match == MTRR_TYPE_WRBACK)) {
1864                         prev_match = MTRR_TYPE_WRTHROUGH;
1865                         curr_match = MTRR_TYPE_WRTHROUGH;
1866                 }
1867
1868                 if (prev_match != curr_match)
1869                         return MTRR_TYPE_UNCACHABLE;
1870         }
1871
1872         if (prev_match != 0xFF)
1873                 return prev_match;
1874
1875         return mtrr_state->def_type;
1876 }
1877
1878 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1879 {
1880         u8 mtrr;
1881
1882         mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1883                              (gfn << PAGE_SHIFT) + PAGE_SIZE);
1884         if (mtrr == 0xfe || mtrr == 0xff)
1885                 mtrr = MTRR_TYPE_WRBACK;
1886         return mtrr;
1887 }
1888 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
1889
1890 static void __kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1891 {
1892         trace_kvm_mmu_unsync_page(sp);
1893         ++vcpu->kvm->stat.mmu_unsync;
1894         sp->unsync = 1;
1895
1896         kvm_mmu_mark_parents_unsync(sp);
1897         mmu_convert_notrap(sp);
1898 }
1899
1900 static void kvm_unsync_pages(struct kvm_vcpu *vcpu,  gfn_t gfn)
1901 {
1902         struct kvm_mmu_page *s;
1903         struct hlist_node *node;
1904
1905         for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1906                 if (s->unsync)
1907                         continue;
1908                 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
1909                 __kvm_unsync_page(vcpu, s);
1910         }
1911 }
1912
1913 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1914                                   bool can_unsync)
1915 {
1916         struct kvm_mmu_page *s;
1917         struct hlist_node *node;
1918         bool need_unsync = false;
1919
1920         for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1921                 if (!can_unsync)
1922                         return 1;
1923
1924                 if (s->role.level != PT_PAGE_TABLE_LEVEL)
1925                         return 1;
1926
1927                 if (!need_unsync && !s->unsync) {
1928                         if (!oos_shadow)
1929                                 return 1;
1930                         need_unsync = true;
1931                 }
1932         }
1933         if (need_unsync)
1934                 kvm_unsync_pages(vcpu, gfn);
1935         return 0;
1936 }
1937
1938 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1939                     unsigned pte_access, int user_fault,
1940                     int write_fault, int dirty, int level,
1941                     gfn_t gfn, pfn_t pfn, bool speculative,
1942                     bool can_unsync, bool reset_host_protection)
1943 {
1944         u64 spte;
1945         int ret = 0;
1946
1947         /*
1948          * We don't set the accessed bit, since we sometimes want to see
1949          * whether the guest actually used the pte (in order to detect
1950          * demand paging).
1951          */
1952         spte = shadow_base_present_pte;
1953         if (!speculative)
1954                 spte |= shadow_accessed_mask;
1955         if (!dirty)
1956                 pte_access &= ~ACC_WRITE_MASK;
1957         if (pte_access & ACC_EXEC_MASK)
1958                 spte |= shadow_x_mask;
1959         else
1960                 spte |= shadow_nx_mask;
1961         if (pte_access & ACC_USER_MASK)
1962                 spte |= shadow_user_mask;
1963         if (level > PT_PAGE_TABLE_LEVEL)
1964                 spte |= PT_PAGE_SIZE_MASK;
1965         if (tdp_enabled)
1966                 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1967                         kvm_is_mmio_pfn(pfn));
1968
1969         if (reset_host_protection)
1970                 spte |= SPTE_HOST_WRITEABLE;
1971
1972         spte |= (u64)pfn << PAGE_SHIFT;
1973
1974         if ((pte_access & ACC_WRITE_MASK)
1975             || (!tdp_enabled && write_fault && !is_write_protection(vcpu)
1976                 && !user_fault)) {
1977
1978                 if (level > PT_PAGE_TABLE_LEVEL &&
1979                     has_wrprotected_page(vcpu->kvm, gfn, level)) {
1980                         ret = 1;
1981                         drop_spte(vcpu->kvm, sptep, shadow_trap_nonpresent_pte);
1982                         goto done;
1983                 }
1984
1985                 spte |= PT_WRITABLE_MASK;
1986
1987                 if (!tdp_enabled && !(pte_access & ACC_WRITE_MASK))
1988                         spte &= ~PT_USER_MASK;
1989
1990                 /*
1991                  * Optimization: for pte sync, if spte was writable the hash
1992                  * lookup is unnecessary (and expensive). Write protection
1993                  * is responsibility of mmu_get_page / kvm_sync_page.
1994                  * Same reasoning can be applied to dirty page accounting.
1995                  */
1996                 if (!can_unsync && is_writable_pte(*sptep))
1997                         goto set_pte;
1998
1999                 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
2000                         pgprintk("%s: found shadow page for %lx, marking ro\n",
2001                                  __func__, gfn);
2002                         ret = 1;
2003                         pte_access &= ~ACC_WRITE_MASK;
2004                         if (is_writable_pte(spte))
2005                                 spte &= ~PT_WRITABLE_MASK;
2006                 }
2007         }
2008
2009         if (pte_access & ACC_WRITE_MASK)
2010                 mark_page_dirty(vcpu->kvm, gfn);
2011
2012 set_pte:
2013         update_spte(sptep, spte);
2014 done:
2015         return ret;
2016 }
2017
2018 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
2019                          unsigned pt_access, unsigned pte_access,
2020                          int user_fault, int write_fault, int dirty,
2021                          int *ptwrite, int level, gfn_t gfn,
2022                          pfn_t pfn, bool speculative,
2023                          bool reset_host_protection)
2024 {
2025         int was_rmapped = 0;
2026         int rmap_count;
2027
2028         pgprintk("%s: spte %llx access %x write_fault %d"
2029                  " user_fault %d gfn %lx\n",
2030                  __func__, *sptep, pt_access,
2031                  write_fault, user_fault, gfn);
2032
2033         if (is_rmap_spte(*sptep)) {
2034                 /*
2035                  * If we overwrite a PTE page pointer with a 2MB PMD, unlink
2036                  * the parent of the now unreachable PTE.
2037                  */
2038                 if (level > PT_PAGE_TABLE_LEVEL &&
2039                     !is_large_pte(*sptep)) {
2040                         struct kvm_mmu_page *child;
2041                         u64 pte = *sptep;
2042
2043                         child = page_header(pte & PT64_BASE_ADDR_MASK);
2044                         mmu_page_remove_parent_pte(child, sptep);
2045                         __set_spte(sptep, shadow_trap_nonpresent_pte);
2046                         kvm_flush_remote_tlbs(vcpu->kvm);
2047                 } else if (pfn != spte_to_pfn(*sptep)) {
2048                         pgprintk("hfn old %lx new %lx\n",
2049                                  spte_to_pfn(*sptep), pfn);
2050                         drop_spte(vcpu->kvm, sptep, shadow_trap_nonpresent_pte);
2051                         kvm_flush_remote_tlbs(vcpu->kvm);
2052                 } else
2053                         was_rmapped = 1;
2054         }
2055
2056         if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
2057                       dirty, level, gfn, pfn, speculative, true,
2058                       reset_host_protection)) {
2059                 if (write_fault)
2060                         *ptwrite = 1;
2061                 kvm_mmu_flush_tlb(vcpu);
2062         }
2063
2064         pgprintk("%s: setting spte %llx\n", __func__, *sptep);
2065         pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
2066                  is_large_pte(*sptep)? "2MB" : "4kB",
2067                  *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
2068                  *sptep, sptep);
2069         if (!was_rmapped && is_large_pte(*sptep))
2070                 ++vcpu->kvm->stat.lpages;
2071
2072         page_header_update_slot(vcpu->kvm, sptep, gfn);
2073         if (!was_rmapped) {
2074                 rmap_count = rmap_add(vcpu, sptep, gfn);
2075                 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
2076                         rmap_recycle(vcpu, sptep, gfn);
2077         }
2078         kvm_release_pfn_clean(pfn);
2079         if (speculative) {
2080                 vcpu->arch.last_pte_updated = sptep;
2081                 vcpu->arch.last_pte_gfn = gfn;
2082         }
2083 }
2084
2085 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
2086 {
2087 }
2088
2089 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
2090                         int level, gfn_t gfn, pfn_t pfn)
2091 {
2092         struct kvm_shadow_walk_iterator iterator;
2093         struct kvm_mmu_page *sp;
2094         int pt_write = 0;
2095         gfn_t pseudo_gfn;
2096
2097         for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
2098                 if (iterator.level == level) {
2099                         mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
2100                                      0, write, 1, &pt_write,
2101                                      level, gfn, pfn, false, true);
2102                         ++vcpu->stat.pf_fixed;
2103                         break;
2104                 }
2105
2106                 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
2107                         u64 base_addr = iterator.addr;
2108
2109                         base_addr &= PT64_LVL_ADDR_MASK(iterator.level);
2110                         pseudo_gfn = base_addr >> PAGE_SHIFT;
2111                         sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
2112                                               iterator.level - 1,
2113                                               1, ACC_ALL, iterator.sptep);
2114                         if (!sp) {
2115                                 pgprintk("nonpaging_map: ENOMEM\n");
2116                                 kvm_release_pfn_clean(pfn);
2117                                 return -ENOMEM;
2118                         }
2119
2120                         __set_spte(iterator.sptep,
2121                                    __pa(sp->spt)
2122                                    | PT_PRESENT_MASK | PT_WRITABLE_MASK
2123                                    | shadow_user_mask | shadow_x_mask);
2124                 }
2125         }
2126         return pt_write;
2127 }
2128
2129 static void kvm_send_hwpoison_signal(struct kvm *kvm, gfn_t gfn)
2130 {
2131         char buf[1];
2132         void __user *hva;
2133         int r;
2134
2135         /* Touch the page, so send SIGBUS */
2136         hva = (void __user *)gfn_to_hva(kvm, gfn);
2137         r = copy_from_user(buf, hva, 1);
2138 }
2139
2140 static int kvm_handle_bad_page(struct kvm *kvm, gfn_t gfn, pfn_t pfn)
2141 {
2142         kvm_release_pfn_clean(pfn);
2143         if (is_hwpoison_pfn(pfn)) {
2144                 kvm_send_hwpoison_signal(kvm, gfn);
2145                 return 0;
2146         } else if (is_fault_pfn(pfn))
2147                 return -EFAULT;
2148
2149         return 1;
2150 }
2151
2152 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
2153 {
2154         int r;
2155         int level;
2156         pfn_t pfn;
2157         unsigned long mmu_seq;
2158
2159         level = mapping_level(vcpu, gfn);
2160
2161         /*
2162          * This path builds a PAE pagetable - so we can map 2mb pages at
2163          * maximum. Therefore check if the level is larger than that.
2164          */
2165         if (level > PT_DIRECTORY_LEVEL)
2166                 level = PT_DIRECTORY_LEVEL;
2167
2168         gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2169
2170         mmu_seq = vcpu->kvm->mmu_notifier_seq;
2171         smp_rmb();
2172         pfn = gfn_to_pfn(vcpu->kvm, gfn);
2173
2174         /* mmio */
2175         if (is_error_pfn(pfn))
2176                 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2177
2178         spin_lock(&vcpu->kvm->mmu_lock);
2179         if (mmu_notifier_retry(vcpu, mmu_seq))
2180                 goto out_unlock;
2181         kvm_mmu_free_some_pages(vcpu);
2182         r = __direct_map(vcpu, v, write, level, gfn, pfn);
2183         spin_unlock(&vcpu->kvm->mmu_lock);
2184
2185
2186         return r;
2187
2188 out_unlock:
2189         spin_unlock(&vcpu->kvm->mmu_lock);
2190         kvm_release_pfn_clean(pfn);
2191         return 0;
2192 }
2193
2194
2195 static void mmu_free_roots(struct kvm_vcpu *vcpu)
2196 {
2197         int i;
2198         struct kvm_mmu_page *sp;
2199         LIST_HEAD(invalid_list);
2200
2201         if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2202                 return;
2203         spin_lock(&vcpu->kvm->mmu_lock);
2204         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2205                 hpa_t root = vcpu->arch.mmu.root_hpa;
2206
2207                 sp = page_header(root);
2208                 --sp->root_count;
2209                 if (!sp->root_count && sp->role.invalid) {
2210                         kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list);
2211                         kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2212                 }
2213                 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2214                 spin_unlock(&vcpu->kvm->mmu_lock);
2215                 return;
2216         }
2217         for (i = 0; i < 4; ++i) {
2218                 hpa_t root = vcpu->arch.mmu.pae_root[i];
2219
2220                 if (root) {
2221                         root &= PT64_BASE_ADDR_MASK;
2222                         sp = page_header(root);
2223                         --sp->root_count;
2224                         if (!sp->root_count && sp->role.invalid)
2225                                 kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
2226                                                          &invalid_list);
2227                 }
2228                 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2229         }
2230         kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2231         spin_unlock(&vcpu->kvm->mmu_lock);
2232         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2233 }
2234
2235 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
2236 {
2237         int ret = 0;
2238
2239         if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
2240                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2241                 ret = 1;
2242         }
2243
2244         return ret;
2245 }
2246
2247 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
2248 {
2249         int i;
2250         gfn_t root_gfn;
2251         struct kvm_mmu_page *sp;
2252         int direct = 0;
2253         u64 pdptr;
2254
2255         root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
2256
2257         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2258                 hpa_t root = vcpu->arch.mmu.root_hpa;
2259
2260                 ASSERT(!VALID_PAGE(root));
2261                 if (mmu_check_root(vcpu, root_gfn))
2262                         return 1;
2263                 if (tdp_enabled) {
2264                         direct = 1;
2265                         root_gfn = 0;
2266                 }
2267                 spin_lock(&vcpu->kvm->mmu_lock);
2268                 kvm_mmu_free_some_pages(vcpu);
2269                 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
2270                                       PT64_ROOT_LEVEL, direct,
2271                                       ACC_ALL, NULL);
2272                 root = __pa(sp->spt);
2273                 ++sp->root_count;
2274                 spin_unlock(&vcpu->kvm->mmu_lock);
2275                 vcpu->arch.mmu.root_hpa = root;
2276                 return 0;
2277         }
2278         direct = !is_paging(vcpu);
2279         for (i = 0; i < 4; ++i) {
2280                 hpa_t root = vcpu->arch.mmu.pae_root[i];
2281
2282                 ASSERT(!VALID_PAGE(root));
2283                 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
2284                         pdptr = kvm_pdptr_read(vcpu, i);
2285                         if (!is_present_gpte(pdptr)) {
2286                                 vcpu->arch.mmu.pae_root[i] = 0;
2287                                 continue;
2288                         }
2289                         root_gfn = pdptr >> PAGE_SHIFT;
2290                 } else if (vcpu->arch.mmu.root_level == 0)
2291                         root_gfn = 0;
2292                 if (mmu_check_root(vcpu, root_gfn))
2293                         return 1;
2294                 if (tdp_enabled) {
2295                         direct = 1;
2296                         root_gfn = i << 30;
2297                 }
2298                 spin_lock(&vcpu->kvm->mmu_lock);
2299                 kvm_mmu_free_some_pages(vcpu);
2300                 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
2301                                       PT32_ROOT_LEVEL, direct,
2302                                       ACC_ALL, NULL);
2303                 root = __pa(sp->spt);
2304                 ++sp->root_count;
2305                 spin_unlock(&vcpu->kvm->mmu_lock);
2306
2307                 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
2308         }
2309         vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2310         return 0;
2311 }
2312
2313 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2314 {
2315         int i;
2316         struct kvm_mmu_page *sp;
2317
2318         if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2319                 return;
2320         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2321                 hpa_t root = vcpu->arch.mmu.root_hpa;
2322                 sp = page_header(root);
2323                 mmu_sync_children(vcpu, sp);
2324                 return;
2325         }
2326         for (i = 0; i < 4; ++i) {
2327                 hpa_t root = vcpu->arch.mmu.pae_root[i];
2328
2329                 if (root && VALID_PAGE(root)) {
2330                         root &= PT64_BASE_ADDR_MASK;
2331                         sp = page_header(root);
2332                         mmu_sync_children(vcpu, sp);
2333                 }
2334         }
2335 }
2336
2337 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2338 {
2339         spin_lock(&vcpu->kvm->mmu_lock);
2340         mmu_sync_roots(vcpu);
2341         spin_unlock(&vcpu->kvm->mmu_lock);
2342 }
2343
2344 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr,
2345                                   u32 access, u32 *error)
2346 {
2347         if (error)
2348                 *error = 0;
2349         return vaddr;
2350 }
2351
2352 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2353                                 u32 error_code)
2354 {
2355         gfn_t gfn;
2356         int r;
2357
2358         pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2359         r = mmu_topup_memory_caches(vcpu);
2360         if (r)
2361                 return r;
2362
2363         ASSERT(vcpu);
2364         ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2365
2366         gfn = gva >> PAGE_SHIFT;
2367
2368         return nonpaging_map(vcpu, gva & PAGE_MASK,
2369                              error_code & PFERR_WRITE_MASK, gfn);
2370 }
2371
2372 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2373                                 u32 error_code)
2374 {
2375         pfn_t pfn;
2376         int r;
2377         int level;
2378         gfn_t gfn = gpa >> PAGE_SHIFT;
2379         unsigned long mmu_seq;
2380
2381         ASSERT(vcpu);
2382         ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2383
2384         r = mmu_topup_memory_caches(vcpu);
2385         if (r)
2386                 return r;
2387
2388         level = mapping_level(vcpu, gfn);
2389
2390         gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2391
2392         mmu_seq = vcpu->kvm->mmu_notifier_seq;
2393         smp_rmb();
2394         pfn = gfn_to_pfn(vcpu->kvm, gfn);
2395         if (is_error_pfn(pfn))
2396                 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2397         spin_lock(&vcpu->kvm->mmu_lock);
2398         if (mmu_notifier_retry(vcpu, mmu_seq))
2399                 goto out_unlock;
2400         kvm_mmu_free_some_pages(vcpu);
2401         r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
2402                          level, gfn, pfn);
2403         spin_unlock(&vcpu->kvm->mmu_lock);
2404
2405         return r;
2406
2407 out_unlock:
2408         spin_unlock(&vcpu->kvm->mmu_lock);
2409         kvm_release_pfn_clean(pfn);
2410         return 0;
2411 }
2412
2413 static void nonpaging_free(struct kvm_vcpu *vcpu)
2414 {
2415         mmu_free_roots(vcpu);
2416 }
2417
2418 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2419 {
2420         struct kvm_mmu *context = &vcpu->arch.mmu;
2421
2422         context->new_cr3 = nonpaging_new_cr3;
2423         context->page_fault = nonpaging_page_fault;
2424         context->gva_to_gpa = nonpaging_gva_to_gpa;
2425         context->free = nonpaging_free;
2426         context->prefetch_page = nonpaging_prefetch_page;
2427         context->sync_page = nonpaging_sync_page;
2428         context->invlpg = nonpaging_invlpg;
2429         context->root_level = 0;
2430         context->shadow_root_level = PT32E_ROOT_LEVEL;
2431         context->root_hpa = INVALID_PAGE;
2432         return 0;
2433 }
2434
2435 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2436 {
2437         ++vcpu->stat.tlb_flush;
2438         kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
2439 }
2440
2441 static void paging_new_cr3(struct kvm_vcpu *vcpu)
2442 {
2443         pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
2444         mmu_free_roots(vcpu);
2445 }
2446
2447 static void inject_page_fault(struct kvm_vcpu *vcpu,
2448                               u64 addr,
2449                               u32 err_code)
2450 {
2451         kvm_inject_page_fault(vcpu, addr, err_code);
2452 }
2453
2454 static void paging_free(struct kvm_vcpu *vcpu)
2455 {
2456         nonpaging_free(vcpu);
2457 }
2458
2459 static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
2460 {
2461         int bit7;
2462
2463         bit7 = (gpte >> 7) & 1;
2464         return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
2465 }
2466
2467 #define PTTYPE 64
2468 #include "paging_tmpl.h"
2469 #undef PTTYPE
2470
2471 #define PTTYPE 32
2472 #include "paging_tmpl.h"
2473 #undef PTTYPE
2474
2475 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
2476 {
2477         struct kvm_mmu *context = &vcpu->arch.mmu;
2478         int maxphyaddr = cpuid_maxphyaddr(vcpu);
2479         u64 exb_bit_rsvd = 0;
2480
2481         if (!is_nx(vcpu))
2482                 exb_bit_rsvd = rsvd_bits(63, 63);
2483         switch (level) {
2484         case PT32_ROOT_LEVEL:
2485                 /* no rsvd bits for 2 level 4K page table entries */
2486                 context->rsvd_bits_mask[0][1] = 0;
2487                 context->rsvd_bits_mask[0][0] = 0;
2488                 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2489
2490                 if (!is_pse(vcpu)) {
2491                         context->rsvd_bits_mask[1][1] = 0;
2492                         break;
2493                 }
2494
2495                 if (is_cpuid_PSE36())
2496                         /* 36bits PSE 4MB page */
2497                         context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2498                 else
2499                         /* 32 bits PSE 4MB page */
2500                         context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
2501                 break;
2502         case PT32E_ROOT_LEVEL:
2503                 context->rsvd_bits_mask[0][2] =
2504                         rsvd_bits(maxphyaddr, 63) |
2505                         rsvd_bits(7, 8) | rsvd_bits(1, 2);      /* PDPTE */
2506                 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2507                         rsvd_bits(maxphyaddr, 62);      /* PDE */
2508                 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2509                         rsvd_bits(maxphyaddr, 62);      /* PTE */
2510                 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2511                         rsvd_bits(maxphyaddr, 62) |
2512                         rsvd_bits(13, 20);              /* large page */
2513                 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2514                 break;
2515         case PT64_ROOT_LEVEL:
2516                 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2517                         rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2518                 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2519                         rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2520                 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2521                         rsvd_bits(maxphyaddr, 51);
2522                 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2523                         rsvd_bits(maxphyaddr, 51);
2524                 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2525                 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
2526                         rsvd_bits(maxphyaddr, 51) |
2527                         rsvd_bits(13, 29);
2528                 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2529                         rsvd_bits(maxphyaddr, 51) |
2530                         rsvd_bits(13, 20);              /* large page */
2531                 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2532                 break;
2533         }
2534 }
2535
2536 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
2537 {
2538         struct kvm_mmu *context = &vcpu->arch.mmu;
2539
2540         ASSERT(is_pae(vcpu));
2541         context->new_cr3 = paging_new_cr3;
2542         context->page_fault = paging64_page_fault;
2543         context->gva_to_gpa = paging64_gva_to_gpa;
2544         context->prefetch_page = paging64_prefetch_page;
2545         context->sync_page = paging64_sync_page;
2546         context->invlpg = paging64_invlpg;
2547         context->free = paging_free;
2548         context->root_level = level;
2549         context->shadow_root_level = level;
2550         context->root_hpa = INVALID_PAGE;
2551         return 0;
2552 }
2553
2554 static int paging64_init_context(struct kvm_vcpu *vcpu)
2555 {
2556         reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2557         return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2558 }
2559
2560 static int paging32_init_context(struct kvm_vcpu *vcpu)
2561 {
2562         struct kvm_mmu *context = &vcpu->arch.mmu;
2563
2564         reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2565         context->new_cr3 = paging_new_cr3;
2566         context->page_fault = paging32_page_fault;
2567         context->gva_to_gpa = paging32_gva_to_gpa;
2568         context->free = paging_free;
2569         context->prefetch_page = paging32_prefetch_page;
2570         context->sync_page = paging32_sync_page;
2571         context->invlpg = paging32_invlpg;
2572         context->root_level = PT32_ROOT_LEVEL;
2573         context->shadow_root_level = PT32E_ROOT_LEVEL;
2574         context->root_hpa = INVALID_PAGE;
2575         return 0;
2576 }
2577
2578 static int paging32E_init_context(struct kvm_vcpu *vcpu)
2579 {
2580         reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2581         return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
2582 }
2583
2584 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2585 {
2586         struct kvm_mmu *context = &vcpu->arch.mmu;
2587
2588         context->new_cr3 = nonpaging_new_cr3;
2589         context->page_fault = tdp_page_fault;
2590         context->free = nonpaging_free;
2591         context->prefetch_page = nonpaging_prefetch_page;
2592         context->sync_page = nonpaging_sync_page;
2593         context->invlpg = nonpaging_invlpg;
2594         context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2595         context->root_hpa = INVALID_PAGE;
2596
2597         if (!is_paging(vcpu)) {
2598                 context->gva_to_gpa = nonpaging_gva_to_gpa;
2599                 context->root_level = 0;
2600         } else if (is_long_mode(vcpu)) {
2601                 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2602                 context->gva_to_gpa = paging64_gva_to_gpa;
2603                 context->root_level = PT64_ROOT_LEVEL;
2604         } else if (is_pae(vcpu)) {
2605                 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2606                 context->gva_to_gpa = paging64_gva_to_gpa;
2607                 context->root_level = PT32E_ROOT_LEVEL;
2608         } else {
2609                 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2610                 context->gva_to_gpa = paging32_gva_to_gpa;
2611                 context->root_level = PT32_ROOT_LEVEL;
2612         }
2613
2614         return 0;
2615 }
2616
2617 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2618 {
2619         int r;
2620
2621         ASSERT(vcpu);
2622         ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2623
2624         if (!is_paging(vcpu))
2625                 r = nonpaging_init_context(vcpu);
2626         else if (is_long_mode(vcpu))
2627                 r = paging64_init_context(vcpu);
2628         else if (is_pae(vcpu))
2629                 r = paging32E_init_context(vcpu);
2630         else
2631                 r = paging32_init_context(vcpu);
2632
2633         vcpu->arch.mmu.base_role.cr4_pae = !!is_pae(vcpu);
2634         vcpu->arch.mmu.base_role.cr0_wp = is_write_protection(vcpu);
2635
2636         return r;
2637 }
2638
2639 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2640 {
2641         vcpu->arch.update_pte.pfn = bad_pfn;
2642
2643         if (tdp_enabled)
2644                 return init_kvm_tdp_mmu(vcpu);
2645         else
2646                 return init_kvm_softmmu(vcpu);
2647 }
2648
2649 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2650 {
2651         ASSERT(vcpu);
2652         if (VALID_PAGE(vcpu->arch.mmu.root_hpa))
2653                 /* mmu.free() should set root_hpa = INVALID_PAGE */
2654                 vcpu->arch.mmu.free(vcpu);
2655 }
2656
2657 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
2658 {
2659         destroy_kvm_mmu(vcpu);
2660         return init_kvm_mmu(vcpu);
2661 }
2662 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
2663
2664 int kvm_mmu_load(struct kvm_vcpu *vcpu)
2665 {
2666         int r;
2667
2668         r = mmu_topup_memory_caches(vcpu);
2669         if (r)
2670                 goto out;
2671         r = mmu_alloc_roots(vcpu);
2672         spin_lock(&vcpu->kvm->mmu_lock);
2673         mmu_sync_roots(vcpu);
2674         spin_unlock(&vcpu->kvm->mmu_lock);
2675         if (r)
2676                 goto out;
2677         /* set_cr3() should ensure TLB has been flushed */
2678         kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
2679 out:
2680         return r;
2681 }
2682 EXPORT_SYMBOL_GPL(kvm_mmu_load);
2683
2684 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2685 {
2686         mmu_free_roots(vcpu);
2687 }
2688
2689 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
2690                                   struct kvm_mmu_page *sp,
2691                                   u64 *spte)
2692 {
2693         u64 pte;
2694         struct kvm_mmu_page *child;
2695
2696         pte = *spte;
2697         if (is_shadow_present_pte(pte)) {
2698                 if (is_last_spte(pte, sp->role.level))
2699                         drop_spte(vcpu->kvm, spte, shadow_trap_nonpresent_pte);
2700                 else {
2701                         child = page_header(pte & PT64_BASE_ADDR_MASK);
2702                         mmu_page_remove_parent_pte(child, spte);
2703                 }
2704         }
2705         __set_spte(spte, shadow_trap_nonpresent_pte);
2706         if (is_large_pte(pte))
2707                 --vcpu->kvm->stat.lpages;
2708 }
2709
2710 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
2711                                   struct kvm_mmu_page *sp,
2712                                   u64 *spte,
2713                                   const void *new)
2714 {
2715         if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2716                 ++vcpu->kvm->stat.mmu_pde_zapped;
2717                 return;
2718         }
2719
2720         if (is_rsvd_bits_set(vcpu, *(u64 *)new, PT_PAGE_TABLE_LEVEL))
2721                 return;
2722
2723         ++vcpu->kvm->stat.mmu_pte_updated;
2724         if (!sp->role.cr4_pae)
2725                 paging32_update_pte(vcpu, sp, spte, new);
2726         else
2727                 paging64_update_pte(vcpu, sp, spte, new);
2728 }
2729
2730 static bool need_remote_flush(u64 old, u64 new)
2731 {
2732         if (!is_shadow_present_pte(old))
2733                 return false;
2734         if (!is_shadow_present_pte(new))
2735                 return true;
2736         if ((old ^ new) & PT64_BASE_ADDR_MASK)
2737                 return true;
2738         old ^= PT64_NX_MASK;
2739         new ^= PT64_NX_MASK;
2740         return (old & ~new & PT64_PERM_MASK) != 0;
2741 }
2742
2743 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, bool zap_page,
2744                                     bool remote_flush, bool local_flush)
2745 {
2746         if (zap_page)
2747                 return;
2748
2749         if (remote_flush)
2750                 kvm_flush_remote_tlbs(vcpu->kvm);
2751         else if (local_flush)
2752                 kvm_mmu_flush_tlb(vcpu);
2753 }
2754
2755 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2756 {
2757         u64 *spte = vcpu->arch.last_pte_updated;
2758
2759         return !!(spte && (*spte & shadow_accessed_mask));
2760 }
2761
2762 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2763                                           u64 gpte)
2764 {
2765         gfn_t gfn;
2766         pfn_t pfn;
2767
2768         if (!is_present_gpte(gpte))
2769                 return;
2770         gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
2771
2772         vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
2773         smp_rmb();
2774         pfn = gfn_to_pfn(vcpu->kvm, gfn);
2775
2776         if (is_error_pfn(pfn)) {
2777                 kvm_release_pfn_clean(pfn);
2778                 return;
2779         }
2780         vcpu->arch.update_pte.gfn = gfn;
2781         vcpu->arch.update_pte.pfn = pfn;
2782 }
2783
2784 static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2785 {
2786         u64 *spte = vcpu->arch.last_pte_updated;
2787
2788         if (spte
2789             && vcpu->arch.last_pte_gfn == gfn
2790             && shadow_accessed_mask
2791             && !(*spte & shadow_accessed_mask)
2792             && is_shadow_present_pte(*spte))
2793                 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2794 }
2795
2796 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2797                        const u8 *new, int bytes,
2798                        bool guest_initiated)
2799 {
2800         gfn_t gfn = gpa >> PAGE_SHIFT;
2801         union kvm_mmu_page_role mask = { .word = 0 };
2802         struct kvm_mmu_page *sp;
2803         struct hlist_node *node;
2804         LIST_HEAD(invalid_list);
2805         u64 entry, gentry;
2806         u64 *spte;
2807         unsigned offset = offset_in_page(gpa);
2808         unsigned pte_size;
2809         unsigned page_offset;
2810         unsigned misaligned;
2811         unsigned quadrant;
2812         int level;
2813         int flooded = 0;
2814         int npte;
2815         int r;
2816         int invlpg_counter;
2817         bool remote_flush, local_flush, zap_page;
2818
2819         zap_page = remote_flush = local_flush = false;
2820
2821         pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
2822
2823         invlpg_counter = atomic_read(&vcpu->kvm->arch.invlpg_counter);
2824
2825         /*
2826          * Assume that the pte write on a page table of the same type
2827          * as the current vcpu paging mode.  This is nearly always true
2828          * (might be false while changing modes).  Note it is verified later
2829          * by update_pte().
2830          */
2831         if ((is_pae(vcpu) && bytes == 4) || !new) {
2832                 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2833                 if (is_pae(vcpu)) {
2834                         gpa &= ~(gpa_t)7;
2835                         bytes = 8;
2836                 }
2837                 r = kvm_read_guest(vcpu->kvm, gpa, &gentry, min(bytes, 8));
2838                 if (r)
2839                         gentry = 0;
2840                 new = (const u8 *)&gentry;
2841         }
2842
2843         switch (bytes) {
2844         case 4:
2845                 gentry = *(const u32 *)new;
2846                 break;
2847         case 8:
2848                 gentry = *(const u64 *)new;
2849                 break;
2850         default:
2851                 gentry = 0;
2852                 break;
2853         }
2854
2855         mmu_guess_page_from_pte_write(vcpu, gpa, gentry);
2856         spin_lock(&vcpu->kvm->mmu_lock);
2857         if (atomic_read(&vcpu->kvm->arch.invlpg_counter) != invlpg_counter)
2858                 gentry = 0;
2859         kvm_mmu_access_page(vcpu, gfn);
2860         kvm_mmu_free_some_pages(vcpu);
2861         ++vcpu->kvm->stat.mmu_pte_write;
2862         kvm_mmu_audit(vcpu, "pre pte write");
2863         if (guest_initiated) {
2864                 if (gfn == vcpu->arch.last_pt_write_gfn
2865                     && !last_updated_pte_accessed(vcpu)) {
2866                         ++vcpu->arch.last_pt_write_count;
2867                         if (vcpu->arch.last_pt_write_count >= 3)
2868                                 flooded = 1;
2869                 } else {
2870                         vcpu->arch.last_pt_write_gfn = gfn;
2871                         vcpu->arch.last_pt_write_count = 1;
2872                         vcpu->arch.last_pte_updated = NULL;
2873                 }
2874         }
2875
2876         mask.cr0_wp = mask.cr4_pae = mask.nxe = 1;
2877         for_each_gfn_indirect_valid_sp(vcpu->kvm, sp, gfn, node) {
2878                 pte_size = sp->role.cr4_pae ? 8 : 4;
2879                 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
2880                 misaligned |= bytes < 4;
2881                 if (misaligned || flooded) {
2882                         /*
2883                          * Misaligned accesses are too much trouble to fix
2884                          * up; also, they usually indicate a page is not used
2885                          * as a page table.
2886                          *
2887                          * If we're seeing too many writes to a page,
2888                          * it may no longer be a page table, or we may be
2889                          * forking, in which case it is better to unmap the
2890                          * page.
2891                          */
2892                         pgprintk("misaligned: gpa %llx bytes %d role %x\n",
2893                                  gpa, bytes, sp->role.word);
2894                         zap_page |= !!kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
2895                                                      &invalid_list);
2896                         ++vcpu->kvm->stat.mmu_flooded;
2897                         continue;
2898                 }
2899                 page_offset = offset;
2900                 level = sp->role.level;
2901                 npte = 1;
2902                 if (!sp->role.cr4_pae) {
2903                         page_offset <<= 1;      /* 32->64 */
2904                         /*
2905                          * A 32-bit pde maps 4MB while the shadow pdes map
2906                          * only 2MB.  So we need to double the offset again
2907                          * and zap two pdes instead of one.
2908                          */
2909                         if (level == PT32_ROOT_LEVEL) {
2910                                 page_offset &= ~7; /* kill rounding error */
2911                                 page_offset <<= 1;
2912                                 npte = 2;
2913                         }
2914                         quadrant = page_offset >> PAGE_SHIFT;
2915                         page_offset &= ~PAGE_MASK;
2916                         if (quadrant != sp->role.quadrant)
2917                                 continue;
2918                 }
2919                 local_flush = true;
2920                 spte = &sp->spt[page_offset / sizeof(*spte)];
2921                 while (npte--) {
2922                         entry = *spte;
2923                         mmu_pte_write_zap_pte(vcpu, sp, spte);
2924                         if (gentry &&
2925                               !((sp->role.word ^ vcpu->arch.mmu.base_role.word)
2926                               & mask.word))
2927                                 mmu_pte_write_new_pte(vcpu, sp, spte, &gentry);
2928                         if (!remote_flush && need_remote_flush(entry, *spte))
2929                                 remote_flush = true;
2930                         ++spte;
2931                 }
2932         }
2933         mmu_pte_write_flush_tlb(vcpu, zap_page, remote_flush, local_flush);
2934         kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2935         kvm_mmu_audit(vcpu, "post pte write");
2936         spin_unlock(&vcpu->kvm->mmu_lock);
2937         if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2938                 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2939                 vcpu->arch.update_pte.pfn = bad_pfn;
2940         }
2941 }
2942
2943 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2944 {
2945         gpa_t gpa;
2946         int r;
2947
2948         if (tdp_enabled)
2949                 return 0;
2950
2951         gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
2952
2953         spin_lock(&vcpu->kvm->mmu_lock);
2954         r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2955         spin_unlock(&vcpu->kvm->mmu_lock);
2956         return r;
2957 }
2958 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
2959
2960 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
2961 {
2962         LIST_HEAD(invalid_list);
2963
2964         while (kvm_mmu_available_pages(vcpu->kvm) < KVM_REFILL_PAGES &&
2965                !list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2966                 struct kvm_mmu_page *sp;
2967
2968                 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
2969                                   struct kvm_mmu_page, link);
2970                 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list);
2971                 ++vcpu->kvm->stat.mmu_recycled;
2972         }
2973         kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2974 }
2975
2976 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2977 {
2978         int r;
2979         enum emulation_result er;
2980
2981         r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
2982         if (r < 0)
2983                 goto out;
2984
2985         if (!r) {
2986                 r = 1;
2987                 goto out;
2988         }
2989
2990         r = mmu_topup_memory_caches(vcpu);
2991         if (r)
2992                 goto out;
2993
2994         er = emulate_instruction(vcpu, cr2, error_code, 0);
2995
2996         switch (er) {
2997         case EMULATE_DONE:
2998                 return 1;
2999         case EMULATE_DO_MMIO:
3000                 ++vcpu->stat.mmio_exits;
3001                 /* fall through */
3002         case EMULATE_FAIL:
3003                 return 0;
3004         default:
3005                 BUG();
3006         }
3007 out:
3008         return r;
3009 }
3010 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
3011
3012 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
3013 {
3014         vcpu->arch.mmu.invlpg(vcpu, gva);
3015         kvm_mmu_flush_tlb(vcpu);
3016         ++vcpu->stat.invlpg;
3017 }
3018 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
3019
3020 void kvm_enable_tdp(void)
3021 {
3022         tdp_enabled = true;
3023 }
3024 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
3025
3026 void kvm_disable_tdp(void)
3027 {
3028         tdp_enabled = false;
3029 }
3030 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
3031
3032 static void free_mmu_pages(struct kvm_vcpu *vcpu)
3033 {
3034         free_page((unsigned long)vcpu->arch.mmu.pae_root);
3035 }
3036
3037 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
3038 {
3039         struct page *page;
3040         int i;
3041
3042         ASSERT(vcpu);
3043
3044         /*
3045          * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
3046          * Therefore we need to allocate shadow page tables in the first
3047          * 4GB of memory, which happens to fit the DMA32 zone.
3048          */
3049         page = alloc_page(GFP_KERNEL | __GFP_DMA32);
3050         if (!page)
3051                 return -ENOMEM;
3052
3053         vcpu->arch.mmu.pae_root = page_address(page);
3054         for (i = 0; i < 4; ++i)
3055                 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
3056
3057         return 0;
3058 }
3059
3060 int kvm_mmu_create(struct kvm_vcpu *vcpu)
3061 {
3062         ASSERT(vcpu);
3063         ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
3064
3065         return alloc_mmu_pages(vcpu);
3066 }
3067
3068 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
3069 {
3070         ASSERT(vcpu);
3071         ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
3072
3073         return init_kvm_mmu(vcpu);
3074 }
3075
3076 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
3077 {
3078         ASSERT(vcpu);
3079
3080         destroy_kvm_mmu(vcpu);
3081         free_mmu_pages(vcpu);
3082         mmu_free_memory_caches(vcpu);
3083 }
3084
3085 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
3086 {
3087         struct kvm_mmu_page *sp;
3088
3089         list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
3090                 int i;
3091                 u64 *pt;
3092
3093                 if (!test_bit(slot, sp->slot_bitmap))
3094                         continue;
3095
3096                 pt = sp->spt;
3097                 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
3098                         /* avoid RMW */
3099                         if (is_writable_pte(pt[i]))
3100                                 pt[i] &= ~PT_WRITABLE_MASK;
3101         }
3102         kvm_flush_remote_tlbs(kvm);
3103 }
3104
3105 void kvm_mmu_zap_all(struct kvm *kvm)
3106 {
3107         struct kvm_mmu_page *sp, *node;
3108         LIST_HEAD(invalid_list);
3109
3110         spin_lock(&kvm->mmu_lock);
3111 restart:
3112         list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
3113                 if (kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list))
3114                         goto restart;
3115
3116         kvm_mmu_commit_zap_page(kvm, &invalid_list);
3117         spin_unlock(&kvm->mmu_lock);
3118 }
3119
3120 static int kvm_mmu_remove_some_alloc_mmu_pages(struct kvm *kvm,
3121                                                struct list_head *invalid_list)
3122 {
3123         struct kvm_mmu_page *page;
3124
3125         page = container_of(kvm->arch.active_mmu_pages.prev,
3126                             struct kvm_mmu_page, link);
3127         return kvm_mmu_prepare_zap_page(kvm, page, invalid_list);
3128 }
3129
3130 static int mmu_shrink(struct shrinker *shrink, int nr_to_scan, gfp_t gfp_mask)
3131 {
3132         struct kvm *kvm;
3133         struct kvm *kvm_freed = NULL;
3134         int cache_count = 0;
3135
3136         spin_lock(&kvm_lock);
3137
3138         list_for_each_entry(kvm, &vm_list, vm_list) {
3139                 int npages, idx, freed_pages;
3140                 LIST_HEAD(invalid_list);
3141
3142                 idx = srcu_read_lock(&kvm->srcu);
3143                 spin_lock(&kvm->mmu_lock);
3144                 npages = kvm->arch.n_alloc_mmu_pages -
3145                          kvm_mmu_available_pages(kvm);
3146                 cache_count += npages;
3147                 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
3148                         freed_pages = kvm_mmu_remove_some_alloc_mmu_pages(kvm,
3149                                                           &invalid_list);
3150                         cache_count -= freed_pages;
3151                         kvm_freed = kvm;
3152                 }
3153                 nr_to_scan--;
3154
3155                 kvm_mmu_commit_zap_page(kvm, &invalid_list);
3156                 spin_unlock(&kvm->mmu_lock);
3157                 srcu_read_unlock(&kvm->srcu, idx);
3158         }
3159         if (kvm_freed)
3160                 list_move_tail(&kvm_freed->vm_list, &vm_list);
3161
3162         spin_unlock(&kvm_lock);
3163
3164         return cache_count;
3165 }
3166
3167 static struct shrinker mmu_shrinker = {
3168         .shrink = mmu_shrink,
3169         .seeks = DEFAULT_SEEKS * 10,
3170 };
3171
3172 static void mmu_destroy_caches(void)
3173 {
3174         if (pte_chain_cache)
3175                 kmem_cache_destroy(pte_chain_cache);
3176         if (rmap_desc_cache)
3177                 kmem_cache_destroy(rmap_desc_cache);
3178         if (mmu_page_header_cache)
3179                 kmem_cache_destroy(mmu_page_header_cache);
3180 }
3181
3182 void kvm_mmu_module_exit(void)
3183 {
3184         mmu_destroy_caches();
3185         unregister_shrinker(&mmu_shrinker);
3186 }
3187
3188 int kvm_mmu_module_init(void)
3189 {
3190         pte_chain_cache = kmem_cache_create("kvm_pte_chain",
3191                                             sizeof(struct kvm_pte_chain),
3192                                             0, 0, NULL);
3193         if (!pte_chain_cache)
3194                 goto nomem;
3195         rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
3196                                             sizeof(struct kvm_rmap_desc),
3197                                             0, 0, NULL);
3198         if (!rmap_desc_cache)
3199                 goto nomem;
3200
3201         mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
3202                                                   sizeof(struct kvm_mmu_page),
3203                                                   0, 0, NULL);
3204         if (!mmu_page_header_cache)
3205                 goto nomem;
3206
3207         register_shrinker(&mmu_shrinker);
3208
3209         return 0;
3210
3211 nomem:
3212         mmu_destroy_caches();
3213         return -ENOMEM;
3214 }
3215
3216 /*
3217  * Caculate mmu pages needed for kvm.
3218  */
3219 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
3220 {
3221         int i;
3222         unsigned int nr_mmu_pages;
3223         unsigned int  nr_pages = 0;
3224         struct kvm_memslots *slots;
3225
3226         slots = kvm_memslots(kvm);
3227
3228         for (i = 0; i < slots->nmemslots; i++)
3229                 nr_pages += slots->memslots[i].npages;
3230
3231         nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
3232         nr_mmu_pages = max(nr_mmu_pages,
3233                         (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
3234
3235         return nr_mmu_pages;
3236 }
3237
3238 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3239                                 unsigned len)
3240 {
3241         if (len > buffer->len)
3242                 return NULL;
3243         return buffer->ptr;
3244 }
3245
3246 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3247                                 unsigned len)
3248 {
3249         void *ret;
3250
3251         ret = pv_mmu_peek_buffer(buffer, len);
3252         if (!ret)
3253                 return ret;
3254         buffer->ptr += len;
3255         buffer->len -= len;
3256         buffer->processed += len;
3257         return ret;
3258 }
3259
3260 static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
3261                              gpa_t addr, gpa_t value)
3262 {
3263         int bytes = 8;
3264         int r;
3265
3266         if (!is_long_mode(vcpu) && !is_pae(vcpu))
3267                 bytes = 4;
3268
3269         r = mmu_topup_memory_caches(vcpu);
3270         if (r)
3271                 return r;
3272
3273         if (!emulator_write_phys(vcpu, addr, &value, bytes))
3274                 return -EFAULT;
3275
3276         return 1;
3277 }
3278
3279 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3280 {
3281         (void)kvm_set_cr3(vcpu, vcpu->arch.cr3);
3282         return 1;
3283 }
3284
3285 static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
3286 {
3287         spin_lock(&vcpu->kvm->mmu_lock);
3288         mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
3289         spin_unlock(&vcpu->kvm->mmu_lock);
3290         return 1;
3291 }
3292
3293 static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
3294                              struct kvm_pv_mmu_op_buffer *buffer)
3295 {
3296         struct kvm_mmu_op_header *header;
3297
3298         header = pv_mmu_peek_buffer(buffer, sizeof *header);
3299         if (!header)
3300                 return 0;
3301         switch (header->op) {
3302         case KVM_MMU_OP_WRITE_PTE: {
3303                 struct kvm_mmu_op_write_pte *wpte;
3304
3305                 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
3306                 if (!wpte)
3307                         return 0;
3308                 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
3309                                         wpte->pte_val);
3310         }
3311         case KVM_MMU_OP_FLUSH_TLB: {
3312                 struct kvm_mmu_op_flush_tlb *ftlb;
3313
3314                 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3315                 if (!ftlb)
3316                         return 0;
3317                 return kvm_pv_mmu_flush_tlb(vcpu);
3318         }
3319         case KVM_MMU_OP_RELEASE_PT: {
3320                 struct kvm_mmu_op_release_pt *rpt;
3321
3322                 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3323                 if (!rpt)
3324                         return 0;
3325                 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3326         }
3327         default: return 0;
3328         }
3329 }
3330
3331 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3332                   gpa_t addr, unsigned long *ret)
3333 {
3334         int r;
3335         struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
3336
3337         buffer->ptr = buffer->buf;
3338         buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3339         buffer->processed = 0;
3340
3341         r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
3342         if (r)
3343                 goto out;
3344
3345         while (buffer->len) {
3346                 r = kvm_pv_mmu_op_one(vcpu, buffer);
3347                 if (r < 0)
3348                         goto out;
3349                 if (r == 0)
3350                         break;
3351         }
3352
3353         r = 1;
3354 out:
3355         *ret = buffer->processed;
3356         return r;
3357 }
3358
3359 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3360 {
3361         struct kvm_shadow_walk_iterator iterator;
3362         int nr_sptes = 0;
3363
3364         spin_lock(&vcpu->kvm->mmu_lock);
3365         for_each_shadow_entry(vcpu, addr, iterator) {
3366                 sptes[iterator.level-1] = *iterator.sptep;
3367                 nr_sptes++;
3368                 if (!is_shadow_present_pte(*iterator.sptep))
3369                         break;
3370         }
3371         spin_unlock(&vcpu->kvm->mmu_lock);
3372
3373         return nr_sptes;
3374 }
3375 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3376
3377 #ifdef AUDIT
3378
3379 static const char *audit_msg;
3380
3381 static gva_t canonicalize(gva_t gva)
3382 {
3383 #ifdef CONFIG_X86_64
3384         gva = (long long)(gva << 16) >> 16;
3385 #endif
3386         return gva;
3387 }
3388
3389
3390 typedef void (*inspect_spte_fn) (struct kvm *kvm, u64 *sptep);
3391
3392 static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp,
3393                             inspect_spte_fn fn)
3394 {
3395         int i;
3396
3397         for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3398                 u64 ent = sp->spt[i];
3399
3400                 if (is_shadow_present_pte(ent)) {
3401                         if (!is_last_spte(ent, sp->role.level)) {
3402                                 struct kvm_mmu_page *child;
3403                                 child = page_header(ent & PT64_BASE_ADDR_MASK);
3404                                 __mmu_spte_walk(kvm, child, fn);
3405                         } else
3406                                 fn(kvm, &sp->spt[i]);
3407                 }
3408         }
3409 }
3410
3411 static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn)
3412 {
3413         int i;
3414         struct kvm_mmu_page *sp;
3415
3416         if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3417                 return;
3418         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3419                 hpa_t root = vcpu->arch.mmu.root_hpa;
3420                 sp = page_header(root);
3421                 __mmu_spte_walk(vcpu->kvm, sp, fn);
3422                 return;
3423         }
3424         for (i = 0; i < 4; ++i) {
3425                 hpa_t root = vcpu->arch.mmu.pae_root[i];
3426
3427                 if (root && VALID_PAGE(root)) {
3428                         root &= PT64_BASE_ADDR_MASK;
3429                         sp = page_header(root);
3430                         __mmu_spte_walk(vcpu->kvm, sp, fn);
3431                 }
3432         }
3433         return;
3434 }
3435
3436 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3437                                 gva_t va, int level)
3438 {
3439         u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3440         int i;
3441         gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3442
3443         for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3444                 u64 ent = pt[i];
3445
3446                 if (ent == shadow_trap_nonpresent_pte)
3447                         continue;
3448
3449                 va = canonicalize(va);
3450                 if (is_shadow_present_pte(ent) && !is_last_spte(ent, level))
3451                         audit_mappings_page(vcpu, ent, va, level - 1);
3452                 else {
3453                         gpa_t gpa = kvm_mmu_gva_to_gpa_read(vcpu, va, NULL);
3454                         gfn_t gfn = gpa >> PAGE_SHIFT;
3455                         pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
3456                         hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
3457
3458                         if (is_error_pfn(pfn)) {
3459                                 kvm_release_pfn_clean(pfn);
3460                                 continue;
3461                         }
3462
3463                         if (is_shadow_present_pte(ent)
3464                             && (ent & PT64_BASE_ADDR_MASK) != hpa)
3465                                 printk(KERN_ERR "xx audit error: (%s) levels %d"
3466                                        " gva %lx gpa %llx hpa %llx ent %llx %d\n",
3467                                        audit_msg, vcpu->arch.mmu.root_level,
3468                                        va, gpa, hpa, ent,
3469                                        is_shadow_present_pte(ent));
3470                         else if (ent == shadow_notrap_nonpresent_pte
3471                                  && !is_error_hpa(hpa))
3472                                 printk(KERN_ERR "audit: (%s) notrap shadow,"
3473                                        " valid guest gva %lx\n", audit_msg, va);
3474                         kvm_release_pfn_clean(pfn);
3475
3476                 }
3477         }
3478 }
3479
3480 static void audit_mappings(struct kvm_vcpu *vcpu)
3481 {
3482         unsigned i;
3483
3484         if (vcpu->arch.mmu.root_level == 4)
3485                 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
3486         else
3487                 for (i = 0; i < 4; ++i)
3488                         if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
3489                                 audit_mappings_page(vcpu,
3490                                                     vcpu->arch.mmu.pae_root[i],
3491                                                     i << 30,
3492                                                     2);
3493 }
3494
3495 static int count_rmaps(struct kvm_vcpu *vcpu)
3496 {
3497         struct kvm *kvm = vcpu->kvm;
3498         struct kvm_memslots *slots;
3499         int nmaps = 0;
3500         int i, j, k, idx;
3501
3502         idx = srcu_read_lock(&kvm->srcu);
3503         slots = kvm_memslots(kvm);
3504         for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3505                 struct kvm_memory_slot *m = &slots->memslots[i];
3506                 struct kvm_rmap_desc *d;
3507
3508                 for (j = 0; j < m->npages; ++j) {
3509                         unsigned long *rmapp = &m->rmap[j];
3510
3511                         if (!*rmapp)
3512                                 continue;
3513                         if (!(*rmapp & 1)) {
3514                                 ++nmaps;
3515                                 continue;
3516                         }
3517                         d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
3518                         while (d) {
3519                                 for (k = 0; k < RMAP_EXT; ++k)
3520                                         if (d->sptes[k])
3521                                                 ++nmaps;
3522                                         else
3523                                                 break;
3524                                 d = d->more;
3525                         }
3526                 }
3527         }
3528         srcu_read_unlock(&kvm->srcu, idx);
3529         return nmaps;
3530 }
3531
3532 void inspect_spte_has_rmap(struct kvm *kvm, u64 *sptep)
3533 {
3534         unsigned long *rmapp;
3535         struct kvm_mmu_page *rev_sp;
3536         gfn_t gfn;
3537
3538         if (is_writable_pte(*sptep)) {
3539                 rev_sp = page_header(__pa(sptep));
3540                 gfn = kvm_mmu_page_get_gfn(rev_sp, sptep - rev_sp->spt);
3541
3542                 if (!gfn_to_memslot(kvm, gfn)) {
3543                         if (!printk_ratelimit())
3544                                 return;
3545                         printk(KERN_ERR "%s: no memslot for gfn %ld\n",
3546                                          audit_msg, gfn);
3547                         printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n",
3548                                audit_msg, (long int)(sptep - rev_sp->spt),
3549                                         rev_sp->gfn);
3550                         dump_stack();
3551                         return;
3552                 }
3553
3554                 rmapp = gfn_to_rmap(kvm, gfn, rev_sp->role.level);
3555                 if (!*rmapp) {
3556                         if (!printk_ratelimit())
3557                                 return;
3558                         printk(KERN_ERR "%s: no rmap for writable spte %llx\n",
3559                                          audit_msg, *sptep);
3560                         dump_stack();
3561                 }
3562         }
3563
3564 }
3565
3566 void audit_writable_sptes_have_rmaps(struct kvm_vcpu *vcpu)
3567 {
3568         mmu_spte_walk(vcpu, inspect_spte_has_rmap);
3569 }
3570
3571 static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu)
3572 {
3573         struct kvm_mmu_page *sp;
3574         int i;
3575
3576         list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3577                 u64 *pt = sp->spt;
3578
3579                 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
3580                         continue;
3581
3582                 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3583                         u64 ent = pt[i];
3584
3585                         if (!(ent & PT_PRESENT_MASK))
3586                                 continue;
3587                         if (!is_writable_pte(ent))
3588                                 continue;
3589                         inspect_spte_has_rmap(vcpu->kvm, &pt[i]);
3590                 }
3591         }
3592         return;
3593 }
3594
3595 static void audit_rmap(struct kvm_vcpu *vcpu)
3596 {
3597         check_writable_mappings_rmap(vcpu);
3598         count_rmaps(vcpu);
3599 }
3600
3601 static void audit_write_protection(struct kvm_vcpu *vcpu)
3602 {
3603         struct kvm_mmu_page *sp;
3604         struct kvm_memory_slot *slot;
3605         unsigned long *rmapp;
3606         u64 *spte;
3607         gfn_t gfn;
3608
3609         list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3610                 if (sp->role.direct)
3611                         continue;
3612                 if (sp->unsync)
3613                         continue;
3614
3615                 slot = gfn_to_memslot(vcpu->kvm, sp->gfn);
3616                 rmapp = &slot->rmap[gfn - slot->base_gfn];
3617
3618                 spte = rmap_next(vcpu->kvm, rmapp, NULL);
3619                 while (spte) {
3620                         if (is_writable_pte(*spte))
3621                                 printk(KERN_ERR "%s: (%s) shadow page has "
3622                                 "writable mappings: gfn %lx role %x\n",
3623                                __func__, audit_msg, sp->gfn,
3624                                sp->role.word);
3625                         spte = rmap_next(vcpu->kvm, rmapp, spte);
3626                 }
3627         }
3628 }
3629
3630 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3631 {
3632         int olddbg = dbg;
3633
3634         dbg = 0;
3635         audit_msg = msg;
3636         audit_rmap(vcpu);
3637         audit_write_protection(vcpu);
3638         if (strcmp("pre pte write", audit_msg) != 0)
3639                 audit_mappings(vcpu);
3640         audit_writable_sptes_have_rmaps(vcpu);
3641         dbg = olddbg;
3642 }
3643
3644 #endif