2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
10 * Copyright 2010 Red Hat, Inc. and/or its affilates.
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Avi Kivity <avi@qumranet.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
23 #include "kvm_cache_regs.h"
25 #include <linux/kvm_host.h>
26 #include <linux/types.h>
27 #include <linux/string.h>
29 #include <linux/highmem.h>
30 #include <linux/module.h>
31 #include <linux/swap.h>
32 #include <linux/hugetlb.h>
33 #include <linux/compiler.h>
34 #include <linux/srcu.h>
35 #include <linux/slab.h>
36 #include <linux/uaccess.h>
39 #include <asm/cmpxchg.h>
44 * When setting this variable to true it enables Two-Dimensional-Paging
45 * where the hardware walks 2 page tables:
46 * 1. the guest-virtual to guest-physical
47 * 2. while doing 1. it walks guest-physical to host-physical
48 * If the hardware supports that we don't need to do shadow paging.
50 bool tdp_enabled = false;
57 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
59 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
64 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
65 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
69 #define pgprintk(x...) do { } while (0)
70 #define rmap_printk(x...) do { } while (0)
74 #if defined(MMU_DEBUG) || defined(AUDIT)
76 module_param(dbg, bool, 0644);
79 static int oos_shadow = 1;
80 module_param(oos_shadow, bool, 0644);
83 #define ASSERT(x) do { } while (0)
87 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
88 __FILE__, __LINE__, #x); \
92 #define PT_FIRST_AVAIL_BITS_SHIFT 9
93 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
95 #define PT64_LEVEL_BITS 9
97 #define PT64_LEVEL_SHIFT(level) \
98 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
100 #define PT64_LEVEL_MASK(level) \
101 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
103 #define PT64_INDEX(address, level)\
104 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
107 #define PT32_LEVEL_BITS 10
109 #define PT32_LEVEL_SHIFT(level) \
110 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
112 #define PT32_LEVEL_MASK(level) \
113 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
114 #define PT32_LVL_OFFSET_MASK(level) \
115 (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
116 * PT32_LEVEL_BITS))) - 1))
118 #define PT32_INDEX(address, level)\
119 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
122 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
123 #define PT64_DIR_BASE_ADDR_MASK \
124 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
125 #define PT64_LVL_ADDR_MASK(level) \
126 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
127 * PT64_LEVEL_BITS))) - 1))
128 #define PT64_LVL_OFFSET_MASK(level) \
129 (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
130 * PT64_LEVEL_BITS))) - 1))
132 #define PT32_BASE_ADDR_MASK PAGE_MASK
133 #define PT32_DIR_BASE_ADDR_MASK \
134 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
135 #define PT32_LVL_ADDR_MASK(level) \
136 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
137 * PT32_LEVEL_BITS))) - 1))
139 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
144 #define ACC_EXEC_MASK 1
145 #define ACC_WRITE_MASK PT_WRITABLE_MASK
146 #define ACC_USER_MASK PT_USER_MASK
147 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
149 #include <trace/events/kvm.h>
151 #define CREATE_TRACE_POINTS
152 #include "mmutrace.h"
154 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
156 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
158 struct kvm_rmap_desc {
159 u64 *sptes[RMAP_EXT];
160 struct kvm_rmap_desc *more;
163 struct kvm_shadow_walk_iterator {
171 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
172 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
173 shadow_walk_okay(&(_walker)); \
174 shadow_walk_next(&(_walker)))
176 typedef void (*mmu_parent_walk_fn) (struct kvm_mmu_page *sp, u64 *spte);
178 static struct kmem_cache *pte_chain_cache;
179 static struct kmem_cache *rmap_desc_cache;
180 static struct kmem_cache *mmu_page_header_cache;
182 static u64 __read_mostly shadow_trap_nonpresent_pte;
183 static u64 __read_mostly shadow_notrap_nonpresent_pte;
184 static u64 __read_mostly shadow_base_present_pte;
185 static u64 __read_mostly shadow_nx_mask;
186 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
187 static u64 __read_mostly shadow_user_mask;
188 static u64 __read_mostly shadow_accessed_mask;
189 static u64 __read_mostly shadow_dirty_mask;
191 static inline u64 rsvd_bits(int s, int e)
193 return ((1ULL << (e - s + 1)) - 1) << s;
196 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
198 shadow_trap_nonpresent_pte = trap_pte;
199 shadow_notrap_nonpresent_pte = notrap_pte;
201 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
203 void kvm_mmu_set_base_ptes(u64 base_pte)
205 shadow_base_present_pte = base_pte;
207 EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
209 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
210 u64 dirty_mask, u64 nx_mask, u64 x_mask)
212 shadow_user_mask = user_mask;
213 shadow_accessed_mask = accessed_mask;
214 shadow_dirty_mask = dirty_mask;
215 shadow_nx_mask = nx_mask;
216 shadow_x_mask = x_mask;
218 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
220 static bool is_write_protection(struct kvm_vcpu *vcpu)
222 return kvm_read_cr0_bits(vcpu, X86_CR0_WP);
225 static int is_cpuid_PSE36(void)
230 static int is_nx(struct kvm_vcpu *vcpu)
232 return vcpu->arch.efer & EFER_NX;
235 static int is_shadow_present_pte(u64 pte)
237 return pte != shadow_trap_nonpresent_pte
238 && pte != shadow_notrap_nonpresent_pte;
241 static int is_large_pte(u64 pte)
243 return pte & PT_PAGE_SIZE_MASK;
246 static int is_writable_pte(unsigned long pte)
248 return pte & PT_WRITABLE_MASK;
251 static int is_dirty_gpte(unsigned long pte)
253 return pte & PT_DIRTY_MASK;
256 static int is_rmap_spte(u64 pte)
258 return is_shadow_present_pte(pte);
261 static int is_last_spte(u64 pte, int level)
263 if (level == PT_PAGE_TABLE_LEVEL)
265 if (is_large_pte(pte))
270 static pfn_t spte_to_pfn(u64 pte)
272 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
275 static gfn_t pse36_gfn_delta(u32 gpte)
277 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
279 return (gpte & PT32_DIR_PSE36_MASK) << shift;
282 static void __set_spte(u64 *sptep, u64 spte)
284 set_64bit(sptep, spte);
287 static u64 __xchg_spte(u64 *sptep, u64 new_spte)
290 return xchg(sptep, new_spte);
296 } while (cmpxchg64(sptep, old_spte, new_spte) != old_spte);
302 static bool spte_has_volatile_bits(u64 spte)
304 if (!shadow_accessed_mask)
307 if (!is_shadow_present_pte(spte))
310 if ((spte & shadow_accessed_mask) &&
311 (!is_writable_pte(spte) || (spte & shadow_dirty_mask)))
317 static bool spte_is_bit_cleared(u64 old_spte, u64 new_spte, u64 bit_mask)
319 return (old_spte & bit_mask) && !(new_spte & bit_mask);
322 static void update_spte(u64 *sptep, u64 new_spte)
324 u64 mask, old_spte = *sptep;
326 WARN_ON(!is_rmap_spte(new_spte));
328 new_spte |= old_spte & shadow_dirty_mask;
330 mask = shadow_accessed_mask;
331 if (is_writable_pte(old_spte))
332 mask |= shadow_dirty_mask;
334 if (!spte_has_volatile_bits(old_spte) || (new_spte & mask) == mask)
335 __set_spte(sptep, new_spte);
337 old_spte = __xchg_spte(sptep, new_spte);
339 if (!shadow_accessed_mask)
342 if (spte_is_bit_cleared(old_spte, new_spte, shadow_accessed_mask))
343 kvm_set_pfn_accessed(spte_to_pfn(old_spte));
344 if (spte_is_bit_cleared(old_spte, new_spte, shadow_dirty_mask))
345 kvm_set_pfn_dirty(spte_to_pfn(old_spte));
348 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
349 struct kmem_cache *base_cache, int min)
353 if (cache->nobjs >= min)
355 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
356 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
359 cache->objects[cache->nobjs++] = obj;
364 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc,
365 struct kmem_cache *cache)
368 kmem_cache_free(cache, mc->objects[--mc->nobjs]);
371 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
376 if (cache->nobjs >= min)
378 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
379 page = alloc_page(GFP_KERNEL);
382 cache->objects[cache->nobjs++] = page_address(page);
387 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
390 free_page((unsigned long)mc->objects[--mc->nobjs]);
393 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
397 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
401 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
405 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
408 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
409 mmu_page_header_cache, 4);
414 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
416 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache, pte_chain_cache);
417 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache, rmap_desc_cache);
418 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
419 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache,
420 mmu_page_header_cache);
423 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
429 p = mc->objects[--mc->nobjs];
433 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
435 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
436 sizeof(struct kvm_pte_chain));
439 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
441 kmem_cache_free(pte_chain_cache, pc);
444 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
446 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
447 sizeof(struct kvm_rmap_desc));
450 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
452 kmem_cache_free(rmap_desc_cache, rd);
455 static gfn_t kvm_mmu_page_get_gfn(struct kvm_mmu_page *sp, int index)
457 if (!sp->role.direct)
458 return sp->gfns[index];
460 return sp->gfn + (index << ((sp->role.level - 1) * PT64_LEVEL_BITS));
463 static void kvm_mmu_page_set_gfn(struct kvm_mmu_page *sp, int index, gfn_t gfn)
466 BUG_ON(gfn != kvm_mmu_page_get_gfn(sp, index));
468 sp->gfns[index] = gfn;
472 * Return the pointer to the largepage write count for a given
473 * gfn, handling slots that are not large page aligned.
475 static int *slot_largepage_idx(gfn_t gfn,
476 struct kvm_memory_slot *slot,
481 idx = (gfn >> KVM_HPAGE_GFN_SHIFT(level)) -
482 (slot->base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
483 return &slot->lpage_info[level - 2][idx].write_count;
486 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
488 struct kvm_memory_slot *slot;
492 slot = gfn_to_memslot(kvm, gfn);
493 for (i = PT_DIRECTORY_LEVEL;
494 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
495 write_count = slot_largepage_idx(gfn, slot, i);
500 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
502 struct kvm_memory_slot *slot;
506 slot = gfn_to_memslot(kvm, gfn);
507 for (i = PT_DIRECTORY_LEVEL;
508 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
509 write_count = slot_largepage_idx(gfn, slot, i);
511 WARN_ON(*write_count < 0);
515 static int has_wrprotected_page(struct kvm *kvm,
519 struct kvm_memory_slot *slot;
522 slot = gfn_to_memslot(kvm, gfn);
524 largepage_idx = slot_largepage_idx(gfn, slot, level);
525 return *largepage_idx;
531 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
533 unsigned long page_size;
536 page_size = kvm_host_page_size(kvm, gfn);
538 for (i = PT_PAGE_TABLE_LEVEL;
539 i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
540 if (page_size >= KVM_HPAGE_SIZE(i))
549 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
551 struct kvm_memory_slot *slot;
552 int host_level, level, max_level;
554 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
555 if (slot && slot->dirty_bitmap)
556 return PT_PAGE_TABLE_LEVEL;
558 host_level = host_mapping_level(vcpu->kvm, large_gfn);
560 if (host_level == PT_PAGE_TABLE_LEVEL)
563 max_level = kvm_x86_ops->get_lpage_level() < host_level ?
564 kvm_x86_ops->get_lpage_level() : host_level;
566 for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level)
567 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
574 * Take gfn and return the reverse mapping to it.
577 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
579 struct kvm_memory_slot *slot;
582 slot = gfn_to_memslot(kvm, gfn);
583 if (likely(level == PT_PAGE_TABLE_LEVEL))
584 return &slot->rmap[gfn - slot->base_gfn];
586 idx = (gfn >> KVM_HPAGE_GFN_SHIFT(level)) -
587 (slot->base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
589 return &slot->lpage_info[level - 2][idx].rmap_pde;
593 * Reverse mapping data structures:
595 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
596 * that points to page_address(page).
598 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
599 * containing more mappings.
601 * Returns the number of rmap entries before the spte was added or zero if
602 * the spte was not added.
605 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
607 struct kvm_mmu_page *sp;
608 struct kvm_rmap_desc *desc;
609 unsigned long *rmapp;
612 if (!is_rmap_spte(*spte))
614 sp = page_header(__pa(spte));
615 kvm_mmu_page_set_gfn(sp, spte - sp->spt, gfn);
616 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
618 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
619 *rmapp = (unsigned long)spte;
620 } else if (!(*rmapp & 1)) {
621 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
622 desc = mmu_alloc_rmap_desc(vcpu);
623 desc->sptes[0] = (u64 *)*rmapp;
624 desc->sptes[1] = spte;
625 *rmapp = (unsigned long)desc | 1;
627 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
628 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
629 while (desc->sptes[RMAP_EXT-1] && desc->more) {
633 if (desc->sptes[RMAP_EXT-1]) {
634 desc->more = mmu_alloc_rmap_desc(vcpu);
637 for (i = 0; desc->sptes[i]; ++i)
639 desc->sptes[i] = spte;
644 static void rmap_desc_remove_entry(unsigned long *rmapp,
645 struct kvm_rmap_desc *desc,
647 struct kvm_rmap_desc *prev_desc)
651 for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
653 desc->sptes[i] = desc->sptes[j];
654 desc->sptes[j] = NULL;
657 if (!prev_desc && !desc->more)
658 *rmapp = (unsigned long)desc->sptes[0];
661 prev_desc->more = desc->more;
663 *rmapp = (unsigned long)desc->more | 1;
664 mmu_free_rmap_desc(desc);
667 static void rmap_remove(struct kvm *kvm, u64 *spte)
669 struct kvm_rmap_desc *desc;
670 struct kvm_rmap_desc *prev_desc;
671 struct kvm_mmu_page *sp;
673 unsigned long *rmapp;
676 sp = page_header(__pa(spte));
677 gfn = kvm_mmu_page_get_gfn(sp, spte - sp->spt);
678 rmapp = gfn_to_rmap(kvm, gfn, sp->role.level);
680 printk(KERN_ERR "rmap_remove: %p 0->BUG\n", spte);
682 } else if (!(*rmapp & 1)) {
683 rmap_printk("rmap_remove: %p 1->0\n", spte);
684 if ((u64 *)*rmapp != spte) {
685 printk(KERN_ERR "rmap_remove: %p 1->BUG\n", spte);
690 rmap_printk("rmap_remove: %p many->many\n", spte);
691 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
694 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
695 if (desc->sptes[i] == spte) {
696 rmap_desc_remove_entry(rmapp,
704 pr_err("rmap_remove: %p many->many\n", spte);
709 static void set_spte_track_bits(u64 *sptep, u64 new_spte)
712 u64 old_spte = *sptep;
714 if (!spte_has_volatile_bits(old_spte))
715 __set_spte(sptep, new_spte);
717 old_spte = __xchg_spte(sptep, new_spte);
719 if (!is_rmap_spte(old_spte))
722 pfn = spte_to_pfn(old_spte);
723 if (!shadow_accessed_mask || old_spte & shadow_accessed_mask)
724 kvm_set_pfn_accessed(pfn);
725 if (!shadow_dirty_mask || (old_spte & shadow_dirty_mask))
726 kvm_set_pfn_dirty(pfn);
729 static void drop_spte(struct kvm *kvm, u64 *sptep, u64 new_spte)
731 set_spte_track_bits(sptep, new_spte);
732 rmap_remove(kvm, sptep);
735 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
737 struct kvm_rmap_desc *desc;
743 else if (!(*rmapp & 1)) {
745 return (u64 *)*rmapp;
748 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
751 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
752 if (prev_spte == spte)
753 return desc->sptes[i];
754 prev_spte = desc->sptes[i];
761 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
763 unsigned long *rmapp;
765 int i, write_protected = 0;
767 rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
769 spte = rmap_next(kvm, rmapp, NULL);
772 BUG_ON(!(*spte & PT_PRESENT_MASK));
773 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
774 if (is_writable_pte(*spte)) {
775 update_spte(spte, *spte & ~PT_WRITABLE_MASK);
778 spte = rmap_next(kvm, rmapp, spte);
781 /* check for huge page mappings */
782 for (i = PT_DIRECTORY_LEVEL;
783 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
784 rmapp = gfn_to_rmap(kvm, gfn, i);
785 spte = rmap_next(kvm, rmapp, NULL);
788 BUG_ON(!(*spte & PT_PRESENT_MASK));
789 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
790 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
791 if (is_writable_pte(*spte)) {
793 shadow_trap_nonpresent_pte);
798 spte = rmap_next(kvm, rmapp, spte);
802 return write_protected;
805 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
809 int need_tlb_flush = 0;
811 while ((spte = rmap_next(kvm, rmapp, NULL))) {
812 BUG_ON(!(*spte & PT_PRESENT_MASK));
813 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
814 drop_spte(kvm, spte, shadow_trap_nonpresent_pte);
817 return need_tlb_flush;
820 static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
825 pte_t *ptep = (pte_t *)data;
828 WARN_ON(pte_huge(*ptep));
829 new_pfn = pte_pfn(*ptep);
830 spte = rmap_next(kvm, rmapp, NULL);
832 BUG_ON(!is_shadow_present_pte(*spte));
833 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte, *spte);
835 if (pte_write(*ptep)) {
836 drop_spte(kvm, spte, shadow_trap_nonpresent_pte);
837 spte = rmap_next(kvm, rmapp, NULL);
839 new_spte = *spte &~ (PT64_BASE_ADDR_MASK);
840 new_spte |= (u64)new_pfn << PAGE_SHIFT;
842 new_spte &= ~PT_WRITABLE_MASK;
843 new_spte &= ~SPTE_HOST_WRITEABLE;
844 new_spte &= ~shadow_accessed_mask;
845 set_spte_track_bits(spte, new_spte);
846 spte = rmap_next(kvm, rmapp, spte);
850 kvm_flush_remote_tlbs(kvm);
855 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
857 int (*handler)(struct kvm *kvm, unsigned long *rmapp,
863 struct kvm_memslots *slots;
865 slots = kvm_memslots(kvm);
867 for (i = 0; i < slots->nmemslots; i++) {
868 struct kvm_memory_slot *memslot = &slots->memslots[i];
869 unsigned long start = memslot->userspace_addr;
872 end = start + (memslot->npages << PAGE_SHIFT);
873 if (hva >= start && hva < end) {
874 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
876 ret = handler(kvm, &memslot->rmap[gfn_offset], data);
878 for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
882 sh = KVM_HPAGE_GFN_SHIFT(PT_DIRECTORY_LEVEL+j);
883 idx = ((memslot->base_gfn+gfn_offset) >> sh) -
884 (memslot->base_gfn >> sh);
886 &memslot->lpage_info[j][idx].rmap_pde,
889 trace_kvm_age_page(hva, memslot, ret);
897 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
899 return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
902 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
904 kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
907 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
914 * Emulate the accessed bit for EPT, by checking if this page has
915 * an EPT mapping, and clearing it if it does. On the next access,
916 * a new EPT mapping will be established.
917 * This has some overhead, but not as much as the cost of swapping
918 * out actively used pages or breaking up actively used hugepages.
920 if (!shadow_accessed_mask)
921 return kvm_unmap_rmapp(kvm, rmapp, data);
923 spte = rmap_next(kvm, rmapp, NULL);
927 BUG_ON(!(_spte & PT_PRESENT_MASK));
928 _young = _spte & PT_ACCESSED_MASK;
931 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
933 spte = rmap_next(kvm, rmapp, spte);
938 #define RMAP_RECYCLE_THRESHOLD 1000
940 static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
942 unsigned long *rmapp;
943 struct kvm_mmu_page *sp;
945 sp = page_header(__pa(spte));
947 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
949 kvm_unmap_rmapp(vcpu->kvm, rmapp, 0);
950 kvm_flush_remote_tlbs(vcpu->kvm);
953 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
955 return kvm_handle_hva(kvm, hva, 0, kvm_age_rmapp);
959 static int is_empty_shadow_page(u64 *spt)
964 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
965 if (is_shadow_present_pte(*pos)) {
966 printk(KERN_ERR "%s: %p %llx\n", __func__,
974 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
976 ASSERT(is_empty_shadow_page(sp->spt));
977 hlist_del(&sp->hash_link);
979 __free_page(virt_to_page(sp->spt));
980 if (!sp->role.direct)
981 __free_page(virt_to_page(sp->gfns));
982 kmem_cache_free(mmu_page_header_cache, sp);
983 ++kvm->arch.n_free_mmu_pages;
986 static unsigned kvm_page_table_hashfn(gfn_t gfn)
988 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
991 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
992 u64 *parent_pte, int direct)
994 struct kvm_mmu_page *sp;
996 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
997 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
999 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache,
1001 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
1002 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
1003 bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
1004 sp->multimapped = 0;
1005 sp->parent_pte = parent_pte;
1006 --vcpu->kvm->arch.n_free_mmu_pages;
1010 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
1011 struct kvm_mmu_page *sp, u64 *parent_pte)
1013 struct kvm_pte_chain *pte_chain;
1014 struct hlist_node *node;
1019 if (!sp->multimapped) {
1020 u64 *old = sp->parent_pte;
1023 sp->parent_pte = parent_pte;
1026 sp->multimapped = 1;
1027 pte_chain = mmu_alloc_pte_chain(vcpu);
1028 INIT_HLIST_HEAD(&sp->parent_ptes);
1029 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
1030 pte_chain->parent_ptes[0] = old;
1032 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
1033 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
1035 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
1036 if (!pte_chain->parent_ptes[i]) {
1037 pte_chain->parent_ptes[i] = parent_pte;
1041 pte_chain = mmu_alloc_pte_chain(vcpu);
1043 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
1044 pte_chain->parent_ptes[0] = parent_pte;
1047 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
1050 struct kvm_pte_chain *pte_chain;
1051 struct hlist_node *node;
1054 if (!sp->multimapped) {
1055 BUG_ON(sp->parent_pte != parent_pte);
1056 sp->parent_pte = NULL;
1059 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1060 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1061 if (!pte_chain->parent_ptes[i])
1063 if (pte_chain->parent_ptes[i] != parent_pte)
1065 while (i + 1 < NR_PTE_CHAIN_ENTRIES
1066 && pte_chain->parent_ptes[i + 1]) {
1067 pte_chain->parent_ptes[i]
1068 = pte_chain->parent_ptes[i + 1];
1071 pte_chain->parent_ptes[i] = NULL;
1073 hlist_del(&pte_chain->link);
1074 mmu_free_pte_chain(pte_chain);
1075 if (hlist_empty(&sp->parent_ptes)) {
1076 sp->multimapped = 0;
1077 sp->parent_pte = NULL;
1085 static void mmu_parent_walk(struct kvm_mmu_page *sp, mmu_parent_walk_fn fn)
1087 struct kvm_pte_chain *pte_chain;
1088 struct hlist_node *node;
1089 struct kvm_mmu_page *parent_sp;
1092 if (!sp->multimapped && sp->parent_pte) {
1093 parent_sp = page_header(__pa(sp->parent_pte));
1094 fn(parent_sp, sp->parent_pte);
1098 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1099 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1100 u64 *spte = pte_chain->parent_ptes[i];
1104 parent_sp = page_header(__pa(spte));
1105 fn(parent_sp, spte);
1109 static void mark_unsync(struct kvm_mmu_page *sp, u64 *spte);
1110 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp)
1112 mmu_parent_walk(sp, mark_unsync);
1115 static void mark_unsync(struct kvm_mmu_page *sp, u64 *spte)
1119 index = spte - sp->spt;
1120 if (__test_and_set_bit(index, sp->unsync_child_bitmap))
1122 if (sp->unsync_children++)
1124 kvm_mmu_mark_parents_unsync(sp);
1127 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1128 struct kvm_mmu_page *sp)
1132 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1133 sp->spt[i] = shadow_trap_nonpresent_pte;
1136 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1137 struct kvm_mmu_page *sp, bool clear_unsync)
1142 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1146 #define KVM_PAGE_ARRAY_NR 16
1148 struct kvm_mmu_pages {
1149 struct mmu_page_and_offset {
1150 struct kvm_mmu_page *sp;
1152 } page[KVM_PAGE_ARRAY_NR];
1156 #define for_each_unsync_children(bitmap, idx) \
1157 for (idx = find_first_bit(bitmap, 512); \
1159 idx = find_next_bit(bitmap, 512, idx+1))
1161 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1167 for (i=0; i < pvec->nr; i++)
1168 if (pvec->page[i].sp == sp)
1171 pvec->page[pvec->nr].sp = sp;
1172 pvec->page[pvec->nr].idx = idx;
1174 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1177 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1178 struct kvm_mmu_pages *pvec)
1180 int i, ret, nr_unsync_leaf = 0;
1182 for_each_unsync_children(sp->unsync_child_bitmap, i) {
1183 struct kvm_mmu_page *child;
1184 u64 ent = sp->spt[i];
1186 if (!is_shadow_present_pte(ent) || is_large_pte(ent))
1187 goto clear_child_bitmap;
1189 child = page_header(ent & PT64_BASE_ADDR_MASK);
1191 if (child->unsync_children) {
1192 if (mmu_pages_add(pvec, child, i))
1195 ret = __mmu_unsync_walk(child, pvec);
1197 goto clear_child_bitmap;
1199 nr_unsync_leaf += ret;
1202 } else if (child->unsync) {
1204 if (mmu_pages_add(pvec, child, i))
1207 goto clear_child_bitmap;
1212 __clear_bit(i, sp->unsync_child_bitmap);
1213 sp->unsync_children--;
1214 WARN_ON((int)sp->unsync_children < 0);
1218 return nr_unsync_leaf;
1221 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1222 struct kvm_mmu_pages *pvec)
1224 if (!sp->unsync_children)
1227 mmu_pages_add(pvec, sp, 0);
1228 return __mmu_unsync_walk(sp, pvec);
1231 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1233 WARN_ON(!sp->unsync);
1234 trace_kvm_mmu_sync_page(sp);
1236 --kvm->stat.mmu_unsync;
1239 static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
1240 struct list_head *invalid_list);
1241 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
1242 struct list_head *invalid_list);
1244 #define for_each_gfn_sp(kvm, sp, gfn, pos) \
1245 hlist_for_each_entry(sp, pos, \
1246 &(kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)], hash_link) \
1247 if ((sp)->gfn != (gfn)) {} else
1249 #define for_each_gfn_indirect_valid_sp(kvm, sp, gfn, pos) \
1250 hlist_for_each_entry(sp, pos, \
1251 &(kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)], hash_link) \
1252 if ((sp)->gfn != (gfn) || (sp)->role.direct || \
1253 (sp)->role.invalid) {} else
1255 /* @sp->gfn should be write-protected at the call site */
1256 static int __kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1257 struct list_head *invalid_list, bool clear_unsync)
1259 if (sp->role.cr4_pae != !!is_pae(vcpu)) {
1260 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1265 kvm_unlink_unsync_page(vcpu->kvm, sp);
1267 if (vcpu->arch.mmu.sync_page(vcpu, sp, clear_unsync)) {
1268 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1272 kvm_mmu_flush_tlb(vcpu);
1276 static int kvm_sync_page_transient(struct kvm_vcpu *vcpu,
1277 struct kvm_mmu_page *sp)
1279 LIST_HEAD(invalid_list);
1282 ret = __kvm_sync_page(vcpu, sp, &invalid_list, false);
1284 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1289 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1290 struct list_head *invalid_list)
1292 return __kvm_sync_page(vcpu, sp, invalid_list, true);
1295 /* @gfn should be write-protected at the call site */
1296 static void kvm_sync_pages(struct kvm_vcpu *vcpu, gfn_t gfn)
1298 struct kvm_mmu_page *s;
1299 struct hlist_node *node;
1300 LIST_HEAD(invalid_list);
1303 for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1307 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
1308 if ((s->role.cr4_pae != !!is_pae(vcpu)) ||
1309 (vcpu->arch.mmu.sync_page(vcpu, s, true))) {
1310 kvm_mmu_prepare_zap_page(vcpu->kvm, s, &invalid_list);
1313 kvm_unlink_unsync_page(vcpu->kvm, s);
1317 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1319 kvm_mmu_flush_tlb(vcpu);
1322 struct mmu_page_path {
1323 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1324 unsigned int idx[PT64_ROOT_LEVEL-1];
1327 #define for_each_sp(pvec, sp, parents, i) \
1328 for (i = mmu_pages_next(&pvec, &parents, -1), \
1329 sp = pvec.page[i].sp; \
1330 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1331 i = mmu_pages_next(&pvec, &parents, i))
1333 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1334 struct mmu_page_path *parents,
1339 for (n = i+1; n < pvec->nr; n++) {
1340 struct kvm_mmu_page *sp = pvec->page[n].sp;
1342 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1343 parents->idx[0] = pvec->page[n].idx;
1347 parents->parent[sp->role.level-2] = sp;
1348 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1354 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1356 struct kvm_mmu_page *sp;
1357 unsigned int level = 0;
1360 unsigned int idx = parents->idx[level];
1362 sp = parents->parent[level];
1366 --sp->unsync_children;
1367 WARN_ON((int)sp->unsync_children < 0);
1368 __clear_bit(idx, sp->unsync_child_bitmap);
1370 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1373 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1374 struct mmu_page_path *parents,
1375 struct kvm_mmu_pages *pvec)
1377 parents->parent[parent->role.level-1] = NULL;
1381 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1382 struct kvm_mmu_page *parent)
1385 struct kvm_mmu_page *sp;
1386 struct mmu_page_path parents;
1387 struct kvm_mmu_pages pages;
1388 LIST_HEAD(invalid_list);
1390 kvm_mmu_pages_init(parent, &parents, &pages);
1391 while (mmu_unsync_walk(parent, &pages)) {
1394 for_each_sp(pages, sp, parents, i)
1395 protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1398 kvm_flush_remote_tlbs(vcpu->kvm);
1400 for_each_sp(pages, sp, parents, i) {
1401 kvm_sync_page(vcpu, sp, &invalid_list);
1402 mmu_pages_clear_parents(&parents);
1404 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1405 cond_resched_lock(&vcpu->kvm->mmu_lock);
1406 kvm_mmu_pages_init(parent, &parents, &pages);
1410 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1418 union kvm_mmu_page_role role;
1420 struct kvm_mmu_page *sp;
1421 struct hlist_node *node;
1422 bool need_sync = false;
1424 role = vcpu->arch.mmu.base_role;
1426 role.direct = direct;
1429 role.access = access;
1430 if (!tdp_enabled && vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1431 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1432 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1433 role.quadrant = quadrant;
1435 for_each_gfn_sp(vcpu->kvm, sp, gfn, node) {
1436 if (!need_sync && sp->unsync)
1439 if (sp->role.word != role.word)
1442 if (sp->unsync && kvm_sync_page_transient(vcpu, sp))
1445 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1446 if (sp->unsync_children) {
1447 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
1448 kvm_mmu_mark_parents_unsync(sp);
1449 } else if (sp->unsync)
1450 kvm_mmu_mark_parents_unsync(sp);
1452 trace_kvm_mmu_get_page(sp, false);
1455 ++vcpu->kvm->stat.mmu_cache_miss;
1456 sp = kvm_mmu_alloc_page(vcpu, parent_pte, direct);
1461 hlist_add_head(&sp->hash_link,
1462 &vcpu->kvm->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)]);
1464 if (rmap_write_protect(vcpu->kvm, gfn))
1465 kvm_flush_remote_tlbs(vcpu->kvm);
1466 if (level > PT_PAGE_TABLE_LEVEL && need_sync)
1467 kvm_sync_pages(vcpu, gfn);
1469 account_shadowed(vcpu->kvm, gfn);
1471 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1472 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1474 nonpaging_prefetch_page(vcpu, sp);
1475 trace_kvm_mmu_get_page(sp, true);
1479 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1480 struct kvm_vcpu *vcpu, u64 addr)
1482 iterator->addr = addr;
1483 iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1484 iterator->level = vcpu->arch.mmu.shadow_root_level;
1485 if (iterator->level == PT32E_ROOT_LEVEL) {
1486 iterator->shadow_addr
1487 = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1488 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1490 if (!iterator->shadow_addr)
1491 iterator->level = 0;
1495 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1497 if (iterator->level < PT_PAGE_TABLE_LEVEL)
1500 if (iterator->level == PT_PAGE_TABLE_LEVEL)
1501 if (is_large_pte(*iterator->sptep))
1504 iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1505 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1509 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1511 iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1515 static void link_shadow_page(u64 *sptep, struct kvm_mmu_page *sp)
1519 spte = __pa(sp->spt)
1520 | PT_PRESENT_MASK | PT_ACCESSED_MASK
1521 | PT_WRITABLE_MASK | PT_USER_MASK;
1522 __set_spte(sptep, spte);
1525 static void drop_large_spte(struct kvm_vcpu *vcpu, u64 *sptep)
1527 if (is_large_pte(*sptep)) {
1528 drop_spte(vcpu->kvm, sptep, shadow_trap_nonpresent_pte);
1529 kvm_flush_remote_tlbs(vcpu->kvm);
1533 static void validate_direct_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1534 unsigned direct_access)
1536 if (is_shadow_present_pte(*sptep) && !is_large_pte(*sptep)) {
1537 struct kvm_mmu_page *child;
1540 * For the direct sp, if the guest pte's dirty bit
1541 * changed form clean to dirty, it will corrupt the
1542 * sp's access: allow writable in the read-only sp,
1543 * so we should update the spte at this point to get
1544 * a new sp with the correct access.
1546 child = page_header(*sptep & PT64_BASE_ADDR_MASK);
1547 if (child->role.access == direct_access)
1550 mmu_page_remove_parent_pte(child, sptep);
1551 __set_spte(sptep, shadow_trap_nonpresent_pte);
1552 kvm_flush_remote_tlbs(vcpu->kvm);
1556 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1557 struct kvm_mmu_page *sp)
1565 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1568 if (is_shadow_present_pte(ent)) {
1569 if (!is_last_spte(ent, sp->role.level)) {
1570 ent &= PT64_BASE_ADDR_MASK;
1571 mmu_page_remove_parent_pte(page_header(ent),
1574 if (is_large_pte(ent))
1576 drop_spte(kvm, &pt[i],
1577 shadow_trap_nonpresent_pte);
1580 pt[i] = shadow_trap_nonpresent_pte;
1584 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1586 mmu_page_remove_parent_pte(sp, parent_pte);
1589 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1592 struct kvm_vcpu *vcpu;
1594 kvm_for_each_vcpu(i, vcpu, kvm)
1595 vcpu->arch.last_pte_updated = NULL;
1598 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1602 while (sp->multimapped || sp->parent_pte) {
1603 if (!sp->multimapped)
1604 parent_pte = sp->parent_pte;
1606 struct kvm_pte_chain *chain;
1608 chain = container_of(sp->parent_ptes.first,
1609 struct kvm_pte_chain, link);
1610 parent_pte = chain->parent_ptes[0];
1612 BUG_ON(!parent_pte);
1613 kvm_mmu_put_page(sp, parent_pte);
1614 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
1618 static int mmu_zap_unsync_children(struct kvm *kvm,
1619 struct kvm_mmu_page *parent,
1620 struct list_head *invalid_list)
1623 struct mmu_page_path parents;
1624 struct kvm_mmu_pages pages;
1626 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1629 kvm_mmu_pages_init(parent, &parents, &pages);
1630 while (mmu_unsync_walk(parent, &pages)) {
1631 struct kvm_mmu_page *sp;
1633 for_each_sp(pages, sp, parents, i) {
1634 kvm_mmu_prepare_zap_page(kvm, sp, invalid_list);
1635 mmu_pages_clear_parents(&parents);
1638 kvm_mmu_pages_init(parent, &parents, &pages);
1644 static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
1645 struct list_head *invalid_list)
1649 trace_kvm_mmu_prepare_zap_page(sp);
1650 ++kvm->stat.mmu_shadow_zapped;
1651 ret = mmu_zap_unsync_children(kvm, sp, invalid_list);
1652 kvm_mmu_page_unlink_children(kvm, sp);
1653 kvm_mmu_unlink_parents(kvm, sp);
1654 if (!sp->role.invalid && !sp->role.direct)
1655 unaccount_shadowed(kvm, sp->gfn);
1657 kvm_unlink_unsync_page(kvm, sp);
1658 if (!sp->root_count) {
1661 list_move(&sp->link, invalid_list);
1663 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1664 kvm_reload_remote_mmus(kvm);
1667 sp->role.invalid = 1;
1668 kvm_mmu_reset_last_pte_updated(kvm);
1672 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
1673 struct list_head *invalid_list)
1675 struct kvm_mmu_page *sp;
1677 if (list_empty(invalid_list))
1680 kvm_flush_remote_tlbs(kvm);
1683 sp = list_first_entry(invalid_list, struct kvm_mmu_page, link);
1684 WARN_ON(!sp->role.invalid || sp->root_count);
1685 kvm_mmu_free_page(kvm, sp);
1686 } while (!list_empty(invalid_list));
1691 * Changing the number of mmu pages allocated to the vm
1692 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1694 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1697 LIST_HEAD(invalid_list);
1699 used_pages = kvm->arch.n_alloc_mmu_pages - kvm_mmu_available_pages(kvm);
1700 used_pages = max(0, used_pages);
1703 * If we set the number of mmu pages to be smaller be than the
1704 * number of actived pages , we must to free some mmu pages before we
1708 if (used_pages > kvm_nr_mmu_pages) {
1709 while (used_pages > kvm_nr_mmu_pages &&
1710 !list_empty(&kvm->arch.active_mmu_pages)) {
1711 struct kvm_mmu_page *page;
1713 page = container_of(kvm->arch.active_mmu_pages.prev,
1714 struct kvm_mmu_page, link);
1715 used_pages -= kvm_mmu_prepare_zap_page(kvm, page,
1718 kvm_mmu_commit_zap_page(kvm, &invalid_list);
1719 kvm_nr_mmu_pages = used_pages;
1720 kvm->arch.n_free_mmu_pages = 0;
1723 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1724 - kvm->arch.n_alloc_mmu_pages;
1726 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
1729 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1731 struct kvm_mmu_page *sp;
1732 struct hlist_node *node;
1733 LIST_HEAD(invalid_list);
1736 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1739 for_each_gfn_indirect_valid_sp(kvm, sp, gfn, node) {
1740 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
1743 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
1745 kvm_mmu_commit_zap_page(kvm, &invalid_list);
1749 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1751 struct kvm_mmu_page *sp;
1752 struct hlist_node *node;
1753 LIST_HEAD(invalid_list);
1755 for_each_gfn_indirect_valid_sp(kvm, sp, gfn, node) {
1756 pgprintk("%s: zap %lx %x\n",
1757 __func__, gfn, sp->role.word);
1758 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
1760 kvm_mmu_commit_zap_page(kvm, &invalid_list);
1763 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1765 int slot = memslot_id(kvm, gfn);
1766 struct kvm_mmu_page *sp = page_header(__pa(pte));
1768 __set_bit(slot, sp->slot_bitmap);
1771 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1776 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1779 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1780 if (pt[i] == shadow_notrap_nonpresent_pte)
1781 __set_spte(&pt[i], shadow_trap_nonpresent_pte);
1786 * The function is based on mtrr_type_lookup() in
1787 * arch/x86/kernel/cpu/mtrr/generic.c
1789 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1794 u8 prev_match, curr_match;
1795 int num_var_ranges = KVM_NR_VAR_MTRR;
1797 if (!mtrr_state->enabled)
1800 /* Make end inclusive end, instead of exclusive */
1803 /* Look in fixed ranges. Just return the type as per start */
1804 if (mtrr_state->have_fixed && (start < 0x100000)) {
1807 if (start < 0x80000) {
1809 idx += (start >> 16);
1810 return mtrr_state->fixed_ranges[idx];
1811 } else if (start < 0xC0000) {
1813 idx += ((start - 0x80000) >> 14);
1814 return mtrr_state->fixed_ranges[idx];
1815 } else if (start < 0x1000000) {
1817 idx += ((start - 0xC0000) >> 12);
1818 return mtrr_state->fixed_ranges[idx];
1823 * Look in variable ranges
1824 * Look of multiple ranges matching this address and pick type
1825 * as per MTRR precedence
1827 if (!(mtrr_state->enabled & 2))
1828 return mtrr_state->def_type;
1831 for (i = 0; i < num_var_ranges; ++i) {
1832 unsigned short start_state, end_state;
1834 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1837 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1838 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1839 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1840 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1842 start_state = ((start & mask) == (base & mask));
1843 end_state = ((end & mask) == (base & mask));
1844 if (start_state != end_state)
1847 if ((start & mask) != (base & mask))
1850 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1851 if (prev_match == 0xFF) {
1852 prev_match = curr_match;
1856 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1857 curr_match == MTRR_TYPE_UNCACHABLE)
1858 return MTRR_TYPE_UNCACHABLE;
1860 if ((prev_match == MTRR_TYPE_WRBACK &&
1861 curr_match == MTRR_TYPE_WRTHROUGH) ||
1862 (prev_match == MTRR_TYPE_WRTHROUGH &&
1863 curr_match == MTRR_TYPE_WRBACK)) {
1864 prev_match = MTRR_TYPE_WRTHROUGH;
1865 curr_match = MTRR_TYPE_WRTHROUGH;
1868 if (prev_match != curr_match)
1869 return MTRR_TYPE_UNCACHABLE;
1872 if (prev_match != 0xFF)
1875 return mtrr_state->def_type;
1878 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1882 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1883 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1884 if (mtrr == 0xfe || mtrr == 0xff)
1885 mtrr = MTRR_TYPE_WRBACK;
1888 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
1890 static void __kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1892 trace_kvm_mmu_unsync_page(sp);
1893 ++vcpu->kvm->stat.mmu_unsync;
1896 kvm_mmu_mark_parents_unsync(sp);
1897 mmu_convert_notrap(sp);
1900 static void kvm_unsync_pages(struct kvm_vcpu *vcpu, gfn_t gfn)
1902 struct kvm_mmu_page *s;
1903 struct hlist_node *node;
1905 for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1908 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
1909 __kvm_unsync_page(vcpu, s);
1913 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1916 struct kvm_mmu_page *s;
1917 struct hlist_node *node;
1918 bool need_unsync = false;
1920 for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1924 if (s->role.level != PT_PAGE_TABLE_LEVEL)
1927 if (!need_unsync && !s->unsync) {
1934 kvm_unsync_pages(vcpu, gfn);
1938 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1939 unsigned pte_access, int user_fault,
1940 int write_fault, int dirty, int level,
1941 gfn_t gfn, pfn_t pfn, bool speculative,
1942 bool can_unsync, bool reset_host_protection)
1948 * We don't set the accessed bit, since we sometimes want to see
1949 * whether the guest actually used the pte (in order to detect
1952 spte = shadow_base_present_pte;
1954 spte |= shadow_accessed_mask;
1956 pte_access &= ~ACC_WRITE_MASK;
1957 if (pte_access & ACC_EXEC_MASK)
1958 spte |= shadow_x_mask;
1960 spte |= shadow_nx_mask;
1961 if (pte_access & ACC_USER_MASK)
1962 spte |= shadow_user_mask;
1963 if (level > PT_PAGE_TABLE_LEVEL)
1964 spte |= PT_PAGE_SIZE_MASK;
1966 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1967 kvm_is_mmio_pfn(pfn));
1969 if (reset_host_protection)
1970 spte |= SPTE_HOST_WRITEABLE;
1972 spte |= (u64)pfn << PAGE_SHIFT;
1974 if ((pte_access & ACC_WRITE_MASK)
1975 || (!tdp_enabled && write_fault && !is_write_protection(vcpu)
1978 if (level > PT_PAGE_TABLE_LEVEL &&
1979 has_wrprotected_page(vcpu->kvm, gfn, level)) {
1981 drop_spte(vcpu->kvm, sptep, shadow_trap_nonpresent_pte);
1985 spte |= PT_WRITABLE_MASK;
1987 if (!tdp_enabled && !(pte_access & ACC_WRITE_MASK))
1988 spte &= ~PT_USER_MASK;
1991 * Optimization: for pte sync, if spte was writable the hash
1992 * lookup is unnecessary (and expensive). Write protection
1993 * is responsibility of mmu_get_page / kvm_sync_page.
1994 * Same reasoning can be applied to dirty page accounting.
1996 if (!can_unsync && is_writable_pte(*sptep))
1999 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
2000 pgprintk("%s: found shadow page for %lx, marking ro\n",
2003 pte_access &= ~ACC_WRITE_MASK;
2004 if (is_writable_pte(spte))
2005 spte &= ~PT_WRITABLE_MASK;
2009 if (pte_access & ACC_WRITE_MASK)
2010 mark_page_dirty(vcpu->kvm, gfn);
2013 update_spte(sptep, spte);
2018 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
2019 unsigned pt_access, unsigned pte_access,
2020 int user_fault, int write_fault, int dirty,
2021 int *ptwrite, int level, gfn_t gfn,
2022 pfn_t pfn, bool speculative,
2023 bool reset_host_protection)
2025 int was_rmapped = 0;
2028 pgprintk("%s: spte %llx access %x write_fault %d"
2029 " user_fault %d gfn %lx\n",
2030 __func__, *sptep, pt_access,
2031 write_fault, user_fault, gfn);
2033 if (is_rmap_spte(*sptep)) {
2035 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
2036 * the parent of the now unreachable PTE.
2038 if (level > PT_PAGE_TABLE_LEVEL &&
2039 !is_large_pte(*sptep)) {
2040 struct kvm_mmu_page *child;
2043 child = page_header(pte & PT64_BASE_ADDR_MASK);
2044 mmu_page_remove_parent_pte(child, sptep);
2045 __set_spte(sptep, shadow_trap_nonpresent_pte);
2046 kvm_flush_remote_tlbs(vcpu->kvm);
2047 } else if (pfn != spte_to_pfn(*sptep)) {
2048 pgprintk("hfn old %lx new %lx\n",
2049 spte_to_pfn(*sptep), pfn);
2050 drop_spte(vcpu->kvm, sptep, shadow_trap_nonpresent_pte);
2051 kvm_flush_remote_tlbs(vcpu->kvm);
2056 if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
2057 dirty, level, gfn, pfn, speculative, true,
2058 reset_host_protection)) {
2061 kvm_mmu_flush_tlb(vcpu);
2064 pgprintk("%s: setting spte %llx\n", __func__, *sptep);
2065 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
2066 is_large_pte(*sptep)? "2MB" : "4kB",
2067 *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
2069 if (!was_rmapped && is_large_pte(*sptep))
2070 ++vcpu->kvm->stat.lpages;
2072 page_header_update_slot(vcpu->kvm, sptep, gfn);
2074 rmap_count = rmap_add(vcpu, sptep, gfn);
2075 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
2076 rmap_recycle(vcpu, sptep, gfn);
2078 kvm_release_pfn_clean(pfn);
2080 vcpu->arch.last_pte_updated = sptep;
2081 vcpu->arch.last_pte_gfn = gfn;
2085 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
2089 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
2090 int level, gfn_t gfn, pfn_t pfn)
2092 struct kvm_shadow_walk_iterator iterator;
2093 struct kvm_mmu_page *sp;
2097 for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
2098 if (iterator.level == level) {
2099 mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
2100 0, write, 1, &pt_write,
2101 level, gfn, pfn, false, true);
2102 ++vcpu->stat.pf_fixed;
2106 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
2107 u64 base_addr = iterator.addr;
2109 base_addr &= PT64_LVL_ADDR_MASK(iterator.level);
2110 pseudo_gfn = base_addr >> PAGE_SHIFT;
2111 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
2113 1, ACC_ALL, iterator.sptep);
2115 pgprintk("nonpaging_map: ENOMEM\n");
2116 kvm_release_pfn_clean(pfn);
2120 __set_spte(iterator.sptep,
2122 | PT_PRESENT_MASK | PT_WRITABLE_MASK
2123 | shadow_user_mask | shadow_x_mask);
2129 static void kvm_send_hwpoison_signal(struct kvm *kvm, gfn_t gfn)
2135 /* Touch the page, so send SIGBUS */
2136 hva = (void __user *)gfn_to_hva(kvm, gfn);
2137 r = copy_from_user(buf, hva, 1);
2140 static int kvm_handle_bad_page(struct kvm *kvm, gfn_t gfn, pfn_t pfn)
2142 kvm_release_pfn_clean(pfn);
2143 if (is_hwpoison_pfn(pfn)) {
2144 kvm_send_hwpoison_signal(kvm, gfn);
2146 } else if (is_fault_pfn(pfn))
2152 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
2157 unsigned long mmu_seq;
2159 level = mapping_level(vcpu, gfn);
2162 * This path builds a PAE pagetable - so we can map 2mb pages at
2163 * maximum. Therefore check if the level is larger than that.
2165 if (level > PT_DIRECTORY_LEVEL)
2166 level = PT_DIRECTORY_LEVEL;
2168 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2170 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2172 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2175 if (is_error_pfn(pfn))
2176 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2178 spin_lock(&vcpu->kvm->mmu_lock);
2179 if (mmu_notifier_retry(vcpu, mmu_seq))
2181 kvm_mmu_free_some_pages(vcpu);
2182 r = __direct_map(vcpu, v, write, level, gfn, pfn);
2183 spin_unlock(&vcpu->kvm->mmu_lock);
2189 spin_unlock(&vcpu->kvm->mmu_lock);
2190 kvm_release_pfn_clean(pfn);
2195 static void mmu_free_roots(struct kvm_vcpu *vcpu)
2198 struct kvm_mmu_page *sp;
2199 LIST_HEAD(invalid_list);
2201 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2203 spin_lock(&vcpu->kvm->mmu_lock);
2204 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2205 hpa_t root = vcpu->arch.mmu.root_hpa;
2207 sp = page_header(root);
2209 if (!sp->root_count && sp->role.invalid) {
2210 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list);
2211 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2213 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2214 spin_unlock(&vcpu->kvm->mmu_lock);
2217 for (i = 0; i < 4; ++i) {
2218 hpa_t root = vcpu->arch.mmu.pae_root[i];
2221 root &= PT64_BASE_ADDR_MASK;
2222 sp = page_header(root);
2224 if (!sp->root_count && sp->role.invalid)
2225 kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
2228 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2230 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2231 spin_unlock(&vcpu->kvm->mmu_lock);
2232 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2235 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
2239 if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
2240 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2247 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
2251 struct kvm_mmu_page *sp;
2255 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
2257 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2258 hpa_t root = vcpu->arch.mmu.root_hpa;
2260 ASSERT(!VALID_PAGE(root));
2261 if (mmu_check_root(vcpu, root_gfn))
2267 spin_lock(&vcpu->kvm->mmu_lock);
2268 kvm_mmu_free_some_pages(vcpu);
2269 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
2270 PT64_ROOT_LEVEL, direct,
2272 root = __pa(sp->spt);
2274 spin_unlock(&vcpu->kvm->mmu_lock);
2275 vcpu->arch.mmu.root_hpa = root;
2278 direct = !is_paging(vcpu);
2279 for (i = 0; i < 4; ++i) {
2280 hpa_t root = vcpu->arch.mmu.pae_root[i];
2282 ASSERT(!VALID_PAGE(root));
2283 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
2284 pdptr = kvm_pdptr_read(vcpu, i);
2285 if (!is_present_gpte(pdptr)) {
2286 vcpu->arch.mmu.pae_root[i] = 0;
2289 root_gfn = pdptr >> PAGE_SHIFT;
2290 } else if (vcpu->arch.mmu.root_level == 0)
2292 if (mmu_check_root(vcpu, root_gfn))
2298 spin_lock(&vcpu->kvm->mmu_lock);
2299 kvm_mmu_free_some_pages(vcpu);
2300 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
2301 PT32_ROOT_LEVEL, direct,
2303 root = __pa(sp->spt);
2305 spin_unlock(&vcpu->kvm->mmu_lock);
2307 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
2309 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2313 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2316 struct kvm_mmu_page *sp;
2318 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2320 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2321 hpa_t root = vcpu->arch.mmu.root_hpa;
2322 sp = page_header(root);
2323 mmu_sync_children(vcpu, sp);
2326 for (i = 0; i < 4; ++i) {
2327 hpa_t root = vcpu->arch.mmu.pae_root[i];
2329 if (root && VALID_PAGE(root)) {
2330 root &= PT64_BASE_ADDR_MASK;
2331 sp = page_header(root);
2332 mmu_sync_children(vcpu, sp);
2337 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2339 spin_lock(&vcpu->kvm->mmu_lock);
2340 mmu_sync_roots(vcpu);
2341 spin_unlock(&vcpu->kvm->mmu_lock);
2344 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr,
2345 u32 access, u32 *error)
2352 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2358 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2359 r = mmu_topup_memory_caches(vcpu);
2364 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2366 gfn = gva >> PAGE_SHIFT;
2368 return nonpaging_map(vcpu, gva & PAGE_MASK,
2369 error_code & PFERR_WRITE_MASK, gfn);
2372 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2378 gfn_t gfn = gpa >> PAGE_SHIFT;
2379 unsigned long mmu_seq;
2382 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2384 r = mmu_topup_memory_caches(vcpu);
2388 level = mapping_level(vcpu, gfn);
2390 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2392 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2394 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2395 if (is_error_pfn(pfn))
2396 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2397 spin_lock(&vcpu->kvm->mmu_lock);
2398 if (mmu_notifier_retry(vcpu, mmu_seq))
2400 kvm_mmu_free_some_pages(vcpu);
2401 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
2403 spin_unlock(&vcpu->kvm->mmu_lock);
2408 spin_unlock(&vcpu->kvm->mmu_lock);
2409 kvm_release_pfn_clean(pfn);
2413 static void nonpaging_free(struct kvm_vcpu *vcpu)
2415 mmu_free_roots(vcpu);
2418 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2420 struct kvm_mmu *context = &vcpu->arch.mmu;
2422 context->new_cr3 = nonpaging_new_cr3;
2423 context->page_fault = nonpaging_page_fault;
2424 context->gva_to_gpa = nonpaging_gva_to_gpa;
2425 context->free = nonpaging_free;
2426 context->prefetch_page = nonpaging_prefetch_page;
2427 context->sync_page = nonpaging_sync_page;
2428 context->invlpg = nonpaging_invlpg;
2429 context->root_level = 0;
2430 context->shadow_root_level = PT32E_ROOT_LEVEL;
2431 context->root_hpa = INVALID_PAGE;
2435 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2437 ++vcpu->stat.tlb_flush;
2438 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
2441 static void paging_new_cr3(struct kvm_vcpu *vcpu)
2443 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
2444 mmu_free_roots(vcpu);
2447 static void inject_page_fault(struct kvm_vcpu *vcpu,
2451 kvm_inject_page_fault(vcpu, addr, err_code);
2454 static void paging_free(struct kvm_vcpu *vcpu)
2456 nonpaging_free(vcpu);
2459 static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
2463 bit7 = (gpte >> 7) & 1;
2464 return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
2468 #include "paging_tmpl.h"
2472 #include "paging_tmpl.h"
2475 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
2477 struct kvm_mmu *context = &vcpu->arch.mmu;
2478 int maxphyaddr = cpuid_maxphyaddr(vcpu);
2479 u64 exb_bit_rsvd = 0;
2482 exb_bit_rsvd = rsvd_bits(63, 63);
2484 case PT32_ROOT_LEVEL:
2485 /* no rsvd bits for 2 level 4K page table entries */
2486 context->rsvd_bits_mask[0][1] = 0;
2487 context->rsvd_bits_mask[0][0] = 0;
2488 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2490 if (!is_pse(vcpu)) {
2491 context->rsvd_bits_mask[1][1] = 0;
2495 if (is_cpuid_PSE36())
2496 /* 36bits PSE 4MB page */
2497 context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2499 /* 32 bits PSE 4MB page */
2500 context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
2502 case PT32E_ROOT_LEVEL:
2503 context->rsvd_bits_mask[0][2] =
2504 rsvd_bits(maxphyaddr, 63) |
2505 rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
2506 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2507 rsvd_bits(maxphyaddr, 62); /* PDE */
2508 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2509 rsvd_bits(maxphyaddr, 62); /* PTE */
2510 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2511 rsvd_bits(maxphyaddr, 62) |
2512 rsvd_bits(13, 20); /* large page */
2513 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2515 case PT64_ROOT_LEVEL:
2516 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2517 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2518 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2519 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2520 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2521 rsvd_bits(maxphyaddr, 51);
2522 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2523 rsvd_bits(maxphyaddr, 51);
2524 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2525 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
2526 rsvd_bits(maxphyaddr, 51) |
2528 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2529 rsvd_bits(maxphyaddr, 51) |
2530 rsvd_bits(13, 20); /* large page */
2531 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2536 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
2538 struct kvm_mmu *context = &vcpu->arch.mmu;
2540 ASSERT(is_pae(vcpu));
2541 context->new_cr3 = paging_new_cr3;
2542 context->page_fault = paging64_page_fault;
2543 context->gva_to_gpa = paging64_gva_to_gpa;
2544 context->prefetch_page = paging64_prefetch_page;
2545 context->sync_page = paging64_sync_page;
2546 context->invlpg = paging64_invlpg;
2547 context->free = paging_free;
2548 context->root_level = level;
2549 context->shadow_root_level = level;
2550 context->root_hpa = INVALID_PAGE;
2554 static int paging64_init_context(struct kvm_vcpu *vcpu)
2556 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2557 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2560 static int paging32_init_context(struct kvm_vcpu *vcpu)
2562 struct kvm_mmu *context = &vcpu->arch.mmu;
2564 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2565 context->new_cr3 = paging_new_cr3;
2566 context->page_fault = paging32_page_fault;
2567 context->gva_to_gpa = paging32_gva_to_gpa;
2568 context->free = paging_free;
2569 context->prefetch_page = paging32_prefetch_page;
2570 context->sync_page = paging32_sync_page;
2571 context->invlpg = paging32_invlpg;
2572 context->root_level = PT32_ROOT_LEVEL;
2573 context->shadow_root_level = PT32E_ROOT_LEVEL;
2574 context->root_hpa = INVALID_PAGE;
2578 static int paging32E_init_context(struct kvm_vcpu *vcpu)
2580 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2581 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
2584 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2586 struct kvm_mmu *context = &vcpu->arch.mmu;
2588 context->new_cr3 = nonpaging_new_cr3;
2589 context->page_fault = tdp_page_fault;
2590 context->free = nonpaging_free;
2591 context->prefetch_page = nonpaging_prefetch_page;
2592 context->sync_page = nonpaging_sync_page;
2593 context->invlpg = nonpaging_invlpg;
2594 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2595 context->root_hpa = INVALID_PAGE;
2597 if (!is_paging(vcpu)) {
2598 context->gva_to_gpa = nonpaging_gva_to_gpa;
2599 context->root_level = 0;
2600 } else if (is_long_mode(vcpu)) {
2601 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2602 context->gva_to_gpa = paging64_gva_to_gpa;
2603 context->root_level = PT64_ROOT_LEVEL;
2604 } else if (is_pae(vcpu)) {
2605 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2606 context->gva_to_gpa = paging64_gva_to_gpa;
2607 context->root_level = PT32E_ROOT_LEVEL;
2609 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2610 context->gva_to_gpa = paging32_gva_to_gpa;
2611 context->root_level = PT32_ROOT_LEVEL;
2617 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2622 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2624 if (!is_paging(vcpu))
2625 r = nonpaging_init_context(vcpu);
2626 else if (is_long_mode(vcpu))
2627 r = paging64_init_context(vcpu);
2628 else if (is_pae(vcpu))
2629 r = paging32E_init_context(vcpu);
2631 r = paging32_init_context(vcpu);
2633 vcpu->arch.mmu.base_role.cr4_pae = !!is_pae(vcpu);
2634 vcpu->arch.mmu.base_role.cr0_wp = is_write_protection(vcpu);
2639 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2641 vcpu->arch.update_pte.pfn = bad_pfn;
2644 return init_kvm_tdp_mmu(vcpu);
2646 return init_kvm_softmmu(vcpu);
2649 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2652 if (VALID_PAGE(vcpu->arch.mmu.root_hpa))
2653 /* mmu.free() should set root_hpa = INVALID_PAGE */
2654 vcpu->arch.mmu.free(vcpu);
2657 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
2659 destroy_kvm_mmu(vcpu);
2660 return init_kvm_mmu(vcpu);
2662 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
2664 int kvm_mmu_load(struct kvm_vcpu *vcpu)
2668 r = mmu_topup_memory_caches(vcpu);
2671 r = mmu_alloc_roots(vcpu);
2672 spin_lock(&vcpu->kvm->mmu_lock);
2673 mmu_sync_roots(vcpu);
2674 spin_unlock(&vcpu->kvm->mmu_lock);
2677 /* set_cr3() should ensure TLB has been flushed */
2678 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
2682 EXPORT_SYMBOL_GPL(kvm_mmu_load);
2684 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2686 mmu_free_roots(vcpu);
2689 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
2690 struct kvm_mmu_page *sp,
2694 struct kvm_mmu_page *child;
2697 if (is_shadow_present_pte(pte)) {
2698 if (is_last_spte(pte, sp->role.level))
2699 drop_spte(vcpu->kvm, spte, shadow_trap_nonpresent_pte);
2701 child = page_header(pte & PT64_BASE_ADDR_MASK);
2702 mmu_page_remove_parent_pte(child, spte);
2705 __set_spte(spte, shadow_trap_nonpresent_pte);
2706 if (is_large_pte(pte))
2707 --vcpu->kvm->stat.lpages;
2710 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
2711 struct kvm_mmu_page *sp,
2715 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2716 ++vcpu->kvm->stat.mmu_pde_zapped;
2720 if (is_rsvd_bits_set(vcpu, *(u64 *)new, PT_PAGE_TABLE_LEVEL))
2723 ++vcpu->kvm->stat.mmu_pte_updated;
2724 if (!sp->role.cr4_pae)
2725 paging32_update_pte(vcpu, sp, spte, new);
2727 paging64_update_pte(vcpu, sp, spte, new);
2730 static bool need_remote_flush(u64 old, u64 new)
2732 if (!is_shadow_present_pte(old))
2734 if (!is_shadow_present_pte(new))
2736 if ((old ^ new) & PT64_BASE_ADDR_MASK)
2738 old ^= PT64_NX_MASK;
2739 new ^= PT64_NX_MASK;
2740 return (old & ~new & PT64_PERM_MASK) != 0;
2743 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, bool zap_page,
2744 bool remote_flush, bool local_flush)
2750 kvm_flush_remote_tlbs(vcpu->kvm);
2751 else if (local_flush)
2752 kvm_mmu_flush_tlb(vcpu);
2755 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2757 u64 *spte = vcpu->arch.last_pte_updated;
2759 return !!(spte && (*spte & shadow_accessed_mask));
2762 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2768 if (!is_present_gpte(gpte))
2770 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
2772 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
2774 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2776 if (is_error_pfn(pfn)) {
2777 kvm_release_pfn_clean(pfn);
2780 vcpu->arch.update_pte.gfn = gfn;
2781 vcpu->arch.update_pte.pfn = pfn;
2784 static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2786 u64 *spte = vcpu->arch.last_pte_updated;
2789 && vcpu->arch.last_pte_gfn == gfn
2790 && shadow_accessed_mask
2791 && !(*spte & shadow_accessed_mask)
2792 && is_shadow_present_pte(*spte))
2793 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2796 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2797 const u8 *new, int bytes,
2798 bool guest_initiated)
2800 gfn_t gfn = gpa >> PAGE_SHIFT;
2801 union kvm_mmu_page_role mask = { .word = 0 };
2802 struct kvm_mmu_page *sp;
2803 struct hlist_node *node;
2804 LIST_HEAD(invalid_list);
2807 unsigned offset = offset_in_page(gpa);
2809 unsigned page_offset;
2810 unsigned misaligned;
2817 bool remote_flush, local_flush, zap_page;
2819 zap_page = remote_flush = local_flush = false;
2821 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
2823 invlpg_counter = atomic_read(&vcpu->kvm->arch.invlpg_counter);
2826 * Assume that the pte write on a page table of the same type
2827 * as the current vcpu paging mode. This is nearly always true
2828 * (might be false while changing modes). Note it is verified later
2831 if ((is_pae(vcpu) && bytes == 4) || !new) {
2832 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2837 r = kvm_read_guest(vcpu->kvm, gpa, &gentry, min(bytes, 8));
2840 new = (const u8 *)&gentry;
2845 gentry = *(const u32 *)new;
2848 gentry = *(const u64 *)new;
2855 mmu_guess_page_from_pte_write(vcpu, gpa, gentry);
2856 spin_lock(&vcpu->kvm->mmu_lock);
2857 if (atomic_read(&vcpu->kvm->arch.invlpg_counter) != invlpg_counter)
2859 kvm_mmu_access_page(vcpu, gfn);
2860 kvm_mmu_free_some_pages(vcpu);
2861 ++vcpu->kvm->stat.mmu_pte_write;
2862 kvm_mmu_audit(vcpu, "pre pte write");
2863 if (guest_initiated) {
2864 if (gfn == vcpu->arch.last_pt_write_gfn
2865 && !last_updated_pte_accessed(vcpu)) {
2866 ++vcpu->arch.last_pt_write_count;
2867 if (vcpu->arch.last_pt_write_count >= 3)
2870 vcpu->arch.last_pt_write_gfn = gfn;
2871 vcpu->arch.last_pt_write_count = 1;
2872 vcpu->arch.last_pte_updated = NULL;
2876 mask.cr0_wp = mask.cr4_pae = mask.nxe = 1;
2877 for_each_gfn_indirect_valid_sp(vcpu->kvm, sp, gfn, node) {
2878 pte_size = sp->role.cr4_pae ? 8 : 4;
2879 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
2880 misaligned |= bytes < 4;
2881 if (misaligned || flooded) {
2883 * Misaligned accesses are too much trouble to fix
2884 * up; also, they usually indicate a page is not used
2887 * If we're seeing too many writes to a page,
2888 * it may no longer be a page table, or we may be
2889 * forking, in which case it is better to unmap the
2892 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
2893 gpa, bytes, sp->role.word);
2894 zap_page |= !!kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
2896 ++vcpu->kvm->stat.mmu_flooded;
2899 page_offset = offset;
2900 level = sp->role.level;
2902 if (!sp->role.cr4_pae) {
2903 page_offset <<= 1; /* 32->64 */
2905 * A 32-bit pde maps 4MB while the shadow pdes map
2906 * only 2MB. So we need to double the offset again
2907 * and zap two pdes instead of one.
2909 if (level == PT32_ROOT_LEVEL) {
2910 page_offset &= ~7; /* kill rounding error */
2914 quadrant = page_offset >> PAGE_SHIFT;
2915 page_offset &= ~PAGE_MASK;
2916 if (quadrant != sp->role.quadrant)
2920 spte = &sp->spt[page_offset / sizeof(*spte)];
2923 mmu_pte_write_zap_pte(vcpu, sp, spte);
2925 !((sp->role.word ^ vcpu->arch.mmu.base_role.word)
2927 mmu_pte_write_new_pte(vcpu, sp, spte, &gentry);
2928 if (!remote_flush && need_remote_flush(entry, *spte))
2929 remote_flush = true;
2933 mmu_pte_write_flush_tlb(vcpu, zap_page, remote_flush, local_flush);
2934 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2935 kvm_mmu_audit(vcpu, "post pte write");
2936 spin_unlock(&vcpu->kvm->mmu_lock);
2937 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2938 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2939 vcpu->arch.update_pte.pfn = bad_pfn;
2943 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2951 gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
2953 spin_lock(&vcpu->kvm->mmu_lock);
2954 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2955 spin_unlock(&vcpu->kvm->mmu_lock);
2958 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
2960 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
2962 LIST_HEAD(invalid_list);
2964 while (kvm_mmu_available_pages(vcpu->kvm) < KVM_REFILL_PAGES &&
2965 !list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2966 struct kvm_mmu_page *sp;
2968 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
2969 struct kvm_mmu_page, link);
2970 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list);
2971 ++vcpu->kvm->stat.mmu_recycled;
2973 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2976 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2979 enum emulation_result er;
2981 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
2990 r = mmu_topup_memory_caches(vcpu);
2994 er = emulate_instruction(vcpu, cr2, error_code, 0);
2999 case EMULATE_DO_MMIO:
3000 ++vcpu->stat.mmio_exits;
3010 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
3012 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
3014 vcpu->arch.mmu.invlpg(vcpu, gva);
3015 kvm_mmu_flush_tlb(vcpu);
3016 ++vcpu->stat.invlpg;
3018 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
3020 void kvm_enable_tdp(void)
3024 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
3026 void kvm_disable_tdp(void)
3028 tdp_enabled = false;
3030 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
3032 static void free_mmu_pages(struct kvm_vcpu *vcpu)
3034 free_page((unsigned long)vcpu->arch.mmu.pae_root);
3037 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
3045 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
3046 * Therefore we need to allocate shadow page tables in the first
3047 * 4GB of memory, which happens to fit the DMA32 zone.
3049 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
3053 vcpu->arch.mmu.pae_root = page_address(page);
3054 for (i = 0; i < 4; ++i)
3055 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
3060 int kvm_mmu_create(struct kvm_vcpu *vcpu)
3063 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
3065 return alloc_mmu_pages(vcpu);
3068 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
3071 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
3073 return init_kvm_mmu(vcpu);
3076 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
3080 destroy_kvm_mmu(vcpu);
3081 free_mmu_pages(vcpu);
3082 mmu_free_memory_caches(vcpu);
3085 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
3087 struct kvm_mmu_page *sp;
3089 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
3093 if (!test_bit(slot, sp->slot_bitmap))
3097 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
3099 if (is_writable_pte(pt[i]))
3100 pt[i] &= ~PT_WRITABLE_MASK;
3102 kvm_flush_remote_tlbs(kvm);
3105 void kvm_mmu_zap_all(struct kvm *kvm)
3107 struct kvm_mmu_page *sp, *node;
3108 LIST_HEAD(invalid_list);
3110 spin_lock(&kvm->mmu_lock);
3112 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
3113 if (kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list))
3116 kvm_mmu_commit_zap_page(kvm, &invalid_list);
3117 spin_unlock(&kvm->mmu_lock);
3120 static int kvm_mmu_remove_some_alloc_mmu_pages(struct kvm *kvm,
3121 struct list_head *invalid_list)
3123 struct kvm_mmu_page *page;
3125 page = container_of(kvm->arch.active_mmu_pages.prev,
3126 struct kvm_mmu_page, link);
3127 return kvm_mmu_prepare_zap_page(kvm, page, invalid_list);
3130 static int mmu_shrink(struct shrinker *shrink, int nr_to_scan, gfp_t gfp_mask)
3133 struct kvm *kvm_freed = NULL;
3134 int cache_count = 0;
3136 spin_lock(&kvm_lock);
3138 list_for_each_entry(kvm, &vm_list, vm_list) {
3139 int npages, idx, freed_pages;
3140 LIST_HEAD(invalid_list);
3142 idx = srcu_read_lock(&kvm->srcu);
3143 spin_lock(&kvm->mmu_lock);
3144 npages = kvm->arch.n_alloc_mmu_pages -
3145 kvm_mmu_available_pages(kvm);
3146 cache_count += npages;
3147 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
3148 freed_pages = kvm_mmu_remove_some_alloc_mmu_pages(kvm,
3150 cache_count -= freed_pages;
3155 kvm_mmu_commit_zap_page(kvm, &invalid_list);
3156 spin_unlock(&kvm->mmu_lock);
3157 srcu_read_unlock(&kvm->srcu, idx);
3160 list_move_tail(&kvm_freed->vm_list, &vm_list);
3162 spin_unlock(&kvm_lock);
3167 static struct shrinker mmu_shrinker = {
3168 .shrink = mmu_shrink,
3169 .seeks = DEFAULT_SEEKS * 10,
3172 static void mmu_destroy_caches(void)
3174 if (pte_chain_cache)
3175 kmem_cache_destroy(pte_chain_cache);
3176 if (rmap_desc_cache)
3177 kmem_cache_destroy(rmap_desc_cache);
3178 if (mmu_page_header_cache)
3179 kmem_cache_destroy(mmu_page_header_cache);
3182 void kvm_mmu_module_exit(void)
3184 mmu_destroy_caches();
3185 unregister_shrinker(&mmu_shrinker);
3188 int kvm_mmu_module_init(void)
3190 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
3191 sizeof(struct kvm_pte_chain),
3193 if (!pte_chain_cache)
3195 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
3196 sizeof(struct kvm_rmap_desc),
3198 if (!rmap_desc_cache)
3201 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
3202 sizeof(struct kvm_mmu_page),
3204 if (!mmu_page_header_cache)
3207 register_shrinker(&mmu_shrinker);
3212 mmu_destroy_caches();
3217 * Caculate mmu pages needed for kvm.
3219 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
3222 unsigned int nr_mmu_pages;
3223 unsigned int nr_pages = 0;
3224 struct kvm_memslots *slots;
3226 slots = kvm_memslots(kvm);
3228 for (i = 0; i < slots->nmemslots; i++)
3229 nr_pages += slots->memslots[i].npages;
3231 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
3232 nr_mmu_pages = max(nr_mmu_pages,
3233 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
3235 return nr_mmu_pages;
3238 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3241 if (len > buffer->len)
3246 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3251 ret = pv_mmu_peek_buffer(buffer, len);
3256 buffer->processed += len;
3260 static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
3261 gpa_t addr, gpa_t value)
3266 if (!is_long_mode(vcpu) && !is_pae(vcpu))
3269 r = mmu_topup_memory_caches(vcpu);
3273 if (!emulator_write_phys(vcpu, addr, &value, bytes))
3279 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3281 (void)kvm_set_cr3(vcpu, vcpu->arch.cr3);
3285 static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
3287 spin_lock(&vcpu->kvm->mmu_lock);
3288 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
3289 spin_unlock(&vcpu->kvm->mmu_lock);
3293 static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
3294 struct kvm_pv_mmu_op_buffer *buffer)
3296 struct kvm_mmu_op_header *header;
3298 header = pv_mmu_peek_buffer(buffer, sizeof *header);
3301 switch (header->op) {
3302 case KVM_MMU_OP_WRITE_PTE: {
3303 struct kvm_mmu_op_write_pte *wpte;
3305 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
3308 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
3311 case KVM_MMU_OP_FLUSH_TLB: {
3312 struct kvm_mmu_op_flush_tlb *ftlb;
3314 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3317 return kvm_pv_mmu_flush_tlb(vcpu);
3319 case KVM_MMU_OP_RELEASE_PT: {
3320 struct kvm_mmu_op_release_pt *rpt;
3322 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3325 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3331 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3332 gpa_t addr, unsigned long *ret)
3335 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
3337 buffer->ptr = buffer->buf;
3338 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3339 buffer->processed = 0;
3341 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
3345 while (buffer->len) {
3346 r = kvm_pv_mmu_op_one(vcpu, buffer);
3355 *ret = buffer->processed;
3359 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3361 struct kvm_shadow_walk_iterator iterator;
3364 spin_lock(&vcpu->kvm->mmu_lock);
3365 for_each_shadow_entry(vcpu, addr, iterator) {
3366 sptes[iterator.level-1] = *iterator.sptep;
3368 if (!is_shadow_present_pte(*iterator.sptep))
3371 spin_unlock(&vcpu->kvm->mmu_lock);
3375 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3379 static const char *audit_msg;
3381 static gva_t canonicalize(gva_t gva)
3383 #ifdef CONFIG_X86_64
3384 gva = (long long)(gva << 16) >> 16;
3390 typedef void (*inspect_spte_fn) (struct kvm *kvm, u64 *sptep);
3392 static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp,
3397 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3398 u64 ent = sp->spt[i];
3400 if (is_shadow_present_pte(ent)) {
3401 if (!is_last_spte(ent, sp->role.level)) {
3402 struct kvm_mmu_page *child;
3403 child = page_header(ent & PT64_BASE_ADDR_MASK);
3404 __mmu_spte_walk(kvm, child, fn);
3406 fn(kvm, &sp->spt[i]);
3411 static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn)
3414 struct kvm_mmu_page *sp;
3416 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3418 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3419 hpa_t root = vcpu->arch.mmu.root_hpa;
3420 sp = page_header(root);
3421 __mmu_spte_walk(vcpu->kvm, sp, fn);
3424 for (i = 0; i < 4; ++i) {
3425 hpa_t root = vcpu->arch.mmu.pae_root[i];
3427 if (root && VALID_PAGE(root)) {
3428 root &= PT64_BASE_ADDR_MASK;
3429 sp = page_header(root);
3430 __mmu_spte_walk(vcpu->kvm, sp, fn);
3436 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3437 gva_t va, int level)
3439 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3441 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3443 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3446 if (ent == shadow_trap_nonpresent_pte)
3449 va = canonicalize(va);
3450 if (is_shadow_present_pte(ent) && !is_last_spte(ent, level))
3451 audit_mappings_page(vcpu, ent, va, level - 1);
3453 gpa_t gpa = kvm_mmu_gva_to_gpa_read(vcpu, va, NULL);
3454 gfn_t gfn = gpa >> PAGE_SHIFT;
3455 pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
3456 hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
3458 if (is_error_pfn(pfn)) {
3459 kvm_release_pfn_clean(pfn);
3463 if (is_shadow_present_pte(ent)
3464 && (ent & PT64_BASE_ADDR_MASK) != hpa)
3465 printk(KERN_ERR "xx audit error: (%s) levels %d"
3466 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
3467 audit_msg, vcpu->arch.mmu.root_level,
3469 is_shadow_present_pte(ent));
3470 else if (ent == shadow_notrap_nonpresent_pte
3471 && !is_error_hpa(hpa))
3472 printk(KERN_ERR "audit: (%s) notrap shadow,"
3473 " valid guest gva %lx\n", audit_msg, va);
3474 kvm_release_pfn_clean(pfn);
3480 static void audit_mappings(struct kvm_vcpu *vcpu)
3484 if (vcpu->arch.mmu.root_level == 4)
3485 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
3487 for (i = 0; i < 4; ++i)
3488 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
3489 audit_mappings_page(vcpu,
3490 vcpu->arch.mmu.pae_root[i],
3495 static int count_rmaps(struct kvm_vcpu *vcpu)
3497 struct kvm *kvm = vcpu->kvm;
3498 struct kvm_memslots *slots;
3502 idx = srcu_read_lock(&kvm->srcu);
3503 slots = kvm_memslots(kvm);
3504 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3505 struct kvm_memory_slot *m = &slots->memslots[i];
3506 struct kvm_rmap_desc *d;
3508 for (j = 0; j < m->npages; ++j) {
3509 unsigned long *rmapp = &m->rmap[j];
3513 if (!(*rmapp & 1)) {
3517 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
3519 for (k = 0; k < RMAP_EXT; ++k)
3528 srcu_read_unlock(&kvm->srcu, idx);
3532 void inspect_spte_has_rmap(struct kvm *kvm, u64 *sptep)
3534 unsigned long *rmapp;
3535 struct kvm_mmu_page *rev_sp;
3538 if (is_writable_pte(*sptep)) {
3539 rev_sp = page_header(__pa(sptep));
3540 gfn = kvm_mmu_page_get_gfn(rev_sp, sptep - rev_sp->spt);
3542 if (!gfn_to_memslot(kvm, gfn)) {
3543 if (!printk_ratelimit())
3545 printk(KERN_ERR "%s: no memslot for gfn %ld\n",
3547 printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n",
3548 audit_msg, (long int)(sptep - rev_sp->spt),
3554 rmapp = gfn_to_rmap(kvm, gfn, rev_sp->role.level);
3556 if (!printk_ratelimit())
3558 printk(KERN_ERR "%s: no rmap for writable spte %llx\n",
3566 void audit_writable_sptes_have_rmaps(struct kvm_vcpu *vcpu)
3568 mmu_spte_walk(vcpu, inspect_spte_has_rmap);
3571 static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu)
3573 struct kvm_mmu_page *sp;
3576 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3579 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
3582 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3585 if (!(ent & PT_PRESENT_MASK))
3587 if (!is_writable_pte(ent))
3589 inspect_spte_has_rmap(vcpu->kvm, &pt[i]);
3595 static void audit_rmap(struct kvm_vcpu *vcpu)
3597 check_writable_mappings_rmap(vcpu);
3601 static void audit_write_protection(struct kvm_vcpu *vcpu)
3603 struct kvm_mmu_page *sp;
3604 struct kvm_memory_slot *slot;
3605 unsigned long *rmapp;
3609 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3610 if (sp->role.direct)
3615 slot = gfn_to_memslot(vcpu->kvm, sp->gfn);
3616 rmapp = &slot->rmap[gfn - slot->base_gfn];
3618 spte = rmap_next(vcpu->kvm, rmapp, NULL);
3620 if (is_writable_pte(*spte))
3621 printk(KERN_ERR "%s: (%s) shadow page has "
3622 "writable mappings: gfn %lx role %x\n",
3623 __func__, audit_msg, sp->gfn,
3625 spte = rmap_next(vcpu->kvm, rmapp, spte);
3630 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3637 audit_write_protection(vcpu);
3638 if (strcmp("pre pte write", audit_msg) != 0)
3639 audit_mappings(vcpu);
3640 audit_writable_sptes_have_rmaps(vcpu);