1 // SPDX-License-Identifier: GPL-2.0-only
3 * Kernel-based Virtual Machine driver for Linux
5 * This module enables machines with Intel VT-x extensions to run virtual
6 * machines without emulation or binary translation.
10 * Copyright (C) 2006 Qumranet, Inc.
11 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
14 * Yaniv Kamay <yaniv@qumranet.com>
15 * Avi Kivity <avi@qumranet.com>
21 #include "mmu_internal.h"
24 #include "kvm_cache_regs.h"
25 #include "kvm_emulate.h"
29 #include <linux/kvm_host.h>
30 #include <linux/types.h>
31 #include <linux/string.h>
33 #include <linux/highmem.h>
34 #include <linux/moduleparam.h>
35 #include <linux/export.h>
36 #include <linux/swap.h>
37 #include <linux/hugetlb.h>
38 #include <linux/compiler.h>
39 #include <linux/srcu.h>
40 #include <linux/slab.h>
41 #include <linux/sched/signal.h>
42 #include <linux/uaccess.h>
43 #include <linux/hash.h>
44 #include <linux/kern_levels.h>
45 #include <linux/kthread.h>
48 #include <asm/memtype.h>
49 #include <asm/cmpxchg.h>
51 #include <asm/set_memory.h>
53 #include <asm/kvm_page_track.h>
58 extern bool itlb_multihit_kvm_mitigation;
60 int __read_mostly nx_huge_pages = -1;
61 static uint __read_mostly nx_huge_pages_recovery_period_ms;
62 #ifdef CONFIG_PREEMPT_RT
63 /* Recovery can cause latency spikes, disable it for PREEMPT_RT. */
64 static uint __read_mostly nx_huge_pages_recovery_ratio = 0;
66 static uint __read_mostly nx_huge_pages_recovery_ratio = 60;
69 static int set_nx_huge_pages(const char *val, const struct kernel_param *kp);
70 static int set_nx_huge_pages_recovery_param(const char *val, const struct kernel_param *kp);
72 static const struct kernel_param_ops nx_huge_pages_ops = {
73 .set = set_nx_huge_pages,
74 .get = param_get_bool,
77 static const struct kernel_param_ops nx_huge_pages_recovery_param_ops = {
78 .set = set_nx_huge_pages_recovery_param,
79 .get = param_get_uint,
82 module_param_cb(nx_huge_pages, &nx_huge_pages_ops, &nx_huge_pages, 0644);
83 __MODULE_PARM_TYPE(nx_huge_pages, "bool");
84 module_param_cb(nx_huge_pages_recovery_ratio, &nx_huge_pages_recovery_param_ops,
85 &nx_huge_pages_recovery_ratio, 0644);
86 __MODULE_PARM_TYPE(nx_huge_pages_recovery_ratio, "uint");
87 module_param_cb(nx_huge_pages_recovery_period_ms, &nx_huge_pages_recovery_param_ops,
88 &nx_huge_pages_recovery_period_ms, 0644);
89 __MODULE_PARM_TYPE(nx_huge_pages_recovery_period_ms, "uint");
91 static bool __read_mostly force_flush_and_sync_on_reuse;
92 module_param_named(flush_on_reuse, force_flush_and_sync_on_reuse, bool, 0644);
95 * When setting this variable to true it enables Two-Dimensional-Paging
96 * where the hardware walks 2 page tables:
97 * 1. the guest-virtual to guest-physical
98 * 2. while doing 1. it walks guest-physical to host-physical
99 * If the hardware supports that we don't need to do shadow paging.
101 bool tdp_enabled = false;
103 static int max_huge_page_level __read_mostly;
104 static int tdp_root_level __read_mostly;
105 static int max_tdp_level __read_mostly;
109 module_param(dbg, bool, 0644);
112 #define PTE_PREFETCH_NUM 8
114 #define PT32_LEVEL_BITS 10
116 #define PT32_LEVEL_SHIFT(level) \
117 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
119 #define PT32_LVL_OFFSET_MASK(level) \
120 (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
121 * PT32_LEVEL_BITS))) - 1))
123 #define PT32_INDEX(address, level)\
124 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
127 #define PT32_BASE_ADDR_MASK PAGE_MASK
128 #define PT32_DIR_BASE_ADDR_MASK \
129 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
130 #define PT32_LVL_ADDR_MASK(level) \
131 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
132 * PT32_LEVEL_BITS))) - 1))
134 #include <trace/events/kvm.h>
136 /* make pte_list_desc fit well in cache lines */
137 #define PTE_LIST_EXT 14
140 * Slight optimization of cacheline layout, by putting `more' and `spte_count'
141 * at the start; then accessing it will only use one single cacheline for
142 * either full (entries==PTE_LIST_EXT) case or entries<=6.
144 struct pte_list_desc {
145 struct pte_list_desc *more;
147 * Stores number of entries stored in the pte_list_desc. No need to be
148 * u64 but just for easier alignment. When PTE_LIST_EXT, means full.
151 u64 *sptes[PTE_LIST_EXT];
154 struct kvm_shadow_walk_iterator {
162 #define for_each_shadow_entry_using_root(_vcpu, _root, _addr, _walker) \
163 for (shadow_walk_init_using_root(&(_walker), (_vcpu), \
165 shadow_walk_okay(&(_walker)); \
166 shadow_walk_next(&(_walker)))
168 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
169 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
170 shadow_walk_okay(&(_walker)); \
171 shadow_walk_next(&(_walker)))
173 #define for_each_shadow_entry_lockless(_vcpu, _addr, _walker, spte) \
174 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
175 shadow_walk_okay(&(_walker)) && \
176 ({ spte = mmu_spte_get_lockless(_walker.sptep); 1; }); \
177 __shadow_walk_next(&(_walker), spte))
179 static struct kmem_cache *pte_list_desc_cache;
180 struct kmem_cache *mmu_page_header_cache;
181 static struct percpu_counter kvm_total_used_mmu_pages;
183 static void mmu_spte_set(u64 *sptep, u64 spte);
185 struct kvm_mmu_role_regs {
186 const unsigned long cr0;
187 const unsigned long cr4;
191 #define CREATE_TRACE_POINTS
192 #include "mmutrace.h"
195 * Yes, lot's of underscores. They're a hint that you probably shouldn't be
196 * reading from the role_regs. Once the mmu_role is constructed, it becomes
197 * the single source of truth for the MMU's state.
199 #define BUILD_MMU_ROLE_REGS_ACCESSOR(reg, name, flag) \
200 static inline bool __maybe_unused ____is_##reg##_##name(struct kvm_mmu_role_regs *regs)\
202 return !!(regs->reg & flag); \
204 BUILD_MMU_ROLE_REGS_ACCESSOR(cr0, pg, X86_CR0_PG);
205 BUILD_MMU_ROLE_REGS_ACCESSOR(cr0, wp, X86_CR0_WP);
206 BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, pse, X86_CR4_PSE);
207 BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, pae, X86_CR4_PAE);
208 BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, smep, X86_CR4_SMEP);
209 BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, smap, X86_CR4_SMAP);
210 BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, pke, X86_CR4_PKE);
211 BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, la57, X86_CR4_LA57);
212 BUILD_MMU_ROLE_REGS_ACCESSOR(efer, nx, EFER_NX);
213 BUILD_MMU_ROLE_REGS_ACCESSOR(efer, lma, EFER_LMA);
216 * The MMU itself (with a valid role) is the single source of truth for the
217 * MMU. Do not use the regs used to build the MMU/role, nor the vCPU. The
218 * regs don't account for dependencies, e.g. clearing CR4 bits if CR0.PG=1,
219 * and the vCPU may be incorrect/irrelevant.
221 #define BUILD_MMU_ROLE_ACCESSOR(base_or_ext, reg, name) \
222 static inline bool __maybe_unused is_##reg##_##name(struct kvm_mmu *mmu) \
224 return !!(mmu->mmu_role. base_or_ext . reg##_##name); \
226 BUILD_MMU_ROLE_ACCESSOR(ext, cr0, pg);
227 BUILD_MMU_ROLE_ACCESSOR(base, cr0, wp);
228 BUILD_MMU_ROLE_ACCESSOR(ext, cr4, pse);
229 BUILD_MMU_ROLE_ACCESSOR(ext, cr4, pae);
230 BUILD_MMU_ROLE_ACCESSOR(ext, cr4, smep);
231 BUILD_MMU_ROLE_ACCESSOR(ext, cr4, smap);
232 BUILD_MMU_ROLE_ACCESSOR(ext, cr4, pke);
233 BUILD_MMU_ROLE_ACCESSOR(ext, cr4, la57);
234 BUILD_MMU_ROLE_ACCESSOR(base, efer, nx);
236 static struct kvm_mmu_role_regs vcpu_to_role_regs(struct kvm_vcpu *vcpu)
238 struct kvm_mmu_role_regs regs = {
239 .cr0 = kvm_read_cr0_bits(vcpu, KVM_MMU_CR0_ROLE_BITS),
240 .cr4 = kvm_read_cr4_bits(vcpu, KVM_MMU_CR4_ROLE_BITS),
241 .efer = vcpu->arch.efer,
247 static int role_regs_to_root_level(struct kvm_mmu_role_regs *regs)
249 if (!____is_cr0_pg(regs))
251 else if (____is_efer_lma(regs))
252 return ____is_cr4_la57(regs) ? PT64_ROOT_5LEVEL :
254 else if (____is_cr4_pae(regs))
255 return PT32E_ROOT_LEVEL;
257 return PT32_ROOT_LEVEL;
260 static inline bool kvm_available_flush_tlb_with_range(void)
262 return kvm_x86_ops.tlb_remote_flush_with_range;
265 static void kvm_flush_remote_tlbs_with_range(struct kvm *kvm,
266 struct kvm_tlb_range *range)
270 if (range && kvm_x86_ops.tlb_remote_flush_with_range)
271 ret = static_call(kvm_x86_tlb_remote_flush_with_range)(kvm, range);
274 kvm_flush_remote_tlbs(kvm);
277 void kvm_flush_remote_tlbs_with_address(struct kvm *kvm,
278 u64 start_gfn, u64 pages)
280 struct kvm_tlb_range range;
282 range.start_gfn = start_gfn;
285 kvm_flush_remote_tlbs_with_range(kvm, &range);
288 static void mark_mmio_spte(struct kvm_vcpu *vcpu, u64 *sptep, u64 gfn,
291 u64 spte = make_mmio_spte(vcpu, gfn, access);
293 trace_mark_mmio_spte(sptep, gfn, spte);
294 mmu_spte_set(sptep, spte);
297 static gfn_t get_mmio_spte_gfn(u64 spte)
299 u64 gpa = spte & shadow_nonpresent_or_rsvd_lower_gfn_mask;
301 gpa |= (spte >> SHADOW_NONPRESENT_OR_RSVD_MASK_LEN)
302 & shadow_nonpresent_or_rsvd_mask;
304 return gpa >> PAGE_SHIFT;
307 static unsigned get_mmio_spte_access(u64 spte)
309 return spte & shadow_mmio_access_mask;
312 static bool check_mmio_spte(struct kvm_vcpu *vcpu, u64 spte)
314 u64 kvm_gen, spte_gen, gen;
316 gen = kvm_vcpu_memslots(vcpu)->generation;
317 if (unlikely(gen & KVM_MEMSLOT_GEN_UPDATE_IN_PROGRESS))
320 kvm_gen = gen & MMIO_SPTE_GEN_MASK;
321 spte_gen = get_mmio_spte_generation(spte);
323 trace_check_mmio_spte(spte, kvm_gen, spte_gen);
324 return likely(kvm_gen == spte_gen);
327 static int is_cpuid_PSE36(void)
332 static gfn_t pse36_gfn_delta(u32 gpte)
334 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
336 return (gpte & PT32_DIR_PSE36_MASK) << shift;
340 static void __set_spte(u64 *sptep, u64 spte)
342 WRITE_ONCE(*sptep, spte);
345 static void __update_clear_spte_fast(u64 *sptep, u64 spte)
347 WRITE_ONCE(*sptep, spte);
350 static u64 __update_clear_spte_slow(u64 *sptep, u64 spte)
352 return xchg(sptep, spte);
355 static u64 __get_spte_lockless(u64 *sptep)
357 return READ_ONCE(*sptep);
368 static void count_spte_clear(u64 *sptep, u64 spte)
370 struct kvm_mmu_page *sp = sptep_to_sp(sptep);
372 if (is_shadow_present_pte(spte))
375 /* Ensure the spte is completely set before we increase the count */
377 sp->clear_spte_count++;
380 static void __set_spte(u64 *sptep, u64 spte)
382 union split_spte *ssptep, sspte;
384 ssptep = (union split_spte *)sptep;
385 sspte = (union split_spte)spte;
387 ssptep->spte_high = sspte.spte_high;
390 * If we map the spte from nonpresent to present, We should store
391 * the high bits firstly, then set present bit, so cpu can not
392 * fetch this spte while we are setting the spte.
396 WRITE_ONCE(ssptep->spte_low, sspte.spte_low);
399 static void __update_clear_spte_fast(u64 *sptep, u64 spte)
401 union split_spte *ssptep, sspte;
403 ssptep = (union split_spte *)sptep;
404 sspte = (union split_spte)spte;
406 WRITE_ONCE(ssptep->spte_low, sspte.spte_low);
409 * If we map the spte from present to nonpresent, we should clear
410 * present bit firstly to avoid vcpu fetch the old high bits.
414 ssptep->spte_high = sspte.spte_high;
415 count_spte_clear(sptep, spte);
418 static u64 __update_clear_spte_slow(u64 *sptep, u64 spte)
420 union split_spte *ssptep, sspte, orig;
422 ssptep = (union split_spte *)sptep;
423 sspte = (union split_spte)spte;
425 /* xchg acts as a barrier before the setting of the high bits */
426 orig.spte_low = xchg(&ssptep->spte_low, sspte.spte_low);
427 orig.spte_high = ssptep->spte_high;
428 ssptep->spte_high = sspte.spte_high;
429 count_spte_clear(sptep, spte);
435 * The idea using the light way get the spte on x86_32 guest is from
436 * gup_get_pte (mm/gup.c).
438 * An spte tlb flush may be pending, because kvm_set_pte_rmapp
439 * coalesces them and we are running out of the MMU lock. Therefore
440 * we need to protect against in-progress updates of the spte.
442 * Reading the spte while an update is in progress may get the old value
443 * for the high part of the spte. The race is fine for a present->non-present
444 * change (because the high part of the spte is ignored for non-present spte),
445 * but for a present->present change we must reread the spte.
447 * All such changes are done in two steps (present->non-present and
448 * non-present->present), hence it is enough to count the number of
449 * present->non-present updates: if it changed while reading the spte,
450 * we might have hit the race. This is done using clear_spte_count.
452 static u64 __get_spte_lockless(u64 *sptep)
454 struct kvm_mmu_page *sp = sptep_to_sp(sptep);
455 union split_spte spte, *orig = (union split_spte *)sptep;
459 count = sp->clear_spte_count;
462 spte.spte_low = orig->spte_low;
465 spte.spte_high = orig->spte_high;
468 if (unlikely(spte.spte_low != orig->spte_low ||
469 count != sp->clear_spte_count))
476 static bool spte_has_volatile_bits(u64 spte)
478 if (!is_shadow_present_pte(spte))
482 * Always atomically update spte if it can be updated
483 * out of mmu-lock, it can ensure dirty bit is not lost,
484 * also, it can help us to get a stable is_writable_pte()
485 * to ensure tlb flush is not missed.
487 if (spte_can_locklessly_be_made_writable(spte) ||
488 is_access_track_spte(spte))
491 if (spte_ad_enabled(spte)) {
492 if ((spte & shadow_accessed_mask) == 0 ||
493 (is_writable_pte(spte) && (spte & shadow_dirty_mask) == 0))
500 /* Rules for using mmu_spte_set:
501 * Set the sptep from nonpresent to present.
502 * Note: the sptep being assigned *must* be either not present
503 * or in a state where the hardware will not attempt to update
506 static void mmu_spte_set(u64 *sptep, u64 new_spte)
508 WARN_ON(is_shadow_present_pte(*sptep));
509 __set_spte(sptep, new_spte);
513 * Update the SPTE (excluding the PFN), but do not track changes in its
514 * accessed/dirty status.
516 static u64 mmu_spte_update_no_track(u64 *sptep, u64 new_spte)
518 u64 old_spte = *sptep;
520 WARN_ON(!is_shadow_present_pte(new_spte));
521 check_spte_writable_invariants(new_spte);
523 if (!is_shadow_present_pte(old_spte)) {
524 mmu_spte_set(sptep, new_spte);
528 if (!spte_has_volatile_bits(old_spte))
529 __update_clear_spte_fast(sptep, new_spte);
531 old_spte = __update_clear_spte_slow(sptep, new_spte);
533 WARN_ON(spte_to_pfn(old_spte) != spte_to_pfn(new_spte));
538 /* Rules for using mmu_spte_update:
539 * Update the state bits, it means the mapped pfn is not changed.
541 * Whenever an MMU-writable SPTE is overwritten with a read-only SPTE, remote
542 * TLBs must be flushed. Otherwise rmap_write_protect will find a read-only
543 * spte, even though the writable spte might be cached on a CPU's TLB.
545 * Returns true if the TLB needs to be flushed
547 static bool mmu_spte_update(u64 *sptep, u64 new_spte)
550 u64 old_spte = mmu_spte_update_no_track(sptep, new_spte);
552 if (!is_shadow_present_pte(old_spte))
556 * For the spte updated out of mmu-lock is safe, since
557 * we always atomically update it, see the comments in
558 * spte_has_volatile_bits().
560 if (spte_can_locklessly_be_made_writable(old_spte) &&
561 !is_writable_pte(new_spte))
565 * Flush TLB when accessed/dirty states are changed in the page tables,
566 * to guarantee consistency between TLB and page tables.
569 if (is_accessed_spte(old_spte) && !is_accessed_spte(new_spte)) {
571 kvm_set_pfn_accessed(spte_to_pfn(old_spte));
574 if (is_dirty_spte(old_spte) && !is_dirty_spte(new_spte)) {
576 kvm_set_pfn_dirty(spte_to_pfn(old_spte));
583 * Rules for using mmu_spte_clear_track_bits:
584 * It sets the sptep from present to nonpresent, and track the
585 * state bits, it is used to clear the last level sptep.
586 * Returns the old PTE.
588 static int mmu_spte_clear_track_bits(struct kvm *kvm, u64 *sptep)
591 u64 old_spte = *sptep;
592 int level = sptep_to_sp(sptep)->role.level;
594 if (!spte_has_volatile_bits(old_spte))
595 __update_clear_spte_fast(sptep, 0ull);
597 old_spte = __update_clear_spte_slow(sptep, 0ull);
599 if (!is_shadow_present_pte(old_spte))
602 kvm_update_page_stats(kvm, level, -1);
604 pfn = spte_to_pfn(old_spte);
607 * KVM does not hold the refcount of the page used by
608 * kvm mmu, before reclaiming the page, we should
609 * unmap it from mmu first.
611 WARN_ON(!kvm_is_reserved_pfn(pfn) && !page_count(pfn_to_page(pfn)));
613 if (is_accessed_spte(old_spte))
614 kvm_set_pfn_accessed(pfn);
616 if (is_dirty_spte(old_spte))
617 kvm_set_pfn_dirty(pfn);
623 * Rules for using mmu_spte_clear_no_track:
624 * Directly clear spte without caring the state bits of sptep,
625 * it is used to set the upper level spte.
627 static void mmu_spte_clear_no_track(u64 *sptep)
629 __update_clear_spte_fast(sptep, 0ull);
632 static u64 mmu_spte_get_lockless(u64 *sptep)
634 return __get_spte_lockless(sptep);
637 /* Returns the Accessed status of the PTE and resets it at the same time. */
638 static bool mmu_spte_age(u64 *sptep)
640 u64 spte = mmu_spte_get_lockless(sptep);
642 if (!is_accessed_spte(spte))
645 if (spte_ad_enabled(spte)) {
646 clear_bit((ffs(shadow_accessed_mask) - 1),
647 (unsigned long *)sptep);
650 * Capture the dirty status of the page, so that it doesn't get
651 * lost when the SPTE is marked for access tracking.
653 if (is_writable_pte(spte))
654 kvm_set_pfn_dirty(spte_to_pfn(spte));
656 spte = mark_spte_for_access_track(spte);
657 mmu_spte_update_no_track(sptep, spte);
663 static void walk_shadow_page_lockless_begin(struct kvm_vcpu *vcpu)
665 if (is_tdp_mmu(vcpu->arch.mmu)) {
666 kvm_tdp_mmu_walk_lockless_begin();
669 * Prevent page table teardown by making any free-er wait during
670 * kvm_flush_remote_tlbs() IPI to all active vcpus.
675 * Make sure a following spte read is not reordered ahead of the write
678 smp_store_mb(vcpu->mode, READING_SHADOW_PAGE_TABLES);
682 static void walk_shadow_page_lockless_end(struct kvm_vcpu *vcpu)
684 if (is_tdp_mmu(vcpu->arch.mmu)) {
685 kvm_tdp_mmu_walk_lockless_end();
688 * Make sure the write to vcpu->mode is not reordered in front of
689 * reads to sptes. If it does, kvm_mmu_commit_zap_page() can see us
690 * OUTSIDE_GUEST_MODE and proceed to free the shadow page table.
692 smp_store_release(&vcpu->mode, OUTSIDE_GUEST_MODE);
697 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu, bool maybe_indirect)
701 /* 1 rmap, 1 parent PTE per level, and the prefetched rmaps. */
702 r = kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_pte_list_desc_cache,
703 1 + PT64_ROOT_MAX_LEVEL + PTE_PREFETCH_NUM);
706 r = kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_shadow_page_cache,
707 PT64_ROOT_MAX_LEVEL);
710 if (maybe_indirect) {
711 r = kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_gfn_array_cache,
712 PT64_ROOT_MAX_LEVEL);
716 return kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
717 PT64_ROOT_MAX_LEVEL);
720 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
722 kvm_mmu_free_memory_cache(&vcpu->arch.mmu_pte_list_desc_cache);
723 kvm_mmu_free_memory_cache(&vcpu->arch.mmu_shadow_page_cache);
724 kvm_mmu_free_memory_cache(&vcpu->arch.mmu_gfn_array_cache);
725 kvm_mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
728 static struct pte_list_desc *mmu_alloc_pte_list_desc(struct kvm_vcpu *vcpu)
730 return kvm_mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_list_desc_cache);
733 static void mmu_free_pte_list_desc(struct pte_list_desc *pte_list_desc)
735 kmem_cache_free(pte_list_desc_cache, pte_list_desc);
738 static gfn_t kvm_mmu_page_get_gfn(struct kvm_mmu_page *sp, int index)
740 if (!sp->role.direct)
741 return sp->gfns[index];
743 return sp->gfn + (index << ((sp->role.level - 1) * PT64_LEVEL_BITS));
746 static void kvm_mmu_page_set_gfn(struct kvm_mmu_page *sp, int index, gfn_t gfn)
748 if (!sp->role.direct) {
749 sp->gfns[index] = gfn;
753 if (WARN_ON(gfn != kvm_mmu_page_get_gfn(sp, index)))
754 pr_err_ratelimited("gfn mismatch under direct page %llx "
755 "(expected %llx, got %llx)\n",
757 kvm_mmu_page_get_gfn(sp, index), gfn);
761 * Return the pointer to the large page information for a given gfn,
762 * handling slots that are not large page aligned.
764 static struct kvm_lpage_info *lpage_info_slot(gfn_t gfn,
765 const struct kvm_memory_slot *slot, int level)
769 idx = gfn_to_index(gfn, slot->base_gfn, level);
770 return &slot->arch.lpage_info[level - 2][idx];
773 static void update_gfn_disallow_lpage_count(const struct kvm_memory_slot *slot,
774 gfn_t gfn, int count)
776 struct kvm_lpage_info *linfo;
779 for (i = PG_LEVEL_2M; i <= KVM_MAX_HUGEPAGE_LEVEL; ++i) {
780 linfo = lpage_info_slot(gfn, slot, i);
781 linfo->disallow_lpage += count;
782 WARN_ON(linfo->disallow_lpage < 0);
786 void kvm_mmu_gfn_disallow_lpage(const struct kvm_memory_slot *slot, gfn_t gfn)
788 update_gfn_disallow_lpage_count(slot, gfn, 1);
791 void kvm_mmu_gfn_allow_lpage(const struct kvm_memory_slot *slot, gfn_t gfn)
793 update_gfn_disallow_lpage_count(slot, gfn, -1);
796 static void account_shadowed(struct kvm *kvm, struct kvm_mmu_page *sp)
798 struct kvm_memslots *slots;
799 struct kvm_memory_slot *slot;
802 kvm->arch.indirect_shadow_pages++;
804 slots = kvm_memslots_for_spte_role(kvm, sp->role);
805 slot = __gfn_to_memslot(slots, gfn);
807 /* the non-leaf shadow pages are keeping readonly. */
808 if (sp->role.level > PG_LEVEL_4K)
809 return kvm_slot_page_track_add_page(kvm, slot, gfn,
810 KVM_PAGE_TRACK_WRITE);
812 kvm_mmu_gfn_disallow_lpage(slot, gfn);
815 void account_huge_nx_page(struct kvm *kvm, struct kvm_mmu_page *sp)
817 if (sp->lpage_disallowed)
820 ++kvm->stat.nx_lpage_splits;
821 list_add_tail(&sp->lpage_disallowed_link,
822 &kvm->arch.lpage_disallowed_mmu_pages);
823 sp->lpage_disallowed = true;
826 static void unaccount_shadowed(struct kvm *kvm, struct kvm_mmu_page *sp)
828 struct kvm_memslots *slots;
829 struct kvm_memory_slot *slot;
832 kvm->arch.indirect_shadow_pages--;
834 slots = kvm_memslots_for_spte_role(kvm, sp->role);
835 slot = __gfn_to_memslot(slots, gfn);
836 if (sp->role.level > PG_LEVEL_4K)
837 return kvm_slot_page_track_remove_page(kvm, slot, gfn,
838 KVM_PAGE_TRACK_WRITE);
840 kvm_mmu_gfn_allow_lpage(slot, gfn);
843 void unaccount_huge_nx_page(struct kvm *kvm, struct kvm_mmu_page *sp)
845 --kvm->stat.nx_lpage_splits;
846 sp->lpage_disallowed = false;
847 list_del(&sp->lpage_disallowed_link);
850 static struct kvm_memory_slot *
851 gfn_to_memslot_dirty_bitmap(struct kvm_vcpu *vcpu, gfn_t gfn,
854 struct kvm_memory_slot *slot;
856 slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn);
857 if (!slot || slot->flags & KVM_MEMSLOT_INVALID)
859 if (no_dirty_log && kvm_slot_dirty_track_enabled(slot))
866 * About rmap_head encoding:
868 * If the bit zero of rmap_head->val is clear, then it points to the only spte
869 * in this rmap chain. Otherwise, (rmap_head->val & ~1) points to a struct
870 * pte_list_desc containing more mappings.
874 * Returns the number of pointers in the rmap chain, not counting the new one.
876 static int pte_list_add(struct kvm_vcpu *vcpu, u64 *spte,
877 struct kvm_rmap_head *rmap_head)
879 struct pte_list_desc *desc;
882 if (!rmap_head->val) {
883 rmap_printk("%p %llx 0->1\n", spte, *spte);
884 rmap_head->val = (unsigned long)spte;
885 } else if (!(rmap_head->val & 1)) {
886 rmap_printk("%p %llx 1->many\n", spte, *spte);
887 desc = mmu_alloc_pte_list_desc(vcpu);
888 desc->sptes[0] = (u64 *)rmap_head->val;
889 desc->sptes[1] = spte;
890 desc->spte_count = 2;
891 rmap_head->val = (unsigned long)desc | 1;
894 rmap_printk("%p %llx many->many\n", spte, *spte);
895 desc = (struct pte_list_desc *)(rmap_head->val & ~1ul);
896 while (desc->spte_count == PTE_LIST_EXT) {
897 count += PTE_LIST_EXT;
899 desc->more = mmu_alloc_pte_list_desc(vcpu);
901 desc->spte_count = 0;
906 count += desc->spte_count;
907 desc->sptes[desc->spte_count++] = spte;
913 pte_list_desc_remove_entry(struct kvm_rmap_head *rmap_head,
914 struct pte_list_desc *desc, int i,
915 struct pte_list_desc *prev_desc)
917 int j = desc->spte_count - 1;
919 desc->sptes[i] = desc->sptes[j];
920 desc->sptes[j] = NULL;
922 if (desc->spte_count)
924 if (!prev_desc && !desc->more)
928 prev_desc->more = desc->more;
930 rmap_head->val = (unsigned long)desc->more | 1;
931 mmu_free_pte_list_desc(desc);
934 static void __pte_list_remove(u64 *spte, struct kvm_rmap_head *rmap_head)
936 struct pte_list_desc *desc;
937 struct pte_list_desc *prev_desc;
940 if (!rmap_head->val) {
941 pr_err("%s: %p 0->BUG\n", __func__, spte);
943 } else if (!(rmap_head->val & 1)) {
944 rmap_printk("%p 1->0\n", spte);
945 if ((u64 *)rmap_head->val != spte) {
946 pr_err("%s: %p 1->BUG\n", __func__, spte);
951 rmap_printk("%p many->many\n", spte);
952 desc = (struct pte_list_desc *)(rmap_head->val & ~1ul);
955 for (i = 0; i < desc->spte_count; ++i) {
956 if (desc->sptes[i] == spte) {
957 pte_list_desc_remove_entry(rmap_head,
965 pr_err("%s: %p many->many\n", __func__, spte);
970 static void pte_list_remove(struct kvm *kvm, struct kvm_rmap_head *rmap_head,
973 mmu_spte_clear_track_bits(kvm, sptep);
974 __pte_list_remove(sptep, rmap_head);
977 /* Return true if rmap existed, false otherwise */
978 static bool pte_list_destroy(struct kvm *kvm, struct kvm_rmap_head *rmap_head)
980 struct pte_list_desc *desc, *next;
986 if (!(rmap_head->val & 1)) {
987 mmu_spte_clear_track_bits(kvm, (u64 *)rmap_head->val);
991 desc = (struct pte_list_desc *)(rmap_head->val & ~1ul);
993 for (; desc; desc = next) {
994 for (i = 0; i < desc->spte_count; i++)
995 mmu_spte_clear_track_bits(kvm, desc->sptes[i]);
997 mmu_free_pte_list_desc(desc);
1000 /* rmap_head is meaningless now, remember to reset it */
1005 unsigned int pte_list_count(struct kvm_rmap_head *rmap_head)
1007 struct pte_list_desc *desc;
1008 unsigned int count = 0;
1010 if (!rmap_head->val)
1012 else if (!(rmap_head->val & 1))
1015 desc = (struct pte_list_desc *)(rmap_head->val & ~1ul);
1018 count += desc->spte_count;
1025 static struct kvm_rmap_head *gfn_to_rmap(gfn_t gfn, int level,
1026 const struct kvm_memory_slot *slot)
1030 idx = gfn_to_index(gfn, slot->base_gfn, level);
1031 return &slot->arch.rmap[level - PG_LEVEL_4K][idx];
1034 static bool rmap_can_add(struct kvm_vcpu *vcpu)
1036 struct kvm_mmu_memory_cache *mc;
1038 mc = &vcpu->arch.mmu_pte_list_desc_cache;
1039 return kvm_mmu_memory_cache_nr_free_objects(mc);
1042 static void rmap_remove(struct kvm *kvm, u64 *spte)
1044 struct kvm_memslots *slots;
1045 struct kvm_memory_slot *slot;
1046 struct kvm_mmu_page *sp;
1048 struct kvm_rmap_head *rmap_head;
1050 sp = sptep_to_sp(spte);
1051 gfn = kvm_mmu_page_get_gfn(sp, spte - sp->spt);
1054 * Unlike rmap_add, rmap_remove does not run in the context of a vCPU
1055 * so we have to determine which memslots to use based on context
1056 * information in sp->role.
1058 slots = kvm_memslots_for_spte_role(kvm, sp->role);
1060 slot = __gfn_to_memslot(slots, gfn);
1061 rmap_head = gfn_to_rmap(gfn, sp->role.level, slot);
1063 __pte_list_remove(spte, rmap_head);
1067 * Used by the following functions to iterate through the sptes linked by a
1068 * rmap. All fields are private and not assumed to be used outside.
1070 struct rmap_iterator {
1071 /* private fields */
1072 struct pte_list_desc *desc; /* holds the sptep if not NULL */
1073 int pos; /* index of the sptep */
1077 * Iteration must be started by this function. This should also be used after
1078 * removing/dropping sptes from the rmap link because in such cases the
1079 * information in the iterator may not be valid.
1081 * Returns sptep if found, NULL otherwise.
1083 static u64 *rmap_get_first(struct kvm_rmap_head *rmap_head,
1084 struct rmap_iterator *iter)
1088 if (!rmap_head->val)
1091 if (!(rmap_head->val & 1)) {
1093 sptep = (u64 *)rmap_head->val;
1097 iter->desc = (struct pte_list_desc *)(rmap_head->val & ~1ul);
1099 sptep = iter->desc->sptes[iter->pos];
1101 BUG_ON(!is_shadow_present_pte(*sptep));
1106 * Must be used with a valid iterator: e.g. after rmap_get_first().
1108 * Returns sptep if found, NULL otherwise.
1110 static u64 *rmap_get_next(struct rmap_iterator *iter)
1115 if (iter->pos < PTE_LIST_EXT - 1) {
1117 sptep = iter->desc->sptes[iter->pos];
1122 iter->desc = iter->desc->more;
1126 /* desc->sptes[0] cannot be NULL */
1127 sptep = iter->desc->sptes[iter->pos];
1134 BUG_ON(!is_shadow_present_pte(*sptep));
1138 #define for_each_rmap_spte(_rmap_head_, _iter_, _spte_) \
1139 for (_spte_ = rmap_get_first(_rmap_head_, _iter_); \
1140 _spte_; _spte_ = rmap_get_next(_iter_))
1142 static void drop_spte(struct kvm *kvm, u64 *sptep)
1144 u64 old_spte = mmu_spte_clear_track_bits(kvm, sptep);
1146 if (is_shadow_present_pte(old_spte))
1147 rmap_remove(kvm, sptep);
1151 static bool __drop_large_spte(struct kvm *kvm, u64 *sptep)
1153 if (is_large_pte(*sptep)) {
1154 WARN_ON(sptep_to_sp(sptep)->role.level == PG_LEVEL_4K);
1155 drop_spte(kvm, sptep);
1162 static void drop_large_spte(struct kvm_vcpu *vcpu, u64 *sptep)
1164 if (__drop_large_spte(vcpu->kvm, sptep)) {
1165 struct kvm_mmu_page *sp = sptep_to_sp(sptep);
1167 kvm_flush_remote_tlbs_with_address(vcpu->kvm, sp->gfn,
1168 KVM_PAGES_PER_HPAGE(sp->role.level));
1173 * Write-protect on the specified @sptep, @pt_protect indicates whether
1174 * spte write-protection is caused by protecting shadow page table.
1176 * Note: write protection is difference between dirty logging and spte
1178 * - for dirty logging, the spte can be set to writable at anytime if
1179 * its dirty bitmap is properly set.
1180 * - for spte protection, the spte can be writable only after unsync-ing
1183 * Return true if tlb need be flushed.
1185 static bool spte_write_protect(u64 *sptep, bool pt_protect)
1189 if (!is_writable_pte(spte) &&
1190 !(pt_protect && spte_can_locklessly_be_made_writable(spte)))
1193 rmap_printk("spte %p %llx\n", sptep, *sptep);
1196 spte &= ~shadow_mmu_writable_mask;
1197 spte = spte & ~PT_WRITABLE_MASK;
1199 return mmu_spte_update(sptep, spte);
1202 static bool rmap_write_protect(struct kvm_rmap_head *rmap_head,
1206 struct rmap_iterator iter;
1209 for_each_rmap_spte(rmap_head, &iter, sptep)
1210 flush |= spte_write_protect(sptep, pt_protect);
1215 static bool spte_clear_dirty(u64 *sptep)
1219 rmap_printk("spte %p %llx\n", sptep, *sptep);
1221 MMU_WARN_ON(!spte_ad_enabled(spte));
1222 spte &= ~shadow_dirty_mask;
1223 return mmu_spte_update(sptep, spte);
1226 static bool spte_wrprot_for_clear_dirty(u64 *sptep)
1228 bool was_writable = test_and_clear_bit(PT_WRITABLE_SHIFT,
1229 (unsigned long *)sptep);
1230 if (was_writable && !spte_ad_enabled(*sptep))
1231 kvm_set_pfn_dirty(spte_to_pfn(*sptep));
1233 return was_writable;
1237 * Gets the GFN ready for another round of dirty logging by clearing the
1238 * - D bit on ad-enabled SPTEs, and
1239 * - W bit on ad-disabled SPTEs.
1240 * Returns true iff any D or W bits were cleared.
1242 static bool __rmap_clear_dirty(struct kvm *kvm, struct kvm_rmap_head *rmap_head,
1243 const struct kvm_memory_slot *slot)
1246 struct rmap_iterator iter;
1249 for_each_rmap_spte(rmap_head, &iter, sptep)
1250 if (spte_ad_need_write_protect(*sptep))
1251 flush |= spte_wrprot_for_clear_dirty(sptep);
1253 flush |= spte_clear_dirty(sptep);
1259 * kvm_mmu_write_protect_pt_masked - write protect selected PT level pages
1260 * @kvm: kvm instance
1261 * @slot: slot to protect
1262 * @gfn_offset: start of the BITS_PER_LONG pages we care about
1263 * @mask: indicates which pages we should protect
1265 * Used when we do not need to care about huge page mappings.
1267 static void kvm_mmu_write_protect_pt_masked(struct kvm *kvm,
1268 struct kvm_memory_slot *slot,
1269 gfn_t gfn_offset, unsigned long mask)
1271 struct kvm_rmap_head *rmap_head;
1273 if (is_tdp_mmu_enabled(kvm))
1274 kvm_tdp_mmu_clear_dirty_pt_masked(kvm, slot,
1275 slot->base_gfn + gfn_offset, mask, true);
1277 if (!kvm_memslots_have_rmaps(kvm))
1281 rmap_head = gfn_to_rmap(slot->base_gfn + gfn_offset + __ffs(mask),
1283 rmap_write_protect(rmap_head, false);
1285 /* clear the first set bit */
1291 * kvm_mmu_clear_dirty_pt_masked - clear MMU D-bit for PT level pages, or write
1292 * protect the page if the D-bit isn't supported.
1293 * @kvm: kvm instance
1294 * @slot: slot to clear D-bit
1295 * @gfn_offset: start of the BITS_PER_LONG pages we care about
1296 * @mask: indicates which pages we should clear D-bit
1298 * Used for PML to re-log the dirty GPAs after userspace querying dirty_bitmap.
1300 static void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm,
1301 struct kvm_memory_slot *slot,
1302 gfn_t gfn_offset, unsigned long mask)
1304 struct kvm_rmap_head *rmap_head;
1306 if (is_tdp_mmu_enabled(kvm))
1307 kvm_tdp_mmu_clear_dirty_pt_masked(kvm, slot,
1308 slot->base_gfn + gfn_offset, mask, false);
1310 if (!kvm_memslots_have_rmaps(kvm))
1314 rmap_head = gfn_to_rmap(slot->base_gfn + gfn_offset + __ffs(mask),
1316 __rmap_clear_dirty(kvm, rmap_head, slot);
1318 /* clear the first set bit */
1324 * kvm_arch_mmu_enable_log_dirty_pt_masked - enable dirty logging for selected
1327 * It calls kvm_mmu_write_protect_pt_masked to write protect selected pages to
1328 * enable dirty logging for them.
1330 * We need to care about huge page mappings: e.g. during dirty logging we may
1331 * have such mappings.
1333 void kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm *kvm,
1334 struct kvm_memory_slot *slot,
1335 gfn_t gfn_offset, unsigned long mask)
1338 * Huge pages are NOT write protected when we start dirty logging in
1339 * initially-all-set mode; must write protect them here so that they
1340 * are split to 4K on the first write.
1342 * The gfn_offset is guaranteed to be aligned to 64, but the base_gfn
1343 * of memslot has no such restriction, so the range can cross two large
1346 if (kvm_dirty_log_manual_protect_and_init_set(kvm)) {
1347 gfn_t start = slot->base_gfn + gfn_offset + __ffs(mask);
1348 gfn_t end = slot->base_gfn + gfn_offset + __fls(mask);
1350 if (READ_ONCE(eager_page_split))
1351 kvm_mmu_try_split_huge_pages(kvm, slot, start, end, PG_LEVEL_4K);
1353 kvm_mmu_slot_gfn_write_protect(kvm, slot, start, PG_LEVEL_2M);
1355 /* Cross two large pages? */
1356 if (ALIGN(start << PAGE_SHIFT, PMD_SIZE) !=
1357 ALIGN(end << PAGE_SHIFT, PMD_SIZE))
1358 kvm_mmu_slot_gfn_write_protect(kvm, slot, end,
1362 /* Now handle 4K PTEs. */
1363 if (kvm_x86_ops.cpu_dirty_log_size)
1364 kvm_mmu_clear_dirty_pt_masked(kvm, slot, gfn_offset, mask);
1366 kvm_mmu_write_protect_pt_masked(kvm, slot, gfn_offset, mask);
1369 int kvm_cpu_dirty_log_size(void)
1371 return kvm_x86_ops.cpu_dirty_log_size;
1374 bool kvm_mmu_slot_gfn_write_protect(struct kvm *kvm,
1375 struct kvm_memory_slot *slot, u64 gfn,
1378 struct kvm_rmap_head *rmap_head;
1380 bool write_protected = false;
1382 if (kvm_memslots_have_rmaps(kvm)) {
1383 for (i = min_level; i <= KVM_MAX_HUGEPAGE_LEVEL; ++i) {
1384 rmap_head = gfn_to_rmap(gfn, i, slot);
1385 write_protected |= rmap_write_protect(rmap_head, true);
1389 if (is_tdp_mmu_enabled(kvm))
1391 kvm_tdp_mmu_write_protect_gfn(kvm, slot, gfn, min_level);
1393 return write_protected;
1396 static bool kvm_vcpu_write_protect_gfn(struct kvm_vcpu *vcpu, u64 gfn)
1398 struct kvm_memory_slot *slot;
1400 slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn);
1401 return kvm_mmu_slot_gfn_write_protect(vcpu->kvm, slot, gfn, PG_LEVEL_4K);
1404 static bool kvm_zap_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head,
1405 const struct kvm_memory_slot *slot)
1407 return pte_list_destroy(kvm, rmap_head);
1410 static bool kvm_unmap_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head,
1411 struct kvm_memory_slot *slot, gfn_t gfn, int level,
1414 return kvm_zap_rmapp(kvm, rmap_head, slot);
1417 static bool kvm_set_pte_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head,
1418 struct kvm_memory_slot *slot, gfn_t gfn, int level,
1422 struct rmap_iterator iter;
1423 bool need_flush = false;
1427 WARN_ON(pte_huge(pte));
1428 new_pfn = pte_pfn(pte);
1431 for_each_rmap_spte(rmap_head, &iter, sptep) {
1432 rmap_printk("spte %p %llx gfn %llx (%d)\n",
1433 sptep, *sptep, gfn, level);
1437 if (pte_write(pte)) {
1438 pte_list_remove(kvm, rmap_head, sptep);
1441 new_spte = kvm_mmu_changed_pte_notifier_make_spte(
1444 mmu_spte_clear_track_bits(kvm, sptep);
1445 mmu_spte_set(sptep, new_spte);
1449 if (need_flush && kvm_available_flush_tlb_with_range()) {
1450 kvm_flush_remote_tlbs_with_address(kvm, gfn, 1);
1457 struct slot_rmap_walk_iterator {
1459 const struct kvm_memory_slot *slot;
1465 /* output fields. */
1467 struct kvm_rmap_head *rmap;
1470 /* private field. */
1471 struct kvm_rmap_head *end_rmap;
1475 rmap_walk_init_level(struct slot_rmap_walk_iterator *iterator, int level)
1477 iterator->level = level;
1478 iterator->gfn = iterator->start_gfn;
1479 iterator->rmap = gfn_to_rmap(iterator->gfn, level, iterator->slot);
1480 iterator->end_rmap = gfn_to_rmap(iterator->end_gfn, level, iterator->slot);
1484 slot_rmap_walk_init(struct slot_rmap_walk_iterator *iterator,
1485 const struct kvm_memory_slot *slot, int start_level,
1486 int end_level, gfn_t start_gfn, gfn_t end_gfn)
1488 iterator->slot = slot;
1489 iterator->start_level = start_level;
1490 iterator->end_level = end_level;
1491 iterator->start_gfn = start_gfn;
1492 iterator->end_gfn = end_gfn;
1494 rmap_walk_init_level(iterator, iterator->start_level);
1497 static bool slot_rmap_walk_okay(struct slot_rmap_walk_iterator *iterator)
1499 return !!iterator->rmap;
1502 static void slot_rmap_walk_next(struct slot_rmap_walk_iterator *iterator)
1504 if (++iterator->rmap <= iterator->end_rmap) {
1505 iterator->gfn += (1UL << KVM_HPAGE_GFN_SHIFT(iterator->level));
1509 if (++iterator->level > iterator->end_level) {
1510 iterator->rmap = NULL;
1514 rmap_walk_init_level(iterator, iterator->level);
1517 #define for_each_slot_rmap_range(_slot_, _start_level_, _end_level_, \
1518 _start_gfn, _end_gfn, _iter_) \
1519 for (slot_rmap_walk_init(_iter_, _slot_, _start_level_, \
1520 _end_level_, _start_gfn, _end_gfn); \
1521 slot_rmap_walk_okay(_iter_); \
1522 slot_rmap_walk_next(_iter_))
1524 typedef bool (*rmap_handler_t)(struct kvm *kvm, struct kvm_rmap_head *rmap_head,
1525 struct kvm_memory_slot *slot, gfn_t gfn,
1526 int level, pte_t pte);
1528 static __always_inline bool kvm_handle_gfn_range(struct kvm *kvm,
1529 struct kvm_gfn_range *range,
1530 rmap_handler_t handler)
1532 struct slot_rmap_walk_iterator iterator;
1535 for_each_slot_rmap_range(range->slot, PG_LEVEL_4K, KVM_MAX_HUGEPAGE_LEVEL,
1536 range->start, range->end - 1, &iterator)
1537 ret |= handler(kvm, iterator.rmap, range->slot, iterator.gfn,
1538 iterator.level, range->pte);
1543 bool kvm_unmap_gfn_range(struct kvm *kvm, struct kvm_gfn_range *range)
1547 if (kvm_memslots_have_rmaps(kvm))
1548 flush = kvm_handle_gfn_range(kvm, range, kvm_unmap_rmapp);
1550 if (is_tdp_mmu_enabled(kvm))
1551 flush = kvm_tdp_mmu_unmap_gfn_range(kvm, range, flush);
1556 bool kvm_set_spte_gfn(struct kvm *kvm, struct kvm_gfn_range *range)
1560 if (kvm_memslots_have_rmaps(kvm))
1561 flush = kvm_handle_gfn_range(kvm, range, kvm_set_pte_rmapp);
1563 if (is_tdp_mmu_enabled(kvm))
1564 flush |= kvm_tdp_mmu_set_spte_gfn(kvm, range);
1569 static bool kvm_age_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head,
1570 struct kvm_memory_slot *slot, gfn_t gfn, int level,
1574 struct rmap_iterator iter;
1577 for_each_rmap_spte(rmap_head, &iter, sptep)
1578 young |= mmu_spte_age(sptep);
1583 static bool kvm_test_age_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head,
1584 struct kvm_memory_slot *slot, gfn_t gfn,
1585 int level, pte_t unused)
1588 struct rmap_iterator iter;
1590 for_each_rmap_spte(rmap_head, &iter, sptep)
1591 if (is_accessed_spte(*sptep))
1596 #define RMAP_RECYCLE_THRESHOLD 1000
1598 static void rmap_add(struct kvm_vcpu *vcpu, struct kvm_memory_slot *slot,
1599 u64 *spte, gfn_t gfn)
1601 struct kvm_mmu_page *sp;
1602 struct kvm_rmap_head *rmap_head;
1605 sp = sptep_to_sp(spte);
1606 kvm_mmu_page_set_gfn(sp, spte - sp->spt, gfn);
1607 rmap_head = gfn_to_rmap(gfn, sp->role.level, slot);
1608 rmap_count = pte_list_add(vcpu, spte, rmap_head);
1610 if (rmap_count > RMAP_RECYCLE_THRESHOLD) {
1611 kvm_unmap_rmapp(vcpu->kvm, rmap_head, NULL, gfn, sp->role.level, __pte(0));
1612 kvm_flush_remote_tlbs_with_address(
1613 vcpu->kvm, sp->gfn, KVM_PAGES_PER_HPAGE(sp->role.level));
1617 bool kvm_age_gfn(struct kvm *kvm, struct kvm_gfn_range *range)
1621 if (kvm_memslots_have_rmaps(kvm))
1622 young = kvm_handle_gfn_range(kvm, range, kvm_age_rmapp);
1624 if (is_tdp_mmu_enabled(kvm))
1625 young |= kvm_tdp_mmu_age_gfn_range(kvm, range);
1630 bool kvm_test_age_gfn(struct kvm *kvm, struct kvm_gfn_range *range)
1634 if (kvm_memslots_have_rmaps(kvm))
1635 young = kvm_handle_gfn_range(kvm, range, kvm_test_age_rmapp);
1637 if (is_tdp_mmu_enabled(kvm))
1638 young |= kvm_tdp_mmu_test_age_gfn(kvm, range);
1644 static int is_empty_shadow_page(u64 *spt)
1649 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
1650 if (is_shadow_present_pte(*pos)) {
1651 printk(KERN_ERR "%s: %p %llx\n", __func__,
1660 * This value is the sum of all of the kvm instances's
1661 * kvm->arch.n_used_mmu_pages values. We need a global,
1662 * aggregate version in order to make the slab shrinker
1665 static inline void kvm_mod_used_mmu_pages(struct kvm *kvm, long nr)
1667 kvm->arch.n_used_mmu_pages += nr;
1668 percpu_counter_add(&kvm_total_used_mmu_pages, nr);
1671 static void kvm_mmu_free_page(struct kvm_mmu_page *sp)
1673 MMU_WARN_ON(!is_empty_shadow_page(sp->spt));
1674 hlist_del(&sp->hash_link);
1675 list_del(&sp->link);
1676 free_page((unsigned long)sp->spt);
1677 if (!sp->role.direct)
1678 free_page((unsigned long)sp->gfns);
1679 kmem_cache_free(mmu_page_header_cache, sp);
1682 static unsigned kvm_page_table_hashfn(gfn_t gfn)
1684 return hash_64(gfn, KVM_MMU_HASH_SHIFT);
1687 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
1688 struct kvm_mmu_page *sp, u64 *parent_pte)
1693 pte_list_add(vcpu, parent_pte, &sp->parent_ptes);
1696 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
1699 __pte_list_remove(parent_pte, &sp->parent_ptes);
1702 static void drop_parent_pte(struct kvm_mmu_page *sp,
1705 mmu_page_remove_parent_pte(sp, parent_pte);
1706 mmu_spte_clear_no_track(parent_pte);
1709 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu, int direct)
1711 struct kvm_mmu_page *sp;
1713 sp = kvm_mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache);
1714 sp->spt = kvm_mmu_memory_cache_alloc(&vcpu->arch.mmu_shadow_page_cache);
1716 sp->gfns = kvm_mmu_memory_cache_alloc(&vcpu->arch.mmu_gfn_array_cache);
1717 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
1720 * active_mmu_pages must be a FIFO list, as kvm_zap_obsolete_pages()
1721 * depends on valid pages being added to the head of the list. See
1722 * comments in kvm_zap_obsolete_pages().
1724 sp->mmu_valid_gen = vcpu->kvm->arch.mmu_valid_gen;
1725 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
1726 kvm_mod_used_mmu_pages(vcpu->kvm, +1);
1730 static void mark_unsync(u64 *spte);
1731 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp)
1734 struct rmap_iterator iter;
1736 for_each_rmap_spte(&sp->parent_ptes, &iter, sptep) {
1741 static void mark_unsync(u64 *spte)
1743 struct kvm_mmu_page *sp;
1746 sp = sptep_to_sp(spte);
1747 index = spte - sp->spt;
1748 if (__test_and_set_bit(index, sp->unsync_child_bitmap))
1750 if (sp->unsync_children++)
1752 kvm_mmu_mark_parents_unsync(sp);
1755 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1756 struct kvm_mmu_page *sp)
1761 #define KVM_PAGE_ARRAY_NR 16
1763 struct kvm_mmu_pages {
1764 struct mmu_page_and_offset {
1765 struct kvm_mmu_page *sp;
1767 } page[KVM_PAGE_ARRAY_NR];
1771 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1777 for (i=0; i < pvec->nr; i++)
1778 if (pvec->page[i].sp == sp)
1781 pvec->page[pvec->nr].sp = sp;
1782 pvec->page[pvec->nr].idx = idx;
1784 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1787 static inline void clear_unsync_child_bit(struct kvm_mmu_page *sp, int idx)
1789 --sp->unsync_children;
1790 WARN_ON((int)sp->unsync_children < 0);
1791 __clear_bit(idx, sp->unsync_child_bitmap);
1794 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1795 struct kvm_mmu_pages *pvec)
1797 int i, ret, nr_unsync_leaf = 0;
1799 for_each_set_bit(i, sp->unsync_child_bitmap, 512) {
1800 struct kvm_mmu_page *child;
1801 u64 ent = sp->spt[i];
1803 if (!is_shadow_present_pte(ent) || is_large_pte(ent)) {
1804 clear_unsync_child_bit(sp, i);
1808 child = to_shadow_page(ent & PT64_BASE_ADDR_MASK);
1810 if (child->unsync_children) {
1811 if (mmu_pages_add(pvec, child, i))
1814 ret = __mmu_unsync_walk(child, pvec);
1816 clear_unsync_child_bit(sp, i);
1818 } else if (ret > 0) {
1819 nr_unsync_leaf += ret;
1822 } else if (child->unsync) {
1824 if (mmu_pages_add(pvec, child, i))
1827 clear_unsync_child_bit(sp, i);
1830 return nr_unsync_leaf;
1833 #define INVALID_INDEX (-1)
1835 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1836 struct kvm_mmu_pages *pvec)
1839 if (!sp->unsync_children)
1842 mmu_pages_add(pvec, sp, INVALID_INDEX);
1843 return __mmu_unsync_walk(sp, pvec);
1846 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1848 WARN_ON(!sp->unsync);
1849 trace_kvm_mmu_sync_page(sp);
1851 --kvm->stat.mmu_unsync;
1854 static bool kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
1855 struct list_head *invalid_list);
1856 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
1857 struct list_head *invalid_list);
1859 #define for_each_valid_sp(_kvm, _sp, _list) \
1860 hlist_for_each_entry(_sp, _list, hash_link) \
1861 if (is_obsolete_sp((_kvm), (_sp))) { \
1864 #define for_each_gfn_indirect_valid_sp(_kvm, _sp, _gfn) \
1865 for_each_valid_sp(_kvm, _sp, \
1866 &(_kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(_gfn)]) \
1867 if ((_sp)->gfn != (_gfn) || (_sp)->role.direct) {} else
1869 static bool kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1870 struct list_head *invalid_list)
1872 int ret = vcpu->arch.mmu->sync_page(vcpu, sp);
1875 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1882 static bool kvm_mmu_remote_flush_or_zap(struct kvm *kvm,
1883 struct list_head *invalid_list,
1886 if (!remote_flush && list_empty(invalid_list))
1889 if (!list_empty(invalid_list))
1890 kvm_mmu_commit_zap_page(kvm, invalid_list);
1892 kvm_flush_remote_tlbs(kvm);
1896 static bool is_obsolete_sp(struct kvm *kvm, struct kvm_mmu_page *sp)
1898 if (sp->role.invalid)
1901 /* TDP MMU pages due not use the MMU generation. */
1902 return !sp->tdp_mmu_page &&
1903 unlikely(sp->mmu_valid_gen != kvm->arch.mmu_valid_gen);
1906 struct mmu_page_path {
1907 struct kvm_mmu_page *parent[PT64_ROOT_MAX_LEVEL];
1908 unsigned int idx[PT64_ROOT_MAX_LEVEL];
1911 #define for_each_sp(pvec, sp, parents, i) \
1912 for (i = mmu_pages_first(&pvec, &parents); \
1913 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1914 i = mmu_pages_next(&pvec, &parents, i))
1916 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1917 struct mmu_page_path *parents,
1922 for (n = i+1; n < pvec->nr; n++) {
1923 struct kvm_mmu_page *sp = pvec->page[n].sp;
1924 unsigned idx = pvec->page[n].idx;
1925 int level = sp->role.level;
1927 parents->idx[level-1] = idx;
1928 if (level == PG_LEVEL_4K)
1931 parents->parent[level-2] = sp;
1937 static int mmu_pages_first(struct kvm_mmu_pages *pvec,
1938 struct mmu_page_path *parents)
1940 struct kvm_mmu_page *sp;
1946 WARN_ON(pvec->page[0].idx != INVALID_INDEX);
1948 sp = pvec->page[0].sp;
1949 level = sp->role.level;
1950 WARN_ON(level == PG_LEVEL_4K);
1952 parents->parent[level-2] = sp;
1954 /* Also set up a sentinel. Further entries in pvec are all
1955 * children of sp, so this element is never overwritten.
1957 parents->parent[level-1] = NULL;
1958 return mmu_pages_next(pvec, parents, 0);
1961 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1963 struct kvm_mmu_page *sp;
1964 unsigned int level = 0;
1967 unsigned int idx = parents->idx[level];
1968 sp = parents->parent[level];
1972 WARN_ON(idx == INVALID_INDEX);
1973 clear_unsync_child_bit(sp, idx);
1975 } while (!sp->unsync_children);
1978 static int mmu_sync_children(struct kvm_vcpu *vcpu,
1979 struct kvm_mmu_page *parent, bool can_yield)
1982 struct kvm_mmu_page *sp;
1983 struct mmu_page_path parents;
1984 struct kvm_mmu_pages pages;
1985 LIST_HEAD(invalid_list);
1988 while (mmu_unsync_walk(parent, &pages)) {
1989 bool protected = false;
1991 for_each_sp(pages, sp, parents, i)
1992 protected |= kvm_vcpu_write_protect_gfn(vcpu, sp->gfn);
1995 kvm_mmu_remote_flush_or_zap(vcpu->kvm, &invalid_list, true);
1999 for_each_sp(pages, sp, parents, i) {
2000 kvm_unlink_unsync_page(vcpu->kvm, sp);
2001 flush |= kvm_sync_page(vcpu, sp, &invalid_list);
2002 mmu_pages_clear_parents(&parents);
2004 if (need_resched() || rwlock_needbreak(&vcpu->kvm->mmu_lock)) {
2005 kvm_mmu_remote_flush_or_zap(vcpu->kvm, &invalid_list, flush);
2007 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
2011 cond_resched_rwlock_write(&vcpu->kvm->mmu_lock);
2016 kvm_mmu_remote_flush_or_zap(vcpu->kvm, &invalid_list, flush);
2020 static void __clear_sp_write_flooding_count(struct kvm_mmu_page *sp)
2022 atomic_set(&sp->write_flooding_count, 0);
2025 static void clear_sp_write_flooding_count(u64 *spte)
2027 __clear_sp_write_flooding_count(sptep_to_sp(spte));
2030 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
2035 unsigned int access)
2037 bool direct_mmu = vcpu->arch.mmu->direct_map;
2038 union kvm_mmu_page_role role;
2039 struct hlist_head *sp_list;
2041 struct kvm_mmu_page *sp;
2043 LIST_HEAD(invalid_list);
2045 role = vcpu->arch.mmu->mmu_role.base;
2047 role.direct = direct;
2048 role.access = access;
2049 if (role.has_4_byte_gpte) {
2050 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
2051 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
2052 role.quadrant = quadrant;
2055 sp_list = &vcpu->kvm->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)];
2056 for_each_valid_sp(vcpu->kvm, sp, sp_list) {
2057 if (sp->gfn != gfn) {
2062 if (sp->role.word != role.word) {
2064 * If the guest is creating an upper-level page, zap
2065 * unsync pages for the same gfn. While it's possible
2066 * the guest is using recursive page tables, in all
2067 * likelihood the guest has stopped using the unsync
2068 * page and is installing a completely unrelated page.
2069 * Unsync pages must not be left as is, because the new
2070 * upper-level page will be write-protected.
2072 if (level > PG_LEVEL_4K && sp->unsync)
2073 kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
2079 goto trace_get_page;
2083 * The page is good, but is stale. kvm_sync_page does
2084 * get the latest guest state, but (unlike mmu_unsync_children)
2085 * it doesn't write-protect the page or mark it synchronized!
2086 * This way the validity of the mapping is ensured, but the
2087 * overhead of write protection is not incurred until the
2088 * guest invalidates the TLB mapping. This allows multiple
2089 * SPs for a single gfn to be unsync.
2091 * If the sync fails, the page is zapped. If so, break
2092 * in order to rebuild it.
2094 if (!kvm_sync_page(vcpu, sp, &invalid_list))
2097 WARN_ON(!list_empty(&invalid_list));
2098 kvm_flush_remote_tlbs(vcpu->kvm);
2101 __clear_sp_write_flooding_count(sp);
2104 trace_kvm_mmu_get_page(sp, false);
2108 ++vcpu->kvm->stat.mmu_cache_miss;
2110 sp = kvm_mmu_alloc_page(vcpu, direct);
2114 hlist_add_head(&sp->hash_link, sp_list);
2116 account_shadowed(vcpu->kvm, sp);
2117 if (level == PG_LEVEL_4K && kvm_vcpu_write_protect_gfn(vcpu, gfn))
2118 kvm_flush_remote_tlbs_with_address(vcpu->kvm, gfn, 1);
2120 trace_kvm_mmu_get_page(sp, true);
2122 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2124 if (collisions > vcpu->kvm->stat.max_mmu_page_hash_collisions)
2125 vcpu->kvm->stat.max_mmu_page_hash_collisions = collisions;
2129 static void shadow_walk_init_using_root(struct kvm_shadow_walk_iterator *iterator,
2130 struct kvm_vcpu *vcpu, hpa_t root,
2133 iterator->addr = addr;
2134 iterator->shadow_addr = root;
2135 iterator->level = vcpu->arch.mmu->shadow_root_level;
2137 if (iterator->level >= PT64_ROOT_4LEVEL &&
2138 vcpu->arch.mmu->root_level < PT64_ROOT_4LEVEL &&
2139 !vcpu->arch.mmu->direct_map)
2140 iterator->level = PT32E_ROOT_LEVEL;
2142 if (iterator->level == PT32E_ROOT_LEVEL) {
2144 * prev_root is currently only used for 64-bit hosts. So only
2145 * the active root_hpa is valid here.
2147 BUG_ON(root != vcpu->arch.mmu->root.hpa);
2149 iterator->shadow_addr
2150 = vcpu->arch.mmu->pae_root[(addr >> 30) & 3];
2151 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
2153 if (!iterator->shadow_addr)
2154 iterator->level = 0;
2158 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
2159 struct kvm_vcpu *vcpu, u64 addr)
2161 shadow_walk_init_using_root(iterator, vcpu, vcpu->arch.mmu->root.hpa,
2165 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
2167 if (iterator->level < PG_LEVEL_4K)
2170 iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
2171 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
2175 static void __shadow_walk_next(struct kvm_shadow_walk_iterator *iterator,
2178 if (!is_shadow_present_pte(spte) || is_last_spte(spte, iterator->level)) {
2179 iterator->level = 0;
2183 iterator->shadow_addr = spte & PT64_BASE_ADDR_MASK;
2187 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
2189 __shadow_walk_next(iterator, *iterator->sptep);
2192 static void link_shadow_page(struct kvm_vcpu *vcpu, u64 *sptep,
2193 struct kvm_mmu_page *sp)
2197 BUILD_BUG_ON(VMX_EPT_WRITABLE_MASK != PT_WRITABLE_MASK);
2199 spte = make_nonleaf_spte(sp->spt, sp_ad_disabled(sp));
2201 mmu_spte_set(sptep, spte);
2203 mmu_page_add_parent_pte(vcpu, sp, sptep);
2205 if (sp->unsync_children || sp->unsync)
2209 static void validate_direct_spte(struct kvm_vcpu *vcpu, u64 *sptep,
2210 unsigned direct_access)
2212 if (is_shadow_present_pte(*sptep) && !is_large_pte(*sptep)) {
2213 struct kvm_mmu_page *child;
2216 * For the direct sp, if the guest pte's dirty bit
2217 * changed form clean to dirty, it will corrupt the
2218 * sp's access: allow writable in the read-only sp,
2219 * so we should update the spte at this point to get
2220 * a new sp with the correct access.
2222 child = to_shadow_page(*sptep & PT64_BASE_ADDR_MASK);
2223 if (child->role.access == direct_access)
2226 drop_parent_pte(child, sptep);
2227 kvm_flush_remote_tlbs_with_address(vcpu->kvm, child->gfn, 1);
2231 /* Returns the number of zapped non-leaf child shadow pages. */
2232 static int mmu_page_zap_pte(struct kvm *kvm, struct kvm_mmu_page *sp,
2233 u64 *spte, struct list_head *invalid_list)
2236 struct kvm_mmu_page *child;
2239 if (is_shadow_present_pte(pte)) {
2240 if (is_last_spte(pte, sp->role.level)) {
2241 drop_spte(kvm, spte);
2243 child = to_shadow_page(pte & PT64_BASE_ADDR_MASK);
2244 drop_parent_pte(child, spte);
2247 * Recursively zap nested TDP SPs, parentless SPs are
2248 * unlikely to be used again in the near future. This
2249 * avoids retaining a large number of stale nested SPs.
2251 if (tdp_enabled && invalid_list &&
2252 child->role.guest_mode && !child->parent_ptes.val)
2253 return kvm_mmu_prepare_zap_page(kvm, child,
2256 } else if (is_mmio_spte(pte)) {
2257 mmu_spte_clear_no_track(spte);
2262 static int kvm_mmu_page_unlink_children(struct kvm *kvm,
2263 struct kvm_mmu_page *sp,
2264 struct list_head *invalid_list)
2269 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2270 zapped += mmu_page_zap_pte(kvm, sp, sp->spt + i, invalid_list);
2275 static void kvm_mmu_unlink_parents(struct kvm_mmu_page *sp)
2278 struct rmap_iterator iter;
2280 while ((sptep = rmap_get_first(&sp->parent_ptes, &iter)))
2281 drop_parent_pte(sp, sptep);
2284 static int mmu_zap_unsync_children(struct kvm *kvm,
2285 struct kvm_mmu_page *parent,
2286 struct list_head *invalid_list)
2289 struct mmu_page_path parents;
2290 struct kvm_mmu_pages pages;
2292 if (parent->role.level == PG_LEVEL_4K)
2295 while (mmu_unsync_walk(parent, &pages)) {
2296 struct kvm_mmu_page *sp;
2298 for_each_sp(pages, sp, parents, i) {
2299 kvm_mmu_prepare_zap_page(kvm, sp, invalid_list);
2300 mmu_pages_clear_parents(&parents);
2308 static bool __kvm_mmu_prepare_zap_page(struct kvm *kvm,
2309 struct kvm_mmu_page *sp,
2310 struct list_head *invalid_list,
2313 bool list_unstable, zapped_root = false;
2315 trace_kvm_mmu_prepare_zap_page(sp);
2316 ++kvm->stat.mmu_shadow_zapped;
2317 *nr_zapped = mmu_zap_unsync_children(kvm, sp, invalid_list);
2318 *nr_zapped += kvm_mmu_page_unlink_children(kvm, sp, invalid_list);
2319 kvm_mmu_unlink_parents(sp);
2321 /* Zapping children means active_mmu_pages has become unstable. */
2322 list_unstable = *nr_zapped;
2324 if (!sp->role.invalid && !sp->role.direct)
2325 unaccount_shadowed(kvm, sp);
2328 kvm_unlink_unsync_page(kvm, sp);
2329 if (!sp->root_count) {
2334 * Already invalid pages (previously active roots) are not on
2335 * the active page list. See list_del() in the "else" case of
2338 if (sp->role.invalid)
2339 list_add(&sp->link, invalid_list);
2341 list_move(&sp->link, invalid_list);
2342 kvm_mod_used_mmu_pages(kvm, -1);
2345 * Remove the active root from the active page list, the root
2346 * will be explicitly freed when the root_count hits zero.
2348 list_del(&sp->link);
2351 * Obsolete pages cannot be used on any vCPUs, see the comment
2352 * in kvm_mmu_zap_all_fast(). Note, is_obsolete_sp() also
2353 * treats invalid shadow pages as being obsolete.
2355 zapped_root = !is_obsolete_sp(kvm, sp);
2358 if (sp->lpage_disallowed)
2359 unaccount_huge_nx_page(kvm, sp);
2361 sp->role.invalid = 1;
2364 * Make the request to free obsolete roots after marking the root
2365 * invalid, otherwise other vCPUs may not see it as invalid.
2368 kvm_make_all_cpus_request(kvm, KVM_REQ_MMU_FREE_OBSOLETE_ROOTS);
2369 return list_unstable;
2372 static bool kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
2373 struct list_head *invalid_list)
2377 __kvm_mmu_prepare_zap_page(kvm, sp, invalid_list, &nr_zapped);
2381 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
2382 struct list_head *invalid_list)
2384 struct kvm_mmu_page *sp, *nsp;
2386 if (list_empty(invalid_list))
2390 * We need to make sure everyone sees our modifications to
2391 * the page tables and see changes to vcpu->mode here. The barrier
2392 * in the kvm_flush_remote_tlbs() achieves this. This pairs
2393 * with vcpu_enter_guest and walk_shadow_page_lockless_begin/end.
2395 * In addition, kvm_flush_remote_tlbs waits for all vcpus to exit
2396 * guest mode and/or lockless shadow page table walks.
2398 kvm_flush_remote_tlbs(kvm);
2400 list_for_each_entry_safe(sp, nsp, invalid_list, link) {
2401 WARN_ON(!sp->role.invalid || sp->root_count);
2402 kvm_mmu_free_page(sp);
2406 static unsigned long kvm_mmu_zap_oldest_mmu_pages(struct kvm *kvm,
2407 unsigned long nr_to_zap)
2409 unsigned long total_zapped = 0;
2410 struct kvm_mmu_page *sp, *tmp;
2411 LIST_HEAD(invalid_list);
2415 if (list_empty(&kvm->arch.active_mmu_pages))
2419 list_for_each_entry_safe_reverse(sp, tmp, &kvm->arch.active_mmu_pages, link) {
2421 * Don't zap active root pages, the page itself can't be freed
2422 * and zapping it will just force vCPUs to realloc and reload.
2427 unstable = __kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list,
2429 total_zapped += nr_zapped;
2430 if (total_zapped >= nr_to_zap)
2437 kvm_mmu_commit_zap_page(kvm, &invalid_list);
2439 kvm->stat.mmu_recycled += total_zapped;
2440 return total_zapped;
2443 static inline unsigned long kvm_mmu_available_pages(struct kvm *kvm)
2445 if (kvm->arch.n_max_mmu_pages > kvm->arch.n_used_mmu_pages)
2446 return kvm->arch.n_max_mmu_pages -
2447 kvm->arch.n_used_mmu_pages;
2452 static int make_mmu_pages_available(struct kvm_vcpu *vcpu)
2454 unsigned long avail = kvm_mmu_available_pages(vcpu->kvm);
2456 if (likely(avail >= KVM_MIN_FREE_MMU_PAGES))
2459 kvm_mmu_zap_oldest_mmu_pages(vcpu->kvm, KVM_REFILL_PAGES - avail);
2462 * Note, this check is intentionally soft, it only guarantees that one
2463 * page is available, while the caller may end up allocating as many as
2464 * four pages, e.g. for PAE roots or for 5-level paging. Temporarily
2465 * exceeding the (arbitrary by default) limit will not harm the host,
2466 * being too aggressive may unnecessarily kill the guest, and getting an
2467 * exact count is far more trouble than it's worth, especially in the
2470 if (!kvm_mmu_available_pages(vcpu->kvm))
2476 * Changing the number of mmu pages allocated to the vm
2477 * Note: if goal_nr_mmu_pages is too small, you will get dead lock
2479 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned long goal_nr_mmu_pages)
2481 write_lock(&kvm->mmu_lock);
2483 if (kvm->arch.n_used_mmu_pages > goal_nr_mmu_pages) {
2484 kvm_mmu_zap_oldest_mmu_pages(kvm, kvm->arch.n_used_mmu_pages -
2487 goal_nr_mmu_pages = kvm->arch.n_used_mmu_pages;
2490 kvm->arch.n_max_mmu_pages = goal_nr_mmu_pages;
2492 write_unlock(&kvm->mmu_lock);
2495 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
2497 struct kvm_mmu_page *sp;
2498 LIST_HEAD(invalid_list);
2501 pgprintk("%s: looking for gfn %llx\n", __func__, gfn);
2503 write_lock(&kvm->mmu_lock);
2504 for_each_gfn_indirect_valid_sp(kvm, sp, gfn) {
2505 pgprintk("%s: gfn %llx role %x\n", __func__, gfn,
2508 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
2510 kvm_mmu_commit_zap_page(kvm, &invalid_list);
2511 write_unlock(&kvm->mmu_lock);
2516 static int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2521 if (vcpu->arch.mmu->direct_map)
2524 gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
2526 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2531 static void kvm_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
2533 trace_kvm_mmu_unsync_page(sp);
2534 ++kvm->stat.mmu_unsync;
2537 kvm_mmu_mark_parents_unsync(sp);
2541 * Attempt to unsync any shadow pages that can be reached by the specified gfn,
2542 * KVM is creating a writable mapping for said gfn. Returns 0 if all pages
2543 * were marked unsync (or if there is no shadow page), -EPERM if the SPTE must
2544 * be write-protected.
2546 int mmu_try_to_unsync_pages(struct kvm *kvm, const struct kvm_memory_slot *slot,
2547 gfn_t gfn, bool can_unsync, bool prefetch)
2549 struct kvm_mmu_page *sp;
2550 bool locked = false;
2553 * Force write-protection if the page is being tracked. Note, the page
2554 * track machinery is used to write-protect upper-level shadow pages,
2555 * i.e. this guards the role.level == 4K assertion below!
2557 if (kvm_slot_page_track_is_active(kvm, slot, gfn, KVM_PAGE_TRACK_WRITE))
2561 * The page is not write-tracked, mark existing shadow pages unsync
2562 * unless KVM is synchronizing an unsync SP (can_unsync = false). In
2563 * that case, KVM must complete emulation of the guest TLB flush before
2564 * allowing shadow pages to become unsync (writable by the guest).
2566 for_each_gfn_indirect_valid_sp(kvm, sp, gfn) {
2577 * TDP MMU page faults require an additional spinlock as they
2578 * run with mmu_lock held for read, not write, and the unsync
2579 * logic is not thread safe. Take the spinklock regardless of
2580 * the MMU type to avoid extra conditionals/parameters, there's
2581 * no meaningful penalty if mmu_lock is held for write.
2585 spin_lock(&kvm->arch.mmu_unsync_pages_lock);
2588 * Recheck after taking the spinlock, a different vCPU
2589 * may have since marked the page unsync. A false
2590 * positive on the unprotected check above is not
2591 * possible as clearing sp->unsync _must_ hold mmu_lock
2592 * for write, i.e. unsync cannot transition from 0->1
2593 * while this CPU holds mmu_lock for read (or write).
2595 if (READ_ONCE(sp->unsync))
2599 WARN_ON(sp->role.level != PG_LEVEL_4K);
2600 kvm_unsync_page(kvm, sp);
2603 spin_unlock(&kvm->arch.mmu_unsync_pages_lock);
2606 * We need to ensure that the marking of unsync pages is visible
2607 * before the SPTE is updated to allow writes because
2608 * kvm_mmu_sync_roots() checks the unsync flags without holding
2609 * the MMU lock and so can race with this. If the SPTE was updated
2610 * before the page had been marked as unsync-ed, something like the
2611 * following could happen:
2614 * ---------------------------------------------------------------------
2615 * 1.2 Host updates SPTE
2617 * 2.1 Guest writes a GPTE for GVA X.
2618 * (GPTE being in the guest page table shadowed
2619 * by the SP from CPU 1.)
2620 * This reads SPTE during the page table walk.
2621 * Since SPTE.W is read as 1, there is no
2624 * 2.2 Guest issues TLB flush.
2625 * That causes a VM Exit.
2627 * 2.3 Walking of unsync pages sees sp->unsync is
2628 * false and skips the page.
2630 * 2.4 Guest accesses GVA X.
2631 * Since the mapping in the SP was not updated,
2632 * so the old mapping for GVA X incorrectly
2636 * (sp->unsync = true)
2638 * The write barrier below ensures that 1.1 happens before 1.2 and thus
2639 * the situation in 2.4 does not arise. It pairs with the read barrier
2640 * in is_unsync_root(), placed between 2.1's load of SPTE.W and 2.3.
2647 static int mmu_set_spte(struct kvm_vcpu *vcpu, struct kvm_memory_slot *slot,
2648 u64 *sptep, unsigned int pte_access, gfn_t gfn,
2649 kvm_pfn_t pfn, struct kvm_page_fault *fault)
2651 struct kvm_mmu_page *sp = sptep_to_sp(sptep);
2652 int level = sp->role.level;
2653 int was_rmapped = 0;
2654 int ret = RET_PF_FIXED;
2659 /* Prefetching always gets a writable pfn. */
2660 bool host_writable = !fault || fault->map_writable;
2661 bool prefetch = !fault || fault->prefetch;
2662 bool write_fault = fault && fault->write;
2664 pgprintk("%s: spte %llx write_fault %d gfn %llx\n", __func__,
2665 *sptep, write_fault, gfn);
2667 if (unlikely(is_noslot_pfn(pfn))) {
2668 mark_mmio_spte(vcpu, sptep, gfn, pte_access);
2669 return RET_PF_EMULATE;
2672 if (is_shadow_present_pte(*sptep)) {
2674 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
2675 * the parent of the now unreachable PTE.
2677 if (level > PG_LEVEL_4K && !is_large_pte(*sptep)) {
2678 struct kvm_mmu_page *child;
2681 child = to_shadow_page(pte & PT64_BASE_ADDR_MASK);
2682 drop_parent_pte(child, sptep);
2684 } else if (pfn != spte_to_pfn(*sptep)) {
2685 pgprintk("hfn old %llx new %llx\n",
2686 spte_to_pfn(*sptep), pfn);
2687 drop_spte(vcpu->kvm, sptep);
2693 wrprot = make_spte(vcpu, sp, slot, pte_access, gfn, pfn, *sptep, prefetch,
2694 true, host_writable, &spte);
2696 if (*sptep == spte) {
2697 ret = RET_PF_SPURIOUS;
2699 flush |= mmu_spte_update(sptep, spte);
2700 trace_kvm_mmu_set_spte(level, gfn, sptep);
2705 ret = RET_PF_EMULATE;
2709 kvm_flush_remote_tlbs_with_address(vcpu->kvm, gfn,
2710 KVM_PAGES_PER_HPAGE(level));
2712 pgprintk("%s: setting spte %llx\n", __func__, *sptep);
2715 WARN_ON_ONCE(ret == RET_PF_SPURIOUS);
2716 kvm_update_page_stats(vcpu->kvm, level, 1);
2717 rmap_add(vcpu, slot, sptep, gfn);
2723 static int direct_pte_prefetch_many(struct kvm_vcpu *vcpu,
2724 struct kvm_mmu_page *sp,
2725 u64 *start, u64 *end)
2727 struct page *pages[PTE_PREFETCH_NUM];
2728 struct kvm_memory_slot *slot;
2729 unsigned int access = sp->role.access;
2733 gfn = kvm_mmu_page_get_gfn(sp, start - sp->spt);
2734 slot = gfn_to_memslot_dirty_bitmap(vcpu, gfn, access & ACC_WRITE_MASK);
2738 ret = gfn_to_page_many_atomic(slot, gfn, pages, end - start);
2742 for (i = 0; i < ret; i++, gfn++, start++) {
2743 mmu_set_spte(vcpu, slot, start, access, gfn,
2744 page_to_pfn(pages[i]), NULL);
2751 static void __direct_pte_prefetch(struct kvm_vcpu *vcpu,
2752 struct kvm_mmu_page *sp, u64 *sptep)
2754 u64 *spte, *start = NULL;
2757 WARN_ON(!sp->role.direct);
2759 i = (sptep - sp->spt) & ~(PTE_PREFETCH_NUM - 1);
2762 for (i = 0; i < PTE_PREFETCH_NUM; i++, spte++) {
2763 if (is_shadow_present_pte(*spte) || spte == sptep) {
2766 if (direct_pte_prefetch_many(vcpu, sp, start, spte) < 0)
2773 direct_pte_prefetch_many(vcpu, sp, start, spte);
2776 static void direct_pte_prefetch(struct kvm_vcpu *vcpu, u64 *sptep)
2778 struct kvm_mmu_page *sp;
2780 sp = sptep_to_sp(sptep);
2783 * Without accessed bits, there's no way to distinguish between
2784 * actually accessed translations and prefetched, so disable pte
2785 * prefetch if accessed bits aren't available.
2787 if (sp_ad_disabled(sp))
2790 if (sp->role.level > PG_LEVEL_4K)
2794 * If addresses are being invalidated, skip prefetching to avoid
2795 * accidentally prefetching those addresses.
2797 if (unlikely(vcpu->kvm->mmu_notifier_count))
2800 __direct_pte_prefetch(vcpu, sp, sptep);
2803 static int host_pfn_mapping_level(struct kvm *kvm, gfn_t gfn, kvm_pfn_t pfn,
2804 const struct kvm_memory_slot *slot)
2810 if (!PageCompound(pfn_to_page(pfn)) && !kvm_is_zone_device_pfn(pfn))
2814 * Note, using the already-retrieved memslot and __gfn_to_hva_memslot()
2815 * is not solely for performance, it's also necessary to avoid the
2816 * "writable" check in __gfn_to_hva_many(), which will always fail on
2817 * read-only memslots due to gfn_to_hva() assuming writes. Earlier
2818 * page fault steps have already verified the guest isn't writing a
2819 * read-only memslot.
2821 hva = __gfn_to_hva_memslot(slot, gfn);
2823 pte = lookup_address_in_mm(kvm->mm, hva, &level);
2830 int kvm_mmu_max_mapping_level(struct kvm *kvm,
2831 const struct kvm_memory_slot *slot, gfn_t gfn,
2832 kvm_pfn_t pfn, int max_level)
2834 struct kvm_lpage_info *linfo;
2837 max_level = min(max_level, max_huge_page_level);
2838 for ( ; max_level > PG_LEVEL_4K; max_level--) {
2839 linfo = lpage_info_slot(gfn, slot, max_level);
2840 if (!linfo->disallow_lpage)
2844 if (max_level == PG_LEVEL_4K)
2847 host_level = host_pfn_mapping_level(kvm, gfn, pfn, slot);
2848 return min(host_level, max_level);
2851 void kvm_mmu_hugepage_adjust(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault)
2853 struct kvm_memory_slot *slot = fault->slot;
2856 fault->huge_page_disallowed = fault->exec && fault->nx_huge_page_workaround_enabled;
2858 if (unlikely(fault->max_level == PG_LEVEL_4K))
2861 if (is_error_noslot_pfn(fault->pfn) || kvm_is_reserved_pfn(fault->pfn))
2864 if (kvm_slot_dirty_track_enabled(slot))
2868 * Enforce the iTLB multihit workaround after capturing the requested
2869 * level, which will be used to do precise, accurate accounting.
2871 fault->req_level = kvm_mmu_max_mapping_level(vcpu->kvm, slot,
2872 fault->gfn, fault->pfn,
2874 if (fault->req_level == PG_LEVEL_4K || fault->huge_page_disallowed)
2878 * mmu_notifier_retry() was successful and mmu_lock is held, so
2879 * the pmd can't be split from under us.
2881 fault->goal_level = fault->req_level;
2882 mask = KVM_PAGES_PER_HPAGE(fault->goal_level) - 1;
2883 VM_BUG_ON((fault->gfn & mask) != (fault->pfn & mask));
2884 fault->pfn &= ~mask;
2887 void disallowed_hugepage_adjust(struct kvm_page_fault *fault, u64 spte, int cur_level)
2889 if (cur_level > PG_LEVEL_4K &&
2890 cur_level == fault->goal_level &&
2891 is_shadow_present_pte(spte) &&
2892 !is_large_pte(spte)) {
2894 * A small SPTE exists for this pfn, but FNAME(fetch)
2895 * and __direct_map would like to create a large PTE
2896 * instead: just force them to go down another level,
2897 * patching back for them into pfn the next 9 bits of
2900 u64 page_mask = KVM_PAGES_PER_HPAGE(cur_level) -
2901 KVM_PAGES_PER_HPAGE(cur_level - 1);
2902 fault->pfn |= fault->gfn & page_mask;
2903 fault->goal_level--;
2907 static int __direct_map(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault)
2909 struct kvm_shadow_walk_iterator it;
2910 struct kvm_mmu_page *sp;
2912 gfn_t base_gfn = fault->gfn;
2914 kvm_mmu_hugepage_adjust(vcpu, fault);
2916 trace_kvm_mmu_spte_requested(fault);
2917 for_each_shadow_entry(vcpu, fault->addr, it) {
2919 * We cannot overwrite existing page tables with an NX
2920 * large page, as the leaf could be executable.
2922 if (fault->nx_huge_page_workaround_enabled)
2923 disallowed_hugepage_adjust(fault, *it.sptep, it.level);
2925 base_gfn = fault->gfn & ~(KVM_PAGES_PER_HPAGE(it.level) - 1);
2926 if (it.level == fault->goal_level)
2929 drop_large_spte(vcpu, it.sptep);
2930 if (is_shadow_present_pte(*it.sptep))
2933 sp = kvm_mmu_get_page(vcpu, base_gfn, it.addr,
2934 it.level - 1, true, ACC_ALL);
2936 link_shadow_page(vcpu, it.sptep, sp);
2937 if (fault->is_tdp && fault->huge_page_disallowed &&
2938 fault->req_level >= it.level)
2939 account_huge_nx_page(vcpu->kvm, sp);
2942 if (WARN_ON_ONCE(it.level != fault->goal_level))
2945 ret = mmu_set_spte(vcpu, fault->slot, it.sptep, ACC_ALL,
2946 base_gfn, fault->pfn, fault);
2947 if (ret == RET_PF_SPURIOUS)
2950 direct_pte_prefetch(vcpu, it.sptep);
2951 ++vcpu->stat.pf_fixed;
2955 static void kvm_send_hwpoison_signal(unsigned long address, struct task_struct *tsk)
2957 send_sig_mceerr(BUS_MCEERR_AR, (void __user *)address, PAGE_SHIFT, tsk);
2960 static int kvm_handle_bad_page(struct kvm_vcpu *vcpu, gfn_t gfn, kvm_pfn_t pfn)
2963 * Do not cache the mmio info caused by writing the readonly gfn
2964 * into the spte otherwise read access on readonly gfn also can
2965 * caused mmio page fault and treat it as mmio access.
2967 if (pfn == KVM_PFN_ERR_RO_FAULT)
2968 return RET_PF_EMULATE;
2970 if (pfn == KVM_PFN_ERR_HWPOISON) {
2971 kvm_send_hwpoison_signal(kvm_vcpu_gfn_to_hva(vcpu, gfn), current);
2972 return RET_PF_RETRY;
2978 static bool handle_abnormal_pfn(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault,
2979 unsigned int access, int *ret_val)
2981 /* The pfn is invalid, report the error! */
2982 if (unlikely(is_error_pfn(fault->pfn))) {
2983 *ret_val = kvm_handle_bad_page(vcpu, fault->gfn, fault->pfn);
2987 if (unlikely(!fault->slot)) {
2988 gva_t gva = fault->is_tdp ? 0 : fault->addr;
2990 vcpu_cache_mmio_info(vcpu, gva, fault->gfn,
2991 access & shadow_mmio_access_mask);
2993 * If MMIO caching is disabled, emulate immediately without
2994 * touching the shadow page tables as attempting to install an
2995 * MMIO SPTE will just be an expensive nop.
2997 if (unlikely(!shadow_mmio_value)) {
2998 *ret_val = RET_PF_EMULATE;
3006 static bool page_fault_can_be_fast(struct kvm_page_fault *fault)
3009 * Do not fix the mmio spte with invalid generation number which
3010 * need to be updated by slow page fault path.
3015 /* See if the page fault is due to an NX violation */
3016 if (unlikely(fault->exec && fault->present))
3020 * #PF can be fast if:
3021 * 1. The shadow page table entry is not present, which could mean that
3022 * the fault is potentially caused by access tracking (if enabled).
3023 * 2. The shadow page table entry is present and the fault
3024 * is caused by write-protect, that means we just need change the W
3025 * bit of the spte which can be done out of mmu-lock.
3027 * However, if access tracking is disabled we know that a non-present
3028 * page must be a genuine page fault where we have to create a new SPTE.
3029 * So, if access tracking is disabled, we return true only for write
3030 * accesses to a present page.
3033 return shadow_acc_track_mask != 0 || (fault->write && fault->present);
3037 * Returns true if the SPTE was fixed successfully. Otherwise,
3038 * someone else modified the SPTE from its original value.
3041 fast_pf_fix_direct_spte(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault,
3042 u64 *sptep, u64 old_spte, u64 new_spte)
3045 * Theoretically we could also set dirty bit (and flush TLB) here in
3046 * order to eliminate unnecessary PML logging. See comments in
3047 * set_spte. But fast_page_fault is very unlikely to happen with PML
3048 * enabled, so we do not do this. This might result in the same GPA
3049 * to be logged in PML buffer again when the write really happens, and
3050 * eventually to be called by mark_page_dirty twice. But it's also no
3051 * harm. This also avoids the TLB flush needed after setting dirty bit
3052 * so non-PML cases won't be impacted.
3054 * Compare with set_spte where instead shadow_dirty_mask is set.
3056 if (cmpxchg64(sptep, old_spte, new_spte) != old_spte)
3059 if (is_writable_pte(new_spte) && !is_writable_pte(old_spte))
3060 mark_page_dirty_in_slot(vcpu->kvm, fault->slot, fault->gfn);
3065 static bool is_access_allowed(struct kvm_page_fault *fault, u64 spte)
3068 return is_executable_pte(spte);
3071 return is_writable_pte(spte);
3073 /* Fault was on Read access */
3074 return spte & PT_PRESENT_MASK;
3078 * Returns the last level spte pointer of the shadow page walk for the given
3079 * gpa, and sets *spte to the spte value. This spte may be non-preset. If no
3080 * walk could be performed, returns NULL and *spte does not contain valid data.
3083 * - Must be called between walk_shadow_page_lockless_{begin,end}.
3084 * - The returned sptep must not be used after walk_shadow_page_lockless_end.
3086 static u64 *fast_pf_get_last_sptep(struct kvm_vcpu *vcpu, gpa_t gpa, u64 *spte)
3088 struct kvm_shadow_walk_iterator iterator;
3092 for_each_shadow_entry_lockless(vcpu, gpa, iterator, old_spte) {
3093 sptep = iterator.sptep;
3101 * Returns one of RET_PF_INVALID, RET_PF_FIXED or RET_PF_SPURIOUS.
3103 static int fast_page_fault(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault)
3105 struct kvm_mmu_page *sp;
3106 int ret = RET_PF_INVALID;
3109 uint retry_count = 0;
3111 if (!page_fault_can_be_fast(fault))
3114 walk_shadow_page_lockless_begin(vcpu);
3119 if (is_tdp_mmu(vcpu->arch.mmu))
3120 sptep = kvm_tdp_mmu_fast_pf_get_last_sptep(vcpu, fault->addr, &spte);
3122 sptep = fast_pf_get_last_sptep(vcpu, fault->addr, &spte);
3124 if (!is_shadow_present_pte(spte))
3127 sp = sptep_to_sp(sptep);
3128 if (!is_last_spte(spte, sp->role.level))
3132 * Check whether the memory access that caused the fault would
3133 * still cause it if it were to be performed right now. If not,
3134 * then this is a spurious fault caused by TLB lazily flushed,
3135 * or some other CPU has already fixed the PTE after the
3136 * current CPU took the fault.
3138 * Need not check the access of upper level table entries since
3139 * they are always ACC_ALL.
3141 if (is_access_allowed(fault, spte)) {
3142 ret = RET_PF_SPURIOUS;
3148 if (is_access_track_spte(spte))
3149 new_spte = restore_acc_track_spte(new_spte);
3152 * Currently, to simplify the code, write-protection can
3153 * be removed in the fast path only if the SPTE was
3154 * write-protected for dirty-logging or access tracking.
3157 spte_can_locklessly_be_made_writable(spte)) {
3158 new_spte |= PT_WRITABLE_MASK;
3161 * Do not fix write-permission on the large spte when
3162 * dirty logging is enabled. Since we only dirty the
3163 * first page into the dirty-bitmap in
3164 * fast_pf_fix_direct_spte(), other pages are missed
3165 * if its slot has dirty logging enabled.
3167 * Instead, we let the slow page fault path create a
3168 * normal spte to fix the access.
3170 if (sp->role.level > PG_LEVEL_4K &&
3171 kvm_slot_dirty_track_enabled(fault->slot))
3175 /* Verify that the fault can be handled in the fast path */
3176 if (new_spte == spte ||
3177 !is_access_allowed(fault, new_spte))
3181 * Currently, fast page fault only works for direct mapping
3182 * since the gfn is not stable for indirect shadow page. See
3183 * Documentation/virt/kvm/locking.rst to get more detail.
3185 if (fast_pf_fix_direct_spte(vcpu, fault, sptep, spte, new_spte)) {
3190 if (++retry_count > 4) {
3191 printk_once(KERN_WARNING
3192 "kvm: Fast #PF retrying more than 4 times.\n");
3198 trace_fast_page_fault(vcpu, fault, sptep, spte, ret);
3199 walk_shadow_page_lockless_end(vcpu);
3204 static void mmu_free_root_page(struct kvm *kvm, hpa_t *root_hpa,
3205 struct list_head *invalid_list)
3207 struct kvm_mmu_page *sp;
3209 if (!VALID_PAGE(*root_hpa))
3212 sp = to_shadow_page(*root_hpa & PT64_BASE_ADDR_MASK);
3216 if (is_tdp_mmu_page(sp))
3217 kvm_tdp_mmu_put_root(kvm, sp, false);
3218 else if (!--sp->root_count && sp->role.invalid)
3219 kvm_mmu_prepare_zap_page(kvm, sp, invalid_list);
3221 *root_hpa = INVALID_PAGE;
3224 /* roots_to_free must be some combination of the KVM_MMU_ROOT_* flags */
3225 void kvm_mmu_free_roots(struct kvm *kvm, struct kvm_mmu *mmu,
3226 ulong roots_to_free)
3229 LIST_HEAD(invalid_list);
3230 bool free_active_root;
3232 BUILD_BUG_ON(KVM_MMU_NUM_PREV_ROOTS >= BITS_PER_LONG);
3234 /* Before acquiring the MMU lock, see if we need to do any real work. */
3235 free_active_root = (roots_to_free & KVM_MMU_ROOT_CURRENT)
3236 && VALID_PAGE(mmu->root.hpa);
3238 if (!free_active_root) {
3239 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
3240 if ((roots_to_free & KVM_MMU_ROOT_PREVIOUS(i)) &&
3241 VALID_PAGE(mmu->prev_roots[i].hpa))
3244 if (i == KVM_MMU_NUM_PREV_ROOTS)
3248 write_lock(&kvm->mmu_lock);
3250 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
3251 if (roots_to_free & KVM_MMU_ROOT_PREVIOUS(i))
3252 mmu_free_root_page(kvm, &mmu->prev_roots[i].hpa,
3255 if (free_active_root) {
3256 if (to_shadow_page(mmu->root.hpa)) {
3257 mmu_free_root_page(kvm, &mmu->root.hpa, &invalid_list);
3258 } else if (mmu->pae_root) {
3259 for (i = 0; i < 4; ++i) {
3260 if (!IS_VALID_PAE_ROOT(mmu->pae_root[i]))
3263 mmu_free_root_page(kvm, &mmu->pae_root[i],
3265 mmu->pae_root[i] = INVALID_PAE_ROOT;
3268 mmu->root.hpa = INVALID_PAGE;
3272 kvm_mmu_commit_zap_page(kvm, &invalid_list);
3273 write_unlock(&kvm->mmu_lock);
3275 EXPORT_SYMBOL_GPL(kvm_mmu_free_roots);
3277 void kvm_mmu_free_guest_mode_roots(struct kvm *kvm, struct kvm_mmu *mmu)
3279 unsigned long roots_to_free = 0;
3284 * This should not be called while L2 is active, L2 can't invalidate
3285 * _only_ its own roots, e.g. INVVPID unconditionally exits.
3287 WARN_ON_ONCE(mmu->mmu_role.base.guest_mode);
3289 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) {
3290 root_hpa = mmu->prev_roots[i].hpa;
3291 if (!VALID_PAGE(root_hpa))
3294 if (!to_shadow_page(root_hpa) ||
3295 to_shadow_page(root_hpa)->role.guest_mode)
3296 roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
3299 kvm_mmu_free_roots(kvm, mmu, roots_to_free);
3301 EXPORT_SYMBOL_GPL(kvm_mmu_free_guest_mode_roots);
3304 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
3308 if (!kvm_vcpu_is_visible_gfn(vcpu, root_gfn)) {
3309 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3316 static hpa_t mmu_alloc_root(struct kvm_vcpu *vcpu, gfn_t gfn, gva_t gva,
3317 u8 level, bool direct)
3319 struct kvm_mmu_page *sp;
3321 sp = kvm_mmu_get_page(vcpu, gfn, gva, level, direct, ACC_ALL);
3324 return __pa(sp->spt);
3327 static int mmu_alloc_direct_roots(struct kvm_vcpu *vcpu)
3329 struct kvm_mmu *mmu = vcpu->arch.mmu;
3330 u8 shadow_root_level = mmu->shadow_root_level;
3335 write_lock(&vcpu->kvm->mmu_lock);
3336 r = make_mmu_pages_available(vcpu);
3340 if (is_tdp_mmu_enabled(vcpu->kvm)) {
3341 root = kvm_tdp_mmu_get_vcpu_root_hpa(vcpu);
3342 mmu->root.hpa = root;
3343 } else if (shadow_root_level >= PT64_ROOT_4LEVEL) {
3344 root = mmu_alloc_root(vcpu, 0, 0, shadow_root_level, true);
3345 mmu->root.hpa = root;
3346 } else if (shadow_root_level == PT32E_ROOT_LEVEL) {
3347 if (WARN_ON_ONCE(!mmu->pae_root)) {
3352 for (i = 0; i < 4; ++i) {
3353 WARN_ON_ONCE(IS_VALID_PAE_ROOT(mmu->pae_root[i]));
3355 root = mmu_alloc_root(vcpu, i << (30 - PAGE_SHIFT),
3356 i << 30, PT32_ROOT_LEVEL, true);
3357 mmu->pae_root[i] = root | PT_PRESENT_MASK |
3360 mmu->root.hpa = __pa(mmu->pae_root);
3362 WARN_ONCE(1, "Bad TDP root level = %d\n", shadow_root_level);
3367 /* root.pgd is ignored for direct MMUs. */
3370 write_unlock(&vcpu->kvm->mmu_lock);
3374 static int mmu_first_shadow_root_alloc(struct kvm *kvm)
3376 struct kvm_memslots *slots;
3377 struct kvm_memory_slot *slot;
3381 * Check if this is the first shadow root being allocated before
3384 if (kvm_shadow_root_allocated(kvm))
3387 mutex_lock(&kvm->slots_arch_lock);
3389 /* Recheck, under the lock, whether this is the first shadow root. */
3390 if (kvm_shadow_root_allocated(kvm))
3394 * Check if anything actually needs to be allocated, e.g. all metadata
3395 * will be allocated upfront if TDP is disabled.
3397 if (kvm_memslots_have_rmaps(kvm) &&
3398 kvm_page_track_write_tracking_enabled(kvm))
3401 for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
3402 slots = __kvm_memslots(kvm, i);
3403 kvm_for_each_memslot(slot, bkt, slots) {
3405 * Both of these functions are no-ops if the target is
3406 * already allocated, so unconditionally calling both
3407 * is safe. Intentionally do NOT free allocations on
3408 * failure to avoid having to track which allocations
3409 * were made now versus when the memslot was created.
3410 * The metadata is guaranteed to be freed when the slot
3411 * is freed, and will be kept/used if userspace retries
3412 * KVM_RUN instead of killing the VM.
3414 r = memslot_rmap_alloc(slot, slot->npages);
3417 r = kvm_page_track_write_tracking_alloc(slot);
3424 * Ensure that shadow_root_allocated becomes true strictly after
3425 * all the related pointers are set.
3428 smp_store_release(&kvm->arch.shadow_root_allocated, true);
3431 mutex_unlock(&kvm->slots_arch_lock);
3435 static int mmu_alloc_shadow_roots(struct kvm_vcpu *vcpu)
3437 struct kvm_mmu *mmu = vcpu->arch.mmu;
3438 u64 pdptrs[4], pm_mask;
3439 gfn_t root_gfn, root_pgd;
3444 root_pgd = mmu->get_guest_pgd(vcpu);
3445 root_gfn = root_pgd >> PAGE_SHIFT;
3447 if (mmu_check_root(vcpu, root_gfn))
3451 * On SVM, reading PDPTRs might access guest memory, which might fault
3452 * and thus might sleep. Grab the PDPTRs before acquiring mmu_lock.
3454 if (mmu->root_level == PT32E_ROOT_LEVEL) {
3455 for (i = 0; i < 4; ++i) {
3456 pdptrs[i] = mmu->get_pdptr(vcpu, i);
3457 if (!(pdptrs[i] & PT_PRESENT_MASK))
3460 if (mmu_check_root(vcpu, pdptrs[i] >> PAGE_SHIFT))
3465 r = mmu_first_shadow_root_alloc(vcpu->kvm);
3469 write_lock(&vcpu->kvm->mmu_lock);
3470 r = make_mmu_pages_available(vcpu);
3475 * Do we shadow a long mode page table? If so we need to
3476 * write-protect the guests page table root.
3478 if (mmu->root_level >= PT64_ROOT_4LEVEL) {
3479 root = mmu_alloc_root(vcpu, root_gfn, 0,
3480 mmu->shadow_root_level, false);
3481 mmu->root.hpa = root;
3485 if (WARN_ON_ONCE(!mmu->pae_root)) {
3491 * We shadow a 32 bit page table. This may be a legacy 2-level
3492 * or a PAE 3-level page table. In either case we need to be aware that
3493 * the shadow page table may be a PAE or a long mode page table.
3495 pm_mask = PT_PRESENT_MASK | shadow_me_mask;
3496 if (mmu->shadow_root_level >= PT64_ROOT_4LEVEL) {
3497 pm_mask |= PT_ACCESSED_MASK | PT_WRITABLE_MASK | PT_USER_MASK;
3499 if (WARN_ON_ONCE(!mmu->pml4_root)) {
3503 mmu->pml4_root[0] = __pa(mmu->pae_root) | pm_mask;
3505 if (mmu->shadow_root_level == PT64_ROOT_5LEVEL) {
3506 if (WARN_ON_ONCE(!mmu->pml5_root)) {
3510 mmu->pml5_root[0] = __pa(mmu->pml4_root) | pm_mask;
3514 for (i = 0; i < 4; ++i) {
3515 WARN_ON_ONCE(IS_VALID_PAE_ROOT(mmu->pae_root[i]));
3517 if (mmu->root_level == PT32E_ROOT_LEVEL) {
3518 if (!(pdptrs[i] & PT_PRESENT_MASK)) {
3519 mmu->pae_root[i] = INVALID_PAE_ROOT;
3522 root_gfn = pdptrs[i] >> PAGE_SHIFT;
3525 root = mmu_alloc_root(vcpu, root_gfn, i << 30,
3526 PT32_ROOT_LEVEL, false);
3527 mmu->pae_root[i] = root | pm_mask;
3530 if (mmu->shadow_root_level == PT64_ROOT_5LEVEL)
3531 mmu->root.hpa = __pa(mmu->pml5_root);
3532 else if (mmu->shadow_root_level == PT64_ROOT_4LEVEL)
3533 mmu->root.hpa = __pa(mmu->pml4_root);
3535 mmu->root.hpa = __pa(mmu->pae_root);
3538 mmu->root.pgd = root_pgd;
3540 write_unlock(&vcpu->kvm->mmu_lock);
3545 static int mmu_alloc_special_roots(struct kvm_vcpu *vcpu)
3547 struct kvm_mmu *mmu = vcpu->arch.mmu;
3548 bool need_pml5 = mmu->shadow_root_level > PT64_ROOT_4LEVEL;
3549 u64 *pml5_root = NULL;
3550 u64 *pml4_root = NULL;
3554 * When shadowing 32-bit or PAE NPT with 64-bit NPT, the PML4 and PDP
3555 * tables are allocated and initialized at root creation as there is no
3556 * equivalent level in the guest's NPT to shadow. Allocate the tables
3557 * on demand, as running a 32-bit L1 VMM on 64-bit KVM is very rare.
3559 if (mmu->direct_map || mmu->root_level >= PT64_ROOT_4LEVEL ||
3560 mmu->shadow_root_level < PT64_ROOT_4LEVEL)
3564 * NPT, the only paging mode that uses this horror, uses a fixed number
3565 * of levels for the shadow page tables, e.g. all MMUs are 4-level or
3566 * all MMus are 5-level. Thus, this can safely require that pml5_root
3567 * is allocated if the other roots are valid and pml5 is needed, as any
3568 * prior MMU would also have required pml5.
3570 if (mmu->pae_root && mmu->pml4_root && (!need_pml5 || mmu->pml5_root))
3574 * The special roots should always be allocated in concert. Yell and
3575 * bail if KVM ends up in a state where only one of the roots is valid.
3577 if (WARN_ON_ONCE(!tdp_enabled || mmu->pae_root || mmu->pml4_root ||
3578 (need_pml5 && mmu->pml5_root)))
3582 * Unlike 32-bit NPT, the PDP table doesn't need to be in low mem, and
3583 * doesn't need to be decrypted.
3585 pae_root = (void *)get_zeroed_page(GFP_KERNEL_ACCOUNT);
3589 #ifdef CONFIG_X86_64
3590 pml4_root = (void *)get_zeroed_page(GFP_KERNEL_ACCOUNT);
3595 pml5_root = (void *)get_zeroed_page(GFP_KERNEL_ACCOUNT);
3601 mmu->pae_root = pae_root;
3602 mmu->pml4_root = pml4_root;
3603 mmu->pml5_root = pml5_root;
3607 #ifdef CONFIG_X86_64
3609 free_page((unsigned long)pml4_root);
3611 free_page((unsigned long)pae_root);
3616 static bool is_unsync_root(hpa_t root)
3618 struct kvm_mmu_page *sp;
3620 if (!VALID_PAGE(root))
3624 * The read barrier orders the CPU's read of SPTE.W during the page table
3625 * walk before the reads of sp->unsync/sp->unsync_children here.
3627 * Even if another CPU was marking the SP as unsync-ed simultaneously,
3628 * any guest page table changes are not guaranteed to be visible anyway
3629 * until this VCPU issues a TLB flush strictly after those changes are
3630 * made. We only need to ensure that the other CPU sets these flags
3631 * before any actual changes to the page tables are made. The comments
3632 * in mmu_try_to_unsync_pages() describe what could go wrong if this
3633 * requirement isn't satisfied.
3636 sp = to_shadow_page(root);
3639 * PAE roots (somewhat arbitrarily) aren't backed by shadow pages, the
3640 * PDPTEs for a given PAE root need to be synchronized individually.
3642 if (WARN_ON_ONCE(!sp))
3645 if (sp->unsync || sp->unsync_children)
3651 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
3654 struct kvm_mmu_page *sp;
3656 if (vcpu->arch.mmu->direct_map)
3659 if (!VALID_PAGE(vcpu->arch.mmu->root.hpa))
3662 vcpu_clear_mmio_info(vcpu, MMIO_GVA_ANY);
3664 if (vcpu->arch.mmu->root_level >= PT64_ROOT_4LEVEL) {
3665 hpa_t root = vcpu->arch.mmu->root.hpa;
3666 sp = to_shadow_page(root);
3668 if (!is_unsync_root(root))
3671 write_lock(&vcpu->kvm->mmu_lock);
3672 mmu_sync_children(vcpu, sp, true);
3673 write_unlock(&vcpu->kvm->mmu_lock);
3677 write_lock(&vcpu->kvm->mmu_lock);
3679 for (i = 0; i < 4; ++i) {
3680 hpa_t root = vcpu->arch.mmu->pae_root[i];
3682 if (IS_VALID_PAE_ROOT(root)) {
3683 root &= PT64_BASE_ADDR_MASK;
3684 sp = to_shadow_page(root);
3685 mmu_sync_children(vcpu, sp, true);
3689 write_unlock(&vcpu->kvm->mmu_lock);
3692 void kvm_mmu_sync_prev_roots(struct kvm_vcpu *vcpu)
3694 unsigned long roots_to_free = 0;
3697 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
3698 if (is_unsync_root(vcpu->arch.mmu->prev_roots[i].hpa))
3699 roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
3701 /* sync prev_roots by simply freeing them */
3702 kvm_mmu_free_roots(vcpu->kvm, vcpu->arch.mmu, roots_to_free);
3705 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
3706 gpa_t vaddr, u64 access,
3707 struct x86_exception *exception)
3710 exception->error_code = 0;
3711 return kvm_translate_gpa(vcpu, mmu, vaddr, access, exception);
3714 static bool mmio_info_in_cache(struct kvm_vcpu *vcpu, u64 addr, bool direct)
3717 * A nested guest cannot use the MMIO cache if it is using nested
3718 * page tables, because cr2 is a nGPA while the cache stores GPAs.
3720 if (mmu_is_nested(vcpu))
3724 return vcpu_match_mmio_gpa(vcpu, addr);
3726 return vcpu_match_mmio_gva(vcpu, addr);
3730 * Return the level of the lowest level SPTE added to sptes.
3731 * That SPTE may be non-present.
3733 * Must be called between walk_shadow_page_lockless_{begin,end}.
3735 static int get_walk(struct kvm_vcpu *vcpu, u64 addr, u64 *sptes, int *root_level)
3737 struct kvm_shadow_walk_iterator iterator;
3741 for (shadow_walk_init(&iterator, vcpu, addr),
3742 *root_level = iterator.level;
3743 shadow_walk_okay(&iterator);
3744 __shadow_walk_next(&iterator, spte)) {
3745 leaf = iterator.level;
3746 spte = mmu_spte_get_lockless(iterator.sptep);
3754 /* return true if reserved bit(s) are detected on a valid, non-MMIO SPTE. */
3755 static bool get_mmio_spte(struct kvm_vcpu *vcpu, u64 addr, u64 *sptep)
3757 u64 sptes[PT64_ROOT_MAX_LEVEL + 1];
3758 struct rsvd_bits_validate *rsvd_check;
3759 int root, leaf, level;
3760 bool reserved = false;
3762 walk_shadow_page_lockless_begin(vcpu);
3764 if (is_tdp_mmu(vcpu->arch.mmu))
3765 leaf = kvm_tdp_mmu_get_walk(vcpu, addr, sptes, &root);
3767 leaf = get_walk(vcpu, addr, sptes, &root);
3769 walk_shadow_page_lockless_end(vcpu);
3771 if (unlikely(leaf < 0)) {
3776 *sptep = sptes[leaf];
3779 * Skip reserved bits checks on the terminal leaf if it's not a valid
3780 * SPTE. Note, this also (intentionally) skips MMIO SPTEs, which, by
3781 * design, always have reserved bits set. The purpose of the checks is
3782 * to detect reserved bits on non-MMIO SPTEs. i.e. buggy SPTEs.
3784 if (!is_shadow_present_pte(sptes[leaf]))
3787 rsvd_check = &vcpu->arch.mmu->shadow_zero_check;
3789 for (level = root; level >= leaf; level--)
3790 reserved |= is_rsvd_spte(rsvd_check, sptes[level], level);
3793 pr_err("%s: reserved bits set on MMU-present spte, addr 0x%llx, hierarchy:\n",
3795 for (level = root; level >= leaf; level--)
3796 pr_err("------ spte = 0x%llx level = %d, rsvd bits = 0x%llx",
3797 sptes[level], level,
3798 get_rsvd_bits(rsvd_check, sptes[level], level));
3804 static int handle_mmio_page_fault(struct kvm_vcpu *vcpu, u64 addr, bool direct)
3809 if (mmio_info_in_cache(vcpu, addr, direct))
3810 return RET_PF_EMULATE;
3812 reserved = get_mmio_spte(vcpu, addr, &spte);
3813 if (WARN_ON(reserved))
3816 if (is_mmio_spte(spte)) {
3817 gfn_t gfn = get_mmio_spte_gfn(spte);
3818 unsigned int access = get_mmio_spte_access(spte);
3820 if (!check_mmio_spte(vcpu, spte))
3821 return RET_PF_INVALID;
3826 trace_handle_mmio_page_fault(addr, gfn, access);
3827 vcpu_cache_mmio_info(vcpu, addr, gfn, access);
3828 return RET_PF_EMULATE;
3832 * If the page table is zapped by other cpus, let CPU fault again on
3835 return RET_PF_RETRY;
3838 static bool page_fault_handle_page_track(struct kvm_vcpu *vcpu,
3839 struct kvm_page_fault *fault)
3841 if (unlikely(fault->rsvd))
3844 if (!fault->present || !fault->write)
3848 * guest is writing the page which is write tracked which can
3849 * not be fixed by page fault handler.
3851 if (kvm_slot_page_track_is_active(vcpu->kvm, fault->slot, fault->gfn, KVM_PAGE_TRACK_WRITE))
3857 static void shadow_page_table_clear_flood(struct kvm_vcpu *vcpu, gva_t addr)
3859 struct kvm_shadow_walk_iterator iterator;
3862 walk_shadow_page_lockless_begin(vcpu);
3863 for_each_shadow_entry_lockless(vcpu, addr, iterator, spte)
3864 clear_sp_write_flooding_count(iterator.sptep);
3865 walk_shadow_page_lockless_end(vcpu);
3868 static u32 alloc_apf_token(struct kvm_vcpu *vcpu)
3870 /* make sure the token value is not 0 */
3871 u32 id = vcpu->arch.apf.id;
3874 vcpu->arch.apf.id = 1;
3876 return (vcpu->arch.apf.id++ << 12) | vcpu->vcpu_id;
3879 static bool kvm_arch_setup_async_pf(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
3882 struct kvm_arch_async_pf arch;
3884 arch.token = alloc_apf_token(vcpu);
3886 arch.direct_map = vcpu->arch.mmu->direct_map;
3887 arch.cr3 = vcpu->arch.mmu->get_guest_pgd(vcpu);
3889 return kvm_setup_async_pf(vcpu, cr2_or_gpa,
3890 kvm_vcpu_gfn_to_hva(vcpu, gfn), &arch);
3893 static bool kvm_faultin_pfn(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault, int *r)
3895 struct kvm_memory_slot *slot = fault->slot;
3899 * Retry the page fault if the gfn hit a memslot that is being deleted
3900 * or moved. This ensures any existing SPTEs for the old memslot will
3901 * be zapped before KVM inserts a new MMIO SPTE for the gfn.
3903 if (slot && (slot->flags & KVM_MEMSLOT_INVALID))
3906 if (!kvm_is_visible_memslot(slot)) {
3907 /* Don't expose private memslots to L2. */
3908 if (is_guest_mode(vcpu)) {
3910 fault->pfn = KVM_PFN_NOSLOT;
3911 fault->map_writable = false;
3915 * If the APIC access page exists but is disabled, go directly
3916 * to emulation without caching the MMIO access or creating a
3917 * MMIO SPTE. That way the cache doesn't need to be purged
3918 * when the AVIC is re-enabled.
3920 if (slot && slot->id == APIC_ACCESS_PAGE_PRIVATE_MEMSLOT &&
3921 !kvm_apicv_activated(vcpu->kvm)) {
3922 *r = RET_PF_EMULATE;
3928 fault->pfn = __gfn_to_pfn_memslot(slot, fault->gfn, false, &async,
3929 fault->write, &fault->map_writable,
3932 return false; /* *pfn has correct page already */
3934 if (!fault->prefetch && kvm_can_do_async_pf(vcpu)) {
3935 trace_kvm_try_async_get_page(fault->addr, fault->gfn);
3936 if (kvm_find_async_pf_gfn(vcpu, fault->gfn)) {
3937 trace_kvm_async_pf_doublefault(fault->addr, fault->gfn);
3938 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
3940 } else if (kvm_arch_setup_async_pf(vcpu, fault->addr, fault->gfn))
3944 fault->pfn = __gfn_to_pfn_memslot(slot, fault->gfn, false, NULL,
3945 fault->write, &fault->map_writable,
3955 * Returns true if the page fault is stale and needs to be retried, i.e. if the
3956 * root was invalidated by a memslot update or a relevant mmu_notifier fired.
3958 static bool is_page_fault_stale(struct kvm_vcpu *vcpu,
3959 struct kvm_page_fault *fault, int mmu_seq)
3961 struct kvm_mmu_page *sp = to_shadow_page(vcpu->arch.mmu->root.hpa);
3963 /* Special roots, e.g. pae_root, are not backed by shadow pages. */
3964 if (sp && is_obsolete_sp(vcpu->kvm, sp))
3968 * Roots without an associated shadow page are considered invalid if
3969 * there is a pending request to free obsolete roots. The request is
3970 * only a hint that the current root _may_ be obsolete and needs to be
3971 * reloaded, e.g. if the guest frees a PGD that KVM is tracking as a
3972 * previous root, then __kvm_mmu_prepare_zap_page() signals all vCPUs
3973 * to reload even if no vCPU is actively using the root.
3975 if (!sp && kvm_test_request(KVM_REQ_MMU_FREE_OBSOLETE_ROOTS, vcpu))
3978 return fault->slot &&
3979 mmu_notifier_retry_hva(vcpu->kvm, mmu_seq, fault->hva);
3982 static int direct_page_fault(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault)
3984 bool is_tdp_mmu_fault = is_tdp_mmu(vcpu->arch.mmu);
3986 unsigned long mmu_seq;
3989 fault->gfn = fault->addr >> PAGE_SHIFT;
3990 fault->slot = kvm_vcpu_gfn_to_memslot(vcpu, fault->gfn);
3992 if (page_fault_handle_page_track(vcpu, fault))
3993 return RET_PF_EMULATE;
3995 r = fast_page_fault(vcpu, fault);
3996 if (r != RET_PF_INVALID)
3999 r = mmu_topup_memory_caches(vcpu, false);
4003 mmu_seq = vcpu->kvm->mmu_notifier_seq;
4006 if (kvm_faultin_pfn(vcpu, fault, &r))
4009 if (handle_abnormal_pfn(vcpu, fault, ACC_ALL, &r))
4014 if (is_tdp_mmu_fault)
4015 read_lock(&vcpu->kvm->mmu_lock);
4017 write_lock(&vcpu->kvm->mmu_lock);
4019 if (is_page_fault_stale(vcpu, fault, mmu_seq))
4022 r = make_mmu_pages_available(vcpu);
4026 if (is_tdp_mmu_fault)
4027 r = kvm_tdp_mmu_map(vcpu, fault);
4029 r = __direct_map(vcpu, fault);
4032 if (is_tdp_mmu_fault)
4033 read_unlock(&vcpu->kvm->mmu_lock);
4035 write_unlock(&vcpu->kvm->mmu_lock);
4036 kvm_release_pfn_clean(fault->pfn);
4040 static int nonpaging_page_fault(struct kvm_vcpu *vcpu,
4041 struct kvm_page_fault *fault)
4043 pgprintk("%s: gva %lx error %x\n", __func__, fault->addr, fault->error_code);
4045 /* This path builds a PAE pagetable, we can map 2mb pages at maximum. */
4046 fault->max_level = PG_LEVEL_2M;
4047 return direct_page_fault(vcpu, fault);
4050 int kvm_handle_page_fault(struct kvm_vcpu *vcpu, u64 error_code,
4051 u64 fault_address, char *insn, int insn_len)
4054 u32 flags = vcpu->arch.apf.host_apf_flags;
4056 #ifndef CONFIG_X86_64
4057 /* A 64-bit CR2 should be impossible on 32-bit KVM. */
4058 if (WARN_ON_ONCE(fault_address >> 32))
4062 vcpu->arch.l1tf_flush_l1d = true;
4064 trace_kvm_page_fault(fault_address, error_code);
4066 if (kvm_event_needs_reinjection(vcpu))
4067 kvm_mmu_unprotect_page_virt(vcpu, fault_address);
4068 r = kvm_mmu_page_fault(vcpu, fault_address, error_code, insn,
4070 } else if (flags & KVM_PV_REASON_PAGE_NOT_PRESENT) {
4071 vcpu->arch.apf.host_apf_flags = 0;
4072 local_irq_disable();
4073 kvm_async_pf_task_wait_schedule(fault_address);
4076 WARN_ONCE(1, "Unexpected host async PF flags: %x\n", flags);
4081 EXPORT_SYMBOL_GPL(kvm_handle_page_fault);
4083 int kvm_tdp_page_fault(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault)
4085 while (fault->max_level > PG_LEVEL_4K) {
4086 int page_num = KVM_PAGES_PER_HPAGE(fault->max_level);
4087 gfn_t base = (fault->addr >> PAGE_SHIFT) & ~(page_num - 1);
4089 if (kvm_mtrr_check_gfn_range_consistency(vcpu, base, page_num))
4095 return direct_page_fault(vcpu, fault);
4098 static void nonpaging_init_context(struct kvm_mmu *context)
4100 context->page_fault = nonpaging_page_fault;
4101 context->gva_to_gpa = nonpaging_gva_to_gpa;
4102 context->sync_page = nonpaging_sync_page;
4103 context->invlpg = NULL;
4104 context->direct_map = true;
4107 static inline bool is_root_usable(struct kvm_mmu_root_info *root, gpa_t pgd,
4108 union kvm_mmu_page_role role)
4110 return (role.direct || pgd == root->pgd) &&
4111 VALID_PAGE(root->hpa) &&
4112 role.word == to_shadow_page(root->hpa)->role.word;
4116 * Find out if a previously cached root matching the new pgd/role is available,
4117 * and insert the current root as the MRU in the cache.
4118 * If a matching root is found, it is assigned to kvm_mmu->root and
4120 * If no match is found, kvm_mmu->root is left invalid, the LRU root is
4121 * evicted to make room for the current root, and false is returned.
4123 static bool cached_root_find_and_keep_current(struct kvm *kvm, struct kvm_mmu *mmu,
4125 union kvm_mmu_page_role new_role)
4129 if (is_root_usable(&mmu->root, new_pgd, new_role))
4132 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) {
4134 * The swaps end up rotating the cache like this:
4135 * C 0 1 2 3 (on entry to the function)
4139 * 3 C 0 1 2 (on exit from the loop)
4141 swap(mmu->root, mmu->prev_roots[i]);
4142 if (is_root_usable(&mmu->root, new_pgd, new_role))
4146 kvm_mmu_free_roots(kvm, mmu, KVM_MMU_ROOT_CURRENT);
4151 * Find out if a previously cached root matching the new pgd/role is available.
4152 * On entry, mmu->root is invalid.
4153 * If a matching root is found, it is assigned to kvm_mmu->root, the LRU entry
4154 * of the cache becomes invalid, and true is returned.
4155 * If no match is found, kvm_mmu->root is left invalid and false is returned.
4157 static bool cached_root_find_without_current(struct kvm *kvm, struct kvm_mmu *mmu,
4159 union kvm_mmu_page_role new_role)
4163 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
4164 if (is_root_usable(&mmu->prev_roots[i], new_pgd, new_role))
4170 swap(mmu->root, mmu->prev_roots[i]);
4171 /* Bubble up the remaining roots. */
4172 for (; i < KVM_MMU_NUM_PREV_ROOTS - 1; i++)
4173 mmu->prev_roots[i] = mmu->prev_roots[i + 1];
4174 mmu->prev_roots[i].hpa = INVALID_PAGE;
4178 static bool fast_pgd_switch(struct kvm *kvm, struct kvm_mmu *mmu,
4179 gpa_t new_pgd, union kvm_mmu_page_role new_role)
4182 * For now, limit the caching to 64-bit hosts+VMs in order to avoid
4183 * having to deal with PDPTEs. We may add support for 32-bit hosts/VMs
4184 * later if necessary.
4186 if (VALID_PAGE(mmu->root.hpa) && !to_shadow_page(mmu->root.hpa))
4187 kvm_mmu_free_roots(kvm, mmu, KVM_MMU_ROOT_CURRENT);
4189 if (VALID_PAGE(mmu->root.hpa))
4190 return cached_root_find_and_keep_current(kvm, mmu, new_pgd, new_role);
4192 return cached_root_find_without_current(kvm, mmu, new_pgd, new_role);
4195 void kvm_mmu_new_pgd(struct kvm_vcpu *vcpu, gpa_t new_pgd)
4197 struct kvm_mmu *mmu = vcpu->arch.mmu;
4198 union kvm_mmu_page_role new_role = mmu->mmu_role.base;
4200 if (!fast_pgd_switch(vcpu->kvm, mmu, new_pgd, new_role)) {
4201 /* kvm_mmu_ensure_valid_pgd will set up a new root. */
4206 * It's possible that the cached previous root page is obsolete because
4207 * of a change in the MMU generation number. However, changing the
4208 * generation number is accompanied by KVM_REQ_MMU_FREE_OBSOLETE_ROOTS,
4209 * which will free the root set here and allocate a new one.
4211 kvm_make_request(KVM_REQ_LOAD_MMU_PGD, vcpu);
4213 if (force_flush_and_sync_on_reuse) {
4214 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
4215 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
4219 * The last MMIO access's GVA and GPA are cached in the VCPU. When
4220 * switching to a new CR3, that GVA->GPA mapping may no longer be
4221 * valid. So clear any cached MMIO info even when we don't need to sync
4222 * the shadow page tables.
4224 vcpu_clear_mmio_info(vcpu, MMIO_GVA_ANY);
4227 * If this is a direct root page, it doesn't have a write flooding
4228 * count. Otherwise, clear the write flooding count.
4230 if (!new_role.direct)
4231 __clear_sp_write_flooding_count(
4232 to_shadow_page(vcpu->arch.mmu->root.hpa));
4234 EXPORT_SYMBOL_GPL(kvm_mmu_new_pgd);
4236 static unsigned long get_cr3(struct kvm_vcpu *vcpu)
4238 return kvm_read_cr3(vcpu);
4241 static bool sync_mmio_spte(struct kvm_vcpu *vcpu, u64 *sptep, gfn_t gfn,
4242 unsigned int access)
4244 if (unlikely(is_mmio_spte(*sptep))) {
4245 if (gfn != get_mmio_spte_gfn(*sptep)) {
4246 mmu_spte_clear_no_track(sptep);
4250 mark_mmio_spte(vcpu, sptep, gfn, access);
4257 #define PTTYPE_EPT 18 /* arbitrary */
4258 #define PTTYPE PTTYPE_EPT
4259 #include "paging_tmpl.h"
4263 #include "paging_tmpl.h"
4267 #include "paging_tmpl.h"
4271 __reset_rsvds_bits_mask(struct rsvd_bits_validate *rsvd_check,
4272 u64 pa_bits_rsvd, int level, bool nx, bool gbpages,
4275 u64 gbpages_bit_rsvd = 0;
4276 u64 nonleaf_bit8_rsvd = 0;
4279 rsvd_check->bad_mt_xwr = 0;
4282 gbpages_bit_rsvd = rsvd_bits(7, 7);
4284 if (level == PT32E_ROOT_LEVEL)
4285 high_bits_rsvd = pa_bits_rsvd & rsvd_bits(0, 62);
4287 high_bits_rsvd = pa_bits_rsvd & rsvd_bits(0, 51);
4289 /* Note, NX doesn't exist in PDPTEs, this is handled below. */
4291 high_bits_rsvd |= rsvd_bits(63, 63);
4294 * Non-leaf PML4Es and PDPEs reserve bit 8 (which would be the G bit for
4295 * leaf entries) on AMD CPUs only.
4298 nonleaf_bit8_rsvd = rsvd_bits(8, 8);
4301 case PT32_ROOT_LEVEL:
4302 /* no rsvd bits for 2 level 4K page table entries */
4303 rsvd_check->rsvd_bits_mask[0][1] = 0;
4304 rsvd_check->rsvd_bits_mask[0][0] = 0;
4305 rsvd_check->rsvd_bits_mask[1][0] =
4306 rsvd_check->rsvd_bits_mask[0][0];
4309 rsvd_check->rsvd_bits_mask[1][1] = 0;
4313 if (is_cpuid_PSE36())
4314 /* 36bits PSE 4MB page */
4315 rsvd_check->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
4317 /* 32 bits PSE 4MB page */
4318 rsvd_check->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
4320 case PT32E_ROOT_LEVEL:
4321 rsvd_check->rsvd_bits_mask[0][2] = rsvd_bits(63, 63) |
4324 rsvd_bits(1, 2); /* PDPTE */
4325 rsvd_check->rsvd_bits_mask[0][1] = high_bits_rsvd; /* PDE */
4326 rsvd_check->rsvd_bits_mask[0][0] = high_bits_rsvd; /* PTE */
4327 rsvd_check->rsvd_bits_mask[1][1] = high_bits_rsvd |
4328 rsvd_bits(13, 20); /* large page */
4329 rsvd_check->rsvd_bits_mask[1][0] =
4330 rsvd_check->rsvd_bits_mask[0][0];
4332 case PT64_ROOT_5LEVEL:
4333 rsvd_check->rsvd_bits_mask[0][4] = high_bits_rsvd |
4336 rsvd_check->rsvd_bits_mask[1][4] =
4337 rsvd_check->rsvd_bits_mask[0][4];
4339 case PT64_ROOT_4LEVEL:
4340 rsvd_check->rsvd_bits_mask[0][3] = high_bits_rsvd |
4343 rsvd_check->rsvd_bits_mask[0][2] = high_bits_rsvd |
4345 rsvd_check->rsvd_bits_mask[0][1] = high_bits_rsvd;
4346 rsvd_check->rsvd_bits_mask[0][0] = high_bits_rsvd;
4347 rsvd_check->rsvd_bits_mask[1][3] =
4348 rsvd_check->rsvd_bits_mask[0][3];
4349 rsvd_check->rsvd_bits_mask[1][2] = high_bits_rsvd |
4352 rsvd_check->rsvd_bits_mask[1][1] = high_bits_rsvd |
4353 rsvd_bits(13, 20); /* large page */
4354 rsvd_check->rsvd_bits_mask[1][0] =
4355 rsvd_check->rsvd_bits_mask[0][0];
4360 static bool guest_can_use_gbpages(struct kvm_vcpu *vcpu)
4363 * If TDP is enabled, let the guest use GBPAGES if they're supported in
4364 * hardware. The hardware page walker doesn't let KVM disable GBPAGES,
4365 * i.e. won't treat them as reserved, and KVM doesn't redo the GVA->GPA
4366 * walk for performance and complexity reasons. Not to mention KVM
4367 * _can't_ solve the problem because GVA->GPA walks aren't visible to
4368 * KVM once a TDP translation is installed. Mimic hardware behavior so
4369 * that KVM's is at least consistent, i.e. doesn't randomly inject #PF.
4371 return tdp_enabled ? boot_cpu_has(X86_FEATURE_GBPAGES) :
4372 guest_cpuid_has(vcpu, X86_FEATURE_GBPAGES);
4375 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu,
4376 struct kvm_mmu *context)
4378 __reset_rsvds_bits_mask(&context->guest_rsvd_check,
4379 vcpu->arch.reserved_gpa_bits,
4380 context->root_level, is_efer_nx(context),
4381 guest_can_use_gbpages(vcpu),
4382 is_cr4_pse(context),
4383 guest_cpuid_is_amd_or_hygon(vcpu));
4387 __reset_rsvds_bits_mask_ept(struct rsvd_bits_validate *rsvd_check,
4388 u64 pa_bits_rsvd, bool execonly, int huge_page_level)
4390 u64 high_bits_rsvd = pa_bits_rsvd & rsvd_bits(0, 51);
4391 u64 large_1g_rsvd = 0, large_2m_rsvd = 0;
4394 if (huge_page_level < PG_LEVEL_1G)
4395 large_1g_rsvd = rsvd_bits(7, 7);
4396 if (huge_page_level < PG_LEVEL_2M)
4397 large_2m_rsvd = rsvd_bits(7, 7);
4399 rsvd_check->rsvd_bits_mask[0][4] = high_bits_rsvd | rsvd_bits(3, 7);
4400 rsvd_check->rsvd_bits_mask[0][3] = high_bits_rsvd | rsvd_bits(3, 7);
4401 rsvd_check->rsvd_bits_mask[0][2] = high_bits_rsvd | rsvd_bits(3, 6) | large_1g_rsvd;
4402 rsvd_check->rsvd_bits_mask[0][1] = high_bits_rsvd | rsvd_bits(3, 6) | large_2m_rsvd;
4403 rsvd_check->rsvd_bits_mask[0][0] = high_bits_rsvd;
4406 rsvd_check->rsvd_bits_mask[1][4] = rsvd_check->rsvd_bits_mask[0][4];
4407 rsvd_check->rsvd_bits_mask[1][3] = rsvd_check->rsvd_bits_mask[0][3];
4408 rsvd_check->rsvd_bits_mask[1][2] = high_bits_rsvd | rsvd_bits(12, 29) | large_1g_rsvd;
4409 rsvd_check->rsvd_bits_mask[1][1] = high_bits_rsvd | rsvd_bits(12, 20) | large_2m_rsvd;
4410 rsvd_check->rsvd_bits_mask[1][0] = rsvd_check->rsvd_bits_mask[0][0];
4412 bad_mt_xwr = 0xFFull << (2 * 8); /* bits 3..5 must not be 2 */
4413 bad_mt_xwr |= 0xFFull << (3 * 8); /* bits 3..5 must not be 3 */
4414 bad_mt_xwr |= 0xFFull << (7 * 8); /* bits 3..5 must not be 7 */
4415 bad_mt_xwr |= REPEAT_BYTE(1ull << 2); /* bits 0..2 must not be 010 */
4416 bad_mt_xwr |= REPEAT_BYTE(1ull << 6); /* bits 0..2 must not be 110 */
4418 /* bits 0..2 must not be 100 unless VMX capabilities allow it */
4419 bad_mt_xwr |= REPEAT_BYTE(1ull << 4);
4421 rsvd_check->bad_mt_xwr = bad_mt_xwr;
4424 static void reset_rsvds_bits_mask_ept(struct kvm_vcpu *vcpu,
4425 struct kvm_mmu *context, bool execonly, int huge_page_level)
4427 __reset_rsvds_bits_mask_ept(&context->guest_rsvd_check,
4428 vcpu->arch.reserved_gpa_bits, execonly,
4432 static inline u64 reserved_hpa_bits(void)
4434 return rsvd_bits(shadow_phys_bits, 63);
4438 * the page table on host is the shadow page table for the page
4439 * table in guest or amd nested guest, its mmu features completely
4440 * follow the features in guest.
4442 static void reset_shadow_zero_bits_mask(struct kvm_vcpu *vcpu,
4443 struct kvm_mmu *context)
4446 * KVM uses NX when TDP is disabled to handle a variety of scenarios,
4447 * notably for huge SPTEs if iTLB multi-hit mitigation is enabled and
4448 * to generate correct permissions for CR0.WP=0/CR4.SMEP=1/EFER.NX=0.
4449 * The iTLB multi-hit workaround can be toggled at any time, so assume
4450 * NX can be used by any non-nested shadow MMU to avoid having to reset
4451 * MMU contexts. Note, KVM forces EFER.NX=1 when TDP is disabled.
4453 bool uses_nx = is_efer_nx(context) || !tdp_enabled;
4455 /* @amd adds a check on bit of SPTEs, which KVM shouldn't use anyways. */
4457 /* KVM doesn't use 2-level page tables for the shadow MMU. */
4458 bool is_pse = false;
4459 struct rsvd_bits_validate *shadow_zero_check;
4462 WARN_ON_ONCE(context->shadow_root_level < PT32E_ROOT_LEVEL);
4464 shadow_zero_check = &context->shadow_zero_check;
4465 __reset_rsvds_bits_mask(shadow_zero_check, reserved_hpa_bits(),
4466 context->shadow_root_level, uses_nx,
4467 guest_can_use_gbpages(vcpu), is_pse, is_amd);
4469 if (!shadow_me_mask)
4472 for (i = context->shadow_root_level; --i >= 0;) {
4473 shadow_zero_check->rsvd_bits_mask[0][i] &= ~shadow_me_mask;
4474 shadow_zero_check->rsvd_bits_mask[1][i] &= ~shadow_me_mask;
4479 static inline bool boot_cpu_is_amd(void)
4481 WARN_ON_ONCE(!tdp_enabled);
4482 return shadow_x_mask == 0;
4486 * the direct page table on host, use as much mmu features as
4487 * possible, however, kvm currently does not do execution-protection.
4490 reset_tdp_shadow_zero_bits_mask(struct kvm_mmu *context)
4492 struct rsvd_bits_validate *shadow_zero_check;
4495 shadow_zero_check = &context->shadow_zero_check;
4497 if (boot_cpu_is_amd())
4498 __reset_rsvds_bits_mask(shadow_zero_check, reserved_hpa_bits(),
4499 context->shadow_root_level, false,
4500 boot_cpu_has(X86_FEATURE_GBPAGES),
4503 __reset_rsvds_bits_mask_ept(shadow_zero_check,
4504 reserved_hpa_bits(), false,
4505 max_huge_page_level);
4507 if (!shadow_me_mask)
4510 for (i = context->shadow_root_level; --i >= 0;) {
4511 shadow_zero_check->rsvd_bits_mask[0][i] &= ~shadow_me_mask;
4512 shadow_zero_check->rsvd_bits_mask[1][i] &= ~shadow_me_mask;
4517 * as the comments in reset_shadow_zero_bits_mask() except it
4518 * is the shadow page table for intel nested guest.
4521 reset_ept_shadow_zero_bits_mask(struct kvm_mmu *context, bool execonly)
4523 __reset_rsvds_bits_mask_ept(&context->shadow_zero_check,
4524 reserved_hpa_bits(), execonly,
4525 max_huge_page_level);
4528 #define BYTE_MASK(access) \
4529 ((1 & (access) ? 2 : 0) | \
4530 (2 & (access) ? 4 : 0) | \
4531 (3 & (access) ? 8 : 0) | \
4532 (4 & (access) ? 16 : 0) | \
4533 (5 & (access) ? 32 : 0) | \
4534 (6 & (access) ? 64 : 0) | \
4535 (7 & (access) ? 128 : 0))
4538 static void update_permission_bitmask(struct kvm_mmu *mmu, bool ept)
4542 const u8 x = BYTE_MASK(ACC_EXEC_MASK);
4543 const u8 w = BYTE_MASK(ACC_WRITE_MASK);
4544 const u8 u = BYTE_MASK(ACC_USER_MASK);
4546 bool cr4_smep = is_cr4_smep(mmu);
4547 bool cr4_smap = is_cr4_smap(mmu);
4548 bool cr0_wp = is_cr0_wp(mmu);
4549 bool efer_nx = is_efer_nx(mmu);
4551 for (byte = 0; byte < ARRAY_SIZE(mmu->permissions); ++byte) {
4552 unsigned pfec = byte << 1;
4555 * Each "*f" variable has a 1 bit for each UWX value
4556 * that causes a fault with the given PFEC.
4559 /* Faults from writes to non-writable pages */
4560 u8 wf = (pfec & PFERR_WRITE_MASK) ? (u8)~w : 0;
4561 /* Faults from user mode accesses to supervisor pages */
4562 u8 uf = (pfec & PFERR_USER_MASK) ? (u8)~u : 0;
4563 /* Faults from fetches of non-executable pages*/
4564 u8 ff = (pfec & PFERR_FETCH_MASK) ? (u8)~x : 0;
4565 /* Faults from kernel mode fetches of user pages */
4567 /* Faults from kernel mode accesses of user pages */
4571 /* Faults from kernel mode accesses to user pages */
4572 u8 kf = (pfec & PFERR_USER_MASK) ? 0 : u;
4574 /* Not really needed: !nx will cause pte.nx to fault */
4578 /* Allow supervisor writes if !cr0.wp */
4580 wf = (pfec & PFERR_USER_MASK) ? wf : 0;
4582 /* Disallow supervisor fetches of user code if cr4.smep */
4584 smepf = (pfec & PFERR_FETCH_MASK) ? kf : 0;
4587 * SMAP:kernel-mode data accesses from user-mode
4588 * mappings should fault. A fault is considered
4589 * as a SMAP violation if all of the following
4590 * conditions are true:
4591 * - X86_CR4_SMAP is set in CR4
4592 * - A user page is accessed
4593 * - The access is not a fetch
4594 * - The access is supervisor mode
4595 * - If implicit supervisor access or X86_EFLAGS_AC is clear
4597 * Here, we cover the first four conditions.
4598 * The fifth is computed dynamically in permission_fault();
4599 * PFERR_RSVD_MASK bit will be set in PFEC if the access is
4600 * *not* subject to SMAP restrictions.
4603 smapf = (pfec & (PFERR_RSVD_MASK|PFERR_FETCH_MASK)) ? 0 : kf;
4606 mmu->permissions[byte] = ff | uf | wf | smepf | smapf;
4611 * PKU is an additional mechanism by which the paging controls access to
4612 * user-mode addresses based on the value in the PKRU register. Protection
4613 * key violations are reported through a bit in the page fault error code.
4614 * Unlike other bits of the error code, the PK bit is not known at the
4615 * call site of e.g. gva_to_gpa; it must be computed directly in
4616 * permission_fault based on two bits of PKRU, on some machine state (CR4,
4617 * CR0, EFER, CPL), and on other bits of the error code and the page tables.
4619 * In particular the following conditions come from the error code, the
4620 * page tables and the machine state:
4621 * - PK is always zero unless CR4.PKE=1 and EFER.LMA=1
4622 * - PK is always zero if RSVD=1 (reserved bit set) or F=1 (instruction fetch)
4623 * - PK is always zero if U=0 in the page tables
4624 * - PKRU.WD is ignored if CR0.WP=0 and the access is a supervisor access.
4626 * The PKRU bitmask caches the result of these four conditions. The error
4627 * code (minus the P bit) and the page table's U bit form an index into the
4628 * PKRU bitmask. Two bits of the PKRU bitmask are then extracted and ANDed
4629 * with the two bits of the PKRU register corresponding to the protection key.
4630 * For the first three conditions above the bits will be 00, thus masking
4631 * away both AD and WD. For all reads or if the last condition holds, WD
4632 * only will be masked away.
4634 static void update_pkru_bitmask(struct kvm_mmu *mmu)
4641 if (!is_cr4_pke(mmu))
4644 wp = is_cr0_wp(mmu);
4646 for (bit = 0; bit < ARRAY_SIZE(mmu->permissions); ++bit) {
4647 unsigned pfec, pkey_bits;
4648 bool check_pkey, check_write, ff, uf, wf, pte_user;
4651 ff = pfec & PFERR_FETCH_MASK;
4652 uf = pfec & PFERR_USER_MASK;
4653 wf = pfec & PFERR_WRITE_MASK;
4655 /* PFEC.RSVD is replaced by ACC_USER_MASK. */
4656 pte_user = pfec & PFERR_RSVD_MASK;
4659 * Only need to check the access which is not an
4660 * instruction fetch and is to a user page.
4662 check_pkey = (!ff && pte_user);
4664 * write access is controlled by PKRU if it is a
4665 * user access or CR0.WP = 1.
4667 check_write = check_pkey && wf && (uf || wp);
4669 /* PKRU.AD stops both read and write access. */
4670 pkey_bits = !!check_pkey;
4671 /* PKRU.WD stops write access. */
4672 pkey_bits |= (!!check_write) << 1;
4674 mmu->pkru_mask |= (pkey_bits & 3) << pfec;
4678 static void reset_guest_paging_metadata(struct kvm_vcpu *vcpu,
4679 struct kvm_mmu *mmu)
4681 if (!is_cr0_pg(mmu))
4684 reset_rsvds_bits_mask(vcpu, mmu);
4685 update_permission_bitmask(mmu, false);
4686 update_pkru_bitmask(mmu);
4689 static void paging64_init_context(struct kvm_mmu *context)
4691 context->page_fault = paging64_page_fault;
4692 context->gva_to_gpa = paging64_gva_to_gpa;
4693 context->sync_page = paging64_sync_page;
4694 context->invlpg = paging64_invlpg;
4695 context->direct_map = false;
4698 static void paging32_init_context(struct kvm_mmu *context)
4700 context->page_fault = paging32_page_fault;
4701 context->gva_to_gpa = paging32_gva_to_gpa;
4702 context->sync_page = paging32_sync_page;
4703 context->invlpg = paging32_invlpg;
4704 context->direct_map = false;
4707 static union kvm_mmu_extended_role kvm_calc_mmu_role_ext(struct kvm_vcpu *vcpu,
4708 struct kvm_mmu_role_regs *regs)
4710 union kvm_mmu_extended_role ext = {0};
4712 if (____is_cr0_pg(regs)) {
4714 ext.cr4_pae = ____is_cr4_pae(regs);
4715 ext.cr4_smep = ____is_cr4_smep(regs);
4716 ext.cr4_smap = ____is_cr4_smap(regs);
4717 ext.cr4_pse = ____is_cr4_pse(regs);
4719 /* PKEY and LA57 are active iff long mode is active. */
4720 ext.cr4_pke = ____is_efer_lma(regs) && ____is_cr4_pke(regs);
4721 ext.cr4_la57 = ____is_efer_lma(regs) && ____is_cr4_la57(regs);
4722 ext.efer_lma = ____is_efer_lma(regs);
4730 static union kvm_mmu_role kvm_calc_mmu_role_common(struct kvm_vcpu *vcpu,
4731 struct kvm_mmu_role_regs *regs,
4734 union kvm_mmu_role role = {0};
4736 role.base.access = ACC_ALL;
4737 if (____is_cr0_pg(regs)) {
4738 role.base.efer_nx = ____is_efer_nx(regs);
4739 role.base.cr0_wp = ____is_cr0_wp(regs);
4741 role.base.smm = is_smm(vcpu);
4742 role.base.guest_mode = is_guest_mode(vcpu);
4747 role.ext = kvm_calc_mmu_role_ext(vcpu, regs);
4752 static inline int kvm_mmu_get_tdp_level(struct kvm_vcpu *vcpu)
4754 /* tdp_root_level is architecture forced level, use it if nonzero */
4756 return tdp_root_level;
4758 /* Use 5-level TDP if and only if it's useful/necessary. */
4759 if (max_tdp_level == 5 && cpuid_maxphyaddr(vcpu) <= 48)
4762 return max_tdp_level;
4765 static union kvm_mmu_role
4766 kvm_calc_tdp_mmu_root_page_role(struct kvm_vcpu *vcpu,
4767 struct kvm_mmu_role_regs *regs, bool base_only)
4769 union kvm_mmu_role role = kvm_calc_mmu_role_common(vcpu, regs, base_only);
4771 role.base.ad_disabled = (shadow_accessed_mask == 0);
4772 role.base.level = kvm_mmu_get_tdp_level(vcpu);
4773 role.base.direct = true;
4774 role.base.has_4_byte_gpte = false;
4779 static void init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
4781 struct kvm_mmu *context = &vcpu->arch.root_mmu;
4782 struct kvm_mmu_role_regs regs = vcpu_to_role_regs(vcpu);
4783 union kvm_mmu_role new_role =
4784 kvm_calc_tdp_mmu_root_page_role(vcpu, ®s, false);
4786 if (new_role.as_u64 == context->mmu_role.as_u64)
4789 context->mmu_role.as_u64 = new_role.as_u64;
4790 context->page_fault = kvm_tdp_page_fault;
4791 context->sync_page = nonpaging_sync_page;
4792 context->invlpg = NULL;
4793 context->shadow_root_level = kvm_mmu_get_tdp_level(vcpu);
4794 context->direct_map = true;
4795 context->get_guest_pgd = get_cr3;
4796 context->get_pdptr = kvm_pdptr_read;
4797 context->inject_page_fault = kvm_inject_page_fault;
4798 context->root_level = role_regs_to_root_level(®s);
4800 if (!is_cr0_pg(context))
4801 context->gva_to_gpa = nonpaging_gva_to_gpa;
4802 else if (is_cr4_pae(context))
4803 context->gva_to_gpa = paging64_gva_to_gpa;
4805 context->gva_to_gpa = paging32_gva_to_gpa;
4807 reset_guest_paging_metadata(vcpu, context);
4808 reset_tdp_shadow_zero_bits_mask(context);
4811 static union kvm_mmu_role
4812 kvm_calc_shadow_root_page_role_common(struct kvm_vcpu *vcpu,
4813 struct kvm_mmu_role_regs *regs, bool base_only)
4815 union kvm_mmu_role role = kvm_calc_mmu_role_common(vcpu, regs, base_only);
4817 role.base.smep_andnot_wp = role.ext.cr4_smep && !____is_cr0_wp(regs);
4818 role.base.smap_andnot_wp = role.ext.cr4_smap && !____is_cr0_wp(regs);
4819 role.base.has_4_byte_gpte = ____is_cr0_pg(regs) && !____is_cr4_pae(regs);
4824 static union kvm_mmu_role
4825 kvm_calc_shadow_mmu_root_page_role(struct kvm_vcpu *vcpu,
4826 struct kvm_mmu_role_regs *regs, bool base_only)
4828 union kvm_mmu_role role =
4829 kvm_calc_shadow_root_page_role_common(vcpu, regs, base_only);
4831 role.base.direct = !____is_cr0_pg(regs);
4833 if (!____is_efer_lma(regs))
4834 role.base.level = PT32E_ROOT_LEVEL;
4835 else if (____is_cr4_la57(regs))
4836 role.base.level = PT64_ROOT_5LEVEL;
4838 role.base.level = PT64_ROOT_4LEVEL;
4843 static void shadow_mmu_init_context(struct kvm_vcpu *vcpu, struct kvm_mmu *context,
4844 struct kvm_mmu_role_regs *regs,
4845 union kvm_mmu_role new_role)
4847 if (new_role.as_u64 == context->mmu_role.as_u64)
4850 context->mmu_role.as_u64 = new_role.as_u64;
4852 if (!is_cr0_pg(context))
4853 nonpaging_init_context(context);
4854 else if (is_cr4_pae(context))
4855 paging64_init_context(context);
4857 paging32_init_context(context);
4858 context->root_level = role_regs_to_root_level(regs);
4860 reset_guest_paging_metadata(vcpu, context);
4861 context->shadow_root_level = new_role.base.level;
4863 reset_shadow_zero_bits_mask(vcpu, context);
4866 static void kvm_init_shadow_mmu(struct kvm_vcpu *vcpu,
4867 struct kvm_mmu_role_regs *regs)
4869 struct kvm_mmu *context = &vcpu->arch.root_mmu;
4870 union kvm_mmu_role new_role =
4871 kvm_calc_shadow_mmu_root_page_role(vcpu, regs, false);
4873 shadow_mmu_init_context(vcpu, context, regs, new_role);
4876 static union kvm_mmu_role
4877 kvm_calc_shadow_npt_root_page_role(struct kvm_vcpu *vcpu,
4878 struct kvm_mmu_role_regs *regs)
4880 union kvm_mmu_role role =
4881 kvm_calc_shadow_root_page_role_common(vcpu, regs, false);
4883 role.base.direct = false;
4884 role.base.level = kvm_mmu_get_tdp_level(vcpu);
4889 void kvm_init_shadow_npt_mmu(struct kvm_vcpu *vcpu, unsigned long cr0,
4890 unsigned long cr4, u64 efer, gpa_t nested_cr3)
4892 struct kvm_mmu *context = &vcpu->arch.guest_mmu;
4893 struct kvm_mmu_role_regs regs = {
4895 .cr4 = cr4 & ~X86_CR4_PKE,
4898 union kvm_mmu_role new_role;
4900 new_role = kvm_calc_shadow_npt_root_page_role(vcpu, ®s);
4902 shadow_mmu_init_context(vcpu, context, ®s, new_role);
4903 kvm_mmu_new_pgd(vcpu, nested_cr3);
4905 EXPORT_SYMBOL_GPL(kvm_init_shadow_npt_mmu);
4907 static union kvm_mmu_role
4908 kvm_calc_shadow_ept_root_page_role(struct kvm_vcpu *vcpu, bool accessed_dirty,
4909 bool execonly, u8 level)
4911 union kvm_mmu_role role = {0};
4913 /* SMM flag is inherited from root_mmu */
4914 role.base.smm = vcpu->arch.root_mmu.mmu_role.base.smm;
4916 role.base.level = level;
4917 role.base.has_4_byte_gpte = false;
4918 role.base.direct = false;
4919 role.base.ad_disabled = !accessed_dirty;
4920 role.base.guest_mode = true;
4921 role.base.access = ACC_ALL;
4923 /* EPT, and thus nested EPT, does not consume CR0, CR4, nor EFER. */
4925 role.ext.execonly = execonly;
4931 void kvm_init_shadow_ept_mmu(struct kvm_vcpu *vcpu, bool execonly,
4932 int huge_page_level, bool accessed_dirty,
4935 struct kvm_mmu *context = &vcpu->arch.guest_mmu;
4936 u8 level = vmx_eptp_page_walk_level(new_eptp);
4937 union kvm_mmu_role new_role =
4938 kvm_calc_shadow_ept_root_page_role(vcpu, accessed_dirty,
4941 if (new_role.as_u64 != context->mmu_role.as_u64) {
4942 context->mmu_role.as_u64 = new_role.as_u64;
4944 context->shadow_root_level = level;
4946 context->ept_ad = accessed_dirty;
4947 context->page_fault = ept_page_fault;
4948 context->gva_to_gpa = ept_gva_to_gpa;
4949 context->sync_page = ept_sync_page;
4950 context->invlpg = ept_invlpg;
4951 context->root_level = level;
4952 context->direct_map = false;
4953 update_permission_bitmask(context, true);
4954 context->pkru_mask = 0;
4955 reset_rsvds_bits_mask_ept(vcpu, context, execonly, huge_page_level);
4956 reset_ept_shadow_zero_bits_mask(context, execonly);
4959 kvm_mmu_new_pgd(vcpu, new_eptp);
4961 EXPORT_SYMBOL_GPL(kvm_init_shadow_ept_mmu);
4963 static void init_kvm_softmmu(struct kvm_vcpu *vcpu)
4965 struct kvm_mmu *context = &vcpu->arch.root_mmu;
4966 struct kvm_mmu_role_regs regs = vcpu_to_role_regs(vcpu);
4968 kvm_init_shadow_mmu(vcpu, ®s);
4970 context->get_guest_pgd = get_cr3;
4971 context->get_pdptr = kvm_pdptr_read;
4972 context->inject_page_fault = kvm_inject_page_fault;
4975 static union kvm_mmu_role
4976 kvm_calc_nested_mmu_role(struct kvm_vcpu *vcpu, struct kvm_mmu_role_regs *regs)
4978 union kvm_mmu_role role;
4980 role = kvm_calc_shadow_root_page_role_common(vcpu, regs, false);
4983 * Nested MMUs are used only for walking L2's gva->gpa, they never have
4984 * shadow pages of their own and so "direct" has no meaning. Set it
4985 * to "true" to try to detect bogus usage of the nested MMU.
4987 role.base.direct = true;
4988 role.base.level = role_regs_to_root_level(regs);
4992 static void init_kvm_nested_mmu(struct kvm_vcpu *vcpu)
4994 struct kvm_mmu_role_regs regs = vcpu_to_role_regs(vcpu);
4995 union kvm_mmu_role new_role = kvm_calc_nested_mmu_role(vcpu, ®s);
4996 struct kvm_mmu *g_context = &vcpu->arch.nested_mmu;
4998 if (new_role.as_u64 == g_context->mmu_role.as_u64)
5001 g_context->mmu_role.as_u64 = new_role.as_u64;
5002 g_context->get_guest_pgd = get_cr3;
5003 g_context->get_pdptr = kvm_pdptr_read;
5004 g_context->inject_page_fault = kvm_inject_page_fault;
5005 g_context->root_level = new_role.base.level;
5008 * L2 page tables are never shadowed, so there is no need to sync
5011 g_context->invlpg = NULL;
5014 * Note that arch.mmu->gva_to_gpa translates l2_gpa to l1_gpa using
5015 * L1's nested page tables (e.g. EPT12). The nested translation
5016 * of l2_gva to l1_gpa is done by arch.nested_mmu.gva_to_gpa using
5017 * L2's page tables as the first level of translation and L1's
5018 * nested page tables as the second level of translation. Basically
5019 * the gva_to_gpa functions between mmu and nested_mmu are swapped.
5021 if (!is_paging(vcpu))
5022 g_context->gva_to_gpa = nonpaging_gva_to_gpa;
5023 else if (is_long_mode(vcpu))
5024 g_context->gva_to_gpa = paging64_gva_to_gpa;
5025 else if (is_pae(vcpu))
5026 g_context->gva_to_gpa = paging64_gva_to_gpa;
5028 g_context->gva_to_gpa = paging32_gva_to_gpa;
5030 reset_guest_paging_metadata(vcpu, g_context);
5033 void kvm_init_mmu(struct kvm_vcpu *vcpu)
5035 if (mmu_is_nested(vcpu))
5036 init_kvm_nested_mmu(vcpu);
5037 else if (tdp_enabled)
5038 init_kvm_tdp_mmu(vcpu);
5040 init_kvm_softmmu(vcpu);
5042 EXPORT_SYMBOL_GPL(kvm_init_mmu);
5044 void kvm_mmu_after_set_cpuid(struct kvm_vcpu *vcpu)
5047 * Invalidate all MMU roles to force them to reinitialize as CPUID
5048 * information is factored into reserved bit calculations.
5050 * Correctly handling multiple vCPU models with respect to paging and
5051 * physical address properties) in a single VM would require tracking
5052 * all relevant CPUID information in kvm_mmu_page_role. That is very
5053 * undesirable as it would increase the memory requirements for
5054 * gfn_track (see struct kvm_mmu_page_role comments). For now that
5055 * problem is swept under the rug; KVM's CPUID API is horrific and
5056 * it's all but impossible to solve it without introducing a new API.
5058 vcpu->arch.root_mmu.mmu_role.ext.valid = 0;
5059 vcpu->arch.guest_mmu.mmu_role.ext.valid = 0;
5060 vcpu->arch.nested_mmu.mmu_role.ext.valid = 0;
5061 kvm_mmu_reset_context(vcpu);
5064 * Changing guest CPUID after KVM_RUN is forbidden, see the comment in
5065 * kvm_arch_vcpu_ioctl().
5067 KVM_BUG_ON(vcpu->arch.last_vmentry_cpu != -1, vcpu->kvm);
5070 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
5072 kvm_mmu_unload(vcpu);
5075 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
5077 int kvm_mmu_load(struct kvm_vcpu *vcpu)
5081 r = mmu_topup_memory_caches(vcpu, !vcpu->arch.mmu->direct_map);
5084 r = mmu_alloc_special_roots(vcpu);
5087 if (vcpu->arch.mmu->direct_map)
5088 r = mmu_alloc_direct_roots(vcpu);
5090 r = mmu_alloc_shadow_roots(vcpu);
5094 kvm_mmu_sync_roots(vcpu);
5096 kvm_mmu_load_pgd(vcpu);
5099 * Flush any TLB entries for the new root, the provenance of the root
5100 * is unknown. Even if KVM ensures there are no stale TLB entries
5101 * for a freed root, in theory another hypervisor could have left
5102 * stale entries. Flushing on alloc also allows KVM to skip the TLB
5103 * flush when freeing a root (see kvm_tdp_mmu_put_root()).
5105 static_call(kvm_x86_flush_tlb_current)(vcpu);
5110 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
5112 struct kvm *kvm = vcpu->kvm;
5114 kvm_mmu_free_roots(kvm, &vcpu->arch.root_mmu, KVM_MMU_ROOTS_ALL);
5115 WARN_ON(VALID_PAGE(vcpu->arch.root_mmu.root.hpa));
5116 kvm_mmu_free_roots(kvm, &vcpu->arch.guest_mmu, KVM_MMU_ROOTS_ALL);
5117 WARN_ON(VALID_PAGE(vcpu->arch.guest_mmu.root.hpa));
5118 vcpu_clear_mmio_info(vcpu, MMIO_GVA_ANY);
5121 static bool is_obsolete_root(struct kvm *kvm, hpa_t root_hpa)
5123 struct kvm_mmu_page *sp;
5125 if (!VALID_PAGE(root_hpa))
5129 * When freeing obsolete roots, treat roots as obsolete if they don't
5130 * have an associated shadow page. This does mean KVM will get false
5131 * positives and free roots that don't strictly need to be freed, but
5132 * such false positives are relatively rare:
5134 * (a) only PAE paging and nested NPT has roots without shadow pages
5135 * (b) remote reloads due to a memslot update obsoletes _all_ roots
5136 * (c) KVM doesn't track previous roots for PAE paging, and the guest
5137 * is unlikely to zap an in-use PGD.
5139 sp = to_shadow_page(root_hpa);
5140 return !sp || is_obsolete_sp(kvm, sp);
5143 static void __kvm_mmu_free_obsolete_roots(struct kvm *kvm, struct kvm_mmu *mmu)
5145 unsigned long roots_to_free = 0;
5148 if (is_obsolete_root(kvm, mmu->root.hpa))
5149 roots_to_free |= KVM_MMU_ROOT_CURRENT;
5151 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) {
5152 if (is_obsolete_root(kvm, mmu->root.hpa))
5153 roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
5157 kvm_mmu_free_roots(kvm, mmu, roots_to_free);
5160 void kvm_mmu_free_obsolete_roots(struct kvm_vcpu *vcpu)
5162 __kvm_mmu_free_obsolete_roots(vcpu->kvm, &vcpu->arch.root_mmu);
5163 __kvm_mmu_free_obsolete_roots(vcpu->kvm, &vcpu->arch.guest_mmu);
5166 static bool need_remote_flush(u64 old, u64 new)
5168 if (!is_shadow_present_pte(old))
5170 if (!is_shadow_present_pte(new))
5172 if ((old ^ new) & PT64_BASE_ADDR_MASK)
5174 old ^= shadow_nx_mask;
5175 new ^= shadow_nx_mask;
5176 return (old & ~new & PT64_PERM_MASK) != 0;
5179 static u64 mmu_pte_write_fetch_gpte(struct kvm_vcpu *vcpu, gpa_t *gpa,
5186 * Assume that the pte write on a page table of the same type
5187 * as the current vcpu paging mode since we update the sptes only
5188 * when they have the same mode.
5190 if (is_pae(vcpu) && *bytes == 4) {
5191 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
5196 if (*bytes == 4 || *bytes == 8) {
5197 r = kvm_vcpu_read_guest_atomic(vcpu, *gpa, &gentry, *bytes);
5206 * If we're seeing too many writes to a page, it may no longer be a page table,
5207 * or we may be forking, in which case it is better to unmap the page.
5209 static bool detect_write_flooding(struct kvm_mmu_page *sp)
5212 * Skip write-flooding detected for the sp whose level is 1, because
5213 * it can become unsync, then the guest page is not write-protected.
5215 if (sp->role.level == PG_LEVEL_4K)
5218 atomic_inc(&sp->write_flooding_count);
5219 return atomic_read(&sp->write_flooding_count) >= 3;
5223 * Misaligned accesses are too much trouble to fix up; also, they usually
5224 * indicate a page is not used as a page table.
5226 static bool detect_write_misaligned(struct kvm_mmu_page *sp, gpa_t gpa,
5229 unsigned offset, pte_size, misaligned;
5231 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
5232 gpa, bytes, sp->role.word);
5234 offset = offset_in_page(gpa);
5235 pte_size = sp->role.has_4_byte_gpte ? 4 : 8;
5238 * Sometimes, the OS only writes the last one bytes to update status
5239 * bits, for example, in linux, andb instruction is used in clear_bit().
5241 if (!(offset & (pte_size - 1)) && bytes == 1)
5244 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
5245 misaligned |= bytes < 4;
5250 static u64 *get_written_sptes(struct kvm_mmu_page *sp, gpa_t gpa, int *nspte)
5252 unsigned page_offset, quadrant;
5256 page_offset = offset_in_page(gpa);
5257 level = sp->role.level;
5259 if (sp->role.has_4_byte_gpte) {
5260 page_offset <<= 1; /* 32->64 */
5262 * A 32-bit pde maps 4MB while the shadow pdes map
5263 * only 2MB. So we need to double the offset again
5264 * and zap two pdes instead of one.
5266 if (level == PT32_ROOT_LEVEL) {
5267 page_offset &= ~7; /* kill rounding error */
5271 quadrant = page_offset >> PAGE_SHIFT;
5272 page_offset &= ~PAGE_MASK;
5273 if (quadrant != sp->role.quadrant)
5277 spte = &sp->spt[page_offset / sizeof(*spte)];
5281 static void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
5282 const u8 *new, int bytes,
5283 struct kvm_page_track_notifier_node *node)
5285 gfn_t gfn = gpa >> PAGE_SHIFT;
5286 struct kvm_mmu_page *sp;
5287 LIST_HEAD(invalid_list);
5288 u64 entry, gentry, *spte;
5293 * If we don't have indirect shadow pages, it means no page is
5294 * write-protected, so we can exit simply.
5296 if (!READ_ONCE(vcpu->kvm->arch.indirect_shadow_pages))
5299 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
5302 * No need to care whether allocation memory is successful
5303 * or not since pte prefetch is skipped if it does not have
5304 * enough objects in the cache.
5306 mmu_topup_memory_caches(vcpu, true);
5308 write_lock(&vcpu->kvm->mmu_lock);
5310 gentry = mmu_pte_write_fetch_gpte(vcpu, &gpa, &bytes);
5312 ++vcpu->kvm->stat.mmu_pte_write;
5314 for_each_gfn_indirect_valid_sp(vcpu->kvm, sp, gfn) {
5315 if (detect_write_misaligned(sp, gpa, bytes) ||
5316 detect_write_flooding(sp)) {
5317 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list);
5318 ++vcpu->kvm->stat.mmu_flooded;
5322 spte = get_written_sptes(sp, gpa, &npte);
5328 mmu_page_zap_pte(vcpu->kvm, sp, spte, NULL);
5329 if (gentry && sp->role.level != PG_LEVEL_4K)
5330 ++vcpu->kvm->stat.mmu_pde_zapped;
5331 if (need_remote_flush(entry, *spte))
5336 kvm_mmu_remote_flush_or_zap(vcpu->kvm, &invalid_list, flush);
5337 write_unlock(&vcpu->kvm->mmu_lock);
5340 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u64 error_code,
5341 void *insn, int insn_len)
5343 int r, emulation_type = EMULTYPE_PF;
5344 bool direct = vcpu->arch.mmu->direct_map;
5346 if (WARN_ON(!VALID_PAGE(vcpu->arch.mmu->root.hpa)))
5347 return RET_PF_RETRY;
5350 if (unlikely(error_code & PFERR_RSVD_MASK)) {
5351 r = handle_mmio_page_fault(vcpu, cr2_or_gpa, direct);
5352 if (r == RET_PF_EMULATE)
5356 if (r == RET_PF_INVALID) {
5357 r = kvm_mmu_do_page_fault(vcpu, cr2_or_gpa,
5358 lower_32_bits(error_code), false);
5359 if (KVM_BUG_ON(r == RET_PF_INVALID, vcpu->kvm))
5365 if (r != RET_PF_EMULATE)
5369 * Before emulating the instruction, check if the error code
5370 * was due to a RO violation while translating the guest page.
5371 * This can occur when using nested virtualization with nested
5372 * paging in both guests. If true, we simply unprotect the page
5373 * and resume the guest.
5375 if (vcpu->arch.mmu->direct_map &&
5376 (error_code & PFERR_NESTED_GUEST_PAGE) == PFERR_NESTED_GUEST_PAGE) {
5377 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(cr2_or_gpa));
5382 * vcpu->arch.mmu.page_fault returned RET_PF_EMULATE, but we can still
5383 * optimistically try to just unprotect the page and let the processor
5384 * re-execute the instruction that caused the page fault. Do not allow
5385 * retrying MMIO emulation, as it's not only pointless but could also
5386 * cause us to enter an infinite loop because the processor will keep
5387 * faulting on the non-existent MMIO address. Retrying an instruction
5388 * from a nested guest is also pointless and dangerous as we are only
5389 * explicitly shadowing L1's page tables, i.e. unprotecting something
5390 * for L1 isn't going to magically fix whatever issue cause L2 to fail.
5392 if (!mmio_info_in_cache(vcpu, cr2_or_gpa, direct) && !is_guest_mode(vcpu))
5393 emulation_type |= EMULTYPE_ALLOW_RETRY_PF;
5395 return x86_emulate_instruction(vcpu, cr2_or_gpa, emulation_type, insn,
5398 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
5400 void kvm_mmu_invalidate_gva(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
5401 gva_t gva, hpa_t root_hpa)
5405 /* It's actually a GPA for vcpu->arch.guest_mmu. */
5406 if (mmu != &vcpu->arch.guest_mmu) {
5407 /* INVLPG on a non-canonical address is a NOP according to the SDM. */
5408 if (is_noncanonical_address(gva, vcpu))
5411 static_call(kvm_x86_flush_tlb_gva)(vcpu, gva);
5417 if (root_hpa == INVALID_PAGE) {
5418 mmu->invlpg(vcpu, gva, mmu->root.hpa);
5421 * INVLPG is required to invalidate any global mappings for the VA,
5422 * irrespective of PCID. Since it would take us roughly similar amount
5423 * of work to determine whether any of the prev_root mappings of the VA
5424 * is marked global, or to just sync it blindly, so we might as well
5425 * just always sync it.
5427 * Mappings not reachable via the current cr3 or the prev_roots will be
5428 * synced when switching to that cr3, so nothing needs to be done here
5431 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
5432 if (VALID_PAGE(mmu->prev_roots[i].hpa))
5433 mmu->invlpg(vcpu, gva, mmu->prev_roots[i].hpa);
5435 mmu->invlpg(vcpu, gva, root_hpa);
5439 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
5441 kvm_mmu_invalidate_gva(vcpu, vcpu->arch.walk_mmu, gva, INVALID_PAGE);
5442 ++vcpu->stat.invlpg;
5444 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
5447 void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid)
5449 struct kvm_mmu *mmu = vcpu->arch.mmu;
5450 bool tlb_flush = false;
5453 if (pcid == kvm_get_active_pcid(vcpu)) {
5454 mmu->invlpg(vcpu, gva, mmu->root.hpa);
5458 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) {
5459 if (VALID_PAGE(mmu->prev_roots[i].hpa) &&
5460 pcid == kvm_get_pcid(vcpu, mmu->prev_roots[i].pgd)) {
5461 mmu->invlpg(vcpu, gva, mmu->prev_roots[i].hpa);
5467 static_call(kvm_x86_flush_tlb_gva)(vcpu, gva);
5469 ++vcpu->stat.invlpg;
5472 * Mappings not reachable via the current cr3 or the prev_roots will be
5473 * synced when switching to that cr3, so nothing needs to be done here
5478 void kvm_configure_mmu(bool enable_tdp, int tdp_forced_root_level,
5479 int tdp_max_root_level, int tdp_huge_page_level)
5481 tdp_enabled = enable_tdp;
5482 tdp_root_level = tdp_forced_root_level;
5483 max_tdp_level = tdp_max_root_level;
5486 * max_huge_page_level reflects KVM's MMU capabilities irrespective
5487 * of kernel support, e.g. KVM may be capable of using 1GB pages when
5488 * the kernel is not. But, KVM never creates a page size greater than
5489 * what is used by the kernel for any given HVA, i.e. the kernel's
5490 * capabilities are ultimately consulted by kvm_mmu_hugepage_adjust().
5493 max_huge_page_level = tdp_huge_page_level;
5494 else if (boot_cpu_has(X86_FEATURE_GBPAGES))
5495 max_huge_page_level = PG_LEVEL_1G;
5497 max_huge_page_level = PG_LEVEL_2M;
5499 EXPORT_SYMBOL_GPL(kvm_configure_mmu);
5501 /* The return value indicates if tlb flush on all vcpus is needed. */
5502 typedef bool (*slot_level_handler) (struct kvm *kvm,
5503 struct kvm_rmap_head *rmap_head,
5504 const struct kvm_memory_slot *slot);
5506 /* The caller should hold mmu-lock before calling this function. */
5507 static __always_inline bool
5508 slot_handle_level_range(struct kvm *kvm, const struct kvm_memory_slot *memslot,
5509 slot_level_handler fn, int start_level, int end_level,
5510 gfn_t start_gfn, gfn_t end_gfn, bool flush_on_yield,
5513 struct slot_rmap_walk_iterator iterator;
5515 for_each_slot_rmap_range(memslot, start_level, end_level, start_gfn,
5516 end_gfn, &iterator) {
5518 flush |= fn(kvm, iterator.rmap, memslot);
5520 if (need_resched() || rwlock_needbreak(&kvm->mmu_lock)) {
5521 if (flush && flush_on_yield) {
5522 kvm_flush_remote_tlbs_with_address(kvm,
5524 iterator.gfn - start_gfn + 1);
5527 cond_resched_rwlock_write(&kvm->mmu_lock);
5534 static __always_inline bool
5535 slot_handle_level(struct kvm *kvm, const struct kvm_memory_slot *memslot,
5536 slot_level_handler fn, int start_level, int end_level,
5537 bool flush_on_yield)
5539 return slot_handle_level_range(kvm, memslot, fn, start_level,
5540 end_level, memslot->base_gfn,
5541 memslot->base_gfn + memslot->npages - 1,
5542 flush_on_yield, false);
5545 static __always_inline bool
5546 slot_handle_level_4k(struct kvm *kvm, const struct kvm_memory_slot *memslot,
5547 slot_level_handler fn, bool flush_on_yield)
5549 return slot_handle_level(kvm, memslot, fn, PG_LEVEL_4K,
5550 PG_LEVEL_4K, flush_on_yield);
5553 static void free_mmu_pages(struct kvm_mmu *mmu)
5555 if (!tdp_enabled && mmu->pae_root)
5556 set_memory_encrypted((unsigned long)mmu->pae_root, 1);
5557 free_page((unsigned long)mmu->pae_root);
5558 free_page((unsigned long)mmu->pml4_root);
5559 free_page((unsigned long)mmu->pml5_root);
5562 static int __kvm_mmu_create(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu)
5567 mmu->root.hpa = INVALID_PAGE;
5569 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
5570 mmu->prev_roots[i] = KVM_MMU_ROOT_INFO_INVALID;
5572 /* vcpu->arch.guest_mmu isn't used when !tdp_enabled. */
5573 if (!tdp_enabled && mmu == &vcpu->arch.guest_mmu)
5577 * When using PAE paging, the four PDPTEs are treated as 'root' pages,
5578 * while the PDP table is a per-vCPU construct that's allocated at MMU
5579 * creation. When emulating 32-bit mode, cr3 is only 32 bits even on
5580 * x86_64. Therefore we need to allocate the PDP table in the first
5581 * 4GB of memory, which happens to fit the DMA32 zone. TDP paging
5582 * generally doesn't use PAE paging and can skip allocating the PDP
5583 * table. The main exception, handled here, is SVM's 32-bit NPT. The
5584 * other exception is for shadowing L1's 32-bit or PAE NPT on 64-bit
5585 * KVM; that horror is handled on-demand by mmu_alloc_special_roots().
5587 if (tdp_enabled && kvm_mmu_get_tdp_level(vcpu) > PT32E_ROOT_LEVEL)
5590 page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_DMA32);
5594 mmu->pae_root = page_address(page);
5597 * CR3 is only 32 bits when PAE paging is used, thus it's impossible to
5598 * get the CPU to treat the PDPTEs as encrypted. Decrypt the page so
5599 * that KVM's writes and the CPU's reads get along. Note, this is
5600 * only necessary when using shadow paging, as 64-bit NPT can get at
5601 * the C-bit even when shadowing 32-bit NPT, and SME isn't supported
5602 * by 32-bit kernels (when KVM itself uses 32-bit NPT).
5605 set_memory_decrypted((unsigned long)mmu->pae_root, 1);
5607 WARN_ON_ONCE(shadow_me_mask);
5609 for (i = 0; i < 4; ++i)
5610 mmu->pae_root[i] = INVALID_PAE_ROOT;
5615 int kvm_mmu_create(struct kvm_vcpu *vcpu)
5619 vcpu->arch.mmu_pte_list_desc_cache.kmem_cache = pte_list_desc_cache;
5620 vcpu->arch.mmu_pte_list_desc_cache.gfp_zero = __GFP_ZERO;
5622 vcpu->arch.mmu_page_header_cache.kmem_cache = mmu_page_header_cache;
5623 vcpu->arch.mmu_page_header_cache.gfp_zero = __GFP_ZERO;
5625 vcpu->arch.mmu_shadow_page_cache.gfp_zero = __GFP_ZERO;
5627 vcpu->arch.mmu = &vcpu->arch.root_mmu;
5628 vcpu->arch.walk_mmu = &vcpu->arch.root_mmu;
5630 ret = __kvm_mmu_create(vcpu, &vcpu->arch.guest_mmu);
5634 ret = __kvm_mmu_create(vcpu, &vcpu->arch.root_mmu);
5636 goto fail_allocate_root;
5640 free_mmu_pages(&vcpu->arch.guest_mmu);
5644 #define BATCH_ZAP_PAGES 10
5645 static void kvm_zap_obsolete_pages(struct kvm *kvm)
5647 struct kvm_mmu_page *sp, *node;
5648 int nr_zapped, batch = 0;
5651 list_for_each_entry_safe_reverse(sp, node,
5652 &kvm->arch.active_mmu_pages, link) {
5654 * No obsolete valid page exists before a newly created page
5655 * since active_mmu_pages is a FIFO list.
5657 if (!is_obsolete_sp(kvm, sp))
5661 * Invalid pages should never land back on the list of active
5662 * pages. Skip the bogus page, otherwise we'll get stuck in an
5663 * infinite loop if the page gets put back on the list (again).
5665 if (WARN_ON(sp->role.invalid))
5669 * No need to flush the TLB since we're only zapping shadow
5670 * pages with an obsolete generation number and all vCPUS have
5671 * loaded a new root, i.e. the shadow pages being zapped cannot
5672 * be in active use by the guest.
5674 if (batch >= BATCH_ZAP_PAGES &&
5675 cond_resched_rwlock_write(&kvm->mmu_lock)) {
5680 if (__kvm_mmu_prepare_zap_page(kvm, sp,
5681 &kvm->arch.zapped_obsolete_pages, &nr_zapped)) {
5688 * Kick all vCPUs (via remote TLB flush) before freeing the page tables
5689 * to ensure KVM is not in the middle of a lockless shadow page table
5690 * walk, which may reference the pages. The remote TLB flush itself is
5691 * not required and is simply a convenient way to kick vCPUs as needed.
5692 * KVM performs a local TLB flush when allocating a new root (see
5693 * kvm_mmu_load()), and the reload in the caller ensure no vCPUs are
5694 * running with an obsolete MMU.
5696 kvm_mmu_commit_zap_page(kvm, &kvm->arch.zapped_obsolete_pages);
5700 * Fast invalidate all shadow pages and use lock-break technique
5701 * to zap obsolete pages.
5703 * It's required when memslot is being deleted or VM is being
5704 * destroyed, in these cases, we should ensure that KVM MMU does
5705 * not use any resource of the being-deleted slot or all slots
5706 * after calling the function.
5708 static void kvm_mmu_zap_all_fast(struct kvm *kvm)
5710 lockdep_assert_held(&kvm->slots_lock);
5712 write_lock(&kvm->mmu_lock);
5713 trace_kvm_mmu_zap_all_fast(kvm);
5716 * Toggle mmu_valid_gen between '0' and '1'. Because slots_lock is
5717 * held for the entire duration of zapping obsolete pages, it's
5718 * impossible for there to be multiple invalid generations associated
5719 * with *valid* shadow pages at any given time, i.e. there is exactly
5720 * one valid generation and (at most) one invalid generation.
5722 kvm->arch.mmu_valid_gen = kvm->arch.mmu_valid_gen ? 0 : 1;
5725 * In order to ensure all vCPUs drop their soon-to-be invalid roots,
5726 * invalidating TDP MMU roots must be done while holding mmu_lock for
5727 * write and in the same critical section as making the reload request,
5728 * e.g. before kvm_zap_obsolete_pages() could drop mmu_lock and yield.
5730 if (is_tdp_mmu_enabled(kvm))
5731 kvm_tdp_mmu_invalidate_all_roots(kvm);
5734 * Notify all vcpus to reload its shadow page table and flush TLB.
5735 * Then all vcpus will switch to new shadow page table with the new
5738 * Note: we need to do this under the protection of mmu_lock,
5739 * otherwise, vcpu would purge shadow page but miss tlb flush.
5741 kvm_make_all_cpus_request(kvm, KVM_REQ_MMU_FREE_OBSOLETE_ROOTS);
5743 kvm_zap_obsolete_pages(kvm);
5745 write_unlock(&kvm->mmu_lock);
5748 * Zap the invalidated TDP MMU roots, all SPTEs must be dropped before
5749 * returning to the caller, e.g. if the zap is in response to a memslot
5750 * deletion, mmu_notifier callbacks will be unable to reach the SPTEs
5751 * associated with the deleted memslot once the update completes, and
5752 * Deferring the zap until the final reference to the root is put would
5753 * lead to use-after-free.
5755 if (is_tdp_mmu_enabled(kvm))
5756 kvm_tdp_mmu_zap_invalidated_roots(kvm);
5759 static bool kvm_has_zapped_obsolete_pages(struct kvm *kvm)
5761 return unlikely(!list_empty_careful(&kvm->arch.zapped_obsolete_pages));
5764 static void kvm_mmu_invalidate_zap_pages_in_memslot(struct kvm *kvm,
5765 struct kvm_memory_slot *slot,
5766 struct kvm_page_track_notifier_node *node)
5768 kvm_mmu_zap_all_fast(kvm);
5771 int kvm_mmu_init_vm(struct kvm *kvm)
5773 struct kvm_page_track_notifier_node *node = &kvm->arch.mmu_sp_tracker;
5776 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
5777 INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
5778 INIT_LIST_HEAD(&kvm->arch.lpage_disallowed_mmu_pages);
5779 spin_lock_init(&kvm->arch.mmu_unsync_pages_lock);
5781 r = kvm_mmu_init_tdp_mmu(kvm);
5785 node->track_write = kvm_mmu_pte_write;
5786 node->track_flush_slot = kvm_mmu_invalidate_zap_pages_in_memslot;
5787 kvm_page_track_register_notifier(kvm, node);
5791 void kvm_mmu_uninit_vm(struct kvm *kvm)
5793 struct kvm_page_track_notifier_node *node = &kvm->arch.mmu_sp_tracker;
5795 kvm_page_track_unregister_notifier(kvm, node);
5797 kvm_mmu_uninit_tdp_mmu(kvm);
5800 static bool __kvm_zap_rmaps(struct kvm *kvm, gfn_t gfn_start, gfn_t gfn_end)
5802 const struct kvm_memory_slot *memslot;
5803 struct kvm_memslots *slots;
5804 struct kvm_memslot_iter iter;
5809 if (!kvm_memslots_have_rmaps(kvm))
5812 for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
5813 slots = __kvm_memslots(kvm, i);
5815 kvm_for_each_memslot_in_gfn_range(&iter, slots, gfn_start, gfn_end) {
5816 memslot = iter.slot;
5817 start = max(gfn_start, memslot->base_gfn);
5818 end = min(gfn_end, memslot->base_gfn + memslot->npages);
5819 if (WARN_ON_ONCE(start >= end))
5822 flush = slot_handle_level_range(kvm, memslot, kvm_zap_rmapp,
5824 PG_LEVEL_4K, KVM_MAX_HUGEPAGE_LEVEL,
5825 start, end - 1, true, flush);
5833 * Invalidate (zap) SPTEs that cover GFNs from gfn_start and up to gfn_end
5834 * (not including it)
5836 void kvm_zap_gfn_range(struct kvm *kvm, gfn_t gfn_start, gfn_t gfn_end)
5841 if (WARN_ON_ONCE(gfn_end <= gfn_start))
5844 write_lock(&kvm->mmu_lock);
5846 kvm_inc_notifier_count(kvm, gfn_start, gfn_end);
5848 flush = __kvm_zap_rmaps(kvm, gfn_start, gfn_end);
5850 if (is_tdp_mmu_enabled(kvm)) {
5851 for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++)
5852 flush = kvm_tdp_mmu_zap_leafs(kvm, i, gfn_start,
5853 gfn_end, true, flush);
5857 kvm_flush_remote_tlbs_with_address(kvm, gfn_start,
5858 gfn_end - gfn_start);
5860 kvm_dec_notifier_count(kvm, gfn_start, gfn_end);
5862 write_unlock(&kvm->mmu_lock);
5865 static bool slot_rmap_write_protect(struct kvm *kvm,
5866 struct kvm_rmap_head *rmap_head,
5867 const struct kvm_memory_slot *slot)
5869 return rmap_write_protect(rmap_head, false);
5872 void kvm_mmu_slot_remove_write_access(struct kvm *kvm,
5873 const struct kvm_memory_slot *memslot,
5878 if (kvm_memslots_have_rmaps(kvm)) {
5879 write_lock(&kvm->mmu_lock);
5880 flush = slot_handle_level(kvm, memslot, slot_rmap_write_protect,
5881 start_level, KVM_MAX_HUGEPAGE_LEVEL,
5883 write_unlock(&kvm->mmu_lock);
5886 if (is_tdp_mmu_enabled(kvm)) {
5887 read_lock(&kvm->mmu_lock);
5888 flush |= kvm_tdp_mmu_wrprot_slot(kvm, memslot, start_level);
5889 read_unlock(&kvm->mmu_lock);
5893 * Flush TLBs if any SPTEs had to be write-protected to ensure that
5894 * guest writes are reflected in the dirty bitmap before the memslot
5895 * update completes, i.e. before enabling dirty logging is visible to
5898 * Perform the TLB flush outside the mmu_lock to reduce the amount of
5899 * time the lock is held. However, this does mean that another CPU can
5900 * now grab mmu_lock and encounter a write-protected SPTE while CPUs
5901 * still have a writable mapping for the associated GFN in their TLB.
5903 * This is safe but requires KVM to be careful when making decisions
5904 * based on the write-protection status of an SPTE. Specifically, KVM
5905 * also write-protects SPTEs to monitor changes to guest page tables
5906 * during shadow paging, and must guarantee no CPUs can write to those
5907 * page before the lock is dropped. As mentioned in the previous
5908 * paragraph, a write-protected SPTE is no guarantee that CPU cannot
5909 * perform writes. So to determine if a TLB flush is truly required, KVM
5910 * will clear a separate software-only bit (MMU-writable) and skip the
5911 * flush if-and-only-if this bit was already clear.
5913 * See is_writable_pte() for more details.
5916 kvm_arch_flush_remote_tlbs_memslot(kvm, memslot);
5919 /* Must be called with the mmu_lock held in write-mode. */
5920 void kvm_mmu_try_split_huge_pages(struct kvm *kvm,
5921 const struct kvm_memory_slot *memslot,
5925 if (is_tdp_mmu_enabled(kvm))
5926 kvm_tdp_mmu_try_split_huge_pages(kvm, memslot, start, end,
5927 target_level, false);
5930 * A TLB flush is unnecessary at this point for the same resons as in
5931 * kvm_mmu_slot_try_split_huge_pages().
5935 void kvm_mmu_slot_try_split_huge_pages(struct kvm *kvm,
5936 const struct kvm_memory_slot *memslot,
5939 u64 start = memslot->base_gfn;
5940 u64 end = start + memslot->npages;
5942 if (is_tdp_mmu_enabled(kvm)) {
5943 read_lock(&kvm->mmu_lock);
5944 kvm_tdp_mmu_try_split_huge_pages(kvm, memslot, start, end, target_level, true);
5945 read_unlock(&kvm->mmu_lock);
5949 * No TLB flush is necessary here. KVM will flush TLBs after
5950 * write-protecting and/or clearing dirty on the newly split SPTEs to
5951 * ensure that guest writes are reflected in the dirty log before the
5952 * ioctl to enable dirty logging on this memslot completes. Since the
5953 * split SPTEs retain the write and dirty bits of the huge SPTE, it is
5954 * safe for KVM to decide if a TLB flush is necessary based on the split
5959 static bool kvm_mmu_zap_collapsible_spte(struct kvm *kvm,
5960 struct kvm_rmap_head *rmap_head,
5961 const struct kvm_memory_slot *slot)
5964 struct rmap_iterator iter;
5965 int need_tlb_flush = 0;
5967 struct kvm_mmu_page *sp;
5970 for_each_rmap_spte(rmap_head, &iter, sptep) {
5971 sp = sptep_to_sp(sptep);
5972 pfn = spte_to_pfn(*sptep);
5975 * We cannot do huge page mapping for indirect shadow pages,
5976 * which are found on the last rmap (level = 1) when not using
5977 * tdp; such shadow pages are synced with the page table in
5978 * the guest, and the guest page table is using 4K page size
5979 * mapping if the indirect sp has level = 1.
5981 if (sp->role.direct && !kvm_is_reserved_pfn(pfn) &&
5982 sp->role.level < kvm_mmu_max_mapping_level(kvm, slot, sp->gfn,
5983 pfn, PG_LEVEL_NUM)) {
5984 pte_list_remove(kvm, rmap_head, sptep);
5986 if (kvm_available_flush_tlb_with_range())
5987 kvm_flush_remote_tlbs_with_address(kvm, sp->gfn,
5988 KVM_PAGES_PER_HPAGE(sp->role.level));
5996 return need_tlb_flush;
5999 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm,
6000 const struct kvm_memory_slot *slot)
6002 if (kvm_memslots_have_rmaps(kvm)) {
6003 write_lock(&kvm->mmu_lock);
6005 * Zap only 4k SPTEs since the legacy MMU only supports dirty
6006 * logging at a 4k granularity and never creates collapsible
6007 * 2m SPTEs during dirty logging.
6009 if (slot_handle_level_4k(kvm, slot, kvm_mmu_zap_collapsible_spte, true))
6010 kvm_arch_flush_remote_tlbs_memslot(kvm, slot);
6011 write_unlock(&kvm->mmu_lock);
6014 if (is_tdp_mmu_enabled(kvm)) {
6015 read_lock(&kvm->mmu_lock);
6016 kvm_tdp_mmu_zap_collapsible_sptes(kvm, slot);
6017 read_unlock(&kvm->mmu_lock);
6021 void kvm_arch_flush_remote_tlbs_memslot(struct kvm *kvm,
6022 const struct kvm_memory_slot *memslot)
6025 * All current use cases for flushing the TLBs for a specific memslot
6026 * related to dirty logging, and many do the TLB flush out of mmu_lock.
6027 * The interaction between the various operations on memslot must be
6028 * serialized by slots_locks to ensure the TLB flush from one operation
6029 * is observed by any other operation on the same memslot.
6031 lockdep_assert_held(&kvm->slots_lock);
6032 kvm_flush_remote_tlbs_with_address(kvm, memslot->base_gfn,
6036 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm,
6037 const struct kvm_memory_slot *memslot)
6041 if (kvm_memslots_have_rmaps(kvm)) {
6042 write_lock(&kvm->mmu_lock);
6044 * Clear dirty bits only on 4k SPTEs since the legacy MMU only
6045 * support dirty logging at a 4k granularity.
6047 flush = slot_handle_level_4k(kvm, memslot, __rmap_clear_dirty, false);
6048 write_unlock(&kvm->mmu_lock);
6051 if (is_tdp_mmu_enabled(kvm)) {
6052 read_lock(&kvm->mmu_lock);
6053 flush |= kvm_tdp_mmu_clear_dirty_slot(kvm, memslot);
6054 read_unlock(&kvm->mmu_lock);
6058 * It's also safe to flush TLBs out of mmu lock here as currently this
6059 * function is only used for dirty logging, in which case flushing TLB
6060 * out of mmu lock also guarantees no dirty pages will be lost in
6064 kvm_arch_flush_remote_tlbs_memslot(kvm, memslot);
6067 void kvm_mmu_zap_all(struct kvm *kvm)
6069 struct kvm_mmu_page *sp, *node;
6070 LIST_HEAD(invalid_list);
6073 write_lock(&kvm->mmu_lock);
6075 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link) {
6076 if (WARN_ON(sp->role.invalid))
6078 if (__kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list, &ign))
6080 if (cond_resched_rwlock_write(&kvm->mmu_lock))
6084 kvm_mmu_commit_zap_page(kvm, &invalid_list);
6086 if (is_tdp_mmu_enabled(kvm))
6087 kvm_tdp_mmu_zap_all(kvm);
6089 write_unlock(&kvm->mmu_lock);
6092 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, u64 gen)
6094 WARN_ON(gen & KVM_MEMSLOT_GEN_UPDATE_IN_PROGRESS);
6096 gen &= MMIO_SPTE_GEN_MASK;
6099 * Generation numbers are incremented in multiples of the number of
6100 * address spaces in order to provide unique generations across all
6101 * address spaces. Strip what is effectively the address space
6102 * modifier prior to checking for a wrap of the MMIO generation so
6103 * that a wrap in any address space is detected.
6105 gen &= ~((u64)KVM_ADDRESS_SPACE_NUM - 1);
6108 * The very rare case: if the MMIO generation number has wrapped,
6109 * zap all shadow pages.
6111 if (unlikely(gen == 0)) {
6112 kvm_debug_ratelimited("kvm: zapping shadow pages for mmio generation wraparound\n");
6113 kvm_mmu_zap_all_fast(kvm);
6117 static unsigned long
6118 mmu_shrink_scan(struct shrinker *shrink, struct shrink_control *sc)
6121 int nr_to_scan = sc->nr_to_scan;
6122 unsigned long freed = 0;
6124 mutex_lock(&kvm_lock);
6126 list_for_each_entry(kvm, &vm_list, vm_list) {
6128 LIST_HEAD(invalid_list);
6131 * Never scan more than sc->nr_to_scan VM instances.
6132 * Will not hit this condition practically since we do not try
6133 * to shrink more than one VM and it is very unlikely to see
6134 * !n_used_mmu_pages so many times.
6139 * n_used_mmu_pages is accessed without holding kvm->mmu_lock
6140 * here. We may skip a VM instance errorneosly, but we do not
6141 * want to shrink a VM that only started to populate its MMU
6144 if (!kvm->arch.n_used_mmu_pages &&
6145 !kvm_has_zapped_obsolete_pages(kvm))
6148 idx = srcu_read_lock(&kvm->srcu);
6149 write_lock(&kvm->mmu_lock);
6151 if (kvm_has_zapped_obsolete_pages(kvm)) {
6152 kvm_mmu_commit_zap_page(kvm,
6153 &kvm->arch.zapped_obsolete_pages);
6157 freed = kvm_mmu_zap_oldest_mmu_pages(kvm, sc->nr_to_scan);
6160 write_unlock(&kvm->mmu_lock);
6161 srcu_read_unlock(&kvm->srcu, idx);
6164 * unfair on small ones
6165 * per-vm shrinkers cry out
6166 * sadness comes quickly
6168 list_move_tail(&kvm->vm_list, &vm_list);
6172 mutex_unlock(&kvm_lock);
6176 static unsigned long
6177 mmu_shrink_count(struct shrinker *shrink, struct shrink_control *sc)
6179 return percpu_counter_read_positive(&kvm_total_used_mmu_pages);
6182 static struct shrinker mmu_shrinker = {
6183 .count_objects = mmu_shrink_count,
6184 .scan_objects = mmu_shrink_scan,
6185 .seeks = DEFAULT_SEEKS * 10,
6188 static void mmu_destroy_caches(void)
6190 kmem_cache_destroy(pte_list_desc_cache);
6191 kmem_cache_destroy(mmu_page_header_cache);
6194 static bool get_nx_auto_mode(void)
6196 /* Return true when CPU has the bug, and mitigations are ON */
6197 return boot_cpu_has_bug(X86_BUG_ITLB_MULTIHIT) && !cpu_mitigations_off();
6200 static void __set_nx_huge_pages(bool val)
6202 nx_huge_pages = itlb_multihit_kvm_mitigation = val;
6205 static int set_nx_huge_pages(const char *val, const struct kernel_param *kp)
6207 bool old_val = nx_huge_pages;
6210 /* In "auto" mode deploy workaround only if CPU has the bug. */
6211 if (sysfs_streq(val, "off"))
6213 else if (sysfs_streq(val, "force"))
6215 else if (sysfs_streq(val, "auto"))
6216 new_val = get_nx_auto_mode();
6217 else if (strtobool(val, &new_val) < 0)
6220 __set_nx_huge_pages(new_val);
6222 if (new_val != old_val) {
6225 mutex_lock(&kvm_lock);
6227 list_for_each_entry(kvm, &vm_list, vm_list) {
6228 mutex_lock(&kvm->slots_lock);
6229 kvm_mmu_zap_all_fast(kvm);
6230 mutex_unlock(&kvm->slots_lock);
6232 wake_up_process(kvm->arch.nx_lpage_recovery_thread);
6234 mutex_unlock(&kvm_lock);
6241 * nx_huge_pages needs to be resolved to true/false when kvm.ko is loaded, as
6242 * its default value of -1 is technically undefined behavior for a boolean.
6244 void kvm_mmu_x86_module_init(void)
6246 if (nx_huge_pages == -1)
6247 __set_nx_huge_pages(get_nx_auto_mode());
6251 * The bulk of the MMU initialization is deferred until the vendor module is
6252 * loaded as many of the masks/values may be modified by VMX or SVM, i.e. need
6253 * to be reset when a potentially different vendor module is loaded.
6255 int kvm_mmu_vendor_module_init(void)
6260 * MMU roles use union aliasing which is, generally speaking, an
6261 * undefined behavior. However, we supposedly know how compilers behave
6262 * and the current status quo is unlikely to change. Guardians below are
6263 * supposed to let us know if the assumption becomes false.
6265 BUILD_BUG_ON(sizeof(union kvm_mmu_page_role) != sizeof(u32));
6266 BUILD_BUG_ON(sizeof(union kvm_mmu_extended_role) != sizeof(u32));
6267 BUILD_BUG_ON(sizeof(union kvm_mmu_role) != sizeof(u64));
6269 kvm_mmu_reset_all_pte_masks();
6271 pte_list_desc_cache = kmem_cache_create("pte_list_desc",
6272 sizeof(struct pte_list_desc),
6273 0, SLAB_ACCOUNT, NULL);
6274 if (!pte_list_desc_cache)
6277 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
6278 sizeof(struct kvm_mmu_page),
6279 0, SLAB_ACCOUNT, NULL);
6280 if (!mmu_page_header_cache)
6283 if (percpu_counter_init(&kvm_total_used_mmu_pages, 0, GFP_KERNEL))
6286 ret = register_shrinker(&mmu_shrinker);
6293 mmu_destroy_caches();
6297 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
6299 kvm_mmu_unload(vcpu);
6300 free_mmu_pages(&vcpu->arch.root_mmu);
6301 free_mmu_pages(&vcpu->arch.guest_mmu);
6302 mmu_free_memory_caches(vcpu);
6305 void kvm_mmu_vendor_module_exit(void)
6307 mmu_destroy_caches();
6308 percpu_counter_destroy(&kvm_total_used_mmu_pages);
6309 unregister_shrinker(&mmu_shrinker);
6313 * Calculate the effective recovery period, accounting for '0' meaning "let KVM
6314 * select a halving time of 1 hour". Returns true if recovery is enabled.
6316 static bool calc_nx_huge_pages_recovery_period(uint *period)
6319 * Use READ_ONCE to get the params, this may be called outside of the
6320 * param setters, e.g. by the kthread to compute its next timeout.
6322 bool enabled = READ_ONCE(nx_huge_pages);
6323 uint ratio = READ_ONCE(nx_huge_pages_recovery_ratio);
6325 if (!enabled || !ratio)
6328 *period = READ_ONCE(nx_huge_pages_recovery_period_ms);
6330 /* Make sure the period is not less than one second. */
6331 ratio = min(ratio, 3600u);
6332 *period = 60 * 60 * 1000 / ratio;
6337 static int set_nx_huge_pages_recovery_param(const char *val, const struct kernel_param *kp)
6339 bool was_recovery_enabled, is_recovery_enabled;
6340 uint old_period, new_period;
6343 was_recovery_enabled = calc_nx_huge_pages_recovery_period(&old_period);
6345 err = param_set_uint(val, kp);
6349 is_recovery_enabled = calc_nx_huge_pages_recovery_period(&new_period);
6351 if (is_recovery_enabled &&
6352 (!was_recovery_enabled || old_period > new_period)) {
6355 mutex_lock(&kvm_lock);
6357 list_for_each_entry(kvm, &vm_list, vm_list)
6358 wake_up_process(kvm->arch.nx_lpage_recovery_thread);
6360 mutex_unlock(&kvm_lock);
6366 static void kvm_recover_nx_lpages(struct kvm *kvm)
6368 unsigned long nx_lpage_splits = kvm->stat.nx_lpage_splits;
6370 struct kvm_mmu_page *sp;
6372 LIST_HEAD(invalid_list);
6376 rcu_idx = srcu_read_lock(&kvm->srcu);
6377 write_lock(&kvm->mmu_lock);
6380 * Zapping TDP MMU shadow pages, including the remote TLB flush, must
6381 * be done under RCU protection, because the pages are freed via RCU
6386 ratio = READ_ONCE(nx_huge_pages_recovery_ratio);
6387 to_zap = ratio ? DIV_ROUND_UP(nx_lpage_splits, ratio) : 0;
6388 for ( ; to_zap; --to_zap) {
6389 if (list_empty(&kvm->arch.lpage_disallowed_mmu_pages))
6393 * We use a separate list instead of just using active_mmu_pages
6394 * because the number of lpage_disallowed pages is expected to
6395 * be relatively small compared to the total.
6397 sp = list_first_entry(&kvm->arch.lpage_disallowed_mmu_pages,
6398 struct kvm_mmu_page,
6399 lpage_disallowed_link);
6400 WARN_ON_ONCE(!sp->lpage_disallowed);
6401 if (is_tdp_mmu_page(sp)) {
6402 flush |= kvm_tdp_mmu_zap_sp(kvm, sp);
6404 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
6405 WARN_ON_ONCE(sp->lpage_disallowed);
6408 if (need_resched() || rwlock_needbreak(&kvm->mmu_lock)) {
6409 kvm_mmu_remote_flush_or_zap(kvm, &invalid_list, flush);
6412 cond_resched_rwlock_write(&kvm->mmu_lock);
6418 kvm_mmu_remote_flush_or_zap(kvm, &invalid_list, flush);
6422 write_unlock(&kvm->mmu_lock);
6423 srcu_read_unlock(&kvm->srcu, rcu_idx);
6426 static long get_nx_lpage_recovery_timeout(u64 start_time)
6431 enabled = calc_nx_huge_pages_recovery_period(&period);
6433 return enabled ? start_time + msecs_to_jiffies(period) - get_jiffies_64()
6434 : MAX_SCHEDULE_TIMEOUT;
6437 static int kvm_nx_lpage_recovery_worker(struct kvm *kvm, uintptr_t data)
6440 long remaining_time;
6443 start_time = get_jiffies_64();
6444 remaining_time = get_nx_lpage_recovery_timeout(start_time);
6446 set_current_state(TASK_INTERRUPTIBLE);
6447 while (!kthread_should_stop() && remaining_time > 0) {
6448 schedule_timeout(remaining_time);
6449 remaining_time = get_nx_lpage_recovery_timeout(start_time);
6450 set_current_state(TASK_INTERRUPTIBLE);
6453 set_current_state(TASK_RUNNING);
6455 if (kthread_should_stop())
6458 kvm_recover_nx_lpages(kvm);
6462 int kvm_mmu_post_init_vm(struct kvm *kvm)
6466 err = kvm_vm_create_worker_thread(kvm, kvm_nx_lpage_recovery_worker, 0,
6467 "kvm-nx-lpage-recovery",
6468 &kvm->arch.nx_lpage_recovery_thread);
6470 kthread_unpark(kvm->arch.nx_lpage_recovery_thread);
6475 void kvm_mmu_pre_destroy_vm(struct kvm *kvm)
6477 if (kvm->arch.nx_lpage_recovery_thread)
6478 kthread_stop(kvm->arch.nx_lpage_recovery_thread);