1 // SPDX-License-Identifier: GPL-2.0-only
3 * Kernel-based Virtual Machine driver for Linux
5 * This module enables machines with Intel VT-x extensions to run virtual
6 * machines without emulation or binary translation.
10 * Copyright (C) 2006 Qumranet, Inc.
11 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
14 * Yaniv Kamay <yaniv@qumranet.com>
15 * Avi Kivity <avi@qumranet.com>
21 #include "mmu_internal.h"
24 #include "kvm_cache_regs.h"
25 #include "kvm_emulate.h"
29 #include <linux/kvm_host.h>
30 #include <linux/types.h>
31 #include <linux/string.h>
33 #include <linux/highmem.h>
34 #include <linux/moduleparam.h>
35 #include <linux/export.h>
36 #include <linux/swap.h>
37 #include <linux/hugetlb.h>
38 #include <linux/compiler.h>
39 #include <linux/srcu.h>
40 #include <linux/slab.h>
41 #include <linux/sched/signal.h>
42 #include <linux/uaccess.h>
43 #include <linux/hash.h>
44 #include <linux/kern_levels.h>
45 #include <linux/kthread.h>
48 #include <asm/memtype.h>
49 #include <asm/cmpxchg.h>
51 #include <asm/set_memory.h>
53 #include <asm/kvm_page_track.h>
56 extern bool itlb_multihit_kvm_mitigation;
58 int __read_mostly nx_huge_pages = -1;
59 static uint __read_mostly nx_huge_pages_recovery_period_ms;
60 #ifdef CONFIG_PREEMPT_RT
61 /* Recovery can cause latency spikes, disable it for PREEMPT_RT. */
62 static uint __read_mostly nx_huge_pages_recovery_ratio = 0;
64 static uint __read_mostly nx_huge_pages_recovery_ratio = 60;
67 static int set_nx_huge_pages(const char *val, const struct kernel_param *kp);
68 static int set_nx_huge_pages_recovery_param(const char *val, const struct kernel_param *kp);
70 static const struct kernel_param_ops nx_huge_pages_ops = {
71 .set = set_nx_huge_pages,
72 .get = param_get_bool,
75 static const struct kernel_param_ops nx_huge_pages_recovery_param_ops = {
76 .set = set_nx_huge_pages_recovery_param,
77 .get = param_get_uint,
80 module_param_cb(nx_huge_pages, &nx_huge_pages_ops, &nx_huge_pages, 0644);
81 __MODULE_PARM_TYPE(nx_huge_pages, "bool");
82 module_param_cb(nx_huge_pages_recovery_ratio, &nx_huge_pages_recovery_param_ops,
83 &nx_huge_pages_recovery_ratio, 0644);
84 __MODULE_PARM_TYPE(nx_huge_pages_recovery_ratio, "uint");
85 module_param_cb(nx_huge_pages_recovery_period_ms, &nx_huge_pages_recovery_param_ops,
86 &nx_huge_pages_recovery_period_ms, 0644);
87 __MODULE_PARM_TYPE(nx_huge_pages_recovery_period_ms, "uint");
89 static bool __read_mostly force_flush_and_sync_on_reuse;
90 module_param_named(flush_on_reuse, force_flush_and_sync_on_reuse, bool, 0644);
93 * When setting this variable to true it enables Two-Dimensional-Paging
94 * where the hardware walks 2 page tables:
95 * 1. the guest-virtual to guest-physical
96 * 2. while doing 1. it walks guest-physical to host-physical
97 * If the hardware supports that we don't need to do shadow paging.
99 bool tdp_enabled = false;
101 static int max_huge_page_level __read_mostly;
102 static int tdp_root_level __read_mostly;
103 static int max_tdp_level __read_mostly;
107 module_param(dbg, bool, 0644);
110 #define PTE_PREFETCH_NUM 8
112 #include <trace/events/kvm.h>
114 /* make pte_list_desc fit well in cache lines */
115 #define PTE_LIST_EXT 14
118 * Slight optimization of cacheline layout, by putting `more' and `spte_count'
119 * at the start; then accessing it will only use one single cacheline for
120 * either full (entries==PTE_LIST_EXT) case or entries<=6.
122 struct pte_list_desc {
123 struct pte_list_desc *more;
125 * Stores number of entries stored in the pte_list_desc. No need to be
126 * u64 but just for easier alignment. When PTE_LIST_EXT, means full.
129 u64 *sptes[PTE_LIST_EXT];
132 struct kvm_shadow_walk_iterator {
140 #define for_each_shadow_entry_using_root(_vcpu, _root, _addr, _walker) \
141 for (shadow_walk_init_using_root(&(_walker), (_vcpu), \
143 shadow_walk_okay(&(_walker)); \
144 shadow_walk_next(&(_walker)))
146 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
147 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
148 shadow_walk_okay(&(_walker)); \
149 shadow_walk_next(&(_walker)))
151 #define for_each_shadow_entry_lockless(_vcpu, _addr, _walker, spte) \
152 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
153 shadow_walk_okay(&(_walker)) && \
154 ({ spte = mmu_spte_get_lockless(_walker.sptep); 1; }); \
155 __shadow_walk_next(&(_walker), spte))
157 static struct kmem_cache *pte_list_desc_cache;
158 struct kmem_cache *mmu_page_header_cache;
159 static struct percpu_counter kvm_total_used_mmu_pages;
161 static void mmu_spte_set(u64 *sptep, u64 spte);
163 struct kvm_mmu_role_regs {
164 const unsigned long cr0;
165 const unsigned long cr4;
169 #define CREATE_TRACE_POINTS
170 #include "mmutrace.h"
173 * Yes, lot's of underscores. They're a hint that you probably shouldn't be
174 * reading from the role_regs. Once the root_role is constructed, it becomes
175 * the single source of truth for the MMU's state.
177 #define BUILD_MMU_ROLE_REGS_ACCESSOR(reg, name, flag) \
178 static inline bool __maybe_unused \
179 ____is_##reg##_##name(const struct kvm_mmu_role_regs *regs) \
181 return !!(regs->reg & flag); \
183 BUILD_MMU_ROLE_REGS_ACCESSOR(cr0, pg, X86_CR0_PG);
184 BUILD_MMU_ROLE_REGS_ACCESSOR(cr0, wp, X86_CR0_WP);
185 BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, pse, X86_CR4_PSE);
186 BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, pae, X86_CR4_PAE);
187 BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, smep, X86_CR4_SMEP);
188 BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, smap, X86_CR4_SMAP);
189 BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, pke, X86_CR4_PKE);
190 BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, la57, X86_CR4_LA57);
191 BUILD_MMU_ROLE_REGS_ACCESSOR(efer, nx, EFER_NX);
192 BUILD_MMU_ROLE_REGS_ACCESSOR(efer, lma, EFER_LMA);
195 * The MMU itself (with a valid role) is the single source of truth for the
196 * MMU. Do not use the regs used to build the MMU/role, nor the vCPU. The
197 * regs don't account for dependencies, e.g. clearing CR4 bits if CR0.PG=1,
198 * and the vCPU may be incorrect/irrelevant.
200 #define BUILD_MMU_ROLE_ACCESSOR(base_or_ext, reg, name) \
201 static inline bool __maybe_unused is_##reg##_##name(struct kvm_mmu *mmu) \
203 return !!(mmu->cpu_role. base_or_ext . reg##_##name); \
205 BUILD_MMU_ROLE_ACCESSOR(base, cr0, wp);
206 BUILD_MMU_ROLE_ACCESSOR(ext, cr4, pse);
207 BUILD_MMU_ROLE_ACCESSOR(ext, cr4, smep);
208 BUILD_MMU_ROLE_ACCESSOR(ext, cr4, smap);
209 BUILD_MMU_ROLE_ACCESSOR(ext, cr4, pke);
210 BUILD_MMU_ROLE_ACCESSOR(ext, cr4, la57);
211 BUILD_MMU_ROLE_ACCESSOR(base, efer, nx);
212 BUILD_MMU_ROLE_ACCESSOR(ext, efer, lma);
214 static inline bool is_cr0_pg(struct kvm_mmu *mmu)
216 return mmu->cpu_role.base.level > 0;
219 static inline bool is_cr4_pae(struct kvm_mmu *mmu)
221 return !mmu->cpu_role.base.has_4_byte_gpte;
224 static struct kvm_mmu_role_regs vcpu_to_role_regs(struct kvm_vcpu *vcpu)
226 struct kvm_mmu_role_regs regs = {
227 .cr0 = kvm_read_cr0_bits(vcpu, KVM_MMU_CR0_ROLE_BITS),
228 .cr4 = kvm_read_cr4_bits(vcpu, KVM_MMU_CR4_ROLE_BITS),
229 .efer = vcpu->arch.efer,
235 static inline bool kvm_available_flush_tlb_with_range(void)
237 return kvm_x86_ops.tlb_remote_flush_with_range;
240 static void kvm_flush_remote_tlbs_with_range(struct kvm *kvm,
241 struct kvm_tlb_range *range)
245 if (range && kvm_x86_ops.tlb_remote_flush_with_range)
246 ret = static_call(kvm_x86_tlb_remote_flush_with_range)(kvm, range);
249 kvm_flush_remote_tlbs(kvm);
252 void kvm_flush_remote_tlbs_with_address(struct kvm *kvm,
253 u64 start_gfn, u64 pages)
255 struct kvm_tlb_range range;
257 range.start_gfn = start_gfn;
260 kvm_flush_remote_tlbs_with_range(kvm, &range);
263 static void mark_mmio_spte(struct kvm_vcpu *vcpu, u64 *sptep, u64 gfn,
266 u64 spte = make_mmio_spte(vcpu, gfn, access);
268 trace_mark_mmio_spte(sptep, gfn, spte);
269 mmu_spte_set(sptep, spte);
272 static gfn_t get_mmio_spte_gfn(u64 spte)
274 u64 gpa = spte & shadow_nonpresent_or_rsvd_lower_gfn_mask;
276 gpa |= (spte >> SHADOW_NONPRESENT_OR_RSVD_MASK_LEN)
277 & shadow_nonpresent_or_rsvd_mask;
279 return gpa >> PAGE_SHIFT;
282 static unsigned get_mmio_spte_access(u64 spte)
284 return spte & shadow_mmio_access_mask;
287 static bool check_mmio_spte(struct kvm_vcpu *vcpu, u64 spte)
289 u64 kvm_gen, spte_gen, gen;
291 gen = kvm_vcpu_memslots(vcpu)->generation;
292 if (unlikely(gen & KVM_MEMSLOT_GEN_UPDATE_IN_PROGRESS))
295 kvm_gen = gen & MMIO_SPTE_GEN_MASK;
296 spte_gen = get_mmio_spte_generation(spte);
298 trace_check_mmio_spte(spte, kvm_gen, spte_gen);
299 return likely(kvm_gen == spte_gen);
302 static int is_cpuid_PSE36(void)
308 static void __set_spte(u64 *sptep, u64 spte)
310 WRITE_ONCE(*sptep, spte);
313 static void __update_clear_spte_fast(u64 *sptep, u64 spte)
315 WRITE_ONCE(*sptep, spte);
318 static u64 __update_clear_spte_slow(u64 *sptep, u64 spte)
320 return xchg(sptep, spte);
323 static u64 __get_spte_lockless(u64 *sptep)
325 return READ_ONCE(*sptep);
336 static void count_spte_clear(u64 *sptep, u64 spte)
338 struct kvm_mmu_page *sp = sptep_to_sp(sptep);
340 if (is_shadow_present_pte(spte))
343 /* Ensure the spte is completely set before we increase the count */
345 sp->clear_spte_count++;
348 static void __set_spte(u64 *sptep, u64 spte)
350 union split_spte *ssptep, sspte;
352 ssptep = (union split_spte *)sptep;
353 sspte = (union split_spte)spte;
355 ssptep->spte_high = sspte.spte_high;
358 * If we map the spte from nonpresent to present, We should store
359 * the high bits firstly, then set present bit, so cpu can not
360 * fetch this spte while we are setting the spte.
364 WRITE_ONCE(ssptep->spte_low, sspte.spte_low);
367 static void __update_clear_spte_fast(u64 *sptep, u64 spte)
369 union split_spte *ssptep, sspte;
371 ssptep = (union split_spte *)sptep;
372 sspte = (union split_spte)spte;
374 WRITE_ONCE(ssptep->spte_low, sspte.spte_low);
377 * If we map the spte from present to nonpresent, we should clear
378 * present bit firstly to avoid vcpu fetch the old high bits.
382 ssptep->spte_high = sspte.spte_high;
383 count_spte_clear(sptep, spte);
386 static u64 __update_clear_spte_slow(u64 *sptep, u64 spte)
388 union split_spte *ssptep, sspte, orig;
390 ssptep = (union split_spte *)sptep;
391 sspte = (union split_spte)spte;
393 /* xchg acts as a barrier before the setting of the high bits */
394 orig.spte_low = xchg(&ssptep->spte_low, sspte.spte_low);
395 orig.spte_high = ssptep->spte_high;
396 ssptep->spte_high = sspte.spte_high;
397 count_spte_clear(sptep, spte);
403 * The idea using the light way get the spte on x86_32 guest is from
404 * gup_get_pte (mm/gup.c).
406 * An spte tlb flush may be pending, because kvm_set_pte_rmapp
407 * coalesces them and we are running out of the MMU lock. Therefore
408 * we need to protect against in-progress updates of the spte.
410 * Reading the spte while an update is in progress may get the old value
411 * for the high part of the spte. The race is fine for a present->non-present
412 * change (because the high part of the spte is ignored for non-present spte),
413 * but for a present->present change we must reread the spte.
415 * All such changes are done in two steps (present->non-present and
416 * non-present->present), hence it is enough to count the number of
417 * present->non-present updates: if it changed while reading the spte,
418 * we might have hit the race. This is done using clear_spte_count.
420 static u64 __get_spte_lockless(u64 *sptep)
422 struct kvm_mmu_page *sp = sptep_to_sp(sptep);
423 union split_spte spte, *orig = (union split_spte *)sptep;
427 count = sp->clear_spte_count;
430 spte.spte_low = orig->spte_low;
433 spte.spte_high = orig->spte_high;
436 if (unlikely(spte.spte_low != orig->spte_low ||
437 count != sp->clear_spte_count))
444 /* Rules for using mmu_spte_set:
445 * Set the sptep from nonpresent to present.
446 * Note: the sptep being assigned *must* be either not present
447 * or in a state where the hardware will not attempt to update
450 static void mmu_spte_set(u64 *sptep, u64 new_spte)
452 WARN_ON(is_shadow_present_pte(*sptep));
453 __set_spte(sptep, new_spte);
457 * Update the SPTE (excluding the PFN), but do not track changes in its
458 * accessed/dirty status.
460 static u64 mmu_spte_update_no_track(u64 *sptep, u64 new_spte)
462 u64 old_spte = *sptep;
464 WARN_ON(!is_shadow_present_pte(new_spte));
465 check_spte_writable_invariants(new_spte);
467 if (!is_shadow_present_pte(old_spte)) {
468 mmu_spte_set(sptep, new_spte);
472 if (!spte_has_volatile_bits(old_spte))
473 __update_clear_spte_fast(sptep, new_spte);
475 old_spte = __update_clear_spte_slow(sptep, new_spte);
477 WARN_ON(spte_to_pfn(old_spte) != spte_to_pfn(new_spte));
482 /* Rules for using mmu_spte_update:
483 * Update the state bits, it means the mapped pfn is not changed.
485 * Whenever an MMU-writable SPTE is overwritten with a read-only SPTE, remote
486 * TLBs must be flushed. Otherwise rmap_write_protect will find a read-only
487 * spte, even though the writable spte might be cached on a CPU's TLB.
489 * Returns true if the TLB needs to be flushed
491 static bool mmu_spte_update(u64 *sptep, u64 new_spte)
494 u64 old_spte = mmu_spte_update_no_track(sptep, new_spte);
496 if (!is_shadow_present_pte(old_spte))
500 * For the spte updated out of mmu-lock is safe, since
501 * we always atomically update it, see the comments in
502 * spte_has_volatile_bits().
504 if (is_mmu_writable_spte(old_spte) &&
505 !is_writable_pte(new_spte))
509 * Flush TLB when accessed/dirty states are changed in the page tables,
510 * to guarantee consistency between TLB and page tables.
513 if (is_accessed_spte(old_spte) && !is_accessed_spte(new_spte)) {
515 kvm_set_pfn_accessed(spte_to_pfn(old_spte));
518 if (is_dirty_spte(old_spte) && !is_dirty_spte(new_spte)) {
520 kvm_set_pfn_dirty(spte_to_pfn(old_spte));
527 * Rules for using mmu_spte_clear_track_bits:
528 * It sets the sptep from present to nonpresent, and track the
529 * state bits, it is used to clear the last level sptep.
530 * Returns the old PTE.
532 static u64 mmu_spte_clear_track_bits(struct kvm *kvm, u64 *sptep)
535 u64 old_spte = *sptep;
536 int level = sptep_to_sp(sptep)->role.level;
539 if (!is_shadow_present_pte(old_spte) ||
540 !spte_has_volatile_bits(old_spte))
541 __update_clear_spte_fast(sptep, 0ull);
543 old_spte = __update_clear_spte_slow(sptep, 0ull);
545 if (!is_shadow_present_pte(old_spte))
548 kvm_update_page_stats(kvm, level, -1);
550 pfn = spte_to_pfn(old_spte);
553 * KVM doesn't hold a reference to any pages mapped into the guest, and
554 * instead uses the mmu_notifier to ensure that KVM unmaps any pages
555 * before they are reclaimed. Sanity check that, if the pfn is backed
556 * by a refcounted page, the refcount is elevated.
558 page = kvm_pfn_to_refcounted_page(pfn);
559 WARN_ON(page && !page_count(page));
561 if (is_accessed_spte(old_spte))
562 kvm_set_pfn_accessed(pfn);
564 if (is_dirty_spte(old_spte))
565 kvm_set_pfn_dirty(pfn);
571 * Rules for using mmu_spte_clear_no_track:
572 * Directly clear spte without caring the state bits of sptep,
573 * it is used to set the upper level spte.
575 static void mmu_spte_clear_no_track(u64 *sptep)
577 __update_clear_spte_fast(sptep, 0ull);
580 static u64 mmu_spte_get_lockless(u64 *sptep)
582 return __get_spte_lockless(sptep);
585 /* Returns the Accessed status of the PTE and resets it at the same time. */
586 static bool mmu_spte_age(u64 *sptep)
588 u64 spte = mmu_spte_get_lockless(sptep);
590 if (!is_accessed_spte(spte))
593 if (spte_ad_enabled(spte)) {
594 clear_bit((ffs(shadow_accessed_mask) - 1),
595 (unsigned long *)sptep);
598 * Capture the dirty status of the page, so that it doesn't get
599 * lost when the SPTE is marked for access tracking.
601 if (is_writable_pte(spte))
602 kvm_set_pfn_dirty(spte_to_pfn(spte));
604 spte = mark_spte_for_access_track(spte);
605 mmu_spte_update_no_track(sptep, spte);
611 static void walk_shadow_page_lockless_begin(struct kvm_vcpu *vcpu)
613 if (is_tdp_mmu(vcpu->arch.mmu)) {
614 kvm_tdp_mmu_walk_lockless_begin();
617 * Prevent page table teardown by making any free-er wait during
618 * kvm_flush_remote_tlbs() IPI to all active vcpus.
623 * Make sure a following spte read is not reordered ahead of the write
626 smp_store_mb(vcpu->mode, READING_SHADOW_PAGE_TABLES);
630 static void walk_shadow_page_lockless_end(struct kvm_vcpu *vcpu)
632 if (is_tdp_mmu(vcpu->arch.mmu)) {
633 kvm_tdp_mmu_walk_lockless_end();
636 * Make sure the write to vcpu->mode is not reordered in front of
637 * reads to sptes. If it does, kvm_mmu_commit_zap_page() can see us
638 * OUTSIDE_GUEST_MODE and proceed to free the shadow page table.
640 smp_store_release(&vcpu->mode, OUTSIDE_GUEST_MODE);
645 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu, bool maybe_indirect)
649 /* 1 rmap, 1 parent PTE per level, and the prefetched rmaps. */
650 r = kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_pte_list_desc_cache,
651 1 + PT64_ROOT_MAX_LEVEL + PTE_PREFETCH_NUM);
654 r = kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_shadow_page_cache,
655 PT64_ROOT_MAX_LEVEL);
658 if (maybe_indirect) {
659 r = kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_shadowed_info_cache,
660 PT64_ROOT_MAX_LEVEL);
664 return kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
665 PT64_ROOT_MAX_LEVEL);
668 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
670 kvm_mmu_free_memory_cache(&vcpu->arch.mmu_pte_list_desc_cache);
671 kvm_mmu_free_memory_cache(&vcpu->arch.mmu_shadow_page_cache);
672 kvm_mmu_free_memory_cache(&vcpu->arch.mmu_shadowed_info_cache);
673 kvm_mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
676 static void mmu_free_pte_list_desc(struct pte_list_desc *pte_list_desc)
678 kmem_cache_free(pte_list_desc_cache, pte_list_desc);
681 static bool sp_has_gptes(struct kvm_mmu_page *sp);
683 static gfn_t kvm_mmu_page_get_gfn(struct kvm_mmu_page *sp, int index)
685 if (sp->role.passthrough)
688 if (!sp->role.direct)
689 return sp->shadowed_translation[index] >> PAGE_SHIFT;
691 return sp->gfn + (index << ((sp->role.level - 1) * SPTE_LEVEL_BITS));
695 * For leaf SPTEs, fetch the *guest* access permissions being shadowed. Note
696 * that the SPTE itself may have a more constrained access permissions that
697 * what the guest enforces. For example, a guest may create an executable
698 * huge PTE but KVM may disallow execution to mitigate iTLB multihit.
700 static u32 kvm_mmu_page_get_access(struct kvm_mmu_page *sp, int index)
702 if (sp_has_gptes(sp))
703 return sp->shadowed_translation[index] & ACC_ALL;
706 * For direct MMUs (e.g. TDP or non-paging guests) or passthrough SPs,
707 * KVM is not shadowing any guest page tables, so the "guest access
708 * permissions" are just ACC_ALL.
710 * For direct SPs in indirect MMUs (shadow paging), i.e. when KVM
711 * is shadowing a guest huge page with small pages, the guest access
712 * permissions being shadowed are the access permissions of the huge
715 * In both cases, sp->role.access contains the correct access bits.
717 return sp->role.access;
720 static void kvm_mmu_page_set_translation(struct kvm_mmu_page *sp, int index,
721 gfn_t gfn, unsigned int access)
723 if (sp_has_gptes(sp)) {
724 sp->shadowed_translation[index] = (gfn << PAGE_SHIFT) | access;
728 WARN_ONCE(access != kvm_mmu_page_get_access(sp, index),
729 "access mismatch under %s page %llx (expected %u, got %u)\n",
730 sp->role.passthrough ? "passthrough" : "direct",
731 sp->gfn, kvm_mmu_page_get_access(sp, index), access);
733 WARN_ONCE(gfn != kvm_mmu_page_get_gfn(sp, index),
734 "gfn mismatch under %s page %llx (expected %llx, got %llx)\n",
735 sp->role.passthrough ? "passthrough" : "direct",
736 sp->gfn, kvm_mmu_page_get_gfn(sp, index), gfn);
739 static void kvm_mmu_page_set_access(struct kvm_mmu_page *sp, int index,
742 gfn_t gfn = kvm_mmu_page_get_gfn(sp, index);
744 kvm_mmu_page_set_translation(sp, index, gfn, access);
748 * Return the pointer to the large page information for a given gfn,
749 * handling slots that are not large page aligned.
751 static struct kvm_lpage_info *lpage_info_slot(gfn_t gfn,
752 const struct kvm_memory_slot *slot, int level)
756 idx = gfn_to_index(gfn, slot->base_gfn, level);
757 return &slot->arch.lpage_info[level - 2][idx];
760 static void update_gfn_disallow_lpage_count(const struct kvm_memory_slot *slot,
761 gfn_t gfn, int count)
763 struct kvm_lpage_info *linfo;
766 for (i = PG_LEVEL_2M; i <= KVM_MAX_HUGEPAGE_LEVEL; ++i) {
767 linfo = lpage_info_slot(gfn, slot, i);
768 linfo->disallow_lpage += count;
769 WARN_ON(linfo->disallow_lpage < 0);
773 void kvm_mmu_gfn_disallow_lpage(const struct kvm_memory_slot *slot, gfn_t gfn)
775 update_gfn_disallow_lpage_count(slot, gfn, 1);
778 void kvm_mmu_gfn_allow_lpage(const struct kvm_memory_slot *slot, gfn_t gfn)
780 update_gfn_disallow_lpage_count(slot, gfn, -1);
783 static void account_shadowed(struct kvm *kvm, struct kvm_mmu_page *sp)
785 struct kvm_memslots *slots;
786 struct kvm_memory_slot *slot;
789 kvm->arch.indirect_shadow_pages++;
791 slots = kvm_memslots_for_spte_role(kvm, sp->role);
792 slot = __gfn_to_memslot(slots, gfn);
794 /* the non-leaf shadow pages are keeping readonly. */
795 if (sp->role.level > PG_LEVEL_4K)
796 return kvm_slot_page_track_add_page(kvm, slot, gfn,
797 KVM_PAGE_TRACK_WRITE);
799 kvm_mmu_gfn_disallow_lpage(slot, gfn);
801 if (kvm_mmu_slot_gfn_write_protect(kvm, slot, gfn, PG_LEVEL_4K))
802 kvm_flush_remote_tlbs_with_address(kvm, gfn, 1);
805 void account_huge_nx_page(struct kvm *kvm, struct kvm_mmu_page *sp)
807 if (sp->lpage_disallowed)
810 ++kvm->stat.nx_lpage_splits;
811 list_add_tail(&sp->lpage_disallowed_link,
812 &kvm->arch.lpage_disallowed_mmu_pages);
813 sp->lpage_disallowed = true;
816 static void unaccount_shadowed(struct kvm *kvm, struct kvm_mmu_page *sp)
818 struct kvm_memslots *slots;
819 struct kvm_memory_slot *slot;
822 kvm->arch.indirect_shadow_pages--;
824 slots = kvm_memslots_for_spte_role(kvm, sp->role);
825 slot = __gfn_to_memslot(slots, gfn);
826 if (sp->role.level > PG_LEVEL_4K)
827 return kvm_slot_page_track_remove_page(kvm, slot, gfn,
828 KVM_PAGE_TRACK_WRITE);
830 kvm_mmu_gfn_allow_lpage(slot, gfn);
833 void unaccount_huge_nx_page(struct kvm *kvm, struct kvm_mmu_page *sp)
835 --kvm->stat.nx_lpage_splits;
836 sp->lpage_disallowed = false;
837 list_del(&sp->lpage_disallowed_link);
840 static struct kvm_memory_slot *
841 gfn_to_memslot_dirty_bitmap(struct kvm_vcpu *vcpu, gfn_t gfn,
844 struct kvm_memory_slot *slot;
846 slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn);
847 if (!slot || slot->flags & KVM_MEMSLOT_INVALID)
849 if (no_dirty_log && kvm_slot_dirty_track_enabled(slot))
856 * About rmap_head encoding:
858 * If the bit zero of rmap_head->val is clear, then it points to the only spte
859 * in this rmap chain. Otherwise, (rmap_head->val & ~1) points to a struct
860 * pte_list_desc containing more mappings.
864 * Returns the number of pointers in the rmap chain, not counting the new one.
866 static int pte_list_add(struct kvm_mmu_memory_cache *cache, u64 *spte,
867 struct kvm_rmap_head *rmap_head)
869 struct pte_list_desc *desc;
872 if (!rmap_head->val) {
873 rmap_printk("%p %llx 0->1\n", spte, *spte);
874 rmap_head->val = (unsigned long)spte;
875 } else if (!(rmap_head->val & 1)) {
876 rmap_printk("%p %llx 1->many\n", spte, *spte);
877 desc = kvm_mmu_memory_cache_alloc(cache);
878 desc->sptes[0] = (u64 *)rmap_head->val;
879 desc->sptes[1] = spte;
880 desc->spte_count = 2;
881 rmap_head->val = (unsigned long)desc | 1;
884 rmap_printk("%p %llx many->many\n", spte, *spte);
885 desc = (struct pte_list_desc *)(rmap_head->val & ~1ul);
886 while (desc->spte_count == PTE_LIST_EXT) {
887 count += PTE_LIST_EXT;
889 desc->more = kvm_mmu_memory_cache_alloc(cache);
891 desc->spte_count = 0;
896 count += desc->spte_count;
897 desc->sptes[desc->spte_count++] = spte;
903 pte_list_desc_remove_entry(struct kvm_rmap_head *rmap_head,
904 struct pte_list_desc *desc, int i,
905 struct pte_list_desc *prev_desc)
907 int j = desc->spte_count - 1;
909 desc->sptes[i] = desc->sptes[j];
910 desc->sptes[j] = NULL;
912 if (desc->spte_count)
914 if (!prev_desc && !desc->more)
918 prev_desc->more = desc->more;
920 rmap_head->val = (unsigned long)desc->more | 1;
921 mmu_free_pte_list_desc(desc);
924 static void __pte_list_remove(u64 *spte, struct kvm_rmap_head *rmap_head)
926 struct pte_list_desc *desc;
927 struct pte_list_desc *prev_desc;
930 if (!rmap_head->val) {
931 pr_err("%s: %p 0->BUG\n", __func__, spte);
933 } else if (!(rmap_head->val & 1)) {
934 rmap_printk("%p 1->0\n", spte);
935 if ((u64 *)rmap_head->val != spte) {
936 pr_err("%s: %p 1->BUG\n", __func__, spte);
941 rmap_printk("%p many->many\n", spte);
942 desc = (struct pte_list_desc *)(rmap_head->val & ~1ul);
945 for (i = 0; i < desc->spte_count; ++i) {
946 if (desc->sptes[i] == spte) {
947 pte_list_desc_remove_entry(rmap_head,
955 pr_err("%s: %p many->many\n", __func__, spte);
960 static void pte_list_remove(struct kvm *kvm, struct kvm_rmap_head *rmap_head,
963 mmu_spte_clear_track_bits(kvm, sptep);
964 __pte_list_remove(sptep, rmap_head);
967 /* Return true if rmap existed, false otherwise */
968 static bool pte_list_destroy(struct kvm *kvm, struct kvm_rmap_head *rmap_head)
970 struct pte_list_desc *desc, *next;
976 if (!(rmap_head->val & 1)) {
977 mmu_spte_clear_track_bits(kvm, (u64 *)rmap_head->val);
981 desc = (struct pte_list_desc *)(rmap_head->val & ~1ul);
983 for (; desc; desc = next) {
984 for (i = 0; i < desc->spte_count; i++)
985 mmu_spte_clear_track_bits(kvm, desc->sptes[i]);
987 mmu_free_pte_list_desc(desc);
990 /* rmap_head is meaningless now, remember to reset it */
995 unsigned int pte_list_count(struct kvm_rmap_head *rmap_head)
997 struct pte_list_desc *desc;
998 unsigned int count = 0;
1000 if (!rmap_head->val)
1002 else if (!(rmap_head->val & 1))
1005 desc = (struct pte_list_desc *)(rmap_head->val & ~1ul);
1008 count += desc->spte_count;
1015 static struct kvm_rmap_head *gfn_to_rmap(gfn_t gfn, int level,
1016 const struct kvm_memory_slot *slot)
1020 idx = gfn_to_index(gfn, slot->base_gfn, level);
1021 return &slot->arch.rmap[level - PG_LEVEL_4K][idx];
1024 static bool rmap_can_add(struct kvm_vcpu *vcpu)
1026 struct kvm_mmu_memory_cache *mc;
1028 mc = &vcpu->arch.mmu_pte_list_desc_cache;
1029 return kvm_mmu_memory_cache_nr_free_objects(mc);
1032 static void rmap_remove(struct kvm *kvm, u64 *spte)
1034 struct kvm_memslots *slots;
1035 struct kvm_memory_slot *slot;
1036 struct kvm_mmu_page *sp;
1038 struct kvm_rmap_head *rmap_head;
1040 sp = sptep_to_sp(spte);
1041 gfn = kvm_mmu_page_get_gfn(sp, spte_index(spte));
1044 * Unlike rmap_add, rmap_remove does not run in the context of a vCPU
1045 * so we have to determine which memslots to use based on context
1046 * information in sp->role.
1048 slots = kvm_memslots_for_spte_role(kvm, sp->role);
1050 slot = __gfn_to_memslot(slots, gfn);
1051 rmap_head = gfn_to_rmap(gfn, sp->role.level, slot);
1053 __pte_list_remove(spte, rmap_head);
1057 * Used by the following functions to iterate through the sptes linked by a
1058 * rmap. All fields are private and not assumed to be used outside.
1060 struct rmap_iterator {
1061 /* private fields */
1062 struct pte_list_desc *desc; /* holds the sptep if not NULL */
1063 int pos; /* index of the sptep */
1067 * Iteration must be started by this function. This should also be used after
1068 * removing/dropping sptes from the rmap link because in such cases the
1069 * information in the iterator may not be valid.
1071 * Returns sptep if found, NULL otherwise.
1073 static u64 *rmap_get_first(struct kvm_rmap_head *rmap_head,
1074 struct rmap_iterator *iter)
1078 if (!rmap_head->val)
1081 if (!(rmap_head->val & 1)) {
1083 sptep = (u64 *)rmap_head->val;
1087 iter->desc = (struct pte_list_desc *)(rmap_head->val & ~1ul);
1089 sptep = iter->desc->sptes[iter->pos];
1091 BUG_ON(!is_shadow_present_pte(*sptep));
1096 * Must be used with a valid iterator: e.g. after rmap_get_first().
1098 * Returns sptep if found, NULL otherwise.
1100 static u64 *rmap_get_next(struct rmap_iterator *iter)
1105 if (iter->pos < PTE_LIST_EXT - 1) {
1107 sptep = iter->desc->sptes[iter->pos];
1112 iter->desc = iter->desc->more;
1116 /* desc->sptes[0] cannot be NULL */
1117 sptep = iter->desc->sptes[iter->pos];
1124 BUG_ON(!is_shadow_present_pte(*sptep));
1128 #define for_each_rmap_spte(_rmap_head_, _iter_, _spte_) \
1129 for (_spte_ = rmap_get_first(_rmap_head_, _iter_); \
1130 _spte_; _spte_ = rmap_get_next(_iter_))
1132 static void drop_spte(struct kvm *kvm, u64 *sptep)
1134 u64 old_spte = mmu_spte_clear_track_bits(kvm, sptep);
1136 if (is_shadow_present_pte(old_spte))
1137 rmap_remove(kvm, sptep);
1140 static void drop_large_spte(struct kvm *kvm, u64 *sptep, bool flush)
1142 struct kvm_mmu_page *sp;
1144 sp = sptep_to_sp(sptep);
1145 WARN_ON(sp->role.level == PG_LEVEL_4K);
1147 drop_spte(kvm, sptep);
1150 kvm_flush_remote_tlbs_with_address(kvm, sp->gfn,
1151 KVM_PAGES_PER_HPAGE(sp->role.level));
1155 * Write-protect on the specified @sptep, @pt_protect indicates whether
1156 * spte write-protection is caused by protecting shadow page table.
1158 * Note: write protection is difference between dirty logging and spte
1160 * - for dirty logging, the spte can be set to writable at anytime if
1161 * its dirty bitmap is properly set.
1162 * - for spte protection, the spte can be writable only after unsync-ing
1165 * Return true if tlb need be flushed.
1167 static bool spte_write_protect(u64 *sptep, bool pt_protect)
1171 if (!is_writable_pte(spte) &&
1172 !(pt_protect && is_mmu_writable_spte(spte)))
1175 rmap_printk("spte %p %llx\n", sptep, *sptep);
1178 spte &= ~shadow_mmu_writable_mask;
1179 spte = spte & ~PT_WRITABLE_MASK;
1181 return mmu_spte_update(sptep, spte);
1184 static bool rmap_write_protect(struct kvm_rmap_head *rmap_head,
1188 struct rmap_iterator iter;
1191 for_each_rmap_spte(rmap_head, &iter, sptep)
1192 flush |= spte_write_protect(sptep, pt_protect);
1197 static bool spte_clear_dirty(u64 *sptep)
1201 rmap_printk("spte %p %llx\n", sptep, *sptep);
1203 MMU_WARN_ON(!spte_ad_enabled(spte));
1204 spte &= ~shadow_dirty_mask;
1205 return mmu_spte_update(sptep, spte);
1208 static bool spte_wrprot_for_clear_dirty(u64 *sptep)
1210 bool was_writable = test_and_clear_bit(PT_WRITABLE_SHIFT,
1211 (unsigned long *)sptep);
1212 if (was_writable && !spte_ad_enabled(*sptep))
1213 kvm_set_pfn_dirty(spte_to_pfn(*sptep));
1215 return was_writable;
1219 * Gets the GFN ready for another round of dirty logging by clearing the
1220 * - D bit on ad-enabled SPTEs, and
1221 * - W bit on ad-disabled SPTEs.
1222 * Returns true iff any D or W bits were cleared.
1224 static bool __rmap_clear_dirty(struct kvm *kvm, struct kvm_rmap_head *rmap_head,
1225 const struct kvm_memory_slot *slot)
1228 struct rmap_iterator iter;
1231 for_each_rmap_spte(rmap_head, &iter, sptep)
1232 if (spte_ad_need_write_protect(*sptep))
1233 flush |= spte_wrprot_for_clear_dirty(sptep);
1235 flush |= spte_clear_dirty(sptep);
1241 * kvm_mmu_write_protect_pt_masked - write protect selected PT level pages
1242 * @kvm: kvm instance
1243 * @slot: slot to protect
1244 * @gfn_offset: start of the BITS_PER_LONG pages we care about
1245 * @mask: indicates which pages we should protect
1247 * Used when we do not need to care about huge page mappings.
1249 static void kvm_mmu_write_protect_pt_masked(struct kvm *kvm,
1250 struct kvm_memory_slot *slot,
1251 gfn_t gfn_offset, unsigned long mask)
1253 struct kvm_rmap_head *rmap_head;
1255 if (is_tdp_mmu_enabled(kvm))
1256 kvm_tdp_mmu_clear_dirty_pt_masked(kvm, slot,
1257 slot->base_gfn + gfn_offset, mask, true);
1259 if (!kvm_memslots_have_rmaps(kvm))
1263 rmap_head = gfn_to_rmap(slot->base_gfn + gfn_offset + __ffs(mask),
1265 rmap_write_protect(rmap_head, false);
1267 /* clear the first set bit */
1273 * kvm_mmu_clear_dirty_pt_masked - clear MMU D-bit for PT level pages, or write
1274 * protect the page if the D-bit isn't supported.
1275 * @kvm: kvm instance
1276 * @slot: slot to clear D-bit
1277 * @gfn_offset: start of the BITS_PER_LONG pages we care about
1278 * @mask: indicates which pages we should clear D-bit
1280 * Used for PML to re-log the dirty GPAs after userspace querying dirty_bitmap.
1282 static void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm,
1283 struct kvm_memory_slot *slot,
1284 gfn_t gfn_offset, unsigned long mask)
1286 struct kvm_rmap_head *rmap_head;
1288 if (is_tdp_mmu_enabled(kvm))
1289 kvm_tdp_mmu_clear_dirty_pt_masked(kvm, slot,
1290 slot->base_gfn + gfn_offset, mask, false);
1292 if (!kvm_memslots_have_rmaps(kvm))
1296 rmap_head = gfn_to_rmap(slot->base_gfn + gfn_offset + __ffs(mask),
1298 __rmap_clear_dirty(kvm, rmap_head, slot);
1300 /* clear the first set bit */
1306 * kvm_arch_mmu_enable_log_dirty_pt_masked - enable dirty logging for selected
1309 * It calls kvm_mmu_write_protect_pt_masked to write protect selected pages to
1310 * enable dirty logging for them.
1312 * We need to care about huge page mappings: e.g. during dirty logging we may
1313 * have such mappings.
1315 void kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm *kvm,
1316 struct kvm_memory_slot *slot,
1317 gfn_t gfn_offset, unsigned long mask)
1320 * Huge pages are NOT write protected when we start dirty logging in
1321 * initially-all-set mode; must write protect them here so that they
1322 * are split to 4K on the first write.
1324 * The gfn_offset is guaranteed to be aligned to 64, but the base_gfn
1325 * of memslot has no such restriction, so the range can cross two large
1328 if (kvm_dirty_log_manual_protect_and_init_set(kvm)) {
1329 gfn_t start = slot->base_gfn + gfn_offset + __ffs(mask);
1330 gfn_t end = slot->base_gfn + gfn_offset + __fls(mask);
1332 if (READ_ONCE(eager_page_split))
1333 kvm_mmu_try_split_huge_pages(kvm, slot, start, end, PG_LEVEL_4K);
1335 kvm_mmu_slot_gfn_write_protect(kvm, slot, start, PG_LEVEL_2M);
1337 /* Cross two large pages? */
1338 if (ALIGN(start << PAGE_SHIFT, PMD_SIZE) !=
1339 ALIGN(end << PAGE_SHIFT, PMD_SIZE))
1340 kvm_mmu_slot_gfn_write_protect(kvm, slot, end,
1344 /* Now handle 4K PTEs. */
1345 if (kvm_x86_ops.cpu_dirty_log_size)
1346 kvm_mmu_clear_dirty_pt_masked(kvm, slot, gfn_offset, mask);
1348 kvm_mmu_write_protect_pt_masked(kvm, slot, gfn_offset, mask);
1351 int kvm_cpu_dirty_log_size(void)
1353 return kvm_x86_ops.cpu_dirty_log_size;
1356 bool kvm_mmu_slot_gfn_write_protect(struct kvm *kvm,
1357 struct kvm_memory_slot *slot, u64 gfn,
1360 struct kvm_rmap_head *rmap_head;
1362 bool write_protected = false;
1364 if (kvm_memslots_have_rmaps(kvm)) {
1365 for (i = min_level; i <= KVM_MAX_HUGEPAGE_LEVEL; ++i) {
1366 rmap_head = gfn_to_rmap(gfn, i, slot);
1367 write_protected |= rmap_write_protect(rmap_head, true);
1371 if (is_tdp_mmu_enabled(kvm))
1373 kvm_tdp_mmu_write_protect_gfn(kvm, slot, gfn, min_level);
1375 return write_protected;
1378 static bool kvm_vcpu_write_protect_gfn(struct kvm_vcpu *vcpu, u64 gfn)
1380 struct kvm_memory_slot *slot;
1382 slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn);
1383 return kvm_mmu_slot_gfn_write_protect(vcpu->kvm, slot, gfn, PG_LEVEL_4K);
1386 static bool kvm_zap_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head,
1387 const struct kvm_memory_slot *slot)
1389 return pte_list_destroy(kvm, rmap_head);
1392 static bool kvm_unmap_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head,
1393 struct kvm_memory_slot *slot, gfn_t gfn, int level,
1396 return kvm_zap_rmapp(kvm, rmap_head, slot);
1399 static bool kvm_set_pte_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head,
1400 struct kvm_memory_slot *slot, gfn_t gfn, int level,
1404 struct rmap_iterator iter;
1405 bool need_flush = false;
1409 WARN_ON(pte_huge(pte));
1410 new_pfn = pte_pfn(pte);
1413 for_each_rmap_spte(rmap_head, &iter, sptep) {
1414 rmap_printk("spte %p %llx gfn %llx (%d)\n",
1415 sptep, *sptep, gfn, level);
1419 if (pte_write(pte)) {
1420 pte_list_remove(kvm, rmap_head, sptep);
1423 new_spte = kvm_mmu_changed_pte_notifier_make_spte(
1426 mmu_spte_clear_track_bits(kvm, sptep);
1427 mmu_spte_set(sptep, new_spte);
1431 if (need_flush && kvm_available_flush_tlb_with_range()) {
1432 kvm_flush_remote_tlbs_with_address(kvm, gfn, 1);
1439 struct slot_rmap_walk_iterator {
1441 const struct kvm_memory_slot *slot;
1447 /* output fields. */
1449 struct kvm_rmap_head *rmap;
1452 /* private field. */
1453 struct kvm_rmap_head *end_rmap;
1457 rmap_walk_init_level(struct slot_rmap_walk_iterator *iterator, int level)
1459 iterator->level = level;
1460 iterator->gfn = iterator->start_gfn;
1461 iterator->rmap = gfn_to_rmap(iterator->gfn, level, iterator->slot);
1462 iterator->end_rmap = gfn_to_rmap(iterator->end_gfn, level, iterator->slot);
1466 slot_rmap_walk_init(struct slot_rmap_walk_iterator *iterator,
1467 const struct kvm_memory_slot *slot, int start_level,
1468 int end_level, gfn_t start_gfn, gfn_t end_gfn)
1470 iterator->slot = slot;
1471 iterator->start_level = start_level;
1472 iterator->end_level = end_level;
1473 iterator->start_gfn = start_gfn;
1474 iterator->end_gfn = end_gfn;
1476 rmap_walk_init_level(iterator, iterator->start_level);
1479 static bool slot_rmap_walk_okay(struct slot_rmap_walk_iterator *iterator)
1481 return !!iterator->rmap;
1484 static void slot_rmap_walk_next(struct slot_rmap_walk_iterator *iterator)
1486 while (++iterator->rmap <= iterator->end_rmap) {
1487 iterator->gfn += (1UL << KVM_HPAGE_GFN_SHIFT(iterator->level));
1489 if (iterator->rmap->val)
1493 if (++iterator->level > iterator->end_level) {
1494 iterator->rmap = NULL;
1498 rmap_walk_init_level(iterator, iterator->level);
1501 #define for_each_slot_rmap_range(_slot_, _start_level_, _end_level_, \
1502 _start_gfn, _end_gfn, _iter_) \
1503 for (slot_rmap_walk_init(_iter_, _slot_, _start_level_, \
1504 _end_level_, _start_gfn, _end_gfn); \
1505 slot_rmap_walk_okay(_iter_); \
1506 slot_rmap_walk_next(_iter_))
1508 typedef bool (*rmap_handler_t)(struct kvm *kvm, struct kvm_rmap_head *rmap_head,
1509 struct kvm_memory_slot *slot, gfn_t gfn,
1510 int level, pte_t pte);
1512 static __always_inline bool kvm_handle_gfn_range(struct kvm *kvm,
1513 struct kvm_gfn_range *range,
1514 rmap_handler_t handler)
1516 struct slot_rmap_walk_iterator iterator;
1519 for_each_slot_rmap_range(range->slot, PG_LEVEL_4K, KVM_MAX_HUGEPAGE_LEVEL,
1520 range->start, range->end - 1, &iterator)
1521 ret |= handler(kvm, iterator.rmap, range->slot, iterator.gfn,
1522 iterator.level, range->pte);
1527 bool kvm_unmap_gfn_range(struct kvm *kvm, struct kvm_gfn_range *range)
1531 if (kvm_memslots_have_rmaps(kvm))
1532 flush = kvm_handle_gfn_range(kvm, range, kvm_unmap_rmapp);
1534 if (is_tdp_mmu_enabled(kvm))
1535 flush = kvm_tdp_mmu_unmap_gfn_range(kvm, range, flush);
1540 bool kvm_set_spte_gfn(struct kvm *kvm, struct kvm_gfn_range *range)
1544 if (kvm_memslots_have_rmaps(kvm))
1545 flush = kvm_handle_gfn_range(kvm, range, kvm_set_pte_rmapp);
1547 if (is_tdp_mmu_enabled(kvm))
1548 flush |= kvm_tdp_mmu_set_spte_gfn(kvm, range);
1553 static bool kvm_age_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head,
1554 struct kvm_memory_slot *slot, gfn_t gfn, int level,
1558 struct rmap_iterator iter;
1561 for_each_rmap_spte(rmap_head, &iter, sptep)
1562 young |= mmu_spte_age(sptep);
1567 static bool kvm_test_age_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head,
1568 struct kvm_memory_slot *slot, gfn_t gfn,
1569 int level, pte_t unused)
1572 struct rmap_iterator iter;
1574 for_each_rmap_spte(rmap_head, &iter, sptep)
1575 if (is_accessed_spte(*sptep))
1580 #define RMAP_RECYCLE_THRESHOLD 1000
1582 static void __rmap_add(struct kvm *kvm,
1583 struct kvm_mmu_memory_cache *cache,
1584 const struct kvm_memory_slot *slot,
1585 u64 *spte, gfn_t gfn, unsigned int access)
1587 struct kvm_mmu_page *sp;
1588 struct kvm_rmap_head *rmap_head;
1591 sp = sptep_to_sp(spte);
1592 kvm_mmu_page_set_translation(sp, spte_index(spte), gfn, access);
1593 kvm_update_page_stats(kvm, sp->role.level, 1);
1595 rmap_head = gfn_to_rmap(gfn, sp->role.level, slot);
1596 rmap_count = pte_list_add(cache, spte, rmap_head);
1598 if (rmap_count > RMAP_RECYCLE_THRESHOLD) {
1599 kvm_unmap_rmapp(kvm, rmap_head, NULL, gfn, sp->role.level, __pte(0));
1600 kvm_flush_remote_tlbs_with_address(
1601 kvm, sp->gfn, KVM_PAGES_PER_HPAGE(sp->role.level));
1605 static void rmap_add(struct kvm_vcpu *vcpu, const struct kvm_memory_slot *slot,
1606 u64 *spte, gfn_t gfn, unsigned int access)
1608 struct kvm_mmu_memory_cache *cache = &vcpu->arch.mmu_pte_list_desc_cache;
1610 __rmap_add(vcpu->kvm, cache, slot, spte, gfn, access);
1613 bool kvm_age_gfn(struct kvm *kvm, struct kvm_gfn_range *range)
1617 if (kvm_memslots_have_rmaps(kvm))
1618 young = kvm_handle_gfn_range(kvm, range, kvm_age_rmapp);
1620 if (is_tdp_mmu_enabled(kvm))
1621 young |= kvm_tdp_mmu_age_gfn_range(kvm, range);
1626 bool kvm_test_age_gfn(struct kvm *kvm, struct kvm_gfn_range *range)
1630 if (kvm_memslots_have_rmaps(kvm))
1631 young = kvm_handle_gfn_range(kvm, range, kvm_test_age_rmapp);
1633 if (is_tdp_mmu_enabled(kvm))
1634 young |= kvm_tdp_mmu_test_age_gfn(kvm, range);
1640 static int is_empty_shadow_page(u64 *spt)
1645 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
1646 if (is_shadow_present_pte(*pos)) {
1647 printk(KERN_ERR "%s: %p %llx\n", __func__,
1656 * This value is the sum of all of the kvm instances's
1657 * kvm->arch.n_used_mmu_pages values. We need a global,
1658 * aggregate version in order to make the slab shrinker
1661 static inline void kvm_mod_used_mmu_pages(struct kvm *kvm, long nr)
1663 kvm->arch.n_used_mmu_pages += nr;
1664 percpu_counter_add(&kvm_total_used_mmu_pages, nr);
1667 static void kvm_mmu_free_shadow_page(struct kvm_mmu_page *sp)
1669 MMU_WARN_ON(!is_empty_shadow_page(sp->spt));
1670 hlist_del(&sp->hash_link);
1671 list_del(&sp->link);
1672 free_page((unsigned long)sp->spt);
1673 if (!sp->role.direct)
1674 free_page((unsigned long)sp->shadowed_translation);
1675 kmem_cache_free(mmu_page_header_cache, sp);
1678 static unsigned kvm_page_table_hashfn(gfn_t gfn)
1680 return hash_64(gfn, KVM_MMU_HASH_SHIFT);
1683 static void mmu_page_add_parent_pte(struct kvm_mmu_memory_cache *cache,
1684 struct kvm_mmu_page *sp, u64 *parent_pte)
1689 pte_list_add(cache, parent_pte, &sp->parent_ptes);
1692 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
1695 __pte_list_remove(parent_pte, &sp->parent_ptes);
1698 static void drop_parent_pte(struct kvm_mmu_page *sp,
1701 mmu_page_remove_parent_pte(sp, parent_pte);
1702 mmu_spte_clear_no_track(parent_pte);
1705 static void mark_unsync(u64 *spte);
1706 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp)
1709 struct rmap_iterator iter;
1711 for_each_rmap_spte(&sp->parent_ptes, &iter, sptep) {
1716 static void mark_unsync(u64 *spte)
1718 struct kvm_mmu_page *sp;
1720 sp = sptep_to_sp(spte);
1721 if (__test_and_set_bit(spte_index(spte), sp->unsync_child_bitmap))
1723 if (sp->unsync_children++)
1725 kvm_mmu_mark_parents_unsync(sp);
1728 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1729 struct kvm_mmu_page *sp)
1734 #define KVM_PAGE_ARRAY_NR 16
1736 struct kvm_mmu_pages {
1737 struct mmu_page_and_offset {
1738 struct kvm_mmu_page *sp;
1740 } page[KVM_PAGE_ARRAY_NR];
1744 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1750 for (i=0; i < pvec->nr; i++)
1751 if (pvec->page[i].sp == sp)
1754 pvec->page[pvec->nr].sp = sp;
1755 pvec->page[pvec->nr].idx = idx;
1757 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1760 static inline void clear_unsync_child_bit(struct kvm_mmu_page *sp, int idx)
1762 --sp->unsync_children;
1763 WARN_ON((int)sp->unsync_children < 0);
1764 __clear_bit(idx, sp->unsync_child_bitmap);
1767 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1768 struct kvm_mmu_pages *pvec)
1770 int i, ret, nr_unsync_leaf = 0;
1772 for_each_set_bit(i, sp->unsync_child_bitmap, 512) {
1773 struct kvm_mmu_page *child;
1774 u64 ent = sp->spt[i];
1776 if (!is_shadow_present_pte(ent) || is_large_pte(ent)) {
1777 clear_unsync_child_bit(sp, i);
1781 child = to_shadow_page(ent & SPTE_BASE_ADDR_MASK);
1783 if (child->unsync_children) {
1784 if (mmu_pages_add(pvec, child, i))
1787 ret = __mmu_unsync_walk(child, pvec);
1789 clear_unsync_child_bit(sp, i);
1791 } else if (ret > 0) {
1792 nr_unsync_leaf += ret;
1795 } else if (child->unsync) {
1797 if (mmu_pages_add(pvec, child, i))
1800 clear_unsync_child_bit(sp, i);
1803 return nr_unsync_leaf;
1806 #define INVALID_INDEX (-1)
1808 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1809 struct kvm_mmu_pages *pvec)
1812 if (!sp->unsync_children)
1815 mmu_pages_add(pvec, sp, INVALID_INDEX);
1816 return __mmu_unsync_walk(sp, pvec);
1819 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1821 WARN_ON(!sp->unsync);
1822 trace_kvm_mmu_sync_page(sp);
1824 --kvm->stat.mmu_unsync;
1827 static bool kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
1828 struct list_head *invalid_list);
1829 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
1830 struct list_head *invalid_list);
1832 static bool sp_has_gptes(struct kvm_mmu_page *sp)
1834 if (sp->role.direct)
1837 if (sp->role.passthrough)
1843 #define for_each_valid_sp(_kvm, _sp, _list) \
1844 hlist_for_each_entry(_sp, _list, hash_link) \
1845 if (is_obsolete_sp((_kvm), (_sp))) { \
1848 #define for_each_gfn_valid_sp_with_gptes(_kvm, _sp, _gfn) \
1849 for_each_valid_sp(_kvm, _sp, \
1850 &(_kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(_gfn)]) \
1851 if ((_sp)->gfn != (_gfn) || !sp_has_gptes(_sp)) {} else
1853 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1854 struct list_head *invalid_list)
1856 int ret = vcpu->arch.mmu->sync_page(vcpu, sp);
1859 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1863 static bool kvm_mmu_remote_flush_or_zap(struct kvm *kvm,
1864 struct list_head *invalid_list,
1867 if (!remote_flush && list_empty(invalid_list))
1870 if (!list_empty(invalid_list))
1871 kvm_mmu_commit_zap_page(kvm, invalid_list);
1873 kvm_flush_remote_tlbs(kvm);
1877 static bool is_obsolete_sp(struct kvm *kvm, struct kvm_mmu_page *sp)
1879 if (sp->role.invalid)
1882 /* TDP MMU pages due not use the MMU generation. */
1883 return !sp->tdp_mmu_page &&
1884 unlikely(sp->mmu_valid_gen != kvm->arch.mmu_valid_gen);
1887 struct mmu_page_path {
1888 struct kvm_mmu_page *parent[PT64_ROOT_MAX_LEVEL];
1889 unsigned int idx[PT64_ROOT_MAX_LEVEL];
1892 #define for_each_sp(pvec, sp, parents, i) \
1893 for (i = mmu_pages_first(&pvec, &parents); \
1894 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1895 i = mmu_pages_next(&pvec, &parents, i))
1897 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1898 struct mmu_page_path *parents,
1903 for (n = i+1; n < pvec->nr; n++) {
1904 struct kvm_mmu_page *sp = pvec->page[n].sp;
1905 unsigned idx = pvec->page[n].idx;
1906 int level = sp->role.level;
1908 parents->idx[level-1] = idx;
1909 if (level == PG_LEVEL_4K)
1912 parents->parent[level-2] = sp;
1918 static int mmu_pages_first(struct kvm_mmu_pages *pvec,
1919 struct mmu_page_path *parents)
1921 struct kvm_mmu_page *sp;
1927 WARN_ON(pvec->page[0].idx != INVALID_INDEX);
1929 sp = pvec->page[0].sp;
1930 level = sp->role.level;
1931 WARN_ON(level == PG_LEVEL_4K);
1933 parents->parent[level-2] = sp;
1935 /* Also set up a sentinel. Further entries in pvec are all
1936 * children of sp, so this element is never overwritten.
1938 parents->parent[level-1] = NULL;
1939 return mmu_pages_next(pvec, parents, 0);
1942 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1944 struct kvm_mmu_page *sp;
1945 unsigned int level = 0;
1948 unsigned int idx = parents->idx[level];
1949 sp = parents->parent[level];
1953 WARN_ON(idx == INVALID_INDEX);
1954 clear_unsync_child_bit(sp, idx);
1956 } while (!sp->unsync_children);
1959 static int mmu_sync_children(struct kvm_vcpu *vcpu,
1960 struct kvm_mmu_page *parent, bool can_yield)
1963 struct kvm_mmu_page *sp;
1964 struct mmu_page_path parents;
1965 struct kvm_mmu_pages pages;
1966 LIST_HEAD(invalid_list);
1969 while (mmu_unsync_walk(parent, &pages)) {
1970 bool protected = false;
1972 for_each_sp(pages, sp, parents, i)
1973 protected |= kvm_vcpu_write_protect_gfn(vcpu, sp->gfn);
1976 kvm_mmu_remote_flush_or_zap(vcpu->kvm, &invalid_list, true);
1980 for_each_sp(pages, sp, parents, i) {
1981 kvm_unlink_unsync_page(vcpu->kvm, sp);
1982 flush |= kvm_sync_page(vcpu, sp, &invalid_list) > 0;
1983 mmu_pages_clear_parents(&parents);
1985 if (need_resched() || rwlock_needbreak(&vcpu->kvm->mmu_lock)) {
1986 kvm_mmu_remote_flush_or_zap(vcpu->kvm, &invalid_list, flush);
1988 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
1992 cond_resched_rwlock_write(&vcpu->kvm->mmu_lock);
1997 kvm_mmu_remote_flush_or_zap(vcpu->kvm, &invalid_list, flush);
2001 static void __clear_sp_write_flooding_count(struct kvm_mmu_page *sp)
2003 atomic_set(&sp->write_flooding_count, 0);
2006 static void clear_sp_write_flooding_count(u64 *spte)
2008 __clear_sp_write_flooding_count(sptep_to_sp(spte));
2012 * The vCPU is required when finding indirect shadow pages; the shadow
2013 * page may already exist and syncing it needs the vCPU pointer in
2014 * order to read guest page tables. Direct shadow pages are never
2015 * unsync, thus @vcpu can be NULL if @role.direct is true.
2017 static struct kvm_mmu_page *kvm_mmu_find_shadow_page(struct kvm *kvm,
2018 struct kvm_vcpu *vcpu,
2020 struct hlist_head *sp_list,
2021 union kvm_mmu_page_role role)
2023 struct kvm_mmu_page *sp;
2026 LIST_HEAD(invalid_list);
2028 for_each_valid_sp(kvm, sp, sp_list) {
2029 if (sp->gfn != gfn) {
2034 if (sp->role.word != role.word) {
2036 * If the guest is creating an upper-level page, zap
2037 * unsync pages for the same gfn. While it's possible
2038 * the guest is using recursive page tables, in all
2039 * likelihood the guest has stopped using the unsync
2040 * page and is installing a completely unrelated page.
2041 * Unsync pages must not be left as is, because the new
2042 * upper-level page will be write-protected.
2044 if (role.level > PG_LEVEL_4K && sp->unsync)
2045 kvm_mmu_prepare_zap_page(kvm, sp,
2050 /* unsync and write-flooding only apply to indirect SPs. */
2051 if (sp->role.direct)
2055 if (KVM_BUG_ON(!vcpu, kvm))
2059 * The page is good, but is stale. kvm_sync_page does
2060 * get the latest guest state, but (unlike mmu_unsync_children)
2061 * it doesn't write-protect the page or mark it synchronized!
2062 * This way the validity of the mapping is ensured, but the
2063 * overhead of write protection is not incurred until the
2064 * guest invalidates the TLB mapping. This allows multiple
2065 * SPs for a single gfn to be unsync.
2067 * If the sync fails, the page is zapped. If so, break
2068 * in order to rebuild it.
2070 ret = kvm_sync_page(vcpu, sp, &invalid_list);
2074 WARN_ON(!list_empty(&invalid_list));
2076 kvm_flush_remote_tlbs(kvm);
2079 __clear_sp_write_flooding_count(sp);
2085 ++kvm->stat.mmu_cache_miss;
2088 kvm_mmu_commit_zap_page(kvm, &invalid_list);
2090 if (collisions > kvm->stat.max_mmu_page_hash_collisions)
2091 kvm->stat.max_mmu_page_hash_collisions = collisions;
2095 /* Caches used when allocating a new shadow page. */
2096 struct shadow_page_caches {
2097 struct kvm_mmu_memory_cache *page_header_cache;
2098 struct kvm_mmu_memory_cache *shadow_page_cache;
2099 struct kvm_mmu_memory_cache *shadowed_info_cache;
2102 static struct kvm_mmu_page *kvm_mmu_alloc_shadow_page(struct kvm *kvm,
2103 struct shadow_page_caches *caches,
2105 struct hlist_head *sp_list,
2106 union kvm_mmu_page_role role)
2108 struct kvm_mmu_page *sp;
2110 sp = kvm_mmu_memory_cache_alloc(caches->page_header_cache);
2111 sp->spt = kvm_mmu_memory_cache_alloc(caches->shadow_page_cache);
2113 sp->shadowed_translation = kvm_mmu_memory_cache_alloc(caches->shadowed_info_cache);
2115 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
2118 * active_mmu_pages must be a FIFO list, as kvm_zap_obsolete_pages()
2119 * depends on valid pages being added to the head of the list. See
2120 * comments in kvm_zap_obsolete_pages().
2122 sp->mmu_valid_gen = kvm->arch.mmu_valid_gen;
2123 list_add(&sp->link, &kvm->arch.active_mmu_pages);
2124 kvm_mod_used_mmu_pages(kvm, +1);
2128 hlist_add_head(&sp->hash_link, sp_list);
2129 if (sp_has_gptes(sp))
2130 account_shadowed(kvm, sp);
2135 /* Note, @vcpu may be NULL if @role.direct is true; see kvm_mmu_find_shadow_page. */
2136 static struct kvm_mmu_page *__kvm_mmu_get_shadow_page(struct kvm *kvm,
2137 struct kvm_vcpu *vcpu,
2138 struct shadow_page_caches *caches,
2140 union kvm_mmu_page_role role)
2142 struct hlist_head *sp_list;
2143 struct kvm_mmu_page *sp;
2144 bool created = false;
2146 sp_list = &kvm->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)];
2148 sp = kvm_mmu_find_shadow_page(kvm, vcpu, gfn, sp_list, role);
2151 sp = kvm_mmu_alloc_shadow_page(kvm, caches, gfn, sp_list, role);
2154 trace_kvm_mmu_get_page(sp, created);
2158 static struct kvm_mmu_page *kvm_mmu_get_shadow_page(struct kvm_vcpu *vcpu,
2160 union kvm_mmu_page_role role)
2162 struct shadow_page_caches caches = {
2163 .page_header_cache = &vcpu->arch.mmu_page_header_cache,
2164 .shadow_page_cache = &vcpu->arch.mmu_shadow_page_cache,
2165 .shadowed_info_cache = &vcpu->arch.mmu_shadowed_info_cache,
2168 return __kvm_mmu_get_shadow_page(vcpu->kvm, vcpu, &caches, gfn, role);
2171 static union kvm_mmu_page_role kvm_mmu_child_role(u64 *sptep, bool direct,
2172 unsigned int access)
2174 struct kvm_mmu_page *parent_sp = sptep_to_sp(sptep);
2175 union kvm_mmu_page_role role;
2177 role = parent_sp->role;
2179 role.access = access;
2180 role.direct = direct;
2181 role.passthrough = 0;
2184 * If the guest has 4-byte PTEs then that means it's using 32-bit,
2185 * 2-level, non-PAE paging. KVM shadows such guests with PAE paging
2186 * (i.e. 8-byte PTEs). The difference in PTE size means that KVM must
2187 * shadow each guest page table with multiple shadow page tables, which
2188 * requires extra bookkeeping in the role.
2190 * Specifically, to shadow the guest's page directory (which covers a
2191 * 4GiB address space), KVM uses 4 PAE page directories, each mapping
2192 * 1GiB of the address space. @role.quadrant encodes which quarter of
2193 * the address space each maps.
2195 * To shadow the guest's page tables (which each map a 4MiB region), KVM
2196 * uses 2 PAE page tables, each mapping a 2MiB region. For these,
2197 * @role.quadrant encodes which half of the region they map.
2199 * Concretely, a 4-byte PDE consumes bits 31:22, while an 8-byte PDE
2200 * consumes bits 29:21. To consume bits 31:30, KVM's uses 4 shadow
2201 * PDPTEs; those 4 PAE page directories are pre-allocated and their
2202 * quadrant is assigned in mmu_alloc_root(). A 4-byte PTE consumes
2203 * bits 21:12, while an 8-byte PTE consumes bits 20:12. To consume
2204 * bit 21 in the PTE (the child here), KVM propagates that bit to the
2205 * quadrant, i.e. sets quadrant to '0' or '1'. The parent 8-byte PDE
2206 * covers bit 21 (see above), thus the quadrant is calculated from the
2207 * _least_ significant bit of the PDE index.
2209 if (role.has_4_byte_gpte) {
2210 WARN_ON_ONCE(role.level != PG_LEVEL_4K);
2211 role.quadrant = spte_index(sptep) & 1;
2217 static struct kvm_mmu_page *kvm_mmu_get_child_sp(struct kvm_vcpu *vcpu,
2218 u64 *sptep, gfn_t gfn,
2219 bool direct, unsigned int access)
2221 union kvm_mmu_page_role role;
2223 if (is_shadow_present_pte(*sptep) && !is_large_pte(*sptep))
2224 return ERR_PTR(-EEXIST);
2226 role = kvm_mmu_child_role(sptep, direct, access);
2227 return kvm_mmu_get_shadow_page(vcpu, gfn, role);
2230 static void shadow_walk_init_using_root(struct kvm_shadow_walk_iterator *iterator,
2231 struct kvm_vcpu *vcpu, hpa_t root,
2234 iterator->addr = addr;
2235 iterator->shadow_addr = root;
2236 iterator->level = vcpu->arch.mmu->root_role.level;
2238 if (iterator->level >= PT64_ROOT_4LEVEL &&
2239 vcpu->arch.mmu->cpu_role.base.level < PT64_ROOT_4LEVEL &&
2240 !vcpu->arch.mmu->root_role.direct)
2241 iterator->level = PT32E_ROOT_LEVEL;
2243 if (iterator->level == PT32E_ROOT_LEVEL) {
2245 * prev_root is currently only used for 64-bit hosts. So only
2246 * the active root_hpa is valid here.
2248 BUG_ON(root != vcpu->arch.mmu->root.hpa);
2250 iterator->shadow_addr
2251 = vcpu->arch.mmu->pae_root[(addr >> 30) & 3];
2252 iterator->shadow_addr &= SPTE_BASE_ADDR_MASK;
2254 if (!iterator->shadow_addr)
2255 iterator->level = 0;
2259 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
2260 struct kvm_vcpu *vcpu, u64 addr)
2262 shadow_walk_init_using_root(iterator, vcpu, vcpu->arch.mmu->root.hpa,
2266 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
2268 if (iterator->level < PG_LEVEL_4K)
2271 iterator->index = SPTE_INDEX(iterator->addr, iterator->level);
2272 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
2276 static void __shadow_walk_next(struct kvm_shadow_walk_iterator *iterator,
2279 if (!is_shadow_present_pte(spte) || is_last_spte(spte, iterator->level)) {
2280 iterator->level = 0;
2284 iterator->shadow_addr = spte & SPTE_BASE_ADDR_MASK;
2288 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
2290 __shadow_walk_next(iterator, *iterator->sptep);
2293 static void __link_shadow_page(struct kvm *kvm,
2294 struct kvm_mmu_memory_cache *cache, u64 *sptep,
2295 struct kvm_mmu_page *sp, bool flush)
2299 BUILD_BUG_ON(VMX_EPT_WRITABLE_MASK != PT_WRITABLE_MASK);
2302 * If an SPTE is present already, it must be a leaf and therefore
2303 * a large one. Drop it, and flush the TLB if needed, before
2306 if (is_shadow_present_pte(*sptep))
2307 drop_large_spte(kvm, sptep, flush);
2309 spte = make_nonleaf_spte(sp->spt, sp_ad_disabled(sp));
2311 mmu_spte_set(sptep, spte);
2313 mmu_page_add_parent_pte(cache, sp, sptep);
2315 if (sp->unsync_children || sp->unsync)
2319 static void link_shadow_page(struct kvm_vcpu *vcpu, u64 *sptep,
2320 struct kvm_mmu_page *sp)
2322 __link_shadow_page(vcpu->kvm, &vcpu->arch.mmu_pte_list_desc_cache, sptep, sp, true);
2325 static void validate_direct_spte(struct kvm_vcpu *vcpu, u64 *sptep,
2326 unsigned direct_access)
2328 if (is_shadow_present_pte(*sptep) && !is_large_pte(*sptep)) {
2329 struct kvm_mmu_page *child;
2332 * For the direct sp, if the guest pte's dirty bit
2333 * changed form clean to dirty, it will corrupt the
2334 * sp's access: allow writable in the read-only sp,
2335 * so we should update the spte at this point to get
2336 * a new sp with the correct access.
2338 child = to_shadow_page(*sptep & SPTE_BASE_ADDR_MASK);
2339 if (child->role.access == direct_access)
2342 drop_parent_pte(child, sptep);
2343 kvm_flush_remote_tlbs_with_address(vcpu->kvm, child->gfn, 1);
2347 /* Returns the number of zapped non-leaf child shadow pages. */
2348 static int mmu_page_zap_pte(struct kvm *kvm, struct kvm_mmu_page *sp,
2349 u64 *spte, struct list_head *invalid_list)
2352 struct kvm_mmu_page *child;
2355 if (is_shadow_present_pte(pte)) {
2356 if (is_last_spte(pte, sp->role.level)) {
2357 drop_spte(kvm, spte);
2359 child = to_shadow_page(pte & SPTE_BASE_ADDR_MASK);
2360 drop_parent_pte(child, spte);
2363 * Recursively zap nested TDP SPs, parentless SPs are
2364 * unlikely to be used again in the near future. This
2365 * avoids retaining a large number of stale nested SPs.
2367 if (tdp_enabled && invalid_list &&
2368 child->role.guest_mode && !child->parent_ptes.val)
2369 return kvm_mmu_prepare_zap_page(kvm, child,
2372 } else if (is_mmio_spte(pte)) {
2373 mmu_spte_clear_no_track(spte);
2378 static int kvm_mmu_page_unlink_children(struct kvm *kvm,
2379 struct kvm_mmu_page *sp,
2380 struct list_head *invalid_list)
2385 for (i = 0; i < SPTE_ENT_PER_PAGE; ++i)
2386 zapped += mmu_page_zap_pte(kvm, sp, sp->spt + i, invalid_list);
2391 static void kvm_mmu_unlink_parents(struct kvm_mmu_page *sp)
2394 struct rmap_iterator iter;
2396 while ((sptep = rmap_get_first(&sp->parent_ptes, &iter)))
2397 drop_parent_pte(sp, sptep);
2400 static int mmu_zap_unsync_children(struct kvm *kvm,
2401 struct kvm_mmu_page *parent,
2402 struct list_head *invalid_list)
2405 struct mmu_page_path parents;
2406 struct kvm_mmu_pages pages;
2408 if (parent->role.level == PG_LEVEL_4K)
2411 while (mmu_unsync_walk(parent, &pages)) {
2412 struct kvm_mmu_page *sp;
2414 for_each_sp(pages, sp, parents, i) {
2415 kvm_mmu_prepare_zap_page(kvm, sp, invalid_list);
2416 mmu_pages_clear_parents(&parents);
2424 static bool __kvm_mmu_prepare_zap_page(struct kvm *kvm,
2425 struct kvm_mmu_page *sp,
2426 struct list_head *invalid_list,
2429 bool list_unstable, zapped_root = false;
2431 trace_kvm_mmu_prepare_zap_page(sp);
2432 ++kvm->stat.mmu_shadow_zapped;
2433 *nr_zapped = mmu_zap_unsync_children(kvm, sp, invalid_list);
2434 *nr_zapped += kvm_mmu_page_unlink_children(kvm, sp, invalid_list);
2435 kvm_mmu_unlink_parents(sp);
2437 /* Zapping children means active_mmu_pages has become unstable. */
2438 list_unstable = *nr_zapped;
2440 if (!sp->role.invalid && sp_has_gptes(sp))
2441 unaccount_shadowed(kvm, sp);
2444 kvm_unlink_unsync_page(kvm, sp);
2445 if (!sp->root_count) {
2450 * Already invalid pages (previously active roots) are not on
2451 * the active page list. See list_del() in the "else" case of
2454 if (sp->role.invalid)
2455 list_add(&sp->link, invalid_list);
2457 list_move(&sp->link, invalid_list);
2458 kvm_mod_used_mmu_pages(kvm, -1);
2461 * Remove the active root from the active page list, the root
2462 * will be explicitly freed when the root_count hits zero.
2464 list_del(&sp->link);
2467 * Obsolete pages cannot be used on any vCPUs, see the comment
2468 * in kvm_mmu_zap_all_fast(). Note, is_obsolete_sp() also
2469 * treats invalid shadow pages as being obsolete.
2471 zapped_root = !is_obsolete_sp(kvm, sp);
2474 if (sp->lpage_disallowed)
2475 unaccount_huge_nx_page(kvm, sp);
2477 sp->role.invalid = 1;
2480 * Make the request to free obsolete roots after marking the root
2481 * invalid, otherwise other vCPUs may not see it as invalid.
2484 kvm_make_all_cpus_request(kvm, KVM_REQ_MMU_FREE_OBSOLETE_ROOTS);
2485 return list_unstable;
2488 static bool kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
2489 struct list_head *invalid_list)
2493 __kvm_mmu_prepare_zap_page(kvm, sp, invalid_list, &nr_zapped);
2497 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
2498 struct list_head *invalid_list)
2500 struct kvm_mmu_page *sp, *nsp;
2502 if (list_empty(invalid_list))
2506 * We need to make sure everyone sees our modifications to
2507 * the page tables and see changes to vcpu->mode here. The barrier
2508 * in the kvm_flush_remote_tlbs() achieves this. This pairs
2509 * with vcpu_enter_guest and walk_shadow_page_lockless_begin/end.
2511 * In addition, kvm_flush_remote_tlbs waits for all vcpus to exit
2512 * guest mode and/or lockless shadow page table walks.
2514 kvm_flush_remote_tlbs(kvm);
2516 list_for_each_entry_safe(sp, nsp, invalid_list, link) {
2517 WARN_ON(!sp->role.invalid || sp->root_count);
2518 kvm_mmu_free_shadow_page(sp);
2522 static unsigned long kvm_mmu_zap_oldest_mmu_pages(struct kvm *kvm,
2523 unsigned long nr_to_zap)
2525 unsigned long total_zapped = 0;
2526 struct kvm_mmu_page *sp, *tmp;
2527 LIST_HEAD(invalid_list);
2531 if (list_empty(&kvm->arch.active_mmu_pages))
2535 list_for_each_entry_safe_reverse(sp, tmp, &kvm->arch.active_mmu_pages, link) {
2537 * Don't zap active root pages, the page itself can't be freed
2538 * and zapping it will just force vCPUs to realloc and reload.
2543 unstable = __kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list,
2545 total_zapped += nr_zapped;
2546 if (total_zapped >= nr_to_zap)
2553 kvm_mmu_commit_zap_page(kvm, &invalid_list);
2555 kvm->stat.mmu_recycled += total_zapped;
2556 return total_zapped;
2559 static inline unsigned long kvm_mmu_available_pages(struct kvm *kvm)
2561 if (kvm->arch.n_max_mmu_pages > kvm->arch.n_used_mmu_pages)
2562 return kvm->arch.n_max_mmu_pages -
2563 kvm->arch.n_used_mmu_pages;
2568 static int make_mmu_pages_available(struct kvm_vcpu *vcpu)
2570 unsigned long avail = kvm_mmu_available_pages(vcpu->kvm);
2572 if (likely(avail >= KVM_MIN_FREE_MMU_PAGES))
2575 kvm_mmu_zap_oldest_mmu_pages(vcpu->kvm, KVM_REFILL_PAGES - avail);
2578 * Note, this check is intentionally soft, it only guarantees that one
2579 * page is available, while the caller may end up allocating as many as
2580 * four pages, e.g. for PAE roots or for 5-level paging. Temporarily
2581 * exceeding the (arbitrary by default) limit will not harm the host,
2582 * being too aggressive may unnecessarily kill the guest, and getting an
2583 * exact count is far more trouble than it's worth, especially in the
2586 if (!kvm_mmu_available_pages(vcpu->kvm))
2592 * Changing the number of mmu pages allocated to the vm
2593 * Note: if goal_nr_mmu_pages is too small, you will get dead lock
2595 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned long goal_nr_mmu_pages)
2597 write_lock(&kvm->mmu_lock);
2599 if (kvm->arch.n_used_mmu_pages > goal_nr_mmu_pages) {
2600 kvm_mmu_zap_oldest_mmu_pages(kvm, kvm->arch.n_used_mmu_pages -
2603 goal_nr_mmu_pages = kvm->arch.n_used_mmu_pages;
2606 kvm->arch.n_max_mmu_pages = goal_nr_mmu_pages;
2608 write_unlock(&kvm->mmu_lock);
2611 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
2613 struct kvm_mmu_page *sp;
2614 LIST_HEAD(invalid_list);
2617 pgprintk("%s: looking for gfn %llx\n", __func__, gfn);
2619 write_lock(&kvm->mmu_lock);
2620 for_each_gfn_valid_sp_with_gptes(kvm, sp, gfn) {
2621 pgprintk("%s: gfn %llx role %x\n", __func__, gfn,
2624 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
2626 kvm_mmu_commit_zap_page(kvm, &invalid_list);
2627 write_unlock(&kvm->mmu_lock);
2632 static int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2637 if (vcpu->arch.mmu->root_role.direct)
2640 gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
2642 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2647 static void kvm_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
2649 trace_kvm_mmu_unsync_page(sp);
2650 ++kvm->stat.mmu_unsync;
2653 kvm_mmu_mark_parents_unsync(sp);
2657 * Attempt to unsync any shadow pages that can be reached by the specified gfn,
2658 * KVM is creating a writable mapping for said gfn. Returns 0 if all pages
2659 * were marked unsync (or if there is no shadow page), -EPERM if the SPTE must
2660 * be write-protected.
2662 int mmu_try_to_unsync_pages(struct kvm *kvm, const struct kvm_memory_slot *slot,
2663 gfn_t gfn, bool can_unsync, bool prefetch)
2665 struct kvm_mmu_page *sp;
2666 bool locked = false;
2669 * Force write-protection if the page is being tracked. Note, the page
2670 * track machinery is used to write-protect upper-level shadow pages,
2671 * i.e. this guards the role.level == 4K assertion below!
2673 if (kvm_slot_page_track_is_active(kvm, slot, gfn, KVM_PAGE_TRACK_WRITE))
2677 * The page is not write-tracked, mark existing shadow pages unsync
2678 * unless KVM is synchronizing an unsync SP (can_unsync = false). In
2679 * that case, KVM must complete emulation of the guest TLB flush before
2680 * allowing shadow pages to become unsync (writable by the guest).
2682 for_each_gfn_valid_sp_with_gptes(kvm, sp, gfn) {
2693 * TDP MMU page faults require an additional spinlock as they
2694 * run with mmu_lock held for read, not write, and the unsync
2695 * logic is not thread safe. Take the spinklock regardless of
2696 * the MMU type to avoid extra conditionals/parameters, there's
2697 * no meaningful penalty if mmu_lock is held for write.
2701 spin_lock(&kvm->arch.mmu_unsync_pages_lock);
2704 * Recheck after taking the spinlock, a different vCPU
2705 * may have since marked the page unsync. A false
2706 * positive on the unprotected check above is not
2707 * possible as clearing sp->unsync _must_ hold mmu_lock
2708 * for write, i.e. unsync cannot transition from 0->1
2709 * while this CPU holds mmu_lock for read (or write).
2711 if (READ_ONCE(sp->unsync))
2715 WARN_ON(sp->role.level != PG_LEVEL_4K);
2716 kvm_unsync_page(kvm, sp);
2719 spin_unlock(&kvm->arch.mmu_unsync_pages_lock);
2722 * We need to ensure that the marking of unsync pages is visible
2723 * before the SPTE is updated to allow writes because
2724 * kvm_mmu_sync_roots() checks the unsync flags without holding
2725 * the MMU lock and so can race with this. If the SPTE was updated
2726 * before the page had been marked as unsync-ed, something like the
2727 * following could happen:
2730 * ---------------------------------------------------------------------
2731 * 1.2 Host updates SPTE
2733 * 2.1 Guest writes a GPTE for GVA X.
2734 * (GPTE being in the guest page table shadowed
2735 * by the SP from CPU 1.)
2736 * This reads SPTE during the page table walk.
2737 * Since SPTE.W is read as 1, there is no
2740 * 2.2 Guest issues TLB flush.
2741 * That causes a VM Exit.
2743 * 2.3 Walking of unsync pages sees sp->unsync is
2744 * false and skips the page.
2746 * 2.4 Guest accesses GVA X.
2747 * Since the mapping in the SP was not updated,
2748 * so the old mapping for GVA X incorrectly
2752 * (sp->unsync = true)
2754 * The write barrier below ensures that 1.1 happens before 1.2 and thus
2755 * the situation in 2.4 does not arise. It pairs with the read barrier
2756 * in is_unsync_root(), placed between 2.1's load of SPTE.W and 2.3.
2763 static int mmu_set_spte(struct kvm_vcpu *vcpu, struct kvm_memory_slot *slot,
2764 u64 *sptep, unsigned int pte_access, gfn_t gfn,
2765 kvm_pfn_t pfn, struct kvm_page_fault *fault)
2767 struct kvm_mmu_page *sp = sptep_to_sp(sptep);
2768 int level = sp->role.level;
2769 int was_rmapped = 0;
2770 int ret = RET_PF_FIXED;
2775 /* Prefetching always gets a writable pfn. */
2776 bool host_writable = !fault || fault->map_writable;
2777 bool prefetch = !fault || fault->prefetch;
2778 bool write_fault = fault && fault->write;
2780 pgprintk("%s: spte %llx write_fault %d gfn %llx\n", __func__,
2781 *sptep, write_fault, gfn);
2783 if (unlikely(is_noslot_pfn(pfn))) {
2784 vcpu->stat.pf_mmio_spte_created++;
2785 mark_mmio_spte(vcpu, sptep, gfn, pte_access);
2786 return RET_PF_EMULATE;
2789 if (is_shadow_present_pte(*sptep)) {
2791 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
2792 * the parent of the now unreachable PTE.
2794 if (level > PG_LEVEL_4K && !is_large_pte(*sptep)) {
2795 struct kvm_mmu_page *child;
2798 child = to_shadow_page(pte & SPTE_BASE_ADDR_MASK);
2799 drop_parent_pte(child, sptep);
2801 } else if (pfn != spte_to_pfn(*sptep)) {
2802 pgprintk("hfn old %llx new %llx\n",
2803 spte_to_pfn(*sptep), pfn);
2804 drop_spte(vcpu->kvm, sptep);
2810 wrprot = make_spte(vcpu, sp, slot, pte_access, gfn, pfn, *sptep, prefetch,
2811 true, host_writable, &spte);
2813 if (*sptep == spte) {
2814 ret = RET_PF_SPURIOUS;
2816 flush |= mmu_spte_update(sptep, spte);
2817 trace_kvm_mmu_set_spte(level, gfn, sptep);
2822 ret = RET_PF_EMULATE;
2826 kvm_flush_remote_tlbs_with_address(vcpu->kvm, gfn,
2827 KVM_PAGES_PER_HPAGE(level));
2829 pgprintk("%s: setting spte %llx\n", __func__, *sptep);
2832 WARN_ON_ONCE(ret == RET_PF_SPURIOUS);
2833 rmap_add(vcpu, slot, sptep, gfn, pte_access);
2835 /* Already rmapped but the pte_access bits may have changed. */
2836 kvm_mmu_page_set_access(sp, spte_index(sptep), pte_access);
2842 static int direct_pte_prefetch_many(struct kvm_vcpu *vcpu,
2843 struct kvm_mmu_page *sp,
2844 u64 *start, u64 *end)
2846 struct page *pages[PTE_PREFETCH_NUM];
2847 struct kvm_memory_slot *slot;
2848 unsigned int access = sp->role.access;
2852 gfn = kvm_mmu_page_get_gfn(sp, spte_index(start));
2853 slot = gfn_to_memslot_dirty_bitmap(vcpu, gfn, access & ACC_WRITE_MASK);
2857 ret = gfn_to_page_many_atomic(slot, gfn, pages, end - start);
2861 for (i = 0; i < ret; i++, gfn++, start++) {
2862 mmu_set_spte(vcpu, slot, start, access, gfn,
2863 page_to_pfn(pages[i]), NULL);
2870 static void __direct_pte_prefetch(struct kvm_vcpu *vcpu,
2871 struct kvm_mmu_page *sp, u64 *sptep)
2873 u64 *spte, *start = NULL;
2876 WARN_ON(!sp->role.direct);
2878 i = spte_index(sptep) & ~(PTE_PREFETCH_NUM - 1);
2881 for (i = 0; i < PTE_PREFETCH_NUM; i++, spte++) {
2882 if (is_shadow_present_pte(*spte) || spte == sptep) {
2885 if (direct_pte_prefetch_many(vcpu, sp, start, spte) < 0)
2892 direct_pte_prefetch_many(vcpu, sp, start, spte);
2895 static void direct_pte_prefetch(struct kvm_vcpu *vcpu, u64 *sptep)
2897 struct kvm_mmu_page *sp;
2899 sp = sptep_to_sp(sptep);
2902 * Without accessed bits, there's no way to distinguish between
2903 * actually accessed translations and prefetched, so disable pte
2904 * prefetch if accessed bits aren't available.
2906 if (sp_ad_disabled(sp))
2909 if (sp->role.level > PG_LEVEL_4K)
2913 * If addresses are being invalidated, skip prefetching to avoid
2914 * accidentally prefetching those addresses.
2916 if (unlikely(vcpu->kvm->mmu_notifier_count))
2919 __direct_pte_prefetch(vcpu, sp, sptep);
2922 static int host_pfn_mapping_level(struct kvm *kvm, gfn_t gfn, kvm_pfn_t pfn,
2923 const struct kvm_memory_slot *slot)
2925 int level = PG_LEVEL_4K;
2928 unsigned long flags;
2935 * Note, @slot must be non-NULL, i.e. the caller is responsible for
2936 * ensuring @pfn isn't garbage and is backed by a memslot.
2938 page = kvm_pfn_to_refcounted_page(pfn);
2942 if (!PageCompound(page) && !kvm_is_zone_device_page(page))
2946 * Note, using the already-retrieved memslot and __gfn_to_hva_memslot()
2947 * is not solely for performance, it's also necessary to avoid the
2948 * "writable" check in __gfn_to_hva_many(), which will always fail on
2949 * read-only memslots due to gfn_to_hva() assuming writes. Earlier
2950 * page fault steps have already verified the guest isn't writing a
2951 * read-only memslot.
2953 hva = __gfn_to_hva_memslot(slot, gfn);
2956 * Lookup the mapping level in the current mm. The information
2957 * may become stale soon, but it is safe to use as long as
2958 * 1) mmu_notifier_retry was checked after taking mmu_lock, and
2959 * 2) mmu_lock is taken now.
2961 * We still need to disable IRQs to prevent concurrent tear down
2964 local_irq_save(flags);
2966 pgd = READ_ONCE(*pgd_offset(kvm->mm, hva));
2970 p4d = READ_ONCE(*p4d_offset(&pgd, hva));
2971 if (p4d_none(p4d) || !p4d_present(p4d))
2974 pud = READ_ONCE(*pud_offset(&p4d, hva));
2975 if (pud_none(pud) || !pud_present(pud))
2978 if (pud_large(pud)) {
2979 level = PG_LEVEL_1G;
2983 pmd = READ_ONCE(*pmd_offset(&pud, hva));
2984 if (pmd_none(pmd) || !pmd_present(pmd))
2988 level = PG_LEVEL_2M;
2991 local_irq_restore(flags);
2995 int kvm_mmu_max_mapping_level(struct kvm *kvm,
2996 const struct kvm_memory_slot *slot, gfn_t gfn,
2997 kvm_pfn_t pfn, int max_level)
2999 struct kvm_lpage_info *linfo;
3002 max_level = min(max_level, max_huge_page_level);
3003 for ( ; max_level > PG_LEVEL_4K; max_level--) {
3004 linfo = lpage_info_slot(gfn, slot, max_level);
3005 if (!linfo->disallow_lpage)
3009 if (max_level == PG_LEVEL_4K)
3012 host_level = host_pfn_mapping_level(kvm, gfn, pfn, slot);
3013 return min(host_level, max_level);
3016 void kvm_mmu_hugepage_adjust(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault)
3018 struct kvm_memory_slot *slot = fault->slot;
3021 fault->huge_page_disallowed = fault->exec && fault->nx_huge_page_workaround_enabled;
3023 if (unlikely(fault->max_level == PG_LEVEL_4K))
3026 if (is_error_noslot_pfn(fault->pfn))
3029 if (kvm_slot_dirty_track_enabled(slot))
3033 * Enforce the iTLB multihit workaround after capturing the requested
3034 * level, which will be used to do precise, accurate accounting.
3036 fault->req_level = kvm_mmu_max_mapping_level(vcpu->kvm, slot,
3037 fault->gfn, fault->pfn,
3039 if (fault->req_level == PG_LEVEL_4K || fault->huge_page_disallowed)
3043 * mmu_notifier_retry() was successful and mmu_lock is held, so
3044 * the pmd can't be split from under us.
3046 fault->goal_level = fault->req_level;
3047 mask = KVM_PAGES_PER_HPAGE(fault->goal_level) - 1;
3048 VM_BUG_ON((fault->gfn & mask) != (fault->pfn & mask));
3049 fault->pfn &= ~mask;
3052 void disallowed_hugepage_adjust(struct kvm_page_fault *fault, u64 spte, int cur_level)
3054 if (cur_level > PG_LEVEL_4K &&
3055 cur_level == fault->goal_level &&
3056 is_shadow_present_pte(spte) &&
3057 !is_large_pte(spte)) {
3059 * A small SPTE exists for this pfn, but FNAME(fetch)
3060 * and __direct_map would like to create a large PTE
3061 * instead: just force them to go down another level,
3062 * patching back for them into pfn the next 9 bits of
3065 u64 page_mask = KVM_PAGES_PER_HPAGE(cur_level) -
3066 KVM_PAGES_PER_HPAGE(cur_level - 1);
3067 fault->pfn |= fault->gfn & page_mask;
3068 fault->goal_level--;
3072 static int __direct_map(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault)
3074 struct kvm_shadow_walk_iterator it;
3075 struct kvm_mmu_page *sp;
3077 gfn_t base_gfn = fault->gfn;
3079 kvm_mmu_hugepage_adjust(vcpu, fault);
3081 trace_kvm_mmu_spte_requested(fault);
3082 for_each_shadow_entry(vcpu, fault->addr, it) {
3084 * We cannot overwrite existing page tables with an NX
3085 * large page, as the leaf could be executable.
3087 if (fault->nx_huge_page_workaround_enabled)
3088 disallowed_hugepage_adjust(fault, *it.sptep, it.level);
3090 base_gfn = fault->gfn & ~(KVM_PAGES_PER_HPAGE(it.level) - 1);
3091 if (it.level == fault->goal_level)
3094 sp = kvm_mmu_get_child_sp(vcpu, it.sptep, base_gfn, true, ACC_ALL);
3095 if (sp == ERR_PTR(-EEXIST))
3098 link_shadow_page(vcpu, it.sptep, sp);
3099 if (fault->is_tdp && fault->huge_page_disallowed &&
3100 fault->req_level >= it.level)
3101 account_huge_nx_page(vcpu->kvm, sp);
3104 if (WARN_ON_ONCE(it.level != fault->goal_level))
3107 ret = mmu_set_spte(vcpu, fault->slot, it.sptep, ACC_ALL,
3108 base_gfn, fault->pfn, fault);
3109 if (ret == RET_PF_SPURIOUS)
3112 direct_pte_prefetch(vcpu, it.sptep);
3116 static void kvm_send_hwpoison_signal(unsigned long address, struct task_struct *tsk)
3118 send_sig_mceerr(BUS_MCEERR_AR, (void __user *)address, PAGE_SHIFT, tsk);
3121 static int kvm_handle_bad_page(struct kvm_vcpu *vcpu, gfn_t gfn, kvm_pfn_t pfn)
3124 * Do not cache the mmio info caused by writing the readonly gfn
3125 * into the spte otherwise read access on readonly gfn also can
3126 * caused mmio page fault and treat it as mmio access.
3128 if (pfn == KVM_PFN_ERR_RO_FAULT)
3129 return RET_PF_EMULATE;
3131 if (pfn == KVM_PFN_ERR_HWPOISON) {
3132 kvm_send_hwpoison_signal(kvm_vcpu_gfn_to_hva(vcpu, gfn), current);
3133 return RET_PF_RETRY;
3139 static int handle_abnormal_pfn(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault,
3140 unsigned int access)
3142 /* The pfn is invalid, report the error! */
3143 if (unlikely(is_error_pfn(fault->pfn)))
3144 return kvm_handle_bad_page(vcpu, fault->gfn, fault->pfn);
3146 if (unlikely(!fault->slot)) {
3147 gva_t gva = fault->is_tdp ? 0 : fault->addr;
3149 vcpu_cache_mmio_info(vcpu, gva, fault->gfn,
3150 access & shadow_mmio_access_mask);
3152 * If MMIO caching is disabled, emulate immediately without
3153 * touching the shadow page tables as attempting to install an
3154 * MMIO SPTE will just be an expensive nop. Do not cache MMIO
3155 * whose gfn is greater than host.MAXPHYADDR, any guest that
3156 * generates such gfns is running nested and is being tricked
3157 * by L0 userspace (you can observe gfn > L1.MAXPHYADDR if
3158 * and only if L1's MAXPHYADDR is inaccurate with respect to
3161 if (unlikely(!enable_mmio_caching) ||
3162 unlikely(fault->gfn > kvm_mmu_max_gfn()))
3163 return RET_PF_EMULATE;
3166 return RET_PF_CONTINUE;
3169 static bool page_fault_can_be_fast(struct kvm_page_fault *fault)
3172 * Page faults with reserved bits set, i.e. faults on MMIO SPTEs, only
3173 * reach the common page fault handler if the SPTE has an invalid MMIO
3174 * generation number. Refreshing the MMIO generation needs to go down
3175 * the slow path. Note, EPT Misconfigs do NOT set the PRESENT flag!
3181 * #PF can be fast if:
3183 * 1. The shadow page table entry is not present and A/D bits are
3184 * disabled _by KVM_, which could mean that the fault is potentially
3185 * caused by access tracking (if enabled). If A/D bits are enabled
3186 * by KVM, but disabled by L1 for L2, KVM is forced to disable A/D
3187 * bits for L2 and employ access tracking, but the fast page fault
3188 * mechanism only supports direct MMUs.
3189 * 2. The shadow page table entry is present, the access is a write,
3190 * and no reserved bits are set (MMIO SPTEs cannot be "fixed"), i.e.
3191 * the fault was caused by a write-protection violation. If the
3192 * SPTE is MMU-writable (determined later), the fault can be fixed
3193 * by setting the Writable bit, which can be done out of mmu_lock.
3195 if (!fault->present)
3196 return !kvm_ad_enabled();
3199 * Note, instruction fetches and writes are mutually exclusive, ignore
3202 return fault->write;
3206 * Returns true if the SPTE was fixed successfully. Otherwise,
3207 * someone else modified the SPTE from its original value.
3210 fast_pf_fix_direct_spte(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault,
3211 u64 *sptep, u64 old_spte, u64 new_spte)
3214 * Theoretically we could also set dirty bit (and flush TLB) here in
3215 * order to eliminate unnecessary PML logging. See comments in
3216 * set_spte. But fast_page_fault is very unlikely to happen with PML
3217 * enabled, so we do not do this. This might result in the same GPA
3218 * to be logged in PML buffer again when the write really happens, and
3219 * eventually to be called by mark_page_dirty twice. But it's also no
3220 * harm. This also avoids the TLB flush needed after setting dirty bit
3221 * so non-PML cases won't be impacted.
3223 * Compare with set_spte where instead shadow_dirty_mask is set.
3225 if (!try_cmpxchg64(sptep, &old_spte, new_spte))
3228 if (is_writable_pte(new_spte) && !is_writable_pte(old_spte))
3229 mark_page_dirty_in_slot(vcpu->kvm, fault->slot, fault->gfn);
3234 static bool is_access_allowed(struct kvm_page_fault *fault, u64 spte)
3237 return is_executable_pte(spte);
3240 return is_writable_pte(spte);
3242 /* Fault was on Read access */
3243 return spte & PT_PRESENT_MASK;
3247 * Returns the last level spte pointer of the shadow page walk for the given
3248 * gpa, and sets *spte to the spte value. This spte may be non-preset. If no
3249 * walk could be performed, returns NULL and *spte does not contain valid data.
3252 * - Must be called between walk_shadow_page_lockless_{begin,end}.
3253 * - The returned sptep must not be used after walk_shadow_page_lockless_end.
3255 static u64 *fast_pf_get_last_sptep(struct kvm_vcpu *vcpu, gpa_t gpa, u64 *spte)
3257 struct kvm_shadow_walk_iterator iterator;
3261 for_each_shadow_entry_lockless(vcpu, gpa, iterator, old_spte) {
3262 sptep = iterator.sptep;
3270 * Returns one of RET_PF_INVALID, RET_PF_FIXED or RET_PF_SPURIOUS.
3272 static int fast_page_fault(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault)
3274 struct kvm_mmu_page *sp;
3275 int ret = RET_PF_INVALID;
3278 uint retry_count = 0;
3280 if (!page_fault_can_be_fast(fault))
3283 walk_shadow_page_lockless_begin(vcpu);
3288 if (is_tdp_mmu(vcpu->arch.mmu))
3289 sptep = kvm_tdp_mmu_fast_pf_get_last_sptep(vcpu, fault->addr, &spte);
3291 sptep = fast_pf_get_last_sptep(vcpu, fault->addr, &spte);
3293 if (!is_shadow_present_pte(spte))
3296 sp = sptep_to_sp(sptep);
3297 if (!is_last_spte(spte, sp->role.level))
3301 * Check whether the memory access that caused the fault would
3302 * still cause it if it were to be performed right now. If not,
3303 * then this is a spurious fault caused by TLB lazily flushed,
3304 * or some other CPU has already fixed the PTE after the
3305 * current CPU took the fault.
3307 * Need not check the access of upper level table entries since
3308 * they are always ACC_ALL.
3310 if (is_access_allowed(fault, spte)) {
3311 ret = RET_PF_SPURIOUS;
3318 * KVM only supports fixing page faults outside of MMU lock for
3319 * direct MMUs, nested MMUs are always indirect, and KVM always
3320 * uses A/D bits for non-nested MMUs. Thus, if A/D bits are
3321 * enabled, the SPTE can't be an access-tracked SPTE.
3323 if (unlikely(!kvm_ad_enabled()) && is_access_track_spte(spte))
3324 new_spte = restore_acc_track_spte(new_spte);
3327 * To keep things simple, only SPTEs that are MMU-writable can
3328 * be made fully writable outside of mmu_lock, e.g. only SPTEs
3329 * that were write-protected for dirty-logging or access
3330 * tracking are handled here. Don't bother checking if the
3331 * SPTE is writable to prioritize running with A/D bits enabled.
3332 * The is_access_allowed() check above handles the common case
3333 * of the fault being spurious, and the SPTE is known to be
3334 * shadow-present, i.e. except for access tracking restoration
3335 * making the new SPTE writable, the check is wasteful.
3337 if (fault->write && is_mmu_writable_spte(spte)) {
3338 new_spte |= PT_WRITABLE_MASK;
3341 * Do not fix write-permission on the large spte when
3342 * dirty logging is enabled. Since we only dirty the
3343 * first page into the dirty-bitmap in
3344 * fast_pf_fix_direct_spte(), other pages are missed
3345 * if its slot has dirty logging enabled.
3347 * Instead, we let the slow page fault path create a
3348 * normal spte to fix the access.
3350 if (sp->role.level > PG_LEVEL_4K &&
3351 kvm_slot_dirty_track_enabled(fault->slot))
3355 /* Verify that the fault can be handled in the fast path */
3356 if (new_spte == spte ||
3357 !is_access_allowed(fault, new_spte))
3361 * Currently, fast page fault only works for direct mapping
3362 * since the gfn is not stable for indirect shadow page. See
3363 * Documentation/virt/kvm/locking.rst to get more detail.
3365 if (fast_pf_fix_direct_spte(vcpu, fault, sptep, spte, new_spte)) {
3370 if (++retry_count > 4) {
3371 printk_once(KERN_WARNING
3372 "kvm: Fast #PF retrying more than 4 times.\n");
3378 trace_fast_page_fault(vcpu, fault, sptep, spte, ret);
3379 walk_shadow_page_lockless_end(vcpu);
3381 if (ret != RET_PF_INVALID)
3382 vcpu->stat.pf_fast++;
3387 static void mmu_free_root_page(struct kvm *kvm, hpa_t *root_hpa,
3388 struct list_head *invalid_list)
3390 struct kvm_mmu_page *sp;
3392 if (!VALID_PAGE(*root_hpa))
3395 sp = to_shadow_page(*root_hpa & SPTE_BASE_ADDR_MASK);
3399 if (is_tdp_mmu_page(sp))
3400 kvm_tdp_mmu_put_root(kvm, sp, false);
3401 else if (!--sp->root_count && sp->role.invalid)
3402 kvm_mmu_prepare_zap_page(kvm, sp, invalid_list);
3404 *root_hpa = INVALID_PAGE;
3407 /* roots_to_free must be some combination of the KVM_MMU_ROOT_* flags */
3408 void kvm_mmu_free_roots(struct kvm *kvm, struct kvm_mmu *mmu,
3409 ulong roots_to_free)
3412 LIST_HEAD(invalid_list);
3413 bool free_active_root;
3415 BUILD_BUG_ON(KVM_MMU_NUM_PREV_ROOTS >= BITS_PER_LONG);
3417 /* Before acquiring the MMU lock, see if we need to do any real work. */
3418 free_active_root = (roots_to_free & KVM_MMU_ROOT_CURRENT)
3419 && VALID_PAGE(mmu->root.hpa);
3421 if (!free_active_root) {
3422 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
3423 if ((roots_to_free & KVM_MMU_ROOT_PREVIOUS(i)) &&
3424 VALID_PAGE(mmu->prev_roots[i].hpa))
3427 if (i == KVM_MMU_NUM_PREV_ROOTS)
3431 write_lock(&kvm->mmu_lock);
3433 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
3434 if (roots_to_free & KVM_MMU_ROOT_PREVIOUS(i))
3435 mmu_free_root_page(kvm, &mmu->prev_roots[i].hpa,
3438 if (free_active_root) {
3439 if (to_shadow_page(mmu->root.hpa)) {
3440 mmu_free_root_page(kvm, &mmu->root.hpa, &invalid_list);
3441 } else if (mmu->pae_root) {
3442 for (i = 0; i < 4; ++i) {
3443 if (!IS_VALID_PAE_ROOT(mmu->pae_root[i]))
3446 mmu_free_root_page(kvm, &mmu->pae_root[i],
3448 mmu->pae_root[i] = INVALID_PAE_ROOT;
3451 mmu->root.hpa = INVALID_PAGE;
3455 kvm_mmu_commit_zap_page(kvm, &invalid_list);
3456 write_unlock(&kvm->mmu_lock);
3458 EXPORT_SYMBOL_GPL(kvm_mmu_free_roots);
3460 void kvm_mmu_free_guest_mode_roots(struct kvm *kvm, struct kvm_mmu *mmu)
3462 unsigned long roots_to_free = 0;
3467 * This should not be called while L2 is active, L2 can't invalidate
3468 * _only_ its own roots, e.g. INVVPID unconditionally exits.
3470 WARN_ON_ONCE(mmu->root_role.guest_mode);
3472 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) {
3473 root_hpa = mmu->prev_roots[i].hpa;
3474 if (!VALID_PAGE(root_hpa))
3477 if (!to_shadow_page(root_hpa) ||
3478 to_shadow_page(root_hpa)->role.guest_mode)
3479 roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
3482 kvm_mmu_free_roots(kvm, mmu, roots_to_free);
3484 EXPORT_SYMBOL_GPL(kvm_mmu_free_guest_mode_roots);
3487 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
3491 if (!kvm_vcpu_is_visible_gfn(vcpu, root_gfn)) {
3492 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3499 static hpa_t mmu_alloc_root(struct kvm_vcpu *vcpu, gfn_t gfn, int quadrant,
3502 union kvm_mmu_page_role role = vcpu->arch.mmu->root_role;
3503 struct kvm_mmu_page *sp;
3506 role.quadrant = quadrant;
3508 WARN_ON_ONCE(quadrant && !role.has_4_byte_gpte);
3509 WARN_ON_ONCE(role.direct && role.has_4_byte_gpte);
3511 sp = kvm_mmu_get_shadow_page(vcpu, gfn, role);
3514 return __pa(sp->spt);
3517 static int mmu_alloc_direct_roots(struct kvm_vcpu *vcpu)
3519 struct kvm_mmu *mmu = vcpu->arch.mmu;
3520 u8 shadow_root_level = mmu->root_role.level;
3525 write_lock(&vcpu->kvm->mmu_lock);
3526 r = make_mmu_pages_available(vcpu);
3530 if (is_tdp_mmu_enabled(vcpu->kvm)) {
3531 root = kvm_tdp_mmu_get_vcpu_root_hpa(vcpu);
3532 mmu->root.hpa = root;
3533 } else if (shadow_root_level >= PT64_ROOT_4LEVEL) {
3534 root = mmu_alloc_root(vcpu, 0, 0, shadow_root_level);
3535 mmu->root.hpa = root;
3536 } else if (shadow_root_level == PT32E_ROOT_LEVEL) {
3537 if (WARN_ON_ONCE(!mmu->pae_root)) {
3542 for (i = 0; i < 4; ++i) {
3543 WARN_ON_ONCE(IS_VALID_PAE_ROOT(mmu->pae_root[i]));
3545 root = mmu_alloc_root(vcpu, i << (30 - PAGE_SHIFT), 0,
3547 mmu->pae_root[i] = root | PT_PRESENT_MASK |
3550 mmu->root.hpa = __pa(mmu->pae_root);
3552 WARN_ONCE(1, "Bad TDP root level = %d\n", shadow_root_level);
3557 /* root.pgd is ignored for direct MMUs. */
3560 write_unlock(&vcpu->kvm->mmu_lock);
3564 static int mmu_first_shadow_root_alloc(struct kvm *kvm)
3566 struct kvm_memslots *slots;
3567 struct kvm_memory_slot *slot;
3571 * Check if this is the first shadow root being allocated before
3574 if (kvm_shadow_root_allocated(kvm))
3577 mutex_lock(&kvm->slots_arch_lock);
3579 /* Recheck, under the lock, whether this is the first shadow root. */
3580 if (kvm_shadow_root_allocated(kvm))
3584 * Check if anything actually needs to be allocated, e.g. all metadata
3585 * will be allocated upfront if TDP is disabled.
3587 if (kvm_memslots_have_rmaps(kvm) &&
3588 kvm_page_track_write_tracking_enabled(kvm))
3591 for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
3592 slots = __kvm_memslots(kvm, i);
3593 kvm_for_each_memslot(slot, bkt, slots) {
3595 * Both of these functions are no-ops if the target is
3596 * already allocated, so unconditionally calling both
3597 * is safe. Intentionally do NOT free allocations on
3598 * failure to avoid having to track which allocations
3599 * were made now versus when the memslot was created.
3600 * The metadata is guaranteed to be freed when the slot
3601 * is freed, and will be kept/used if userspace retries
3602 * KVM_RUN instead of killing the VM.
3604 r = memslot_rmap_alloc(slot, slot->npages);
3607 r = kvm_page_track_write_tracking_alloc(slot);
3614 * Ensure that shadow_root_allocated becomes true strictly after
3615 * all the related pointers are set.
3618 smp_store_release(&kvm->arch.shadow_root_allocated, true);
3621 mutex_unlock(&kvm->slots_arch_lock);
3625 static int mmu_alloc_shadow_roots(struct kvm_vcpu *vcpu)
3627 struct kvm_mmu *mmu = vcpu->arch.mmu;
3628 u64 pdptrs[4], pm_mask;
3629 gfn_t root_gfn, root_pgd;
3633 root_pgd = mmu->get_guest_pgd(vcpu);
3634 root_gfn = root_pgd >> PAGE_SHIFT;
3636 if (mmu_check_root(vcpu, root_gfn))
3640 * On SVM, reading PDPTRs might access guest memory, which might fault
3641 * and thus might sleep. Grab the PDPTRs before acquiring mmu_lock.
3643 if (mmu->cpu_role.base.level == PT32E_ROOT_LEVEL) {
3644 for (i = 0; i < 4; ++i) {
3645 pdptrs[i] = mmu->get_pdptr(vcpu, i);
3646 if (!(pdptrs[i] & PT_PRESENT_MASK))
3649 if (mmu_check_root(vcpu, pdptrs[i] >> PAGE_SHIFT))
3654 r = mmu_first_shadow_root_alloc(vcpu->kvm);
3658 write_lock(&vcpu->kvm->mmu_lock);
3659 r = make_mmu_pages_available(vcpu);
3664 * Do we shadow a long mode page table? If so we need to
3665 * write-protect the guests page table root.
3667 if (mmu->cpu_role.base.level >= PT64_ROOT_4LEVEL) {
3668 root = mmu_alloc_root(vcpu, root_gfn, 0,
3669 mmu->root_role.level);
3670 mmu->root.hpa = root;
3674 if (WARN_ON_ONCE(!mmu->pae_root)) {
3680 * We shadow a 32 bit page table. This may be a legacy 2-level
3681 * or a PAE 3-level page table. In either case we need to be aware that
3682 * the shadow page table may be a PAE or a long mode page table.
3684 pm_mask = PT_PRESENT_MASK | shadow_me_value;
3685 if (mmu->root_role.level >= PT64_ROOT_4LEVEL) {
3686 pm_mask |= PT_ACCESSED_MASK | PT_WRITABLE_MASK | PT_USER_MASK;
3688 if (WARN_ON_ONCE(!mmu->pml4_root)) {
3692 mmu->pml4_root[0] = __pa(mmu->pae_root) | pm_mask;
3694 if (mmu->root_role.level == PT64_ROOT_5LEVEL) {
3695 if (WARN_ON_ONCE(!mmu->pml5_root)) {
3699 mmu->pml5_root[0] = __pa(mmu->pml4_root) | pm_mask;
3703 for (i = 0; i < 4; ++i) {
3704 WARN_ON_ONCE(IS_VALID_PAE_ROOT(mmu->pae_root[i]));
3706 if (mmu->cpu_role.base.level == PT32E_ROOT_LEVEL) {
3707 if (!(pdptrs[i] & PT_PRESENT_MASK)) {
3708 mmu->pae_root[i] = INVALID_PAE_ROOT;
3711 root_gfn = pdptrs[i] >> PAGE_SHIFT;
3715 * If shadowing 32-bit non-PAE page tables, each PAE page
3716 * directory maps one quarter of the guest's non-PAE page
3717 * directory. Othwerise each PAE page direct shadows one guest
3718 * PAE page directory so that quadrant should be 0.
3720 quadrant = (mmu->cpu_role.base.level == PT32_ROOT_LEVEL) ? i : 0;
3722 root = mmu_alloc_root(vcpu, root_gfn, quadrant, PT32_ROOT_LEVEL);
3723 mmu->pae_root[i] = root | pm_mask;
3726 if (mmu->root_role.level == PT64_ROOT_5LEVEL)
3727 mmu->root.hpa = __pa(mmu->pml5_root);
3728 else if (mmu->root_role.level == PT64_ROOT_4LEVEL)
3729 mmu->root.hpa = __pa(mmu->pml4_root);
3731 mmu->root.hpa = __pa(mmu->pae_root);
3734 mmu->root.pgd = root_pgd;
3736 write_unlock(&vcpu->kvm->mmu_lock);
3741 static int mmu_alloc_special_roots(struct kvm_vcpu *vcpu)
3743 struct kvm_mmu *mmu = vcpu->arch.mmu;
3744 bool need_pml5 = mmu->root_role.level > PT64_ROOT_4LEVEL;
3745 u64 *pml5_root = NULL;
3746 u64 *pml4_root = NULL;
3750 * When shadowing 32-bit or PAE NPT with 64-bit NPT, the PML4 and PDP
3751 * tables are allocated and initialized at root creation as there is no
3752 * equivalent level in the guest's NPT to shadow. Allocate the tables
3753 * on demand, as running a 32-bit L1 VMM on 64-bit KVM is very rare.
3755 if (mmu->root_role.direct ||
3756 mmu->cpu_role.base.level >= PT64_ROOT_4LEVEL ||
3757 mmu->root_role.level < PT64_ROOT_4LEVEL)
3761 * NPT, the only paging mode that uses this horror, uses a fixed number
3762 * of levels for the shadow page tables, e.g. all MMUs are 4-level or
3763 * all MMus are 5-level. Thus, this can safely require that pml5_root
3764 * is allocated if the other roots are valid and pml5 is needed, as any
3765 * prior MMU would also have required pml5.
3767 if (mmu->pae_root && mmu->pml4_root && (!need_pml5 || mmu->pml5_root))
3771 * The special roots should always be allocated in concert. Yell and
3772 * bail if KVM ends up in a state where only one of the roots is valid.
3774 if (WARN_ON_ONCE(!tdp_enabled || mmu->pae_root || mmu->pml4_root ||
3775 (need_pml5 && mmu->pml5_root)))
3779 * Unlike 32-bit NPT, the PDP table doesn't need to be in low mem, and
3780 * doesn't need to be decrypted.
3782 pae_root = (void *)get_zeroed_page(GFP_KERNEL_ACCOUNT);
3786 #ifdef CONFIG_X86_64
3787 pml4_root = (void *)get_zeroed_page(GFP_KERNEL_ACCOUNT);
3792 pml5_root = (void *)get_zeroed_page(GFP_KERNEL_ACCOUNT);
3798 mmu->pae_root = pae_root;
3799 mmu->pml4_root = pml4_root;
3800 mmu->pml5_root = pml5_root;
3804 #ifdef CONFIG_X86_64
3806 free_page((unsigned long)pml4_root);
3808 free_page((unsigned long)pae_root);
3813 static bool is_unsync_root(hpa_t root)
3815 struct kvm_mmu_page *sp;
3817 if (!VALID_PAGE(root))
3821 * The read barrier orders the CPU's read of SPTE.W during the page table
3822 * walk before the reads of sp->unsync/sp->unsync_children here.
3824 * Even if another CPU was marking the SP as unsync-ed simultaneously,
3825 * any guest page table changes are not guaranteed to be visible anyway
3826 * until this VCPU issues a TLB flush strictly after those changes are
3827 * made. We only need to ensure that the other CPU sets these flags
3828 * before any actual changes to the page tables are made. The comments
3829 * in mmu_try_to_unsync_pages() describe what could go wrong if this
3830 * requirement isn't satisfied.
3833 sp = to_shadow_page(root);
3836 * PAE roots (somewhat arbitrarily) aren't backed by shadow pages, the
3837 * PDPTEs for a given PAE root need to be synchronized individually.
3839 if (WARN_ON_ONCE(!sp))
3842 if (sp->unsync || sp->unsync_children)
3848 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
3851 struct kvm_mmu_page *sp;
3853 if (vcpu->arch.mmu->root_role.direct)
3856 if (!VALID_PAGE(vcpu->arch.mmu->root.hpa))
3859 vcpu_clear_mmio_info(vcpu, MMIO_GVA_ANY);
3861 if (vcpu->arch.mmu->cpu_role.base.level >= PT64_ROOT_4LEVEL) {
3862 hpa_t root = vcpu->arch.mmu->root.hpa;
3863 sp = to_shadow_page(root);
3865 if (!is_unsync_root(root))
3868 write_lock(&vcpu->kvm->mmu_lock);
3869 mmu_sync_children(vcpu, sp, true);
3870 write_unlock(&vcpu->kvm->mmu_lock);
3874 write_lock(&vcpu->kvm->mmu_lock);
3876 for (i = 0; i < 4; ++i) {
3877 hpa_t root = vcpu->arch.mmu->pae_root[i];
3879 if (IS_VALID_PAE_ROOT(root)) {
3880 root &= SPTE_BASE_ADDR_MASK;
3881 sp = to_shadow_page(root);
3882 mmu_sync_children(vcpu, sp, true);
3886 write_unlock(&vcpu->kvm->mmu_lock);
3889 void kvm_mmu_sync_prev_roots(struct kvm_vcpu *vcpu)
3891 unsigned long roots_to_free = 0;
3894 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
3895 if (is_unsync_root(vcpu->arch.mmu->prev_roots[i].hpa))
3896 roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
3898 /* sync prev_roots by simply freeing them */
3899 kvm_mmu_free_roots(vcpu->kvm, vcpu->arch.mmu, roots_to_free);
3902 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
3903 gpa_t vaddr, u64 access,
3904 struct x86_exception *exception)
3907 exception->error_code = 0;
3908 return kvm_translate_gpa(vcpu, mmu, vaddr, access, exception);
3911 static bool mmio_info_in_cache(struct kvm_vcpu *vcpu, u64 addr, bool direct)
3914 * A nested guest cannot use the MMIO cache if it is using nested
3915 * page tables, because cr2 is a nGPA while the cache stores GPAs.
3917 if (mmu_is_nested(vcpu))
3921 return vcpu_match_mmio_gpa(vcpu, addr);
3923 return vcpu_match_mmio_gva(vcpu, addr);
3927 * Return the level of the lowest level SPTE added to sptes.
3928 * That SPTE may be non-present.
3930 * Must be called between walk_shadow_page_lockless_{begin,end}.
3932 static int get_walk(struct kvm_vcpu *vcpu, u64 addr, u64 *sptes, int *root_level)
3934 struct kvm_shadow_walk_iterator iterator;
3938 for (shadow_walk_init(&iterator, vcpu, addr),
3939 *root_level = iterator.level;
3940 shadow_walk_okay(&iterator);
3941 __shadow_walk_next(&iterator, spte)) {
3942 leaf = iterator.level;
3943 spte = mmu_spte_get_lockless(iterator.sptep);
3951 /* return true if reserved bit(s) are detected on a valid, non-MMIO SPTE. */
3952 static bool get_mmio_spte(struct kvm_vcpu *vcpu, u64 addr, u64 *sptep)
3954 u64 sptes[PT64_ROOT_MAX_LEVEL + 1];
3955 struct rsvd_bits_validate *rsvd_check;
3956 int root, leaf, level;
3957 bool reserved = false;
3959 walk_shadow_page_lockless_begin(vcpu);
3961 if (is_tdp_mmu(vcpu->arch.mmu))
3962 leaf = kvm_tdp_mmu_get_walk(vcpu, addr, sptes, &root);
3964 leaf = get_walk(vcpu, addr, sptes, &root);
3966 walk_shadow_page_lockless_end(vcpu);
3968 if (unlikely(leaf < 0)) {
3973 *sptep = sptes[leaf];
3976 * Skip reserved bits checks on the terminal leaf if it's not a valid
3977 * SPTE. Note, this also (intentionally) skips MMIO SPTEs, which, by
3978 * design, always have reserved bits set. The purpose of the checks is
3979 * to detect reserved bits on non-MMIO SPTEs. i.e. buggy SPTEs.
3981 if (!is_shadow_present_pte(sptes[leaf]))
3984 rsvd_check = &vcpu->arch.mmu->shadow_zero_check;
3986 for (level = root; level >= leaf; level--)
3987 reserved |= is_rsvd_spte(rsvd_check, sptes[level], level);
3990 pr_err("%s: reserved bits set on MMU-present spte, addr 0x%llx, hierarchy:\n",
3992 for (level = root; level >= leaf; level--)
3993 pr_err("------ spte = 0x%llx level = %d, rsvd bits = 0x%llx",
3994 sptes[level], level,
3995 get_rsvd_bits(rsvd_check, sptes[level], level));
4001 static int handle_mmio_page_fault(struct kvm_vcpu *vcpu, u64 addr, bool direct)
4006 if (mmio_info_in_cache(vcpu, addr, direct))
4007 return RET_PF_EMULATE;
4009 reserved = get_mmio_spte(vcpu, addr, &spte);
4010 if (WARN_ON(reserved))
4013 if (is_mmio_spte(spte)) {
4014 gfn_t gfn = get_mmio_spte_gfn(spte);
4015 unsigned int access = get_mmio_spte_access(spte);
4017 if (!check_mmio_spte(vcpu, spte))
4018 return RET_PF_INVALID;
4023 trace_handle_mmio_page_fault(addr, gfn, access);
4024 vcpu_cache_mmio_info(vcpu, addr, gfn, access);
4025 return RET_PF_EMULATE;
4029 * If the page table is zapped by other cpus, let CPU fault again on
4032 return RET_PF_RETRY;
4035 static bool page_fault_handle_page_track(struct kvm_vcpu *vcpu,
4036 struct kvm_page_fault *fault)
4038 if (unlikely(fault->rsvd))
4041 if (!fault->present || !fault->write)
4045 * guest is writing the page which is write tracked which can
4046 * not be fixed by page fault handler.
4048 if (kvm_slot_page_track_is_active(vcpu->kvm, fault->slot, fault->gfn, KVM_PAGE_TRACK_WRITE))
4054 static void shadow_page_table_clear_flood(struct kvm_vcpu *vcpu, gva_t addr)
4056 struct kvm_shadow_walk_iterator iterator;
4059 walk_shadow_page_lockless_begin(vcpu);
4060 for_each_shadow_entry_lockless(vcpu, addr, iterator, spte)
4061 clear_sp_write_flooding_count(iterator.sptep);
4062 walk_shadow_page_lockless_end(vcpu);
4065 static u32 alloc_apf_token(struct kvm_vcpu *vcpu)
4067 /* make sure the token value is not 0 */
4068 u32 id = vcpu->arch.apf.id;
4071 vcpu->arch.apf.id = 1;
4073 return (vcpu->arch.apf.id++ << 12) | vcpu->vcpu_id;
4076 static bool kvm_arch_setup_async_pf(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
4079 struct kvm_arch_async_pf arch;
4081 arch.token = alloc_apf_token(vcpu);
4083 arch.direct_map = vcpu->arch.mmu->root_role.direct;
4084 arch.cr3 = vcpu->arch.mmu->get_guest_pgd(vcpu);
4086 return kvm_setup_async_pf(vcpu, cr2_or_gpa,
4087 kvm_vcpu_gfn_to_hva(vcpu, gfn), &arch);
4090 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
4094 if ((vcpu->arch.mmu->root_role.direct != work->arch.direct_map) ||
4098 r = kvm_mmu_reload(vcpu);
4102 if (!vcpu->arch.mmu->root_role.direct &&
4103 work->arch.cr3 != vcpu->arch.mmu->get_guest_pgd(vcpu))
4106 kvm_mmu_do_page_fault(vcpu, work->cr2_or_gpa, 0, true);
4109 static int kvm_faultin_pfn(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault)
4111 struct kvm_memory_slot *slot = fault->slot;
4115 * Retry the page fault if the gfn hit a memslot that is being deleted
4116 * or moved. This ensures any existing SPTEs for the old memslot will
4117 * be zapped before KVM inserts a new MMIO SPTE for the gfn.
4119 if (slot && (slot->flags & KVM_MEMSLOT_INVALID))
4120 return RET_PF_RETRY;
4122 if (!kvm_is_visible_memslot(slot)) {
4123 /* Don't expose private memslots to L2. */
4124 if (is_guest_mode(vcpu)) {
4126 fault->pfn = KVM_PFN_NOSLOT;
4127 fault->map_writable = false;
4128 return RET_PF_CONTINUE;
4131 * If the APIC access page exists but is disabled, go directly
4132 * to emulation without caching the MMIO access or creating a
4133 * MMIO SPTE. That way the cache doesn't need to be purged
4134 * when the AVIC is re-enabled.
4136 if (slot && slot->id == APIC_ACCESS_PAGE_PRIVATE_MEMSLOT &&
4137 !kvm_apicv_activated(vcpu->kvm))
4138 return RET_PF_EMULATE;
4142 fault->pfn = __gfn_to_pfn_memslot(slot, fault->gfn, false, &async,
4143 fault->write, &fault->map_writable,
4146 return RET_PF_CONTINUE; /* *pfn has correct page already */
4148 if (!fault->prefetch && kvm_can_do_async_pf(vcpu)) {
4149 trace_kvm_try_async_get_page(fault->addr, fault->gfn);
4150 if (kvm_find_async_pf_gfn(vcpu, fault->gfn)) {
4151 trace_kvm_async_pf_doublefault(fault->addr, fault->gfn);
4152 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
4153 return RET_PF_RETRY;
4154 } else if (kvm_arch_setup_async_pf(vcpu, fault->addr, fault->gfn)) {
4155 return RET_PF_RETRY;
4159 fault->pfn = __gfn_to_pfn_memslot(slot, fault->gfn, false, NULL,
4160 fault->write, &fault->map_writable,
4162 return RET_PF_CONTINUE;
4166 * Returns true if the page fault is stale and needs to be retried, i.e. if the
4167 * root was invalidated by a memslot update or a relevant mmu_notifier fired.
4169 static bool is_page_fault_stale(struct kvm_vcpu *vcpu,
4170 struct kvm_page_fault *fault, int mmu_seq)
4172 struct kvm_mmu_page *sp = to_shadow_page(vcpu->arch.mmu->root.hpa);
4174 /* Special roots, e.g. pae_root, are not backed by shadow pages. */
4175 if (sp && is_obsolete_sp(vcpu->kvm, sp))
4179 * Roots without an associated shadow page are considered invalid if
4180 * there is a pending request to free obsolete roots. The request is
4181 * only a hint that the current root _may_ be obsolete and needs to be
4182 * reloaded, e.g. if the guest frees a PGD that KVM is tracking as a
4183 * previous root, then __kvm_mmu_prepare_zap_page() signals all vCPUs
4184 * to reload even if no vCPU is actively using the root.
4186 if (!sp && kvm_test_request(KVM_REQ_MMU_FREE_OBSOLETE_ROOTS, vcpu))
4189 return fault->slot &&
4190 mmu_notifier_retry_hva(vcpu->kvm, mmu_seq, fault->hva);
4193 static int direct_page_fault(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault)
4195 bool is_tdp_mmu_fault = is_tdp_mmu(vcpu->arch.mmu);
4197 unsigned long mmu_seq;
4200 fault->gfn = fault->addr >> PAGE_SHIFT;
4201 fault->slot = kvm_vcpu_gfn_to_memslot(vcpu, fault->gfn);
4203 if (page_fault_handle_page_track(vcpu, fault))
4204 return RET_PF_EMULATE;
4206 r = fast_page_fault(vcpu, fault);
4207 if (r != RET_PF_INVALID)
4210 r = mmu_topup_memory_caches(vcpu, false);
4214 mmu_seq = vcpu->kvm->mmu_notifier_seq;
4217 r = kvm_faultin_pfn(vcpu, fault);
4218 if (r != RET_PF_CONTINUE)
4221 r = handle_abnormal_pfn(vcpu, fault, ACC_ALL);
4222 if (r != RET_PF_CONTINUE)
4227 if (is_tdp_mmu_fault)
4228 read_lock(&vcpu->kvm->mmu_lock);
4230 write_lock(&vcpu->kvm->mmu_lock);
4232 if (is_page_fault_stale(vcpu, fault, mmu_seq))
4235 r = make_mmu_pages_available(vcpu);
4239 if (is_tdp_mmu_fault)
4240 r = kvm_tdp_mmu_map(vcpu, fault);
4242 r = __direct_map(vcpu, fault);
4245 if (is_tdp_mmu_fault)
4246 read_unlock(&vcpu->kvm->mmu_lock);
4248 write_unlock(&vcpu->kvm->mmu_lock);
4249 kvm_release_pfn_clean(fault->pfn);
4253 static int nonpaging_page_fault(struct kvm_vcpu *vcpu,
4254 struct kvm_page_fault *fault)
4256 pgprintk("%s: gva %lx error %x\n", __func__, fault->addr, fault->error_code);
4258 /* This path builds a PAE pagetable, we can map 2mb pages at maximum. */
4259 fault->max_level = PG_LEVEL_2M;
4260 return direct_page_fault(vcpu, fault);
4263 int kvm_handle_page_fault(struct kvm_vcpu *vcpu, u64 error_code,
4264 u64 fault_address, char *insn, int insn_len)
4267 u32 flags = vcpu->arch.apf.host_apf_flags;
4269 #ifndef CONFIG_X86_64
4270 /* A 64-bit CR2 should be impossible on 32-bit KVM. */
4271 if (WARN_ON_ONCE(fault_address >> 32))
4275 vcpu->arch.l1tf_flush_l1d = true;
4277 trace_kvm_page_fault(fault_address, error_code);
4279 if (kvm_event_needs_reinjection(vcpu))
4280 kvm_mmu_unprotect_page_virt(vcpu, fault_address);
4281 r = kvm_mmu_page_fault(vcpu, fault_address, error_code, insn,
4283 } else if (flags & KVM_PV_REASON_PAGE_NOT_PRESENT) {
4284 vcpu->arch.apf.host_apf_flags = 0;
4285 local_irq_disable();
4286 kvm_async_pf_task_wait_schedule(fault_address);
4289 WARN_ONCE(1, "Unexpected host async PF flags: %x\n", flags);
4294 EXPORT_SYMBOL_GPL(kvm_handle_page_fault);
4296 int kvm_tdp_page_fault(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault)
4298 while (fault->max_level > PG_LEVEL_4K) {
4299 int page_num = KVM_PAGES_PER_HPAGE(fault->max_level);
4300 gfn_t base = (fault->addr >> PAGE_SHIFT) & ~(page_num - 1);
4302 if (kvm_mtrr_check_gfn_range_consistency(vcpu, base, page_num))
4308 return direct_page_fault(vcpu, fault);
4311 static void nonpaging_init_context(struct kvm_mmu *context)
4313 context->page_fault = nonpaging_page_fault;
4314 context->gva_to_gpa = nonpaging_gva_to_gpa;
4315 context->sync_page = nonpaging_sync_page;
4316 context->invlpg = NULL;
4319 static inline bool is_root_usable(struct kvm_mmu_root_info *root, gpa_t pgd,
4320 union kvm_mmu_page_role role)
4322 return (role.direct || pgd == root->pgd) &&
4323 VALID_PAGE(root->hpa) &&
4324 role.word == to_shadow_page(root->hpa)->role.word;
4328 * Find out if a previously cached root matching the new pgd/role is available,
4329 * and insert the current root as the MRU in the cache.
4330 * If a matching root is found, it is assigned to kvm_mmu->root and
4332 * If no match is found, kvm_mmu->root is left invalid, the LRU root is
4333 * evicted to make room for the current root, and false is returned.
4335 static bool cached_root_find_and_keep_current(struct kvm *kvm, struct kvm_mmu *mmu,
4337 union kvm_mmu_page_role new_role)
4341 if (is_root_usable(&mmu->root, new_pgd, new_role))
4344 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) {
4346 * The swaps end up rotating the cache like this:
4347 * C 0 1 2 3 (on entry to the function)
4351 * 3 C 0 1 2 (on exit from the loop)
4353 swap(mmu->root, mmu->prev_roots[i]);
4354 if (is_root_usable(&mmu->root, new_pgd, new_role))
4358 kvm_mmu_free_roots(kvm, mmu, KVM_MMU_ROOT_CURRENT);
4363 * Find out if a previously cached root matching the new pgd/role is available.
4364 * On entry, mmu->root is invalid.
4365 * If a matching root is found, it is assigned to kvm_mmu->root, the LRU entry
4366 * of the cache becomes invalid, and true is returned.
4367 * If no match is found, kvm_mmu->root is left invalid and false is returned.
4369 static bool cached_root_find_without_current(struct kvm *kvm, struct kvm_mmu *mmu,
4371 union kvm_mmu_page_role new_role)
4375 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
4376 if (is_root_usable(&mmu->prev_roots[i], new_pgd, new_role))
4382 swap(mmu->root, mmu->prev_roots[i]);
4383 /* Bubble up the remaining roots. */
4384 for (; i < KVM_MMU_NUM_PREV_ROOTS - 1; i++)
4385 mmu->prev_roots[i] = mmu->prev_roots[i + 1];
4386 mmu->prev_roots[i].hpa = INVALID_PAGE;
4390 static bool fast_pgd_switch(struct kvm *kvm, struct kvm_mmu *mmu,
4391 gpa_t new_pgd, union kvm_mmu_page_role new_role)
4394 * For now, limit the caching to 64-bit hosts+VMs in order to avoid
4395 * having to deal with PDPTEs. We may add support for 32-bit hosts/VMs
4396 * later if necessary.
4398 if (VALID_PAGE(mmu->root.hpa) && !to_shadow_page(mmu->root.hpa))
4399 kvm_mmu_free_roots(kvm, mmu, KVM_MMU_ROOT_CURRENT);
4401 if (VALID_PAGE(mmu->root.hpa))
4402 return cached_root_find_and_keep_current(kvm, mmu, new_pgd, new_role);
4404 return cached_root_find_without_current(kvm, mmu, new_pgd, new_role);
4407 void kvm_mmu_new_pgd(struct kvm_vcpu *vcpu, gpa_t new_pgd)
4409 struct kvm_mmu *mmu = vcpu->arch.mmu;
4410 union kvm_mmu_page_role new_role = mmu->root_role;
4412 if (!fast_pgd_switch(vcpu->kvm, mmu, new_pgd, new_role)) {
4413 /* kvm_mmu_ensure_valid_pgd will set up a new root. */
4418 * It's possible that the cached previous root page is obsolete because
4419 * of a change in the MMU generation number. However, changing the
4420 * generation number is accompanied by KVM_REQ_MMU_FREE_OBSOLETE_ROOTS,
4421 * which will free the root set here and allocate a new one.
4423 kvm_make_request(KVM_REQ_LOAD_MMU_PGD, vcpu);
4425 if (force_flush_and_sync_on_reuse) {
4426 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
4427 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
4431 * The last MMIO access's GVA and GPA are cached in the VCPU. When
4432 * switching to a new CR3, that GVA->GPA mapping may no longer be
4433 * valid. So clear any cached MMIO info even when we don't need to sync
4434 * the shadow page tables.
4436 vcpu_clear_mmio_info(vcpu, MMIO_GVA_ANY);
4439 * If this is a direct root page, it doesn't have a write flooding
4440 * count. Otherwise, clear the write flooding count.
4442 if (!new_role.direct)
4443 __clear_sp_write_flooding_count(
4444 to_shadow_page(vcpu->arch.mmu->root.hpa));
4446 EXPORT_SYMBOL_GPL(kvm_mmu_new_pgd);
4448 static unsigned long get_cr3(struct kvm_vcpu *vcpu)
4450 return kvm_read_cr3(vcpu);
4453 static bool sync_mmio_spte(struct kvm_vcpu *vcpu, u64 *sptep, gfn_t gfn,
4454 unsigned int access)
4456 if (unlikely(is_mmio_spte(*sptep))) {
4457 if (gfn != get_mmio_spte_gfn(*sptep)) {
4458 mmu_spte_clear_no_track(sptep);
4462 mark_mmio_spte(vcpu, sptep, gfn, access);
4469 #define PTTYPE_EPT 18 /* arbitrary */
4470 #define PTTYPE PTTYPE_EPT
4471 #include "paging_tmpl.h"
4475 #include "paging_tmpl.h"
4479 #include "paging_tmpl.h"
4483 __reset_rsvds_bits_mask(struct rsvd_bits_validate *rsvd_check,
4484 u64 pa_bits_rsvd, int level, bool nx, bool gbpages,
4487 u64 gbpages_bit_rsvd = 0;
4488 u64 nonleaf_bit8_rsvd = 0;
4491 rsvd_check->bad_mt_xwr = 0;
4494 gbpages_bit_rsvd = rsvd_bits(7, 7);
4496 if (level == PT32E_ROOT_LEVEL)
4497 high_bits_rsvd = pa_bits_rsvd & rsvd_bits(0, 62);
4499 high_bits_rsvd = pa_bits_rsvd & rsvd_bits(0, 51);
4501 /* Note, NX doesn't exist in PDPTEs, this is handled below. */
4503 high_bits_rsvd |= rsvd_bits(63, 63);
4506 * Non-leaf PML4Es and PDPEs reserve bit 8 (which would be the G bit for
4507 * leaf entries) on AMD CPUs only.
4510 nonleaf_bit8_rsvd = rsvd_bits(8, 8);
4513 case PT32_ROOT_LEVEL:
4514 /* no rsvd bits for 2 level 4K page table entries */
4515 rsvd_check->rsvd_bits_mask[0][1] = 0;
4516 rsvd_check->rsvd_bits_mask[0][0] = 0;
4517 rsvd_check->rsvd_bits_mask[1][0] =
4518 rsvd_check->rsvd_bits_mask[0][0];
4521 rsvd_check->rsvd_bits_mask[1][1] = 0;
4525 if (is_cpuid_PSE36())
4526 /* 36bits PSE 4MB page */
4527 rsvd_check->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
4529 /* 32 bits PSE 4MB page */
4530 rsvd_check->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
4532 case PT32E_ROOT_LEVEL:
4533 rsvd_check->rsvd_bits_mask[0][2] = rsvd_bits(63, 63) |
4536 rsvd_bits(1, 2); /* PDPTE */
4537 rsvd_check->rsvd_bits_mask[0][1] = high_bits_rsvd; /* PDE */
4538 rsvd_check->rsvd_bits_mask[0][0] = high_bits_rsvd; /* PTE */
4539 rsvd_check->rsvd_bits_mask[1][1] = high_bits_rsvd |
4540 rsvd_bits(13, 20); /* large page */
4541 rsvd_check->rsvd_bits_mask[1][0] =
4542 rsvd_check->rsvd_bits_mask[0][0];
4544 case PT64_ROOT_5LEVEL:
4545 rsvd_check->rsvd_bits_mask[0][4] = high_bits_rsvd |
4548 rsvd_check->rsvd_bits_mask[1][4] =
4549 rsvd_check->rsvd_bits_mask[0][4];
4551 case PT64_ROOT_4LEVEL:
4552 rsvd_check->rsvd_bits_mask[0][3] = high_bits_rsvd |
4555 rsvd_check->rsvd_bits_mask[0][2] = high_bits_rsvd |
4557 rsvd_check->rsvd_bits_mask[0][1] = high_bits_rsvd;
4558 rsvd_check->rsvd_bits_mask[0][0] = high_bits_rsvd;
4559 rsvd_check->rsvd_bits_mask[1][3] =
4560 rsvd_check->rsvd_bits_mask[0][3];
4561 rsvd_check->rsvd_bits_mask[1][2] = high_bits_rsvd |
4564 rsvd_check->rsvd_bits_mask[1][1] = high_bits_rsvd |
4565 rsvd_bits(13, 20); /* large page */
4566 rsvd_check->rsvd_bits_mask[1][0] =
4567 rsvd_check->rsvd_bits_mask[0][0];
4572 static bool guest_can_use_gbpages(struct kvm_vcpu *vcpu)
4575 * If TDP is enabled, let the guest use GBPAGES if they're supported in
4576 * hardware. The hardware page walker doesn't let KVM disable GBPAGES,
4577 * i.e. won't treat them as reserved, and KVM doesn't redo the GVA->GPA
4578 * walk for performance and complexity reasons. Not to mention KVM
4579 * _can't_ solve the problem because GVA->GPA walks aren't visible to
4580 * KVM once a TDP translation is installed. Mimic hardware behavior so
4581 * that KVM's is at least consistent, i.e. doesn't randomly inject #PF.
4583 return tdp_enabled ? boot_cpu_has(X86_FEATURE_GBPAGES) :
4584 guest_cpuid_has(vcpu, X86_FEATURE_GBPAGES);
4587 static void reset_guest_rsvds_bits_mask(struct kvm_vcpu *vcpu,
4588 struct kvm_mmu *context)
4590 __reset_rsvds_bits_mask(&context->guest_rsvd_check,
4591 vcpu->arch.reserved_gpa_bits,
4592 context->cpu_role.base.level, is_efer_nx(context),
4593 guest_can_use_gbpages(vcpu),
4594 is_cr4_pse(context),
4595 guest_cpuid_is_amd_or_hygon(vcpu));
4599 __reset_rsvds_bits_mask_ept(struct rsvd_bits_validate *rsvd_check,
4600 u64 pa_bits_rsvd, bool execonly, int huge_page_level)
4602 u64 high_bits_rsvd = pa_bits_rsvd & rsvd_bits(0, 51);
4603 u64 large_1g_rsvd = 0, large_2m_rsvd = 0;
4606 if (huge_page_level < PG_LEVEL_1G)
4607 large_1g_rsvd = rsvd_bits(7, 7);
4608 if (huge_page_level < PG_LEVEL_2M)
4609 large_2m_rsvd = rsvd_bits(7, 7);
4611 rsvd_check->rsvd_bits_mask[0][4] = high_bits_rsvd | rsvd_bits(3, 7);
4612 rsvd_check->rsvd_bits_mask[0][3] = high_bits_rsvd | rsvd_bits(3, 7);
4613 rsvd_check->rsvd_bits_mask[0][2] = high_bits_rsvd | rsvd_bits(3, 6) | large_1g_rsvd;
4614 rsvd_check->rsvd_bits_mask[0][1] = high_bits_rsvd | rsvd_bits(3, 6) | large_2m_rsvd;
4615 rsvd_check->rsvd_bits_mask[0][0] = high_bits_rsvd;
4618 rsvd_check->rsvd_bits_mask[1][4] = rsvd_check->rsvd_bits_mask[0][4];
4619 rsvd_check->rsvd_bits_mask[1][3] = rsvd_check->rsvd_bits_mask[0][3];
4620 rsvd_check->rsvd_bits_mask[1][2] = high_bits_rsvd | rsvd_bits(12, 29) | large_1g_rsvd;
4621 rsvd_check->rsvd_bits_mask[1][1] = high_bits_rsvd | rsvd_bits(12, 20) | large_2m_rsvd;
4622 rsvd_check->rsvd_bits_mask[1][0] = rsvd_check->rsvd_bits_mask[0][0];
4624 bad_mt_xwr = 0xFFull << (2 * 8); /* bits 3..5 must not be 2 */
4625 bad_mt_xwr |= 0xFFull << (3 * 8); /* bits 3..5 must not be 3 */
4626 bad_mt_xwr |= 0xFFull << (7 * 8); /* bits 3..5 must not be 7 */
4627 bad_mt_xwr |= REPEAT_BYTE(1ull << 2); /* bits 0..2 must not be 010 */
4628 bad_mt_xwr |= REPEAT_BYTE(1ull << 6); /* bits 0..2 must not be 110 */
4630 /* bits 0..2 must not be 100 unless VMX capabilities allow it */
4631 bad_mt_xwr |= REPEAT_BYTE(1ull << 4);
4633 rsvd_check->bad_mt_xwr = bad_mt_xwr;
4636 static void reset_rsvds_bits_mask_ept(struct kvm_vcpu *vcpu,
4637 struct kvm_mmu *context, bool execonly, int huge_page_level)
4639 __reset_rsvds_bits_mask_ept(&context->guest_rsvd_check,
4640 vcpu->arch.reserved_gpa_bits, execonly,
4644 static inline u64 reserved_hpa_bits(void)
4646 return rsvd_bits(shadow_phys_bits, 63);
4650 * the page table on host is the shadow page table for the page
4651 * table in guest or amd nested guest, its mmu features completely
4652 * follow the features in guest.
4654 static void reset_shadow_zero_bits_mask(struct kvm_vcpu *vcpu,
4655 struct kvm_mmu *context)
4657 /* @amd adds a check on bit of SPTEs, which KVM shouldn't use anyways. */
4659 /* KVM doesn't use 2-level page tables for the shadow MMU. */
4660 bool is_pse = false;
4661 struct rsvd_bits_validate *shadow_zero_check;
4664 WARN_ON_ONCE(context->root_role.level < PT32E_ROOT_LEVEL);
4666 shadow_zero_check = &context->shadow_zero_check;
4667 __reset_rsvds_bits_mask(shadow_zero_check, reserved_hpa_bits(),
4668 context->root_role.level,
4669 context->root_role.efer_nx,
4670 guest_can_use_gbpages(vcpu), is_pse, is_amd);
4672 if (!shadow_me_mask)
4675 for (i = context->root_role.level; --i >= 0;) {
4677 * So far shadow_me_value is a constant during KVM's life
4678 * time. Bits in shadow_me_value are allowed to be set.
4679 * Bits in shadow_me_mask but not in shadow_me_value are
4680 * not allowed to be set.
4682 shadow_zero_check->rsvd_bits_mask[0][i] |= shadow_me_mask;
4683 shadow_zero_check->rsvd_bits_mask[1][i] |= shadow_me_mask;
4684 shadow_zero_check->rsvd_bits_mask[0][i] &= ~shadow_me_value;
4685 shadow_zero_check->rsvd_bits_mask[1][i] &= ~shadow_me_value;
4690 static inline bool boot_cpu_is_amd(void)
4692 WARN_ON_ONCE(!tdp_enabled);
4693 return shadow_x_mask == 0;
4697 * the direct page table on host, use as much mmu features as
4698 * possible, however, kvm currently does not do execution-protection.
4701 reset_tdp_shadow_zero_bits_mask(struct kvm_mmu *context)
4703 struct rsvd_bits_validate *shadow_zero_check;
4706 shadow_zero_check = &context->shadow_zero_check;
4708 if (boot_cpu_is_amd())
4709 __reset_rsvds_bits_mask(shadow_zero_check, reserved_hpa_bits(),
4710 context->root_role.level, false,
4711 boot_cpu_has(X86_FEATURE_GBPAGES),
4714 __reset_rsvds_bits_mask_ept(shadow_zero_check,
4715 reserved_hpa_bits(), false,
4716 max_huge_page_level);
4718 if (!shadow_me_mask)
4721 for (i = context->root_role.level; --i >= 0;) {
4722 shadow_zero_check->rsvd_bits_mask[0][i] &= ~shadow_me_mask;
4723 shadow_zero_check->rsvd_bits_mask[1][i] &= ~shadow_me_mask;
4728 * as the comments in reset_shadow_zero_bits_mask() except it
4729 * is the shadow page table for intel nested guest.
4732 reset_ept_shadow_zero_bits_mask(struct kvm_mmu *context, bool execonly)
4734 __reset_rsvds_bits_mask_ept(&context->shadow_zero_check,
4735 reserved_hpa_bits(), execonly,
4736 max_huge_page_level);
4739 #define BYTE_MASK(access) \
4740 ((1 & (access) ? 2 : 0) | \
4741 (2 & (access) ? 4 : 0) | \
4742 (3 & (access) ? 8 : 0) | \
4743 (4 & (access) ? 16 : 0) | \
4744 (5 & (access) ? 32 : 0) | \
4745 (6 & (access) ? 64 : 0) | \
4746 (7 & (access) ? 128 : 0))
4749 static void update_permission_bitmask(struct kvm_mmu *mmu, bool ept)
4753 const u8 x = BYTE_MASK(ACC_EXEC_MASK);
4754 const u8 w = BYTE_MASK(ACC_WRITE_MASK);
4755 const u8 u = BYTE_MASK(ACC_USER_MASK);
4757 bool cr4_smep = is_cr4_smep(mmu);
4758 bool cr4_smap = is_cr4_smap(mmu);
4759 bool cr0_wp = is_cr0_wp(mmu);
4760 bool efer_nx = is_efer_nx(mmu);
4762 for (byte = 0; byte < ARRAY_SIZE(mmu->permissions); ++byte) {
4763 unsigned pfec = byte << 1;
4766 * Each "*f" variable has a 1 bit for each UWX value
4767 * that causes a fault with the given PFEC.
4770 /* Faults from writes to non-writable pages */
4771 u8 wf = (pfec & PFERR_WRITE_MASK) ? (u8)~w : 0;
4772 /* Faults from user mode accesses to supervisor pages */
4773 u8 uf = (pfec & PFERR_USER_MASK) ? (u8)~u : 0;
4774 /* Faults from fetches of non-executable pages*/
4775 u8 ff = (pfec & PFERR_FETCH_MASK) ? (u8)~x : 0;
4776 /* Faults from kernel mode fetches of user pages */
4778 /* Faults from kernel mode accesses of user pages */
4782 /* Faults from kernel mode accesses to user pages */
4783 u8 kf = (pfec & PFERR_USER_MASK) ? 0 : u;
4785 /* Not really needed: !nx will cause pte.nx to fault */
4789 /* Allow supervisor writes if !cr0.wp */
4791 wf = (pfec & PFERR_USER_MASK) ? wf : 0;
4793 /* Disallow supervisor fetches of user code if cr4.smep */
4795 smepf = (pfec & PFERR_FETCH_MASK) ? kf : 0;
4798 * SMAP:kernel-mode data accesses from user-mode
4799 * mappings should fault. A fault is considered
4800 * as a SMAP violation if all of the following
4801 * conditions are true:
4802 * - X86_CR4_SMAP is set in CR4
4803 * - A user page is accessed
4804 * - The access is not a fetch
4805 * - The access is supervisor mode
4806 * - If implicit supervisor access or X86_EFLAGS_AC is clear
4808 * Here, we cover the first four conditions.
4809 * The fifth is computed dynamically in permission_fault();
4810 * PFERR_RSVD_MASK bit will be set in PFEC if the access is
4811 * *not* subject to SMAP restrictions.
4814 smapf = (pfec & (PFERR_RSVD_MASK|PFERR_FETCH_MASK)) ? 0 : kf;
4817 mmu->permissions[byte] = ff | uf | wf | smepf | smapf;
4822 * PKU is an additional mechanism by which the paging controls access to
4823 * user-mode addresses based on the value in the PKRU register. Protection
4824 * key violations are reported through a bit in the page fault error code.
4825 * Unlike other bits of the error code, the PK bit is not known at the
4826 * call site of e.g. gva_to_gpa; it must be computed directly in
4827 * permission_fault based on two bits of PKRU, on some machine state (CR4,
4828 * CR0, EFER, CPL), and on other bits of the error code and the page tables.
4830 * In particular the following conditions come from the error code, the
4831 * page tables and the machine state:
4832 * - PK is always zero unless CR4.PKE=1 and EFER.LMA=1
4833 * - PK is always zero if RSVD=1 (reserved bit set) or F=1 (instruction fetch)
4834 * - PK is always zero if U=0 in the page tables
4835 * - PKRU.WD is ignored if CR0.WP=0 and the access is a supervisor access.
4837 * The PKRU bitmask caches the result of these four conditions. The error
4838 * code (minus the P bit) and the page table's U bit form an index into the
4839 * PKRU bitmask. Two bits of the PKRU bitmask are then extracted and ANDed
4840 * with the two bits of the PKRU register corresponding to the protection key.
4841 * For the first three conditions above the bits will be 00, thus masking
4842 * away both AD and WD. For all reads or if the last condition holds, WD
4843 * only will be masked away.
4845 static void update_pkru_bitmask(struct kvm_mmu *mmu)
4852 if (!is_cr4_pke(mmu))
4855 wp = is_cr0_wp(mmu);
4857 for (bit = 0; bit < ARRAY_SIZE(mmu->permissions); ++bit) {
4858 unsigned pfec, pkey_bits;
4859 bool check_pkey, check_write, ff, uf, wf, pte_user;
4862 ff = pfec & PFERR_FETCH_MASK;
4863 uf = pfec & PFERR_USER_MASK;
4864 wf = pfec & PFERR_WRITE_MASK;
4866 /* PFEC.RSVD is replaced by ACC_USER_MASK. */
4867 pte_user = pfec & PFERR_RSVD_MASK;
4870 * Only need to check the access which is not an
4871 * instruction fetch and is to a user page.
4873 check_pkey = (!ff && pte_user);
4875 * write access is controlled by PKRU if it is a
4876 * user access or CR0.WP = 1.
4878 check_write = check_pkey && wf && (uf || wp);
4880 /* PKRU.AD stops both read and write access. */
4881 pkey_bits = !!check_pkey;
4882 /* PKRU.WD stops write access. */
4883 pkey_bits |= (!!check_write) << 1;
4885 mmu->pkru_mask |= (pkey_bits & 3) << pfec;
4889 static void reset_guest_paging_metadata(struct kvm_vcpu *vcpu,
4890 struct kvm_mmu *mmu)
4892 if (!is_cr0_pg(mmu))
4895 reset_guest_rsvds_bits_mask(vcpu, mmu);
4896 update_permission_bitmask(mmu, false);
4897 update_pkru_bitmask(mmu);
4900 static void paging64_init_context(struct kvm_mmu *context)
4902 context->page_fault = paging64_page_fault;
4903 context->gva_to_gpa = paging64_gva_to_gpa;
4904 context->sync_page = paging64_sync_page;
4905 context->invlpg = paging64_invlpg;
4908 static void paging32_init_context(struct kvm_mmu *context)
4910 context->page_fault = paging32_page_fault;
4911 context->gva_to_gpa = paging32_gva_to_gpa;
4912 context->sync_page = paging32_sync_page;
4913 context->invlpg = paging32_invlpg;
4916 static union kvm_cpu_role
4917 kvm_calc_cpu_role(struct kvm_vcpu *vcpu, const struct kvm_mmu_role_regs *regs)
4919 union kvm_cpu_role role = {0};
4921 role.base.access = ACC_ALL;
4922 role.base.smm = is_smm(vcpu);
4923 role.base.guest_mode = is_guest_mode(vcpu);
4926 if (!____is_cr0_pg(regs)) {
4927 role.base.direct = 1;
4931 role.base.efer_nx = ____is_efer_nx(regs);
4932 role.base.cr0_wp = ____is_cr0_wp(regs);
4933 role.base.smep_andnot_wp = ____is_cr4_smep(regs) && !____is_cr0_wp(regs);
4934 role.base.smap_andnot_wp = ____is_cr4_smap(regs) && !____is_cr0_wp(regs);
4935 role.base.has_4_byte_gpte = !____is_cr4_pae(regs);
4937 if (____is_efer_lma(regs))
4938 role.base.level = ____is_cr4_la57(regs) ? PT64_ROOT_5LEVEL
4940 else if (____is_cr4_pae(regs))
4941 role.base.level = PT32E_ROOT_LEVEL;
4943 role.base.level = PT32_ROOT_LEVEL;
4945 role.ext.cr4_smep = ____is_cr4_smep(regs);
4946 role.ext.cr4_smap = ____is_cr4_smap(regs);
4947 role.ext.cr4_pse = ____is_cr4_pse(regs);
4949 /* PKEY and LA57 are active iff long mode is active. */
4950 role.ext.cr4_pke = ____is_efer_lma(regs) && ____is_cr4_pke(regs);
4951 role.ext.cr4_la57 = ____is_efer_lma(regs) && ____is_cr4_la57(regs);
4952 role.ext.efer_lma = ____is_efer_lma(regs);
4956 static inline int kvm_mmu_get_tdp_level(struct kvm_vcpu *vcpu)
4958 /* tdp_root_level is architecture forced level, use it if nonzero */
4960 return tdp_root_level;
4962 /* Use 5-level TDP if and only if it's useful/necessary. */
4963 if (max_tdp_level == 5 && cpuid_maxphyaddr(vcpu) <= 48)
4966 return max_tdp_level;
4969 static union kvm_mmu_page_role
4970 kvm_calc_tdp_mmu_root_page_role(struct kvm_vcpu *vcpu,
4971 union kvm_cpu_role cpu_role)
4973 union kvm_mmu_page_role role = {0};
4975 role.access = ACC_ALL;
4977 role.efer_nx = true;
4978 role.smm = cpu_role.base.smm;
4979 role.guest_mode = cpu_role.base.guest_mode;
4980 role.ad_disabled = !kvm_ad_enabled();
4981 role.level = kvm_mmu_get_tdp_level(vcpu);
4983 role.has_4_byte_gpte = false;
4988 static void init_kvm_tdp_mmu(struct kvm_vcpu *vcpu,
4989 union kvm_cpu_role cpu_role)
4991 struct kvm_mmu *context = &vcpu->arch.root_mmu;
4992 union kvm_mmu_page_role root_role = kvm_calc_tdp_mmu_root_page_role(vcpu, cpu_role);
4994 if (cpu_role.as_u64 == context->cpu_role.as_u64 &&
4995 root_role.word == context->root_role.word)
4998 context->cpu_role.as_u64 = cpu_role.as_u64;
4999 context->root_role.word = root_role.word;
5000 context->page_fault = kvm_tdp_page_fault;
5001 context->sync_page = nonpaging_sync_page;
5002 context->invlpg = NULL;
5003 context->get_guest_pgd = get_cr3;
5004 context->get_pdptr = kvm_pdptr_read;
5005 context->inject_page_fault = kvm_inject_page_fault;
5007 if (!is_cr0_pg(context))
5008 context->gva_to_gpa = nonpaging_gva_to_gpa;
5009 else if (is_cr4_pae(context))
5010 context->gva_to_gpa = paging64_gva_to_gpa;
5012 context->gva_to_gpa = paging32_gva_to_gpa;
5014 reset_guest_paging_metadata(vcpu, context);
5015 reset_tdp_shadow_zero_bits_mask(context);
5018 static void shadow_mmu_init_context(struct kvm_vcpu *vcpu, struct kvm_mmu *context,
5019 union kvm_cpu_role cpu_role,
5020 union kvm_mmu_page_role root_role)
5022 if (cpu_role.as_u64 == context->cpu_role.as_u64 &&
5023 root_role.word == context->root_role.word)
5026 context->cpu_role.as_u64 = cpu_role.as_u64;
5027 context->root_role.word = root_role.word;
5029 if (!is_cr0_pg(context))
5030 nonpaging_init_context(context);
5031 else if (is_cr4_pae(context))
5032 paging64_init_context(context);
5034 paging32_init_context(context);
5036 reset_guest_paging_metadata(vcpu, context);
5037 reset_shadow_zero_bits_mask(vcpu, context);
5040 static void kvm_init_shadow_mmu(struct kvm_vcpu *vcpu,
5041 union kvm_cpu_role cpu_role)
5043 struct kvm_mmu *context = &vcpu->arch.root_mmu;
5044 union kvm_mmu_page_role root_role;
5046 root_role = cpu_role.base;
5048 /* KVM uses PAE paging whenever the guest isn't using 64-bit paging. */
5049 root_role.level = max_t(u32, root_role.level, PT32E_ROOT_LEVEL);
5052 * KVM forces EFER.NX=1 when TDP is disabled, reflect it in the MMU role.
5053 * KVM uses NX when TDP is disabled to handle a variety of scenarios,
5054 * notably for huge SPTEs if iTLB multi-hit mitigation is enabled and
5055 * to generate correct permissions for CR0.WP=0/CR4.SMEP=1/EFER.NX=0.
5056 * The iTLB multi-hit workaround can be toggled at any time, so assume
5057 * NX can be used by any non-nested shadow MMU to avoid having to reset
5060 root_role.efer_nx = true;
5062 shadow_mmu_init_context(vcpu, context, cpu_role, root_role);
5065 void kvm_init_shadow_npt_mmu(struct kvm_vcpu *vcpu, unsigned long cr0,
5066 unsigned long cr4, u64 efer, gpa_t nested_cr3)
5068 struct kvm_mmu *context = &vcpu->arch.guest_mmu;
5069 struct kvm_mmu_role_regs regs = {
5071 .cr4 = cr4 & ~X86_CR4_PKE,
5074 union kvm_cpu_role cpu_role = kvm_calc_cpu_role(vcpu, ®s);
5075 union kvm_mmu_page_role root_role;
5077 /* NPT requires CR0.PG=1. */
5078 WARN_ON_ONCE(cpu_role.base.direct);
5080 root_role = cpu_role.base;
5081 root_role.level = kvm_mmu_get_tdp_level(vcpu);
5082 if (root_role.level == PT64_ROOT_5LEVEL &&
5083 cpu_role.base.level == PT64_ROOT_4LEVEL)
5084 root_role.passthrough = 1;
5086 shadow_mmu_init_context(vcpu, context, cpu_role, root_role);
5087 kvm_mmu_new_pgd(vcpu, nested_cr3);
5089 EXPORT_SYMBOL_GPL(kvm_init_shadow_npt_mmu);
5091 static union kvm_cpu_role
5092 kvm_calc_shadow_ept_root_page_role(struct kvm_vcpu *vcpu, bool accessed_dirty,
5093 bool execonly, u8 level)
5095 union kvm_cpu_role role = {0};
5098 * KVM does not support SMM transfer monitors, and consequently does not
5099 * support the "entry to SMM" control either. role.base.smm is always 0.
5101 WARN_ON_ONCE(is_smm(vcpu));
5102 role.base.level = level;
5103 role.base.has_4_byte_gpte = false;
5104 role.base.direct = false;
5105 role.base.ad_disabled = !accessed_dirty;
5106 role.base.guest_mode = true;
5107 role.base.access = ACC_ALL;
5110 role.ext.execonly = execonly;
5116 void kvm_init_shadow_ept_mmu(struct kvm_vcpu *vcpu, bool execonly,
5117 int huge_page_level, bool accessed_dirty,
5120 struct kvm_mmu *context = &vcpu->arch.guest_mmu;
5121 u8 level = vmx_eptp_page_walk_level(new_eptp);
5122 union kvm_cpu_role new_mode =
5123 kvm_calc_shadow_ept_root_page_role(vcpu, accessed_dirty,
5126 if (new_mode.as_u64 != context->cpu_role.as_u64) {
5127 /* EPT, and thus nested EPT, does not consume CR0, CR4, nor EFER. */
5128 context->cpu_role.as_u64 = new_mode.as_u64;
5129 context->root_role.word = new_mode.base.word;
5131 context->page_fault = ept_page_fault;
5132 context->gva_to_gpa = ept_gva_to_gpa;
5133 context->sync_page = ept_sync_page;
5134 context->invlpg = ept_invlpg;
5136 update_permission_bitmask(context, true);
5137 context->pkru_mask = 0;
5138 reset_rsvds_bits_mask_ept(vcpu, context, execonly, huge_page_level);
5139 reset_ept_shadow_zero_bits_mask(context, execonly);
5142 kvm_mmu_new_pgd(vcpu, new_eptp);
5144 EXPORT_SYMBOL_GPL(kvm_init_shadow_ept_mmu);
5146 static void init_kvm_softmmu(struct kvm_vcpu *vcpu,
5147 union kvm_cpu_role cpu_role)
5149 struct kvm_mmu *context = &vcpu->arch.root_mmu;
5151 kvm_init_shadow_mmu(vcpu, cpu_role);
5153 context->get_guest_pgd = get_cr3;
5154 context->get_pdptr = kvm_pdptr_read;
5155 context->inject_page_fault = kvm_inject_page_fault;
5158 static void init_kvm_nested_mmu(struct kvm_vcpu *vcpu,
5159 union kvm_cpu_role new_mode)
5161 struct kvm_mmu *g_context = &vcpu->arch.nested_mmu;
5163 if (new_mode.as_u64 == g_context->cpu_role.as_u64)
5166 g_context->cpu_role.as_u64 = new_mode.as_u64;
5167 g_context->get_guest_pgd = get_cr3;
5168 g_context->get_pdptr = kvm_pdptr_read;
5169 g_context->inject_page_fault = kvm_inject_page_fault;
5172 * L2 page tables are never shadowed, so there is no need to sync
5175 g_context->invlpg = NULL;
5178 * Note that arch.mmu->gva_to_gpa translates l2_gpa to l1_gpa using
5179 * L1's nested page tables (e.g. EPT12). The nested translation
5180 * of l2_gva to l1_gpa is done by arch.nested_mmu.gva_to_gpa using
5181 * L2's page tables as the first level of translation and L1's
5182 * nested page tables as the second level of translation. Basically
5183 * the gva_to_gpa functions between mmu and nested_mmu are swapped.
5185 if (!is_paging(vcpu))
5186 g_context->gva_to_gpa = nonpaging_gva_to_gpa;
5187 else if (is_long_mode(vcpu))
5188 g_context->gva_to_gpa = paging64_gva_to_gpa;
5189 else if (is_pae(vcpu))
5190 g_context->gva_to_gpa = paging64_gva_to_gpa;
5192 g_context->gva_to_gpa = paging32_gva_to_gpa;
5194 reset_guest_paging_metadata(vcpu, g_context);
5197 void kvm_init_mmu(struct kvm_vcpu *vcpu)
5199 struct kvm_mmu_role_regs regs = vcpu_to_role_regs(vcpu);
5200 union kvm_cpu_role cpu_role = kvm_calc_cpu_role(vcpu, ®s);
5202 if (mmu_is_nested(vcpu))
5203 init_kvm_nested_mmu(vcpu, cpu_role);
5204 else if (tdp_enabled)
5205 init_kvm_tdp_mmu(vcpu, cpu_role);
5207 init_kvm_softmmu(vcpu, cpu_role);
5209 EXPORT_SYMBOL_GPL(kvm_init_mmu);
5211 void kvm_mmu_after_set_cpuid(struct kvm_vcpu *vcpu)
5214 * Invalidate all MMU roles to force them to reinitialize as CPUID
5215 * information is factored into reserved bit calculations.
5217 * Correctly handling multiple vCPU models with respect to paging and
5218 * physical address properties) in a single VM would require tracking
5219 * all relevant CPUID information in kvm_mmu_page_role. That is very
5220 * undesirable as it would increase the memory requirements for
5221 * gfn_track (see struct kvm_mmu_page_role comments). For now that
5222 * problem is swept under the rug; KVM's CPUID API is horrific and
5223 * it's all but impossible to solve it without introducing a new API.
5225 vcpu->arch.root_mmu.root_role.word = 0;
5226 vcpu->arch.guest_mmu.root_role.word = 0;
5227 vcpu->arch.nested_mmu.root_role.word = 0;
5228 vcpu->arch.root_mmu.cpu_role.ext.valid = 0;
5229 vcpu->arch.guest_mmu.cpu_role.ext.valid = 0;
5230 vcpu->arch.nested_mmu.cpu_role.ext.valid = 0;
5231 kvm_mmu_reset_context(vcpu);
5234 * Changing guest CPUID after KVM_RUN is forbidden, see the comment in
5235 * kvm_arch_vcpu_ioctl().
5237 KVM_BUG_ON(vcpu->arch.last_vmentry_cpu != -1, vcpu->kvm);
5240 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
5242 kvm_mmu_unload(vcpu);
5245 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
5247 int kvm_mmu_load(struct kvm_vcpu *vcpu)
5251 r = mmu_topup_memory_caches(vcpu, !vcpu->arch.mmu->root_role.direct);
5254 r = mmu_alloc_special_roots(vcpu);
5257 if (vcpu->arch.mmu->root_role.direct)
5258 r = mmu_alloc_direct_roots(vcpu);
5260 r = mmu_alloc_shadow_roots(vcpu);
5264 kvm_mmu_sync_roots(vcpu);
5266 kvm_mmu_load_pgd(vcpu);
5269 * Flush any TLB entries for the new root, the provenance of the root
5270 * is unknown. Even if KVM ensures there are no stale TLB entries
5271 * for a freed root, in theory another hypervisor could have left
5272 * stale entries. Flushing on alloc also allows KVM to skip the TLB
5273 * flush when freeing a root (see kvm_tdp_mmu_put_root()).
5275 static_call(kvm_x86_flush_tlb_current)(vcpu);
5280 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
5282 struct kvm *kvm = vcpu->kvm;
5284 kvm_mmu_free_roots(kvm, &vcpu->arch.root_mmu, KVM_MMU_ROOTS_ALL);
5285 WARN_ON(VALID_PAGE(vcpu->arch.root_mmu.root.hpa));
5286 kvm_mmu_free_roots(kvm, &vcpu->arch.guest_mmu, KVM_MMU_ROOTS_ALL);
5287 WARN_ON(VALID_PAGE(vcpu->arch.guest_mmu.root.hpa));
5288 vcpu_clear_mmio_info(vcpu, MMIO_GVA_ANY);
5291 static bool is_obsolete_root(struct kvm *kvm, hpa_t root_hpa)
5293 struct kvm_mmu_page *sp;
5295 if (!VALID_PAGE(root_hpa))
5299 * When freeing obsolete roots, treat roots as obsolete if they don't
5300 * have an associated shadow page. This does mean KVM will get false
5301 * positives and free roots that don't strictly need to be freed, but
5302 * such false positives are relatively rare:
5304 * (a) only PAE paging and nested NPT has roots without shadow pages
5305 * (b) remote reloads due to a memslot update obsoletes _all_ roots
5306 * (c) KVM doesn't track previous roots for PAE paging, and the guest
5307 * is unlikely to zap an in-use PGD.
5309 sp = to_shadow_page(root_hpa);
5310 return !sp || is_obsolete_sp(kvm, sp);
5313 static void __kvm_mmu_free_obsolete_roots(struct kvm *kvm, struct kvm_mmu *mmu)
5315 unsigned long roots_to_free = 0;
5318 if (is_obsolete_root(kvm, mmu->root.hpa))
5319 roots_to_free |= KVM_MMU_ROOT_CURRENT;
5321 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) {
5322 if (is_obsolete_root(kvm, mmu->prev_roots[i].hpa))
5323 roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
5327 kvm_mmu_free_roots(kvm, mmu, roots_to_free);
5330 void kvm_mmu_free_obsolete_roots(struct kvm_vcpu *vcpu)
5332 __kvm_mmu_free_obsolete_roots(vcpu->kvm, &vcpu->arch.root_mmu);
5333 __kvm_mmu_free_obsolete_roots(vcpu->kvm, &vcpu->arch.guest_mmu);
5336 static bool need_remote_flush(u64 old, u64 new)
5338 if (!is_shadow_present_pte(old))
5340 if (!is_shadow_present_pte(new))
5342 if ((old ^ new) & SPTE_BASE_ADDR_MASK)
5344 old ^= shadow_nx_mask;
5345 new ^= shadow_nx_mask;
5346 return (old & ~new & SPTE_PERM_MASK) != 0;
5349 static u64 mmu_pte_write_fetch_gpte(struct kvm_vcpu *vcpu, gpa_t *gpa,
5356 * Assume that the pte write on a page table of the same type
5357 * as the current vcpu paging mode since we update the sptes only
5358 * when they have the same mode.
5360 if (is_pae(vcpu) && *bytes == 4) {
5361 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
5366 if (*bytes == 4 || *bytes == 8) {
5367 r = kvm_vcpu_read_guest_atomic(vcpu, *gpa, &gentry, *bytes);
5376 * If we're seeing too many writes to a page, it may no longer be a page table,
5377 * or we may be forking, in which case it is better to unmap the page.
5379 static bool detect_write_flooding(struct kvm_mmu_page *sp)
5382 * Skip write-flooding detected for the sp whose level is 1, because
5383 * it can become unsync, then the guest page is not write-protected.
5385 if (sp->role.level == PG_LEVEL_4K)
5388 atomic_inc(&sp->write_flooding_count);
5389 return atomic_read(&sp->write_flooding_count) >= 3;
5393 * Misaligned accesses are too much trouble to fix up; also, they usually
5394 * indicate a page is not used as a page table.
5396 static bool detect_write_misaligned(struct kvm_mmu_page *sp, gpa_t gpa,
5399 unsigned offset, pte_size, misaligned;
5401 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
5402 gpa, bytes, sp->role.word);
5404 offset = offset_in_page(gpa);
5405 pte_size = sp->role.has_4_byte_gpte ? 4 : 8;
5408 * Sometimes, the OS only writes the last one bytes to update status
5409 * bits, for example, in linux, andb instruction is used in clear_bit().
5411 if (!(offset & (pte_size - 1)) && bytes == 1)
5414 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
5415 misaligned |= bytes < 4;
5420 static u64 *get_written_sptes(struct kvm_mmu_page *sp, gpa_t gpa, int *nspte)
5422 unsigned page_offset, quadrant;
5426 page_offset = offset_in_page(gpa);
5427 level = sp->role.level;
5429 if (sp->role.has_4_byte_gpte) {
5430 page_offset <<= 1; /* 32->64 */
5432 * A 32-bit pde maps 4MB while the shadow pdes map
5433 * only 2MB. So we need to double the offset again
5434 * and zap two pdes instead of one.
5436 if (level == PT32_ROOT_LEVEL) {
5437 page_offset &= ~7; /* kill rounding error */
5441 quadrant = page_offset >> PAGE_SHIFT;
5442 page_offset &= ~PAGE_MASK;
5443 if (quadrant != sp->role.quadrant)
5447 spte = &sp->spt[page_offset / sizeof(*spte)];
5451 static void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
5452 const u8 *new, int bytes,
5453 struct kvm_page_track_notifier_node *node)
5455 gfn_t gfn = gpa >> PAGE_SHIFT;
5456 struct kvm_mmu_page *sp;
5457 LIST_HEAD(invalid_list);
5458 u64 entry, gentry, *spte;
5463 * If we don't have indirect shadow pages, it means no page is
5464 * write-protected, so we can exit simply.
5466 if (!READ_ONCE(vcpu->kvm->arch.indirect_shadow_pages))
5469 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
5471 write_lock(&vcpu->kvm->mmu_lock);
5473 gentry = mmu_pte_write_fetch_gpte(vcpu, &gpa, &bytes);
5475 ++vcpu->kvm->stat.mmu_pte_write;
5477 for_each_gfn_valid_sp_with_gptes(vcpu->kvm, sp, gfn) {
5478 if (detect_write_misaligned(sp, gpa, bytes) ||
5479 detect_write_flooding(sp)) {
5480 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list);
5481 ++vcpu->kvm->stat.mmu_flooded;
5485 spte = get_written_sptes(sp, gpa, &npte);
5491 mmu_page_zap_pte(vcpu->kvm, sp, spte, NULL);
5492 if (gentry && sp->role.level != PG_LEVEL_4K)
5493 ++vcpu->kvm->stat.mmu_pde_zapped;
5494 if (need_remote_flush(entry, *spte))
5499 kvm_mmu_remote_flush_or_zap(vcpu->kvm, &invalid_list, flush);
5500 write_unlock(&vcpu->kvm->mmu_lock);
5503 int noinline kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u64 error_code,
5504 void *insn, int insn_len)
5506 int r, emulation_type = EMULTYPE_PF;
5507 bool direct = vcpu->arch.mmu->root_role.direct;
5509 if (WARN_ON(!VALID_PAGE(vcpu->arch.mmu->root.hpa)))
5510 return RET_PF_RETRY;
5513 if (unlikely(error_code & PFERR_RSVD_MASK)) {
5514 r = handle_mmio_page_fault(vcpu, cr2_or_gpa, direct);
5515 if (r == RET_PF_EMULATE)
5519 if (r == RET_PF_INVALID) {
5520 r = kvm_mmu_do_page_fault(vcpu, cr2_or_gpa,
5521 lower_32_bits(error_code), false);
5522 if (KVM_BUG_ON(r == RET_PF_INVALID, vcpu->kvm))
5528 if (r != RET_PF_EMULATE)
5532 * Before emulating the instruction, check if the error code
5533 * was due to a RO violation while translating the guest page.
5534 * This can occur when using nested virtualization with nested
5535 * paging in both guests. If true, we simply unprotect the page
5536 * and resume the guest.
5538 if (vcpu->arch.mmu->root_role.direct &&
5539 (error_code & PFERR_NESTED_GUEST_PAGE) == PFERR_NESTED_GUEST_PAGE) {
5540 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(cr2_or_gpa));
5545 * vcpu->arch.mmu.page_fault returned RET_PF_EMULATE, but we can still
5546 * optimistically try to just unprotect the page and let the processor
5547 * re-execute the instruction that caused the page fault. Do not allow
5548 * retrying MMIO emulation, as it's not only pointless but could also
5549 * cause us to enter an infinite loop because the processor will keep
5550 * faulting on the non-existent MMIO address. Retrying an instruction
5551 * from a nested guest is also pointless and dangerous as we are only
5552 * explicitly shadowing L1's page tables, i.e. unprotecting something
5553 * for L1 isn't going to magically fix whatever issue cause L2 to fail.
5555 if (!mmio_info_in_cache(vcpu, cr2_or_gpa, direct) && !is_guest_mode(vcpu))
5556 emulation_type |= EMULTYPE_ALLOW_RETRY_PF;
5558 return x86_emulate_instruction(vcpu, cr2_or_gpa, emulation_type, insn,
5561 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
5563 void kvm_mmu_invalidate_gva(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
5564 gva_t gva, hpa_t root_hpa)
5568 /* It's actually a GPA for vcpu->arch.guest_mmu. */
5569 if (mmu != &vcpu->arch.guest_mmu) {
5570 /* INVLPG on a non-canonical address is a NOP according to the SDM. */
5571 if (is_noncanonical_address(gva, vcpu))
5574 static_call(kvm_x86_flush_tlb_gva)(vcpu, gva);
5580 if (root_hpa == INVALID_PAGE) {
5581 mmu->invlpg(vcpu, gva, mmu->root.hpa);
5584 * INVLPG is required to invalidate any global mappings for the VA,
5585 * irrespective of PCID. Since it would take us roughly similar amount
5586 * of work to determine whether any of the prev_root mappings of the VA
5587 * is marked global, or to just sync it blindly, so we might as well
5588 * just always sync it.
5590 * Mappings not reachable via the current cr3 or the prev_roots will be
5591 * synced when switching to that cr3, so nothing needs to be done here
5594 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
5595 if (VALID_PAGE(mmu->prev_roots[i].hpa))
5596 mmu->invlpg(vcpu, gva, mmu->prev_roots[i].hpa);
5598 mmu->invlpg(vcpu, gva, root_hpa);
5602 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
5604 kvm_mmu_invalidate_gva(vcpu, vcpu->arch.walk_mmu, gva, INVALID_PAGE);
5605 ++vcpu->stat.invlpg;
5607 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
5610 void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid)
5612 struct kvm_mmu *mmu = vcpu->arch.mmu;
5613 bool tlb_flush = false;
5616 if (pcid == kvm_get_active_pcid(vcpu)) {
5618 mmu->invlpg(vcpu, gva, mmu->root.hpa);
5622 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) {
5623 if (VALID_PAGE(mmu->prev_roots[i].hpa) &&
5624 pcid == kvm_get_pcid(vcpu, mmu->prev_roots[i].pgd)) {
5626 mmu->invlpg(vcpu, gva, mmu->prev_roots[i].hpa);
5632 static_call(kvm_x86_flush_tlb_gva)(vcpu, gva);
5634 ++vcpu->stat.invlpg;
5637 * Mappings not reachable via the current cr3 or the prev_roots will be
5638 * synced when switching to that cr3, so nothing needs to be done here
5643 void kvm_configure_mmu(bool enable_tdp, int tdp_forced_root_level,
5644 int tdp_max_root_level, int tdp_huge_page_level)
5646 tdp_enabled = enable_tdp;
5647 tdp_root_level = tdp_forced_root_level;
5648 max_tdp_level = tdp_max_root_level;
5651 * max_huge_page_level reflects KVM's MMU capabilities irrespective
5652 * of kernel support, e.g. KVM may be capable of using 1GB pages when
5653 * the kernel is not. But, KVM never creates a page size greater than
5654 * what is used by the kernel for any given HVA, i.e. the kernel's
5655 * capabilities are ultimately consulted by kvm_mmu_hugepage_adjust().
5658 max_huge_page_level = tdp_huge_page_level;
5659 else if (boot_cpu_has(X86_FEATURE_GBPAGES))
5660 max_huge_page_level = PG_LEVEL_1G;
5662 max_huge_page_level = PG_LEVEL_2M;
5664 EXPORT_SYMBOL_GPL(kvm_configure_mmu);
5666 /* The return value indicates if tlb flush on all vcpus is needed. */
5667 typedef bool (*slot_level_handler) (struct kvm *kvm,
5668 struct kvm_rmap_head *rmap_head,
5669 const struct kvm_memory_slot *slot);
5671 /* The caller should hold mmu-lock before calling this function. */
5672 static __always_inline bool
5673 slot_handle_level_range(struct kvm *kvm, const struct kvm_memory_slot *memslot,
5674 slot_level_handler fn, int start_level, int end_level,
5675 gfn_t start_gfn, gfn_t end_gfn, bool flush_on_yield,
5678 struct slot_rmap_walk_iterator iterator;
5680 for_each_slot_rmap_range(memslot, start_level, end_level, start_gfn,
5681 end_gfn, &iterator) {
5683 flush |= fn(kvm, iterator.rmap, memslot);
5685 if (need_resched() || rwlock_needbreak(&kvm->mmu_lock)) {
5686 if (flush && flush_on_yield) {
5687 kvm_flush_remote_tlbs_with_address(kvm,
5689 iterator.gfn - start_gfn + 1);
5692 cond_resched_rwlock_write(&kvm->mmu_lock);
5699 static __always_inline bool
5700 slot_handle_level(struct kvm *kvm, const struct kvm_memory_slot *memslot,
5701 slot_level_handler fn, int start_level, int end_level,
5702 bool flush_on_yield)
5704 return slot_handle_level_range(kvm, memslot, fn, start_level,
5705 end_level, memslot->base_gfn,
5706 memslot->base_gfn + memslot->npages - 1,
5707 flush_on_yield, false);
5710 static __always_inline bool
5711 slot_handle_level_4k(struct kvm *kvm, const struct kvm_memory_slot *memslot,
5712 slot_level_handler fn, bool flush_on_yield)
5714 return slot_handle_level(kvm, memslot, fn, PG_LEVEL_4K,
5715 PG_LEVEL_4K, flush_on_yield);
5718 static void free_mmu_pages(struct kvm_mmu *mmu)
5720 if (!tdp_enabled && mmu->pae_root)
5721 set_memory_encrypted((unsigned long)mmu->pae_root, 1);
5722 free_page((unsigned long)mmu->pae_root);
5723 free_page((unsigned long)mmu->pml4_root);
5724 free_page((unsigned long)mmu->pml5_root);
5727 static int __kvm_mmu_create(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu)
5732 mmu->root.hpa = INVALID_PAGE;
5734 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
5735 mmu->prev_roots[i] = KVM_MMU_ROOT_INFO_INVALID;
5737 /* vcpu->arch.guest_mmu isn't used when !tdp_enabled. */
5738 if (!tdp_enabled && mmu == &vcpu->arch.guest_mmu)
5742 * When using PAE paging, the four PDPTEs are treated as 'root' pages,
5743 * while the PDP table is a per-vCPU construct that's allocated at MMU
5744 * creation. When emulating 32-bit mode, cr3 is only 32 bits even on
5745 * x86_64. Therefore we need to allocate the PDP table in the first
5746 * 4GB of memory, which happens to fit the DMA32 zone. TDP paging
5747 * generally doesn't use PAE paging and can skip allocating the PDP
5748 * table. The main exception, handled here, is SVM's 32-bit NPT. The
5749 * other exception is for shadowing L1's 32-bit or PAE NPT on 64-bit
5750 * KVM; that horror is handled on-demand by mmu_alloc_special_roots().
5752 if (tdp_enabled && kvm_mmu_get_tdp_level(vcpu) > PT32E_ROOT_LEVEL)
5755 page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_DMA32);
5759 mmu->pae_root = page_address(page);
5762 * CR3 is only 32 bits when PAE paging is used, thus it's impossible to
5763 * get the CPU to treat the PDPTEs as encrypted. Decrypt the page so
5764 * that KVM's writes and the CPU's reads get along. Note, this is
5765 * only necessary when using shadow paging, as 64-bit NPT can get at
5766 * the C-bit even when shadowing 32-bit NPT, and SME isn't supported
5767 * by 32-bit kernels (when KVM itself uses 32-bit NPT).
5770 set_memory_decrypted((unsigned long)mmu->pae_root, 1);
5772 WARN_ON_ONCE(shadow_me_value);
5774 for (i = 0; i < 4; ++i)
5775 mmu->pae_root[i] = INVALID_PAE_ROOT;
5780 int kvm_mmu_create(struct kvm_vcpu *vcpu)
5784 vcpu->arch.mmu_pte_list_desc_cache.kmem_cache = pte_list_desc_cache;
5785 vcpu->arch.mmu_pte_list_desc_cache.gfp_zero = __GFP_ZERO;
5787 vcpu->arch.mmu_page_header_cache.kmem_cache = mmu_page_header_cache;
5788 vcpu->arch.mmu_page_header_cache.gfp_zero = __GFP_ZERO;
5790 vcpu->arch.mmu_shadow_page_cache.gfp_zero = __GFP_ZERO;
5792 vcpu->arch.mmu = &vcpu->arch.root_mmu;
5793 vcpu->arch.walk_mmu = &vcpu->arch.root_mmu;
5795 ret = __kvm_mmu_create(vcpu, &vcpu->arch.guest_mmu);
5799 ret = __kvm_mmu_create(vcpu, &vcpu->arch.root_mmu);
5801 goto fail_allocate_root;
5805 free_mmu_pages(&vcpu->arch.guest_mmu);
5809 #define BATCH_ZAP_PAGES 10
5810 static void kvm_zap_obsolete_pages(struct kvm *kvm)
5812 struct kvm_mmu_page *sp, *node;
5813 int nr_zapped, batch = 0;
5817 list_for_each_entry_safe_reverse(sp, node,
5818 &kvm->arch.active_mmu_pages, link) {
5820 * No obsolete valid page exists before a newly created page
5821 * since active_mmu_pages is a FIFO list.
5823 if (!is_obsolete_sp(kvm, sp))
5827 * Invalid pages should never land back on the list of active
5828 * pages. Skip the bogus page, otherwise we'll get stuck in an
5829 * infinite loop if the page gets put back on the list (again).
5831 if (WARN_ON(sp->role.invalid))
5835 * No need to flush the TLB since we're only zapping shadow
5836 * pages with an obsolete generation number and all vCPUS have
5837 * loaded a new root, i.e. the shadow pages being zapped cannot
5838 * be in active use by the guest.
5840 if (batch >= BATCH_ZAP_PAGES &&
5841 cond_resched_rwlock_write(&kvm->mmu_lock)) {
5846 unstable = __kvm_mmu_prepare_zap_page(kvm, sp,
5847 &kvm->arch.zapped_obsolete_pages, &nr_zapped);
5855 * Kick all vCPUs (via remote TLB flush) before freeing the page tables
5856 * to ensure KVM is not in the middle of a lockless shadow page table
5857 * walk, which may reference the pages. The remote TLB flush itself is
5858 * not required and is simply a convenient way to kick vCPUs as needed.
5859 * KVM performs a local TLB flush when allocating a new root (see
5860 * kvm_mmu_load()), and the reload in the caller ensure no vCPUs are
5861 * running with an obsolete MMU.
5863 kvm_mmu_commit_zap_page(kvm, &kvm->arch.zapped_obsolete_pages);
5867 * Fast invalidate all shadow pages and use lock-break technique
5868 * to zap obsolete pages.
5870 * It's required when memslot is being deleted or VM is being
5871 * destroyed, in these cases, we should ensure that KVM MMU does
5872 * not use any resource of the being-deleted slot or all slots
5873 * after calling the function.
5875 static void kvm_mmu_zap_all_fast(struct kvm *kvm)
5877 lockdep_assert_held(&kvm->slots_lock);
5879 write_lock(&kvm->mmu_lock);
5880 trace_kvm_mmu_zap_all_fast(kvm);
5883 * Toggle mmu_valid_gen between '0' and '1'. Because slots_lock is
5884 * held for the entire duration of zapping obsolete pages, it's
5885 * impossible for there to be multiple invalid generations associated
5886 * with *valid* shadow pages at any given time, i.e. there is exactly
5887 * one valid generation and (at most) one invalid generation.
5889 kvm->arch.mmu_valid_gen = kvm->arch.mmu_valid_gen ? 0 : 1;
5892 * In order to ensure all vCPUs drop their soon-to-be invalid roots,
5893 * invalidating TDP MMU roots must be done while holding mmu_lock for
5894 * write and in the same critical section as making the reload request,
5895 * e.g. before kvm_zap_obsolete_pages() could drop mmu_lock and yield.
5897 if (is_tdp_mmu_enabled(kvm))
5898 kvm_tdp_mmu_invalidate_all_roots(kvm);
5901 * Notify all vcpus to reload its shadow page table and flush TLB.
5902 * Then all vcpus will switch to new shadow page table with the new
5905 * Note: we need to do this under the protection of mmu_lock,
5906 * otherwise, vcpu would purge shadow page but miss tlb flush.
5908 kvm_make_all_cpus_request(kvm, KVM_REQ_MMU_FREE_OBSOLETE_ROOTS);
5910 kvm_zap_obsolete_pages(kvm);
5912 write_unlock(&kvm->mmu_lock);
5915 * Zap the invalidated TDP MMU roots, all SPTEs must be dropped before
5916 * returning to the caller, e.g. if the zap is in response to a memslot
5917 * deletion, mmu_notifier callbacks will be unable to reach the SPTEs
5918 * associated with the deleted memslot once the update completes, and
5919 * Deferring the zap until the final reference to the root is put would
5920 * lead to use-after-free.
5922 if (is_tdp_mmu_enabled(kvm))
5923 kvm_tdp_mmu_zap_invalidated_roots(kvm);
5926 static bool kvm_has_zapped_obsolete_pages(struct kvm *kvm)
5928 return unlikely(!list_empty_careful(&kvm->arch.zapped_obsolete_pages));
5931 static void kvm_mmu_invalidate_zap_pages_in_memslot(struct kvm *kvm,
5932 struct kvm_memory_slot *slot,
5933 struct kvm_page_track_notifier_node *node)
5935 kvm_mmu_zap_all_fast(kvm);
5938 int kvm_mmu_init_vm(struct kvm *kvm)
5940 struct kvm_page_track_notifier_node *node = &kvm->arch.mmu_sp_tracker;
5943 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
5944 INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
5945 INIT_LIST_HEAD(&kvm->arch.lpage_disallowed_mmu_pages);
5946 spin_lock_init(&kvm->arch.mmu_unsync_pages_lock);
5948 r = kvm_mmu_init_tdp_mmu(kvm);
5952 node->track_write = kvm_mmu_pte_write;
5953 node->track_flush_slot = kvm_mmu_invalidate_zap_pages_in_memslot;
5954 kvm_page_track_register_notifier(kvm, node);
5956 kvm->arch.split_page_header_cache.kmem_cache = mmu_page_header_cache;
5957 kvm->arch.split_page_header_cache.gfp_zero = __GFP_ZERO;
5959 kvm->arch.split_shadow_page_cache.gfp_zero = __GFP_ZERO;
5961 kvm->arch.split_desc_cache.kmem_cache = pte_list_desc_cache;
5962 kvm->arch.split_desc_cache.gfp_zero = __GFP_ZERO;
5967 static void mmu_free_vm_memory_caches(struct kvm *kvm)
5969 kvm_mmu_free_memory_cache(&kvm->arch.split_desc_cache);
5970 kvm_mmu_free_memory_cache(&kvm->arch.split_page_header_cache);
5971 kvm_mmu_free_memory_cache(&kvm->arch.split_shadow_page_cache);
5974 void kvm_mmu_uninit_vm(struct kvm *kvm)
5976 struct kvm_page_track_notifier_node *node = &kvm->arch.mmu_sp_tracker;
5978 kvm_page_track_unregister_notifier(kvm, node);
5980 kvm_mmu_uninit_tdp_mmu(kvm);
5982 mmu_free_vm_memory_caches(kvm);
5985 static bool __kvm_zap_rmaps(struct kvm *kvm, gfn_t gfn_start, gfn_t gfn_end)
5987 const struct kvm_memory_slot *memslot;
5988 struct kvm_memslots *slots;
5989 struct kvm_memslot_iter iter;
5994 if (!kvm_memslots_have_rmaps(kvm))
5997 for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
5998 slots = __kvm_memslots(kvm, i);
6000 kvm_for_each_memslot_in_gfn_range(&iter, slots, gfn_start, gfn_end) {
6001 memslot = iter.slot;
6002 start = max(gfn_start, memslot->base_gfn);
6003 end = min(gfn_end, memslot->base_gfn + memslot->npages);
6004 if (WARN_ON_ONCE(start >= end))
6007 flush = slot_handle_level_range(kvm, memslot, kvm_zap_rmapp,
6009 PG_LEVEL_4K, KVM_MAX_HUGEPAGE_LEVEL,
6010 start, end - 1, true, flush);
6018 * Invalidate (zap) SPTEs that cover GFNs from gfn_start and up to gfn_end
6019 * (not including it)
6021 void kvm_zap_gfn_range(struct kvm *kvm, gfn_t gfn_start, gfn_t gfn_end)
6026 if (WARN_ON_ONCE(gfn_end <= gfn_start))
6029 write_lock(&kvm->mmu_lock);
6031 kvm_inc_notifier_count(kvm, gfn_start, gfn_end);
6033 flush = __kvm_zap_rmaps(kvm, gfn_start, gfn_end);
6035 if (is_tdp_mmu_enabled(kvm)) {
6036 for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++)
6037 flush = kvm_tdp_mmu_zap_leafs(kvm, i, gfn_start,
6038 gfn_end, true, flush);
6042 kvm_flush_remote_tlbs_with_address(kvm, gfn_start,
6043 gfn_end - gfn_start);
6045 kvm_dec_notifier_count(kvm, gfn_start, gfn_end);
6047 write_unlock(&kvm->mmu_lock);
6050 static bool slot_rmap_write_protect(struct kvm *kvm,
6051 struct kvm_rmap_head *rmap_head,
6052 const struct kvm_memory_slot *slot)
6054 return rmap_write_protect(rmap_head, false);
6057 void kvm_mmu_slot_remove_write_access(struct kvm *kvm,
6058 const struct kvm_memory_slot *memslot,
6063 if (kvm_memslots_have_rmaps(kvm)) {
6064 write_lock(&kvm->mmu_lock);
6065 flush = slot_handle_level(kvm, memslot, slot_rmap_write_protect,
6066 start_level, KVM_MAX_HUGEPAGE_LEVEL,
6068 write_unlock(&kvm->mmu_lock);
6071 if (is_tdp_mmu_enabled(kvm)) {
6072 read_lock(&kvm->mmu_lock);
6073 flush |= kvm_tdp_mmu_wrprot_slot(kvm, memslot, start_level);
6074 read_unlock(&kvm->mmu_lock);
6078 * Flush TLBs if any SPTEs had to be write-protected to ensure that
6079 * guest writes are reflected in the dirty bitmap before the memslot
6080 * update completes, i.e. before enabling dirty logging is visible to
6083 * Perform the TLB flush outside the mmu_lock to reduce the amount of
6084 * time the lock is held. However, this does mean that another CPU can
6085 * now grab mmu_lock and encounter a write-protected SPTE while CPUs
6086 * still have a writable mapping for the associated GFN in their TLB.
6088 * This is safe but requires KVM to be careful when making decisions
6089 * based on the write-protection status of an SPTE. Specifically, KVM
6090 * also write-protects SPTEs to monitor changes to guest page tables
6091 * during shadow paging, and must guarantee no CPUs can write to those
6092 * page before the lock is dropped. As mentioned in the previous
6093 * paragraph, a write-protected SPTE is no guarantee that CPU cannot
6094 * perform writes. So to determine if a TLB flush is truly required, KVM
6095 * will clear a separate software-only bit (MMU-writable) and skip the
6096 * flush if-and-only-if this bit was already clear.
6098 * See is_writable_pte() for more details.
6101 kvm_arch_flush_remote_tlbs_memslot(kvm, memslot);
6104 static inline bool need_topup(struct kvm_mmu_memory_cache *cache, int min)
6106 return kvm_mmu_memory_cache_nr_free_objects(cache) < min;
6109 static bool need_topup_split_caches_or_resched(struct kvm *kvm)
6111 if (need_resched() || rwlock_needbreak(&kvm->mmu_lock))
6115 * In the worst case, SPLIT_DESC_CACHE_MIN_NR_OBJECTS descriptors are needed
6116 * to split a single huge page. Calculating how many are actually needed
6117 * is possible but not worth the complexity.
6119 return need_topup(&kvm->arch.split_desc_cache, SPLIT_DESC_CACHE_MIN_NR_OBJECTS) ||
6120 need_topup(&kvm->arch.split_page_header_cache, 1) ||
6121 need_topup(&kvm->arch.split_shadow_page_cache, 1);
6124 static int topup_split_caches(struct kvm *kvm)
6127 * Allocating rmap list entries when splitting huge pages for nested
6128 * MMUs is uncommon as KVM needs to use a list if and only if there is
6129 * more than one rmap entry for a gfn, i.e. requires an L1 gfn to be
6130 * aliased by multiple L2 gfns and/or from multiple nested roots with
6131 * different roles. Aliasing gfns when using TDP is atypical for VMMs;
6132 * a few gfns are often aliased during boot, e.g. when remapping BIOS,
6133 * but aliasing rarely occurs post-boot or for many gfns. If there is
6134 * only one rmap entry, rmap->val points directly at that one entry and
6135 * doesn't need to allocate a list. Buffer the cache by the default
6136 * capacity so that KVM doesn't have to drop mmu_lock to topup if KVM
6137 * encounters an aliased gfn or two.
6139 const int capacity = SPLIT_DESC_CACHE_MIN_NR_OBJECTS +
6140 KVM_ARCH_NR_OBJS_PER_MEMORY_CACHE;
6143 lockdep_assert_held(&kvm->slots_lock);
6145 r = __kvm_mmu_topup_memory_cache(&kvm->arch.split_desc_cache, capacity,
6146 SPLIT_DESC_CACHE_MIN_NR_OBJECTS);
6150 r = kvm_mmu_topup_memory_cache(&kvm->arch.split_page_header_cache, 1);
6154 return kvm_mmu_topup_memory_cache(&kvm->arch.split_shadow_page_cache, 1);
6157 static struct kvm_mmu_page *shadow_mmu_get_sp_for_split(struct kvm *kvm, u64 *huge_sptep)
6159 struct kvm_mmu_page *huge_sp = sptep_to_sp(huge_sptep);
6160 struct shadow_page_caches caches = {};
6161 union kvm_mmu_page_role role;
6162 unsigned int access;
6165 gfn = kvm_mmu_page_get_gfn(huge_sp, spte_index(huge_sptep));
6166 access = kvm_mmu_page_get_access(huge_sp, spte_index(huge_sptep));
6169 * Note, huge page splitting always uses direct shadow pages, regardless
6170 * of whether the huge page itself is mapped by a direct or indirect
6171 * shadow page, since the huge page region itself is being directly
6172 * mapped with smaller pages.
6174 role = kvm_mmu_child_role(huge_sptep, /*direct=*/true, access);
6176 /* Direct SPs do not require a shadowed_info_cache. */
6177 caches.page_header_cache = &kvm->arch.split_page_header_cache;
6178 caches.shadow_page_cache = &kvm->arch.split_shadow_page_cache;
6180 /* Safe to pass NULL for vCPU since requesting a direct SP. */
6181 return __kvm_mmu_get_shadow_page(kvm, NULL, &caches, gfn, role);
6184 static void shadow_mmu_split_huge_page(struct kvm *kvm,
6185 const struct kvm_memory_slot *slot,
6189 struct kvm_mmu_memory_cache *cache = &kvm->arch.split_desc_cache;
6190 u64 huge_spte = READ_ONCE(*huge_sptep);
6191 struct kvm_mmu_page *sp;
6197 sp = shadow_mmu_get_sp_for_split(kvm, huge_sptep);
6199 for (index = 0; index < SPTE_ENT_PER_PAGE; index++) {
6200 sptep = &sp->spt[index];
6201 gfn = kvm_mmu_page_get_gfn(sp, index);
6204 * The SP may already have populated SPTEs, e.g. if this huge
6205 * page is aliased by multiple sptes with the same access
6206 * permissions. These entries are guaranteed to map the same
6207 * gfn-to-pfn translation since the SP is direct, so no need to
6210 * However, if a given SPTE points to a lower level page table,
6211 * that lower level page table may only be partially populated.
6212 * Installing such SPTEs would effectively unmap a potion of the
6213 * huge page. Unmapping guest memory always requires a TLB flush
6214 * since a subsequent operation on the unmapped regions would
6215 * fail to detect the need to flush.
6217 if (is_shadow_present_pte(*sptep)) {
6218 flush |= !is_last_spte(*sptep, sp->role.level);
6222 spte = make_huge_page_split_spte(kvm, huge_spte, sp->role, index);
6223 mmu_spte_set(sptep, spte);
6224 __rmap_add(kvm, cache, slot, sptep, gfn, sp->role.access);
6227 __link_shadow_page(kvm, cache, huge_sptep, sp, flush);
6230 static int shadow_mmu_try_split_huge_page(struct kvm *kvm,
6231 const struct kvm_memory_slot *slot,
6234 struct kvm_mmu_page *huge_sp = sptep_to_sp(huge_sptep);
6239 /* Grab information for the tracepoint before dropping the MMU lock. */
6240 gfn = kvm_mmu_page_get_gfn(huge_sp, spte_index(huge_sptep));
6241 level = huge_sp->role.level;
6244 if (kvm_mmu_available_pages(kvm) <= KVM_MIN_FREE_MMU_PAGES) {
6249 if (need_topup_split_caches_or_resched(kvm)) {
6250 write_unlock(&kvm->mmu_lock);
6253 * If the topup succeeds, return -EAGAIN to indicate that the
6254 * rmap iterator should be restarted because the MMU lock was
6257 r = topup_split_caches(kvm) ?: -EAGAIN;
6258 write_lock(&kvm->mmu_lock);
6262 shadow_mmu_split_huge_page(kvm, slot, huge_sptep);
6265 trace_kvm_mmu_split_huge_page(gfn, spte, level, r);
6269 static bool shadow_mmu_try_split_huge_pages(struct kvm *kvm,
6270 struct kvm_rmap_head *rmap_head,
6271 const struct kvm_memory_slot *slot)
6273 struct rmap_iterator iter;
6274 struct kvm_mmu_page *sp;
6279 for_each_rmap_spte(rmap_head, &iter, huge_sptep) {
6280 sp = sptep_to_sp(huge_sptep);
6282 /* TDP MMU is enabled, so rmap only contains nested MMU SPs. */
6283 if (WARN_ON_ONCE(!sp->role.guest_mode))
6286 /* The rmaps should never contain non-leaf SPTEs. */
6287 if (WARN_ON_ONCE(!is_large_pte(*huge_sptep)))
6290 /* SPs with level >PG_LEVEL_4K should never by unsync. */
6291 if (WARN_ON_ONCE(sp->unsync))
6294 /* Don't bother splitting huge pages on invalid SPs. */
6295 if (sp->role.invalid)
6298 r = shadow_mmu_try_split_huge_page(kvm, slot, huge_sptep);
6301 * The split succeeded or needs to be retried because the MMU
6302 * lock was dropped. Either way, restart the iterator to get it
6303 * back into a consistent state.
6305 if (!r || r == -EAGAIN)
6308 /* The split failed and shouldn't be retried (e.g. -ENOMEM). */
6315 static void kvm_shadow_mmu_try_split_huge_pages(struct kvm *kvm,
6316 const struct kvm_memory_slot *slot,
6317 gfn_t start, gfn_t end,
6323 * Split huge pages starting with KVM_MAX_HUGEPAGE_LEVEL and working
6324 * down to the target level. This ensures pages are recursively split
6325 * all the way to the target level. There's no need to split pages
6326 * already at the target level.
6328 for (level = KVM_MAX_HUGEPAGE_LEVEL; level > target_level; level--) {
6329 slot_handle_level_range(kvm, slot, shadow_mmu_try_split_huge_pages,
6330 level, level, start, end - 1, true, false);
6334 /* Must be called with the mmu_lock held in write-mode. */
6335 void kvm_mmu_try_split_huge_pages(struct kvm *kvm,
6336 const struct kvm_memory_slot *memslot,
6340 if (!is_tdp_mmu_enabled(kvm))
6343 if (kvm_memslots_have_rmaps(kvm))
6344 kvm_shadow_mmu_try_split_huge_pages(kvm, memslot, start, end, target_level);
6346 kvm_tdp_mmu_try_split_huge_pages(kvm, memslot, start, end, target_level, false);
6349 * A TLB flush is unnecessary at this point for the same resons as in
6350 * kvm_mmu_slot_try_split_huge_pages().
6354 void kvm_mmu_slot_try_split_huge_pages(struct kvm *kvm,
6355 const struct kvm_memory_slot *memslot,
6358 u64 start = memslot->base_gfn;
6359 u64 end = start + memslot->npages;
6361 if (!is_tdp_mmu_enabled(kvm))
6364 if (kvm_memslots_have_rmaps(kvm)) {
6365 write_lock(&kvm->mmu_lock);
6366 kvm_shadow_mmu_try_split_huge_pages(kvm, memslot, start, end, target_level);
6367 write_unlock(&kvm->mmu_lock);
6370 read_lock(&kvm->mmu_lock);
6371 kvm_tdp_mmu_try_split_huge_pages(kvm, memslot, start, end, target_level, true);
6372 read_unlock(&kvm->mmu_lock);
6375 * No TLB flush is necessary here. KVM will flush TLBs after
6376 * write-protecting and/or clearing dirty on the newly split SPTEs to
6377 * ensure that guest writes are reflected in the dirty log before the
6378 * ioctl to enable dirty logging on this memslot completes. Since the
6379 * split SPTEs retain the write and dirty bits of the huge SPTE, it is
6380 * safe for KVM to decide if a TLB flush is necessary based on the split
6385 static bool kvm_mmu_zap_collapsible_spte(struct kvm *kvm,
6386 struct kvm_rmap_head *rmap_head,
6387 const struct kvm_memory_slot *slot)
6390 struct rmap_iterator iter;
6391 int need_tlb_flush = 0;
6393 struct kvm_mmu_page *sp;
6396 for_each_rmap_spte(rmap_head, &iter, sptep) {
6397 sp = sptep_to_sp(sptep);
6398 pfn = spte_to_pfn(*sptep);
6401 * We cannot do huge page mapping for indirect shadow pages,
6402 * which are found on the last rmap (level = 1) when not using
6403 * tdp; such shadow pages are synced with the page table in
6404 * the guest, and the guest page table is using 4K page size
6405 * mapping if the indirect sp has level = 1.
6407 if (sp->role.direct &&
6408 sp->role.level < kvm_mmu_max_mapping_level(kvm, slot, sp->gfn,
6409 pfn, PG_LEVEL_NUM)) {
6410 pte_list_remove(kvm, rmap_head, sptep);
6412 if (kvm_available_flush_tlb_with_range())
6413 kvm_flush_remote_tlbs_with_address(kvm, sp->gfn,
6414 KVM_PAGES_PER_HPAGE(sp->role.level));
6422 return need_tlb_flush;
6425 static void kvm_rmap_zap_collapsible_sptes(struct kvm *kvm,
6426 const struct kvm_memory_slot *slot)
6429 * Note, use KVM_MAX_HUGEPAGE_LEVEL - 1 since there's no need to zap
6430 * pages that are already mapped at the maximum hugepage level.
6432 if (slot_handle_level(kvm, slot, kvm_mmu_zap_collapsible_spte,
6433 PG_LEVEL_4K, KVM_MAX_HUGEPAGE_LEVEL - 1, true))
6434 kvm_arch_flush_remote_tlbs_memslot(kvm, slot);
6437 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm,
6438 const struct kvm_memory_slot *slot)
6440 if (kvm_memslots_have_rmaps(kvm)) {
6441 write_lock(&kvm->mmu_lock);
6442 kvm_rmap_zap_collapsible_sptes(kvm, slot);
6443 write_unlock(&kvm->mmu_lock);
6446 if (is_tdp_mmu_enabled(kvm)) {
6447 read_lock(&kvm->mmu_lock);
6448 kvm_tdp_mmu_zap_collapsible_sptes(kvm, slot);
6449 read_unlock(&kvm->mmu_lock);
6453 void kvm_arch_flush_remote_tlbs_memslot(struct kvm *kvm,
6454 const struct kvm_memory_slot *memslot)
6457 * All current use cases for flushing the TLBs for a specific memslot
6458 * related to dirty logging, and many do the TLB flush out of mmu_lock.
6459 * The interaction between the various operations on memslot must be
6460 * serialized by slots_locks to ensure the TLB flush from one operation
6461 * is observed by any other operation on the same memslot.
6463 lockdep_assert_held(&kvm->slots_lock);
6464 kvm_flush_remote_tlbs_with_address(kvm, memslot->base_gfn,
6468 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm,
6469 const struct kvm_memory_slot *memslot)
6473 if (kvm_memslots_have_rmaps(kvm)) {
6474 write_lock(&kvm->mmu_lock);
6476 * Clear dirty bits only on 4k SPTEs since the legacy MMU only
6477 * support dirty logging at a 4k granularity.
6479 flush = slot_handle_level_4k(kvm, memslot, __rmap_clear_dirty, false);
6480 write_unlock(&kvm->mmu_lock);
6483 if (is_tdp_mmu_enabled(kvm)) {
6484 read_lock(&kvm->mmu_lock);
6485 flush |= kvm_tdp_mmu_clear_dirty_slot(kvm, memslot);
6486 read_unlock(&kvm->mmu_lock);
6490 * It's also safe to flush TLBs out of mmu lock here as currently this
6491 * function is only used for dirty logging, in which case flushing TLB
6492 * out of mmu lock also guarantees no dirty pages will be lost in
6496 kvm_arch_flush_remote_tlbs_memslot(kvm, memslot);
6499 void kvm_mmu_zap_all(struct kvm *kvm)
6501 struct kvm_mmu_page *sp, *node;
6502 LIST_HEAD(invalid_list);
6505 write_lock(&kvm->mmu_lock);
6507 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link) {
6508 if (WARN_ON(sp->role.invalid))
6510 if (__kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list, &ign))
6512 if (cond_resched_rwlock_write(&kvm->mmu_lock))
6516 kvm_mmu_commit_zap_page(kvm, &invalid_list);
6518 if (is_tdp_mmu_enabled(kvm))
6519 kvm_tdp_mmu_zap_all(kvm);
6521 write_unlock(&kvm->mmu_lock);
6524 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, u64 gen)
6526 WARN_ON(gen & KVM_MEMSLOT_GEN_UPDATE_IN_PROGRESS);
6528 gen &= MMIO_SPTE_GEN_MASK;
6531 * Generation numbers are incremented in multiples of the number of
6532 * address spaces in order to provide unique generations across all
6533 * address spaces. Strip what is effectively the address space
6534 * modifier prior to checking for a wrap of the MMIO generation so
6535 * that a wrap in any address space is detected.
6537 gen &= ~((u64)KVM_ADDRESS_SPACE_NUM - 1);
6540 * The very rare case: if the MMIO generation number has wrapped,
6541 * zap all shadow pages.
6543 if (unlikely(gen == 0)) {
6544 kvm_debug_ratelimited("kvm: zapping shadow pages for mmio generation wraparound\n");
6545 kvm_mmu_zap_all_fast(kvm);
6549 static unsigned long
6550 mmu_shrink_scan(struct shrinker *shrink, struct shrink_control *sc)
6553 int nr_to_scan = sc->nr_to_scan;
6554 unsigned long freed = 0;
6556 mutex_lock(&kvm_lock);
6558 list_for_each_entry(kvm, &vm_list, vm_list) {
6560 LIST_HEAD(invalid_list);
6563 * Never scan more than sc->nr_to_scan VM instances.
6564 * Will not hit this condition practically since we do not try
6565 * to shrink more than one VM and it is very unlikely to see
6566 * !n_used_mmu_pages so many times.
6571 * n_used_mmu_pages is accessed without holding kvm->mmu_lock
6572 * here. We may skip a VM instance errorneosly, but we do not
6573 * want to shrink a VM that only started to populate its MMU
6576 if (!kvm->arch.n_used_mmu_pages &&
6577 !kvm_has_zapped_obsolete_pages(kvm))
6580 idx = srcu_read_lock(&kvm->srcu);
6581 write_lock(&kvm->mmu_lock);
6583 if (kvm_has_zapped_obsolete_pages(kvm)) {
6584 kvm_mmu_commit_zap_page(kvm,
6585 &kvm->arch.zapped_obsolete_pages);
6589 freed = kvm_mmu_zap_oldest_mmu_pages(kvm, sc->nr_to_scan);
6592 write_unlock(&kvm->mmu_lock);
6593 srcu_read_unlock(&kvm->srcu, idx);
6596 * unfair on small ones
6597 * per-vm shrinkers cry out
6598 * sadness comes quickly
6600 list_move_tail(&kvm->vm_list, &vm_list);
6604 mutex_unlock(&kvm_lock);
6608 static unsigned long
6609 mmu_shrink_count(struct shrinker *shrink, struct shrink_control *sc)
6611 return percpu_counter_read_positive(&kvm_total_used_mmu_pages);
6614 static struct shrinker mmu_shrinker = {
6615 .count_objects = mmu_shrink_count,
6616 .scan_objects = mmu_shrink_scan,
6617 .seeks = DEFAULT_SEEKS * 10,
6620 static void mmu_destroy_caches(void)
6622 kmem_cache_destroy(pte_list_desc_cache);
6623 kmem_cache_destroy(mmu_page_header_cache);
6626 static bool get_nx_auto_mode(void)
6628 /* Return true when CPU has the bug, and mitigations are ON */
6629 return boot_cpu_has_bug(X86_BUG_ITLB_MULTIHIT) && !cpu_mitigations_off();
6632 static void __set_nx_huge_pages(bool val)
6634 nx_huge_pages = itlb_multihit_kvm_mitigation = val;
6637 static int set_nx_huge_pages(const char *val, const struct kernel_param *kp)
6639 bool old_val = nx_huge_pages;
6642 /* In "auto" mode deploy workaround only if CPU has the bug. */
6643 if (sysfs_streq(val, "off"))
6645 else if (sysfs_streq(val, "force"))
6647 else if (sysfs_streq(val, "auto"))
6648 new_val = get_nx_auto_mode();
6649 else if (strtobool(val, &new_val) < 0)
6652 __set_nx_huge_pages(new_val);
6654 if (new_val != old_val) {
6657 mutex_lock(&kvm_lock);
6659 list_for_each_entry(kvm, &vm_list, vm_list) {
6660 mutex_lock(&kvm->slots_lock);
6661 kvm_mmu_zap_all_fast(kvm);
6662 mutex_unlock(&kvm->slots_lock);
6664 wake_up_process(kvm->arch.nx_lpage_recovery_thread);
6666 mutex_unlock(&kvm_lock);
6673 * nx_huge_pages needs to be resolved to true/false when kvm.ko is loaded, as
6674 * its default value of -1 is technically undefined behavior for a boolean.
6676 void kvm_mmu_x86_module_init(void)
6678 if (nx_huge_pages == -1)
6679 __set_nx_huge_pages(get_nx_auto_mode());
6683 * The bulk of the MMU initialization is deferred until the vendor module is
6684 * loaded as many of the masks/values may be modified by VMX or SVM, i.e. need
6685 * to be reset when a potentially different vendor module is loaded.
6687 int kvm_mmu_vendor_module_init(void)
6692 * MMU roles use union aliasing which is, generally speaking, an
6693 * undefined behavior. However, we supposedly know how compilers behave
6694 * and the current status quo is unlikely to change. Guardians below are
6695 * supposed to let us know if the assumption becomes false.
6697 BUILD_BUG_ON(sizeof(union kvm_mmu_page_role) != sizeof(u32));
6698 BUILD_BUG_ON(sizeof(union kvm_mmu_extended_role) != sizeof(u32));
6699 BUILD_BUG_ON(sizeof(union kvm_cpu_role) != sizeof(u64));
6701 kvm_mmu_reset_all_pte_masks();
6703 pte_list_desc_cache = kmem_cache_create("pte_list_desc",
6704 sizeof(struct pte_list_desc),
6705 0, SLAB_ACCOUNT, NULL);
6706 if (!pte_list_desc_cache)
6709 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
6710 sizeof(struct kvm_mmu_page),
6711 0, SLAB_ACCOUNT, NULL);
6712 if (!mmu_page_header_cache)
6715 if (percpu_counter_init(&kvm_total_used_mmu_pages, 0, GFP_KERNEL))
6718 ret = register_shrinker(&mmu_shrinker);
6725 mmu_destroy_caches();
6729 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
6731 kvm_mmu_unload(vcpu);
6732 free_mmu_pages(&vcpu->arch.root_mmu);
6733 free_mmu_pages(&vcpu->arch.guest_mmu);
6734 mmu_free_memory_caches(vcpu);
6737 void kvm_mmu_vendor_module_exit(void)
6739 mmu_destroy_caches();
6740 percpu_counter_destroy(&kvm_total_used_mmu_pages);
6741 unregister_shrinker(&mmu_shrinker);
6745 * Calculate the effective recovery period, accounting for '0' meaning "let KVM
6746 * select a halving time of 1 hour". Returns true if recovery is enabled.
6748 static bool calc_nx_huge_pages_recovery_period(uint *period)
6751 * Use READ_ONCE to get the params, this may be called outside of the
6752 * param setters, e.g. by the kthread to compute its next timeout.
6754 bool enabled = READ_ONCE(nx_huge_pages);
6755 uint ratio = READ_ONCE(nx_huge_pages_recovery_ratio);
6757 if (!enabled || !ratio)
6760 *period = READ_ONCE(nx_huge_pages_recovery_period_ms);
6762 /* Make sure the period is not less than one second. */
6763 ratio = min(ratio, 3600u);
6764 *period = 60 * 60 * 1000 / ratio;
6769 static int set_nx_huge_pages_recovery_param(const char *val, const struct kernel_param *kp)
6771 bool was_recovery_enabled, is_recovery_enabled;
6772 uint old_period, new_period;
6775 was_recovery_enabled = calc_nx_huge_pages_recovery_period(&old_period);
6777 err = param_set_uint(val, kp);
6781 is_recovery_enabled = calc_nx_huge_pages_recovery_period(&new_period);
6783 if (is_recovery_enabled &&
6784 (!was_recovery_enabled || old_period > new_period)) {
6787 mutex_lock(&kvm_lock);
6789 list_for_each_entry(kvm, &vm_list, vm_list)
6790 wake_up_process(kvm->arch.nx_lpage_recovery_thread);
6792 mutex_unlock(&kvm_lock);
6798 static void kvm_recover_nx_lpages(struct kvm *kvm)
6800 unsigned long nx_lpage_splits = kvm->stat.nx_lpage_splits;
6802 struct kvm_mmu_page *sp;
6804 LIST_HEAD(invalid_list);
6808 rcu_idx = srcu_read_lock(&kvm->srcu);
6809 write_lock(&kvm->mmu_lock);
6812 * Zapping TDP MMU shadow pages, including the remote TLB flush, must
6813 * be done under RCU protection, because the pages are freed via RCU
6818 ratio = READ_ONCE(nx_huge_pages_recovery_ratio);
6819 to_zap = ratio ? DIV_ROUND_UP(nx_lpage_splits, ratio) : 0;
6820 for ( ; to_zap; --to_zap) {
6821 if (list_empty(&kvm->arch.lpage_disallowed_mmu_pages))
6825 * We use a separate list instead of just using active_mmu_pages
6826 * because the number of lpage_disallowed pages is expected to
6827 * be relatively small compared to the total.
6829 sp = list_first_entry(&kvm->arch.lpage_disallowed_mmu_pages,
6830 struct kvm_mmu_page,
6831 lpage_disallowed_link);
6832 WARN_ON_ONCE(!sp->lpage_disallowed);
6833 if (is_tdp_mmu_page(sp)) {
6834 flush |= kvm_tdp_mmu_zap_sp(kvm, sp);
6836 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
6837 WARN_ON_ONCE(sp->lpage_disallowed);
6840 if (need_resched() || rwlock_needbreak(&kvm->mmu_lock)) {
6841 kvm_mmu_remote_flush_or_zap(kvm, &invalid_list, flush);
6844 cond_resched_rwlock_write(&kvm->mmu_lock);
6850 kvm_mmu_remote_flush_or_zap(kvm, &invalid_list, flush);
6854 write_unlock(&kvm->mmu_lock);
6855 srcu_read_unlock(&kvm->srcu, rcu_idx);
6858 static long get_nx_lpage_recovery_timeout(u64 start_time)
6863 enabled = calc_nx_huge_pages_recovery_period(&period);
6865 return enabled ? start_time + msecs_to_jiffies(period) - get_jiffies_64()
6866 : MAX_SCHEDULE_TIMEOUT;
6869 static int kvm_nx_lpage_recovery_worker(struct kvm *kvm, uintptr_t data)
6872 long remaining_time;
6875 start_time = get_jiffies_64();
6876 remaining_time = get_nx_lpage_recovery_timeout(start_time);
6878 set_current_state(TASK_INTERRUPTIBLE);
6879 while (!kthread_should_stop() && remaining_time > 0) {
6880 schedule_timeout(remaining_time);
6881 remaining_time = get_nx_lpage_recovery_timeout(start_time);
6882 set_current_state(TASK_INTERRUPTIBLE);
6885 set_current_state(TASK_RUNNING);
6887 if (kthread_should_stop())
6890 kvm_recover_nx_lpages(kvm);
6894 int kvm_mmu_post_init_vm(struct kvm *kvm)
6898 err = kvm_vm_create_worker_thread(kvm, kvm_nx_lpage_recovery_worker, 0,
6899 "kvm-nx-lpage-recovery",
6900 &kvm->arch.nx_lpage_recovery_thread);
6902 kthread_unpark(kvm->arch.nx_lpage_recovery_thread);
6907 void kvm_mmu_pre_destroy_vm(struct kvm *kvm)
6909 if (kvm->arch.nx_lpage_recovery_thread)
6910 kthread_stop(kvm->arch.nx_lpage_recovery_thread);