1 // SPDX-License-Identifier: GPL-2.0-only
3 * Kernel-based Virtual Machine driver for Linux
5 * This module enables machines with Intel VT-x extensions to run virtual
6 * machines without emulation or binary translation.
10 * Copyright (C) 2006 Qumranet, Inc.
11 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
14 * Yaniv Kamay <yaniv@qumranet.com>
15 * Avi Kivity <avi@qumranet.com>
21 #include "mmu_internal.h"
24 #include "kvm_cache_regs.h"
25 #include "kvm_emulate.h"
29 #include <linux/kvm_host.h>
30 #include <linux/types.h>
31 #include <linux/string.h>
33 #include <linux/highmem.h>
34 #include <linux/moduleparam.h>
35 #include <linux/export.h>
36 #include <linux/swap.h>
37 #include <linux/hugetlb.h>
38 #include <linux/compiler.h>
39 #include <linux/srcu.h>
40 #include <linux/slab.h>
41 #include <linux/sched/signal.h>
42 #include <linux/uaccess.h>
43 #include <linux/hash.h>
44 #include <linux/kern_levels.h>
45 #include <linux/kthread.h>
48 #include <asm/memtype.h>
49 #include <asm/cmpxchg.h>
51 #include <asm/set_memory.h>
53 #include <asm/kvm_page_track.h>
56 extern bool itlb_multihit_kvm_mitigation;
58 int __read_mostly nx_huge_pages = -1;
59 static uint __read_mostly nx_huge_pages_recovery_period_ms;
60 #ifdef CONFIG_PREEMPT_RT
61 /* Recovery can cause latency spikes, disable it for PREEMPT_RT. */
62 static uint __read_mostly nx_huge_pages_recovery_ratio = 0;
64 static uint __read_mostly nx_huge_pages_recovery_ratio = 60;
67 static int set_nx_huge_pages(const char *val, const struct kernel_param *kp);
68 static int set_nx_huge_pages_recovery_param(const char *val, const struct kernel_param *kp);
70 static const struct kernel_param_ops nx_huge_pages_ops = {
71 .set = set_nx_huge_pages,
72 .get = param_get_bool,
75 static const struct kernel_param_ops nx_huge_pages_recovery_param_ops = {
76 .set = set_nx_huge_pages_recovery_param,
77 .get = param_get_uint,
80 module_param_cb(nx_huge_pages, &nx_huge_pages_ops, &nx_huge_pages, 0644);
81 __MODULE_PARM_TYPE(nx_huge_pages, "bool");
82 module_param_cb(nx_huge_pages_recovery_ratio, &nx_huge_pages_recovery_param_ops,
83 &nx_huge_pages_recovery_ratio, 0644);
84 __MODULE_PARM_TYPE(nx_huge_pages_recovery_ratio, "uint");
85 module_param_cb(nx_huge_pages_recovery_period_ms, &nx_huge_pages_recovery_param_ops,
86 &nx_huge_pages_recovery_period_ms, 0644);
87 __MODULE_PARM_TYPE(nx_huge_pages_recovery_period_ms, "uint");
89 static bool __read_mostly force_flush_and_sync_on_reuse;
90 module_param_named(flush_on_reuse, force_flush_and_sync_on_reuse, bool, 0644);
93 * When setting this variable to true it enables Two-Dimensional-Paging
94 * where the hardware walks 2 page tables:
95 * 1. the guest-virtual to guest-physical
96 * 2. while doing 1. it walks guest-physical to host-physical
97 * If the hardware supports that we don't need to do shadow paging.
99 bool tdp_enabled = false;
101 static int max_huge_page_level __read_mostly;
102 static int tdp_root_level __read_mostly;
103 static int max_tdp_level __read_mostly;
107 module_param(dbg, bool, 0644);
110 #define PTE_PREFETCH_NUM 8
112 #include <trace/events/kvm.h>
114 /* make pte_list_desc fit well in cache lines */
115 #define PTE_LIST_EXT 14
118 * Slight optimization of cacheline layout, by putting `more' and `spte_count'
119 * at the start; then accessing it will only use one single cacheline for
120 * either full (entries==PTE_LIST_EXT) case or entries<=6.
122 struct pte_list_desc {
123 struct pte_list_desc *more;
125 * Stores number of entries stored in the pte_list_desc. No need to be
126 * u64 but just for easier alignment. When PTE_LIST_EXT, means full.
129 u64 *sptes[PTE_LIST_EXT];
132 struct kvm_shadow_walk_iterator {
140 #define for_each_shadow_entry_using_root(_vcpu, _root, _addr, _walker) \
141 for (shadow_walk_init_using_root(&(_walker), (_vcpu), \
143 shadow_walk_okay(&(_walker)); \
144 shadow_walk_next(&(_walker)))
146 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
147 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
148 shadow_walk_okay(&(_walker)); \
149 shadow_walk_next(&(_walker)))
151 #define for_each_shadow_entry_lockless(_vcpu, _addr, _walker, spte) \
152 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
153 shadow_walk_okay(&(_walker)) && \
154 ({ spte = mmu_spte_get_lockless(_walker.sptep); 1; }); \
155 __shadow_walk_next(&(_walker), spte))
157 static struct kmem_cache *pte_list_desc_cache;
158 struct kmem_cache *mmu_page_header_cache;
159 static struct percpu_counter kvm_total_used_mmu_pages;
161 static void mmu_spte_set(u64 *sptep, u64 spte);
163 struct kvm_mmu_role_regs {
164 const unsigned long cr0;
165 const unsigned long cr4;
169 #define CREATE_TRACE_POINTS
170 #include "mmutrace.h"
173 * Yes, lot's of underscores. They're a hint that you probably shouldn't be
174 * reading from the role_regs. Once the root_role is constructed, it becomes
175 * the single source of truth for the MMU's state.
177 #define BUILD_MMU_ROLE_REGS_ACCESSOR(reg, name, flag) \
178 static inline bool __maybe_unused \
179 ____is_##reg##_##name(const struct kvm_mmu_role_regs *regs) \
181 return !!(regs->reg & flag); \
183 BUILD_MMU_ROLE_REGS_ACCESSOR(cr0, pg, X86_CR0_PG);
184 BUILD_MMU_ROLE_REGS_ACCESSOR(cr0, wp, X86_CR0_WP);
185 BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, pse, X86_CR4_PSE);
186 BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, pae, X86_CR4_PAE);
187 BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, smep, X86_CR4_SMEP);
188 BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, smap, X86_CR4_SMAP);
189 BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, pke, X86_CR4_PKE);
190 BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, la57, X86_CR4_LA57);
191 BUILD_MMU_ROLE_REGS_ACCESSOR(efer, nx, EFER_NX);
192 BUILD_MMU_ROLE_REGS_ACCESSOR(efer, lma, EFER_LMA);
195 * The MMU itself (with a valid role) is the single source of truth for the
196 * MMU. Do not use the regs used to build the MMU/role, nor the vCPU. The
197 * regs don't account for dependencies, e.g. clearing CR4 bits if CR0.PG=1,
198 * and the vCPU may be incorrect/irrelevant.
200 #define BUILD_MMU_ROLE_ACCESSOR(base_or_ext, reg, name) \
201 static inline bool __maybe_unused is_##reg##_##name(struct kvm_mmu *mmu) \
203 return !!(mmu->cpu_role. base_or_ext . reg##_##name); \
205 BUILD_MMU_ROLE_ACCESSOR(base, cr0, wp);
206 BUILD_MMU_ROLE_ACCESSOR(ext, cr4, pse);
207 BUILD_MMU_ROLE_ACCESSOR(ext, cr4, smep);
208 BUILD_MMU_ROLE_ACCESSOR(ext, cr4, smap);
209 BUILD_MMU_ROLE_ACCESSOR(ext, cr4, pke);
210 BUILD_MMU_ROLE_ACCESSOR(ext, cr4, la57);
211 BUILD_MMU_ROLE_ACCESSOR(base, efer, nx);
212 BUILD_MMU_ROLE_ACCESSOR(ext, efer, lma);
214 static inline bool is_cr0_pg(struct kvm_mmu *mmu)
216 return mmu->cpu_role.base.level > 0;
219 static inline bool is_cr4_pae(struct kvm_mmu *mmu)
221 return !mmu->cpu_role.base.has_4_byte_gpte;
224 static struct kvm_mmu_role_regs vcpu_to_role_regs(struct kvm_vcpu *vcpu)
226 struct kvm_mmu_role_regs regs = {
227 .cr0 = kvm_read_cr0_bits(vcpu, KVM_MMU_CR0_ROLE_BITS),
228 .cr4 = kvm_read_cr4_bits(vcpu, KVM_MMU_CR4_ROLE_BITS),
229 .efer = vcpu->arch.efer,
235 static inline bool kvm_available_flush_tlb_with_range(void)
237 return kvm_x86_ops.tlb_remote_flush_with_range;
240 static void kvm_flush_remote_tlbs_with_range(struct kvm *kvm,
241 struct kvm_tlb_range *range)
245 if (range && kvm_x86_ops.tlb_remote_flush_with_range)
246 ret = static_call(kvm_x86_tlb_remote_flush_with_range)(kvm, range);
249 kvm_flush_remote_tlbs(kvm);
252 void kvm_flush_remote_tlbs_with_address(struct kvm *kvm,
253 u64 start_gfn, u64 pages)
255 struct kvm_tlb_range range;
257 range.start_gfn = start_gfn;
260 kvm_flush_remote_tlbs_with_range(kvm, &range);
263 static void mark_mmio_spte(struct kvm_vcpu *vcpu, u64 *sptep, u64 gfn,
266 u64 spte = make_mmio_spte(vcpu, gfn, access);
268 trace_mark_mmio_spte(sptep, gfn, spte);
269 mmu_spte_set(sptep, spte);
272 static gfn_t get_mmio_spte_gfn(u64 spte)
274 u64 gpa = spte & shadow_nonpresent_or_rsvd_lower_gfn_mask;
276 gpa |= (spte >> SHADOW_NONPRESENT_OR_RSVD_MASK_LEN)
277 & shadow_nonpresent_or_rsvd_mask;
279 return gpa >> PAGE_SHIFT;
282 static unsigned get_mmio_spte_access(u64 spte)
284 return spte & shadow_mmio_access_mask;
287 static bool check_mmio_spte(struct kvm_vcpu *vcpu, u64 spte)
289 u64 kvm_gen, spte_gen, gen;
291 gen = kvm_vcpu_memslots(vcpu)->generation;
292 if (unlikely(gen & KVM_MEMSLOT_GEN_UPDATE_IN_PROGRESS))
295 kvm_gen = gen & MMIO_SPTE_GEN_MASK;
296 spte_gen = get_mmio_spte_generation(spte);
298 trace_check_mmio_spte(spte, kvm_gen, spte_gen);
299 return likely(kvm_gen == spte_gen);
302 static int is_cpuid_PSE36(void)
308 static void __set_spte(u64 *sptep, u64 spte)
310 WRITE_ONCE(*sptep, spte);
313 static void __update_clear_spte_fast(u64 *sptep, u64 spte)
315 WRITE_ONCE(*sptep, spte);
318 static u64 __update_clear_spte_slow(u64 *sptep, u64 spte)
320 return xchg(sptep, spte);
323 static u64 __get_spte_lockless(u64 *sptep)
325 return READ_ONCE(*sptep);
336 static void count_spte_clear(u64 *sptep, u64 spte)
338 struct kvm_mmu_page *sp = sptep_to_sp(sptep);
340 if (is_shadow_present_pte(spte))
343 /* Ensure the spte is completely set before we increase the count */
345 sp->clear_spte_count++;
348 static void __set_spte(u64 *sptep, u64 spte)
350 union split_spte *ssptep, sspte;
352 ssptep = (union split_spte *)sptep;
353 sspte = (union split_spte)spte;
355 ssptep->spte_high = sspte.spte_high;
358 * If we map the spte from nonpresent to present, We should store
359 * the high bits firstly, then set present bit, so cpu can not
360 * fetch this spte while we are setting the spte.
364 WRITE_ONCE(ssptep->spte_low, sspte.spte_low);
367 static void __update_clear_spte_fast(u64 *sptep, u64 spte)
369 union split_spte *ssptep, sspte;
371 ssptep = (union split_spte *)sptep;
372 sspte = (union split_spte)spte;
374 WRITE_ONCE(ssptep->spte_low, sspte.spte_low);
377 * If we map the spte from present to nonpresent, we should clear
378 * present bit firstly to avoid vcpu fetch the old high bits.
382 ssptep->spte_high = sspte.spte_high;
383 count_spte_clear(sptep, spte);
386 static u64 __update_clear_spte_slow(u64 *sptep, u64 spte)
388 union split_spte *ssptep, sspte, orig;
390 ssptep = (union split_spte *)sptep;
391 sspte = (union split_spte)spte;
393 /* xchg acts as a barrier before the setting of the high bits */
394 orig.spte_low = xchg(&ssptep->spte_low, sspte.spte_low);
395 orig.spte_high = ssptep->spte_high;
396 ssptep->spte_high = sspte.spte_high;
397 count_spte_clear(sptep, spte);
403 * The idea using the light way get the spte on x86_32 guest is from
404 * gup_get_pte (mm/gup.c).
406 * An spte tlb flush may be pending, because kvm_set_pte_rmapp
407 * coalesces them and we are running out of the MMU lock. Therefore
408 * we need to protect against in-progress updates of the spte.
410 * Reading the spte while an update is in progress may get the old value
411 * for the high part of the spte. The race is fine for a present->non-present
412 * change (because the high part of the spte is ignored for non-present spte),
413 * but for a present->present change we must reread the spte.
415 * All such changes are done in two steps (present->non-present and
416 * non-present->present), hence it is enough to count the number of
417 * present->non-present updates: if it changed while reading the spte,
418 * we might have hit the race. This is done using clear_spte_count.
420 static u64 __get_spte_lockless(u64 *sptep)
422 struct kvm_mmu_page *sp = sptep_to_sp(sptep);
423 union split_spte spte, *orig = (union split_spte *)sptep;
427 count = sp->clear_spte_count;
430 spte.spte_low = orig->spte_low;
433 spte.spte_high = orig->spte_high;
436 if (unlikely(spte.spte_low != orig->spte_low ||
437 count != sp->clear_spte_count))
444 /* Rules for using mmu_spte_set:
445 * Set the sptep from nonpresent to present.
446 * Note: the sptep being assigned *must* be either not present
447 * or in a state where the hardware will not attempt to update
450 static void mmu_spte_set(u64 *sptep, u64 new_spte)
452 WARN_ON(is_shadow_present_pte(*sptep));
453 __set_spte(sptep, new_spte);
457 * Update the SPTE (excluding the PFN), but do not track changes in its
458 * accessed/dirty status.
460 static u64 mmu_spte_update_no_track(u64 *sptep, u64 new_spte)
462 u64 old_spte = *sptep;
464 WARN_ON(!is_shadow_present_pte(new_spte));
465 check_spte_writable_invariants(new_spte);
467 if (!is_shadow_present_pte(old_spte)) {
468 mmu_spte_set(sptep, new_spte);
472 if (!spte_has_volatile_bits(old_spte))
473 __update_clear_spte_fast(sptep, new_spte);
475 old_spte = __update_clear_spte_slow(sptep, new_spte);
477 WARN_ON(spte_to_pfn(old_spte) != spte_to_pfn(new_spte));
482 /* Rules for using mmu_spte_update:
483 * Update the state bits, it means the mapped pfn is not changed.
485 * Whenever an MMU-writable SPTE is overwritten with a read-only SPTE, remote
486 * TLBs must be flushed. Otherwise rmap_write_protect will find a read-only
487 * spte, even though the writable spte might be cached on a CPU's TLB.
489 * Returns true if the TLB needs to be flushed
491 static bool mmu_spte_update(u64 *sptep, u64 new_spte)
494 u64 old_spte = mmu_spte_update_no_track(sptep, new_spte);
496 if (!is_shadow_present_pte(old_spte))
500 * For the spte updated out of mmu-lock is safe, since
501 * we always atomically update it, see the comments in
502 * spte_has_volatile_bits().
504 if (is_mmu_writable_spte(old_spte) &&
505 !is_writable_pte(new_spte))
509 * Flush TLB when accessed/dirty states are changed in the page tables,
510 * to guarantee consistency between TLB and page tables.
513 if (is_accessed_spte(old_spte) && !is_accessed_spte(new_spte)) {
515 kvm_set_pfn_accessed(spte_to_pfn(old_spte));
518 if (is_dirty_spte(old_spte) && !is_dirty_spte(new_spte)) {
520 kvm_set_pfn_dirty(spte_to_pfn(old_spte));
527 * Rules for using mmu_spte_clear_track_bits:
528 * It sets the sptep from present to nonpresent, and track the
529 * state bits, it is used to clear the last level sptep.
530 * Returns the old PTE.
532 static int mmu_spte_clear_track_bits(struct kvm *kvm, u64 *sptep)
535 u64 old_spte = *sptep;
536 int level = sptep_to_sp(sptep)->role.level;
538 if (!is_shadow_present_pte(old_spte) ||
539 !spte_has_volatile_bits(old_spte))
540 __update_clear_spte_fast(sptep, 0ull);
542 old_spte = __update_clear_spte_slow(sptep, 0ull);
544 if (!is_shadow_present_pte(old_spte))
547 kvm_update_page_stats(kvm, level, -1);
549 pfn = spte_to_pfn(old_spte);
552 * KVM does not hold the refcount of the page used by
553 * kvm mmu, before reclaiming the page, we should
554 * unmap it from mmu first.
556 WARN_ON(!kvm_is_reserved_pfn(pfn) && !page_count(pfn_to_page(pfn)));
558 if (is_accessed_spte(old_spte))
559 kvm_set_pfn_accessed(pfn);
561 if (is_dirty_spte(old_spte))
562 kvm_set_pfn_dirty(pfn);
568 * Rules for using mmu_spte_clear_no_track:
569 * Directly clear spte without caring the state bits of sptep,
570 * it is used to set the upper level spte.
572 static void mmu_spte_clear_no_track(u64 *sptep)
574 __update_clear_spte_fast(sptep, 0ull);
577 static u64 mmu_spte_get_lockless(u64 *sptep)
579 return __get_spte_lockless(sptep);
582 /* Returns the Accessed status of the PTE and resets it at the same time. */
583 static bool mmu_spte_age(u64 *sptep)
585 u64 spte = mmu_spte_get_lockless(sptep);
587 if (!is_accessed_spte(spte))
590 if (spte_ad_enabled(spte)) {
591 clear_bit((ffs(shadow_accessed_mask) - 1),
592 (unsigned long *)sptep);
595 * Capture the dirty status of the page, so that it doesn't get
596 * lost when the SPTE is marked for access tracking.
598 if (is_writable_pte(spte))
599 kvm_set_pfn_dirty(spte_to_pfn(spte));
601 spte = mark_spte_for_access_track(spte);
602 mmu_spte_update_no_track(sptep, spte);
608 static void walk_shadow_page_lockless_begin(struct kvm_vcpu *vcpu)
610 if (is_tdp_mmu(vcpu->arch.mmu)) {
611 kvm_tdp_mmu_walk_lockless_begin();
614 * Prevent page table teardown by making any free-er wait during
615 * kvm_flush_remote_tlbs() IPI to all active vcpus.
620 * Make sure a following spte read is not reordered ahead of the write
623 smp_store_mb(vcpu->mode, READING_SHADOW_PAGE_TABLES);
627 static void walk_shadow_page_lockless_end(struct kvm_vcpu *vcpu)
629 if (is_tdp_mmu(vcpu->arch.mmu)) {
630 kvm_tdp_mmu_walk_lockless_end();
633 * Make sure the write to vcpu->mode is not reordered in front of
634 * reads to sptes. If it does, kvm_mmu_commit_zap_page() can see us
635 * OUTSIDE_GUEST_MODE and proceed to free the shadow page table.
637 smp_store_release(&vcpu->mode, OUTSIDE_GUEST_MODE);
642 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu, bool maybe_indirect)
646 /* 1 rmap, 1 parent PTE per level, and the prefetched rmaps. */
647 r = kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_pte_list_desc_cache,
648 1 + PT64_ROOT_MAX_LEVEL + PTE_PREFETCH_NUM);
651 r = kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_shadow_page_cache,
652 PT64_ROOT_MAX_LEVEL);
655 if (maybe_indirect) {
656 r = kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_gfn_array_cache,
657 PT64_ROOT_MAX_LEVEL);
661 return kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
662 PT64_ROOT_MAX_LEVEL);
665 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
667 kvm_mmu_free_memory_cache(&vcpu->arch.mmu_pte_list_desc_cache);
668 kvm_mmu_free_memory_cache(&vcpu->arch.mmu_shadow_page_cache);
669 kvm_mmu_free_memory_cache(&vcpu->arch.mmu_gfn_array_cache);
670 kvm_mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
673 static struct pte_list_desc *mmu_alloc_pte_list_desc(struct kvm_vcpu *vcpu)
675 return kvm_mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_list_desc_cache);
678 static void mmu_free_pte_list_desc(struct pte_list_desc *pte_list_desc)
680 kmem_cache_free(pte_list_desc_cache, pte_list_desc);
683 static gfn_t kvm_mmu_page_get_gfn(struct kvm_mmu_page *sp, int index)
685 if (sp->role.passthrough)
688 if (!sp->role.direct)
689 return sp->gfns[index];
691 return sp->gfn + (index << ((sp->role.level - 1) * SPTE_LEVEL_BITS));
694 static void kvm_mmu_page_set_gfn(struct kvm_mmu_page *sp, int index, gfn_t gfn)
696 if (sp->role.passthrough) {
697 WARN_ON_ONCE(gfn != sp->gfn);
701 if (!sp->role.direct) {
702 sp->gfns[index] = gfn;
706 if (WARN_ON(gfn != kvm_mmu_page_get_gfn(sp, index)))
707 pr_err_ratelimited("gfn mismatch under direct page %llx "
708 "(expected %llx, got %llx)\n",
710 kvm_mmu_page_get_gfn(sp, index), gfn);
714 * Return the pointer to the large page information for a given gfn,
715 * handling slots that are not large page aligned.
717 static struct kvm_lpage_info *lpage_info_slot(gfn_t gfn,
718 const struct kvm_memory_slot *slot, int level)
722 idx = gfn_to_index(gfn, slot->base_gfn, level);
723 return &slot->arch.lpage_info[level - 2][idx];
726 static void update_gfn_disallow_lpage_count(const struct kvm_memory_slot *slot,
727 gfn_t gfn, int count)
729 struct kvm_lpage_info *linfo;
732 for (i = PG_LEVEL_2M; i <= KVM_MAX_HUGEPAGE_LEVEL; ++i) {
733 linfo = lpage_info_slot(gfn, slot, i);
734 linfo->disallow_lpage += count;
735 WARN_ON(linfo->disallow_lpage < 0);
739 void kvm_mmu_gfn_disallow_lpage(const struct kvm_memory_slot *slot, gfn_t gfn)
741 update_gfn_disallow_lpage_count(slot, gfn, 1);
744 void kvm_mmu_gfn_allow_lpage(const struct kvm_memory_slot *slot, gfn_t gfn)
746 update_gfn_disallow_lpage_count(slot, gfn, -1);
749 static void account_shadowed(struct kvm *kvm, struct kvm_mmu_page *sp)
751 struct kvm_memslots *slots;
752 struct kvm_memory_slot *slot;
755 kvm->arch.indirect_shadow_pages++;
757 slots = kvm_memslots_for_spte_role(kvm, sp->role);
758 slot = __gfn_to_memslot(slots, gfn);
760 /* the non-leaf shadow pages are keeping readonly. */
761 if (sp->role.level > PG_LEVEL_4K)
762 return kvm_slot_page_track_add_page(kvm, slot, gfn,
763 KVM_PAGE_TRACK_WRITE);
765 kvm_mmu_gfn_disallow_lpage(slot, gfn);
768 void account_huge_nx_page(struct kvm *kvm, struct kvm_mmu_page *sp)
770 if (sp->lpage_disallowed)
773 ++kvm->stat.nx_lpage_splits;
774 list_add_tail(&sp->lpage_disallowed_link,
775 &kvm->arch.lpage_disallowed_mmu_pages);
776 sp->lpage_disallowed = true;
779 static void unaccount_shadowed(struct kvm *kvm, struct kvm_mmu_page *sp)
781 struct kvm_memslots *slots;
782 struct kvm_memory_slot *slot;
785 kvm->arch.indirect_shadow_pages--;
787 slots = kvm_memslots_for_spte_role(kvm, sp->role);
788 slot = __gfn_to_memslot(slots, gfn);
789 if (sp->role.level > PG_LEVEL_4K)
790 return kvm_slot_page_track_remove_page(kvm, slot, gfn,
791 KVM_PAGE_TRACK_WRITE);
793 kvm_mmu_gfn_allow_lpage(slot, gfn);
796 void unaccount_huge_nx_page(struct kvm *kvm, struct kvm_mmu_page *sp)
798 --kvm->stat.nx_lpage_splits;
799 sp->lpage_disallowed = false;
800 list_del(&sp->lpage_disallowed_link);
803 static struct kvm_memory_slot *
804 gfn_to_memslot_dirty_bitmap(struct kvm_vcpu *vcpu, gfn_t gfn,
807 struct kvm_memory_slot *slot;
809 slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn);
810 if (!slot || slot->flags & KVM_MEMSLOT_INVALID)
812 if (no_dirty_log && kvm_slot_dirty_track_enabled(slot))
819 * About rmap_head encoding:
821 * If the bit zero of rmap_head->val is clear, then it points to the only spte
822 * in this rmap chain. Otherwise, (rmap_head->val & ~1) points to a struct
823 * pte_list_desc containing more mappings.
827 * Returns the number of pointers in the rmap chain, not counting the new one.
829 static int pte_list_add(struct kvm_vcpu *vcpu, u64 *spte,
830 struct kvm_rmap_head *rmap_head)
832 struct pte_list_desc *desc;
835 if (!rmap_head->val) {
836 rmap_printk("%p %llx 0->1\n", spte, *spte);
837 rmap_head->val = (unsigned long)spte;
838 } else if (!(rmap_head->val & 1)) {
839 rmap_printk("%p %llx 1->many\n", spte, *spte);
840 desc = mmu_alloc_pte_list_desc(vcpu);
841 desc->sptes[0] = (u64 *)rmap_head->val;
842 desc->sptes[1] = spte;
843 desc->spte_count = 2;
844 rmap_head->val = (unsigned long)desc | 1;
847 rmap_printk("%p %llx many->many\n", spte, *spte);
848 desc = (struct pte_list_desc *)(rmap_head->val & ~1ul);
849 while (desc->spte_count == PTE_LIST_EXT) {
850 count += PTE_LIST_EXT;
852 desc->more = mmu_alloc_pte_list_desc(vcpu);
854 desc->spte_count = 0;
859 count += desc->spte_count;
860 desc->sptes[desc->spte_count++] = spte;
866 pte_list_desc_remove_entry(struct kvm_rmap_head *rmap_head,
867 struct pte_list_desc *desc, int i,
868 struct pte_list_desc *prev_desc)
870 int j = desc->spte_count - 1;
872 desc->sptes[i] = desc->sptes[j];
873 desc->sptes[j] = NULL;
875 if (desc->spte_count)
877 if (!prev_desc && !desc->more)
881 prev_desc->more = desc->more;
883 rmap_head->val = (unsigned long)desc->more | 1;
884 mmu_free_pte_list_desc(desc);
887 static void __pte_list_remove(u64 *spte, struct kvm_rmap_head *rmap_head)
889 struct pte_list_desc *desc;
890 struct pte_list_desc *prev_desc;
893 if (!rmap_head->val) {
894 pr_err("%s: %p 0->BUG\n", __func__, spte);
896 } else if (!(rmap_head->val & 1)) {
897 rmap_printk("%p 1->0\n", spte);
898 if ((u64 *)rmap_head->val != spte) {
899 pr_err("%s: %p 1->BUG\n", __func__, spte);
904 rmap_printk("%p many->many\n", spte);
905 desc = (struct pte_list_desc *)(rmap_head->val & ~1ul);
908 for (i = 0; i < desc->spte_count; ++i) {
909 if (desc->sptes[i] == spte) {
910 pte_list_desc_remove_entry(rmap_head,
918 pr_err("%s: %p many->many\n", __func__, spte);
923 static void pte_list_remove(struct kvm *kvm, struct kvm_rmap_head *rmap_head,
926 mmu_spte_clear_track_bits(kvm, sptep);
927 __pte_list_remove(sptep, rmap_head);
930 /* Return true if rmap existed, false otherwise */
931 static bool pte_list_destroy(struct kvm *kvm, struct kvm_rmap_head *rmap_head)
933 struct pte_list_desc *desc, *next;
939 if (!(rmap_head->val & 1)) {
940 mmu_spte_clear_track_bits(kvm, (u64 *)rmap_head->val);
944 desc = (struct pte_list_desc *)(rmap_head->val & ~1ul);
946 for (; desc; desc = next) {
947 for (i = 0; i < desc->spte_count; i++)
948 mmu_spte_clear_track_bits(kvm, desc->sptes[i]);
950 mmu_free_pte_list_desc(desc);
953 /* rmap_head is meaningless now, remember to reset it */
958 unsigned int pte_list_count(struct kvm_rmap_head *rmap_head)
960 struct pte_list_desc *desc;
961 unsigned int count = 0;
965 else if (!(rmap_head->val & 1))
968 desc = (struct pte_list_desc *)(rmap_head->val & ~1ul);
971 count += desc->spte_count;
978 static struct kvm_rmap_head *gfn_to_rmap(gfn_t gfn, int level,
979 const struct kvm_memory_slot *slot)
983 idx = gfn_to_index(gfn, slot->base_gfn, level);
984 return &slot->arch.rmap[level - PG_LEVEL_4K][idx];
987 static bool rmap_can_add(struct kvm_vcpu *vcpu)
989 struct kvm_mmu_memory_cache *mc;
991 mc = &vcpu->arch.mmu_pte_list_desc_cache;
992 return kvm_mmu_memory_cache_nr_free_objects(mc);
995 static void rmap_remove(struct kvm *kvm, u64 *spte)
997 struct kvm_memslots *slots;
998 struct kvm_memory_slot *slot;
999 struct kvm_mmu_page *sp;
1001 struct kvm_rmap_head *rmap_head;
1003 sp = sptep_to_sp(spte);
1004 gfn = kvm_mmu_page_get_gfn(sp, spte - sp->spt);
1007 * Unlike rmap_add, rmap_remove does not run in the context of a vCPU
1008 * so we have to determine which memslots to use based on context
1009 * information in sp->role.
1011 slots = kvm_memslots_for_spte_role(kvm, sp->role);
1013 slot = __gfn_to_memslot(slots, gfn);
1014 rmap_head = gfn_to_rmap(gfn, sp->role.level, slot);
1016 __pte_list_remove(spte, rmap_head);
1020 * Used by the following functions to iterate through the sptes linked by a
1021 * rmap. All fields are private and not assumed to be used outside.
1023 struct rmap_iterator {
1024 /* private fields */
1025 struct pte_list_desc *desc; /* holds the sptep if not NULL */
1026 int pos; /* index of the sptep */
1030 * Iteration must be started by this function. This should also be used after
1031 * removing/dropping sptes from the rmap link because in such cases the
1032 * information in the iterator may not be valid.
1034 * Returns sptep if found, NULL otherwise.
1036 static u64 *rmap_get_first(struct kvm_rmap_head *rmap_head,
1037 struct rmap_iterator *iter)
1041 if (!rmap_head->val)
1044 if (!(rmap_head->val & 1)) {
1046 sptep = (u64 *)rmap_head->val;
1050 iter->desc = (struct pte_list_desc *)(rmap_head->val & ~1ul);
1052 sptep = iter->desc->sptes[iter->pos];
1054 BUG_ON(!is_shadow_present_pte(*sptep));
1059 * Must be used with a valid iterator: e.g. after rmap_get_first().
1061 * Returns sptep if found, NULL otherwise.
1063 static u64 *rmap_get_next(struct rmap_iterator *iter)
1068 if (iter->pos < PTE_LIST_EXT - 1) {
1070 sptep = iter->desc->sptes[iter->pos];
1075 iter->desc = iter->desc->more;
1079 /* desc->sptes[0] cannot be NULL */
1080 sptep = iter->desc->sptes[iter->pos];
1087 BUG_ON(!is_shadow_present_pte(*sptep));
1091 #define for_each_rmap_spte(_rmap_head_, _iter_, _spte_) \
1092 for (_spte_ = rmap_get_first(_rmap_head_, _iter_); \
1093 _spte_; _spte_ = rmap_get_next(_iter_))
1095 static void drop_spte(struct kvm *kvm, u64 *sptep)
1097 u64 old_spte = mmu_spte_clear_track_bits(kvm, sptep);
1099 if (is_shadow_present_pte(old_spte))
1100 rmap_remove(kvm, sptep);
1104 static bool __drop_large_spte(struct kvm *kvm, u64 *sptep)
1106 if (is_large_pte(*sptep)) {
1107 WARN_ON(sptep_to_sp(sptep)->role.level == PG_LEVEL_4K);
1108 drop_spte(kvm, sptep);
1115 static void drop_large_spte(struct kvm_vcpu *vcpu, u64 *sptep)
1117 if (__drop_large_spte(vcpu->kvm, sptep)) {
1118 struct kvm_mmu_page *sp = sptep_to_sp(sptep);
1120 kvm_flush_remote_tlbs_with_address(vcpu->kvm, sp->gfn,
1121 KVM_PAGES_PER_HPAGE(sp->role.level));
1126 * Write-protect on the specified @sptep, @pt_protect indicates whether
1127 * spte write-protection is caused by protecting shadow page table.
1129 * Note: write protection is difference between dirty logging and spte
1131 * - for dirty logging, the spte can be set to writable at anytime if
1132 * its dirty bitmap is properly set.
1133 * - for spte protection, the spte can be writable only after unsync-ing
1136 * Return true if tlb need be flushed.
1138 static bool spte_write_protect(u64 *sptep, bool pt_protect)
1142 if (!is_writable_pte(spte) &&
1143 !(pt_protect && is_mmu_writable_spte(spte)))
1146 rmap_printk("spte %p %llx\n", sptep, *sptep);
1149 spte &= ~shadow_mmu_writable_mask;
1150 spte = spte & ~PT_WRITABLE_MASK;
1152 return mmu_spte_update(sptep, spte);
1155 static bool rmap_write_protect(struct kvm_rmap_head *rmap_head,
1159 struct rmap_iterator iter;
1162 for_each_rmap_spte(rmap_head, &iter, sptep)
1163 flush |= spte_write_protect(sptep, pt_protect);
1168 static bool spte_clear_dirty(u64 *sptep)
1172 rmap_printk("spte %p %llx\n", sptep, *sptep);
1174 MMU_WARN_ON(!spte_ad_enabled(spte));
1175 spte &= ~shadow_dirty_mask;
1176 return mmu_spte_update(sptep, spte);
1179 static bool spte_wrprot_for_clear_dirty(u64 *sptep)
1181 bool was_writable = test_and_clear_bit(PT_WRITABLE_SHIFT,
1182 (unsigned long *)sptep);
1183 if (was_writable && !spte_ad_enabled(*sptep))
1184 kvm_set_pfn_dirty(spte_to_pfn(*sptep));
1186 return was_writable;
1190 * Gets the GFN ready for another round of dirty logging by clearing the
1191 * - D bit on ad-enabled SPTEs, and
1192 * - W bit on ad-disabled SPTEs.
1193 * Returns true iff any D or W bits were cleared.
1195 static bool __rmap_clear_dirty(struct kvm *kvm, struct kvm_rmap_head *rmap_head,
1196 const struct kvm_memory_slot *slot)
1199 struct rmap_iterator iter;
1202 for_each_rmap_spte(rmap_head, &iter, sptep)
1203 if (spte_ad_need_write_protect(*sptep))
1204 flush |= spte_wrprot_for_clear_dirty(sptep);
1206 flush |= spte_clear_dirty(sptep);
1212 * kvm_mmu_write_protect_pt_masked - write protect selected PT level pages
1213 * @kvm: kvm instance
1214 * @slot: slot to protect
1215 * @gfn_offset: start of the BITS_PER_LONG pages we care about
1216 * @mask: indicates which pages we should protect
1218 * Used when we do not need to care about huge page mappings.
1220 static void kvm_mmu_write_protect_pt_masked(struct kvm *kvm,
1221 struct kvm_memory_slot *slot,
1222 gfn_t gfn_offset, unsigned long mask)
1224 struct kvm_rmap_head *rmap_head;
1226 if (is_tdp_mmu_enabled(kvm))
1227 kvm_tdp_mmu_clear_dirty_pt_masked(kvm, slot,
1228 slot->base_gfn + gfn_offset, mask, true);
1230 if (!kvm_memslots_have_rmaps(kvm))
1234 rmap_head = gfn_to_rmap(slot->base_gfn + gfn_offset + __ffs(mask),
1236 rmap_write_protect(rmap_head, false);
1238 /* clear the first set bit */
1244 * kvm_mmu_clear_dirty_pt_masked - clear MMU D-bit for PT level pages, or write
1245 * protect the page if the D-bit isn't supported.
1246 * @kvm: kvm instance
1247 * @slot: slot to clear D-bit
1248 * @gfn_offset: start of the BITS_PER_LONG pages we care about
1249 * @mask: indicates which pages we should clear D-bit
1251 * Used for PML to re-log the dirty GPAs after userspace querying dirty_bitmap.
1253 static void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm,
1254 struct kvm_memory_slot *slot,
1255 gfn_t gfn_offset, unsigned long mask)
1257 struct kvm_rmap_head *rmap_head;
1259 if (is_tdp_mmu_enabled(kvm))
1260 kvm_tdp_mmu_clear_dirty_pt_masked(kvm, slot,
1261 slot->base_gfn + gfn_offset, mask, false);
1263 if (!kvm_memslots_have_rmaps(kvm))
1267 rmap_head = gfn_to_rmap(slot->base_gfn + gfn_offset + __ffs(mask),
1269 __rmap_clear_dirty(kvm, rmap_head, slot);
1271 /* clear the first set bit */
1277 * kvm_arch_mmu_enable_log_dirty_pt_masked - enable dirty logging for selected
1280 * It calls kvm_mmu_write_protect_pt_masked to write protect selected pages to
1281 * enable dirty logging for them.
1283 * We need to care about huge page mappings: e.g. during dirty logging we may
1284 * have such mappings.
1286 void kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm *kvm,
1287 struct kvm_memory_slot *slot,
1288 gfn_t gfn_offset, unsigned long mask)
1291 * Huge pages are NOT write protected when we start dirty logging in
1292 * initially-all-set mode; must write protect them here so that they
1293 * are split to 4K on the first write.
1295 * The gfn_offset is guaranteed to be aligned to 64, but the base_gfn
1296 * of memslot has no such restriction, so the range can cross two large
1299 if (kvm_dirty_log_manual_protect_and_init_set(kvm)) {
1300 gfn_t start = slot->base_gfn + gfn_offset + __ffs(mask);
1301 gfn_t end = slot->base_gfn + gfn_offset + __fls(mask);
1303 if (READ_ONCE(eager_page_split))
1304 kvm_mmu_try_split_huge_pages(kvm, slot, start, end, PG_LEVEL_4K);
1306 kvm_mmu_slot_gfn_write_protect(kvm, slot, start, PG_LEVEL_2M);
1308 /* Cross two large pages? */
1309 if (ALIGN(start << PAGE_SHIFT, PMD_SIZE) !=
1310 ALIGN(end << PAGE_SHIFT, PMD_SIZE))
1311 kvm_mmu_slot_gfn_write_protect(kvm, slot, end,
1315 /* Now handle 4K PTEs. */
1316 if (kvm_x86_ops.cpu_dirty_log_size)
1317 kvm_mmu_clear_dirty_pt_masked(kvm, slot, gfn_offset, mask);
1319 kvm_mmu_write_protect_pt_masked(kvm, slot, gfn_offset, mask);
1322 int kvm_cpu_dirty_log_size(void)
1324 return kvm_x86_ops.cpu_dirty_log_size;
1327 bool kvm_mmu_slot_gfn_write_protect(struct kvm *kvm,
1328 struct kvm_memory_slot *slot, u64 gfn,
1331 struct kvm_rmap_head *rmap_head;
1333 bool write_protected = false;
1335 if (kvm_memslots_have_rmaps(kvm)) {
1336 for (i = min_level; i <= KVM_MAX_HUGEPAGE_LEVEL; ++i) {
1337 rmap_head = gfn_to_rmap(gfn, i, slot);
1338 write_protected |= rmap_write_protect(rmap_head, true);
1342 if (is_tdp_mmu_enabled(kvm))
1344 kvm_tdp_mmu_write_protect_gfn(kvm, slot, gfn, min_level);
1346 return write_protected;
1349 static bool kvm_vcpu_write_protect_gfn(struct kvm_vcpu *vcpu, u64 gfn)
1351 struct kvm_memory_slot *slot;
1353 slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn);
1354 return kvm_mmu_slot_gfn_write_protect(vcpu->kvm, slot, gfn, PG_LEVEL_4K);
1357 static bool kvm_zap_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head,
1358 const struct kvm_memory_slot *slot)
1360 return pte_list_destroy(kvm, rmap_head);
1363 static bool kvm_unmap_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head,
1364 struct kvm_memory_slot *slot, gfn_t gfn, int level,
1367 return kvm_zap_rmapp(kvm, rmap_head, slot);
1370 static bool kvm_set_pte_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head,
1371 struct kvm_memory_slot *slot, gfn_t gfn, int level,
1375 struct rmap_iterator iter;
1376 bool need_flush = false;
1380 WARN_ON(pte_huge(pte));
1381 new_pfn = pte_pfn(pte);
1384 for_each_rmap_spte(rmap_head, &iter, sptep) {
1385 rmap_printk("spte %p %llx gfn %llx (%d)\n",
1386 sptep, *sptep, gfn, level);
1390 if (pte_write(pte)) {
1391 pte_list_remove(kvm, rmap_head, sptep);
1394 new_spte = kvm_mmu_changed_pte_notifier_make_spte(
1397 mmu_spte_clear_track_bits(kvm, sptep);
1398 mmu_spte_set(sptep, new_spte);
1402 if (need_flush && kvm_available_flush_tlb_with_range()) {
1403 kvm_flush_remote_tlbs_with_address(kvm, gfn, 1);
1410 struct slot_rmap_walk_iterator {
1412 const struct kvm_memory_slot *slot;
1418 /* output fields. */
1420 struct kvm_rmap_head *rmap;
1423 /* private field. */
1424 struct kvm_rmap_head *end_rmap;
1428 rmap_walk_init_level(struct slot_rmap_walk_iterator *iterator, int level)
1430 iterator->level = level;
1431 iterator->gfn = iterator->start_gfn;
1432 iterator->rmap = gfn_to_rmap(iterator->gfn, level, iterator->slot);
1433 iterator->end_rmap = gfn_to_rmap(iterator->end_gfn, level, iterator->slot);
1437 slot_rmap_walk_init(struct slot_rmap_walk_iterator *iterator,
1438 const struct kvm_memory_slot *slot, int start_level,
1439 int end_level, gfn_t start_gfn, gfn_t end_gfn)
1441 iterator->slot = slot;
1442 iterator->start_level = start_level;
1443 iterator->end_level = end_level;
1444 iterator->start_gfn = start_gfn;
1445 iterator->end_gfn = end_gfn;
1447 rmap_walk_init_level(iterator, iterator->start_level);
1450 static bool slot_rmap_walk_okay(struct slot_rmap_walk_iterator *iterator)
1452 return !!iterator->rmap;
1455 static void slot_rmap_walk_next(struct slot_rmap_walk_iterator *iterator)
1457 while (++iterator->rmap <= iterator->end_rmap) {
1458 iterator->gfn += (1UL << KVM_HPAGE_GFN_SHIFT(iterator->level));
1460 if (iterator->rmap->val)
1464 if (++iterator->level > iterator->end_level) {
1465 iterator->rmap = NULL;
1469 rmap_walk_init_level(iterator, iterator->level);
1472 #define for_each_slot_rmap_range(_slot_, _start_level_, _end_level_, \
1473 _start_gfn, _end_gfn, _iter_) \
1474 for (slot_rmap_walk_init(_iter_, _slot_, _start_level_, \
1475 _end_level_, _start_gfn, _end_gfn); \
1476 slot_rmap_walk_okay(_iter_); \
1477 slot_rmap_walk_next(_iter_))
1479 typedef bool (*rmap_handler_t)(struct kvm *kvm, struct kvm_rmap_head *rmap_head,
1480 struct kvm_memory_slot *slot, gfn_t gfn,
1481 int level, pte_t pte);
1483 static __always_inline bool kvm_handle_gfn_range(struct kvm *kvm,
1484 struct kvm_gfn_range *range,
1485 rmap_handler_t handler)
1487 struct slot_rmap_walk_iterator iterator;
1490 for_each_slot_rmap_range(range->slot, PG_LEVEL_4K, KVM_MAX_HUGEPAGE_LEVEL,
1491 range->start, range->end - 1, &iterator)
1492 ret |= handler(kvm, iterator.rmap, range->slot, iterator.gfn,
1493 iterator.level, range->pte);
1498 bool kvm_unmap_gfn_range(struct kvm *kvm, struct kvm_gfn_range *range)
1502 if (kvm_memslots_have_rmaps(kvm))
1503 flush = kvm_handle_gfn_range(kvm, range, kvm_unmap_rmapp);
1505 if (is_tdp_mmu_enabled(kvm))
1506 flush = kvm_tdp_mmu_unmap_gfn_range(kvm, range, flush);
1511 bool kvm_set_spte_gfn(struct kvm *kvm, struct kvm_gfn_range *range)
1515 if (kvm_memslots_have_rmaps(kvm))
1516 flush = kvm_handle_gfn_range(kvm, range, kvm_set_pte_rmapp);
1518 if (is_tdp_mmu_enabled(kvm))
1519 flush |= kvm_tdp_mmu_set_spte_gfn(kvm, range);
1524 static bool kvm_age_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head,
1525 struct kvm_memory_slot *slot, gfn_t gfn, int level,
1529 struct rmap_iterator iter;
1532 for_each_rmap_spte(rmap_head, &iter, sptep)
1533 young |= mmu_spte_age(sptep);
1538 static bool kvm_test_age_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head,
1539 struct kvm_memory_slot *slot, gfn_t gfn,
1540 int level, pte_t unused)
1543 struct rmap_iterator iter;
1545 for_each_rmap_spte(rmap_head, &iter, sptep)
1546 if (is_accessed_spte(*sptep))
1551 #define RMAP_RECYCLE_THRESHOLD 1000
1553 static void rmap_add(struct kvm_vcpu *vcpu, struct kvm_memory_slot *slot,
1554 u64 *spte, gfn_t gfn)
1556 struct kvm_mmu_page *sp;
1557 struct kvm_rmap_head *rmap_head;
1560 sp = sptep_to_sp(spte);
1561 kvm_mmu_page_set_gfn(sp, spte - sp->spt, gfn);
1562 rmap_head = gfn_to_rmap(gfn, sp->role.level, slot);
1563 rmap_count = pte_list_add(vcpu, spte, rmap_head);
1565 if (rmap_count > RMAP_RECYCLE_THRESHOLD) {
1566 kvm_unmap_rmapp(vcpu->kvm, rmap_head, NULL, gfn, sp->role.level, __pte(0));
1567 kvm_flush_remote_tlbs_with_address(
1568 vcpu->kvm, sp->gfn, KVM_PAGES_PER_HPAGE(sp->role.level));
1572 bool kvm_age_gfn(struct kvm *kvm, struct kvm_gfn_range *range)
1576 if (kvm_memslots_have_rmaps(kvm))
1577 young = kvm_handle_gfn_range(kvm, range, kvm_age_rmapp);
1579 if (is_tdp_mmu_enabled(kvm))
1580 young |= kvm_tdp_mmu_age_gfn_range(kvm, range);
1585 bool kvm_test_age_gfn(struct kvm *kvm, struct kvm_gfn_range *range)
1589 if (kvm_memslots_have_rmaps(kvm))
1590 young = kvm_handle_gfn_range(kvm, range, kvm_test_age_rmapp);
1592 if (is_tdp_mmu_enabled(kvm))
1593 young |= kvm_tdp_mmu_test_age_gfn(kvm, range);
1599 static int is_empty_shadow_page(u64 *spt)
1604 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
1605 if (is_shadow_present_pte(*pos)) {
1606 printk(KERN_ERR "%s: %p %llx\n", __func__,
1615 * This value is the sum of all of the kvm instances's
1616 * kvm->arch.n_used_mmu_pages values. We need a global,
1617 * aggregate version in order to make the slab shrinker
1620 static inline void kvm_mod_used_mmu_pages(struct kvm *kvm, long nr)
1622 kvm->arch.n_used_mmu_pages += nr;
1623 percpu_counter_add(&kvm_total_used_mmu_pages, nr);
1626 static void kvm_mmu_free_page(struct kvm_mmu_page *sp)
1628 MMU_WARN_ON(!is_empty_shadow_page(sp->spt));
1629 hlist_del(&sp->hash_link);
1630 list_del(&sp->link);
1631 free_page((unsigned long)sp->spt);
1632 if (!sp->role.direct)
1633 free_page((unsigned long)sp->gfns);
1634 kmem_cache_free(mmu_page_header_cache, sp);
1637 static unsigned kvm_page_table_hashfn(gfn_t gfn)
1639 return hash_64(gfn, KVM_MMU_HASH_SHIFT);
1642 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
1643 struct kvm_mmu_page *sp, u64 *parent_pte)
1648 pte_list_add(vcpu, parent_pte, &sp->parent_ptes);
1651 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
1654 __pte_list_remove(parent_pte, &sp->parent_ptes);
1657 static void drop_parent_pte(struct kvm_mmu_page *sp,
1660 mmu_page_remove_parent_pte(sp, parent_pte);
1661 mmu_spte_clear_no_track(parent_pte);
1664 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu, int direct)
1666 struct kvm_mmu_page *sp;
1668 sp = kvm_mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache);
1669 sp->spt = kvm_mmu_memory_cache_alloc(&vcpu->arch.mmu_shadow_page_cache);
1671 sp->gfns = kvm_mmu_memory_cache_alloc(&vcpu->arch.mmu_gfn_array_cache);
1672 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
1675 * active_mmu_pages must be a FIFO list, as kvm_zap_obsolete_pages()
1676 * depends on valid pages being added to the head of the list. See
1677 * comments in kvm_zap_obsolete_pages().
1679 sp->mmu_valid_gen = vcpu->kvm->arch.mmu_valid_gen;
1680 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
1681 kvm_mod_used_mmu_pages(vcpu->kvm, +1);
1685 static void mark_unsync(u64 *spte);
1686 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp)
1689 struct rmap_iterator iter;
1691 for_each_rmap_spte(&sp->parent_ptes, &iter, sptep) {
1696 static void mark_unsync(u64 *spte)
1698 struct kvm_mmu_page *sp;
1701 sp = sptep_to_sp(spte);
1702 index = spte - sp->spt;
1703 if (__test_and_set_bit(index, sp->unsync_child_bitmap))
1705 if (sp->unsync_children++)
1707 kvm_mmu_mark_parents_unsync(sp);
1710 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1711 struct kvm_mmu_page *sp)
1716 #define KVM_PAGE_ARRAY_NR 16
1718 struct kvm_mmu_pages {
1719 struct mmu_page_and_offset {
1720 struct kvm_mmu_page *sp;
1722 } page[KVM_PAGE_ARRAY_NR];
1726 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1732 for (i=0; i < pvec->nr; i++)
1733 if (pvec->page[i].sp == sp)
1736 pvec->page[pvec->nr].sp = sp;
1737 pvec->page[pvec->nr].idx = idx;
1739 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1742 static inline void clear_unsync_child_bit(struct kvm_mmu_page *sp, int idx)
1744 --sp->unsync_children;
1745 WARN_ON((int)sp->unsync_children < 0);
1746 __clear_bit(idx, sp->unsync_child_bitmap);
1749 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1750 struct kvm_mmu_pages *pvec)
1752 int i, ret, nr_unsync_leaf = 0;
1754 for_each_set_bit(i, sp->unsync_child_bitmap, 512) {
1755 struct kvm_mmu_page *child;
1756 u64 ent = sp->spt[i];
1758 if (!is_shadow_present_pte(ent) || is_large_pte(ent)) {
1759 clear_unsync_child_bit(sp, i);
1763 child = to_shadow_page(ent & SPTE_BASE_ADDR_MASK);
1765 if (child->unsync_children) {
1766 if (mmu_pages_add(pvec, child, i))
1769 ret = __mmu_unsync_walk(child, pvec);
1771 clear_unsync_child_bit(sp, i);
1773 } else if (ret > 0) {
1774 nr_unsync_leaf += ret;
1777 } else if (child->unsync) {
1779 if (mmu_pages_add(pvec, child, i))
1782 clear_unsync_child_bit(sp, i);
1785 return nr_unsync_leaf;
1788 #define INVALID_INDEX (-1)
1790 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1791 struct kvm_mmu_pages *pvec)
1794 if (!sp->unsync_children)
1797 mmu_pages_add(pvec, sp, INVALID_INDEX);
1798 return __mmu_unsync_walk(sp, pvec);
1801 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1803 WARN_ON(!sp->unsync);
1804 trace_kvm_mmu_sync_page(sp);
1806 --kvm->stat.mmu_unsync;
1809 static bool kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
1810 struct list_head *invalid_list);
1811 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
1812 struct list_head *invalid_list);
1814 static bool sp_has_gptes(struct kvm_mmu_page *sp)
1816 if (sp->role.direct)
1819 if (sp->role.passthrough)
1825 #define for_each_valid_sp(_kvm, _sp, _list) \
1826 hlist_for_each_entry(_sp, _list, hash_link) \
1827 if (is_obsolete_sp((_kvm), (_sp))) { \
1830 #define for_each_gfn_valid_sp_with_gptes(_kvm, _sp, _gfn) \
1831 for_each_valid_sp(_kvm, _sp, \
1832 &(_kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(_gfn)]) \
1833 if ((_sp)->gfn != (_gfn) || !sp_has_gptes(_sp)) {} else
1835 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1836 struct list_head *invalid_list)
1838 int ret = vcpu->arch.mmu->sync_page(vcpu, sp);
1841 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1845 static bool kvm_mmu_remote_flush_or_zap(struct kvm *kvm,
1846 struct list_head *invalid_list,
1849 if (!remote_flush && list_empty(invalid_list))
1852 if (!list_empty(invalid_list))
1853 kvm_mmu_commit_zap_page(kvm, invalid_list);
1855 kvm_flush_remote_tlbs(kvm);
1859 static bool is_obsolete_sp(struct kvm *kvm, struct kvm_mmu_page *sp)
1861 if (sp->role.invalid)
1864 /* TDP MMU pages due not use the MMU generation. */
1865 return !sp->tdp_mmu_page &&
1866 unlikely(sp->mmu_valid_gen != kvm->arch.mmu_valid_gen);
1869 struct mmu_page_path {
1870 struct kvm_mmu_page *parent[PT64_ROOT_MAX_LEVEL];
1871 unsigned int idx[PT64_ROOT_MAX_LEVEL];
1874 #define for_each_sp(pvec, sp, parents, i) \
1875 for (i = mmu_pages_first(&pvec, &parents); \
1876 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1877 i = mmu_pages_next(&pvec, &parents, i))
1879 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1880 struct mmu_page_path *parents,
1885 for (n = i+1; n < pvec->nr; n++) {
1886 struct kvm_mmu_page *sp = pvec->page[n].sp;
1887 unsigned idx = pvec->page[n].idx;
1888 int level = sp->role.level;
1890 parents->idx[level-1] = idx;
1891 if (level == PG_LEVEL_4K)
1894 parents->parent[level-2] = sp;
1900 static int mmu_pages_first(struct kvm_mmu_pages *pvec,
1901 struct mmu_page_path *parents)
1903 struct kvm_mmu_page *sp;
1909 WARN_ON(pvec->page[0].idx != INVALID_INDEX);
1911 sp = pvec->page[0].sp;
1912 level = sp->role.level;
1913 WARN_ON(level == PG_LEVEL_4K);
1915 parents->parent[level-2] = sp;
1917 /* Also set up a sentinel. Further entries in pvec are all
1918 * children of sp, so this element is never overwritten.
1920 parents->parent[level-1] = NULL;
1921 return mmu_pages_next(pvec, parents, 0);
1924 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1926 struct kvm_mmu_page *sp;
1927 unsigned int level = 0;
1930 unsigned int idx = parents->idx[level];
1931 sp = parents->parent[level];
1935 WARN_ON(idx == INVALID_INDEX);
1936 clear_unsync_child_bit(sp, idx);
1938 } while (!sp->unsync_children);
1941 static int mmu_sync_children(struct kvm_vcpu *vcpu,
1942 struct kvm_mmu_page *parent, bool can_yield)
1945 struct kvm_mmu_page *sp;
1946 struct mmu_page_path parents;
1947 struct kvm_mmu_pages pages;
1948 LIST_HEAD(invalid_list);
1951 while (mmu_unsync_walk(parent, &pages)) {
1952 bool protected = false;
1954 for_each_sp(pages, sp, parents, i)
1955 protected |= kvm_vcpu_write_protect_gfn(vcpu, sp->gfn);
1958 kvm_mmu_remote_flush_or_zap(vcpu->kvm, &invalid_list, true);
1962 for_each_sp(pages, sp, parents, i) {
1963 kvm_unlink_unsync_page(vcpu->kvm, sp);
1964 flush |= kvm_sync_page(vcpu, sp, &invalid_list) > 0;
1965 mmu_pages_clear_parents(&parents);
1967 if (need_resched() || rwlock_needbreak(&vcpu->kvm->mmu_lock)) {
1968 kvm_mmu_remote_flush_or_zap(vcpu->kvm, &invalid_list, flush);
1970 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
1974 cond_resched_rwlock_write(&vcpu->kvm->mmu_lock);
1979 kvm_mmu_remote_flush_or_zap(vcpu->kvm, &invalid_list, flush);
1983 static void __clear_sp_write_flooding_count(struct kvm_mmu_page *sp)
1985 atomic_set(&sp->write_flooding_count, 0);
1988 static void clear_sp_write_flooding_count(u64 *spte)
1990 __clear_sp_write_flooding_count(sptep_to_sp(spte));
1993 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1998 unsigned int access)
2000 bool direct_mmu = vcpu->arch.mmu->root_role.direct;
2001 union kvm_mmu_page_role role;
2002 struct hlist_head *sp_list;
2004 struct kvm_mmu_page *sp;
2007 LIST_HEAD(invalid_list);
2009 role = vcpu->arch.mmu->root_role;
2011 role.direct = direct;
2012 role.access = access;
2013 if (role.has_4_byte_gpte) {
2015 * If the guest has 4-byte PTEs then that means it's using 32-bit,
2016 * 2-level, non-PAE paging. KVM shadows such guests with PAE paging
2017 * (i.e. 8-byte PTEs). The difference in PTE size means that KVM must
2018 * shadow each guest page table with multiple shadow page tables, which
2019 * requires extra bookkeeping in the role.
2021 * Specifically, to shadow the guest's page directory (which covers a
2022 * 4GiB address space), KVM uses 4 PAE page directories, each mapping
2023 * 1GiB of the address space. @role.quadrant encodes which quarter of
2024 * the address space each maps.
2026 * To shadow the guest's page tables (which each map a 4MiB region), KVM
2027 * uses 2 PAE page tables, each mapping a 2MiB region. For these,
2028 * @role.quadrant encodes which half of the region they map.
2030 quadrant = gaddr >> (PAGE_SHIFT + (SPTE_LEVEL_BITS * level));
2031 quadrant &= (1 << level) - 1;
2032 role.quadrant = quadrant;
2034 if (level <= vcpu->arch.mmu->cpu_role.base.level)
2035 role.passthrough = 0;
2037 sp_list = &vcpu->kvm->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)];
2038 for_each_valid_sp(vcpu->kvm, sp, sp_list) {
2039 if (sp->gfn != gfn) {
2044 if (sp->role.word != role.word) {
2046 * If the guest is creating an upper-level page, zap
2047 * unsync pages for the same gfn. While it's possible
2048 * the guest is using recursive page tables, in all
2049 * likelihood the guest has stopped using the unsync
2050 * page and is installing a completely unrelated page.
2051 * Unsync pages must not be left as is, because the new
2052 * upper-level page will be write-protected.
2054 if (level > PG_LEVEL_4K && sp->unsync)
2055 kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
2061 goto trace_get_page;
2065 * The page is good, but is stale. kvm_sync_page does
2066 * get the latest guest state, but (unlike mmu_unsync_children)
2067 * it doesn't write-protect the page or mark it synchronized!
2068 * This way the validity of the mapping is ensured, but the
2069 * overhead of write protection is not incurred until the
2070 * guest invalidates the TLB mapping. This allows multiple
2071 * SPs for a single gfn to be unsync.
2073 * If the sync fails, the page is zapped. If so, break
2074 * in order to rebuild it.
2076 ret = kvm_sync_page(vcpu, sp, &invalid_list);
2080 WARN_ON(!list_empty(&invalid_list));
2082 kvm_flush_remote_tlbs(vcpu->kvm);
2085 __clear_sp_write_flooding_count(sp);
2088 trace_kvm_mmu_get_page(sp, false);
2092 ++vcpu->kvm->stat.mmu_cache_miss;
2094 sp = kvm_mmu_alloc_page(vcpu, direct);
2098 hlist_add_head(&sp->hash_link, sp_list);
2099 if (sp_has_gptes(sp)) {
2100 account_shadowed(vcpu->kvm, sp);
2101 if (level == PG_LEVEL_4K && kvm_vcpu_write_protect_gfn(vcpu, gfn))
2102 kvm_flush_remote_tlbs_with_address(vcpu->kvm, gfn, 1);
2104 trace_kvm_mmu_get_page(sp, true);
2106 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2108 if (collisions > vcpu->kvm->stat.max_mmu_page_hash_collisions)
2109 vcpu->kvm->stat.max_mmu_page_hash_collisions = collisions;
2113 static void shadow_walk_init_using_root(struct kvm_shadow_walk_iterator *iterator,
2114 struct kvm_vcpu *vcpu, hpa_t root,
2117 iterator->addr = addr;
2118 iterator->shadow_addr = root;
2119 iterator->level = vcpu->arch.mmu->root_role.level;
2121 if (iterator->level >= PT64_ROOT_4LEVEL &&
2122 vcpu->arch.mmu->cpu_role.base.level < PT64_ROOT_4LEVEL &&
2123 !vcpu->arch.mmu->root_role.direct)
2124 iterator->level = PT32E_ROOT_LEVEL;
2126 if (iterator->level == PT32E_ROOT_LEVEL) {
2128 * prev_root is currently only used for 64-bit hosts. So only
2129 * the active root_hpa is valid here.
2131 BUG_ON(root != vcpu->arch.mmu->root.hpa);
2133 iterator->shadow_addr
2134 = vcpu->arch.mmu->pae_root[(addr >> 30) & 3];
2135 iterator->shadow_addr &= SPTE_BASE_ADDR_MASK;
2137 if (!iterator->shadow_addr)
2138 iterator->level = 0;
2142 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
2143 struct kvm_vcpu *vcpu, u64 addr)
2145 shadow_walk_init_using_root(iterator, vcpu, vcpu->arch.mmu->root.hpa,
2149 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
2151 if (iterator->level < PG_LEVEL_4K)
2154 iterator->index = SPTE_INDEX(iterator->addr, iterator->level);
2155 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
2159 static void __shadow_walk_next(struct kvm_shadow_walk_iterator *iterator,
2162 if (!is_shadow_present_pte(spte) || is_last_spte(spte, iterator->level)) {
2163 iterator->level = 0;
2167 iterator->shadow_addr = spte & SPTE_BASE_ADDR_MASK;
2171 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
2173 __shadow_walk_next(iterator, *iterator->sptep);
2176 static void link_shadow_page(struct kvm_vcpu *vcpu, u64 *sptep,
2177 struct kvm_mmu_page *sp)
2181 BUILD_BUG_ON(VMX_EPT_WRITABLE_MASK != PT_WRITABLE_MASK);
2183 spte = make_nonleaf_spte(sp->spt, sp_ad_disabled(sp));
2185 mmu_spte_set(sptep, spte);
2187 mmu_page_add_parent_pte(vcpu, sp, sptep);
2189 if (sp->unsync_children || sp->unsync)
2193 static void validate_direct_spte(struct kvm_vcpu *vcpu, u64 *sptep,
2194 unsigned direct_access)
2196 if (is_shadow_present_pte(*sptep) && !is_large_pte(*sptep)) {
2197 struct kvm_mmu_page *child;
2200 * For the direct sp, if the guest pte's dirty bit
2201 * changed form clean to dirty, it will corrupt the
2202 * sp's access: allow writable in the read-only sp,
2203 * so we should update the spte at this point to get
2204 * a new sp with the correct access.
2206 child = to_shadow_page(*sptep & SPTE_BASE_ADDR_MASK);
2207 if (child->role.access == direct_access)
2210 drop_parent_pte(child, sptep);
2211 kvm_flush_remote_tlbs_with_address(vcpu->kvm, child->gfn, 1);
2215 /* Returns the number of zapped non-leaf child shadow pages. */
2216 static int mmu_page_zap_pte(struct kvm *kvm, struct kvm_mmu_page *sp,
2217 u64 *spte, struct list_head *invalid_list)
2220 struct kvm_mmu_page *child;
2223 if (is_shadow_present_pte(pte)) {
2224 if (is_last_spte(pte, sp->role.level)) {
2225 drop_spte(kvm, spte);
2227 child = to_shadow_page(pte & SPTE_BASE_ADDR_MASK);
2228 drop_parent_pte(child, spte);
2231 * Recursively zap nested TDP SPs, parentless SPs are
2232 * unlikely to be used again in the near future. This
2233 * avoids retaining a large number of stale nested SPs.
2235 if (tdp_enabled && invalid_list &&
2236 child->role.guest_mode && !child->parent_ptes.val)
2237 return kvm_mmu_prepare_zap_page(kvm, child,
2240 } else if (is_mmio_spte(pte)) {
2241 mmu_spte_clear_no_track(spte);
2246 static int kvm_mmu_page_unlink_children(struct kvm *kvm,
2247 struct kvm_mmu_page *sp,
2248 struct list_head *invalid_list)
2253 for (i = 0; i < SPTE_ENT_PER_PAGE; ++i)
2254 zapped += mmu_page_zap_pte(kvm, sp, sp->spt + i, invalid_list);
2259 static void kvm_mmu_unlink_parents(struct kvm_mmu_page *sp)
2262 struct rmap_iterator iter;
2264 while ((sptep = rmap_get_first(&sp->parent_ptes, &iter)))
2265 drop_parent_pte(sp, sptep);
2268 static int mmu_zap_unsync_children(struct kvm *kvm,
2269 struct kvm_mmu_page *parent,
2270 struct list_head *invalid_list)
2273 struct mmu_page_path parents;
2274 struct kvm_mmu_pages pages;
2276 if (parent->role.level == PG_LEVEL_4K)
2279 while (mmu_unsync_walk(parent, &pages)) {
2280 struct kvm_mmu_page *sp;
2282 for_each_sp(pages, sp, parents, i) {
2283 kvm_mmu_prepare_zap_page(kvm, sp, invalid_list);
2284 mmu_pages_clear_parents(&parents);
2292 static bool __kvm_mmu_prepare_zap_page(struct kvm *kvm,
2293 struct kvm_mmu_page *sp,
2294 struct list_head *invalid_list,
2297 bool list_unstable, zapped_root = false;
2299 trace_kvm_mmu_prepare_zap_page(sp);
2300 ++kvm->stat.mmu_shadow_zapped;
2301 *nr_zapped = mmu_zap_unsync_children(kvm, sp, invalid_list);
2302 *nr_zapped += kvm_mmu_page_unlink_children(kvm, sp, invalid_list);
2303 kvm_mmu_unlink_parents(sp);
2305 /* Zapping children means active_mmu_pages has become unstable. */
2306 list_unstable = *nr_zapped;
2308 if (!sp->role.invalid && sp_has_gptes(sp))
2309 unaccount_shadowed(kvm, sp);
2312 kvm_unlink_unsync_page(kvm, sp);
2313 if (!sp->root_count) {
2318 * Already invalid pages (previously active roots) are not on
2319 * the active page list. See list_del() in the "else" case of
2322 if (sp->role.invalid)
2323 list_add(&sp->link, invalid_list);
2325 list_move(&sp->link, invalid_list);
2326 kvm_mod_used_mmu_pages(kvm, -1);
2329 * Remove the active root from the active page list, the root
2330 * will be explicitly freed when the root_count hits zero.
2332 list_del(&sp->link);
2335 * Obsolete pages cannot be used on any vCPUs, see the comment
2336 * in kvm_mmu_zap_all_fast(). Note, is_obsolete_sp() also
2337 * treats invalid shadow pages as being obsolete.
2339 zapped_root = !is_obsolete_sp(kvm, sp);
2342 if (sp->lpage_disallowed)
2343 unaccount_huge_nx_page(kvm, sp);
2345 sp->role.invalid = 1;
2348 * Make the request to free obsolete roots after marking the root
2349 * invalid, otherwise other vCPUs may not see it as invalid.
2352 kvm_make_all_cpus_request(kvm, KVM_REQ_MMU_FREE_OBSOLETE_ROOTS);
2353 return list_unstable;
2356 static bool kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
2357 struct list_head *invalid_list)
2361 __kvm_mmu_prepare_zap_page(kvm, sp, invalid_list, &nr_zapped);
2365 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
2366 struct list_head *invalid_list)
2368 struct kvm_mmu_page *sp, *nsp;
2370 if (list_empty(invalid_list))
2374 * We need to make sure everyone sees our modifications to
2375 * the page tables and see changes to vcpu->mode here. The barrier
2376 * in the kvm_flush_remote_tlbs() achieves this. This pairs
2377 * with vcpu_enter_guest and walk_shadow_page_lockless_begin/end.
2379 * In addition, kvm_flush_remote_tlbs waits for all vcpus to exit
2380 * guest mode and/or lockless shadow page table walks.
2382 kvm_flush_remote_tlbs(kvm);
2384 list_for_each_entry_safe(sp, nsp, invalid_list, link) {
2385 WARN_ON(!sp->role.invalid || sp->root_count);
2386 kvm_mmu_free_page(sp);
2390 static unsigned long kvm_mmu_zap_oldest_mmu_pages(struct kvm *kvm,
2391 unsigned long nr_to_zap)
2393 unsigned long total_zapped = 0;
2394 struct kvm_mmu_page *sp, *tmp;
2395 LIST_HEAD(invalid_list);
2399 if (list_empty(&kvm->arch.active_mmu_pages))
2403 list_for_each_entry_safe_reverse(sp, tmp, &kvm->arch.active_mmu_pages, link) {
2405 * Don't zap active root pages, the page itself can't be freed
2406 * and zapping it will just force vCPUs to realloc and reload.
2411 unstable = __kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list,
2413 total_zapped += nr_zapped;
2414 if (total_zapped >= nr_to_zap)
2421 kvm_mmu_commit_zap_page(kvm, &invalid_list);
2423 kvm->stat.mmu_recycled += total_zapped;
2424 return total_zapped;
2427 static inline unsigned long kvm_mmu_available_pages(struct kvm *kvm)
2429 if (kvm->arch.n_max_mmu_pages > kvm->arch.n_used_mmu_pages)
2430 return kvm->arch.n_max_mmu_pages -
2431 kvm->arch.n_used_mmu_pages;
2436 static int make_mmu_pages_available(struct kvm_vcpu *vcpu)
2438 unsigned long avail = kvm_mmu_available_pages(vcpu->kvm);
2440 if (likely(avail >= KVM_MIN_FREE_MMU_PAGES))
2443 kvm_mmu_zap_oldest_mmu_pages(vcpu->kvm, KVM_REFILL_PAGES - avail);
2446 * Note, this check is intentionally soft, it only guarantees that one
2447 * page is available, while the caller may end up allocating as many as
2448 * four pages, e.g. for PAE roots or for 5-level paging. Temporarily
2449 * exceeding the (arbitrary by default) limit will not harm the host,
2450 * being too aggressive may unnecessarily kill the guest, and getting an
2451 * exact count is far more trouble than it's worth, especially in the
2454 if (!kvm_mmu_available_pages(vcpu->kvm))
2460 * Changing the number of mmu pages allocated to the vm
2461 * Note: if goal_nr_mmu_pages is too small, you will get dead lock
2463 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned long goal_nr_mmu_pages)
2465 write_lock(&kvm->mmu_lock);
2467 if (kvm->arch.n_used_mmu_pages > goal_nr_mmu_pages) {
2468 kvm_mmu_zap_oldest_mmu_pages(kvm, kvm->arch.n_used_mmu_pages -
2471 goal_nr_mmu_pages = kvm->arch.n_used_mmu_pages;
2474 kvm->arch.n_max_mmu_pages = goal_nr_mmu_pages;
2476 write_unlock(&kvm->mmu_lock);
2479 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
2481 struct kvm_mmu_page *sp;
2482 LIST_HEAD(invalid_list);
2485 pgprintk("%s: looking for gfn %llx\n", __func__, gfn);
2487 write_lock(&kvm->mmu_lock);
2488 for_each_gfn_valid_sp_with_gptes(kvm, sp, gfn) {
2489 pgprintk("%s: gfn %llx role %x\n", __func__, gfn,
2492 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
2494 kvm_mmu_commit_zap_page(kvm, &invalid_list);
2495 write_unlock(&kvm->mmu_lock);
2500 static int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2505 if (vcpu->arch.mmu->root_role.direct)
2508 gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
2510 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2515 static void kvm_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
2517 trace_kvm_mmu_unsync_page(sp);
2518 ++kvm->stat.mmu_unsync;
2521 kvm_mmu_mark_parents_unsync(sp);
2525 * Attempt to unsync any shadow pages that can be reached by the specified gfn,
2526 * KVM is creating a writable mapping for said gfn. Returns 0 if all pages
2527 * were marked unsync (or if there is no shadow page), -EPERM if the SPTE must
2528 * be write-protected.
2530 int mmu_try_to_unsync_pages(struct kvm *kvm, const struct kvm_memory_slot *slot,
2531 gfn_t gfn, bool can_unsync, bool prefetch)
2533 struct kvm_mmu_page *sp;
2534 bool locked = false;
2537 * Force write-protection if the page is being tracked. Note, the page
2538 * track machinery is used to write-protect upper-level shadow pages,
2539 * i.e. this guards the role.level == 4K assertion below!
2541 if (kvm_slot_page_track_is_active(kvm, slot, gfn, KVM_PAGE_TRACK_WRITE))
2545 * The page is not write-tracked, mark existing shadow pages unsync
2546 * unless KVM is synchronizing an unsync SP (can_unsync = false). In
2547 * that case, KVM must complete emulation of the guest TLB flush before
2548 * allowing shadow pages to become unsync (writable by the guest).
2550 for_each_gfn_valid_sp_with_gptes(kvm, sp, gfn) {
2561 * TDP MMU page faults require an additional spinlock as they
2562 * run with mmu_lock held for read, not write, and the unsync
2563 * logic is not thread safe. Take the spinklock regardless of
2564 * the MMU type to avoid extra conditionals/parameters, there's
2565 * no meaningful penalty if mmu_lock is held for write.
2569 spin_lock(&kvm->arch.mmu_unsync_pages_lock);
2572 * Recheck after taking the spinlock, a different vCPU
2573 * may have since marked the page unsync. A false
2574 * positive on the unprotected check above is not
2575 * possible as clearing sp->unsync _must_ hold mmu_lock
2576 * for write, i.e. unsync cannot transition from 0->1
2577 * while this CPU holds mmu_lock for read (or write).
2579 if (READ_ONCE(sp->unsync))
2583 WARN_ON(sp->role.level != PG_LEVEL_4K);
2584 kvm_unsync_page(kvm, sp);
2587 spin_unlock(&kvm->arch.mmu_unsync_pages_lock);
2590 * We need to ensure that the marking of unsync pages is visible
2591 * before the SPTE is updated to allow writes because
2592 * kvm_mmu_sync_roots() checks the unsync flags without holding
2593 * the MMU lock and so can race with this. If the SPTE was updated
2594 * before the page had been marked as unsync-ed, something like the
2595 * following could happen:
2598 * ---------------------------------------------------------------------
2599 * 1.2 Host updates SPTE
2601 * 2.1 Guest writes a GPTE for GVA X.
2602 * (GPTE being in the guest page table shadowed
2603 * by the SP from CPU 1.)
2604 * This reads SPTE during the page table walk.
2605 * Since SPTE.W is read as 1, there is no
2608 * 2.2 Guest issues TLB flush.
2609 * That causes a VM Exit.
2611 * 2.3 Walking of unsync pages sees sp->unsync is
2612 * false and skips the page.
2614 * 2.4 Guest accesses GVA X.
2615 * Since the mapping in the SP was not updated,
2616 * so the old mapping for GVA X incorrectly
2620 * (sp->unsync = true)
2622 * The write barrier below ensures that 1.1 happens before 1.2 and thus
2623 * the situation in 2.4 does not arise. It pairs with the read barrier
2624 * in is_unsync_root(), placed between 2.1's load of SPTE.W and 2.3.
2631 static int mmu_set_spte(struct kvm_vcpu *vcpu, struct kvm_memory_slot *slot,
2632 u64 *sptep, unsigned int pte_access, gfn_t gfn,
2633 kvm_pfn_t pfn, struct kvm_page_fault *fault)
2635 struct kvm_mmu_page *sp = sptep_to_sp(sptep);
2636 int level = sp->role.level;
2637 int was_rmapped = 0;
2638 int ret = RET_PF_FIXED;
2643 /* Prefetching always gets a writable pfn. */
2644 bool host_writable = !fault || fault->map_writable;
2645 bool prefetch = !fault || fault->prefetch;
2646 bool write_fault = fault && fault->write;
2648 pgprintk("%s: spte %llx write_fault %d gfn %llx\n", __func__,
2649 *sptep, write_fault, gfn);
2651 if (unlikely(is_noslot_pfn(pfn))) {
2652 vcpu->stat.pf_mmio_spte_created++;
2653 mark_mmio_spte(vcpu, sptep, gfn, pte_access);
2654 return RET_PF_EMULATE;
2657 if (is_shadow_present_pte(*sptep)) {
2659 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
2660 * the parent of the now unreachable PTE.
2662 if (level > PG_LEVEL_4K && !is_large_pte(*sptep)) {
2663 struct kvm_mmu_page *child;
2666 child = to_shadow_page(pte & SPTE_BASE_ADDR_MASK);
2667 drop_parent_pte(child, sptep);
2669 } else if (pfn != spte_to_pfn(*sptep)) {
2670 pgprintk("hfn old %llx new %llx\n",
2671 spte_to_pfn(*sptep), pfn);
2672 drop_spte(vcpu->kvm, sptep);
2678 wrprot = make_spte(vcpu, sp, slot, pte_access, gfn, pfn, *sptep, prefetch,
2679 true, host_writable, &spte);
2681 if (*sptep == spte) {
2682 ret = RET_PF_SPURIOUS;
2684 flush |= mmu_spte_update(sptep, spte);
2685 trace_kvm_mmu_set_spte(level, gfn, sptep);
2690 ret = RET_PF_EMULATE;
2694 kvm_flush_remote_tlbs_with_address(vcpu->kvm, gfn,
2695 KVM_PAGES_PER_HPAGE(level));
2697 pgprintk("%s: setting spte %llx\n", __func__, *sptep);
2700 WARN_ON_ONCE(ret == RET_PF_SPURIOUS);
2701 kvm_update_page_stats(vcpu->kvm, level, 1);
2702 rmap_add(vcpu, slot, sptep, gfn);
2708 static int direct_pte_prefetch_many(struct kvm_vcpu *vcpu,
2709 struct kvm_mmu_page *sp,
2710 u64 *start, u64 *end)
2712 struct page *pages[PTE_PREFETCH_NUM];
2713 struct kvm_memory_slot *slot;
2714 unsigned int access = sp->role.access;
2718 gfn = kvm_mmu_page_get_gfn(sp, start - sp->spt);
2719 slot = gfn_to_memslot_dirty_bitmap(vcpu, gfn, access & ACC_WRITE_MASK);
2723 ret = gfn_to_page_many_atomic(slot, gfn, pages, end - start);
2727 for (i = 0; i < ret; i++, gfn++, start++) {
2728 mmu_set_spte(vcpu, slot, start, access, gfn,
2729 page_to_pfn(pages[i]), NULL);
2736 static void __direct_pte_prefetch(struct kvm_vcpu *vcpu,
2737 struct kvm_mmu_page *sp, u64 *sptep)
2739 u64 *spte, *start = NULL;
2742 WARN_ON(!sp->role.direct);
2744 i = (sptep - sp->spt) & ~(PTE_PREFETCH_NUM - 1);
2747 for (i = 0; i < PTE_PREFETCH_NUM; i++, spte++) {
2748 if (is_shadow_present_pte(*spte) || spte == sptep) {
2751 if (direct_pte_prefetch_many(vcpu, sp, start, spte) < 0)
2758 direct_pte_prefetch_many(vcpu, sp, start, spte);
2761 static void direct_pte_prefetch(struct kvm_vcpu *vcpu, u64 *sptep)
2763 struct kvm_mmu_page *sp;
2765 sp = sptep_to_sp(sptep);
2768 * Without accessed bits, there's no way to distinguish between
2769 * actually accessed translations and prefetched, so disable pte
2770 * prefetch if accessed bits aren't available.
2772 if (sp_ad_disabled(sp))
2775 if (sp->role.level > PG_LEVEL_4K)
2779 * If addresses are being invalidated, skip prefetching to avoid
2780 * accidentally prefetching those addresses.
2782 if (unlikely(vcpu->kvm->mmu_notifier_count))
2785 __direct_pte_prefetch(vcpu, sp, sptep);
2788 static int host_pfn_mapping_level(struct kvm *kvm, gfn_t gfn, kvm_pfn_t pfn,
2789 const struct kvm_memory_slot *slot)
2792 unsigned long flags;
2793 int level = PG_LEVEL_4K;
2799 if (!PageCompound(pfn_to_page(pfn)) && !kvm_is_zone_device_pfn(pfn))
2803 * Note, using the already-retrieved memslot and __gfn_to_hva_memslot()
2804 * is not solely for performance, it's also necessary to avoid the
2805 * "writable" check in __gfn_to_hva_many(), which will always fail on
2806 * read-only memslots due to gfn_to_hva() assuming writes. Earlier
2807 * page fault steps have already verified the guest isn't writing a
2808 * read-only memslot.
2810 hva = __gfn_to_hva_memslot(slot, gfn);
2813 * Lookup the mapping level in the current mm. The information
2814 * may become stale soon, but it is safe to use as long as
2815 * 1) mmu_notifier_retry was checked after taking mmu_lock, and
2816 * 2) mmu_lock is taken now.
2818 * We still need to disable IRQs to prevent concurrent tear down
2821 local_irq_save(flags);
2823 pgd = READ_ONCE(*pgd_offset(kvm->mm, hva));
2827 p4d = READ_ONCE(*p4d_offset(&pgd, hva));
2828 if (p4d_none(p4d) || !p4d_present(p4d))
2831 pud = READ_ONCE(*pud_offset(&p4d, hva));
2832 if (pud_none(pud) || !pud_present(pud))
2835 if (pud_large(pud)) {
2836 level = PG_LEVEL_1G;
2840 pmd = READ_ONCE(*pmd_offset(&pud, hva));
2841 if (pmd_none(pmd) || !pmd_present(pmd))
2845 level = PG_LEVEL_2M;
2848 local_irq_restore(flags);
2852 int kvm_mmu_max_mapping_level(struct kvm *kvm,
2853 const struct kvm_memory_slot *slot, gfn_t gfn,
2854 kvm_pfn_t pfn, int max_level)
2856 struct kvm_lpage_info *linfo;
2859 max_level = min(max_level, max_huge_page_level);
2860 for ( ; max_level > PG_LEVEL_4K; max_level--) {
2861 linfo = lpage_info_slot(gfn, slot, max_level);
2862 if (!linfo->disallow_lpage)
2866 if (max_level == PG_LEVEL_4K)
2869 host_level = host_pfn_mapping_level(kvm, gfn, pfn, slot);
2870 return min(host_level, max_level);
2873 void kvm_mmu_hugepage_adjust(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault)
2875 struct kvm_memory_slot *slot = fault->slot;
2878 fault->huge_page_disallowed = fault->exec && fault->nx_huge_page_workaround_enabled;
2880 if (unlikely(fault->max_level == PG_LEVEL_4K))
2883 if (is_error_noslot_pfn(fault->pfn) || kvm_is_reserved_pfn(fault->pfn))
2886 if (kvm_slot_dirty_track_enabled(slot))
2890 * Enforce the iTLB multihit workaround after capturing the requested
2891 * level, which will be used to do precise, accurate accounting.
2893 fault->req_level = kvm_mmu_max_mapping_level(vcpu->kvm, slot,
2894 fault->gfn, fault->pfn,
2896 if (fault->req_level == PG_LEVEL_4K || fault->huge_page_disallowed)
2900 * mmu_notifier_retry() was successful and mmu_lock is held, so
2901 * the pmd can't be split from under us.
2903 fault->goal_level = fault->req_level;
2904 mask = KVM_PAGES_PER_HPAGE(fault->goal_level) - 1;
2905 VM_BUG_ON((fault->gfn & mask) != (fault->pfn & mask));
2906 fault->pfn &= ~mask;
2909 void disallowed_hugepage_adjust(struct kvm_page_fault *fault, u64 spte, int cur_level)
2911 if (cur_level > PG_LEVEL_4K &&
2912 cur_level == fault->goal_level &&
2913 is_shadow_present_pte(spte) &&
2914 !is_large_pte(spte)) {
2916 * A small SPTE exists for this pfn, but FNAME(fetch)
2917 * and __direct_map would like to create a large PTE
2918 * instead: just force them to go down another level,
2919 * patching back for them into pfn the next 9 bits of
2922 u64 page_mask = KVM_PAGES_PER_HPAGE(cur_level) -
2923 KVM_PAGES_PER_HPAGE(cur_level - 1);
2924 fault->pfn |= fault->gfn & page_mask;
2925 fault->goal_level--;
2929 static int __direct_map(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault)
2931 struct kvm_shadow_walk_iterator it;
2932 struct kvm_mmu_page *sp;
2934 gfn_t base_gfn = fault->gfn;
2936 kvm_mmu_hugepage_adjust(vcpu, fault);
2938 trace_kvm_mmu_spte_requested(fault);
2939 for_each_shadow_entry(vcpu, fault->addr, it) {
2941 * We cannot overwrite existing page tables with an NX
2942 * large page, as the leaf could be executable.
2944 if (fault->nx_huge_page_workaround_enabled)
2945 disallowed_hugepage_adjust(fault, *it.sptep, it.level);
2947 base_gfn = fault->gfn & ~(KVM_PAGES_PER_HPAGE(it.level) - 1);
2948 if (it.level == fault->goal_level)
2951 drop_large_spte(vcpu, it.sptep);
2952 if (is_shadow_present_pte(*it.sptep))
2955 sp = kvm_mmu_get_page(vcpu, base_gfn, it.addr,
2956 it.level - 1, true, ACC_ALL);
2958 link_shadow_page(vcpu, it.sptep, sp);
2959 if (fault->is_tdp && fault->huge_page_disallowed &&
2960 fault->req_level >= it.level)
2961 account_huge_nx_page(vcpu->kvm, sp);
2964 if (WARN_ON_ONCE(it.level != fault->goal_level))
2967 ret = mmu_set_spte(vcpu, fault->slot, it.sptep, ACC_ALL,
2968 base_gfn, fault->pfn, fault);
2969 if (ret == RET_PF_SPURIOUS)
2972 direct_pte_prefetch(vcpu, it.sptep);
2976 static void kvm_send_hwpoison_signal(unsigned long address, struct task_struct *tsk)
2978 send_sig_mceerr(BUS_MCEERR_AR, (void __user *)address, PAGE_SHIFT, tsk);
2981 static int kvm_handle_bad_page(struct kvm_vcpu *vcpu, gfn_t gfn, kvm_pfn_t pfn)
2984 * Do not cache the mmio info caused by writing the readonly gfn
2985 * into the spte otherwise read access on readonly gfn also can
2986 * caused mmio page fault and treat it as mmio access.
2988 if (pfn == KVM_PFN_ERR_RO_FAULT)
2989 return RET_PF_EMULATE;
2991 if (pfn == KVM_PFN_ERR_HWPOISON) {
2992 kvm_send_hwpoison_signal(kvm_vcpu_gfn_to_hva(vcpu, gfn), current);
2993 return RET_PF_RETRY;
2999 static int handle_abnormal_pfn(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault,
3000 unsigned int access)
3002 /* The pfn is invalid, report the error! */
3003 if (unlikely(is_error_pfn(fault->pfn)))
3004 return kvm_handle_bad_page(vcpu, fault->gfn, fault->pfn);
3006 if (unlikely(!fault->slot)) {
3007 gva_t gva = fault->is_tdp ? 0 : fault->addr;
3009 vcpu_cache_mmio_info(vcpu, gva, fault->gfn,
3010 access & shadow_mmio_access_mask);
3012 * If MMIO caching is disabled, emulate immediately without
3013 * touching the shadow page tables as attempting to install an
3014 * MMIO SPTE will just be an expensive nop. Do not cache MMIO
3015 * whose gfn is greater than host.MAXPHYADDR, any guest that
3016 * generates such gfns is running nested and is being tricked
3017 * by L0 userspace (you can observe gfn > L1.MAXPHYADDR if
3018 * and only if L1's MAXPHYADDR is inaccurate with respect to
3021 if (unlikely(!enable_mmio_caching) ||
3022 unlikely(fault->gfn > kvm_mmu_max_gfn()))
3023 return RET_PF_EMULATE;
3026 return RET_PF_CONTINUE;
3029 static bool page_fault_can_be_fast(struct kvm_page_fault *fault)
3032 * Page faults with reserved bits set, i.e. faults on MMIO SPTEs, only
3033 * reach the common page fault handler if the SPTE has an invalid MMIO
3034 * generation number. Refreshing the MMIO generation needs to go down
3035 * the slow path. Note, EPT Misconfigs do NOT set the PRESENT flag!
3041 * #PF can be fast if:
3043 * 1. The shadow page table entry is not present and A/D bits are
3044 * disabled _by KVM_, which could mean that the fault is potentially
3045 * caused by access tracking (if enabled). If A/D bits are enabled
3046 * by KVM, but disabled by L1 for L2, KVM is forced to disable A/D
3047 * bits for L2 and employ access tracking, but the fast page fault
3048 * mechanism only supports direct MMUs.
3049 * 2. The shadow page table entry is present, the access is a write,
3050 * and no reserved bits are set (MMIO SPTEs cannot be "fixed"), i.e.
3051 * the fault was caused by a write-protection violation. If the
3052 * SPTE is MMU-writable (determined later), the fault can be fixed
3053 * by setting the Writable bit, which can be done out of mmu_lock.
3055 if (!fault->present)
3056 return !kvm_ad_enabled();
3059 * Note, instruction fetches and writes are mutually exclusive, ignore
3062 return fault->write;
3066 * Returns true if the SPTE was fixed successfully. Otherwise,
3067 * someone else modified the SPTE from its original value.
3070 fast_pf_fix_direct_spte(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault,
3071 u64 *sptep, u64 old_spte, u64 new_spte)
3074 * Theoretically we could also set dirty bit (and flush TLB) here in
3075 * order to eliminate unnecessary PML logging. See comments in
3076 * set_spte. But fast_page_fault is very unlikely to happen with PML
3077 * enabled, so we do not do this. This might result in the same GPA
3078 * to be logged in PML buffer again when the write really happens, and
3079 * eventually to be called by mark_page_dirty twice. But it's also no
3080 * harm. This also avoids the TLB flush needed after setting dirty bit
3081 * so non-PML cases won't be impacted.
3083 * Compare with set_spte where instead shadow_dirty_mask is set.
3085 if (!try_cmpxchg64(sptep, &old_spte, new_spte))
3088 if (is_writable_pte(new_spte) && !is_writable_pte(old_spte))
3089 mark_page_dirty_in_slot(vcpu->kvm, fault->slot, fault->gfn);
3094 static bool is_access_allowed(struct kvm_page_fault *fault, u64 spte)
3097 return is_executable_pte(spte);
3100 return is_writable_pte(spte);
3102 /* Fault was on Read access */
3103 return spte & PT_PRESENT_MASK;
3107 * Returns the last level spte pointer of the shadow page walk for the given
3108 * gpa, and sets *spte to the spte value. This spte may be non-preset. If no
3109 * walk could be performed, returns NULL and *spte does not contain valid data.
3112 * - Must be called between walk_shadow_page_lockless_{begin,end}.
3113 * - The returned sptep must not be used after walk_shadow_page_lockless_end.
3115 static u64 *fast_pf_get_last_sptep(struct kvm_vcpu *vcpu, gpa_t gpa, u64 *spte)
3117 struct kvm_shadow_walk_iterator iterator;
3121 for_each_shadow_entry_lockless(vcpu, gpa, iterator, old_spte) {
3122 sptep = iterator.sptep;
3130 * Returns one of RET_PF_INVALID, RET_PF_FIXED or RET_PF_SPURIOUS.
3132 static int fast_page_fault(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault)
3134 struct kvm_mmu_page *sp;
3135 int ret = RET_PF_INVALID;
3138 uint retry_count = 0;
3140 if (!page_fault_can_be_fast(fault))
3143 walk_shadow_page_lockless_begin(vcpu);
3148 if (is_tdp_mmu(vcpu->arch.mmu))
3149 sptep = kvm_tdp_mmu_fast_pf_get_last_sptep(vcpu, fault->addr, &spte);
3151 sptep = fast_pf_get_last_sptep(vcpu, fault->addr, &spte);
3153 if (!is_shadow_present_pte(spte))
3156 sp = sptep_to_sp(sptep);
3157 if (!is_last_spte(spte, sp->role.level))
3161 * Check whether the memory access that caused the fault would
3162 * still cause it if it were to be performed right now. If not,
3163 * then this is a spurious fault caused by TLB lazily flushed,
3164 * or some other CPU has already fixed the PTE after the
3165 * current CPU took the fault.
3167 * Need not check the access of upper level table entries since
3168 * they are always ACC_ALL.
3170 if (is_access_allowed(fault, spte)) {
3171 ret = RET_PF_SPURIOUS;
3178 * KVM only supports fixing page faults outside of MMU lock for
3179 * direct MMUs, nested MMUs are always indirect, and KVM always
3180 * uses A/D bits for non-nested MMUs. Thus, if A/D bits are
3181 * enabled, the SPTE can't be an access-tracked SPTE.
3183 if (unlikely(!kvm_ad_enabled()) && is_access_track_spte(spte))
3184 new_spte = restore_acc_track_spte(new_spte);
3187 * To keep things simple, only SPTEs that are MMU-writable can
3188 * be made fully writable outside of mmu_lock, e.g. only SPTEs
3189 * that were write-protected for dirty-logging or access
3190 * tracking are handled here. Don't bother checking if the
3191 * SPTE is writable to prioritize running with A/D bits enabled.
3192 * The is_access_allowed() check above handles the common case
3193 * of the fault being spurious, and the SPTE is known to be
3194 * shadow-present, i.e. except for access tracking restoration
3195 * making the new SPTE writable, the check is wasteful.
3197 if (fault->write && is_mmu_writable_spte(spte)) {
3198 new_spte |= PT_WRITABLE_MASK;
3201 * Do not fix write-permission on the large spte when
3202 * dirty logging is enabled. Since we only dirty the
3203 * first page into the dirty-bitmap in
3204 * fast_pf_fix_direct_spte(), other pages are missed
3205 * if its slot has dirty logging enabled.
3207 * Instead, we let the slow page fault path create a
3208 * normal spte to fix the access.
3210 if (sp->role.level > PG_LEVEL_4K &&
3211 kvm_slot_dirty_track_enabled(fault->slot))
3215 /* Verify that the fault can be handled in the fast path */
3216 if (new_spte == spte ||
3217 !is_access_allowed(fault, new_spte))
3221 * Currently, fast page fault only works for direct mapping
3222 * since the gfn is not stable for indirect shadow page. See
3223 * Documentation/virt/kvm/locking.rst to get more detail.
3225 if (fast_pf_fix_direct_spte(vcpu, fault, sptep, spte, new_spte)) {
3230 if (++retry_count > 4) {
3231 printk_once(KERN_WARNING
3232 "kvm: Fast #PF retrying more than 4 times.\n");
3238 trace_fast_page_fault(vcpu, fault, sptep, spte, ret);
3239 walk_shadow_page_lockless_end(vcpu);
3241 if (ret != RET_PF_INVALID)
3242 vcpu->stat.pf_fast++;
3247 static void mmu_free_root_page(struct kvm *kvm, hpa_t *root_hpa,
3248 struct list_head *invalid_list)
3250 struct kvm_mmu_page *sp;
3252 if (!VALID_PAGE(*root_hpa))
3255 sp = to_shadow_page(*root_hpa & SPTE_BASE_ADDR_MASK);
3259 if (is_tdp_mmu_page(sp))
3260 kvm_tdp_mmu_put_root(kvm, sp, false);
3261 else if (!--sp->root_count && sp->role.invalid)
3262 kvm_mmu_prepare_zap_page(kvm, sp, invalid_list);
3264 *root_hpa = INVALID_PAGE;
3267 /* roots_to_free must be some combination of the KVM_MMU_ROOT_* flags */
3268 void kvm_mmu_free_roots(struct kvm *kvm, struct kvm_mmu *mmu,
3269 ulong roots_to_free)
3272 LIST_HEAD(invalid_list);
3273 bool free_active_root;
3275 BUILD_BUG_ON(KVM_MMU_NUM_PREV_ROOTS >= BITS_PER_LONG);
3277 /* Before acquiring the MMU lock, see if we need to do any real work. */
3278 free_active_root = (roots_to_free & KVM_MMU_ROOT_CURRENT)
3279 && VALID_PAGE(mmu->root.hpa);
3281 if (!free_active_root) {
3282 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
3283 if ((roots_to_free & KVM_MMU_ROOT_PREVIOUS(i)) &&
3284 VALID_PAGE(mmu->prev_roots[i].hpa))
3287 if (i == KVM_MMU_NUM_PREV_ROOTS)
3291 write_lock(&kvm->mmu_lock);
3293 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
3294 if (roots_to_free & KVM_MMU_ROOT_PREVIOUS(i))
3295 mmu_free_root_page(kvm, &mmu->prev_roots[i].hpa,
3298 if (free_active_root) {
3299 if (to_shadow_page(mmu->root.hpa)) {
3300 mmu_free_root_page(kvm, &mmu->root.hpa, &invalid_list);
3301 } else if (mmu->pae_root) {
3302 for (i = 0; i < 4; ++i) {
3303 if (!IS_VALID_PAE_ROOT(mmu->pae_root[i]))
3306 mmu_free_root_page(kvm, &mmu->pae_root[i],
3308 mmu->pae_root[i] = INVALID_PAE_ROOT;
3311 mmu->root.hpa = INVALID_PAGE;
3315 kvm_mmu_commit_zap_page(kvm, &invalid_list);
3316 write_unlock(&kvm->mmu_lock);
3318 EXPORT_SYMBOL_GPL(kvm_mmu_free_roots);
3320 void kvm_mmu_free_guest_mode_roots(struct kvm *kvm, struct kvm_mmu *mmu)
3322 unsigned long roots_to_free = 0;
3327 * This should not be called while L2 is active, L2 can't invalidate
3328 * _only_ its own roots, e.g. INVVPID unconditionally exits.
3330 WARN_ON_ONCE(mmu->root_role.guest_mode);
3332 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) {
3333 root_hpa = mmu->prev_roots[i].hpa;
3334 if (!VALID_PAGE(root_hpa))
3337 if (!to_shadow_page(root_hpa) ||
3338 to_shadow_page(root_hpa)->role.guest_mode)
3339 roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
3342 kvm_mmu_free_roots(kvm, mmu, roots_to_free);
3344 EXPORT_SYMBOL_GPL(kvm_mmu_free_guest_mode_roots);
3347 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
3351 if (!kvm_vcpu_is_visible_gfn(vcpu, root_gfn)) {
3352 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3359 static hpa_t mmu_alloc_root(struct kvm_vcpu *vcpu, gfn_t gfn, gva_t gva,
3360 u8 level, bool direct)
3362 struct kvm_mmu_page *sp;
3364 sp = kvm_mmu_get_page(vcpu, gfn, gva, level, direct, ACC_ALL);
3367 return __pa(sp->spt);
3370 static int mmu_alloc_direct_roots(struct kvm_vcpu *vcpu)
3372 struct kvm_mmu *mmu = vcpu->arch.mmu;
3373 u8 shadow_root_level = mmu->root_role.level;
3378 write_lock(&vcpu->kvm->mmu_lock);
3379 r = make_mmu_pages_available(vcpu);
3383 if (is_tdp_mmu_enabled(vcpu->kvm)) {
3384 root = kvm_tdp_mmu_get_vcpu_root_hpa(vcpu);
3385 mmu->root.hpa = root;
3386 } else if (shadow_root_level >= PT64_ROOT_4LEVEL) {
3387 root = mmu_alloc_root(vcpu, 0, 0, shadow_root_level, true);
3388 mmu->root.hpa = root;
3389 } else if (shadow_root_level == PT32E_ROOT_LEVEL) {
3390 if (WARN_ON_ONCE(!mmu->pae_root)) {
3395 for (i = 0; i < 4; ++i) {
3396 WARN_ON_ONCE(IS_VALID_PAE_ROOT(mmu->pae_root[i]));
3398 root = mmu_alloc_root(vcpu, i << (30 - PAGE_SHIFT),
3399 i << 30, PT32_ROOT_LEVEL, true);
3400 mmu->pae_root[i] = root | PT_PRESENT_MASK |
3403 mmu->root.hpa = __pa(mmu->pae_root);
3405 WARN_ONCE(1, "Bad TDP root level = %d\n", shadow_root_level);
3410 /* root.pgd is ignored for direct MMUs. */
3413 write_unlock(&vcpu->kvm->mmu_lock);
3417 static int mmu_first_shadow_root_alloc(struct kvm *kvm)
3419 struct kvm_memslots *slots;
3420 struct kvm_memory_slot *slot;
3424 * Check if this is the first shadow root being allocated before
3427 if (kvm_shadow_root_allocated(kvm))
3430 mutex_lock(&kvm->slots_arch_lock);
3432 /* Recheck, under the lock, whether this is the first shadow root. */
3433 if (kvm_shadow_root_allocated(kvm))
3437 * Check if anything actually needs to be allocated, e.g. all metadata
3438 * will be allocated upfront if TDP is disabled.
3440 if (kvm_memslots_have_rmaps(kvm) &&
3441 kvm_page_track_write_tracking_enabled(kvm))
3444 for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
3445 slots = __kvm_memslots(kvm, i);
3446 kvm_for_each_memslot(slot, bkt, slots) {
3448 * Both of these functions are no-ops if the target is
3449 * already allocated, so unconditionally calling both
3450 * is safe. Intentionally do NOT free allocations on
3451 * failure to avoid having to track which allocations
3452 * were made now versus when the memslot was created.
3453 * The metadata is guaranteed to be freed when the slot
3454 * is freed, and will be kept/used if userspace retries
3455 * KVM_RUN instead of killing the VM.
3457 r = memslot_rmap_alloc(slot, slot->npages);
3460 r = kvm_page_track_write_tracking_alloc(slot);
3467 * Ensure that shadow_root_allocated becomes true strictly after
3468 * all the related pointers are set.
3471 smp_store_release(&kvm->arch.shadow_root_allocated, true);
3474 mutex_unlock(&kvm->slots_arch_lock);
3478 static int mmu_alloc_shadow_roots(struct kvm_vcpu *vcpu)
3480 struct kvm_mmu *mmu = vcpu->arch.mmu;
3481 u64 pdptrs[4], pm_mask;
3482 gfn_t root_gfn, root_pgd;
3487 root_pgd = mmu->get_guest_pgd(vcpu);
3488 root_gfn = root_pgd >> PAGE_SHIFT;
3490 if (mmu_check_root(vcpu, root_gfn))
3494 * On SVM, reading PDPTRs might access guest memory, which might fault
3495 * and thus might sleep. Grab the PDPTRs before acquiring mmu_lock.
3497 if (mmu->cpu_role.base.level == PT32E_ROOT_LEVEL) {
3498 for (i = 0; i < 4; ++i) {
3499 pdptrs[i] = mmu->get_pdptr(vcpu, i);
3500 if (!(pdptrs[i] & PT_PRESENT_MASK))
3503 if (mmu_check_root(vcpu, pdptrs[i] >> PAGE_SHIFT))
3508 r = mmu_first_shadow_root_alloc(vcpu->kvm);
3512 write_lock(&vcpu->kvm->mmu_lock);
3513 r = make_mmu_pages_available(vcpu);
3518 * Do we shadow a long mode page table? If so we need to
3519 * write-protect the guests page table root.
3521 if (mmu->cpu_role.base.level >= PT64_ROOT_4LEVEL) {
3522 root = mmu_alloc_root(vcpu, root_gfn, 0,
3523 mmu->root_role.level, false);
3524 mmu->root.hpa = root;
3528 if (WARN_ON_ONCE(!mmu->pae_root)) {
3534 * We shadow a 32 bit page table. This may be a legacy 2-level
3535 * or a PAE 3-level page table. In either case we need to be aware that
3536 * the shadow page table may be a PAE or a long mode page table.
3538 pm_mask = PT_PRESENT_MASK | shadow_me_value;
3539 if (mmu->root_role.level >= PT64_ROOT_4LEVEL) {
3540 pm_mask |= PT_ACCESSED_MASK | PT_WRITABLE_MASK | PT_USER_MASK;
3542 if (WARN_ON_ONCE(!mmu->pml4_root)) {
3546 mmu->pml4_root[0] = __pa(mmu->pae_root) | pm_mask;
3548 if (mmu->root_role.level == PT64_ROOT_5LEVEL) {
3549 if (WARN_ON_ONCE(!mmu->pml5_root)) {
3553 mmu->pml5_root[0] = __pa(mmu->pml4_root) | pm_mask;
3557 for (i = 0; i < 4; ++i) {
3558 WARN_ON_ONCE(IS_VALID_PAE_ROOT(mmu->pae_root[i]));
3560 if (mmu->cpu_role.base.level == PT32E_ROOT_LEVEL) {
3561 if (!(pdptrs[i] & PT_PRESENT_MASK)) {
3562 mmu->pae_root[i] = INVALID_PAE_ROOT;
3565 root_gfn = pdptrs[i] >> PAGE_SHIFT;
3568 root = mmu_alloc_root(vcpu, root_gfn, i << 30,
3569 PT32_ROOT_LEVEL, false);
3570 mmu->pae_root[i] = root | pm_mask;
3573 if (mmu->root_role.level == PT64_ROOT_5LEVEL)
3574 mmu->root.hpa = __pa(mmu->pml5_root);
3575 else if (mmu->root_role.level == PT64_ROOT_4LEVEL)
3576 mmu->root.hpa = __pa(mmu->pml4_root);
3578 mmu->root.hpa = __pa(mmu->pae_root);
3581 mmu->root.pgd = root_pgd;
3583 write_unlock(&vcpu->kvm->mmu_lock);
3588 static int mmu_alloc_special_roots(struct kvm_vcpu *vcpu)
3590 struct kvm_mmu *mmu = vcpu->arch.mmu;
3591 bool need_pml5 = mmu->root_role.level > PT64_ROOT_4LEVEL;
3592 u64 *pml5_root = NULL;
3593 u64 *pml4_root = NULL;
3597 * When shadowing 32-bit or PAE NPT with 64-bit NPT, the PML4 and PDP
3598 * tables are allocated and initialized at root creation as there is no
3599 * equivalent level in the guest's NPT to shadow. Allocate the tables
3600 * on demand, as running a 32-bit L1 VMM on 64-bit KVM is very rare.
3602 if (mmu->root_role.direct ||
3603 mmu->cpu_role.base.level >= PT64_ROOT_4LEVEL ||
3604 mmu->root_role.level < PT64_ROOT_4LEVEL)
3608 * NPT, the only paging mode that uses this horror, uses a fixed number
3609 * of levels for the shadow page tables, e.g. all MMUs are 4-level or
3610 * all MMus are 5-level. Thus, this can safely require that pml5_root
3611 * is allocated if the other roots are valid and pml5 is needed, as any
3612 * prior MMU would also have required pml5.
3614 if (mmu->pae_root && mmu->pml4_root && (!need_pml5 || mmu->pml5_root))
3618 * The special roots should always be allocated in concert. Yell and
3619 * bail if KVM ends up in a state where only one of the roots is valid.
3621 if (WARN_ON_ONCE(!tdp_enabled || mmu->pae_root || mmu->pml4_root ||
3622 (need_pml5 && mmu->pml5_root)))
3626 * Unlike 32-bit NPT, the PDP table doesn't need to be in low mem, and
3627 * doesn't need to be decrypted.
3629 pae_root = (void *)get_zeroed_page(GFP_KERNEL_ACCOUNT);
3633 #ifdef CONFIG_X86_64
3634 pml4_root = (void *)get_zeroed_page(GFP_KERNEL_ACCOUNT);
3639 pml5_root = (void *)get_zeroed_page(GFP_KERNEL_ACCOUNT);
3645 mmu->pae_root = pae_root;
3646 mmu->pml4_root = pml4_root;
3647 mmu->pml5_root = pml5_root;
3651 #ifdef CONFIG_X86_64
3653 free_page((unsigned long)pml4_root);
3655 free_page((unsigned long)pae_root);
3660 static bool is_unsync_root(hpa_t root)
3662 struct kvm_mmu_page *sp;
3664 if (!VALID_PAGE(root))
3668 * The read barrier orders the CPU's read of SPTE.W during the page table
3669 * walk before the reads of sp->unsync/sp->unsync_children here.
3671 * Even if another CPU was marking the SP as unsync-ed simultaneously,
3672 * any guest page table changes are not guaranteed to be visible anyway
3673 * until this VCPU issues a TLB flush strictly after those changes are
3674 * made. We only need to ensure that the other CPU sets these flags
3675 * before any actual changes to the page tables are made. The comments
3676 * in mmu_try_to_unsync_pages() describe what could go wrong if this
3677 * requirement isn't satisfied.
3680 sp = to_shadow_page(root);
3683 * PAE roots (somewhat arbitrarily) aren't backed by shadow pages, the
3684 * PDPTEs for a given PAE root need to be synchronized individually.
3686 if (WARN_ON_ONCE(!sp))
3689 if (sp->unsync || sp->unsync_children)
3695 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
3698 struct kvm_mmu_page *sp;
3700 if (vcpu->arch.mmu->root_role.direct)
3703 if (!VALID_PAGE(vcpu->arch.mmu->root.hpa))
3706 vcpu_clear_mmio_info(vcpu, MMIO_GVA_ANY);
3708 if (vcpu->arch.mmu->cpu_role.base.level >= PT64_ROOT_4LEVEL) {
3709 hpa_t root = vcpu->arch.mmu->root.hpa;
3710 sp = to_shadow_page(root);
3712 if (!is_unsync_root(root))
3715 write_lock(&vcpu->kvm->mmu_lock);
3716 mmu_sync_children(vcpu, sp, true);
3717 write_unlock(&vcpu->kvm->mmu_lock);
3721 write_lock(&vcpu->kvm->mmu_lock);
3723 for (i = 0; i < 4; ++i) {
3724 hpa_t root = vcpu->arch.mmu->pae_root[i];
3726 if (IS_VALID_PAE_ROOT(root)) {
3727 root &= SPTE_BASE_ADDR_MASK;
3728 sp = to_shadow_page(root);
3729 mmu_sync_children(vcpu, sp, true);
3733 write_unlock(&vcpu->kvm->mmu_lock);
3736 void kvm_mmu_sync_prev_roots(struct kvm_vcpu *vcpu)
3738 unsigned long roots_to_free = 0;
3741 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
3742 if (is_unsync_root(vcpu->arch.mmu->prev_roots[i].hpa))
3743 roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
3745 /* sync prev_roots by simply freeing them */
3746 kvm_mmu_free_roots(vcpu->kvm, vcpu->arch.mmu, roots_to_free);
3749 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
3750 gpa_t vaddr, u64 access,
3751 struct x86_exception *exception)
3754 exception->error_code = 0;
3755 return kvm_translate_gpa(vcpu, mmu, vaddr, access, exception);
3758 static bool mmio_info_in_cache(struct kvm_vcpu *vcpu, u64 addr, bool direct)
3761 * A nested guest cannot use the MMIO cache if it is using nested
3762 * page tables, because cr2 is a nGPA while the cache stores GPAs.
3764 if (mmu_is_nested(vcpu))
3768 return vcpu_match_mmio_gpa(vcpu, addr);
3770 return vcpu_match_mmio_gva(vcpu, addr);
3774 * Return the level of the lowest level SPTE added to sptes.
3775 * That SPTE may be non-present.
3777 * Must be called between walk_shadow_page_lockless_{begin,end}.
3779 static int get_walk(struct kvm_vcpu *vcpu, u64 addr, u64 *sptes, int *root_level)
3781 struct kvm_shadow_walk_iterator iterator;
3785 for (shadow_walk_init(&iterator, vcpu, addr),
3786 *root_level = iterator.level;
3787 shadow_walk_okay(&iterator);
3788 __shadow_walk_next(&iterator, spte)) {
3789 leaf = iterator.level;
3790 spte = mmu_spte_get_lockless(iterator.sptep);
3798 /* return true if reserved bit(s) are detected on a valid, non-MMIO SPTE. */
3799 static bool get_mmio_spte(struct kvm_vcpu *vcpu, u64 addr, u64 *sptep)
3801 u64 sptes[PT64_ROOT_MAX_LEVEL + 1];
3802 struct rsvd_bits_validate *rsvd_check;
3803 int root, leaf, level;
3804 bool reserved = false;
3806 walk_shadow_page_lockless_begin(vcpu);
3808 if (is_tdp_mmu(vcpu->arch.mmu))
3809 leaf = kvm_tdp_mmu_get_walk(vcpu, addr, sptes, &root);
3811 leaf = get_walk(vcpu, addr, sptes, &root);
3813 walk_shadow_page_lockless_end(vcpu);
3815 if (unlikely(leaf < 0)) {
3820 *sptep = sptes[leaf];
3823 * Skip reserved bits checks on the terminal leaf if it's not a valid
3824 * SPTE. Note, this also (intentionally) skips MMIO SPTEs, which, by
3825 * design, always have reserved bits set. The purpose of the checks is
3826 * to detect reserved bits on non-MMIO SPTEs. i.e. buggy SPTEs.
3828 if (!is_shadow_present_pte(sptes[leaf]))
3831 rsvd_check = &vcpu->arch.mmu->shadow_zero_check;
3833 for (level = root; level >= leaf; level--)
3834 reserved |= is_rsvd_spte(rsvd_check, sptes[level], level);
3837 pr_err("%s: reserved bits set on MMU-present spte, addr 0x%llx, hierarchy:\n",
3839 for (level = root; level >= leaf; level--)
3840 pr_err("------ spte = 0x%llx level = %d, rsvd bits = 0x%llx",
3841 sptes[level], level,
3842 get_rsvd_bits(rsvd_check, sptes[level], level));
3848 static int handle_mmio_page_fault(struct kvm_vcpu *vcpu, u64 addr, bool direct)
3853 if (mmio_info_in_cache(vcpu, addr, direct))
3854 return RET_PF_EMULATE;
3856 reserved = get_mmio_spte(vcpu, addr, &spte);
3857 if (WARN_ON(reserved))
3860 if (is_mmio_spte(spte)) {
3861 gfn_t gfn = get_mmio_spte_gfn(spte);
3862 unsigned int access = get_mmio_spte_access(spte);
3864 if (!check_mmio_spte(vcpu, spte))
3865 return RET_PF_INVALID;
3870 trace_handle_mmio_page_fault(addr, gfn, access);
3871 vcpu_cache_mmio_info(vcpu, addr, gfn, access);
3872 return RET_PF_EMULATE;
3876 * If the page table is zapped by other cpus, let CPU fault again on
3879 return RET_PF_RETRY;
3882 static bool page_fault_handle_page_track(struct kvm_vcpu *vcpu,
3883 struct kvm_page_fault *fault)
3885 if (unlikely(fault->rsvd))
3888 if (!fault->present || !fault->write)
3892 * guest is writing the page which is write tracked which can
3893 * not be fixed by page fault handler.
3895 if (kvm_slot_page_track_is_active(vcpu->kvm, fault->slot, fault->gfn, KVM_PAGE_TRACK_WRITE))
3901 static void shadow_page_table_clear_flood(struct kvm_vcpu *vcpu, gva_t addr)
3903 struct kvm_shadow_walk_iterator iterator;
3906 walk_shadow_page_lockless_begin(vcpu);
3907 for_each_shadow_entry_lockless(vcpu, addr, iterator, spte)
3908 clear_sp_write_flooding_count(iterator.sptep);
3909 walk_shadow_page_lockless_end(vcpu);
3912 static u32 alloc_apf_token(struct kvm_vcpu *vcpu)
3914 /* make sure the token value is not 0 */
3915 u32 id = vcpu->arch.apf.id;
3918 vcpu->arch.apf.id = 1;
3920 return (vcpu->arch.apf.id++ << 12) | vcpu->vcpu_id;
3923 static bool kvm_arch_setup_async_pf(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
3926 struct kvm_arch_async_pf arch;
3928 arch.token = alloc_apf_token(vcpu);
3930 arch.direct_map = vcpu->arch.mmu->root_role.direct;
3931 arch.cr3 = vcpu->arch.mmu->get_guest_pgd(vcpu);
3933 return kvm_setup_async_pf(vcpu, cr2_or_gpa,
3934 kvm_vcpu_gfn_to_hva(vcpu, gfn), &arch);
3937 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
3941 if ((vcpu->arch.mmu->root_role.direct != work->arch.direct_map) ||
3945 r = kvm_mmu_reload(vcpu);
3949 if (!vcpu->arch.mmu->root_role.direct &&
3950 work->arch.cr3 != vcpu->arch.mmu->get_guest_pgd(vcpu))
3953 kvm_mmu_do_page_fault(vcpu, work->cr2_or_gpa, 0, true);
3956 static int kvm_faultin_pfn(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault)
3958 struct kvm_memory_slot *slot = fault->slot;
3962 * Retry the page fault if the gfn hit a memslot that is being deleted
3963 * or moved. This ensures any existing SPTEs for the old memslot will
3964 * be zapped before KVM inserts a new MMIO SPTE for the gfn.
3966 if (slot && (slot->flags & KVM_MEMSLOT_INVALID))
3967 return RET_PF_RETRY;
3969 if (!kvm_is_visible_memslot(slot)) {
3970 /* Don't expose private memslots to L2. */
3971 if (is_guest_mode(vcpu)) {
3973 fault->pfn = KVM_PFN_NOSLOT;
3974 fault->map_writable = false;
3975 return RET_PF_CONTINUE;
3978 * If the APIC access page exists but is disabled, go directly
3979 * to emulation without caching the MMIO access or creating a
3980 * MMIO SPTE. That way the cache doesn't need to be purged
3981 * when the AVIC is re-enabled.
3983 if (slot && slot->id == APIC_ACCESS_PAGE_PRIVATE_MEMSLOT &&
3984 !kvm_apicv_activated(vcpu->kvm))
3985 return RET_PF_EMULATE;
3989 fault->pfn = __gfn_to_pfn_memslot(slot, fault->gfn, false, &async,
3990 fault->write, &fault->map_writable,
3993 return RET_PF_CONTINUE; /* *pfn has correct page already */
3995 if (!fault->prefetch && kvm_can_do_async_pf(vcpu)) {
3996 trace_kvm_try_async_get_page(fault->addr, fault->gfn);
3997 if (kvm_find_async_pf_gfn(vcpu, fault->gfn)) {
3998 trace_kvm_async_pf_doublefault(fault->addr, fault->gfn);
3999 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
4000 return RET_PF_RETRY;
4001 } else if (kvm_arch_setup_async_pf(vcpu, fault->addr, fault->gfn)) {
4002 return RET_PF_RETRY;
4006 fault->pfn = __gfn_to_pfn_memslot(slot, fault->gfn, false, NULL,
4007 fault->write, &fault->map_writable,
4009 return RET_PF_CONTINUE;
4013 * Returns true if the page fault is stale and needs to be retried, i.e. if the
4014 * root was invalidated by a memslot update or a relevant mmu_notifier fired.
4016 static bool is_page_fault_stale(struct kvm_vcpu *vcpu,
4017 struct kvm_page_fault *fault, int mmu_seq)
4019 struct kvm_mmu_page *sp = to_shadow_page(vcpu->arch.mmu->root.hpa);
4021 /* Special roots, e.g. pae_root, are not backed by shadow pages. */
4022 if (sp && is_obsolete_sp(vcpu->kvm, sp))
4026 * Roots without an associated shadow page are considered invalid if
4027 * there is a pending request to free obsolete roots. The request is
4028 * only a hint that the current root _may_ be obsolete and needs to be
4029 * reloaded, e.g. if the guest frees a PGD that KVM is tracking as a
4030 * previous root, then __kvm_mmu_prepare_zap_page() signals all vCPUs
4031 * to reload even if no vCPU is actively using the root.
4033 if (!sp && kvm_test_request(KVM_REQ_MMU_FREE_OBSOLETE_ROOTS, vcpu))
4036 return fault->slot &&
4037 mmu_notifier_retry_hva(vcpu->kvm, mmu_seq, fault->hva);
4040 static int direct_page_fault(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault)
4042 bool is_tdp_mmu_fault = is_tdp_mmu(vcpu->arch.mmu);
4044 unsigned long mmu_seq;
4047 fault->gfn = fault->addr >> PAGE_SHIFT;
4048 fault->slot = kvm_vcpu_gfn_to_memslot(vcpu, fault->gfn);
4050 if (page_fault_handle_page_track(vcpu, fault))
4051 return RET_PF_EMULATE;
4053 r = fast_page_fault(vcpu, fault);
4054 if (r != RET_PF_INVALID)
4057 r = mmu_topup_memory_caches(vcpu, false);
4061 mmu_seq = vcpu->kvm->mmu_notifier_seq;
4064 r = kvm_faultin_pfn(vcpu, fault);
4065 if (r != RET_PF_CONTINUE)
4068 r = handle_abnormal_pfn(vcpu, fault, ACC_ALL);
4069 if (r != RET_PF_CONTINUE)
4074 if (is_tdp_mmu_fault)
4075 read_lock(&vcpu->kvm->mmu_lock);
4077 write_lock(&vcpu->kvm->mmu_lock);
4079 if (is_page_fault_stale(vcpu, fault, mmu_seq))
4082 r = make_mmu_pages_available(vcpu);
4086 if (is_tdp_mmu_fault)
4087 r = kvm_tdp_mmu_map(vcpu, fault);
4089 r = __direct_map(vcpu, fault);
4092 if (is_tdp_mmu_fault)
4093 read_unlock(&vcpu->kvm->mmu_lock);
4095 write_unlock(&vcpu->kvm->mmu_lock);
4096 kvm_release_pfn_clean(fault->pfn);
4100 static int nonpaging_page_fault(struct kvm_vcpu *vcpu,
4101 struct kvm_page_fault *fault)
4103 pgprintk("%s: gva %lx error %x\n", __func__, fault->addr, fault->error_code);
4105 /* This path builds a PAE pagetable, we can map 2mb pages at maximum. */
4106 fault->max_level = PG_LEVEL_2M;
4107 return direct_page_fault(vcpu, fault);
4110 int kvm_handle_page_fault(struct kvm_vcpu *vcpu, u64 error_code,
4111 u64 fault_address, char *insn, int insn_len)
4114 u32 flags = vcpu->arch.apf.host_apf_flags;
4116 #ifndef CONFIG_X86_64
4117 /* A 64-bit CR2 should be impossible on 32-bit KVM. */
4118 if (WARN_ON_ONCE(fault_address >> 32))
4122 vcpu->arch.l1tf_flush_l1d = true;
4124 trace_kvm_page_fault(fault_address, error_code);
4126 if (kvm_event_needs_reinjection(vcpu))
4127 kvm_mmu_unprotect_page_virt(vcpu, fault_address);
4128 r = kvm_mmu_page_fault(vcpu, fault_address, error_code, insn,
4130 } else if (flags & KVM_PV_REASON_PAGE_NOT_PRESENT) {
4131 vcpu->arch.apf.host_apf_flags = 0;
4132 local_irq_disable();
4133 kvm_async_pf_task_wait_schedule(fault_address);
4136 WARN_ONCE(1, "Unexpected host async PF flags: %x\n", flags);
4141 EXPORT_SYMBOL_GPL(kvm_handle_page_fault);
4143 int kvm_tdp_page_fault(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault)
4145 while (fault->max_level > PG_LEVEL_4K) {
4146 int page_num = KVM_PAGES_PER_HPAGE(fault->max_level);
4147 gfn_t base = (fault->addr >> PAGE_SHIFT) & ~(page_num - 1);
4149 if (kvm_mtrr_check_gfn_range_consistency(vcpu, base, page_num))
4155 return direct_page_fault(vcpu, fault);
4158 static void nonpaging_init_context(struct kvm_mmu *context)
4160 context->page_fault = nonpaging_page_fault;
4161 context->gva_to_gpa = nonpaging_gva_to_gpa;
4162 context->sync_page = nonpaging_sync_page;
4163 context->invlpg = NULL;
4166 static inline bool is_root_usable(struct kvm_mmu_root_info *root, gpa_t pgd,
4167 union kvm_mmu_page_role role)
4169 return (role.direct || pgd == root->pgd) &&
4170 VALID_PAGE(root->hpa) &&
4171 role.word == to_shadow_page(root->hpa)->role.word;
4175 * Find out if a previously cached root matching the new pgd/role is available,
4176 * and insert the current root as the MRU in the cache.
4177 * If a matching root is found, it is assigned to kvm_mmu->root and
4179 * If no match is found, kvm_mmu->root is left invalid, the LRU root is
4180 * evicted to make room for the current root, and false is returned.
4182 static bool cached_root_find_and_keep_current(struct kvm *kvm, struct kvm_mmu *mmu,
4184 union kvm_mmu_page_role new_role)
4188 if (is_root_usable(&mmu->root, new_pgd, new_role))
4191 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) {
4193 * The swaps end up rotating the cache like this:
4194 * C 0 1 2 3 (on entry to the function)
4198 * 3 C 0 1 2 (on exit from the loop)
4200 swap(mmu->root, mmu->prev_roots[i]);
4201 if (is_root_usable(&mmu->root, new_pgd, new_role))
4205 kvm_mmu_free_roots(kvm, mmu, KVM_MMU_ROOT_CURRENT);
4210 * Find out if a previously cached root matching the new pgd/role is available.
4211 * On entry, mmu->root is invalid.
4212 * If a matching root is found, it is assigned to kvm_mmu->root, the LRU entry
4213 * of the cache becomes invalid, and true is returned.
4214 * If no match is found, kvm_mmu->root is left invalid and false is returned.
4216 static bool cached_root_find_without_current(struct kvm *kvm, struct kvm_mmu *mmu,
4218 union kvm_mmu_page_role new_role)
4222 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
4223 if (is_root_usable(&mmu->prev_roots[i], new_pgd, new_role))
4229 swap(mmu->root, mmu->prev_roots[i]);
4230 /* Bubble up the remaining roots. */
4231 for (; i < KVM_MMU_NUM_PREV_ROOTS - 1; i++)
4232 mmu->prev_roots[i] = mmu->prev_roots[i + 1];
4233 mmu->prev_roots[i].hpa = INVALID_PAGE;
4237 static bool fast_pgd_switch(struct kvm *kvm, struct kvm_mmu *mmu,
4238 gpa_t new_pgd, union kvm_mmu_page_role new_role)
4241 * For now, limit the caching to 64-bit hosts+VMs in order to avoid
4242 * having to deal with PDPTEs. We may add support for 32-bit hosts/VMs
4243 * later if necessary.
4245 if (VALID_PAGE(mmu->root.hpa) && !to_shadow_page(mmu->root.hpa))
4246 kvm_mmu_free_roots(kvm, mmu, KVM_MMU_ROOT_CURRENT);
4248 if (VALID_PAGE(mmu->root.hpa))
4249 return cached_root_find_and_keep_current(kvm, mmu, new_pgd, new_role);
4251 return cached_root_find_without_current(kvm, mmu, new_pgd, new_role);
4254 void kvm_mmu_new_pgd(struct kvm_vcpu *vcpu, gpa_t new_pgd)
4256 struct kvm_mmu *mmu = vcpu->arch.mmu;
4257 union kvm_mmu_page_role new_role = mmu->root_role;
4259 if (!fast_pgd_switch(vcpu->kvm, mmu, new_pgd, new_role)) {
4260 /* kvm_mmu_ensure_valid_pgd will set up a new root. */
4265 * It's possible that the cached previous root page is obsolete because
4266 * of a change in the MMU generation number. However, changing the
4267 * generation number is accompanied by KVM_REQ_MMU_FREE_OBSOLETE_ROOTS,
4268 * which will free the root set here and allocate a new one.
4270 kvm_make_request(KVM_REQ_LOAD_MMU_PGD, vcpu);
4272 if (force_flush_and_sync_on_reuse) {
4273 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
4274 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
4278 * The last MMIO access's GVA and GPA are cached in the VCPU. When
4279 * switching to a new CR3, that GVA->GPA mapping may no longer be
4280 * valid. So clear any cached MMIO info even when we don't need to sync
4281 * the shadow page tables.
4283 vcpu_clear_mmio_info(vcpu, MMIO_GVA_ANY);
4286 * If this is a direct root page, it doesn't have a write flooding
4287 * count. Otherwise, clear the write flooding count.
4289 if (!new_role.direct)
4290 __clear_sp_write_flooding_count(
4291 to_shadow_page(vcpu->arch.mmu->root.hpa));
4293 EXPORT_SYMBOL_GPL(kvm_mmu_new_pgd);
4295 static unsigned long get_cr3(struct kvm_vcpu *vcpu)
4297 return kvm_read_cr3(vcpu);
4300 static bool sync_mmio_spte(struct kvm_vcpu *vcpu, u64 *sptep, gfn_t gfn,
4301 unsigned int access)
4303 if (unlikely(is_mmio_spte(*sptep))) {
4304 if (gfn != get_mmio_spte_gfn(*sptep)) {
4305 mmu_spte_clear_no_track(sptep);
4309 mark_mmio_spte(vcpu, sptep, gfn, access);
4316 #define PTTYPE_EPT 18 /* arbitrary */
4317 #define PTTYPE PTTYPE_EPT
4318 #include "paging_tmpl.h"
4322 #include "paging_tmpl.h"
4326 #include "paging_tmpl.h"
4330 __reset_rsvds_bits_mask(struct rsvd_bits_validate *rsvd_check,
4331 u64 pa_bits_rsvd, int level, bool nx, bool gbpages,
4334 u64 gbpages_bit_rsvd = 0;
4335 u64 nonleaf_bit8_rsvd = 0;
4338 rsvd_check->bad_mt_xwr = 0;
4341 gbpages_bit_rsvd = rsvd_bits(7, 7);
4343 if (level == PT32E_ROOT_LEVEL)
4344 high_bits_rsvd = pa_bits_rsvd & rsvd_bits(0, 62);
4346 high_bits_rsvd = pa_bits_rsvd & rsvd_bits(0, 51);
4348 /* Note, NX doesn't exist in PDPTEs, this is handled below. */
4350 high_bits_rsvd |= rsvd_bits(63, 63);
4353 * Non-leaf PML4Es and PDPEs reserve bit 8 (which would be the G bit for
4354 * leaf entries) on AMD CPUs only.
4357 nonleaf_bit8_rsvd = rsvd_bits(8, 8);
4360 case PT32_ROOT_LEVEL:
4361 /* no rsvd bits for 2 level 4K page table entries */
4362 rsvd_check->rsvd_bits_mask[0][1] = 0;
4363 rsvd_check->rsvd_bits_mask[0][0] = 0;
4364 rsvd_check->rsvd_bits_mask[1][0] =
4365 rsvd_check->rsvd_bits_mask[0][0];
4368 rsvd_check->rsvd_bits_mask[1][1] = 0;
4372 if (is_cpuid_PSE36())
4373 /* 36bits PSE 4MB page */
4374 rsvd_check->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
4376 /* 32 bits PSE 4MB page */
4377 rsvd_check->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
4379 case PT32E_ROOT_LEVEL:
4380 rsvd_check->rsvd_bits_mask[0][2] = rsvd_bits(63, 63) |
4383 rsvd_bits(1, 2); /* PDPTE */
4384 rsvd_check->rsvd_bits_mask[0][1] = high_bits_rsvd; /* PDE */
4385 rsvd_check->rsvd_bits_mask[0][0] = high_bits_rsvd; /* PTE */
4386 rsvd_check->rsvd_bits_mask[1][1] = high_bits_rsvd |
4387 rsvd_bits(13, 20); /* large page */
4388 rsvd_check->rsvd_bits_mask[1][0] =
4389 rsvd_check->rsvd_bits_mask[0][0];
4391 case PT64_ROOT_5LEVEL:
4392 rsvd_check->rsvd_bits_mask[0][4] = high_bits_rsvd |
4395 rsvd_check->rsvd_bits_mask[1][4] =
4396 rsvd_check->rsvd_bits_mask[0][4];
4398 case PT64_ROOT_4LEVEL:
4399 rsvd_check->rsvd_bits_mask[0][3] = high_bits_rsvd |
4402 rsvd_check->rsvd_bits_mask[0][2] = high_bits_rsvd |
4404 rsvd_check->rsvd_bits_mask[0][1] = high_bits_rsvd;
4405 rsvd_check->rsvd_bits_mask[0][0] = high_bits_rsvd;
4406 rsvd_check->rsvd_bits_mask[1][3] =
4407 rsvd_check->rsvd_bits_mask[0][3];
4408 rsvd_check->rsvd_bits_mask[1][2] = high_bits_rsvd |
4411 rsvd_check->rsvd_bits_mask[1][1] = high_bits_rsvd |
4412 rsvd_bits(13, 20); /* large page */
4413 rsvd_check->rsvd_bits_mask[1][0] =
4414 rsvd_check->rsvd_bits_mask[0][0];
4419 static bool guest_can_use_gbpages(struct kvm_vcpu *vcpu)
4422 * If TDP is enabled, let the guest use GBPAGES if they're supported in
4423 * hardware. The hardware page walker doesn't let KVM disable GBPAGES,
4424 * i.e. won't treat them as reserved, and KVM doesn't redo the GVA->GPA
4425 * walk for performance and complexity reasons. Not to mention KVM
4426 * _can't_ solve the problem because GVA->GPA walks aren't visible to
4427 * KVM once a TDP translation is installed. Mimic hardware behavior so
4428 * that KVM's is at least consistent, i.e. doesn't randomly inject #PF.
4430 return tdp_enabled ? boot_cpu_has(X86_FEATURE_GBPAGES) :
4431 guest_cpuid_has(vcpu, X86_FEATURE_GBPAGES);
4434 static void reset_guest_rsvds_bits_mask(struct kvm_vcpu *vcpu,
4435 struct kvm_mmu *context)
4437 __reset_rsvds_bits_mask(&context->guest_rsvd_check,
4438 vcpu->arch.reserved_gpa_bits,
4439 context->cpu_role.base.level, is_efer_nx(context),
4440 guest_can_use_gbpages(vcpu),
4441 is_cr4_pse(context),
4442 guest_cpuid_is_amd_or_hygon(vcpu));
4446 __reset_rsvds_bits_mask_ept(struct rsvd_bits_validate *rsvd_check,
4447 u64 pa_bits_rsvd, bool execonly, int huge_page_level)
4449 u64 high_bits_rsvd = pa_bits_rsvd & rsvd_bits(0, 51);
4450 u64 large_1g_rsvd = 0, large_2m_rsvd = 0;
4453 if (huge_page_level < PG_LEVEL_1G)
4454 large_1g_rsvd = rsvd_bits(7, 7);
4455 if (huge_page_level < PG_LEVEL_2M)
4456 large_2m_rsvd = rsvd_bits(7, 7);
4458 rsvd_check->rsvd_bits_mask[0][4] = high_bits_rsvd | rsvd_bits(3, 7);
4459 rsvd_check->rsvd_bits_mask[0][3] = high_bits_rsvd | rsvd_bits(3, 7);
4460 rsvd_check->rsvd_bits_mask[0][2] = high_bits_rsvd | rsvd_bits(3, 6) | large_1g_rsvd;
4461 rsvd_check->rsvd_bits_mask[0][1] = high_bits_rsvd | rsvd_bits(3, 6) | large_2m_rsvd;
4462 rsvd_check->rsvd_bits_mask[0][0] = high_bits_rsvd;
4465 rsvd_check->rsvd_bits_mask[1][4] = rsvd_check->rsvd_bits_mask[0][4];
4466 rsvd_check->rsvd_bits_mask[1][3] = rsvd_check->rsvd_bits_mask[0][3];
4467 rsvd_check->rsvd_bits_mask[1][2] = high_bits_rsvd | rsvd_bits(12, 29) | large_1g_rsvd;
4468 rsvd_check->rsvd_bits_mask[1][1] = high_bits_rsvd | rsvd_bits(12, 20) | large_2m_rsvd;
4469 rsvd_check->rsvd_bits_mask[1][0] = rsvd_check->rsvd_bits_mask[0][0];
4471 bad_mt_xwr = 0xFFull << (2 * 8); /* bits 3..5 must not be 2 */
4472 bad_mt_xwr |= 0xFFull << (3 * 8); /* bits 3..5 must not be 3 */
4473 bad_mt_xwr |= 0xFFull << (7 * 8); /* bits 3..5 must not be 7 */
4474 bad_mt_xwr |= REPEAT_BYTE(1ull << 2); /* bits 0..2 must not be 010 */
4475 bad_mt_xwr |= REPEAT_BYTE(1ull << 6); /* bits 0..2 must not be 110 */
4477 /* bits 0..2 must not be 100 unless VMX capabilities allow it */
4478 bad_mt_xwr |= REPEAT_BYTE(1ull << 4);
4480 rsvd_check->bad_mt_xwr = bad_mt_xwr;
4483 static void reset_rsvds_bits_mask_ept(struct kvm_vcpu *vcpu,
4484 struct kvm_mmu *context, bool execonly, int huge_page_level)
4486 __reset_rsvds_bits_mask_ept(&context->guest_rsvd_check,
4487 vcpu->arch.reserved_gpa_bits, execonly,
4491 static inline u64 reserved_hpa_bits(void)
4493 return rsvd_bits(shadow_phys_bits, 63);
4497 * the page table on host is the shadow page table for the page
4498 * table in guest or amd nested guest, its mmu features completely
4499 * follow the features in guest.
4501 static void reset_shadow_zero_bits_mask(struct kvm_vcpu *vcpu,
4502 struct kvm_mmu *context)
4504 /* @amd adds a check on bit of SPTEs, which KVM shouldn't use anyways. */
4506 /* KVM doesn't use 2-level page tables for the shadow MMU. */
4507 bool is_pse = false;
4508 struct rsvd_bits_validate *shadow_zero_check;
4511 WARN_ON_ONCE(context->root_role.level < PT32E_ROOT_LEVEL);
4513 shadow_zero_check = &context->shadow_zero_check;
4514 __reset_rsvds_bits_mask(shadow_zero_check, reserved_hpa_bits(),
4515 context->root_role.level,
4516 context->root_role.efer_nx,
4517 guest_can_use_gbpages(vcpu), is_pse, is_amd);
4519 if (!shadow_me_mask)
4522 for (i = context->root_role.level; --i >= 0;) {
4524 * So far shadow_me_value is a constant during KVM's life
4525 * time. Bits in shadow_me_value are allowed to be set.
4526 * Bits in shadow_me_mask but not in shadow_me_value are
4527 * not allowed to be set.
4529 shadow_zero_check->rsvd_bits_mask[0][i] |= shadow_me_mask;
4530 shadow_zero_check->rsvd_bits_mask[1][i] |= shadow_me_mask;
4531 shadow_zero_check->rsvd_bits_mask[0][i] &= ~shadow_me_value;
4532 shadow_zero_check->rsvd_bits_mask[1][i] &= ~shadow_me_value;
4537 static inline bool boot_cpu_is_amd(void)
4539 WARN_ON_ONCE(!tdp_enabled);
4540 return shadow_x_mask == 0;
4544 * the direct page table on host, use as much mmu features as
4545 * possible, however, kvm currently does not do execution-protection.
4548 reset_tdp_shadow_zero_bits_mask(struct kvm_mmu *context)
4550 struct rsvd_bits_validate *shadow_zero_check;
4553 shadow_zero_check = &context->shadow_zero_check;
4555 if (boot_cpu_is_amd())
4556 __reset_rsvds_bits_mask(shadow_zero_check, reserved_hpa_bits(),
4557 context->root_role.level, false,
4558 boot_cpu_has(X86_FEATURE_GBPAGES),
4561 __reset_rsvds_bits_mask_ept(shadow_zero_check,
4562 reserved_hpa_bits(), false,
4563 max_huge_page_level);
4565 if (!shadow_me_mask)
4568 for (i = context->root_role.level; --i >= 0;) {
4569 shadow_zero_check->rsvd_bits_mask[0][i] &= ~shadow_me_mask;
4570 shadow_zero_check->rsvd_bits_mask[1][i] &= ~shadow_me_mask;
4575 * as the comments in reset_shadow_zero_bits_mask() except it
4576 * is the shadow page table for intel nested guest.
4579 reset_ept_shadow_zero_bits_mask(struct kvm_mmu *context, bool execonly)
4581 __reset_rsvds_bits_mask_ept(&context->shadow_zero_check,
4582 reserved_hpa_bits(), execonly,
4583 max_huge_page_level);
4586 #define BYTE_MASK(access) \
4587 ((1 & (access) ? 2 : 0) | \
4588 (2 & (access) ? 4 : 0) | \
4589 (3 & (access) ? 8 : 0) | \
4590 (4 & (access) ? 16 : 0) | \
4591 (5 & (access) ? 32 : 0) | \
4592 (6 & (access) ? 64 : 0) | \
4593 (7 & (access) ? 128 : 0))
4596 static void update_permission_bitmask(struct kvm_mmu *mmu, bool ept)
4600 const u8 x = BYTE_MASK(ACC_EXEC_MASK);
4601 const u8 w = BYTE_MASK(ACC_WRITE_MASK);
4602 const u8 u = BYTE_MASK(ACC_USER_MASK);
4604 bool cr4_smep = is_cr4_smep(mmu);
4605 bool cr4_smap = is_cr4_smap(mmu);
4606 bool cr0_wp = is_cr0_wp(mmu);
4607 bool efer_nx = is_efer_nx(mmu);
4609 for (byte = 0; byte < ARRAY_SIZE(mmu->permissions); ++byte) {
4610 unsigned pfec = byte << 1;
4613 * Each "*f" variable has a 1 bit for each UWX value
4614 * that causes a fault with the given PFEC.
4617 /* Faults from writes to non-writable pages */
4618 u8 wf = (pfec & PFERR_WRITE_MASK) ? (u8)~w : 0;
4619 /* Faults from user mode accesses to supervisor pages */
4620 u8 uf = (pfec & PFERR_USER_MASK) ? (u8)~u : 0;
4621 /* Faults from fetches of non-executable pages*/
4622 u8 ff = (pfec & PFERR_FETCH_MASK) ? (u8)~x : 0;
4623 /* Faults from kernel mode fetches of user pages */
4625 /* Faults from kernel mode accesses of user pages */
4629 /* Faults from kernel mode accesses to user pages */
4630 u8 kf = (pfec & PFERR_USER_MASK) ? 0 : u;
4632 /* Not really needed: !nx will cause pte.nx to fault */
4636 /* Allow supervisor writes if !cr0.wp */
4638 wf = (pfec & PFERR_USER_MASK) ? wf : 0;
4640 /* Disallow supervisor fetches of user code if cr4.smep */
4642 smepf = (pfec & PFERR_FETCH_MASK) ? kf : 0;
4645 * SMAP:kernel-mode data accesses from user-mode
4646 * mappings should fault. A fault is considered
4647 * as a SMAP violation if all of the following
4648 * conditions are true:
4649 * - X86_CR4_SMAP is set in CR4
4650 * - A user page is accessed
4651 * - The access is not a fetch
4652 * - The access is supervisor mode
4653 * - If implicit supervisor access or X86_EFLAGS_AC is clear
4655 * Here, we cover the first four conditions.
4656 * The fifth is computed dynamically in permission_fault();
4657 * PFERR_RSVD_MASK bit will be set in PFEC if the access is
4658 * *not* subject to SMAP restrictions.
4661 smapf = (pfec & (PFERR_RSVD_MASK|PFERR_FETCH_MASK)) ? 0 : kf;
4664 mmu->permissions[byte] = ff | uf | wf | smepf | smapf;
4669 * PKU is an additional mechanism by which the paging controls access to
4670 * user-mode addresses based on the value in the PKRU register. Protection
4671 * key violations are reported through a bit in the page fault error code.
4672 * Unlike other bits of the error code, the PK bit is not known at the
4673 * call site of e.g. gva_to_gpa; it must be computed directly in
4674 * permission_fault based on two bits of PKRU, on some machine state (CR4,
4675 * CR0, EFER, CPL), and on other bits of the error code and the page tables.
4677 * In particular the following conditions come from the error code, the
4678 * page tables and the machine state:
4679 * - PK is always zero unless CR4.PKE=1 and EFER.LMA=1
4680 * - PK is always zero if RSVD=1 (reserved bit set) or F=1 (instruction fetch)
4681 * - PK is always zero if U=0 in the page tables
4682 * - PKRU.WD is ignored if CR0.WP=0 and the access is a supervisor access.
4684 * The PKRU bitmask caches the result of these four conditions. The error
4685 * code (minus the P bit) and the page table's U bit form an index into the
4686 * PKRU bitmask. Two bits of the PKRU bitmask are then extracted and ANDed
4687 * with the two bits of the PKRU register corresponding to the protection key.
4688 * For the first three conditions above the bits will be 00, thus masking
4689 * away both AD and WD. For all reads or if the last condition holds, WD
4690 * only will be masked away.
4692 static void update_pkru_bitmask(struct kvm_mmu *mmu)
4699 if (!is_cr4_pke(mmu))
4702 wp = is_cr0_wp(mmu);
4704 for (bit = 0; bit < ARRAY_SIZE(mmu->permissions); ++bit) {
4705 unsigned pfec, pkey_bits;
4706 bool check_pkey, check_write, ff, uf, wf, pte_user;
4709 ff = pfec & PFERR_FETCH_MASK;
4710 uf = pfec & PFERR_USER_MASK;
4711 wf = pfec & PFERR_WRITE_MASK;
4713 /* PFEC.RSVD is replaced by ACC_USER_MASK. */
4714 pte_user = pfec & PFERR_RSVD_MASK;
4717 * Only need to check the access which is not an
4718 * instruction fetch and is to a user page.
4720 check_pkey = (!ff && pte_user);
4722 * write access is controlled by PKRU if it is a
4723 * user access or CR0.WP = 1.
4725 check_write = check_pkey && wf && (uf || wp);
4727 /* PKRU.AD stops both read and write access. */
4728 pkey_bits = !!check_pkey;
4729 /* PKRU.WD stops write access. */
4730 pkey_bits |= (!!check_write) << 1;
4732 mmu->pkru_mask |= (pkey_bits & 3) << pfec;
4736 static void reset_guest_paging_metadata(struct kvm_vcpu *vcpu,
4737 struct kvm_mmu *mmu)
4739 if (!is_cr0_pg(mmu))
4742 reset_guest_rsvds_bits_mask(vcpu, mmu);
4743 update_permission_bitmask(mmu, false);
4744 update_pkru_bitmask(mmu);
4747 static void paging64_init_context(struct kvm_mmu *context)
4749 context->page_fault = paging64_page_fault;
4750 context->gva_to_gpa = paging64_gva_to_gpa;
4751 context->sync_page = paging64_sync_page;
4752 context->invlpg = paging64_invlpg;
4755 static void paging32_init_context(struct kvm_mmu *context)
4757 context->page_fault = paging32_page_fault;
4758 context->gva_to_gpa = paging32_gva_to_gpa;
4759 context->sync_page = paging32_sync_page;
4760 context->invlpg = paging32_invlpg;
4763 static union kvm_cpu_role
4764 kvm_calc_cpu_role(struct kvm_vcpu *vcpu, const struct kvm_mmu_role_regs *regs)
4766 union kvm_cpu_role role = {0};
4768 role.base.access = ACC_ALL;
4769 role.base.smm = is_smm(vcpu);
4770 role.base.guest_mode = is_guest_mode(vcpu);
4773 if (!____is_cr0_pg(regs)) {
4774 role.base.direct = 1;
4778 role.base.efer_nx = ____is_efer_nx(regs);
4779 role.base.cr0_wp = ____is_cr0_wp(regs);
4780 role.base.smep_andnot_wp = ____is_cr4_smep(regs) && !____is_cr0_wp(regs);
4781 role.base.smap_andnot_wp = ____is_cr4_smap(regs) && !____is_cr0_wp(regs);
4782 role.base.has_4_byte_gpte = !____is_cr4_pae(regs);
4784 if (____is_efer_lma(regs))
4785 role.base.level = ____is_cr4_la57(regs) ? PT64_ROOT_5LEVEL
4787 else if (____is_cr4_pae(regs))
4788 role.base.level = PT32E_ROOT_LEVEL;
4790 role.base.level = PT32_ROOT_LEVEL;
4792 role.ext.cr4_smep = ____is_cr4_smep(regs);
4793 role.ext.cr4_smap = ____is_cr4_smap(regs);
4794 role.ext.cr4_pse = ____is_cr4_pse(regs);
4796 /* PKEY and LA57 are active iff long mode is active. */
4797 role.ext.cr4_pke = ____is_efer_lma(regs) && ____is_cr4_pke(regs);
4798 role.ext.cr4_la57 = ____is_efer_lma(regs) && ____is_cr4_la57(regs);
4799 role.ext.efer_lma = ____is_efer_lma(regs);
4803 static inline int kvm_mmu_get_tdp_level(struct kvm_vcpu *vcpu)
4805 /* tdp_root_level is architecture forced level, use it if nonzero */
4807 return tdp_root_level;
4809 /* Use 5-level TDP if and only if it's useful/necessary. */
4810 if (max_tdp_level == 5 && cpuid_maxphyaddr(vcpu) <= 48)
4813 return max_tdp_level;
4816 static union kvm_mmu_page_role
4817 kvm_calc_tdp_mmu_root_page_role(struct kvm_vcpu *vcpu,
4818 union kvm_cpu_role cpu_role)
4820 union kvm_mmu_page_role role = {0};
4822 role.access = ACC_ALL;
4824 role.efer_nx = true;
4825 role.smm = cpu_role.base.smm;
4826 role.guest_mode = cpu_role.base.guest_mode;
4827 role.ad_disabled = !kvm_ad_enabled();
4828 role.level = kvm_mmu_get_tdp_level(vcpu);
4830 role.has_4_byte_gpte = false;
4835 static void init_kvm_tdp_mmu(struct kvm_vcpu *vcpu,
4836 union kvm_cpu_role cpu_role)
4838 struct kvm_mmu *context = &vcpu->arch.root_mmu;
4839 union kvm_mmu_page_role root_role = kvm_calc_tdp_mmu_root_page_role(vcpu, cpu_role);
4841 if (cpu_role.as_u64 == context->cpu_role.as_u64 &&
4842 root_role.word == context->root_role.word)
4845 context->cpu_role.as_u64 = cpu_role.as_u64;
4846 context->root_role.word = root_role.word;
4847 context->page_fault = kvm_tdp_page_fault;
4848 context->sync_page = nonpaging_sync_page;
4849 context->invlpg = NULL;
4850 context->get_guest_pgd = get_cr3;
4851 context->get_pdptr = kvm_pdptr_read;
4852 context->inject_page_fault = kvm_inject_page_fault;
4854 if (!is_cr0_pg(context))
4855 context->gva_to_gpa = nonpaging_gva_to_gpa;
4856 else if (is_cr4_pae(context))
4857 context->gva_to_gpa = paging64_gva_to_gpa;
4859 context->gva_to_gpa = paging32_gva_to_gpa;
4861 reset_guest_paging_metadata(vcpu, context);
4862 reset_tdp_shadow_zero_bits_mask(context);
4865 static void shadow_mmu_init_context(struct kvm_vcpu *vcpu, struct kvm_mmu *context,
4866 union kvm_cpu_role cpu_role,
4867 union kvm_mmu_page_role root_role)
4869 if (cpu_role.as_u64 == context->cpu_role.as_u64 &&
4870 root_role.word == context->root_role.word)
4873 context->cpu_role.as_u64 = cpu_role.as_u64;
4874 context->root_role.word = root_role.word;
4876 if (!is_cr0_pg(context))
4877 nonpaging_init_context(context);
4878 else if (is_cr4_pae(context))
4879 paging64_init_context(context);
4881 paging32_init_context(context);
4883 reset_guest_paging_metadata(vcpu, context);
4884 reset_shadow_zero_bits_mask(vcpu, context);
4887 static void kvm_init_shadow_mmu(struct kvm_vcpu *vcpu,
4888 union kvm_cpu_role cpu_role)
4890 struct kvm_mmu *context = &vcpu->arch.root_mmu;
4891 union kvm_mmu_page_role root_role;
4893 root_role = cpu_role.base;
4895 /* KVM uses PAE paging whenever the guest isn't using 64-bit paging. */
4896 root_role.level = max_t(u32, root_role.level, PT32E_ROOT_LEVEL);
4899 * KVM forces EFER.NX=1 when TDP is disabled, reflect it in the MMU role.
4900 * KVM uses NX when TDP is disabled to handle a variety of scenarios,
4901 * notably for huge SPTEs if iTLB multi-hit mitigation is enabled and
4902 * to generate correct permissions for CR0.WP=0/CR4.SMEP=1/EFER.NX=0.
4903 * The iTLB multi-hit workaround can be toggled at any time, so assume
4904 * NX can be used by any non-nested shadow MMU to avoid having to reset
4907 root_role.efer_nx = true;
4909 shadow_mmu_init_context(vcpu, context, cpu_role, root_role);
4912 void kvm_init_shadow_npt_mmu(struct kvm_vcpu *vcpu, unsigned long cr0,
4913 unsigned long cr4, u64 efer, gpa_t nested_cr3)
4915 struct kvm_mmu *context = &vcpu->arch.guest_mmu;
4916 struct kvm_mmu_role_regs regs = {
4918 .cr4 = cr4 & ~X86_CR4_PKE,
4921 union kvm_cpu_role cpu_role = kvm_calc_cpu_role(vcpu, ®s);
4922 union kvm_mmu_page_role root_role;
4924 /* NPT requires CR0.PG=1. */
4925 WARN_ON_ONCE(cpu_role.base.direct);
4927 root_role = cpu_role.base;
4928 root_role.level = kvm_mmu_get_tdp_level(vcpu);
4929 if (root_role.level == PT64_ROOT_5LEVEL &&
4930 cpu_role.base.level == PT64_ROOT_4LEVEL)
4931 root_role.passthrough = 1;
4933 shadow_mmu_init_context(vcpu, context, cpu_role, root_role);
4934 kvm_mmu_new_pgd(vcpu, nested_cr3);
4936 EXPORT_SYMBOL_GPL(kvm_init_shadow_npt_mmu);
4938 static union kvm_cpu_role
4939 kvm_calc_shadow_ept_root_page_role(struct kvm_vcpu *vcpu, bool accessed_dirty,
4940 bool execonly, u8 level)
4942 union kvm_cpu_role role = {0};
4945 * KVM does not support SMM transfer monitors, and consequently does not
4946 * support the "entry to SMM" control either. role.base.smm is always 0.
4948 WARN_ON_ONCE(is_smm(vcpu));
4949 role.base.level = level;
4950 role.base.has_4_byte_gpte = false;
4951 role.base.direct = false;
4952 role.base.ad_disabled = !accessed_dirty;
4953 role.base.guest_mode = true;
4954 role.base.access = ACC_ALL;
4957 role.ext.execonly = execonly;
4963 void kvm_init_shadow_ept_mmu(struct kvm_vcpu *vcpu, bool execonly,
4964 int huge_page_level, bool accessed_dirty,
4967 struct kvm_mmu *context = &vcpu->arch.guest_mmu;
4968 u8 level = vmx_eptp_page_walk_level(new_eptp);
4969 union kvm_cpu_role new_mode =
4970 kvm_calc_shadow_ept_root_page_role(vcpu, accessed_dirty,
4973 if (new_mode.as_u64 != context->cpu_role.as_u64) {
4974 /* EPT, and thus nested EPT, does not consume CR0, CR4, nor EFER. */
4975 context->cpu_role.as_u64 = new_mode.as_u64;
4976 context->root_role.word = new_mode.base.word;
4978 context->page_fault = ept_page_fault;
4979 context->gva_to_gpa = ept_gva_to_gpa;
4980 context->sync_page = ept_sync_page;
4981 context->invlpg = ept_invlpg;
4983 update_permission_bitmask(context, true);
4984 context->pkru_mask = 0;
4985 reset_rsvds_bits_mask_ept(vcpu, context, execonly, huge_page_level);
4986 reset_ept_shadow_zero_bits_mask(context, execonly);
4989 kvm_mmu_new_pgd(vcpu, new_eptp);
4991 EXPORT_SYMBOL_GPL(kvm_init_shadow_ept_mmu);
4993 static void init_kvm_softmmu(struct kvm_vcpu *vcpu,
4994 union kvm_cpu_role cpu_role)
4996 struct kvm_mmu *context = &vcpu->arch.root_mmu;
4998 kvm_init_shadow_mmu(vcpu, cpu_role);
5000 context->get_guest_pgd = get_cr3;
5001 context->get_pdptr = kvm_pdptr_read;
5002 context->inject_page_fault = kvm_inject_page_fault;
5005 static void init_kvm_nested_mmu(struct kvm_vcpu *vcpu,
5006 union kvm_cpu_role new_mode)
5008 struct kvm_mmu *g_context = &vcpu->arch.nested_mmu;
5010 if (new_mode.as_u64 == g_context->cpu_role.as_u64)
5013 g_context->cpu_role.as_u64 = new_mode.as_u64;
5014 g_context->get_guest_pgd = get_cr3;
5015 g_context->get_pdptr = kvm_pdptr_read;
5016 g_context->inject_page_fault = kvm_inject_page_fault;
5019 * L2 page tables are never shadowed, so there is no need to sync
5022 g_context->invlpg = NULL;
5025 * Note that arch.mmu->gva_to_gpa translates l2_gpa to l1_gpa using
5026 * L1's nested page tables (e.g. EPT12). The nested translation
5027 * of l2_gva to l1_gpa is done by arch.nested_mmu.gva_to_gpa using
5028 * L2's page tables as the first level of translation and L1's
5029 * nested page tables as the second level of translation. Basically
5030 * the gva_to_gpa functions between mmu and nested_mmu are swapped.
5032 if (!is_paging(vcpu))
5033 g_context->gva_to_gpa = nonpaging_gva_to_gpa;
5034 else if (is_long_mode(vcpu))
5035 g_context->gva_to_gpa = paging64_gva_to_gpa;
5036 else if (is_pae(vcpu))
5037 g_context->gva_to_gpa = paging64_gva_to_gpa;
5039 g_context->gva_to_gpa = paging32_gva_to_gpa;
5041 reset_guest_paging_metadata(vcpu, g_context);
5044 void kvm_init_mmu(struct kvm_vcpu *vcpu)
5046 struct kvm_mmu_role_regs regs = vcpu_to_role_regs(vcpu);
5047 union kvm_cpu_role cpu_role = kvm_calc_cpu_role(vcpu, ®s);
5049 if (mmu_is_nested(vcpu))
5050 init_kvm_nested_mmu(vcpu, cpu_role);
5051 else if (tdp_enabled)
5052 init_kvm_tdp_mmu(vcpu, cpu_role);
5054 init_kvm_softmmu(vcpu, cpu_role);
5056 EXPORT_SYMBOL_GPL(kvm_init_mmu);
5058 void kvm_mmu_after_set_cpuid(struct kvm_vcpu *vcpu)
5061 * Invalidate all MMU roles to force them to reinitialize as CPUID
5062 * information is factored into reserved bit calculations.
5064 * Correctly handling multiple vCPU models with respect to paging and
5065 * physical address properties) in a single VM would require tracking
5066 * all relevant CPUID information in kvm_mmu_page_role. That is very
5067 * undesirable as it would increase the memory requirements for
5068 * gfn_track (see struct kvm_mmu_page_role comments). For now that
5069 * problem is swept under the rug; KVM's CPUID API is horrific and
5070 * it's all but impossible to solve it without introducing a new API.
5072 vcpu->arch.root_mmu.root_role.word = 0;
5073 vcpu->arch.guest_mmu.root_role.word = 0;
5074 vcpu->arch.nested_mmu.root_role.word = 0;
5075 vcpu->arch.root_mmu.cpu_role.ext.valid = 0;
5076 vcpu->arch.guest_mmu.cpu_role.ext.valid = 0;
5077 vcpu->arch.nested_mmu.cpu_role.ext.valid = 0;
5078 kvm_mmu_reset_context(vcpu);
5081 * Changing guest CPUID after KVM_RUN is forbidden, see the comment in
5082 * kvm_arch_vcpu_ioctl().
5084 KVM_BUG_ON(vcpu->arch.last_vmentry_cpu != -1, vcpu->kvm);
5087 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
5089 kvm_mmu_unload(vcpu);
5092 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
5094 int kvm_mmu_load(struct kvm_vcpu *vcpu)
5098 r = mmu_topup_memory_caches(vcpu, !vcpu->arch.mmu->root_role.direct);
5101 r = mmu_alloc_special_roots(vcpu);
5104 if (vcpu->arch.mmu->root_role.direct)
5105 r = mmu_alloc_direct_roots(vcpu);
5107 r = mmu_alloc_shadow_roots(vcpu);
5111 kvm_mmu_sync_roots(vcpu);
5113 kvm_mmu_load_pgd(vcpu);
5116 * Flush any TLB entries for the new root, the provenance of the root
5117 * is unknown. Even if KVM ensures there are no stale TLB entries
5118 * for a freed root, in theory another hypervisor could have left
5119 * stale entries. Flushing on alloc also allows KVM to skip the TLB
5120 * flush when freeing a root (see kvm_tdp_mmu_put_root()).
5122 static_call(kvm_x86_flush_tlb_current)(vcpu);
5127 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
5129 struct kvm *kvm = vcpu->kvm;
5131 kvm_mmu_free_roots(kvm, &vcpu->arch.root_mmu, KVM_MMU_ROOTS_ALL);
5132 WARN_ON(VALID_PAGE(vcpu->arch.root_mmu.root.hpa));
5133 kvm_mmu_free_roots(kvm, &vcpu->arch.guest_mmu, KVM_MMU_ROOTS_ALL);
5134 WARN_ON(VALID_PAGE(vcpu->arch.guest_mmu.root.hpa));
5135 vcpu_clear_mmio_info(vcpu, MMIO_GVA_ANY);
5138 static bool is_obsolete_root(struct kvm *kvm, hpa_t root_hpa)
5140 struct kvm_mmu_page *sp;
5142 if (!VALID_PAGE(root_hpa))
5146 * When freeing obsolete roots, treat roots as obsolete if they don't
5147 * have an associated shadow page. This does mean KVM will get false
5148 * positives and free roots that don't strictly need to be freed, but
5149 * such false positives are relatively rare:
5151 * (a) only PAE paging and nested NPT has roots without shadow pages
5152 * (b) remote reloads due to a memslot update obsoletes _all_ roots
5153 * (c) KVM doesn't track previous roots for PAE paging, and the guest
5154 * is unlikely to zap an in-use PGD.
5156 sp = to_shadow_page(root_hpa);
5157 return !sp || is_obsolete_sp(kvm, sp);
5160 static void __kvm_mmu_free_obsolete_roots(struct kvm *kvm, struct kvm_mmu *mmu)
5162 unsigned long roots_to_free = 0;
5165 if (is_obsolete_root(kvm, mmu->root.hpa))
5166 roots_to_free |= KVM_MMU_ROOT_CURRENT;
5168 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) {
5169 if (is_obsolete_root(kvm, mmu->prev_roots[i].hpa))
5170 roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
5174 kvm_mmu_free_roots(kvm, mmu, roots_to_free);
5177 void kvm_mmu_free_obsolete_roots(struct kvm_vcpu *vcpu)
5179 __kvm_mmu_free_obsolete_roots(vcpu->kvm, &vcpu->arch.root_mmu);
5180 __kvm_mmu_free_obsolete_roots(vcpu->kvm, &vcpu->arch.guest_mmu);
5183 static bool need_remote_flush(u64 old, u64 new)
5185 if (!is_shadow_present_pte(old))
5187 if (!is_shadow_present_pte(new))
5189 if ((old ^ new) & SPTE_BASE_ADDR_MASK)
5191 old ^= shadow_nx_mask;
5192 new ^= shadow_nx_mask;
5193 return (old & ~new & SPTE_PERM_MASK) != 0;
5196 static u64 mmu_pte_write_fetch_gpte(struct kvm_vcpu *vcpu, gpa_t *gpa,
5203 * Assume that the pte write on a page table of the same type
5204 * as the current vcpu paging mode since we update the sptes only
5205 * when they have the same mode.
5207 if (is_pae(vcpu) && *bytes == 4) {
5208 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
5213 if (*bytes == 4 || *bytes == 8) {
5214 r = kvm_vcpu_read_guest_atomic(vcpu, *gpa, &gentry, *bytes);
5223 * If we're seeing too many writes to a page, it may no longer be a page table,
5224 * or we may be forking, in which case it is better to unmap the page.
5226 static bool detect_write_flooding(struct kvm_mmu_page *sp)
5229 * Skip write-flooding detected for the sp whose level is 1, because
5230 * it can become unsync, then the guest page is not write-protected.
5232 if (sp->role.level == PG_LEVEL_4K)
5235 atomic_inc(&sp->write_flooding_count);
5236 return atomic_read(&sp->write_flooding_count) >= 3;
5240 * Misaligned accesses are too much trouble to fix up; also, they usually
5241 * indicate a page is not used as a page table.
5243 static bool detect_write_misaligned(struct kvm_mmu_page *sp, gpa_t gpa,
5246 unsigned offset, pte_size, misaligned;
5248 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
5249 gpa, bytes, sp->role.word);
5251 offset = offset_in_page(gpa);
5252 pte_size = sp->role.has_4_byte_gpte ? 4 : 8;
5255 * Sometimes, the OS only writes the last one bytes to update status
5256 * bits, for example, in linux, andb instruction is used in clear_bit().
5258 if (!(offset & (pte_size - 1)) && bytes == 1)
5261 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
5262 misaligned |= bytes < 4;
5267 static u64 *get_written_sptes(struct kvm_mmu_page *sp, gpa_t gpa, int *nspte)
5269 unsigned page_offset, quadrant;
5273 page_offset = offset_in_page(gpa);
5274 level = sp->role.level;
5276 if (sp->role.has_4_byte_gpte) {
5277 page_offset <<= 1; /* 32->64 */
5279 * A 32-bit pde maps 4MB while the shadow pdes map
5280 * only 2MB. So we need to double the offset again
5281 * and zap two pdes instead of one.
5283 if (level == PT32_ROOT_LEVEL) {
5284 page_offset &= ~7; /* kill rounding error */
5288 quadrant = page_offset >> PAGE_SHIFT;
5289 page_offset &= ~PAGE_MASK;
5290 if (quadrant != sp->role.quadrant)
5294 spte = &sp->spt[page_offset / sizeof(*spte)];
5298 static void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
5299 const u8 *new, int bytes,
5300 struct kvm_page_track_notifier_node *node)
5302 gfn_t gfn = gpa >> PAGE_SHIFT;
5303 struct kvm_mmu_page *sp;
5304 LIST_HEAD(invalid_list);
5305 u64 entry, gentry, *spte;
5310 * If we don't have indirect shadow pages, it means no page is
5311 * write-protected, so we can exit simply.
5313 if (!READ_ONCE(vcpu->kvm->arch.indirect_shadow_pages))
5316 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
5318 write_lock(&vcpu->kvm->mmu_lock);
5320 gentry = mmu_pte_write_fetch_gpte(vcpu, &gpa, &bytes);
5322 ++vcpu->kvm->stat.mmu_pte_write;
5324 for_each_gfn_valid_sp_with_gptes(vcpu->kvm, sp, gfn) {
5325 if (detect_write_misaligned(sp, gpa, bytes) ||
5326 detect_write_flooding(sp)) {
5327 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list);
5328 ++vcpu->kvm->stat.mmu_flooded;
5332 spte = get_written_sptes(sp, gpa, &npte);
5338 mmu_page_zap_pte(vcpu->kvm, sp, spte, NULL);
5339 if (gentry && sp->role.level != PG_LEVEL_4K)
5340 ++vcpu->kvm->stat.mmu_pde_zapped;
5341 if (need_remote_flush(entry, *spte))
5346 kvm_mmu_remote_flush_or_zap(vcpu->kvm, &invalid_list, flush);
5347 write_unlock(&vcpu->kvm->mmu_lock);
5350 int noinline kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u64 error_code,
5351 void *insn, int insn_len)
5353 int r, emulation_type = EMULTYPE_PF;
5354 bool direct = vcpu->arch.mmu->root_role.direct;
5356 if (WARN_ON(!VALID_PAGE(vcpu->arch.mmu->root.hpa)))
5357 return RET_PF_RETRY;
5360 if (unlikely(error_code & PFERR_RSVD_MASK)) {
5361 r = handle_mmio_page_fault(vcpu, cr2_or_gpa, direct);
5362 if (r == RET_PF_EMULATE)
5366 if (r == RET_PF_INVALID) {
5367 r = kvm_mmu_do_page_fault(vcpu, cr2_or_gpa,
5368 lower_32_bits(error_code), false);
5369 if (KVM_BUG_ON(r == RET_PF_INVALID, vcpu->kvm))
5375 if (r != RET_PF_EMULATE)
5379 * Before emulating the instruction, check if the error code
5380 * was due to a RO violation while translating the guest page.
5381 * This can occur when using nested virtualization with nested
5382 * paging in both guests. If true, we simply unprotect the page
5383 * and resume the guest.
5385 if (vcpu->arch.mmu->root_role.direct &&
5386 (error_code & PFERR_NESTED_GUEST_PAGE) == PFERR_NESTED_GUEST_PAGE) {
5387 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(cr2_or_gpa));
5392 * vcpu->arch.mmu.page_fault returned RET_PF_EMULATE, but we can still
5393 * optimistically try to just unprotect the page and let the processor
5394 * re-execute the instruction that caused the page fault. Do not allow
5395 * retrying MMIO emulation, as it's not only pointless but could also
5396 * cause us to enter an infinite loop because the processor will keep
5397 * faulting on the non-existent MMIO address. Retrying an instruction
5398 * from a nested guest is also pointless and dangerous as we are only
5399 * explicitly shadowing L1's page tables, i.e. unprotecting something
5400 * for L1 isn't going to magically fix whatever issue cause L2 to fail.
5402 if (!mmio_info_in_cache(vcpu, cr2_or_gpa, direct) && !is_guest_mode(vcpu))
5403 emulation_type |= EMULTYPE_ALLOW_RETRY_PF;
5405 return x86_emulate_instruction(vcpu, cr2_or_gpa, emulation_type, insn,
5408 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
5410 void kvm_mmu_invalidate_gva(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
5411 gva_t gva, hpa_t root_hpa)
5415 /* It's actually a GPA for vcpu->arch.guest_mmu. */
5416 if (mmu != &vcpu->arch.guest_mmu) {
5417 /* INVLPG on a non-canonical address is a NOP according to the SDM. */
5418 if (is_noncanonical_address(gva, vcpu))
5421 static_call(kvm_x86_flush_tlb_gva)(vcpu, gva);
5427 if (root_hpa == INVALID_PAGE) {
5428 mmu->invlpg(vcpu, gva, mmu->root.hpa);
5431 * INVLPG is required to invalidate any global mappings for the VA,
5432 * irrespective of PCID. Since it would take us roughly similar amount
5433 * of work to determine whether any of the prev_root mappings of the VA
5434 * is marked global, or to just sync it blindly, so we might as well
5435 * just always sync it.
5437 * Mappings not reachable via the current cr3 or the prev_roots will be
5438 * synced when switching to that cr3, so nothing needs to be done here
5441 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
5442 if (VALID_PAGE(mmu->prev_roots[i].hpa))
5443 mmu->invlpg(vcpu, gva, mmu->prev_roots[i].hpa);
5445 mmu->invlpg(vcpu, gva, root_hpa);
5449 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
5451 kvm_mmu_invalidate_gva(vcpu, vcpu->arch.walk_mmu, gva, INVALID_PAGE);
5452 ++vcpu->stat.invlpg;
5454 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
5457 void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid)
5459 struct kvm_mmu *mmu = vcpu->arch.mmu;
5460 bool tlb_flush = false;
5463 if (pcid == kvm_get_active_pcid(vcpu)) {
5465 mmu->invlpg(vcpu, gva, mmu->root.hpa);
5469 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) {
5470 if (VALID_PAGE(mmu->prev_roots[i].hpa) &&
5471 pcid == kvm_get_pcid(vcpu, mmu->prev_roots[i].pgd)) {
5473 mmu->invlpg(vcpu, gva, mmu->prev_roots[i].hpa);
5479 static_call(kvm_x86_flush_tlb_gva)(vcpu, gva);
5481 ++vcpu->stat.invlpg;
5484 * Mappings not reachable via the current cr3 or the prev_roots will be
5485 * synced when switching to that cr3, so nothing needs to be done here
5490 void kvm_configure_mmu(bool enable_tdp, int tdp_forced_root_level,
5491 int tdp_max_root_level, int tdp_huge_page_level)
5493 tdp_enabled = enable_tdp;
5494 tdp_root_level = tdp_forced_root_level;
5495 max_tdp_level = tdp_max_root_level;
5498 * max_huge_page_level reflects KVM's MMU capabilities irrespective
5499 * of kernel support, e.g. KVM may be capable of using 1GB pages when
5500 * the kernel is not. But, KVM never creates a page size greater than
5501 * what is used by the kernel for any given HVA, i.e. the kernel's
5502 * capabilities are ultimately consulted by kvm_mmu_hugepage_adjust().
5505 max_huge_page_level = tdp_huge_page_level;
5506 else if (boot_cpu_has(X86_FEATURE_GBPAGES))
5507 max_huge_page_level = PG_LEVEL_1G;
5509 max_huge_page_level = PG_LEVEL_2M;
5511 EXPORT_SYMBOL_GPL(kvm_configure_mmu);
5513 /* The return value indicates if tlb flush on all vcpus is needed. */
5514 typedef bool (*slot_level_handler) (struct kvm *kvm,
5515 struct kvm_rmap_head *rmap_head,
5516 const struct kvm_memory_slot *slot);
5518 /* The caller should hold mmu-lock before calling this function. */
5519 static __always_inline bool
5520 slot_handle_level_range(struct kvm *kvm, const struct kvm_memory_slot *memslot,
5521 slot_level_handler fn, int start_level, int end_level,
5522 gfn_t start_gfn, gfn_t end_gfn, bool flush_on_yield,
5525 struct slot_rmap_walk_iterator iterator;
5527 for_each_slot_rmap_range(memslot, start_level, end_level, start_gfn,
5528 end_gfn, &iterator) {
5530 flush |= fn(kvm, iterator.rmap, memslot);
5532 if (need_resched() || rwlock_needbreak(&kvm->mmu_lock)) {
5533 if (flush && flush_on_yield) {
5534 kvm_flush_remote_tlbs_with_address(kvm,
5536 iterator.gfn - start_gfn + 1);
5539 cond_resched_rwlock_write(&kvm->mmu_lock);
5546 static __always_inline bool
5547 slot_handle_level(struct kvm *kvm, const struct kvm_memory_slot *memslot,
5548 slot_level_handler fn, int start_level, int end_level,
5549 bool flush_on_yield)
5551 return slot_handle_level_range(kvm, memslot, fn, start_level,
5552 end_level, memslot->base_gfn,
5553 memslot->base_gfn + memslot->npages - 1,
5554 flush_on_yield, false);
5557 static __always_inline bool
5558 slot_handle_level_4k(struct kvm *kvm, const struct kvm_memory_slot *memslot,
5559 slot_level_handler fn, bool flush_on_yield)
5561 return slot_handle_level(kvm, memslot, fn, PG_LEVEL_4K,
5562 PG_LEVEL_4K, flush_on_yield);
5565 static void free_mmu_pages(struct kvm_mmu *mmu)
5567 if (!tdp_enabled && mmu->pae_root)
5568 set_memory_encrypted((unsigned long)mmu->pae_root, 1);
5569 free_page((unsigned long)mmu->pae_root);
5570 free_page((unsigned long)mmu->pml4_root);
5571 free_page((unsigned long)mmu->pml5_root);
5574 static int __kvm_mmu_create(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu)
5579 mmu->root.hpa = INVALID_PAGE;
5581 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
5582 mmu->prev_roots[i] = KVM_MMU_ROOT_INFO_INVALID;
5584 /* vcpu->arch.guest_mmu isn't used when !tdp_enabled. */
5585 if (!tdp_enabled && mmu == &vcpu->arch.guest_mmu)
5589 * When using PAE paging, the four PDPTEs are treated as 'root' pages,
5590 * while the PDP table is a per-vCPU construct that's allocated at MMU
5591 * creation. When emulating 32-bit mode, cr3 is only 32 bits even on
5592 * x86_64. Therefore we need to allocate the PDP table in the first
5593 * 4GB of memory, which happens to fit the DMA32 zone. TDP paging
5594 * generally doesn't use PAE paging and can skip allocating the PDP
5595 * table. The main exception, handled here, is SVM's 32-bit NPT. The
5596 * other exception is for shadowing L1's 32-bit or PAE NPT on 64-bit
5597 * KVM; that horror is handled on-demand by mmu_alloc_special_roots().
5599 if (tdp_enabled && kvm_mmu_get_tdp_level(vcpu) > PT32E_ROOT_LEVEL)
5602 page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_DMA32);
5606 mmu->pae_root = page_address(page);
5609 * CR3 is only 32 bits when PAE paging is used, thus it's impossible to
5610 * get the CPU to treat the PDPTEs as encrypted. Decrypt the page so
5611 * that KVM's writes and the CPU's reads get along. Note, this is
5612 * only necessary when using shadow paging, as 64-bit NPT can get at
5613 * the C-bit even when shadowing 32-bit NPT, and SME isn't supported
5614 * by 32-bit kernels (when KVM itself uses 32-bit NPT).
5617 set_memory_decrypted((unsigned long)mmu->pae_root, 1);
5619 WARN_ON_ONCE(shadow_me_value);
5621 for (i = 0; i < 4; ++i)
5622 mmu->pae_root[i] = INVALID_PAE_ROOT;
5627 int kvm_mmu_create(struct kvm_vcpu *vcpu)
5631 vcpu->arch.mmu_pte_list_desc_cache.kmem_cache = pte_list_desc_cache;
5632 vcpu->arch.mmu_pte_list_desc_cache.gfp_zero = __GFP_ZERO;
5634 vcpu->arch.mmu_page_header_cache.kmem_cache = mmu_page_header_cache;
5635 vcpu->arch.mmu_page_header_cache.gfp_zero = __GFP_ZERO;
5637 vcpu->arch.mmu_shadow_page_cache.gfp_zero = __GFP_ZERO;
5639 vcpu->arch.mmu = &vcpu->arch.root_mmu;
5640 vcpu->arch.walk_mmu = &vcpu->arch.root_mmu;
5642 ret = __kvm_mmu_create(vcpu, &vcpu->arch.guest_mmu);
5646 ret = __kvm_mmu_create(vcpu, &vcpu->arch.root_mmu);
5648 goto fail_allocate_root;
5652 free_mmu_pages(&vcpu->arch.guest_mmu);
5656 #define BATCH_ZAP_PAGES 10
5657 static void kvm_zap_obsolete_pages(struct kvm *kvm)
5659 struct kvm_mmu_page *sp, *node;
5660 int nr_zapped, batch = 0;
5664 list_for_each_entry_safe_reverse(sp, node,
5665 &kvm->arch.active_mmu_pages, link) {
5667 * No obsolete valid page exists before a newly created page
5668 * since active_mmu_pages is a FIFO list.
5670 if (!is_obsolete_sp(kvm, sp))
5674 * Invalid pages should never land back on the list of active
5675 * pages. Skip the bogus page, otherwise we'll get stuck in an
5676 * infinite loop if the page gets put back on the list (again).
5678 if (WARN_ON(sp->role.invalid))
5682 * No need to flush the TLB since we're only zapping shadow
5683 * pages with an obsolete generation number and all vCPUS have
5684 * loaded a new root, i.e. the shadow pages being zapped cannot
5685 * be in active use by the guest.
5687 if (batch >= BATCH_ZAP_PAGES &&
5688 cond_resched_rwlock_write(&kvm->mmu_lock)) {
5693 unstable = __kvm_mmu_prepare_zap_page(kvm, sp,
5694 &kvm->arch.zapped_obsolete_pages, &nr_zapped);
5702 * Kick all vCPUs (via remote TLB flush) before freeing the page tables
5703 * to ensure KVM is not in the middle of a lockless shadow page table
5704 * walk, which may reference the pages. The remote TLB flush itself is
5705 * not required and is simply a convenient way to kick vCPUs as needed.
5706 * KVM performs a local TLB flush when allocating a new root (see
5707 * kvm_mmu_load()), and the reload in the caller ensure no vCPUs are
5708 * running with an obsolete MMU.
5710 kvm_mmu_commit_zap_page(kvm, &kvm->arch.zapped_obsolete_pages);
5714 * Fast invalidate all shadow pages and use lock-break technique
5715 * to zap obsolete pages.
5717 * It's required when memslot is being deleted or VM is being
5718 * destroyed, in these cases, we should ensure that KVM MMU does
5719 * not use any resource of the being-deleted slot or all slots
5720 * after calling the function.
5722 static void kvm_mmu_zap_all_fast(struct kvm *kvm)
5724 lockdep_assert_held(&kvm->slots_lock);
5726 write_lock(&kvm->mmu_lock);
5727 trace_kvm_mmu_zap_all_fast(kvm);
5730 * Toggle mmu_valid_gen between '0' and '1'. Because slots_lock is
5731 * held for the entire duration of zapping obsolete pages, it's
5732 * impossible for there to be multiple invalid generations associated
5733 * with *valid* shadow pages at any given time, i.e. there is exactly
5734 * one valid generation and (at most) one invalid generation.
5736 kvm->arch.mmu_valid_gen = kvm->arch.mmu_valid_gen ? 0 : 1;
5739 * In order to ensure all vCPUs drop their soon-to-be invalid roots,
5740 * invalidating TDP MMU roots must be done while holding mmu_lock for
5741 * write and in the same critical section as making the reload request,
5742 * e.g. before kvm_zap_obsolete_pages() could drop mmu_lock and yield.
5744 if (is_tdp_mmu_enabled(kvm))
5745 kvm_tdp_mmu_invalidate_all_roots(kvm);
5748 * Notify all vcpus to reload its shadow page table and flush TLB.
5749 * Then all vcpus will switch to new shadow page table with the new
5752 * Note: we need to do this under the protection of mmu_lock,
5753 * otherwise, vcpu would purge shadow page but miss tlb flush.
5755 kvm_make_all_cpus_request(kvm, KVM_REQ_MMU_FREE_OBSOLETE_ROOTS);
5757 kvm_zap_obsolete_pages(kvm);
5759 write_unlock(&kvm->mmu_lock);
5762 * Zap the invalidated TDP MMU roots, all SPTEs must be dropped before
5763 * returning to the caller, e.g. if the zap is in response to a memslot
5764 * deletion, mmu_notifier callbacks will be unable to reach the SPTEs
5765 * associated with the deleted memslot once the update completes, and
5766 * Deferring the zap until the final reference to the root is put would
5767 * lead to use-after-free.
5769 if (is_tdp_mmu_enabled(kvm))
5770 kvm_tdp_mmu_zap_invalidated_roots(kvm);
5773 static bool kvm_has_zapped_obsolete_pages(struct kvm *kvm)
5775 return unlikely(!list_empty_careful(&kvm->arch.zapped_obsolete_pages));
5778 static void kvm_mmu_invalidate_zap_pages_in_memslot(struct kvm *kvm,
5779 struct kvm_memory_slot *slot,
5780 struct kvm_page_track_notifier_node *node)
5782 kvm_mmu_zap_all_fast(kvm);
5785 int kvm_mmu_init_vm(struct kvm *kvm)
5787 struct kvm_page_track_notifier_node *node = &kvm->arch.mmu_sp_tracker;
5790 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
5791 INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
5792 INIT_LIST_HEAD(&kvm->arch.lpage_disallowed_mmu_pages);
5793 spin_lock_init(&kvm->arch.mmu_unsync_pages_lock);
5795 r = kvm_mmu_init_tdp_mmu(kvm);
5799 node->track_write = kvm_mmu_pte_write;
5800 node->track_flush_slot = kvm_mmu_invalidate_zap_pages_in_memslot;
5801 kvm_page_track_register_notifier(kvm, node);
5805 void kvm_mmu_uninit_vm(struct kvm *kvm)
5807 struct kvm_page_track_notifier_node *node = &kvm->arch.mmu_sp_tracker;
5809 kvm_page_track_unregister_notifier(kvm, node);
5811 kvm_mmu_uninit_tdp_mmu(kvm);
5814 static bool __kvm_zap_rmaps(struct kvm *kvm, gfn_t gfn_start, gfn_t gfn_end)
5816 const struct kvm_memory_slot *memslot;
5817 struct kvm_memslots *slots;
5818 struct kvm_memslot_iter iter;
5823 if (!kvm_memslots_have_rmaps(kvm))
5826 for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
5827 slots = __kvm_memslots(kvm, i);
5829 kvm_for_each_memslot_in_gfn_range(&iter, slots, gfn_start, gfn_end) {
5830 memslot = iter.slot;
5831 start = max(gfn_start, memslot->base_gfn);
5832 end = min(gfn_end, memslot->base_gfn + memslot->npages);
5833 if (WARN_ON_ONCE(start >= end))
5836 flush = slot_handle_level_range(kvm, memslot, kvm_zap_rmapp,
5838 PG_LEVEL_4K, KVM_MAX_HUGEPAGE_LEVEL,
5839 start, end - 1, true, flush);
5847 * Invalidate (zap) SPTEs that cover GFNs from gfn_start and up to gfn_end
5848 * (not including it)
5850 void kvm_zap_gfn_range(struct kvm *kvm, gfn_t gfn_start, gfn_t gfn_end)
5855 if (WARN_ON_ONCE(gfn_end <= gfn_start))
5858 write_lock(&kvm->mmu_lock);
5860 kvm_inc_notifier_count(kvm, gfn_start, gfn_end);
5862 flush = __kvm_zap_rmaps(kvm, gfn_start, gfn_end);
5864 if (is_tdp_mmu_enabled(kvm)) {
5865 for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++)
5866 flush = kvm_tdp_mmu_zap_leafs(kvm, i, gfn_start,
5867 gfn_end, true, flush);
5871 kvm_flush_remote_tlbs_with_address(kvm, gfn_start,
5872 gfn_end - gfn_start);
5874 kvm_dec_notifier_count(kvm, gfn_start, gfn_end);
5876 write_unlock(&kvm->mmu_lock);
5879 static bool slot_rmap_write_protect(struct kvm *kvm,
5880 struct kvm_rmap_head *rmap_head,
5881 const struct kvm_memory_slot *slot)
5883 return rmap_write_protect(rmap_head, false);
5886 void kvm_mmu_slot_remove_write_access(struct kvm *kvm,
5887 const struct kvm_memory_slot *memslot,
5892 if (kvm_memslots_have_rmaps(kvm)) {
5893 write_lock(&kvm->mmu_lock);
5894 flush = slot_handle_level(kvm, memslot, slot_rmap_write_protect,
5895 start_level, KVM_MAX_HUGEPAGE_LEVEL,
5897 write_unlock(&kvm->mmu_lock);
5900 if (is_tdp_mmu_enabled(kvm)) {
5901 read_lock(&kvm->mmu_lock);
5902 flush |= kvm_tdp_mmu_wrprot_slot(kvm, memslot, start_level);
5903 read_unlock(&kvm->mmu_lock);
5907 * Flush TLBs if any SPTEs had to be write-protected to ensure that
5908 * guest writes are reflected in the dirty bitmap before the memslot
5909 * update completes, i.e. before enabling dirty logging is visible to
5912 * Perform the TLB flush outside the mmu_lock to reduce the amount of
5913 * time the lock is held. However, this does mean that another CPU can
5914 * now grab mmu_lock and encounter a write-protected SPTE while CPUs
5915 * still have a writable mapping for the associated GFN in their TLB.
5917 * This is safe but requires KVM to be careful when making decisions
5918 * based on the write-protection status of an SPTE. Specifically, KVM
5919 * also write-protects SPTEs to monitor changes to guest page tables
5920 * during shadow paging, and must guarantee no CPUs can write to those
5921 * page before the lock is dropped. As mentioned in the previous
5922 * paragraph, a write-protected SPTE is no guarantee that CPU cannot
5923 * perform writes. So to determine if a TLB flush is truly required, KVM
5924 * will clear a separate software-only bit (MMU-writable) and skip the
5925 * flush if-and-only-if this bit was already clear.
5927 * See is_writable_pte() for more details.
5930 kvm_arch_flush_remote_tlbs_memslot(kvm, memslot);
5933 /* Must be called with the mmu_lock held in write-mode. */
5934 void kvm_mmu_try_split_huge_pages(struct kvm *kvm,
5935 const struct kvm_memory_slot *memslot,
5939 if (is_tdp_mmu_enabled(kvm))
5940 kvm_tdp_mmu_try_split_huge_pages(kvm, memslot, start, end,
5941 target_level, false);
5944 * A TLB flush is unnecessary at this point for the same resons as in
5945 * kvm_mmu_slot_try_split_huge_pages().
5949 void kvm_mmu_slot_try_split_huge_pages(struct kvm *kvm,
5950 const struct kvm_memory_slot *memslot,
5953 u64 start = memslot->base_gfn;
5954 u64 end = start + memslot->npages;
5956 if (is_tdp_mmu_enabled(kvm)) {
5957 read_lock(&kvm->mmu_lock);
5958 kvm_tdp_mmu_try_split_huge_pages(kvm, memslot, start, end, target_level, true);
5959 read_unlock(&kvm->mmu_lock);
5963 * No TLB flush is necessary here. KVM will flush TLBs after
5964 * write-protecting and/or clearing dirty on the newly split SPTEs to
5965 * ensure that guest writes are reflected in the dirty log before the
5966 * ioctl to enable dirty logging on this memslot completes. Since the
5967 * split SPTEs retain the write and dirty bits of the huge SPTE, it is
5968 * safe for KVM to decide if a TLB flush is necessary based on the split
5973 static bool kvm_mmu_zap_collapsible_spte(struct kvm *kvm,
5974 struct kvm_rmap_head *rmap_head,
5975 const struct kvm_memory_slot *slot)
5978 struct rmap_iterator iter;
5979 int need_tlb_flush = 0;
5981 struct kvm_mmu_page *sp;
5984 for_each_rmap_spte(rmap_head, &iter, sptep) {
5985 sp = sptep_to_sp(sptep);
5986 pfn = spte_to_pfn(*sptep);
5989 * We cannot do huge page mapping for indirect shadow pages,
5990 * which are found on the last rmap (level = 1) when not using
5991 * tdp; such shadow pages are synced with the page table in
5992 * the guest, and the guest page table is using 4K page size
5993 * mapping if the indirect sp has level = 1.
5995 if (sp->role.direct && !kvm_is_reserved_pfn(pfn) &&
5996 sp->role.level < kvm_mmu_max_mapping_level(kvm, slot, sp->gfn,
5997 pfn, PG_LEVEL_NUM)) {
5998 pte_list_remove(kvm, rmap_head, sptep);
6000 if (kvm_available_flush_tlb_with_range())
6001 kvm_flush_remote_tlbs_with_address(kvm, sp->gfn,
6002 KVM_PAGES_PER_HPAGE(sp->role.level));
6010 return need_tlb_flush;
6013 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm,
6014 const struct kvm_memory_slot *slot)
6016 if (kvm_memslots_have_rmaps(kvm)) {
6017 write_lock(&kvm->mmu_lock);
6019 * Zap only 4k SPTEs since the legacy MMU only supports dirty
6020 * logging at a 4k granularity and never creates collapsible
6021 * 2m SPTEs during dirty logging.
6023 if (slot_handle_level_4k(kvm, slot, kvm_mmu_zap_collapsible_spte, true))
6024 kvm_arch_flush_remote_tlbs_memslot(kvm, slot);
6025 write_unlock(&kvm->mmu_lock);
6028 if (is_tdp_mmu_enabled(kvm)) {
6029 read_lock(&kvm->mmu_lock);
6030 kvm_tdp_mmu_zap_collapsible_sptes(kvm, slot);
6031 read_unlock(&kvm->mmu_lock);
6035 void kvm_arch_flush_remote_tlbs_memslot(struct kvm *kvm,
6036 const struct kvm_memory_slot *memslot)
6039 * All current use cases for flushing the TLBs for a specific memslot
6040 * related to dirty logging, and many do the TLB flush out of mmu_lock.
6041 * The interaction between the various operations on memslot must be
6042 * serialized by slots_locks to ensure the TLB flush from one operation
6043 * is observed by any other operation on the same memslot.
6045 lockdep_assert_held(&kvm->slots_lock);
6046 kvm_flush_remote_tlbs_with_address(kvm, memslot->base_gfn,
6050 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm,
6051 const struct kvm_memory_slot *memslot)
6055 if (kvm_memslots_have_rmaps(kvm)) {
6056 write_lock(&kvm->mmu_lock);
6058 * Clear dirty bits only on 4k SPTEs since the legacy MMU only
6059 * support dirty logging at a 4k granularity.
6061 flush = slot_handle_level_4k(kvm, memslot, __rmap_clear_dirty, false);
6062 write_unlock(&kvm->mmu_lock);
6065 if (is_tdp_mmu_enabled(kvm)) {
6066 read_lock(&kvm->mmu_lock);
6067 flush |= kvm_tdp_mmu_clear_dirty_slot(kvm, memslot);
6068 read_unlock(&kvm->mmu_lock);
6072 * It's also safe to flush TLBs out of mmu lock here as currently this
6073 * function is only used for dirty logging, in which case flushing TLB
6074 * out of mmu lock also guarantees no dirty pages will be lost in
6078 kvm_arch_flush_remote_tlbs_memslot(kvm, memslot);
6081 void kvm_mmu_zap_all(struct kvm *kvm)
6083 struct kvm_mmu_page *sp, *node;
6084 LIST_HEAD(invalid_list);
6087 write_lock(&kvm->mmu_lock);
6089 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link) {
6090 if (WARN_ON(sp->role.invalid))
6092 if (__kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list, &ign))
6094 if (cond_resched_rwlock_write(&kvm->mmu_lock))
6098 kvm_mmu_commit_zap_page(kvm, &invalid_list);
6100 if (is_tdp_mmu_enabled(kvm))
6101 kvm_tdp_mmu_zap_all(kvm);
6103 write_unlock(&kvm->mmu_lock);
6106 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, u64 gen)
6108 WARN_ON(gen & KVM_MEMSLOT_GEN_UPDATE_IN_PROGRESS);
6110 gen &= MMIO_SPTE_GEN_MASK;
6113 * Generation numbers are incremented in multiples of the number of
6114 * address spaces in order to provide unique generations across all
6115 * address spaces. Strip what is effectively the address space
6116 * modifier prior to checking for a wrap of the MMIO generation so
6117 * that a wrap in any address space is detected.
6119 gen &= ~((u64)KVM_ADDRESS_SPACE_NUM - 1);
6122 * The very rare case: if the MMIO generation number has wrapped,
6123 * zap all shadow pages.
6125 if (unlikely(gen == 0)) {
6126 kvm_debug_ratelimited("kvm: zapping shadow pages for mmio generation wraparound\n");
6127 kvm_mmu_zap_all_fast(kvm);
6131 static unsigned long
6132 mmu_shrink_scan(struct shrinker *shrink, struct shrink_control *sc)
6135 int nr_to_scan = sc->nr_to_scan;
6136 unsigned long freed = 0;
6138 mutex_lock(&kvm_lock);
6140 list_for_each_entry(kvm, &vm_list, vm_list) {
6142 LIST_HEAD(invalid_list);
6145 * Never scan more than sc->nr_to_scan VM instances.
6146 * Will not hit this condition practically since we do not try
6147 * to shrink more than one VM and it is very unlikely to see
6148 * !n_used_mmu_pages so many times.
6153 * n_used_mmu_pages is accessed without holding kvm->mmu_lock
6154 * here. We may skip a VM instance errorneosly, but we do not
6155 * want to shrink a VM that only started to populate its MMU
6158 if (!kvm->arch.n_used_mmu_pages &&
6159 !kvm_has_zapped_obsolete_pages(kvm))
6162 idx = srcu_read_lock(&kvm->srcu);
6163 write_lock(&kvm->mmu_lock);
6165 if (kvm_has_zapped_obsolete_pages(kvm)) {
6166 kvm_mmu_commit_zap_page(kvm,
6167 &kvm->arch.zapped_obsolete_pages);
6171 freed = kvm_mmu_zap_oldest_mmu_pages(kvm, sc->nr_to_scan);
6174 write_unlock(&kvm->mmu_lock);
6175 srcu_read_unlock(&kvm->srcu, idx);
6178 * unfair on small ones
6179 * per-vm shrinkers cry out
6180 * sadness comes quickly
6182 list_move_tail(&kvm->vm_list, &vm_list);
6186 mutex_unlock(&kvm_lock);
6190 static unsigned long
6191 mmu_shrink_count(struct shrinker *shrink, struct shrink_control *sc)
6193 return percpu_counter_read_positive(&kvm_total_used_mmu_pages);
6196 static struct shrinker mmu_shrinker = {
6197 .count_objects = mmu_shrink_count,
6198 .scan_objects = mmu_shrink_scan,
6199 .seeks = DEFAULT_SEEKS * 10,
6202 static void mmu_destroy_caches(void)
6204 kmem_cache_destroy(pte_list_desc_cache);
6205 kmem_cache_destroy(mmu_page_header_cache);
6208 static bool get_nx_auto_mode(void)
6210 /* Return true when CPU has the bug, and mitigations are ON */
6211 return boot_cpu_has_bug(X86_BUG_ITLB_MULTIHIT) && !cpu_mitigations_off();
6214 static void __set_nx_huge_pages(bool val)
6216 nx_huge_pages = itlb_multihit_kvm_mitigation = val;
6219 static int set_nx_huge_pages(const char *val, const struct kernel_param *kp)
6221 bool old_val = nx_huge_pages;
6224 /* In "auto" mode deploy workaround only if CPU has the bug. */
6225 if (sysfs_streq(val, "off"))
6227 else if (sysfs_streq(val, "force"))
6229 else if (sysfs_streq(val, "auto"))
6230 new_val = get_nx_auto_mode();
6231 else if (strtobool(val, &new_val) < 0)
6234 __set_nx_huge_pages(new_val);
6236 if (new_val != old_val) {
6239 mutex_lock(&kvm_lock);
6241 list_for_each_entry(kvm, &vm_list, vm_list) {
6242 mutex_lock(&kvm->slots_lock);
6243 kvm_mmu_zap_all_fast(kvm);
6244 mutex_unlock(&kvm->slots_lock);
6246 wake_up_process(kvm->arch.nx_lpage_recovery_thread);
6248 mutex_unlock(&kvm_lock);
6255 * nx_huge_pages needs to be resolved to true/false when kvm.ko is loaded, as
6256 * its default value of -1 is technically undefined behavior for a boolean.
6258 void kvm_mmu_x86_module_init(void)
6260 if (nx_huge_pages == -1)
6261 __set_nx_huge_pages(get_nx_auto_mode());
6265 * The bulk of the MMU initialization is deferred until the vendor module is
6266 * loaded as many of the masks/values may be modified by VMX or SVM, i.e. need
6267 * to be reset when a potentially different vendor module is loaded.
6269 int kvm_mmu_vendor_module_init(void)
6274 * MMU roles use union aliasing which is, generally speaking, an
6275 * undefined behavior. However, we supposedly know how compilers behave
6276 * and the current status quo is unlikely to change. Guardians below are
6277 * supposed to let us know if the assumption becomes false.
6279 BUILD_BUG_ON(sizeof(union kvm_mmu_page_role) != sizeof(u32));
6280 BUILD_BUG_ON(sizeof(union kvm_mmu_extended_role) != sizeof(u32));
6281 BUILD_BUG_ON(sizeof(union kvm_cpu_role) != sizeof(u64));
6283 kvm_mmu_reset_all_pte_masks();
6285 pte_list_desc_cache = kmem_cache_create("pte_list_desc",
6286 sizeof(struct pte_list_desc),
6287 0, SLAB_ACCOUNT, NULL);
6288 if (!pte_list_desc_cache)
6291 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
6292 sizeof(struct kvm_mmu_page),
6293 0, SLAB_ACCOUNT, NULL);
6294 if (!mmu_page_header_cache)
6297 if (percpu_counter_init(&kvm_total_used_mmu_pages, 0, GFP_KERNEL))
6300 ret = register_shrinker(&mmu_shrinker);
6307 mmu_destroy_caches();
6311 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
6313 kvm_mmu_unload(vcpu);
6314 free_mmu_pages(&vcpu->arch.root_mmu);
6315 free_mmu_pages(&vcpu->arch.guest_mmu);
6316 mmu_free_memory_caches(vcpu);
6319 void kvm_mmu_vendor_module_exit(void)
6321 mmu_destroy_caches();
6322 percpu_counter_destroy(&kvm_total_used_mmu_pages);
6323 unregister_shrinker(&mmu_shrinker);
6327 * Calculate the effective recovery period, accounting for '0' meaning "let KVM
6328 * select a halving time of 1 hour". Returns true if recovery is enabled.
6330 static bool calc_nx_huge_pages_recovery_period(uint *period)
6333 * Use READ_ONCE to get the params, this may be called outside of the
6334 * param setters, e.g. by the kthread to compute its next timeout.
6336 bool enabled = READ_ONCE(nx_huge_pages);
6337 uint ratio = READ_ONCE(nx_huge_pages_recovery_ratio);
6339 if (!enabled || !ratio)
6342 *period = READ_ONCE(nx_huge_pages_recovery_period_ms);
6344 /* Make sure the period is not less than one second. */
6345 ratio = min(ratio, 3600u);
6346 *period = 60 * 60 * 1000 / ratio;
6351 static int set_nx_huge_pages_recovery_param(const char *val, const struct kernel_param *kp)
6353 bool was_recovery_enabled, is_recovery_enabled;
6354 uint old_period, new_period;
6357 was_recovery_enabled = calc_nx_huge_pages_recovery_period(&old_period);
6359 err = param_set_uint(val, kp);
6363 is_recovery_enabled = calc_nx_huge_pages_recovery_period(&new_period);
6365 if (is_recovery_enabled &&
6366 (!was_recovery_enabled || old_period > new_period)) {
6369 mutex_lock(&kvm_lock);
6371 list_for_each_entry(kvm, &vm_list, vm_list)
6372 wake_up_process(kvm->arch.nx_lpage_recovery_thread);
6374 mutex_unlock(&kvm_lock);
6380 static void kvm_recover_nx_lpages(struct kvm *kvm)
6382 unsigned long nx_lpage_splits = kvm->stat.nx_lpage_splits;
6384 struct kvm_mmu_page *sp;
6386 LIST_HEAD(invalid_list);
6390 rcu_idx = srcu_read_lock(&kvm->srcu);
6391 write_lock(&kvm->mmu_lock);
6394 * Zapping TDP MMU shadow pages, including the remote TLB flush, must
6395 * be done under RCU protection, because the pages are freed via RCU
6400 ratio = READ_ONCE(nx_huge_pages_recovery_ratio);
6401 to_zap = ratio ? DIV_ROUND_UP(nx_lpage_splits, ratio) : 0;
6402 for ( ; to_zap; --to_zap) {
6403 if (list_empty(&kvm->arch.lpage_disallowed_mmu_pages))
6407 * We use a separate list instead of just using active_mmu_pages
6408 * because the number of lpage_disallowed pages is expected to
6409 * be relatively small compared to the total.
6411 sp = list_first_entry(&kvm->arch.lpage_disallowed_mmu_pages,
6412 struct kvm_mmu_page,
6413 lpage_disallowed_link);
6414 WARN_ON_ONCE(!sp->lpage_disallowed);
6415 if (is_tdp_mmu_page(sp)) {
6416 flush |= kvm_tdp_mmu_zap_sp(kvm, sp);
6418 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
6419 WARN_ON_ONCE(sp->lpage_disallowed);
6422 if (need_resched() || rwlock_needbreak(&kvm->mmu_lock)) {
6423 kvm_mmu_remote_flush_or_zap(kvm, &invalid_list, flush);
6426 cond_resched_rwlock_write(&kvm->mmu_lock);
6432 kvm_mmu_remote_flush_or_zap(kvm, &invalid_list, flush);
6436 write_unlock(&kvm->mmu_lock);
6437 srcu_read_unlock(&kvm->srcu, rcu_idx);
6440 static long get_nx_lpage_recovery_timeout(u64 start_time)
6445 enabled = calc_nx_huge_pages_recovery_period(&period);
6447 return enabled ? start_time + msecs_to_jiffies(period) - get_jiffies_64()
6448 : MAX_SCHEDULE_TIMEOUT;
6451 static int kvm_nx_lpage_recovery_worker(struct kvm *kvm, uintptr_t data)
6454 long remaining_time;
6457 start_time = get_jiffies_64();
6458 remaining_time = get_nx_lpage_recovery_timeout(start_time);
6460 set_current_state(TASK_INTERRUPTIBLE);
6461 while (!kthread_should_stop() && remaining_time > 0) {
6462 schedule_timeout(remaining_time);
6463 remaining_time = get_nx_lpage_recovery_timeout(start_time);
6464 set_current_state(TASK_INTERRUPTIBLE);
6467 set_current_state(TASK_RUNNING);
6469 if (kthread_should_stop())
6472 kvm_recover_nx_lpages(kvm);
6476 int kvm_mmu_post_init_vm(struct kvm *kvm)
6480 err = kvm_vm_create_worker_thread(kvm, kvm_nx_lpage_recovery_worker, 0,
6481 "kvm-nx-lpage-recovery",
6482 &kvm->arch.nx_lpage_recovery_thread);
6484 kthread_unpark(kvm->arch.nx_lpage_recovery_thread);
6489 void kvm_mmu_pre_destroy_vm(struct kvm *kvm)
6491 if (kvm->arch.nx_lpage_recovery_thread)
6492 kthread_stop(kvm->arch.nx_lpage_recovery_thread);