1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef ASM_KVM_CACHE_REGS_H
3 #define ASM_KVM_CACHE_REGS_H
5 #include <linux/kvm_host.h>
7 #define KVM_POSSIBLE_CR0_GUEST_BITS X86_CR0_TS
8 #define KVM_POSSIBLE_CR4_GUEST_BITS \
9 (X86_CR4_PVI | X86_CR4_DE | X86_CR4_PCE | X86_CR4_OSFXSR \
10 | X86_CR4_OSXMMEXCPT | X86_CR4_PGE | X86_CR4_TSD | X86_CR4_FSGSBASE)
12 #define BUILD_KVM_GPR_ACCESSORS(lname, uname) \
13 static __always_inline unsigned long kvm_##lname##_read(struct kvm_vcpu *vcpu)\
15 return vcpu->arch.regs[VCPU_REGS_##uname]; \
17 static __always_inline void kvm_##lname##_write(struct kvm_vcpu *vcpu, \
20 vcpu->arch.regs[VCPU_REGS_##uname] = val; \
22 BUILD_KVM_GPR_ACCESSORS(rax, RAX)
23 BUILD_KVM_GPR_ACCESSORS(rbx, RBX)
24 BUILD_KVM_GPR_ACCESSORS(rcx, RCX)
25 BUILD_KVM_GPR_ACCESSORS(rdx, RDX)
26 BUILD_KVM_GPR_ACCESSORS(rbp, RBP)
27 BUILD_KVM_GPR_ACCESSORS(rsi, RSI)
28 BUILD_KVM_GPR_ACCESSORS(rdi, RDI)
30 BUILD_KVM_GPR_ACCESSORS(r8, R8)
31 BUILD_KVM_GPR_ACCESSORS(r9, R9)
32 BUILD_KVM_GPR_ACCESSORS(r10, R10)
33 BUILD_KVM_GPR_ACCESSORS(r11, R11)
34 BUILD_KVM_GPR_ACCESSORS(r12, R12)
35 BUILD_KVM_GPR_ACCESSORS(r13, R13)
36 BUILD_KVM_GPR_ACCESSORS(r14, R14)
37 BUILD_KVM_GPR_ACCESSORS(r15, R15)
40 static inline bool kvm_register_is_available(struct kvm_vcpu *vcpu,
43 return test_bit(reg, (unsigned long *)&vcpu->arch.regs_avail);
46 static inline bool kvm_register_is_dirty(struct kvm_vcpu *vcpu,
49 return test_bit(reg, (unsigned long *)&vcpu->arch.regs_dirty);
52 static inline void kvm_register_mark_available(struct kvm_vcpu *vcpu,
55 __set_bit(reg, (unsigned long *)&vcpu->arch.regs_avail);
58 static inline void kvm_register_clear_available(struct kvm_vcpu *vcpu,
61 __clear_bit(reg, (unsigned long *)&vcpu->arch.regs_avail);
62 __clear_bit(reg, (unsigned long *)&vcpu->arch.regs_dirty);
65 static inline void kvm_register_mark_dirty(struct kvm_vcpu *vcpu,
68 __set_bit(reg, (unsigned long *)&vcpu->arch.regs_avail);
69 __set_bit(reg, (unsigned long *)&vcpu->arch.regs_dirty);
73 * The "raw" register helpers are only for cases where the full 64 bits of a
74 * register are read/written irrespective of current vCPU mode. In other words,
75 * odds are good you shouldn't be using the raw variants.
77 static inline unsigned long kvm_register_read_raw(struct kvm_vcpu *vcpu, int reg)
79 if (WARN_ON_ONCE((unsigned int)reg >= NR_VCPU_REGS))
82 if (!kvm_register_is_available(vcpu, reg))
83 static_call(kvm_x86_cache_reg)(vcpu, reg);
85 return vcpu->arch.regs[reg];
88 static inline void kvm_register_write_raw(struct kvm_vcpu *vcpu, int reg,
91 if (WARN_ON_ONCE((unsigned int)reg >= NR_VCPU_REGS))
94 vcpu->arch.regs[reg] = val;
95 kvm_register_mark_dirty(vcpu, reg);
98 static inline unsigned long kvm_rip_read(struct kvm_vcpu *vcpu)
100 return kvm_register_read_raw(vcpu, VCPU_REGS_RIP);
103 static inline void kvm_rip_write(struct kvm_vcpu *vcpu, unsigned long val)
105 kvm_register_write_raw(vcpu, VCPU_REGS_RIP, val);
108 static inline unsigned long kvm_rsp_read(struct kvm_vcpu *vcpu)
110 return kvm_register_read_raw(vcpu, VCPU_REGS_RSP);
113 static inline void kvm_rsp_write(struct kvm_vcpu *vcpu, unsigned long val)
115 kvm_register_write_raw(vcpu, VCPU_REGS_RSP, val);
118 static inline u64 kvm_pdptr_read(struct kvm_vcpu *vcpu, int index)
120 might_sleep(); /* on svm */
122 if (!kvm_register_is_available(vcpu, VCPU_EXREG_PDPTR))
123 static_call(kvm_x86_cache_reg)(vcpu, VCPU_EXREG_PDPTR);
125 return vcpu->arch.walk_mmu->pdptrs[index];
128 static inline void kvm_pdptr_write(struct kvm_vcpu *vcpu, int index, u64 value)
130 vcpu->arch.walk_mmu->pdptrs[index] = value;
133 static inline ulong kvm_read_cr0_bits(struct kvm_vcpu *vcpu, ulong mask)
135 ulong tmask = mask & KVM_POSSIBLE_CR0_GUEST_BITS;
136 if ((tmask & vcpu->arch.cr0_guest_owned_bits) &&
137 !kvm_register_is_available(vcpu, VCPU_EXREG_CR0))
138 static_call(kvm_x86_cache_reg)(vcpu, VCPU_EXREG_CR0);
139 return vcpu->arch.cr0 & mask;
142 static inline ulong kvm_read_cr0(struct kvm_vcpu *vcpu)
144 return kvm_read_cr0_bits(vcpu, ~0UL);
147 static inline ulong kvm_read_cr4_bits(struct kvm_vcpu *vcpu, ulong mask)
149 ulong tmask = mask & KVM_POSSIBLE_CR4_GUEST_BITS;
150 if ((tmask & vcpu->arch.cr4_guest_owned_bits) &&
151 !kvm_register_is_available(vcpu, VCPU_EXREG_CR4))
152 static_call(kvm_x86_cache_reg)(vcpu, VCPU_EXREG_CR4);
153 return vcpu->arch.cr4 & mask;
156 static inline ulong kvm_read_cr3(struct kvm_vcpu *vcpu)
158 if (!kvm_register_is_available(vcpu, VCPU_EXREG_CR3))
159 static_call(kvm_x86_cache_reg)(vcpu, VCPU_EXREG_CR3);
160 return vcpu->arch.cr3;
163 static inline ulong kvm_read_cr4(struct kvm_vcpu *vcpu)
165 return kvm_read_cr4_bits(vcpu, ~0UL);
168 static inline u64 kvm_read_edx_eax(struct kvm_vcpu *vcpu)
170 return (kvm_rax_read(vcpu) & -1u)
171 | ((u64)(kvm_rdx_read(vcpu) & -1u) << 32);
174 static inline void enter_guest_mode(struct kvm_vcpu *vcpu)
176 vcpu->arch.hflags |= HF_GUEST_MASK;
177 vcpu->stat.guest_mode = 1;
180 static inline void leave_guest_mode(struct kvm_vcpu *vcpu)
182 vcpu->arch.hflags &= ~HF_GUEST_MASK;
184 if (vcpu->arch.load_eoi_exitmap_pending) {
185 vcpu->arch.load_eoi_exitmap_pending = false;
186 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
189 vcpu->stat.guest_mode = 0;
192 static inline bool is_guest_mode(struct kvm_vcpu *vcpu)
194 return vcpu->arch.hflags & HF_GUEST_MASK;
197 static inline bool is_smm(struct kvm_vcpu *vcpu)
199 return vcpu->arch.hflags & HF_SMM_MASK;