arch/x86/kvm/ioapic.c

   1 /*
   2  *  Copyright (C) 2001  MandrakeSoft S.A.
   3  *  Copyright 2010 Red Hat, Inc. and/or its affiliates.
   4  *
   5  *    MandrakeSoft S.A.
   6  *    43, rue d'Aboukir
   7  *    75002 Paris - France
   8  *    http://www.linux-mandrake.com/
   9  *    http://www.mandrakesoft.com/
  10  *
  11  *  This library is free software; you can redistribute it and/or
  12  *  modify it under the terms of the GNU Lesser General Public
  13  *  License as published by the Free Software Foundation; either
  14  *  version 2 of the License, or (at your option) any later version.
  15  *
  16  *  This library is distributed in the hope that it will be useful,
  17  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  19  *  Lesser General Public License for more details.
  20  *
  21  *  You should have received a copy of the GNU Lesser General Public
  22  *  License along with this library; if not, write to the Free Software
  23  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  24  *
  25  *  Yunhong Jiang <yunhong.jiang@intel.com>
  26  *  Yaozu (Eddie) Dong <eddie.dong@intel.com>
  27  *  Based on Xen 3.1 code.
  28  */
  29
  30 #include <linux/kvm_host.h>
  31 #include <linux/kvm.h>
  32 #include <linux/mm.h>
  33 #include <linux/highmem.h>
  34 #include <linux/smp.h>
  35 #include <linux/hrtimer.h>
  36 #include <linux/io.h>
  37 #include <linux/slab.h>
  38 #include <linux/export.h>
  39 #include <asm/processor.h>
  40 #include <asm/page.h>
  41 #include <asm/current.h>
  42 #include <trace/events/kvm.h>
  43
  44 #include "ioapic.h"
  45 #include "lapic.h"
  46 #include "irq.h"
  47
  48 #if 0
  49 #define ioapic_debug(fmt,arg...) printk(KERN_WARNING fmt,##arg)
  50 #else
  51 #define ioapic_debug(fmt, arg...)
  52 #endif
  53 static int ioapic_service(struct kvm_ioapic *vioapic, int irq,
  54                 bool line_status);
  55
  56 static unsigned long ioapic_read_indirect(struct kvm_ioapic *ioapic,
  57                                           unsigned long addr,
  58                                           unsigned long length)
  59 {
  60         unsigned long result = 0;
  61
  62         switch (ioapic->ioregsel) {
  63         case IOAPIC_REG_VERSION:
  64                 result = ((((IOAPIC_NUM_PINS - 1) & 0xff) << 16)
  65                           | (IOAPIC_VERSION_ID & 0xff));
  66                 break;
  67
  68         case IOAPIC_REG_APIC_ID:
  69         case IOAPIC_REG_ARB_ID:
  70                 result = ((ioapic->id & 0xf) << 24);
  71                 break;
  72
  73         default:
  74                 {
  75                         u32 redir_index = (ioapic->ioregsel - 0x10) >> 1;
  76                         u64 redir_content;
  77
  78                         if (redir_index < IOAPIC_NUM_PINS)
  79                                 redir_content =
  80                                         ioapic->redirtbl[redir_index].bits;
  81                         else
  82                                 redir_content = ~0ULL;
  83
  84                         result = (ioapic->ioregsel & 0x1) ?
  85                             (redir_content >> 32) & 0xffffffff :
  86                             redir_content & 0xffffffff;
  87                         break;
  88                 }
  89         }
  90
  91         return result;
  92 }
  93
  94 static void rtc_irq_eoi_tracking_reset(struct kvm_ioapic *ioapic)
  95 {
  96         ioapic->rtc_status.pending_eoi = 0;
  97         bitmap_zero(ioapic->rtc_status.dest_map.map, KVM_MAX_VCPU_ID);
  98 }
  99
 100 static void kvm_rtc_eoi_tracking_restore_all(struct kvm_ioapic *ioapic);
 101
 102 static void rtc_status_pending_eoi_check_valid(struct kvm_ioapic *ioapic)
 103 {
 104         if (WARN_ON(ioapic->rtc_status.pending_eoi < 0))
 105                 kvm_rtc_eoi_tracking_restore_all(ioapic);
 106 }
 107
 108 static void __rtc_irq_eoi_tracking_restore_one(struct kvm_vcpu *vcpu)
 109 {
 110         bool new_val, old_val;
 111         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
 112         struct dest_map *dest_map = &ioapic->rtc_status.dest_map;
 113         union kvm_ioapic_redirect_entry *e;
 114
 115         e = &ioapic->redirtbl[RTC_GSI];
 116         if (!kvm_apic_match_dest(vcpu, NULL, 0, e->fields.dest_id,
 117                                 e->fields.dest_mode))
 118                 return;
 119
 120         new_val = kvm_apic_pending_eoi(vcpu, e->fields.vector);
 121         old_val = test_bit(vcpu->vcpu_id, dest_map->map);
 122
 123         if (new_val == old_val)
 124                 return;
 125
 126         if (new_val) {
 127                 __set_bit(vcpu->vcpu_id, dest_map->map);
 128                 dest_map->vectors[vcpu->vcpu_id] = e->fields.vector;
 129                 ioapic->rtc_status.pending_eoi++;
 130         } else {
 131                 __clear_bit(vcpu->vcpu_id, dest_map->map);
 132                 ioapic->rtc_status.pending_eoi--;
 133                 rtc_status_pending_eoi_check_valid(ioapic);
 134         }
 135 }
 136
 137 void kvm_rtc_eoi_tracking_restore_one(struct kvm_vcpu *vcpu)
 138 {
 139         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
 140
 141         spin_lock(&ioapic->lock);
 142         __rtc_irq_eoi_tracking_restore_one(vcpu);
 143         spin_unlock(&ioapic->lock);
 144 }
 145
 146 static void kvm_rtc_eoi_tracking_restore_all(struct kvm_ioapic *ioapic)
 147 {
 148         struct kvm_vcpu *vcpu;
 149         int i;
 150
 151         if (RTC_GSI >= IOAPIC_NUM_PINS)
 152                 return;
 153
 154         rtc_irq_eoi_tracking_reset(ioapic);
 155         kvm_for_each_vcpu(i, vcpu, ioapic->kvm)
 156             __rtc_irq_eoi_tracking_restore_one(vcpu);
 157 }
 158
 159 static void rtc_irq_eoi(struct kvm_ioapic *ioapic, struct kvm_vcpu *vcpu)
 160 {
 161         if (test_and_clear_bit(vcpu->vcpu_id,
 162                                ioapic->rtc_status.dest_map.map)) {
 163                 --ioapic->rtc_status.pending_eoi;
 164                 rtc_status_pending_eoi_check_valid(ioapic);
 165         }
 166 }
 167
 168 static bool rtc_irq_check_coalesced(struct kvm_ioapic *ioapic)
 169 {
 170         if (ioapic->rtc_status.pending_eoi > 0)
 171                 return true; /* coalesced */
 172
 173         return false;
 174 }
 175
 176 static int ioapic_set_irq(struct kvm_ioapic *ioapic, unsigned int irq,
 177                 int irq_level, bool line_status)
 178 {
 179         union kvm_ioapic_redirect_entry entry;
 180         u32 mask = 1 << irq;
 181         u32 old_irr;
 182         int edge, ret;
 183
 184         entry = ioapic->redirtbl[irq];
 185         edge = (entry.fields.trig_mode == IOAPIC_EDGE_TRIG);
 186
 187         if (!irq_level) {
 188                 ioapic->irr &= ~mask;
 189                 ret = 1;
 190                 goto out;
 191         }
 192
 193         /*
 194          * Return 0 for coalesced interrupts; for edge-triggered interrupts,
 195          * this only happens if a previous edge has not been delivered due
 196          * do masking.  For level interrupts, the remote_irr field tells
 197          * us if the interrupt is waiting for an EOI.
 198          *
 199          * RTC is special: it is edge-triggered, but userspace likes to know
 200          * if it has been already ack-ed via EOI because coalesced RTC
 201          * interrupts lead to time drift in Windows guests.  So we track
 202          * EOI manually for the RTC interrupt.
 203          */
 204         if (irq == RTC_GSI && line_status &&
 205                 rtc_irq_check_coalesced(ioapic)) {
 206                 ret = 0;
 207                 goto out;
 208         }
 209
 210         old_irr = ioapic->irr;
 211         ioapic->irr |= mask;
 212         if (edge)
 213                 ioapic->irr_delivered &= ~mask;
 214         if ((edge && old_irr == ioapic->irr) ||
 215             (!edge && entry.fields.remote_irr)) {
 216                 ret = 0;
 217                 goto out;
 218         }
 219
 220         ret = ioapic_service(ioapic, irq, line_status);
 221
 222 out:
 223         trace_kvm_ioapic_set_irq(entry.bits, irq, ret == 0);
 224         return ret;
 225 }
 226
 227 static void kvm_ioapic_inject_all(struct kvm_ioapic *ioapic, unsigned long irr)
 228 {
 229         u32 idx;
 230
 231         rtc_irq_eoi_tracking_reset(ioapic);
 232         for_each_set_bit(idx, &irr, IOAPIC_NUM_PINS)
 233                 ioapic_set_irq(ioapic, idx, 1, true);
 234
 235         kvm_rtc_eoi_tracking_restore_all(ioapic);
 236 }
 237
 238
 239 void kvm_ioapic_scan_entry(struct kvm_vcpu *vcpu, ulong *ioapic_handled_vectors)
 240 {
 241         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
 242         struct dest_map *dest_map = &ioapic->rtc_status.dest_map;
 243         union kvm_ioapic_redirect_entry *e;
 244         int index;
 245
 246         spin_lock(&ioapic->lock);
 247
 248         /* Make sure we see any missing RTC EOI */
 249         if (test_bit(vcpu->vcpu_id, dest_map->map))
 250                 __set_bit(dest_map->vectors[vcpu->vcpu_id],
 251                           ioapic_handled_vectors);
 252
 253         for (index = 0; index < IOAPIC_NUM_PINS; index++) {
 254                 e = &ioapic->redirtbl[index];
 255                 if (e->fields.trig_mode == IOAPIC_LEVEL_TRIG ||
 256                     kvm_irq_has_notifier(ioapic->kvm, KVM_IRQCHIP_IOAPIC, index) ||
 257                     index == RTC_GSI) {
 258                         if (kvm_apic_match_dest(vcpu, NULL, 0,
 259                                      e->fields.dest_id, e->fields.dest_mode) ||
 260                             kvm_apic_pending_eoi(vcpu, e->fields.vector))
 261                                 __set_bit(e->fields.vector,
 262                                           ioapic_handled_vectors);
 263                 }
 264         }
 265         spin_unlock(&ioapic->lock);
 266 }
 267
 268 void kvm_arch_post_irq_ack_notifier_list_update(struct kvm *kvm)
 269 {
 270         if (!ioapic_in_kernel(kvm))
 271                 return;
 272         kvm_make_scan_ioapic_request(kvm);
 273 }
 274
 275 static void ioapic_write_indirect(struct kvm_ioapic *ioapic, u32 val)
 276 {
 277         unsigned index;
 278         bool mask_before, mask_after;
 279         union kvm_ioapic_redirect_entry *e;
 280
 281         switch (ioapic->ioregsel) {
 282         case IOAPIC_REG_VERSION:
 283                 /* Writes are ignored. */
 284                 break;
 285
 286         case IOAPIC_REG_APIC_ID:
 287                 ioapic->id = (val >> 24) & 0xf;
 288                 break;
 289
 290         case IOAPIC_REG_ARB_ID:
 291                 break;
 292
 293         default:
 294                 index = (ioapic->ioregsel - 0x10) >> 1;
 295
 296                 ioapic_debug("change redir index %x val %x\n", index, val);
 297                 if (index >= IOAPIC_NUM_PINS)
 298                         return;
 299                 e = &ioapic->redirtbl[index];
 300                 mask_before = e->fields.mask;
 301                 if (ioapic->ioregsel & 1) {
 302                         e->bits &= 0xffffffff;
 303                         e->bits |= (u64) val << 32;
 304                 } else {
 305                         e->bits &= ~0xffffffffULL;
 306                         e->bits |= (u32) val;
 307                         e->fields.remote_irr = 0;
 308                 }
 309                 mask_after = e->fields.mask;
 310                 if (mask_before != mask_after)
 311                         kvm_fire_mask_notifiers(ioapic->kvm, KVM_IRQCHIP_IOAPIC, index, mask_after);
 312                 if (e->fields.trig_mode == IOAPIC_LEVEL_TRIG
 313                     && ioapic->irr & (1 << index))
 314                         ioapic_service(ioapic, index, false);
 315                 kvm_make_scan_ioapic_request(ioapic->kvm);
 316                 break;
 317         }
 318 }
 319
 320 static int ioapic_service(struct kvm_ioapic *ioapic, int irq, bool line_status)
 321 {
 322         union kvm_ioapic_redirect_entry *entry = &ioapic->redirtbl[irq];
 323         struct kvm_lapic_irq irqe;
 324         int ret;
 325
 326         if (entry->fields.mask)
 327                 return -1;
 328
 329         ioapic_debug("dest=%x dest_mode=%x delivery_mode=%x "
 330                      "vector=%x trig_mode=%x\n",
 331                      entry->fields.dest_id, entry->fields.dest_mode,
 332                      entry->fields.delivery_mode, entry->fields.vector,
 333                      entry->fields.trig_mode);
 334
 335         irqe.dest_id = entry->fields.dest_id;
 336         irqe.vector = entry->fields.vector;
 337         irqe.dest_mode = entry->fields.dest_mode;
 338         irqe.trig_mode = entry->fields.trig_mode;
 339         irqe.delivery_mode = entry->fields.delivery_mode << 8;
 340         irqe.level = 1;
 341         irqe.shorthand = 0;
 342         irqe.msi_redir_hint = false;
 343
 344         if (irqe.trig_mode == IOAPIC_EDGE_TRIG)
 345                 ioapic->irr_delivered |= 1 << irq;
 346
 347         if (irq == RTC_GSI && line_status) {
 348                 /*
 349                  * pending_eoi cannot ever become negative (see
 350                  * rtc_status_pending_eoi_check_valid) and the caller
 351                  * ensures that it is only called if it is >= zero, namely
 352                  * if rtc_irq_check_coalesced returns false).
 353                  */
 354                 BUG_ON(ioapic->rtc_status.pending_eoi != 0);
 355                 ret = kvm_irq_delivery_to_apic(ioapic->kvm, NULL, &irqe,
 356                                                &ioapic->rtc_status.dest_map);
 357                 ioapic->rtc_status.pending_eoi = (ret < 0 ? 0 : ret);
 358         } else
 359                 ret = kvm_irq_delivery_to_apic(ioapic->kvm, NULL, &irqe, NULL);
 360
 361         if (ret && irqe.trig_mode == IOAPIC_LEVEL_TRIG)
 362                 entry->fields.remote_irr = 1;
 363
 364         return ret;
 365 }
 366
 367 int kvm_ioapic_set_irq(struct kvm_ioapic *ioapic, int irq, int irq_source_id,
 368                        int level, bool line_status)
 369 {
 370         int ret, irq_level;
 371
 372         BUG_ON(irq < 0 || irq >= IOAPIC_NUM_PINS);
 373
 374         spin_lock(&ioapic->lock);
 375         irq_level = __kvm_irq_line_state(&ioapic->irq_states[irq],
 376                                          irq_source_id, level);
 377         ret = ioapic_set_irq(ioapic, irq, irq_level, line_status);
 378
 379         spin_unlock(&ioapic->lock);
 380
 381         return ret;
 382 }
 383
 384 void kvm_ioapic_clear_all(struct kvm_ioapic *ioapic, int irq_source_id)
 385 {
 386         int i;
 387
 388         spin_lock(&ioapic->lock);
 389         for (i = 0; i < KVM_IOAPIC_NUM_PINS; i++)
 390                 __clear_bit(irq_source_id, &ioapic->irq_states[i]);
 391         spin_unlock(&ioapic->lock);
 392 }
 393
 394 static void kvm_ioapic_eoi_inject_work(struct work_struct *work)
 395 {
 396         int i;
 397         struct kvm_ioapic *ioapic = container_of(work, struct kvm_ioapic,
 398                                                  eoi_inject.work);
 399         spin_lock(&ioapic->lock);
 400         for (i = 0; i < IOAPIC_NUM_PINS; i++) {
 401                 union kvm_ioapic_redirect_entry *ent = &ioapic->redirtbl[i];
 402
 403                 if (ent->fields.trig_mode != IOAPIC_LEVEL_TRIG)
 404                         continue;
 405
 406                 if (ioapic->irr & (1 << i) && !ent->fields.remote_irr)
 407                         ioapic_service(ioapic, i, false);
 408         }
 409         spin_unlock(&ioapic->lock);
 410 }
 411
 412 #define IOAPIC_SUCCESSIVE_IRQ_MAX_COUNT 10000
 413
 414 static void __kvm_ioapic_update_eoi(struct kvm_vcpu *vcpu,
 415                         struct kvm_ioapic *ioapic, int vector, int trigger_mode)
 416 {
 417         struct dest_map *dest_map = &ioapic->rtc_status.dest_map;
 418         struct kvm_lapic *apic = vcpu->arch.apic;
 419         int i;
 420
 421         /* RTC special handling */
 422         if (test_bit(vcpu->vcpu_id, dest_map->map) &&
 423             vector == dest_map->vectors[vcpu->vcpu_id])
 424                 rtc_irq_eoi(ioapic, vcpu);
 425
 426         for (i = 0; i < IOAPIC_NUM_PINS; i++) {
 427                 union kvm_ioapic_redirect_entry *ent = &ioapic->redirtbl[i];
 428
 429                 if (ent->fields.vector != vector)
 430                         continue;
 431
 432                 /*
 433                  * We are dropping lock while calling ack notifiers because ack
 434                  * notifier callbacks for assigned devices call into IOAPIC
 435                  * recursively. Since remote_irr is cleared only after call
 436                  * to notifiers if the same vector will be delivered while lock
 437                  * is dropped it will be put into irr and will be delivered
 438                  * after ack notifier returns.
 439                  */
 440                 spin_unlock(&ioapic->lock);
 441                 kvm_notify_acked_irq(ioapic->kvm, KVM_IRQCHIP_IOAPIC, i);
 442                 spin_lock(&ioapic->lock);
 443
 444                 if (trigger_mode != IOAPIC_LEVEL_TRIG ||
 445                     kvm_lapic_get_reg(apic, APIC_SPIV) & APIC_SPIV_DIRECTED_EOI)
 446                         continue;
 447
 448                 ASSERT(ent->fields.trig_mode == IOAPIC_LEVEL_TRIG);
 449                 ent->fields.remote_irr = 0;
 450                 if (!ent->fields.mask && (ioapic->irr & (1 << i))) {
 451                         ++ioapic->irq_eoi[i];
 452                         if (ioapic->irq_eoi[i] == IOAPIC_SUCCESSIVE_IRQ_MAX_COUNT) {
 453                                 /*
 454                                  * Real hardware does not deliver the interrupt
 455                                  * immediately during eoi broadcast, and this
 456                                  * lets a buggy guest make slow progress
 457                                  * even if it does not correctly handle a
 458                                  * level-triggered interrupt.  Emulate this
 459                                  * behavior if we detect an interrupt storm.
 460                                  */
 461                                 schedule_delayed_work(&ioapic->eoi_inject, HZ / 100);
 462                                 ioapic->irq_eoi[i] = 0;
 463                                 trace_kvm_ioapic_delayed_eoi_inj(ent->bits);
 464                         } else {
 465                                 ioapic_service(ioapic, i, false);
 466                         }
 467                 } else {
 468                         ioapic->irq_eoi[i] = 0;
 469                 }
 470         }
 471 }
 472
 473 void kvm_ioapic_update_eoi(struct kvm_vcpu *vcpu, int vector, int trigger_mode)
 474 {
 475         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
 476
 477         spin_lock(&ioapic->lock);
 478         __kvm_ioapic_update_eoi(vcpu, ioapic, vector, trigger_mode);
 479         spin_unlock(&ioapic->lock);
 480 }
 481
 482 static inline struct kvm_ioapic *to_ioapic(struct kvm_io_device *dev)
 483 {
 484         return container_of(dev, struct kvm_ioapic, dev);
 485 }
 486
 487 static inline int ioapic_in_range(struct kvm_ioapic *ioapic, gpa_t addr)
 488 {
 489         return ((addr >= ioapic->base_address &&
 490                  (addr < ioapic->base_address + IOAPIC_MEM_LENGTH)));
 491 }
 492
 493 static int ioapic_mmio_read(struct kvm_vcpu *vcpu, struct kvm_io_device *this,
 494                                 gpa_t addr, int len, void *val)
 495 {
 496         struct kvm_ioapic *ioapic = to_ioapic(this);
 497         u32 result;
 498         if (!ioapic_in_range(ioapic, addr))
 499                 return -EOPNOTSUPP;
 500
 501         ioapic_debug("addr %lx\n", (unsigned long)addr);
 502         ASSERT(!(addr & 0xf));  /* check alignment */
 503
 504         addr &= 0xff;
 505         spin_lock(&ioapic->lock);
 506         switch (addr) {
 507         case IOAPIC_REG_SELECT:
 508                 result = ioapic->ioregsel;
 509                 break;
 510
 511         case IOAPIC_REG_WINDOW:
 512                 result = ioapic_read_indirect(ioapic, addr, len);
 513                 break;
 514
 515         default:
 516                 result = 0;
 517                 break;
 518         }
 519         spin_unlock(&ioapic->lock);
 520
 521         switch (len) {
 522         case 8:
 523                 *(u64 *) val = result;
 524                 break;
 525         case 1:
 526         case 2:
 527         case 4:
 528                 memcpy(val, (char *)&result, len);
 529                 break;
 530         default:
 531                 printk(KERN_WARNING "ioapic: wrong length %d\n", len);
 532         }
 533         return 0;
 534 }
 535
 536 static int ioapic_mmio_write(struct kvm_vcpu *vcpu, struct kvm_io_device *this,
 537                                  gpa_t addr, int len, const void *val)
 538 {
 539         struct kvm_ioapic *ioapic = to_ioapic(this);
 540         u32 data;
 541         if (!ioapic_in_range(ioapic, addr))
 542                 return -EOPNOTSUPP;
 543
 544         ioapic_debug("ioapic_mmio_write addr=%p len=%d val=%p\n",
 545                      (void*)addr, len, val);
 546         ASSERT(!(addr & 0xf));  /* check alignment */
 547
 548         switch (len) {
 549         case 8:
 550         case 4:
 551                 data = *(u32 *) val;
 552                 break;
 553         case 2:
 554                 data = *(u16 *) val;
 555                 break;
 556         case 1:
 557                 data = *(u8  *) val;
 558                 break;
 559         default:
 560                 printk(KERN_WARNING "ioapic: Unsupported size %d\n", len);
 561                 return 0;
 562         }
 563
 564         addr &= 0xff;
 565         spin_lock(&ioapic->lock);
 566         switch (addr) {
 567         case IOAPIC_REG_SELECT:
 568                 ioapic->ioregsel = data & 0xFF; /* 8-bit register */
 569                 break;
 570
 571         case IOAPIC_REG_WINDOW:
 572                 ioapic_write_indirect(ioapic, data);
 573                 break;
 574
 575         default:
 576                 break;
 577         }
 578         spin_unlock(&ioapic->lock);
 579         return 0;
 580 }
 581
 582 static void kvm_ioapic_reset(struct kvm_ioapic *ioapic)
 583 {
 584         int i;
 585
 586         cancel_delayed_work_sync(&ioapic->eoi_inject);
 587         for (i = 0; i < IOAPIC_NUM_PINS; i++)
 588                 ioapic->redirtbl[i].fields.mask = 1;
 589         ioapic->base_address = IOAPIC_DEFAULT_BASE_ADDRESS;
 590         ioapic->ioregsel = 0;
 591         ioapic->irr = 0;
 592         ioapic->irr_delivered = 0;
 593         ioapic->id = 0;
 594         memset(ioapic->irq_eoi, 0x00, sizeof(ioapic->irq_eoi));
 595         rtc_irq_eoi_tracking_reset(ioapic);
 596 }
 597
 598 static const struct kvm_io_device_ops ioapic_mmio_ops = {
 599         .read     = ioapic_mmio_read,
 600         .write    = ioapic_mmio_write,
 601 };
 602
 603 int kvm_ioapic_init(struct kvm *kvm)
 604 {
 605         struct kvm_ioapic *ioapic;
 606         int ret;
 607
 608         ioapic = kzalloc(sizeof(struct kvm_ioapic), GFP_KERNEL);
 609         if (!ioapic)
 610                 return -ENOMEM;
 611         spin_lock_init(&ioapic->lock);
 612         INIT_DELAYED_WORK(&ioapic->eoi_inject, kvm_ioapic_eoi_inject_work);
 613         kvm->arch.vioapic = ioapic;
 614         kvm_ioapic_reset(ioapic);
 615         kvm_iodevice_init(&ioapic->dev, &ioapic_mmio_ops);
 616         ioapic->kvm = kvm;
 617         mutex_lock(&kvm->slots_lock);
 618         ret = kvm_io_bus_register_dev(kvm, KVM_MMIO_BUS, ioapic->base_address,
 619                                       IOAPIC_MEM_LENGTH, &ioapic->dev);
 620         mutex_unlock(&kvm->slots_lock);
 621         if (ret < 0) {
 622                 kvm->arch.vioapic = NULL;
 623                 kfree(ioapic);
 624         }
 625
 626         return ret;
 627 }
 628
 629 void kvm_ioapic_destroy(struct kvm *kvm)
 630 {
 631         struct kvm_ioapic *ioapic = kvm->arch.vioapic;
 632
 633         if (!ioapic)
 634                 return;
 635
 636         cancel_delayed_work_sync(&ioapic->eoi_inject);
 637         mutex_lock(&kvm->slots_lock);
 638         kvm_io_bus_unregister_dev(kvm, KVM_MMIO_BUS, &ioapic->dev);
 639         mutex_unlock(&kvm->slots_lock);
 640         kvm->arch.vioapic = NULL;
 641         kfree(ioapic);
 642 }
 643
 644 void kvm_get_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state)
 645 {
 646         struct kvm_ioapic *ioapic = kvm->arch.vioapic;
 647
 648         spin_lock(&ioapic->lock);
 649         memcpy(state, ioapic, sizeof(struct kvm_ioapic_state));
 650         state->irr &= ~ioapic->irr_delivered;
 651         spin_unlock(&ioapic->lock);
 652 }
 653
 654 void kvm_set_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state)
 655 {
 656         struct kvm_ioapic *ioapic = kvm->arch.vioapic;
 657
 658         spin_lock(&ioapic->lock);
 659         memcpy(ioapic, state, sizeof(struct kvm_ioapic_state));
 660         ioapic->irr = 0;
 661         ioapic->irr_delivered = 0;
 662         kvm_make_scan_ioapic_request(kvm);
 663         kvm_ioapic_inject_all(ioapic, state->irr);
 664         spin_unlock(&ioapic->lock);
 665 }