1 // SPDX-License-Identifier: GPL-2.0-only
3 * Kernel-based Virtual Machine driver for Linux
4 * cpuid support routines
6 * derived from arch/x86/kvm/x86.c
8 * Copyright 2011 Red Hat, Inc. and/or its affiliates.
9 * Copyright IBM Corporation, 2008
12 #include <linux/kvm_host.h>
13 #include <linux/export.h>
14 #include <linux/vmalloc.h>
15 #include <linux/uaccess.h>
16 #include <linux/sched/stat.h>
18 #include <asm/processor.h>
20 #include <asm/fpu/xstate.h>
27 static u32 xstate_required_size(u64 xstate_bv, bool compacted)
30 u32 ret = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
32 xstate_bv &= XFEATURE_MASK_EXTEND;
34 if (xstate_bv & 0x1) {
35 u32 eax, ebx, ecx, edx, offset;
36 cpuid_count(0xD, feature_bit, &eax, &ebx, &ecx, &edx);
37 offset = compacted ? ret : ebx;
38 ret = max(ret, offset + eax);
48 bool kvm_mpx_supported(void)
50 return ((host_xcr0 & (XFEATURE_MASK_BNDREGS | XFEATURE_MASK_BNDCSR))
51 && kvm_x86_ops->mpx_supported());
53 EXPORT_SYMBOL_GPL(kvm_mpx_supported);
55 u64 kvm_supported_xcr0(void)
57 u64 xcr0 = KVM_SUPPORTED_XCR0 & host_xcr0;
59 if (!kvm_mpx_supported())
60 xcr0 &= ~(XFEATURE_MASK_BNDREGS | XFEATURE_MASK_BNDCSR);
67 int kvm_update_cpuid(struct kvm_vcpu *vcpu)
69 struct kvm_cpuid_entry2 *best;
70 struct kvm_lapic *apic = vcpu->arch.apic;
72 best = kvm_find_cpuid_entry(vcpu, 1, 0);
76 /* Update OSXSAVE bit */
77 if (boot_cpu_has(X86_FEATURE_XSAVE) && best->function == 0x1) {
78 best->ecx &= ~F(OSXSAVE);
79 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
80 best->ecx |= F(OSXSAVE);
83 best->edx &= ~F(APIC);
84 if (vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE)
88 if (best->ecx & F(TSC_DEADLINE_TIMER))
89 apic->lapic_timer.timer_mode_mask = 3 << 17;
91 apic->lapic_timer.timer_mode_mask = 1 << 17;
94 best = kvm_find_cpuid_entry(vcpu, 7, 0);
96 /* Update OSPKE bit */
97 if (boot_cpu_has(X86_FEATURE_PKU) && best->function == 0x7) {
98 best->ecx &= ~F(OSPKE);
99 if (kvm_read_cr4_bits(vcpu, X86_CR4_PKE))
100 best->ecx |= F(OSPKE);
104 best = kvm_find_cpuid_entry(vcpu, 0xD, 0);
106 vcpu->arch.guest_supported_xcr0 = 0;
107 vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
109 vcpu->arch.guest_supported_xcr0 =
110 (best->eax | ((u64)best->edx << 32)) &
111 kvm_supported_xcr0();
112 vcpu->arch.guest_xstate_size = best->ebx =
113 xstate_required_size(vcpu->arch.xcr0, false);
116 best = kvm_find_cpuid_entry(vcpu, 0xD, 1);
117 if (best && (best->eax & (F(XSAVES) | F(XSAVEC))))
118 best->ebx = xstate_required_size(vcpu->arch.xcr0, true);
121 * The existing code assumes virtual address is 48-bit or 57-bit in the
122 * canonical address checks; exit if it is ever changed.
124 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
126 int vaddr_bits = (best->eax & 0xff00) >> 8;
128 if (vaddr_bits != 48 && vaddr_bits != 57 && vaddr_bits != 0)
132 best = kvm_find_cpuid_entry(vcpu, KVM_CPUID_FEATURES, 0);
133 if (kvm_hlt_in_guest(vcpu->kvm) && best &&
134 (best->eax & (1 << KVM_FEATURE_PV_UNHALT)))
135 best->eax &= ~(1 << KVM_FEATURE_PV_UNHALT);
137 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT)) {
138 best = kvm_find_cpuid_entry(vcpu, 0x1, 0);
140 if (vcpu->arch.ia32_misc_enable_msr & MSR_IA32_MISC_ENABLE_MWAIT)
141 best->ecx |= F(MWAIT);
143 best->ecx &= ~F(MWAIT);
147 /* Update physical-address width */
148 vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
149 kvm_mmu_reset_context(vcpu);
151 kvm_pmu_refresh(vcpu);
155 static int is_efer_nx(void)
157 unsigned long long efer = 0;
159 rdmsrl_safe(MSR_EFER, &efer);
160 return efer & EFER_NX;
163 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
166 struct kvm_cpuid_entry2 *e, *entry;
169 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
170 e = &vcpu->arch.cpuid_entries[i];
171 if (e->function == 0x80000001) {
176 if (entry && (entry->edx & F(NX)) && !is_efer_nx()) {
177 entry->edx &= ~F(NX);
178 printk(KERN_INFO "kvm: guest NX capability removed\n");
182 int cpuid_query_maxphyaddr(struct kvm_vcpu *vcpu)
184 struct kvm_cpuid_entry2 *best;
186 best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
187 if (!best || best->eax < 0x80000008)
189 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
191 return best->eax & 0xff;
195 EXPORT_SYMBOL_GPL(cpuid_query_maxphyaddr);
197 /* when an old userspace process fills a new kernel module */
198 int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
199 struct kvm_cpuid *cpuid,
200 struct kvm_cpuid_entry __user *entries)
203 struct kvm_cpuid_entry *cpuid_entries = NULL;
206 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
211 vmalloc(array_size(sizeof(struct kvm_cpuid_entry),
216 if (copy_from_user(cpuid_entries, entries,
217 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
220 for (i = 0; i < cpuid->nent; i++) {
221 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
222 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
223 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
224 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
225 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
226 vcpu->arch.cpuid_entries[i].index = 0;
227 vcpu->arch.cpuid_entries[i].flags = 0;
228 vcpu->arch.cpuid_entries[i].padding[0] = 0;
229 vcpu->arch.cpuid_entries[i].padding[1] = 0;
230 vcpu->arch.cpuid_entries[i].padding[2] = 0;
232 vcpu->arch.cpuid_nent = cpuid->nent;
233 cpuid_fix_nx_cap(vcpu);
234 kvm_apic_set_version(vcpu);
235 kvm_x86_ops->cpuid_update(vcpu);
236 r = kvm_update_cpuid(vcpu);
239 vfree(cpuid_entries);
243 int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
244 struct kvm_cpuid2 *cpuid,
245 struct kvm_cpuid_entry2 __user *entries)
250 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
253 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
254 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
256 vcpu->arch.cpuid_nent = cpuid->nent;
257 kvm_apic_set_version(vcpu);
258 kvm_x86_ops->cpuid_update(vcpu);
259 r = kvm_update_cpuid(vcpu);
264 int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
265 struct kvm_cpuid2 *cpuid,
266 struct kvm_cpuid_entry2 __user *entries)
271 if (cpuid->nent < vcpu->arch.cpuid_nent)
274 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
275 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
280 cpuid->nent = vcpu->arch.cpuid_nent;
284 static __always_inline void cpuid_mask(u32 *word, int wordnum)
286 reverse_cpuid_check(wordnum);
287 *word &= boot_cpu_data.x86_capability[wordnum];
290 static void do_host_cpuid(struct kvm_cpuid_entry2 *entry, u32 function,
293 entry->function = function;
294 entry->index = index;
297 cpuid_count(entry->function, entry->index,
298 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
302 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
316 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
321 static int __do_cpuid_func_emulated(struct kvm_cpuid_entry2 *entry,
322 u32 func, int *nent, int maxnent)
324 entry->function = func;
334 entry->ecx = F(MOVBE);
338 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
340 entry->ecx = F(RDPID);
349 static inline void do_cpuid_7_mask(struct kvm_cpuid_entry2 *entry, int index)
351 unsigned f_invpcid = kvm_x86_ops->invpcid_supported() ? F(INVPCID) : 0;
352 unsigned f_mpx = kvm_mpx_supported() ? F(MPX) : 0;
353 unsigned f_umip = kvm_x86_ops->umip_emulated() ? F(UMIP) : 0;
354 unsigned f_intel_pt = kvm_x86_ops->pt_supported() ? F(INTEL_PT) : 0;
358 const u32 kvm_cpuid_7_0_ebx_x86_features =
359 F(FSGSBASE) | F(BMI1) | F(HLE) | F(AVX2) | F(SMEP) |
360 F(BMI2) | F(ERMS) | f_invpcid | F(RTM) | f_mpx | F(RDSEED) |
361 F(ADX) | F(SMAP) | F(AVX512IFMA) | F(AVX512F) | F(AVX512PF) |
362 F(AVX512ER) | F(AVX512CD) | F(CLFLUSHOPT) | F(CLWB) | F(AVX512DQ) |
363 F(SHA_NI) | F(AVX512BW) | F(AVX512VL) | f_intel_pt;
366 const u32 kvm_cpuid_7_0_ecx_x86_features =
367 F(AVX512VBMI) | F(LA57) | F(PKU) | 0 /*OSPKE*/ | F(RDPID) |
368 F(AVX512_VPOPCNTDQ) | F(UMIP) | F(AVX512_VBMI2) | F(GFNI) |
369 F(VAES) | F(VPCLMULQDQ) | F(AVX512_VNNI) | F(AVX512_BITALG) |
370 F(CLDEMOTE) | F(MOVDIRI) | F(MOVDIR64B) | 0 /*WAITPKG*/;
373 const u32 kvm_cpuid_7_0_edx_x86_features =
374 F(AVX512_4VNNIW) | F(AVX512_4FMAPS) | F(SPEC_CTRL) |
375 F(SPEC_CTRL_SSBD) | F(ARCH_CAPABILITIES) | F(INTEL_STIBP) |
379 const u32 kvm_cpuid_7_1_eax_x86_features =
384 entry->eax = min(entry->eax, 1u);
385 entry->ebx &= kvm_cpuid_7_0_ebx_x86_features;
386 cpuid_mask(&entry->ebx, CPUID_7_0_EBX);
387 /* TSC_ADJUST is emulated */
388 entry->ebx |= F(TSC_ADJUST);
390 entry->ecx &= kvm_cpuid_7_0_ecx_x86_features;
391 f_la57 = entry->ecx & F(LA57);
392 cpuid_mask(&entry->ecx, CPUID_7_ECX);
393 /* Set LA57 based on hardware capability. */
394 entry->ecx |= f_la57;
395 entry->ecx |= f_umip;
396 /* PKU is not yet implemented for shadow paging. */
397 if (!tdp_enabled || !boot_cpu_has(X86_FEATURE_OSPKE))
398 entry->ecx &= ~F(PKU);
400 entry->edx &= kvm_cpuid_7_0_edx_x86_features;
401 cpuid_mask(&entry->edx, CPUID_7_EDX);
402 if (boot_cpu_has(X86_FEATURE_IBPB) && boot_cpu_has(X86_FEATURE_IBRS))
403 entry->edx |= F(SPEC_CTRL);
404 if (boot_cpu_has(X86_FEATURE_STIBP))
405 entry->edx |= F(INTEL_STIBP);
406 if (boot_cpu_has(X86_FEATURE_SPEC_CTRL_SSBD) ||
407 boot_cpu_has(X86_FEATURE_AMD_SSBD))
408 entry->edx |= F(SPEC_CTRL_SSBD);
410 * We emulate ARCH_CAPABILITIES in software even
411 * if the host doesn't support it.
413 entry->edx |= F(ARCH_CAPABILITIES);
416 entry->eax &= kvm_cpuid_7_1_eax_x86_features;
431 static inline int __do_cpuid_func(struct kvm_cpuid_entry2 *entry, u32 function,
432 int *nent, int maxnent)
435 unsigned f_nx = is_efer_nx() ? F(NX) : 0;
437 unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
439 unsigned f_lm = F(LM);
441 unsigned f_gbpages = 0;
444 unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
445 unsigned f_xsaves = kvm_x86_ops->xsaves_supported() ? F(XSAVES) : 0;
446 unsigned f_intel_pt = kvm_x86_ops->pt_supported() ? F(INTEL_PT) : 0;
449 const u32 kvm_cpuid_1_edx_x86_features =
450 F(FPU) | F(VME) | F(DE) | F(PSE) |
451 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
452 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
453 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
454 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLUSH) |
455 0 /* Reserved, DS, ACPI */ | F(MMX) |
456 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
457 0 /* HTT, TM, Reserved, PBE */;
458 /* cpuid 0x80000001.edx */
459 const u32 kvm_cpuid_8000_0001_edx_x86_features =
460 F(FPU) | F(VME) | F(DE) | F(PSE) |
461 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
462 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
463 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
464 F(PAT) | F(PSE36) | 0 /* Reserved */ |
465 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
466 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
467 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
469 const u32 kvm_cpuid_1_ecx_x86_features =
470 /* NOTE: MONITOR (and MWAIT) are emulated as NOP,
471 * but *not* advertised to guests via CPUID ! */
472 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
473 0 /* DS-CPL, VMX, SMX, EST */ |
474 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
475 F(FMA) | F(CX16) | 0 /* xTPR Update, PDCM */ |
476 F(PCID) | 0 /* Reserved, DCA */ | F(XMM4_1) |
477 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
478 0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
480 /* cpuid 0x80000001.ecx */
481 const u32 kvm_cpuid_8000_0001_ecx_x86_features =
482 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
483 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
484 F(3DNOWPREFETCH) | F(OSVW) | 0 /* IBS */ | F(XOP) |
485 0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM) |
486 F(TOPOEXT) | F(PERFCTR_CORE);
488 /* cpuid 0x80000008.ebx */
489 const u32 kvm_cpuid_8000_0008_ebx_x86_features =
490 F(CLZERO) | F(XSAVEERPTR) |
491 F(WBNOINVD) | F(AMD_IBPB) | F(AMD_IBRS) | F(AMD_SSBD) | F(VIRT_SSBD) |
492 F(AMD_SSB_NO) | F(AMD_STIBP) | F(AMD_STIBP_ALWAYS_ON);
494 /* cpuid 0xC0000001.edx */
495 const u32 kvm_cpuid_C000_0001_edx_x86_features =
496 F(XSTORE) | F(XSTORE_EN) | F(XCRYPT) | F(XCRYPT_EN) |
497 F(ACE2) | F(ACE2_EN) | F(PHE) | F(PHE_EN) |
500 /* cpuid 0xD.1.eax */
501 const u32 kvm_cpuid_D_1_eax_x86_features =
502 F(XSAVEOPT) | F(XSAVEC) | F(XGETBV1) | f_xsaves;
504 /* all calls to cpuid_count() should be made on the same cpu */
509 if (WARN_ON(*nent >= maxnent))
512 do_host_cpuid(entry, function, 0);
517 /* Limited to the highest leaf implemented in KVM. */
518 entry->eax = min(entry->eax, 0x1fU);
521 entry->edx &= kvm_cpuid_1_edx_x86_features;
522 cpuid_mask(&entry->edx, CPUID_1_EDX);
523 entry->ecx &= kvm_cpuid_1_ecx_x86_features;
524 cpuid_mask(&entry->ecx, CPUID_1_ECX);
525 /* we support x2apic emulation even if host does not support
526 * it since we emulate x2apic in software */
527 entry->ecx |= F(X2APIC);
529 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
530 * may return different values. This forces us to get_cpu() before
531 * issuing the first command, and also to emulate this annoying behavior
532 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
534 int t, times = entry->eax & 0xff;
536 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
537 for (t = 1; t < times; ++t) {
538 if (*nent >= maxnent)
541 do_host_cpuid(&entry[t], function, 0);
546 /* functions 4 and 0x8000001d have additional index. */
551 /* read more entries until cache_type is zero */
553 if (*nent >= maxnent)
556 cache_type = entry[i - 1].eax & 0x1f;
559 do_host_cpuid(&entry[i], function, i);
564 case 6: /* Thermal management */
565 entry->eax = 0x4; /* allow ARAT */
570 /* function 7 has additional index. */
575 do_cpuid_7_mask(&entry[i], i);
578 if (*nent >= maxnent)
582 do_host_cpuid(&entry[i], function, i);
589 case 0xa: { /* Architectural Performance Monitoring */
590 struct x86_pmu_capability cap;
591 union cpuid10_eax eax;
592 union cpuid10_edx edx;
594 perf_get_x86_pmu_capability(&cap);
597 * Only support guest architectural pmu on a host
598 * with architectural pmu.
601 memset(&cap, 0, sizeof(cap));
603 eax.split.version_id = min(cap.version, 2);
604 eax.split.num_counters = cap.num_counters_gp;
605 eax.split.bit_width = cap.bit_width_gp;
606 eax.split.mask_length = cap.events_mask_len;
608 edx.split.num_counters_fixed = cap.num_counters_fixed;
609 edx.split.bit_width_fixed = cap.bit_width_fixed;
610 edx.split.reserved = 0;
612 entry->eax = eax.full;
613 entry->ebx = cap.events_mask;
615 entry->edx = edx.full;
619 * Per Intel's SDM, the 0x1f is a superset of 0xb,
620 * thus they can be handled by common code.
627 * We filled in entry[0] for CPUID(EAX=<function>,
628 * ECX=00H) above. If its level type (ECX[15:8]) is
629 * zero, then the leaf is unimplemented, and we're
630 * done. Otherwise, continue to populate entries
631 * until the level type (ECX[15:8]) of the previously
632 * added entry is zero.
634 for (i = 1; entry[i - 1].ecx & 0xff00; ++i) {
635 if (*nent >= maxnent)
638 do_host_cpuid(&entry[i], function, i);
645 u64 supported = kvm_supported_xcr0();
647 entry->eax &= supported;
648 entry->ebx = xstate_required_size(supported, false);
649 entry->ecx = entry->ebx;
650 entry->edx &= supported >> 32;
654 for (idx = 1, i = 1; idx < 64; ++idx) {
655 u64 mask = ((u64)1 << idx);
656 if (*nent >= maxnent)
659 do_host_cpuid(&entry[i], function, idx);
661 entry[i].eax &= kvm_cpuid_D_1_eax_x86_features;
662 cpuid_mask(&entry[i].eax, CPUID_D_1_EAX);
664 if (entry[i].eax & (F(XSAVES)|F(XSAVEC)))
666 xstate_required_size(supported,
669 if (entry[i].eax == 0 || !(supported & mask))
671 if (WARN_ON_ONCE(entry[i].ecx & 1))
683 int t, times = entry->eax;
688 for (t = 1; t <= times; ++t) {
689 if (*nent >= maxnent)
691 do_host_cpuid(&entry[t], function, t);
696 case KVM_CPUID_SIGNATURE: {
697 static const char signature[12] = "KVMKVMKVM\0\0";
698 const u32 *sigptr = (const u32 *)signature;
699 entry->eax = KVM_CPUID_FEATURES;
700 entry->ebx = sigptr[0];
701 entry->ecx = sigptr[1];
702 entry->edx = sigptr[2];
705 case KVM_CPUID_FEATURES:
706 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
707 (1 << KVM_FEATURE_NOP_IO_DELAY) |
708 (1 << KVM_FEATURE_CLOCKSOURCE2) |
709 (1 << KVM_FEATURE_ASYNC_PF) |
710 (1 << KVM_FEATURE_PV_EOI) |
711 (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT) |
712 (1 << KVM_FEATURE_PV_UNHALT) |
713 (1 << KVM_FEATURE_PV_TLB_FLUSH) |
714 (1 << KVM_FEATURE_ASYNC_PF_VMEXIT) |
715 (1 << KVM_FEATURE_PV_SEND_IPI) |
716 (1 << KVM_FEATURE_POLL_CONTROL) |
717 (1 << KVM_FEATURE_PV_SCHED_YIELD);
720 entry->eax |= (1 << KVM_FEATURE_STEAL_TIME);
727 entry->eax = min(entry->eax, 0x8000001f);
730 entry->edx &= kvm_cpuid_8000_0001_edx_x86_features;
731 cpuid_mask(&entry->edx, CPUID_8000_0001_EDX);
732 entry->ecx &= kvm_cpuid_8000_0001_ecx_x86_features;
733 cpuid_mask(&entry->ecx, CPUID_8000_0001_ECX);
735 case 0x80000007: /* Advanced power management */
736 /* invariant TSC is CPUID.80000007H:EDX[8] */
737 entry->edx &= (1 << 8);
738 /* mask against host */
739 entry->edx &= boot_cpu_data.x86_power;
740 entry->eax = entry->ebx = entry->ecx = 0;
743 unsigned g_phys_as = (entry->eax >> 16) & 0xff;
744 unsigned virt_as = max((entry->eax >> 8) & 0xff, 48U);
745 unsigned phys_as = entry->eax & 0xff;
749 entry->eax = g_phys_as | (virt_as << 8);
751 entry->ebx &= kvm_cpuid_8000_0008_ebx_x86_features;
752 cpuid_mask(&entry->ebx, CPUID_8000_0008_EBX);
754 * AMD has separate bits for each SPEC_CTRL bit.
755 * arch/x86/kernel/cpu/bugs.c is kind enough to
756 * record that in cpufeatures so use them.
758 if (boot_cpu_has(X86_FEATURE_IBPB))
759 entry->ebx |= F(AMD_IBPB);
760 if (boot_cpu_has(X86_FEATURE_IBRS))
761 entry->ebx |= F(AMD_IBRS);
762 if (boot_cpu_has(X86_FEATURE_STIBP))
763 entry->ebx |= F(AMD_STIBP);
764 if (boot_cpu_has(X86_FEATURE_SPEC_CTRL_SSBD) ||
765 boot_cpu_has(X86_FEATURE_AMD_SSBD))
766 entry->ebx |= F(AMD_SSBD);
767 if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
768 entry->ebx |= F(AMD_SSB_NO);
770 * The preference is to use SPEC CTRL MSR instead of the
773 if (boot_cpu_has(X86_FEATURE_LS_CFG_SSBD) &&
774 !boot_cpu_has(X86_FEATURE_AMD_SSBD))
775 entry->ebx |= F(VIRT_SSBD);
779 entry->ecx = entry->edx = 0;
784 /* Support memory encryption cpuid if host supports it */
786 if (!boot_cpu_has(X86_FEATURE_SEV))
787 entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
789 /*Add support for Centaur's CPUID instruction*/
791 /*Just support up to 0xC0000004 now*/
792 entry->eax = min(entry->eax, 0xC0000004);
795 entry->edx &= kvm_cpuid_C000_0001_edx_x86_features;
796 cpuid_mask(&entry->edx, CPUID_C000_0001_EDX);
798 case 3: /* Processor serial number */
799 case 5: /* MONITOR/MWAIT */
804 entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
808 kvm_x86_ops->set_supported_cpuid(function, entry);
818 static int do_cpuid_func(struct kvm_cpuid_entry2 *entry, u32 func,
819 int *nent, int maxnent, unsigned int type)
821 if (*nent >= maxnent)
824 if (type == KVM_GET_EMULATED_CPUID)
825 return __do_cpuid_func_emulated(entry, func, nent, maxnent);
827 return __do_cpuid_func(entry, func, nent, maxnent);
830 struct kvm_cpuid_param {
832 bool (*qualifier)(const struct kvm_cpuid_param *param);
835 static bool is_centaur_cpu(const struct kvm_cpuid_param *param)
837 return boot_cpu_data.x86_vendor == X86_VENDOR_CENTAUR;
840 static bool sanity_check_entries(struct kvm_cpuid_entry2 __user *entries,
841 __u32 num_entries, unsigned int ioctl_type)
846 if (ioctl_type != KVM_GET_EMULATED_CPUID)
850 * We want to make sure that ->padding is being passed clean from
851 * userspace in case we want to use it for something in the future.
853 * Sadly, this wasn't enforced for KVM_GET_SUPPORTED_CPUID and so we
854 * have to give ourselves satisfied only with the emulated side. /me
857 for (i = 0; i < num_entries; i++) {
858 if (copy_from_user(pad, entries[i].padding, sizeof(pad)))
861 if (pad[0] || pad[1] || pad[2])
867 int kvm_dev_ioctl_get_cpuid(struct kvm_cpuid2 *cpuid,
868 struct kvm_cpuid_entry2 __user *entries,
871 struct kvm_cpuid_entry2 *cpuid_entries;
872 int limit, nent = 0, r = -E2BIG, i;
874 static const struct kvm_cpuid_param param[] = {
876 { .func = 0x80000000 },
877 { .func = 0xC0000000, .qualifier = is_centaur_cpu },
878 { .func = KVM_CPUID_SIGNATURE },
883 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
884 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
886 if (sanity_check_entries(entries, cpuid->nent, type))
890 cpuid_entries = vzalloc(array_size(sizeof(struct kvm_cpuid_entry2),
896 for (i = 0; i < ARRAY_SIZE(param); i++) {
897 const struct kvm_cpuid_param *ent = ¶m[i];
899 if (ent->qualifier && !ent->qualifier(ent))
902 r = do_cpuid_func(&cpuid_entries[nent], ent->func,
903 &nent, cpuid->nent, type);
908 limit = cpuid_entries[nent - 1].eax;
909 for (func = ent->func + 1; func <= limit && nent < cpuid->nent && r == 0; ++func)
910 r = do_cpuid_func(&cpuid_entries[nent], func,
911 &nent, cpuid->nent, type);
918 if (copy_to_user(entries, cpuid_entries,
919 nent * sizeof(struct kvm_cpuid_entry2)))
925 vfree(cpuid_entries);
930 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
932 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
933 struct kvm_cpuid_entry2 *ej;
935 int nent = vcpu->arch.cpuid_nent;
937 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
938 /* when no next entry is found, the current entry[i] is reselected */
941 ej = &vcpu->arch.cpuid_entries[j];
942 } while (ej->function != e->function);
944 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
949 /* find an entry with matching function, matching index (if needed), and that
950 * should be read next (if it's stateful) */
951 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
952 u32 function, u32 index)
954 if (e->function != function)
956 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
958 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
959 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
964 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
965 u32 function, u32 index)
968 struct kvm_cpuid_entry2 *best = NULL;
970 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
971 struct kvm_cpuid_entry2 *e;
973 e = &vcpu->arch.cpuid_entries[i];
974 if (is_matching_cpuid_entry(e, function, index)) {
975 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
976 move_to_next_stateful_cpuid_entry(vcpu, i);
983 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
986 * If the basic or extended CPUID leaf requested is higher than the
987 * maximum supported basic or extended leaf, respectively, then it is
990 static bool cpuid_function_in_range(struct kvm_vcpu *vcpu, u32 function)
992 struct kvm_cpuid_entry2 *max;
994 max = kvm_find_cpuid_entry(vcpu, function & 0x80000000, 0);
995 return max && function <= max->eax;
998 bool kvm_cpuid(struct kvm_vcpu *vcpu, u32 *eax, u32 *ebx,
999 u32 *ecx, u32 *edx, bool check_limit)
1001 u32 function = *eax, index = *ecx;
1002 struct kvm_cpuid_entry2 *entry;
1003 struct kvm_cpuid_entry2 *max;
1006 entry = kvm_find_cpuid_entry(vcpu, function, index);
1009 * Intel CPUID semantics treats any query for an out-of-range
1010 * leaf as if the highest basic leaf (i.e. CPUID.0H:EAX) were
1011 * requested. AMD CPUID semantics returns all zeroes for any
1012 * undefined leaf, whether or not the leaf is in range.
1014 if (!entry && check_limit && !guest_cpuid_is_amd(vcpu) &&
1015 !cpuid_function_in_range(vcpu, function)) {
1016 max = kvm_find_cpuid_entry(vcpu, 0, 0);
1018 function = max->eax;
1019 entry = kvm_find_cpuid_entry(vcpu, function, index);
1027 if (function == 7 && index == 0) {
1029 if (!__kvm_get_msr(vcpu, MSR_IA32_TSX_CTRL, &data, true) &&
1030 (data & TSX_CTRL_CPUID_CLEAR))
1031 *ebx &= ~(F(RTM) | F(HLE));
1034 *eax = *ebx = *ecx = *edx = 0;
1036 * When leaf 0BH or 1FH is defined, CL is pass-through
1037 * and EDX is always the x2APIC ID, even for undefined
1038 * subleaves. Index 1 will exist iff the leaf is
1039 * implemented, so we pass through CL iff leaf 1
1040 * exists. EDX can be copied from any existing index.
1042 if (function == 0xb || function == 0x1f) {
1043 entry = kvm_find_cpuid_entry(vcpu, function, 1);
1045 *ecx = index & 0xff;
1050 trace_kvm_cpuid(function, *eax, *ebx, *ecx, *edx, found);
1053 EXPORT_SYMBOL_GPL(kvm_cpuid);
1055 int kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
1057 u32 eax, ebx, ecx, edx;
1059 if (cpuid_fault_enabled(vcpu) && !kvm_require_cpl(vcpu, 0))
1062 eax = kvm_rax_read(vcpu);
1063 ecx = kvm_rcx_read(vcpu);
1064 kvm_cpuid(vcpu, &eax, &ebx, &ecx, &edx, true);
1065 kvm_rax_write(vcpu, eax);
1066 kvm_rbx_write(vcpu, ebx);
1067 kvm_rcx_write(vcpu, ecx);
1068 kvm_rdx_write(vcpu, edx);
1069 return kvm_skip_emulated_instruction(vcpu);
1071 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);