KVM: x86: Refactor and rename bit() to feature_bit() macro
[linux-2.6-microblaze.git] / arch / x86 / kvm / cpuid.c
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Kernel-based Virtual Machine driver for Linux
4  * cpuid support routines
5  *
6  * derived from arch/x86/kvm/x86.c
7  *
8  * Copyright 2011 Red Hat, Inc. and/or its affiliates.
9  * Copyright IBM Corporation, 2008
10  */
11
12 #include <linux/kvm_host.h>
13 #include <linux/export.h>
14 #include <linux/vmalloc.h>
15 #include <linux/uaccess.h>
16 #include <linux/sched/stat.h>
17
18 #include <asm/processor.h>
19 #include <asm/user.h>
20 #include <asm/fpu/xstate.h>
21 #include "cpuid.h"
22 #include "lapic.h"
23 #include "mmu.h"
24 #include "trace.h"
25 #include "pmu.h"
26
27 static u32 xstate_required_size(u64 xstate_bv, bool compacted)
28 {
29         int feature_bit = 0;
30         u32 ret = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
31
32         xstate_bv &= XFEATURE_MASK_EXTEND;
33         while (xstate_bv) {
34                 if (xstate_bv & 0x1) {
35                         u32 eax, ebx, ecx, edx, offset;
36                         cpuid_count(0xD, feature_bit, &eax, &ebx, &ecx, &edx);
37                         offset = compacted ? ret : ebx;
38                         ret = max(ret, offset + eax);
39                 }
40
41                 xstate_bv >>= 1;
42                 feature_bit++;
43         }
44
45         return ret;
46 }
47
48 bool kvm_mpx_supported(void)
49 {
50         return ((host_xcr0 & (XFEATURE_MASK_BNDREGS | XFEATURE_MASK_BNDCSR))
51                  && kvm_x86_ops->mpx_supported());
52 }
53 EXPORT_SYMBOL_GPL(kvm_mpx_supported);
54
55 u64 kvm_supported_xcr0(void)
56 {
57         u64 xcr0 = KVM_SUPPORTED_XCR0 & host_xcr0;
58
59         if (!kvm_mpx_supported())
60                 xcr0 &= ~(XFEATURE_MASK_BNDREGS | XFEATURE_MASK_BNDCSR);
61
62         return xcr0;
63 }
64
65 #define F feature_bit
66
67 int kvm_update_cpuid(struct kvm_vcpu *vcpu)
68 {
69         struct kvm_cpuid_entry2 *best;
70         struct kvm_lapic *apic = vcpu->arch.apic;
71
72         best = kvm_find_cpuid_entry(vcpu, 1, 0);
73         if (!best)
74                 return 0;
75
76         /* Update OSXSAVE bit */
77         if (boot_cpu_has(X86_FEATURE_XSAVE) && best->function == 0x1) {
78                 best->ecx &= ~F(OSXSAVE);
79                 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
80                         best->ecx |= F(OSXSAVE);
81         }
82
83         best->edx &= ~F(APIC);
84         if (vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE)
85                 best->edx |= F(APIC);
86
87         if (apic) {
88                 if (best->ecx & F(TSC_DEADLINE_TIMER))
89                         apic->lapic_timer.timer_mode_mask = 3 << 17;
90                 else
91                         apic->lapic_timer.timer_mode_mask = 1 << 17;
92         }
93
94         best = kvm_find_cpuid_entry(vcpu, 7, 0);
95         if (best) {
96                 /* Update OSPKE bit */
97                 if (boot_cpu_has(X86_FEATURE_PKU) && best->function == 0x7) {
98                         best->ecx &= ~F(OSPKE);
99                         if (kvm_read_cr4_bits(vcpu, X86_CR4_PKE))
100                                 best->ecx |= F(OSPKE);
101                 }
102         }
103
104         best = kvm_find_cpuid_entry(vcpu, 0xD, 0);
105         if (!best) {
106                 vcpu->arch.guest_supported_xcr0 = 0;
107                 vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
108         } else {
109                 vcpu->arch.guest_supported_xcr0 =
110                         (best->eax | ((u64)best->edx << 32)) &
111                         kvm_supported_xcr0();
112                 vcpu->arch.guest_xstate_size = best->ebx =
113                         xstate_required_size(vcpu->arch.xcr0, false);
114         }
115
116         best = kvm_find_cpuid_entry(vcpu, 0xD, 1);
117         if (best && (best->eax & (F(XSAVES) | F(XSAVEC))))
118                 best->ebx = xstate_required_size(vcpu->arch.xcr0, true);
119
120         /*
121          * The existing code assumes virtual address is 48-bit or 57-bit in the
122          * canonical address checks; exit if it is ever changed.
123          */
124         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
125         if (best) {
126                 int vaddr_bits = (best->eax & 0xff00) >> 8;
127
128                 if (vaddr_bits != 48 && vaddr_bits != 57 && vaddr_bits != 0)
129                         return -EINVAL;
130         }
131
132         best = kvm_find_cpuid_entry(vcpu, KVM_CPUID_FEATURES, 0);
133         if (kvm_hlt_in_guest(vcpu->kvm) && best &&
134                 (best->eax & (1 << KVM_FEATURE_PV_UNHALT)))
135                 best->eax &= ~(1 << KVM_FEATURE_PV_UNHALT);
136
137         if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT)) {
138                 best = kvm_find_cpuid_entry(vcpu, 0x1, 0);
139                 if (best) {
140                         if (vcpu->arch.ia32_misc_enable_msr & MSR_IA32_MISC_ENABLE_MWAIT)
141                                 best->ecx |= F(MWAIT);
142                         else
143                                 best->ecx &= ~F(MWAIT);
144                 }
145         }
146
147         /* Update physical-address width */
148         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
149         kvm_mmu_reset_context(vcpu);
150
151         kvm_pmu_refresh(vcpu);
152         return 0;
153 }
154
155 static int is_efer_nx(void)
156 {
157         unsigned long long efer = 0;
158
159         rdmsrl_safe(MSR_EFER, &efer);
160         return efer & EFER_NX;
161 }
162
163 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
164 {
165         int i;
166         struct kvm_cpuid_entry2 *e, *entry;
167
168         entry = NULL;
169         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
170                 e = &vcpu->arch.cpuid_entries[i];
171                 if (e->function == 0x80000001) {
172                         entry = e;
173                         break;
174                 }
175         }
176         if (entry && (entry->edx & F(NX)) && !is_efer_nx()) {
177                 entry->edx &= ~F(NX);
178                 printk(KERN_INFO "kvm: guest NX capability removed\n");
179         }
180 }
181
182 int cpuid_query_maxphyaddr(struct kvm_vcpu *vcpu)
183 {
184         struct kvm_cpuid_entry2 *best;
185
186         best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
187         if (!best || best->eax < 0x80000008)
188                 goto not_found;
189         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
190         if (best)
191                 return best->eax & 0xff;
192 not_found:
193         return 36;
194 }
195 EXPORT_SYMBOL_GPL(cpuid_query_maxphyaddr);
196
197 /* when an old userspace process fills a new kernel module */
198 int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
199                              struct kvm_cpuid *cpuid,
200                              struct kvm_cpuid_entry __user *entries)
201 {
202         int r, i;
203         struct kvm_cpuid_entry *cpuid_entries = NULL;
204
205         r = -E2BIG;
206         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
207                 goto out;
208         r = -ENOMEM;
209         if (cpuid->nent) {
210                 cpuid_entries =
211                         vmalloc(array_size(sizeof(struct kvm_cpuid_entry),
212                                            cpuid->nent));
213                 if (!cpuid_entries)
214                         goto out;
215                 r = -EFAULT;
216                 if (copy_from_user(cpuid_entries, entries,
217                                    cpuid->nent * sizeof(struct kvm_cpuid_entry)))
218                         goto out;
219         }
220         for (i = 0; i < cpuid->nent; i++) {
221                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
222                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
223                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
224                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
225                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
226                 vcpu->arch.cpuid_entries[i].index = 0;
227                 vcpu->arch.cpuid_entries[i].flags = 0;
228                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
229                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
230                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
231         }
232         vcpu->arch.cpuid_nent = cpuid->nent;
233         cpuid_fix_nx_cap(vcpu);
234         kvm_apic_set_version(vcpu);
235         kvm_x86_ops->cpuid_update(vcpu);
236         r = kvm_update_cpuid(vcpu);
237
238 out:
239         vfree(cpuid_entries);
240         return r;
241 }
242
243 int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
244                               struct kvm_cpuid2 *cpuid,
245                               struct kvm_cpuid_entry2 __user *entries)
246 {
247         int r;
248
249         r = -E2BIG;
250         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
251                 goto out;
252         r = -EFAULT;
253         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
254                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
255                 goto out;
256         vcpu->arch.cpuid_nent = cpuid->nent;
257         kvm_apic_set_version(vcpu);
258         kvm_x86_ops->cpuid_update(vcpu);
259         r = kvm_update_cpuid(vcpu);
260 out:
261         return r;
262 }
263
264 int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
265                               struct kvm_cpuid2 *cpuid,
266                               struct kvm_cpuid_entry2 __user *entries)
267 {
268         int r;
269
270         r = -E2BIG;
271         if (cpuid->nent < vcpu->arch.cpuid_nent)
272                 goto out;
273         r = -EFAULT;
274         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
275                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
276                 goto out;
277         return 0;
278
279 out:
280         cpuid->nent = vcpu->arch.cpuid_nent;
281         return r;
282 }
283
284 static __always_inline void cpuid_mask(u32 *word, int wordnum)
285 {
286         reverse_cpuid_check(wordnum);
287         *word &= boot_cpu_data.x86_capability[wordnum];
288 }
289
290 static void do_host_cpuid(struct kvm_cpuid_entry2 *entry, u32 function,
291                            u32 index)
292 {
293         entry->function = function;
294         entry->index = index;
295         entry->flags = 0;
296
297         cpuid_count(entry->function, entry->index,
298                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
299
300         switch (function) {
301         case 2:
302                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
303                 break;
304         case 4:
305         case 7:
306         case 0xb:
307         case 0xd:
308         case 0xf:
309         case 0x10:
310         case 0x12:
311         case 0x14:
312         case 0x17:
313         case 0x18:
314         case 0x1f:
315         case 0x8000001d:
316                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
317                 break;
318         }
319 }
320
321 static int __do_cpuid_func_emulated(struct kvm_cpuid_entry2 *entry,
322                                     u32 func, int *nent, int maxnent)
323 {
324         entry->function = func;
325         entry->index = 0;
326         entry->flags = 0;
327
328         switch (func) {
329         case 0:
330                 entry->eax = 7;
331                 ++*nent;
332                 break;
333         case 1:
334                 entry->ecx = F(MOVBE);
335                 ++*nent;
336                 break;
337         case 7:
338                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
339                 entry->eax = 0;
340                 entry->ecx = F(RDPID);
341                 ++*nent;
342         default:
343                 break;
344         }
345
346         return 0;
347 }
348
349 static inline void do_cpuid_7_mask(struct kvm_cpuid_entry2 *entry, int index)
350 {
351         unsigned f_invpcid = kvm_x86_ops->invpcid_supported() ? F(INVPCID) : 0;
352         unsigned f_mpx = kvm_mpx_supported() ? F(MPX) : 0;
353         unsigned f_umip = kvm_x86_ops->umip_emulated() ? F(UMIP) : 0;
354         unsigned f_intel_pt = kvm_x86_ops->pt_supported() ? F(INTEL_PT) : 0;
355         unsigned f_la57;
356
357         /* cpuid 7.0.ebx */
358         const u32 kvm_cpuid_7_0_ebx_x86_features =
359                 F(FSGSBASE) | F(BMI1) | F(HLE) | F(AVX2) | F(SMEP) |
360                 F(BMI2) | F(ERMS) | f_invpcid | F(RTM) | f_mpx | F(RDSEED) |
361                 F(ADX) | F(SMAP) | F(AVX512IFMA) | F(AVX512F) | F(AVX512PF) |
362                 F(AVX512ER) | F(AVX512CD) | F(CLFLUSHOPT) | F(CLWB) | F(AVX512DQ) |
363                 F(SHA_NI) | F(AVX512BW) | F(AVX512VL) | f_intel_pt;
364
365         /* cpuid 7.0.ecx*/
366         const u32 kvm_cpuid_7_0_ecx_x86_features =
367                 F(AVX512VBMI) | F(LA57) | F(PKU) | 0 /*OSPKE*/ | F(RDPID) |
368                 F(AVX512_VPOPCNTDQ) | F(UMIP) | F(AVX512_VBMI2) | F(GFNI) |
369                 F(VAES) | F(VPCLMULQDQ) | F(AVX512_VNNI) | F(AVX512_BITALG) |
370                 F(CLDEMOTE) | F(MOVDIRI) | F(MOVDIR64B) | 0 /*WAITPKG*/;
371
372         /* cpuid 7.0.edx*/
373         const u32 kvm_cpuid_7_0_edx_x86_features =
374                 F(AVX512_4VNNIW) | F(AVX512_4FMAPS) | F(SPEC_CTRL) |
375                 F(SPEC_CTRL_SSBD) | F(ARCH_CAPABILITIES) | F(INTEL_STIBP) |
376                 F(MD_CLEAR);
377
378         /* cpuid 7.1.eax */
379         const u32 kvm_cpuid_7_1_eax_x86_features =
380                 F(AVX512_BF16);
381
382         switch (index) {
383         case 0:
384                 entry->eax = min(entry->eax, 1u);
385                 entry->ebx &= kvm_cpuid_7_0_ebx_x86_features;
386                 cpuid_mask(&entry->ebx, CPUID_7_0_EBX);
387                 /* TSC_ADJUST is emulated */
388                 entry->ebx |= F(TSC_ADJUST);
389
390                 entry->ecx &= kvm_cpuid_7_0_ecx_x86_features;
391                 f_la57 = entry->ecx & F(LA57);
392                 cpuid_mask(&entry->ecx, CPUID_7_ECX);
393                 /* Set LA57 based on hardware capability. */
394                 entry->ecx |= f_la57;
395                 entry->ecx |= f_umip;
396                 /* PKU is not yet implemented for shadow paging. */
397                 if (!tdp_enabled || !boot_cpu_has(X86_FEATURE_OSPKE))
398                         entry->ecx &= ~F(PKU);
399
400                 entry->edx &= kvm_cpuid_7_0_edx_x86_features;
401                 cpuid_mask(&entry->edx, CPUID_7_EDX);
402                 if (boot_cpu_has(X86_FEATURE_IBPB) && boot_cpu_has(X86_FEATURE_IBRS))
403                         entry->edx |= F(SPEC_CTRL);
404                 if (boot_cpu_has(X86_FEATURE_STIBP))
405                         entry->edx |= F(INTEL_STIBP);
406                 if (boot_cpu_has(X86_FEATURE_SPEC_CTRL_SSBD) ||
407                     boot_cpu_has(X86_FEATURE_AMD_SSBD))
408                         entry->edx |= F(SPEC_CTRL_SSBD);
409                 /*
410                  * We emulate ARCH_CAPABILITIES in software even
411                  * if the host doesn't support it.
412                  */
413                 entry->edx |= F(ARCH_CAPABILITIES);
414                 break;
415         case 1:
416                 entry->eax &= kvm_cpuid_7_1_eax_x86_features;
417                 entry->ebx = 0;
418                 entry->ecx = 0;
419                 entry->edx = 0;
420                 break;
421         default:
422                 WARN_ON_ONCE(1);
423                 entry->eax = 0;
424                 entry->ebx = 0;
425                 entry->ecx = 0;
426                 entry->edx = 0;
427                 break;
428         }
429 }
430
431 static inline int __do_cpuid_func(struct kvm_cpuid_entry2 *entry, u32 function,
432                                   int *nent, int maxnent)
433 {
434         int r;
435         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
436 #ifdef CONFIG_X86_64
437         unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
438                                 ? F(GBPAGES) : 0;
439         unsigned f_lm = F(LM);
440 #else
441         unsigned f_gbpages = 0;
442         unsigned f_lm = 0;
443 #endif
444         unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
445         unsigned f_xsaves = kvm_x86_ops->xsaves_supported() ? F(XSAVES) : 0;
446         unsigned f_intel_pt = kvm_x86_ops->pt_supported() ? F(INTEL_PT) : 0;
447
448         /* cpuid 1.edx */
449         const u32 kvm_cpuid_1_edx_x86_features =
450                 F(FPU) | F(VME) | F(DE) | F(PSE) |
451                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
452                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
453                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
454                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLUSH) |
455                 0 /* Reserved, DS, ACPI */ | F(MMX) |
456                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
457                 0 /* HTT, TM, Reserved, PBE */;
458         /* cpuid 0x80000001.edx */
459         const u32 kvm_cpuid_8000_0001_edx_x86_features =
460                 F(FPU) | F(VME) | F(DE) | F(PSE) |
461                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
462                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
463                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
464                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
465                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
466                 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
467                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
468         /* cpuid 1.ecx */
469         const u32 kvm_cpuid_1_ecx_x86_features =
470                 /* NOTE: MONITOR (and MWAIT) are emulated as NOP,
471                  * but *not* advertised to guests via CPUID ! */
472                 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
473                 0 /* DS-CPL, VMX, SMX, EST */ |
474                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
475                 F(FMA) | F(CX16) | 0 /* xTPR Update, PDCM */ |
476                 F(PCID) | 0 /* Reserved, DCA */ | F(XMM4_1) |
477                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
478                 0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
479                 F(F16C) | F(RDRAND);
480         /* cpuid 0x80000001.ecx */
481         const u32 kvm_cpuid_8000_0001_ecx_x86_features =
482                 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
483                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
484                 F(3DNOWPREFETCH) | F(OSVW) | 0 /* IBS */ | F(XOP) |
485                 0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM) |
486                 F(TOPOEXT) | F(PERFCTR_CORE);
487
488         /* cpuid 0x80000008.ebx */
489         const u32 kvm_cpuid_8000_0008_ebx_x86_features =
490                 F(CLZERO) | F(XSAVEERPTR) |
491                 F(WBNOINVD) | F(AMD_IBPB) | F(AMD_IBRS) | F(AMD_SSBD) | F(VIRT_SSBD) |
492                 F(AMD_SSB_NO) | F(AMD_STIBP) | F(AMD_STIBP_ALWAYS_ON);
493
494         /* cpuid 0xC0000001.edx */
495         const u32 kvm_cpuid_C000_0001_edx_x86_features =
496                 F(XSTORE) | F(XSTORE_EN) | F(XCRYPT) | F(XCRYPT_EN) |
497                 F(ACE2) | F(ACE2_EN) | F(PHE) | F(PHE_EN) |
498                 F(PMM) | F(PMM_EN);
499
500         /* cpuid 0xD.1.eax */
501         const u32 kvm_cpuid_D_1_eax_x86_features =
502                 F(XSAVEOPT) | F(XSAVEC) | F(XGETBV1) | f_xsaves;
503
504         /* all calls to cpuid_count() should be made on the same cpu */
505         get_cpu();
506
507         r = -E2BIG;
508
509         if (WARN_ON(*nent >= maxnent))
510                 goto out;
511
512         do_host_cpuid(entry, function, 0);
513         ++*nent;
514
515         switch (function) {
516         case 0:
517                 /* Limited to the highest leaf implemented in KVM. */
518                 entry->eax = min(entry->eax, 0x1fU);
519                 break;
520         case 1:
521                 entry->edx &= kvm_cpuid_1_edx_x86_features;
522                 cpuid_mask(&entry->edx, CPUID_1_EDX);
523                 entry->ecx &= kvm_cpuid_1_ecx_x86_features;
524                 cpuid_mask(&entry->ecx, CPUID_1_ECX);
525                 /* we support x2apic emulation even if host does not support
526                  * it since we emulate x2apic in software */
527                 entry->ecx |= F(X2APIC);
528                 break;
529         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
530          * may return different values. This forces us to get_cpu() before
531          * issuing the first command, and also to emulate this annoying behavior
532          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
533         case 2: {
534                 int t, times = entry->eax & 0xff;
535
536                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
537                 for (t = 1; t < times; ++t) {
538                         if (*nent >= maxnent)
539                                 goto out;
540
541                         do_host_cpuid(&entry[t], function, 0);
542                         ++*nent;
543                 }
544                 break;
545         }
546         /* functions 4 and 0x8000001d have additional index. */
547         case 4:
548         case 0x8000001d: {
549                 int i, cache_type;
550
551                 /* read more entries until cache_type is zero */
552                 for (i = 1; ; ++i) {
553                         if (*nent >= maxnent)
554                                 goto out;
555
556                         cache_type = entry[i - 1].eax & 0x1f;
557                         if (!cache_type)
558                                 break;
559                         do_host_cpuid(&entry[i], function, i);
560                         ++*nent;
561                 }
562                 break;
563         }
564         case 6: /* Thermal management */
565                 entry->eax = 0x4; /* allow ARAT */
566                 entry->ebx = 0;
567                 entry->ecx = 0;
568                 entry->edx = 0;
569                 break;
570         /* function 7 has additional index. */
571         case 7: {
572                 int i;
573
574                 for (i = 0; ; ) {
575                         do_cpuid_7_mask(&entry[i], i);
576                         if (i == entry->eax)
577                                 break;
578                         if (*nent >= maxnent)
579                                 goto out;
580
581                         ++i;
582                         do_host_cpuid(&entry[i], function, i);
583                         ++*nent;
584                 }
585                 break;
586         }
587         case 9:
588                 break;
589         case 0xa: { /* Architectural Performance Monitoring */
590                 struct x86_pmu_capability cap;
591                 union cpuid10_eax eax;
592                 union cpuid10_edx edx;
593
594                 perf_get_x86_pmu_capability(&cap);
595
596                 /*
597                  * Only support guest architectural pmu on a host
598                  * with architectural pmu.
599                  */
600                 if (!cap.version)
601                         memset(&cap, 0, sizeof(cap));
602
603                 eax.split.version_id = min(cap.version, 2);
604                 eax.split.num_counters = cap.num_counters_gp;
605                 eax.split.bit_width = cap.bit_width_gp;
606                 eax.split.mask_length = cap.events_mask_len;
607
608                 edx.split.num_counters_fixed = cap.num_counters_fixed;
609                 edx.split.bit_width_fixed = cap.bit_width_fixed;
610                 edx.split.reserved = 0;
611
612                 entry->eax = eax.full;
613                 entry->ebx = cap.events_mask;
614                 entry->ecx = 0;
615                 entry->edx = edx.full;
616                 break;
617         }
618         /*
619          * Per Intel's SDM, the 0x1f is a superset of 0xb,
620          * thus they can be handled by common code.
621          */
622         case 0x1f:
623         case 0xb: {
624                 int i;
625
626                 /*
627                  * We filled in entry[0] for CPUID(EAX=<function>,
628                  * ECX=00H) above.  If its level type (ECX[15:8]) is
629                  * zero, then the leaf is unimplemented, and we're
630                  * done.  Otherwise, continue to populate entries
631                  * until the level type (ECX[15:8]) of the previously
632                  * added entry is zero.
633                  */
634                 for (i = 1; entry[i - 1].ecx & 0xff00; ++i) {
635                         if (*nent >= maxnent)
636                                 goto out;
637
638                         do_host_cpuid(&entry[i], function, i);
639                         ++*nent;
640                 }
641                 break;
642         }
643         case 0xd: {
644                 int idx, i;
645                 u64 supported = kvm_supported_xcr0();
646
647                 entry->eax &= supported;
648                 entry->ebx = xstate_required_size(supported, false);
649                 entry->ecx = entry->ebx;
650                 entry->edx &= supported >> 32;
651                 if (!supported)
652                         break;
653
654                 for (idx = 1, i = 1; idx < 64; ++idx) {
655                         u64 mask = ((u64)1 << idx);
656                         if (*nent >= maxnent)
657                                 goto out;
658
659                         do_host_cpuid(&entry[i], function, idx);
660                         if (idx == 1) {
661                                 entry[i].eax &= kvm_cpuid_D_1_eax_x86_features;
662                                 cpuid_mask(&entry[i].eax, CPUID_D_1_EAX);
663                                 entry[i].ebx = 0;
664                                 if (entry[i].eax & (F(XSAVES)|F(XSAVEC)))
665                                         entry[i].ebx =
666                                                 xstate_required_size(supported,
667                                                                      true);
668                         } else {
669                                 if (entry[i].eax == 0 || !(supported & mask))
670                                         continue;
671                                 if (WARN_ON_ONCE(entry[i].ecx & 1))
672                                         continue;
673                         }
674                         entry[i].ecx = 0;
675                         entry[i].edx = 0;
676                         ++*nent;
677                         ++i;
678                 }
679                 break;
680         }
681         /* Intel PT */
682         case 0x14: {
683                 int t, times = entry->eax;
684
685                 if (!f_intel_pt)
686                         break;
687
688                 for (t = 1; t <= times; ++t) {
689                         if (*nent >= maxnent)
690                                 goto out;
691                         do_host_cpuid(&entry[t], function, t);
692                         ++*nent;
693                 }
694                 break;
695         }
696         case KVM_CPUID_SIGNATURE: {
697                 static const char signature[12] = "KVMKVMKVM\0\0";
698                 const u32 *sigptr = (const u32 *)signature;
699                 entry->eax = KVM_CPUID_FEATURES;
700                 entry->ebx = sigptr[0];
701                 entry->ecx = sigptr[1];
702                 entry->edx = sigptr[2];
703                 break;
704         }
705         case KVM_CPUID_FEATURES:
706                 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
707                              (1 << KVM_FEATURE_NOP_IO_DELAY) |
708                              (1 << KVM_FEATURE_CLOCKSOURCE2) |
709                              (1 << KVM_FEATURE_ASYNC_PF) |
710                              (1 << KVM_FEATURE_PV_EOI) |
711                              (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT) |
712                              (1 << KVM_FEATURE_PV_UNHALT) |
713                              (1 << KVM_FEATURE_PV_TLB_FLUSH) |
714                              (1 << KVM_FEATURE_ASYNC_PF_VMEXIT) |
715                              (1 << KVM_FEATURE_PV_SEND_IPI) |
716                              (1 << KVM_FEATURE_POLL_CONTROL) |
717                              (1 << KVM_FEATURE_PV_SCHED_YIELD);
718
719                 if (sched_info_on())
720                         entry->eax |= (1 << KVM_FEATURE_STEAL_TIME);
721
722                 entry->ebx = 0;
723                 entry->ecx = 0;
724                 entry->edx = 0;
725                 break;
726         case 0x80000000:
727                 entry->eax = min(entry->eax, 0x8000001f);
728                 break;
729         case 0x80000001:
730                 entry->edx &= kvm_cpuid_8000_0001_edx_x86_features;
731                 cpuid_mask(&entry->edx, CPUID_8000_0001_EDX);
732                 entry->ecx &= kvm_cpuid_8000_0001_ecx_x86_features;
733                 cpuid_mask(&entry->ecx, CPUID_8000_0001_ECX);
734                 break;
735         case 0x80000007: /* Advanced power management */
736                 /* invariant TSC is CPUID.80000007H:EDX[8] */
737                 entry->edx &= (1 << 8);
738                 /* mask against host */
739                 entry->edx &= boot_cpu_data.x86_power;
740                 entry->eax = entry->ebx = entry->ecx = 0;
741                 break;
742         case 0x80000008: {
743                 unsigned g_phys_as = (entry->eax >> 16) & 0xff;
744                 unsigned virt_as = max((entry->eax >> 8) & 0xff, 48U);
745                 unsigned phys_as = entry->eax & 0xff;
746
747                 if (!g_phys_as)
748                         g_phys_as = phys_as;
749                 entry->eax = g_phys_as | (virt_as << 8);
750                 entry->edx = 0;
751                 entry->ebx &= kvm_cpuid_8000_0008_ebx_x86_features;
752                 cpuid_mask(&entry->ebx, CPUID_8000_0008_EBX);
753                 /*
754                  * AMD has separate bits for each SPEC_CTRL bit.
755                  * arch/x86/kernel/cpu/bugs.c is kind enough to
756                  * record that in cpufeatures so use them.
757                  */
758                 if (boot_cpu_has(X86_FEATURE_IBPB))
759                         entry->ebx |= F(AMD_IBPB);
760                 if (boot_cpu_has(X86_FEATURE_IBRS))
761                         entry->ebx |= F(AMD_IBRS);
762                 if (boot_cpu_has(X86_FEATURE_STIBP))
763                         entry->ebx |= F(AMD_STIBP);
764                 if (boot_cpu_has(X86_FEATURE_SPEC_CTRL_SSBD) ||
765                     boot_cpu_has(X86_FEATURE_AMD_SSBD))
766                         entry->ebx |= F(AMD_SSBD);
767                 if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
768                         entry->ebx |= F(AMD_SSB_NO);
769                 /*
770                  * The preference is to use SPEC CTRL MSR instead of the
771                  * VIRT_SPEC MSR.
772                  */
773                 if (boot_cpu_has(X86_FEATURE_LS_CFG_SSBD) &&
774                     !boot_cpu_has(X86_FEATURE_AMD_SSBD))
775                         entry->ebx |= F(VIRT_SSBD);
776                 break;
777         }
778         case 0x80000019:
779                 entry->ecx = entry->edx = 0;
780                 break;
781         case 0x8000001a:
782         case 0x8000001e:
783                 break;
784         /* Support memory encryption cpuid if host supports it */
785         case 0x8000001F:
786                 if (!boot_cpu_has(X86_FEATURE_SEV))
787                         entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
788                 break;
789         /*Add support for Centaur's CPUID instruction*/
790         case 0xC0000000:
791                 /*Just support up to 0xC0000004 now*/
792                 entry->eax = min(entry->eax, 0xC0000004);
793                 break;
794         case 0xC0000001:
795                 entry->edx &= kvm_cpuid_C000_0001_edx_x86_features;
796                 cpuid_mask(&entry->edx, CPUID_C000_0001_EDX);
797                 break;
798         case 3: /* Processor serial number */
799         case 5: /* MONITOR/MWAIT */
800         case 0xC0000002:
801         case 0xC0000003:
802         case 0xC0000004:
803         default:
804                 entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
805                 break;
806         }
807
808         kvm_x86_ops->set_supported_cpuid(function, entry);
809
810         r = 0;
811
812 out:
813         put_cpu();
814
815         return r;
816 }
817
818 static int do_cpuid_func(struct kvm_cpuid_entry2 *entry, u32 func,
819                          int *nent, int maxnent, unsigned int type)
820 {
821         if (*nent >= maxnent)
822                 return -E2BIG;
823
824         if (type == KVM_GET_EMULATED_CPUID)
825                 return __do_cpuid_func_emulated(entry, func, nent, maxnent);
826
827         return __do_cpuid_func(entry, func, nent, maxnent);
828 }
829
830 struct kvm_cpuid_param {
831         u32 func;
832         bool (*qualifier)(const struct kvm_cpuid_param *param);
833 };
834
835 static bool is_centaur_cpu(const struct kvm_cpuid_param *param)
836 {
837         return boot_cpu_data.x86_vendor == X86_VENDOR_CENTAUR;
838 }
839
840 static bool sanity_check_entries(struct kvm_cpuid_entry2 __user *entries,
841                                  __u32 num_entries, unsigned int ioctl_type)
842 {
843         int i;
844         __u32 pad[3];
845
846         if (ioctl_type != KVM_GET_EMULATED_CPUID)
847                 return false;
848
849         /*
850          * We want to make sure that ->padding is being passed clean from
851          * userspace in case we want to use it for something in the future.
852          *
853          * Sadly, this wasn't enforced for KVM_GET_SUPPORTED_CPUID and so we
854          * have to give ourselves satisfied only with the emulated side. /me
855          * sheds a tear.
856          */
857         for (i = 0; i < num_entries; i++) {
858                 if (copy_from_user(pad, entries[i].padding, sizeof(pad)))
859                         return true;
860
861                 if (pad[0] || pad[1] || pad[2])
862                         return true;
863         }
864         return false;
865 }
866
867 int kvm_dev_ioctl_get_cpuid(struct kvm_cpuid2 *cpuid,
868                             struct kvm_cpuid_entry2 __user *entries,
869                             unsigned int type)
870 {
871         struct kvm_cpuid_entry2 *cpuid_entries;
872         int limit, nent = 0, r = -E2BIG, i;
873         u32 func;
874         static const struct kvm_cpuid_param param[] = {
875                 { .func = 0 },
876                 { .func = 0x80000000 },
877                 { .func = 0xC0000000, .qualifier = is_centaur_cpu },
878                 { .func = KVM_CPUID_SIGNATURE },
879         };
880
881         if (cpuid->nent < 1)
882                 goto out;
883         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
884                 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
885
886         if (sanity_check_entries(entries, cpuid->nent, type))
887                 return -EINVAL;
888
889         r = -ENOMEM;
890         cpuid_entries = vzalloc(array_size(sizeof(struct kvm_cpuid_entry2),
891                                            cpuid->nent));
892         if (!cpuid_entries)
893                 goto out;
894
895         r = 0;
896         for (i = 0; i < ARRAY_SIZE(param); i++) {
897                 const struct kvm_cpuid_param *ent = &param[i];
898
899                 if (ent->qualifier && !ent->qualifier(ent))
900                         continue;
901
902                 r = do_cpuid_func(&cpuid_entries[nent], ent->func,
903                                   &nent, cpuid->nent, type);
904
905                 if (r)
906                         goto out_free;
907
908                 limit = cpuid_entries[nent - 1].eax;
909                 for (func = ent->func + 1; func <= limit && nent < cpuid->nent && r == 0; ++func)
910                         r = do_cpuid_func(&cpuid_entries[nent], func,
911                                           &nent, cpuid->nent, type);
912
913                 if (r)
914                         goto out_free;
915         }
916
917         r = -EFAULT;
918         if (copy_to_user(entries, cpuid_entries,
919                          nent * sizeof(struct kvm_cpuid_entry2)))
920                 goto out_free;
921         cpuid->nent = nent;
922         r = 0;
923
924 out_free:
925         vfree(cpuid_entries);
926 out:
927         return r;
928 }
929
930 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
931 {
932         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
933         struct kvm_cpuid_entry2 *ej;
934         int j = i;
935         int nent = vcpu->arch.cpuid_nent;
936
937         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
938         /* when no next entry is found, the current entry[i] is reselected */
939         do {
940                 j = (j + 1) % nent;
941                 ej = &vcpu->arch.cpuid_entries[j];
942         } while (ej->function != e->function);
943
944         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
945
946         return j;
947 }
948
949 /* find an entry with matching function, matching index (if needed), and that
950  * should be read next (if it's stateful) */
951 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
952         u32 function, u32 index)
953 {
954         if (e->function != function)
955                 return 0;
956         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
957                 return 0;
958         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
959             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
960                 return 0;
961         return 1;
962 }
963
964 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
965                                               u32 function, u32 index)
966 {
967         int i;
968         struct kvm_cpuid_entry2 *best = NULL;
969
970         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
971                 struct kvm_cpuid_entry2 *e;
972
973                 e = &vcpu->arch.cpuid_entries[i];
974                 if (is_matching_cpuid_entry(e, function, index)) {
975                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
976                                 move_to_next_stateful_cpuid_entry(vcpu, i);
977                         best = e;
978                         break;
979                 }
980         }
981         return best;
982 }
983 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
984
985 /*
986  * If the basic or extended CPUID leaf requested is higher than the
987  * maximum supported basic or extended leaf, respectively, then it is
988  * out of range.
989  */
990 static bool cpuid_function_in_range(struct kvm_vcpu *vcpu, u32 function)
991 {
992         struct kvm_cpuid_entry2 *max;
993
994         max = kvm_find_cpuid_entry(vcpu, function & 0x80000000, 0);
995         return max && function <= max->eax;
996 }
997
998 bool kvm_cpuid(struct kvm_vcpu *vcpu, u32 *eax, u32 *ebx,
999                u32 *ecx, u32 *edx, bool check_limit)
1000 {
1001         u32 function = *eax, index = *ecx;
1002         struct kvm_cpuid_entry2 *entry;
1003         struct kvm_cpuid_entry2 *max;
1004         bool found;
1005
1006         entry = kvm_find_cpuid_entry(vcpu, function, index);
1007         found = entry;
1008         /*
1009          * Intel CPUID semantics treats any query for an out-of-range
1010          * leaf as if the highest basic leaf (i.e. CPUID.0H:EAX) were
1011          * requested. AMD CPUID semantics returns all zeroes for any
1012          * undefined leaf, whether or not the leaf is in range.
1013          */
1014         if (!entry && check_limit && !guest_cpuid_is_amd(vcpu) &&
1015             !cpuid_function_in_range(vcpu, function)) {
1016                 max = kvm_find_cpuid_entry(vcpu, 0, 0);
1017                 if (max) {
1018                         function = max->eax;
1019                         entry = kvm_find_cpuid_entry(vcpu, function, index);
1020                 }
1021         }
1022         if (entry) {
1023                 *eax = entry->eax;
1024                 *ebx = entry->ebx;
1025                 *ecx = entry->ecx;
1026                 *edx = entry->edx;
1027                 if (function == 7 && index == 0) {
1028                         u64 data;
1029                         if (!__kvm_get_msr(vcpu, MSR_IA32_TSX_CTRL, &data, true) &&
1030                             (data & TSX_CTRL_CPUID_CLEAR))
1031                                 *ebx &= ~(F(RTM) | F(HLE));
1032                 }
1033         } else {
1034                 *eax = *ebx = *ecx = *edx = 0;
1035                 /*
1036                  * When leaf 0BH or 1FH is defined, CL is pass-through
1037                  * and EDX is always the x2APIC ID, even for undefined
1038                  * subleaves. Index 1 will exist iff the leaf is
1039                  * implemented, so we pass through CL iff leaf 1
1040                  * exists. EDX can be copied from any existing index.
1041                  */
1042                 if (function == 0xb || function == 0x1f) {
1043                         entry = kvm_find_cpuid_entry(vcpu, function, 1);
1044                         if (entry) {
1045                                 *ecx = index & 0xff;
1046                                 *edx = entry->edx;
1047                         }
1048                 }
1049         }
1050         trace_kvm_cpuid(function, *eax, *ebx, *ecx, *edx, found);
1051         return found;
1052 }
1053 EXPORT_SYMBOL_GPL(kvm_cpuid);
1054
1055 int kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
1056 {
1057         u32 eax, ebx, ecx, edx;
1058
1059         if (cpuid_fault_enabled(vcpu) && !kvm_require_cpl(vcpu, 0))
1060                 return 1;
1061
1062         eax = kvm_rax_read(vcpu);
1063         ecx = kvm_rcx_read(vcpu);
1064         kvm_cpuid(vcpu, &eax, &ebx, &ecx, &edx, true);
1065         kvm_rax_write(vcpu, eax);
1066         kvm_rbx_write(vcpu, ebx);
1067         kvm_rcx_write(vcpu, ecx);
1068         kvm_rdx_write(vcpu, edx);
1069         return kvm_skip_emulated_instruction(vcpu);
1070 }
1071 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);