1 // SPDX-License-Identifier: GPL-2.0-only
3 * AMD Memory Encryption Support
5 * Copyright (C) 2019 SUSE
7 * Author: Joerg Roedel <jroedel@suse.de>
10 #define pr_fmt(fmt) "SEV: " fmt
12 #include <linux/sched/debug.h> /* For show_regs() */
13 #include <linux/percpu-defs.h>
14 #include <linux/cc_platform.h>
15 #include <linux/printk.h>
16 #include <linux/mm_types.h>
17 #include <linux/set_memory.h>
18 #include <linux/memblock.h>
19 #include <linux/kernel.h>
22 #include <asm/cpu_entry_area.h>
23 #include <asm/stacktrace.h>
25 #include <asm/insn-eval.h>
26 #include <asm/fpu/internal.h>
27 #include <asm/processor.h>
28 #include <asm/realmode.h>
29 #include <asm/traps.h>
34 #define DR7_RESET_VALUE 0x400
36 /* For early boot hypervisor communication in SEV-ES enabled guests */
37 static struct ghcb boot_ghcb_page __bss_decrypted __aligned(PAGE_SIZE);
40 * Needs to be in the .data section because we need it NULL before bss is
43 static struct ghcb __initdata *boot_ghcb;
45 /* #VC handler runtime per-CPU data */
46 struct sev_es_runtime_data {
47 struct ghcb ghcb_page;
49 /* Physical storage for the per-CPU IST stack of the #VC handler */
50 char ist_stack[EXCEPTION_STKSZ] __aligned(PAGE_SIZE);
53 * Physical storage for the per-CPU fall-back stack of the #VC handler.
54 * The fall-back stack is used when it is not safe to switch back to the
55 * interrupted stack in the #VC entry code.
57 char fallback_stack[EXCEPTION_STKSZ] __aligned(PAGE_SIZE);
60 * Reserve one page per CPU as backup storage for the unencrypted GHCB.
61 * It is needed when an NMI happens while the #VC handler uses the real
62 * GHCB, and the NMI handler itself is causing another #VC exception. In
63 * that case the GHCB content of the first handler needs to be backed up
66 struct ghcb backup_ghcb;
69 * Mark the per-cpu GHCBs as in-use to detect nested #VC exceptions.
70 * There is no need for it to be atomic, because nothing is written to
71 * the GHCB between the read and the write of ghcb_active. So it is safe
72 * to use it when a nested #VC exception happens before the write.
74 * This is necessary for example in the #VC->NMI->#VC case when the NMI
75 * happens while the first #VC handler uses the GHCB. When the NMI code
76 * raises a second #VC handler it might overwrite the contents of the
77 * GHCB written by the first handler. To avoid this the content of the
78 * GHCB is saved and restored when the GHCB is detected to be in use
82 bool backup_ghcb_active;
85 * Cached DR7 value - write it on DR7 writes and return it on reads.
86 * That value will never make it to the real hardware DR7 as debugging
87 * is currently unsupported in SEV-ES guests.
96 static DEFINE_PER_CPU(struct sev_es_runtime_data*, runtime_data);
97 DEFINE_STATIC_KEY_FALSE(sev_es_enable_key);
99 /* Needed in vc_early_forward_exception */
100 void do_early_exception(struct pt_regs *regs, int trapnr);
102 static void __init setup_vc_stacks(int cpu)
104 struct sev_es_runtime_data *data;
105 struct cpu_entry_area *cea;
109 data = per_cpu(runtime_data, cpu);
110 cea = get_cpu_entry_area(cpu);
112 /* Map #VC IST stack */
113 vaddr = CEA_ESTACK_BOT(&cea->estacks, VC);
114 pa = __pa(data->ist_stack);
115 cea_set_pte((void *)vaddr, pa, PAGE_KERNEL);
117 /* Map VC fall-back stack */
118 vaddr = CEA_ESTACK_BOT(&cea->estacks, VC2);
119 pa = __pa(data->fallback_stack);
120 cea_set_pte((void *)vaddr, pa, PAGE_KERNEL);
123 static __always_inline bool on_vc_stack(struct pt_regs *regs)
125 unsigned long sp = regs->sp;
127 /* User-mode RSP is not trusted */
131 /* SYSCALL gap still has user-mode RSP */
132 if (ip_within_syscall_gap(regs))
135 return ((sp >= __this_cpu_ist_bottom_va(VC)) && (sp < __this_cpu_ist_top_va(VC)));
139 * This function handles the case when an NMI is raised in the #VC
140 * exception handler entry code, before the #VC handler has switched off
141 * its IST stack. In this case, the IST entry for #VC must be adjusted,
142 * so that any nested #VC exception will not overwrite the stack
143 * contents of the interrupted #VC handler.
145 * The IST entry is adjusted unconditionally so that it can be also be
146 * unconditionally adjusted back in __sev_es_ist_exit(). Otherwise a
147 * nested sev_es_ist_exit() call may adjust back the IST entry too
150 * The __sev_es_ist_enter() and __sev_es_ist_exit() functions always run
151 * on the NMI IST stack, as they are only called from NMI handling code
154 void noinstr __sev_es_ist_enter(struct pt_regs *regs)
156 unsigned long old_ist, new_ist;
158 /* Read old IST entry */
159 new_ist = old_ist = __this_cpu_read(cpu_tss_rw.x86_tss.ist[IST_INDEX_VC]);
162 * If NMI happened while on the #VC IST stack, set the new IST
163 * value below regs->sp, so that the interrupted stack frame is
164 * not overwritten by subsequent #VC exceptions.
166 if (on_vc_stack(regs))
170 * Reserve additional 8 bytes and store old IST value so this
171 * adjustment can be unrolled in __sev_es_ist_exit().
173 new_ist -= sizeof(old_ist);
174 *(unsigned long *)new_ist = old_ist;
176 /* Set new IST entry */
177 this_cpu_write(cpu_tss_rw.x86_tss.ist[IST_INDEX_VC], new_ist);
180 void noinstr __sev_es_ist_exit(void)
185 ist = __this_cpu_read(cpu_tss_rw.x86_tss.ist[IST_INDEX_VC]);
187 if (WARN_ON(ist == __this_cpu_ist_top_va(VC)))
190 /* Read back old IST entry and write it to the TSS */
191 this_cpu_write(cpu_tss_rw.x86_tss.ist[IST_INDEX_VC], *(unsigned long *)ist);
195 * Nothing shall interrupt this code path while holding the per-CPU
196 * GHCB. The backup GHCB is only for NMIs interrupting this path.
198 * Callers must disable local interrupts around it.
200 static noinstr struct ghcb *__sev_get_ghcb(struct ghcb_state *state)
202 struct sev_es_runtime_data *data;
205 WARN_ON(!irqs_disabled());
207 data = this_cpu_read(runtime_data);
208 ghcb = &data->ghcb_page;
210 if (unlikely(data->ghcb_active)) {
211 /* GHCB is already in use - save its contents */
213 if (unlikely(data->backup_ghcb_active)) {
215 * Backup-GHCB is also already in use. There is no way
216 * to continue here so just kill the machine. To make
217 * panic() work, mark GHCBs inactive so that messages
218 * can be printed out.
220 data->ghcb_active = false;
221 data->backup_ghcb_active = false;
223 instrumentation_begin();
224 panic("Unable to handle #VC exception! GHCB and Backup GHCB are already in use");
225 instrumentation_end();
228 /* Mark backup_ghcb active before writing to it */
229 data->backup_ghcb_active = true;
231 state->ghcb = &data->backup_ghcb;
233 /* Backup GHCB content */
234 *state->ghcb = *ghcb;
237 data->ghcb_active = true;
243 /* Needed in vc_early_forward_exception */
244 void do_early_exception(struct pt_regs *regs, int trapnr);
246 static inline u64 sev_es_rd_ghcb_msr(void)
248 return __rdmsr(MSR_AMD64_SEV_ES_GHCB);
251 static __always_inline void sev_es_wr_ghcb_msr(u64 val)
256 high = (u32)(val >> 32);
258 native_wrmsr(MSR_AMD64_SEV_ES_GHCB, low, high);
261 static int vc_fetch_insn_kernel(struct es_em_ctxt *ctxt,
262 unsigned char *buffer)
264 return copy_from_kernel_nofault(buffer, (unsigned char *)ctxt->regs->ip, MAX_INSN_SIZE);
267 static enum es_result __vc_decode_user_insn(struct es_em_ctxt *ctxt)
269 char buffer[MAX_INSN_SIZE];
272 insn_bytes = insn_fetch_from_user_inatomic(ctxt->regs, buffer);
273 if (insn_bytes == 0) {
274 /* Nothing could be copied */
275 ctxt->fi.vector = X86_TRAP_PF;
276 ctxt->fi.error_code = X86_PF_INSTR | X86_PF_USER;
277 ctxt->fi.cr2 = ctxt->regs->ip;
279 } else if (insn_bytes == -EINVAL) {
280 /* Effective RIP could not be calculated */
281 ctxt->fi.vector = X86_TRAP_GP;
282 ctxt->fi.error_code = 0;
287 if (!insn_decode_from_regs(&ctxt->insn, ctxt->regs, buffer, insn_bytes))
288 return ES_DECODE_FAILED;
290 if (ctxt->insn.immediate.got)
293 return ES_DECODE_FAILED;
296 static enum es_result __vc_decode_kern_insn(struct es_em_ctxt *ctxt)
298 char buffer[MAX_INSN_SIZE];
301 res = vc_fetch_insn_kernel(ctxt, buffer);
303 ctxt->fi.vector = X86_TRAP_PF;
304 ctxt->fi.error_code = X86_PF_INSTR;
305 ctxt->fi.cr2 = ctxt->regs->ip;
309 ret = insn_decode(&ctxt->insn, buffer, MAX_INSN_SIZE, INSN_MODE_64);
311 return ES_DECODE_FAILED;
316 static enum es_result vc_decode_insn(struct es_em_ctxt *ctxt)
318 if (user_mode(ctxt->regs))
319 return __vc_decode_user_insn(ctxt);
321 return __vc_decode_kern_insn(ctxt);
324 static enum es_result vc_write_mem(struct es_em_ctxt *ctxt,
325 char *dst, char *buf, size_t size)
327 unsigned long error_code = X86_PF_PROT | X86_PF_WRITE;
328 char __user *target = (char __user *)dst;
335 * This function uses __put_user() independent of whether kernel or user
336 * memory is accessed. This works fine because __put_user() does no
337 * sanity checks of the pointer being accessed. All that it does is
338 * to report when the access failed.
340 * Also, this function runs in atomic context, so __put_user() is not
341 * allowed to sleep. The page-fault handler detects that it is running
342 * in atomic context and will not try to take mmap_sem and handle the
343 * fault, so additional pagefault_enable()/disable() calls are not
346 * The access can't be done via copy_to_user() here because
347 * vc_write_mem() must not use string instructions to access unsafe
348 * memory. The reason is that MOVS is emulated by the #VC handler by
349 * splitting the move up into a read and a write and taking a nested #VC
350 * exception on whatever of them is the MMIO access. Using string
351 * instructions here would cause infinite nesting.
356 if (__put_user(d1, target))
361 if (__put_user(d2, target))
366 if (__put_user(d4, target))
371 if (__put_user(d8, target))
375 WARN_ONCE(1, "%s: Invalid size: %zu\n", __func__, size);
376 return ES_UNSUPPORTED;
382 if (user_mode(ctxt->regs))
383 error_code |= X86_PF_USER;
385 ctxt->fi.vector = X86_TRAP_PF;
386 ctxt->fi.error_code = error_code;
387 ctxt->fi.cr2 = (unsigned long)dst;
392 static enum es_result vc_read_mem(struct es_em_ctxt *ctxt,
393 char *src, char *buf, size_t size)
395 unsigned long error_code = X86_PF_PROT;
396 char __user *s = (char __user *)src;
403 * This function uses __get_user() independent of whether kernel or user
404 * memory is accessed. This works fine because __get_user() does no
405 * sanity checks of the pointer being accessed. All that it does is
406 * to report when the access failed.
408 * Also, this function runs in atomic context, so __get_user() is not
409 * allowed to sleep. The page-fault handler detects that it is running
410 * in atomic context and will not try to take mmap_sem and handle the
411 * fault, so additional pagefault_enable()/disable() calls are not
414 * The access can't be done via copy_from_user() here because
415 * vc_read_mem() must not use string instructions to access unsafe
416 * memory. The reason is that MOVS is emulated by the #VC handler by
417 * splitting the move up into a read and a write and taking a nested #VC
418 * exception on whatever of them is the MMIO access. Using string
419 * instructions here would cause infinite nesting.
423 if (__get_user(d1, s))
428 if (__get_user(d2, s))
433 if (__get_user(d4, s))
438 if (__get_user(d8, s))
443 WARN_ONCE(1, "%s: Invalid size: %zu\n", __func__, size);
444 return ES_UNSUPPORTED;
450 if (user_mode(ctxt->regs))
451 error_code |= X86_PF_USER;
453 ctxt->fi.vector = X86_TRAP_PF;
454 ctxt->fi.error_code = error_code;
455 ctxt->fi.cr2 = (unsigned long)src;
460 static enum es_result vc_slow_virt_to_phys(struct ghcb *ghcb, struct es_em_ctxt *ctxt,
461 unsigned long vaddr, phys_addr_t *paddr)
463 unsigned long va = (unsigned long)vaddr;
469 pgd = __va(read_cr3_pa());
470 pgd = &pgd[pgd_index(va)];
471 pte = lookup_address_in_pgd(pgd, va, &level);
473 ctxt->fi.vector = X86_TRAP_PF;
474 ctxt->fi.cr2 = vaddr;
475 ctxt->fi.error_code = 0;
477 if (user_mode(ctxt->regs))
478 ctxt->fi.error_code |= X86_PF_USER;
483 if (WARN_ON_ONCE(pte_val(*pte) & _PAGE_ENC))
484 /* Emulated MMIO to/from encrypted memory not supported */
485 return ES_UNSUPPORTED;
487 pa = (phys_addr_t)pte_pfn(*pte) << PAGE_SHIFT;
488 pa |= va & ~page_level_mask(level);
495 /* Include code shared with pre-decompression boot stage */
496 #include "sev-shared.c"
498 static noinstr void __sev_put_ghcb(struct ghcb_state *state)
500 struct sev_es_runtime_data *data;
503 WARN_ON(!irqs_disabled());
505 data = this_cpu_read(runtime_data);
506 ghcb = &data->ghcb_page;
509 /* Restore GHCB from Backup */
510 *ghcb = *state->ghcb;
511 data->backup_ghcb_active = false;
515 * Invalidate the GHCB so a VMGEXIT instruction issued
516 * from userspace won't appear to be valid.
518 vc_ghcb_invalidate(ghcb);
519 data->ghcb_active = false;
523 void noinstr __sev_es_nmi_complete(void)
525 struct ghcb_state state;
528 ghcb = __sev_get_ghcb(&state);
530 vc_ghcb_invalidate(ghcb);
531 ghcb_set_sw_exit_code(ghcb, SVM_VMGEXIT_NMI_COMPLETE);
532 ghcb_set_sw_exit_info_1(ghcb, 0);
533 ghcb_set_sw_exit_info_2(ghcb, 0);
535 sev_es_wr_ghcb_msr(__pa_nodebug(ghcb));
538 __sev_put_ghcb(&state);
541 static u64 get_jump_table_addr(void)
543 struct ghcb_state state;
548 local_irq_save(flags);
550 ghcb = __sev_get_ghcb(&state);
552 vc_ghcb_invalidate(ghcb);
553 ghcb_set_sw_exit_code(ghcb, SVM_VMGEXIT_AP_JUMP_TABLE);
554 ghcb_set_sw_exit_info_1(ghcb, SVM_VMGEXIT_GET_AP_JUMP_TABLE);
555 ghcb_set_sw_exit_info_2(ghcb, 0);
557 sev_es_wr_ghcb_msr(__pa(ghcb));
560 if (ghcb_sw_exit_info_1_is_valid(ghcb) &&
561 ghcb_sw_exit_info_2_is_valid(ghcb))
562 ret = ghcb->save.sw_exit_info_2;
564 __sev_put_ghcb(&state);
566 local_irq_restore(flags);
571 int sev_es_setup_ap_jump_table(struct real_mode_header *rmh)
573 u16 startup_cs, startup_ip;
574 phys_addr_t jump_table_pa;
576 u16 __iomem *jump_table;
578 jump_table_addr = get_jump_table_addr();
580 /* On UP guests there is no jump table so this is not a failure */
581 if (!jump_table_addr)
584 /* Check if AP Jump Table is page-aligned */
585 if (jump_table_addr & ~PAGE_MASK)
588 jump_table_pa = jump_table_addr & PAGE_MASK;
590 startup_cs = (u16)(rmh->trampoline_start >> 4);
591 startup_ip = (u16)(rmh->sev_es_trampoline_start -
592 rmh->trampoline_start);
594 jump_table = ioremap_encrypted(jump_table_pa, PAGE_SIZE);
598 writew(startup_ip, &jump_table[0]);
599 writew(startup_cs, &jump_table[1]);
607 * This is needed by the OVMF UEFI firmware which will use whatever it finds in
608 * the GHCB MSR as its GHCB to talk to the hypervisor. So make sure the per-cpu
609 * runtime GHCBs used by the kernel are also mapped in the EFI page-table.
611 int __init sev_es_efi_map_ghcbs(pgd_t *pgd)
613 struct sev_es_runtime_data *data;
614 unsigned long address, pflags;
618 if (!cc_platform_has(CC_ATTR_GUEST_STATE_ENCRYPT))
621 pflags = _PAGE_NX | _PAGE_RW;
623 for_each_possible_cpu(cpu) {
624 data = per_cpu(runtime_data, cpu);
626 address = __pa(&data->ghcb_page);
627 pfn = address >> PAGE_SHIFT;
629 if (kernel_map_pages_in_pgd(pgd, pfn, address, 1, pflags))
636 static enum es_result vc_handle_msr(struct ghcb *ghcb, struct es_em_ctxt *ctxt)
638 struct pt_regs *regs = ctxt->regs;
643 exit_info_1 = (ctxt->insn.opcode.bytes[1] == 0x30) ? 1 : 0;
645 ghcb_set_rcx(ghcb, regs->cx);
647 ghcb_set_rax(ghcb, regs->ax);
648 ghcb_set_rdx(ghcb, regs->dx);
651 ret = sev_es_ghcb_hv_call(ghcb, true, ctxt, SVM_EXIT_MSR,
654 if ((ret == ES_OK) && (!exit_info_1)) {
655 regs->ax = ghcb->save.rax;
656 regs->dx = ghcb->save.rdx;
663 * This function runs on the first #VC exception after the kernel
664 * switched to virtual addresses.
666 static bool __init sev_es_setup_ghcb(void)
668 /* First make sure the hypervisor talks a supported protocol. */
669 if (!sev_es_negotiate_protocol())
673 * Clear the boot_ghcb. The first exception comes in before the bss
674 * section is cleared.
676 memset(&boot_ghcb_page, 0, PAGE_SIZE);
678 /* Alright - Make the boot-ghcb public */
679 boot_ghcb = &boot_ghcb_page;
684 #ifdef CONFIG_HOTPLUG_CPU
685 static void sev_es_ap_hlt_loop(void)
687 struct ghcb_state state;
690 ghcb = __sev_get_ghcb(&state);
693 vc_ghcb_invalidate(ghcb);
694 ghcb_set_sw_exit_code(ghcb, SVM_VMGEXIT_AP_HLT_LOOP);
695 ghcb_set_sw_exit_info_1(ghcb, 0);
696 ghcb_set_sw_exit_info_2(ghcb, 0);
698 sev_es_wr_ghcb_msr(__pa(ghcb));
702 if (ghcb_sw_exit_info_2_is_valid(ghcb) &&
703 ghcb->save.sw_exit_info_2)
707 __sev_put_ghcb(&state);
711 * Play_dead handler when running under SEV-ES. This is needed because
712 * the hypervisor can't deliver an SIPI request to restart the AP.
713 * Instead the kernel has to issue a VMGEXIT to halt the VCPU until the
714 * hypervisor wakes it up again.
716 static void sev_es_play_dead(void)
720 /* IRQs now disabled */
722 sev_es_ap_hlt_loop();
725 * If we get here, the VCPU was woken up again. Jump to CPU
726 * startup code to get it back online.
730 #else /* CONFIG_HOTPLUG_CPU */
731 #define sev_es_play_dead native_play_dead
732 #endif /* CONFIG_HOTPLUG_CPU */
735 static void __init sev_es_setup_play_dead(void)
737 smp_ops.play_dead = sev_es_play_dead;
740 static inline void sev_es_setup_play_dead(void) { }
743 static void __init alloc_runtime_data(int cpu)
745 struct sev_es_runtime_data *data;
747 data = memblock_alloc(sizeof(*data), PAGE_SIZE);
749 panic("Can't allocate SEV-ES runtime data");
751 per_cpu(runtime_data, cpu) = data;
754 static void __init init_ghcb(int cpu)
756 struct sev_es_runtime_data *data;
759 data = per_cpu(runtime_data, cpu);
761 err = early_set_memory_decrypted((unsigned long)&data->ghcb_page,
762 sizeof(data->ghcb_page));
764 panic("Can't map GHCBs unencrypted");
766 memset(&data->ghcb_page, 0, sizeof(data->ghcb_page));
768 data->ghcb_active = false;
769 data->backup_ghcb_active = false;
772 void __init sev_es_init_vc_handling(void)
776 BUILD_BUG_ON(offsetof(struct sev_es_runtime_data, ghcb_page) % PAGE_SIZE);
778 if (!cc_platform_has(CC_ATTR_GUEST_STATE_ENCRYPT))
781 if (!sev_es_check_cpu_features())
782 panic("SEV-ES CPU Features missing");
784 /* Enable SEV-ES special handling */
785 static_branch_enable(&sev_es_enable_key);
787 /* Initialize per-cpu GHCB pages */
788 for_each_possible_cpu(cpu) {
789 alloc_runtime_data(cpu);
791 setup_vc_stacks(cpu);
794 sev_es_setup_play_dead();
796 /* Secondary CPUs use the runtime #VC handler */
797 initial_vc_handler = (unsigned long)kernel_exc_vmm_communication;
800 static void __init vc_early_forward_exception(struct es_em_ctxt *ctxt)
802 int trapnr = ctxt->fi.vector;
804 if (trapnr == X86_TRAP_PF)
805 native_write_cr2(ctxt->fi.cr2);
807 ctxt->regs->orig_ax = ctxt->fi.error_code;
808 do_early_exception(ctxt->regs, trapnr);
811 static long *vc_insn_get_reg(struct es_em_ctxt *ctxt)
816 reg_array = (long *)ctxt->regs;
817 offset = insn_get_modrm_reg_off(&ctxt->insn, ctxt->regs);
822 offset /= sizeof(long);
824 return reg_array + offset;
827 static long *vc_insn_get_rm(struct es_em_ctxt *ctxt)
832 reg_array = (long *)ctxt->regs;
833 offset = insn_get_modrm_rm_off(&ctxt->insn, ctxt->regs);
838 offset /= sizeof(long);
840 return reg_array + offset;
842 static enum es_result vc_do_mmio(struct ghcb *ghcb, struct es_em_ctxt *ctxt,
843 unsigned int bytes, bool read)
845 u64 exit_code, exit_info_1, exit_info_2;
846 unsigned long ghcb_pa = __pa(ghcb);
851 ref = insn_get_addr_ref(&ctxt->insn, ctxt->regs);
852 if (ref == (void __user *)-1L)
853 return ES_UNSUPPORTED;
855 exit_code = read ? SVM_VMGEXIT_MMIO_READ : SVM_VMGEXIT_MMIO_WRITE;
857 res = vc_slow_virt_to_phys(ghcb, ctxt, (unsigned long)ref, &paddr);
859 if (res == ES_EXCEPTION && !read)
860 ctxt->fi.error_code |= X86_PF_WRITE;
866 /* Can never be greater than 8 */
869 ghcb_set_sw_scratch(ghcb, ghcb_pa + offsetof(struct ghcb, shared_buffer));
871 return sev_es_ghcb_hv_call(ghcb, true, ctxt, exit_code, exit_info_1, exit_info_2);
874 static enum es_result vc_handle_mmio_twobyte_ops(struct ghcb *ghcb,
875 struct es_em_ctxt *ctxt)
877 struct insn *insn = &ctxt->insn;
878 unsigned int bytes = 0;
883 switch (insn->opcode.bytes[1]) {
884 /* MMIO Read w/ zero-extension */
892 ret = vc_do_mmio(ghcb, ctxt, bytes, true);
896 /* Zero extend based on operand size */
897 reg_data = vc_insn_get_reg(ctxt);
899 return ES_DECODE_FAILED;
901 memset(reg_data, 0, insn->opnd_bytes);
903 memcpy(reg_data, ghcb->shared_buffer, bytes);
906 /* MMIO Read w/ sign-extension */
914 ret = vc_do_mmio(ghcb, ctxt, bytes, true);
918 /* Sign extend based on operand size */
919 reg_data = vc_insn_get_reg(ctxt);
921 return ES_DECODE_FAILED;
924 u8 *val = (u8 *)ghcb->shared_buffer;
926 sign_byte = (*val & 0x80) ? 0xff : 0x00;
928 u16 *val = (u16 *)ghcb->shared_buffer;
930 sign_byte = (*val & 0x8000) ? 0xff : 0x00;
932 memset(reg_data, sign_byte, insn->opnd_bytes);
934 memcpy(reg_data, ghcb->shared_buffer, bytes);
938 ret = ES_UNSUPPORTED;
945 * The MOVS instruction has two memory operands, which raises the
946 * problem that it is not known whether the access to the source or the
947 * destination caused the #VC exception (and hence whether an MMIO read
948 * or write operation needs to be emulated).
950 * Instead of playing games with walking page-tables and trying to guess
951 * whether the source or destination is an MMIO range, split the move
952 * into two operations, a read and a write with only one memory operand.
953 * This will cause a nested #VC exception on the MMIO address which can
956 * This implementation has the benefit that it also supports MOVS where
957 * source _and_ destination are MMIO regions.
959 * It will slow MOVS on MMIO down a lot, but in SEV-ES guests it is a
960 * rare operation. If it turns out to be a performance problem the split
961 * operations can be moved to memcpy_fromio() and memcpy_toio().
963 static enum es_result vc_handle_mmio_movs(struct es_em_ctxt *ctxt,
966 unsigned long ds_base, es_base;
967 unsigned char *src, *dst;
968 unsigned char buffer[8];
973 ds_base = insn_get_seg_base(ctxt->regs, INAT_SEG_REG_DS);
974 es_base = insn_get_seg_base(ctxt->regs, INAT_SEG_REG_ES);
976 if (ds_base == -1L || es_base == -1L) {
977 ctxt->fi.vector = X86_TRAP_GP;
978 ctxt->fi.error_code = 0;
982 src = ds_base + (unsigned char *)ctxt->regs->si;
983 dst = es_base + (unsigned char *)ctxt->regs->di;
985 ret = vc_read_mem(ctxt, src, buffer, bytes);
989 ret = vc_write_mem(ctxt, dst, buffer, bytes);
993 if (ctxt->regs->flags & X86_EFLAGS_DF)
998 ctxt->regs->si += off;
999 ctxt->regs->di += off;
1001 rep = insn_has_rep_prefix(&ctxt->insn);
1003 ctxt->regs->cx -= 1;
1005 if (!rep || ctxt->regs->cx == 0)
1011 static enum es_result vc_handle_mmio(struct ghcb *ghcb,
1012 struct es_em_ctxt *ctxt)
1014 struct insn *insn = &ctxt->insn;
1015 unsigned int bytes = 0;
1019 switch (insn->opcode.bytes[0]) {
1026 bytes = insn->opnd_bytes;
1028 reg_data = vc_insn_get_reg(ctxt);
1030 return ES_DECODE_FAILED;
1032 memcpy(ghcb->shared_buffer, reg_data, bytes);
1034 ret = vc_do_mmio(ghcb, ctxt, bytes, false);
1042 bytes = insn->opnd_bytes;
1044 memcpy(ghcb->shared_buffer, insn->immediate1.bytes, bytes);
1046 ret = vc_do_mmio(ghcb, ctxt, bytes, false);
1055 bytes = insn->opnd_bytes;
1057 ret = vc_do_mmio(ghcb, ctxt, bytes, true);
1061 reg_data = vc_insn_get_reg(ctxt);
1063 return ES_DECODE_FAILED;
1065 /* Zero-extend for 32-bit operation */
1069 memcpy(reg_data, ghcb->shared_buffer, bytes);
1072 /* MOVS instruction */
1078 bytes = insn->opnd_bytes;
1080 ret = vc_handle_mmio_movs(ctxt, bytes);
1082 /* Two-Byte Opcodes */
1084 ret = vc_handle_mmio_twobyte_ops(ghcb, ctxt);
1087 ret = ES_UNSUPPORTED;
1093 static enum es_result vc_handle_dr7_write(struct ghcb *ghcb,
1094 struct es_em_ctxt *ctxt)
1096 struct sev_es_runtime_data *data = this_cpu_read(runtime_data);
1097 long val, *reg = vc_insn_get_rm(ctxt);
1101 return ES_DECODE_FAILED;
1105 /* Upper 32 bits must be written as zeroes */
1107 ctxt->fi.vector = X86_TRAP_GP;
1108 ctxt->fi.error_code = 0;
1109 return ES_EXCEPTION;
1112 /* Clear out other reserved bits and set bit 10 */
1113 val = (val & 0xffff23ffL) | BIT(10);
1115 /* Early non-zero writes to DR7 are not supported */
1116 if (!data && (val & ~DR7_RESET_VALUE))
1117 return ES_UNSUPPORTED;
1119 /* Using a value of 0 for ExitInfo1 means RAX holds the value */
1120 ghcb_set_rax(ghcb, val);
1121 ret = sev_es_ghcb_hv_call(ghcb, true, ctxt, SVM_EXIT_WRITE_DR7, 0, 0);
1131 static enum es_result vc_handle_dr7_read(struct ghcb *ghcb,
1132 struct es_em_ctxt *ctxt)
1134 struct sev_es_runtime_data *data = this_cpu_read(runtime_data);
1135 long *reg = vc_insn_get_rm(ctxt);
1138 return ES_DECODE_FAILED;
1143 *reg = DR7_RESET_VALUE;
1148 static enum es_result vc_handle_wbinvd(struct ghcb *ghcb,
1149 struct es_em_ctxt *ctxt)
1151 return sev_es_ghcb_hv_call(ghcb, true, ctxt, SVM_EXIT_WBINVD, 0, 0);
1154 static enum es_result vc_handle_rdpmc(struct ghcb *ghcb, struct es_em_ctxt *ctxt)
1158 ghcb_set_rcx(ghcb, ctxt->regs->cx);
1160 ret = sev_es_ghcb_hv_call(ghcb, true, ctxt, SVM_EXIT_RDPMC, 0, 0);
1164 if (!(ghcb_rax_is_valid(ghcb) && ghcb_rdx_is_valid(ghcb)))
1165 return ES_VMM_ERROR;
1167 ctxt->regs->ax = ghcb->save.rax;
1168 ctxt->regs->dx = ghcb->save.rdx;
1173 static enum es_result vc_handle_monitor(struct ghcb *ghcb,
1174 struct es_em_ctxt *ctxt)
1177 * Treat it as a NOP and do not leak a physical address to the
1183 static enum es_result vc_handle_mwait(struct ghcb *ghcb,
1184 struct es_em_ctxt *ctxt)
1186 /* Treat the same as MONITOR/MONITORX */
1190 static enum es_result vc_handle_vmmcall(struct ghcb *ghcb,
1191 struct es_em_ctxt *ctxt)
1195 ghcb_set_rax(ghcb, ctxt->regs->ax);
1196 ghcb_set_cpl(ghcb, user_mode(ctxt->regs) ? 3 : 0);
1198 if (x86_platform.hyper.sev_es_hcall_prepare)
1199 x86_platform.hyper.sev_es_hcall_prepare(ghcb, ctxt->regs);
1201 ret = sev_es_ghcb_hv_call(ghcb, true, ctxt, SVM_EXIT_VMMCALL, 0, 0);
1205 if (!ghcb_rax_is_valid(ghcb))
1206 return ES_VMM_ERROR;
1208 ctxt->regs->ax = ghcb->save.rax;
1211 * Call sev_es_hcall_finish() after regs->ax is already set.
1212 * This allows the hypervisor handler to overwrite it again if
1215 if (x86_platform.hyper.sev_es_hcall_finish &&
1216 !x86_platform.hyper.sev_es_hcall_finish(ghcb, ctxt->regs))
1217 return ES_VMM_ERROR;
1222 static enum es_result vc_handle_trap_ac(struct ghcb *ghcb,
1223 struct es_em_ctxt *ctxt)
1226 * Calling ecx_alignment_check() directly does not work, because it
1227 * enables IRQs and the GHCB is active. Forward the exception and call
1228 * it later from vc_forward_exception().
1230 ctxt->fi.vector = X86_TRAP_AC;
1231 ctxt->fi.error_code = 0;
1232 return ES_EXCEPTION;
1235 static enum es_result vc_handle_exitcode(struct es_em_ctxt *ctxt,
1237 unsigned long exit_code)
1239 enum es_result result;
1241 switch (exit_code) {
1242 case SVM_EXIT_READ_DR7:
1243 result = vc_handle_dr7_read(ghcb, ctxt);
1245 case SVM_EXIT_WRITE_DR7:
1246 result = vc_handle_dr7_write(ghcb, ctxt);
1248 case SVM_EXIT_EXCP_BASE + X86_TRAP_AC:
1249 result = vc_handle_trap_ac(ghcb, ctxt);
1251 case SVM_EXIT_RDTSC:
1252 case SVM_EXIT_RDTSCP:
1253 result = vc_handle_rdtsc(ghcb, ctxt, exit_code);
1255 case SVM_EXIT_RDPMC:
1256 result = vc_handle_rdpmc(ghcb, ctxt);
1259 pr_err_ratelimited("#VC exception for INVD??? Seriously???\n");
1260 result = ES_UNSUPPORTED;
1262 case SVM_EXIT_CPUID:
1263 result = vc_handle_cpuid(ghcb, ctxt);
1266 result = vc_handle_ioio(ghcb, ctxt);
1269 result = vc_handle_msr(ghcb, ctxt);
1271 case SVM_EXIT_VMMCALL:
1272 result = vc_handle_vmmcall(ghcb, ctxt);
1274 case SVM_EXIT_WBINVD:
1275 result = vc_handle_wbinvd(ghcb, ctxt);
1277 case SVM_EXIT_MONITOR:
1278 result = vc_handle_monitor(ghcb, ctxt);
1280 case SVM_EXIT_MWAIT:
1281 result = vc_handle_mwait(ghcb, ctxt);
1284 result = vc_handle_mmio(ghcb, ctxt);
1288 * Unexpected #VC exception
1290 result = ES_UNSUPPORTED;
1296 static __always_inline void vc_forward_exception(struct es_em_ctxt *ctxt)
1298 long error_code = ctxt->fi.error_code;
1299 int trapnr = ctxt->fi.vector;
1301 ctxt->regs->orig_ax = ctxt->fi.error_code;
1305 exc_general_protection(ctxt->regs, error_code);
1308 exc_invalid_op(ctxt->regs);
1311 write_cr2(ctxt->fi.cr2);
1312 exc_page_fault(ctxt->regs, error_code);
1315 exc_alignment_check(ctxt->regs, error_code);
1318 pr_emerg("Unsupported exception in #VC instruction emulation - can't continue\n");
1323 static __always_inline bool is_vc2_stack(unsigned long sp)
1325 return (sp >= __this_cpu_ist_bottom_va(VC2) && sp < __this_cpu_ist_top_va(VC2));
1328 static __always_inline bool vc_from_invalid_context(struct pt_regs *regs)
1330 unsigned long sp, prev_sp;
1332 sp = (unsigned long)regs;
1336 * If the code was already executing on the VC2 stack when the #VC
1337 * happened, let it proceed to the normal handling routine. This way the
1338 * code executing on the VC2 stack can cause #VC exceptions to get handled.
1340 return is_vc2_stack(sp) && !is_vc2_stack(prev_sp);
1343 static bool vc_raw_handle_exception(struct pt_regs *regs, unsigned long error_code)
1345 struct ghcb_state state;
1346 struct es_em_ctxt ctxt;
1347 enum es_result result;
1351 ghcb = __sev_get_ghcb(&state);
1353 vc_ghcb_invalidate(ghcb);
1354 result = vc_init_em_ctxt(&ctxt, regs, error_code);
1356 if (result == ES_OK)
1357 result = vc_handle_exitcode(&ctxt, ghcb, error_code);
1359 __sev_put_ghcb(&state);
1361 /* Done - now check the result */
1364 vc_finish_insn(&ctxt);
1366 case ES_UNSUPPORTED:
1367 pr_err_ratelimited("Unsupported exit-code 0x%02lx in #VC exception (IP: 0x%lx)\n",
1368 error_code, regs->ip);
1372 pr_err_ratelimited("Failure in communication with VMM (exit-code 0x%02lx IP: 0x%lx)\n",
1373 error_code, regs->ip);
1376 case ES_DECODE_FAILED:
1377 pr_err_ratelimited("Failed to decode instruction (exit-code 0x%02lx IP: 0x%lx)\n",
1378 error_code, regs->ip);
1382 vc_forward_exception(&ctxt);
1388 pr_emerg("Unknown result in %s():%d\n", __func__, result);
1390 * Emulating the instruction which caused the #VC exception
1391 * failed - can't continue so print debug information
1399 static __always_inline bool vc_is_db(unsigned long error_code)
1401 return error_code == SVM_EXIT_EXCP_BASE + X86_TRAP_DB;
1405 * Runtime #VC exception handler when raised from kernel mode. Runs in NMI mode
1406 * and will panic when an error happens.
1408 DEFINE_IDTENTRY_VC_KERNEL(exc_vmm_communication)
1410 irqentry_state_t irq_state;
1413 * With the current implementation it is always possible to switch to a
1414 * safe stack because #VC exceptions only happen at known places, like
1415 * intercepted instructions or accesses to MMIO areas/IO ports. They can
1416 * also happen with code instrumentation when the hypervisor intercepts
1417 * #DB, but the critical paths are forbidden to be instrumented, so #DB
1418 * exceptions currently also only happen in safe places.
1420 * But keep this here in case the noinstr annotations are violated due
1423 if (unlikely(vc_from_invalid_context(regs))) {
1424 instrumentation_begin();
1425 panic("Can't handle #VC exception from unsupported context\n");
1426 instrumentation_end();
1430 * Handle #DB before calling into !noinstr code to avoid recursive #DB.
1432 if (vc_is_db(error_code)) {
1437 irq_state = irqentry_nmi_enter(regs);
1439 instrumentation_begin();
1441 if (!vc_raw_handle_exception(regs, error_code)) {
1442 /* Show some debug info */
1445 /* Ask hypervisor to sev_es_terminate */
1446 sev_es_terminate(GHCB_SEV_ES_REASON_GENERAL_REQUEST);
1448 /* If that fails and we get here - just panic */
1449 panic("Returned from Terminate-Request to Hypervisor\n");
1452 instrumentation_end();
1453 irqentry_nmi_exit(regs, irq_state);
1457 * Runtime #VC exception handler when raised from user mode. Runs in IRQ mode
1458 * and will kill the current task with SIGBUS when an error happens.
1460 DEFINE_IDTENTRY_VC_USER(exc_vmm_communication)
1463 * Handle #DB before calling into !noinstr code to avoid recursive #DB.
1465 if (vc_is_db(error_code)) {
1466 noist_exc_debug(regs);
1470 irqentry_enter_from_user_mode(regs);
1471 instrumentation_begin();
1473 if (!vc_raw_handle_exception(regs, error_code)) {
1475 * Do not kill the machine if user-space triggered the
1476 * exception. Send SIGBUS instead and let user-space deal with
1479 force_sig_fault(SIGBUS, BUS_OBJERR, (void __user *)0);
1482 instrumentation_end();
1483 irqentry_exit_to_user_mode(regs);
1486 bool __init handle_vc_boot_ghcb(struct pt_regs *regs)
1488 unsigned long exit_code = regs->orig_ax;
1489 struct es_em_ctxt ctxt;
1490 enum es_result result;
1492 /* Do initial setup or terminate the guest */
1493 if (unlikely(boot_ghcb == NULL && !sev_es_setup_ghcb()))
1494 sev_es_terminate(GHCB_SEV_ES_REASON_GENERAL_REQUEST);
1496 vc_ghcb_invalidate(boot_ghcb);
1498 result = vc_init_em_ctxt(&ctxt, regs, exit_code);
1499 if (result == ES_OK)
1500 result = vc_handle_exitcode(&ctxt, boot_ghcb, exit_code);
1502 /* Done - now check the result */
1505 vc_finish_insn(&ctxt);
1507 case ES_UNSUPPORTED:
1508 early_printk("PANIC: Unsupported exit-code 0x%02lx in early #VC exception (IP: 0x%lx)\n",
1509 exit_code, regs->ip);
1512 early_printk("PANIC: Failure in communication with VMM (exit-code 0x%02lx IP: 0x%lx)\n",
1513 exit_code, regs->ip);
1515 case ES_DECODE_FAILED:
1516 early_printk("PANIC: Failed to decode instruction (exit-code 0x%02lx IP: 0x%lx)\n",
1517 exit_code, regs->ip);
1520 vc_early_forward_exception(&ctxt);