1 // SPDX-License-Identifier: GPL-2.0-only
3 * AMD Memory Encryption Support
5 * Copyright (C) 2019 SUSE
7 * Author: Joerg Roedel <jroedel@suse.de>
10 #define pr_fmt(fmt) "SEV-ES: " fmt
12 #include <linux/sched/debug.h> /* For show_regs() */
13 #include <linux/percpu-defs.h>
14 #include <linux/mem_encrypt.h>
15 #include <linux/lockdep.h>
16 #include <linux/printk.h>
17 #include <linux/mm_types.h>
18 #include <linux/set_memory.h>
19 #include <linux/memblock.h>
20 #include <linux/kernel.h>
23 #include <asm/cpu_entry_area.h>
24 #include <asm/stacktrace.h>
25 #include <asm/sev-es.h>
26 #include <asm/insn-eval.h>
27 #include <asm/fpu/internal.h>
28 #include <asm/processor.h>
29 #include <asm/realmode.h>
30 #include <asm/traps.h>
35 #define DR7_RESET_VALUE 0x400
37 /* For early boot hypervisor communication in SEV-ES enabled guests */
38 static struct ghcb boot_ghcb_page __bss_decrypted __aligned(PAGE_SIZE);
41 * Needs to be in the .data section because we need it NULL before bss is
44 static struct ghcb __initdata *boot_ghcb;
46 /* #VC handler runtime per-CPU data */
47 struct sev_es_runtime_data {
48 struct ghcb ghcb_page;
50 /* Physical storage for the per-CPU IST stack of the #VC handler */
51 char ist_stack[EXCEPTION_STKSZ] __aligned(PAGE_SIZE);
54 * Physical storage for the per-CPU fall-back stack of the #VC handler.
55 * The fall-back stack is used when it is not safe to switch back to the
56 * interrupted stack in the #VC entry code.
58 char fallback_stack[EXCEPTION_STKSZ] __aligned(PAGE_SIZE);
61 * Reserve one page per CPU as backup storage for the unencrypted GHCB.
62 * It is needed when an NMI happens while the #VC handler uses the real
63 * GHCB, and the NMI handler itself is causing another #VC exception. In
64 * that case the GHCB content of the first handler needs to be backed up
67 struct ghcb backup_ghcb;
70 * Mark the per-cpu GHCBs as in-use to detect nested #VC exceptions.
71 * There is no need for it to be atomic, because nothing is written to
72 * the GHCB between the read and the write of ghcb_active. So it is safe
73 * to use it when a nested #VC exception happens before the write.
75 * This is necessary for example in the #VC->NMI->#VC case when the NMI
76 * happens while the first #VC handler uses the GHCB. When the NMI code
77 * raises a second #VC handler it might overwrite the contents of the
78 * GHCB written by the first handler. To avoid this the content of the
79 * GHCB is saved and restored when the GHCB is detected to be in use
83 bool backup_ghcb_active;
86 * Cached DR7 value - write it on DR7 writes and return it on reads.
87 * That value will never make it to the real hardware DR7 as debugging
88 * is currently unsupported in SEV-ES guests.
97 static DEFINE_PER_CPU(struct sev_es_runtime_data*, runtime_data);
98 DEFINE_STATIC_KEY_FALSE(sev_es_enable_key);
100 /* Needed in vc_early_forward_exception */
101 void do_early_exception(struct pt_regs *regs, int trapnr);
103 static void __init setup_vc_stacks(int cpu)
105 struct sev_es_runtime_data *data;
106 struct cpu_entry_area *cea;
110 data = per_cpu(runtime_data, cpu);
111 cea = get_cpu_entry_area(cpu);
113 /* Map #VC IST stack */
114 vaddr = CEA_ESTACK_BOT(&cea->estacks, VC);
115 pa = __pa(data->ist_stack);
116 cea_set_pte((void *)vaddr, pa, PAGE_KERNEL);
118 /* Map VC fall-back stack */
119 vaddr = CEA_ESTACK_BOT(&cea->estacks, VC2);
120 pa = __pa(data->fallback_stack);
121 cea_set_pte((void *)vaddr, pa, PAGE_KERNEL);
124 static __always_inline bool on_vc_stack(struct pt_regs *regs)
126 unsigned long sp = regs->sp;
128 /* User-mode RSP is not trusted */
132 /* SYSCALL gap still has user-mode RSP */
133 if (ip_within_syscall_gap(regs))
136 return ((sp >= __this_cpu_ist_bottom_va(VC)) && (sp < __this_cpu_ist_top_va(VC)));
140 * This function handles the case when an NMI is raised in the #VC
141 * exception handler entry code, before the #VC handler has switched off
142 * its IST stack. In this case, the IST entry for #VC must be adjusted,
143 * so that any nested #VC exception will not overwrite the stack
144 * contents of the interrupted #VC handler.
146 * The IST entry is adjusted unconditionally so that it can be also be
147 * unconditionally adjusted back in __sev_es_ist_exit(). Otherwise a
148 * nested sev_es_ist_exit() call may adjust back the IST entry too
151 * The __sev_es_ist_enter() and __sev_es_ist_exit() functions always run
152 * on the NMI IST stack, as they are only called from NMI handling code
155 void noinstr __sev_es_ist_enter(struct pt_regs *regs)
157 unsigned long old_ist, new_ist;
159 /* Read old IST entry */
160 new_ist = old_ist = __this_cpu_read(cpu_tss_rw.x86_tss.ist[IST_INDEX_VC]);
163 * If NMI happened while on the #VC IST stack, set the new IST
164 * value below regs->sp, so that the interrupted stack frame is
165 * not overwritten by subsequent #VC exceptions.
167 if (on_vc_stack(regs))
171 * Reserve additional 8 bytes and store old IST value so this
172 * adjustment can be unrolled in __sev_es_ist_exit().
174 new_ist -= sizeof(old_ist);
175 *(unsigned long *)new_ist = old_ist;
177 /* Set new IST entry */
178 this_cpu_write(cpu_tss_rw.x86_tss.ist[IST_INDEX_VC], new_ist);
181 void noinstr __sev_es_ist_exit(void)
186 ist = __this_cpu_read(cpu_tss_rw.x86_tss.ist[IST_INDEX_VC]);
188 if (WARN_ON(ist == __this_cpu_ist_top_va(VC)))
191 /* Read back old IST entry and write it to the TSS */
192 this_cpu_write(cpu_tss_rw.x86_tss.ist[IST_INDEX_VC], *(unsigned long *)ist);
195 static __always_inline struct ghcb *sev_es_get_ghcb(struct ghcb_state *state)
197 struct sev_es_runtime_data *data;
200 data = this_cpu_read(runtime_data);
201 ghcb = &data->ghcb_page;
203 if (unlikely(data->ghcb_active)) {
204 /* GHCB is already in use - save its contents */
206 if (unlikely(data->backup_ghcb_active))
209 /* Mark backup_ghcb active before writing to it */
210 data->backup_ghcb_active = true;
212 state->ghcb = &data->backup_ghcb;
214 /* Backup GHCB content */
215 *state->ghcb = *ghcb;
218 data->ghcb_active = true;
224 static __always_inline void sev_es_put_ghcb(struct ghcb_state *state)
226 struct sev_es_runtime_data *data;
229 data = this_cpu_read(runtime_data);
230 ghcb = &data->ghcb_page;
233 /* Restore GHCB from Backup */
234 *ghcb = *state->ghcb;
235 data->backup_ghcb_active = false;
238 data->ghcb_active = false;
242 /* Needed in vc_early_forward_exception */
243 void do_early_exception(struct pt_regs *regs, int trapnr);
245 static inline u64 sev_es_rd_ghcb_msr(void)
247 return __rdmsr(MSR_AMD64_SEV_ES_GHCB);
250 static __always_inline void sev_es_wr_ghcb_msr(u64 val)
255 high = (u32)(val >> 32);
257 native_wrmsr(MSR_AMD64_SEV_ES_GHCB, low, high);
260 static int vc_fetch_insn_kernel(struct es_em_ctxt *ctxt,
261 unsigned char *buffer)
263 return copy_from_kernel_nofault(buffer, (unsigned char *)ctxt->regs->ip, MAX_INSN_SIZE);
266 static enum es_result __vc_decode_user_insn(struct es_em_ctxt *ctxt)
268 char buffer[MAX_INSN_SIZE];
271 res = insn_fetch_from_user_inatomic(ctxt->regs, buffer);
273 ctxt->fi.vector = X86_TRAP_PF;
274 ctxt->fi.error_code = X86_PF_INSTR | X86_PF_USER;
275 ctxt->fi.cr2 = ctxt->regs->ip;
279 if (!insn_decode_from_regs(&ctxt->insn, ctxt->regs, buffer, res))
280 return ES_DECODE_FAILED;
282 if (ctxt->insn.immediate.got)
285 return ES_DECODE_FAILED;
288 static enum es_result __vc_decode_kern_insn(struct es_em_ctxt *ctxt)
290 char buffer[MAX_INSN_SIZE];
293 res = vc_fetch_insn_kernel(ctxt, buffer);
295 ctxt->fi.vector = X86_TRAP_PF;
296 ctxt->fi.error_code = X86_PF_INSTR;
297 ctxt->fi.cr2 = ctxt->regs->ip;
301 ret = insn_decode(&ctxt->insn, buffer, MAX_INSN_SIZE, INSN_MODE_64);
303 return ES_DECODE_FAILED;
308 static enum es_result vc_decode_insn(struct es_em_ctxt *ctxt)
310 if (user_mode(ctxt->regs))
311 return __vc_decode_user_insn(ctxt);
313 return __vc_decode_kern_insn(ctxt);
316 static enum es_result vc_write_mem(struct es_em_ctxt *ctxt,
317 char *dst, char *buf, size_t size)
319 unsigned long error_code = X86_PF_PROT | X86_PF_WRITE;
320 char __user *target = (char __user *)dst;
326 /* If instruction ran in kernel mode and the I/O buffer is in kernel space */
327 if (!user_mode(ctxt->regs) && !access_ok(target, size)) {
328 memcpy(dst, buf, size);
335 if (put_user(d1, target))
340 if (put_user(d2, target))
345 if (put_user(d4, target))
350 if (put_user(d8, target))
354 WARN_ONCE(1, "%s: Invalid size: %zu\n", __func__, size);
355 return ES_UNSUPPORTED;
361 if (user_mode(ctxt->regs))
362 error_code |= X86_PF_USER;
364 ctxt->fi.vector = X86_TRAP_PF;
365 ctxt->fi.error_code = error_code;
366 ctxt->fi.cr2 = (unsigned long)dst;
371 static enum es_result vc_read_mem(struct es_em_ctxt *ctxt,
372 char *src, char *buf, size_t size)
374 unsigned long error_code = X86_PF_PROT;
375 char __user *s = (char __user *)src;
381 /* If instruction ran in kernel mode and the I/O buffer is in kernel space */
382 if (!user_mode(ctxt->regs) && !access_ok(s, size)) {
383 memcpy(buf, src, size);
409 WARN_ONCE(1, "%s: Invalid size: %zu\n", __func__, size);
410 return ES_UNSUPPORTED;
416 if (user_mode(ctxt->regs))
417 error_code |= X86_PF_USER;
419 ctxt->fi.vector = X86_TRAP_PF;
420 ctxt->fi.error_code = error_code;
421 ctxt->fi.cr2 = (unsigned long)src;
426 static enum es_result vc_slow_virt_to_phys(struct ghcb *ghcb, struct es_em_ctxt *ctxt,
427 unsigned long vaddr, phys_addr_t *paddr)
429 unsigned long va = (unsigned long)vaddr;
435 pgd = __va(read_cr3_pa());
436 pgd = &pgd[pgd_index(va)];
437 pte = lookup_address_in_pgd(pgd, va, &level);
439 ctxt->fi.vector = X86_TRAP_PF;
440 ctxt->fi.cr2 = vaddr;
441 ctxt->fi.error_code = 0;
443 if (user_mode(ctxt->regs))
444 ctxt->fi.error_code |= X86_PF_USER;
449 if (WARN_ON_ONCE(pte_val(*pte) & _PAGE_ENC))
450 /* Emulated MMIO to/from encrypted memory not supported */
451 return ES_UNSUPPORTED;
453 pa = (phys_addr_t)pte_pfn(*pte) << PAGE_SHIFT;
454 pa |= va & ~page_level_mask(level);
461 /* Include code shared with pre-decompression boot stage */
462 #include "sev-es-shared.c"
464 void noinstr __sev_es_nmi_complete(void)
466 struct ghcb_state state;
469 ghcb = sev_es_get_ghcb(&state);
471 vc_ghcb_invalidate(ghcb);
472 ghcb_set_sw_exit_code(ghcb, SVM_VMGEXIT_NMI_COMPLETE);
473 ghcb_set_sw_exit_info_1(ghcb, 0);
474 ghcb_set_sw_exit_info_2(ghcb, 0);
476 sev_es_wr_ghcb_msr(__pa_nodebug(ghcb));
479 sev_es_put_ghcb(&state);
482 static u64 get_jump_table_addr(void)
484 struct ghcb_state state;
489 local_irq_save(flags);
491 ghcb = sev_es_get_ghcb(&state);
493 vc_ghcb_invalidate(ghcb);
494 ghcb_set_sw_exit_code(ghcb, SVM_VMGEXIT_AP_JUMP_TABLE);
495 ghcb_set_sw_exit_info_1(ghcb, SVM_VMGEXIT_GET_AP_JUMP_TABLE);
496 ghcb_set_sw_exit_info_2(ghcb, 0);
498 sev_es_wr_ghcb_msr(__pa(ghcb));
501 if (ghcb_sw_exit_info_1_is_valid(ghcb) &&
502 ghcb_sw_exit_info_2_is_valid(ghcb))
503 ret = ghcb->save.sw_exit_info_2;
505 sev_es_put_ghcb(&state);
507 local_irq_restore(flags);
512 int sev_es_setup_ap_jump_table(struct real_mode_header *rmh)
514 u16 startup_cs, startup_ip;
515 phys_addr_t jump_table_pa;
517 u16 __iomem *jump_table;
519 jump_table_addr = get_jump_table_addr();
521 /* On UP guests there is no jump table so this is not a failure */
522 if (!jump_table_addr)
525 /* Check if AP Jump Table is page-aligned */
526 if (jump_table_addr & ~PAGE_MASK)
529 jump_table_pa = jump_table_addr & PAGE_MASK;
531 startup_cs = (u16)(rmh->trampoline_start >> 4);
532 startup_ip = (u16)(rmh->sev_es_trampoline_start -
533 rmh->trampoline_start);
535 jump_table = ioremap_encrypted(jump_table_pa, PAGE_SIZE);
539 writew(startup_ip, &jump_table[0]);
540 writew(startup_cs, &jump_table[1]);
548 * This is needed by the OVMF UEFI firmware which will use whatever it finds in
549 * the GHCB MSR as its GHCB to talk to the hypervisor. So make sure the per-cpu
550 * runtime GHCBs used by the kernel are also mapped in the EFI page-table.
552 int __init sev_es_efi_map_ghcbs(pgd_t *pgd)
554 struct sev_es_runtime_data *data;
555 unsigned long address, pflags;
559 if (!sev_es_active())
562 pflags = _PAGE_NX | _PAGE_RW;
564 for_each_possible_cpu(cpu) {
565 data = per_cpu(runtime_data, cpu);
567 address = __pa(&data->ghcb_page);
568 pfn = address >> PAGE_SHIFT;
570 if (kernel_map_pages_in_pgd(pgd, pfn, address, 1, pflags))
577 static enum es_result vc_handle_msr(struct ghcb *ghcb, struct es_em_ctxt *ctxt)
579 struct pt_regs *regs = ctxt->regs;
584 exit_info_1 = (ctxt->insn.opcode.bytes[1] == 0x30) ? 1 : 0;
586 ghcb_set_rcx(ghcb, regs->cx);
588 ghcb_set_rax(ghcb, regs->ax);
589 ghcb_set_rdx(ghcb, regs->dx);
592 ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_MSR, exit_info_1, 0);
594 if ((ret == ES_OK) && (!exit_info_1)) {
595 regs->ax = ghcb->save.rax;
596 regs->dx = ghcb->save.rdx;
603 * This function runs on the first #VC exception after the kernel
604 * switched to virtual addresses.
606 static bool __init sev_es_setup_ghcb(void)
608 /* First make sure the hypervisor talks a supported protocol. */
609 if (!sev_es_negotiate_protocol())
613 * Clear the boot_ghcb. The first exception comes in before the bss
614 * section is cleared.
616 memset(&boot_ghcb_page, 0, PAGE_SIZE);
618 /* Alright - Make the boot-ghcb public */
619 boot_ghcb = &boot_ghcb_page;
624 #ifdef CONFIG_HOTPLUG_CPU
625 static void sev_es_ap_hlt_loop(void)
627 struct ghcb_state state;
630 ghcb = sev_es_get_ghcb(&state);
633 vc_ghcb_invalidate(ghcb);
634 ghcb_set_sw_exit_code(ghcb, SVM_VMGEXIT_AP_HLT_LOOP);
635 ghcb_set_sw_exit_info_1(ghcb, 0);
636 ghcb_set_sw_exit_info_2(ghcb, 0);
638 sev_es_wr_ghcb_msr(__pa(ghcb));
642 if (ghcb_sw_exit_info_2_is_valid(ghcb) &&
643 ghcb->save.sw_exit_info_2)
647 sev_es_put_ghcb(&state);
651 * Play_dead handler when running under SEV-ES. This is needed because
652 * the hypervisor can't deliver an SIPI request to restart the AP.
653 * Instead the kernel has to issue a VMGEXIT to halt the VCPU until the
654 * hypervisor wakes it up again.
656 static void sev_es_play_dead(void)
660 /* IRQs now disabled */
662 sev_es_ap_hlt_loop();
665 * If we get here, the VCPU was woken up again. Jump to CPU
666 * startup code to get it back online.
670 #else /* CONFIG_HOTPLUG_CPU */
671 #define sev_es_play_dead native_play_dead
672 #endif /* CONFIG_HOTPLUG_CPU */
675 static void __init sev_es_setup_play_dead(void)
677 smp_ops.play_dead = sev_es_play_dead;
680 static inline void sev_es_setup_play_dead(void) { }
683 static void __init alloc_runtime_data(int cpu)
685 struct sev_es_runtime_data *data;
687 data = memblock_alloc(sizeof(*data), PAGE_SIZE);
689 panic("Can't allocate SEV-ES runtime data");
691 per_cpu(runtime_data, cpu) = data;
694 static void __init init_ghcb(int cpu)
696 struct sev_es_runtime_data *data;
699 data = per_cpu(runtime_data, cpu);
701 err = early_set_memory_decrypted((unsigned long)&data->ghcb_page,
702 sizeof(data->ghcb_page));
704 panic("Can't map GHCBs unencrypted");
706 memset(&data->ghcb_page, 0, sizeof(data->ghcb_page));
708 data->ghcb_active = false;
709 data->backup_ghcb_active = false;
712 void __init sev_es_init_vc_handling(void)
716 BUILD_BUG_ON(offsetof(struct sev_es_runtime_data, ghcb_page) % PAGE_SIZE);
718 if (!sev_es_active())
721 if (!sev_es_check_cpu_features())
722 panic("SEV-ES CPU Features missing");
724 /* Enable SEV-ES special handling */
725 static_branch_enable(&sev_es_enable_key);
727 /* Initialize per-cpu GHCB pages */
728 for_each_possible_cpu(cpu) {
729 alloc_runtime_data(cpu);
731 setup_vc_stacks(cpu);
734 sev_es_setup_play_dead();
736 /* Secondary CPUs use the runtime #VC handler */
737 initial_vc_handler = (unsigned long)safe_stack_exc_vmm_communication;
740 static void __init vc_early_forward_exception(struct es_em_ctxt *ctxt)
742 int trapnr = ctxt->fi.vector;
744 if (trapnr == X86_TRAP_PF)
745 native_write_cr2(ctxt->fi.cr2);
747 ctxt->regs->orig_ax = ctxt->fi.error_code;
748 do_early_exception(ctxt->regs, trapnr);
751 static long *vc_insn_get_reg(struct es_em_ctxt *ctxt)
756 reg_array = (long *)ctxt->regs;
757 offset = insn_get_modrm_reg_off(&ctxt->insn, ctxt->regs);
762 offset /= sizeof(long);
764 return reg_array + offset;
767 static long *vc_insn_get_rm(struct es_em_ctxt *ctxt)
772 reg_array = (long *)ctxt->regs;
773 offset = insn_get_modrm_rm_off(&ctxt->insn, ctxt->regs);
778 offset /= sizeof(long);
780 return reg_array + offset;
782 static enum es_result vc_do_mmio(struct ghcb *ghcb, struct es_em_ctxt *ctxt,
783 unsigned int bytes, bool read)
785 u64 exit_code, exit_info_1, exit_info_2;
786 unsigned long ghcb_pa = __pa(ghcb);
791 ref = insn_get_addr_ref(&ctxt->insn, ctxt->regs);
792 if (ref == (void __user *)-1L)
793 return ES_UNSUPPORTED;
795 exit_code = read ? SVM_VMGEXIT_MMIO_READ : SVM_VMGEXIT_MMIO_WRITE;
797 res = vc_slow_virt_to_phys(ghcb, ctxt, (unsigned long)ref, &paddr);
799 if (res == ES_EXCEPTION && !read)
800 ctxt->fi.error_code |= X86_PF_WRITE;
806 /* Can never be greater than 8 */
809 ghcb_set_sw_scratch(ghcb, ghcb_pa + offsetof(struct ghcb, shared_buffer));
811 return sev_es_ghcb_hv_call(ghcb, ctxt, exit_code, exit_info_1, exit_info_2);
814 static enum es_result vc_handle_mmio_twobyte_ops(struct ghcb *ghcb,
815 struct es_em_ctxt *ctxt)
817 struct insn *insn = &ctxt->insn;
818 unsigned int bytes = 0;
823 switch (insn->opcode.bytes[1]) {
824 /* MMIO Read w/ zero-extension */
832 ret = vc_do_mmio(ghcb, ctxt, bytes, true);
836 /* Zero extend based on operand size */
837 reg_data = vc_insn_get_reg(ctxt);
839 return ES_DECODE_FAILED;
841 memset(reg_data, 0, insn->opnd_bytes);
843 memcpy(reg_data, ghcb->shared_buffer, bytes);
846 /* MMIO Read w/ sign-extension */
854 ret = vc_do_mmio(ghcb, ctxt, bytes, true);
858 /* Sign extend based on operand size */
859 reg_data = vc_insn_get_reg(ctxt);
861 return ES_DECODE_FAILED;
864 u8 *val = (u8 *)ghcb->shared_buffer;
866 sign_byte = (*val & 0x80) ? 0xff : 0x00;
868 u16 *val = (u16 *)ghcb->shared_buffer;
870 sign_byte = (*val & 0x8000) ? 0xff : 0x00;
872 memset(reg_data, sign_byte, insn->opnd_bytes);
874 memcpy(reg_data, ghcb->shared_buffer, bytes);
878 ret = ES_UNSUPPORTED;
885 * The MOVS instruction has two memory operands, which raises the
886 * problem that it is not known whether the access to the source or the
887 * destination caused the #VC exception (and hence whether an MMIO read
888 * or write operation needs to be emulated).
890 * Instead of playing games with walking page-tables and trying to guess
891 * whether the source or destination is an MMIO range, split the move
892 * into two operations, a read and a write with only one memory operand.
893 * This will cause a nested #VC exception on the MMIO address which can
896 * This implementation has the benefit that it also supports MOVS where
897 * source _and_ destination are MMIO regions.
899 * It will slow MOVS on MMIO down a lot, but in SEV-ES guests it is a
900 * rare operation. If it turns out to be a performance problem the split
901 * operations can be moved to memcpy_fromio() and memcpy_toio().
903 static enum es_result vc_handle_mmio_movs(struct es_em_ctxt *ctxt,
906 unsigned long ds_base, es_base;
907 unsigned char *src, *dst;
908 unsigned char buffer[8];
913 ds_base = insn_get_seg_base(ctxt->regs, INAT_SEG_REG_DS);
914 es_base = insn_get_seg_base(ctxt->regs, INAT_SEG_REG_ES);
916 if (ds_base == -1L || es_base == -1L) {
917 ctxt->fi.vector = X86_TRAP_GP;
918 ctxt->fi.error_code = 0;
922 src = ds_base + (unsigned char *)ctxt->regs->si;
923 dst = es_base + (unsigned char *)ctxt->regs->di;
925 ret = vc_read_mem(ctxt, src, buffer, bytes);
929 ret = vc_write_mem(ctxt, dst, buffer, bytes);
933 if (ctxt->regs->flags & X86_EFLAGS_DF)
938 ctxt->regs->si += off;
939 ctxt->regs->di += off;
941 rep = insn_has_rep_prefix(&ctxt->insn);
945 if (!rep || ctxt->regs->cx == 0)
951 static enum es_result vc_handle_mmio(struct ghcb *ghcb,
952 struct es_em_ctxt *ctxt)
954 struct insn *insn = &ctxt->insn;
955 unsigned int bytes = 0;
959 switch (insn->opcode.bytes[0]) {
966 bytes = insn->opnd_bytes;
968 reg_data = vc_insn_get_reg(ctxt);
970 return ES_DECODE_FAILED;
972 memcpy(ghcb->shared_buffer, reg_data, bytes);
974 ret = vc_do_mmio(ghcb, ctxt, bytes, false);
982 bytes = insn->opnd_bytes;
984 memcpy(ghcb->shared_buffer, insn->immediate1.bytes, bytes);
986 ret = vc_do_mmio(ghcb, ctxt, bytes, false);
995 bytes = insn->opnd_bytes;
997 ret = vc_do_mmio(ghcb, ctxt, bytes, true);
1001 reg_data = vc_insn_get_reg(ctxt);
1003 return ES_DECODE_FAILED;
1005 /* Zero-extend for 32-bit operation */
1009 memcpy(reg_data, ghcb->shared_buffer, bytes);
1012 /* MOVS instruction */
1018 bytes = insn->opnd_bytes;
1020 ret = vc_handle_mmio_movs(ctxt, bytes);
1022 /* Two-Byte Opcodes */
1024 ret = vc_handle_mmio_twobyte_ops(ghcb, ctxt);
1027 ret = ES_UNSUPPORTED;
1033 static enum es_result vc_handle_dr7_write(struct ghcb *ghcb,
1034 struct es_em_ctxt *ctxt)
1036 struct sev_es_runtime_data *data = this_cpu_read(runtime_data);
1037 long val, *reg = vc_insn_get_rm(ctxt);
1041 return ES_DECODE_FAILED;
1045 /* Upper 32 bits must be written as zeroes */
1047 ctxt->fi.vector = X86_TRAP_GP;
1048 ctxt->fi.error_code = 0;
1049 return ES_EXCEPTION;
1052 /* Clear out other reserved bits and set bit 10 */
1053 val = (val & 0xffff23ffL) | BIT(10);
1055 /* Early non-zero writes to DR7 are not supported */
1056 if (!data && (val & ~DR7_RESET_VALUE))
1057 return ES_UNSUPPORTED;
1059 /* Using a value of 0 for ExitInfo1 means RAX holds the value */
1060 ghcb_set_rax(ghcb, val);
1061 ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_WRITE_DR7, 0, 0);
1071 static enum es_result vc_handle_dr7_read(struct ghcb *ghcb,
1072 struct es_em_ctxt *ctxt)
1074 struct sev_es_runtime_data *data = this_cpu_read(runtime_data);
1075 long *reg = vc_insn_get_rm(ctxt);
1078 return ES_DECODE_FAILED;
1083 *reg = DR7_RESET_VALUE;
1088 static enum es_result vc_handle_wbinvd(struct ghcb *ghcb,
1089 struct es_em_ctxt *ctxt)
1091 return sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_WBINVD, 0, 0);
1094 static enum es_result vc_handle_rdpmc(struct ghcb *ghcb, struct es_em_ctxt *ctxt)
1098 ghcb_set_rcx(ghcb, ctxt->regs->cx);
1100 ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_RDPMC, 0, 0);
1104 if (!(ghcb_rax_is_valid(ghcb) && ghcb_rdx_is_valid(ghcb)))
1105 return ES_VMM_ERROR;
1107 ctxt->regs->ax = ghcb->save.rax;
1108 ctxt->regs->dx = ghcb->save.rdx;
1113 static enum es_result vc_handle_monitor(struct ghcb *ghcb,
1114 struct es_em_ctxt *ctxt)
1117 * Treat it as a NOP and do not leak a physical address to the
1123 static enum es_result vc_handle_mwait(struct ghcb *ghcb,
1124 struct es_em_ctxt *ctxt)
1126 /* Treat the same as MONITOR/MONITORX */
1130 static enum es_result vc_handle_vmmcall(struct ghcb *ghcb,
1131 struct es_em_ctxt *ctxt)
1135 ghcb_set_rax(ghcb, ctxt->regs->ax);
1136 ghcb_set_cpl(ghcb, user_mode(ctxt->regs) ? 3 : 0);
1138 if (x86_platform.hyper.sev_es_hcall_prepare)
1139 x86_platform.hyper.sev_es_hcall_prepare(ghcb, ctxt->regs);
1141 ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_VMMCALL, 0, 0);
1145 if (!ghcb_rax_is_valid(ghcb))
1146 return ES_VMM_ERROR;
1148 ctxt->regs->ax = ghcb->save.rax;
1151 * Call sev_es_hcall_finish() after regs->ax is already set.
1152 * This allows the hypervisor handler to overwrite it again if
1155 if (x86_platform.hyper.sev_es_hcall_finish &&
1156 !x86_platform.hyper.sev_es_hcall_finish(ghcb, ctxt->regs))
1157 return ES_VMM_ERROR;
1162 static enum es_result vc_handle_trap_ac(struct ghcb *ghcb,
1163 struct es_em_ctxt *ctxt)
1166 * Calling ecx_alignment_check() directly does not work, because it
1167 * enables IRQs and the GHCB is active. Forward the exception and call
1168 * it later from vc_forward_exception().
1170 ctxt->fi.vector = X86_TRAP_AC;
1171 ctxt->fi.error_code = 0;
1172 return ES_EXCEPTION;
1175 static __always_inline void vc_handle_trap_db(struct pt_regs *regs)
1177 if (user_mode(regs))
1178 noist_exc_debug(regs);
1183 static enum es_result vc_handle_exitcode(struct es_em_ctxt *ctxt,
1185 unsigned long exit_code)
1187 enum es_result result;
1189 switch (exit_code) {
1190 case SVM_EXIT_READ_DR7:
1191 result = vc_handle_dr7_read(ghcb, ctxt);
1193 case SVM_EXIT_WRITE_DR7:
1194 result = vc_handle_dr7_write(ghcb, ctxt);
1196 case SVM_EXIT_EXCP_BASE + X86_TRAP_AC:
1197 result = vc_handle_trap_ac(ghcb, ctxt);
1199 case SVM_EXIT_RDTSC:
1200 case SVM_EXIT_RDTSCP:
1201 result = vc_handle_rdtsc(ghcb, ctxt, exit_code);
1203 case SVM_EXIT_RDPMC:
1204 result = vc_handle_rdpmc(ghcb, ctxt);
1207 pr_err_ratelimited("#VC exception for INVD??? Seriously???\n");
1208 result = ES_UNSUPPORTED;
1210 case SVM_EXIT_CPUID:
1211 result = vc_handle_cpuid(ghcb, ctxt);
1214 result = vc_handle_ioio(ghcb, ctxt);
1217 result = vc_handle_msr(ghcb, ctxt);
1219 case SVM_EXIT_VMMCALL:
1220 result = vc_handle_vmmcall(ghcb, ctxt);
1222 case SVM_EXIT_WBINVD:
1223 result = vc_handle_wbinvd(ghcb, ctxt);
1225 case SVM_EXIT_MONITOR:
1226 result = vc_handle_monitor(ghcb, ctxt);
1228 case SVM_EXIT_MWAIT:
1229 result = vc_handle_mwait(ghcb, ctxt);
1232 result = vc_handle_mmio(ghcb, ctxt);
1236 * Unexpected #VC exception
1238 result = ES_UNSUPPORTED;
1244 static __always_inline void vc_forward_exception(struct es_em_ctxt *ctxt)
1246 long error_code = ctxt->fi.error_code;
1247 int trapnr = ctxt->fi.vector;
1249 ctxt->regs->orig_ax = ctxt->fi.error_code;
1253 exc_general_protection(ctxt->regs, error_code);
1256 exc_invalid_op(ctxt->regs);
1259 exc_alignment_check(ctxt->regs, error_code);
1262 pr_emerg("Unsupported exception in #VC instruction emulation - can't continue\n");
1267 static __always_inline bool on_vc_fallback_stack(struct pt_regs *regs)
1269 unsigned long sp = (unsigned long)regs;
1271 return (sp >= __this_cpu_ist_bottom_va(VC2) && sp < __this_cpu_ist_top_va(VC2));
1275 * Main #VC exception handler. It is called when the entry code was able to
1276 * switch off the IST to a safe kernel stack.
1278 * With the current implementation it is always possible to switch to a safe
1279 * stack because #VC exceptions only happen at known places, like intercepted
1280 * instructions or accesses to MMIO areas/IO ports. They can also happen with
1281 * code instrumentation when the hypervisor intercepts #DB, but the critical
1282 * paths are forbidden to be instrumented, so #DB exceptions currently also
1283 * only happen in safe places.
1285 DEFINE_IDTENTRY_VC_SAFE_STACK(exc_vmm_communication)
1287 struct sev_es_runtime_data *data = this_cpu_read(runtime_data);
1288 irqentry_state_t irq_state;
1289 struct ghcb_state state;
1290 struct es_em_ctxt ctxt;
1291 enum es_result result;
1295 * Handle #DB before calling into !noinstr code to avoid recursive #DB.
1297 if (error_code == SVM_EXIT_EXCP_BASE + X86_TRAP_DB) {
1298 vc_handle_trap_db(regs);
1302 irq_state = irqentry_nmi_enter(regs);
1303 lockdep_assert_irqs_disabled();
1304 instrumentation_begin();
1307 * This is invoked through an interrupt gate, so IRQs are disabled. The
1308 * code below might walk page-tables for user or kernel addresses, so
1309 * keep the IRQs disabled to protect us against concurrent TLB flushes.
1312 ghcb = sev_es_get_ghcb(&state);
1315 * Mark GHCBs inactive so that panic() is able to print the
1318 data->ghcb_active = false;
1319 data->backup_ghcb_active = false;
1321 panic("Unable to handle #VC exception! GHCB and Backup GHCB are already in use");
1324 vc_ghcb_invalidate(ghcb);
1325 result = vc_init_em_ctxt(&ctxt, regs, error_code);
1327 if (result == ES_OK)
1328 result = vc_handle_exitcode(&ctxt, ghcb, error_code);
1330 sev_es_put_ghcb(&state);
1332 /* Done - now check the result */
1335 vc_finish_insn(&ctxt);
1337 case ES_UNSUPPORTED:
1338 pr_err_ratelimited("Unsupported exit-code 0x%02lx in early #VC exception (IP: 0x%lx)\n",
1339 error_code, regs->ip);
1342 pr_err_ratelimited("Failure in communication with VMM (exit-code 0x%02lx IP: 0x%lx)\n",
1343 error_code, regs->ip);
1345 case ES_DECODE_FAILED:
1346 pr_err_ratelimited("Failed to decode instruction (exit-code 0x%02lx IP: 0x%lx)\n",
1347 error_code, regs->ip);
1350 vc_forward_exception(&ctxt);
1356 pr_emerg("Unknown result in %s():%d\n", __func__, result);
1358 * Emulating the instruction which caused the #VC exception
1359 * failed - can't continue so print debug information
1365 instrumentation_end();
1366 irqentry_nmi_exit(regs, irq_state);
1371 if (user_mode(regs)) {
1373 * Do not kill the machine if user-space triggered the
1374 * exception. Send SIGBUS instead and let user-space deal with
1377 force_sig_fault(SIGBUS, BUS_OBJERR, (void __user *)0);
1379 pr_emerg("PANIC: Unhandled #VC exception in kernel space (result=%d)\n",
1382 /* Show some debug info */
1385 /* Ask hypervisor to sev_es_terminate */
1386 sev_es_terminate(GHCB_SEV_ES_REASON_GENERAL_REQUEST);
1388 /* If that fails and we get here - just panic */
1389 panic("Returned from Terminate-Request to Hypervisor\n");
1395 /* This handler runs on the #VC fall-back stack. It can cause further #VC exceptions */
1396 DEFINE_IDTENTRY_VC_IST(exc_vmm_communication)
1398 instrumentation_begin();
1399 panic("Can't handle #VC exception from unsupported context\n");
1400 instrumentation_end();
1403 DEFINE_IDTENTRY_VC(exc_vmm_communication)
1405 if (likely(!on_vc_fallback_stack(regs)))
1406 safe_stack_exc_vmm_communication(regs, error_code);
1408 ist_exc_vmm_communication(regs, error_code);
1411 bool __init handle_vc_boot_ghcb(struct pt_regs *regs)
1413 unsigned long exit_code = regs->orig_ax;
1414 struct es_em_ctxt ctxt;
1415 enum es_result result;
1417 /* Do initial setup or terminate the guest */
1418 if (unlikely(boot_ghcb == NULL && !sev_es_setup_ghcb()))
1419 sev_es_terminate(GHCB_SEV_ES_REASON_GENERAL_REQUEST);
1421 vc_ghcb_invalidate(boot_ghcb);
1423 result = vc_init_em_ctxt(&ctxt, regs, exit_code);
1424 if (result == ES_OK)
1425 result = vc_handle_exitcode(&ctxt, boot_ghcb, exit_code);
1427 /* Done - now check the result */
1430 vc_finish_insn(&ctxt);
1432 case ES_UNSUPPORTED:
1433 early_printk("PANIC: Unsupported exit-code 0x%02lx in early #VC exception (IP: 0x%lx)\n",
1434 exit_code, regs->ip);
1437 early_printk("PANIC: Failure in communication with VMM (exit-code 0x%02lx IP: 0x%lx)\n",
1438 exit_code, regs->ip);
1440 case ES_DECODE_FAILED:
1441 early_printk("PANIC: Failed to decode instruction (exit-code 0x%02lx IP: 0x%lx)\n",
1442 exit_code, regs->ip);
1445 vc_early_forward_exception(&ctxt);