arch/x86/kernel/sev-es-shared.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * AMD Encrypted Register State Support
   4  *
   5  * Author: Joerg Roedel <jroedel@suse.de>
   6  *
   7  * This file is not compiled stand-alone. It contains code shared
   8  * between the pre-decompression boot code and the running Linux kernel
   9  * and is included directly into both code-bases.
  10  */
  11
  12 #ifndef __BOOT_COMPRESSED
  13 #define error(v)        pr_err(v)
  14 #define has_cpuflag(f)  boot_cpu_has(f)
  15 #endif
  16
  17 static bool __init sev_es_check_cpu_features(void)
  18 {
  19         if (!has_cpuflag(X86_FEATURE_RDRAND)) {
  20                 error("RDRAND instruction not supported - no trusted source of randomness available\n");
  21                 return false;
  22         }
  23
  24         return true;
  25 }
  26
  27 static void sev_es_terminate(unsigned int reason)
  28 {
  29         u64 val = GHCB_SEV_TERMINATE;
  30
  31         /*
  32          * Tell the hypervisor what went wrong - only reason-set 0 is
  33          * currently supported.
  34          */
  35         val |= GHCB_SEV_TERMINATE_REASON(0, reason);
  36
  37         /* Request Guest Termination from Hypvervisor */
  38         sev_es_wr_ghcb_msr(val);
  39         VMGEXIT();
  40
  41         while (true)
  42                 asm volatile("hlt\n" : : : "memory");
  43 }
  44
  45 static bool sev_es_negotiate_protocol(void)
  46 {
  47         u64 val;
  48
  49         /* Do the GHCB protocol version negotiation */
  50         sev_es_wr_ghcb_msr(GHCB_SEV_INFO_REQ);
  51         VMGEXIT();
  52         val = sev_es_rd_ghcb_msr();
  53
  54         if (GHCB_INFO(val) != GHCB_SEV_INFO)
  55                 return false;
  56
  57         if (GHCB_PROTO_MAX(val) < GHCB_PROTO_OUR ||
  58             GHCB_PROTO_MIN(val) > GHCB_PROTO_OUR)
  59                 return false;
  60
  61         return true;
  62 }
  63
  64 static __always_inline void vc_ghcb_invalidate(struct ghcb *ghcb)
  65 {
  66         memset(ghcb->save.valid_bitmap, 0, sizeof(ghcb->save.valid_bitmap));
  67 }
  68
  69 static bool vc_decoding_needed(unsigned long exit_code)
  70 {
  71         /* Exceptions don't require to decode the instruction */
  72         return !(exit_code >= SVM_EXIT_EXCP_BASE &&
  73                  exit_code <= SVM_EXIT_LAST_EXCP);
  74 }
  75
  76 static enum es_result vc_init_em_ctxt(struct es_em_ctxt *ctxt,
  77                                       struct pt_regs *regs,
  78                                       unsigned long exit_code)
  79 {
  80         enum es_result ret = ES_OK;
  81
  82         memset(ctxt, 0, sizeof(*ctxt));
  83         ctxt->regs = regs;
  84
  85         if (vc_decoding_needed(exit_code))
  86                 ret = vc_decode_insn(ctxt);
  87
  88         return ret;
  89 }
  90
  91 static void vc_finish_insn(struct es_em_ctxt *ctxt)
  92 {
  93         ctxt->regs->ip += ctxt->insn.length;
  94 }
  95
  96 static enum es_result sev_es_ghcb_hv_call(struct ghcb *ghcb,
  97                                           struct es_em_ctxt *ctxt,
  98                                           u64 exit_code, u64 exit_info_1,
  99                                           u64 exit_info_2)
 100 {
 101         enum es_result ret;
 102
 103         /* Fill in protocol and format specifiers */
 104         ghcb->protocol_version = GHCB_PROTOCOL_MAX;
 105         ghcb->ghcb_usage       = GHCB_DEFAULT_USAGE;
 106
 107         ghcb_set_sw_exit_code(ghcb, exit_code);
 108         ghcb_set_sw_exit_info_1(ghcb, exit_info_1);
 109         ghcb_set_sw_exit_info_2(ghcb, exit_info_2);
 110
 111         sev_es_wr_ghcb_msr(__pa(ghcb));
 112         VMGEXIT();
 113
 114         if ((ghcb->save.sw_exit_info_1 & 0xffffffff) == 1) {
 115                 u64 info = ghcb->save.sw_exit_info_2;
 116                 unsigned long v;
 117
 118                 info = ghcb->save.sw_exit_info_2;
 119                 v = info & SVM_EVTINJ_VEC_MASK;
 120
 121                 /* Check if exception information from hypervisor is sane. */
 122                 if ((info & SVM_EVTINJ_VALID) &&
 123                     ((v == X86_TRAP_GP) || (v == X86_TRAP_UD)) &&
 124                     ((info & SVM_EVTINJ_TYPE_MASK) == SVM_EVTINJ_TYPE_EXEPT)) {
 125                         ctxt->fi.vector = v;
 126                         if (info & SVM_EVTINJ_VALID_ERR)
 127                                 ctxt->fi.error_code = info >> 32;
 128                         ret = ES_EXCEPTION;
 129                 } else {
 130                         ret = ES_VMM_ERROR;
 131                 }
 132         } else {
 133                 ret = ES_OK;
 134         }
 135
 136         return ret;
 137 }
 138
 139 /*
 140  * Boot VC Handler - This is the first VC handler during boot, there is no GHCB
 141  * page yet, so it only supports the MSR based communication with the
 142  * hypervisor and only the CPUID exit-code.
 143  */
 144 void __init do_vc_no_ghcb(struct pt_regs *regs, unsigned long exit_code)
 145 {
 146         unsigned int fn = lower_bits(regs->ax, 32);
 147         unsigned long val;
 148
 149         /* Only CPUID is supported via MSR protocol */
 150         if (exit_code != SVM_EXIT_CPUID)
 151                 goto fail;
 152
 153         sev_es_wr_ghcb_msr(GHCB_CPUID_REQ(fn, GHCB_CPUID_REQ_EAX));
 154         VMGEXIT();
 155         val = sev_es_rd_ghcb_msr();
 156         if (GHCB_SEV_GHCB_RESP_CODE(val) != GHCB_SEV_CPUID_RESP)
 157                 goto fail;
 158         regs->ax = val >> 32;
 159
 160         sev_es_wr_ghcb_msr(GHCB_CPUID_REQ(fn, GHCB_CPUID_REQ_EBX));
 161         VMGEXIT();
 162         val = sev_es_rd_ghcb_msr();
 163         if (GHCB_SEV_GHCB_RESP_CODE(val) != GHCB_SEV_CPUID_RESP)
 164                 goto fail;
 165         regs->bx = val >> 32;
 166
 167         sev_es_wr_ghcb_msr(GHCB_CPUID_REQ(fn, GHCB_CPUID_REQ_ECX));
 168         VMGEXIT();
 169         val = sev_es_rd_ghcb_msr();
 170         if (GHCB_SEV_GHCB_RESP_CODE(val) != GHCB_SEV_CPUID_RESP)
 171                 goto fail;
 172         regs->cx = val >> 32;
 173
 174         sev_es_wr_ghcb_msr(GHCB_CPUID_REQ(fn, GHCB_CPUID_REQ_EDX));
 175         VMGEXIT();
 176         val = sev_es_rd_ghcb_msr();
 177         if (GHCB_SEV_GHCB_RESP_CODE(val) != GHCB_SEV_CPUID_RESP)
 178                 goto fail;
 179         regs->dx = val >> 32;
 180
 181         /*
 182          * This is a VC handler and the #VC is only raised when SEV-ES is
 183          * active, which means SEV must be active too. Do sanity checks on the
 184          * CPUID results to make sure the hypervisor does not trick the kernel
 185          * into the no-sev path. This could map sensitive data unencrypted and
 186          * make it accessible to the hypervisor.
 187          *
 188          * In particular, check for:
 189          *      - Availability of CPUID leaf 0x8000001f
 190          *      - SEV CPUID bit.
 191          *
 192          * The hypervisor might still report the wrong C-bit position, but this
 193          * can't be checked here.
 194          */
 195
 196         if (fn == 0x80000000 && (regs->ax < 0x8000001f))
 197                 /* SEV leaf check */
 198                 goto fail;
 199         else if ((fn == 0x8000001f && !(regs->ax & BIT(1))))
 200                 /* SEV bit */
 201                 goto fail;
 202
 203         /* Skip over the CPUID two-byte opcode */
 204         regs->ip += 2;
 205
 206         return;
 207
 208 fail:
 209         sev_es_wr_ghcb_msr(GHCB_SEV_TERMINATE);
 210         VMGEXIT();
 211
 212         /* Shouldn't get here - if we do halt the machine */
 213         while (true)
 214                 asm volatile("hlt\n");
 215 }
 216
 217 static enum es_result vc_insn_string_read(struct es_em_ctxt *ctxt,
 218                                           void *src, char *buf,
 219                                           unsigned int data_size,
 220                                           unsigned int count,
 221                                           bool backwards)
 222 {
 223         int i, b = backwards ? -1 : 1;
 224         enum es_result ret = ES_OK;
 225
 226         for (i = 0; i < count; i++) {
 227                 void *s = src + (i * data_size * b);
 228                 char *d = buf + (i * data_size);
 229
 230                 ret = vc_read_mem(ctxt, s, d, data_size);
 231                 if (ret != ES_OK)
 232                         break;
 233         }
 234
 235         return ret;
 236 }
 237
 238 static enum es_result vc_insn_string_write(struct es_em_ctxt *ctxt,
 239                                            void *dst, char *buf,
 240                                            unsigned int data_size,
 241                                            unsigned int count,
 242                                            bool backwards)
 243 {
 244         int i, s = backwards ? -1 : 1;
 245         enum es_result ret = ES_OK;
 246
 247         for (i = 0; i < count; i++) {
 248                 void *d = dst + (i * data_size * s);
 249                 char *b = buf + (i * data_size);
 250
 251                 ret = vc_write_mem(ctxt, d, b, data_size);
 252                 if (ret != ES_OK)
 253                         break;
 254         }
 255
 256         return ret;
 257 }
 258
 259 #define IOIO_TYPE_STR  BIT(2)
 260 #define IOIO_TYPE_IN   1
 261 #define IOIO_TYPE_INS  (IOIO_TYPE_IN | IOIO_TYPE_STR)
 262 #define IOIO_TYPE_OUT  0
 263 #define IOIO_TYPE_OUTS (IOIO_TYPE_OUT | IOIO_TYPE_STR)
 264
 265 #define IOIO_REP       BIT(3)
 266
 267 #define IOIO_ADDR_64   BIT(9)
 268 #define IOIO_ADDR_32   BIT(8)
 269 #define IOIO_ADDR_16   BIT(7)
 270
 271 #define IOIO_DATA_32   BIT(6)
 272 #define IOIO_DATA_16   BIT(5)
 273 #define IOIO_DATA_8    BIT(4)
 274
 275 #define IOIO_SEG_ES    (0 << 10)
 276 #define IOIO_SEG_DS    (3 << 10)
 277
 278 static enum es_result vc_ioio_exitinfo(struct es_em_ctxt *ctxt, u64 *exitinfo)
 279 {
 280         struct insn *insn = &ctxt->insn;
 281         *exitinfo = 0;
 282
 283         switch (insn->opcode.bytes[0]) {
 284         /* INS opcodes */
 285         case 0x6c:
 286         case 0x6d:
 287                 *exitinfo |= IOIO_TYPE_INS;
 288                 *exitinfo |= IOIO_SEG_ES;
 289                 *exitinfo |= (ctxt->regs->dx & 0xffff) << 16;
 290                 break;
 291
 292         /* OUTS opcodes */
 293         case 0x6e:
 294         case 0x6f:
 295                 *exitinfo |= IOIO_TYPE_OUTS;
 296                 *exitinfo |= IOIO_SEG_DS;
 297                 *exitinfo |= (ctxt->regs->dx & 0xffff) << 16;
 298                 break;
 299
 300         /* IN immediate opcodes */
 301         case 0xe4:
 302         case 0xe5:
 303                 *exitinfo |= IOIO_TYPE_IN;
 304                 *exitinfo |= (u8)insn->immediate.value << 16;
 305                 break;
 306
 307         /* OUT immediate opcodes */
 308         case 0xe6:
 309         case 0xe7:
 310                 *exitinfo |= IOIO_TYPE_OUT;
 311                 *exitinfo |= (u8)insn->immediate.value << 16;
 312                 break;
 313
 314         /* IN register opcodes */
 315         case 0xec:
 316         case 0xed:
 317                 *exitinfo |= IOIO_TYPE_IN;
 318                 *exitinfo |= (ctxt->regs->dx & 0xffff) << 16;
 319                 break;
 320
 321         /* OUT register opcodes */
 322         case 0xee:
 323         case 0xef:
 324                 *exitinfo |= IOIO_TYPE_OUT;
 325                 *exitinfo |= (ctxt->regs->dx & 0xffff) << 16;
 326                 break;
 327
 328         default:
 329                 return ES_DECODE_FAILED;
 330         }
 331
 332         switch (insn->opcode.bytes[0]) {
 333         case 0x6c:
 334         case 0x6e:
 335         case 0xe4:
 336         case 0xe6:
 337         case 0xec:
 338         case 0xee:
 339                 /* Single byte opcodes */
 340                 *exitinfo |= IOIO_DATA_8;
 341                 break;
 342         default:
 343                 /* Length determined by instruction parsing */
 344                 *exitinfo |= (insn->opnd_bytes == 2) ? IOIO_DATA_16
 345                                                      : IOIO_DATA_32;
 346         }
 347         switch (insn->addr_bytes) {
 348         case 2:
 349                 *exitinfo |= IOIO_ADDR_16;
 350                 break;
 351         case 4:
 352                 *exitinfo |= IOIO_ADDR_32;
 353                 break;
 354         case 8:
 355                 *exitinfo |= IOIO_ADDR_64;
 356                 break;
 357         }
 358
 359         if (insn_has_rep_prefix(insn))
 360                 *exitinfo |= IOIO_REP;
 361
 362         return ES_OK;
 363 }
 364
 365 static enum es_result vc_handle_ioio(struct ghcb *ghcb, struct es_em_ctxt *ctxt)
 366 {
 367         struct pt_regs *regs = ctxt->regs;
 368         u64 exit_info_1, exit_info_2;
 369         enum es_result ret;
 370
 371         ret = vc_ioio_exitinfo(ctxt, &exit_info_1);
 372         if (ret != ES_OK)
 373                 return ret;
 374
 375         if (exit_info_1 & IOIO_TYPE_STR) {
 376
 377                 /* (REP) INS/OUTS */
 378
 379                 bool df = ((regs->flags & X86_EFLAGS_DF) == X86_EFLAGS_DF);
 380                 unsigned int io_bytes, exit_bytes;
 381                 unsigned int ghcb_count, op_count;
 382                 unsigned long es_base;
 383                 u64 sw_scratch;
 384
 385                 /*
 386                  * For the string variants with rep prefix the amount of in/out
 387                  * operations per #VC exception is limited so that the kernel
 388                  * has a chance to take interrupts and re-schedule while the
 389                  * instruction is emulated.
 390                  */
 391                 io_bytes   = (exit_info_1 >> 4) & 0x7;
 392                 ghcb_count = sizeof(ghcb->shared_buffer) / io_bytes;
 393
 394                 op_count    = (exit_info_1 & IOIO_REP) ? regs->cx : 1;
 395                 exit_info_2 = min(op_count, ghcb_count);
 396                 exit_bytes  = exit_info_2 * io_bytes;
 397
 398                 es_base = insn_get_seg_base(ctxt->regs, INAT_SEG_REG_ES);
 399
 400                 /* Read bytes of OUTS into the shared buffer */
 401                 if (!(exit_info_1 & IOIO_TYPE_IN)) {
 402                         ret = vc_insn_string_read(ctxt,
 403                                                (void *)(es_base + regs->si),
 404                                                ghcb->shared_buffer, io_bytes,
 405                                                exit_info_2, df);
 406                         if (ret)
 407                                 return ret;
 408                 }
 409
 410                 /*
 411                  * Issue an VMGEXIT to the HV to consume the bytes from the
 412                  * shared buffer or to have it write them into the shared buffer
 413                  * depending on the instruction: OUTS or INS.
 414                  */
 415                 sw_scratch = __pa(ghcb) + offsetof(struct ghcb, shared_buffer);
 416                 ghcb_set_sw_scratch(ghcb, sw_scratch);
 417                 ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_IOIO,
 418                                           exit_info_1, exit_info_2);
 419                 if (ret != ES_OK)
 420                         return ret;
 421
 422                 /* Read bytes from shared buffer into the guest's destination. */
 423                 if (exit_info_1 & IOIO_TYPE_IN) {
 424                         ret = vc_insn_string_write(ctxt,
 425                                                    (void *)(es_base + regs->di),
 426                                                    ghcb->shared_buffer, io_bytes,
 427                                                    exit_info_2, df);
 428                         if (ret)
 429                                 return ret;
 430
 431                         if (df)
 432                                 regs->di -= exit_bytes;
 433                         else
 434                                 regs->di += exit_bytes;
 435                 } else {
 436                         if (df)
 437                                 regs->si -= exit_bytes;
 438                         else
 439                                 regs->si += exit_bytes;
 440                 }
 441
 442                 if (exit_info_1 & IOIO_REP)
 443                         regs->cx -= exit_info_2;
 444
 445                 ret = regs->cx ? ES_RETRY : ES_OK;
 446
 447         } else {
 448
 449                 /* IN/OUT into/from rAX */
 450
 451                 int bits = (exit_info_1 & 0x70) >> 1;
 452                 u64 rax = 0;
 453
 454                 if (!(exit_info_1 & IOIO_TYPE_IN))
 455                         rax = lower_bits(regs->ax, bits);
 456
 457                 ghcb_set_rax(ghcb, rax);
 458
 459                 ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_IOIO, exit_info_1, 0);
 460                 if (ret != ES_OK)
 461                         return ret;
 462
 463                 if (exit_info_1 & IOIO_TYPE_IN) {
 464                         if (!ghcb_rax_is_valid(ghcb))
 465                                 return ES_VMM_ERROR;
 466                         regs->ax = lower_bits(ghcb->save.rax, bits);
 467                 }
 468         }
 469
 470         return ret;
 471 }
 472
 473 static enum es_result vc_handle_cpuid(struct ghcb *ghcb,
 474                                       struct es_em_ctxt *ctxt)
 475 {
 476         struct pt_regs *regs = ctxt->regs;
 477         u32 cr4 = native_read_cr4();
 478         enum es_result ret;
 479
 480         ghcb_set_rax(ghcb, regs->ax);
 481         ghcb_set_rcx(ghcb, regs->cx);
 482
 483         if (cr4 & X86_CR4_OSXSAVE)
 484                 /* Safe to read xcr0 */
 485                 ghcb_set_xcr0(ghcb, xgetbv(XCR_XFEATURE_ENABLED_MASK));
 486         else
 487                 /* xgetbv will cause #GP - use reset value for xcr0 */
 488                 ghcb_set_xcr0(ghcb, 1);
 489
 490         ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_CPUID, 0, 0);
 491         if (ret != ES_OK)
 492                 return ret;
 493
 494         if (!(ghcb_rax_is_valid(ghcb) &&
 495               ghcb_rbx_is_valid(ghcb) &&
 496               ghcb_rcx_is_valid(ghcb) &&
 497               ghcb_rdx_is_valid(ghcb)))
 498                 return ES_VMM_ERROR;
 499
 500         regs->ax = ghcb->save.rax;
 501         regs->bx = ghcb->save.rbx;
 502         regs->cx = ghcb->save.rcx;
 503         regs->dx = ghcb->save.rdx;
 504
 505         return ES_OK;
 506 }
 507
 508 static enum es_result vc_handle_rdtsc(struct ghcb *ghcb,
 509                                       struct es_em_ctxt *ctxt,
 510                                       unsigned long exit_code)
 511 {
 512         bool rdtscp = (exit_code == SVM_EXIT_RDTSCP);
 513         enum es_result ret;
 514
 515         ret = sev_es_ghcb_hv_call(ghcb, ctxt, exit_code, 0, 0);
 516         if (ret != ES_OK)
 517                 return ret;
 518
 519         if (!(ghcb_rax_is_valid(ghcb) && ghcb_rdx_is_valid(ghcb) &&
 520              (!rdtscp || ghcb_rcx_is_valid(ghcb))))
 521                 return ES_VMM_ERROR;
 522
 523         ctxt->regs->ax = ghcb->save.rax;
 524         ctxt->regs->dx = ghcb->save.rdx;
 525         if (rdtscp)
 526                 ctxt->regs->cx = ghcb->save.rcx;
 527
 528         return ES_OK;
 529 }