1 // SPDX-License-Identifier: GPL-2.0
3 * Intel Multiprocessor Specification 1.1 and 1.4
4 * compliant MP-table parsing routines.
6 * (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk>
7 * (c) 1998, 1999, 2000, 2009 Ingo Molnar <mingo@redhat.com>
8 * (c) 2008 Alexey Starikovskiy <astarikovskiy@suse.de>
12 #include <linux/init.h>
13 #include <linux/delay.h>
14 #include <linux/memblock.h>
15 #include <linux/kernel_stat.h>
16 #include <linux/mc146818rtc.h>
17 #include <linux/bitops.h>
18 #include <linux/acpi.h>
19 #include <linux/smp.h>
20 #include <linux/pci.h>
22 #include <asm/irqdomain.h>
24 #include <asm/mpspec.h>
25 #include <asm/io_apic.h>
26 #include <asm/proto.h>
27 #include <asm/bios_ebda.h>
28 #include <asm/e820/api.h>
29 #include <asm/setup.h>
34 * Checksum an MP configuration block.
37 static int __init mpf_checksum(unsigned char *mp, int len)
47 int __init default_mpc_apic_id(struct mpc_cpu *m)
52 static void __init MP_processor_info(struct mpc_cpu *m)
55 char *bootup_cpu = "";
57 if (!(m->cpuflag & CPU_ENABLED)) {
62 apicid = x86_init.mpparse.mpc_apic_id(m);
64 if (m->cpuflag & CPU_BOOTPROCESSOR) {
65 bootup_cpu = " (Bootup-CPU)";
66 boot_cpu_physical_apicid = m->apicid;
69 pr_info("Processor #%d%s\n", m->apicid, bootup_cpu);
70 generic_processor_info(apicid, m->apicver);
73 #ifdef CONFIG_X86_IO_APIC
74 void __init default_mpc_oem_bus_info(struct mpc_bus *m, char *str)
76 memcpy(str, m->bustype, 6);
78 apic_printk(APIC_VERBOSE, "Bus #%d is %s\n", m->busid, str);
81 static void __init MP_bus_info(struct mpc_bus *m)
85 x86_init.mpparse.mpc_oem_bus_info(m, str);
87 #if MAX_MP_BUSSES < 256
88 if (m->busid >= MAX_MP_BUSSES) {
89 pr_warn("MP table busid value (%d) for bustype %s is too large, max. supported is %d\n",
90 m->busid, str, MAX_MP_BUSSES - 1);
95 set_bit(m->busid, mp_bus_not_pci);
96 if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) {
98 mp_bus_id_to_type[m->busid] = MP_BUS_ISA;
100 } else if (strncmp(str, BUSTYPE_PCI, sizeof(BUSTYPE_PCI) - 1) == 0) {
101 if (x86_init.mpparse.mpc_oem_pci_bus)
102 x86_init.mpparse.mpc_oem_pci_bus(m);
104 clear_bit(m->busid, mp_bus_not_pci);
106 mp_bus_id_to_type[m->busid] = MP_BUS_PCI;
107 } else if (strncmp(str, BUSTYPE_EISA, sizeof(BUSTYPE_EISA) - 1) == 0) {
108 mp_bus_id_to_type[m->busid] = MP_BUS_EISA;
111 pr_warn("Unknown bustype %s - ignoring\n", str);
114 static void __init MP_ioapic_info(struct mpc_ioapic *m)
116 struct ioapic_domain_cfg cfg = {
117 .type = IOAPIC_DOMAIN_LEGACY,
118 .ops = &mp_ioapic_irqdomain_ops,
121 if (m->flags & MPC_APIC_USABLE)
122 mp_register_ioapic(m->apicid, m->apicaddr, gsi_top, &cfg);
125 static void __init print_mp_irq_info(struct mpc_intsrc *mp_irq)
127 apic_printk(APIC_VERBOSE,
128 "Int: type %d, pol %d, trig %d, bus %02x, IRQ %02x, APIC ID %x, APIC INT %02x\n",
129 mp_irq->irqtype, mp_irq->irqflag & 3,
130 (mp_irq->irqflag >> 2) & 3, mp_irq->srcbus,
131 mp_irq->srcbusirq, mp_irq->dstapic, mp_irq->dstirq);
134 #else /* CONFIG_X86_IO_APIC */
135 static inline void __init MP_bus_info(struct mpc_bus *m) {}
136 static inline void __init MP_ioapic_info(struct mpc_ioapic *m) {}
137 #endif /* CONFIG_X86_IO_APIC */
139 static void __init MP_lintsrc_info(struct mpc_lintsrc *m)
141 apic_printk(APIC_VERBOSE,
142 "Lint: type %d, pol %d, trig %d, bus %02x, IRQ %02x, APIC ID %x, APIC LINT %02x\n",
143 m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbusid,
144 m->srcbusirq, m->destapic, m->destapiclint);
150 static int __init smp_check_mpc(struct mpc_table *mpc, char *oem, char *str)
153 if (memcmp(mpc->signature, MPC_SIGNATURE, 4)) {
154 pr_err("MPTABLE: bad signature [%c%c%c%c]!\n",
155 mpc->signature[0], mpc->signature[1],
156 mpc->signature[2], mpc->signature[3]);
159 if (mpf_checksum((unsigned char *)mpc, mpc->length)) {
160 pr_err("MPTABLE: checksum error!\n");
163 if (mpc->spec != 0x01 && mpc->spec != 0x04) {
164 pr_err("MPTABLE: bad table version (%d)!!\n", mpc->spec);
168 pr_err("MPTABLE: null local APIC address!\n");
171 memcpy(oem, mpc->oem, 8);
173 pr_info("MPTABLE: OEM ID: %s\n", oem);
175 memcpy(str, mpc->productid, 12);
178 pr_info("MPTABLE: Product ID: %s\n", str);
180 pr_info("MPTABLE: APIC at: 0x%X\n", mpc->lapic);
185 static void skip_entry(unsigned char **ptr, int *count, int size)
191 static void __init smp_dump_mptable(struct mpc_table *mpc, unsigned char *mpt)
193 pr_err("Your mptable is wrong, contact your HW vendor!\n");
194 pr_cont("type %x\n", *mpt);
195 print_hex_dump(KERN_ERR, " ", DUMP_PREFIX_ADDRESS, 16,
196 1, mpc, mpc->length, 1);
199 void __init default_smp_read_mpc_oem(struct mpc_table *mpc) { }
201 static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early)
206 int count = sizeof(*mpc);
207 unsigned char *mpt = ((unsigned char *)mpc) + count;
209 if (!smp_check_mpc(mpc, oem, str))
212 /* Initialize the lapic mapping */
214 register_lapic_address(mpc->lapic);
220 x86_init.mpparse.smp_read_mpc_oem(mpc);
223 * Now process the configuration blocks.
225 x86_init.mpparse.mpc_record(0);
227 while (count < mpc->length) {
230 /* ACPI may have already provided this data */
232 MP_processor_info((struct mpc_cpu *)mpt);
233 skip_entry(&mpt, &count, sizeof(struct mpc_cpu));
236 MP_bus_info((struct mpc_bus *)mpt);
237 skip_entry(&mpt, &count, sizeof(struct mpc_bus));
240 MP_ioapic_info((struct mpc_ioapic *)mpt);
241 skip_entry(&mpt, &count, sizeof(struct mpc_ioapic));
244 mp_save_irq((struct mpc_intsrc *)mpt);
245 skip_entry(&mpt, &count, sizeof(struct mpc_intsrc));
248 MP_lintsrc_info((struct mpc_lintsrc *)mpt);
249 skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc));
253 smp_dump_mptable(mpc, mpt);
257 x86_init.mpparse.mpc_record(1);
261 pr_err("MPTABLE: no processors registered!\n");
262 return num_processors;
265 #ifdef CONFIG_X86_IO_APIC
267 static int __init ELCR_trigger(unsigned int irq)
271 port = 0x4d0 + (irq >> 3);
272 return (inb(port) >> (irq & 7)) & 1;
275 static void __init construct_default_ioirq_mptable(int mpc_default_type)
277 struct mpc_intsrc intsrc;
279 int ELCR_fallback = 0;
281 intsrc.type = MP_INTSRC;
282 intsrc.irqflag = MP_IRQTRIG_DEFAULT | MP_IRQPOL_DEFAULT;
284 intsrc.dstapic = mpc_ioapic_id(0);
286 intsrc.irqtype = mp_INT;
289 * If true, we have an ISA/PCI system with no IRQ entries
290 * in the MP table. To prevent the PCI interrupts from being set up
291 * incorrectly, we try to use the ELCR. The sanity check to see if
292 * there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can
293 * never be level sensitive, so we simply see if the ELCR agrees.
294 * If it does, we assume it's valid.
296 if (mpc_default_type == 5) {
297 pr_info("ISA/PCI bus type with no IRQ information... falling back to ELCR\n");
299 if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) ||
301 pr_err("ELCR contains invalid data... not using ELCR\n");
303 pr_info("Using ELCR to identify PCI interrupts\n");
308 for (i = 0; i < 16; i++) {
309 switch (mpc_default_type) {
311 if (i == 0 || i == 13)
312 continue; /* IRQ0 & IRQ13 not connected */
316 continue; /* IRQ2 is never connected */
321 * If the ELCR indicates a level-sensitive interrupt, we
322 * copy that information over to the MP table in the
323 * irqflag field (level sensitive, active high polarity).
325 if (ELCR_trigger(i)) {
326 intsrc.irqflag = MP_IRQTRIG_LEVEL |
327 MP_IRQPOL_ACTIVE_HIGH;
329 intsrc.irqflag = MP_IRQTRIG_DEFAULT |
334 intsrc.srcbusirq = i;
335 intsrc.dstirq = i ? i : 2; /* IRQ0 to INTIN2 */
336 mp_save_irq(&intsrc);
339 intsrc.irqtype = mp_ExtINT;
340 intsrc.srcbusirq = 0;
341 intsrc.dstirq = 0; /* 8259A to INTIN0 */
342 mp_save_irq(&intsrc);
346 static void __init construct_ioapic_table(int mpc_default_type)
348 struct mpc_ioapic ioapic;
353 switch (mpc_default_type) {
355 pr_err("???\nUnknown standard configuration %d\n",
360 memcpy(bus.bustype, "ISA ", 6);
365 memcpy(bus.bustype, "EISA ", 6);
369 if (mpc_default_type > 4) {
371 memcpy(bus.bustype, "PCI ", 6);
375 ioapic.type = MP_IOAPIC;
377 ioapic.apicver = mpc_default_type > 4 ? 0x10 : 0x01;
378 ioapic.flags = MPC_APIC_USABLE;
379 ioapic.apicaddr = IO_APIC_DEFAULT_PHYS_BASE;
380 MP_ioapic_info(&ioapic);
383 * We set up most of the low 16 IO-APIC pins according to MPS rules.
385 construct_default_ioirq_mptable(mpc_default_type);
388 static inline void __init construct_ioapic_table(int mpc_default_type) { }
391 static inline void __init construct_default_ISA_mptable(int mpc_default_type)
393 struct mpc_cpu processor;
394 struct mpc_lintsrc lintsrc;
395 int linttypes[2] = { mp_ExtINT, mp_NMI };
399 * local APIC has default address
401 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
404 * 2 CPUs, numbered 0 & 1.
406 processor.type = MP_PROCESSOR;
407 /* Either an integrated APIC or a discrete 82489DX. */
408 processor.apicver = mpc_default_type > 4 ? 0x10 : 0x01;
409 processor.cpuflag = CPU_ENABLED;
410 processor.cpufeature = (boot_cpu_data.x86 << 8) |
411 (boot_cpu_data.x86_model << 4) | boot_cpu_data.x86_stepping;
412 processor.featureflag = boot_cpu_data.x86_capability[CPUID_1_EDX];
413 processor.reserved[0] = 0;
414 processor.reserved[1] = 0;
415 for (i = 0; i < 2; i++) {
416 processor.apicid = i;
417 MP_processor_info(&processor);
420 construct_ioapic_table(mpc_default_type);
422 lintsrc.type = MP_LINTSRC;
423 lintsrc.irqflag = MP_IRQTRIG_DEFAULT | MP_IRQPOL_DEFAULT;
424 lintsrc.srcbusid = 0;
425 lintsrc.srcbusirq = 0;
426 lintsrc.destapic = MP_APIC_ALL;
427 for (i = 0; i < 2; i++) {
428 lintsrc.irqtype = linttypes[i];
429 lintsrc.destapiclint = i;
430 MP_lintsrc_info(&lintsrc);
434 static unsigned long mpf_base;
435 static bool mpf_found;
437 static unsigned long __init get_mpc_size(unsigned long physptr)
439 struct mpc_table *mpc;
442 mpc = early_memremap(physptr, PAGE_SIZE);
444 early_memunmap(mpc, PAGE_SIZE);
445 apic_printk(APIC_VERBOSE, " mpc: %lx-%lx\n", physptr, physptr + size);
450 static int __init check_physptr(struct mpf_intel *mpf, unsigned int early)
452 struct mpc_table *mpc;
455 size = get_mpc_size(mpf->physptr);
456 mpc = early_memremap(mpf->physptr, size);
459 * Read the physical hardware table. Anything here will
460 * override the defaults.
462 if (!smp_read_mpc(mpc, early)) {
463 #ifdef CONFIG_X86_LOCAL_APIC
464 smp_found_config = 0;
466 pr_err("BIOS bug, MP table errors detected!...\n");
467 pr_cont("... disabling SMP support. (tell your hw vendor)\n");
468 early_memunmap(mpc, size);
471 early_memunmap(mpc, size);
476 #ifdef CONFIG_X86_IO_APIC
478 * If there are no explicit MP IRQ entries, then we are
479 * broken. We set up most of the low 16 IO-APIC pins to
480 * ISA defaults and hope it will work.
482 if (!mp_irq_entries) {
485 pr_err("BIOS bug, no explicit IRQ entries, using default mptable. (tell your hw vendor)\n");
489 memcpy(bus.bustype, "ISA ", 6);
492 construct_default_ioirq_mptable(0);
500 * Scan the memory blocks for an SMP configuration block.
502 void __init default_get_smp_config(unsigned int early)
504 struct mpf_intel *mpf;
506 if (!smp_found_config)
512 if (acpi_lapic && early)
516 * MPS doesn't support hyperthreading, aka only have
517 * thread 0 apic id in MPS table
519 if (acpi_lapic && acpi_ioapic)
522 mpf = early_memremap(mpf_base, sizeof(*mpf));
524 pr_err("MPTABLE: error mapping MP table\n");
528 pr_info("Intel MultiProcessor Specification v1.%d\n",
530 #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32)
531 if (mpf->feature2 & (1 << 7)) {
532 pr_info(" IMCR and PIC compatibility mode.\n");
535 pr_info(" Virtual Wire compatibility mode.\n");
540 * Now see if we need to read further.
545 * local APIC has default address
547 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
551 pr_info("Default MP configuration #%d\n", mpf->feature1);
552 construct_default_ISA_mptable(mpf->feature1);
554 } else if (mpf->physptr) {
555 if (check_physptr(mpf, early))
561 pr_info("Processors: %d\n", num_processors);
563 * Only use the first configuration found.
566 early_memunmap(mpf, sizeof(*mpf));
569 static void __init smp_reserve_memory(struct mpf_intel *mpf)
571 memblock_reserve(mpf->physptr, get_mpc_size(mpf->physptr));
574 static int __init smp_scan_config(unsigned long base, unsigned long length)
577 struct mpf_intel *mpf;
580 apic_printk(APIC_VERBOSE, "Scan for SMP in [mem %#010lx-%#010lx]\n",
581 base, base + length - 1);
582 BUILD_BUG_ON(sizeof(*mpf) != 16);
585 bp = early_memremap(base, length);
586 mpf = (struct mpf_intel *)bp;
587 if ((*bp == SMP_MAGIC_IDENT) &&
588 (mpf->length == 1) &&
589 !mpf_checksum((unsigned char *)bp, 16) &&
590 ((mpf->specification == 1)
591 || (mpf->specification == 4))) {
592 #ifdef CONFIG_X86_LOCAL_APIC
593 smp_found_config = 1;
598 pr_info("found SMP MP-table at [mem %#010lx-%#010lx]\n",
599 base, base + sizeof(*mpf) - 1);
601 memblock_reserve(base, sizeof(*mpf));
603 smp_reserve_memory(mpf);
607 early_memunmap(bp, length);
618 void __init default_find_smp_config(void)
620 unsigned int address;
623 * FIXME: Linux assumes you have 640K of base ram..
624 * this continues the error...
626 * 1) Scan the bottom 1K for a signature
627 * 2) Scan the top 1K of base RAM
628 * 3) Scan the 64K of bios
630 if (smp_scan_config(0x0, 0x400) ||
631 smp_scan_config(639 * 0x400, 0x400) ||
632 smp_scan_config(0xF0000, 0x10000))
635 * If it is an SMP machine we should know now, unless the
636 * configuration is in an EISA bus machine with an
637 * extended bios data area.
639 * there is a real-mode segmented pointer pointing to the
640 * 4K EBDA area at 0x40E, calculate and scan it here.
642 * NOTE! There are Linux loaders that will corrupt the EBDA
643 * area, and as such this kind of SMP config may be less
644 * trustworthy, simply because the SMP table may have been
645 * stomped on during early boot. These loaders are buggy and
648 * MP1.4 SPEC states to only scan first 1K of 4K EBDA.
651 address = get_bios_ebda();
653 smp_scan_config(address, 0x400);
656 #ifdef CONFIG_X86_IO_APIC
657 static u8 __initdata irq_used[MAX_IRQ_SOURCES];
659 static int __init get_MP_intsrc_index(struct mpc_intsrc *m)
663 if (m->irqtype != mp_INT)
666 if (m->irqflag != (MP_IRQTRIG_LEVEL | MP_IRQPOL_ACTIVE_LOW))
671 for (i = 0; i < mp_irq_entries; i++) {
672 if (mp_irqs[i].irqtype != mp_INT)
675 if (mp_irqs[i].irqflag != (MP_IRQTRIG_LEVEL |
676 MP_IRQPOL_ACTIVE_LOW))
679 if (mp_irqs[i].srcbus != m->srcbus)
681 if (mp_irqs[i].srcbusirq != m->srcbusirq)
684 /* already claimed */
695 #define SPARE_SLOT_NUM 20
697 static struct mpc_intsrc __initdata *m_spare[SPARE_SLOT_NUM];
699 static void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare)
703 apic_printk(APIC_VERBOSE, "OLD ");
704 print_mp_irq_info(m);
706 i = get_MP_intsrc_index(m);
708 memcpy(m, &mp_irqs[i], sizeof(*m));
709 apic_printk(APIC_VERBOSE, "NEW ");
710 print_mp_irq_info(&mp_irqs[i]);
714 /* legacy, do nothing */
717 if (*nr_m_spare < SPARE_SLOT_NUM) {
719 * not found (-1), or duplicated (-2) are invalid entries,
720 * we need to use the slot later
722 m_spare[*nr_m_spare] = m;
728 check_slot(unsigned long mpc_new_phys, unsigned long mpc_new_length, int count)
730 if (!mpc_new_phys || count <= mpc_new_length) {
731 WARN(1, "update_mptable: No spare slots (length: %x)\n", count);
737 #else /* CONFIG_X86_IO_APIC */
739 inline void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare) {}
740 #endif /* CONFIG_X86_IO_APIC */
742 static int __init replace_intsrc_all(struct mpc_table *mpc,
743 unsigned long mpc_new_phys,
744 unsigned long mpc_new_length)
746 #ifdef CONFIG_X86_IO_APIC
749 int count = sizeof(*mpc);
751 unsigned char *mpt = ((unsigned char *)mpc) + count;
753 pr_info("mpc_length %x\n", mpc->length);
754 while (count < mpc->length) {
757 skip_entry(&mpt, &count, sizeof(struct mpc_cpu));
760 skip_entry(&mpt, &count, sizeof(struct mpc_bus));
763 skip_entry(&mpt, &count, sizeof(struct mpc_ioapic));
766 check_irq_src((struct mpc_intsrc *)mpt, &nr_m_spare);
767 skip_entry(&mpt, &count, sizeof(struct mpc_intsrc));
770 skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc));
774 smp_dump_mptable(mpc, mpt);
779 #ifdef CONFIG_X86_IO_APIC
780 for (i = 0; i < mp_irq_entries; i++) {
784 if (mp_irqs[i].irqtype != mp_INT)
787 if (mp_irqs[i].irqflag != (MP_IRQTRIG_LEVEL |
788 MP_IRQPOL_ACTIVE_LOW))
791 if (nr_m_spare > 0) {
792 apic_printk(APIC_VERBOSE, "*NEW* found\n");
794 memcpy(m_spare[nr_m_spare], &mp_irqs[i], sizeof(mp_irqs[i]));
795 m_spare[nr_m_spare] = NULL;
797 struct mpc_intsrc *m = (struct mpc_intsrc *)mpt;
798 count += sizeof(struct mpc_intsrc);
799 if (check_slot(mpc_new_phys, mpc_new_length, count) < 0)
801 memcpy(m, &mp_irqs[i], sizeof(*m));
803 mpt += sizeof(struct mpc_intsrc);
805 print_mp_irq_info(&mp_irqs[i]);
809 /* update checksum */
811 mpc->checksum -= mpf_checksum((unsigned char *)mpc, mpc->length);
816 int enable_update_mptable;
818 static int __init update_mptable_setup(char *str)
820 enable_update_mptable = 1;
826 early_param("update_mptable", update_mptable_setup);
828 static unsigned long __initdata mpc_new_phys;
829 static unsigned long mpc_new_length __initdata = 4096;
831 /* alloc_mptable or alloc_mptable=4k */
832 static int __initdata alloc_mptable;
833 static int __init parse_alloc_mptable_opt(char *p)
835 enable_update_mptable = 1;
842 mpc_new_length = memparse(p, &p);
845 early_param("alloc_mptable", parse_alloc_mptable_opt);
847 void __init e820__memblock_alloc_reserved_mpc_new(void)
849 if (enable_update_mptable && alloc_mptable)
850 mpc_new_phys = e820__memblock_alloc_reserved(mpc_new_length, 4);
853 static int __init update_mp_table(void)
857 struct mpf_intel *mpf;
858 struct mpc_table *mpc, *mpc_new;
861 if (!enable_update_mptable)
867 mpf = early_memremap(mpf_base, sizeof(*mpf));
869 pr_err("MPTABLE: mpf early_memremap() failed\n");
874 * Now see if we need to go further.
882 size = get_mpc_size(mpf->physptr);
883 mpc = early_memremap(mpf->physptr, size);
885 pr_err("MPTABLE: mpc early_memremap() failed\n");
889 if (!smp_check_mpc(mpc, oem, str))
892 pr_info("mpf: %llx\n", (u64)mpf_base);
893 pr_info("physptr: %x\n", mpf->physptr);
895 if (mpc_new_phys && mpc->length > mpc_new_length) {
897 pr_info("mpc_new_length is %ld, please use alloc_mptable=8k\n",
902 unsigned char old, new;
903 /* check if we can change the position */
905 old = mpf_checksum((unsigned char *)mpc, mpc->length);
906 mpc->checksum = 0xff;
907 new = mpf_checksum((unsigned char *)mpc, mpc->length);
909 pr_info("mpc is readonly, please try alloc_mptable instead\n");
912 pr_info("use in-position replacing\n");
914 mpc_new = early_memremap(mpc_new_phys, mpc_new_length);
916 pr_err("MPTABLE: new mpc early_memremap() failed\n");
919 mpf->physptr = mpc_new_phys;
920 memcpy(mpc_new, mpc, mpc->length);
921 early_memunmap(mpc, size);
923 size = mpc_new_length;
924 /* check if we can modify that */
925 if (mpc_new_phys - mpf->physptr) {
926 struct mpf_intel *mpf_new;
927 /* steal 16 bytes from [0, 1k) */
928 mpf_new = early_memremap(0x400 - 16, sizeof(*mpf_new));
930 pr_err("MPTABLE: new mpf early_memremap() failed\n");
933 pr_info("mpf new: %x\n", 0x400 - 16);
934 memcpy(mpf_new, mpf, 16);
935 early_memunmap(mpf, sizeof(*mpf));
937 mpf->physptr = mpc_new_phys;
940 mpf->checksum -= mpf_checksum((unsigned char *)mpf, 16);
941 pr_info("physptr new: %x\n", mpf->physptr);
945 * only replace the one with mp_INT and
946 * MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
947 * already in mp_irqs , stored by ... and mp_config_acpi_gsi,
948 * may need pci=routeirq for all coverage
950 replace_intsrc_all(mpc, mpc_new_phys, mpc_new_length);
953 early_memunmap(mpc, size);
956 early_memunmap(mpf, sizeof(*mpf));
961 late_initcall(update_mp_table);