1 // SPDX-License-Identifier: GPL-2.0
3 * Intel Multiprocessor Specification 1.1 and 1.4
4 * compliant MP-table parsing routines.
6 * (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk>
7 * (c) 1998, 1999, 2000, 2009 Ingo Molnar <mingo@redhat.com>
8 * (c) 2008 Alexey Starikovskiy <astarikovskiy@suse.de>
12 #include <linux/init.h>
13 #include <linux/delay.h>
14 #include <linux/memblock.h>
15 #include <linux/kernel_stat.h>
16 #include <linux/mc146818rtc.h>
17 #include <linux/bitops.h>
18 #include <linux/acpi.h>
19 #include <linux/smp.h>
20 #include <linux/pci.h>
22 #include <asm/io_apic.h>
24 #include <asm/irqdomain.h>
26 #include <asm/mpspec.h>
27 #include <asm/proto.h>
28 #include <asm/bios_ebda.h>
29 #include <asm/e820/api.h>
30 #include <asm/setup.h>
35 * Checksum an MP configuration block.
38 static int __init mpf_checksum(unsigned char *mp, int len)
48 static void __init MP_processor_info(struct mpc_cpu *m)
51 char *bootup_cpu = "";
53 if (!(m->cpuflag & CPU_ENABLED)) {
60 if (m->cpuflag & CPU_BOOTPROCESSOR) {
61 bootup_cpu = " (Bootup-CPU)";
62 boot_cpu_physical_apicid = m->apicid;
65 pr_info("Processor #%d%s\n", m->apicid, bootup_cpu);
66 generic_processor_info(apicid, m->apicver);
69 #ifdef CONFIG_X86_IO_APIC
70 static void __init mpc_oem_bus_info(struct mpc_bus *m, char *str)
72 memcpy(str, m->bustype, 6);
74 apic_printk(APIC_VERBOSE, "Bus #%d is %s\n", m->busid, str);
77 static void __init MP_bus_info(struct mpc_bus *m)
81 mpc_oem_bus_info(m, str);
83 #if MAX_MP_BUSSES < 256
84 if (m->busid >= MAX_MP_BUSSES) {
85 pr_warn("MP table busid value (%d) for bustype %s is too large, max. supported is %d\n",
86 m->busid, str, MAX_MP_BUSSES - 1);
91 set_bit(m->busid, mp_bus_not_pci);
92 if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) {
94 mp_bus_id_to_type[m->busid] = MP_BUS_ISA;
96 } else if (strncmp(str, BUSTYPE_PCI, sizeof(BUSTYPE_PCI) - 1) == 0) {
97 clear_bit(m->busid, mp_bus_not_pci);
99 mp_bus_id_to_type[m->busid] = MP_BUS_PCI;
100 } else if (strncmp(str, BUSTYPE_EISA, sizeof(BUSTYPE_EISA) - 1) == 0) {
101 mp_bus_id_to_type[m->busid] = MP_BUS_EISA;
104 pr_warn("Unknown bustype %s - ignoring\n", str);
107 static void __init MP_ioapic_info(struct mpc_ioapic *m)
109 struct ioapic_domain_cfg cfg = {
110 .type = IOAPIC_DOMAIN_LEGACY,
111 .ops = &mp_ioapic_irqdomain_ops,
114 if (m->flags & MPC_APIC_USABLE)
115 mp_register_ioapic(m->apicid, m->apicaddr, gsi_top, &cfg);
118 static void __init print_mp_irq_info(struct mpc_intsrc *mp_irq)
120 apic_printk(APIC_VERBOSE,
121 "Int: type %d, pol %d, trig %d, bus %02x, IRQ %02x, APIC ID %x, APIC INT %02x\n",
122 mp_irq->irqtype, mp_irq->irqflag & 3,
123 (mp_irq->irqflag >> 2) & 3, mp_irq->srcbus,
124 mp_irq->srcbusirq, mp_irq->dstapic, mp_irq->dstirq);
127 #else /* CONFIG_X86_IO_APIC */
128 static inline void __init MP_bus_info(struct mpc_bus *m) {}
129 static inline void __init MP_ioapic_info(struct mpc_ioapic *m) {}
130 #endif /* CONFIG_X86_IO_APIC */
132 static void __init MP_lintsrc_info(struct mpc_lintsrc *m)
134 apic_printk(APIC_VERBOSE,
135 "Lint: type %d, pol %d, trig %d, bus %02x, IRQ %02x, APIC ID %x, APIC LINT %02x\n",
136 m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbusid,
137 m->srcbusirq, m->destapic, m->destapiclint);
143 static int __init smp_check_mpc(struct mpc_table *mpc, char *oem, char *str)
146 if (memcmp(mpc->signature, MPC_SIGNATURE, 4)) {
147 pr_err("MPTABLE: bad signature [%c%c%c%c]!\n",
148 mpc->signature[0], mpc->signature[1],
149 mpc->signature[2], mpc->signature[3]);
152 if (mpf_checksum((unsigned char *)mpc, mpc->length)) {
153 pr_err("MPTABLE: checksum error!\n");
156 if (mpc->spec != 0x01 && mpc->spec != 0x04) {
157 pr_err("MPTABLE: bad table version (%d)!!\n", mpc->spec);
161 pr_err("MPTABLE: null local APIC address!\n");
164 memcpy(oem, mpc->oem, 8);
166 pr_info("MPTABLE: OEM ID: %s\n", oem);
168 memcpy(str, mpc->productid, 12);
171 pr_info("MPTABLE: Product ID: %s\n", str);
173 pr_info("MPTABLE: APIC at: 0x%X\n", mpc->lapic);
178 static void skip_entry(unsigned char **ptr, int *count, int size)
184 static void __init smp_dump_mptable(struct mpc_table *mpc, unsigned char *mpt)
186 pr_err("Your mptable is wrong, contact your HW vendor!\n");
187 pr_cont("type %x\n", *mpt);
188 print_hex_dump(KERN_ERR, " ", DUMP_PREFIX_ADDRESS, 16,
189 1, mpc, mpc->length, 1);
192 static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early)
197 int count = sizeof(*mpc);
198 unsigned char *mpt = ((unsigned char *)mpc) + count;
200 if (!smp_check_mpc(mpc, oem, str))
203 /* Initialize the lapic mapping */
205 register_lapic_address(mpc->lapic);
210 /* Now process the configuration blocks. */
211 while (count < mpc->length) {
214 /* ACPI may have already provided this data */
216 MP_processor_info((struct mpc_cpu *)mpt);
217 skip_entry(&mpt, &count, sizeof(struct mpc_cpu));
220 MP_bus_info((struct mpc_bus *)mpt);
221 skip_entry(&mpt, &count, sizeof(struct mpc_bus));
224 MP_ioapic_info((struct mpc_ioapic *)mpt);
225 skip_entry(&mpt, &count, sizeof(struct mpc_ioapic));
228 mp_save_irq((struct mpc_intsrc *)mpt);
229 skip_entry(&mpt, &count, sizeof(struct mpc_intsrc));
232 MP_lintsrc_info((struct mpc_lintsrc *)mpt);
233 skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc));
237 smp_dump_mptable(mpc, mpt);
244 pr_err("MPTABLE: no processors registered!\n");
245 return num_processors;
248 #ifdef CONFIG_X86_IO_APIC
250 static int __init ELCR_trigger(unsigned int irq)
254 port = 0x4d0 + (irq >> 3);
255 return (inb(port) >> (irq & 7)) & 1;
258 static void __init construct_default_ioirq_mptable(int mpc_default_type)
260 struct mpc_intsrc intsrc;
262 int ELCR_fallback = 0;
264 intsrc.type = MP_INTSRC;
265 intsrc.irqflag = MP_IRQTRIG_DEFAULT | MP_IRQPOL_DEFAULT;
267 intsrc.dstapic = mpc_ioapic_id(0);
269 intsrc.irqtype = mp_INT;
272 * If true, we have an ISA/PCI system with no IRQ entries
273 * in the MP table. To prevent the PCI interrupts from being set up
274 * incorrectly, we try to use the ELCR. The sanity check to see if
275 * there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can
276 * never be level sensitive, so we simply see if the ELCR agrees.
277 * If it does, we assume it's valid.
279 if (mpc_default_type == 5) {
280 pr_info("ISA/PCI bus type with no IRQ information... falling back to ELCR\n");
282 if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) ||
284 pr_err("ELCR contains invalid data... not using ELCR\n");
286 pr_info("Using ELCR to identify PCI interrupts\n");
291 for (i = 0; i < 16; i++) {
292 switch (mpc_default_type) {
294 if (i == 0 || i == 13)
295 continue; /* IRQ0 & IRQ13 not connected */
299 continue; /* IRQ2 is never connected */
304 * If the ELCR indicates a level-sensitive interrupt, we
305 * copy that information over to the MP table in the
306 * irqflag field (level sensitive, active high polarity).
308 if (ELCR_trigger(i)) {
309 intsrc.irqflag = MP_IRQTRIG_LEVEL |
310 MP_IRQPOL_ACTIVE_HIGH;
312 intsrc.irqflag = MP_IRQTRIG_DEFAULT |
317 intsrc.srcbusirq = i;
318 intsrc.dstirq = i ? i : 2; /* IRQ0 to INTIN2 */
319 mp_save_irq(&intsrc);
322 intsrc.irqtype = mp_ExtINT;
323 intsrc.srcbusirq = 0;
324 intsrc.dstirq = 0; /* 8259A to INTIN0 */
325 mp_save_irq(&intsrc);
329 static void __init construct_ioapic_table(int mpc_default_type)
331 struct mpc_ioapic ioapic;
336 switch (mpc_default_type) {
338 pr_err("???\nUnknown standard configuration %d\n",
343 memcpy(bus.bustype, "ISA ", 6);
348 memcpy(bus.bustype, "EISA ", 6);
352 if (mpc_default_type > 4) {
354 memcpy(bus.bustype, "PCI ", 6);
358 ioapic.type = MP_IOAPIC;
360 ioapic.apicver = mpc_default_type > 4 ? 0x10 : 0x01;
361 ioapic.flags = MPC_APIC_USABLE;
362 ioapic.apicaddr = IO_APIC_DEFAULT_PHYS_BASE;
363 MP_ioapic_info(&ioapic);
366 * We set up most of the low 16 IO-APIC pins according to MPS rules.
368 construct_default_ioirq_mptable(mpc_default_type);
371 static inline void __init construct_ioapic_table(int mpc_default_type) { }
374 static inline void __init construct_default_ISA_mptable(int mpc_default_type)
376 struct mpc_cpu processor;
377 struct mpc_lintsrc lintsrc;
378 int linttypes[2] = { mp_ExtINT, mp_NMI };
382 * local APIC has default address
384 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
387 * 2 CPUs, numbered 0 & 1.
389 processor.type = MP_PROCESSOR;
390 /* Either an integrated APIC or a discrete 82489DX. */
391 processor.apicver = mpc_default_type > 4 ? 0x10 : 0x01;
392 processor.cpuflag = CPU_ENABLED;
393 processor.cpufeature = (boot_cpu_data.x86 << 8) |
394 (boot_cpu_data.x86_model << 4) | boot_cpu_data.x86_stepping;
395 processor.featureflag = boot_cpu_data.x86_capability[CPUID_1_EDX];
396 processor.reserved[0] = 0;
397 processor.reserved[1] = 0;
398 for (i = 0; i < 2; i++) {
399 processor.apicid = i;
400 MP_processor_info(&processor);
403 construct_ioapic_table(mpc_default_type);
405 lintsrc.type = MP_LINTSRC;
406 lintsrc.irqflag = MP_IRQTRIG_DEFAULT | MP_IRQPOL_DEFAULT;
407 lintsrc.srcbusid = 0;
408 lintsrc.srcbusirq = 0;
409 lintsrc.destapic = MP_APIC_ALL;
410 for (i = 0; i < 2; i++) {
411 lintsrc.irqtype = linttypes[i];
412 lintsrc.destapiclint = i;
413 MP_lintsrc_info(&lintsrc);
417 static unsigned long mpf_base;
418 static bool mpf_found;
420 static unsigned long __init get_mpc_size(unsigned long physptr)
422 struct mpc_table *mpc;
425 mpc = early_memremap(physptr, PAGE_SIZE);
427 early_memunmap(mpc, PAGE_SIZE);
428 apic_printk(APIC_VERBOSE, " mpc: %lx-%lx\n", physptr, physptr + size);
433 static int __init check_physptr(struct mpf_intel *mpf, unsigned int early)
435 struct mpc_table *mpc;
438 size = get_mpc_size(mpf->physptr);
439 mpc = early_memremap(mpf->physptr, size);
442 * Read the physical hardware table. Anything here will
443 * override the defaults.
445 if (!smp_read_mpc(mpc, early)) {
446 #ifdef CONFIG_X86_LOCAL_APIC
447 smp_found_config = 0;
449 pr_err("BIOS bug, MP table errors detected!...\n");
450 pr_cont("... disabling SMP support. (tell your hw vendor)\n");
451 early_memunmap(mpc, size);
454 early_memunmap(mpc, size);
459 #ifdef CONFIG_X86_IO_APIC
461 * If there are no explicit MP IRQ entries, then we are
462 * broken. We set up most of the low 16 IO-APIC pins to
463 * ISA defaults and hope it will work.
465 if (!mp_irq_entries) {
468 pr_err("BIOS bug, no explicit IRQ entries, using default mptable. (tell your hw vendor)\n");
472 memcpy(bus.bustype, "ISA ", 6);
475 construct_default_ioirq_mptable(0);
483 * Scan the memory blocks for an SMP configuration block.
485 void __init default_get_smp_config(unsigned int early)
487 struct mpf_intel *mpf;
489 if (!smp_found_config)
495 if (acpi_lapic && early)
499 * MPS doesn't support hyperthreading, aka only have
500 * thread 0 apic id in MPS table
502 if (acpi_lapic && acpi_ioapic)
505 mpf = early_memremap(mpf_base, sizeof(*mpf));
507 pr_err("MPTABLE: error mapping MP table\n");
511 pr_info("Intel MultiProcessor Specification v1.%d\n",
513 #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32)
514 if (mpf->feature2 & (1 << 7)) {
515 pr_info(" IMCR and PIC compatibility mode.\n");
518 pr_info(" Virtual Wire compatibility mode.\n");
523 * Now see if we need to read further.
528 * local APIC has default address
530 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
534 pr_info("Default MP configuration #%d\n", mpf->feature1);
535 construct_default_ISA_mptable(mpf->feature1);
537 } else if (mpf->physptr) {
538 if (check_physptr(mpf, early))
544 pr_info("Processors: %d\n", num_processors);
546 * Only use the first configuration found.
549 early_memunmap(mpf, sizeof(*mpf));
552 static void __init smp_reserve_memory(struct mpf_intel *mpf)
554 memblock_reserve(mpf->physptr, get_mpc_size(mpf->physptr));
557 static int __init smp_scan_config(unsigned long base, unsigned long length)
560 struct mpf_intel *mpf;
563 apic_printk(APIC_VERBOSE, "Scan for SMP in [mem %#010lx-%#010lx]\n",
564 base, base + length - 1);
565 BUILD_BUG_ON(sizeof(*mpf) != 16);
568 bp = early_memremap(base, length);
569 mpf = (struct mpf_intel *)bp;
570 if ((*bp == SMP_MAGIC_IDENT) &&
571 (mpf->length == 1) &&
572 !mpf_checksum((unsigned char *)bp, 16) &&
573 ((mpf->specification == 1)
574 || (mpf->specification == 4))) {
575 #ifdef CONFIG_X86_LOCAL_APIC
576 smp_found_config = 1;
581 pr_info("found SMP MP-table at [mem %#010lx-%#010lx]\n",
582 base, base + sizeof(*mpf) - 1);
584 memblock_reserve(base, sizeof(*mpf));
586 smp_reserve_memory(mpf);
590 early_memunmap(bp, length);
601 void __init default_find_smp_config(void)
603 unsigned int address;
606 * FIXME: Linux assumes you have 640K of base ram..
607 * this continues the error...
609 * 1) Scan the bottom 1K for a signature
610 * 2) Scan the top 1K of base RAM
611 * 3) Scan the 64K of bios
613 if (smp_scan_config(0x0, 0x400) ||
614 smp_scan_config(639 * 0x400, 0x400) ||
615 smp_scan_config(0xF0000, 0x10000))
618 * If it is an SMP machine we should know now, unless the
619 * configuration is in an EISA bus machine with an
620 * extended bios data area.
622 * there is a real-mode segmented pointer pointing to the
623 * 4K EBDA area at 0x40E, calculate and scan it here.
625 * NOTE! There are Linux loaders that will corrupt the EBDA
626 * area, and as such this kind of SMP config may be less
627 * trustworthy, simply because the SMP table may have been
628 * stomped on during early boot. These loaders are buggy and
631 * MP1.4 SPEC states to only scan first 1K of 4K EBDA.
634 address = get_bios_ebda();
636 smp_scan_config(address, 0x400);
639 #ifdef CONFIG_X86_IO_APIC
640 static u8 __initdata irq_used[MAX_IRQ_SOURCES];
642 static int __init get_MP_intsrc_index(struct mpc_intsrc *m)
646 if (m->irqtype != mp_INT)
649 if (m->irqflag != (MP_IRQTRIG_LEVEL | MP_IRQPOL_ACTIVE_LOW))
654 for (i = 0; i < mp_irq_entries; i++) {
655 if (mp_irqs[i].irqtype != mp_INT)
658 if (mp_irqs[i].irqflag != (MP_IRQTRIG_LEVEL |
659 MP_IRQPOL_ACTIVE_LOW))
662 if (mp_irqs[i].srcbus != m->srcbus)
664 if (mp_irqs[i].srcbusirq != m->srcbusirq)
667 /* already claimed */
678 #define SPARE_SLOT_NUM 20
680 static struct mpc_intsrc __initdata *m_spare[SPARE_SLOT_NUM];
682 static void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare)
686 apic_printk(APIC_VERBOSE, "OLD ");
687 print_mp_irq_info(m);
689 i = get_MP_intsrc_index(m);
691 memcpy(m, &mp_irqs[i], sizeof(*m));
692 apic_printk(APIC_VERBOSE, "NEW ");
693 print_mp_irq_info(&mp_irqs[i]);
697 /* legacy, do nothing */
700 if (*nr_m_spare < SPARE_SLOT_NUM) {
702 * not found (-1), or duplicated (-2) are invalid entries,
703 * we need to use the slot later
705 m_spare[*nr_m_spare] = m;
711 check_slot(unsigned long mpc_new_phys, unsigned long mpc_new_length, int count)
713 if (!mpc_new_phys || count <= mpc_new_length) {
714 WARN(1, "update_mptable: No spare slots (length: %x)\n", count);
720 #else /* CONFIG_X86_IO_APIC */
722 inline void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare) {}
723 #endif /* CONFIG_X86_IO_APIC */
725 static int __init replace_intsrc_all(struct mpc_table *mpc,
726 unsigned long mpc_new_phys,
727 unsigned long mpc_new_length)
729 #ifdef CONFIG_X86_IO_APIC
732 int count = sizeof(*mpc);
734 unsigned char *mpt = ((unsigned char *)mpc) + count;
736 pr_info("mpc_length %x\n", mpc->length);
737 while (count < mpc->length) {
740 skip_entry(&mpt, &count, sizeof(struct mpc_cpu));
743 skip_entry(&mpt, &count, sizeof(struct mpc_bus));
746 skip_entry(&mpt, &count, sizeof(struct mpc_ioapic));
749 check_irq_src((struct mpc_intsrc *)mpt, &nr_m_spare);
750 skip_entry(&mpt, &count, sizeof(struct mpc_intsrc));
753 skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc));
757 smp_dump_mptable(mpc, mpt);
762 #ifdef CONFIG_X86_IO_APIC
763 for (i = 0; i < mp_irq_entries; i++) {
767 if (mp_irqs[i].irqtype != mp_INT)
770 if (mp_irqs[i].irqflag != (MP_IRQTRIG_LEVEL |
771 MP_IRQPOL_ACTIVE_LOW))
774 if (nr_m_spare > 0) {
775 apic_printk(APIC_VERBOSE, "*NEW* found\n");
777 memcpy(m_spare[nr_m_spare], &mp_irqs[i], sizeof(mp_irqs[i]));
778 m_spare[nr_m_spare] = NULL;
780 struct mpc_intsrc *m = (struct mpc_intsrc *)mpt;
781 count += sizeof(struct mpc_intsrc);
782 if (check_slot(mpc_new_phys, mpc_new_length, count) < 0)
784 memcpy(m, &mp_irqs[i], sizeof(*m));
786 mpt += sizeof(struct mpc_intsrc);
788 print_mp_irq_info(&mp_irqs[i]);
792 /* update checksum */
794 mpc->checksum -= mpf_checksum((unsigned char *)mpc, mpc->length);
799 int enable_update_mptable;
801 static int __init update_mptable_setup(char *str)
803 enable_update_mptable = 1;
809 early_param("update_mptable", update_mptable_setup);
811 static unsigned long __initdata mpc_new_phys;
812 static unsigned long mpc_new_length __initdata = 4096;
814 /* alloc_mptable or alloc_mptable=4k */
815 static int __initdata alloc_mptable;
816 static int __init parse_alloc_mptable_opt(char *p)
818 enable_update_mptable = 1;
825 mpc_new_length = memparse(p, &p);
828 early_param("alloc_mptable", parse_alloc_mptable_opt);
830 void __init e820__memblock_alloc_reserved_mpc_new(void)
832 if (enable_update_mptable && alloc_mptable)
833 mpc_new_phys = e820__memblock_alloc_reserved(mpc_new_length, 4);
836 static int __init update_mp_table(void)
840 struct mpf_intel *mpf;
841 struct mpc_table *mpc, *mpc_new;
844 if (!enable_update_mptable)
850 mpf = early_memremap(mpf_base, sizeof(*mpf));
852 pr_err("MPTABLE: mpf early_memremap() failed\n");
857 * Now see if we need to go further.
865 size = get_mpc_size(mpf->physptr);
866 mpc = early_memremap(mpf->physptr, size);
868 pr_err("MPTABLE: mpc early_memremap() failed\n");
872 if (!smp_check_mpc(mpc, oem, str))
875 pr_info("mpf: %llx\n", (u64)mpf_base);
876 pr_info("physptr: %x\n", mpf->physptr);
878 if (mpc_new_phys && mpc->length > mpc_new_length) {
880 pr_info("mpc_new_length is %ld, please use alloc_mptable=8k\n",
885 unsigned char old, new;
886 /* check if we can change the position */
888 old = mpf_checksum((unsigned char *)mpc, mpc->length);
889 mpc->checksum = 0xff;
890 new = mpf_checksum((unsigned char *)mpc, mpc->length);
892 pr_info("mpc is readonly, please try alloc_mptable instead\n");
895 pr_info("use in-position replacing\n");
897 mpc_new = early_memremap(mpc_new_phys, mpc_new_length);
899 pr_err("MPTABLE: new mpc early_memremap() failed\n");
902 mpf->physptr = mpc_new_phys;
903 memcpy(mpc_new, mpc, mpc->length);
904 early_memunmap(mpc, size);
906 size = mpc_new_length;
907 /* check if we can modify that */
908 if (mpc_new_phys - mpf->physptr) {
909 struct mpf_intel *mpf_new;
910 /* steal 16 bytes from [0, 1k) */
911 mpf_new = early_memremap(0x400 - 16, sizeof(*mpf_new));
913 pr_err("MPTABLE: new mpf early_memremap() failed\n");
916 pr_info("mpf new: %x\n", 0x400 - 16);
917 memcpy(mpf_new, mpf, 16);
918 early_memunmap(mpf, sizeof(*mpf));
920 mpf->physptr = mpc_new_phys;
923 mpf->checksum -= mpf_checksum((unsigned char *)mpf, 16);
924 pr_info("physptr new: %x\n", mpf->physptr);
928 * only replace the one with mp_INT and
929 * MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
930 * already in mp_irqs , stored by ... and mp_config_acpi_gsi,
931 * may need pci=routeirq for all coverage
933 replace_intsrc_all(mpc, mpc_new_phys, mpc_new_length);
936 early_memunmap(mpc, size);
939 early_memunmap(mpf, sizeof(*mpf));
944 late_initcall(update_mp_table);