1 // SPDX-License-Identifier: GPL-2.0
3 * FPU register's regset abstraction, for ptrace, core dumps, etc.
5 #include <linux/sched/task_stack.h>
6 #include <linux/vmalloc.h>
8 #include <asm/fpu/internal.h>
9 #include <asm/fpu/signal.h>
10 #include <asm/fpu/regset.h>
11 #include <asm/fpu/xstate.h>
17 * The xstateregs_active() routine is the same as the regset_fpregs_active() routine,
18 * as the "regset->n" for the xstate regset will be updated based on the feature
19 * capabilities supported by the xsave.
21 int regset_fpregs_active(struct task_struct *target, const struct user_regset *regset)
26 int regset_xregset_fpregs_active(struct task_struct *target, const struct user_regset *regset)
28 if (boot_cpu_has(X86_FEATURE_FXSR))
35 * The regset get() functions are invoked from:
37 * - coredump to dump the current task's fpstate. If the current task
38 * owns the FPU then the memory state has to be synchronized and the
39 * FPU register state preserved. Otherwise fpstate is already in sync.
41 * - ptrace to dump fpstate of a stopped task, in which case the registers
42 * have already been saved to fpstate on context switch.
44 static void sync_fpstate(struct fpu *fpu)
46 if (fpu == ¤t->thread.fpu)
47 fpu_sync_fpstate(fpu);
51 * Invalidate cached FPU registers before modifying the stopped target
54 * This forces the target task on resume to restore the FPU registers from
55 * modified fpstate. Otherwise the task might skip the restore and operate
56 * with the cached FPU registers which discards the modifications.
58 static void fpu_force_restore(struct fpu *fpu)
61 * Only stopped child tasks can be used to modify the FPU
62 * state in the fpstate buffer:
64 WARN_ON_FPU(fpu == ¤t->thread.fpu);
66 __fpu_invalidate_fpregs_state(fpu);
69 int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
72 struct fpu *fpu = &target->thread.fpu;
74 if (!cpu_feature_enabled(X86_FEATURE_FXSR))
80 return membuf_write(&to, &fpu->state.fxsave,
81 sizeof(fpu->state.fxsave));
84 copy_xstate_to_uabi_buf(to, target, XSTATE_COPY_FX);
88 int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
89 unsigned int pos, unsigned int count,
90 const void *kbuf, const void __user *ubuf)
92 struct fpu *fpu = &target->thread.fpu;
93 struct user32_fxsr_struct newstate;
96 BUILD_BUG_ON(sizeof(newstate) != sizeof(struct fxregs_state));
98 if (!cpu_feature_enabled(X86_FEATURE_FXSR))
101 /* No funny business with partial or oversized writes is permitted. */
102 if (pos != 0 || count != sizeof(newstate))
105 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &newstate, 0, -1);
109 /* Do not allow an invalid MXCSR value. */
110 if (newstate.mxcsr & ~mxcsr_feature_mask)
113 fpu_force_restore(fpu);
116 memcpy(&fpu->state.fxsave, &newstate, sizeof(newstate));
119 BUILD_BUG_ON(sizeof(fpu->state.fxsave.xmm_space) != 16 * 16);
120 memset(&fpu->state.fxsave.xmm_space[8], 0, 8 * 16);
122 /* Mark FP and SSE as in use when XSAVE is enabled */
124 fpu->state.xsave.header.xfeatures |= XFEATURE_MASK_FPSSE;
129 int xstateregs_get(struct task_struct *target, const struct user_regset *regset,
132 if (!cpu_feature_enabled(X86_FEATURE_XSAVE))
135 sync_fpstate(&target->thread.fpu);
137 copy_xstate_to_uabi_buf(to, target, XSTATE_COPY_XSAVE);
141 int xstateregs_set(struct task_struct *target, const struct user_regset *regset,
142 unsigned int pos, unsigned int count,
143 const void *kbuf, const void __user *ubuf)
145 struct fpu *fpu = &target->thread.fpu;
146 struct xregs_state *tmpbuf = NULL;
149 if (!cpu_feature_enabled(X86_FEATURE_XSAVE))
153 * A whole standard-format XSAVE buffer is needed:
155 if (pos != 0 || count != fpu_user_xstate_size)
159 tmpbuf = vmalloc(count);
163 if (copy_from_user(tmpbuf, ubuf, count)) {
169 fpu_force_restore(fpu);
170 ret = copy_uabi_from_kernel_to_xstate(&fpu->state.xsave, kbuf ?: tmpbuf);
177 #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
180 * FPU tag word conversions.
183 static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
185 unsigned int tmp; /* to avoid 16 bit prefixes in the code */
187 /* Transform each pair of bits into 01 (valid) or 00 (empty) */
189 tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
190 /* and move the valid bits to the lower byte. */
191 tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
192 tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
193 tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */
198 #define FPREG_ADDR(f, n) ((void *)&(f)->st_space + (n) * 16)
199 #define FP_EXP_TAG_VALID 0
200 #define FP_EXP_TAG_ZERO 1
201 #define FP_EXP_TAG_SPECIAL 2
202 #define FP_EXP_TAG_EMPTY 3
204 static inline u32 twd_fxsr_to_i387(struct fxregs_state *fxsave)
207 u32 tos = (fxsave->swd >> 11) & 7;
208 u32 twd = (unsigned long) fxsave->twd;
210 u32 ret = 0xffff0000u;
213 for (i = 0; i < 8; i++, twd >>= 1) {
215 st = FPREG_ADDR(fxsave, (i - tos) & 7);
217 switch (st->exponent & 0x7fff) {
219 tag = FP_EXP_TAG_SPECIAL;
222 if (!st->significand[0] &&
223 !st->significand[1] &&
224 !st->significand[2] &&
226 tag = FP_EXP_TAG_ZERO;
228 tag = FP_EXP_TAG_SPECIAL;
231 if (st->significand[3] & 0x8000)
232 tag = FP_EXP_TAG_VALID;
234 tag = FP_EXP_TAG_SPECIAL;
238 tag = FP_EXP_TAG_EMPTY;
240 ret |= tag << (2 * i);
246 * FXSR floating point environment conversions.
249 static void __convert_from_fxsr(struct user_i387_ia32_struct *env,
250 struct task_struct *tsk,
251 struct fxregs_state *fxsave)
253 struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
254 struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
257 env->cwd = fxsave->cwd | 0xffff0000u;
258 env->swd = fxsave->swd | 0xffff0000u;
259 env->twd = twd_fxsr_to_i387(fxsave);
262 env->fip = fxsave->rip;
263 env->foo = fxsave->rdp;
265 * should be actually ds/cs at fpu exception time, but
266 * that information is not available in 64bit mode.
268 env->fcs = task_pt_regs(tsk)->cs;
269 if (tsk == current) {
270 savesegment(ds, env->fos);
272 env->fos = tsk->thread.ds;
274 env->fos |= 0xffff0000;
276 env->fip = fxsave->fip;
277 env->fcs = (u16) fxsave->fcs | ((u32) fxsave->fop << 16);
278 env->foo = fxsave->foo;
279 env->fos = fxsave->fos;
282 for (i = 0; i < 8; ++i)
283 memcpy(&to[i], &from[i], sizeof(to[0]));
287 convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
289 __convert_from_fxsr(env, tsk, &tsk->thread.fpu.state.fxsave);
292 void convert_to_fxsr(struct fxregs_state *fxsave,
293 const struct user_i387_ia32_struct *env)
296 struct _fpreg *from = (struct _fpreg *) &env->st_space[0];
297 struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0];
300 fxsave->cwd = env->cwd;
301 fxsave->swd = env->swd;
302 fxsave->twd = twd_i387_to_fxsr(env->twd);
303 fxsave->fop = (u16) ((u32) env->fcs >> 16);
305 fxsave->rip = env->fip;
306 fxsave->rdp = env->foo;
307 /* cs and ds ignored */
309 fxsave->fip = env->fip;
310 fxsave->fcs = (env->fcs & 0xffff);
311 fxsave->foo = env->foo;
312 fxsave->fos = env->fos;
315 for (i = 0; i < 8; ++i)
316 memcpy(&to[i], &from[i], sizeof(from[0]));
319 int fpregs_get(struct task_struct *target, const struct user_regset *regset,
322 struct fpu *fpu = &target->thread.fpu;
323 struct user_i387_ia32_struct env;
324 struct fxregs_state fxsave, *fx;
328 if (!cpu_feature_enabled(X86_FEATURE_FPU))
329 return fpregs_soft_get(target, regset, to);
331 if (!cpu_feature_enabled(X86_FEATURE_FXSR)) {
332 return membuf_write(&to, &fpu->state.fsave,
333 sizeof(struct fregs_state));
337 struct membuf mb = { .p = &fxsave, .left = sizeof(fxsave) };
339 /* Handle init state optimized xstate correctly */
340 copy_xstate_to_uabi_buf(mb, target, XSTATE_COPY_FP);
343 fx = &fpu->state.fxsave;
346 __convert_from_fxsr(&env, target, fx);
347 return membuf_write(&to, &env, sizeof(env));
350 int fpregs_set(struct task_struct *target, const struct user_regset *regset,
351 unsigned int pos, unsigned int count,
352 const void *kbuf, const void __user *ubuf)
354 struct fpu *fpu = &target->thread.fpu;
355 struct user_i387_ia32_struct env;
358 /* No funny business with partial or oversized writes is permitted. */
359 if (pos != 0 || count != sizeof(struct user_i387_ia32_struct))
362 if (!cpu_feature_enabled(X86_FEATURE_FPU))
363 return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);
365 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
369 fpu_force_restore(fpu);
371 if (cpu_feature_enabled(X86_FEATURE_FXSR))
372 convert_to_fxsr(&fpu->state.fxsave, &env);
374 memcpy(&fpu->state.fsave, &env, sizeof(env));
377 * Update the header bit in the xsave header, indicating the
380 if (cpu_feature_enabled(X86_FEATURE_XSAVE))
381 fpu->state.xsave.header.xfeatures |= XFEATURE_MASK_FP;
386 #endif /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */