2 * FPU register's regset abstraction, for ptrace, core dumps, etc.
4 #include <asm/fpu/internal.h>
5 #include <asm/fpu/signal.h>
6 #include <asm/fpu/regset.h>
7 #include <asm/fpu/xstate.h>
8 #include <linux/sched/task_stack.h>
11 * The xstateregs_active() routine is the same as the regset_fpregs_active() routine,
12 * as the "regset->n" for the xstate regset will be updated based on the feature
13 * capabilities supported by the xsave.
15 int regset_fpregs_active(struct task_struct *target, const struct user_regset *regset)
17 struct fpu *target_fpu = &target->thread.fpu;
19 return target_fpu->initialized ? regset->n : 0;
22 int regset_xregset_fpregs_active(struct task_struct *target, const struct user_regset *regset)
24 struct fpu *target_fpu = &target->thread.fpu;
26 if (boot_cpu_has(X86_FEATURE_FXSR) && target_fpu->initialized)
32 int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
33 unsigned int pos, unsigned int count,
34 void *kbuf, void __user *ubuf)
36 struct fpu *fpu = &target->thread.fpu;
38 if (!boot_cpu_has(X86_FEATURE_FXSR))
41 fpu__prepare_read(fpu);
42 fpstate_sanitize_xstate(fpu);
44 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
45 &fpu->state.fxsave, 0, -1);
48 int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
49 unsigned int pos, unsigned int count,
50 const void *kbuf, const void __user *ubuf)
52 struct fpu *fpu = &target->thread.fpu;
55 if (!boot_cpu_has(X86_FEATURE_FXSR))
58 fpu__prepare_write(fpu);
59 fpstate_sanitize_xstate(fpu);
61 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
62 &fpu->state.fxsave, 0, -1);
65 * mxcsr reserved bits must be masked to zero for security reasons.
67 fpu->state.fxsave.mxcsr &= mxcsr_feature_mask;
70 * update the header bits in the xsave header, indicating the
71 * presence of FP and SSE state.
73 if (boot_cpu_has(X86_FEATURE_XSAVE))
74 fpu->state.xsave.header.xfeatures |= XFEATURE_MASK_FPSSE;
79 int xstateregs_get(struct task_struct *target, const struct user_regset *regset,
80 unsigned int pos, unsigned int count,
81 void *kbuf, void __user *ubuf)
83 struct fpu *fpu = &target->thread.fpu;
84 struct xregs_state *xsave;
87 if (!boot_cpu_has(X86_FEATURE_XSAVE))
90 xsave = &fpu->state.xsave;
92 fpu__prepare_read(fpu);
94 if (using_compacted_format()) {
96 ret = copy_xstate_to_kernel(kbuf, xsave, pos, count);
98 ret = copy_xstate_to_user(ubuf, xsave, pos, count);
100 fpstate_sanitize_xstate(fpu);
102 * Copy the 48 bytes defined by the software into the xsave
103 * area in the thread struct, so that we can copy the whole
104 * area to user using one user_regset_copyout().
106 memcpy(&xsave->i387.sw_reserved, xstate_fx_sw_bytes, sizeof(xstate_fx_sw_bytes));
109 * Copy the xstate memory layout.
111 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, xsave, 0, -1);
116 int xstateregs_set(struct task_struct *target, const struct user_regset *regset,
117 unsigned int pos, unsigned int count,
118 const void *kbuf, const void __user *ubuf)
120 struct fpu *fpu = &target->thread.fpu;
121 struct xregs_state *xsave;
124 if (!boot_cpu_has(X86_FEATURE_XSAVE))
128 * A whole standard-format XSAVE buffer is needed:
130 if ((pos != 0) || (count < fpu_user_xstate_size))
133 xsave = &fpu->state.xsave;
135 fpu__prepare_write(fpu);
137 if (using_compacted_format()) {
139 ret = copy_kernel_to_xstate(xsave, kbuf);
141 ret = copy_user_to_xstate(xsave, ubuf);
143 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, xsave, 0, -1);
145 ret = validate_xstate_header(&xsave->header);
149 * mxcsr reserved bits must be masked to zero for security reasons.
151 xsave->i387.mxcsr &= mxcsr_feature_mask;
154 * In case of failure, mark all states as init:
157 fpstate_init(&fpu->state);
162 #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
165 * FPU tag word conversions.
168 static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
170 unsigned int tmp; /* to avoid 16 bit prefixes in the code */
172 /* Transform each pair of bits into 01 (valid) or 00 (empty) */
174 tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
175 /* and move the valid bits to the lower byte. */
176 tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
177 tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
178 tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */
183 #define FPREG_ADDR(f, n) ((void *)&(f)->st_space + (n) * 16)
184 #define FP_EXP_TAG_VALID 0
185 #define FP_EXP_TAG_ZERO 1
186 #define FP_EXP_TAG_SPECIAL 2
187 #define FP_EXP_TAG_EMPTY 3
189 static inline u32 twd_fxsr_to_i387(struct fxregs_state *fxsave)
192 u32 tos = (fxsave->swd >> 11) & 7;
193 u32 twd = (unsigned long) fxsave->twd;
195 u32 ret = 0xffff0000u;
198 for (i = 0; i < 8; i++, twd >>= 1) {
200 st = FPREG_ADDR(fxsave, (i - tos) & 7);
202 switch (st->exponent & 0x7fff) {
204 tag = FP_EXP_TAG_SPECIAL;
207 if (!st->significand[0] &&
208 !st->significand[1] &&
209 !st->significand[2] &&
211 tag = FP_EXP_TAG_ZERO;
213 tag = FP_EXP_TAG_SPECIAL;
216 if (st->significand[3] & 0x8000)
217 tag = FP_EXP_TAG_VALID;
219 tag = FP_EXP_TAG_SPECIAL;
223 tag = FP_EXP_TAG_EMPTY;
225 ret |= tag << (2 * i);
231 * FXSR floating point environment conversions.
235 convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
237 struct fxregs_state *fxsave = &tsk->thread.fpu.state.fxsave;
238 struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
239 struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
242 env->cwd = fxsave->cwd | 0xffff0000u;
243 env->swd = fxsave->swd | 0xffff0000u;
244 env->twd = twd_fxsr_to_i387(fxsave);
247 env->fip = fxsave->rip;
248 env->foo = fxsave->rdp;
250 * should be actually ds/cs at fpu exception time, but
251 * that information is not available in 64bit mode.
253 env->fcs = task_pt_regs(tsk)->cs;
254 if (tsk == current) {
255 savesegment(ds, env->fos);
257 env->fos = tsk->thread.ds;
259 env->fos |= 0xffff0000;
261 env->fip = fxsave->fip;
262 env->fcs = (u16) fxsave->fcs | ((u32) fxsave->fop << 16);
263 env->foo = fxsave->foo;
264 env->fos = fxsave->fos;
267 for (i = 0; i < 8; ++i)
268 memcpy(&to[i], &from[i], sizeof(to[0]));
271 void convert_to_fxsr(struct task_struct *tsk,
272 const struct user_i387_ia32_struct *env)
275 struct fxregs_state *fxsave = &tsk->thread.fpu.state.fxsave;
276 struct _fpreg *from = (struct _fpreg *) &env->st_space[0];
277 struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0];
280 fxsave->cwd = env->cwd;
281 fxsave->swd = env->swd;
282 fxsave->twd = twd_i387_to_fxsr(env->twd);
283 fxsave->fop = (u16) ((u32) env->fcs >> 16);
285 fxsave->rip = env->fip;
286 fxsave->rdp = env->foo;
287 /* cs and ds ignored */
289 fxsave->fip = env->fip;
290 fxsave->fcs = (env->fcs & 0xffff);
291 fxsave->foo = env->foo;
292 fxsave->fos = env->fos;
295 for (i = 0; i < 8; ++i)
296 memcpy(&to[i], &from[i], sizeof(from[0]));
299 int fpregs_get(struct task_struct *target, const struct user_regset *regset,
300 unsigned int pos, unsigned int count,
301 void *kbuf, void __user *ubuf)
303 struct fpu *fpu = &target->thread.fpu;
304 struct user_i387_ia32_struct env;
306 fpu__prepare_read(fpu);
308 if (!boot_cpu_has(X86_FEATURE_FPU))
309 return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);
311 if (!boot_cpu_has(X86_FEATURE_FXSR))
312 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
313 &fpu->state.fsave, 0,
316 fpstate_sanitize_xstate(fpu);
318 if (kbuf && pos == 0 && count == sizeof(env)) {
319 convert_from_fxsr(kbuf, target);
323 convert_from_fxsr(&env, target);
325 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
328 int fpregs_set(struct task_struct *target, const struct user_regset *regset,
329 unsigned int pos, unsigned int count,
330 const void *kbuf, const void __user *ubuf)
332 struct fpu *fpu = &target->thread.fpu;
333 struct user_i387_ia32_struct env;
336 fpu__prepare_write(fpu);
337 fpstate_sanitize_xstate(fpu);
339 if (!boot_cpu_has(X86_FEATURE_FPU))
340 return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);
342 if (!boot_cpu_has(X86_FEATURE_FXSR))
343 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
344 &fpu->state.fsave, 0,
347 if (pos > 0 || count < sizeof(env))
348 convert_from_fxsr(&env, target);
350 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
352 convert_to_fxsr(target, &env);
355 * update the header bit in the xsave header, indicating the
358 if (boot_cpu_has(X86_FEATURE_XSAVE))
359 fpu->state.xsave.header.xfeatures |= XFEATURE_MASK_FP;
364 * FPU state for core dumps.
365 * This is only used for a.out dumps now.
366 * It is declared generically using elf_fpregset_t (which is
367 * struct user_i387_struct) but is in fact only used for 32-bit
368 * dumps, so on 64-bit it is really struct user_i387_ia32_struct.
370 int dump_fpu(struct pt_regs *regs, struct user_i387_struct *ufpu)
372 struct task_struct *tsk = current;
373 struct fpu *fpu = &tsk->thread.fpu;
376 fpvalid = fpu->initialized;
378 fpvalid = !fpregs_get(tsk, NULL,
379 0, sizeof(struct user_i387_ia32_struct),
384 EXPORT_SYMBOL(dump_fpu);
386 #endif /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */