1 /* SPDX-License-Identifier: GPL-2.0 */
5 #include <uapi/asm/svm.h>
14 INTERCEPT_SELECTIVE_CR0,
38 INTERCEPT_TASK_SWITCH,
39 INTERCEPT_FERR_FREEZE,
59 struct __attribute__ ((__packed__)) vmcb_control_area {
62 u32 intercept_exceptions;
65 u16 pause_filter_thresh;
66 u16 pause_filter_count;
82 u32 exit_int_info_err;
95 u64 avic_backing_page; /* Offset 0xe0 */
96 u8 reserved_6[8]; /* Offset 0xe8 */
97 u64 avic_logical_id; /* Offset 0xf0 */
98 u64 avic_physical_id; /* Offset 0xf8 */
102 #define TLB_CONTROL_DO_NOTHING 0
103 #define TLB_CONTROL_FLUSH_ALL_ASID 1
104 #define TLB_CONTROL_FLUSH_ASID 3
105 #define TLB_CONTROL_FLUSH_ASID_LOCAL 7
107 #define V_TPR_MASK 0x0f
109 #define V_IRQ_SHIFT 8
110 #define V_IRQ_MASK (1 << V_IRQ_SHIFT)
112 #define V_GIF_SHIFT 9
113 #define V_GIF_MASK (1 << V_GIF_SHIFT)
115 #define V_INTR_PRIO_SHIFT 16
116 #define V_INTR_PRIO_MASK (0x0f << V_INTR_PRIO_SHIFT)
118 #define V_IGN_TPR_SHIFT 20
119 #define V_IGN_TPR_MASK (1 << V_IGN_TPR_SHIFT)
121 #define V_INTR_MASKING_SHIFT 24
122 #define V_INTR_MASKING_MASK (1 << V_INTR_MASKING_SHIFT)
124 #define V_GIF_ENABLE_SHIFT 25
125 #define V_GIF_ENABLE_MASK (1 << V_GIF_ENABLE_SHIFT)
127 #define AVIC_ENABLE_SHIFT 31
128 #define AVIC_ENABLE_MASK (1 << AVIC_ENABLE_SHIFT)
130 #define LBR_CTL_ENABLE_MASK BIT_ULL(0)
131 #define VIRTUAL_VMLOAD_VMSAVE_ENABLE_MASK BIT_ULL(1)
133 #define SVM_INTERRUPT_SHADOW_MASK 1
135 #define SVM_IOIO_STR_SHIFT 2
136 #define SVM_IOIO_REP_SHIFT 3
137 #define SVM_IOIO_SIZE_SHIFT 4
138 #define SVM_IOIO_ASIZE_SHIFT 7
140 #define SVM_IOIO_TYPE_MASK 1
141 #define SVM_IOIO_STR_MASK (1 << SVM_IOIO_STR_SHIFT)
142 #define SVM_IOIO_REP_MASK (1 << SVM_IOIO_REP_SHIFT)
143 #define SVM_IOIO_SIZE_MASK (7 << SVM_IOIO_SIZE_SHIFT)
144 #define SVM_IOIO_ASIZE_MASK (7 << SVM_IOIO_ASIZE_SHIFT)
146 #define SVM_VM_CR_VALID_MASK 0x001fULL
147 #define SVM_VM_CR_SVM_LOCK_MASK 0x0008ULL
148 #define SVM_VM_CR_SVM_DIS_MASK 0x0010ULL
150 #define SVM_NESTED_CTL_NP_ENABLE BIT(0)
151 #define SVM_NESTED_CTL_SEV_ENABLE BIT(1)
160 struct vmcb_save_area {
167 struct vmcb_seg gdtr;
168 struct vmcb_seg ldtr;
169 struct vmcb_seg idtr;
205 * The following part of the save area is valid only for
206 * SEV-ES guests when referenced through the GHCB.
209 u64 reserved_8; /* rax already available at 0x01f8 */
213 u64 reserved_9; /* rsp already available at 0x01d8 */
237 struct vmcb_save_area save;
238 u8 reserved_save[2048 - sizeof(struct vmcb_save_area)];
240 u8 shared_buffer[2032];
243 u16 protocol_version; /* negotiated SEV-ES/GHCB protocol version */
248 #define EXPECTED_VMCB_SAVE_AREA_SIZE 1032
249 #define EXPECTED_VMCB_CONTROL_AREA_SIZE 256
250 #define EXPECTED_GHCB_SIZE PAGE_SIZE
252 static inline void __unused_size_checks(void)
254 BUILD_BUG_ON(sizeof(struct vmcb_save_area) != EXPECTED_VMCB_SAVE_AREA_SIZE);
255 BUILD_BUG_ON(sizeof(struct vmcb_control_area) != EXPECTED_VMCB_CONTROL_AREA_SIZE);
256 BUILD_BUG_ON(sizeof(struct ghcb) != EXPECTED_GHCB_SIZE);
260 struct vmcb_control_area control;
261 u8 reserved_control[1024 - sizeof(struct vmcb_control_area)];
262 struct vmcb_save_area save;
265 #define SVM_CPUID_FUNC 0x8000000a
267 #define SVM_VM_CR_SVM_DISABLE 4
269 #define SVM_SELECTOR_S_SHIFT 4
270 #define SVM_SELECTOR_DPL_SHIFT 5
271 #define SVM_SELECTOR_P_SHIFT 7
272 #define SVM_SELECTOR_AVL_SHIFT 8
273 #define SVM_SELECTOR_L_SHIFT 9
274 #define SVM_SELECTOR_DB_SHIFT 10
275 #define SVM_SELECTOR_G_SHIFT 11
277 #define SVM_SELECTOR_TYPE_MASK (0xf)
278 #define SVM_SELECTOR_S_MASK (1 << SVM_SELECTOR_S_SHIFT)
279 #define SVM_SELECTOR_DPL_MASK (3 << SVM_SELECTOR_DPL_SHIFT)
280 #define SVM_SELECTOR_P_MASK (1 << SVM_SELECTOR_P_SHIFT)
281 #define SVM_SELECTOR_AVL_MASK (1 << SVM_SELECTOR_AVL_SHIFT)
282 #define SVM_SELECTOR_L_MASK (1 << SVM_SELECTOR_L_SHIFT)
283 #define SVM_SELECTOR_DB_MASK (1 << SVM_SELECTOR_DB_SHIFT)
284 #define SVM_SELECTOR_G_MASK (1 << SVM_SELECTOR_G_SHIFT)
286 #define SVM_SELECTOR_WRITE_MASK (1 << 1)
287 #define SVM_SELECTOR_READ_MASK SVM_SELECTOR_WRITE_MASK
288 #define SVM_SELECTOR_CODE_MASK (1 << 3)
290 #define INTERCEPT_CR0_READ 0
291 #define INTERCEPT_CR3_READ 3
292 #define INTERCEPT_CR4_READ 4
293 #define INTERCEPT_CR8_READ 8
294 #define INTERCEPT_CR0_WRITE (16 + 0)
295 #define INTERCEPT_CR3_WRITE (16 + 3)
296 #define INTERCEPT_CR4_WRITE (16 + 4)
297 #define INTERCEPT_CR8_WRITE (16 + 8)
299 #define INTERCEPT_DR0_READ 0
300 #define INTERCEPT_DR1_READ 1
301 #define INTERCEPT_DR2_READ 2
302 #define INTERCEPT_DR3_READ 3
303 #define INTERCEPT_DR4_READ 4
304 #define INTERCEPT_DR5_READ 5
305 #define INTERCEPT_DR6_READ 6
306 #define INTERCEPT_DR7_READ 7
307 #define INTERCEPT_DR0_WRITE (16 + 0)
308 #define INTERCEPT_DR1_WRITE (16 + 1)
309 #define INTERCEPT_DR2_WRITE (16 + 2)
310 #define INTERCEPT_DR3_WRITE (16 + 3)
311 #define INTERCEPT_DR4_WRITE (16 + 4)
312 #define INTERCEPT_DR5_WRITE (16 + 5)
313 #define INTERCEPT_DR6_WRITE (16 + 6)
314 #define INTERCEPT_DR7_WRITE (16 + 7)
316 #define SVM_EVTINJ_VEC_MASK 0xff
318 #define SVM_EVTINJ_TYPE_SHIFT 8
319 #define SVM_EVTINJ_TYPE_MASK (7 << SVM_EVTINJ_TYPE_SHIFT)
321 #define SVM_EVTINJ_TYPE_INTR (0 << SVM_EVTINJ_TYPE_SHIFT)
322 #define SVM_EVTINJ_TYPE_NMI (2 << SVM_EVTINJ_TYPE_SHIFT)
323 #define SVM_EVTINJ_TYPE_EXEPT (3 << SVM_EVTINJ_TYPE_SHIFT)
324 #define SVM_EVTINJ_TYPE_SOFT (4 << SVM_EVTINJ_TYPE_SHIFT)
326 #define SVM_EVTINJ_VALID (1 << 31)
327 #define SVM_EVTINJ_VALID_ERR (1 << 11)
329 #define SVM_EXITINTINFO_VEC_MASK SVM_EVTINJ_VEC_MASK
330 #define SVM_EXITINTINFO_TYPE_MASK SVM_EVTINJ_TYPE_MASK
332 #define SVM_EXITINTINFO_TYPE_INTR SVM_EVTINJ_TYPE_INTR
333 #define SVM_EXITINTINFO_TYPE_NMI SVM_EVTINJ_TYPE_NMI
334 #define SVM_EXITINTINFO_TYPE_EXEPT SVM_EVTINJ_TYPE_EXEPT
335 #define SVM_EXITINTINFO_TYPE_SOFT SVM_EVTINJ_TYPE_SOFT
337 #define SVM_EXITINTINFO_VALID SVM_EVTINJ_VALID
338 #define SVM_EXITINTINFO_VALID_ERR SVM_EVTINJ_VALID_ERR
340 #define SVM_EXITINFOSHIFT_TS_REASON_IRET 36
341 #define SVM_EXITINFOSHIFT_TS_REASON_JMP 38
342 #define SVM_EXITINFOSHIFT_TS_HAS_ERROR_CODE 44
344 #define SVM_EXITINFO_REG_MASK 0x0F
346 #define SVM_CR0_SELECTIVE_MASK (X86_CR0_TS | X86_CR0_MP)
348 /* GHCB Accessor functions */
350 #define GHCB_BITMAP_IDX(field) \
351 (offsetof(struct vmcb_save_area, field) / sizeof(u64))
353 #define DEFINE_GHCB_ACCESSORS(field) \
354 static inline bool ghcb_##field##_is_valid(const struct ghcb *ghcb) \
356 return test_bit(GHCB_BITMAP_IDX(field), \
357 (unsigned long *)&ghcb->save.valid_bitmap); \
360 static inline void ghcb_set_##field(struct ghcb *ghcb, u64 value) \
362 __set_bit(GHCB_BITMAP_IDX(field), \
363 (unsigned long *)&ghcb->save.valid_bitmap); \
364 ghcb->save.field = value; \
367 DEFINE_GHCB_ACCESSORS(cpl)
368 DEFINE_GHCB_ACCESSORS(rip)
369 DEFINE_GHCB_ACCESSORS(rsp)
370 DEFINE_GHCB_ACCESSORS(rax)
371 DEFINE_GHCB_ACCESSORS(rcx)
372 DEFINE_GHCB_ACCESSORS(rdx)
373 DEFINE_GHCB_ACCESSORS(rbx)
374 DEFINE_GHCB_ACCESSORS(rbp)
375 DEFINE_GHCB_ACCESSORS(rsi)
376 DEFINE_GHCB_ACCESSORS(rdi)
377 DEFINE_GHCB_ACCESSORS(r8)
378 DEFINE_GHCB_ACCESSORS(r9)
379 DEFINE_GHCB_ACCESSORS(r10)
380 DEFINE_GHCB_ACCESSORS(r11)
381 DEFINE_GHCB_ACCESSORS(r12)
382 DEFINE_GHCB_ACCESSORS(r13)
383 DEFINE_GHCB_ACCESSORS(r14)
384 DEFINE_GHCB_ACCESSORS(r15)
385 DEFINE_GHCB_ACCESSORS(sw_exit_code)
386 DEFINE_GHCB_ACCESSORS(sw_exit_info_1)
387 DEFINE_GHCB_ACCESSORS(sw_exit_info_2)
388 DEFINE_GHCB_ACCESSORS(sw_scratch)
389 DEFINE_GHCB_ACCESSORS(xcr0)