1 #ifndef _ASM_X86_SPECIAL_INSNS_H
2 #define _ASM_X86_SPECIAL_INSNS_H
10 * Volatile isn't enough to prevent the compiler from reordering the
11 * read/write functions for the control registers and messing everything up.
12 * A memory clobber would solve the problem, but would prevent reordering of
13 * all loads stores around it, which can hurt performance. Solution is to
14 * use a variable and mimic reads and writes to it to enforce serialization
16 extern unsigned long __force_order;
18 static inline unsigned long native_read_cr0(void)
21 asm volatile("mov %%cr0,%0\n\t" : "=r" (val), "=m" (__force_order));
25 static inline void native_write_cr0(unsigned long val)
27 asm volatile("mov %0,%%cr0": : "r" (val), "m" (__force_order));
30 static inline unsigned long native_read_cr2(void)
33 asm volatile("mov %%cr2,%0\n\t" : "=r" (val), "=m" (__force_order));
37 static inline void native_write_cr2(unsigned long val)
39 asm volatile("mov %0,%%cr2": : "r" (val), "m" (__force_order));
42 static inline unsigned long __native_read_cr3(void)
45 asm volatile("mov %%cr3,%0\n\t" : "=r" (val), "=m" (__force_order));
49 static inline void native_write_cr3(unsigned long val)
51 asm volatile("mov %0,%%cr3": : "r" (val), "m" (__force_order));
54 static inline unsigned long native_read_cr4(void)
59 * This could fault if CR4 does not exist. Non-existent CR4
60 * is functionally equivalent to CR4 == 0. Keep it simple and pretend
61 * that CR4 == 0 on CPUs that don't have CR4.
63 asm volatile("1: mov %%cr4, %0\n"
66 : "=r" (val), "=m" (__force_order) : "0" (0));
68 /* CR4 always exists on x86_64. */
69 asm volatile("mov %%cr4,%0\n\t" : "=r" (val), "=m" (__force_order));
74 static inline void native_write_cr4(unsigned long val)
76 asm volatile("mov %0,%%cr4": : "r" (val), "m" (__force_order));
80 static inline unsigned long native_read_cr8(void)
83 asm volatile("movq %%cr8,%0" : "=r" (cr8));
87 static inline void native_write_cr8(unsigned long val)
89 asm volatile("movq %0,%%cr8" :: "r" (val) : "memory");
93 #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
94 static inline u32 __read_pkru(void)
100 * "rdpkru" instruction. Places PKRU contents in to EAX,
101 * clears EDX and requires that ecx=0.
103 asm volatile(".byte 0x0f,0x01,0xee\n\t"
104 : "=a" (pkru), "=d" (edx)
109 static inline void __write_pkru(u32 pkru)
111 u32 ecx = 0, edx = 0;
114 * "wrpkru" instruction. Loads contents in EAX to PKRU,
115 * requires that ecx = edx = 0.
117 asm volatile(".byte 0x0f,0x01,0xef\n\t"
118 : : "a" (pkru), "c"(ecx), "d"(edx));
121 static inline u32 __read_pkru(void)
126 static inline void __write_pkru(u32 pkru)
131 static inline void native_wbinvd(void)
133 asm volatile("wbinvd": : :"memory");
136 extern asmlinkage void native_load_gs_index(unsigned);
138 static inline unsigned long __read_cr4(void)
140 return native_read_cr4();
143 #ifdef CONFIG_PARAVIRT
144 #include <asm/paravirt.h>
147 static inline unsigned long read_cr0(void)
149 return native_read_cr0();
152 static inline void write_cr0(unsigned long x)
157 static inline unsigned long read_cr2(void)
159 return native_read_cr2();
162 static inline void write_cr2(unsigned long x)
168 * Careful! CR3 contains more than just an address. You probably want
169 * read_cr3_pa() instead.
171 static inline unsigned long __read_cr3(void)
173 return __native_read_cr3();
176 static inline void write_cr3(unsigned long x)
181 static inline void __write_cr4(unsigned long x)
186 static inline void wbinvd(void)
193 static inline unsigned long read_cr8(void)
195 return native_read_cr8();
198 static inline void write_cr8(unsigned long x)
203 static inline void load_gs_index(unsigned selector)
205 native_load_gs_index(selector);
210 #endif/* CONFIG_PARAVIRT */
212 static inline void clflush(volatile void *__p)
214 asm volatile("clflush %0" : "+m" (*(volatile char __force *)__p));
217 static inline void clflushopt(volatile void *__p)
219 alternative_io(".byte " __stringify(NOP_DS_PREFIX) "; clflush %P0",
220 ".byte 0x66; clflush %P0",
221 X86_FEATURE_CLFLUSHOPT,
222 "+m" (*(volatile char __force *)__p));
225 static inline void clwb(volatile void *__p)
227 volatile struct { char x[64]; } *p = __p;
229 asm volatile(ALTERNATIVE_2(
230 ".byte " __stringify(NOP_DS_PREFIX) "; clflush (%[pax])",
231 ".byte 0x66; clflush (%[pax])", /* clflushopt (%%rax) */
232 X86_FEATURE_CLFLUSHOPT,
233 ".byte 0x66, 0x0f, 0xae, 0x30", /* clwb (%%rax) */
239 #define nop() asm volatile ("nop")
242 #endif /* __KERNEL__ */
244 #endif /* _ASM_X86_SPECIAL_INSNS_H */