1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_X86_SPECIAL_INSNS_H
3 #define _ASM_X86_SPECIAL_INSNS_H
9 #include <asm/processor-flags.h>
10 #include <linux/irqflags.h>
11 #include <linux/jump_label.h>
14 * Volatile isn't enough to prevent the compiler from reordering the
15 * read/write functions for the control registers and messing everything up.
16 * A memory clobber would solve the problem, but would prevent reordering of
17 * all loads stores around it, which can hurt performance. Solution is to
18 * use a variable and mimic reads and writes to it to enforce serialization
20 extern unsigned long __force_order;
22 void native_write_cr0(unsigned long val);
24 static inline unsigned long native_read_cr0(void)
27 asm volatile("mov %%cr0,%0\n\t" : "=r" (val), "=m" (__force_order));
31 static __always_inline unsigned long native_read_cr2(void)
34 asm volatile("mov %%cr2,%0\n\t" : "=r" (val), "=m" (__force_order));
38 static __always_inline void native_write_cr2(unsigned long val)
40 asm volatile("mov %0,%%cr2": : "r" (val), "m" (__force_order));
43 static inline unsigned long __native_read_cr3(void)
46 asm volatile("mov %%cr3,%0\n\t" : "=r" (val), "=m" (__force_order));
50 static inline void native_write_cr3(unsigned long val)
52 asm volatile("mov %0,%%cr3": : "r" (val), "m" (__force_order));
55 static inline unsigned long native_read_cr4(void)
60 * This could fault if CR4 does not exist. Non-existent CR4
61 * is functionally equivalent to CR4 == 0. Keep it simple and pretend
62 * that CR4 == 0 on CPUs that don't have CR4.
64 asm volatile("1: mov %%cr4, %0\n"
67 : "=r" (val), "=m" (__force_order) : "0" (0));
69 /* CR4 always exists on x86_64. */
70 asm volatile("mov %%cr4,%0\n\t" : "=r" (val), "=m" (__force_order));
75 void native_write_cr4(unsigned long val);
77 #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
78 static inline u32 rdpkru(void)
84 * "rdpkru" instruction. Places PKRU contents in to EAX,
85 * clears EDX and requires that ecx=0.
87 asm volatile(".byte 0x0f,0x01,0xee\n\t"
88 : "=a" (pkru), "=d" (edx)
93 static inline void wrpkru(u32 pkru)
98 * "wrpkru" instruction. Loads contents in EAX to PKRU,
99 * requires that ecx = edx = 0.
101 asm volatile(".byte 0x0f,0x01,0xef\n\t"
102 : : "a" (pkru), "c"(ecx), "d"(edx));
105 static inline void __write_pkru(u32 pkru)
108 * WRPKRU is relatively expensive compared to RDPKRU.
109 * Avoid WRPKRU when it would not change the value.
111 if (pkru == rdpkru())
118 static inline u32 rdpkru(void)
123 static inline void __write_pkru(u32 pkru)
128 static inline void native_wbinvd(void)
130 asm volatile("wbinvd": : :"memory");
133 extern asmlinkage void asm_load_gs_index(unsigned int selector);
135 static inline void native_load_gs_index(unsigned int selector)
139 local_irq_save(flags);
140 asm_load_gs_index(selector);
141 local_irq_restore(flags);
144 static inline unsigned long __read_cr4(void)
146 return native_read_cr4();
149 #ifdef CONFIG_PARAVIRT_XXL
150 #include <asm/paravirt.h>
153 static inline unsigned long read_cr0(void)
155 return native_read_cr0();
158 static inline void write_cr0(unsigned long x)
163 static __always_inline unsigned long read_cr2(void)
165 return native_read_cr2();
168 static __always_inline void write_cr2(unsigned long x)
174 * Careful! CR3 contains more than just an address. You probably want
175 * read_cr3_pa() instead.
177 static inline unsigned long __read_cr3(void)
179 return __native_read_cr3();
182 static inline void write_cr3(unsigned long x)
187 static inline void __write_cr4(unsigned long x)
192 static inline void wbinvd(void)
199 static inline void load_gs_index(unsigned int selector)
201 native_load_gs_index(selector);
206 #endif /* CONFIG_PARAVIRT_XXL */
208 static inline void clflush(volatile void *__p)
210 asm volatile("clflush %0" : "+m" (*(volatile char __force *)__p));
213 static inline void clflushopt(volatile void *__p)
215 alternative_io(".byte " __stringify(NOP_DS_PREFIX) "; clflush %P0",
216 ".byte 0x66; clflush %P0",
217 X86_FEATURE_CLFLUSHOPT,
218 "+m" (*(volatile char __force *)__p));
221 static inline void clwb(volatile void *__p)
223 volatile struct { char x[64]; } *p = __p;
225 asm volatile(ALTERNATIVE_2(
226 ".byte " __stringify(NOP_DS_PREFIX) "; clflush (%[pax])",
227 ".byte 0x66; clflush (%[pax])", /* clflushopt (%%rax) */
228 X86_FEATURE_CLFLUSHOPT,
229 ".byte 0x66, 0x0f, 0xae, 0x30", /* clwb (%%rax) */
235 #define nop() asm volatile ("nop")
237 static inline void serialize(void)
239 /* Instruction opcode for SERIALIZE; supported in binutils >= 2.35. */
240 asm volatile(".byte 0xf, 0x1, 0xe8" ::: "memory");
243 #endif /* __KERNEL__ */
245 #endif /* _ASM_X86_SPECIAL_INSNS_H */