1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_X86_PGTABLE_DEFS_H
3 #define _ASM_X86_PGTABLE_DEFS_H
5 #include <linux/const.h>
6 #include <linux/mem_encrypt.h>
8 #include <asm/page_types.h>
10 #define FIRST_USER_ADDRESS 0UL
12 #define _PAGE_BIT_PRESENT 0 /* is present */
13 #define _PAGE_BIT_RW 1 /* writeable */
14 #define _PAGE_BIT_USER 2 /* userspace addressable */
15 #define _PAGE_BIT_PWT 3 /* page write through */
16 #define _PAGE_BIT_PCD 4 /* page cache disabled */
17 #define _PAGE_BIT_ACCESSED 5 /* was accessed (raised by CPU) */
18 #define _PAGE_BIT_DIRTY 6 /* was written to (raised by CPU) */
19 #define _PAGE_BIT_PSE 7 /* 4 MB (or 2MB) page */
20 #define _PAGE_BIT_PAT 7 /* on 4KB pages */
21 #define _PAGE_BIT_GLOBAL 8 /* Global TLB entry PPro+ */
22 #define _PAGE_BIT_SOFTW1 9 /* available for programmer */
23 #define _PAGE_BIT_SOFTW2 10 /* " */
24 #define _PAGE_BIT_SOFTW3 11 /* " */
25 #define _PAGE_BIT_PAT_LARGE 12 /* On 2MB or 1GB pages */
26 #define _PAGE_BIT_SOFTW4 58 /* available for programmer */
27 #define _PAGE_BIT_PKEY_BIT0 59 /* Protection Keys, bit 1/4 */
28 #define _PAGE_BIT_PKEY_BIT1 60 /* Protection Keys, bit 2/4 */
29 #define _PAGE_BIT_PKEY_BIT2 61 /* Protection Keys, bit 3/4 */
30 #define _PAGE_BIT_PKEY_BIT3 62 /* Protection Keys, bit 4/4 */
31 #define _PAGE_BIT_NX 63 /* No execute: only valid after cpuid check */
33 #define _PAGE_BIT_SPECIAL _PAGE_BIT_SOFTW1
34 #define _PAGE_BIT_CPA_TEST _PAGE_BIT_SOFTW1
35 #define _PAGE_BIT_UFFD_WP _PAGE_BIT_SOFTW2 /* userfaultfd wrprotected */
36 #define _PAGE_BIT_SOFT_DIRTY _PAGE_BIT_SOFTW3 /* software dirty tracking */
37 #define _PAGE_BIT_DEVMAP _PAGE_BIT_SOFTW4
39 /* If _PAGE_BIT_PRESENT is clear, we use these: */
40 /* - if the user mapped it with PROT_NONE; pte_present gives true */
41 #define _PAGE_BIT_PROTNONE _PAGE_BIT_GLOBAL
43 #define _PAGE_PRESENT (_AT(pteval_t, 1) << _PAGE_BIT_PRESENT)
44 #define _PAGE_RW (_AT(pteval_t, 1) << _PAGE_BIT_RW)
45 #define _PAGE_USER (_AT(pteval_t, 1) << _PAGE_BIT_USER)
46 #define _PAGE_PWT (_AT(pteval_t, 1) << _PAGE_BIT_PWT)
47 #define _PAGE_PCD (_AT(pteval_t, 1) << _PAGE_BIT_PCD)
48 #define _PAGE_ACCESSED (_AT(pteval_t, 1) << _PAGE_BIT_ACCESSED)
49 #define _PAGE_DIRTY (_AT(pteval_t, 1) << _PAGE_BIT_DIRTY)
50 #define _PAGE_PSE (_AT(pteval_t, 1) << _PAGE_BIT_PSE)
51 #define _PAGE_GLOBAL (_AT(pteval_t, 1) << _PAGE_BIT_GLOBAL)
52 #define _PAGE_SOFTW1 (_AT(pteval_t, 1) << _PAGE_BIT_SOFTW1)
53 #define _PAGE_SOFTW2 (_AT(pteval_t, 1) << _PAGE_BIT_SOFTW2)
54 #define _PAGE_SOFTW3 (_AT(pteval_t, 1) << _PAGE_BIT_SOFTW3)
55 #define _PAGE_PAT (_AT(pteval_t, 1) << _PAGE_BIT_PAT)
56 #define _PAGE_PAT_LARGE (_AT(pteval_t, 1) << _PAGE_BIT_PAT_LARGE)
57 #define _PAGE_SPECIAL (_AT(pteval_t, 1) << _PAGE_BIT_SPECIAL)
58 #define _PAGE_CPA_TEST (_AT(pteval_t, 1) << _PAGE_BIT_CPA_TEST)
59 #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
60 #define _PAGE_PKEY_BIT0 (_AT(pteval_t, 1) << _PAGE_BIT_PKEY_BIT0)
61 #define _PAGE_PKEY_BIT1 (_AT(pteval_t, 1) << _PAGE_BIT_PKEY_BIT1)
62 #define _PAGE_PKEY_BIT2 (_AT(pteval_t, 1) << _PAGE_BIT_PKEY_BIT2)
63 #define _PAGE_PKEY_BIT3 (_AT(pteval_t, 1) << _PAGE_BIT_PKEY_BIT3)
65 #define _PAGE_PKEY_BIT0 (_AT(pteval_t, 0))
66 #define _PAGE_PKEY_BIT1 (_AT(pteval_t, 0))
67 #define _PAGE_PKEY_BIT2 (_AT(pteval_t, 0))
68 #define _PAGE_PKEY_BIT3 (_AT(pteval_t, 0))
71 #define _PAGE_PKEY_MASK (_PAGE_PKEY_BIT0 | \
76 #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
77 #define _PAGE_KNL_ERRATUM_MASK (_PAGE_DIRTY | _PAGE_ACCESSED)
79 #define _PAGE_KNL_ERRATUM_MASK 0
82 #ifdef CONFIG_MEM_SOFT_DIRTY
83 #define _PAGE_SOFT_DIRTY (_AT(pteval_t, 1) << _PAGE_BIT_SOFT_DIRTY)
85 #define _PAGE_SOFT_DIRTY (_AT(pteval_t, 0))
89 * Tracking soft dirty bit when a page goes to a swap is tricky.
90 * We need a bit which can be stored in pte _and_ not conflict
91 * with swap entry format. On x86 bits 1-4 are *not* involved
92 * into swap entry computation, but bit 7 is used for thp migration,
93 * so we borrow bit 1 for soft dirty tracking.
95 * Please note that this bit must be treated as swap dirty page
96 * mark if and only if the PTE/PMD has present bit clear!
98 #ifdef CONFIG_MEM_SOFT_DIRTY
99 #define _PAGE_SWP_SOFT_DIRTY _PAGE_RW
101 #define _PAGE_SWP_SOFT_DIRTY (_AT(pteval_t, 0))
104 #ifdef CONFIG_HAVE_ARCH_USERFAULTFD_WP
105 #define _PAGE_UFFD_WP (_AT(pteval_t, 1) << _PAGE_BIT_UFFD_WP)
106 #define _PAGE_SWP_UFFD_WP _PAGE_USER
108 #define _PAGE_UFFD_WP (_AT(pteval_t, 0))
109 #define _PAGE_SWP_UFFD_WP (_AT(pteval_t, 0))
112 #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
113 #define _PAGE_NX (_AT(pteval_t, 1) << _PAGE_BIT_NX)
114 #define _PAGE_DEVMAP (_AT(u64, 1) << _PAGE_BIT_DEVMAP)
116 #define _PAGE_NX (_AT(pteval_t, 0))
117 #define _PAGE_DEVMAP (_AT(pteval_t, 0))
120 #define _PAGE_PROTNONE (_AT(pteval_t, 1) << _PAGE_BIT_PROTNONE)
123 * Set of bits not changed in pte_modify. The pte's
124 * protection key is treated like _PAGE_RW, for
125 * instance, and is *not* included in this mask since
126 * pte_modify() does modify it.
128 #define _PAGE_CHG_MASK (PTE_PFN_MASK | _PAGE_PCD | _PAGE_PWT | \
129 _PAGE_SPECIAL | _PAGE_ACCESSED | _PAGE_DIRTY | \
130 _PAGE_SOFT_DIRTY | _PAGE_DEVMAP | _PAGE_ENC | \
132 #define _HPAGE_CHG_MASK (_PAGE_CHG_MASK | _PAGE_PSE)
135 * The cache modes defined here are used to translate between pure SW usage
136 * and the HW defined cache mode bits and/or PAT entries.
138 * The resulting bits for PWT, PCD and PAT should be chosen in a way
139 * to have the WB mode at index 0 (all bits clear). This is the default
140 * right now and likely would break too much if changed.
143 enum page_cache_mode {
144 _PAGE_CACHE_MODE_WB = 0,
145 _PAGE_CACHE_MODE_WC = 1,
146 _PAGE_CACHE_MODE_UC_MINUS = 2,
147 _PAGE_CACHE_MODE_UC = 3,
148 _PAGE_CACHE_MODE_WT = 4,
149 _PAGE_CACHE_MODE_WP = 5,
151 _PAGE_CACHE_MODE_NUM = 8
155 #define _PAGE_ENC (_AT(pteval_t, sme_me_mask))
157 #define _PAGE_CACHE_MASK (_PAGE_PWT | _PAGE_PCD | _PAGE_PAT)
159 #define _PAGE_NOCACHE (cachemode2protval(_PAGE_CACHE_MODE_UC))
160 #define _PAGE_CACHE_WP (cachemode2protval(_PAGE_CACHE_MODE_WP))
162 #define __PP _PAGE_PRESENT
163 #define __RW _PAGE_RW
164 #define _USR _PAGE_USER
165 #define ___A _PAGE_ACCESSED
166 #define ___D _PAGE_DIRTY
167 #define ___G _PAGE_GLOBAL
168 #define __NX _PAGE_NX
170 #define _ENC _PAGE_ENC
171 #define __WP _PAGE_CACHE_WP
172 #define __NC _PAGE_NOCACHE
173 #define _PSE _PAGE_PSE
175 #define pgprot_val(x) ((x).pgprot)
176 #define __pgprot(x) ((pgprot_t) { (x) } )
177 #define __pg(x) __pgprot(x)
179 #define _PAGE_PAT_LARGE (_AT(pteval_t, 1) << _PAGE_BIT_PAT_LARGE)
181 #define PAGE_NONE __pg( 0| 0| 0|___A| 0| 0| 0|___G)
182 #define PAGE_SHARED __pg(__PP|__RW|_USR|___A|__NX| 0| 0| 0)
183 #define PAGE_SHARED_EXEC __pg(__PP|__RW|_USR|___A| 0| 0| 0| 0)
184 #define PAGE_COPY_NOEXEC __pg(__PP| 0|_USR|___A|__NX| 0| 0| 0)
185 #define PAGE_COPY_EXEC __pg(__PP| 0|_USR|___A| 0| 0| 0| 0)
186 #define PAGE_COPY __pg(__PP| 0|_USR|___A|__NX| 0| 0| 0)
187 #define PAGE_READONLY __pg(__PP| 0|_USR|___A|__NX| 0| 0| 0)
188 #define PAGE_READONLY_EXEC __pg(__PP| 0|_USR|___A| 0| 0| 0| 0)
190 #define __PAGE_KERNEL (__PP|__RW| 0|___A|__NX|___D| 0|___G)
191 #define __PAGE_KERNEL_EXEC (__PP|__RW| 0|___A| 0|___D| 0|___G)
192 #define _KERNPG_TABLE_NOENC (__PP|__RW| 0|___A| 0|___D| 0| 0)
193 #define _KERNPG_TABLE (__PP|__RW| 0|___A| 0|___D| 0| 0| _ENC)
194 #define _PAGE_TABLE_NOENC (__PP|__RW|_USR|___A| 0|___D| 0| 0)
195 #define _PAGE_TABLE (__PP|__RW|_USR|___A| 0|___D| 0| 0| _ENC)
196 #define __PAGE_KERNEL_RO (__PP| 0| 0|___A|__NX|___D| 0|___G)
197 #define __PAGE_KERNEL_ROX (__PP| 0| 0|___A| 0|___D| 0|___G)
198 #define __PAGE_KERNEL_NOCACHE (__PP|__RW| 0|___A|__NX|___D| 0|___G| __NC)
199 #define __PAGE_KERNEL_VVAR (__PP| 0|_USR|___A|__NX|___D| 0|___G)
200 #define __PAGE_KERNEL_LARGE (__PP|__RW| 0|___A|__NX|___D|_PSE|___G)
201 #define __PAGE_KERNEL_LARGE_EXEC (__PP|__RW| 0|___A| 0|___D|_PSE|___G)
202 #define __PAGE_KERNEL_WP (__PP|__RW| 0|___A|__NX|___D| 0|___G| __WP)
205 #define __PAGE_KERNEL_IO __PAGE_KERNEL
206 #define __PAGE_KERNEL_IO_NOCACHE __PAGE_KERNEL_NOCACHE
211 #define __PAGE_KERNEL_ENC (__PAGE_KERNEL | _ENC)
212 #define __PAGE_KERNEL_ENC_WP (__PAGE_KERNEL_WP | _ENC)
213 #define __PAGE_KERNEL_NOENC (__PAGE_KERNEL | 0)
214 #define __PAGE_KERNEL_NOENC_WP (__PAGE_KERNEL_WP | 0)
216 #define __pgprot_mask(x) __pgprot((x) & __default_kernel_pte_mask)
218 #define PAGE_KERNEL __pgprot_mask(__PAGE_KERNEL | _ENC)
219 #define PAGE_KERNEL_NOENC __pgprot_mask(__PAGE_KERNEL | 0)
220 #define PAGE_KERNEL_RO __pgprot_mask(__PAGE_KERNEL_RO | _ENC)
221 #define PAGE_KERNEL_EXEC __pgprot_mask(__PAGE_KERNEL_EXEC | _ENC)
222 #define PAGE_KERNEL_EXEC_NOENC __pgprot_mask(__PAGE_KERNEL_EXEC | 0)
223 #define PAGE_KERNEL_ROX __pgprot_mask(__PAGE_KERNEL_ROX | _ENC)
224 #define PAGE_KERNEL_NOCACHE __pgprot_mask(__PAGE_KERNEL_NOCACHE | _ENC)
225 #define PAGE_KERNEL_LARGE __pgprot_mask(__PAGE_KERNEL_LARGE | _ENC)
226 #define PAGE_KERNEL_LARGE_EXEC __pgprot_mask(__PAGE_KERNEL_LARGE_EXEC | _ENC)
227 #define PAGE_KERNEL_VVAR __pgprot_mask(__PAGE_KERNEL_VVAR | _ENC)
229 #define PAGE_KERNEL_IO __pgprot_mask(__PAGE_KERNEL_IO)
230 #define PAGE_KERNEL_IO_NOCACHE __pgprot_mask(__PAGE_KERNEL_IO_NOCACHE)
232 #endif /* __ASSEMBLY__ */
235 #define __P000 PAGE_NONE
236 #define __P001 PAGE_READONLY
237 #define __P010 PAGE_COPY
238 #define __P011 PAGE_COPY
239 #define __P100 PAGE_READONLY_EXEC
240 #define __P101 PAGE_READONLY_EXEC
241 #define __P110 PAGE_COPY_EXEC
242 #define __P111 PAGE_COPY_EXEC
244 #define __S000 PAGE_NONE
245 #define __S001 PAGE_READONLY
246 #define __S010 PAGE_SHARED
247 #define __S011 PAGE_SHARED
248 #define __S100 PAGE_READONLY_EXEC
249 #define __S101 PAGE_READONLY_EXEC
250 #define __S110 PAGE_SHARED_EXEC
251 #define __S111 PAGE_SHARED_EXEC
254 * early identity mapping pte attrib macros.
257 #define __PAGE_KERNEL_IDENT_LARGE_EXEC __PAGE_KERNEL_LARGE_EXEC
259 #define PTE_IDENT_ATTR 0x003 /* PRESENT+RW */
260 #define PDE_IDENT_ATTR 0x063 /* PRESENT+RW+DIRTY+ACCESSED */
261 #define PGD_IDENT_ATTR 0x001 /* PRESENT (no other attributes) */
265 # include <asm/pgtable_32_types.h>
267 # include <asm/pgtable_64_types.h>
272 #include <linux/types.h>
274 /* Extracts the PFN from a (pte|pmd|pud|pgd)val_t of a 4KB page */
275 #define PTE_PFN_MASK ((pteval_t)PHYSICAL_PAGE_MASK)
278 * Extracts the flags from a (pte|pmd|pud|pgd)val_t
279 * This includes the protection key value.
281 #define PTE_FLAGS_MASK (~PTE_PFN_MASK)
283 typedef struct pgprot { pgprotval_t pgprot; } pgprot_t;
285 typedef struct { pgdval_t pgd; } pgd_t;
287 static inline pgprot_t pgprot_nx(pgprot_t prot)
289 return __pgprot(pgprot_val(prot) | _PAGE_NX);
291 #define pgprot_nx pgprot_nx
293 #ifdef CONFIG_X86_PAE
296 * PHYSICAL_PAGE_MASK might be non-constant when SME is compiled in, so we can't
300 #define PGD_PAE_PAGE_MASK ((signed long)PAGE_MASK)
301 #define PGD_PAE_PHYS_MASK (((1ULL << __PHYSICAL_MASK_SHIFT)-1) & PGD_PAE_PAGE_MASK)
304 * PAE allows Base Address, P, PWT, PCD and AVL bits to be set in PGD entries.
305 * All other bits are Reserved MBZ
307 #define PGD_ALLOWED_BITS (PGD_PAE_PHYS_MASK | _PAGE_PRESENT | \
308 _PAGE_PWT | _PAGE_PCD | \
309 _PAGE_SOFTW1 | _PAGE_SOFTW2 | _PAGE_SOFTW3)
312 /* No need to mask any bits for !PAE */
313 #define PGD_ALLOWED_BITS (~0ULL)
316 static inline pgd_t native_make_pgd(pgdval_t val)
318 return (pgd_t) { val & PGD_ALLOWED_BITS };
321 static inline pgdval_t native_pgd_val(pgd_t pgd)
323 return pgd.pgd & PGD_ALLOWED_BITS;
326 static inline pgdval_t pgd_flags(pgd_t pgd)
328 return native_pgd_val(pgd) & PTE_FLAGS_MASK;
331 #if CONFIG_PGTABLE_LEVELS > 4
332 typedef struct { p4dval_t p4d; } p4d_t;
334 static inline p4d_t native_make_p4d(pudval_t val)
336 return (p4d_t) { val };
339 static inline p4dval_t native_p4d_val(p4d_t p4d)
344 #include <asm-generic/pgtable-nop4d.h>
346 static inline p4d_t native_make_p4d(pudval_t val)
348 return (p4d_t) { .pgd = native_make_pgd((pgdval_t)val) };
351 static inline p4dval_t native_p4d_val(p4d_t p4d)
353 return native_pgd_val(p4d.pgd);
357 #if CONFIG_PGTABLE_LEVELS > 3
358 typedef struct { pudval_t pud; } pud_t;
360 static inline pud_t native_make_pud(pmdval_t val)
362 return (pud_t) { val };
365 static inline pudval_t native_pud_val(pud_t pud)
370 #include <asm-generic/pgtable-nopud.h>
372 static inline pud_t native_make_pud(pudval_t val)
374 return (pud_t) { .p4d.pgd = native_make_pgd(val) };
377 static inline pudval_t native_pud_val(pud_t pud)
379 return native_pgd_val(pud.p4d.pgd);
383 #if CONFIG_PGTABLE_LEVELS > 2
384 typedef struct { pmdval_t pmd; } pmd_t;
386 static inline pmd_t native_make_pmd(pmdval_t val)
388 return (pmd_t) { val };
391 static inline pmdval_t native_pmd_val(pmd_t pmd)
396 #include <asm-generic/pgtable-nopmd.h>
398 static inline pmd_t native_make_pmd(pmdval_t val)
400 return (pmd_t) { .pud.p4d.pgd = native_make_pgd(val) };
403 static inline pmdval_t native_pmd_val(pmd_t pmd)
405 return native_pgd_val(pmd.pud.p4d.pgd);
409 static inline p4dval_t p4d_pfn_mask(p4d_t p4d)
411 /* No 512 GiB huge pages yet */
415 static inline p4dval_t p4d_flags_mask(p4d_t p4d)
417 return ~p4d_pfn_mask(p4d);
420 static inline p4dval_t p4d_flags(p4d_t p4d)
422 return native_p4d_val(p4d) & p4d_flags_mask(p4d);
425 static inline pudval_t pud_pfn_mask(pud_t pud)
427 if (native_pud_val(pud) & _PAGE_PSE)
428 return PHYSICAL_PUD_PAGE_MASK;
433 static inline pudval_t pud_flags_mask(pud_t pud)
435 return ~pud_pfn_mask(pud);
438 static inline pudval_t pud_flags(pud_t pud)
440 return native_pud_val(pud) & pud_flags_mask(pud);
443 static inline pmdval_t pmd_pfn_mask(pmd_t pmd)
445 if (native_pmd_val(pmd) & _PAGE_PSE)
446 return PHYSICAL_PMD_PAGE_MASK;
451 static inline pmdval_t pmd_flags_mask(pmd_t pmd)
453 return ~pmd_pfn_mask(pmd);
456 static inline pmdval_t pmd_flags(pmd_t pmd)
458 return native_pmd_val(pmd) & pmd_flags_mask(pmd);
461 static inline pte_t native_make_pte(pteval_t val)
463 return (pte_t) { .pte = val };
466 static inline pteval_t native_pte_val(pte_t pte)
471 static inline pteval_t pte_flags(pte_t pte)
473 return native_pte_val(pte) & PTE_FLAGS_MASK;
476 #define __pte2cm_idx(cb) \
477 ((((cb) >> (_PAGE_BIT_PAT - 2)) & 4) | \
478 (((cb) >> (_PAGE_BIT_PCD - 1)) & 2) | \
479 (((cb) >> _PAGE_BIT_PWT) & 1))
480 #define __cm_idx2pte(i) \
481 ((((i) & 4) << (_PAGE_BIT_PAT - 2)) | \
482 (((i) & 2) << (_PAGE_BIT_PCD - 1)) | \
483 (((i) & 1) << _PAGE_BIT_PWT))
485 unsigned long cachemode2protval(enum page_cache_mode pcm);
487 static inline pgprotval_t protval_4k_2_large(pgprotval_t val)
489 return (val & ~(_PAGE_PAT | _PAGE_PAT_LARGE)) |
490 ((val & _PAGE_PAT) << (_PAGE_BIT_PAT_LARGE - _PAGE_BIT_PAT));
492 static inline pgprot_t pgprot_4k_2_large(pgprot_t pgprot)
494 return __pgprot(protval_4k_2_large(pgprot_val(pgprot)));
496 static inline pgprotval_t protval_large_2_4k(pgprotval_t val)
498 return (val & ~(_PAGE_PAT | _PAGE_PAT_LARGE)) |
499 ((val & _PAGE_PAT_LARGE) >>
500 (_PAGE_BIT_PAT_LARGE - _PAGE_BIT_PAT));
502 static inline pgprot_t pgprot_large_2_4k(pgprot_t pgprot)
504 return __pgprot(protval_large_2_4k(pgprot_val(pgprot)));
508 typedef struct page *pgtable_t;
510 extern pteval_t __supported_pte_mask;
511 extern pteval_t __default_kernel_pte_mask;
512 extern void set_nx(void);
513 extern int nx_enabled;
515 #define pgprot_writecombine pgprot_writecombine
516 extern pgprot_t pgprot_writecombine(pgprot_t prot);
518 #define pgprot_writethrough pgprot_writethrough
519 extern pgprot_t pgprot_writethrough(pgprot_t prot);
521 /* Indicate that x86 has its own track and untrack pfn vma functions */
522 #define __HAVE_PFNMAP_TRACKING
524 #define __HAVE_PHYS_MEM_ACCESS_PROT
526 pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
527 unsigned long size, pgprot_t vma_prot);
529 /* Install a pte for a particular vaddr in kernel space. */
530 void set_pte_vaddr(unsigned long vaddr, pte_t pte);
533 extern void native_pagetable_init(void);
535 #define native_pagetable_init paging_init
539 extern void arch_report_meminfo(struct seq_file *m);
550 #ifdef CONFIG_PROC_FS
551 extern void update_page_count(int level, unsigned long pages);
553 static inline void update_page_count(int level, unsigned long pages) { }
557 * Helper function that returns the kernel pagetable entry controlling
558 * the virtual address 'address'. NULL means no pagetable entry present.
559 * NOTE: the return type is pte_t but if the pmd is PSE then we return it
562 extern pte_t *lookup_address(unsigned long address, unsigned int *level);
563 extern pte_t *lookup_address_in_pgd(pgd_t *pgd, unsigned long address,
564 unsigned int *level);
567 extern pte_t *lookup_address_in_mm(struct mm_struct *mm, unsigned long address,
568 unsigned int *level);
569 extern pmd_t *lookup_pmd_address(unsigned long address);
570 extern phys_addr_t slow_virt_to_phys(void *__address);
571 extern int __init kernel_map_pages_in_pgd(pgd_t *pgd, u64 pfn,
572 unsigned long address,
574 unsigned long page_flags);
575 extern int __init kernel_unmap_pages_in_pgd(pgd_t *pgd, unsigned long address,
576 unsigned long numpages);
577 #endif /* !__ASSEMBLY__ */
579 #endif /* _ASM_X86_PGTABLE_DEFS_H */