arch/x86/include/asm/paravirt.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 #ifndef _ASM_X86_PARAVIRT_H
   3 #define _ASM_X86_PARAVIRT_H
   4 /* Various instructions on x86 need to be replaced for
   5  * para-virtualization: those hooks are defined here. */
   6
   7 #ifdef CONFIG_PARAVIRT
   8 #include <asm/pgtable_types.h>
   9 #include <asm/asm.h>
  10 #include <asm/nospec-branch.h>
  11
  12 #include <asm/paravirt_types.h>
  13
  14 #ifndef __ASSEMBLY__
  15 #include <linux/bug.h>
  16 #include <linux/types.h>
  17 #include <linux/cpumask.h>
  18 #include <asm/frame.h>
  19
  20 static inline void load_sp0(unsigned long sp0)
  21 {
  22         PVOP_VCALL1(cpu.load_sp0, sp0);
  23 }
  24
  25 /* The paravirtualized CPUID instruction. */
  26 static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
  27                            unsigned int *ecx, unsigned int *edx)
  28 {
  29         PVOP_VCALL4(cpu.cpuid, eax, ebx, ecx, edx);
  30 }
  31
  32 /*
  33  * These special macros can be used to get or set a debugging register
  34  */
  35 static inline unsigned long paravirt_get_debugreg(int reg)
  36 {
  37         return PVOP_CALL1(unsigned long, cpu.get_debugreg, reg);
  38 }
  39 #define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
  40 static inline void set_debugreg(unsigned long val, int reg)
  41 {
  42         PVOP_VCALL2(cpu.set_debugreg, reg, val);
  43 }
  44
  45 static inline unsigned long read_cr0(void)
  46 {
  47         return PVOP_CALL0(unsigned long, cpu.read_cr0);
  48 }
  49
  50 static inline void write_cr0(unsigned long x)
  51 {
  52         PVOP_VCALL1(cpu.write_cr0, x);
  53 }
  54
  55 static inline unsigned long read_cr2(void)
  56 {
  57         return PVOP_CALL0(unsigned long, mmu.read_cr2);
  58 }
  59
  60 static inline void write_cr2(unsigned long x)
  61 {
  62         PVOP_VCALL1(mmu.write_cr2, x);
  63 }
  64
  65 static inline unsigned long __read_cr3(void)
  66 {
  67         return PVOP_CALL0(unsigned long, mmu.read_cr3);
  68 }
  69
  70 static inline void write_cr3(unsigned long x)
  71 {
  72         PVOP_VCALL1(mmu.write_cr3, x);
  73 }
  74
  75 static inline void __write_cr4(unsigned long x)
  76 {
  77         PVOP_VCALL1(cpu.write_cr4, x);
  78 }
  79
  80 #ifdef CONFIG_X86_64
  81 static inline unsigned long read_cr8(void)
  82 {
  83         return PVOP_CALL0(unsigned long, cpu.read_cr8);
  84 }
  85
  86 static inline void write_cr8(unsigned long x)
  87 {
  88         PVOP_VCALL1(cpu.write_cr8, x);
  89 }
  90 #endif
  91
  92 static inline void arch_safe_halt(void)
  93 {
  94         PVOP_VCALL0(irq.safe_halt);
  95 }
  96
  97 static inline void halt(void)
  98 {
  99         PVOP_VCALL0(irq.halt);
 100 }
 101
 102 static inline void wbinvd(void)
 103 {
 104         PVOP_VCALL0(cpu.wbinvd);
 105 }
 106
 107 #define get_kernel_rpl()  (pv_info.kernel_rpl)
 108
 109 static inline u64 paravirt_read_msr(unsigned msr)
 110 {
 111         return PVOP_CALL1(u64, cpu.read_msr, msr);
 112 }
 113
 114 static inline void paravirt_write_msr(unsigned msr,
 115                                       unsigned low, unsigned high)
 116 {
 117         PVOP_VCALL3(cpu.write_msr, msr, low, high);
 118 }
 119
 120 static inline u64 paravirt_read_msr_safe(unsigned msr, int *err)
 121 {
 122         return PVOP_CALL2(u64, cpu.read_msr_safe, msr, err);
 123 }
 124
 125 static inline int paravirt_write_msr_safe(unsigned msr,
 126                                           unsigned low, unsigned high)
 127 {
 128         return PVOP_CALL3(int, cpu.write_msr_safe, msr, low, high);
 129 }
 130
 131 #define rdmsr(msr, val1, val2)                  \
 132 do {                                            \
 133         u64 _l = paravirt_read_msr(msr);        \
 134         val1 = (u32)_l;                         \
 135         val2 = _l >> 32;                        \
 136 } while (0)
 137
 138 #define wrmsr(msr, val1, val2)                  \
 139 do {                                            \
 140         paravirt_write_msr(msr, val1, val2);    \
 141 } while (0)
 142
 143 #define rdmsrl(msr, val)                        \
 144 do {                                            \
 145         val = paravirt_read_msr(msr);           \
 146 } while (0)
 147
 148 static inline void wrmsrl(unsigned msr, u64 val)
 149 {
 150         wrmsr(msr, (u32)val, (u32)(val>>32));
 151 }
 152
 153 #define wrmsr_safe(msr, a, b)   paravirt_write_msr_safe(msr, a, b)
 154
 155 /* rdmsr with exception handling */
 156 #define rdmsr_safe(msr, a, b)                           \
 157 ({                                                      \
 158         int _err;                                       \
 159         u64 _l = paravirt_read_msr_safe(msr, &_err);    \
 160         (*a) = (u32)_l;                                 \
 161         (*b) = _l >> 32;                                \
 162         _err;                                           \
 163 })
 164
 165 static inline int rdmsrl_safe(unsigned msr, unsigned long long *p)
 166 {
 167         int err;
 168
 169         *p = paravirt_read_msr_safe(msr, &err);
 170         return err;
 171 }
 172
 173 static inline unsigned long long paravirt_sched_clock(void)
 174 {
 175         return PVOP_CALL0(unsigned long long, time.sched_clock);
 176 }
 177
 178 struct static_key;
 179 extern struct static_key paravirt_steal_enabled;
 180 extern struct static_key paravirt_steal_rq_enabled;
 181
 182 static inline u64 paravirt_steal_clock(int cpu)
 183 {
 184         return PVOP_CALL1(u64, time.steal_clock, cpu);
 185 }
 186
 187 static inline unsigned long long paravirt_read_pmc(int counter)
 188 {
 189         return PVOP_CALL1(u64, cpu.read_pmc, counter);
 190 }
 191
 192 #define rdpmc(counter, low, high)               \
 193 do {                                            \
 194         u64 _l = paravirt_read_pmc(counter);    \
 195         low = (u32)_l;                          \
 196         high = _l >> 32;                        \
 197 } while (0)
 198
 199 #define rdpmcl(counter, val) ((val) = paravirt_read_pmc(counter))
 200
 201 static inline void paravirt_alloc_ldt(struct desc_struct *ldt, unsigned entries)
 202 {
 203         PVOP_VCALL2(cpu.alloc_ldt, ldt, entries);
 204 }
 205
 206 static inline void paravirt_free_ldt(struct desc_struct *ldt, unsigned entries)
 207 {
 208         PVOP_VCALL2(cpu.free_ldt, ldt, entries);
 209 }
 210
 211 static inline void load_TR_desc(void)
 212 {
 213         PVOP_VCALL0(cpu.load_tr_desc);
 214 }
 215 static inline void load_gdt(const struct desc_ptr *dtr)
 216 {
 217         PVOP_VCALL1(cpu.load_gdt, dtr);
 218 }
 219 static inline void load_idt(const struct desc_ptr *dtr)
 220 {
 221         PVOP_VCALL1(cpu.load_idt, dtr);
 222 }
 223 static inline void set_ldt(const void *addr, unsigned entries)
 224 {
 225         PVOP_VCALL2(cpu.set_ldt, addr, entries);
 226 }
 227 static inline unsigned long paravirt_store_tr(void)
 228 {
 229         return PVOP_CALL0(unsigned long, cpu.store_tr);
 230 }
 231 #define store_tr(tr)    ((tr) = paravirt_store_tr())
 232 static inline void load_TLS(struct thread_struct *t, unsigned cpu)
 233 {
 234         PVOP_VCALL2(cpu.load_tls, t, cpu);
 235 }
 236
 237 #ifdef CONFIG_X86_64
 238 static inline void load_gs_index(unsigned int gs)
 239 {
 240         PVOP_VCALL1(cpu.load_gs_index, gs);
 241 }
 242 #endif
 243
 244 static inline void write_ldt_entry(struct desc_struct *dt, int entry,
 245                                    const void *desc)
 246 {
 247         PVOP_VCALL3(cpu.write_ldt_entry, dt, entry, desc);
 248 }
 249
 250 static inline void write_gdt_entry(struct desc_struct *dt, int entry,
 251                                    void *desc, int type)
 252 {
 253         PVOP_VCALL4(cpu.write_gdt_entry, dt, entry, desc, type);
 254 }
 255
 256 static inline void write_idt_entry(gate_desc *dt, int entry, const gate_desc *g)
 257 {
 258         PVOP_VCALL3(cpu.write_idt_entry, dt, entry, g);
 259 }
 260 static inline void set_iopl_mask(unsigned mask)
 261 {
 262         PVOP_VCALL1(cpu.set_iopl_mask, mask);
 263 }
 264
 265 /* The paravirtualized I/O functions */
 266 static inline void slow_down_io(void)
 267 {
 268         pv_ops.cpu.io_delay();
 269 #ifdef REALLY_SLOW_IO
 270         pv_ops.cpu.io_delay();
 271         pv_ops.cpu.io_delay();
 272         pv_ops.cpu.io_delay();
 273 #endif
 274 }
 275
 276 static inline void paravirt_activate_mm(struct mm_struct *prev,
 277                                         struct mm_struct *next)
 278 {
 279         PVOP_VCALL2(mmu.activate_mm, prev, next);
 280 }
 281
 282 static inline void paravirt_arch_dup_mmap(struct mm_struct *oldmm,
 283                                           struct mm_struct *mm)
 284 {
 285         PVOP_VCALL2(mmu.dup_mmap, oldmm, mm);
 286 }
 287
 288 static inline void paravirt_arch_exit_mmap(struct mm_struct *mm)
 289 {
 290         PVOP_VCALL1(mmu.exit_mmap, mm);
 291 }
 292
 293 static inline void __flush_tlb(void)
 294 {
 295         PVOP_VCALL0(mmu.flush_tlb_user);
 296 }
 297 static inline void __flush_tlb_global(void)
 298 {
 299         PVOP_VCALL0(mmu.flush_tlb_kernel);
 300 }
 301 static inline void __flush_tlb_one_user(unsigned long addr)
 302 {
 303         PVOP_VCALL1(mmu.flush_tlb_one_user, addr);
 304 }
 305
 306 static inline void flush_tlb_others(const struct cpumask *cpumask,
 307                                     const struct flush_tlb_info *info)
 308 {
 309         PVOP_VCALL2(mmu.flush_tlb_others, cpumask, info);
 310 }
 311
 312 static inline void paravirt_tlb_remove_table(struct mmu_gather *tlb, void *table)
 313 {
 314         PVOP_VCALL2(mmu.tlb_remove_table, tlb, table);
 315 }
 316
 317 static inline int paravirt_pgd_alloc(struct mm_struct *mm)
 318 {
 319         return PVOP_CALL1(int, mmu.pgd_alloc, mm);
 320 }
 321
 322 static inline void paravirt_pgd_free(struct mm_struct *mm, pgd_t *pgd)
 323 {
 324         PVOP_VCALL2(mmu.pgd_free, mm, pgd);
 325 }
 326
 327 static inline void paravirt_alloc_pte(struct mm_struct *mm, unsigned long pfn)
 328 {
 329         PVOP_VCALL2(mmu.alloc_pte, mm, pfn);
 330 }
 331 static inline void paravirt_release_pte(unsigned long pfn)
 332 {
 333         PVOP_VCALL1(mmu.release_pte, pfn);
 334 }
 335
 336 static inline void paravirt_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
 337 {
 338         PVOP_VCALL2(mmu.alloc_pmd, mm, pfn);
 339 }
 340
 341 static inline void paravirt_release_pmd(unsigned long pfn)
 342 {
 343         PVOP_VCALL1(mmu.release_pmd, pfn);
 344 }
 345
 346 static inline void paravirt_alloc_pud(struct mm_struct *mm, unsigned long pfn)
 347 {
 348         PVOP_VCALL2(mmu.alloc_pud, mm, pfn);
 349 }
 350 static inline void paravirt_release_pud(unsigned long pfn)
 351 {
 352         PVOP_VCALL1(mmu.release_pud, pfn);
 353 }
 354
 355 static inline void paravirt_alloc_p4d(struct mm_struct *mm, unsigned long pfn)
 356 {
 357         PVOP_VCALL2(mmu.alloc_p4d, mm, pfn);
 358 }
 359
 360 static inline void paravirt_release_p4d(unsigned long pfn)
 361 {
 362         PVOP_VCALL1(mmu.release_p4d, pfn);
 363 }
 364
 365 static inline pte_t __pte(pteval_t val)
 366 {
 367         pteval_t ret;
 368
 369         if (sizeof(pteval_t) > sizeof(long))
 370                 ret = PVOP_CALLEE2(pteval_t, mmu.make_pte, val, (u64)val >> 32);
 371         else
 372                 ret = PVOP_CALLEE1(pteval_t, mmu.make_pte, val);
 373
 374         return (pte_t) { .pte = ret };
 375 }
 376
 377 static inline pteval_t pte_val(pte_t pte)
 378 {
 379         pteval_t ret;
 380
 381         if (sizeof(pteval_t) > sizeof(long))
 382                 ret = PVOP_CALLEE2(pteval_t, mmu.pte_val,
 383                                    pte.pte, (u64)pte.pte >> 32);
 384         else
 385                 ret = PVOP_CALLEE1(pteval_t, mmu.pte_val, pte.pte);
 386
 387         return ret;
 388 }
 389
 390 static inline pgd_t __pgd(pgdval_t val)
 391 {
 392         pgdval_t ret;
 393
 394         if (sizeof(pgdval_t) > sizeof(long))
 395                 ret = PVOP_CALLEE2(pgdval_t, mmu.make_pgd, val, (u64)val >> 32);
 396         else
 397                 ret = PVOP_CALLEE1(pgdval_t, mmu.make_pgd, val);
 398
 399         return (pgd_t) { ret };
 400 }
 401
 402 static inline pgdval_t pgd_val(pgd_t pgd)
 403 {
 404         pgdval_t ret;
 405
 406         if (sizeof(pgdval_t) > sizeof(long))
 407                 ret =  PVOP_CALLEE2(pgdval_t, mmu.pgd_val,
 408                                     pgd.pgd, (u64)pgd.pgd >> 32);
 409         else
 410                 ret =  PVOP_CALLEE1(pgdval_t, mmu.pgd_val, pgd.pgd);
 411
 412         return ret;
 413 }
 414
 415 #define  __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
 416 static inline pte_t ptep_modify_prot_start(struct mm_struct *mm, unsigned long addr,
 417                                            pte_t *ptep)
 418 {
 419         pteval_t ret;
 420
 421         ret = PVOP_CALL3(pteval_t, mmu.ptep_modify_prot_start, mm, addr, ptep);
 422
 423         return (pte_t) { .pte = ret };
 424 }
 425
 426 static inline void ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
 427                                            pte_t *ptep, pte_t pte)
 428 {
 429         if (sizeof(pteval_t) > sizeof(long))
 430                 /* 5 arg words */
 431                 pv_ops.mmu.ptep_modify_prot_commit(mm, addr, ptep, pte);
 432         else
 433                 PVOP_VCALL4(mmu.ptep_modify_prot_commit,
 434                             mm, addr, ptep, pte.pte);
 435 }
 436
 437 static inline void set_pte(pte_t *ptep, pte_t pte)
 438 {
 439         if (sizeof(pteval_t) > sizeof(long))
 440                 PVOP_VCALL3(mmu.set_pte, ptep, pte.pte, (u64)pte.pte >> 32);
 441         else
 442                 PVOP_VCALL2(mmu.set_pte, ptep, pte.pte);
 443 }
 444
 445 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
 446                               pte_t *ptep, pte_t pte)
 447 {
 448         if (sizeof(pteval_t) > sizeof(long))
 449                 /* 5 arg words */
 450                 pv_ops.mmu.set_pte_at(mm, addr, ptep, pte);
 451         else
 452                 PVOP_VCALL4(mmu.set_pte_at, mm, addr, ptep, pte.pte);
 453 }
 454
 455 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
 456 {
 457         pmdval_t val = native_pmd_val(pmd);
 458
 459         if (sizeof(pmdval_t) > sizeof(long))
 460                 PVOP_VCALL3(mmu.set_pmd, pmdp, val, (u64)val >> 32);
 461         else
 462                 PVOP_VCALL2(mmu.set_pmd, pmdp, val);
 463 }
 464
 465 #if CONFIG_PGTABLE_LEVELS >= 3
 466 static inline pmd_t __pmd(pmdval_t val)
 467 {
 468         pmdval_t ret;
 469
 470         if (sizeof(pmdval_t) > sizeof(long))
 471                 ret = PVOP_CALLEE2(pmdval_t, mmu.make_pmd, val, (u64)val >> 32);
 472         else
 473                 ret = PVOP_CALLEE1(pmdval_t, mmu.make_pmd, val);
 474
 475         return (pmd_t) { ret };
 476 }
 477
 478 static inline pmdval_t pmd_val(pmd_t pmd)
 479 {
 480         pmdval_t ret;
 481
 482         if (sizeof(pmdval_t) > sizeof(long))
 483                 ret =  PVOP_CALLEE2(pmdval_t, mmu.pmd_val,
 484                                     pmd.pmd, (u64)pmd.pmd >> 32);
 485         else
 486                 ret =  PVOP_CALLEE1(pmdval_t, mmu.pmd_val, pmd.pmd);
 487
 488         return ret;
 489 }
 490
 491 static inline void set_pud(pud_t *pudp, pud_t pud)
 492 {
 493         pudval_t val = native_pud_val(pud);
 494
 495         if (sizeof(pudval_t) > sizeof(long))
 496                 PVOP_VCALL3(mmu.set_pud, pudp, val, (u64)val >> 32);
 497         else
 498                 PVOP_VCALL2(mmu.set_pud, pudp, val);
 499 }
 500 #if CONFIG_PGTABLE_LEVELS >= 4
 501 static inline pud_t __pud(pudval_t val)
 502 {
 503         pudval_t ret;
 504
 505         if (sizeof(pudval_t) > sizeof(long))
 506                 ret = PVOP_CALLEE2(pudval_t, mmu.make_pud, val, (u64)val >> 32);
 507         else
 508                 ret = PVOP_CALLEE1(pudval_t, mmu.make_pud, val);
 509
 510         return (pud_t) { ret };
 511 }
 512
 513 static inline pudval_t pud_val(pud_t pud)
 514 {
 515         pudval_t ret;
 516
 517         if (sizeof(pudval_t) > sizeof(long))
 518                 ret =  PVOP_CALLEE2(pudval_t, mmu.pud_val,
 519                                     pud.pud, (u64)pud.pud >> 32);
 520         else
 521                 ret =  PVOP_CALLEE1(pudval_t, mmu.pud_val, pud.pud);
 522
 523         return ret;
 524 }
 525
 526 static inline void pud_clear(pud_t *pudp)
 527 {
 528         set_pud(pudp, __pud(0));
 529 }
 530
 531 static inline void set_p4d(p4d_t *p4dp, p4d_t p4d)
 532 {
 533         p4dval_t val = native_p4d_val(p4d);
 534
 535         if (sizeof(p4dval_t) > sizeof(long))
 536                 PVOP_VCALL3(mmu.set_p4d, p4dp, val, (u64)val >> 32);
 537         else
 538                 PVOP_VCALL2(mmu.set_p4d, p4dp, val);
 539 }
 540
 541 #if CONFIG_PGTABLE_LEVELS >= 5
 542
 543 static inline p4d_t __p4d(p4dval_t val)
 544 {
 545         p4dval_t ret = PVOP_CALLEE1(p4dval_t, mmu.make_p4d, val);
 546
 547         return (p4d_t) { ret };
 548 }
 549
 550 static inline p4dval_t p4d_val(p4d_t p4d)
 551 {
 552         return PVOP_CALLEE1(p4dval_t, mmu.p4d_val, p4d.p4d);
 553 }
 554
 555 static inline void __set_pgd(pgd_t *pgdp, pgd_t pgd)
 556 {
 557         PVOP_VCALL2(mmu.set_pgd, pgdp, native_pgd_val(pgd));
 558 }
 559
 560 #define set_pgd(pgdp, pgdval) do {                                      \
 561         if (pgtable_l5_enabled())                                               \
 562                 __set_pgd(pgdp, pgdval);                                \
 563         else                                                            \
 564                 set_p4d((p4d_t *)(pgdp), (p4d_t) { (pgdval).pgd });     \
 565 } while (0)
 566
 567 #define pgd_clear(pgdp) do {                                            \
 568         if (pgtable_l5_enabled())                                               \
 569                 set_pgd(pgdp, __pgd(0));                                \
 570 } while (0)
 571
 572 #endif  /* CONFIG_PGTABLE_LEVELS == 5 */
 573
 574 static inline void p4d_clear(p4d_t *p4dp)
 575 {
 576         set_p4d(p4dp, __p4d(0));
 577 }
 578
 579 #endif  /* CONFIG_PGTABLE_LEVELS == 4 */
 580
 581 #endif  /* CONFIG_PGTABLE_LEVELS >= 3 */
 582
 583 #ifdef CONFIG_X86_PAE
 584 /* Special-case pte-setting operations for PAE, which can't update a
 585    64-bit pte atomically */
 586 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
 587 {
 588         PVOP_VCALL3(mmu.set_pte_atomic, ptep, pte.pte, pte.pte >> 32);
 589 }
 590
 591 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
 592                              pte_t *ptep)
 593 {
 594         PVOP_VCALL3(mmu.pte_clear, mm, addr, ptep);
 595 }
 596
 597 static inline void pmd_clear(pmd_t *pmdp)
 598 {
 599         PVOP_VCALL1(mmu.pmd_clear, pmdp);
 600 }
 601 #else  /* !CONFIG_X86_PAE */
 602 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
 603 {
 604         set_pte(ptep, pte);
 605 }
 606
 607 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
 608                              pte_t *ptep)
 609 {
 610         set_pte_at(mm, addr, ptep, __pte(0));
 611 }
 612
 613 static inline void pmd_clear(pmd_t *pmdp)
 614 {
 615         set_pmd(pmdp, __pmd(0));
 616 }
 617 #endif  /* CONFIG_X86_PAE */
 618
 619 #define  __HAVE_ARCH_START_CONTEXT_SWITCH
 620 static inline void arch_start_context_switch(struct task_struct *prev)
 621 {
 622         PVOP_VCALL1(cpu.start_context_switch, prev);
 623 }
 624
 625 static inline void arch_end_context_switch(struct task_struct *next)
 626 {
 627         PVOP_VCALL1(cpu.end_context_switch, next);
 628 }
 629
 630 #define  __HAVE_ARCH_ENTER_LAZY_MMU_MODE
 631 static inline void arch_enter_lazy_mmu_mode(void)
 632 {
 633         PVOP_VCALL0(mmu.lazy_mode.enter);
 634 }
 635
 636 static inline void arch_leave_lazy_mmu_mode(void)
 637 {
 638         PVOP_VCALL0(mmu.lazy_mode.leave);
 639 }
 640
 641 static inline void arch_flush_lazy_mmu_mode(void)
 642 {
 643         PVOP_VCALL0(mmu.lazy_mode.flush);
 644 }
 645
 646 static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx,
 647                                 phys_addr_t phys, pgprot_t flags)
 648 {
 649         pv_ops.mmu.set_fixmap(idx, phys, flags);
 650 }
 651
 652 #if defined(CONFIG_SMP) && defined(CONFIG_PARAVIRT_SPINLOCKS)
 653
 654 static __always_inline void pv_queued_spin_lock_slowpath(struct qspinlock *lock,
 655                                                         u32 val)
 656 {
 657         PVOP_VCALL2(lock.queued_spin_lock_slowpath, lock, val);
 658 }
 659
 660 static __always_inline void pv_queued_spin_unlock(struct qspinlock *lock)
 661 {
 662         PVOP_VCALLEE1(lock.queued_spin_unlock, lock);
 663 }
 664
 665 static __always_inline void pv_wait(u8 *ptr, u8 val)
 666 {
 667         PVOP_VCALL2(lock.wait, ptr, val);
 668 }
 669
 670 static __always_inline void pv_kick(int cpu)
 671 {
 672         PVOP_VCALL1(lock.kick, cpu);
 673 }
 674
 675 static __always_inline bool pv_vcpu_is_preempted(long cpu)
 676 {
 677         return PVOP_CALLEE1(bool, lock.vcpu_is_preempted, cpu);
 678 }
 679
 680 void __raw_callee_save___native_queued_spin_unlock(struct qspinlock *lock);
 681 bool __raw_callee_save___native_vcpu_is_preempted(long cpu);
 682
 683 #endif /* SMP && PARAVIRT_SPINLOCKS */
 684
 685 #ifdef CONFIG_X86_32
 686 #define PV_SAVE_REGS "pushl %ecx; pushl %edx;"
 687 #define PV_RESTORE_REGS "popl %edx; popl %ecx;"
 688
 689 /* save and restore all caller-save registers, except return value */
 690 #define PV_SAVE_ALL_CALLER_REGS         "pushl %ecx;"
 691 #define PV_RESTORE_ALL_CALLER_REGS      "popl  %ecx;"
 692
 693 #define PV_FLAGS_ARG "0"
 694 #define PV_EXTRA_CLOBBERS
 695 #define PV_VEXTRA_CLOBBERS
 696 #else
 697 /* save and restore all caller-save registers, except return value */
 698 #define PV_SAVE_ALL_CALLER_REGS                                         \
 699         "push %rcx;"                                                    \
 700         "push %rdx;"                                                    \
 701         "push %rsi;"                                                    \
 702         "push %rdi;"                                                    \
 703         "push %r8;"                                                     \
 704         "push %r9;"                                                     \
 705         "push %r10;"                                                    \
 706         "push %r11;"
 707 #define PV_RESTORE_ALL_CALLER_REGS                                      \
 708         "pop %r11;"                                                     \
 709         "pop %r10;"                                                     \
 710         "pop %r9;"                                                      \
 711         "pop %r8;"                                                      \
 712         "pop %rdi;"                                                     \
 713         "pop %rsi;"                                                     \
 714         "pop %rdx;"                                                     \
 715         "pop %rcx;"
 716
 717 /* We save some registers, but all of them, that's too much. We clobber all
 718  * caller saved registers but the argument parameter */
 719 #define PV_SAVE_REGS "pushq %%rdi;"
 720 #define PV_RESTORE_REGS "popq %%rdi;"
 721 #define PV_EXTRA_CLOBBERS EXTRA_CLOBBERS, "rcx" , "rdx", "rsi"
 722 #define PV_VEXTRA_CLOBBERS EXTRA_CLOBBERS, "rdi", "rcx" , "rdx", "rsi"
 723 #define PV_FLAGS_ARG "D"
 724 #endif
 725
 726 /*
 727  * Generate a thunk around a function which saves all caller-save
 728  * registers except for the return value.  This allows C functions to
 729  * be called from assembler code where fewer than normal registers are
 730  * available.  It may also help code generation around calls from C
 731  * code if the common case doesn't use many registers.
 732  *
 733  * When a callee is wrapped in a thunk, the caller can assume that all
 734  * arg regs and all scratch registers are preserved across the
 735  * call. The return value in rax/eax will not be saved, even for void
 736  * functions.
 737  */
 738 #define PV_THUNK_NAME(func) "__raw_callee_save_" #func
 739 #define PV_CALLEE_SAVE_REGS_THUNK(func)                                 \
 740         extern typeof(func) __raw_callee_save_##func;                   \
 741                                                                         \
 742         asm(".pushsection .text;"                                       \
 743             ".globl " PV_THUNK_NAME(func) ";"                           \
 744             ".type " PV_THUNK_NAME(func) ", @function;"                 \
 745             PV_THUNK_NAME(func) ":"                                     \
 746             FRAME_BEGIN                                                 \
 747             PV_SAVE_ALL_CALLER_REGS                                     \
 748             "call " #func ";"                                           \
 749             PV_RESTORE_ALL_CALLER_REGS                                  \
 750             FRAME_END                                                   \
 751             "ret;"                                                      \
 752             ".popsection")
 753
 754 /* Get a reference to a callee-save function */
 755 #define PV_CALLEE_SAVE(func)                                            \
 756         ((struct paravirt_callee_save) { __raw_callee_save_##func })
 757
 758 /* Promise that "func" already uses the right calling convention */
 759 #define __PV_IS_CALLEE_SAVE(func)                       \
 760         ((struct paravirt_callee_save) { func })
 761
 762 static inline notrace unsigned long arch_local_save_flags(void)
 763 {
 764         return PVOP_CALLEE0(unsigned long, irq.save_fl);
 765 }
 766
 767 static inline notrace void arch_local_irq_restore(unsigned long f)
 768 {
 769         PVOP_VCALLEE1(irq.restore_fl, f);
 770 }
 771
 772 static inline notrace void arch_local_irq_disable(void)
 773 {
 774         PVOP_VCALLEE0(irq.irq_disable);
 775 }
 776
 777 static inline notrace void arch_local_irq_enable(void)
 778 {
 779         PVOP_VCALLEE0(irq.irq_enable);
 780 }
 781
 782 static inline notrace unsigned long arch_local_irq_save(void)
 783 {
 784         unsigned long f;
 785
 786         f = arch_local_save_flags();
 787         arch_local_irq_disable();
 788         return f;
 789 }
 790
 791
 792 /* Make sure as little as possible of this mess escapes. */
 793 #undef PARAVIRT_CALL
 794 #undef __PVOP_CALL
 795 #undef __PVOP_VCALL
 796 #undef PVOP_VCALL0
 797 #undef PVOP_CALL0
 798 #undef PVOP_VCALL1
 799 #undef PVOP_CALL1
 800 #undef PVOP_VCALL2
 801 #undef PVOP_CALL2
 802 #undef PVOP_VCALL3
 803 #undef PVOP_CALL3
 804 #undef PVOP_VCALL4
 805 #undef PVOP_CALL4
 806
 807 extern void default_banner(void);
 808
 809 #else  /* __ASSEMBLY__ */
 810
 811 #define _PVSITE(ptype, ops, word, algn)         \
 812 771:;                                           \
 813         ops;                                    \
 814 772:;                                           \
 815         .pushsection .parainstructions,"a";     \
 816          .align algn;                           \
 817          word 771b;                             \
 818          .byte ptype;                           \
 819          .byte 772b-771b;                       \
 820         .popsection
 821
 822
 823 #define COND_PUSH(set, mask, reg)                       \
 824         .if ((~(set)) & mask); push %reg; .endif
 825 #define COND_POP(set, mask, reg)                        \
 826         .if ((~(set)) & mask); pop %reg; .endif
 827
 828 #ifdef CONFIG_X86_64
 829
 830 #define PV_SAVE_REGS(set)                       \
 831         COND_PUSH(set, CLBR_RAX, rax);          \
 832         COND_PUSH(set, CLBR_RCX, rcx);          \
 833         COND_PUSH(set, CLBR_RDX, rdx);          \
 834         COND_PUSH(set, CLBR_RSI, rsi);          \
 835         COND_PUSH(set, CLBR_RDI, rdi);          \
 836         COND_PUSH(set, CLBR_R8, r8);            \
 837         COND_PUSH(set, CLBR_R9, r9);            \
 838         COND_PUSH(set, CLBR_R10, r10);          \
 839         COND_PUSH(set, CLBR_R11, r11)
 840 #define PV_RESTORE_REGS(set)                    \
 841         COND_POP(set, CLBR_R11, r11);           \
 842         COND_POP(set, CLBR_R10, r10);           \
 843         COND_POP(set, CLBR_R9, r9);             \
 844         COND_POP(set, CLBR_R8, r8);             \
 845         COND_POP(set, CLBR_RDI, rdi);           \
 846         COND_POP(set, CLBR_RSI, rsi);           \
 847         COND_POP(set, CLBR_RDX, rdx);           \
 848         COND_POP(set, CLBR_RCX, rcx);           \
 849         COND_POP(set, CLBR_RAX, rax)
 850
 851 #define PARA_PATCH(off)         ((off) / 8)
 852 #define PARA_SITE(ptype, ops)   _PVSITE(ptype, ops, .quad, 8)
 853 #define PARA_INDIRECT(addr)     *addr(%rip)
 854 #else
 855 #define PV_SAVE_REGS(set)                       \
 856         COND_PUSH(set, CLBR_EAX, eax);          \
 857         COND_PUSH(set, CLBR_EDI, edi);          \
 858         COND_PUSH(set, CLBR_ECX, ecx);          \
 859         COND_PUSH(set, CLBR_EDX, edx)
 860 #define PV_RESTORE_REGS(set)                    \
 861         COND_POP(set, CLBR_EDX, edx);           \
 862         COND_POP(set, CLBR_ECX, ecx);           \
 863         COND_POP(set, CLBR_EDI, edi);           \
 864         COND_POP(set, CLBR_EAX, eax)
 865
 866 #define PARA_PATCH(off)         ((off) / 4)
 867 #define PARA_SITE(ptype, ops)   _PVSITE(ptype, ops, .long, 4)
 868 #define PARA_INDIRECT(addr)     *%cs:addr
 869 #endif
 870
 871 #define INTERRUPT_RETURN                                                \
 872         PARA_SITE(PARA_PATCH(PV_CPU_iret),                              \
 873                   ANNOTATE_RETPOLINE_SAFE;                              \
 874                   jmp PARA_INDIRECT(pv_ops+PV_CPU_iret);)
 875
 876 #define DISABLE_INTERRUPTS(clobbers)                                    \
 877         PARA_SITE(PARA_PATCH(PV_IRQ_irq_disable),                       \
 878                   PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE);            \
 879                   ANNOTATE_RETPOLINE_SAFE;                              \
 880                   call PARA_INDIRECT(pv_ops+PV_IRQ_irq_disable);        \
 881                   PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
 882
 883 #define ENABLE_INTERRUPTS(clobbers)                                     \
 884         PARA_SITE(PARA_PATCH(PV_IRQ_irq_enable),                        \
 885                   PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE);            \
 886                   ANNOTATE_RETPOLINE_SAFE;                              \
 887                   call PARA_INDIRECT(pv_ops+PV_IRQ_irq_enable);         \
 888                   PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
 889
 890 #ifdef CONFIG_X86_64
 891 /*
 892  * If swapgs is used while the userspace stack is still current,
 893  * there's no way to call a pvop.  The PV replacement *must* be
 894  * inlined, or the swapgs instruction must be trapped and emulated.
 895  */
 896 #define SWAPGS_UNSAFE_STACK                                             \
 897         PARA_SITE(PARA_PATCH(PV_CPU_swapgs), swapgs)
 898
 899 /*
 900  * Note: swapgs is very special, and in practise is either going to be
 901  * implemented with a single "swapgs" instruction or something very
 902  * special.  Either way, we don't need to save any registers for
 903  * it.
 904  */
 905 #define SWAPGS                                                          \
 906         PARA_SITE(PARA_PATCH(PV_CPU_swapgs),                            \
 907                   ANNOTATE_RETPOLINE_SAFE;                              \
 908                   call PARA_INDIRECT(pv_ops+PV_CPU_swapgs);             \
 909                  )
 910
 911 #define GET_CR2_INTO_RAX                                \
 912         ANNOTATE_RETPOLINE_SAFE;                                \
 913         call PARA_INDIRECT(pv_ops+PV_MMU_read_cr2);
 914
 915 #define USERGS_SYSRET64                                                 \
 916         PARA_SITE(PARA_PATCH(PV_CPU_usergs_sysret64),                   \
 917                   ANNOTATE_RETPOLINE_SAFE;                              \
 918                   jmp PARA_INDIRECT(pv_ops+PV_CPU_usergs_sysret64);)
 919
 920 #ifdef CONFIG_DEBUG_ENTRY
 921 #define SAVE_FLAGS(clobbers)                                        \
 922         PARA_SITE(PARA_PATCH(PV_IRQ_save_fl),                       \
 923                   PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE);        \
 924                   ANNOTATE_RETPOLINE_SAFE;                          \
 925                   call PARA_INDIRECT(pv_ops+PV_IRQ_save_fl);        \
 926                   PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
 927 #endif
 928
 929 #endif  /* CONFIG_X86_32 */
 930
 931 #endif /* __ASSEMBLY__ */
 932 #else  /* CONFIG_PARAVIRT */
 933 # define default_banner x86_init_noop
 934 #ifndef __ASSEMBLY__
 935 static inline void paravirt_arch_dup_mmap(struct mm_struct *oldmm,
 936                                           struct mm_struct *mm)
 937 {
 938 }
 939
 940 static inline void paravirt_arch_exit_mmap(struct mm_struct *mm)
 941 {
 942 }
 943 #endif /* __ASSEMBLY__ */
 944 #endif /* !CONFIG_PARAVIRT */
 945 #endif /* _ASM_X86_PARAVIRT_H */