arch/x86/include/asm/paravirt.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 #ifndef _ASM_X86_PARAVIRT_H
   3 #define _ASM_X86_PARAVIRT_H
   4 /* Various instructions on x86 need to be replaced for
   5  * para-virtualization: those hooks are defined here. */
   6
   7 #include <asm/paravirt_types.h>
   8
   9 #ifdef CONFIG_PARAVIRT
  10 #include <asm/pgtable_types.h>
  11 #include <asm/asm.h>
  12 #include <asm/nospec-branch.h>
  13
  14 #ifndef __ASSEMBLY__
  15 #include <linux/bug.h>
  16 #include <linux/types.h>
  17 #include <linux/cpumask.h>
  18 #include <linux/static_call_types.h>
  19 #include <asm/frame.h>
  20
  21 u64 dummy_steal_clock(int cpu);
  22 u64 dummy_sched_clock(void);
  23
  24 DECLARE_STATIC_CALL(pv_steal_clock, dummy_steal_clock);
  25 DECLARE_STATIC_CALL(pv_sched_clock, dummy_sched_clock);
  26
  27 void paravirt_set_sched_clock(u64 (*func)(void));
  28
  29 static __always_inline u64 paravirt_sched_clock(void)
  30 {
  31         return static_call(pv_sched_clock)();
  32 }
  33
  34 struct static_key;
  35 extern struct static_key paravirt_steal_enabled;
  36 extern struct static_key paravirt_steal_rq_enabled;
  37
  38 __visible void __native_queued_spin_unlock(struct qspinlock *lock);
  39 bool pv_is_native_spin_unlock(void);
  40 __visible bool __native_vcpu_is_preempted(long cpu);
  41 bool pv_is_native_vcpu_is_preempted(void);
  42
  43 static inline u64 paravirt_steal_clock(int cpu)
  44 {
  45         return static_call(pv_steal_clock)(cpu);
  46 }
  47
  48 #ifdef CONFIG_PARAVIRT_SPINLOCKS
  49 void __init paravirt_set_cap(void);
  50 #endif
  51
  52 /* The paravirtualized I/O functions */
  53 static inline void slow_down_io(void)
  54 {
  55         PVOP_VCALL0(cpu.io_delay);
  56 #ifdef REALLY_SLOW_IO
  57         PVOP_VCALL0(cpu.io_delay);
  58         PVOP_VCALL0(cpu.io_delay);
  59         PVOP_VCALL0(cpu.io_delay);
  60 #endif
  61 }
  62
  63 void native_flush_tlb_local(void);
  64 void native_flush_tlb_global(void);
  65 void native_flush_tlb_one_user(unsigned long addr);
  66 void native_flush_tlb_multi(const struct cpumask *cpumask,
  67                              const struct flush_tlb_info *info);
  68
  69 static inline void __flush_tlb_local(void)
  70 {
  71         PVOP_VCALL0(mmu.flush_tlb_user);
  72 }
  73
  74 static inline void __flush_tlb_global(void)
  75 {
  76         PVOP_VCALL0(mmu.flush_tlb_kernel);
  77 }
  78
  79 static inline void __flush_tlb_one_user(unsigned long addr)
  80 {
  81         PVOP_VCALL1(mmu.flush_tlb_one_user, addr);
  82 }
  83
  84 static inline void __flush_tlb_multi(const struct cpumask *cpumask,
  85                                       const struct flush_tlb_info *info)
  86 {
  87         PVOP_VCALL2(mmu.flush_tlb_multi, cpumask, info);
  88 }
  89
  90 static inline void paravirt_tlb_remove_table(struct mmu_gather *tlb, void *table)
  91 {
  92         PVOP_VCALL2(mmu.tlb_remove_table, tlb, table);
  93 }
  94
  95 static inline void paravirt_arch_exit_mmap(struct mm_struct *mm)
  96 {
  97         PVOP_VCALL1(mmu.exit_mmap, mm);
  98 }
  99
 100 static inline void notify_page_enc_status_changed(unsigned long pfn,
 101                                                   int npages, bool enc)
 102 {
 103         PVOP_VCALL3(mmu.notify_page_enc_status_changed, pfn, npages, enc);
 104 }
 105
 106 #ifdef CONFIG_PARAVIRT_XXL
 107 static inline void load_sp0(unsigned long sp0)
 108 {
 109         PVOP_VCALL1(cpu.load_sp0, sp0);
 110 }
 111
 112 /* The paravirtualized CPUID instruction. */
 113 static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
 114                            unsigned int *ecx, unsigned int *edx)
 115 {
 116         PVOP_VCALL4(cpu.cpuid, eax, ebx, ecx, edx);
 117 }
 118
 119 /*
 120  * These special macros can be used to get or set a debugging register
 121  */
 122 static __always_inline unsigned long paravirt_get_debugreg(int reg)
 123 {
 124         return PVOP_CALL1(unsigned long, cpu.get_debugreg, reg);
 125 }
 126 #define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
 127 static __always_inline void set_debugreg(unsigned long val, int reg)
 128 {
 129         PVOP_VCALL2(cpu.set_debugreg, reg, val);
 130 }
 131
 132 static inline unsigned long read_cr0(void)
 133 {
 134         return PVOP_CALL0(unsigned long, cpu.read_cr0);
 135 }
 136
 137 static inline void write_cr0(unsigned long x)
 138 {
 139         PVOP_VCALL1(cpu.write_cr0, x);
 140 }
 141
 142 static __always_inline unsigned long read_cr2(void)
 143 {
 144         return PVOP_ALT_CALLEE0(unsigned long, mmu.read_cr2,
 145                                 "mov %%cr2, %%rax;", ALT_NOT_XEN);
 146 }
 147
 148 static __always_inline void write_cr2(unsigned long x)
 149 {
 150         PVOP_VCALL1(mmu.write_cr2, x);
 151 }
 152
 153 static inline unsigned long __read_cr3(void)
 154 {
 155         return PVOP_ALT_CALL0(unsigned long, mmu.read_cr3,
 156                               "mov %%cr3, %%rax;", ALT_NOT_XEN);
 157 }
 158
 159 static inline void write_cr3(unsigned long x)
 160 {
 161         PVOP_ALT_VCALL1(mmu.write_cr3, x, "mov %%rdi, %%cr3", ALT_NOT_XEN);
 162 }
 163
 164 static inline void __write_cr4(unsigned long x)
 165 {
 166         PVOP_VCALL1(cpu.write_cr4, x);
 167 }
 168
 169 static __always_inline void arch_safe_halt(void)
 170 {
 171         PVOP_VCALL0(irq.safe_halt);
 172 }
 173
 174 static inline void halt(void)
 175 {
 176         PVOP_VCALL0(irq.halt);
 177 }
 178
 179 extern noinstr void pv_native_wbinvd(void);
 180
 181 static __always_inline void wbinvd(void)
 182 {
 183         PVOP_ALT_VCALL0(cpu.wbinvd, "wbinvd", ALT_NOT_XEN);
 184 }
 185
 186 static inline u64 paravirt_read_msr(unsigned msr)
 187 {
 188         return PVOP_CALL1(u64, cpu.read_msr, msr);
 189 }
 190
 191 static inline void paravirt_write_msr(unsigned msr,
 192                                       unsigned low, unsigned high)
 193 {
 194         PVOP_VCALL3(cpu.write_msr, msr, low, high);
 195 }
 196
 197 static inline u64 paravirt_read_msr_safe(unsigned msr, int *err)
 198 {
 199         return PVOP_CALL2(u64, cpu.read_msr_safe, msr, err);
 200 }
 201
 202 static inline int paravirt_write_msr_safe(unsigned msr,
 203                                           unsigned low, unsigned high)
 204 {
 205         return PVOP_CALL3(int, cpu.write_msr_safe, msr, low, high);
 206 }
 207
 208 #define rdmsr(msr, val1, val2)                  \
 209 do {                                            \
 210         u64 _l = paravirt_read_msr(msr);        \
 211         val1 = (u32)_l;                         \
 212         val2 = _l >> 32;                        \
 213 } while (0)
 214
 215 #define wrmsr(msr, val1, val2)                  \
 216 do {                                            \
 217         paravirt_write_msr(msr, val1, val2);    \
 218 } while (0)
 219
 220 #define rdmsrl(msr, val)                        \
 221 do {                                            \
 222         val = paravirt_read_msr(msr);           \
 223 } while (0)
 224
 225 static inline void wrmsrl(unsigned msr, u64 val)
 226 {
 227         wrmsr(msr, (u32)val, (u32)(val>>32));
 228 }
 229
 230 #define wrmsr_safe(msr, a, b)   paravirt_write_msr_safe(msr, a, b)
 231
 232 /* rdmsr with exception handling */
 233 #define rdmsr_safe(msr, a, b)                           \
 234 ({                                                      \
 235         int _err;                                       \
 236         u64 _l = paravirt_read_msr_safe(msr, &_err);    \
 237         (*a) = (u32)_l;                                 \
 238         (*b) = _l >> 32;                                \
 239         _err;                                           \
 240 })
 241
 242 static inline int rdmsrl_safe(unsigned msr, unsigned long long *p)
 243 {
 244         int err;
 245
 246         *p = paravirt_read_msr_safe(msr, &err);
 247         return err;
 248 }
 249
 250 static inline unsigned long long paravirt_read_pmc(int counter)
 251 {
 252         return PVOP_CALL1(u64, cpu.read_pmc, counter);
 253 }
 254
 255 #define rdpmc(counter, low, high)               \
 256 do {                                            \
 257         u64 _l = paravirt_read_pmc(counter);    \
 258         low = (u32)_l;                          \
 259         high = _l >> 32;                        \
 260 } while (0)
 261
 262 #define rdpmcl(counter, val) ((val) = paravirt_read_pmc(counter))
 263
 264 static inline void paravirt_alloc_ldt(struct desc_struct *ldt, unsigned entries)
 265 {
 266         PVOP_VCALL2(cpu.alloc_ldt, ldt, entries);
 267 }
 268
 269 static inline void paravirt_free_ldt(struct desc_struct *ldt, unsigned entries)
 270 {
 271         PVOP_VCALL2(cpu.free_ldt, ldt, entries);
 272 }
 273
 274 static inline void load_TR_desc(void)
 275 {
 276         PVOP_VCALL0(cpu.load_tr_desc);
 277 }
 278 static inline void load_gdt(const struct desc_ptr *dtr)
 279 {
 280         PVOP_VCALL1(cpu.load_gdt, dtr);
 281 }
 282 static inline void load_idt(const struct desc_ptr *dtr)
 283 {
 284         PVOP_VCALL1(cpu.load_idt, dtr);
 285 }
 286 static inline void set_ldt(const void *addr, unsigned entries)
 287 {
 288         PVOP_VCALL2(cpu.set_ldt, addr, entries);
 289 }
 290 static inline unsigned long paravirt_store_tr(void)
 291 {
 292         return PVOP_CALL0(unsigned long, cpu.store_tr);
 293 }
 294
 295 #define store_tr(tr)    ((tr) = paravirt_store_tr())
 296 static inline void load_TLS(struct thread_struct *t, unsigned cpu)
 297 {
 298         PVOP_VCALL2(cpu.load_tls, t, cpu);
 299 }
 300
 301 static inline void load_gs_index(unsigned int gs)
 302 {
 303         PVOP_VCALL1(cpu.load_gs_index, gs);
 304 }
 305
 306 static inline void write_ldt_entry(struct desc_struct *dt, int entry,
 307                                    const void *desc)
 308 {
 309         PVOP_VCALL3(cpu.write_ldt_entry, dt, entry, desc);
 310 }
 311
 312 static inline void write_gdt_entry(struct desc_struct *dt, int entry,
 313                                    void *desc, int type)
 314 {
 315         PVOP_VCALL4(cpu.write_gdt_entry, dt, entry, desc, type);
 316 }
 317
 318 static inline void write_idt_entry(gate_desc *dt, int entry, const gate_desc *g)
 319 {
 320         PVOP_VCALL3(cpu.write_idt_entry, dt, entry, g);
 321 }
 322
 323 #ifdef CONFIG_X86_IOPL_IOPERM
 324 static inline void tss_invalidate_io_bitmap(void)
 325 {
 326         PVOP_VCALL0(cpu.invalidate_io_bitmap);
 327 }
 328
 329 static inline void tss_update_io_bitmap(void)
 330 {
 331         PVOP_VCALL0(cpu.update_io_bitmap);
 332 }
 333 #endif
 334
 335 static inline void paravirt_enter_mmap(struct mm_struct *next)
 336 {
 337         PVOP_VCALL1(mmu.enter_mmap, next);
 338 }
 339
 340 static inline int paravirt_pgd_alloc(struct mm_struct *mm)
 341 {
 342         return PVOP_CALL1(int, mmu.pgd_alloc, mm);
 343 }
 344
 345 static inline void paravirt_pgd_free(struct mm_struct *mm, pgd_t *pgd)
 346 {
 347         PVOP_VCALL2(mmu.pgd_free, mm, pgd);
 348 }
 349
 350 static inline void paravirt_alloc_pte(struct mm_struct *mm, unsigned long pfn)
 351 {
 352         PVOP_VCALL2(mmu.alloc_pte, mm, pfn);
 353 }
 354 static inline void paravirt_release_pte(unsigned long pfn)
 355 {
 356         PVOP_VCALL1(mmu.release_pte, pfn);
 357 }
 358
 359 static inline void paravirt_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
 360 {
 361         PVOP_VCALL2(mmu.alloc_pmd, mm, pfn);
 362 }
 363
 364 static inline void paravirt_release_pmd(unsigned long pfn)
 365 {
 366         PVOP_VCALL1(mmu.release_pmd, pfn);
 367 }
 368
 369 static inline void paravirt_alloc_pud(struct mm_struct *mm, unsigned long pfn)
 370 {
 371         PVOP_VCALL2(mmu.alloc_pud, mm, pfn);
 372 }
 373 static inline void paravirt_release_pud(unsigned long pfn)
 374 {
 375         PVOP_VCALL1(mmu.release_pud, pfn);
 376 }
 377
 378 static inline void paravirt_alloc_p4d(struct mm_struct *mm, unsigned long pfn)
 379 {
 380         PVOP_VCALL2(mmu.alloc_p4d, mm, pfn);
 381 }
 382
 383 static inline void paravirt_release_p4d(unsigned long pfn)
 384 {
 385         PVOP_VCALL1(mmu.release_p4d, pfn);
 386 }
 387
 388 static inline pte_t __pte(pteval_t val)
 389 {
 390         return (pte_t) { PVOP_ALT_CALLEE1(pteval_t, mmu.make_pte, val,
 391                                           "mov %%rdi, %%rax", ALT_NOT_XEN) };
 392 }
 393
 394 static inline pteval_t pte_val(pte_t pte)
 395 {
 396         return PVOP_ALT_CALLEE1(pteval_t, mmu.pte_val, pte.pte,
 397                                 "mov %%rdi, %%rax", ALT_NOT_XEN);
 398 }
 399
 400 static inline pgd_t __pgd(pgdval_t val)
 401 {
 402         return (pgd_t) { PVOP_ALT_CALLEE1(pgdval_t, mmu.make_pgd, val,
 403                                           "mov %%rdi, %%rax", ALT_NOT_XEN) };
 404 }
 405
 406 static inline pgdval_t pgd_val(pgd_t pgd)
 407 {
 408         return PVOP_ALT_CALLEE1(pgdval_t, mmu.pgd_val, pgd.pgd,
 409                                 "mov %%rdi, %%rax", ALT_NOT_XEN);
 410 }
 411
 412 #define  __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
 413 static inline pte_t ptep_modify_prot_start(struct vm_area_struct *vma, unsigned long addr,
 414                                            pte_t *ptep)
 415 {
 416         pteval_t ret;
 417
 418         ret = PVOP_CALL3(pteval_t, mmu.ptep_modify_prot_start, vma, addr, ptep);
 419
 420         return (pte_t) { .pte = ret };
 421 }
 422
 423 static inline void ptep_modify_prot_commit(struct vm_area_struct *vma, unsigned long addr,
 424                                            pte_t *ptep, pte_t old_pte, pte_t pte)
 425 {
 426
 427         PVOP_VCALL4(mmu.ptep_modify_prot_commit, vma, addr, ptep, pte.pte);
 428 }
 429
 430 static inline void set_pte(pte_t *ptep, pte_t pte)
 431 {
 432         PVOP_VCALL2(mmu.set_pte, ptep, pte.pte);
 433 }
 434
 435 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
 436 {
 437         PVOP_VCALL2(mmu.set_pmd, pmdp, native_pmd_val(pmd));
 438 }
 439
 440 static inline pmd_t __pmd(pmdval_t val)
 441 {
 442         return (pmd_t) { PVOP_ALT_CALLEE1(pmdval_t, mmu.make_pmd, val,
 443                                           "mov %%rdi, %%rax", ALT_NOT_XEN) };
 444 }
 445
 446 static inline pmdval_t pmd_val(pmd_t pmd)
 447 {
 448         return PVOP_ALT_CALLEE1(pmdval_t, mmu.pmd_val, pmd.pmd,
 449                                 "mov %%rdi, %%rax", ALT_NOT_XEN);
 450 }
 451
 452 static inline void set_pud(pud_t *pudp, pud_t pud)
 453 {
 454         PVOP_VCALL2(mmu.set_pud, pudp, native_pud_val(pud));
 455 }
 456
 457 static inline pud_t __pud(pudval_t val)
 458 {
 459         pudval_t ret;
 460
 461         ret = PVOP_ALT_CALLEE1(pudval_t, mmu.make_pud, val,
 462                                "mov %%rdi, %%rax", ALT_NOT_XEN);
 463
 464         return (pud_t) { ret };
 465 }
 466
 467 static inline pudval_t pud_val(pud_t pud)
 468 {
 469         return PVOP_ALT_CALLEE1(pudval_t, mmu.pud_val, pud.pud,
 470                                 "mov %%rdi, %%rax", ALT_NOT_XEN);
 471 }
 472
 473 static inline void pud_clear(pud_t *pudp)
 474 {
 475         set_pud(pudp, native_make_pud(0));
 476 }
 477
 478 static inline void set_p4d(p4d_t *p4dp, p4d_t p4d)
 479 {
 480         p4dval_t val = native_p4d_val(p4d);
 481
 482         PVOP_VCALL2(mmu.set_p4d, p4dp, val);
 483 }
 484
 485 #if CONFIG_PGTABLE_LEVELS >= 5
 486
 487 static inline p4d_t __p4d(p4dval_t val)
 488 {
 489         p4dval_t ret = PVOP_ALT_CALLEE1(p4dval_t, mmu.make_p4d, val,
 490                                         "mov %%rdi, %%rax", ALT_NOT_XEN);
 491
 492         return (p4d_t) { ret };
 493 }
 494
 495 static inline p4dval_t p4d_val(p4d_t p4d)
 496 {
 497         return PVOP_ALT_CALLEE1(p4dval_t, mmu.p4d_val, p4d.p4d,
 498                                 "mov %%rdi, %%rax", ALT_NOT_XEN);
 499 }
 500
 501 static inline void __set_pgd(pgd_t *pgdp, pgd_t pgd)
 502 {
 503         PVOP_VCALL2(mmu.set_pgd, pgdp, native_pgd_val(pgd));
 504 }
 505
 506 #define set_pgd(pgdp, pgdval) do {                                      \
 507         if (pgtable_l5_enabled())                                               \
 508                 __set_pgd(pgdp, pgdval);                                \
 509         else                                                            \
 510                 set_p4d((p4d_t *)(pgdp), (p4d_t) { (pgdval).pgd });     \
 511 } while (0)
 512
 513 #define pgd_clear(pgdp) do {                                            \
 514         if (pgtable_l5_enabled())                                       \
 515                 set_pgd(pgdp, native_make_pgd(0));                      \
 516 } while (0)
 517
 518 #endif  /* CONFIG_PGTABLE_LEVELS == 5 */
 519
 520 static inline void p4d_clear(p4d_t *p4dp)
 521 {
 522         set_p4d(p4dp, native_make_p4d(0));
 523 }
 524
 525 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
 526 {
 527         set_pte(ptep, pte);
 528 }
 529
 530 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
 531                              pte_t *ptep)
 532 {
 533         set_pte(ptep, native_make_pte(0));
 534 }
 535
 536 static inline void pmd_clear(pmd_t *pmdp)
 537 {
 538         set_pmd(pmdp, native_make_pmd(0));
 539 }
 540
 541 #define  __HAVE_ARCH_START_CONTEXT_SWITCH
 542 static inline void arch_start_context_switch(struct task_struct *prev)
 543 {
 544         PVOP_VCALL1(cpu.start_context_switch, prev);
 545 }
 546
 547 static inline void arch_end_context_switch(struct task_struct *next)
 548 {
 549         PVOP_VCALL1(cpu.end_context_switch, next);
 550 }
 551
 552 #define  __HAVE_ARCH_ENTER_LAZY_MMU_MODE
 553 static inline void arch_enter_lazy_mmu_mode(void)
 554 {
 555         PVOP_VCALL0(mmu.lazy_mode.enter);
 556 }
 557
 558 static inline void arch_leave_lazy_mmu_mode(void)
 559 {
 560         PVOP_VCALL0(mmu.lazy_mode.leave);
 561 }
 562
 563 static inline void arch_flush_lazy_mmu_mode(void)
 564 {
 565         PVOP_VCALL0(mmu.lazy_mode.flush);
 566 }
 567
 568 static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx,
 569                                 phys_addr_t phys, pgprot_t flags)
 570 {
 571         pv_ops.mmu.set_fixmap(idx, phys, flags);
 572 }
 573 #endif
 574
 575 #if defined(CONFIG_SMP) && defined(CONFIG_PARAVIRT_SPINLOCKS)
 576
 577 static __always_inline void pv_queued_spin_lock_slowpath(struct qspinlock *lock,
 578                                                         u32 val)
 579 {
 580         PVOP_VCALL2(lock.queued_spin_lock_slowpath, lock, val);
 581 }
 582
 583 static __always_inline void pv_queued_spin_unlock(struct qspinlock *lock)
 584 {
 585         PVOP_ALT_VCALLEE1(lock.queued_spin_unlock, lock,
 586                           "movb $0, (%%" _ASM_ARG1 ");",
 587                           ALT_NOT(X86_FEATURE_PVUNLOCK));
 588 }
 589
 590 static __always_inline void pv_wait(u8 *ptr, u8 val)
 591 {
 592         PVOP_VCALL2(lock.wait, ptr, val);
 593 }
 594
 595 static __always_inline void pv_kick(int cpu)
 596 {
 597         PVOP_VCALL1(lock.kick, cpu);
 598 }
 599
 600 static __always_inline bool pv_vcpu_is_preempted(long cpu)
 601 {
 602         return PVOP_ALT_CALLEE1(bool, lock.vcpu_is_preempted, cpu,
 603                                 "xor %%" _ASM_AX ", %%" _ASM_AX ";",
 604                                 ALT_NOT(X86_FEATURE_VCPUPREEMPT));
 605 }
 606
 607 void __raw_callee_save___native_queued_spin_unlock(struct qspinlock *lock);
 608 bool __raw_callee_save___native_vcpu_is_preempted(long cpu);
 609
 610 #endif /* SMP && PARAVIRT_SPINLOCKS */
 611
 612 #ifdef CONFIG_X86_32
 613 /* save and restore all caller-save registers, except return value */
 614 #define PV_SAVE_ALL_CALLER_REGS         "pushl %ecx;"
 615 #define PV_RESTORE_ALL_CALLER_REGS      "popl  %ecx;"
 616 #else
 617 /* save and restore all caller-save registers, except return value */
 618 #define PV_SAVE_ALL_CALLER_REGS                                         \
 619         "push %rcx;"                                                    \
 620         "push %rdx;"                                                    \
 621         "push %rsi;"                                                    \
 622         "push %rdi;"                                                    \
 623         "push %r8;"                                                     \
 624         "push %r9;"                                                     \
 625         "push %r10;"                                                    \
 626         "push %r11;"
 627 #define PV_RESTORE_ALL_CALLER_REGS                                      \
 628         "pop %r11;"                                                     \
 629         "pop %r10;"                                                     \
 630         "pop %r9;"                                                      \
 631         "pop %r8;"                                                      \
 632         "pop %rdi;"                                                     \
 633         "pop %rsi;"                                                     \
 634         "pop %rdx;"                                                     \
 635         "pop %rcx;"
 636 #endif
 637
 638 /*
 639  * Generate a thunk around a function which saves all caller-save
 640  * registers except for the return value.  This allows C functions to
 641  * be called from assembler code where fewer than normal registers are
 642  * available.  It may also help code generation around calls from C
 643  * code if the common case doesn't use many registers.
 644  *
 645  * When a callee is wrapped in a thunk, the caller can assume that all
 646  * arg regs and all scratch registers are preserved across the
 647  * call. The return value in rax/eax will not be saved, even for void
 648  * functions.
 649  */
 650 #define PV_THUNK_NAME(func) "__raw_callee_save_" #func
 651 #define __PV_CALLEE_SAVE_REGS_THUNK(func, section)                      \
 652         extern typeof(func) __raw_callee_save_##func;                   \
 653                                                                         \
 654         asm(".pushsection " section ", \"ax\";"                         \
 655             ".globl " PV_THUNK_NAME(func) ";"                           \
 656             ".type " PV_THUNK_NAME(func) ", @function;"                 \
 657             ASM_FUNC_ALIGN                                              \
 658             PV_THUNK_NAME(func) ":"                                     \
 659             ASM_ENDBR                                                   \
 660             FRAME_BEGIN                                                 \
 661             PV_SAVE_ALL_CALLER_REGS                                     \
 662             "call " #func ";"                                           \
 663             PV_RESTORE_ALL_CALLER_REGS                                  \
 664             FRAME_END                                                   \
 665             ASM_RET                                                     \
 666             ".size " PV_THUNK_NAME(func) ", .-" PV_THUNK_NAME(func) ";" \
 667             ".popsection")
 668
 669 #define PV_CALLEE_SAVE_REGS_THUNK(func)                 \
 670         __PV_CALLEE_SAVE_REGS_THUNK(func, ".text")
 671
 672 /* Get a reference to a callee-save function */
 673 #define PV_CALLEE_SAVE(func)                                            \
 674         ((struct paravirt_callee_save) { __raw_callee_save_##func })
 675
 676 /* Promise that "func" already uses the right calling convention */
 677 #define __PV_IS_CALLEE_SAVE(func)                       \
 678         ((struct paravirt_callee_save) { func })
 679
 680 #ifdef CONFIG_PARAVIRT_XXL
 681 static __always_inline unsigned long arch_local_save_flags(void)
 682 {
 683         return PVOP_ALT_CALLEE0(unsigned long, irq.save_fl, "pushf; pop %%rax;",
 684                                 ALT_NOT_XEN);
 685 }
 686
 687 static __always_inline void arch_local_irq_disable(void)
 688 {
 689         PVOP_ALT_VCALLEE0(irq.irq_disable, "cli;", ALT_NOT_XEN);
 690 }
 691
 692 static __always_inline void arch_local_irq_enable(void)
 693 {
 694         PVOP_ALT_VCALLEE0(irq.irq_enable, "sti;", ALT_NOT_XEN);
 695 }
 696
 697 static __always_inline unsigned long arch_local_irq_save(void)
 698 {
 699         unsigned long f;
 700
 701         f = arch_local_save_flags();
 702         arch_local_irq_disable();
 703         return f;
 704 }
 705 #endif
 706
 707
 708 /* Make sure as little as possible of this mess escapes. */
 709 #undef PARAVIRT_CALL
 710 #undef __PVOP_CALL
 711 #undef __PVOP_VCALL
 712 #undef PVOP_VCALL0
 713 #undef PVOP_CALL0
 714 #undef PVOP_VCALL1
 715 #undef PVOP_CALL1
 716 #undef PVOP_VCALL2
 717 #undef PVOP_CALL2
 718 #undef PVOP_VCALL3
 719 #undef PVOP_CALL3
 720 #undef PVOP_VCALL4
 721 #undef PVOP_CALL4
 722
 723 extern void default_banner(void);
 724 void native_pv_lock_init(void) __init;
 725
 726 #else  /* __ASSEMBLY__ */
 727
 728 #ifdef CONFIG_X86_64
 729 #ifdef CONFIG_PARAVIRT_XXL
 730 #ifdef CONFIG_DEBUG_ENTRY
 731
 732 #define PARA_INDIRECT(addr)     *addr(%rip)
 733
 734 .macro PARA_IRQ_save_fl
 735         ANNOTATE_RETPOLINE_SAFE;
 736         call PARA_INDIRECT(pv_ops+PV_IRQ_save_fl);
 737 .endm
 738
 739 #define SAVE_FLAGS ALTERNATIVE_2 "PARA_IRQ_save_fl;",                   \
 740                                  "ALT_CALL_INSTR;", ALT_CALL_ALWAYS,    \
 741                                  "pushf; pop %rax;", ALT_NOT_XEN
 742 #endif
 743 #endif /* CONFIG_PARAVIRT_XXL */
 744 #endif  /* CONFIG_X86_64 */
 745
 746 #endif /* __ASSEMBLY__ */
 747 #else  /* CONFIG_PARAVIRT */
 748 # define default_banner x86_init_noop
 749
 750 #ifndef __ASSEMBLY__
 751 static inline void native_pv_lock_init(void)
 752 {
 753 }
 754 #endif
 755 #endif /* !CONFIG_PARAVIRT */
 756
 757 #ifndef __ASSEMBLY__
 758 #ifndef CONFIG_PARAVIRT_XXL
 759 static inline void paravirt_enter_mmap(struct mm_struct *mm)
 760 {
 761 }
 762 #endif
 763
 764 #ifndef CONFIG_PARAVIRT
 765 static inline void paravirt_arch_exit_mmap(struct mm_struct *mm)
 766 {
 767 }
 768 #endif
 769
 770 #ifndef CONFIG_PARAVIRT_SPINLOCKS
 771 static inline void paravirt_set_cap(void)
 772 {
 773 }
 774 #endif
 775 #endif /* __ASSEMBLY__ */
 776 #endif /* _ASM_X86_PARAVIRT_H */