1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_X86_MSHYPER_H
3 #define _ASM_X86_MSHYPER_H
5 #include <linux/types.h>
9 #include <asm/hyperv-tlfs.h>
10 #include <asm/nospec-branch.h>
11 #include <asm/paravirt.h>
12 #include <asm/mshyperv.h>
16 DECLARE_STATIC_KEY_FALSE(isolation_type_snp);
18 typedef int (*hyperv_fill_flush_list_func)(
19 struct hv_guest_mapping_flush_list *flush,
22 #define hv_get_raw_timer() rdtsc_ordered()
24 void hyperv_vector_handler(struct pt_regs *regs);
26 #if IS_ENABLED(CONFIG_HYPERV)
27 extern int hyperv_init_cpuhp;
29 extern void *hv_hypercall_pg;
31 extern u64 hv_current_partition_id;
33 extern union hv_ghcb * __percpu *hv_ghcb_pg;
35 int hv_call_deposit_pages(int node, u64 partition_id, u32 num_pages);
36 int hv_call_add_logical_proc(int node, u32 lp_index, u32 acpi_id);
37 int hv_call_create_vp(int node, u64 partition_id, u32 vp_index, u32 flags);
39 static inline u64 hv_do_hypercall(u64 control, void *input, void *output)
41 u64 input_address = input ? virt_to_phys(input) : 0;
42 u64 output_address = output ? virt_to_phys(output) : 0;
49 __asm__ __volatile__("mov %4, %%r8\n"
51 : "=a" (hv_status), ASM_CALL_CONSTRAINT,
52 "+c" (control), "+d" (input_address)
53 : "r" (output_address),
54 THUNK_TARGET(hv_hypercall_pg)
55 : "cc", "memory", "r8", "r9", "r10", "r11");
57 u32 input_address_hi = upper_32_bits(input_address);
58 u32 input_address_lo = lower_32_bits(input_address);
59 u32 output_address_hi = upper_32_bits(output_address);
60 u32 output_address_lo = lower_32_bits(output_address);
65 __asm__ __volatile__(CALL_NOSPEC
67 "+c" (input_address_lo), ASM_CALL_CONSTRAINT
69 "b" (input_address_hi),
70 "D"(output_address_hi), "S"(output_address_lo),
71 THUNK_TARGET(hv_hypercall_pg)
77 /* Fast hypercall with 8 bytes of input and no output */
78 static inline u64 hv_do_fast_hypercall8(u16 code, u64 input1)
80 u64 hv_status, control = (u64)code | HV_HYPERCALL_FAST_BIT;
84 __asm__ __volatile__(CALL_NOSPEC
85 : "=a" (hv_status), ASM_CALL_CONSTRAINT,
86 "+c" (control), "+d" (input1)
87 : THUNK_TARGET(hv_hypercall_pg)
88 : "cc", "r8", "r9", "r10", "r11");
92 u32 input1_hi = upper_32_bits(input1);
93 u32 input1_lo = lower_32_bits(input1);
95 __asm__ __volatile__ (CALL_NOSPEC
101 THUNK_TARGET(hv_hypercall_pg)
102 : "cc", "edi", "esi");
108 /* Fast hypercall with 16 bytes of input */
109 static inline u64 hv_do_fast_hypercall16(u16 code, u64 input1, u64 input2)
111 u64 hv_status, control = (u64)code | HV_HYPERCALL_FAST_BIT;
115 __asm__ __volatile__("mov %4, %%r8\n"
117 : "=a" (hv_status), ASM_CALL_CONSTRAINT,
118 "+c" (control), "+d" (input1)
120 THUNK_TARGET(hv_hypercall_pg)
121 : "cc", "r8", "r9", "r10", "r11");
125 u32 input1_hi = upper_32_bits(input1);
126 u32 input1_lo = lower_32_bits(input1);
127 u32 input2_hi = upper_32_bits(input2);
128 u32 input2_lo = lower_32_bits(input2);
130 __asm__ __volatile__ (CALL_NOSPEC
132 "+c"(input1_lo), ASM_CALL_CONSTRAINT
133 : "A" (control), "b" (input1_hi),
134 "D"(input2_hi), "S"(input2_lo),
135 THUNK_TARGET(hv_hypercall_pg)
142 extern struct hv_vp_assist_page **hv_vp_assist_page;
144 static inline struct hv_vp_assist_page *hv_get_vp_assist_page(unsigned int cpu)
146 if (!hv_vp_assist_page)
149 return hv_vp_assist_page[cpu];
152 void __init hyperv_init(void);
153 void hyperv_setup_mmu_ops(void);
154 void set_hv_tscchange_cb(void (*cb)(void));
155 void clear_hv_tscchange_cb(void);
156 void hyperv_stop_tsc_emulation(void);
157 int hyperv_flush_guest_mapping(u64 as);
158 int hyperv_flush_guest_mapping_range(u64 as,
159 hyperv_fill_flush_list_func fill_func, void *data);
160 int hyperv_fill_flush_guest_mapping_list(
161 struct hv_guest_mapping_flush_list *flush,
162 u64 start_gfn, u64 end_gfn);
165 void hv_apic_init(void);
166 void __init hv_init_spinlocks(void);
167 bool hv_vcpu_is_preempted(int vcpu);
169 static inline void hv_apic_init(void) {}
172 struct irq_domain *hv_create_pci_msi_domain(void);
174 int hv_map_ioapic_interrupt(int ioapic_id, bool level, int vcpu, int vector,
175 struct hv_interrupt_entry *entry);
176 int hv_unmap_ioapic_interrupt(int ioapic_id, struct hv_interrupt_entry *entry);
177 int hv_set_mem_host_visibility(unsigned long addr, int numpages, bool visible);
179 #ifdef CONFIG_AMD_MEM_ENCRYPT
180 void hv_ghcb_msr_write(u64 msr, u64 value);
181 void hv_ghcb_msr_read(u64 msr, u64 *value);
183 static inline void hv_ghcb_msr_write(u64 msr, u64 value) {}
184 static inline void hv_ghcb_msr_read(u64 msr, u64 *value) {}
187 extern bool hv_isolation_type_snp(void);
189 static inline bool hv_is_synic_reg(unsigned int reg)
191 if ((reg >= HV_REGISTER_SCONTROL) &&
192 (reg <= HV_REGISTER_SINT15))
197 static inline u64 hv_get_register(unsigned int reg)
201 if (hv_is_synic_reg(reg) && hv_isolation_type_snp())
202 hv_ghcb_msr_read(reg, &value);
208 static inline void hv_set_register(unsigned int reg, u64 value)
210 if (hv_is_synic_reg(reg) && hv_isolation_type_snp()) {
211 hv_ghcb_msr_write(reg, value);
213 /* Write proxy bit via wrmsl instruction */
214 if (reg >= HV_REGISTER_SINT0 &&
215 reg <= HV_REGISTER_SINT15)
216 wrmsrl(reg, value | 1 << 20);
222 #else /* CONFIG_HYPERV */
223 static inline void hyperv_init(void) {}
224 static inline void hyperv_setup_mmu_ops(void) {}
225 static inline void set_hv_tscchange_cb(void (*cb)(void)) {}
226 static inline void clear_hv_tscchange_cb(void) {}
227 static inline void hyperv_stop_tsc_emulation(void) {};
228 static inline struct hv_vp_assist_page *hv_get_vp_assist_page(unsigned int cpu)
232 static inline int hyperv_flush_guest_mapping(u64 as) { return -1; }
233 static inline int hyperv_flush_guest_mapping_range(u64 as,
234 hyperv_fill_flush_list_func fill_func, void *data)
238 static inline void hv_set_register(unsigned int reg, u64 value) { }
239 static inline u64 hv_get_register(unsigned int reg) { return 0; }
240 static inline int hv_set_mem_host_visibility(unsigned long addr, int numpages,
245 #endif /* CONFIG_HYPERV */
248 #include <asm-generic/mshyperv.h>