1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Kernel-based Virtual Machine driver for Linux
5 * This header defines architecture specific interfaces, x86 version
8 #ifndef _ASM_X86_KVM_HOST_H
9 #define _ASM_X86_KVM_HOST_H
11 #include <linux/types.h>
13 #include <linux/mmu_notifier.h>
14 #include <linux/tracepoint.h>
15 #include <linux/cpumask.h>
16 #include <linux/irq_work.h>
17 #include <linux/irq.h>
19 #include <linux/kvm.h>
20 #include <linux/kvm_para.h>
21 #include <linux/kvm_types.h>
22 #include <linux/perf_event.h>
23 #include <linux/pvclock_gtod.h>
24 #include <linux/clocksource.h>
25 #include <linux/irqbypass.h>
26 #include <linux/hyperv.h>
29 #include <asm/pvclock-abi.h>
32 #include <asm/msr-index.h>
34 #include <asm/kvm_page_track.h>
35 #include <asm/kvm_vcpu_regs.h>
36 #include <asm/hyperv-tlfs.h>
38 #define __KVM_HAVE_ARCH_VCPU_DEBUGFS
40 #define KVM_MAX_VCPUS 1024
43 * In x86, the VCPU ID corresponds to the APIC ID, and APIC IDs
44 * might be larger than the actual number of VCPUs because the
45 * APIC ID encodes CPU topology information.
47 * In the worst case, we'll need less than one extra bit for the
48 * Core ID, and less than one extra bit for the Package (Die) ID,
49 * so ratio of 4 should be enough.
51 #define KVM_VCPU_ID_RATIO 4
52 #define KVM_MAX_VCPU_IDS (KVM_MAX_VCPUS * KVM_VCPU_ID_RATIO)
54 /* memory slots that are not exposed to userspace */
55 #define KVM_PRIVATE_MEM_SLOTS 3
57 #define KVM_HALT_POLL_NS_DEFAULT 200000
59 #define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS
61 #define KVM_DIRTY_LOG_MANUAL_CAPS (KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE | \
62 KVM_DIRTY_LOG_INITIALLY_SET)
64 #define KVM_BUS_LOCK_DETECTION_VALID_MODE (KVM_BUS_LOCK_DETECTION_OFF | \
65 KVM_BUS_LOCK_DETECTION_EXIT)
67 /* x86-specific vcpu->requests bit members */
68 #define KVM_REQ_MIGRATE_TIMER KVM_ARCH_REQ(0)
69 #define KVM_REQ_REPORT_TPR_ACCESS KVM_ARCH_REQ(1)
70 #define KVM_REQ_TRIPLE_FAULT KVM_ARCH_REQ(2)
71 #define KVM_REQ_MMU_SYNC KVM_ARCH_REQ(3)
72 #define KVM_REQ_CLOCK_UPDATE KVM_ARCH_REQ(4)
73 #define KVM_REQ_LOAD_MMU_PGD KVM_ARCH_REQ(5)
74 #define KVM_REQ_EVENT KVM_ARCH_REQ(6)
75 #define KVM_REQ_APF_HALT KVM_ARCH_REQ(7)
76 #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(8)
77 #define KVM_REQ_NMI KVM_ARCH_REQ(9)
78 #define KVM_REQ_PMU KVM_ARCH_REQ(10)
79 #define KVM_REQ_PMI KVM_ARCH_REQ(11)
80 #define KVM_REQ_SMI KVM_ARCH_REQ(12)
81 #define KVM_REQ_MASTERCLOCK_UPDATE KVM_ARCH_REQ(13)
82 #define KVM_REQ_MCLOCK_INPROGRESS \
83 KVM_ARCH_REQ_FLAGS(14, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
84 #define KVM_REQ_SCAN_IOAPIC \
85 KVM_ARCH_REQ_FLAGS(15, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
86 #define KVM_REQ_GLOBAL_CLOCK_UPDATE KVM_ARCH_REQ(16)
87 #define KVM_REQ_APIC_PAGE_RELOAD \
88 KVM_ARCH_REQ_FLAGS(17, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
89 #define KVM_REQ_HV_CRASH KVM_ARCH_REQ(18)
90 #define KVM_REQ_IOAPIC_EOI_EXIT KVM_ARCH_REQ(19)
91 #define KVM_REQ_HV_RESET KVM_ARCH_REQ(20)
92 #define KVM_REQ_HV_EXIT KVM_ARCH_REQ(21)
93 #define KVM_REQ_HV_STIMER KVM_ARCH_REQ(22)
94 #define KVM_REQ_LOAD_EOI_EXITMAP KVM_ARCH_REQ(23)
95 #define KVM_REQ_GET_NESTED_STATE_PAGES KVM_ARCH_REQ(24)
96 #define KVM_REQ_APICV_UPDATE \
97 KVM_ARCH_REQ_FLAGS(25, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
98 #define KVM_REQ_TLB_FLUSH_CURRENT KVM_ARCH_REQ(26)
99 #define KVM_REQ_TLB_FLUSH_GUEST \
100 KVM_ARCH_REQ_FLAGS(27, KVM_REQUEST_NO_WAKEUP)
101 #define KVM_REQ_APF_READY KVM_ARCH_REQ(28)
102 #define KVM_REQ_MSR_FILTER_CHANGED KVM_ARCH_REQ(29)
103 #define KVM_REQ_UPDATE_CPU_DIRTY_LOGGING \
104 KVM_ARCH_REQ_FLAGS(30, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
106 #define CR0_RESERVED_BITS \
107 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
108 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
109 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
111 #define CR4_RESERVED_BITS \
112 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
113 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
114 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \
115 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \
116 | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \
117 | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP))
119 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
123 #define INVALID_PAGE (~(hpa_t)0)
124 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
126 #define UNMAPPED_GVA (~(gpa_t)0)
127 #define INVALID_GPA (~(gpa_t)0)
129 /* KVM Hugepage definitions for x86 */
130 #define KVM_MAX_HUGEPAGE_LEVEL PG_LEVEL_1G
131 #define KVM_NR_PAGE_SIZES (KVM_MAX_HUGEPAGE_LEVEL - PG_LEVEL_4K + 1)
132 #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9)
133 #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x))
134 #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x))
135 #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1))
136 #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE)
138 #define KVM_PERMILLE_MMU_PAGES 20
139 #define KVM_MIN_ALLOC_MMU_PAGES 64UL
140 #define KVM_MMU_HASH_SHIFT 12
141 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
142 #define KVM_MIN_FREE_MMU_PAGES 5
143 #define KVM_REFILL_PAGES 25
144 #define KVM_MAX_CPUID_ENTRIES 256
145 #define KVM_NR_FIXED_MTRR_REGION 88
146 #define KVM_NR_VAR_MTRR 8
148 #define ASYNC_PF_PER_VCPU 64
151 VCPU_REGS_RAX = __VCPU_REGS_RAX,
152 VCPU_REGS_RCX = __VCPU_REGS_RCX,
153 VCPU_REGS_RDX = __VCPU_REGS_RDX,
154 VCPU_REGS_RBX = __VCPU_REGS_RBX,
155 VCPU_REGS_RSP = __VCPU_REGS_RSP,
156 VCPU_REGS_RBP = __VCPU_REGS_RBP,
157 VCPU_REGS_RSI = __VCPU_REGS_RSI,
158 VCPU_REGS_RDI = __VCPU_REGS_RDI,
160 VCPU_REGS_R8 = __VCPU_REGS_R8,
161 VCPU_REGS_R9 = __VCPU_REGS_R9,
162 VCPU_REGS_R10 = __VCPU_REGS_R10,
163 VCPU_REGS_R11 = __VCPU_REGS_R11,
164 VCPU_REGS_R12 = __VCPU_REGS_R12,
165 VCPU_REGS_R13 = __VCPU_REGS_R13,
166 VCPU_REGS_R14 = __VCPU_REGS_R14,
167 VCPU_REGS_R15 = __VCPU_REGS_R15,
172 VCPU_EXREG_PDPTR = NR_VCPU_REGS,
178 VCPU_EXREG_EXIT_INFO_1,
179 VCPU_EXREG_EXIT_INFO_2,
193 enum exit_fastpath_completion {
195 EXIT_FASTPATH_REENTER_GUEST,
196 EXIT_FASTPATH_EXIT_HANDLED,
198 typedef enum exit_fastpath_completion fastpath_t;
200 struct x86_emulate_ctxt;
201 struct x86_exception;
203 enum x86_intercept_stage;
205 #define KVM_NR_DB_REGS 4
207 #define DR6_BUS_LOCK (1 << 11)
208 #define DR6_BD (1 << 13)
209 #define DR6_BS (1 << 14)
210 #define DR6_BT (1 << 15)
211 #define DR6_RTM (1 << 16)
213 * DR6_ACTIVE_LOW combines fixed-1 and active-low bits.
214 * We can regard all the bits in DR6_FIXED_1 as active_low bits;
215 * they will never be 0 for now, but when they are defined
216 * in the future it will require no code change.
218 * DR6_ACTIVE_LOW is also used as the init/reset value for DR6.
220 #define DR6_ACTIVE_LOW 0xffff0ff0
221 #define DR6_VOLATILE 0x0001e80f
222 #define DR6_FIXED_1 (DR6_ACTIVE_LOW & ~DR6_VOLATILE)
224 #define DR7_BP_EN_MASK 0x000000ff
225 #define DR7_GE (1 << 9)
226 #define DR7_GD (1 << 13)
227 #define DR7_FIXED_1 0x00000400
228 #define DR7_VOLATILE 0xffff2bff
230 #define KVM_GUESTDBG_VALID_MASK \
231 (KVM_GUESTDBG_ENABLE | \
232 KVM_GUESTDBG_SINGLESTEP | \
233 KVM_GUESTDBG_USE_HW_BP | \
234 KVM_GUESTDBG_USE_SW_BP | \
235 KVM_GUESTDBG_INJECT_BP | \
236 KVM_GUESTDBG_INJECT_DB | \
237 KVM_GUESTDBG_BLOCKIRQ)
240 #define PFERR_PRESENT_BIT 0
241 #define PFERR_WRITE_BIT 1
242 #define PFERR_USER_BIT 2
243 #define PFERR_RSVD_BIT 3
244 #define PFERR_FETCH_BIT 4
245 #define PFERR_PK_BIT 5
246 #define PFERR_SGX_BIT 15
247 #define PFERR_GUEST_FINAL_BIT 32
248 #define PFERR_GUEST_PAGE_BIT 33
250 #define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT)
251 #define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT)
252 #define PFERR_USER_MASK (1U << PFERR_USER_BIT)
253 #define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT)
254 #define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT)
255 #define PFERR_PK_MASK (1U << PFERR_PK_BIT)
256 #define PFERR_SGX_MASK (1U << PFERR_SGX_BIT)
257 #define PFERR_GUEST_FINAL_MASK (1ULL << PFERR_GUEST_FINAL_BIT)
258 #define PFERR_GUEST_PAGE_MASK (1ULL << PFERR_GUEST_PAGE_BIT)
260 #define PFERR_NESTED_GUEST_PAGE (PFERR_GUEST_PAGE_MASK | \
264 /* apic attention bits */
265 #define KVM_APIC_CHECK_VAPIC 0
267 * The following bit is set with PV-EOI, unset on EOI.
268 * We detect PV-EOI changes by guest by comparing
269 * this bit with PV-EOI in guest memory.
270 * See the implementation in apic_update_pv_eoi.
272 #define KVM_APIC_PV_EOI_PENDING 1
274 struct kvm_kernel_irq_routing_entry;
277 * kvm_mmu_page_role tracks the properties of a shadow page (where shadow page
278 * also includes TDP pages) to determine whether or not a page can be used in
279 * the given MMU context. This is a subset of the overall kvm_mmu_role to
280 * minimize the size of kvm_memory_slot.arch.gfn_track, i.e. allows allocating
281 * 2 bytes per gfn instead of 4 bytes per gfn.
283 * Indirect upper-level shadow pages are tracked for write-protection via
284 * gfn_track. As above, gfn_track is a 16 bit counter, so KVM must not create
285 * more than 2^16-1 upper-level shadow pages at a single gfn, otherwise
286 * gfn_track will overflow and explosions will ensure.
288 * A unique shadow page (SP) for a gfn is created if and only if an existing SP
289 * cannot be reused. The ability to reuse a SP is tracked by its role, which
290 * incorporates various mode bits and properties of the SP. Roughly speaking,
291 * the number of unique SPs that can theoretically be created is 2^n, where n
292 * is the number of bits that are used to compute the role.
294 * But, even though there are 18 bits in the mask below, not all combinations
295 * of modes and flags are possible. The maximum number of possible upper-level
296 * shadow pages for a single gfn is in the neighborhood of 2^13.
298 * - invalid shadow pages are not accounted.
299 * - level is effectively limited to four combinations, not 16 as the number
300 * bits would imply, as 4k SPs are not tracked (allowed to go unsync).
301 * - level is effectively unused for non-PAE paging because there is exactly
302 * one upper level (see 4k SP exception above).
303 * - quadrant is used only for non-PAE paging and is exclusive with
305 * - execonly and ad_disabled are used only for nested EPT, which makes it
306 * exclusive with quadrant.
308 union kvm_mmu_page_role {
312 unsigned gpte_is_8_bytes:1;
319 unsigned smep_andnot_wp:1;
320 unsigned smap_andnot_wp:1;
321 unsigned ad_disabled:1;
322 unsigned guest_mode:1;
326 * This is left at the top of the word so that
327 * kvm_memslots_for_spte_role can extract it with a
328 * simple shift. While there is room, give it a whole
329 * byte so it is also faster to load it from memory.
336 * kvm_mmu_extended_role complements kvm_mmu_page_role, tracking properties
337 * relevant to the current MMU configuration. When loading CR0, CR4, or EFER,
338 * including on nested transitions, if nothing in the full role changes then
339 * MMU re-configuration can be skipped. @valid bit is set on first usage so we
340 * don't treat all-zero structure as valid data.
342 * The properties that are tracked in the extended role but not the page role
343 * are for things that either (a) do not affect the validity of the shadow page
344 * or (b) are indirectly reflected in the shadow page's role. For example,
345 * CR4.PKE only affects permission checks for software walks of the guest page
346 * tables (because KVM doesn't support Protection Keys with shadow paging), and
347 * CR0.PG, CR4.PAE, and CR4.PSE are indirectly reflected in role.level.
349 * Note, SMEP and SMAP are not redundant with sm*p_andnot_wp in the page role.
350 * If CR0.WP=1, KVM can reuse shadow pages for the guest regardless of SMEP and
351 * SMAP, but the MMU's permission checks for software walks need to be SMEP and
352 * SMAP aware regardless of CR0.WP.
354 union kvm_mmu_extended_role {
357 unsigned int valid:1;
358 unsigned int execonly:1;
359 unsigned int cr0_pg:1;
360 unsigned int cr4_pae:1;
361 unsigned int cr4_pse:1;
362 unsigned int cr4_pke:1;
363 unsigned int cr4_smap:1;
364 unsigned int cr4_smep:1;
365 unsigned int cr4_la57:1;
372 union kvm_mmu_page_role base;
373 union kvm_mmu_extended_role ext;
377 struct kvm_rmap_head {
381 struct kvm_pio_request {
382 unsigned long linear_rip;
389 #define PT64_ROOT_MAX_LEVEL 5
391 struct rsvd_bits_validate {
392 u64 rsvd_bits_mask[2][PT64_ROOT_MAX_LEVEL];
396 struct kvm_mmu_root_info {
401 #define KVM_MMU_ROOT_INFO_INVALID \
402 ((struct kvm_mmu_root_info) { .pgd = INVALID_PAGE, .hpa = INVALID_PAGE })
404 #define KVM_MMU_NUM_PREV_ROOTS 3
406 #define KVM_HAVE_MMU_RWLOCK
409 struct kvm_page_fault;
412 * x86 supports 4 paging modes (5-level 64-bit, 4-level 64-bit, 3-level 32-bit,
413 * and 2-level 32-bit). The kvm_mmu structure abstracts the details of the
417 unsigned long (*get_guest_pgd)(struct kvm_vcpu *vcpu);
418 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index);
419 int (*page_fault)(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault);
420 void (*inject_page_fault)(struct kvm_vcpu *vcpu,
421 struct x86_exception *fault);
422 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gpa_t gva_or_gpa,
423 u32 access, struct x86_exception *exception);
424 gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
425 struct x86_exception *exception);
426 int (*sync_page)(struct kvm_vcpu *vcpu,
427 struct kvm_mmu_page *sp);
428 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva, hpa_t root_hpa);
431 union kvm_mmu_role mmu_role;
433 u8 shadow_root_level;
436 struct kvm_mmu_root_info prev_roots[KVM_MMU_NUM_PREV_ROOTS];
439 * Bitmap; bit set = permission fault
440 * Byte index: page fault error code [4:1]
441 * Bit index: pte permissions in ACC_* format
446 * The pkru_mask indicates if protection key checks are needed. It
447 * consists of 16 domains indexed by page fault error code bits [4:1],
448 * with PFEC.RSVD replaced by ACC_USER_MASK from the page tables.
449 * Each domain has 2 bits which are ANDed with AD and WD from PKRU.
458 * check zero bits on shadow page table entries, these
459 * bits include not only hardware reserved bits but also
460 * the bits spte never used.
462 struct rsvd_bits_validate shadow_zero_check;
464 struct rsvd_bits_validate guest_rsvd_check;
466 u64 pdptrs[4]; /* pae */
469 struct kvm_tlb_range {
484 struct perf_event *perf_event;
485 struct kvm_vcpu *vcpu;
487 * eventsel value for general purpose counters,
488 * ctrl value for fixed counters.
495 unsigned nr_arch_gp_counters;
496 unsigned nr_arch_fixed_counters;
497 unsigned available_event_types;
501 u64 counter_bitmask[2];
502 u64 global_ctrl_mask;
503 u64 global_ovf_ctrl_mask;
506 struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC];
507 struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED];
508 struct irq_work irq_work;
509 DECLARE_BITMAP(reprogram_pmi, X86_PMC_IDX_MAX);
510 DECLARE_BITMAP(all_valid_pmc_idx, X86_PMC_IDX_MAX);
511 DECLARE_BITMAP(pmc_in_use, X86_PMC_IDX_MAX);
514 * The gate to release perf_events not marked in
515 * pmc_in_use only once in a vcpu time slice.
520 * The total number of programmed perf_events and it helps to avoid
521 * redundant check before cleanup if guest don't use vPMU at all.
529 KVM_DEBUGREG_BP_ENABLED = 1,
530 KVM_DEBUGREG_WONT_EXIT = 2,
533 struct kvm_mtrr_range {
536 struct list_head node;
540 struct kvm_mtrr_range var_ranges[KVM_NR_VAR_MTRR];
541 mtrr_type fixed_ranges[KVM_NR_FIXED_MTRR_REGION];
544 struct list_head head;
547 /* Hyper-V SynIC timer */
548 struct kvm_vcpu_hv_stimer {
549 struct hrtimer timer;
551 union hv_stimer_config config;
554 struct hv_message msg;
558 /* Hyper-V synthetic interrupt controller (SynIC)*/
559 struct kvm_vcpu_hv_synic {
564 atomic64_t sint[HV_SYNIC_SINT_COUNT];
565 atomic_t sint_to_gsi[HV_SYNIC_SINT_COUNT];
566 DECLARE_BITMAP(auto_eoi_bitmap, 256);
567 DECLARE_BITMAP(vec_bitmap, 256);
569 bool dont_zero_synic_pages;
572 /* Hyper-V per vcpu emulation context */
574 struct kvm_vcpu *vcpu;
578 struct kvm_vcpu_hv_synic synic;
579 struct kvm_hyperv_exit exit;
580 struct kvm_vcpu_hv_stimer stimer[HV_SYNIC_STIMER_COUNT];
581 DECLARE_BITMAP(stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT);
584 u32 features_eax; /* HYPERV_CPUID_FEATURES.EAX */
585 u32 features_ebx; /* HYPERV_CPUID_FEATURES.EBX */
586 u32 features_edx; /* HYPERV_CPUID_FEATURES.EDX */
587 u32 enlightenments_eax; /* HYPERV_CPUID_ENLIGHTMENT_INFO.EAX */
588 u32 enlightenments_ebx; /* HYPERV_CPUID_ENLIGHTMENT_INFO.EBX */
589 u32 syndbg_cap_eax; /* HYPERV_CPUID_SYNDBG_PLATFORM_CAPABILITIES.EAX */
593 /* Xen HVM per vcpu emulation context */
594 struct kvm_vcpu_xen {
596 u32 current_runstate;
598 bool vcpu_time_info_set;
600 struct gfn_to_hva_cache vcpu_info_cache;
601 struct gfn_to_hva_cache vcpu_time_info_cache;
602 struct gfn_to_hva_cache runstate_cache;
604 u64 runstate_entry_time;
605 u64 runstate_times[4];
608 struct kvm_vcpu_arch {
610 * rip and regs accesses must go through
611 * kvm_{register,rip}_{read,write} functions.
613 unsigned long regs[NR_VCPU_REGS];
618 unsigned long cr0_guest_owned_bits;
622 unsigned long cr4_guest_owned_bits;
623 unsigned long cr4_guest_rsvd_bits;
630 struct kvm_lapic *apic; /* kernel irqchip context */
632 bool load_eoi_exitmap_pending;
633 DECLARE_BITMAP(ioapic_handled_vectors, 256);
634 unsigned long apic_attention;
635 int32_t apic_arb_prio;
637 u64 ia32_misc_enable_msr;
640 bool tpr_access_reporting;
643 u64 microcode_version;
644 u64 arch_capabilities;
645 u64 perf_capabilities;
648 * Paging state of the vcpu
650 * If the vcpu runs in guest mode with two level paging this still saves
651 * the paging mode of the l1 guest. This context is always used to
656 /* Non-nested MMU for L1 */
657 struct kvm_mmu root_mmu;
659 /* L1 MMU when running nested */
660 struct kvm_mmu guest_mmu;
663 * Paging state of an L2 guest (used for nested npt)
665 * This context will save all necessary information to walk page tables
666 * of an L2 guest. This context is only initialized for page table
667 * walking and not for faulting since we never handle l2 page faults on
670 struct kvm_mmu nested_mmu;
673 * Pointer to the mmu context currently used for
674 * gva_to_gpa translations.
676 struct kvm_mmu *walk_mmu;
678 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache;
679 struct kvm_mmu_memory_cache mmu_shadow_page_cache;
680 struct kvm_mmu_memory_cache mmu_gfn_array_cache;
681 struct kvm_mmu_memory_cache mmu_page_header_cache;
684 * QEMU userspace and the guest each have their own FPU state.
685 * In vcpu_run, we switch between the user and guest FPU contexts.
686 * While running a VCPU, the VCPU thread will have the guest FPU
689 * Note that while the PKRU state lives inside the fpu registers,
690 * it is switched out separately at VMENTER and VMEXIT time. The
691 * "guest_fpstate" state here contains the guest FPU context, with the
694 struct fpu_guest guest_fpu;
697 u64 guest_supported_xcr0;
699 struct kvm_pio_request pio;
702 unsigned sev_pio_count;
704 u8 event_exit_inst_len;
706 struct kvm_queued_exception {
712 unsigned long payload;
717 struct kvm_queued_interrupt {
723 int halt_request; /* real mode on Intel only */
726 struct kvm_cpuid_entry2 *cpuid_entries;
729 u64 reserved_gpa_bits;
732 /* emulate context */
734 struct x86_emulate_ctxt *emulate_ctxt;
735 bool emulate_regs_need_sync_to_vcpu;
736 bool emulate_regs_need_sync_from_vcpu;
737 int (*complete_userspace_io)(struct kvm_vcpu *vcpu);
740 struct pvclock_vcpu_time_info hv_clock;
741 unsigned int hw_tsc_khz;
742 struct gfn_to_hva_cache pv_time;
743 bool pv_time_enabled;
744 /* set guest stopped flag in pvclock flags field */
745 bool pvclock_set_guest_stopped_request;
751 struct gfn_to_hva_cache cache;
755 u64 tsc_offset; /* current tsc offset */
758 u64 tsc_offset_adjustment;
761 u64 this_tsc_generation;
763 bool tsc_always_catchup;
764 s8 virtual_tsc_shift;
765 u32 virtual_tsc_mult;
767 s64 ia32_tsc_adjust_msr;
768 u64 msr_ia32_power_ctl;
769 u64 l1_tsc_scaling_ratio;
770 u64 tsc_scaling_ratio; /* current scaling ratio */
772 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */
773 unsigned nmi_pending; /* NMI queued after currently running handler */
774 bool nmi_injected; /* Trying to inject an NMI this entry */
775 bool smi_pending; /* SMI queued after currently running handler */
777 struct kvm_mtrr mtrr_state;
780 unsigned switch_db_regs;
781 unsigned long db[KVM_NR_DB_REGS];
784 unsigned long eff_db[KVM_NR_DB_REGS];
785 unsigned long guest_debug_dr7;
786 u64 msr_platform_info;
787 u64 msr_misc_features_enables;
795 /* Cache MMIO info */
797 unsigned mmio_access;
803 /* used for guest single stepping over the given code position */
804 unsigned long singlestep_rip;
807 struct kvm_vcpu_hv *hyperv;
808 struct kvm_vcpu_xen xen;
810 cpumask_var_t wbinvd_dirty_mask;
812 unsigned long last_retry_eip;
813 unsigned long last_retry_addr;
817 gfn_t gfns[ASYNC_PF_PER_VCPU];
818 struct gfn_to_hva_cache data;
819 u64 msr_en_val; /* MSR_KVM_ASYNC_PF_EN */
820 u64 msr_int_val; /* MSR_KVM_ASYNC_PF_INT */
825 unsigned long nested_apf_token;
826 bool delivery_as_pf_vmexit;
827 bool pageready_pending;
830 /* OSVW MSRs (AMD only) */
838 struct gfn_to_hva_cache data;
841 u64 msr_kvm_poll_control;
844 * Indicates the guest is trying to write a gfn that contains one or
845 * more of the PTEs used to translate the write itself, i.e. the access
846 * is changing its own translation in the guest page tables. KVM exits
847 * to userspace if emulation of the faulting instruction fails and this
848 * flag is set, as KVM cannot make forward progress.
850 * If emulation fails for a write to guest page tables, KVM unprotects
851 * (zaps) the shadow page for the target gfn and resumes the guest to
852 * retry the non-emulatable instruction (on hardware). Unprotecting the
853 * gfn doesn't allow forward progress for a self-changing access because
854 * doing so also zaps the translation for the gfn, i.e. retrying the
855 * instruction will hit a !PRESENT fault, which results in a new shadow
856 * page and sends KVM back to square one.
858 bool write_fault_to_shadow_pgtable;
860 /* set at EPT violation at this point */
861 unsigned long exit_qualification;
863 /* pv related host specific info */
868 int pending_ioapic_eoi;
869 int pending_external_vector;
871 /* be preempted when it's in kernel-mode(cpl=0) */
872 bool preempted_in_kernel;
874 /* Flush the L1 Data cache for L1TF mitigation on VMENTER */
877 /* Host CPU on which VM-entry was most recently attempted */
878 int last_vmentry_cpu;
880 /* AMD MSRC001_0015 Hardware Configuration */
883 /* pv related cpuid info */
886 * value of the eax register in the KVM_CPUID_FEATURES CPUID
892 * indicates whether pv emulation should be disabled if features
893 * are not present in the guest's cpuid
898 /* Protected Guests */
899 bool guest_state_protected;
902 * Set when PDPTS were loaded directly by the userspace without
903 * reading the guest memory
905 bool pdptrs_from_userspace;
907 #if IS_ENABLED(CONFIG_HYPERV)
912 struct kvm_lpage_info {
916 struct kvm_arch_memory_slot {
917 struct kvm_rmap_head *rmap[KVM_NR_PAGE_SIZES];
918 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1];
919 unsigned short *gfn_track[KVM_PAGE_TRACK_MAX];
923 * We use as the mode the number of bits allocated in the LDR for the
924 * logical processor ID. It happens that these are all powers of two.
925 * This makes it is very easy to detect cases where the APICs are
926 * configured for multiple modes; in that case, we cannot use the map and
927 * hence cannot use kvm_irq_delivery_to_apic_fast either.
929 #define KVM_APIC_MODE_XAPIC_CLUSTER 4
930 #define KVM_APIC_MODE_XAPIC_FLAT 8
931 #define KVM_APIC_MODE_X2APIC 16
933 struct kvm_apic_map {
938 struct kvm_lapic *xapic_flat_map[8];
939 struct kvm_lapic *xapic_cluster_map[16][4];
941 struct kvm_lapic *phys_map[];
944 /* Hyper-V synthetic debugger (SynDbg)*/
945 struct kvm_hv_syndbg {
956 /* Current state of Hyper-V TSC page clocksource */
957 enum hv_tsc_page_status {
958 /* TSC page was not set up or disabled */
959 HV_TSC_PAGE_UNSET = 0,
960 /* TSC page MSR was written by the guest, update pending */
961 HV_TSC_PAGE_GUEST_CHANGED,
962 /* TSC page MSR was written by KVM userspace, update pending */
963 HV_TSC_PAGE_HOST_CHANGED,
964 /* TSC page was properly set up and is currently active */
966 /* TSC page is currently being updated and therefore is inactive */
967 HV_TSC_PAGE_UPDATING,
968 /* TSC page was set up with an inaccessible GPA */
972 /* Hyper-V emulation context */
974 struct mutex hv_lock;
978 enum hv_tsc_page_status hv_tsc_page_status;
980 /* Hyper-v based guest crash (NT kernel bugcheck) parameters */
981 u64 hv_crash_param[HV_X64_MSR_CRASH_PARAMS];
984 struct ms_hyperv_tsc_page tsc_ref;
986 struct idr conn_to_evt;
988 u64 hv_reenlightenment_control;
989 u64 hv_tsc_emulation_control;
990 u64 hv_tsc_emulation_status;
992 /* How many vCPUs have VP index != vCPU index */
993 atomic_t num_mismatched_vp_indexes;
996 * How many SynICs use 'AutoEOI' feature
997 * (protected by arch.apicv_update_lock)
999 unsigned int synic_auto_eoi_used;
1001 struct hv_partition_assist_pg *hv_pa_pg;
1002 struct kvm_hv_syndbg hv_syndbg;
1005 struct msr_bitmap_range {
1009 unsigned long *bitmap;
1012 /* Xen emulation context */
1019 enum kvm_irqchip_mode {
1021 KVM_IRQCHIP_KERNEL, /* created with KVM_CREATE_IRQCHIP */
1022 KVM_IRQCHIP_SPLIT, /* created with KVM_CAP_SPLIT_IRQCHIP */
1025 struct kvm_x86_msr_filter {
1027 bool default_allow:1;
1028 struct msr_bitmap_range ranges[16];
1031 #define APICV_INHIBIT_REASON_DISABLE 0
1032 #define APICV_INHIBIT_REASON_HYPERV 1
1033 #define APICV_INHIBIT_REASON_NESTED 2
1034 #define APICV_INHIBIT_REASON_IRQWIN 3
1035 #define APICV_INHIBIT_REASON_PIT_REINJ 4
1036 #define APICV_INHIBIT_REASON_X2APIC 5
1037 #define APICV_INHIBIT_REASON_BLOCKIRQ 6
1040 unsigned long n_used_mmu_pages;
1041 unsigned long n_requested_mmu_pages;
1042 unsigned long n_max_mmu_pages;
1043 unsigned int indirect_shadow_pages;
1045 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
1046 struct list_head active_mmu_pages;
1047 struct list_head zapped_obsolete_pages;
1048 struct list_head lpage_disallowed_mmu_pages;
1049 struct kvm_page_track_notifier_node mmu_sp_tracker;
1050 struct kvm_page_track_notifier_head track_notifier_head;
1052 * Protects marking pages unsync during page faults, as TDP MMU page
1053 * faults only take mmu_lock for read. For simplicity, the unsync
1054 * pages lock is always taken when marking pages unsync regardless of
1055 * whether mmu_lock is held for read or write.
1057 spinlock_t mmu_unsync_pages_lock;
1059 struct list_head assigned_dev_head;
1060 struct iommu_domain *iommu_domain;
1061 bool iommu_noncoherent;
1062 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA
1063 atomic_t noncoherent_dma_count;
1064 #define __KVM_HAVE_ARCH_ASSIGNED_DEVICE
1065 atomic_t assigned_device_count;
1066 struct kvm_pic *vpic;
1067 struct kvm_ioapic *vioapic;
1068 struct kvm_pit *vpit;
1069 atomic_t vapics_in_nmi_mode;
1070 struct mutex apic_map_lock;
1071 struct kvm_apic_map __rcu *apic_map;
1072 atomic_t apic_map_dirty;
1074 /* Protects apic_access_memslot_enabled and apicv_inhibit_reasons */
1075 struct rw_semaphore apicv_update_lock;
1077 bool apic_access_memslot_enabled;
1078 unsigned long apicv_inhibit_reasons;
1082 bool mwait_in_guest;
1084 bool pause_in_guest;
1085 bool cstate_in_guest;
1087 unsigned long irq_sources_bitmap;
1088 s64 kvmclock_offset;
1091 * This also protects nr_vcpus_matched_tsc which is read from a
1092 * preemption-disabled region, so it must be a raw spinlock.
1094 raw_spinlock_t tsc_write_lock;
1098 u64 last_tsc_offset;
1102 u64 cur_tsc_generation;
1103 int nr_vcpus_matched_tsc;
1105 seqcount_raw_spinlock_t pvclock_sc;
1106 bool use_master_clock;
1107 u64 master_kernel_ns;
1108 u64 master_cycle_now;
1109 struct delayed_work kvmclock_update_work;
1110 struct delayed_work kvmclock_sync_work;
1112 struct kvm_xen_hvm_config xen_hvm_config;
1114 /* reads protected by irq_srcu, writes by irq_lock */
1115 struct hlist_head mask_notifier_list;
1117 struct kvm_hv hyperv;
1120 #ifdef CONFIG_KVM_MMU_AUDIT
1124 bool backwards_tsc_observed;
1125 bool boot_vcpu_runs_old_kvmclock;
1128 u64 disabled_quirks;
1129 int cpu_dirty_logging_count;
1131 enum kvm_irqchip_mode irqchip_mode;
1132 u8 nr_reserved_ioapic_pins;
1134 bool disabled_lapic_found;
1137 bool x2apic_broadcast_quirk_disabled;
1139 bool guest_can_read_msr_platform_info;
1140 bool exception_payload_enabled;
1142 bool bus_lock_detection_enabled;
1144 * If exit_on_emulation_error is set, and the in-kernel instruction
1145 * emulator fails to emulate an instruction, allow userspace
1146 * the opportunity to look at it.
1148 bool exit_on_emulation_error;
1150 /* Deflect RDMSR and WRMSR to user space when they trigger a #GP */
1151 u32 user_space_msr_mask;
1152 struct kvm_x86_msr_filter __rcu *msr_filter;
1154 u32 hypercall_exit_enabled;
1156 /* Guest can access the SGX PROVISIONKEY. */
1157 bool sgx_provisioning_allowed;
1159 struct kvm_pmu_event_filter __rcu *pmu_event_filter;
1160 struct task_struct *nx_lpage_recovery_thread;
1162 #ifdef CONFIG_X86_64
1164 * Whether the TDP MMU is enabled for this VM. This contains a
1165 * snapshot of the TDP MMU module parameter from when the VM was
1166 * created and remains unchanged for the life of the VM. If this is
1167 * true, TDP MMU handler functions will run for various MMU
1170 bool tdp_mmu_enabled;
1173 * List of struct kvm_mmu_pages being used as roots.
1174 * All struct kvm_mmu_pages in the list should have
1177 * For reads, this list is protected by:
1178 * the MMU lock in read mode + RCU or
1179 * the MMU lock in write mode
1181 * For writes, this list is protected by:
1182 * the MMU lock in read mode + the tdp_mmu_pages_lock or
1183 * the MMU lock in write mode
1185 * Roots will remain in the list until their tdp_mmu_root_count
1186 * drops to zero, at which point the thread that decremented the
1187 * count to zero should removed the root from the list and clean
1188 * it up, freeing the root after an RCU grace period.
1190 struct list_head tdp_mmu_roots;
1193 * List of struct kvmp_mmu_pages not being used as roots.
1194 * All struct kvm_mmu_pages in the list should have
1195 * tdp_mmu_page set and a tdp_mmu_root_count of 0.
1197 struct list_head tdp_mmu_pages;
1200 * Protects accesses to the following fields when the MMU lock
1201 * is held in read mode:
1202 * - tdp_mmu_roots (above)
1203 * - tdp_mmu_pages (above)
1204 * - the link field of struct kvm_mmu_pages used by the TDP MMU
1205 * - lpage_disallowed_mmu_pages
1206 * - the lpage_disallowed_link field of struct kvm_mmu_pages used
1208 * It is acceptable, but not necessary, to acquire this lock when
1209 * the thread holds the MMU lock in write mode.
1211 spinlock_t tdp_mmu_pages_lock;
1212 #endif /* CONFIG_X86_64 */
1215 * If set, at least one shadow root has been allocated. This flag
1216 * is used as one input when determining whether certain memslot
1217 * related allocations are necessary.
1219 bool shadow_root_allocated;
1221 #if IS_ENABLED(CONFIG_HYPERV)
1223 spinlock_t hv_root_tdp_lock;
1227 struct kvm_vm_stat {
1228 struct kvm_vm_stat_generic generic;
1229 u64 mmu_shadow_zapped;
1238 atomic64_t pages_4k;
1239 atomic64_t pages_2m;
1240 atomic64_t pages_1g;
1242 atomic64_t pages[KVM_NR_PAGE_SIZES];
1244 u64 nx_lpage_splits;
1245 u64 max_mmu_page_hash_collisions;
1246 u64 max_mmu_rmap_size;
1249 struct kvm_vcpu_stat {
1250 struct kvm_vcpu_stat_generic generic;
1260 u64 irq_window_exits;
1261 u64 nmi_window_exits;
1264 u64 request_irq_exits;
1266 u64 host_state_reload;
1269 u64 insn_emulation_fail;
1275 u64 directed_yield_attempted;
1276 u64 directed_yield_successful;
1280 struct x86_instruction_info;
1283 bool host_initiated;
1288 struct kvm_lapic_irq {
1296 bool msi_redir_hint;
1299 static inline u16 kvm_lapic_irq_dest_mode(bool dest_mode_logical)
1301 return dest_mode_logical ? APIC_DEST_LOGICAL : APIC_DEST_PHYSICAL;
1304 struct kvm_x86_ops {
1307 int (*hardware_enable)(void);
1308 void (*hardware_disable)(void);
1309 void (*hardware_unsetup)(void);
1310 bool (*cpu_has_accelerated_tpr)(void);
1311 bool (*has_emulated_msr)(struct kvm *kvm, u32 index);
1312 void (*vcpu_after_set_cpuid)(struct kvm_vcpu *vcpu);
1314 unsigned int vm_size;
1315 int (*vm_init)(struct kvm *kvm);
1316 void (*vm_destroy)(struct kvm *kvm);
1318 /* Create, but do not attach this VCPU */
1319 int (*vcpu_create)(struct kvm_vcpu *vcpu);
1320 void (*vcpu_free)(struct kvm_vcpu *vcpu);
1321 void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event);
1323 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu);
1324 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
1325 void (*vcpu_put)(struct kvm_vcpu *vcpu);
1327 void (*update_exception_bitmap)(struct kvm_vcpu *vcpu);
1328 int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
1329 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
1330 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
1331 void (*get_segment)(struct kvm_vcpu *vcpu,
1332 struct kvm_segment *var, int seg);
1333 int (*get_cpl)(struct kvm_vcpu *vcpu);
1334 void (*set_segment)(struct kvm_vcpu *vcpu,
1335 struct kvm_segment *var, int seg);
1336 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
1337 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
1338 bool (*is_valid_cr4)(struct kvm_vcpu *vcpu, unsigned long cr0);
1339 void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
1340 int (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
1341 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1342 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1343 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1344 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1345 void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu);
1346 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value);
1347 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
1348 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
1349 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
1351 void (*tlb_flush_all)(struct kvm_vcpu *vcpu);
1352 void (*tlb_flush_current)(struct kvm_vcpu *vcpu);
1353 int (*tlb_remote_flush)(struct kvm *kvm);
1354 int (*tlb_remote_flush_with_range)(struct kvm *kvm,
1355 struct kvm_tlb_range *range);
1358 * Flush any TLB entries associated with the given GVA.
1359 * Does not need to flush GPA->HPA mappings.
1360 * Can potentially get non-canonical addresses through INVLPGs, which
1361 * the implementation may choose to ignore if appropriate.
1363 void (*tlb_flush_gva)(struct kvm_vcpu *vcpu, gva_t addr);
1366 * Flush any TLB entries created by the guest. Like tlb_flush_gva(),
1367 * does not need to flush GPA->HPA mappings.
1369 void (*tlb_flush_guest)(struct kvm_vcpu *vcpu);
1371 enum exit_fastpath_completion (*run)(struct kvm_vcpu *vcpu);
1372 int (*handle_exit)(struct kvm_vcpu *vcpu,
1373 enum exit_fastpath_completion exit_fastpath);
1374 int (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
1375 void (*update_emulated_instruction)(struct kvm_vcpu *vcpu);
1376 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
1377 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu);
1378 void (*patch_hypercall)(struct kvm_vcpu *vcpu,
1379 unsigned char *hypercall_addr);
1380 void (*set_irq)(struct kvm_vcpu *vcpu);
1381 void (*set_nmi)(struct kvm_vcpu *vcpu);
1382 void (*queue_exception)(struct kvm_vcpu *vcpu);
1383 void (*cancel_injection)(struct kvm_vcpu *vcpu);
1384 int (*interrupt_allowed)(struct kvm_vcpu *vcpu, bool for_injection);
1385 int (*nmi_allowed)(struct kvm_vcpu *vcpu, bool for_injection);
1386 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu);
1387 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked);
1388 void (*enable_nmi_window)(struct kvm_vcpu *vcpu);
1389 void (*enable_irq_window)(struct kvm_vcpu *vcpu);
1390 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);
1391 bool (*check_apicv_inhibit_reasons)(ulong bit);
1392 void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu);
1393 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr);
1394 void (*hwapic_isr_update)(struct kvm_vcpu *vcpu, int isr);
1395 bool (*guest_apic_has_interrupt)(struct kvm_vcpu *vcpu);
1396 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap);
1397 void (*set_virtual_apic_mode)(struct kvm_vcpu *vcpu);
1398 void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu);
1399 int (*deliver_posted_interrupt)(struct kvm_vcpu *vcpu, int vector);
1400 int (*sync_pir_to_irr)(struct kvm_vcpu *vcpu);
1401 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
1402 int (*set_identity_map_addr)(struct kvm *kvm, u64 ident_addr);
1403 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio);
1405 void (*load_mmu_pgd)(struct kvm_vcpu *vcpu, hpa_t root_hpa,
1408 bool (*has_wbinvd_exit)(void);
1410 u64 (*get_l2_tsc_offset)(struct kvm_vcpu *vcpu);
1411 u64 (*get_l2_tsc_multiplier)(struct kvm_vcpu *vcpu);
1412 void (*write_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset);
1413 void (*write_tsc_multiplier)(struct kvm_vcpu *vcpu, u64 multiplier);
1416 * Retrieve somewhat arbitrary exit information. Intended to
1417 * be used only from within tracepoints or error paths.
1419 void (*get_exit_info)(struct kvm_vcpu *vcpu, u32 *reason,
1420 u64 *info1, u64 *info2,
1421 u32 *exit_int_info, u32 *exit_int_info_err_code);
1423 int (*check_intercept)(struct kvm_vcpu *vcpu,
1424 struct x86_instruction_info *info,
1425 enum x86_intercept_stage stage,
1426 struct x86_exception *exception);
1427 void (*handle_exit_irqoff)(struct kvm_vcpu *vcpu);
1429 void (*request_immediate_exit)(struct kvm_vcpu *vcpu);
1431 void (*sched_in)(struct kvm_vcpu *kvm, int cpu);
1434 * Size of the CPU's dirty log buffer, i.e. VMX's PML buffer. A zero
1435 * value indicates CPU dirty logging is unsupported or disabled.
1437 int cpu_dirty_log_size;
1438 void (*update_cpu_dirty_logging)(struct kvm_vcpu *vcpu);
1440 /* pmu operations of sub-arch */
1441 const struct kvm_pmu_ops *pmu_ops;
1442 const struct kvm_x86_nested_ops *nested_ops;
1445 * Architecture specific hooks for vCPU blocking due to
1447 * Returns for .pre_block():
1448 * - 0 means continue to block the vCPU.
1449 * - 1 means we cannot block the vCPU since some event
1450 * happens during this period, such as, 'ON' bit in
1451 * posted-interrupts descriptor is set.
1453 int (*pre_block)(struct kvm_vcpu *vcpu);
1454 void (*post_block)(struct kvm_vcpu *vcpu);
1456 void (*vcpu_blocking)(struct kvm_vcpu *vcpu);
1457 void (*vcpu_unblocking)(struct kvm_vcpu *vcpu);
1459 int (*update_pi_irte)(struct kvm *kvm, unsigned int host_irq,
1460 uint32_t guest_irq, bool set);
1461 void (*start_assignment)(struct kvm *kvm);
1462 void (*apicv_post_state_restore)(struct kvm_vcpu *vcpu);
1463 bool (*dy_apicv_has_pending_interrupt)(struct kvm_vcpu *vcpu);
1465 int (*set_hv_timer)(struct kvm_vcpu *vcpu, u64 guest_deadline_tsc,
1467 void (*cancel_hv_timer)(struct kvm_vcpu *vcpu);
1469 void (*setup_mce)(struct kvm_vcpu *vcpu);
1471 int (*smi_allowed)(struct kvm_vcpu *vcpu, bool for_injection);
1472 int (*enter_smm)(struct kvm_vcpu *vcpu, char *smstate);
1473 int (*leave_smm)(struct kvm_vcpu *vcpu, const char *smstate);
1474 void (*enable_smi_window)(struct kvm_vcpu *vcpu);
1476 int (*mem_enc_op)(struct kvm *kvm, void __user *argp);
1477 int (*mem_enc_reg_region)(struct kvm *kvm, struct kvm_enc_region *argp);
1478 int (*mem_enc_unreg_region)(struct kvm *kvm, struct kvm_enc_region *argp);
1479 int (*vm_copy_enc_context_from)(struct kvm *kvm, unsigned int source_fd);
1480 int (*vm_move_enc_context_from)(struct kvm *kvm, unsigned int source_fd);
1482 int (*get_msr_feature)(struct kvm_msr_entry *entry);
1484 bool (*can_emulate_instruction)(struct kvm_vcpu *vcpu, void *insn, int insn_len);
1486 bool (*apic_init_signal_blocked)(struct kvm_vcpu *vcpu);
1487 int (*enable_direct_tlbflush)(struct kvm_vcpu *vcpu);
1489 void (*migrate_timers)(struct kvm_vcpu *vcpu);
1490 void (*msr_filter_changed)(struct kvm_vcpu *vcpu);
1491 int (*complete_emulated_msr)(struct kvm_vcpu *vcpu, int err);
1493 void (*vcpu_deliver_sipi_vector)(struct kvm_vcpu *vcpu, u8 vector);
1496 struct kvm_x86_nested_ops {
1497 int (*check_events)(struct kvm_vcpu *vcpu);
1498 bool (*hv_timer_pending)(struct kvm_vcpu *vcpu);
1499 void (*triple_fault)(struct kvm_vcpu *vcpu);
1500 int (*get_state)(struct kvm_vcpu *vcpu,
1501 struct kvm_nested_state __user *user_kvm_nested_state,
1502 unsigned user_data_size);
1503 int (*set_state)(struct kvm_vcpu *vcpu,
1504 struct kvm_nested_state __user *user_kvm_nested_state,
1505 struct kvm_nested_state *kvm_state);
1506 bool (*get_nested_state_pages)(struct kvm_vcpu *vcpu);
1507 int (*write_log_dirty)(struct kvm_vcpu *vcpu, gpa_t l2_gpa);
1509 int (*enable_evmcs)(struct kvm_vcpu *vcpu,
1510 uint16_t *vmcs_version);
1511 uint16_t (*get_evmcs_version)(struct kvm_vcpu *vcpu);
1514 struct kvm_x86_init_ops {
1515 int (*cpu_has_kvm_support)(void);
1516 int (*disabled_by_bios)(void);
1517 int (*check_processor_compatibility)(void);
1518 int (*hardware_setup)(void);
1520 struct kvm_x86_ops *runtime_ops;
1523 struct kvm_arch_async_pf {
1530 extern u32 __read_mostly kvm_nr_uret_msrs;
1531 extern u64 __read_mostly host_efer;
1532 extern bool __read_mostly allow_smaller_maxphyaddr;
1533 extern bool __read_mostly enable_apicv;
1534 extern struct kvm_x86_ops kvm_x86_ops;
1536 #define KVM_X86_OP(func) \
1537 DECLARE_STATIC_CALL(kvm_x86_##func, *(((struct kvm_x86_ops *)0)->func));
1538 #define KVM_X86_OP_NULL KVM_X86_OP
1539 #include <asm/kvm-x86-ops.h>
1541 static inline void kvm_ops_static_call_update(void)
1543 #define KVM_X86_OP(func) \
1544 static_call_update(kvm_x86_##func, kvm_x86_ops.func);
1545 #define KVM_X86_OP_NULL KVM_X86_OP
1546 #include <asm/kvm-x86-ops.h>
1549 #define __KVM_HAVE_ARCH_VM_ALLOC
1550 static inline struct kvm *kvm_arch_alloc_vm(void)
1552 return __vmalloc(kvm_x86_ops.vm_size, GFP_KERNEL_ACCOUNT | __GFP_ZERO);
1555 #define __KVM_HAVE_ARCH_VM_FREE
1556 void kvm_arch_free_vm(struct kvm *kvm);
1558 #define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLB
1559 static inline int kvm_arch_flush_remote_tlb(struct kvm *kvm)
1561 if (kvm_x86_ops.tlb_remote_flush &&
1562 !static_call(kvm_x86_tlb_remote_flush)(kvm))
1568 int kvm_mmu_module_init(void);
1569 void kvm_mmu_module_exit(void);
1571 void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
1572 int kvm_mmu_create(struct kvm_vcpu *vcpu);
1573 void kvm_mmu_init_vm(struct kvm *kvm);
1574 void kvm_mmu_uninit_vm(struct kvm *kvm);
1576 void kvm_mmu_after_set_cpuid(struct kvm_vcpu *vcpu);
1577 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
1578 void kvm_mmu_slot_remove_write_access(struct kvm *kvm,
1579 const struct kvm_memory_slot *memslot,
1581 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm,
1582 const struct kvm_memory_slot *memslot);
1583 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm,
1584 const struct kvm_memory_slot *memslot);
1585 void kvm_mmu_zap_all(struct kvm *kvm);
1586 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, u64 gen);
1587 unsigned long kvm_mmu_calculate_default_mmu_pages(struct kvm *kvm);
1588 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned long kvm_nr_mmu_pages);
1590 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3);
1592 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
1593 const void *val, int bytes);
1595 struct kvm_irq_mask_notifier {
1596 void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked);
1598 struct hlist_node link;
1601 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
1602 struct kvm_irq_mask_notifier *kimn);
1603 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
1604 struct kvm_irq_mask_notifier *kimn);
1605 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin,
1608 extern bool tdp_enabled;
1610 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu);
1612 /* control of guest tsc rate supported? */
1613 extern bool kvm_has_tsc_control;
1614 /* maximum supported tsc_khz for guests */
1615 extern u32 kvm_max_guest_tsc_khz;
1616 /* number of bits of the fractional part of the TSC scaling ratio */
1617 extern u8 kvm_tsc_scaling_ratio_frac_bits;
1618 /* maximum allowed value of TSC scaling ratio */
1619 extern u64 kvm_max_tsc_scaling_ratio;
1620 /* 1ull << kvm_tsc_scaling_ratio_frac_bits */
1621 extern u64 kvm_default_tsc_scaling_ratio;
1622 /* bus lock detection supported? */
1623 extern bool kvm_has_bus_lock_exit;
1625 extern u64 kvm_mce_cap_supported;
1628 * EMULTYPE_NO_DECODE - Set when re-emulating an instruction (after completing
1629 * userspace I/O) to indicate that the emulation context
1630 * should be reused as is, i.e. skip initialization of
1631 * emulation context, instruction fetch and decode.
1633 * EMULTYPE_TRAP_UD - Set when emulating an intercepted #UD from hardware.
1634 * Indicates that only select instructions (tagged with
1635 * EmulateOnUD) should be emulated (to minimize the emulator
1636 * attack surface). See also EMULTYPE_TRAP_UD_FORCED.
1638 * EMULTYPE_SKIP - Set when emulating solely to skip an instruction, i.e. to
1639 * decode the instruction length. For use *only* by
1640 * kvm_x86_ops.skip_emulated_instruction() implementations.
1642 * EMULTYPE_ALLOW_RETRY_PF - Set when the emulator should resume the guest to
1643 * retry native execution under certain conditions,
1644 * Can only be set in conjunction with EMULTYPE_PF.
1646 * EMULTYPE_TRAP_UD_FORCED - Set when emulating an intercepted #UD that was
1647 * triggered by KVM's magic "force emulation" prefix,
1648 * which is opt in via module param (off by default).
1649 * Bypasses EmulateOnUD restriction despite emulating
1650 * due to an intercepted #UD (see EMULTYPE_TRAP_UD).
1651 * Used to test the full emulator from userspace.
1653 * EMULTYPE_VMWARE_GP - Set when emulating an intercepted #GP for VMware
1654 * backdoor emulation, which is opt in via module param.
1655 * VMware backdoor emulation handles select instructions
1656 * and reinjects the #GP for all other cases.
1658 * EMULTYPE_PF - Set when emulating MMIO by way of an intercepted #PF, in which
1659 * case the CR2/GPA value pass on the stack is valid.
1661 #define EMULTYPE_NO_DECODE (1 << 0)
1662 #define EMULTYPE_TRAP_UD (1 << 1)
1663 #define EMULTYPE_SKIP (1 << 2)
1664 #define EMULTYPE_ALLOW_RETRY_PF (1 << 3)
1665 #define EMULTYPE_TRAP_UD_FORCED (1 << 4)
1666 #define EMULTYPE_VMWARE_GP (1 << 5)
1667 #define EMULTYPE_PF (1 << 6)
1669 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type);
1670 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
1671 void *insn, int insn_len);
1672 void __kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu,
1673 u64 *data, u8 ndata);
1674 void kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu);
1676 void kvm_enable_efer_bits(u64);
1677 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer);
1678 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data, bool host_initiated);
1679 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data);
1680 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data);
1681 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu);
1682 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu);
1683 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu);
1684 int kvm_emulate_invd(struct kvm_vcpu *vcpu);
1685 int kvm_emulate_mwait(struct kvm_vcpu *vcpu);
1686 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu);
1687 int kvm_emulate_monitor(struct kvm_vcpu *vcpu);
1689 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in);
1690 int kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
1691 int kvm_emulate_halt(struct kvm_vcpu *vcpu);
1692 int kvm_vcpu_halt(struct kvm_vcpu *vcpu);
1693 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu);
1694 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu);
1696 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
1697 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg);
1698 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector);
1700 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
1701 int reason, bool has_error_code, u32 error_code);
1703 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0);
1704 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4);
1705 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
1706 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
1707 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
1708 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
1709 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val);
1710 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val);
1711 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
1712 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
1713 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l);
1714 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu);
1716 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
1717 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
1719 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu);
1720 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
1721 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu);
1723 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
1724 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
1725 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr, unsigned long payload);
1726 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr);
1727 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
1728 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault);
1729 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
1730 struct x86_exception *fault);
1731 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl);
1732 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr);
1734 static inline int __kvm_irq_line_state(unsigned long *irq_state,
1735 int irq_source_id, int level)
1737 /* Logical OR for level trig interrupt */
1739 __set_bit(irq_source_id, irq_state);
1741 __clear_bit(irq_source_id, irq_state);
1743 return !!(*irq_state);
1746 #define KVM_MMU_ROOT_CURRENT BIT(0)
1747 #define KVM_MMU_ROOT_PREVIOUS(i) BIT(1+i)
1748 #define KVM_MMU_ROOTS_ALL (~0UL)
1750 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level);
1751 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id);
1753 void kvm_inject_nmi(struct kvm_vcpu *vcpu);
1755 void kvm_update_dr7(struct kvm_vcpu *vcpu);
1757 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn);
1758 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
1759 void kvm_mmu_free_roots(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
1760 ulong roots_to_free);
1761 void kvm_mmu_free_guest_mode_roots(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu);
1762 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
1763 struct x86_exception *exception);
1764 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
1765 struct x86_exception *exception);
1766 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
1767 struct x86_exception *exception);
1768 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
1769 struct x86_exception *exception);
1770 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
1771 struct x86_exception *exception);
1773 bool kvm_apicv_activated(struct kvm *kvm);
1774 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu);
1775 void kvm_request_apicv_update(struct kvm *kvm, bool activate,
1778 void __kvm_request_apicv_update(struct kvm *kvm, bool activate,
1781 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
1783 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u64 error_code,
1784 void *insn, int insn_len);
1785 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva);
1786 void kvm_mmu_invalidate_gva(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
1787 gva_t gva, hpa_t root_hpa);
1788 void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid);
1789 void kvm_mmu_new_pgd(struct kvm_vcpu *vcpu, gpa_t new_pgd);
1791 void kvm_configure_mmu(bool enable_tdp, int tdp_forced_root_level,
1792 int tdp_max_root_level, int tdp_huge_page_level);
1794 static inline u16 kvm_read_ldt(void)
1797 asm("sldt %0" : "=g"(ldt));
1801 static inline void kvm_load_ldt(u16 sel)
1803 asm("lldt %0" : : "rm"(sel));
1806 #ifdef CONFIG_X86_64
1807 static inline unsigned long read_msr(unsigned long msr)
1816 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
1818 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
1821 #define TSS_IOPB_BASE_OFFSET 0x66
1822 #define TSS_BASE_SIZE 0x68
1823 #define TSS_IOPB_SIZE (65536 / 8)
1824 #define TSS_REDIRECTION_SIZE (256 / 8)
1825 #define RMODE_TSS_SIZE \
1826 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
1829 TASK_SWITCH_CALL = 0,
1830 TASK_SWITCH_IRET = 1,
1831 TASK_SWITCH_JMP = 2,
1832 TASK_SWITCH_GATE = 3,
1835 #define HF_GIF_MASK (1 << 0)
1836 #define HF_NMI_MASK (1 << 3)
1837 #define HF_IRET_MASK (1 << 4)
1838 #define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */
1839 #define HF_SMM_MASK (1 << 6)
1840 #define HF_SMM_INSIDE_NMI_MASK (1 << 7)
1842 #define __KVM_VCPU_MULTIPLE_ADDRESS_SPACE
1843 #define KVM_ADDRESS_SPACE_NUM 2
1845 #define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)->arch.hflags & HF_SMM_MASK ? 1 : 0)
1846 #define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm)
1848 #define KVM_ARCH_WANT_MMU_NOTIFIER
1850 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v);
1851 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu);
1852 int kvm_cpu_has_extint(struct kvm_vcpu *v);
1853 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu);
1854 int kvm_cpu_get_interrupt(struct kvm_vcpu *v);
1855 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event);
1856 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu);
1858 int kvm_pv_send_ipi(struct kvm *kvm, unsigned long ipi_bitmap_low,
1859 unsigned long ipi_bitmap_high, u32 min,
1860 unsigned long icr, int op_64_bit);
1862 int kvm_add_user_return_msr(u32 msr);
1863 int kvm_find_user_return_msr(u32 msr);
1864 int kvm_set_user_return_msr(unsigned index, u64 val, u64 mask);
1866 static inline bool kvm_is_supported_user_return_msr(u32 msr)
1868 return kvm_find_user_return_msr(msr) >= 0;
1871 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc, u64 ratio);
1872 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc);
1873 u64 kvm_calc_nested_tsc_offset(u64 l1_offset, u64 l2_offset, u64 l2_multiplier);
1874 u64 kvm_calc_nested_tsc_multiplier(u64 l1_multiplier, u64 l2_multiplier);
1876 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu);
1877 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip);
1879 void kvm_make_scan_ioapic_request(struct kvm *kvm);
1880 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
1881 unsigned long *vcpu_bitmap);
1883 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
1884 struct kvm_async_pf *work);
1885 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
1886 struct kvm_async_pf *work);
1887 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu,
1888 struct kvm_async_pf *work);
1889 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu);
1890 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu);
1891 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn);
1893 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu);
1894 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err);
1895 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu);
1897 int kvm_is_in_guest(void);
1899 void __user *__x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
1901 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu);
1902 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu);
1904 bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq,
1905 struct kvm_vcpu **dest_vcpu);
1907 void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e,
1908 struct kvm_lapic_irq *irq);
1910 static inline bool kvm_irq_is_postable(struct kvm_lapic_irq *irq)
1912 /* We can only post Fixed and LowPrio IRQs */
1913 return (irq->delivery_mode == APIC_DM_FIXED ||
1914 irq->delivery_mode == APIC_DM_LOWEST);
1917 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu)
1919 static_call_cond(kvm_x86_vcpu_blocking)(vcpu);
1922 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu)
1924 static_call_cond(kvm_x86_vcpu_unblocking)(vcpu);
1927 static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {}
1929 static inline int kvm_cpu_get_apicid(int mps_cpu)
1931 #ifdef CONFIG_X86_LOCAL_APIC
1932 return default_cpu_present_to_apicid(mps_cpu);
1939 #define put_smstate(type, buf, offset, val) \
1940 *(type *)((buf) + (offset) - 0x7e00) = val
1942 #define GET_SMSTATE(type, buf, offset) \
1943 (*(type *)((buf) + (offset) - 0x7e00))
1945 int kvm_cpu_dirty_log_size(void);
1947 int memslot_rmap_alloc(struct kvm_memory_slot *slot, unsigned long npages);
1949 #define KVM_CLOCK_VALID_FLAGS \
1950 (KVM_CLOCK_TSC_STABLE | KVM_CLOCK_REALTIME | KVM_CLOCK_HOST_TSC)
1952 #endif /* _ASM_X86_KVM_HOST_H */