1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Kernel-based Virtual Machine driver for Linux
5 * This header defines architecture specific interfaces, x86 version
8 #ifndef _ASM_X86_KVM_HOST_H
9 #define _ASM_X86_KVM_HOST_H
11 #include <linux/types.h>
13 #include <linux/mmu_notifier.h>
14 #include <linux/tracepoint.h>
15 #include <linux/cpumask.h>
16 #include <linux/irq_work.h>
17 #include <linux/irq.h>
19 #include <linux/kvm.h>
20 #include <linux/kvm_para.h>
21 #include <linux/kvm_types.h>
22 #include <linux/perf_event.h>
23 #include <linux/pvclock_gtod.h>
24 #include <linux/clocksource.h>
25 #include <linux/irqbypass.h>
26 #include <linux/hyperv.h>
29 #include <asm/pvclock-abi.h>
32 #include <asm/msr-index.h>
34 #include <asm/kvm_page_track.h>
35 #include <asm/kvm_vcpu_regs.h>
36 #include <asm/hyperv-tlfs.h>
38 #define __KVM_HAVE_ARCH_VCPU_DEBUGFS
40 #define KVM_MAX_VCPUS 288
41 #define KVM_SOFT_MAX_VCPUS 240
42 #define KVM_MAX_VCPU_ID 1023
43 #define KVM_USER_MEM_SLOTS 509
44 /* memory slots that are not exposed to userspace */
45 #define KVM_PRIVATE_MEM_SLOTS 3
46 #define KVM_MEM_SLOTS_NUM (KVM_USER_MEM_SLOTS + KVM_PRIVATE_MEM_SLOTS)
48 #define KVM_HALT_POLL_NS_DEFAULT 200000
50 #define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS
52 #define KVM_DIRTY_LOG_MANUAL_CAPS (KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE | \
53 KVM_DIRTY_LOG_INITIALLY_SET)
55 /* x86-specific vcpu->requests bit members */
56 #define KVM_REQ_MIGRATE_TIMER KVM_ARCH_REQ(0)
57 #define KVM_REQ_REPORT_TPR_ACCESS KVM_ARCH_REQ(1)
58 #define KVM_REQ_TRIPLE_FAULT KVM_ARCH_REQ(2)
59 #define KVM_REQ_MMU_SYNC KVM_ARCH_REQ(3)
60 #define KVM_REQ_CLOCK_UPDATE KVM_ARCH_REQ(4)
61 #define KVM_REQ_LOAD_MMU_PGD KVM_ARCH_REQ(5)
62 #define KVM_REQ_EVENT KVM_ARCH_REQ(6)
63 #define KVM_REQ_APF_HALT KVM_ARCH_REQ(7)
64 #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(8)
65 #define KVM_REQ_NMI KVM_ARCH_REQ(9)
66 #define KVM_REQ_PMU KVM_ARCH_REQ(10)
67 #define KVM_REQ_PMI KVM_ARCH_REQ(11)
68 #define KVM_REQ_SMI KVM_ARCH_REQ(12)
69 #define KVM_REQ_MASTERCLOCK_UPDATE KVM_ARCH_REQ(13)
70 #define KVM_REQ_MCLOCK_INPROGRESS \
71 KVM_ARCH_REQ_FLAGS(14, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
72 #define KVM_REQ_SCAN_IOAPIC \
73 KVM_ARCH_REQ_FLAGS(15, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
74 #define KVM_REQ_GLOBAL_CLOCK_UPDATE KVM_ARCH_REQ(16)
75 #define KVM_REQ_APIC_PAGE_RELOAD \
76 KVM_ARCH_REQ_FLAGS(17, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
77 #define KVM_REQ_HV_CRASH KVM_ARCH_REQ(18)
78 #define KVM_REQ_IOAPIC_EOI_EXIT KVM_ARCH_REQ(19)
79 #define KVM_REQ_HV_RESET KVM_ARCH_REQ(20)
80 #define KVM_REQ_HV_EXIT KVM_ARCH_REQ(21)
81 #define KVM_REQ_HV_STIMER KVM_ARCH_REQ(22)
82 #define KVM_REQ_LOAD_EOI_EXITMAP KVM_ARCH_REQ(23)
83 #define KVM_REQ_GET_VMCS12_PAGES KVM_ARCH_REQ(24)
84 #define KVM_REQ_APICV_UPDATE \
85 KVM_ARCH_REQ_FLAGS(25, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
86 #define KVM_REQ_HV_TLB_FLUSH \
87 KVM_ARCH_REQ_FLAGS(26, KVM_REQUEST_NO_WAKEUP)
89 #define CR0_RESERVED_BITS \
90 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
91 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
92 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
94 #define CR4_RESERVED_BITS \
95 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
96 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
97 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \
98 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \
99 | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \
100 | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP))
102 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
106 #define INVALID_PAGE (~(hpa_t)0)
107 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
109 #define UNMAPPED_GVA (~(gpa_t)0)
111 /* KVM Hugepage definitions for x86 */
113 PT_PAGE_TABLE_LEVEL = 1,
114 PT_DIRECTORY_LEVEL = 2,
116 /* set max level to the biggest one */
117 PT_MAX_HUGEPAGE_LEVEL = PT_PDPE_LEVEL,
119 #define KVM_NR_PAGE_SIZES (PT_MAX_HUGEPAGE_LEVEL - \
120 PT_PAGE_TABLE_LEVEL + 1)
121 #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9)
122 #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x))
123 #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x))
124 #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1))
125 #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE)
127 static inline gfn_t gfn_to_index(gfn_t gfn, gfn_t base_gfn, int level)
129 /* KVM_HPAGE_GFN_SHIFT(PT_PAGE_TABLE_LEVEL) must be 0. */
130 return (gfn >> KVM_HPAGE_GFN_SHIFT(level)) -
131 (base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
134 #define KVM_PERMILLE_MMU_PAGES 20
135 #define KVM_MIN_ALLOC_MMU_PAGES 64UL
136 #define KVM_MMU_HASH_SHIFT 12
137 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
138 #define KVM_MIN_FREE_MMU_PAGES 5
139 #define KVM_REFILL_PAGES 25
140 #define KVM_MAX_CPUID_ENTRIES 80
141 #define KVM_NR_FIXED_MTRR_REGION 88
142 #define KVM_NR_VAR_MTRR 8
144 #define ASYNC_PF_PER_VCPU 64
147 VCPU_REGS_RAX = __VCPU_REGS_RAX,
148 VCPU_REGS_RCX = __VCPU_REGS_RCX,
149 VCPU_REGS_RDX = __VCPU_REGS_RDX,
150 VCPU_REGS_RBX = __VCPU_REGS_RBX,
151 VCPU_REGS_RSP = __VCPU_REGS_RSP,
152 VCPU_REGS_RBP = __VCPU_REGS_RBP,
153 VCPU_REGS_RSI = __VCPU_REGS_RSI,
154 VCPU_REGS_RDI = __VCPU_REGS_RDI,
156 VCPU_REGS_R8 = __VCPU_REGS_R8,
157 VCPU_REGS_R9 = __VCPU_REGS_R9,
158 VCPU_REGS_R10 = __VCPU_REGS_R10,
159 VCPU_REGS_R11 = __VCPU_REGS_R11,
160 VCPU_REGS_R12 = __VCPU_REGS_R12,
161 VCPU_REGS_R13 = __VCPU_REGS_R13,
162 VCPU_REGS_R14 = __VCPU_REGS_R14,
163 VCPU_REGS_R15 = __VCPU_REGS_R15,
168 VCPU_EXREG_PDPTR = NR_VCPU_REGS,
185 enum exit_fastpath_completion {
187 EXIT_FASTPATH_SKIP_EMUL_INS,
190 struct x86_emulate_ctxt;
191 struct x86_exception;
193 enum x86_intercept_stage;
195 #define KVM_NR_MEM_OBJS 40
197 #define KVM_NR_DB_REGS 4
199 #define DR6_BD (1 << 13)
200 #define DR6_BS (1 << 14)
201 #define DR6_BT (1 << 15)
202 #define DR6_RTM (1 << 16)
203 #define DR6_FIXED_1 0xfffe0ff0
204 #define DR6_INIT 0xffff0ff0
205 #define DR6_VOLATILE 0x0001e00f
207 #define DR7_BP_EN_MASK 0x000000ff
208 #define DR7_GE (1 << 9)
209 #define DR7_GD (1 << 13)
210 #define DR7_FIXED_1 0x00000400
211 #define DR7_VOLATILE 0xffff2bff
213 #define PFERR_PRESENT_BIT 0
214 #define PFERR_WRITE_BIT 1
215 #define PFERR_USER_BIT 2
216 #define PFERR_RSVD_BIT 3
217 #define PFERR_FETCH_BIT 4
218 #define PFERR_PK_BIT 5
219 #define PFERR_GUEST_FINAL_BIT 32
220 #define PFERR_GUEST_PAGE_BIT 33
222 #define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT)
223 #define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT)
224 #define PFERR_USER_MASK (1U << PFERR_USER_BIT)
225 #define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT)
226 #define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT)
227 #define PFERR_PK_MASK (1U << PFERR_PK_BIT)
228 #define PFERR_GUEST_FINAL_MASK (1ULL << PFERR_GUEST_FINAL_BIT)
229 #define PFERR_GUEST_PAGE_MASK (1ULL << PFERR_GUEST_PAGE_BIT)
231 #define PFERR_NESTED_GUEST_PAGE (PFERR_GUEST_PAGE_MASK | \
235 /* apic attention bits */
236 #define KVM_APIC_CHECK_VAPIC 0
238 * The following bit is set with PV-EOI, unset on EOI.
239 * We detect PV-EOI changes by guest by comparing
240 * this bit with PV-EOI in guest memory.
241 * See the implementation in apic_update_pv_eoi.
243 #define KVM_APIC_PV_EOI_PENDING 1
245 struct kvm_kernel_irq_routing_entry;
248 * We don't want allocation failures within the mmu code, so we preallocate
249 * enough memory for a single page fault in a cache.
251 struct kvm_mmu_memory_cache {
253 void *objects[KVM_NR_MEM_OBJS];
257 * the pages used as guest page table on soft mmu are tracked by
258 * kvm_memory_slot.arch.gfn_track which is 16 bits, so the role bits used
259 * by indirect shadow page can not be more than 15 bits.
261 * Currently, we used 14 bits that are @level, @gpte_is_8_bytes, @quadrant, @access,
262 * @nxe, @cr0_wp, @smep_andnot_wp and @smap_andnot_wp.
264 union kvm_mmu_page_role {
268 unsigned gpte_is_8_bytes:1;
275 unsigned smep_andnot_wp:1;
276 unsigned smap_andnot_wp:1;
277 unsigned ad_disabled:1;
278 unsigned guest_mode:1;
282 * This is left at the top of the word so that
283 * kvm_memslots_for_spte_role can extract it with a
284 * simple shift. While there is room, give it a whole
285 * byte so it is also faster to load it from memory.
291 union kvm_mmu_extended_role {
293 * This structure complements kvm_mmu_page_role caching everything needed for
294 * MMU configuration. If nothing in both these structures changed, MMU
295 * re-configuration can be skipped. @valid bit is set on first usage so we don't
296 * treat all-zero structure as valid data.
300 unsigned int valid:1;
301 unsigned int execonly:1;
302 unsigned int cr0_pg:1;
303 unsigned int cr4_pae:1;
304 unsigned int cr4_pse:1;
305 unsigned int cr4_pke:1;
306 unsigned int cr4_smap:1;
307 unsigned int cr4_smep:1;
308 unsigned int maxphyaddr:6;
315 union kvm_mmu_page_role base;
316 union kvm_mmu_extended_role ext;
320 struct kvm_rmap_head {
324 struct kvm_mmu_page {
325 struct list_head link;
326 struct hlist_node hash_link;
327 struct list_head lpage_disallowed_link;
332 bool lpage_disallowed; /* Can't be replaced by an equiv large page */
335 * The following two entries are used to key the shadow page in the
338 union kvm_mmu_page_role role;
342 /* hold the gfn of each spte inside spt */
344 int root_count; /* Currently serving as active root */
345 unsigned int unsync_children;
346 struct kvm_rmap_head parent_ptes; /* rmap pointers to parent sptes */
347 DECLARE_BITMAP(unsync_child_bitmap, 512);
351 * Used out of the mmu-lock to avoid reading spte values while an
352 * update is in progress; see the comments in __get_spte_lockless().
354 int clear_spte_count;
357 /* Number of writes since the last time traversal visited this page. */
358 atomic_t write_flooding_count;
361 struct kvm_pio_request {
362 unsigned long linear_rip;
369 #define PT64_ROOT_MAX_LEVEL 5
371 struct rsvd_bits_validate {
372 u64 rsvd_bits_mask[2][PT64_ROOT_MAX_LEVEL];
376 struct kvm_mmu_root_info {
381 #define KVM_MMU_ROOT_INFO_INVALID \
382 ((struct kvm_mmu_root_info) { .cr3 = INVALID_PAGE, .hpa = INVALID_PAGE })
384 #define KVM_MMU_NUM_PREV_ROOTS 3
387 * x86 supports 4 paging modes (5-level 64-bit, 4-level 64-bit, 3-level 32-bit,
388 * and 2-level 32-bit). The kvm_mmu structure abstracts the details of the
392 unsigned long (*get_guest_pgd)(struct kvm_vcpu *vcpu);
393 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index);
394 int (*page_fault)(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u32 err,
396 void (*inject_page_fault)(struct kvm_vcpu *vcpu,
397 struct x86_exception *fault);
398 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gpa_t gva_or_gpa,
399 u32 access, struct x86_exception *exception);
400 gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
401 struct x86_exception *exception);
402 int (*sync_page)(struct kvm_vcpu *vcpu,
403 struct kvm_mmu_page *sp);
404 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva, hpa_t root_hpa);
405 void (*update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
406 u64 *spte, const void *pte);
409 union kvm_mmu_role mmu_role;
411 u8 shadow_root_level;
414 struct kvm_mmu_root_info prev_roots[KVM_MMU_NUM_PREV_ROOTS];
417 * Bitmap; bit set = permission fault
418 * Byte index: page fault error code [4:1]
419 * Bit index: pte permissions in ACC_* format
424 * The pkru_mask indicates if protection key checks are needed. It
425 * consists of 16 domains indexed by page fault error code bits [4:1],
426 * with PFEC.RSVD replaced by ACC_USER_MASK from the page tables.
427 * Each domain has 2 bits which are ANDed with AD and WD from PKRU.
435 * check zero bits on shadow page table entries, these
436 * bits include not only hardware reserved bits but also
437 * the bits spte never used.
439 struct rsvd_bits_validate shadow_zero_check;
441 struct rsvd_bits_validate guest_rsvd_check;
443 /* Can have large pages at levels 2..last_nonleaf_level-1. */
444 u8 last_nonleaf_level;
448 u64 pdptrs[4]; /* pae */
451 struct kvm_tlb_range {
466 struct perf_event *perf_event;
467 struct kvm_vcpu *vcpu;
469 * eventsel value for general purpose counters,
470 * ctrl value for fixed counters.
476 unsigned nr_arch_gp_counters;
477 unsigned nr_arch_fixed_counters;
478 unsigned available_event_types;
483 u64 counter_bitmask[2];
484 u64 global_ctrl_mask;
485 u64 global_ovf_ctrl_mask;
488 struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC];
489 struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED];
490 struct irq_work irq_work;
491 DECLARE_BITMAP(reprogram_pmi, X86_PMC_IDX_MAX);
492 DECLARE_BITMAP(all_valid_pmc_idx, X86_PMC_IDX_MAX);
493 DECLARE_BITMAP(pmc_in_use, X86_PMC_IDX_MAX);
496 * The gate to release perf_events not marked in
497 * pmc_in_use only once in a vcpu time slice.
502 * The total number of programmed perf_events and it helps to avoid
503 * redundant check before cleanup if guest don't use vPMU at all.
511 KVM_DEBUGREG_BP_ENABLED = 1,
512 KVM_DEBUGREG_WONT_EXIT = 2,
513 KVM_DEBUGREG_RELOAD = 4,
516 struct kvm_mtrr_range {
519 struct list_head node;
523 struct kvm_mtrr_range var_ranges[KVM_NR_VAR_MTRR];
524 mtrr_type fixed_ranges[KVM_NR_FIXED_MTRR_REGION];
527 struct list_head head;
530 /* Hyper-V SynIC timer */
531 struct kvm_vcpu_hv_stimer {
532 struct hrtimer timer;
534 union hv_stimer_config config;
537 struct hv_message msg;
541 /* Hyper-V synthetic interrupt controller (SynIC)*/
542 struct kvm_vcpu_hv_synic {
547 atomic64_t sint[HV_SYNIC_SINT_COUNT];
548 atomic_t sint_to_gsi[HV_SYNIC_SINT_COUNT];
549 DECLARE_BITMAP(auto_eoi_bitmap, 256);
550 DECLARE_BITMAP(vec_bitmap, 256);
552 bool dont_zero_synic_pages;
555 /* Hyper-V per vcpu emulation context */
560 struct kvm_vcpu_hv_synic synic;
561 struct kvm_hyperv_exit exit;
562 struct kvm_vcpu_hv_stimer stimer[HV_SYNIC_STIMER_COUNT];
563 DECLARE_BITMAP(stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT);
567 struct kvm_vcpu_arch {
569 * rip and regs accesses must go through
570 * kvm_{register,rip}_{read,write} functions.
572 unsigned long regs[NR_VCPU_REGS];
577 unsigned long cr0_guest_owned_bits;
581 unsigned long cr4_guest_owned_bits;
587 struct kvm_lapic *apic; /* kernel irqchip context */
589 bool load_eoi_exitmap_pending;
590 DECLARE_BITMAP(ioapic_handled_vectors, 256);
591 unsigned long apic_attention;
592 int32_t apic_arb_prio;
594 u64 ia32_misc_enable_msr;
597 bool tpr_access_reporting;
600 u64 microcode_version;
601 u64 arch_capabilities;
604 * Paging state of the vcpu
606 * If the vcpu runs in guest mode with two level paging this still saves
607 * the paging mode of the l1 guest. This context is always used to
612 /* Non-nested MMU for L1 */
613 struct kvm_mmu root_mmu;
615 /* L1 MMU when running nested */
616 struct kvm_mmu guest_mmu;
619 * Paging state of an L2 guest (used for nested npt)
621 * This context will save all necessary information to walk page tables
622 * of an L2 guest. This context is only initialized for page table
623 * walking and not for faulting since we never handle l2 page faults on
626 struct kvm_mmu nested_mmu;
629 * Pointer to the mmu context currently used for
630 * gva_to_gpa translations.
632 struct kvm_mmu *walk_mmu;
634 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache;
635 struct kvm_mmu_memory_cache mmu_page_cache;
636 struct kvm_mmu_memory_cache mmu_page_header_cache;
639 * QEMU userspace and the guest each have their own FPU state.
640 * In vcpu_run, we switch between the user and guest FPU contexts.
641 * While running a VCPU, the VCPU thread will have the guest FPU
644 * Note that while the PKRU state lives inside the fpu registers,
645 * it is switched out separately at VMENTER and VMEXIT time. The
646 * "guest_fpu" state here contains the guest FPU context, with the
649 struct fpu *user_fpu;
650 struct fpu *guest_fpu;
653 u64 guest_supported_xcr0;
654 u32 guest_xstate_size;
656 struct kvm_pio_request pio;
659 u8 event_exit_inst_len;
661 struct kvm_queued_exception {
667 unsigned long payload;
672 struct kvm_queued_interrupt {
678 int halt_request; /* real mode on Intel only */
681 struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES];
685 /* emulate context */
687 struct x86_emulate_ctxt *emulate_ctxt;
688 bool emulate_regs_need_sync_to_vcpu;
689 bool emulate_regs_need_sync_from_vcpu;
690 int (*complete_userspace_io)(struct kvm_vcpu *vcpu);
693 struct pvclock_vcpu_time_info hv_clock;
694 unsigned int hw_tsc_khz;
695 struct gfn_to_hva_cache pv_time;
696 bool pv_time_enabled;
697 /* set guest stopped flag in pvclock flags field */
698 bool pvclock_set_guest_stopped_request;
704 struct gfn_to_pfn_cache cache;
710 u64 tsc_offset_adjustment;
713 u64 this_tsc_generation;
715 bool tsc_always_catchup;
716 s8 virtual_tsc_shift;
717 u32 virtual_tsc_mult;
719 s64 ia32_tsc_adjust_msr;
720 u64 msr_ia32_power_ctl;
721 u64 tsc_scaling_ratio;
723 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */
724 unsigned nmi_pending; /* NMI queued after currently running handler */
725 bool nmi_injected; /* Trying to inject an NMI this entry */
726 bool smi_pending; /* SMI queued after currently running handler */
728 struct kvm_mtrr mtrr_state;
731 unsigned switch_db_regs;
732 unsigned long db[KVM_NR_DB_REGS];
735 unsigned long eff_db[KVM_NR_DB_REGS];
736 unsigned long guest_debug_dr7;
737 u64 msr_platform_info;
738 u64 msr_misc_features_enables;
746 /* Cache MMIO info */
748 unsigned mmio_access;
754 /* used for guest single stepping over the given code position */
755 unsigned long singlestep_rip;
757 struct kvm_vcpu_hv hyperv;
759 cpumask_var_t wbinvd_dirty_mask;
761 unsigned long last_retry_eip;
762 unsigned long last_retry_addr;
766 gfn_t gfns[roundup_pow_of_two(ASYNC_PF_PER_VCPU)];
767 struct gfn_to_hva_cache data;
772 unsigned long nested_apf_token;
773 bool delivery_as_pf_vmexit;
776 /* OSVW MSRs (AMD only) */
784 struct gfn_to_hva_cache data;
787 u64 msr_kvm_poll_control;
790 * Indicates the guest is trying to write a gfn that contains one or
791 * more of the PTEs used to translate the write itself, i.e. the access
792 * is changing its own translation in the guest page tables. KVM exits
793 * to userspace if emulation of the faulting instruction fails and this
794 * flag is set, as KVM cannot make forward progress.
796 * If emulation fails for a write to guest page tables, KVM unprotects
797 * (zaps) the shadow page for the target gfn and resumes the guest to
798 * retry the non-emulatable instruction (on hardware). Unprotecting the
799 * gfn doesn't allow forward progress for a self-changing access because
800 * doing so also zaps the translation for the gfn, i.e. retrying the
801 * instruction will hit a !PRESENT fault, which results in a new shadow
802 * page and sends KVM back to square one.
804 bool write_fault_to_shadow_pgtable;
806 /* set at EPT violation at this point */
807 unsigned long exit_qualification;
809 /* pv related host specific info */
814 int pending_ioapic_eoi;
815 int pending_external_vector;
817 /* be preempted when it's in kernel-mode(cpl=0) */
818 bool preempted_in_kernel;
820 /* Flush the L1 Data cache for L1TF mitigation on VMENTER */
823 /* AMD MSRC001_0015 Hardware Configuration */
827 struct kvm_lpage_info {
831 struct kvm_arch_memory_slot {
832 struct kvm_rmap_head *rmap[KVM_NR_PAGE_SIZES];
833 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1];
834 unsigned short *gfn_track[KVM_PAGE_TRACK_MAX];
838 * We use as the mode the number of bits allocated in the LDR for the
839 * logical processor ID. It happens that these are all powers of two.
840 * This makes it is very easy to detect cases where the APICs are
841 * configured for multiple modes; in that case, we cannot use the map and
842 * hence cannot use kvm_irq_delivery_to_apic_fast either.
844 #define KVM_APIC_MODE_XAPIC_CLUSTER 4
845 #define KVM_APIC_MODE_XAPIC_FLAT 8
846 #define KVM_APIC_MODE_X2APIC 16
848 struct kvm_apic_map {
853 struct kvm_lapic *xapic_flat_map[8];
854 struct kvm_lapic *xapic_cluster_map[16][4];
856 struct kvm_lapic *phys_map[];
859 /* Hyper-V emulation context */
861 struct mutex hv_lock;
866 /* Hyper-v based guest crash (NT kernel bugcheck) parameters */
867 u64 hv_crash_param[HV_X64_MSR_CRASH_PARAMS];
870 HV_REFERENCE_TSC_PAGE tsc_ref;
872 struct idr conn_to_evt;
874 u64 hv_reenlightenment_control;
875 u64 hv_tsc_emulation_control;
876 u64 hv_tsc_emulation_status;
878 /* How many vCPUs have VP index != vCPU index */
879 atomic_t num_mismatched_vp_indexes;
881 struct hv_partition_assist_pg *hv_pa_pg;
884 enum kvm_irqchip_mode {
886 KVM_IRQCHIP_KERNEL, /* created with KVM_CREATE_IRQCHIP */
887 KVM_IRQCHIP_SPLIT, /* created with KVM_CAP_SPLIT_IRQCHIP */
890 #define APICV_INHIBIT_REASON_DISABLE 0
891 #define APICV_INHIBIT_REASON_HYPERV 1
892 #define APICV_INHIBIT_REASON_NESTED 2
893 #define APICV_INHIBIT_REASON_IRQWIN 3
894 #define APICV_INHIBIT_REASON_PIT_REINJ 4
895 #define APICV_INHIBIT_REASON_X2APIC 5
898 unsigned long n_used_mmu_pages;
899 unsigned long n_requested_mmu_pages;
900 unsigned long n_max_mmu_pages;
901 unsigned int indirect_shadow_pages;
903 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
905 * Hash table of struct kvm_mmu_page.
907 struct list_head active_mmu_pages;
908 struct list_head zapped_obsolete_pages;
909 struct list_head lpage_disallowed_mmu_pages;
910 struct kvm_page_track_notifier_node mmu_sp_tracker;
911 struct kvm_page_track_notifier_head track_notifier_head;
913 struct list_head assigned_dev_head;
914 struct iommu_domain *iommu_domain;
915 bool iommu_noncoherent;
916 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA
917 atomic_t noncoherent_dma_count;
918 #define __KVM_HAVE_ARCH_ASSIGNED_DEVICE
919 atomic_t assigned_device_count;
920 struct kvm_pic *vpic;
921 struct kvm_ioapic *vioapic;
922 struct kvm_pit *vpit;
923 atomic_t vapics_in_nmi_mode;
924 struct mutex apic_map_lock;
925 struct kvm_apic_map *apic_map;
928 bool apic_access_page_done;
929 unsigned long apicv_inhibit_reasons;
936 bool cstate_in_guest;
938 unsigned long irq_sources_bitmap;
940 raw_spinlock_t tsc_write_lock;
947 u64 cur_tsc_generation;
948 int nr_vcpus_matched_tsc;
950 spinlock_t pvclock_gtod_sync_lock;
951 bool use_master_clock;
952 u64 master_kernel_ns;
953 u64 master_cycle_now;
954 struct delayed_work kvmclock_update_work;
955 struct delayed_work kvmclock_sync_work;
957 struct kvm_xen_hvm_config xen_hvm_config;
959 /* reads protected by irq_srcu, writes by irq_lock */
960 struct hlist_head mask_notifier_list;
962 struct kvm_hv hyperv;
964 #ifdef CONFIG_KVM_MMU_AUDIT
968 bool backwards_tsc_observed;
969 bool boot_vcpu_runs_old_kvmclock;
974 enum kvm_irqchip_mode irqchip_mode;
975 u8 nr_reserved_ioapic_pins;
977 bool disabled_lapic_found;
980 bool x2apic_broadcast_quirk_disabled;
982 bool guest_can_read_msr_platform_info;
983 bool exception_payload_enabled;
985 struct kvm_pmu_event_filter *pmu_event_filter;
986 struct task_struct *nx_lpage_recovery_thread;
990 ulong mmu_shadow_zapped;
992 ulong mmu_pte_updated;
993 ulong mmu_pde_zapped;
996 ulong mmu_cache_miss;
998 ulong remote_tlb_flush;
1000 ulong nx_lpage_splits;
1001 ulong max_mmu_page_hash_collisions;
1004 struct kvm_vcpu_stat {
1014 u64 irq_window_exits;
1015 u64 nmi_window_exits;
1018 u64 halt_successful_poll;
1019 u64 halt_attempted_poll;
1020 u64 halt_poll_invalid;
1022 u64 request_irq_exits;
1024 u64 host_state_reload;
1027 u64 insn_emulation_fail;
1034 struct x86_instruction_info;
1037 bool host_initiated;
1042 struct kvm_lapic_irq {
1050 bool msi_redir_hint;
1053 static inline u16 kvm_lapic_irq_dest_mode(bool dest_mode_logical)
1055 return dest_mode_logical ? APIC_DEST_LOGICAL : APIC_DEST_PHYSICAL;
1058 struct kvm_x86_ops {
1059 int (*hardware_enable)(void);
1060 void (*hardware_disable)(void);
1061 void (*hardware_unsetup)(void);
1062 bool (*cpu_has_accelerated_tpr)(void);
1063 bool (*has_emulated_msr)(int index);
1064 void (*cpuid_update)(struct kvm_vcpu *vcpu);
1066 unsigned int vm_size;
1067 int (*vm_init)(struct kvm *kvm);
1068 void (*vm_destroy)(struct kvm *kvm);
1070 /* Create, but do not attach this VCPU */
1071 int (*vcpu_create)(struct kvm_vcpu *vcpu);
1072 void (*vcpu_free)(struct kvm_vcpu *vcpu);
1073 void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event);
1075 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu);
1076 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
1077 void (*vcpu_put)(struct kvm_vcpu *vcpu);
1079 void (*update_bp_intercept)(struct kvm_vcpu *vcpu);
1080 int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
1081 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
1082 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
1083 void (*get_segment)(struct kvm_vcpu *vcpu,
1084 struct kvm_segment *var, int seg);
1085 int (*get_cpl)(struct kvm_vcpu *vcpu);
1086 void (*set_segment)(struct kvm_vcpu *vcpu,
1087 struct kvm_segment *var, int seg);
1088 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
1089 void (*decache_cr0_guest_bits)(struct kvm_vcpu *vcpu);
1090 void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu);
1091 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
1092 int (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
1093 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
1094 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1095 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1096 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1097 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1098 u64 (*get_dr6)(struct kvm_vcpu *vcpu);
1099 void (*set_dr6)(struct kvm_vcpu *vcpu, unsigned long value);
1100 void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu);
1101 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value);
1102 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
1103 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
1104 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
1106 void (*tlb_flush)(struct kvm_vcpu *vcpu, bool invalidate_gpa);
1107 int (*tlb_remote_flush)(struct kvm *kvm);
1108 int (*tlb_remote_flush_with_range)(struct kvm *kvm,
1109 struct kvm_tlb_range *range);
1112 * Flush any TLB entries associated with the given GVA.
1113 * Does not need to flush GPA->HPA mappings.
1114 * Can potentially get non-canonical addresses through INVLPGs, which
1115 * the implementation may choose to ignore if appropriate.
1117 void (*tlb_flush_gva)(struct kvm_vcpu *vcpu, gva_t addr);
1120 * Flush any TLB entries created by the guest. Like tlb_flush_gva(),
1121 * does not need to flush GPA->HPA mappings.
1123 void (*tlb_flush_guest)(struct kvm_vcpu *vcpu);
1125 void (*run)(struct kvm_vcpu *vcpu);
1126 int (*handle_exit)(struct kvm_vcpu *vcpu,
1127 enum exit_fastpath_completion exit_fastpath);
1128 int (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
1129 void (*update_emulated_instruction)(struct kvm_vcpu *vcpu);
1130 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
1131 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu);
1132 void (*patch_hypercall)(struct kvm_vcpu *vcpu,
1133 unsigned char *hypercall_addr);
1134 void (*set_irq)(struct kvm_vcpu *vcpu);
1135 void (*set_nmi)(struct kvm_vcpu *vcpu);
1136 void (*queue_exception)(struct kvm_vcpu *vcpu);
1137 void (*cancel_injection)(struct kvm_vcpu *vcpu);
1138 int (*interrupt_allowed)(struct kvm_vcpu *vcpu);
1139 int (*nmi_allowed)(struct kvm_vcpu *vcpu);
1140 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu);
1141 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked);
1142 void (*enable_nmi_window)(struct kvm_vcpu *vcpu);
1143 void (*enable_irq_window)(struct kvm_vcpu *vcpu);
1144 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);
1145 bool (*check_apicv_inhibit_reasons)(ulong bit);
1146 void (*pre_update_apicv_exec_ctrl)(struct kvm *kvm, bool activate);
1147 void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu);
1148 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr);
1149 void (*hwapic_isr_update)(struct kvm_vcpu *vcpu, int isr);
1150 bool (*guest_apic_has_interrupt)(struct kvm_vcpu *vcpu);
1151 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap);
1152 void (*set_virtual_apic_mode)(struct kvm_vcpu *vcpu);
1153 void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu, hpa_t hpa);
1154 int (*deliver_posted_interrupt)(struct kvm_vcpu *vcpu, int vector);
1155 int (*sync_pir_to_irr)(struct kvm_vcpu *vcpu);
1156 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
1157 int (*set_identity_map_addr)(struct kvm *kvm, u64 ident_addr);
1158 int (*get_tdp_level)(struct kvm_vcpu *vcpu);
1159 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio);
1161 void (*load_mmu_pgd)(struct kvm_vcpu *vcpu, unsigned long cr3);
1163 bool (*has_wbinvd_exit)(void);
1165 u64 (*read_l1_tsc_offset)(struct kvm_vcpu *vcpu);
1166 /* Returns actual tsc_offset set in active VMCS */
1167 u64 (*write_l1_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset);
1169 void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2);
1171 int (*check_intercept)(struct kvm_vcpu *vcpu,
1172 struct x86_instruction_info *info,
1173 enum x86_intercept_stage stage,
1174 struct x86_exception *exception);
1175 void (*handle_exit_irqoff)(struct kvm_vcpu *vcpu,
1176 enum exit_fastpath_completion *exit_fastpath);
1178 int (*check_nested_events)(struct kvm_vcpu *vcpu);
1179 void (*request_immediate_exit)(struct kvm_vcpu *vcpu);
1181 void (*sched_in)(struct kvm_vcpu *kvm, int cpu);
1184 * Arch-specific dirty logging hooks. These hooks are only supposed to
1185 * be valid if the specific arch has hardware-accelerated dirty logging
1186 * mechanism. Currently only for PML on VMX.
1188 * - slot_enable_log_dirty:
1189 * called when enabling log dirty mode for the slot.
1190 * - slot_disable_log_dirty:
1191 * called when disabling log dirty mode for the slot.
1192 * also called when slot is created with log dirty disabled.
1193 * - flush_log_dirty:
1194 * called before reporting dirty_bitmap to userspace.
1195 * - enable_log_dirty_pt_masked:
1196 * called when reenabling log dirty for the GFNs in the mask after
1197 * corresponding bits are cleared in slot->dirty_bitmap.
1199 void (*slot_enable_log_dirty)(struct kvm *kvm,
1200 struct kvm_memory_slot *slot);
1201 void (*slot_disable_log_dirty)(struct kvm *kvm,
1202 struct kvm_memory_slot *slot);
1203 void (*flush_log_dirty)(struct kvm *kvm);
1204 void (*enable_log_dirty_pt_masked)(struct kvm *kvm,
1205 struct kvm_memory_slot *slot,
1206 gfn_t offset, unsigned long mask);
1207 int (*write_log_dirty)(struct kvm_vcpu *vcpu);
1209 /* pmu operations of sub-arch */
1210 const struct kvm_pmu_ops *pmu_ops;
1213 * Architecture specific hooks for vCPU blocking due to
1215 * Returns for .pre_block():
1216 * - 0 means continue to block the vCPU.
1217 * - 1 means we cannot block the vCPU since some event
1218 * happens during this period, such as, 'ON' bit in
1219 * posted-interrupts descriptor is set.
1221 int (*pre_block)(struct kvm_vcpu *vcpu);
1222 void (*post_block)(struct kvm_vcpu *vcpu);
1224 void (*vcpu_blocking)(struct kvm_vcpu *vcpu);
1225 void (*vcpu_unblocking)(struct kvm_vcpu *vcpu);
1227 int (*update_pi_irte)(struct kvm *kvm, unsigned int host_irq,
1228 uint32_t guest_irq, bool set);
1229 void (*apicv_post_state_restore)(struct kvm_vcpu *vcpu);
1230 bool (*dy_apicv_has_pending_interrupt)(struct kvm_vcpu *vcpu);
1232 int (*set_hv_timer)(struct kvm_vcpu *vcpu, u64 guest_deadline_tsc,
1234 void (*cancel_hv_timer)(struct kvm_vcpu *vcpu);
1236 void (*setup_mce)(struct kvm_vcpu *vcpu);
1238 int (*get_nested_state)(struct kvm_vcpu *vcpu,
1239 struct kvm_nested_state __user *user_kvm_nested_state,
1240 unsigned user_data_size);
1241 int (*set_nested_state)(struct kvm_vcpu *vcpu,
1242 struct kvm_nested_state __user *user_kvm_nested_state,
1243 struct kvm_nested_state *kvm_state);
1244 bool (*get_vmcs12_pages)(struct kvm_vcpu *vcpu);
1246 int (*smi_allowed)(struct kvm_vcpu *vcpu);
1247 int (*pre_enter_smm)(struct kvm_vcpu *vcpu, char *smstate);
1248 int (*pre_leave_smm)(struct kvm_vcpu *vcpu, const char *smstate);
1249 int (*enable_smi_window)(struct kvm_vcpu *vcpu);
1251 int (*mem_enc_op)(struct kvm *kvm, void __user *argp);
1252 int (*mem_enc_reg_region)(struct kvm *kvm, struct kvm_enc_region *argp);
1253 int (*mem_enc_unreg_region)(struct kvm *kvm, struct kvm_enc_region *argp);
1255 int (*get_msr_feature)(struct kvm_msr_entry *entry);
1257 int (*nested_enable_evmcs)(struct kvm_vcpu *vcpu,
1258 uint16_t *vmcs_version);
1259 uint16_t (*nested_get_evmcs_version)(struct kvm_vcpu *vcpu);
1261 bool (*need_emulation_on_page_fault)(struct kvm_vcpu *vcpu);
1263 bool (*apic_init_signal_blocked)(struct kvm_vcpu *vcpu);
1264 int (*enable_direct_tlbflush)(struct kvm_vcpu *vcpu);
1267 struct kvm_x86_init_ops {
1268 int (*cpu_has_kvm_support)(void);
1269 int (*disabled_by_bios)(void);
1270 int (*check_processor_compatibility)(void);
1271 int (*hardware_setup)(void);
1273 struct kvm_x86_ops *runtime_ops;
1276 struct kvm_arch_async_pf {
1283 extern u64 __read_mostly host_efer;
1285 extern struct kvm_x86_ops kvm_x86_ops;
1286 extern struct kmem_cache *x86_fpu_cache;
1288 #define __KVM_HAVE_ARCH_VM_ALLOC
1289 static inline struct kvm *kvm_arch_alloc_vm(void)
1291 return __vmalloc(kvm_x86_ops.vm_size,
1292 GFP_KERNEL_ACCOUNT | __GFP_ZERO, PAGE_KERNEL);
1294 void kvm_arch_free_vm(struct kvm *kvm);
1296 #define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLB
1297 static inline int kvm_arch_flush_remote_tlb(struct kvm *kvm)
1299 if (kvm_x86_ops.tlb_remote_flush &&
1300 !kvm_x86_ops.tlb_remote_flush(kvm))
1306 int kvm_mmu_module_init(void);
1307 void kvm_mmu_module_exit(void);
1309 void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
1310 int kvm_mmu_create(struct kvm_vcpu *vcpu);
1311 void kvm_mmu_init_vm(struct kvm *kvm);
1312 void kvm_mmu_uninit_vm(struct kvm *kvm);
1313 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
1314 u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 p_mask,
1315 u64 acc_track_mask, u64 me_mask);
1317 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
1318 void kvm_mmu_slot_remove_write_access(struct kvm *kvm,
1319 struct kvm_memory_slot *memslot,
1321 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm,
1322 const struct kvm_memory_slot *memslot);
1323 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm,
1324 struct kvm_memory_slot *memslot);
1325 void kvm_mmu_slot_largepage_remove_write_access(struct kvm *kvm,
1326 struct kvm_memory_slot *memslot);
1327 void kvm_mmu_slot_set_dirty(struct kvm *kvm,
1328 struct kvm_memory_slot *memslot);
1329 void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm,
1330 struct kvm_memory_slot *slot,
1331 gfn_t gfn_offset, unsigned long mask);
1332 void kvm_mmu_zap_all(struct kvm *kvm);
1333 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, u64 gen);
1334 unsigned long kvm_mmu_calculate_default_mmu_pages(struct kvm *kvm);
1335 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned long kvm_nr_mmu_pages);
1337 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3);
1338 bool pdptrs_changed(struct kvm_vcpu *vcpu);
1340 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
1341 const void *val, int bytes);
1343 struct kvm_irq_mask_notifier {
1344 void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked);
1346 struct hlist_node link;
1349 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
1350 struct kvm_irq_mask_notifier *kimn);
1351 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
1352 struct kvm_irq_mask_notifier *kimn);
1353 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin,
1356 extern bool tdp_enabled;
1358 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu);
1360 /* control of guest tsc rate supported? */
1361 extern bool kvm_has_tsc_control;
1362 /* maximum supported tsc_khz for guests */
1363 extern u32 kvm_max_guest_tsc_khz;
1364 /* number of bits of the fractional part of the TSC scaling ratio */
1365 extern u8 kvm_tsc_scaling_ratio_frac_bits;
1366 /* maximum allowed value of TSC scaling ratio */
1367 extern u64 kvm_max_tsc_scaling_ratio;
1368 /* 1ull << kvm_tsc_scaling_ratio_frac_bits */
1369 extern u64 kvm_default_tsc_scaling_ratio;
1371 extern u64 kvm_mce_cap_supported;
1374 * EMULTYPE_NO_DECODE - Set when re-emulating an instruction (after completing
1375 * userspace I/O) to indicate that the emulation context
1376 * should be resued as is, i.e. skip initialization of
1377 * emulation context, instruction fetch and decode.
1379 * EMULTYPE_TRAP_UD - Set when emulating an intercepted #UD from hardware.
1380 * Indicates that only select instructions (tagged with
1381 * EmulateOnUD) should be emulated (to minimize the emulator
1382 * attack surface). See also EMULTYPE_TRAP_UD_FORCED.
1384 * EMULTYPE_SKIP - Set when emulating solely to skip an instruction, i.e. to
1385 * decode the instruction length. For use *only* by
1386 * kvm_x86_ops.skip_emulated_instruction() implementations.
1388 * EMULTYPE_ALLOW_RETRY_PF - Set when the emulator should resume the guest to
1389 * retry native execution under certain conditions,
1390 * Can only be set in conjunction with EMULTYPE_PF.
1392 * EMULTYPE_TRAP_UD_FORCED - Set when emulating an intercepted #UD that was
1393 * triggered by KVM's magic "force emulation" prefix,
1394 * which is opt in via module param (off by default).
1395 * Bypasses EmulateOnUD restriction despite emulating
1396 * due to an intercepted #UD (see EMULTYPE_TRAP_UD).
1397 * Used to test the full emulator from userspace.
1399 * EMULTYPE_VMWARE_GP - Set when emulating an intercepted #GP for VMware
1400 * backdoor emulation, which is opt in via module param.
1401 * VMware backoor emulation handles select instructions
1402 * and reinjects the #GP for all other cases.
1404 * EMULTYPE_PF - Set when emulating MMIO by way of an intercepted #PF, in which
1405 * case the CR2/GPA value pass on the stack is valid.
1407 #define EMULTYPE_NO_DECODE (1 << 0)
1408 #define EMULTYPE_TRAP_UD (1 << 1)
1409 #define EMULTYPE_SKIP (1 << 2)
1410 #define EMULTYPE_ALLOW_RETRY_PF (1 << 3)
1411 #define EMULTYPE_TRAP_UD_FORCED (1 << 4)
1412 #define EMULTYPE_VMWARE_GP (1 << 5)
1413 #define EMULTYPE_PF (1 << 6)
1415 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type);
1416 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
1417 void *insn, int insn_len);
1419 void kvm_enable_efer_bits(u64);
1420 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer);
1421 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data, bool host_initiated);
1422 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data);
1423 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data);
1424 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu);
1425 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu);
1427 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in);
1428 int kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
1429 int kvm_emulate_halt(struct kvm_vcpu *vcpu);
1430 int kvm_vcpu_halt(struct kvm_vcpu *vcpu);
1431 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu);
1433 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
1434 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg);
1435 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector);
1437 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
1438 int reason, bool has_error_code, u32 error_code);
1440 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
1441 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
1442 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
1443 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
1444 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val);
1445 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val);
1446 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
1447 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
1448 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l);
1449 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr);
1451 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
1452 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
1454 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu);
1455 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
1456 bool kvm_rdpmc(struct kvm_vcpu *vcpu);
1458 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
1459 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
1460 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr);
1461 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
1462 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault);
1463 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
1464 struct x86_exception *fault);
1465 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
1466 gfn_t gfn, void *data, int offset, int len,
1468 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl);
1469 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr);
1471 static inline int __kvm_irq_line_state(unsigned long *irq_state,
1472 int irq_source_id, int level)
1474 /* Logical OR for level trig interrupt */
1476 __set_bit(irq_source_id, irq_state);
1478 __clear_bit(irq_source_id, irq_state);
1480 return !!(*irq_state);
1483 #define KVM_MMU_ROOT_CURRENT BIT(0)
1484 #define KVM_MMU_ROOT_PREVIOUS(i) BIT(1+i)
1485 #define KVM_MMU_ROOTS_ALL (~0UL)
1487 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level);
1488 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id);
1490 void kvm_inject_nmi(struct kvm_vcpu *vcpu);
1492 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn);
1493 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
1494 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
1495 int kvm_mmu_load(struct kvm_vcpu *vcpu);
1496 void kvm_mmu_unload(struct kvm_vcpu *vcpu);
1497 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu);
1498 void kvm_mmu_free_roots(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
1499 ulong roots_to_free);
1500 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
1501 struct x86_exception *exception);
1502 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
1503 struct x86_exception *exception);
1504 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
1505 struct x86_exception *exception);
1506 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
1507 struct x86_exception *exception);
1508 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
1509 struct x86_exception *exception);
1511 bool kvm_apicv_activated(struct kvm *kvm);
1512 void kvm_apicv_init(struct kvm *kvm, bool enable);
1513 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu);
1514 void kvm_request_apicv_update(struct kvm *kvm, bool activate,
1517 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
1519 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u64 error_code,
1520 void *insn, int insn_len);
1521 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva);
1522 void kvm_mmu_invalidate_gva(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
1523 gva_t gva, hpa_t root_hpa);
1524 void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid);
1525 void kvm_mmu_new_cr3(struct kvm_vcpu *vcpu, gpa_t new_cr3, bool skip_tlb_flush);
1527 void kvm_configure_mmu(bool enable_tdp, int tdp_page_level);
1529 static inline gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
1530 struct x86_exception *exception)
1535 static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
1537 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
1539 return (struct kvm_mmu_page *)page_private(page);
1542 static inline u16 kvm_read_ldt(void)
1545 asm("sldt %0" : "=g"(ldt));
1549 static inline void kvm_load_ldt(u16 sel)
1551 asm("lldt %0" : : "rm"(sel));
1554 #ifdef CONFIG_X86_64
1555 static inline unsigned long read_msr(unsigned long msr)
1564 static inline u32 get_rdx_init_val(void)
1566 return 0x600; /* P6 family */
1569 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
1571 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
1574 #define TSS_IOPB_BASE_OFFSET 0x66
1575 #define TSS_BASE_SIZE 0x68
1576 #define TSS_IOPB_SIZE (65536 / 8)
1577 #define TSS_REDIRECTION_SIZE (256 / 8)
1578 #define RMODE_TSS_SIZE \
1579 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
1582 TASK_SWITCH_CALL = 0,
1583 TASK_SWITCH_IRET = 1,
1584 TASK_SWITCH_JMP = 2,
1585 TASK_SWITCH_GATE = 3,
1588 #define HF_GIF_MASK (1 << 0)
1589 #define HF_HIF_MASK (1 << 1)
1590 #define HF_VINTR_MASK (1 << 2)
1591 #define HF_NMI_MASK (1 << 3)
1592 #define HF_IRET_MASK (1 << 4)
1593 #define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */
1594 #define HF_SMM_MASK (1 << 6)
1595 #define HF_SMM_INSIDE_NMI_MASK (1 << 7)
1597 #define __KVM_VCPU_MULTIPLE_ADDRESS_SPACE
1598 #define KVM_ADDRESS_SPACE_NUM 2
1600 #define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)->arch.hflags & HF_SMM_MASK ? 1 : 0)
1601 #define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm)
1603 asmlinkage void kvm_spurious_fault(void);
1606 * Hardware virtualization extension instructions may fault if a
1607 * reboot turns off virtualization while processes are running.
1608 * Usually after catching the fault we just panic; during reboot
1609 * instead the instruction is ignored.
1611 #define __kvm_handle_fault_on_reboot(insn) \
1616 "call kvm_spurious_fault \n\t" \
1618 _ASM_EXTABLE(666b, 667b)
1620 #define KVM_ARCH_WANT_MMU_NOTIFIER
1621 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end);
1622 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end);
1623 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);
1624 int kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
1625 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v);
1626 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu);
1627 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu);
1628 int kvm_cpu_get_interrupt(struct kvm_vcpu *v);
1629 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event);
1630 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu);
1632 int kvm_pv_send_ipi(struct kvm *kvm, unsigned long ipi_bitmap_low,
1633 unsigned long ipi_bitmap_high, u32 min,
1634 unsigned long icr, int op_64_bit);
1636 void kvm_define_shared_msr(unsigned index, u32 msr);
1637 int kvm_set_shared_msr(unsigned index, u64 val, u64 mask);
1639 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc);
1640 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc);
1642 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu);
1643 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip);
1645 void kvm_make_mclock_inprogress_request(struct kvm *kvm);
1646 void kvm_make_scan_ioapic_request(struct kvm *kvm);
1647 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
1648 unsigned long *vcpu_bitmap);
1650 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
1651 struct kvm_async_pf *work);
1652 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
1653 struct kvm_async_pf *work);
1654 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu,
1655 struct kvm_async_pf *work);
1656 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu);
1657 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn);
1659 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu);
1660 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err);
1661 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu);
1663 int kvm_is_in_guest(void);
1665 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size);
1666 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu);
1667 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu);
1669 bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq,
1670 struct kvm_vcpu **dest_vcpu);
1672 void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e,
1673 struct kvm_lapic_irq *irq);
1675 static inline bool kvm_irq_is_postable(struct kvm_lapic_irq *irq)
1677 /* We can only post Fixed and LowPrio IRQs */
1678 return (irq->delivery_mode == dest_Fixed ||
1679 irq->delivery_mode == dest_LowestPrio);
1682 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu)
1684 if (kvm_x86_ops.vcpu_blocking)
1685 kvm_x86_ops.vcpu_blocking(vcpu);
1688 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu)
1690 if (kvm_x86_ops.vcpu_unblocking)
1691 kvm_x86_ops.vcpu_unblocking(vcpu);
1694 static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {}
1696 static inline int kvm_cpu_get_apicid(int mps_cpu)
1698 #ifdef CONFIG_X86_LOCAL_APIC
1699 return default_cpu_present_to_apicid(mps_cpu);
1706 #define put_smstate(type, buf, offset, val) \
1707 *(type *)((buf) + (offset) - 0x7e00) = val
1709 #define GET_SMSTATE(type, buf, offset) \
1710 (*(type *)((buf) + (offset) - 0x7e00))
1712 #endif /* _ASM_X86_KVM_HOST_H */