1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Kernel-based Virtual Machine driver for Linux
5 * This header defines architecture specific interfaces, x86 version
8 #ifndef _ASM_X86_KVM_HOST_H
9 #define _ASM_X86_KVM_HOST_H
11 #include <linux/types.h>
13 #include <linux/mmu_notifier.h>
14 #include <linux/tracepoint.h>
15 #include <linux/cpumask.h>
16 #include <linux/irq_work.h>
17 #include <linux/irq.h>
18 #include <linux/workqueue.h>
20 #include <linux/kvm.h>
21 #include <linux/kvm_para.h>
22 #include <linux/kvm_types.h>
23 #include <linux/perf_event.h>
24 #include <linux/pvclock_gtod.h>
25 #include <linux/clocksource.h>
26 #include <linux/irqbypass.h>
27 #include <linux/hyperv.h>
30 #include <asm/pvclock-abi.h>
33 #include <asm/msr-index.h>
35 #include <asm/kvm_page_track.h>
36 #include <asm/kvm_vcpu_regs.h>
37 #include <asm/hyperv-tlfs.h>
39 #define __KVM_HAVE_ARCH_VCPU_DEBUGFS
41 #define KVM_MAX_VCPUS 1024
44 * In x86, the VCPU ID corresponds to the APIC ID, and APIC IDs
45 * might be larger than the actual number of VCPUs because the
46 * APIC ID encodes CPU topology information.
48 * In the worst case, we'll need less than one extra bit for the
49 * Core ID, and less than one extra bit for the Package (Die) ID,
50 * so ratio of 4 should be enough.
52 #define KVM_VCPU_ID_RATIO 4
53 #define KVM_MAX_VCPU_IDS (KVM_MAX_VCPUS * KVM_VCPU_ID_RATIO)
55 /* memory slots that are not exposed to userspace */
56 #define KVM_PRIVATE_MEM_SLOTS 3
58 #define KVM_HALT_POLL_NS_DEFAULT 200000
60 #define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS
62 #define KVM_DIRTY_LOG_MANUAL_CAPS (KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE | \
63 KVM_DIRTY_LOG_INITIALLY_SET)
65 #define KVM_BUS_LOCK_DETECTION_VALID_MODE (KVM_BUS_LOCK_DETECTION_OFF | \
66 KVM_BUS_LOCK_DETECTION_EXIT)
68 /* x86-specific vcpu->requests bit members */
69 #define KVM_REQ_MIGRATE_TIMER KVM_ARCH_REQ(0)
70 #define KVM_REQ_REPORT_TPR_ACCESS KVM_ARCH_REQ(1)
71 #define KVM_REQ_TRIPLE_FAULT KVM_ARCH_REQ(2)
72 #define KVM_REQ_MMU_SYNC KVM_ARCH_REQ(3)
73 #define KVM_REQ_CLOCK_UPDATE KVM_ARCH_REQ(4)
74 #define KVM_REQ_LOAD_MMU_PGD KVM_ARCH_REQ(5)
75 #define KVM_REQ_EVENT KVM_ARCH_REQ(6)
76 #define KVM_REQ_APF_HALT KVM_ARCH_REQ(7)
77 #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(8)
78 #define KVM_REQ_NMI KVM_ARCH_REQ(9)
79 #define KVM_REQ_PMU KVM_ARCH_REQ(10)
80 #define KVM_REQ_PMI KVM_ARCH_REQ(11)
81 #define KVM_REQ_SMI KVM_ARCH_REQ(12)
82 #define KVM_REQ_MASTERCLOCK_UPDATE KVM_ARCH_REQ(13)
83 #define KVM_REQ_MCLOCK_INPROGRESS \
84 KVM_ARCH_REQ_FLAGS(14, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
85 #define KVM_REQ_SCAN_IOAPIC \
86 KVM_ARCH_REQ_FLAGS(15, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
87 #define KVM_REQ_GLOBAL_CLOCK_UPDATE KVM_ARCH_REQ(16)
88 #define KVM_REQ_APIC_PAGE_RELOAD \
89 KVM_ARCH_REQ_FLAGS(17, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
90 #define KVM_REQ_HV_CRASH KVM_ARCH_REQ(18)
91 #define KVM_REQ_IOAPIC_EOI_EXIT KVM_ARCH_REQ(19)
92 #define KVM_REQ_HV_RESET KVM_ARCH_REQ(20)
93 #define KVM_REQ_HV_EXIT KVM_ARCH_REQ(21)
94 #define KVM_REQ_HV_STIMER KVM_ARCH_REQ(22)
95 #define KVM_REQ_LOAD_EOI_EXITMAP KVM_ARCH_REQ(23)
96 #define KVM_REQ_GET_NESTED_STATE_PAGES KVM_ARCH_REQ(24)
97 #define KVM_REQ_APICV_UPDATE \
98 KVM_ARCH_REQ_FLAGS(25, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
99 #define KVM_REQ_TLB_FLUSH_CURRENT KVM_ARCH_REQ(26)
100 #define KVM_REQ_TLB_FLUSH_GUEST \
101 KVM_ARCH_REQ_FLAGS(27, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
102 #define KVM_REQ_APF_READY KVM_ARCH_REQ(28)
103 #define KVM_REQ_MSR_FILTER_CHANGED KVM_ARCH_REQ(29)
104 #define KVM_REQ_UPDATE_CPU_DIRTY_LOGGING \
105 KVM_ARCH_REQ_FLAGS(30, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
106 #define KVM_REQ_MMU_FREE_OBSOLETE_ROOTS \
107 KVM_ARCH_REQ_FLAGS(31, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
109 #define CR0_RESERVED_BITS \
110 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
111 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
112 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
114 #define CR4_RESERVED_BITS \
115 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
116 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
117 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \
118 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \
119 | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \
120 | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP))
122 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
126 #define INVALID_PAGE (~(hpa_t)0)
127 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
129 #define UNMAPPED_GVA (~(gpa_t)0)
130 #define INVALID_GPA (~(gpa_t)0)
132 /* KVM Hugepage definitions for x86 */
133 #define KVM_MAX_HUGEPAGE_LEVEL PG_LEVEL_1G
134 #define KVM_NR_PAGE_SIZES (KVM_MAX_HUGEPAGE_LEVEL - PG_LEVEL_4K + 1)
135 #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9)
136 #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x))
137 #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x))
138 #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1))
139 #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE)
141 #define KVM_MEMSLOT_PAGES_TO_MMU_PAGES_RATIO 50
142 #define KVM_MIN_ALLOC_MMU_PAGES 64UL
143 #define KVM_MMU_HASH_SHIFT 12
144 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
145 #define KVM_MIN_FREE_MMU_PAGES 5
146 #define KVM_REFILL_PAGES 25
147 #define KVM_MAX_CPUID_ENTRIES 256
148 #define KVM_NR_FIXED_MTRR_REGION 88
149 #define KVM_NR_VAR_MTRR 8
151 #define ASYNC_PF_PER_VCPU 64
154 VCPU_REGS_RAX = __VCPU_REGS_RAX,
155 VCPU_REGS_RCX = __VCPU_REGS_RCX,
156 VCPU_REGS_RDX = __VCPU_REGS_RDX,
157 VCPU_REGS_RBX = __VCPU_REGS_RBX,
158 VCPU_REGS_RSP = __VCPU_REGS_RSP,
159 VCPU_REGS_RBP = __VCPU_REGS_RBP,
160 VCPU_REGS_RSI = __VCPU_REGS_RSI,
161 VCPU_REGS_RDI = __VCPU_REGS_RDI,
163 VCPU_REGS_R8 = __VCPU_REGS_R8,
164 VCPU_REGS_R9 = __VCPU_REGS_R9,
165 VCPU_REGS_R10 = __VCPU_REGS_R10,
166 VCPU_REGS_R11 = __VCPU_REGS_R11,
167 VCPU_REGS_R12 = __VCPU_REGS_R12,
168 VCPU_REGS_R13 = __VCPU_REGS_R13,
169 VCPU_REGS_R14 = __VCPU_REGS_R14,
170 VCPU_REGS_R15 = __VCPU_REGS_R15,
175 VCPU_EXREG_PDPTR = NR_VCPU_REGS,
181 VCPU_EXREG_EXIT_INFO_1,
182 VCPU_EXREG_EXIT_INFO_2,
196 enum exit_fastpath_completion {
198 EXIT_FASTPATH_REENTER_GUEST,
199 EXIT_FASTPATH_EXIT_HANDLED,
201 typedef enum exit_fastpath_completion fastpath_t;
203 struct x86_emulate_ctxt;
204 struct x86_exception;
206 enum x86_intercept_stage;
208 #define KVM_NR_DB_REGS 4
210 #define DR6_BUS_LOCK (1 << 11)
211 #define DR6_BD (1 << 13)
212 #define DR6_BS (1 << 14)
213 #define DR6_BT (1 << 15)
214 #define DR6_RTM (1 << 16)
216 * DR6_ACTIVE_LOW combines fixed-1 and active-low bits.
217 * We can regard all the bits in DR6_FIXED_1 as active_low bits;
218 * they will never be 0 for now, but when they are defined
219 * in the future it will require no code change.
221 * DR6_ACTIVE_LOW is also used as the init/reset value for DR6.
223 #define DR6_ACTIVE_LOW 0xffff0ff0
224 #define DR6_VOLATILE 0x0001e80f
225 #define DR6_FIXED_1 (DR6_ACTIVE_LOW & ~DR6_VOLATILE)
227 #define DR7_BP_EN_MASK 0x000000ff
228 #define DR7_GE (1 << 9)
229 #define DR7_GD (1 << 13)
230 #define DR7_FIXED_1 0x00000400
231 #define DR7_VOLATILE 0xffff2bff
233 #define KVM_GUESTDBG_VALID_MASK \
234 (KVM_GUESTDBG_ENABLE | \
235 KVM_GUESTDBG_SINGLESTEP | \
236 KVM_GUESTDBG_USE_HW_BP | \
237 KVM_GUESTDBG_USE_SW_BP | \
238 KVM_GUESTDBG_INJECT_BP | \
239 KVM_GUESTDBG_INJECT_DB | \
240 KVM_GUESTDBG_BLOCKIRQ)
243 #define PFERR_PRESENT_BIT 0
244 #define PFERR_WRITE_BIT 1
245 #define PFERR_USER_BIT 2
246 #define PFERR_RSVD_BIT 3
247 #define PFERR_FETCH_BIT 4
248 #define PFERR_PK_BIT 5
249 #define PFERR_SGX_BIT 15
250 #define PFERR_GUEST_FINAL_BIT 32
251 #define PFERR_GUEST_PAGE_BIT 33
253 #define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT)
254 #define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT)
255 #define PFERR_USER_MASK (1U << PFERR_USER_BIT)
256 #define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT)
257 #define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT)
258 #define PFERR_PK_MASK (1U << PFERR_PK_BIT)
259 #define PFERR_SGX_MASK (1U << PFERR_SGX_BIT)
260 #define PFERR_GUEST_FINAL_MASK (1ULL << PFERR_GUEST_FINAL_BIT)
261 #define PFERR_GUEST_PAGE_MASK (1ULL << PFERR_GUEST_PAGE_BIT)
263 #define PFERR_NESTED_GUEST_PAGE (PFERR_GUEST_PAGE_MASK | \
267 /* apic attention bits */
268 #define KVM_APIC_CHECK_VAPIC 0
270 * The following bit is set with PV-EOI, unset on EOI.
271 * We detect PV-EOI changes by guest by comparing
272 * this bit with PV-EOI in guest memory.
273 * See the implementation in apic_update_pv_eoi.
275 #define KVM_APIC_PV_EOI_PENDING 1
277 struct kvm_kernel_irq_routing_entry;
280 * kvm_mmu_page_role tracks the properties of a shadow page (where shadow page
281 * also includes TDP pages) to determine whether or not a page can be used in
282 * the given MMU context. This is a subset of the overall kvm_mmu_role to
283 * minimize the size of kvm_memory_slot.arch.gfn_track, i.e. allows allocating
284 * 2 bytes per gfn instead of 4 bytes per gfn.
286 * Indirect upper-level shadow pages are tracked for write-protection via
287 * gfn_track. As above, gfn_track is a 16 bit counter, so KVM must not create
288 * more than 2^16-1 upper-level shadow pages at a single gfn, otherwise
289 * gfn_track will overflow and explosions will ensure.
291 * A unique shadow page (SP) for a gfn is created if and only if an existing SP
292 * cannot be reused. The ability to reuse a SP is tracked by its role, which
293 * incorporates various mode bits and properties of the SP. Roughly speaking,
294 * the number of unique SPs that can theoretically be created is 2^n, where n
295 * is the number of bits that are used to compute the role.
297 * But, even though there are 19 bits in the mask below, not all combinations
298 * of modes and flags are possible:
300 * - invalid shadow pages are not accounted, so the bits are effectively 18
302 * - quadrant will only be used if has_4_byte_gpte=1 (non-PAE paging);
303 * execonly and ad_disabled are only used for nested EPT which has
304 * has_4_byte_gpte=0. Therefore, 2 bits are always unused.
306 * - the 4 bits of level are effectively limited to the values 2/3/4/5,
307 * as 4k SPs are not tracked (allowed to go unsync). In addition non-PAE
308 * paging has exactly one upper level, making level completely redundant
309 * when has_4_byte_gpte=1.
311 * - on top of this, smep_andnot_wp and smap_andnot_wp are only set if
312 * cr0_wp=0, therefore these three bits only give rise to 5 possibilities.
314 * Therefore, the maximum number of possible upper-level shadow pages for a
315 * single gfn is a bit less than 2^13.
317 union kvm_mmu_page_role {
321 unsigned has_4_byte_gpte:1;
328 unsigned smep_andnot_wp:1;
329 unsigned smap_andnot_wp:1;
330 unsigned ad_disabled:1;
331 unsigned guest_mode:1;
335 * This is left at the top of the word so that
336 * kvm_memslots_for_spte_role can extract it with a
337 * simple shift. While there is room, give it a whole
338 * byte so it is also faster to load it from memory.
345 * kvm_mmu_extended_role complements kvm_mmu_page_role, tracking properties
346 * relevant to the current MMU configuration. When loading CR0, CR4, or EFER,
347 * including on nested transitions, if nothing in the full role changes then
348 * MMU re-configuration can be skipped. @valid bit is set on first usage so we
349 * don't treat all-zero structure as valid data.
351 * The properties that are tracked in the extended role but not the page role
352 * are for things that either (a) do not affect the validity of the shadow page
353 * or (b) are indirectly reflected in the shadow page's role. For example,
354 * CR4.PKE only affects permission checks for software walks of the guest page
355 * tables (because KVM doesn't support Protection Keys with shadow paging), and
356 * CR0.PG, CR4.PAE, and CR4.PSE are indirectly reflected in role.level.
358 * Note, SMEP and SMAP are not redundant with sm*p_andnot_wp in the page role.
359 * If CR0.WP=1, KVM can reuse shadow pages for the guest regardless of SMEP and
360 * SMAP, but the MMU's permission checks for software walks need to be SMEP and
361 * SMAP aware regardless of CR0.WP.
363 union kvm_mmu_extended_role {
366 unsigned int valid:1;
367 unsigned int execonly:1;
368 unsigned int cr0_pg:1;
369 unsigned int cr4_pae:1;
370 unsigned int cr4_pse:1;
371 unsigned int cr4_pke:1;
372 unsigned int cr4_smap:1;
373 unsigned int cr4_smep:1;
374 unsigned int cr4_la57:1;
375 unsigned int efer_lma:1;
382 union kvm_mmu_page_role base;
383 union kvm_mmu_extended_role ext;
387 struct kvm_rmap_head {
391 struct kvm_pio_request {
392 unsigned long linear_rip;
399 #define PT64_ROOT_MAX_LEVEL 5
401 struct rsvd_bits_validate {
402 u64 rsvd_bits_mask[2][PT64_ROOT_MAX_LEVEL];
406 struct kvm_mmu_root_info {
411 #define KVM_MMU_ROOT_INFO_INVALID \
412 ((struct kvm_mmu_root_info) { .pgd = INVALID_PAGE, .hpa = INVALID_PAGE })
414 #define KVM_MMU_NUM_PREV_ROOTS 3
416 #define KVM_HAVE_MMU_RWLOCK
419 struct kvm_page_fault;
422 * x86 supports 4 paging modes (5-level 64-bit, 4-level 64-bit, 3-level 32-bit,
423 * and 2-level 32-bit). The kvm_mmu structure abstracts the details of the
427 unsigned long (*get_guest_pgd)(struct kvm_vcpu *vcpu);
428 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index);
429 int (*page_fault)(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault);
430 void (*inject_page_fault)(struct kvm_vcpu *vcpu,
431 struct x86_exception *fault);
432 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
433 gpa_t gva_or_gpa, u32 access,
434 struct x86_exception *exception);
435 int (*sync_page)(struct kvm_vcpu *vcpu,
436 struct kvm_mmu_page *sp);
437 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva, hpa_t root_hpa);
438 struct kvm_mmu_root_info root;
439 union kvm_mmu_role mmu_role;
441 u8 shadow_root_level;
444 struct kvm_mmu_root_info prev_roots[KVM_MMU_NUM_PREV_ROOTS];
447 * Bitmap; bit set = permission fault
448 * Byte index: page fault error code [4:1]
449 * Bit index: pte permissions in ACC_* format
454 * The pkru_mask indicates if protection key checks are needed. It
455 * consists of 16 domains indexed by page fault error code bits [4:1],
456 * with PFEC.RSVD replaced by ACC_USER_MASK from the page tables.
457 * Each domain has 2 bits which are ANDed with AD and WD from PKRU.
466 * check zero bits on shadow page table entries, these
467 * bits include not only hardware reserved bits but also
468 * the bits spte never used.
470 struct rsvd_bits_validate shadow_zero_check;
472 struct rsvd_bits_validate guest_rsvd_check;
474 u64 pdptrs[4]; /* pae */
477 struct kvm_tlb_range {
492 struct perf_event *perf_event;
493 struct kvm_vcpu *vcpu;
495 * eventsel value for general purpose counters,
496 * ctrl value for fixed counters.
504 unsigned nr_arch_gp_counters;
505 unsigned nr_arch_fixed_counters;
506 unsigned available_event_types;
510 u64 counter_bitmask[2];
511 u64 global_ctrl_mask;
512 u64 global_ovf_ctrl_mask;
515 struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC];
516 struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED];
517 struct irq_work irq_work;
518 DECLARE_BITMAP(reprogram_pmi, X86_PMC_IDX_MAX);
519 DECLARE_BITMAP(all_valid_pmc_idx, X86_PMC_IDX_MAX);
520 DECLARE_BITMAP(pmc_in_use, X86_PMC_IDX_MAX);
523 * The gate to release perf_events not marked in
524 * pmc_in_use only once in a vcpu time slice.
529 * The total number of programmed perf_events and it helps to avoid
530 * redundant check before cleanup if guest don't use vPMU at all.
538 KVM_DEBUGREG_BP_ENABLED = 1,
539 KVM_DEBUGREG_WONT_EXIT = 2,
542 struct kvm_mtrr_range {
545 struct list_head node;
549 struct kvm_mtrr_range var_ranges[KVM_NR_VAR_MTRR];
550 mtrr_type fixed_ranges[KVM_NR_FIXED_MTRR_REGION];
553 struct list_head head;
556 /* Hyper-V SynIC timer */
557 struct kvm_vcpu_hv_stimer {
558 struct hrtimer timer;
560 union hv_stimer_config config;
563 struct hv_message msg;
567 /* Hyper-V synthetic interrupt controller (SynIC)*/
568 struct kvm_vcpu_hv_synic {
573 atomic64_t sint[HV_SYNIC_SINT_COUNT];
574 atomic_t sint_to_gsi[HV_SYNIC_SINT_COUNT];
575 DECLARE_BITMAP(auto_eoi_bitmap, 256);
576 DECLARE_BITMAP(vec_bitmap, 256);
578 bool dont_zero_synic_pages;
581 /* Hyper-V per vcpu emulation context */
583 struct kvm_vcpu *vcpu;
587 struct kvm_vcpu_hv_synic synic;
588 struct kvm_hyperv_exit exit;
589 struct kvm_vcpu_hv_stimer stimer[HV_SYNIC_STIMER_COUNT];
590 DECLARE_BITMAP(stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT);
593 u32 features_eax; /* HYPERV_CPUID_FEATURES.EAX */
594 u32 features_ebx; /* HYPERV_CPUID_FEATURES.EBX */
595 u32 features_edx; /* HYPERV_CPUID_FEATURES.EDX */
596 u32 enlightenments_eax; /* HYPERV_CPUID_ENLIGHTMENT_INFO.EAX */
597 u32 enlightenments_ebx; /* HYPERV_CPUID_ENLIGHTMENT_INFO.EBX */
598 u32 syndbg_cap_eax; /* HYPERV_CPUID_SYNDBG_PLATFORM_CAPABILITIES.EAX */
602 /* Xen HVM per vcpu emulation context */
603 struct kvm_vcpu_xen {
605 u32 current_runstate;
607 bool vcpu_time_info_set;
609 struct gfn_to_hva_cache vcpu_info_cache;
610 struct gfn_to_hva_cache vcpu_time_info_cache;
611 struct gfn_to_hva_cache runstate_cache;
613 u64 runstate_entry_time;
614 u64 runstate_times[4];
615 unsigned long evtchn_pending_sel;
618 struct kvm_vcpu_arch {
620 * rip and regs accesses must go through
621 * kvm_{register,rip}_{read,write} functions.
623 unsigned long regs[NR_VCPU_REGS];
628 unsigned long cr0_guest_owned_bits;
632 unsigned long cr4_guest_owned_bits;
633 unsigned long cr4_guest_rsvd_bits;
640 struct kvm_lapic *apic; /* kernel irqchip context */
642 bool load_eoi_exitmap_pending;
643 DECLARE_BITMAP(ioapic_handled_vectors, 256);
644 unsigned long apic_attention;
645 int32_t apic_arb_prio;
647 u64 ia32_misc_enable_msr;
650 bool tpr_access_reporting;
652 bool xfd_no_write_intercept;
654 u64 microcode_version;
655 u64 arch_capabilities;
656 u64 perf_capabilities;
659 * Paging state of the vcpu
661 * If the vcpu runs in guest mode with two level paging this still saves
662 * the paging mode of the l1 guest. This context is always used to
667 /* Non-nested MMU for L1 */
668 struct kvm_mmu root_mmu;
670 /* L1 MMU when running nested */
671 struct kvm_mmu guest_mmu;
674 * Paging state of an L2 guest (used for nested npt)
676 * This context will save all necessary information to walk page tables
677 * of an L2 guest. This context is only initialized for page table
678 * walking and not for faulting since we never handle l2 page faults on
681 struct kvm_mmu nested_mmu;
684 * Pointer to the mmu context currently used for
685 * gva_to_gpa translations.
687 struct kvm_mmu *walk_mmu;
689 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache;
690 struct kvm_mmu_memory_cache mmu_shadow_page_cache;
691 struct kvm_mmu_memory_cache mmu_gfn_array_cache;
692 struct kvm_mmu_memory_cache mmu_page_header_cache;
695 * QEMU userspace and the guest each have their own FPU state.
696 * In vcpu_run, we switch between the user and guest FPU contexts.
697 * While running a VCPU, the VCPU thread will have the guest FPU
700 * Note that while the PKRU state lives inside the fpu registers,
701 * it is switched out separately at VMENTER and VMEXIT time. The
702 * "guest_fpstate" state here contains the guest FPU context, with the
705 struct fpu_guest guest_fpu;
709 struct kvm_pio_request pio;
712 unsigned sev_pio_count;
714 u8 event_exit_inst_len;
716 struct kvm_queued_exception {
722 unsigned long payload;
727 struct kvm_queued_interrupt {
733 int halt_request; /* real mode on Intel only */
736 struct kvm_cpuid_entry2 *cpuid_entries;
739 u64 reserved_gpa_bits;
742 /* emulate context */
744 struct x86_emulate_ctxt *emulate_ctxt;
745 bool emulate_regs_need_sync_to_vcpu;
746 bool emulate_regs_need_sync_from_vcpu;
747 int (*complete_userspace_io)(struct kvm_vcpu *vcpu);
750 struct pvclock_vcpu_time_info hv_clock;
751 unsigned int hw_tsc_khz;
752 struct gfn_to_hva_cache pv_time;
753 bool pv_time_enabled;
754 /* set guest stopped flag in pvclock flags field */
755 bool pvclock_set_guest_stopped_request;
761 struct gfn_to_hva_cache cache;
765 u64 tsc_offset; /* current tsc offset */
768 u64 tsc_offset_adjustment;
771 u64 this_tsc_generation;
773 bool tsc_always_catchup;
774 s8 virtual_tsc_shift;
775 u32 virtual_tsc_mult;
777 s64 ia32_tsc_adjust_msr;
778 u64 msr_ia32_power_ctl;
779 u64 l1_tsc_scaling_ratio;
780 u64 tsc_scaling_ratio; /* current scaling ratio */
782 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */
783 unsigned nmi_pending; /* NMI queued after currently running handler */
784 bool nmi_injected; /* Trying to inject an NMI this entry */
785 bool smi_pending; /* SMI queued after currently running handler */
786 u8 handling_intr_from_guest;
788 struct kvm_mtrr mtrr_state;
791 unsigned switch_db_regs;
792 unsigned long db[KVM_NR_DB_REGS];
795 unsigned long eff_db[KVM_NR_DB_REGS];
796 unsigned long guest_debug_dr7;
797 u64 msr_platform_info;
798 u64 msr_misc_features_enables;
806 /* Cache MMIO info */
808 unsigned mmio_access;
814 /* used for guest single stepping over the given code position */
815 unsigned long singlestep_rip;
818 struct kvm_vcpu_hv *hyperv;
819 struct kvm_vcpu_xen xen;
821 cpumask_var_t wbinvd_dirty_mask;
823 unsigned long last_retry_eip;
824 unsigned long last_retry_addr;
828 gfn_t gfns[ASYNC_PF_PER_VCPU];
829 struct gfn_to_hva_cache data;
830 u64 msr_en_val; /* MSR_KVM_ASYNC_PF_EN */
831 u64 msr_int_val; /* MSR_KVM_ASYNC_PF_INT */
836 unsigned long nested_apf_token;
837 bool delivery_as_pf_vmexit;
838 bool pageready_pending;
841 /* OSVW MSRs (AMD only) */
849 struct gfn_to_hva_cache data;
852 u64 msr_kvm_poll_control;
855 * Indicates the guest is trying to write a gfn that contains one or
856 * more of the PTEs used to translate the write itself, i.e. the access
857 * is changing its own translation in the guest page tables. KVM exits
858 * to userspace if emulation of the faulting instruction fails and this
859 * flag is set, as KVM cannot make forward progress.
861 * If emulation fails for a write to guest page tables, KVM unprotects
862 * (zaps) the shadow page for the target gfn and resumes the guest to
863 * retry the non-emulatable instruction (on hardware). Unprotecting the
864 * gfn doesn't allow forward progress for a self-changing access because
865 * doing so also zaps the translation for the gfn, i.e. retrying the
866 * instruction will hit a !PRESENT fault, which results in a new shadow
867 * page and sends KVM back to square one.
869 bool write_fault_to_shadow_pgtable;
871 /* set at EPT violation at this point */
872 unsigned long exit_qualification;
874 /* pv related host specific info */
879 int pending_ioapic_eoi;
880 int pending_external_vector;
882 /* be preempted when it's in kernel-mode(cpl=0) */
883 bool preempted_in_kernel;
885 /* Flush the L1 Data cache for L1TF mitigation on VMENTER */
888 /* Host CPU on which VM-entry was most recently attempted */
889 int last_vmentry_cpu;
891 /* AMD MSRC001_0015 Hardware Configuration */
894 /* pv related cpuid info */
897 * value of the eax register in the KVM_CPUID_FEATURES CPUID
903 * indicates whether pv emulation should be disabled if features
904 * are not present in the guest's cpuid
909 /* Protected Guests */
910 bool guest_state_protected;
913 * Set when PDPTS were loaded directly by the userspace without
914 * reading the guest memory
916 bool pdptrs_from_userspace;
918 #if IS_ENABLED(CONFIG_HYPERV)
923 struct kvm_lpage_info {
927 struct kvm_arch_memory_slot {
928 struct kvm_rmap_head *rmap[KVM_NR_PAGE_SIZES];
929 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1];
930 unsigned short *gfn_track[KVM_PAGE_TRACK_MAX];
934 * We use as the mode the number of bits allocated in the LDR for the
935 * logical processor ID. It happens that these are all powers of two.
936 * This makes it is very easy to detect cases where the APICs are
937 * configured for multiple modes; in that case, we cannot use the map and
938 * hence cannot use kvm_irq_delivery_to_apic_fast either.
940 #define KVM_APIC_MODE_XAPIC_CLUSTER 4
941 #define KVM_APIC_MODE_XAPIC_FLAT 8
942 #define KVM_APIC_MODE_X2APIC 16
944 struct kvm_apic_map {
949 struct kvm_lapic *xapic_flat_map[8];
950 struct kvm_lapic *xapic_cluster_map[16][4];
952 struct kvm_lapic *phys_map[];
955 /* Hyper-V synthetic debugger (SynDbg)*/
956 struct kvm_hv_syndbg {
967 /* Current state of Hyper-V TSC page clocksource */
968 enum hv_tsc_page_status {
969 /* TSC page was not set up or disabled */
970 HV_TSC_PAGE_UNSET = 0,
971 /* TSC page MSR was written by the guest, update pending */
972 HV_TSC_PAGE_GUEST_CHANGED,
973 /* TSC page MSR was written by KVM userspace, update pending */
974 HV_TSC_PAGE_HOST_CHANGED,
975 /* TSC page was properly set up and is currently active */
977 /* TSC page is currently being updated and therefore is inactive */
978 HV_TSC_PAGE_UPDATING,
979 /* TSC page was set up with an inaccessible GPA */
983 /* Hyper-V emulation context */
985 struct mutex hv_lock;
989 enum hv_tsc_page_status hv_tsc_page_status;
991 /* Hyper-v based guest crash (NT kernel bugcheck) parameters */
992 u64 hv_crash_param[HV_X64_MSR_CRASH_PARAMS];
995 struct ms_hyperv_tsc_page tsc_ref;
997 struct idr conn_to_evt;
999 u64 hv_reenlightenment_control;
1000 u64 hv_tsc_emulation_control;
1001 u64 hv_tsc_emulation_status;
1003 /* How many vCPUs have VP index != vCPU index */
1004 atomic_t num_mismatched_vp_indexes;
1007 * How many SynICs use 'AutoEOI' feature
1008 * (protected by arch.apicv_update_lock)
1010 unsigned int synic_auto_eoi_used;
1012 struct hv_partition_assist_pg *hv_pa_pg;
1013 struct kvm_hv_syndbg hv_syndbg;
1016 struct msr_bitmap_range {
1020 unsigned long *bitmap;
1023 /* Xen emulation context */
1027 struct gfn_to_pfn_cache shinfo_cache;
1030 enum kvm_irqchip_mode {
1032 KVM_IRQCHIP_KERNEL, /* created with KVM_CREATE_IRQCHIP */
1033 KVM_IRQCHIP_SPLIT, /* created with KVM_CAP_SPLIT_IRQCHIP */
1036 struct kvm_x86_msr_filter {
1038 bool default_allow:1;
1039 struct msr_bitmap_range ranges[16];
1042 #define APICV_INHIBIT_REASON_DISABLE 0
1043 #define APICV_INHIBIT_REASON_HYPERV 1
1044 #define APICV_INHIBIT_REASON_NESTED 2
1045 #define APICV_INHIBIT_REASON_IRQWIN 3
1046 #define APICV_INHIBIT_REASON_PIT_REINJ 4
1047 #define APICV_INHIBIT_REASON_X2APIC 5
1048 #define APICV_INHIBIT_REASON_BLOCKIRQ 6
1049 #define APICV_INHIBIT_REASON_ABSENT 7
1052 unsigned long n_used_mmu_pages;
1053 unsigned long n_requested_mmu_pages;
1054 unsigned long n_max_mmu_pages;
1055 unsigned int indirect_shadow_pages;
1057 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
1058 struct list_head active_mmu_pages;
1059 struct list_head zapped_obsolete_pages;
1060 struct list_head lpage_disallowed_mmu_pages;
1061 struct kvm_page_track_notifier_node mmu_sp_tracker;
1062 struct kvm_page_track_notifier_head track_notifier_head;
1064 * Protects marking pages unsync during page faults, as TDP MMU page
1065 * faults only take mmu_lock for read. For simplicity, the unsync
1066 * pages lock is always taken when marking pages unsync regardless of
1067 * whether mmu_lock is held for read or write.
1069 spinlock_t mmu_unsync_pages_lock;
1071 struct list_head assigned_dev_head;
1072 struct iommu_domain *iommu_domain;
1073 bool iommu_noncoherent;
1074 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA
1075 atomic_t noncoherent_dma_count;
1076 #define __KVM_HAVE_ARCH_ASSIGNED_DEVICE
1077 atomic_t assigned_device_count;
1078 struct kvm_pic *vpic;
1079 struct kvm_ioapic *vioapic;
1080 struct kvm_pit *vpit;
1081 atomic_t vapics_in_nmi_mode;
1082 struct mutex apic_map_lock;
1083 struct kvm_apic_map __rcu *apic_map;
1084 atomic_t apic_map_dirty;
1086 /* Protects apic_access_memslot_enabled and apicv_inhibit_reasons */
1087 struct rw_semaphore apicv_update_lock;
1089 bool apic_access_memslot_enabled;
1090 unsigned long apicv_inhibit_reasons;
1094 bool mwait_in_guest;
1096 bool pause_in_guest;
1097 bool cstate_in_guest;
1099 unsigned long irq_sources_bitmap;
1100 s64 kvmclock_offset;
1103 * This also protects nr_vcpus_matched_tsc which is read from a
1104 * preemption-disabled region, so it must be a raw spinlock.
1106 raw_spinlock_t tsc_write_lock;
1110 u64 last_tsc_offset;
1114 u64 cur_tsc_generation;
1115 int nr_vcpus_matched_tsc;
1117 seqcount_raw_spinlock_t pvclock_sc;
1118 bool use_master_clock;
1119 u64 master_kernel_ns;
1120 u64 master_cycle_now;
1121 struct delayed_work kvmclock_update_work;
1122 struct delayed_work kvmclock_sync_work;
1124 struct kvm_xen_hvm_config xen_hvm_config;
1126 /* reads protected by irq_srcu, writes by irq_lock */
1127 struct hlist_head mask_notifier_list;
1129 struct kvm_hv hyperv;
1132 bool backwards_tsc_observed;
1133 bool boot_vcpu_runs_old_kvmclock;
1136 u64 disabled_quirks;
1137 int cpu_dirty_logging_count;
1139 enum kvm_irqchip_mode irqchip_mode;
1140 u8 nr_reserved_ioapic_pins;
1142 bool disabled_lapic_found;
1145 bool x2apic_broadcast_quirk_disabled;
1147 bool guest_can_read_msr_platform_info;
1148 bool exception_payload_enabled;
1150 bool bus_lock_detection_enabled;
1153 * If exit_on_emulation_error is set, and the in-kernel instruction
1154 * emulator fails to emulate an instruction, allow userspace
1155 * the opportunity to look at it.
1157 bool exit_on_emulation_error;
1159 /* Deflect RDMSR and WRMSR to user space when they trigger a #GP */
1160 u32 user_space_msr_mask;
1161 struct kvm_x86_msr_filter __rcu *msr_filter;
1163 u32 hypercall_exit_enabled;
1165 /* Guest can access the SGX PROVISIONKEY. */
1166 bool sgx_provisioning_allowed;
1168 struct kvm_pmu_event_filter __rcu *pmu_event_filter;
1169 struct task_struct *nx_lpage_recovery_thread;
1171 #ifdef CONFIG_X86_64
1173 * Whether the TDP MMU is enabled for this VM. This contains a
1174 * snapshot of the TDP MMU module parameter from when the VM was
1175 * created and remains unchanged for the life of the VM. If this is
1176 * true, TDP MMU handler functions will run for various MMU
1179 bool tdp_mmu_enabled;
1182 * List of struct kvm_mmu_pages being used as roots.
1183 * All struct kvm_mmu_pages in the list should have
1186 * For reads, this list is protected by:
1187 * the MMU lock in read mode + RCU or
1188 * the MMU lock in write mode
1190 * For writes, this list is protected by:
1191 * the MMU lock in read mode + the tdp_mmu_pages_lock or
1192 * the MMU lock in write mode
1194 * Roots will remain in the list until their tdp_mmu_root_count
1195 * drops to zero, at which point the thread that decremented the
1196 * count to zero should removed the root from the list and clean
1197 * it up, freeing the root after an RCU grace period.
1199 struct list_head tdp_mmu_roots;
1202 * List of struct kvmp_mmu_pages not being used as roots.
1203 * All struct kvm_mmu_pages in the list should have
1204 * tdp_mmu_page set and a tdp_mmu_root_count of 0.
1206 struct list_head tdp_mmu_pages;
1209 * Protects accesses to the following fields when the MMU lock
1210 * is held in read mode:
1211 * - tdp_mmu_roots (above)
1212 * - tdp_mmu_pages (above)
1213 * - the link field of struct kvm_mmu_pages used by the TDP MMU
1214 * - lpage_disallowed_mmu_pages
1215 * - the lpage_disallowed_link field of struct kvm_mmu_pages used
1217 * It is acceptable, but not necessary, to acquire this lock when
1218 * the thread holds the MMU lock in write mode.
1220 spinlock_t tdp_mmu_pages_lock;
1221 struct workqueue_struct *tdp_mmu_zap_wq;
1222 #endif /* CONFIG_X86_64 */
1225 * If set, at least one shadow root has been allocated. This flag
1226 * is used as one input when determining whether certain memslot
1227 * related allocations are necessary.
1229 bool shadow_root_allocated;
1231 #if IS_ENABLED(CONFIG_HYPERV)
1233 spinlock_t hv_root_tdp_lock;
1237 struct kvm_vm_stat {
1238 struct kvm_vm_stat_generic generic;
1239 u64 mmu_shadow_zapped;
1248 atomic64_t pages_4k;
1249 atomic64_t pages_2m;
1250 atomic64_t pages_1g;
1252 atomic64_t pages[KVM_NR_PAGE_SIZES];
1254 u64 nx_lpage_splits;
1255 u64 max_mmu_page_hash_collisions;
1256 u64 max_mmu_rmap_size;
1259 struct kvm_vcpu_stat {
1260 struct kvm_vcpu_stat_generic generic;
1270 u64 irq_window_exits;
1271 u64 nmi_window_exits;
1274 u64 request_irq_exits;
1276 u64 host_state_reload;
1279 u64 insn_emulation_fail;
1285 u64 directed_yield_attempted;
1286 u64 directed_yield_successful;
1290 struct x86_instruction_info;
1293 bool host_initiated;
1298 struct kvm_lapic_irq {
1306 bool msi_redir_hint;
1309 static inline u16 kvm_lapic_irq_dest_mode(bool dest_mode_logical)
1311 return dest_mode_logical ? APIC_DEST_LOGICAL : APIC_DEST_PHYSICAL;
1314 struct kvm_x86_ops {
1317 int (*hardware_enable)(void);
1318 void (*hardware_disable)(void);
1319 void (*hardware_unsetup)(void);
1320 bool (*has_emulated_msr)(struct kvm *kvm, u32 index);
1321 void (*vcpu_after_set_cpuid)(struct kvm_vcpu *vcpu);
1323 unsigned int vm_size;
1324 int (*vm_init)(struct kvm *kvm);
1325 void (*vm_destroy)(struct kvm *kvm);
1327 /* Create, but do not attach this VCPU */
1328 int (*vcpu_create)(struct kvm_vcpu *vcpu);
1329 void (*vcpu_free)(struct kvm_vcpu *vcpu);
1330 void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event);
1332 void (*prepare_switch_to_guest)(struct kvm_vcpu *vcpu);
1333 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
1334 void (*vcpu_put)(struct kvm_vcpu *vcpu);
1336 void (*update_exception_bitmap)(struct kvm_vcpu *vcpu);
1337 int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
1338 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
1339 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
1340 void (*get_segment)(struct kvm_vcpu *vcpu,
1341 struct kvm_segment *var, int seg);
1342 int (*get_cpl)(struct kvm_vcpu *vcpu);
1343 void (*set_segment)(struct kvm_vcpu *vcpu,
1344 struct kvm_segment *var, int seg);
1345 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
1346 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
1347 void (*post_set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
1348 bool (*is_valid_cr4)(struct kvm_vcpu *vcpu, unsigned long cr0);
1349 void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
1350 int (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
1351 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1352 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1353 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1354 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1355 void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu);
1356 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value);
1357 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
1358 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
1359 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
1360 bool (*get_if_flag)(struct kvm_vcpu *vcpu);
1362 void (*flush_tlb_all)(struct kvm_vcpu *vcpu);
1363 void (*flush_tlb_current)(struct kvm_vcpu *vcpu);
1364 int (*tlb_remote_flush)(struct kvm *kvm);
1365 int (*tlb_remote_flush_with_range)(struct kvm *kvm,
1366 struct kvm_tlb_range *range);
1369 * Flush any TLB entries associated with the given GVA.
1370 * Does not need to flush GPA->HPA mappings.
1371 * Can potentially get non-canonical addresses through INVLPGs, which
1372 * the implementation may choose to ignore if appropriate.
1374 void (*flush_tlb_gva)(struct kvm_vcpu *vcpu, gva_t addr);
1377 * Flush any TLB entries created by the guest. Like tlb_flush_gva(),
1378 * does not need to flush GPA->HPA mappings.
1380 void (*flush_tlb_guest)(struct kvm_vcpu *vcpu);
1382 int (*vcpu_pre_run)(struct kvm_vcpu *vcpu);
1383 enum exit_fastpath_completion (*vcpu_run)(struct kvm_vcpu *vcpu);
1384 int (*handle_exit)(struct kvm_vcpu *vcpu,
1385 enum exit_fastpath_completion exit_fastpath);
1386 int (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
1387 void (*update_emulated_instruction)(struct kvm_vcpu *vcpu);
1388 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
1389 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu);
1390 void (*patch_hypercall)(struct kvm_vcpu *vcpu,
1391 unsigned char *hypercall_addr);
1392 void (*inject_irq)(struct kvm_vcpu *vcpu);
1393 void (*inject_nmi)(struct kvm_vcpu *vcpu);
1394 void (*queue_exception)(struct kvm_vcpu *vcpu);
1395 void (*cancel_injection)(struct kvm_vcpu *vcpu);
1396 int (*interrupt_allowed)(struct kvm_vcpu *vcpu, bool for_injection);
1397 int (*nmi_allowed)(struct kvm_vcpu *vcpu, bool for_injection);
1398 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu);
1399 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked);
1400 void (*enable_nmi_window)(struct kvm_vcpu *vcpu);
1401 void (*enable_irq_window)(struct kvm_vcpu *vcpu);
1402 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);
1403 bool (*check_apicv_inhibit_reasons)(ulong bit);
1404 void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu);
1405 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr);
1406 void (*hwapic_isr_update)(struct kvm_vcpu *vcpu, int isr);
1407 bool (*guest_apic_has_interrupt)(struct kvm_vcpu *vcpu);
1408 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap);
1409 void (*set_virtual_apic_mode)(struct kvm_vcpu *vcpu);
1410 void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu);
1411 void (*deliver_interrupt)(struct kvm_lapic *apic, int delivery_mode,
1412 int trig_mode, int vector);
1413 int (*sync_pir_to_irr)(struct kvm_vcpu *vcpu);
1414 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
1415 int (*set_identity_map_addr)(struct kvm *kvm, u64 ident_addr);
1416 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio);
1418 void (*load_mmu_pgd)(struct kvm_vcpu *vcpu, hpa_t root_hpa,
1421 bool (*has_wbinvd_exit)(void);
1423 u64 (*get_l2_tsc_offset)(struct kvm_vcpu *vcpu);
1424 u64 (*get_l2_tsc_multiplier)(struct kvm_vcpu *vcpu);
1425 void (*write_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset);
1426 void (*write_tsc_multiplier)(struct kvm_vcpu *vcpu, u64 multiplier);
1429 * Retrieve somewhat arbitrary exit information. Intended to
1430 * be used only from within tracepoints or error paths.
1432 void (*get_exit_info)(struct kvm_vcpu *vcpu, u32 *reason,
1433 u64 *info1, u64 *info2,
1434 u32 *exit_int_info, u32 *exit_int_info_err_code);
1436 int (*check_intercept)(struct kvm_vcpu *vcpu,
1437 struct x86_instruction_info *info,
1438 enum x86_intercept_stage stage,
1439 struct x86_exception *exception);
1440 void (*handle_exit_irqoff)(struct kvm_vcpu *vcpu);
1442 void (*request_immediate_exit)(struct kvm_vcpu *vcpu);
1444 void (*sched_in)(struct kvm_vcpu *kvm, int cpu);
1447 * Size of the CPU's dirty log buffer, i.e. VMX's PML buffer. A zero
1448 * value indicates CPU dirty logging is unsupported or disabled.
1450 int cpu_dirty_log_size;
1451 void (*update_cpu_dirty_logging)(struct kvm_vcpu *vcpu);
1453 /* pmu operations of sub-arch */
1454 const struct kvm_pmu_ops *pmu_ops;
1455 const struct kvm_x86_nested_ops *nested_ops;
1457 void (*vcpu_blocking)(struct kvm_vcpu *vcpu);
1458 void (*vcpu_unblocking)(struct kvm_vcpu *vcpu);
1460 int (*pi_update_irte)(struct kvm *kvm, unsigned int host_irq,
1461 uint32_t guest_irq, bool set);
1462 void (*pi_start_assignment)(struct kvm *kvm);
1463 void (*apicv_post_state_restore)(struct kvm_vcpu *vcpu);
1464 bool (*dy_apicv_has_pending_interrupt)(struct kvm_vcpu *vcpu);
1466 int (*set_hv_timer)(struct kvm_vcpu *vcpu, u64 guest_deadline_tsc,
1468 void (*cancel_hv_timer)(struct kvm_vcpu *vcpu);
1470 void (*setup_mce)(struct kvm_vcpu *vcpu);
1472 int (*smi_allowed)(struct kvm_vcpu *vcpu, bool for_injection);
1473 int (*enter_smm)(struct kvm_vcpu *vcpu, char *smstate);
1474 int (*leave_smm)(struct kvm_vcpu *vcpu, const char *smstate);
1475 void (*enable_smi_window)(struct kvm_vcpu *vcpu);
1477 int (*mem_enc_ioctl)(struct kvm *kvm, void __user *argp);
1478 int (*mem_enc_register_region)(struct kvm *kvm, struct kvm_enc_region *argp);
1479 int (*mem_enc_unregister_region)(struct kvm *kvm, struct kvm_enc_region *argp);
1480 int (*vm_copy_enc_context_from)(struct kvm *kvm, unsigned int source_fd);
1481 int (*vm_move_enc_context_from)(struct kvm *kvm, unsigned int source_fd);
1483 int (*get_msr_feature)(struct kvm_msr_entry *entry);
1485 bool (*can_emulate_instruction)(struct kvm_vcpu *vcpu, int emul_type,
1486 void *insn, int insn_len);
1488 bool (*apic_init_signal_blocked)(struct kvm_vcpu *vcpu);
1489 int (*enable_direct_tlbflush)(struct kvm_vcpu *vcpu);
1491 void (*migrate_timers)(struct kvm_vcpu *vcpu);
1492 void (*msr_filter_changed)(struct kvm_vcpu *vcpu);
1493 int (*complete_emulated_msr)(struct kvm_vcpu *vcpu, int err);
1495 void (*vcpu_deliver_sipi_vector)(struct kvm_vcpu *vcpu, u8 vector);
1498 struct kvm_x86_nested_ops {
1499 void (*leave_nested)(struct kvm_vcpu *vcpu);
1500 int (*check_events)(struct kvm_vcpu *vcpu);
1501 bool (*hv_timer_pending)(struct kvm_vcpu *vcpu);
1502 void (*triple_fault)(struct kvm_vcpu *vcpu);
1503 int (*get_state)(struct kvm_vcpu *vcpu,
1504 struct kvm_nested_state __user *user_kvm_nested_state,
1505 unsigned user_data_size);
1506 int (*set_state)(struct kvm_vcpu *vcpu,
1507 struct kvm_nested_state __user *user_kvm_nested_state,
1508 struct kvm_nested_state *kvm_state);
1509 bool (*get_nested_state_pages)(struct kvm_vcpu *vcpu);
1510 int (*write_log_dirty)(struct kvm_vcpu *vcpu, gpa_t l2_gpa);
1512 int (*enable_evmcs)(struct kvm_vcpu *vcpu,
1513 uint16_t *vmcs_version);
1514 uint16_t (*get_evmcs_version)(struct kvm_vcpu *vcpu);
1517 struct kvm_x86_init_ops {
1518 int (*cpu_has_kvm_support)(void);
1519 int (*disabled_by_bios)(void);
1520 int (*check_processor_compatibility)(void);
1521 int (*hardware_setup)(void);
1522 unsigned int (*handle_intel_pt_intr)(void);
1524 struct kvm_x86_ops *runtime_ops;
1527 struct kvm_arch_async_pf {
1534 extern u32 __read_mostly kvm_nr_uret_msrs;
1535 extern u64 __read_mostly host_efer;
1536 extern bool __read_mostly allow_smaller_maxphyaddr;
1537 extern bool __read_mostly enable_apicv;
1538 extern struct kvm_x86_ops kvm_x86_ops;
1540 #define KVM_X86_OP(func) \
1541 DECLARE_STATIC_CALL(kvm_x86_##func, *(((struct kvm_x86_ops *)0)->func));
1542 #define KVM_X86_OP_OPTIONAL KVM_X86_OP
1543 #define KVM_X86_OP_OPTIONAL_RET0 KVM_X86_OP
1544 #include <asm/kvm-x86-ops.h>
1546 static inline void kvm_ops_static_call_update(void)
1548 #define __KVM_X86_OP(func) \
1549 static_call_update(kvm_x86_##func, kvm_x86_ops.func);
1550 #define KVM_X86_OP(func) \
1551 WARN_ON(!kvm_x86_ops.func); __KVM_X86_OP(func)
1552 #define KVM_X86_OP_OPTIONAL __KVM_X86_OP
1553 #define KVM_X86_OP_OPTIONAL_RET0(func) \
1554 static_call_update(kvm_x86_##func, (void *)kvm_x86_ops.func ? : \
1555 (void *)__static_call_return0);
1556 #include <asm/kvm-x86-ops.h>
1560 #define __KVM_HAVE_ARCH_VM_ALLOC
1561 static inline struct kvm *kvm_arch_alloc_vm(void)
1563 return __vmalloc(kvm_x86_ops.vm_size, GFP_KERNEL_ACCOUNT | __GFP_ZERO);
1566 #define __KVM_HAVE_ARCH_VM_FREE
1567 void kvm_arch_free_vm(struct kvm *kvm);
1569 #define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLB
1570 static inline int kvm_arch_flush_remote_tlb(struct kvm *kvm)
1572 if (kvm_x86_ops.tlb_remote_flush &&
1573 !static_call(kvm_x86_tlb_remote_flush)(kvm))
1579 #define kvm_arch_pmi_in_guest(vcpu) \
1580 ((vcpu) && (vcpu)->arch.handling_intr_from_guest)
1582 int kvm_mmu_module_init(void);
1583 void kvm_mmu_module_exit(void);
1585 void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
1586 int kvm_mmu_create(struct kvm_vcpu *vcpu);
1587 void kvm_mmu_init_vm(struct kvm *kvm);
1588 void kvm_mmu_uninit_vm(struct kvm *kvm);
1590 void kvm_mmu_after_set_cpuid(struct kvm_vcpu *vcpu);
1591 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
1592 void kvm_mmu_slot_remove_write_access(struct kvm *kvm,
1593 const struct kvm_memory_slot *memslot,
1595 void kvm_mmu_slot_try_split_huge_pages(struct kvm *kvm,
1596 const struct kvm_memory_slot *memslot,
1598 void kvm_mmu_try_split_huge_pages(struct kvm *kvm,
1599 const struct kvm_memory_slot *memslot,
1602 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm,
1603 const struct kvm_memory_slot *memslot);
1604 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm,
1605 const struct kvm_memory_slot *memslot);
1606 void kvm_mmu_zap_all(struct kvm *kvm);
1607 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, u64 gen);
1608 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned long kvm_nr_mmu_pages);
1610 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3);
1612 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
1613 const void *val, int bytes);
1615 struct kvm_irq_mask_notifier {
1616 void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked);
1618 struct hlist_node link;
1621 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
1622 struct kvm_irq_mask_notifier *kimn);
1623 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
1624 struct kvm_irq_mask_notifier *kimn);
1625 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin,
1628 extern bool tdp_enabled;
1630 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu);
1632 /* control of guest tsc rate supported? */
1633 extern bool kvm_has_tsc_control;
1634 /* maximum supported tsc_khz for guests */
1635 extern u32 kvm_max_guest_tsc_khz;
1636 /* number of bits of the fractional part of the TSC scaling ratio */
1637 extern u8 kvm_tsc_scaling_ratio_frac_bits;
1638 /* maximum allowed value of TSC scaling ratio */
1639 extern u64 kvm_max_tsc_scaling_ratio;
1640 /* 1ull << kvm_tsc_scaling_ratio_frac_bits */
1641 extern u64 kvm_default_tsc_scaling_ratio;
1642 /* bus lock detection supported? */
1643 extern bool kvm_has_bus_lock_exit;
1645 extern u64 kvm_mce_cap_supported;
1648 * EMULTYPE_NO_DECODE - Set when re-emulating an instruction (after completing
1649 * userspace I/O) to indicate that the emulation context
1650 * should be reused as is, i.e. skip initialization of
1651 * emulation context, instruction fetch and decode.
1653 * EMULTYPE_TRAP_UD - Set when emulating an intercepted #UD from hardware.
1654 * Indicates that only select instructions (tagged with
1655 * EmulateOnUD) should be emulated (to minimize the emulator
1656 * attack surface). See also EMULTYPE_TRAP_UD_FORCED.
1658 * EMULTYPE_SKIP - Set when emulating solely to skip an instruction, i.e. to
1659 * decode the instruction length. For use *only* by
1660 * kvm_x86_ops.skip_emulated_instruction() implementations if
1661 * EMULTYPE_COMPLETE_USER_EXIT is not set.
1663 * EMULTYPE_ALLOW_RETRY_PF - Set when the emulator should resume the guest to
1664 * retry native execution under certain conditions,
1665 * Can only be set in conjunction with EMULTYPE_PF.
1667 * EMULTYPE_TRAP_UD_FORCED - Set when emulating an intercepted #UD that was
1668 * triggered by KVM's magic "force emulation" prefix,
1669 * which is opt in via module param (off by default).
1670 * Bypasses EmulateOnUD restriction despite emulating
1671 * due to an intercepted #UD (see EMULTYPE_TRAP_UD).
1672 * Used to test the full emulator from userspace.
1674 * EMULTYPE_VMWARE_GP - Set when emulating an intercepted #GP for VMware
1675 * backdoor emulation, which is opt in via module param.
1676 * VMware backdoor emulation handles select instructions
1677 * and reinjects the #GP for all other cases.
1679 * EMULTYPE_PF - Set when emulating MMIO by way of an intercepted #PF, in which
1680 * case the CR2/GPA value pass on the stack is valid.
1682 * EMULTYPE_COMPLETE_USER_EXIT - Set when the emulator should update interruptibility
1683 * state and inject single-step #DBs after skipping
1684 * an instruction (after completing userspace I/O).
1686 #define EMULTYPE_NO_DECODE (1 << 0)
1687 #define EMULTYPE_TRAP_UD (1 << 1)
1688 #define EMULTYPE_SKIP (1 << 2)
1689 #define EMULTYPE_ALLOW_RETRY_PF (1 << 3)
1690 #define EMULTYPE_TRAP_UD_FORCED (1 << 4)
1691 #define EMULTYPE_VMWARE_GP (1 << 5)
1692 #define EMULTYPE_PF (1 << 6)
1693 #define EMULTYPE_COMPLETE_USER_EXIT (1 << 7)
1695 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type);
1696 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
1697 void *insn, int insn_len);
1698 void __kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu,
1699 u64 *data, u8 ndata);
1700 void kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu);
1702 void kvm_enable_efer_bits(u64);
1703 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer);
1704 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data, bool host_initiated);
1705 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data);
1706 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data);
1707 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu);
1708 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu);
1709 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu);
1710 int kvm_emulate_invd(struct kvm_vcpu *vcpu);
1711 int kvm_emulate_mwait(struct kvm_vcpu *vcpu);
1712 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu);
1713 int kvm_emulate_monitor(struct kvm_vcpu *vcpu);
1715 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in);
1716 int kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
1717 int kvm_emulate_halt(struct kvm_vcpu *vcpu);
1718 int kvm_emulate_halt_noskip(struct kvm_vcpu *vcpu);
1719 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu);
1720 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu);
1722 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
1723 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg);
1724 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector);
1726 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
1727 int reason, bool has_error_code, u32 error_code);
1729 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0);
1730 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4);
1731 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
1732 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
1733 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
1734 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
1735 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val);
1736 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val);
1737 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
1738 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
1739 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu);
1741 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
1742 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
1744 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu);
1745 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
1746 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu);
1748 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
1749 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
1750 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr, unsigned long payload);
1751 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr);
1752 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
1753 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault);
1754 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
1755 struct x86_exception *fault);
1756 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl);
1757 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr);
1759 static inline int __kvm_irq_line_state(unsigned long *irq_state,
1760 int irq_source_id, int level)
1762 /* Logical OR for level trig interrupt */
1764 __set_bit(irq_source_id, irq_state);
1766 __clear_bit(irq_source_id, irq_state);
1768 return !!(*irq_state);
1771 #define KVM_MMU_ROOT_CURRENT BIT(0)
1772 #define KVM_MMU_ROOT_PREVIOUS(i) BIT(1+i)
1773 #define KVM_MMU_ROOTS_ALL (~0UL)
1775 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level);
1776 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id);
1778 void kvm_inject_nmi(struct kvm_vcpu *vcpu);
1780 void kvm_update_dr7(struct kvm_vcpu *vcpu);
1782 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn);
1783 void kvm_mmu_free_roots(struct kvm *kvm, struct kvm_mmu *mmu,
1784 ulong roots_to_free);
1785 void kvm_mmu_free_guest_mode_roots(struct kvm *kvm, struct kvm_mmu *mmu);
1786 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
1787 struct x86_exception *exception);
1788 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
1789 struct x86_exception *exception);
1790 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
1791 struct x86_exception *exception);
1792 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
1793 struct x86_exception *exception);
1795 bool kvm_apicv_activated(struct kvm *kvm);
1796 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu);
1797 void kvm_request_apicv_update(struct kvm *kvm, bool activate,
1800 void __kvm_request_apicv_update(struct kvm *kvm, bool activate,
1803 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
1805 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u64 error_code,
1806 void *insn, int insn_len);
1807 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva);
1808 void kvm_mmu_invalidate_gva(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
1809 gva_t gva, hpa_t root_hpa);
1810 void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid);
1811 void kvm_mmu_new_pgd(struct kvm_vcpu *vcpu, gpa_t new_pgd);
1813 void kvm_configure_mmu(bool enable_tdp, int tdp_forced_root_level,
1814 int tdp_max_root_level, int tdp_huge_page_level);
1816 static inline u16 kvm_read_ldt(void)
1819 asm("sldt %0" : "=g"(ldt));
1823 static inline void kvm_load_ldt(u16 sel)
1825 asm("lldt %0" : : "rm"(sel));
1828 #ifdef CONFIG_X86_64
1829 static inline unsigned long read_msr(unsigned long msr)
1838 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
1840 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
1843 #define TSS_IOPB_BASE_OFFSET 0x66
1844 #define TSS_BASE_SIZE 0x68
1845 #define TSS_IOPB_SIZE (65536 / 8)
1846 #define TSS_REDIRECTION_SIZE (256 / 8)
1847 #define RMODE_TSS_SIZE \
1848 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
1851 TASK_SWITCH_CALL = 0,
1852 TASK_SWITCH_IRET = 1,
1853 TASK_SWITCH_JMP = 2,
1854 TASK_SWITCH_GATE = 3,
1857 #define HF_GIF_MASK (1 << 0)
1858 #define HF_NMI_MASK (1 << 3)
1859 #define HF_IRET_MASK (1 << 4)
1860 #define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */
1861 #define HF_SMM_MASK (1 << 6)
1862 #define HF_SMM_INSIDE_NMI_MASK (1 << 7)
1864 #define __KVM_VCPU_MULTIPLE_ADDRESS_SPACE
1865 #define KVM_ADDRESS_SPACE_NUM 2
1867 #define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)->arch.hflags & HF_SMM_MASK ? 1 : 0)
1868 #define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm)
1870 #define KVM_ARCH_WANT_MMU_NOTIFIER
1872 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v);
1873 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu);
1874 int kvm_cpu_has_extint(struct kvm_vcpu *v);
1875 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu);
1876 int kvm_cpu_get_interrupt(struct kvm_vcpu *v);
1877 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event);
1879 int kvm_pv_send_ipi(struct kvm *kvm, unsigned long ipi_bitmap_low,
1880 unsigned long ipi_bitmap_high, u32 min,
1881 unsigned long icr, int op_64_bit);
1883 int kvm_add_user_return_msr(u32 msr);
1884 int kvm_find_user_return_msr(u32 msr);
1885 int kvm_set_user_return_msr(unsigned index, u64 val, u64 mask);
1887 static inline bool kvm_is_supported_user_return_msr(u32 msr)
1889 return kvm_find_user_return_msr(msr) >= 0;
1892 u64 kvm_scale_tsc(u64 tsc, u64 ratio);
1893 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc);
1894 u64 kvm_calc_nested_tsc_offset(u64 l1_offset, u64 l2_offset, u64 l2_multiplier);
1895 u64 kvm_calc_nested_tsc_multiplier(u64 l1_multiplier, u64 l2_multiplier);
1897 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu);
1898 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip);
1900 void kvm_make_scan_ioapic_request(struct kvm *kvm);
1901 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
1902 unsigned long *vcpu_bitmap);
1904 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
1905 struct kvm_async_pf *work);
1906 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
1907 struct kvm_async_pf *work);
1908 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu,
1909 struct kvm_async_pf *work);
1910 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu);
1911 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu);
1912 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn);
1914 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu);
1915 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err);
1916 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu);
1918 void __user *__x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
1920 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu);
1921 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu);
1923 bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq,
1924 struct kvm_vcpu **dest_vcpu);
1926 void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e,
1927 struct kvm_lapic_irq *irq);
1929 static inline bool kvm_irq_is_postable(struct kvm_lapic_irq *irq)
1931 /* We can only post Fixed and LowPrio IRQs */
1932 return (irq->delivery_mode == APIC_DM_FIXED ||
1933 irq->delivery_mode == APIC_DM_LOWEST);
1936 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu)
1938 static_call_cond(kvm_x86_vcpu_blocking)(vcpu);
1941 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu)
1943 static_call_cond(kvm_x86_vcpu_unblocking)(vcpu);
1946 static inline int kvm_cpu_get_apicid(int mps_cpu)
1948 #ifdef CONFIG_X86_LOCAL_APIC
1949 return default_cpu_present_to_apicid(mps_cpu);
1956 #define put_smstate(type, buf, offset, val) \
1957 *(type *)((buf) + (offset) - 0x7e00) = val
1959 #define GET_SMSTATE(type, buf, offset) \
1960 (*(type *)((buf) + (offset) - 0x7e00))
1962 int kvm_cpu_dirty_log_size(void);
1964 int memslot_rmap_alloc(struct kvm_memory_slot *slot, unsigned long npages);
1966 #define KVM_CLOCK_VALID_FLAGS \
1967 (KVM_CLOCK_TSC_STABLE | KVM_CLOCK_REALTIME | KVM_CLOCK_HOST_TSC)
1969 #endif /* _ASM_X86_KVM_HOST_H */