1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Kernel-based Virtual Machine driver for Linux
5 * This header defines architecture specific interfaces, x86 version
8 #ifndef _ASM_X86_KVM_HOST_H
9 #define _ASM_X86_KVM_HOST_H
11 #include <linux/types.h>
13 #include <linux/mmu_notifier.h>
14 #include <linux/tracepoint.h>
15 #include <linux/cpumask.h>
16 #include <linux/irq_work.h>
17 #include <linux/irq.h>
18 #include <linux/workqueue.h>
20 #include <linux/kvm.h>
21 #include <linux/kvm_para.h>
22 #include <linux/kvm_types.h>
23 #include <linux/perf_event.h>
24 #include <linux/pvclock_gtod.h>
25 #include <linux/clocksource.h>
26 #include <linux/irqbypass.h>
27 #include <linux/hyperv.h>
28 #include <linux/kfifo.h>
31 #include <asm/pvclock-abi.h>
34 #include <asm/msr-index.h>
36 #include <asm/kvm_page_track.h>
37 #include <asm/kvm_vcpu_regs.h>
38 #include <asm/hyperv-tlfs.h>
40 #define __KVM_HAVE_ARCH_VCPU_DEBUGFS
43 * CONFIG_KVM_MAX_NR_VCPUS is defined iff CONFIG_KVM!=n, provide a dummy max if
44 * KVM is disabled (arbitrarily use the default from CONFIG_KVM_MAX_NR_VCPUS).
46 #ifdef CONFIG_KVM_MAX_NR_VCPUS
47 #define KVM_MAX_VCPUS CONFIG_KVM_MAX_NR_VCPUS
49 #define KVM_MAX_VCPUS 1024
53 * In x86, the VCPU ID corresponds to the APIC ID, and APIC IDs
54 * might be larger than the actual number of VCPUs because the
55 * APIC ID encodes CPU topology information.
57 * In the worst case, we'll need less than one extra bit for the
58 * Core ID, and less than one extra bit for the Package (Die) ID,
59 * so ratio of 4 should be enough.
61 #define KVM_VCPU_ID_RATIO 4
62 #define KVM_MAX_VCPU_IDS (KVM_MAX_VCPUS * KVM_VCPU_ID_RATIO)
64 /* memory slots that are not exposed to userspace */
65 #define KVM_INTERNAL_MEM_SLOTS 3
67 #define KVM_HALT_POLL_NS_DEFAULT 200000
69 #define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS
71 #define KVM_DIRTY_LOG_MANUAL_CAPS (KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE | \
72 KVM_DIRTY_LOG_INITIALLY_SET)
74 #define KVM_BUS_LOCK_DETECTION_VALID_MODE (KVM_BUS_LOCK_DETECTION_OFF | \
75 KVM_BUS_LOCK_DETECTION_EXIT)
77 #define KVM_X86_NOTIFY_VMEXIT_VALID_BITS (KVM_X86_NOTIFY_VMEXIT_ENABLED | \
78 KVM_X86_NOTIFY_VMEXIT_USER)
80 /* x86-specific vcpu->requests bit members */
81 #define KVM_REQ_MIGRATE_TIMER KVM_ARCH_REQ(0)
82 #define KVM_REQ_REPORT_TPR_ACCESS KVM_ARCH_REQ(1)
83 #define KVM_REQ_TRIPLE_FAULT KVM_ARCH_REQ(2)
84 #define KVM_REQ_MMU_SYNC KVM_ARCH_REQ(3)
85 #define KVM_REQ_CLOCK_UPDATE KVM_ARCH_REQ(4)
86 #define KVM_REQ_LOAD_MMU_PGD KVM_ARCH_REQ(5)
87 #define KVM_REQ_EVENT KVM_ARCH_REQ(6)
88 #define KVM_REQ_APF_HALT KVM_ARCH_REQ(7)
89 #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(8)
90 #define KVM_REQ_NMI KVM_ARCH_REQ(9)
91 #define KVM_REQ_PMU KVM_ARCH_REQ(10)
92 #define KVM_REQ_PMI KVM_ARCH_REQ(11)
94 #define KVM_REQ_SMI KVM_ARCH_REQ(12)
96 #define KVM_REQ_MASTERCLOCK_UPDATE KVM_ARCH_REQ(13)
97 #define KVM_REQ_MCLOCK_INPROGRESS \
98 KVM_ARCH_REQ_FLAGS(14, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
99 #define KVM_REQ_SCAN_IOAPIC \
100 KVM_ARCH_REQ_FLAGS(15, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
101 #define KVM_REQ_GLOBAL_CLOCK_UPDATE KVM_ARCH_REQ(16)
102 #define KVM_REQ_APIC_PAGE_RELOAD \
103 KVM_ARCH_REQ_FLAGS(17, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
104 #define KVM_REQ_HV_CRASH KVM_ARCH_REQ(18)
105 #define KVM_REQ_IOAPIC_EOI_EXIT KVM_ARCH_REQ(19)
106 #define KVM_REQ_HV_RESET KVM_ARCH_REQ(20)
107 #define KVM_REQ_HV_EXIT KVM_ARCH_REQ(21)
108 #define KVM_REQ_HV_STIMER KVM_ARCH_REQ(22)
109 #define KVM_REQ_LOAD_EOI_EXITMAP KVM_ARCH_REQ(23)
110 #define KVM_REQ_GET_NESTED_STATE_PAGES KVM_ARCH_REQ(24)
111 #define KVM_REQ_APICV_UPDATE \
112 KVM_ARCH_REQ_FLAGS(25, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
113 #define KVM_REQ_TLB_FLUSH_CURRENT KVM_ARCH_REQ(26)
114 #define KVM_REQ_TLB_FLUSH_GUEST \
115 KVM_ARCH_REQ_FLAGS(27, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
116 #define KVM_REQ_APF_READY KVM_ARCH_REQ(28)
117 #define KVM_REQ_MSR_FILTER_CHANGED KVM_ARCH_REQ(29)
118 #define KVM_REQ_UPDATE_CPU_DIRTY_LOGGING \
119 KVM_ARCH_REQ_FLAGS(30, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
120 #define KVM_REQ_MMU_FREE_OBSOLETE_ROOTS \
121 KVM_ARCH_REQ_FLAGS(31, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
122 #define KVM_REQ_HV_TLB_FLUSH \
123 KVM_ARCH_REQ_FLAGS(32, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
125 #define CR0_RESERVED_BITS \
126 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
127 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
128 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
130 #define CR4_RESERVED_BITS \
131 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
132 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
133 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \
134 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \
135 | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \
136 | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP \
139 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
143 #define INVALID_PAGE (~(hpa_t)0)
144 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
146 /* KVM Hugepage definitions for x86 */
147 #define KVM_MAX_HUGEPAGE_LEVEL PG_LEVEL_1G
148 #define KVM_NR_PAGE_SIZES (KVM_MAX_HUGEPAGE_LEVEL - PG_LEVEL_4K + 1)
149 #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9)
150 #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x))
151 #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x))
152 #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1))
153 #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE)
155 #define KVM_MEMSLOT_PAGES_TO_MMU_PAGES_RATIO 50
156 #define KVM_MIN_ALLOC_MMU_PAGES 64UL
157 #define KVM_MMU_HASH_SHIFT 12
158 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
159 #define KVM_MIN_FREE_MMU_PAGES 5
160 #define KVM_REFILL_PAGES 25
161 #define KVM_MAX_CPUID_ENTRIES 256
162 #define KVM_NR_FIXED_MTRR_REGION 88
163 #define KVM_NR_VAR_MTRR 8
165 #define ASYNC_PF_PER_VCPU 64
168 VCPU_REGS_RAX = __VCPU_REGS_RAX,
169 VCPU_REGS_RCX = __VCPU_REGS_RCX,
170 VCPU_REGS_RDX = __VCPU_REGS_RDX,
171 VCPU_REGS_RBX = __VCPU_REGS_RBX,
172 VCPU_REGS_RSP = __VCPU_REGS_RSP,
173 VCPU_REGS_RBP = __VCPU_REGS_RBP,
174 VCPU_REGS_RSI = __VCPU_REGS_RSI,
175 VCPU_REGS_RDI = __VCPU_REGS_RDI,
177 VCPU_REGS_R8 = __VCPU_REGS_R8,
178 VCPU_REGS_R9 = __VCPU_REGS_R9,
179 VCPU_REGS_R10 = __VCPU_REGS_R10,
180 VCPU_REGS_R11 = __VCPU_REGS_R11,
181 VCPU_REGS_R12 = __VCPU_REGS_R12,
182 VCPU_REGS_R13 = __VCPU_REGS_R13,
183 VCPU_REGS_R14 = __VCPU_REGS_R14,
184 VCPU_REGS_R15 = __VCPU_REGS_R15,
189 VCPU_EXREG_PDPTR = NR_VCPU_REGS,
195 VCPU_EXREG_EXIT_INFO_1,
196 VCPU_EXREG_EXIT_INFO_2,
210 enum exit_fastpath_completion {
212 EXIT_FASTPATH_REENTER_GUEST,
213 EXIT_FASTPATH_EXIT_HANDLED,
215 typedef enum exit_fastpath_completion fastpath_t;
217 struct x86_emulate_ctxt;
218 struct x86_exception;
221 enum x86_intercept_stage;
223 #define KVM_NR_DB_REGS 4
225 #define DR6_BUS_LOCK (1 << 11)
226 #define DR6_BD (1 << 13)
227 #define DR6_BS (1 << 14)
228 #define DR6_BT (1 << 15)
229 #define DR6_RTM (1 << 16)
231 * DR6_ACTIVE_LOW combines fixed-1 and active-low bits.
232 * We can regard all the bits in DR6_FIXED_1 as active_low bits;
233 * they will never be 0 for now, but when they are defined
234 * in the future it will require no code change.
236 * DR6_ACTIVE_LOW is also used as the init/reset value for DR6.
238 #define DR6_ACTIVE_LOW 0xffff0ff0
239 #define DR6_VOLATILE 0x0001e80f
240 #define DR6_FIXED_1 (DR6_ACTIVE_LOW & ~DR6_VOLATILE)
242 #define DR7_BP_EN_MASK 0x000000ff
243 #define DR7_GE (1 << 9)
244 #define DR7_GD (1 << 13)
245 #define DR7_FIXED_1 0x00000400
246 #define DR7_VOLATILE 0xffff2bff
248 #define KVM_GUESTDBG_VALID_MASK \
249 (KVM_GUESTDBG_ENABLE | \
250 KVM_GUESTDBG_SINGLESTEP | \
251 KVM_GUESTDBG_USE_HW_BP | \
252 KVM_GUESTDBG_USE_SW_BP | \
253 KVM_GUESTDBG_INJECT_BP | \
254 KVM_GUESTDBG_INJECT_DB | \
255 KVM_GUESTDBG_BLOCKIRQ)
258 #define PFERR_PRESENT_BIT 0
259 #define PFERR_WRITE_BIT 1
260 #define PFERR_USER_BIT 2
261 #define PFERR_RSVD_BIT 3
262 #define PFERR_FETCH_BIT 4
263 #define PFERR_PK_BIT 5
264 #define PFERR_SGX_BIT 15
265 #define PFERR_GUEST_FINAL_BIT 32
266 #define PFERR_GUEST_PAGE_BIT 33
267 #define PFERR_IMPLICIT_ACCESS_BIT 48
269 #define PFERR_PRESENT_MASK BIT(PFERR_PRESENT_BIT)
270 #define PFERR_WRITE_MASK BIT(PFERR_WRITE_BIT)
271 #define PFERR_USER_MASK BIT(PFERR_USER_BIT)
272 #define PFERR_RSVD_MASK BIT(PFERR_RSVD_BIT)
273 #define PFERR_FETCH_MASK BIT(PFERR_FETCH_BIT)
274 #define PFERR_PK_MASK BIT(PFERR_PK_BIT)
275 #define PFERR_SGX_MASK BIT(PFERR_SGX_BIT)
276 #define PFERR_GUEST_FINAL_MASK BIT_ULL(PFERR_GUEST_FINAL_BIT)
277 #define PFERR_GUEST_PAGE_MASK BIT_ULL(PFERR_GUEST_PAGE_BIT)
278 #define PFERR_IMPLICIT_ACCESS BIT_ULL(PFERR_IMPLICIT_ACCESS_BIT)
280 #define PFERR_NESTED_GUEST_PAGE (PFERR_GUEST_PAGE_MASK | \
284 /* apic attention bits */
285 #define KVM_APIC_CHECK_VAPIC 0
287 * The following bit is set with PV-EOI, unset on EOI.
288 * We detect PV-EOI changes by guest by comparing
289 * this bit with PV-EOI in guest memory.
290 * See the implementation in apic_update_pv_eoi.
292 #define KVM_APIC_PV_EOI_PENDING 1
294 struct kvm_kernel_irq_routing_entry;
297 * kvm_mmu_page_role tracks the properties of a shadow page (where shadow page
298 * also includes TDP pages) to determine whether or not a page can be used in
299 * the given MMU context. This is a subset of the overall kvm_cpu_role to
300 * minimize the size of kvm_memory_slot.arch.gfn_write_track, i.e. allows
301 * allocating 2 bytes per gfn instead of 4 bytes per gfn.
303 * Upper-level shadow pages having gptes are tracked for write-protection via
304 * gfn_write_track. As above, gfn_write_track is a 16 bit counter, so KVM must
305 * not create more than 2^16-1 upper-level shadow pages at a single gfn,
306 * otherwise gfn_write_track will overflow and explosions will ensue.
308 * A unique shadow page (SP) for a gfn is created if and only if an existing SP
309 * cannot be reused. The ability to reuse a SP is tracked by its role, which
310 * incorporates various mode bits and properties of the SP. Roughly speaking,
311 * the number of unique SPs that can theoretically be created is 2^n, where n
312 * is the number of bits that are used to compute the role.
314 * But, even though there are 19 bits in the mask below, not all combinations
315 * of modes and flags are possible:
317 * - invalid shadow pages are not accounted, so the bits are effectively 18
319 * - quadrant will only be used if has_4_byte_gpte=1 (non-PAE paging);
320 * execonly and ad_disabled are only used for nested EPT which has
321 * has_4_byte_gpte=0. Therefore, 2 bits are always unused.
323 * - the 4 bits of level are effectively limited to the values 2/3/4/5,
324 * as 4k SPs are not tracked (allowed to go unsync). In addition non-PAE
325 * paging has exactly one upper level, making level completely redundant
326 * when has_4_byte_gpte=1.
328 * - on top of this, smep_andnot_wp and smap_andnot_wp are only set if
329 * cr0_wp=0, therefore these three bits only give rise to 5 possibilities.
331 * Therefore, the maximum number of possible upper-level shadow pages for a
332 * single gfn is a bit less than 2^13.
334 union kvm_mmu_page_role {
338 unsigned has_4_byte_gpte:1;
345 unsigned smep_andnot_wp:1;
346 unsigned smap_andnot_wp:1;
347 unsigned ad_disabled:1;
348 unsigned guest_mode:1;
349 unsigned passthrough:1;
353 * This is left at the top of the word so that
354 * kvm_memslots_for_spte_role can extract it with a
355 * simple shift. While there is room, give it a whole
356 * byte so it is also faster to load it from memory.
363 * kvm_mmu_extended_role complements kvm_mmu_page_role, tracking properties
364 * relevant to the current MMU configuration. When loading CR0, CR4, or EFER,
365 * including on nested transitions, if nothing in the full role changes then
366 * MMU re-configuration can be skipped. @valid bit is set on first usage so we
367 * don't treat all-zero structure as valid data.
369 * The properties that are tracked in the extended role but not the page role
370 * are for things that either (a) do not affect the validity of the shadow page
371 * or (b) are indirectly reflected in the shadow page's role. For example,
372 * CR4.PKE only affects permission checks for software walks of the guest page
373 * tables (because KVM doesn't support Protection Keys with shadow paging), and
374 * CR0.PG, CR4.PAE, and CR4.PSE are indirectly reflected in role.level.
376 * Note, SMEP and SMAP are not redundant with sm*p_andnot_wp in the page role.
377 * If CR0.WP=1, KVM can reuse shadow pages for the guest regardless of SMEP and
378 * SMAP, but the MMU's permission checks for software walks need to be SMEP and
379 * SMAP aware regardless of CR0.WP.
381 union kvm_mmu_extended_role {
384 unsigned int valid:1;
385 unsigned int execonly:1;
386 unsigned int cr4_pse:1;
387 unsigned int cr4_pke:1;
388 unsigned int cr4_smap:1;
389 unsigned int cr4_smep:1;
390 unsigned int cr4_la57:1;
391 unsigned int efer_lma:1;
398 union kvm_mmu_page_role base;
399 union kvm_mmu_extended_role ext;
403 struct kvm_rmap_head {
407 struct kvm_pio_request {
408 unsigned long linear_rip;
415 #define PT64_ROOT_MAX_LEVEL 5
417 struct rsvd_bits_validate {
418 u64 rsvd_bits_mask[2][PT64_ROOT_MAX_LEVEL];
422 struct kvm_mmu_root_info {
427 #define KVM_MMU_ROOT_INFO_INVALID \
428 ((struct kvm_mmu_root_info) { .pgd = INVALID_PAGE, .hpa = INVALID_PAGE })
430 #define KVM_MMU_NUM_PREV_ROOTS 3
432 #define KVM_MMU_ROOT_CURRENT BIT(0)
433 #define KVM_MMU_ROOT_PREVIOUS(i) BIT(1+i)
434 #define KVM_MMU_ROOTS_ALL (BIT(1 + KVM_MMU_NUM_PREV_ROOTS) - 1)
436 #define KVM_HAVE_MMU_RWLOCK
439 struct kvm_page_fault;
442 * x86 supports 4 paging modes (5-level 64-bit, 4-level 64-bit, 3-level 32-bit,
443 * and 2-level 32-bit). The kvm_mmu structure abstracts the details of the
447 unsigned long (*get_guest_pgd)(struct kvm_vcpu *vcpu);
448 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index);
449 int (*page_fault)(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault);
450 void (*inject_page_fault)(struct kvm_vcpu *vcpu,
451 struct x86_exception *fault);
452 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
453 gpa_t gva_or_gpa, u64 access,
454 struct x86_exception *exception);
455 int (*sync_spte)(struct kvm_vcpu *vcpu,
456 struct kvm_mmu_page *sp, int i);
457 struct kvm_mmu_root_info root;
458 union kvm_cpu_role cpu_role;
459 union kvm_mmu_page_role root_role;
462 * The pkru_mask indicates if protection key checks are needed. It
463 * consists of 16 domains indexed by page fault error code bits [4:1],
464 * with PFEC.RSVD replaced by ACC_USER_MASK from the page tables.
465 * Each domain has 2 bits which are ANDed with AD and WD from PKRU.
469 struct kvm_mmu_root_info prev_roots[KVM_MMU_NUM_PREV_ROOTS];
472 * Bitmap; bit set = permission fault
473 * Byte index: page fault error code [4:1]
474 * Bit index: pte permissions in ACC_* format
483 * check zero bits on shadow page table entries, these
484 * bits include not only hardware reserved bits but also
485 * the bits spte never used.
487 struct rsvd_bits_validate shadow_zero_check;
489 struct rsvd_bits_validate guest_rsvd_check;
491 u64 pdptrs[4]; /* pae */
505 * Base value of the PMC counter, relative to the *consumed* count in
506 * the associated perf_event. This value includes counter updates from
507 * the perf_event and emulated_count since the last time the counter
508 * was reprogrammed, but it is *not* the current value as seen by the
509 * guest or userspace.
511 * The count is relative to the associated perf_event so that KVM
512 * doesn't need to reprogram the perf_event every time the guest writes
517 * PMC events triggered by KVM emulation that haven't been fully
518 * processed, i.e. haven't undergone overflow detection.
520 u64 emulated_counter;
522 struct perf_event *perf_event;
523 struct kvm_vcpu *vcpu;
525 * only for creating or reusing perf_event,
526 * eventsel value for general purpose counters,
527 * ctrl value for fixed counters.
532 /* More counters may conflict with other existing Architectural MSRs */
533 #define KVM_INTEL_PMC_MAX_GENERIC 8
534 #define MSR_ARCH_PERFMON_PERFCTR_MAX (MSR_ARCH_PERFMON_PERFCTR0 + KVM_INTEL_PMC_MAX_GENERIC - 1)
535 #define MSR_ARCH_PERFMON_EVENTSEL_MAX (MSR_ARCH_PERFMON_EVENTSEL0 + KVM_INTEL_PMC_MAX_GENERIC - 1)
536 #define KVM_PMC_MAX_FIXED 3
537 #define MSR_ARCH_PERFMON_FIXED_CTR_MAX (MSR_ARCH_PERFMON_FIXED_CTR0 + KVM_PMC_MAX_FIXED - 1)
538 #define KVM_AMD_PMC_MAX_GENERIC 6
542 unsigned nr_arch_gp_counters;
543 unsigned nr_arch_fixed_counters;
544 unsigned available_event_types;
546 u64 fixed_ctr_ctrl_mask;
549 u64 counter_bitmask[2];
550 u64 global_ctrl_mask;
551 u64 global_status_mask;
554 struct kvm_pmc gp_counters[KVM_INTEL_PMC_MAX_GENERIC];
555 struct kvm_pmc fixed_counters[KVM_PMC_MAX_FIXED];
558 * Overlay the bitmap with a 64-bit atomic so that all bits can be
559 * set in a single access, e.g. to reprogram all counters when the PMU
563 DECLARE_BITMAP(reprogram_pmi, X86_PMC_IDX_MAX);
564 atomic64_t __reprogram_pmi;
566 DECLARE_BITMAP(all_valid_pmc_idx, X86_PMC_IDX_MAX);
567 DECLARE_BITMAP(pmc_in_use, X86_PMC_IDX_MAX);
571 u64 pebs_enable_mask;
573 u64 pebs_data_cfg_mask;
576 * If a guest counter is cross-mapped to host counter with different
577 * index, its PEBS capability will be temporarily disabled.
579 * The user should make sure that this mask is updated
580 * after disabling interrupts and before perf_guest_get_msrs();
582 u64 host_cross_mapped_mask;
585 * The gate to release perf_events not marked in
586 * pmc_in_use only once in a vcpu time slice.
591 * The total number of programmed perf_events and it helps to avoid
592 * redundant check before cleanup if guest don't use vPMU at all.
600 KVM_DEBUGREG_BP_ENABLED = 1,
601 KVM_DEBUGREG_WONT_EXIT = 2,
604 struct kvm_mtrr_range {
607 struct list_head node;
611 struct kvm_mtrr_range var_ranges[KVM_NR_VAR_MTRR];
612 mtrr_type fixed_ranges[KVM_NR_FIXED_MTRR_REGION];
615 struct list_head head;
618 /* Hyper-V SynIC timer */
619 struct kvm_vcpu_hv_stimer {
620 struct hrtimer timer;
622 union hv_stimer_config config;
625 struct hv_message msg;
629 /* Hyper-V synthetic interrupt controller (SynIC)*/
630 struct kvm_vcpu_hv_synic {
635 atomic64_t sint[HV_SYNIC_SINT_COUNT];
636 atomic_t sint_to_gsi[HV_SYNIC_SINT_COUNT];
637 DECLARE_BITMAP(auto_eoi_bitmap, 256);
638 DECLARE_BITMAP(vec_bitmap, 256);
640 bool dont_zero_synic_pages;
643 /* The maximum number of entries on the TLB flush fifo. */
644 #define KVM_HV_TLB_FLUSH_FIFO_SIZE (16)
646 * Note: the following 'magic' entry is made up by KVM to avoid putting
647 * anything besides GVA on the TLB flush fifo. It is theoretically possible
648 * to observe a request to flush 4095 PFNs starting from 0xfffffffffffff000
649 * which will look identical. KVM's action to 'flush everything' instead of
650 * flushing these particular addresses is, however, fully legitimate as
651 * flushing more than requested is always OK.
653 #define KVM_HV_TLB_FLUSHALL_ENTRY ((u64)-1)
655 enum hv_tlb_flush_fifos {
656 HV_L1_TLB_FLUSH_FIFO,
657 HV_L2_TLB_FLUSH_FIFO,
658 HV_NR_TLB_FLUSH_FIFOS,
661 struct kvm_vcpu_hv_tlb_flush_fifo {
662 spinlock_t write_lock;
663 DECLARE_KFIFO(entries, u64, KVM_HV_TLB_FLUSH_FIFO_SIZE);
666 /* Hyper-V per vcpu emulation context */
668 struct kvm_vcpu *vcpu;
672 struct kvm_vcpu_hv_synic synic;
673 struct kvm_hyperv_exit exit;
674 struct kvm_vcpu_hv_stimer stimer[HV_SYNIC_STIMER_COUNT];
675 DECLARE_BITMAP(stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT);
678 u32 features_eax; /* HYPERV_CPUID_FEATURES.EAX */
679 u32 features_ebx; /* HYPERV_CPUID_FEATURES.EBX */
680 u32 features_edx; /* HYPERV_CPUID_FEATURES.EDX */
681 u32 enlightenments_eax; /* HYPERV_CPUID_ENLIGHTMENT_INFO.EAX */
682 u32 enlightenments_ebx; /* HYPERV_CPUID_ENLIGHTMENT_INFO.EBX */
683 u32 syndbg_cap_eax; /* HYPERV_CPUID_SYNDBG_PLATFORM_CAPABILITIES.EAX */
684 u32 nested_eax; /* HYPERV_CPUID_NESTED_FEATURES.EAX */
685 u32 nested_ebx; /* HYPERV_CPUID_NESTED_FEATURES.EBX */
688 struct kvm_vcpu_hv_tlb_flush_fifo tlb_flush_fifo[HV_NR_TLB_FLUSH_FIFOS];
690 /* Preallocated buffer for handling hypercalls passing sparse vCPU set */
691 u64 sparse_banks[HV_MAX_SPARSE_VCPU_BANKS];
693 struct hv_vp_assist_page vp_assist_page;
702 struct kvm_hypervisor_cpuid {
707 #ifdef CONFIG_KVM_XEN
708 /* Xen HVM per vcpu emulation context */
709 struct kvm_vcpu_xen {
711 u32 current_runstate;
713 struct gfn_to_pfn_cache vcpu_info_cache;
714 struct gfn_to_pfn_cache vcpu_time_info_cache;
715 struct gfn_to_pfn_cache runstate_cache;
716 struct gfn_to_pfn_cache runstate2_cache;
718 u64 runstate_entry_time;
719 u64 runstate_times[4];
720 unsigned long evtchn_pending_sel;
721 u32 vcpu_id; /* The Xen / ACPI vCPU ID */
723 u64 timer_expires; /* In guest epoch */
724 atomic_t timer_pending;
725 struct hrtimer timer;
727 struct timer_list poll_timer;
728 struct kvm_hypervisor_cpuid cpuid;
732 struct kvm_queued_exception {
738 unsigned long payload;
742 struct kvm_vcpu_arch {
744 * rip and regs accesses must go through
745 * kvm_{register,rip}_{read,write} functions.
747 unsigned long regs[NR_VCPU_REGS];
752 unsigned long cr0_guest_owned_bits;
756 unsigned long cr4_guest_owned_bits;
757 unsigned long cr4_guest_rsvd_bits;
764 struct kvm_lapic *apic; /* kernel irqchip context */
765 bool load_eoi_exitmap_pending;
766 DECLARE_BITMAP(ioapic_handled_vectors, 256);
767 unsigned long apic_attention;
768 int32_t apic_arb_prio;
770 u64 ia32_misc_enable_msr;
773 bool at_instruction_boundary;
774 bool tpr_access_reporting;
775 bool xfd_no_write_intercept;
777 u64 microcode_version;
778 u64 arch_capabilities;
779 u64 perf_capabilities;
782 * Paging state of the vcpu
784 * If the vcpu runs in guest mode with two level paging this still saves
785 * the paging mode of the l1 guest. This context is always used to
790 /* Non-nested MMU for L1 */
791 struct kvm_mmu root_mmu;
793 /* L1 MMU when running nested */
794 struct kvm_mmu guest_mmu;
797 * Paging state of an L2 guest (used for nested npt)
799 * This context will save all necessary information to walk page tables
800 * of an L2 guest. This context is only initialized for page table
801 * walking and not for faulting since we never handle l2 page faults on
804 struct kvm_mmu nested_mmu;
807 * Pointer to the mmu context currently used for
808 * gva_to_gpa translations.
810 struct kvm_mmu *walk_mmu;
812 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache;
813 struct kvm_mmu_memory_cache mmu_shadow_page_cache;
814 struct kvm_mmu_memory_cache mmu_shadowed_info_cache;
815 struct kvm_mmu_memory_cache mmu_page_header_cache;
818 * QEMU userspace and the guest each have their own FPU state.
819 * In vcpu_run, we switch between the user and guest FPU contexts.
820 * While running a VCPU, the VCPU thread will have the guest FPU
823 * Note that while the PKRU state lives inside the fpu registers,
824 * it is switched out separately at VMENTER and VMEXIT time. The
825 * "guest_fpstate" state here contains the guest FPU context, with the
828 struct fpu_guest guest_fpu;
831 u64 guest_supported_xcr0;
833 struct kvm_pio_request pio;
836 unsigned sev_pio_count;
838 u8 event_exit_inst_len;
840 bool exception_from_userspace;
842 /* Exceptions to be injected to the guest. */
843 struct kvm_queued_exception exception;
844 /* Exception VM-Exits to be synthesized to L1. */
845 struct kvm_queued_exception exception_vmexit;
847 struct kvm_queued_interrupt {
853 int halt_request; /* real mode on Intel only */
856 struct kvm_cpuid_entry2 *cpuid_entries;
857 struct kvm_hypervisor_cpuid kvm_cpuid;
860 * FIXME: Drop this macro and use KVM_NR_GOVERNED_FEATURES directly
861 * when "struct kvm_vcpu_arch" is no longer defined in an
862 * arch/x86/include/asm header. The max is mostly arbitrary, i.e.
863 * can be increased as necessary.
865 #define KVM_MAX_NR_GOVERNED_FEATURES BITS_PER_LONG
868 * Track whether or not the guest is allowed to use features that are
869 * governed by KVM, where "governed" means KVM needs to manage state
870 * and/or explicitly enable the feature in hardware. Typically, but
871 * not always, governed features can be used by the guest if and only
872 * if both KVM and userspace want to expose the feature to the guest.
875 DECLARE_BITMAP(enabled, KVM_MAX_NR_GOVERNED_FEATURES);
878 u64 reserved_gpa_bits;
881 /* emulate context */
883 struct x86_emulate_ctxt *emulate_ctxt;
884 bool emulate_regs_need_sync_to_vcpu;
885 bool emulate_regs_need_sync_from_vcpu;
886 int (*complete_userspace_io)(struct kvm_vcpu *vcpu);
889 struct pvclock_vcpu_time_info hv_clock;
890 unsigned int hw_tsc_khz;
891 struct gfn_to_pfn_cache pv_time;
892 /* set guest stopped flag in pvclock flags field */
893 bool pvclock_set_guest_stopped_request;
899 struct gfn_to_hva_cache cache;
903 u64 tsc_offset; /* current tsc offset */
906 u64 tsc_offset_adjustment;
909 u64 this_tsc_generation;
911 bool tsc_always_catchup;
912 s8 virtual_tsc_shift;
913 u32 virtual_tsc_mult;
915 s64 ia32_tsc_adjust_msr;
916 u64 msr_ia32_power_ctl;
917 u64 l1_tsc_scaling_ratio;
918 u64 tsc_scaling_ratio; /* current scaling ratio */
920 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */
921 /* Number of NMIs pending injection, not including hardware vNMIs. */
922 unsigned int nmi_pending;
923 bool nmi_injected; /* Trying to inject an NMI this entry */
924 bool smi_pending; /* SMI queued after currently running handler */
925 u8 handling_intr_from_guest;
927 struct kvm_mtrr mtrr_state;
930 unsigned switch_db_regs;
931 unsigned long db[KVM_NR_DB_REGS];
934 unsigned long eff_db[KVM_NR_DB_REGS];
935 unsigned long guest_debug_dr7;
936 u64 msr_platform_info;
937 u64 msr_misc_features_enables;
946 /* Cache MMIO info */
948 unsigned mmio_access;
954 /* used for guest single stepping over the given code position */
955 unsigned long singlestep_rip;
957 #ifdef CONFIG_KVM_HYPERV
959 struct kvm_vcpu_hv *hyperv;
961 #ifdef CONFIG_KVM_XEN
962 struct kvm_vcpu_xen xen;
964 cpumask_var_t wbinvd_dirty_mask;
966 unsigned long last_retry_eip;
967 unsigned long last_retry_addr;
971 gfn_t gfns[ASYNC_PF_PER_VCPU];
972 struct gfn_to_hva_cache data;
973 u64 msr_en_val; /* MSR_KVM_ASYNC_PF_EN */
974 u64 msr_int_val; /* MSR_KVM_ASYNC_PF_INT */
979 bool delivery_as_pf_vmexit;
980 bool pageready_pending;
983 /* OSVW MSRs (AMD only) */
991 struct gfn_to_hva_cache data;
994 u64 msr_kvm_poll_control;
996 /* set at EPT violation at this point */
997 unsigned long exit_qualification;
999 /* pv related host specific info */
1004 int pending_ioapic_eoi;
1005 int pending_external_vector;
1007 /* be preempted when it's in kernel-mode(cpl=0) */
1008 bool preempted_in_kernel;
1010 /* Flush the L1 Data cache for L1TF mitigation on VMENTER */
1011 bool l1tf_flush_l1d;
1013 /* Host CPU on which VM-entry was most recently attempted */
1014 int last_vmentry_cpu;
1016 /* AMD MSRC001_0015 Hardware Configuration */
1019 /* pv related cpuid info */
1022 * value of the eax register in the KVM_CPUID_FEATURES CPUID
1028 * indicates whether pv emulation should be disabled if features
1029 * are not present in the guest's cpuid
1034 /* Protected Guests */
1035 bool guest_state_protected;
1038 * Set when PDPTS were loaded directly by the userspace without
1039 * reading the guest memory
1041 bool pdptrs_from_userspace;
1043 #if IS_ENABLED(CONFIG_HYPERV)
1048 struct kvm_lpage_info {
1052 struct kvm_arch_memory_slot {
1053 struct kvm_rmap_head *rmap[KVM_NR_PAGE_SIZES];
1054 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1];
1055 unsigned short *gfn_write_track;
1059 * Track the mode of the optimized logical map, as the rules for decoding the
1060 * destination vary per mode. Enabling the optimized logical map requires all
1061 * software-enabled local APIs to be in the same mode, each addressable APIC to
1062 * be mapped to only one MDA, and each MDA to map to at most one APIC.
1064 enum kvm_apic_logical_mode {
1065 /* All local APICs are software disabled. */
1066 KVM_APIC_MODE_SW_DISABLED,
1067 /* All software enabled local APICs in xAPIC cluster addressing mode. */
1068 KVM_APIC_MODE_XAPIC_CLUSTER,
1069 /* All software enabled local APICs in xAPIC flat addressing mode. */
1070 KVM_APIC_MODE_XAPIC_FLAT,
1071 /* All software enabled local APICs in x2APIC mode. */
1072 KVM_APIC_MODE_X2APIC,
1074 * Optimized map disabled, e.g. not all local APICs in the same logical
1075 * mode, same logical ID assigned to multiple APICs, etc.
1077 KVM_APIC_MODE_MAP_DISABLED,
1080 struct kvm_apic_map {
1081 struct rcu_head rcu;
1082 enum kvm_apic_logical_mode logical_mode;
1085 struct kvm_lapic *xapic_flat_map[8];
1086 struct kvm_lapic *xapic_cluster_map[16][4];
1088 struct kvm_lapic *phys_map[];
1091 /* Hyper-V synthetic debugger (SynDbg)*/
1092 struct kvm_hv_syndbg {
1103 /* Current state of Hyper-V TSC page clocksource */
1104 enum hv_tsc_page_status {
1105 /* TSC page was not set up or disabled */
1106 HV_TSC_PAGE_UNSET = 0,
1107 /* TSC page MSR was written by the guest, update pending */
1108 HV_TSC_PAGE_GUEST_CHANGED,
1109 /* TSC page update was triggered from the host side */
1110 HV_TSC_PAGE_HOST_CHANGED,
1111 /* TSC page was properly set up and is currently active */
1113 /* TSC page was set up with an inaccessible GPA */
1117 #ifdef CONFIG_KVM_HYPERV
1118 /* Hyper-V emulation context */
1120 struct mutex hv_lock;
1124 enum hv_tsc_page_status hv_tsc_page_status;
1126 /* Hyper-v based guest crash (NT kernel bugcheck) parameters */
1127 u64 hv_crash_param[HV_X64_MSR_CRASH_PARAMS];
1130 struct ms_hyperv_tsc_page tsc_ref;
1132 struct idr conn_to_evt;
1134 u64 hv_reenlightenment_control;
1135 u64 hv_tsc_emulation_control;
1136 u64 hv_tsc_emulation_status;
1137 u64 hv_invtsc_control;
1139 /* How many vCPUs have VP index != vCPU index */
1140 atomic_t num_mismatched_vp_indexes;
1143 * How many SynICs use 'AutoEOI' feature
1144 * (protected by arch.apicv_update_lock)
1146 unsigned int synic_auto_eoi_used;
1148 struct kvm_hv_syndbg hv_syndbg;
1150 bool xsaves_xsavec_checked;
1154 struct msr_bitmap_range {
1158 unsigned long *bitmap;
1161 #ifdef CONFIG_KVM_XEN
1162 /* Xen emulation context */
1164 struct mutex xen_lock;
1167 bool runstate_update_flag;
1169 struct gfn_to_pfn_cache shinfo_cache;
1170 struct idr evtchn_ports;
1171 unsigned long poll_mask[BITS_TO_LONGS(KVM_MAX_VCPUS)];
1175 enum kvm_irqchip_mode {
1177 KVM_IRQCHIP_KERNEL, /* created with KVM_CREATE_IRQCHIP */
1178 KVM_IRQCHIP_SPLIT, /* created with KVM_CAP_SPLIT_IRQCHIP */
1181 struct kvm_x86_msr_filter {
1183 bool default_allow:1;
1184 struct msr_bitmap_range ranges[16];
1187 struct kvm_x86_pmu_event_filter {
1190 __u32 fixed_counter_bitmap;
1199 enum kvm_apicv_inhibit {
1201 /********************************************************************/
1202 /* INHIBITs that are relevant to both Intel's APICv and AMD's AVIC. */
1203 /********************************************************************/
1206 * APIC acceleration is disabled by a module parameter
1207 * and/or not supported in hardware.
1209 APICV_INHIBIT_REASON_DISABLE,
1212 * APIC acceleration is inhibited because AutoEOI feature is
1213 * being used by a HyperV guest.
1215 APICV_INHIBIT_REASON_HYPERV,
1218 * APIC acceleration is inhibited because the userspace didn't yet
1219 * enable the kernel/split irqchip.
1221 APICV_INHIBIT_REASON_ABSENT,
1223 /* APIC acceleration is inhibited because KVM_GUESTDBG_BLOCKIRQ
1224 * (out of band, debug measure of blocking all interrupts on this vCPU)
1225 * was enabled, to avoid AVIC/APICv bypassing it.
1227 APICV_INHIBIT_REASON_BLOCKIRQ,
1230 * APICv is disabled because not all vCPUs have a 1:1 mapping between
1231 * APIC ID and vCPU, _and_ KVM is not applying its x2APIC hotplug hack.
1233 APICV_INHIBIT_REASON_PHYSICAL_ID_ALIASED,
1236 * For simplicity, the APIC acceleration is inhibited
1237 * first time either APIC ID or APIC base are changed by the guest
1238 * from their reset values.
1240 APICV_INHIBIT_REASON_APIC_ID_MODIFIED,
1241 APICV_INHIBIT_REASON_APIC_BASE_MODIFIED,
1243 /******************************************************/
1244 /* INHIBITs that are relevant only to the AMD's AVIC. */
1245 /******************************************************/
1248 * AVIC is inhibited on a vCPU because it runs a nested guest.
1250 * This is needed because unlike APICv, the peers of this vCPU
1251 * cannot use the doorbell mechanism to signal interrupts via AVIC when
1252 * a vCPU runs nested.
1254 APICV_INHIBIT_REASON_NESTED,
1257 * On SVM, the wait for the IRQ window is implemented with pending vIRQ,
1258 * which cannot be injected when the AVIC is enabled, thus AVIC
1259 * is inhibited while KVM waits for IRQ window.
1261 APICV_INHIBIT_REASON_IRQWIN,
1264 * PIT (i8254) 're-inject' mode, relies on EOI intercept,
1265 * which AVIC doesn't support for edge triggered interrupts.
1267 APICV_INHIBIT_REASON_PIT_REINJ,
1270 * AVIC is disabled because SEV doesn't support it.
1272 APICV_INHIBIT_REASON_SEV,
1275 * AVIC is disabled because not all vCPUs with a valid LDR have a 1:1
1276 * mapping between logical ID and vCPU.
1278 APICV_INHIBIT_REASON_LOGICAL_ID_ALIASED,
1282 unsigned long vm_type;
1283 unsigned long n_used_mmu_pages;
1284 unsigned long n_requested_mmu_pages;
1285 unsigned long n_max_mmu_pages;
1286 unsigned int indirect_shadow_pages;
1288 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
1289 struct list_head active_mmu_pages;
1290 struct list_head zapped_obsolete_pages;
1292 * A list of kvm_mmu_page structs that, if zapped, could possibly be
1293 * replaced by an NX huge page. A shadow page is on this list if its
1294 * existence disallows an NX huge page (nx_huge_page_disallowed is set)
1295 * and there are no other conditions that prevent a huge page, e.g.
1296 * the backing host page is huge, dirtly logging is not enabled for its
1297 * memslot, etc... Note, zapping shadow pages on this list doesn't
1298 * guarantee an NX huge page will be created in its stead, e.g. if the
1299 * guest attempts to execute from the region then KVM obviously can't
1300 * create an NX huge page (without hanging the guest).
1302 struct list_head possible_nx_huge_pages;
1303 #ifdef CONFIG_KVM_EXTERNAL_WRITE_TRACKING
1304 struct kvm_page_track_notifier_head track_notifier_head;
1307 * Protects marking pages unsync during page faults, as TDP MMU page
1308 * faults only take mmu_lock for read. For simplicity, the unsync
1309 * pages lock is always taken when marking pages unsync regardless of
1310 * whether mmu_lock is held for read or write.
1312 spinlock_t mmu_unsync_pages_lock;
1314 struct iommu_domain *iommu_domain;
1315 bool iommu_noncoherent;
1316 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA
1317 atomic_t noncoherent_dma_count;
1318 #define __KVM_HAVE_ARCH_ASSIGNED_DEVICE
1319 atomic_t assigned_device_count;
1320 struct kvm_pic *vpic;
1321 struct kvm_ioapic *vioapic;
1322 struct kvm_pit *vpit;
1323 atomic_t vapics_in_nmi_mode;
1324 struct mutex apic_map_lock;
1325 struct kvm_apic_map __rcu *apic_map;
1326 atomic_t apic_map_dirty;
1328 bool apic_access_memslot_enabled;
1329 bool apic_access_memslot_inhibited;
1331 /* Protects apicv_inhibit_reasons */
1332 struct rw_semaphore apicv_update_lock;
1333 unsigned long apicv_inhibit_reasons;
1337 bool mwait_in_guest;
1339 bool pause_in_guest;
1340 bool cstate_in_guest;
1342 unsigned long irq_sources_bitmap;
1343 s64 kvmclock_offset;
1346 * This also protects nr_vcpus_matched_tsc which is read from a
1347 * preemption-disabled region, so it must be a raw spinlock.
1349 raw_spinlock_t tsc_write_lock;
1353 u64 last_tsc_offset;
1357 u64 cur_tsc_generation;
1358 int nr_vcpus_matched_tsc;
1360 u32 default_tsc_khz;
1363 seqcount_raw_spinlock_t pvclock_sc;
1364 bool use_master_clock;
1365 u64 master_kernel_ns;
1366 u64 master_cycle_now;
1367 struct delayed_work kvmclock_update_work;
1368 struct delayed_work kvmclock_sync_work;
1370 struct kvm_xen_hvm_config xen_hvm_config;
1372 /* reads protected by irq_srcu, writes by irq_lock */
1373 struct hlist_head mask_notifier_list;
1375 #ifdef CONFIG_KVM_HYPERV
1376 struct kvm_hv hyperv;
1379 #ifdef CONFIG_KVM_XEN
1383 bool backwards_tsc_observed;
1384 bool boot_vcpu_runs_old_kvmclock;
1387 u64 disabled_quirks;
1389 enum kvm_irqchip_mode irqchip_mode;
1390 u8 nr_reserved_ioapic_pins;
1392 bool disabled_lapic_found;
1395 bool x2apic_broadcast_quirk_disabled;
1397 bool guest_can_read_msr_platform_info;
1398 bool exception_payload_enabled;
1400 bool triple_fault_event;
1402 bool bus_lock_detection_enabled;
1406 u32 notify_vmexit_flags;
1408 * If exit_on_emulation_error is set, and the in-kernel instruction
1409 * emulator fails to emulate an instruction, allow userspace
1410 * the opportunity to look at it.
1412 bool exit_on_emulation_error;
1414 /* Deflect RDMSR and WRMSR to user space when they trigger a #GP */
1415 u32 user_space_msr_mask;
1416 struct kvm_x86_msr_filter __rcu *msr_filter;
1418 u32 hypercall_exit_enabled;
1420 /* Guest can access the SGX PROVISIONKEY. */
1421 bool sgx_provisioning_allowed;
1423 struct kvm_x86_pmu_event_filter __rcu *pmu_event_filter;
1424 struct task_struct *nx_huge_page_recovery_thread;
1426 #ifdef CONFIG_X86_64
1427 /* The number of TDP MMU pages across all roots. */
1428 atomic64_t tdp_mmu_pages;
1431 * List of struct kvm_mmu_pages being used as roots.
1432 * All struct kvm_mmu_pages in the list should have
1435 * For reads, this list is protected by:
1436 * the MMU lock in read mode + RCU or
1437 * the MMU lock in write mode
1439 * For writes, this list is protected by tdp_mmu_pages_lock; see
1440 * below for the details.
1442 * Roots will remain in the list until their tdp_mmu_root_count
1443 * drops to zero, at which point the thread that decremented the
1444 * count to zero should removed the root from the list and clean
1445 * it up, freeing the root after an RCU grace period.
1447 struct list_head tdp_mmu_roots;
1450 * Protects accesses to the following fields when the MMU lock
1451 * is held in read mode:
1452 * - tdp_mmu_roots (above)
1453 * - the link field of kvm_mmu_page structs used by the TDP MMU
1454 * - possible_nx_huge_pages;
1455 * - the possible_nx_huge_page_link field of kvm_mmu_page structs used
1457 * Because the lock is only taken within the MMU lock, strictly
1458 * speaking it is redundant to acquire this lock when the thread
1459 * holds the MMU lock in write mode. However it often simplifies
1460 * the code to do so.
1462 spinlock_t tdp_mmu_pages_lock;
1463 #endif /* CONFIG_X86_64 */
1466 * If set, at least one shadow root has been allocated. This flag
1467 * is used as one input when determining whether certain memslot
1468 * related allocations are necessary.
1470 bool shadow_root_allocated;
1472 #ifdef CONFIG_KVM_EXTERNAL_WRITE_TRACKING
1474 * If set, the VM has (or had) an external write tracking user, and
1475 * thus all write tracking metadata has been allocated, even if KVM
1476 * itself isn't using write tracking.
1478 bool external_write_tracking_enabled;
1481 #if IS_ENABLED(CONFIG_HYPERV)
1483 spinlock_t hv_root_tdp_lock;
1484 struct hv_partition_assist_pg *hv_pa_pg;
1487 * VM-scope maximum vCPU ID. Used to determine the size of structures
1488 * that increase along with the maximum vCPU ID, in which case, using
1489 * the global KVM_MAX_VCPU_IDS may lead to significant memory waste.
1493 bool disable_nx_huge_pages;
1496 * Memory caches used to allocate shadow pages when performing eager
1497 * page splitting. No need for a shadowed_info_cache since eager page
1498 * splitting only allocates direct shadow pages.
1500 * Protected by kvm->slots_lock.
1502 struct kvm_mmu_memory_cache split_shadow_page_cache;
1503 struct kvm_mmu_memory_cache split_page_header_cache;
1506 * Memory cache used to allocate pte_list_desc structs while splitting
1507 * huge pages. In the worst case, to split one huge page, 512
1508 * pte_list_desc structs are needed to add each lower level leaf sptep
1509 * to the rmap plus 1 to extend the parent_ptes rmap of the lower level
1512 * Protected by kvm->slots_lock.
1514 #define SPLIT_DESC_CACHE_MIN_NR_OBJECTS (SPTE_ENT_PER_PAGE + 1)
1515 struct kvm_mmu_memory_cache split_desc_cache;
1518 struct kvm_vm_stat {
1519 struct kvm_vm_stat_generic generic;
1520 u64 mmu_shadow_zapped;
1529 atomic64_t pages_4k;
1530 atomic64_t pages_2m;
1531 atomic64_t pages_1g;
1533 atomic64_t pages[KVM_NR_PAGE_SIZES];
1535 u64 nx_lpage_splits;
1536 u64 max_mmu_page_hash_collisions;
1537 u64 max_mmu_rmap_size;
1540 struct kvm_vcpu_stat {
1541 struct kvm_vcpu_stat_generic generic;
1547 u64 pf_mmio_spte_created;
1556 u64 irq_window_exits;
1557 u64 nmi_window_exits;
1560 u64 request_irq_exits;
1562 u64 host_state_reload;
1565 u64 insn_emulation_fail;
1571 u64 directed_yield_attempted;
1572 u64 directed_yield_successful;
1573 u64 preemption_reported;
1574 u64 preemption_other;
1576 u64 notify_window_exits;
1579 struct x86_instruction_info;
1582 bool host_initiated;
1587 struct kvm_lapic_irq {
1595 bool msi_redir_hint;
1598 static inline u16 kvm_lapic_irq_dest_mode(bool dest_mode_logical)
1600 return dest_mode_logical ? APIC_DEST_LOGICAL : APIC_DEST_PHYSICAL;
1603 struct kvm_x86_ops {
1606 int (*check_processor_compatibility)(void);
1608 int (*hardware_enable)(void);
1609 void (*hardware_disable)(void);
1610 void (*hardware_unsetup)(void);
1611 bool (*has_emulated_msr)(struct kvm *kvm, u32 index);
1612 void (*vcpu_after_set_cpuid)(struct kvm_vcpu *vcpu);
1614 unsigned int vm_size;
1615 int (*vm_init)(struct kvm *kvm);
1616 void (*vm_destroy)(struct kvm *kvm);
1618 /* Create, but do not attach this VCPU */
1619 int (*vcpu_precreate)(struct kvm *kvm);
1620 int (*vcpu_create)(struct kvm_vcpu *vcpu);
1621 void (*vcpu_free)(struct kvm_vcpu *vcpu);
1622 void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event);
1624 void (*prepare_switch_to_guest)(struct kvm_vcpu *vcpu);
1625 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
1626 void (*vcpu_put)(struct kvm_vcpu *vcpu);
1628 void (*update_exception_bitmap)(struct kvm_vcpu *vcpu);
1629 int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
1630 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
1631 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
1632 void (*get_segment)(struct kvm_vcpu *vcpu,
1633 struct kvm_segment *var, int seg);
1634 int (*get_cpl)(struct kvm_vcpu *vcpu);
1635 void (*set_segment)(struct kvm_vcpu *vcpu,
1636 struct kvm_segment *var, int seg);
1637 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
1638 bool (*is_valid_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
1639 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
1640 void (*post_set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
1641 bool (*is_valid_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
1642 void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
1643 int (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
1644 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1645 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1646 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1647 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1648 void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu);
1649 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value);
1650 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
1651 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
1652 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
1653 bool (*get_if_flag)(struct kvm_vcpu *vcpu);
1655 void (*flush_tlb_all)(struct kvm_vcpu *vcpu);
1656 void (*flush_tlb_current)(struct kvm_vcpu *vcpu);
1657 #if IS_ENABLED(CONFIG_HYPERV)
1658 int (*flush_remote_tlbs)(struct kvm *kvm);
1659 int (*flush_remote_tlbs_range)(struct kvm *kvm, gfn_t gfn,
1664 * Flush any TLB entries associated with the given GVA.
1665 * Does not need to flush GPA->HPA mappings.
1666 * Can potentially get non-canonical addresses through INVLPGs, which
1667 * the implementation may choose to ignore if appropriate.
1669 void (*flush_tlb_gva)(struct kvm_vcpu *vcpu, gva_t addr);
1672 * Flush any TLB entries created by the guest. Like tlb_flush_gva(),
1673 * does not need to flush GPA->HPA mappings.
1675 void (*flush_tlb_guest)(struct kvm_vcpu *vcpu);
1677 int (*vcpu_pre_run)(struct kvm_vcpu *vcpu);
1678 enum exit_fastpath_completion (*vcpu_run)(struct kvm_vcpu *vcpu,
1679 bool force_immediate_exit);
1680 int (*handle_exit)(struct kvm_vcpu *vcpu,
1681 enum exit_fastpath_completion exit_fastpath);
1682 int (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
1683 void (*update_emulated_instruction)(struct kvm_vcpu *vcpu);
1684 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
1685 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu);
1686 void (*patch_hypercall)(struct kvm_vcpu *vcpu,
1687 unsigned char *hypercall_addr);
1688 void (*inject_irq)(struct kvm_vcpu *vcpu, bool reinjected);
1689 void (*inject_nmi)(struct kvm_vcpu *vcpu);
1690 void (*inject_exception)(struct kvm_vcpu *vcpu);
1691 void (*cancel_injection)(struct kvm_vcpu *vcpu);
1692 int (*interrupt_allowed)(struct kvm_vcpu *vcpu, bool for_injection);
1693 int (*nmi_allowed)(struct kvm_vcpu *vcpu, bool for_injection);
1694 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu);
1695 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked);
1696 /* Whether or not a virtual NMI is pending in hardware. */
1697 bool (*is_vnmi_pending)(struct kvm_vcpu *vcpu);
1699 * Attempt to pend a virtual NMI in hardware. Returns %true on success
1700 * to allow using static_call_ret0 as the fallback.
1702 bool (*set_vnmi_pending)(struct kvm_vcpu *vcpu);
1703 void (*enable_nmi_window)(struct kvm_vcpu *vcpu);
1704 void (*enable_irq_window)(struct kvm_vcpu *vcpu);
1705 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);
1706 bool (*check_apicv_inhibit_reasons)(enum kvm_apicv_inhibit reason);
1707 const unsigned long required_apicv_inhibits;
1708 bool allow_apicv_in_x2apic_without_x2apic_virtualization;
1709 void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu);
1710 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr);
1711 void (*hwapic_isr_update)(int isr);
1712 bool (*guest_apic_has_interrupt)(struct kvm_vcpu *vcpu);
1713 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap);
1714 void (*set_virtual_apic_mode)(struct kvm_vcpu *vcpu);
1715 void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu);
1716 void (*deliver_interrupt)(struct kvm_lapic *apic, int delivery_mode,
1717 int trig_mode, int vector);
1718 int (*sync_pir_to_irr)(struct kvm_vcpu *vcpu);
1719 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
1720 int (*set_identity_map_addr)(struct kvm *kvm, u64 ident_addr);
1721 u8 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio);
1723 void (*load_mmu_pgd)(struct kvm_vcpu *vcpu, hpa_t root_hpa,
1726 bool (*has_wbinvd_exit)(void);
1728 u64 (*get_l2_tsc_offset)(struct kvm_vcpu *vcpu);
1729 u64 (*get_l2_tsc_multiplier)(struct kvm_vcpu *vcpu);
1730 void (*write_tsc_offset)(struct kvm_vcpu *vcpu);
1731 void (*write_tsc_multiplier)(struct kvm_vcpu *vcpu);
1734 * Retrieve somewhat arbitrary exit information. Intended to
1735 * be used only from within tracepoints or error paths.
1737 void (*get_exit_info)(struct kvm_vcpu *vcpu, u32 *reason,
1738 u64 *info1, u64 *info2,
1739 u32 *exit_int_info, u32 *exit_int_info_err_code);
1741 int (*check_intercept)(struct kvm_vcpu *vcpu,
1742 struct x86_instruction_info *info,
1743 enum x86_intercept_stage stage,
1744 struct x86_exception *exception);
1745 void (*handle_exit_irqoff)(struct kvm_vcpu *vcpu);
1747 void (*sched_in)(struct kvm_vcpu *vcpu, int cpu);
1750 * Size of the CPU's dirty log buffer, i.e. VMX's PML buffer. A zero
1751 * value indicates CPU dirty logging is unsupported or disabled.
1753 int cpu_dirty_log_size;
1754 void (*update_cpu_dirty_logging)(struct kvm_vcpu *vcpu);
1756 const struct kvm_x86_nested_ops *nested_ops;
1758 void (*vcpu_blocking)(struct kvm_vcpu *vcpu);
1759 void (*vcpu_unblocking)(struct kvm_vcpu *vcpu);
1761 int (*pi_update_irte)(struct kvm *kvm, unsigned int host_irq,
1762 uint32_t guest_irq, bool set);
1763 void (*pi_start_assignment)(struct kvm *kvm);
1764 void (*apicv_pre_state_restore)(struct kvm_vcpu *vcpu);
1765 void (*apicv_post_state_restore)(struct kvm_vcpu *vcpu);
1766 bool (*dy_apicv_has_pending_interrupt)(struct kvm_vcpu *vcpu);
1768 int (*set_hv_timer)(struct kvm_vcpu *vcpu, u64 guest_deadline_tsc,
1770 void (*cancel_hv_timer)(struct kvm_vcpu *vcpu);
1772 void (*setup_mce)(struct kvm_vcpu *vcpu);
1774 #ifdef CONFIG_KVM_SMM
1775 int (*smi_allowed)(struct kvm_vcpu *vcpu, bool for_injection);
1776 int (*enter_smm)(struct kvm_vcpu *vcpu, union kvm_smram *smram);
1777 int (*leave_smm)(struct kvm_vcpu *vcpu, const union kvm_smram *smram);
1778 void (*enable_smi_window)(struct kvm_vcpu *vcpu);
1781 int (*mem_enc_ioctl)(struct kvm *kvm, void __user *argp);
1782 int (*mem_enc_register_region)(struct kvm *kvm, struct kvm_enc_region *argp);
1783 int (*mem_enc_unregister_region)(struct kvm *kvm, struct kvm_enc_region *argp);
1784 int (*vm_copy_enc_context_from)(struct kvm *kvm, unsigned int source_fd);
1785 int (*vm_move_enc_context_from)(struct kvm *kvm, unsigned int source_fd);
1786 void (*guest_memory_reclaimed)(struct kvm *kvm);
1788 int (*get_msr_feature)(struct kvm_msr_entry *entry);
1790 int (*check_emulate_instruction)(struct kvm_vcpu *vcpu, int emul_type,
1791 void *insn, int insn_len);
1793 bool (*apic_init_signal_blocked)(struct kvm_vcpu *vcpu);
1794 int (*enable_l2_tlb_flush)(struct kvm_vcpu *vcpu);
1796 void (*migrate_timers)(struct kvm_vcpu *vcpu);
1797 void (*msr_filter_changed)(struct kvm_vcpu *vcpu);
1798 int (*complete_emulated_msr)(struct kvm_vcpu *vcpu, int err);
1800 void (*vcpu_deliver_sipi_vector)(struct kvm_vcpu *vcpu, u8 vector);
1803 * Returns vCPU specific APICv inhibit reasons
1805 unsigned long (*vcpu_get_apicv_inhibit_reasons)(struct kvm_vcpu *vcpu);
1807 gva_t (*get_untagged_addr)(struct kvm_vcpu *vcpu, gva_t gva, unsigned int flags);
1808 void *(*alloc_apic_backing_page)(struct kvm_vcpu *vcpu);
1811 struct kvm_x86_nested_ops {
1812 void (*leave_nested)(struct kvm_vcpu *vcpu);
1813 bool (*is_exception_vmexit)(struct kvm_vcpu *vcpu, u8 vector,
1815 int (*check_events)(struct kvm_vcpu *vcpu);
1816 bool (*has_events)(struct kvm_vcpu *vcpu);
1817 void (*triple_fault)(struct kvm_vcpu *vcpu);
1818 int (*get_state)(struct kvm_vcpu *vcpu,
1819 struct kvm_nested_state __user *user_kvm_nested_state,
1820 unsigned user_data_size);
1821 int (*set_state)(struct kvm_vcpu *vcpu,
1822 struct kvm_nested_state __user *user_kvm_nested_state,
1823 struct kvm_nested_state *kvm_state);
1824 bool (*get_nested_state_pages)(struct kvm_vcpu *vcpu);
1825 int (*write_log_dirty)(struct kvm_vcpu *vcpu, gpa_t l2_gpa);
1827 int (*enable_evmcs)(struct kvm_vcpu *vcpu,
1828 uint16_t *vmcs_version);
1829 uint16_t (*get_evmcs_version)(struct kvm_vcpu *vcpu);
1830 void (*hv_inject_synthetic_vmexit_post_tlb_flush)(struct kvm_vcpu *vcpu);
1833 struct kvm_x86_init_ops {
1834 int (*hardware_setup)(void);
1835 unsigned int (*handle_intel_pt_intr)(void);
1837 struct kvm_x86_ops *runtime_ops;
1838 struct kvm_pmu_ops *pmu_ops;
1841 struct kvm_arch_async_pf {
1848 extern u32 __read_mostly kvm_nr_uret_msrs;
1849 extern u64 __read_mostly host_efer;
1850 extern bool __read_mostly allow_smaller_maxphyaddr;
1851 extern bool __read_mostly enable_apicv;
1852 extern struct kvm_x86_ops kvm_x86_ops;
1854 #define KVM_X86_OP(func) \
1855 DECLARE_STATIC_CALL(kvm_x86_##func, *(((struct kvm_x86_ops *)0)->func));
1856 #define KVM_X86_OP_OPTIONAL KVM_X86_OP
1857 #define KVM_X86_OP_OPTIONAL_RET0 KVM_X86_OP
1858 #include <asm/kvm-x86-ops.h>
1860 int kvm_x86_vendor_init(struct kvm_x86_init_ops *ops);
1861 void kvm_x86_vendor_exit(void);
1863 #define __KVM_HAVE_ARCH_VM_ALLOC
1864 static inline struct kvm *kvm_arch_alloc_vm(void)
1866 return __vmalloc(kvm_x86_ops.vm_size, GFP_KERNEL_ACCOUNT | __GFP_ZERO);
1869 #define __KVM_HAVE_ARCH_VM_FREE
1870 void kvm_arch_free_vm(struct kvm *kvm);
1872 #if IS_ENABLED(CONFIG_HYPERV)
1873 #define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLBS
1874 static inline int kvm_arch_flush_remote_tlbs(struct kvm *kvm)
1876 if (kvm_x86_ops.flush_remote_tlbs &&
1877 !static_call(kvm_x86_flush_remote_tlbs)(kvm))
1883 #define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLBS_RANGE
1884 static inline int kvm_arch_flush_remote_tlbs_range(struct kvm *kvm, gfn_t gfn,
1887 if (!kvm_x86_ops.flush_remote_tlbs_range)
1890 return static_call(kvm_x86_flush_remote_tlbs_range)(kvm, gfn, nr_pages);
1892 #endif /* CONFIG_HYPERV */
1894 enum kvm_intr_type {
1895 /* Values are arbitrary, but must be non-zero. */
1896 KVM_HANDLING_IRQ = 1,
1900 /* Enable perf NMI and timer modes to work, and minimise false positives. */
1901 #define kvm_arch_pmi_in_guest(vcpu) \
1902 ((vcpu) && (vcpu)->arch.handling_intr_from_guest && \
1903 (!!in_nmi() == ((vcpu)->arch.handling_intr_from_guest == KVM_HANDLING_NMI)))
1905 void __init kvm_mmu_x86_module_init(void);
1906 int kvm_mmu_vendor_module_init(void);
1907 void kvm_mmu_vendor_module_exit(void);
1909 void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
1910 int kvm_mmu_create(struct kvm_vcpu *vcpu);
1911 void kvm_mmu_init_vm(struct kvm *kvm);
1912 void kvm_mmu_uninit_vm(struct kvm *kvm);
1914 void kvm_mmu_init_memslot_memory_attributes(struct kvm *kvm,
1915 struct kvm_memory_slot *slot);
1917 void kvm_mmu_after_set_cpuid(struct kvm_vcpu *vcpu);
1918 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
1919 void kvm_mmu_slot_remove_write_access(struct kvm *kvm,
1920 const struct kvm_memory_slot *memslot,
1922 void kvm_mmu_slot_try_split_huge_pages(struct kvm *kvm,
1923 const struct kvm_memory_slot *memslot,
1925 void kvm_mmu_try_split_huge_pages(struct kvm *kvm,
1926 const struct kvm_memory_slot *memslot,
1929 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm,
1930 const struct kvm_memory_slot *memslot);
1931 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm,
1932 const struct kvm_memory_slot *memslot);
1933 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, u64 gen);
1934 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned long kvm_nr_mmu_pages);
1936 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3);
1938 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
1939 const void *val, int bytes);
1941 struct kvm_irq_mask_notifier {
1942 void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked);
1944 struct hlist_node link;
1947 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
1948 struct kvm_irq_mask_notifier *kimn);
1949 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
1950 struct kvm_irq_mask_notifier *kimn);
1951 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin,
1954 extern bool tdp_enabled;
1956 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu);
1959 * EMULTYPE_NO_DECODE - Set when re-emulating an instruction (after completing
1960 * userspace I/O) to indicate that the emulation context
1961 * should be reused as is, i.e. skip initialization of
1962 * emulation context, instruction fetch and decode.
1964 * EMULTYPE_TRAP_UD - Set when emulating an intercepted #UD from hardware.
1965 * Indicates that only select instructions (tagged with
1966 * EmulateOnUD) should be emulated (to minimize the emulator
1967 * attack surface). See also EMULTYPE_TRAP_UD_FORCED.
1969 * EMULTYPE_SKIP - Set when emulating solely to skip an instruction, i.e. to
1970 * decode the instruction length. For use *only* by
1971 * kvm_x86_ops.skip_emulated_instruction() implementations if
1972 * EMULTYPE_COMPLETE_USER_EXIT is not set.
1974 * EMULTYPE_ALLOW_RETRY_PF - Set when the emulator should resume the guest to
1975 * retry native execution under certain conditions,
1976 * Can only be set in conjunction with EMULTYPE_PF.
1978 * EMULTYPE_TRAP_UD_FORCED - Set when emulating an intercepted #UD that was
1979 * triggered by KVM's magic "force emulation" prefix,
1980 * which is opt in via module param (off by default).
1981 * Bypasses EmulateOnUD restriction despite emulating
1982 * due to an intercepted #UD (see EMULTYPE_TRAP_UD).
1983 * Used to test the full emulator from userspace.
1985 * EMULTYPE_VMWARE_GP - Set when emulating an intercepted #GP for VMware
1986 * backdoor emulation, which is opt in via module param.
1987 * VMware backdoor emulation handles select instructions
1988 * and reinjects the #GP for all other cases.
1990 * EMULTYPE_PF - Set when emulating MMIO by way of an intercepted #PF, in which
1991 * case the CR2/GPA value pass on the stack is valid.
1993 * EMULTYPE_COMPLETE_USER_EXIT - Set when the emulator should update interruptibility
1994 * state and inject single-step #DBs after skipping
1995 * an instruction (after completing userspace I/O).
1997 * EMULTYPE_WRITE_PF_TO_SP - Set when emulating an intercepted page fault that
1998 * is attempting to write a gfn that contains one or
1999 * more of the PTEs used to translate the write itself,
2000 * and the owning page table is being shadowed by KVM.
2001 * If emulation of the faulting instruction fails and
2002 * this flag is set, KVM will exit to userspace instead
2003 * of retrying emulation as KVM cannot make forward
2006 * If emulation fails for a write to guest page tables,
2007 * KVM unprotects (zaps) the shadow page for the target
2008 * gfn and resumes the guest to retry the non-emulatable
2009 * instruction (on hardware). Unprotecting the gfn
2010 * doesn't allow forward progress for a self-changing
2011 * access because doing so also zaps the translation for
2012 * the gfn, i.e. retrying the instruction will hit a
2013 * !PRESENT fault, which results in a new shadow page
2014 * and sends KVM back to square one.
2016 #define EMULTYPE_NO_DECODE (1 << 0)
2017 #define EMULTYPE_TRAP_UD (1 << 1)
2018 #define EMULTYPE_SKIP (1 << 2)
2019 #define EMULTYPE_ALLOW_RETRY_PF (1 << 3)
2020 #define EMULTYPE_TRAP_UD_FORCED (1 << 4)
2021 #define EMULTYPE_VMWARE_GP (1 << 5)
2022 #define EMULTYPE_PF (1 << 6)
2023 #define EMULTYPE_COMPLETE_USER_EXIT (1 << 7)
2024 #define EMULTYPE_WRITE_PF_TO_SP (1 << 8)
2026 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type);
2027 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
2028 void *insn, int insn_len);
2029 void __kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu,
2030 u64 *data, u8 ndata);
2031 void kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu);
2033 void kvm_enable_efer_bits(u64);
2034 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer);
2035 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data, bool host_initiated);
2036 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data);
2037 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data);
2038 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu);
2039 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu);
2040 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu);
2041 int kvm_emulate_invd(struct kvm_vcpu *vcpu);
2042 int kvm_emulate_mwait(struct kvm_vcpu *vcpu);
2043 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu);
2044 int kvm_emulate_monitor(struct kvm_vcpu *vcpu);
2046 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in);
2047 int kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
2048 int kvm_emulate_halt(struct kvm_vcpu *vcpu);
2049 int kvm_emulate_halt_noskip(struct kvm_vcpu *vcpu);
2050 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu);
2051 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu);
2053 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
2054 void kvm_set_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
2055 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg);
2056 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector);
2058 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
2059 int reason, bool has_error_code, u32 error_code);
2061 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0);
2062 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4);
2063 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
2064 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
2065 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
2066 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
2067 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val);
2068 unsigned long kvm_get_dr(struct kvm_vcpu *vcpu, int dr);
2069 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
2070 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
2071 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu);
2073 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
2074 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
2076 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu);
2077 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
2078 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu);
2080 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
2081 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
2082 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr, unsigned long payload);
2083 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr);
2084 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
2085 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault);
2086 void kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
2087 struct x86_exception *fault);
2088 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl);
2089 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr);
2091 static inline int __kvm_irq_line_state(unsigned long *irq_state,
2092 int irq_source_id, int level)
2094 /* Logical OR for level trig interrupt */
2096 __set_bit(irq_source_id, irq_state);
2098 __clear_bit(irq_source_id, irq_state);
2100 return !!(*irq_state);
2103 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level);
2104 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id);
2106 void kvm_inject_nmi(struct kvm_vcpu *vcpu);
2107 int kvm_get_nr_pending_nmis(struct kvm_vcpu *vcpu);
2109 void kvm_update_dr7(struct kvm_vcpu *vcpu);
2111 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn);
2112 void kvm_mmu_free_roots(struct kvm *kvm, struct kvm_mmu *mmu,
2113 ulong roots_to_free);
2114 void kvm_mmu_free_guest_mode_roots(struct kvm *kvm, struct kvm_mmu *mmu);
2115 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
2116 struct x86_exception *exception);
2117 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
2118 struct x86_exception *exception);
2119 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
2120 struct x86_exception *exception);
2122 bool kvm_apicv_activated(struct kvm *kvm);
2123 bool kvm_vcpu_apicv_activated(struct kvm_vcpu *vcpu);
2124 void __kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu);
2125 void __kvm_set_or_clear_apicv_inhibit(struct kvm *kvm,
2126 enum kvm_apicv_inhibit reason, bool set);
2127 void kvm_set_or_clear_apicv_inhibit(struct kvm *kvm,
2128 enum kvm_apicv_inhibit reason, bool set);
2130 static inline void kvm_set_apicv_inhibit(struct kvm *kvm,
2131 enum kvm_apicv_inhibit reason)
2133 kvm_set_or_clear_apicv_inhibit(kvm, reason, true);
2136 static inline void kvm_clear_apicv_inhibit(struct kvm *kvm,
2137 enum kvm_apicv_inhibit reason)
2139 kvm_set_or_clear_apicv_inhibit(kvm, reason, false);
2142 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
2144 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u64 error_code,
2145 void *insn, int insn_len);
2146 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva);
2147 void kvm_mmu_invalidate_addr(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
2148 u64 addr, unsigned long roots);
2149 void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid);
2150 void kvm_mmu_new_pgd(struct kvm_vcpu *vcpu, gpa_t new_pgd);
2152 void kvm_configure_mmu(bool enable_tdp, int tdp_forced_root_level,
2153 int tdp_max_root_level, int tdp_huge_page_level);
2155 #ifdef CONFIG_KVM_PRIVATE_MEM
2156 #define kvm_arch_has_private_mem(kvm) ((kvm)->arch.vm_type != KVM_X86_DEFAULT_VM)
2158 #define kvm_arch_has_private_mem(kvm) false
2161 static inline u16 kvm_read_ldt(void)
2164 asm("sldt %0" : "=g"(ldt));
2168 static inline void kvm_load_ldt(u16 sel)
2170 asm("lldt %0" : : "rm"(sel));
2173 #ifdef CONFIG_X86_64
2174 static inline unsigned long read_msr(unsigned long msr)
2183 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
2185 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
2188 #define TSS_IOPB_BASE_OFFSET 0x66
2189 #define TSS_BASE_SIZE 0x68
2190 #define TSS_IOPB_SIZE (65536 / 8)
2191 #define TSS_REDIRECTION_SIZE (256 / 8)
2192 #define RMODE_TSS_SIZE \
2193 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
2196 TASK_SWITCH_CALL = 0,
2197 TASK_SWITCH_IRET = 1,
2198 TASK_SWITCH_JMP = 2,
2199 TASK_SWITCH_GATE = 3,
2202 #define HF_GUEST_MASK (1 << 0) /* VCPU is in guest-mode */
2204 #ifdef CONFIG_KVM_SMM
2205 #define HF_SMM_MASK (1 << 1)
2206 #define HF_SMM_INSIDE_NMI_MASK (1 << 2)
2208 # define KVM_MAX_NR_ADDRESS_SPACES 2
2209 /* SMM is currently unsupported for guests with private memory. */
2210 # define kvm_arch_nr_memslot_as_ids(kvm) (kvm_arch_has_private_mem(kvm) ? 1 : 2)
2211 # define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)->arch.hflags & HF_SMM_MASK ? 1 : 0)
2212 # define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm)
2214 # define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, 0)
2217 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v);
2218 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu);
2219 int kvm_cpu_has_extint(struct kvm_vcpu *v);
2220 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu);
2221 int kvm_cpu_get_interrupt(struct kvm_vcpu *v);
2222 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event);
2224 int kvm_pv_send_ipi(struct kvm *kvm, unsigned long ipi_bitmap_low,
2225 unsigned long ipi_bitmap_high, u32 min,
2226 unsigned long icr, int op_64_bit);
2228 int kvm_add_user_return_msr(u32 msr);
2229 int kvm_find_user_return_msr(u32 msr);
2230 int kvm_set_user_return_msr(unsigned index, u64 val, u64 mask);
2232 static inline bool kvm_is_supported_user_return_msr(u32 msr)
2234 return kvm_find_user_return_msr(msr) >= 0;
2237 u64 kvm_scale_tsc(u64 tsc, u64 ratio);
2238 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc);
2239 u64 kvm_calc_nested_tsc_offset(u64 l1_offset, u64 l2_offset, u64 l2_multiplier);
2240 u64 kvm_calc_nested_tsc_multiplier(u64 l1_multiplier, u64 l2_multiplier);
2242 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu);
2243 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip);
2245 void kvm_make_scan_ioapic_request(struct kvm *kvm);
2246 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
2247 unsigned long *vcpu_bitmap);
2249 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
2250 struct kvm_async_pf *work);
2251 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
2252 struct kvm_async_pf *work);
2253 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu,
2254 struct kvm_async_pf *work);
2255 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu);
2256 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu);
2257 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn);
2259 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu);
2260 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err);
2262 void __user *__x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
2264 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu);
2265 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu);
2267 bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq,
2268 struct kvm_vcpu **dest_vcpu);
2270 void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e,
2271 struct kvm_lapic_irq *irq);
2273 static inline bool kvm_irq_is_postable(struct kvm_lapic_irq *irq)
2275 /* We can only post Fixed and LowPrio IRQs */
2276 return (irq->delivery_mode == APIC_DM_FIXED ||
2277 irq->delivery_mode == APIC_DM_LOWEST);
2280 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu)
2282 static_call_cond(kvm_x86_vcpu_blocking)(vcpu);
2285 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu)
2287 static_call_cond(kvm_x86_vcpu_unblocking)(vcpu);
2290 static inline int kvm_cpu_get_apicid(int mps_cpu)
2292 #ifdef CONFIG_X86_LOCAL_APIC
2293 return default_cpu_present_to_apicid(mps_cpu);
2300 int memslot_rmap_alloc(struct kvm_memory_slot *slot, unsigned long npages);
2302 #define KVM_CLOCK_VALID_FLAGS \
2303 (KVM_CLOCK_TSC_STABLE | KVM_CLOCK_REALTIME | KVM_CLOCK_HOST_TSC)
2305 #define KVM_X86_VALID_QUIRKS \
2306 (KVM_X86_QUIRK_LINT0_REENABLED | \
2307 KVM_X86_QUIRK_CD_NW_CLEARED | \
2308 KVM_X86_QUIRK_LAPIC_MMIO_HOLE | \
2309 KVM_X86_QUIRK_OUT_7E_INC_RIP | \
2310 KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT | \
2311 KVM_X86_QUIRK_FIX_HYPERCALL_INSN | \
2312 KVM_X86_QUIRK_MWAIT_NEVER_UD_FAULTS)
2315 * KVM previously used a u32 field in kvm_run to indicate the hypercall was
2316 * initiated from long mode. KVM now sets bit 0 to indicate long mode, but the
2317 * remaining 31 lower bits must be 0 to preserve ABI.
2319 #define KVM_EXIT_HYPERCALL_MBZ GENMASK_ULL(31, 1)
2321 #endif /* _ASM_X86_KVM_HOST_H */