1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_X86_CPUFEATURE_H
3 #define _ASM_X86_CPUFEATURE_H
5 #include <asm/processor.h>
7 #if defined(__KERNEL__) && !defined(__ASSEMBLY__)
10 #include <linux/bitops.h>
35 #ifdef CONFIG_X86_FEATURE_NAMES
36 extern const char * const x86_cap_flags[NCAPINTS*32];
37 extern const char * const x86_power_flags[32];
38 #define X86_CAP_FMT "%s"
39 #define x86_cap_flag(flag) x86_cap_flags[flag]
41 #define X86_CAP_FMT "%d:%d"
42 #define x86_cap_flag(flag) ((flag) >> 5), ((flag) & 31)
46 * In order to save room, we index into this array by doing
47 * X86_BUG_<name> - NCAPINTS*32.
49 extern const char * const x86_bug_flags[NBUGINTS*32];
51 #define test_cpu_cap(c, bit) \
52 test_bit(bit, (unsigned long *)((c)->x86_capability))
55 * There are 32 bits/features in each mask word. The high bits
56 * (selected with (bit>>5) give us the word number and the low 5
57 * bits give us the bit/feature number inside the word.
58 * (1UL<<((bit)&31) gives us a mask for the feature_bit so we can
59 * see if it is set in the mask word.
61 #define CHECK_BIT_IN_MASK_WORD(maskname, word, bit) \
62 (((bit)>>5)==(word) && (1UL<<((bit)&31) & maskname##word ))
64 #define REQUIRED_MASK_BIT_SET(feature_bit) \
65 ( CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 0, feature_bit) || \
66 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 1, feature_bit) || \
67 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 2, feature_bit) || \
68 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 3, feature_bit) || \
69 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 4, feature_bit) || \
70 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 5, feature_bit) || \
71 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 6, feature_bit) || \
72 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 7, feature_bit) || \
73 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 8, feature_bit) || \
74 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 9, feature_bit) || \
75 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 10, feature_bit) || \
76 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 11, feature_bit) || \
77 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 12, feature_bit) || \
78 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 13, feature_bit) || \
79 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 14, feature_bit) || \
80 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 15, feature_bit) || \
81 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 16, feature_bit) || \
82 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 17, feature_bit) || \
83 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 18, feature_bit) || \
84 REQUIRED_MASK_CHECK || \
85 BUILD_BUG_ON_ZERO(NCAPINTS != 19))
87 #define DISABLED_MASK_BIT_SET(feature_bit) \
88 ( CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 0, feature_bit) || \
89 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 1, feature_bit) || \
90 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 2, feature_bit) || \
91 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 3, feature_bit) || \
92 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 4, feature_bit) || \
93 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 5, feature_bit) || \
94 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 6, feature_bit) || \
95 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 7, feature_bit) || \
96 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 8, feature_bit) || \
97 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 9, feature_bit) || \
98 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 10, feature_bit) || \
99 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 11, feature_bit) || \
100 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 12, feature_bit) || \
101 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 13, feature_bit) || \
102 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 14, feature_bit) || \
103 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 15, feature_bit) || \
104 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 16, feature_bit) || \
105 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 17, feature_bit) || \
106 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 18, feature_bit) || \
107 DISABLED_MASK_CHECK || \
108 BUILD_BUG_ON_ZERO(NCAPINTS != 19))
110 #define cpu_has(c, bit) \
111 (__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \
112 test_cpu_cap(c, bit))
114 #define this_cpu_has(bit) \
115 (__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \
116 x86_this_cpu_test_bit(bit, \
117 (unsigned long __percpu *)&cpu_info.x86_capability))
120 * This macro is for detection of features which need kernel
121 * infrastructure to be used. It may *not* directly test the CPU
122 * itself. Use the cpu_has() family if you want true runtime
123 * testing of CPU features, like in hypervisor code where you are
124 * supporting a possible guest feature where host support for it
127 #define cpu_feature_enabled(bit) \
128 (__builtin_constant_p(bit) && DISABLED_MASK_BIT_SET(bit) ? 0 : static_cpu_has(bit))
130 #define boot_cpu_has(bit) cpu_has(&boot_cpu_data, bit)
132 #define set_cpu_cap(c, bit) set_bit(bit, (unsigned long *)((c)->x86_capability))
134 extern void setup_clear_cpu_cap(unsigned int bit);
135 extern void clear_cpu_cap(struct cpuinfo_x86 *c, unsigned int bit);
137 #define setup_force_cpu_cap(bit) do { \
138 set_cpu_cap(&boot_cpu_data, bit); \
139 set_bit(bit, (unsigned long *)cpu_caps_set); \
142 #define setup_force_cpu_bug(bit) setup_force_cpu_cap(bit)
144 #if defined(__clang__) && !defined(CONFIG_CC_HAS_ASM_GOTO)
147 * Workaround for the sake of BPF compilation which utilizes kernel
148 * headers, but clang does not support ASM GOTO and fails the build.
150 #ifndef __BPF_TRACING__
151 #warning "Compiler lacks ASM_GOTO support. Add -D __BPF_TRACING__ to your compiler arguments"
154 #define static_cpu_has(bit) boot_cpu_has(bit)
159 * Static testing of CPU features. Used the same as boot_cpu_has(). It
160 * statically patches the target code for additional performance. Use
161 * static_cpu_has() only in fast paths, where every cycle counts. Which
162 * means that the boot_cpu_has() variant is already fast enough for the
163 * majority of cases and you should stick to using it as it is generally
164 * only two instructions: a RIP-relative MOV and a TEST.
166 static __always_inline bool _static_cpu_has(u16 bit)
168 asm_volatile_goto("1: jmp 6f\n"
170 ".skip -(((5f-4f) - (2b-1b)) > 0) * "
171 "((5f-4f) - (2b-1b)),0x90\n"
173 ".section .altinstructions,\"a\"\n"
174 " .long 1b - .\n" /* src offset */
175 " .long 4f - .\n" /* repl offset */
176 " .word %P[always]\n" /* always replace */
177 " .byte 3b - 1b\n" /* src len */
178 " .byte 5f - 4f\n" /* repl len */
179 " .byte 3b - 2b\n" /* pad len */
181 ".section .altinstr_replacement,\"ax\"\n"
185 ".section .altinstructions,\"a\"\n"
186 " .long 1b - .\n" /* src offset */
187 " .long 0\n" /* no replacement */
188 " .word %P[feature]\n" /* feature bit */
189 " .byte 3b - 1b\n" /* src len */
190 " .byte 0\n" /* repl len */
191 " .byte 0\n" /* pad len */
193 ".section .altinstr_aux,\"ax\"\n"
195 " testb %[bitnum],%[cap_byte]\n"
199 : : [feature] "i" (bit),
200 [always] "i" (X86_FEATURE_ALWAYS),
201 [bitnum] "i" (1 << (bit & 7)),
202 [cap_byte] "m" (((const char *)boot_cpu_data.x86_capability)[bit >> 3])
210 #define static_cpu_has(bit) \
212 __builtin_constant_p(boot_cpu_has(bit)) ? \
213 boot_cpu_has(bit) : \
214 _static_cpu_has(bit) \
218 #define cpu_has_bug(c, bit) cpu_has(c, (bit))
219 #define set_cpu_bug(c, bit) set_cpu_cap(c, (bit))
220 #define clear_cpu_bug(c, bit) clear_cpu_cap(c, (bit))
222 #define static_cpu_has_bug(bit) static_cpu_has((bit))
223 #define boot_cpu_has_bug(bit) cpu_has_bug(&boot_cpu_data, (bit))
224 #define boot_cpu_set_bug(bit) set_cpu_cap(&boot_cpu_data, (bit))
226 #define MAX_CPU_FEATURES (NCAPINTS * 32)
227 #define cpu_have_feature boot_cpu_has
229 #define CPU_FEATURE_TYPEFMT "x86,ven%04Xfam%04Xmod%04X"
230 #define CPU_FEATURE_TYPEVAL boot_cpu_data.x86_vendor, boot_cpu_data.x86, \
231 boot_cpu_data.x86_model
233 #endif /* defined(__KERNEL__) && !defined(__ASSEMBLY__) */
234 #endif /* _ASM_X86_CPUFEATURE_H */