1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (C) 1991, 1992, 1993 Linus Torvalds
9 * head.S contains the 32-bit startup code.
11 * NOTE!!! Startup happens at absolute address 0x00001000, which is also where
12 * the page directory will exist. The startup code will be overwritten by
13 * the page directory. [According to comments etc elsewhere on a compressed
14 * kernel it will end up at 0x1000 + 1Mb I hope so as I assume this. - AC]
16 * Page 0 is deliberately kept safe, since System Management Mode code in
17 * laptops may need to access the BIOS data stored there. This is also
18 * useful for future device drivers that either access the BIOS via VM86
23 * High loaded stuff by Hans Lermen & Werner Almesberger, Feb. 1996
28 #include <linux/init.h>
29 #include <linux/linkage.h>
30 #include <asm/segment.h>
33 #include <asm/processor-flags.h>
34 #include <asm/asm-offsets.h>
35 #include <asm/bootparam.h>
36 #include <asm/desc_defs.h>
40 * Locally defined symbols should be marked hidden:
49 * This macro gives the relative virtual address of X, i.e. the offset of X
50 * from startup_32. This is the same as the link-time virtual address of X,
51 * since startup_32 is at 0, but defining it this way tells the
52 * assembler/linker that we do not want the actual run-time address of X. This
53 * prevents the linker from trying to create unwanted run-time relocation
54 * entries for the reference when the compressed kernel is linked as PIE.
56 * A reference X(%reg) will result in the link-time VA of X being stored with
57 * the instruction, and a run-time R_X86_64_RELATIVE relocation entry that
58 * adds the 64-bit base address where the kernel is loaded.
60 * Replacing it with (X-startup_32)(%reg) results in the offset being stored,
61 * and no run-time relocation.
63 * The macro should be used as a displacement with a base register containing
64 * the run-time address of startup_32 [i.e. rva(X)(%reg)], or as an immediate
67 * This macro can only be used from within the .head.text section, since the
68 * expression requires startup_32 to be in the same section as the code being
71 #define rva(X) ((X) - startup_32)
74 SYM_FUNC_START(startup_32)
76 * 32bit entry is 0 and it is ABI so immutable!
77 * If we come here directly from a bootloader,
78 * kernel(text+data+bss+brk) ramdisk, zero_page, command line
79 * all need to be under the 4G limit.
85 * Calculate the delta between where we were compiled to run
86 * at and where we were actually loaded at. This can only be done
87 * with a short local call on x86. Nothing else will tell us what
88 * address we are running at. The reserved chunk of the real-mode
89 * data at 0x1e4 (defined as a scratch field) are used as the stack
90 * for this calculation. Only 4 bytes are needed.
92 leal (BP_scratch+4)(%esi), %esp
97 /* Load new GDT with the 64bit segments using 32bit descriptor */
98 leal rva(gdt)(%ebp), %eax
102 /* Load segment registers with our descriptors */
103 movl $__BOOT_DS, %eax
110 /* setup a stack and make sure cpu supports long mode. */
111 leal rva(boot_stack_end)(%ebp), %esp
118 * Compute the delta between where we were compiled to run at
119 * and where the code will actually run at.
121 * %ebp contains the address we are loaded at by the boot loader and %ebx
122 * contains the address where we should move the kernel image temporarily
123 * for safe in-place decompression.
126 #ifdef CONFIG_RELOCATABLE
129 #ifdef CONFIG_EFI_STUB
131 * If we were loaded via the EFI LoadImage service, startup_32 will be at an
132 * offset to the start of the space allocated for the image. efi_pe_entry will
133 * set up image_offset to tell us where the image actually starts, so that we
134 * can use the full available buffer.
135 * image_offset = startup_32 - image_base
136 * Otherwise image_offset will be zero and has no effect on the calculations.
138 subl rva(image_offset)(%ebp), %ebx
141 movl BP_kernel_alignment(%esi), %eax
146 cmpl $LOAD_PHYSICAL_ADDR, %ebx
149 movl $LOAD_PHYSICAL_ADDR, %ebx
152 /* Target address to relocate to for decompression */
153 addl BP_init_size(%esi), %ebx
154 subl $ rva(_end), %ebx
157 * Prepare for entering 64 bit mode
160 /* Enable PAE mode */
162 orl $X86_CR4_PAE, %eax
166 * Build early 4G boot pagetable
169 * If SEV is active then set the encryption mask in the page tables.
170 * This will insure that when the kernel is copied and decompressed
171 * it will be done so encrypted.
173 call get_sev_encryption_bit
177 subl $32, %eax /* Encryption bit is always above bit 31 */
178 bts %eax, %edx /* Set encryption mask for page tables */
181 /* Initialize Page tables to 0 */
182 leal rva(pgtable)(%ebx), %edi
184 movl $(BOOT_INIT_PGT_SIZE/4), %ecx
188 leal rva(pgtable + 0)(%ebx), %edi
189 leal 0x1007 (%edi), %eax
194 leal rva(pgtable + 0x1000)(%ebx), %edi
195 leal 0x1007(%edi), %eax
197 1: movl %eax, 0x00(%edi)
198 addl %edx, 0x04(%edi)
199 addl $0x00001000, %eax
205 leal rva(pgtable + 0x2000)(%ebx), %edi
206 movl $0x00000183, %eax
208 1: movl %eax, 0(%edi)
210 addl $0x00200000, %eax
215 /* Enable the boot page tables */
216 leal rva(pgtable)(%ebx), %eax
219 /* Enable Long mode in EFER (Extended Feature Enable Register) */
222 btsl $_EFER_LME, %eax
225 /* After gdt is loaded */
228 movl $__BOOT_TSS, %eax
232 * Setup for the jump to 64bit mode
234 * When the jump is performend we will be in long mode but
235 * in 32bit compatibility mode with EFER.LME = 1, CS.L = 0, CS.D = 1
236 * (and in turn EFER.LMA = 1). To jump into 64bit mode we use
237 * the new gdt/idt that has __KERNEL_CS with CS.L = 1.
238 * We place all of the values on our mini stack so lret can
239 * used to perform that far jump.
241 leal rva(startup_64)(%ebp), %eax
242 #ifdef CONFIG_EFI_MIXED
243 movl rva(efi32_boot_args)(%ebp), %edi
246 leal rva(efi64_stub_entry)(%ebp), %eax
247 movl rva(efi32_boot_args+4)(%ebp), %esi
248 movl rva(efi32_boot_args+8)(%ebp), %edx // saved bootparams pointer
252 * efi_pe_entry uses MS calling convention, which requires 32 bytes of
253 * shadow space on the stack even if all arguments are passed in
254 * registers. We also need an additional 8 bytes for the space that
255 * would be occupied by the return address, and this also results in
256 * the correct stack alignment for entry.
259 leal rva(efi_pe_entry)(%ebp), %eax
260 movl %edi, %ecx // MS calling convention
267 /* Enter paged protected Mode, activating Long Mode */
268 movl $(X86_CR0_PG | X86_CR0_PE), %eax /* Enable Paging and Protected mode */
271 /* Jump from 32bit compatibility mode into 64bit mode. */
273 SYM_FUNC_END(startup_32)
275 #ifdef CONFIG_EFI_MIXED
277 SYM_FUNC_START(efi32_stub_entry)
278 add $0x4, %esp /* Discard return address */
287 movl %esi, rva(efi32_boot_args+8)(%ebp)
288 SYM_INNER_LABEL(efi32_pe_stub_entry, SYM_L_LOCAL)
289 movl %ecx, rva(efi32_boot_args)(%ebp)
290 movl %edx, rva(efi32_boot_args+4)(%ebp)
291 movb $0, rva(efi_is64)(%ebp)
293 /* Save firmware GDTR and code/data selectors */
294 sgdtl rva(efi32_boot_gdt)(%ebp)
295 movw %cs, rva(efi32_boot_cs)(%ebp)
296 movw %ds, rva(efi32_boot_ds)(%ebp)
300 btrl $X86_CR0_PG_BIT, %eax
304 SYM_FUNC_END(efi32_stub_entry)
309 SYM_CODE_START(startup_64)
311 * 64bit entry is 0x200 and it is ABI so immutable!
312 * We come here either from startup_32 or directly from a
314 * If we come here from a bootloader, kernel(text+data+bss+brk),
315 * ramdisk, zero_page, command line could be above 4G.
316 * We depend on an identity mapped page table being provided
317 * that maps our entire kernel(text+data+bss+brk), zero page
324 /* Setup data segments. */
333 * Compute the decompressed kernel start address. It is where
334 * we were loaded at aligned to a 2M boundary. %rbp contains the
335 * decompressed kernel start address.
337 * If it is a relocatable kernel then decompress and run the kernel
338 * from load address aligned to 2MB addr, otherwise decompress and
339 * run the kernel from LOAD_PHYSICAL_ADDR
341 * We cannot rely on the calculation done in 32-bit mode, since we
342 * may have been invoked via the 64-bit entry point.
345 /* Start with the delta to where the kernel will run at. */
346 #ifdef CONFIG_RELOCATABLE
347 leaq startup_32(%rip) /* - $startup_32 */, %rbp
349 #ifdef CONFIG_EFI_STUB
351 * If we were loaded via the EFI LoadImage service, startup_32 will be at an
352 * offset to the start of the space allocated for the image. efi_pe_entry will
353 * set up image_offset to tell us where the image actually starts, so that we
354 * can use the full available buffer.
355 * image_offset = startup_32 - image_base
356 * Otherwise image_offset will be zero and has no effect on the calculations.
358 movl image_offset(%rip), %eax
362 movl BP_kernel_alignment(%rsi), %eax
367 cmpq $LOAD_PHYSICAL_ADDR, %rbp
370 movq $LOAD_PHYSICAL_ADDR, %rbp
373 /* Target address to relocate to for decompression */
374 movl BP_init_size(%rsi), %ebx
375 subl $ rva(_end), %ebx
378 /* Set up the stack */
379 leaq rva(boot_stack_end)(%rbx), %rsp
382 * At this point we are in long mode with 4-level paging enabled,
383 * but we might want to enable 5-level paging or vice versa.
385 * The problem is that we cannot do it directly. Setting or clearing
386 * CR4.LA57 in long mode would trigger #GP. So we need to switch off
387 * long mode and paging first.
389 * We also need a trampoline in lower memory to switch over from
390 * 4- to 5-level paging for cases when the bootloader puts the kernel
391 * above 4G, but didn't enable 5-level paging for us.
393 * The same trampoline can be used to switch from 5- to 4-level paging
394 * mode, like when starting 4-level paging kernel via kexec() when
395 * original kernel worked in 5-level paging mode.
397 * For the trampoline, we need the top page table to reside in lower
398 * memory as we don't have a way to load 64-bit values into CR3 in
401 * We go though the trampoline even if we don't have to: if we're
402 * already in a desired paging mode. This way the trampoline code gets
403 * tested on every boot.
406 /* Make sure we have GDT with 32-bit code segment */
407 leaq gdt64(%rip), %rax
411 /* Reload CS so IRET returns to a CS actually in the GDT */
413 leaq .Lon_kernel_cs(%rip), %rax
424 * paging_prepare() sets up the trampoline and checks if we need to
425 * enable 5-level paging.
427 * paging_prepare() returns a two-quadword structure which lands
429 * - Address of the trampoline is returned in RAX.
430 * - Non zero RDX means trampoline needs to enable 5-level
433 * RSI holds real mode data and needs to be preserved across
434 * this function call.
437 movq %rsi, %rdi /* real mode address */
441 /* Save the trampoline address in RCX */
445 * Load the address of trampoline_return() into RDI.
446 * It will be used by the trampoline to return to the main code.
448 leaq trampoline_return(%rip), %rdi
450 /* Switch to compatibility mode (CS.L = 0 CS.D = 1) via far return */
452 leaq TRAMPOLINE_32BIT_CODE_OFFSET(%rax), %rax
456 /* Restore the stack, the 32-bit trampoline uses its own stack */
457 leaq rva(boot_stack_end)(%rbx), %rsp
460 * cleanup_trampoline() would restore trampoline memory.
462 * RDI is address of the page table to use instead of page table
463 * in trampoline memory (if required).
465 * RSI holds real mode data and needs to be preserved across
466 * this function call.
469 leaq rva(top_pgtable)(%rbx), %rdi
470 call cleanup_trampoline
478 * Copy the compressed kernel to the end of our buffer
479 * where decompression in place becomes safe.
482 leaq (_bss-8)(%rip), %rsi
483 leaq rva(_bss-8)(%rbx), %rdi
484 movl $(_bss - startup_32), %ecx
492 * The GDT may get overwritten either during the copy we just did or
493 * during extract_kernel below. To avoid any issues, repoint the GDTR
494 * to the new copy of the GDT.
496 leaq rva(gdt64)(%rbx), %rax
497 leaq rva(gdt)(%rbx), %rdx
502 * Jump to the relocated address.
504 leaq rva(.Lrelocated)(%rbx), %rax
506 SYM_CODE_END(startup_64)
508 #ifdef CONFIG_EFI_STUB
510 SYM_FUNC_START(efi64_stub_entry)
511 SYM_FUNC_START_ALIAS(efi_stub_entry)
512 and $~0xf, %rsp /* realign the stack */
513 movq %rdx, %rbx /* save boot_params pointer */
516 leaq rva(startup_64)(%rax), %rax
518 SYM_FUNC_END(efi64_stub_entry)
519 SYM_FUNC_END_ALIAS(efi_stub_entry)
523 SYM_FUNC_START_LOCAL_NOALIGN(.Lrelocated)
526 * Clear BSS (stack is currently empty)
529 leaq _bss(%rip), %rdi
530 leaq _ebss(%rip), %rcx
536 * If running as an SEV guest, the encryption mask is required in the
537 * page-table setup code below. When the guest also has SEV-ES enabled
538 * set_sev_encryption_mask() will cause #VC exceptions, but the stage2
539 * handler can't map its GHCB because the page-table is not set up yet.
540 * So set up the encryption mask here while still on the stage1 #VC
541 * handler. Then load stage2 IDT and switch to the kernel's own
545 call set_sev_encryption_mask
548 /* Pass boot_params to initialize_identity_maps() */
550 call initialize_identity_maps
554 * Do the extraction, and jump to the new kernel..
556 pushq %rsi /* Save the real mode argument */
557 movq %rsi, %rdi /* real mode address */
558 leaq boot_heap(%rip), %rsi /* malloc area for uncompression */
559 leaq input_data(%rip), %rdx /* input_data */
560 movl input_len(%rip), %ecx /* input_len */
561 movq %rbp, %r8 /* output target address */
562 movl output_len(%rip), %r9d /* decompressed length, end of relocs */
563 call extract_kernel /* returns kernel location in %rax */
567 * Jump to the decompressed kernel.
570 SYM_FUNC_END(.Lrelocated)
574 * This is the 32-bit trampoline that will be copied over to low memory.
576 * RDI contains the return address (might be above 4G).
577 * ECX contains the base address of the trampoline memory.
578 * Non zero RDX means trampoline needs to enable 5-level paging.
580 SYM_CODE_START(trampoline_32bit_src)
581 /* Set up data and stack segments */
582 movl $__KERNEL_DS, %eax
586 /* Set up new stack */
587 leal TRAMPOLINE_32BIT_STACK_END(%ecx), %esp
591 btrl $X86_CR0_PG_BIT, %eax
594 /* Check what paging mode we want to be in after the trampoline */
598 /* We want 5-level paging: don't touch CR3 if it already points to 5-level page tables */
600 testl $X86_CR4_LA57, %eax
604 /* We want 4-level paging: don't touch CR3 if it already points to 4-level page tables */
606 testl $X86_CR4_LA57, %eax
609 /* Point CR3 to the trampoline's new top level page table */
610 leal TRAMPOLINE_32BIT_PGTABLE_OFFSET(%ecx), %eax
613 /* Set EFER.LME=1 as a precaution in case hypervsior pulls the rug */
618 btsl $_EFER_LME, %eax
623 /* Enable PAE and LA57 (if required) paging modes */
624 movl $X86_CR4_PAE, %eax
627 orl $X86_CR4_LA57, %eax
631 /* Calculate address of paging_enabled() once we are executing in the trampoline */
632 leal .Lpaging_enabled - trampoline_32bit_src + TRAMPOLINE_32BIT_CODE_OFFSET(%ecx), %eax
634 /* Prepare the stack for far return to Long Mode */
638 /* Enable paging again */
639 movl $(X86_CR0_PG | X86_CR0_PE), %eax
643 SYM_CODE_END(trampoline_32bit_src)
646 SYM_FUNC_START_LOCAL_NOALIGN(.Lpaging_enabled)
647 /* Return from the trampoline */
649 SYM_FUNC_END(.Lpaging_enabled)
652 * The trampoline code has a size limit.
653 * Make sure we fail to compile if the trampoline code grows
654 * beyond TRAMPOLINE_32BIT_CODE_SIZE bytes.
656 .org trampoline_32bit_src + TRAMPOLINE_32BIT_CODE_SIZE
659 SYM_FUNC_START_LOCAL_NOALIGN(.Lno_longmode)
660 /* This isn't an x86-64 CPU, so hang intentionally, we cannot continue */
664 SYM_FUNC_END(.Lno_longmode)
666 #include "../../kernel/verify_cpu.S"
669 SYM_DATA_START_LOCAL(gdt64)
670 .word gdt_end - gdt - 1
674 SYM_DATA_START_LOCAL(gdt)
675 .word gdt_end - gdt - 1
678 .quad 0x00cf9a000000ffff /* __KERNEL32_CS */
679 .quad 0x00af9a000000ffff /* __KERNEL_CS */
680 .quad 0x00cf92000000ffff /* __KERNEL_DS */
681 .quad 0x0080890000000000 /* TS descriptor */
682 .quad 0x0000000000000000 /* TS continued */
683 SYM_DATA_END_LABEL(gdt, SYM_L_LOCAL, gdt_end)
685 SYM_DATA_START(boot_idt_desc)
686 .word boot_idt_end - boot_idt - 1
688 SYM_DATA_END(boot_idt_desc)
690 SYM_DATA_START(boot_idt)
691 .rept BOOT_IDT_ENTRIES
695 SYM_DATA_END_LABEL(boot_idt, SYM_L_GLOBAL, boot_idt_end)
697 #ifdef CONFIG_EFI_STUB
698 SYM_DATA(image_offset, .long 0)
700 #ifdef CONFIG_EFI_MIXED
701 SYM_DATA_LOCAL(efi32_boot_args, .long 0, 0, 0)
702 SYM_DATA(efi_is64, .byte 1)
704 #define ST32_boottime 60 // offsetof(efi_system_table_32_t, boottime)
705 #define BS32_handle_protocol 88 // offsetof(efi_boot_services_32_t, handle_protocol)
706 #define LI32_image_base 32 // offsetof(efi_loaded_image_32_t, image_base)
710 SYM_FUNC_START(efi32_pe_entry)
712 * efi_status_t efi32_pe_entry(efi_handle_t image_handle,
713 * efi_system_table_32_t *sys_table)
718 pushl %eax // dummy push to allocate loaded_image
720 pushl %ebx // save callee-save registers
723 call verify_cpu // check for long mode support
725 movl $0x80000003, %eax // EFI_UNSUPPORTED
732 /* Get the loaded image protocol pointer from the image handle */
734 pushl %eax // &loaded_image
735 leal rva(loaded_image_proto)(%ebx), %eax
736 pushl %eax // pass the GUID address
737 pushl 8(%ebp) // pass the image handle
740 * Note the alignment of the stack frame.
742 * handle <-- 16-byte aligned on entry by ABI
745 * loaded_image <-- local variable
746 * saved %ebx <-- 16-byte aligned here
749 * &loaded_image_proto
750 * handle <-- 16-byte aligned for call to handle_protocol
753 movl 12(%ebp), %eax // sys_table
754 movl ST32_boottime(%eax), %eax // sys_table->boottime
755 call *BS32_handle_protocol(%eax) // sys_table->boottime->handle_protocol
756 addl $12, %esp // restore argument space
760 movl 8(%ebp), %ecx // image_handle
761 movl 12(%ebp), %edx // sys_table
762 movl -4(%ebp), %esi // loaded_image
763 movl LI32_image_base(%esi), %esi // loaded_image->image_base
764 movl %ebx, %ebp // startup_32 for efi32_pe_stub_entry
766 * We need to set the image_offset variable here since startup_32() will
767 * use it before we get to the 64-bit efi_pe_entry() in C code.
770 movl %ebx, rva(image_offset)(%ebp) // save image_offset
771 jmp efi32_pe_stub_entry
773 2: popl %edi // restore callee-save registers
777 SYM_FUNC_END(efi32_pe_entry)
780 /* EFI loaded image protocol GUID */
782 SYM_DATA_START_LOCAL(loaded_image_proto)
785 .byte 0x8e, 0x3f, 0x00, 0xa0, 0xc9, 0x69, 0x72, 0x3b
786 SYM_DATA_END(loaded_image_proto)
790 * Stack and heap for uncompression
794 SYM_DATA_LOCAL(boot_heap, .fill BOOT_HEAP_SIZE, 1, 0)
796 SYM_DATA_START_LOCAL(boot_stack)
797 .fill BOOT_STACK_SIZE, 1, 0
799 SYM_DATA_END_LABEL(boot_stack, SYM_L_LOCAL, boot_stack_end)
802 * Space for page tables (not in .bss so not zeroed)
804 .section ".pgtable","aw",@nobits
806 SYM_DATA_LOCAL(pgtable, .fill BOOT_PGT_SIZE, 1, 0)
809 * The page table is going to be used instead of page table in the trampoline
812 SYM_DATA_LOCAL(top_pgtable, .fill PAGE_SIZE, 1, 0)