1 /* $Id: time.c,v 1.42 2002/01/23 14:33:55 davem Exp $
2 * time.c: UltraSparc timer and TOD clock support.
4 * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
5 * Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be)
7 * Based largely on code which is:
9 * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
12 #include <linux/config.h>
13 #include <linux/errno.h>
14 #include <linux/module.h>
15 #include <linux/sched.h>
16 #include <linux/kernel.h>
17 #include <linux/param.h>
18 #include <linux/string.h>
20 #include <linux/interrupt.h>
21 #include <linux/time.h>
22 #include <linux/timex.h>
23 #include <linux/init.h>
24 #include <linux/ioport.h>
25 #include <linux/mc146818rtc.h>
26 #include <linux/delay.h>
27 #include <linux/profile.h>
28 #include <linux/bcd.h>
29 #include <linux/jiffies.h>
30 #include <linux/cpufreq.h>
31 #include <linux/percpu.h>
32 #include <linux/profile.h>
33 #include <linux/miscdevice.h>
34 #include <linux/rtc.h>
36 #include <asm/oplib.h>
37 #include <asm/mostek.h>
38 #include <asm/timer.h>
46 #include <asm/starfire.h>
48 #include <asm/sections.h>
49 #include <asm/cpudata.h>
50 #include <asm/uaccess.h>
53 DEFINE_SPINLOCK(mostek_lock);
54 DEFINE_SPINLOCK(rtc_lock);
55 void __iomem *mstk48t02_regs = NULL;
57 unsigned long ds1287_regs = 0UL;
60 extern unsigned long wall_jiffies;
62 static void __iomem *mstk48t08_regs;
63 static void __iomem *mstk48t59_regs;
65 static int set_rtc_mmss(unsigned long);
67 #define TICK_PRIV_BIT (1UL << 63)
70 unsigned long profile_pc(struct pt_regs *regs)
72 unsigned long pc = instruction_pointer(regs);
74 if (in_lock_functions(pc))
75 return regs->u_regs[UREG_RETPC];
78 EXPORT_SYMBOL(profile_pc);
81 static void tick_disable_protection(void)
83 /* Set things up so user can access tick register for profiling
84 * purposes. Also workaround BB_ERRATA_1 by doing a dummy
85 * read back of %tick after writing it.
91 "1: rd %%tick, %%g2\n"
92 " add %%g2, 6, %%g2\n"
93 " andn %%g2, %0, %%g2\n"
94 " wrpr %%g2, 0, %%tick\n"
101 static void tick_init_tick(unsigned long offset)
103 tick_disable_protection();
105 __asm__ __volatile__(
107 " andn %%g1, %1, %%g1\n"
109 " add %%g1, %0, %%g1\n"
111 "1: wr %%g1, 0x0, %%tick_cmpr\n"
112 " rd %%tick_cmpr, %%g0"
114 : "r" (offset), "r" (TICK_PRIV_BIT)
118 static unsigned long tick_get_tick(void)
122 __asm__ __volatile__("rd %%tick, %0\n\t"
126 return ret & ~TICK_PRIV_BIT;
129 static unsigned long tick_get_compare(void)
133 __asm__ __volatile__("rd %%tick_cmpr, %0\n\t"
140 static unsigned long tick_add_compare(unsigned long adj)
142 unsigned long new_compare;
144 /* Workaround for Spitfire Errata (#54 I think??), I discovered
145 * this via Sun BugID 4008234, mentioned in Solaris-2.5.1 patch
148 * On Blackbird writes to %tick_cmpr can fail, the
149 * workaround seems to be to execute the wr instruction
150 * at the start of an I-cache line, and perform a dummy
151 * read back from %tick_cmpr right after writing to it. -DaveM
153 __asm__ __volatile__("rd %%tick_cmpr, %0\n\t"
154 "ba,pt %%xcc, 1f\n\t"
155 " add %0, %1, %0\n\t"
158 "wr %0, 0, %%tick_cmpr\n\t"
159 "rd %%tick_cmpr, %%g0"
160 : "=&r" (new_compare)
166 static unsigned long tick_add_tick(unsigned long adj, unsigned long offset)
168 unsigned long new_tick, tmp;
170 /* Also need to handle Blackbird bug here too. */
171 __asm__ __volatile__("rd %%tick, %0\n\t"
173 "wrpr %0, 0, %%tick\n\t"
174 "andn %0, %4, %1\n\t"
175 "ba,pt %%xcc, 1f\n\t"
176 " add %1, %3, %1\n\t"
179 "wr %1, 0, %%tick_cmpr\n\t"
180 "rd %%tick_cmpr, %%g0"
181 : "=&r" (new_tick), "=&r" (tmp)
182 : "r" (adj), "r" (offset), "r" (TICK_PRIV_BIT));
187 static struct sparc64_tick_ops tick_operations __read_mostly = {
188 .init_tick = tick_init_tick,
189 .get_tick = tick_get_tick,
190 .get_compare = tick_get_compare,
191 .add_tick = tick_add_tick,
192 .add_compare = tick_add_compare,
193 .softint_mask = 1UL << 0,
196 struct sparc64_tick_ops *tick_ops __read_mostly = &tick_operations;
198 static void stick_init_tick(unsigned long offset)
200 /* Writes to the %tick and %stick register are not
201 * allowed on sun4v. The Hypervisor controls that
204 if (tlb_type != hypervisor) {
205 tick_disable_protection();
207 /* Let the user get at STICK too. */
208 __asm__ __volatile__(
209 " rd %%asr24, %%g2\n"
210 " andn %%g2, %0, %%g2\n"
211 " wr %%g2, 0, %%asr24"
213 : "r" (TICK_PRIV_BIT)
217 __asm__ __volatile__(
218 " rd %%asr24, %%g1\n"
219 " andn %%g1, %1, %%g1\n"
220 " add %%g1, %0, %%g1\n"
221 " wr %%g1, 0x0, %%asr25"
223 : "r" (offset), "r" (TICK_PRIV_BIT)
227 static unsigned long stick_get_tick(void)
231 __asm__ __volatile__("rd %%asr24, %0"
234 return ret & ~TICK_PRIV_BIT;
237 static unsigned long stick_get_compare(void)
241 __asm__ __volatile__("rd %%asr25, %0"
247 static unsigned long stick_add_tick(unsigned long adj, unsigned long offset)
249 unsigned long new_tick, tmp;
251 __asm__ __volatile__("rd %%asr24, %0\n\t"
253 "wr %0, 0, %%asr24\n\t"
254 "andn %0, %4, %1\n\t"
257 : "=&r" (new_tick), "=&r" (tmp)
258 : "r" (adj), "r" (offset), "r" (TICK_PRIV_BIT));
263 static unsigned long stick_add_compare(unsigned long adj)
265 unsigned long new_compare;
267 __asm__ __volatile__("rd %%asr25, %0\n\t"
270 : "=&r" (new_compare)
276 static struct sparc64_tick_ops stick_operations __read_mostly = {
277 .init_tick = stick_init_tick,
278 .get_tick = stick_get_tick,
279 .get_compare = stick_get_compare,
280 .add_tick = stick_add_tick,
281 .add_compare = stick_add_compare,
282 .softint_mask = 1UL << 16,
285 /* On Hummingbird the STICK/STICK_CMPR register is implemented
286 * in I/O space. There are two 64-bit registers each, the
287 * first holds the low 32-bits of the value and the second holds
290 * Since STICK is constantly updating, we have to access it carefully.
292 * The sequence we use to read is:
295 * 3) read high again, if it rolled re-read both low and high again.
297 * Writing STICK safely is also tricky:
298 * 1) write low to zero
302 #define HBIRD_STICKCMP_ADDR 0x1fe0000f060UL
303 #define HBIRD_STICK_ADDR 0x1fe0000f070UL
305 static unsigned long __hbird_read_stick(void)
307 unsigned long ret, tmp1, tmp2, tmp3;
308 unsigned long addr = HBIRD_STICK_ADDR+8;
310 __asm__ __volatile__("ldxa [%1] %5, %2\n"
312 "sub %1, 0x8, %1\n\t"
313 "ldxa [%1] %5, %3\n\t"
314 "add %1, 0x8, %1\n\t"
315 "ldxa [%1] %5, %4\n\t"
317 "bne,a,pn %%xcc, 1b\n\t"
319 "sllx %4, 32, %4\n\t"
321 : "=&r" (ret), "=&r" (addr),
322 "=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3)
323 : "i" (ASI_PHYS_BYPASS_EC_E), "1" (addr));
328 static unsigned long __hbird_read_compare(void)
330 unsigned long low, high;
331 unsigned long addr = HBIRD_STICKCMP_ADDR;
333 __asm__ __volatile__("ldxa [%2] %3, %0\n\t"
334 "add %2, 0x8, %2\n\t"
336 : "=&r" (low), "=&r" (high), "=&r" (addr)
337 : "i" (ASI_PHYS_BYPASS_EC_E), "2" (addr));
339 return (high << 32UL) | low;
342 static void __hbird_write_stick(unsigned long val)
344 unsigned long low = (val & 0xffffffffUL);
345 unsigned long high = (val >> 32UL);
346 unsigned long addr = HBIRD_STICK_ADDR;
348 __asm__ __volatile__("stxa %%g0, [%0] %4\n\t"
349 "add %0, 0x8, %0\n\t"
350 "stxa %3, [%0] %4\n\t"
351 "sub %0, 0x8, %0\n\t"
354 : "0" (addr), "r" (low), "r" (high),
355 "i" (ASI_PHYS_BYPASS_EC_E));
358 static void __hbird_write_compare(unsigned long val)
360 unsigned long low = (val & 0xffffffffUL);
361 unsigned long high = (val >> 32UL);
362 unsigned long addr = HBIRD_STICKCMP_ADDR + 0x8UL;
364 __asm__ __volatile__("stxa %3, [%0] %4\n\t"
365 "sub %0, 0x8, %0\n\t"
368 : "0" (addr), "r" (low), "r" (high),
369 "i" (ASI_PHYS_BYPASS_EC_E));
372 static void hbtick_init_tick(unsigned long offset)
376 tick_disable_protection();
378 /* XXX This seems to be necessary to 'jumpstart' Hummingbird
379 * XXX into actually sending STICK interrupts. I think because
380 * XXX of how we store %tick_cmpr in head.S this somehow resets the
381 * XXX {TICK + STICK} interrupt mux. -DaveM
383 __hbird_write_stick(__hbird_read_stick());
385 val = __hbird_read_stick() & ~TICK_PRIV_BIT;
386 __hbird_write_compare(val + offset);
389 static unsigned long hbtick_get_tick(void)
391 return __hbird_read_stick() & ~TICK_PRIV_BIT;
394 static unsigned long hbtick_get_compare(void)
396 return __hbird_read_compare();
399 static unsigned long hbtick_add_tick(unsigned long adj, unsigned long offset)
403 val = __hbird_read_stick() + adj;
404 __hbird_write_stick(val);
406 val &= ~TICK_PRIV_BIT;
407 __hbird_write_compare(val + offset);
412 static unsigned long hbtick_add_compare(unsigned long adj)
414 unsigned long val = __hbird_read_compare() + adj;
416 val &= ~TICK_PRIV_BIT;
417 __hbird_write_compare(val);
422 static struct sparc64_tick_ops hbtick_operations __read_mostly = {
423 .init_tick = hbtick_init_tick,
424 .get_tick = hbtick_get_tick,
425 .get_compare = hbtick_get_compare,
426 .add_tick = hbtick_add_tick,
427 .add_compare = hbtick_add_compare,
428 .softint_mask = 1UL << 0,
431 /* timer_interrupt() needs to keep up the real-time clock,
432 * as well as call the "do_timer()" routine every clocktick
434 * NOTE: On SUN5 systems the ticker interrupt comes in using 2
435 * interrupts, one at level14 and one with softint bit 0.
437 unsigned long timer_tick_offset __read_mostly;
439 static unsigned long timer_ticks_per_nsec_quotient __read_mostly;
441 #define TICK_SIZE (tick_nsec / 1000)
443 static inline void timer_check_rtc(void)
445 /* last time the cmos clock got updated */
446 static long last_rtc_update;
448 /* Determine when to update the Mostek clock. */
450 xtime.tv_sec > last_rtc_update + 660 &&
451 (xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 &&
452 (xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) {
453 if (set_rtc_mmss(xtime.tv_sec) == 0)
454 last_rtc_update = xtime.tv_sec;
456 last_rtc_update = xtime.tv_sec - 600;
457 /* do it again in 60 s */
461 irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs * regs)
463 unsigned long ticks, compare, pstate;
465 write_seqlock(&xtime_lock);
469 profile_tick(CPU_PROFILING, regs);
470 update_process_times(user_mode(regs));
474 /* Guarantee that the following sequences execute
477 __asm__ __volatile__("rdpr %%pstate, %0\n\t"
478 "wrpr %0, %1, %%pstate"
482 compare = tick_ops->add_compare(timer_tick_offset);
483 ticks = tick_ops->get_tick();
485 /* Restore PSTATE_IE. */
486 __asm__ __volatile__("wrpr %0, 0x0, %%pstate"
489 } while (time_after_eq(ticks, compare));
493 write_sequnlock(&xtime_lock);
499 void timer_tick_interrupt(struct pt_regs *regs)
501 write_seqlock(&xtime_lock);
507 write_sequnlock(&xtime_lock);
511 /* Kick start a stopped clock (procedure from the Sun NVRAM/hostid FAQ). */
512 static void __init kick_start_clock(void)
514 void __iomem *regs = mstk48t02_regs;
518 prom_printf("CLOCK: Clock was stopped. Kick start ");
520 spin_lock_irq(&mostek_lock);
522 /* Turn on the kick start bit to start the oscillator. */
523 tmp = mostek_read(regs + MOSTEK_CREG);
524 tmp |= MSTK_CREG_WRITE;
525 mostek_write(regs + MOSTEK_CREG, tmp);
526 tmp = mostek_read(regs + MOSTEK_SEC);
528 mostek_write(regs + MOSTEK_SEC, tmp);
529 tmp = mostek_read(regs + MOSTEK_HOUR);
530 tmp |= MSTK_KICK_START;
531 mostek_write(regs + MOSTEK_HOUR, tmp);
532 tmp = mostek_read(regs + MOSTEK_CREG);
533 tmp &= ~MSTK_CREG_WRITE;
534 mostek_write(regs + MOSTEK_CREG, tmp);
536 spin_unlock_irq(&mostek_lock);
538 /* Delay to allow the clock oscillator to start. */
539 sec = MSTK_REG_SEC(regs);
540 for (i = 0; i < 3; i++) {
541 while (sec == MSTK_REG_SEC(regs))
542 for (count = 0; count < 100000; count++)
545 sec = MSTK_REG_SEC(regs);
549 spin_lock_irq(&mostek_lock);
551 /* Turn off kick start and set a "valid" time and date. */
552 tmp = mostek_read(regs + MOSTEK_CREG);
553 tmp |= MSTK_CREG_WRITE;
554 mostek_write(regs + MOSTEK_CREG, tmp);
555 tmp = mostek_read(regs + MOSTEK_HOUR);
556 tmp &= ~MSTK_KICK_START;
557 mostek_write(regs + MOSTEK_HOUR, tmp);
558 MSTK_SET_REG_SEC(regs,0);
559 MSTK_SET_REG_MIN(regs,0);
560 MSTK_SET_REG_HOUR(regs,0);
561 MSTK_SET_REG_DOW(regs,5);
562 MSTK_SET_REG_DOM(regs,1);
563 MSTK_SET_REG_MONTH(regs,8);
564 MSTK_SET_REG_YEAR(regs,1996 - MSTK_YEAR_ZERO);
565 tmp = mostek_read(regs + MOSTEK_CREG);
566 tmp &= ~MSTK_CREG_WRITE;
567 mostek_write(regs + MOSTEK_CREG, tmp);
569 spin_unlock_irq(&mostek_lock);
571 /* Ensure the kick start bit is off. If it isn't, turn it off. */
572 while (mostek_read(regs + MOSTEK_HOUR) & MSTK_KICK_START) {
573 prom_printf("CLOCK: Kick start still on!\n");
575 spin_lock_irq(&mostek_lock);
577 tmp = mostek_read(regs + MOSTEK_CREG);
578 tmp |= MSTK_CREG_WRITE;
579 mostek_write(regs + MOSTEK_CREG, tmp);
581 tmp = mostek_read(regs + MOSTEK_HOUR);
582 tmp &= ~MSTK_KICK_START;
583 mostek_write(regs + MOSTEK_HOUR, tmp);
585 tmp = mostek_read(regs + MOSTEK_CREG);
586 tmp &= ~MSTK_CREG_WRITE;
587 mostek_write(regs + MOSTEK_CREG, tmp);
589 spin_unlock_irq(&mostek_lock);
592 prom_printf("CLOCK: Kick start procedure successful.\n");
595 /* Return nonzero if the clock chip battery is low. */
596 static int __init has_low_battery(void)
598 void __iomem *regs = mstk48t02_regs;
601 spin_lock_irq(&mostek_lock);
603 data1 = mostek_read(regs + MOSTEK_EEPROM); /* Read some data. */
604 mostek_write(regs + MOSTEK_EEPROM, ~data1); /* Write back the complement. */
605 data2 = mostek_read(regs + MOSTEK_EEPROM); /* Read back the complement. */
606 mostek_write(regs + MOSTEK_EEPROM, data1); /* Restore original value. */
608 spin_unlock_irq(&mostek_lock);
610 return (data1 == data2); /* Was the write blocked? */
613 /* Probe for the real time clock chip. */
614 static void __init set_system_time(void)
616 unsigned int year, mon, day, hour, min, sec;
617 void __iomem *mregs = mstk48t02_regs;
619 unsigned long dregs = ds1287_regs;
621 unsigned long dregs = 0UL;
625 if (!mregs && !dregs) {
626 prom_printf("Something wrong, clock regs not mapped yet.\n");
631 spin_lock_irq(&mostek_lock);
633 /* Traditional Mostek chip. */
634 tmp = mostek_read(mregs + MOSTEK_CREG);
635 tmp |= MSTK_CREG_READ;
636 mostek_write(mregs + MOSTEK_CREG, tmp);
638 sec = MSTK_REG_SEC(mregs);
639 min = MSTK_REG_MIN(mregs);
640 hour = MSTK_REG_HOUR(mregs);
641 day = MSTK_REG_DOM(mregs);
642 mon = MSTK_REG_MONTH(mregs);
643 year = MSTK_CVT_YEAR( MSTK_REG_YEAR(mregs) );
645 /* Dallas 12887 RTC chip. */
648 sec = CMOS_READ(RTC_SECONDS);
649 min = CMOS_READ(RTC_MINUTES);
650 hour = CMOS_READ(RTC_HOURS);
651 day = CMOS_READ(RTC_DAY_OF_MONTH);
652 mon = CMOS_READ(RTC_MONTH);
653 year = CMOS_READ(RTC_YEAR);
654 } while (sec != CMOS_READ(RTC_SECONDS));
656 if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
664 if ((year += 1900) < 1970)
668 xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
669 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
670 set_normalized_timespec(&wall_to_monotonic,
671 -xtime.tv_sec, -xtime.tv_nsec);
674 tmp = mostek_read(mregs + MOSTEK_CREG);
675 tmp &= ~MSTK_CREG_READ;
676 mostek_write(mregs + MOSTEK_CREG, tmp);
678 spin_unlock_irq(&mostek_lock);
682 /* davem suggests we keep this within the 4M locked kernel image */
683 static u32 starfire_get_time(void)
685 static char obp_gettod[32];
688 sprintf(obp_gettod, "h# %08x unix-gettod",
689 (unsigned int) (long) &unix_tod);
690 prom_feval(obp_gettod);
695 static int starfire_set_time(u32 val)
697 /* Do nothing, time is set using the service processor
698 * console on this platform.
703 static u32 hypervisor_get_time(void)
705 register unsigned long func asm("%o5");
706 register unsigned long arg0 asm("%o0");
707 register unsigned long arg1 asm("%o1");
711 func = HV_FAST_TOD_GET;
714 __asm__ __volatile__("ta %6"
715 : "=&r" (func), "=&r" (arg0), "=&r" (arg1)
716 : "0" (func), "1" (arg0), "2" (arg1),
720 if (arg0 == HV_EWOULDBLOCK) {
725 printk(KERN_WARNING "SUN4V: tod_get() timed out.\n");
728 printk(KERN_WARNING "SUN4V: tod_get() not supported.\n");
732 static int hypervisor_set_time(u32 secs)
734 register unsigned long func asm("%o5");
735 register unsigned long arg0 asm("%o0");
739 func = HV_FAST_TOD_SET;
741 __asm__ __volatile__("ta %4"
742 : "=&r" (func), "=&r" (arg0)
743 : "0" (func), "1" (arg0),
747 if (arg0 == HV_EWOULDBLOCK) {
752 printk(KERN_WARNING "SUN4V: tod_set() timed out.\n");
755 printk(KERN_WARNING "SUN4V: tod_set() not supported.\n");
759 static int __init clock_model_matches(char *model)
761 if (strcmp(model, "mk48t02") &&
762 strcmp(model, "mk48t08") &&
763 strcmp(model, "mk48t59") &&
764 strcmp(model, "m5819") &&
765 strcmp(model, "m5819p") &&
766 strcmp(model, "m5823") &&
767 strcmp(model, "ds1287"))
773 static void __init __clock_assign_common(void __iomem *addr, char *model)
775 if (model[5] == '0' && model[6] == '2') {
776 mstk48t02_regs = addr;
777 } else if(model[5] == '0' && model[6] == '8') {
778 mstk48t08_regs = addr;
779 mstk48t02_regs = mstk48t08_regs + MOSTEK_48T08_48T02;
781 mstk48t59_regs = addr;
782 mstk48t02_regs = mstk48t59_regs + MOSTEK_48T59_48T02;
786 static void __init clock_assign_clk_reg(struct linux_prom_registers *clk_reg,
791 addr = ((unsigned long) clk_reg[0].phys_addr |
792 (((unsigned long) clk_reg[0].which_io) << 32UL));
794 __clock_assign_common((void __iomem *) addr, model);
797 static int __init clock_probe_central(void)
799 struct linux_prom_registers clk_reg[2], *pr;
800 struct device_node *dp;
806 /* Get Central FHC's prom node. */
807 dp = central_bus->child->prom_node;
809 /* Then get the first child device below it. */
813 model = of_get_property(dp, "model", NULL);
814 if (!model || !clock_model_matches(model))
817 pr = of_get_property(dp, "reg", NULL);
818 memcpy(clk_reg, pr, sizeof(clk_reg));
820 apply_fhc_ranges(central_bus->child, clk_reg, 1);
821 apply_central_ranges(central_bus, clk_reg, 1);
823 clock_assign_clk_reg(clk_reg, model);
834 static void __init clock_isa_ebus_assign_regs(struct resource *res, char *model)
836 if (!strcmp(model, "ds1287") ||
837 !strcmp(model, "m5819") ||
838 !strcmp(model, "m5819p") ||
839 !strcmp(model, "m5823")) {
840 ds1287_regs = res->start;
842 mstk48t59_regs = (void __iomem *) res->start;
843 mstk48t02_regs = mstk48t59_regs + MOSTEK_48T59_48T02;
847 static int __init clock_probe_one_ebus_dev(struct linux_ebus_device *edev)
849 struct device_node *dp = edev->prom_node;
852 model = of_get_property(dp, "model", NULL);
853 if (!clock_model_matches(model))
856 clock_isa_ebus_assign_regs(&edev->resource[0], model);
861 static int __init clock_probe_ebus(void)
863 struct linux_ebus *ebus;
865 for_each_ebus(ebus) {
866 struct linux_ebus_device *edev;
868 for_each_ebusdev(edev, ebus) {
869 if (clock_probe_one_ebus_dev(edev))
877 static int __init clock_probe_one_isa_dev(struct sparc_isa_device *idev)
879 struct device_node *dp = idev->prom_node;
882 model = of_get_property(dp, "model", NULL);
883 if (!clock_model_matches(model))
886 clock_isa_ebus_assign_regs(&idev->resource, model);
891 static int __init clock_probe_isa(void)
893 struct sparc_isa_bridge *isa_br;
895 for_each_isa(isa_br) {
896 struct sparc_isa_device *isa_dev;
898 for_each_isadev(isa_dev, isa_br) {
899 if (clock_probe_one_isa_dev(isa_dev))
906 #endif /* CONFIG_PCI */
909 static int __init clock_probe_one_sbus_dev(struct sbus_bus *sbus, struct sbus_dev *sdev)
911 struct resource *res;
915 prom_getstring(sdev->prom_node, "model", model, sizeof(model));
916 if (!clock_model_matches(model))
919 res = &sdev->resource[0];
920 addr = sbus_ioremap(res, 0, 0x800UL, "eeprom");
922 __clock_assign_common(addr, model);
927 static int __init clock_probe_sbus(void)
929 struct sbus_bus *sbus;
931 for_each_sbus(sbus) {
932 struct sbus_dev *sdev;
934 for_each_sbusdev(sdev, sbus) {
935 if (clock_probe_one_sbus_dev(sbus, sdev))
944 void __init clock_probe(void)
953 if (this_is_starfire) {
954 xtime.tv_sec = starfire_get_time();
955 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
956 set_normalized_timespec(&wall_to_monotonic,
957 -xtime.tv_sec, -xtime.tv_nsec);
960 if (tlb_type == hypervisor) {
961 xtime.tv_sec = hypervisor_get_time();
962 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
963 set_normalized_timespec(&wall_to_monotonic,
964 -xtime.tv_sec, -xtime.tv_nsec);
968 /* Check FHC Central then EBUSs then ISA bridges then SBUSs.
969 * That way we handle the presence of multiple properly.
971 * As a special case, machines with Central must provide the
974 if (!clock_probe_central() &&
976 !clock_probe_ebus() &&
977 !clock_probe_isa() &&
983 printk(KERN_WARNING "No clock chip found.\n");
987 local_irq_save(flags);
989 if (mstk48t02_regs != NULL) {
990 /* Report a low battery voltage condition. */
991 if (has_low_battery())
992 prom_printf("NVRAM: Low battery voltage!\n");
994 /* Kick start the clock if it is completely stopped. */
995 if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP)
1001 local_irq_restore(flags);
1004 /* This is gets the master TICK_INT timer going. */
1005 static unsigned long sparc64_init_timers(void)
1007 struct device_node *dp;
1008 struct property *prop;
1009 unsigned long clock;
1011 extern void smp_tick_init(void);
1014 dp = of_find_node_by_path("/");
1015 if (tlb_type == spitfire) {
1016 unsigned long ver, manuf, impl;
1018 __asm__ __volatile__ ("rdpr %%ver, %0"
1020 manuf = ((ver >> 48) & 0xffff);
1021 impl = ((ver >> 32) & 0xffff);
1022 if (manuf == 0x17 && impl == 0x13) {
1023 /* Hummingbird, aka Ultra-IIe */
1024 tick_ops = &hbtick_operations;
1025 prop = of_find_property(dp, "stick-frequency", NULL);
1027 tick_ops = &tick_operations;
1028 cpu_find_by_instance(0, &dp, NULL);
1029 prop = of_find_property(dp, "clock-frequency", NULL);
1032 tick_ops = &stick_operations;
1033 prop = of_find_property(dp, "stick-frequency", NULL);
1035 clock = *(unsigned int *) prop->value;
1036 timer_tick_offset = clock / HZ;
1045 static void sparc64_start_timers(void)
1047 unsigned long pstate;
1049 /* Guarantee that the following sequences execute
1052 __asm__ __volatile__("rdpr %%pstate, %0\n\t"
1053 "wrpr %0, %1, %%pstate"
1057 tick_ops->init_tick(timer_tick_offset);
1059 /* Restore PSTATE_IE. */
1060 __asm__ __volatile__("wrpr %0, 0x0, %%pstate"
1068 unsigned long clock_tick_ref;
1069 unsigned int ref_freq;
1071 static DEFINE_PER_CPU(struct freq_table, sparc64_freq_table) = { 0, 0 };
1073 unsigned long sparc64_get_clock_tick(unsigned int cpu)
1075 struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu);
1077 if (ft->clock_tick_ref)
1078 return ft->clock_tick_ref;
1079 return cpu_data(cpu).clock_tick;
1082 #ifdef CONFIG_CPU_FREQ
1084 static int sparc64_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
1087 struct cpufreq_freqs *freq = data;
1088 unsigned int cpu = freq->cpu;
1089 struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu);
1091 if (!ft->ref_freq) {
1092 ft->ref_freq = freq->old;
1093 ft->clock_tick_ref = cpu_data(cpu).clock_tick;
1095 if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) ||
1096 (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) ||
1097 (val == CPUFREQ_RESUMECHANGE)) {
1098 cpu_data(cpu).clock_tick =
1099 cpufreq_scale(ft->clock_tick_ref,
1107 static struct notifier_block sparc64_cpufreq_notifier_block = {
1108 .notifier_call = sparc64_cpufreq_notifier
1111 #endif /* CONFIG_CPU_FREQ */
1113 static struct time_interpolator sparc64_cpu_interpolator = {
1114 .source = TIME_SOURCE_CPU,
1116 .mask = 0xffffffffffffffffLL
1119 /* The quotient formula is taken from the IA64 port. */
1120 #define SPARC64_NSEC_PER_CYC_SHIFT 30UL
1121 void __init time_init(void)
1123 unsigned long clock = sparc64_init_timers();
1125 sparc64_cpu_interpolator.frequency = clock;
1126 register_time_interpolator(&sparc64_cpu_interpolator);
1128 /* Now that the interpolator is registered, it is
1129 * safe to start the timer ticking.
1131 sparc64_start_timers();
1133 timer_ticks_per_nsec_quotient =
1134 (((NSEC_PER_SEC << SPARC64_NSEC_PER_CYC_SHIFT) +
1135 (clock / 2)) / clock);
1137 #ifdef CONFIG_CPU_FREQ
1138 cpufreq_register_notifier(&sparc64_cpufreq_notifier_block,
1139 CPUFREQ_TRANSITION_NOTIFIER);
1143 unsigned long long sched_clock(void)
1145 unsigned long ticks = tick_ops->get_tick();
1147 return (ticks * timer_ticks_per_nsec_quotient)
1148 >> SPARC64_NSEC_PER_CYC_SHIFT;
1151 static int set_rtc_mmss(unsigned long nowtime)
1153 int real_seconds, real_minutes, chip_minutes;
1154 void __iomem *mregs = mstk48t02_regs;
1156 unsigned long dregs = ds1287_regs;
1158 unsigned long dregs = 0UL;
1160 unsigned long flags;
1164 * Not having a register set can lead to trouble.
1165 * Also starfire doesn't have a tod clock.
1167 if (!mregs && !dregs)
1171 spin_lock_irqsave(&mostek_lock, flags);
1173 /* Read the current RTC minutes. */
1174 tmp = mostek_read(mregs + MOSTEK_CREG);
1175 tmp |= MSTK_CREG_READ;
1176 mostek_write(mregs + MOSTEK_CREG, tmp);
1178 chip_minutes = MSTK_REG_MIN(mregs);
1180 tmp = mostek_read(mregs + MOSTEK_CREG);
1181 tmp &= ~MSTK_CREG_READ;
1182 mostek_write(mregs + MOSTEK_CREG, tmp);
1185 * since we're only adjusting minutes and seconds,
1186 * don't interfere with hour overflow. This avoids
1187 * messing with unknown time zones but requires your
1188 * RTC not to be off by more than 15 minutes
1190 real_seconds = nowtime % 60;
1191 real_minutes = nowtime / 60;
1192 if (((abs(real_minutes - chip_minutes) + 15)/30) & 1)
1193 real_minutes += 30; /* correct for half hour time zone */
1196 if (abs(real_minutes - chip_minutes) < 30) {
1197 tmp = mostek_read(mregs + MOSTEK_CREG);
1198 tmp |= MSTK_CREG_WRITE;
1199 mostek_write(mregs + MOSTEK_CREG, tmp);
1201 MSTK_SET_REG_SEC(mregs,real_seconds);
1202 MSTK_SET_REG_MIN(mregs,real_minutes);
1204 tmp = mostek_read(mregs + MOSTEK_CREG);
1205 tmp &= ~MSTK_CREG_WRITE;
1206 mostek_write(mregs + MOSTEK_CREG, tmp);
1208 spin_unlock_irqrestore(&mostek_lock, flags);
1212 spin_unlock_irqrestore(&mostek_lock, flags);
1218 unsigned char save_control, save_freq_select;
1220 /* Stolen from arch/i386/kernel/time.c, see there for
1221 * credits and descriptive comments.
1223 spin_lock_irqsave(&rtc_lock, flags);
1224 save_control = CMOS_READ(RTC_CONTROL); /* tell the clock it's being set */
1225 CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL);
1227 save_freq_select = CMOS_READ(RTC_FREQ_SELECT); /* stop and reset prescaler */
1228 CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
1230 chip_minutes = CMOS_READ(RTC_MINUTES);
1231 if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD)
1232 BCD_TO_BIN(chip_minutes);
1233 real_seconds = nowtime % 60;
1234 real_minutes = nowtime / 60;
1235 if (((abs(real_minutes - chip_minutes) + 15)/30) & 1)
1239 if (abs(real_minutes - chip_minutes) < 30) {
1240 if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
1241 BIN_TO_BCD(real_seconds);
1242 BIN_TO_BCD(real_minutes);
1244 CMOS_WRITE(real_seconds,RTC_SECONDS);
1245 CMOS_WRITE(real_minutes,RTC_MINUTES);
1248 "set_rtc_mmss: can't update from %d to %d\n",
1249 chip_minutes, real_minutes);
1253 CMOS_WRITE(save_control, RTC_CONTROL);
1254 CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
1255 spin_unlock_irqrestore(&rtc_lock, flags);
1261 #define RTC_IS_OPEN 0x01 /* means /dev/rtc is in use */
1262 static unsigned char mini_rtc_status; /* bitmapped status byte. */
1264 /* months start at 0 now */
1265 static unsigned char days_in_mo[] =
1266 {31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31};
1269 #define STARTOFTIME 1970
1270 #define SECDAY 86400L
1271 #define SECYR (SECDAY * 365)
1272 #define leapyear(year) ((year) % 4 == 0 && \
1273 ((year) % 100 != 0 || (year) % 400 == 0))
1274 #define days_in_year(a) (leapyear(a) ? 366 : 365)
1275 #define days_in_month(a) (month_days[(a) - 1])
1277 static int month_days[12] = {
1278 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31
1282 * This only works for the Gregorian calendar - i.e. after 1752 (in the UK)
1284 static void GregorianDay(struct rtc_time * tm)
1289 int MonthOffset[] = { 0, 31, 59, 90, 120, 151, 181, 212, 243, 273, 304, 334 };
1291 lastYear = tm->tm_year - 1;
1294 * Number of leap corrections to apply up to end of last year
1296 leapsToDate = lastYear / 4 - lastYear / 100 + lastYear / 400;
1299 * This year is a leap year if it is divisible by 4 except when it is
1300 * divisible by 100 unless it is divisible by 400
1302 * e.g. 1904 was a leap year, 1900 was not, 1996 is, and 2000 was
1304 day = tm->tm_mon > 2 && leapyear(tm->tm_year);
1306 day += lastYear*365 + leapsToDate + MonthOffset[tm->tm_mon-1] +
1309 tm->tm_wday = day % 7;
1312 static void to_tm(int tim, struct rtc_time *tm)
1315 register long hms, day;
1320 /* Hours, minutes, seconds are easy */
1321 tm->tm_hour = hms / 3600;
1322 tm->tm_min = (hms % 3600) / 60;
1323 tm->tm_sec = (hms % 3600) % 60;
1325 /* Number of years in days */
1326 for (i = STARTOFTIME; day >= days_in_year(i); i++)
1327 day -= days_in_year(i);
1330 /* Number of months in days left */
1331 if (leapyear(tm->tm_year))
1332 days_in_month(FEBRUARY) = 29;
1333 for (i = 1; day >= days_in_month(i); i++)
1334 day -= days_in_month(i);
1335 days_in_month(FEBRUARY) = 28;
1338 /* Days are what is left over (+1) from all that. */
1339 tm->tm_mday = day + 1;
1342 * Determine the day of week
1347 /* Both Starfire and SUN4V give us seconds since Jan 1st, 1970,
1348 * aka Unix time. So we have to convert to/from rtc_time.
1350 static inline void mini_get_rtc_time(struct rtc_time *time)
1352 unsigned long flags;
1355 spin_lock_irqsave(&rtc_lock, flags);
1357 if (this_is_starfire)
1358 seconds = starfire_get_time();
1359 else if (tlb_type == hypervisor)
1360 seconds = hypervisor_get_time();
1361 spin_unlock_irqrestore(&rtc_lock, flags);
1363 to_tm(seconds, time);
1364 time->tm_year -= 1900;
1368 static inline int mini_set_rtc_time(struct rtc_time *time)
1370 u32 seconds = mktime(time->tm_year + 1900, time->tm_mon + 1,
1371 time->tm_mday, time->tm_hour,
1372 time->tm_min, time->tm_sec);
1373 unsigned long flags;
1376 spin_lock_irqsave(&rtc_lock, flags);
1378 if (this_is_starfire)
1379 err = starfire_set_time(seconds);
1380 else if (tlb_type == hypervisor)
1381 err = hypervisor_set_time(seconds);
1382 spin_unlock_irqrestore(&rtc_lock, flags);
1387 static int mini_rtc_ioctl(struct inode *inode, struct file *file,
1388 unsigned int cmd, unsigned long arg)
1390 struct rtc_time wtime;
1391 void __user *argp = (void __user *)arg;
1401 case RTC_UIE_OFF: /* disable ints from RTC updates. */
1404 case RTC_UIE_ON: /* enable ints for RTC updates. */
1407 case RTC_RD_TIME: /* Read the time/date from RTC */
1408 /* this doesn't get week-day, who cares */
1409 memset(&wtime, 0, sizeof(wtime));
1410 mini_get_rtc_time(&wtime);
1412 return copy_to_user(argp, &wtime, sizeof(wtime)) ? -EFAULT : 0;
1414 case RTC_SET_TIME: /* Set the RTC */
1417 unsigned char leap_yr;
1419 if (!capable(CAP_SYS_TIME))
1422 if (copy_from_user(&wtime, argp, sizeof(wtime)))
1425 year = wtime.tm_year + 1900;
1426 leap_yr = ((!(year % 4) && (year % 100)) ||
1429 if ((wtime.tm_mon < 0 || wtime.tm_mon > 11) || (wtime.tm_mday < 1))
1432 if (wtime.tm_mday < 0 || wtime.tm_mday >
1433 (days_in_mo[wtime.tm_mon] + ((wtime.tm_mon == 1) && leap_yr)))
1436 if (wtime.tm_hour < 0 || wtime.tm_hour >= 24 ||
1437 wtime.tm_min < 0 || wtime.tm_min >= 60 ||
1438 wtime.tm_sec < 0 || wtime.tm_sec >= 60)
1441 return mini_set_rtc_time(&wtime);
1448 static int mini_rtc_open(struct inode *inode, struct file *file)
1450 if (mini_rtc_status & RTC_IS_OPEN)
1453 mini_rtc_status |= RTC_IS_OPEN;
1458 static int mini_rtc_release(struct inode *inode, struct file *file)
1460 mini_rtc_status &= ~RTC_IS_OPEN;
1465 static struct file_operations mini_rtc_fops = {
1466 .owner = THIS_MODULE,
1467 .ioctl = mini_rtc_ioctl,
1468 .open = mini_rtc_open,
1469 .release = mini_rtc_release,
1472 static struct miscdevice rtc_mini_dev =
1476 .fops = &mini_rtc_fops,
1479 static int __init rtc_mini_init(void)
1483 if (tlb_type != hypervisor && !this_is_starfire)
1486 printk(KERN_INFO "Mini RTC Driver\n");
1488 retval = misc_register(&rtc_mini_dev);
1495 static void __exit rtc_mini_exit(void)
1497 misc_deregister(&rtc_mini_dev);
1501 module_init(rtc_mini_init);
1502 module_exit(rtc_mini_exit);